
#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#include <stdio.h>
#include <stdlib.h>
#define N 4;

//cudaError_t addWithCuda(int *c, const int *a, const int *b, unsigned int size);

//__global__ void addKernel(int *c, const int *a, const int *b)
//{
//    int i = threadIdx.x;
//    c[i] = a[i] + b[i];
//}

__global__ void addKernel(double *a, double *b, double *c,int size)
{
    int i = threadIdx.x;
	for(int k = 0;k<size; k++)
	{
		if(i < size)
			c[i] += a[i*size+k] * b[k];
	}
}

void simple_dgemv(double *A, double *B, double *C,int size)
{
	int i,j;

	for(i = 0;i < size; i++)
	{
		double prod = 0;

		for(j = 0;j < size; j++)
		{	
			prod += A[i * size + j] * B[j];
		}
		C[i] = prod;
	}
}

//__global__ void MVKernel_gm(double *A, double *X, double *Y,int ARRAY_SIZE)
//{
//	//int bx = blockIdx.x; 
//          //int by = blockIdx.y;
//	int tid = threadIdx.x; 
//          //int ty = threadIdx.y;
//	// Calculate the row index of the Pd element and M
//	//int Row = bx * BLOCK_SIZE + tx;
//	// Calculate the column idenx of Pd and N
//	//int Col = bx * BLOCK_SIZE + tx;
//  
//	double tmpSum = 0;
//
//	for (int k = 0; k < ARRAY_SIZE; k++) 
//    {
//      if(tid < ARRAY_SIZE)
//      tmpSum += A[tid*ARRAY_SIZE+k] * X[k];
//    }
//
//	__syncthreads();
//  
//	if(tid < ARRAY_SIZE)  		
//		Y[tid] = tmpSum;
//
//	__syncthreads();
//}

int main()
{
    const int arraySize = 5;
    const int a[arraySize] = { 1, 2, 3, 4, 5 };
    const int b[arraySize] = { 10, 20, 30, 40, 50 };
    int c[arraySize] = { 0 };

	int ARRAY_SIZE = 5;
	int ARRAY_SIZE2 = ARRAY_SIZE*ARRAY_SIZE;

	//Host
	double *h_a;
	double *h_b;
	double *h_c;

	//Device
	double *d_a;
	double *d_b;
	double *d_c;

	//generate the input array on the host
	h_a=(double*)malloc(sizeof(double)*ARRAY_SIZE2);
    h_b=(double*)malloc(sizeof(double)*ARRAY_SIZE);
    h_c=(double*)malloc(sizeof(double)*ARRAY_SIZE);

	//inital the h_a, h_b
	for(int i = 0;i<ARRAY_SIZE2;i++){
		h_a[i] = double(i);
	}
	for(int i = 0;i<ARRAY_SIZE;i++){
		h_b[i] = double(i);
	}
	for(int i = 0;i<ARRAY_SIZE;i++){
		h_c[i] = double(0);
	}


	////print out test
	//printf("\nThe vector A is:\n");
	//for(int i=0;i<ARRAY_SIZE2;i++){
	//	printf("%f", h_a[i]);
	//	printf(((i%4)!=3)? "\t" : "\n");
	//}

	//printf("\nThe Matrix X is:\n");
	//for(int i=0;i<ARRAY_SIZE;i++){
	//	printf("%f", h_b[i]);
	//	printf(((i%4)!=3)? "\t" : "\n");
	//}


    //// Add vectors in parallel.
    //cudaError_t cudaStatus = addWithCuda(c, a, b, arraySize);
    //if (cudaStatus != cudaSuccess) {
    //    fprintf(stderr, "addWithCuda failed!");
    //    return 1;
    //}

    //printf("{1,2,3,4,5} + {10,20,30,40,50} = {%d,%d,%d,%d,%d}\n",
    //    c[0], c[1], c[2], c[3], c[4]);

    //// cudaDeviceReset must be called before exiting in order for profiling and
    //// tracing tools such as Nsight and Visual Profiler to show complete traces.
    //cudaStatus = cudaDeviceReset();
    //if (cudaStatus != cudaSuccess) {
    //    fprintf(stderr, "cudaDeviceReset failed!");
    //    return 1;
    //}

	//allocate GPU memory
	cudaMalloc((void**)&d_a, sizeof(double)*ARRAY_SIZE2);
    cudaMalloc((void**)&d_b, sizeof(double)*ARRAY_SIZE);
    cudaMalloc((void**)&d_c, sizeof(double)*ARRAY_SIZE);

	//transfer the array from Host to device(CPU->GPU)
	cudaMemcpy(d_a, h_a, sizeof(double)*ARRAY_SIZE2, cudaMemcpyHostToDevice);
    cudaMemcpy(d_b, h_b, sizeof(double)*ARRAY_SIZE, cudaMemcpyHostToDevice);
	cudaMemcpy(d_c, h_c, sizeof(double)*ARRAY_SIZE, cudaMemcpyHostToDevice);

	//Run kernel function calculate the matrix-vector multiplication
	printf("\n\nRunning Kernel...\n\n");
    //MVKernel_gm<<<1,256>>>(d_a, d_b, d_c, ARRAY_SIZE);//ARRAY_SIZE/256+1, 256
	addKernel<<<1, ARRAY_SIZE>>>(d_a,d_b,d_c,ARRAY_SIZE);

	//transfer the array from Device to Host(GPU->CPU)
	//cudaMemcpy(h_out, d_out, ARRAY_BYTES, cudaMemcpyDeviceToHost);
	cudaMemcpy(h_c, d_c, sizeof(double)*ARRAY_SIZE, cudaMemcpyDeviceToHost);

	//print out the result array
	for(int i = 0; i<ARRAY_SIZE;i++){
		printf("%f\n", h_c[i]);
		//printf(((i%4)!=3)? "\t" : "\n");
	}

	//free GPU memory allocation
	cudaFree(d_a);
    cudaFree(d_b);
    cudaFree(d_c);

	//free Host memory allocation
	free(h_a);
	free(h_b);
	free(h_c);

	system("pause");

    return 0;
}

// Helper function for using CUDA to add vectors in parallel.
//cudaError_t addWithCuda(int *c, const int *a, const int *b, unsigned int size)
//{
//    int *dev_a = 0;
//    int *dev_b = 0;
//    int *dev_c = 0;
//    cudaError_t cudaStatus;
//
//    // Choose which GPU to run on, change this on a multi-GPU system.
//    cudaStatus = cudaSetDevice(0);
//    if (cudaStatus != cudaSuccess) {
//        fprintf(stderr, "cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?");
//        goto Error;
//    }
//
//    // Allocate GPU buffers for three vectors (two input, one output)    .
//    cudaStatus = cudaMalloc((void**)&dev_c, size * sizeof(int));
//    if (cudaStatus != cudaSuccess) {
//        fprintf(stderr, "cudaMalloc failed!");
//        goto Error;
//    }
//
//    cudaStatus = cudaMalloc((void**)&dev_a, size * sizeof(int));
//    if (cudaStatus != cudaSuccess) {
//        fprintf(stderr, "cudaMalloc failed!");
//        goto Error;
//    }
//
//    cudaStatus = cudaMalloc((void**)&dev_b, size * sizeof(int));
//    if (cudaStatus != cudaSuccess) {
//        fprintf(stderr, "cudaMalloc failed!");
//        goto Error;
//    }
//
//    // Copy input vectors from host memory to GPU buffers.
//    cudaStatus = cudaMemcpy(dev_a, a, size * sizeof(int), cudaMemcpyHostToDevice);
//    if (cudaStatus != cudaSuccess) {
//        fprintf(stderr, "cudaMemcpy failed!");
//        goto Error;
//    }
//
//    cudaStatus = cudaMemcpy(dev_b, b, size * sizeof(int), cudaMemcpyHostToDevice);
//    if (cudaStatus != cudaSuccess) {
//        fprintf(stderr, "cudaMemcpy failed!");
//        goto Error;
//    }
//
//    // Launch a kernel on the GPU with one thread for each element.
//    //addKernel<<<1, size>>>(dev_c, dev_a, dev_b);
//
//    // Check for any errors launching the kernel
//    cudaStatus = cudaGetLastError();
//    if (cudaStatus != cudaSuccess) {
//        fprintf(stderr, "addKernel launch failed: %s\n", cudaGetErrorString(cudaStatus));
//        goto Error;
//    }
//    
//    // cudaDeviceSynchronize waits for the kernel to finish, and returns
//    // any errors encountered during the launch.
//    cudaStatus = cudaDeviceSynchronize();
//    if (cudaStatus != cudaSuccess) {
//        fprintf(stderr, "cudaDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
//        goto Error;
//    }
//
//    // Copy output vector from GPU buffer to host memory.
//    cudaStatus = cudaMemcpy(c, dev_c, size * sizeof(int), cudaMemcpyDeviceToHost);
//    if (cudaStatus != cudaSuccess) {
//        fprintf(stderr, "cudaMemcpy failed!");
//        goto Error;
//    }
//
//Error:
//    cudaFree(dev_c);
//    cudaFree(dev_a);
//    cudaFree(dev_b);
//
//
//    
//    return cudaStatus;
//}

	.file	"tmpxft_002f68d5_00000000-6_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z12simple_dgemvPdS_S_i
	.type	_Z12simple_dgemvPdS_S_i, @function
_Z12simple_dgemvPdS_S_i:
.LFB2027:
	.cfi_startproc
	endbr64
	movslq	%ecx, %r9
	xorl	%r8d, %r8d
	salq	$3, %r9
.L3:
	cmpl	%r8d, %ecx
	jle	.L8
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
.L4:
	movsd	(%rdi,%rax,8), %xmm1
	mulsd	(%rsi,%rax,8), %xmm1
	incq	%rax
	addsd	%xmm1, %xmm0
	cmpl	%eax, %ecx
	jg	.L4
	movsd	%xmm0, (%rdx,%r8,8)
	addq	%r9, %rdi
	incq	%r8
	jmp	.L3
.L8:
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z12simple_dgemvPdS_S_i, .-_Z12simple_dgemvPdS_S_i
	.globl	_Z33__device_stub__Z9addKernelPdS_S_iPdS_S_i
	.type	_Z33__device_stub__Z9addKernelPdS_S_iPdS_S_i, @function
_Z33__device_stub__Z9addKernelPdS_S_iPdS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9addKernelPdS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L9:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z33__device_stub__Z9addKernelPdS_S_iPdS_S_i, .-_Z33__device_stub__Z9addKernelPdS_S_iPdS_S_i
	.globl	_Z9addKernelPdS_S_i
	.type	_Z9addKernelPdS_S_i, @function
_Z9addKernelPdS_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z9addKernelPdS_S_iPdS_S_i
	.cfi_endproc
.LFE2054:
	.size	_Z9addKernelPdS_S_i, .-_Z9addKernelPdS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC5:
	.string	"\n\nRunning Kernel...\n\n"
.LC6:
	.string	"%f\n"
.LC7:
	.string	"pause"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$200, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$40, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$40, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%rax, %rbx
	xorl	%eax, %eax
.L15:
	cvtsi2sdl	%eax, %xmm0
	movsd	%xmm0, (%r12,%rax,8)
	incq	%rax
	cmpq	$25, %rax
	jne	.L15
	movq	.LC1(%rip), %rax
	movq	$0x000000000, 0(%rbp)
	leaq	8(%rsp), %rdi
	movl	$200, %esi
	movq	$0x000000000, (%rbx)
	movq	%rax, 8(%rbp)
	movq	.LC2(%rip), %rax
	movq	$0x000000000, 8(%rbx)
	movq	%rax, 16(%rbp)
	movq	.LC3(%rip), %rax
	movq	$0x000000000, 16(%rbx)
	movq	%rax, 24(%rbp)
	movq	.LC4(%rip), %rax
	movq	$0x000000000, 24(%rbx)
	movq	%rax, 32(%rbp)
	movq	$0x000000000, 32(%rbx)
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$40, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$40, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$200, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$40, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$40, %edx
	call	cudaMemcpy@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967301, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$5, %ecx
	movq	8(%rsp), %rdi
	call	_Z33__device_stub__Z9addKernelPdS_S_iPdS_S_i
.L16:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	xorl	%r13d, %r13d
	movl	$40, %edx
	leaq	.LC6(%rip), %r14
	call	cudaMemcpy@PLT
.L17:
	movsd	(%rbx,%r13,8), %xmm0
	movq	%r14, %rsi
	movl	$2, %edi
	movb	$1, %al
	incq	%r13
	call	__printf_chk@PLT
	cmpq	$5, %r13
	jne	.L17
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	leaq	.LC7(%rip), %rdi
	call	system@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z9addKernelPdS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9addKernelPdS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	0
	.long	1072693248
	.align 8
.LC2:
	.long	0
	.long	1073741824
	.align 8
.LC3:
	.long	0
	.long	1074266112
	.align 8
.LC4:
	.long	0
	.long	1074790400
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include "hip/hip_runtime.h"


#include <stdio.h>
#include <stdlib.h>
#define N 4;

//cudaError_t addWithCuda(int *c, const int *a, const int *b, unsigned int size);

//__global__ void addKernel(int *c, const int *a, const int *b)
//{
//    int i = threadIdx.x;
//    c[i] = a[i] + b[i];
//}

__global__ void addKernel(double *a, double *b, double *c,int size)
{
    int i = threadIdx.x;
	for(int k = 0;k<size; k++)
	{
		if(i < size)
			c[i] += a[i*size+k] * b[k];
	}
}

void simple_dgemv(double *A, double *B, double *C,int size)
{
	int i,j;

	for(i = 0;i < size; i++)
	{
		double prod = 0;

		for(j = 0;j < size; j++)
		{	
			prod += A[i * size + j] * B[j];
		}
		C[i] = prod;
	}
}

//__global__ void MVKernel_gm(double *A, double *X, double *Y,int ARRAY_SIZE)
//{
//	//int bx = blockIdx.x; 
//          //int by = blockIdx.y;
//	int tid = threadIdx.x; 
//          //int ty = threadIdx.y;
//	// Calculate the row index of the Pd element and M
//	//int Row = bx * BLOCK_SIZE + tx;
//	// Calculate the column idenx of Pd and N
//	//int Col = bx * BLOCK_SIZE + tx;
//  
//	double tmpSum = 0;
//
//	for (int k = 0; k < ARRAY_SIZE; k++) 
//    {
//      if(tid < ARRAY_SIZE)
//      tmpSum += A[tid*ARRAY_SIZE+k] * X[k];
//    }
//
//	__syncthreads();
//  
//	if(tid < ARRAY_SIZE)  		
//		Y[tid] = tmpSum;
//
//	__syncthreads();
//}

int main()
{
    const int arraySize = 5;
    const int a[arraySize] = { 1, 2, 3, 4, 5 };
    const int b[arraySize] = { 10, 20, 30, 40, 50 };
    int c[arraySize] = { 0 };

	int ARRAY_SIZE = 5;
	int ARRAY_SIZE2 = ARRAY_SIZE*ARRAY_SIZE;

	//Host
	double *h_a;
	double *h_b;
	double *h_c;

	//Device
	double *d_a;
	double *d_b;
	double *d_c;

	//generate the input array on the host
	h_a=(double*)malloc(sizeof(double)*ARRAY_SIZE2);
    h_b=(double*)malloc(sizeof(double)*ARRAY_SIZE);
    h_c=(double*)malloc(sizeof(double)*ARRAY_SIZE);

	//inital the h_a, h_b
	for(int i = 0;i<ARRAY_SIZE2;i++){
		h_a[i] = double(i);
	}
	for(int i = 0;i<ARRAY_SIZE;i++){
		h_b[i] = double(i);
	}
	for(int i = 0;i<ARRAY_SIZE;i++){
		h_c[i] = double(0);
	}


	////print out test
	//printf("\nThe vector A is:\n");
	//for(int i=0;i<ARRAY_SIZE2;i++){
	//	printf("%f", h_a[i]);
	//	printf(((i%4)!=3)? "\t" : "\n");
	//}

	//printf("\nThe Matrix X is:\n");
	//for(int i=0;i<ARRAY_SIZE;i++){
	//	printf("%f", h_b[i]);
	//	printf(((i%4)!=3)? "\t" : "\n");
	//}


    //// Add vectors in parallel.
    //cudaError_t cudaStatus = addWithCuda(c, a, b, arraySize);
    //if (cudaStatus != cudaSuccess) {
    //    fprintf(stderr, "addWithCuda failed!");
    //    return 1;
    //}

    //printf("{1,2,3,4,5} + {10,20,30,40,50} = {%d,%d,%d,%d,%d}\n",
    //    c[0], c[1], c[2], c[3], c[4]);

    //// cudaDeviceReset must be called before exiting in order for profiling and
    //// tracing tools such as Nsight and Visual Profiler to show complete traces.
    //cudaStatus = cudaDeviceReset();
    //if (cudaStatus != cudaSuccess) {
    //    fprintf(stderr, "cudaDeviceReset failed!");
    //    return 1;
    //}

	//allocate GPU memory
	hipMalloc((void**)&d_a, sizeof(double)*ARRAY_SIZE2);
    hipMalloc((void**)&d_b, sizeof(double)*ARRAY_SIZE);
    hipMalloc((void**)&d_c, sizeof(double)*ARRAY_SIZE);

	//transfer the array from Host to device(CPU->GPU)
	hipMemcpy(d_a, h_a, sizeof(double)*ARRAY_SIZE2, hipMemcpyHostToDevice);
    hipMemcpy(d_b, h_b, sizeof(double)*ARRAY_SIZE, hipMemcpyHostToDevice);
	hipMemcpy(d_c, h_c, sizeof(double)*ARRAY_SIZE, hipMemcpyHostToDevice);

	//Run kernel function calculate the matrix-vector multiplication
	printf("\n\nRunning Kernel...\n\n");
    //MVKernel_gm<<<1,256>>>(d_a, d_b, d_c, ARRAY_SIZE);//ARRAY_SIZE/256+1, 256
	addKernel<<<1, ARRAY_SIZE>>>(d_a,d_b,d_c,ARRAY_SIZE);

	//transfer the array from Device to Host(GPU->CPU)
	//cudaMemcpy(h_out, d_out, ARRAY_BYTES, cudaMemcpyDeviceToHost);
	hipMemcpy(h_c, d_c, sizeof(double)*ARRAY_SIZE, hipMemcpyDeviceToHost);

	//print out the result array
	for(int i = 0; i<ARRAY_SIZE;i++){
		printf("%f\n", h_c[i]);
		//printf(((i%4)!=3)? "\t" : "\n");
	}

	//free GPU memory allocation
	hipFree(d_a);
    hipFree(d_b);
    hipFree(d_c);

	//free Host memory allocation
	free(h_a);
	free(h_b);
	free(h_c);

	system("pause");

    return 0;
}

// Helper function for using CUDA to add vectors in parallel.
//cudaError_t addWithCuda(int *c, const int *a, const int *b, unsigned int size)
//{
//    int *dev_a = 0;
//    int *dev_b = 0;
//    int *dev_c = 0;
//    cudaError_t cudaStatus;
//
//    // Choose which GPU to run on, change this on a multi-GPU system.
//    cudaStatus = cudaSetDevice(0);
//    if (cudaStatus != cudaSuccess) {
//        fprintf(stderr, "cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?");
//        goto Error;
//    }
//
//    // Allocate GPU buffers for three vectors (two input, one output)    .
//    cudaStatus = cudaMalloc((void**)&dev_c, size * sizeof(int));
//    if (cudaStatus != cudaSuccess) {
//        fprintf(stderr, "cudaMalloc failed!");
//        goto Error;
//    }
//
//    cudaStatus = cudaMalloc((void**)&dev_a, size * sizeof(int));
//    if (cudaStatus != cudaSuccess) {
//        fprintf(stderr, "cudaMalloc failed!");
//        goto Error;
//    }
//
//    cudaStatus = cudaMalloc((void**)&dev_b, size * sizeof(int));
//    if (cudaStatus != cudaSuccess) {
//        fprintf(stderr, "cudaMalloc failed!");
//        goto Error;
//    }
//
//    // Copy input vectors from host memory to GPU buffers.
//    cudaStatus = cudaMemcpy(dev_a, a, size * sizeof(int), cudaMemcpyHostToDevice);
//    if (cudaStatus != cudaSuccess) {
//        fprintf(stderr, "cudaMemcpy failed!");
//        goto Error;
//    }
//
//    cudaStatus = cudaMemcpy(dev_b, b, size * sizeof(int), cudaMemcpyHostToDevice);
//    if (cudaStatus != cudaSuccess) {
//        fprintf(stderr, "cudaMemcpy failed!");
//        goto Error;
//    }
//
//    // Launch a kernel on the GPU with one thread for each element.
//    //addKernel<<<1, size>>>(dev_c, dev_a, dev_b);
//
//    // Check for any errors launching the kernel
//    cudaStatus = cudaGetLastError();
//    if (cudaStatus != cudaSuccess) {
//        fprintf(stderr, "addKernel launch failed: %s\n", cudaGetErrorString(cudaStatus));
//        goto Error;
//    }
//    
//    // cudaDeviceSynchronize waits for the kernel to finish, and returns
//    // any errors encountered during the launch.
//    cudaStatus = cudaDeviceSynchronize();
//    if (cudaStatus != cudaSuccess) {
//        fprintf(stderr, "cudaDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
//        goto Error;
//    }
//
//    // Copy output vector from GPU buffer to host memory.
//    cudaStatus = cudaMemcpy(c, dev_c, size * sizeof(int), cudaMemcpyDeviceToHost);
//    if (cudaStatus != cudaSuccess) {
//        fprintf(stderr, "cudaMemcpy failed!");
//        goto Error;
//    }
//
//Error:
//    cudaFree(dev_c);
//    cudaFree(dev_a);
//    cudaFree(dev_b);
//
//
//    
//    return cudaStatus;
//}

	.text
	.file	"kernel.hip"
	.globl	_Z24__device_stub__addKernelPdS_S_i # -- Begin function _Z24__device_stub__addKernelPdS_S_i
	.type	_Z24__device_stub__addKernelPdS_S_i,@function
_Z24__device_stub__addKernelPdS_S_i:    # @_Z24__device_stub__addKernelPdS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9addKernelPdS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__addKernelPdS_S_i, .Lfunc_end0-_Z24__device_stub__addKernelPdS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z12simple_dgemvPdS_S_i         # -- Begin function _Z12simple_dgemvPdS_S_i
	.type	_Z12simple_dgemvPdS_S_i,@function
_Z12simple_dgemvPdS_S_i:                # @_Z12simple_dgemvPdS_S_i
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB1_5
# %bb.1:                                # %.preheader.lr.ph
	movl	%ecx, %eax
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
.LBB1_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
	movl	%r8d, %r10d
	leaq	(%rdi,%r10,8), %r10
	xorpd	%xmm0, %xmm0
	xorl	%r11d, %r11d
.LBB1_3:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%r10,%r11,8), %xmm1            # xmm1 = mem[0],zero
	mulsd	(%rsi,%r11,8), %xmm1
	addsd	%xmm1, %xmm0
	incq	%r11
	cmpq	%r11, %rax
	jne	.LBB1_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	movsd	%xmm0, (%rdx,%r9,8)
	incq	%r9
	addl	%ecx, %r8d
	cmpq	%rax, %r9
	jne	.LBB1_2
.LBB1_5:                                # %._crit_edge21
	retq
.Lfunc_end1:
	.size	_Z12simple_dgemvPdS_S_i, .Lfunc_end1-_Z12simple_dgemvPdS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$200, %edi
	callq	malloc
	movq	%rax, %rbx
	movl	$40, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$40, %edi
	callq	malloc
	movq	%rax, %r15
	xorl	%eax, %eax
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	%xmm0, (%rbx,%rax,8)
	incq	%rax
	cmpq	$25, %rax
	jne	.LBB2_1
# %bb.2:                                # %.preheader56.preheader
	xorl	%eax, %eax
.LBB2_3:                                # %.preheader56
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	%xmm0, (%r14,%rax,8)
	incq	%rax
	cmpq	$5, %rax
	jne	.LBB2_3
# %bb.4:                                # %.preheader.preheader
	xorpd	%xmm0, %xmm0
	movupd	%xmm0, 16(%r15)
	movupd	%xmm0, (%r15)
	movq	$0, 32(%r15)
	leaq	16(%rsp), %r12
	movl	$200, %esi
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %r13
	movl	$40, %esi
	movq	%r13, %rdi
	callq	hipMalloc
	movq	%rsp, %rbp
	movl	$40, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$200, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$40, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$40, %edx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.Lstr, %edi
	callq	puts@PLT
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	4(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	$5, %ecx
	callq	_Z24__device_stub__addKernelPdS_S_i
.LBB2_6:
	movq	(%rsp), %rsi
	movl	$40, %edx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%r12d, %r12d
.LBB2_7:                                # =>This Inner Loop Header: Depth=1
	movsd	(%r15,%r12,8), %xmm0            # xmm0 = mem[0],zero
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	incq	%r12
	cmpq	$5, %r12
	jne	.LBB2_7
# %bb.8:
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movl	$.L.str.2, %edi
	callq	system
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9addKernelPdS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9addKernelPdS_S_i,@object     # @_Z9addKernelPdS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z9addKernelPdS_S_i
	.p2align	3, 0x0
_Z9addKernelPdS_S_i:
	.quad	_Z24__device_stub__addKernelPdS_S_i
	.size	_Z9addKernelPdS_S_i, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%f\n"
	.size	.L.str.1, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"pause"
	.size	.L.str.2, 6

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9addKernelPdS_S_i"
	.size	.L__unnamed_1, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\n\nRunning Kernel...\n"
	.size	.Lstr, 21

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__addKernelPdS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9addKernelPdS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9addKernelPdS_S_i     ; -- Begin function _Z9addKernelPdS_S_i
	.globl	_Z9addKernelPdS_S_i
	.p2align	8
	.type	_Z9addKernelPdS_S_i,@function
_Z9addKernelPdS_S_i:                    ; @_Z9addKernelPdS_S_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph
	s_clause 0x1
	s_load_b64 s[8:9], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v2, 3, v0
	v_cmp_gt_u32_e32 vcc_lo, s2, v0
	v_mul_lo_u32 v0, v0, s2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s0, s8, v2
	v_add_co_ci_u32_e64 v3, null, s9, 0, s0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[0:1]
	v_add_co_u32 v4, s0, s4, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, s5, v5, s0
	global_load_b64 v[6:7], v1, s[6:7]
	global_load_b64 v[4:5], v[4:5], off
	global_load_b64 v[8:9], v[2:3], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9]
	global_store_b64 v[2:3], v[4:5], off
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s2, s2, -1
	v_add_nc_u32_e32 v0, 1, v0
	s_add_u32 s6, s6, 8
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc0 .LBB0_2
.LBB0_5:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9addKernelPdS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 10
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9addKernelPdS_S_i, .Lfunc_end0-_Z9addKernelPdS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 208
; NumSgprs: 12
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 12
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9addKernelPdS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     12
    .sgpr_spill_count: 0
    .symbol:         _Z9addKernelPdS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
