#include<stdio.h>
#include<stdlib.h>
#include<unistd.h>
#include<stdbool.h>
#include<cuda.h>
#include<cuda_runtime.h>

#define Y 3					
#define K 4				//NUMBERR OF CLUSTERS


// This kermel is used to find the index of the centroid that is nearest to each pixel.
//Ech thread is responsible for a particular pixel

__global__
void findclosestcentroids(double* num, double* centroids_c, int* idx, int each_chunk){

	int index=blockIdx.x*blockDim.x+threadIdx.x;
	int stride=blockDim.x*gridDim.x;
	int offset=0; //offset keeps track if the same thread (number enters the loop the next time, as the thread id will be same)
	for(int i=index; i<each_chunk; i+=stride){
		
		int x=index+offset*stride;
		int j, l, min_ind; 
		double sum, dist[K],min_dist;
		
		for (j=0;j<K;j++){
			
			sum=0;
			for (l=0;l<Y;l++){

					sum=sum+(*(num+x*Y+l)-*(centroids_c+j*Y+l))*(*(num+x*Y+l)-*(centroids_c+j*Y+l));

			}
			dist[j]=sqrt(sum);
		}
		min_dist=dist[0];
		min_ind=0;
		for (j=0; j<K; j++){
			
			if (dist[j]<min_dist) {

				min_dist=dist[j];
				min_ind=j;

			}
		}
		*(idx+x)=min_ind;
		offset++;
	}
	
}


// This kernel is launched  to update the centroids in each iteration. this is basically a reduction function where the
// mean of all the data points belonging to one cluster is calculated.

__global__
void computeCentroids(double* num, int* idx, double* centroids_c, int each_chunk){

	
	int index=blockIdx.x*blockDim.x+threadIdx.x;
	int stride=blockDim.x*gridDim.x;
	int offset=0; //offset keeps track if the same thread (number enters the loop the next time, as the thread id will be same)
	
	int  m, j, l, count;
	double sum[Y]; 					//for(i=0;i<Y;i++) sum[i]=0.0;//is it reqd ?
	for(int i=index; i<K; i+=stride){

		int x=index+offset*stride;
		count=0;
		for(m=0;m<Y;m++) sum[m]=0.0;

		for(j =0; j<each_chunk; j++){

			if(idx[j]==x){

					count++;
					for (l=0;l<Y;l++){

						sum[l]=sum[l]+ *(num+j*Y+l);
					
					}
			
			}

		}
		if (count==0) continue;
		//printf("Counts is %d \n", count);
		for (l=0;l<Y;l++){

			*(centroids_c+x*Y+l)=sum[l]/count;					
		}
	}

}


//Kernel that performs the repalcement of each pixel in the image by the centroid it is closest to. 
//This is basically the step that quantizes the image.	


__global__
void assign_thru_gpu(double* num, double* centroids_c, int* idx, int each_chunk){
	
	int index=blockIdx.x*blockDim.x+threadIdx.x;
	int stride=blockDim.x*gridDim.x;
	int offset=0; //offset keeps track if the same thread number enters the loop the next time, as the thread id will be same
	for(int i=index; i<each_chunk; i+=stride){
		
		int x=index+offset*stride;
		int j, k ; 

		for (k=0;k<K;k++){

			if (idx[x]==k){

					for (j=0;j<Y;j++){			
						*(num+x*Y+j)=*(centroids_c+k*Y+j);
					}
			}
				
		}
		offset++;
	}

}



//Assignment of each CUDA device to a particular rank

extern "C" void cuda_init(int each_chunk, int myrank, int numranks){

	int cudaDeviceCount=-1;
	cudaError_t cE;
	//Check if cuda device exists and get the number of  working cuda devices
    if ((cE=cudaGetDeviceCount( &cudaDeviceCount))!=cudaSuccess){
	    printf("Unable to determine cuda Device count, error is %d count is %d \n", cE, cudaDeviceCount);
	    exit (-1);
	}
	
	//Set cuda device for each MPI rank 	
	if ((cE=cudaSetDevice(myrank%cudaDeviceCount))!=cudaSuccess){
	    printf("Unable to have rank %d set to cuda device %d, error is %d \n", myrank, (myrank % cudaDeviceCount), cE);
	    exit (-1);
	}

	extern double* num;
	extern double* centroids_c;
	extern double* centroids_cresult;
	extern int* idx;

	num=NULL;
	centroids_c=NULL;
	centroids_cresult=NULL;
	idx=NULL; 

	cudaMallocManaged( &num, sizeof(double)*each_chunk*Y);
    cudaMallocManaged( &centroids_c, sizeof(double)*K*Y);
    cudaMallocManaged( &centroids_cresult, sizeof(double)*K*Y);
	cudaMallocManaged(&idx, sizeof(int)*each_chunk);


}
    
//function that initiates kernel launches from the main function.

extern "C" void k_means_kernel_launch(double* num, double* centroids_c, int* idx, int each_chunk, int n_blocks, int no_of_threads){
	
	int cudaDeviceCount;
	cudaError_t cE2, cE3;

	findclosestcentroids<<< n_blocks, no_of_threads>>>(num, centroids_c, idx, each_chunk);
		
	cudaGetDeviceCount( &cudaDeviceCount);
	cE2=cudaDeviceSynchronize();
	//printf("The two errors are %d %d \n",cE1,cE2);
	const char* x_err=cudaGetErrorString (cE2);
	printf("%s \n",x_err); 

	computeCentroids<<<1, 32>>>(num, &idx[0], centroids_c,each_chunk);

	cE3=cudaDeviceSynchronize();
	//printf("The error is %d\n",cE3);
	x_err=cudaGetErrorString (cE3);
	printf("%s \n",x_err); 

}

//Repalcement of each pixel in the image by the centroid it is closest to. This is the step that quantizes the image.	

extern "C" void assign(double* num, double* centroids_c, int* idx, int each_chunk, int n_blocks, int no_of_threads){
	
	assign_thru_gpu<<<n_blocks, no_of_threads>>>(num, centroids_c, idx, each_chunk);
	cudaDeviceSynchronize();

}


//Freeing the dynamic memory 

extern "C" void cuda_free(double* num, double* centroids_c, double* centroids_cresult, int* idx){
	
	cudaFree(num);
	cudaFree(centroids_c);
	cudaFree(centroids_cresult);
	cudaFree(idx);

}

	.file	"tmpxft_0032af71_00000000-6_k_cudapart.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2046:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2046:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Unable to determine cuda Device count, error is %d count is %d \n"
.LC1:
	.string	"Unable to have rank %d set to cuda device %d, error is %d \n"
	.text
	.globl	cuda_init
	.type	cuda_init, @function
cuda_init:
.LFB2040:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movslq	%edi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	4(%rsp), %rdi
	movl	$-1, 4(%rsp)
	call	cudaGetDeviceCount@PLT
	testl	%eax, %eax
	je	.L3
	movl	4(%rsp), %ecx
	movl	%eax, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC0(%rip), %rsi
	call	__printf_chk@PLT
	jmp	.L7
.L3:
	movl	%ebp, %eax
	cltd
	idivl	4(%rsp)
	movl	%edx, %edi
	call	cudaSetDevice@PLT
	movl	%eax, %r8d
	testl	%eax, %eax
	je	.L4
	movl	%ebp, %eax
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	cltd
	idivl	4(%rsp)
	xorl	%eax, %eax
	movl	%edx, %ecx
	movl	%ebp, %edx
	call	__printf_chk@PLT
.L7:
	orl	$-1, %edi
	call	exit@PLT
.L4:
	imulq	$24, %rbx, %rsi
	xorl	%eax, %eax
	movl	$1, %edx
	leaq	num(%rip), %rdi
	movq	%rax, num(%rip)
	movq	%rax, centroids_c(%rip)
	movq	%rax, centroids_cresult(%rip)
	movq	%rax, idx(%rip)
	call	cudaMallocManaged@PLT
	movl	$1, %edx
	movl	$96, %esi
	leaq	centroids_c(%rip), %rdi
	call	cudaMallocManaged@PLT
	movl	$1, %edx
	movl	$96, %esi
	leaq	centroids_cresult(%rip), %rdi
	call	cudaMallocManaged@PLT
	leaq	0(,%rbx,4), %rsi
	movl	$1, %edx
	leaq	idx(%rip), %rdi
	call	cudaMallocManaged@PLT
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2040:
	.size	cuda_init, .-cuda_init
	.globl	cuda_free
	.type	cuda_free, @function
cuda_free:
.LFB2043:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rcx, %rbx
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2043:
	.size	cuda_free, .-cuda_free
	.globl	_Z45__device_stub__Z20findclosestcentroidsPdS_PiiPdS_Pii
	.type	_Z45__device_stub__Z20findclosestcentroidsPdS_PiiPdS_Pii, @function
_Z45__device_stub__Z20findclosestcentroidsPdS_PiiPdS_Pii:
.LFB2068:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z20findclosestcentroidsPdS_Pii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L11:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2068:
	.size	_Z45__device_stub__Z20findclosestcentroidsPdS_PiiPdS_Pii, .-_Z45__device_stub__Z20findclosestcentroidsPdS_PiiPdS_Pii
	.globl	_Z20findclosestcentroidsPdS_Pii
	.type	_Z20findclosestcentroidsPdS_Pii, @function
_Z20findclosestcentroidsPdS_Pii:
.LFB2069:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z20findclosestcentroidsPdS_PiiPdS_Pii
	.cfi_endproc
.LFE2069:
	.size	_Z20findclosestcentroidsPdS_Pii, .-_Z20findclosestcentroidsPdS_Pii
	.globl	_Z41__device_stub__Z16computeCentroidsPdPiS_iPdPiS_i
	.type	_Z41__device_stub__Z16computeCentroidsPdPiS_iPdPiS_i, @function
_Z41__device_stub__Z16computeCentroidsPdPiS_iPdPiS_i:
.LFB2070:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16computeCentroidsPdPiS_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L16:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2070:
	.size	_Z41__device_stub__Z16computeCentroidsPdPiS_iPdPiS_i, .-_Z41__device_stub__Z16computeCentroidsPdPiS_iPdPiS_i
	.globl	_Z16computeCentroidsPdPiS_i
	.type	_Z16computeCentroidsPdPiS_i, @function
_Z16computeCentroidsPdPiS_i:
.LFB2071:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z16computeCentroidsPdPiS_iPdPiS_i
	.cfi_endproc
.LFE2071:
	.size	_Z16computeCentroidsPdPiS_i, .-_Z16computeCentroidsPdPiS_i
	.section	.rodata.str1.1
.LC2:
	.string	"%s \n"
	.text
	.globl	k_means_kernel_launch
	.type	k_means_kernel_launch, @function
k_means_kernel_launch:
.LFB2041:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%ecx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdi, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movl	%r9d, 28(%rsp)
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movl	36(%rsp), %ecx
	movl	%r8d, 16(%rsp)
	movq	28(%rsp), %rdx
	xorl	%r8d, %r8d
	movq	%rax, 20(%rsp)
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	movl	%r13d, %ecx
	movq	%rbp, %rdx
	movq	%r12, %rsi
	movq	%rbx, %rdi
	call	_Z45__device_stub__Z20findclosestcentroidsPdS_PiiPdS_Pii
.L22:
	leaq	12(%rsp), %rdi
	leaq	.LC2(%rip), %r14
	call	cudaGetDeviceCount@PLT
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	%r14, %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$5, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_Z41__device_stub__Z16computeCentroidsPdPiS_iPdPiS_i
.L23:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	%r14, %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2041:
	.size	k_means_kernel_launch, .-k_means_kernel_launch
	.globl	_Z40__device_stub__Z15assign_thru_gpuPdS_PiiPdS_Pii
	.type	_Z40__device_stub__Z15assign_thru_gpuPdS_PiiPdS_Pii, @function
_Z40__device_stub__Z15assign_thru_gpuPdS_PiiPdS_Pii:
.LFB2072:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15assign_thru_gpuPdS_Pii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L26:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2072:
	.size	_Z40__device_stub__Z15assign_thru_gpuPdS_PiiPdS_Pii, .-_Z40__device_stub__Z15assign_thru_gpuPdS_PiiPdS_Pii
	.globl	_Z15assign_thru_gpuPdS_Pii
	.type	_Z15assign_thru_gpuPdS_Pii, @function
_Z15assign_thru_gpuPdS_Pii:
.LFB2073:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z15assign_thru_gpuPdS_PiiPdS_Pii
	.cfi_endproc
.LFE2073:
	.size	_Z15assign_thru_gpuPdS_Pii, .-_Z15assign_thru_gpuPdS_Pii
	.globl	assign
	.type	assign, @function
assign:
.LFB2042:
	.cfi_startproc
	endbr64
	movabsq	$4294967297, %rax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%ecx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movl	%r9d, 20(%rsp)
	xorl	%r9d, %r9d
	movq	%rax, 24(%rsp)
	movl	28(%rsp), %ecx
	movl	%r8d, 8(%rsp)
	movq	20(%rsp), %rdx
	xorl	%r8d, %r8d
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movl	%r13d, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_Z40__device_stub__Z15assign_thru_gpuPdS_PiiPdS_Pii
.L32:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaDeviceSynchronize@PLT
	.cfi_endproc
.LFE2042:
	.size	assign, .-assign
	.section	.rodata.str1.1
.LC3:
	.string	"_Z15assign_thru_gpuPdS_Pii"
.LC4:
	.string	"_Z16computeCentroidsPdPiS_i"
.LC5:
	.string	"_Z20findclosestcentroidsPdS_Pii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2075:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15assign_thru_gpuPdS_Pii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16computeCentroidsPdPiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z20findclosestcentroidsPdS_Pii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2075:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include<stdio.h>
#include<stdlib.h>
#include<unistd.h>
#include<stdbool.h>
#include<hip/hip_runtime.h>


#define Y 3					
#define K 4				//NUMBERR OF CLUSTERS


// This kermel is used to find the index of the centroid that is nearest to each pixel.
//Ech thread is responsible for a particular pixel

__global__
void findclosestcentroids(double* num, double* centroids_c, int* idx, int each_chunk){

	int index=blockIdx.x*blockDim.x+threadIdx.x;
	int stride=blockDim.x*gridDim.x;
	int offset=0; //offset keeps track if the same thread (number enters the loop the next time, as the thread id will be same)
	for(int i=index; i<each_chunk; i+=stride){
		
		int x=index+offset*stride;
		int j, l, min_ind; 
		double sum, dist[K],min_dist;
		
		for (j=0;j<K;j++){
			
			sum=0;
			for (l=0;l<Y;l++){

					sum=sum+(*(num+x*Y+l)-*(centroids_c+j*Y+l))*(*(num+x*Y+l)-*(centroids_c+j*Y+l));

			}
			dist[j]=sqrt(sum);
		}
		min_dist=dist[0];
		min_ind=0;
		for (j=0; j<K; j++){
			
			if (dist[j]<min_dist) {

				min_dist=dist[j];
				min_ind=j;

			}
		}
		*(idx+x)=min_ind;
		offset++;
	}
	
}


// This kernel is launched  to update the centroids in each iteration. this is basically a reduction function where the
// mean of all the data points belonging to one cluster is calculated.

__global__
void computeCentroids(double* num, int* idx, double* centroids_c, int each_chunk){

	
	int index=blockIdx.x*blockDim.x+threadIdx.x;
	int stride=blockDim.x*gridDim.x;
	int offset=0; //offset keeps track if the same thread (number enters the loop the next time, as the thread id will be same)
	
	int  m, j, l, count;
	double sum[Y]; 					//for(i=0;i<Y;i++) sum[i]=0.0;//is it reqd ?
	for(int i=index; i<K; i+=stride){

		int x=index+offset*stride;
		count=0;
		for(m=0;m<Y;m++) sum[m]=0.0;

		for(j =0; j<each_chunk; j++){

			if(idx[j]==x){

					count++;
					for (l=0;l<Y;l++){

						sum[l]=sum[l]+ *(num+j*Y+l);
					
					}
			
			}

		}
		if (count==0) continue;
		//printf("Counts is %d \n", count);
		for (l=0;l<Y;l++){

			*(centroids_c+x*Y+l)=sum[l]/count;					
		}
	}

}


//Kernel that performs the repalcement of each pixel in the image by the centroid it is closest to. 
//This is basically the step that quantizes the image.	


__global__
void assign_thru_gpu(double* num, double* centroids_c, int* idx, int each_chunk){
	
	int index=blockIdx.x*blockDim.x+threadIdx.x;
	int stride=blockDim.x*gridDim.x;
	int offset=0; //offset keeps track if the same thread number enters the loop the next time, as the thread id will be same
	for(int i=index; i<each_chunk; i+=stride){
		
		int x=index+offset*stride;
		int j, k ; 

		for (k=0;k<K;k++){

			if (idx[x]==k){

					for (j=0;j<Y;j++){			
						*(num+x*Y+j)=*(centroids_c+k*Y+j);
					}
			}
				
		}
		offset++;
	}

}



//Assignment of each CUDA device to a particular rank

extern "C" void cuda_init(int each_chunk, int myrank, int numranks){

	int cudaDeviceCount=-1;
	hipError_t cE;
	//Check if cuda device exists and get the number of  working cuda devices
    if ((cE=hipGetDeviceCount( &cudaDeviceCount))!=hipSuccess){
	    printf("Unable to determine cuda Device count, error is %d count is %d \n", cE, cudaDeviceCount);
	    exit (-1);
	}
	
	//Set cuda device for each MPI rank 	
	if ((cE=hipSetDevice(myrank%cudaDeviceCount))!=hipSuccess){
	    printf("Unable to have rank %d set to cuda device %d, error is %d \n", myrank, (myrank % cudaDeviceCount), cE);
	    exit (-1);
	}

	extern double* num;
	extern double* centroids_c;
	extern double* centroids_cresult;
	extern int* idx;

	num=NULL;
	centroids_c=NULL;
	centroids_cresult=NULL;
	idx=NULL; 

	hipMallocManaged( &num, sizeof(double)*each_chunk*Y);
    hipMallocManaged( &centroids_c, sizeof(double)*K*Y);
    hipMallocManaged( &centroids_cresult, sizeof(double)*K*Y);
	hipMallocManaged(&idx, sizeof(int)*each_chunk);


}
    
//function that initiates kernel launches from the main function.

extern "C" void k_means_kernel_launch(double* num, double* centroids_c, int* idx, int each_chunk, int n_blocks, int no_of_threads){
	
	int cudaDeviceCount;
	hipError_t cE2, cE3;

	findclosestcentroids<<< n_blocks, no_of_threads>>>(num, centroids_c, idx, each_chunk);
		
	hipGetDeviceCount( &cudaDeviceCount);
	cE2=hipDeviceSynchronize();
	//printf("The two errors are %d %d \n",cE1,cE2);
	const char* x_err=hipGetErrorString (cE2);
	printf("%s \n",x_err); 

	computeCentroids<<<1, 32>>>(num, &idx[0], centroids_c,each_chunk);

	cE3=hipDeviceSynchronize();
	//printf("The error is %d\n",cE3);
	x_err=hipGetErrorString (cE3);
	printf("%s \n",x_err); 

}

//Repalcement of each pixel in the image by the centroid it is closest to. This is the step that quantizes the image.	

extern "C" void assign(double* num, double* centroids_c, int* idx, int each_chunk, int n_blocks, int no_of_threads){
	
	assign_thru_gpu<<<n_blocks, no_of_threads>>>(num, centroids_c, idx, each_chunk);
	hipDeviceSynchronize();

}


//Freeing the dynamic memory 

extern "C" void cuda_free(double* num, double* centroids_c, double* centroids_cresult, int* idx){
	
	hipFree(num);
	hipFree(centroids_c);
	hipFree(centroids_cresult);
	hipFree(idx);

}

	.text
	.file	"k_cudapart.hip"
	.globl	_Z35__device_stub__findclosestcentroidsPdS_Pii # -- Begin function _Z35__device_stub__findclosestcentroidsPdS_Pii
	.type	_Z35__device_stub__findclosestcentroidsPdS_Pii,@function
_Z35__device_stub__findclosestcentroidsPdS_Pii: # @_Z35__device_stub__findclosestcentroidsPdS_Pii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20findclosestcentroidsPdS_Pii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z35__device_stub__findclosestcentroidsPdS_Pii, .Lfunc_end0-_Z35__device_stub__findclosestcentroidsPdS_Pii
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__computeCentroidsPdPiS_i # -- Begin function _Z31__device_stub__computeCentroidsPdPiS_i
	.type	_Z31__device_stub__computeCentroidsPdPiS_i,@function
_Z31__device_stub__computeCentroidsPdPiS_i: # @_Z31__device_stub__computeCentroidsPdPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16computeCentroidsPdPiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__computeCentroidsPdPiS_i, .Lfunc_end1-_Z31__device_stub__computeCentroidsPdPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__assign_thru_gpuPdS_Pii # -- Begin function _Z30__device_stub__assign_thru_gpuPdS_Pii
	.type	_Z30__device_stub__assign_thru_gpuPdS_Pii,@function
_Z30__device_stub__assign_thru_gpuPdS_Pii: # @_Z30__device_stub__assign_thru_gpuPdS_Pii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15assign_thru_gpuPdS_Pii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z30__device_stub__assign_thru_gpuPdS_Pii, .Lfunc_end2-_Z30__device_stub__assign_thru_gpuPdS_Pii
	.cfi_endproc
                                        # -- End function
	.globl	cuda_init                       # -- Begin function cuda_init
	.type	cuda_init,@function
cuda_init:                              # @cuda_init
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	movl	%edi, %ebp
	leaq	12(%rsp), %r14
	movl	$-1, (%r14)
	movq	%r14, %rdi
	callq	hipGetDeviceCount
	movl	(%r14), %ecx
	testl	%eax, %eax
	jne	.LBB3_3
# %bb.1:
	movl	%ebx, %eax
	cltd
	idivl	%ecx
	movl	%edx, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	jne	.LBB3_5
# %bb.2:
	xorl	%eax, %eax
	movq	%rax, num(%rip)
	movq	%rax, centroids_c(%rip)
	movq	%rax, centroids_cresult(%rip)
	movq	%rax, idx(%rip)
	movslq	%ebp, %rbx
	leaq	(,%rbx,8), %rax
	leaq	(%rax,%rax,2), %rsi
	movl	$num, %edi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	$centroids_c, %edi
	movl	$96, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	$centroids_cresult, %edi
	movl	$96, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	shlq	$2, %rbx
	movl	$idx, %edi
	movq	%rbx, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_3:
	.cfi_def_cfa_offset 48
	movl	$.L.str, %edi
	movl	%eax, %esi
	movl	%ecx, %edx
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB3_4
.LBB3_5:
	movl	%eax, %ecx
	movl	%ebx, %eax
	cltd
	idivl	12(%rsp)
	movl	$.L.str.1, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
.LBB3_4:
	movl	$-1, %edi
	callq	exit
.Lfunc_end3:
	.size	cuda_init, .Lfunc_end3-cuda_init
	.cfi_endproc
                                        # -- End function
	.globl	k_means_kernel_launch           # -- Begin function k_means_kernel_launch
	.type	k_means_kernel_launch,@function
k_means_kernel_launch:                  # @k_means_kernel_launch
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%ecx, %ebx
	movq	%rdx, %r15
	movq	%rsi, %r14
	movq	%rdi, %r12
	movabsq	$4294967296, %r13               # imm = 0x100000000
	movl	%r8d, %edi
	btsq	$32, %rdi
	movl	%r9d, %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	%ebx, %ecx
	callq	_Z35__device_stub__findclosestcentroidsPdS_Pii
.LBB4_2:
	leaq	12(%rsp), %rdi
	callq	hipGetDeviceCount
	callq	hipDeviceSynchronize
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	leaq	1(%r13), %rdi
	addq	$32, %r13
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_4
# %bb.3:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z31__device_stub__computeCentroidsPdPiS_i
.LBB4_4:
	callq	hipDeviceSynchronize
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	k_means_kernel_launch, .Lfunc_end4-k_means_kernel_launch
	.cfi_endproc
                                        # -- End function
	.globl	assign                          # -- Begin function assign
	.type	assign,@function
assign:                                 # @assign
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%ecx, %ebx
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %r12
	movl	%r8d, %edi
	btsq	$32, %rdi
	movl	%r9d, %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	callq	_Z30__device_stub__assign_thru_gpuPdS_Pii
.LBB5_2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipDeviceSynchronize            # TAILCALL
.Lfunc_end5:
	.size	assign, .Lfunc_end5-assign
	.cfi_endproc
                                        # -- End function
	.globl	cuda_free                       # -- Begin function cuda_free
	.type	cuda_free,@function
cuda_free:                              # @cuda_free
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rsi, %r15
	callq	hipFree
	movq	%r15, %rdi
	callq	hipFree
	movq	%r14, %rdi
	callq	hipFree
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end6:
	.size	cuda_free, .Lfunc_end6-cuda_free
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20findclosestcentroidsPdS_Pii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16computeCentroidsPdPiS_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15assign_thru_gpuPdS_Pii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z20findclosestcentroidsPdS_Pii,@object # @_Z20findclosestcentroidsPdS_Pii
	.section	.rodata,"a",@progbits
	.globl	_Z20findclosestcentroidsPdS_Pii
	.p2align	3, 0x0
_Z20findclosestcentroidsPdS_Pii:
	.quad	_Z35__device_stub__findclosestcentroidsPdS_Pii
	.size	_Z20findclosestcentroidsPdS_Pii, 8

	.type	_Z16computeCentroidsPdPiS_i,@object # @_Z16computeCentroidsPdPiS_i
	.globl	_Z16computeCentroidsPdPiS_i
	.p2align	3, 0x0
_Z16computeCentroidsPdPiS_i:
	.quad	_Z31__device_stub__computeCentroidsPdPiS_i
	.size	_Z16computeCentroidsPdPiS_i, 8

	.type	_Z15assign_thru_gpuPdS_Pii,@object # @_Z15assign_thru_gpuPdS_Pii
	.globl	_Z15assign_thru_gpuPdS_Pii
	.p2align	3, 0x0
_Z15assign_thru_gpuPdS_Pii:
	.quad	_Z30__device_stub__assign_thru_gpuPdS_Pii
	.size	_Z15assign_thru_gpuPdS_Pii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Unable to determine cuda Device count, error is %d count is %d \n"
	.size	.L.str, 65

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Unable to have rank %d set to cuda device %d, error is %d \n"
	.size	.L.str.1, 60

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%s \n"
	.size	.L.str.2, 5

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z20findclosestcentroidsPdS_Pii"
	.size	.L__unnamed_1, 32

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z16computeCentroidsPdPiS_i"
	.size	.L__unnamed_2, 28

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z15assign_thru_gpuPdS_Pii"
	.size	.L__unnamed_3, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z35__device_stub__findclosestcentroidsPdS_Pii
	.addrsig_sym _Z31__device_stub__computeCentroidsPdPiS_i
	.addrsig_sym _Z30__device_stub__assign_thru_gpuPdS_Pii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z20findclosestcentroidsPdS_Pii
	.addrsig_sym _Z16computeCentroidsPdPiS_i
	.addrsig_sym _Z15assign_thru_gpuPdS_Pii
	.addrsig_sym num
	.addrsig_sym centroids_c
	.addrsig_sym centroids_cresult
	.addrsig_sym idx
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z20findclosestcentroidsPdS_Pii ; -- Begin function _Z20findclosestcentroidsPdS_Pii
	.globl	_Z20findclosestcentroidsPdS_Pii
	.p2align	8
	.type	_Z20findclosestcentroidsPdS_Pii,@function
_Z20findclosestcentroidsPdS_Pii:        ; @_Z20findclosestcentroidsPdS_Pii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s10, s[0:1], 0x18
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[8:9], null, s15, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s10, v8
	s_cbranch_execz .LBB0_9
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s11, s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_lshl_add_u32 v9, v8, 1, v8
	v_mov_b32_e32 v12, v8
	s_mov_b32 s12, 0
	s_mov_b32 s14, 0
                                        ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s11, s11, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s13, s11, 3
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;       Child Loop BB0_4 Depth 3
                                        ;     Child Loop BB0_7 Depth 2
	v_ashrrev_i32_e32 v10, 31, v9
	s_mov_b64 s[8:9], s[6:7]
	s_mov_b32 s15, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 3, v[9:10]
	v_add_co_u32 v13, vcc_lo, s4, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v11, vcc_lo
.LBB0_3:                                ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_4 Depth 3
	v_mov_b32_e32 v10, 0
	v_mov_b32_e32 v11, 0
	s_mov_b64 s[0:1], 0
.LBB0_4:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v15, vcc_lo, v13, s0
	v_add_co_ci_u32_e32 v16, vcc_lo, s1, v14, vcc_lo
	s_add_u32 s16, s8, s0
	s_addc_u32 s17, s9, s1
	s_add_u32 s0, s0, 8
	global_load_b64 v[15:16], v[15:16], off
	s_load_b64 s[16:17], s[16:17], 0x0
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 24
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[15:16], v[15:16], -s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[10:11], v[15:16], v[15:16], v[10:11]
	s_cbranch_scc1 .LBB0_4
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[10:11]
	s_cmp_eq_u32 s15, 3
	v_cndmask_b32_e64 v15, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v15, 8, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[10:11], v[10:11], v15
	v_rsq_f64_e32 v[15:16], v[10:11]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[17:18], v[10:11], v[15:16]
	v_mul_f64 v[15:16], v[15:16], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[19:20], -v[15:16], v[17:18], 0.5
	v_fma_f64 v[17:18], v[17:18], v[19:20], v[17:18]
	v_fma_f64 v[15:16], v[15:16], v[19:20], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[19:20], -v[17:18], v[17:18], v[10:11]
	v_fma_f64 v[17:18], v[19:20], v[15:16], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[19:20], -v[17:18], v[17:18], v[10:11]
	v_fma_f64 v[15:16], v[19:20], v[15:16], v[17:18]
	v_cndmask_b32_e64 v17, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[10:11], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[15:16], v[15:16], v17
	v_dual_cndmask_b32 v10, v15, v10 :: v_dual_cndmask_b32 v11, v16, v11
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s15, 2
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s15, 1
	v_cndmask_b32_e32 v7, v7, v11, vcc_lo
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s15, 0
	v_cndmask_b32_e32 v6, v6, v10, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e64 v5, v5, v11, s0
	v_cndmask_b32_e32 v0, v0, v10, vcc_lo
	v_cndmask_b32_e64 v4, v4, v10, s0
	v_cndmask_b32_e64 v3, v3, v11, s1
	v_cndmask_b32_e64 v2, v2, v10, s1
	v_cndmask_b32_e32 v1, v1, v11, vcc_lo
	s_add_i32 s15, s15, 1
	s_add_u32 s8, s8, 24
	s_addc_u32 s9, s9, 0
	s_cmp_lg_u32 s15, 4
	s_cbranch_scc1 .LBB0_3
; %bb.6:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v11, v1
	v_dual_mov_b32 v13, 0 :: v_dual_mov_b32 v10, v0
	s_mov_b64 s[0:1], 0
.LBB0_7:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 2
	v_dual_cndmask_b32 v14, v1, v3 :: v_dual_cndmask_b32 v15, v0, v2
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v14, v14, v5, vcc_lo
	v_cndmask_b32_e32 v16, v15, v4, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v15, v14, v7 :: v_dual_cndmask_b32 v14, v16, v6
	v_cmp_lt_f64_e32 vcc_lo, v[14:15], v[10:11]
	v_cndmask_b32_e64 v13, v13, s0, vcc_lo
	v_dual_cndmask_b32 v11, v11, v15 :: v_dual_cndmask_b32 v10, v10, v14
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 4
	s_cbranch_scc1 .LBB0_7
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mad_u64_u32 v[10:11], null, s14, s11, v[8:9]
	v_add_nc_u32_e32 v12, s11, v12
	v_add_nc_u32_e32 v9, s13, v9
	s_add_i32 s14, s14, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_le_i32_e32 vcc_lo, s10, v12
	v_ashrrev_i32_e32 v11, 31, v10
	s_or_b32 s12, vcc_lo, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	v_add_co_u32 v10, s0, s2, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s0, s3, v11, s0
	global_store_b32 v[10:11], v13, off
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB0_2
.LBB0_9:                                ; %Flow87
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20findclosestcentroidsPdS_Pii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 21
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z20findclosestcentroidsPdS_Pii, .Lfunc_end0-_Z20findclosestcentroidsPdS_Pii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 744
; NumSgprs: 20
; NumVgprs: 21
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 21
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16computeCentroidsPdPiS_i ; -- Begin function _Z16computeCentroidsPdPiS_i
	.globl	_Z16computeCentroidsPdPiS_i
	.p2align	8
	.type	_Z16computeCentroidsPdPiS_i,@function
_Z16computeCentroidsPdPiS_i:            ; @_Z16computeCentroidsPdPiS_i
; %bb.0:
	s_load_b32 s4, s[0:1], 0x2c
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, s15, s4, v[0:1]
	v_cmpx_gt_i32_e32 4, v6
	s_cbranch_execz .LBB1_13
; %bb.1:                                ; %.preheader46.lr.ph
	s_clause 0x1
	s_load_b32 s14, s[0:1], 0x18
	s_load_b64 s[6:7], s[0:1], 0x10
	v_lshl_add_u32 v0, v6, 1, v6
	s_load_b32 s20, s[2:3], 0x0
	s_load_b128 s[16:19], s[0:1], 0x0
	v_dual_mov_b32 v13, 0 :: v_dual_mov_b32 v14, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_mov_b32 s5, 0
	s_mov_b32 s21, 0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v1, vcc_lo
	s_cselect_b32 s15, -1, 0
	s_mul_i32 s20, s20, s4
.LBB1_2:                                ; %.preheader46
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_4 Depth 2
                                        ;       Child Loop BB1_6 Depth 3
                                        ;     Child Loop BB1_11 Depth 2
	s_mov_b32 s4, s5
	s_mov_b32 s6, s5
	s_mov_b32 s7, s5
	s_mov_b32 s8, s5
	s_mov_b32 s9, s5
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s7
	v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, s9
	v_mov_b32_e32 v9, 0
	s_and_not1_b32 vcc_lo, exec_lo, s15
	s_cbranch_vccnz .LBB1_9
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s8, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	s_mov_b32 s12, s8
	s_mov_b32 s13, s8
	v_dual_mov_b32 v9, 0 :: v_dual_mov_b32 v0, s8
	v_dual_mov_b32 v1, s9 :: v_dual_mov_b32 v2, s10
	v_dual_mov_b32 v3, s11 :: v_dual_mov_b32 v4, s12
	v_mov_b32_e32 v5, s13
	s_mov_b32 s4, s8
.LBB1_4:                                ; %.lr.ph
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_6 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[4:5], 2
	s_mov_b32 s10, exec_lo
	s_add_u32 s0, s18, s0
	s_addc_u32 s1, s19, s1
	s_load_b32 s0, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmpx_eq_u32_e64 s0, v6
	s_cbranch_execz .LBB1_8
; %bb.5:                                ;   in Loop: Header=BB1_4 Depth=2
	s_mov_b32 s9, s5
	s_mov_b64 s[6:7], 0
	s_lshl_b64 s[0:1], s[8:9], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s2, s16, s0
	s_addc_u32 s3, s17, s1
.LBB1_6:                                ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b64 v[10:11], v13, s[2:3]
	s_cmp_eq_u32 s6, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s6, 2
	v_dual_cndmask_b32 v12, v1, v3 :: v_dual_cndmask_b32 v15, v0, v2
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s6, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v16, v12, v5, s0
	v_cndmask_b32_e64 v15, v15, v4, s0
	s_cselect_b32 s1, -1, 0
	s_add_u32 s6, s6, 1
	s_addc_u32 s7, s7, 0
	s_add_u32 s2, s2, 8
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s6, 3
	s_waitcnt vmcnt(0)
	v_add_f64 v[10:11], v[15:16], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, v5, v11, s0
	v_cndmask_b32_e64 v4, v4, v10, s0
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_cndmask_b32_e64 v1, v1, v11, s1
	v_cndmask_b32_e64 v0, v0, v10, s1
	s_cbranch_scc1 .LBB1_6
; %bb.7:                                ; %.loopexit.loopexit
                                        ;   in Loop: Header=BB1_4 Depth=2
	v_add_nc_u32_e32 v9, 1, v9
.LBB1_8:                                ; %Flow82
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s10
	s_add_i32 s4, s4, 1
	s_add_i32 s8, s8, 3
	s_cmp_lg_u32 s4, s14
	s_cbranch_scc1 .LBB1_4
.LBB1_9:                                ; %._crit_edge
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 0, v9
	s_cbranch_execz .LBB1_12
; %bb.10:                               ; %.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_cvt_f64_i32_e32 v[9:10], v9
	v_dual_mov_b32 v12, v8 :: v_dual_mov_b32 v11, v7
	s_mov_b64 s[0:1], 0
.LBB1_11:                               ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 1
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 2
	v_cndmask_b32_e32 v15, v1, v3, vcc_lo
	v_cndmask_b32_e32 v17, v0, v2, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v16, v15, v5 :: v_dual_cndmask_b32 v15, v17, v4
	s_cmp_lg_u32 s0, 3
	v_div_scale_f64 v[17:18], null, v[9:10], v[9:10], v[15:16]
	v_div_scale_f64 v[23:24], vcc_lo, v[15:16], v[9:10], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[19:20], v[17:18]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[21:22], -v[17:18], v[19:20], 1.0
	v_fma_f64 v[19:20], v[19:20], v[21:22], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[21:22], -v[17:18], v[19:20], 1.0
	v_fma_f64 v[19:20], v[19:20], v[21:22], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[21:22], v[23:24], v[19:20]
	v_fma_f64 v[17:18], -v[17:18], v[21:22], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[17:18], v[17:18], v[19:20], v[21:22]
	v_div_fixup_f64 v[15:16], v[17:18], v[9:10], v[15:16]
	global_store_b64 v[11:12], v[15:16], off
	v_add_co_u32 v11, vcc_lo, v11, 8
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v12, vcc_lo
	s_cbranch_scc1 .LBB1_11
.LBB1_12:                               ; %Flow81
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v14, s20, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_lt_i32_e32 vcc_lo, 3, v14
	s_or_b32 s21, vcc_lo, s21
	s_and_not1_b32 exec_lo, exec_lo, s21
	s_cbranch_execnz .LBB1_2
.LBB1_13:                               ; %._crit_edge58
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16computeCentroidsPdPiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z16computeCentroidsPdPiS_i, .Lfunc_end1-_Z16computeCentroidsPdPiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 760
; NumSgprs: 24
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15assign_thru_gpuPdS_Pii ; -- Begin function _Z15assign_thru_gpuPdS_Pii
	.globl	_Z15assign_thru_gpuPdS_Pii
	.p2align	8
	.type	_Z15assign_thru_gpuPdS_Pii,@function
_Z15assign_thru_gpuPdS_Pii:             ; @_Z15assign_thru_gpuPdS_Pii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s8, s[0:1], 0x18
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB2_8
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s2, s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_lshl_add_u32 v2, v1, 1, v1
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v0, v1
	s_mov_b32 s10, 0
	s_mov_b32 s12, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s9, s2, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s11, s9, 3
.LBB2_2:                                ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_3 Depth 2
                                        ;       Child Loop BB2_5 Depth 3
	v_mad_u64_u32 v[3:4], null, s12, s9, v[1:2]
	s_mov_b32 s13, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v6, v[3:4], off
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[2:3]
	v_add_co_u32 v3, vcc_lo, s4, v7
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v4, v6, 1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[9:10], 3, v[4:5]
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v10, vcc_lo
.LBB2_3:                                ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_5 Depth 3
	s_mov_b32 s14, exec_lo
	v_cmpx_eq_u32_e64 s13, v6
	s_cbranch_execz .LBB2_6
; %bb.4:                                ; %.preheader.preheader
                                        ;   in Loop: Header=BB2_3 Depth=2
	s_mov_b64 s[2:3], 0
.LBB2_5:                                ; %.preheader
                                        ;   Parent Loop BB2_2 Depth=1
                                        ;     Parent Loop BB2_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v9, vcc_lo, v7, s2
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v8, vcc_lo
	v_add_co_u32 v11, vcc_lo, v3, s2
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v4, vcc_lo
	global_load_b64 v[9:10], v[9:10], off
	s_add_u32 s2, s2, 8
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s2, 24
	s_waitcnt vmcnt(0)
	global_store_b64 v[11:12], v[9:10], off
	s_cbranch_scc1 .LBB2_5
.LBB2_6:                                ; %Flow46
                                        ;   in Loop: Header=BB2_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s14
	s_add_i32 s13, s13, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s13, 4
	s_cbranch_scc1 .LBB2_3
; %bb.7:                                ;   in Loop: Header=BB2_2 Depth=1
	v_add_nc_u32_e32 v0, s9, v0
	v_add_nc_u32_e32 v2, s11, v2
	s_add_i32 s12, s12, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s8, v0
	s_or_b32 s10, vcc_lo, s10
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB2_2
.LBB2_8:                                ; %Flow48
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15assign_thru_gpuPdS_Pii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z15assign_thru_gpuPdS_Pii, .Lfunc_end2-_Z15assign_thru_gpuPdS_Pii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 404
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20findclosestcentroidsPdS_Pii
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z20findclosestcentroidsPdS_Pii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     21
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16computeCentroidsPdPiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     24
    .sgpr_spill_count: 0
    .symbol:         _Z16computeCentroidsPdPiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     25
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15assign_thru_gpuPdS_Pii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15assign_thru_gpuPdS_Pii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
