#define Inf 9999999

void __global__ dark_channel_ker(float * image, float * darkc, float * index, int N, int H, int W, int wsize)
{
    int C = 3;
    int D = 1;
    int hsize = (wsize - 1) / 2;

    int ids = blockDim.x * blockIdx.x + threadIdx.x;
    int idt = gridDim.x * blockDim.x;

    for(; ids<W*H*N; ids+=idt)
    {
        // ids = W*H*n + W*h + w
        int idw = ids % W;
        ids = (ids - idw) / W;
        int idh = ids % H;
        ids = (ids - idh) / H;
        int idn = ids;

        float tmpc = Inf;
        float tmp1 = 0;
        float tmp2 = 0;
        float tmp3 = 0;

        for(int idc=0; idc<C; idc++)
        {
            for(int p=idh-hsize; p<idh+hsize+1; p++)
            {
                for(int q=idw-hsize; q<idw+hsize+1; q++)
                {
                    if(p>-1 && p<H && q>-1 && q<W)
                    {
                        float pixel_value = image[W*H*C*idn + W*H*idc + W*p + q];
                        if(pixel_value<tmpc)
                        {
                            tmpc = pixel_value;
                            tmp1 = idc;
                            tmp2 = p;
                            tmp3 = q;
                        }
                    }
                }
            }
        }

        darkc[W*H*D*idn + W*H*0 + W*idh + idw] = tmpc;
        index[W*H*C*idn + W*H*0 + W*idh + idw] = tmp1;
        index[W*H*C*idn + W*H*1 + W*idh + idw] = tmp2;
        index[W*H*C*idn + W*H*2 + W*idh + idw] = tmp3;
    }
}

void __global__ dark_extract_ker(float * image, float * index, float * darkc, int N, int H, int W)
{
    int C = 3;

    int ids = blockDim.x * blockIdx.x + threadIdx.x;
    int idt = gridDim.x * blockDim.x;

    for(; ids<N*H*W; ids+=idt)
    {
        int idw = ids % W;
        ids = (ids - idw) / W;
        int idh = ids % H;
        ids = (ids - idh) / H;
        int idn = ids;

        int idz = index[W*H*C*idn + W*H*0 + W*idh + idw];
        int idx = index[W*H*C*idn + W*H*1 + W*idh + idw];
        int idy = index[W*H*C*idn + W*H*2 + W*idh + idw];

        darkc[W*H*idn + W*idh + idw] = image[W*H*C*idn + W*H*idz + W*idx + idy];
    }
}

void __global__ place_back_ker(float * darkc, float * index, float * image, float * accum, int N, int H, int W, int wsize)
{
    int C = 3;
    int hsize = (wsize - 1) / 2;

    int ids = blockDim.x * blockIdx.x + threadIdx.x;
    int idt = gridDim.x * blockDim.x;

    for(; ids<N*C*H*W; ids+=idt)
    {
        int idw = ids % W;
        ids = (ids - idw) / W;
        int idh = ids % H;
        ids = (ids - idh) / H;
        int idc = ids % C;
        ids = (ids - idc) / C;
        int idn = ids;

        image[W*H*C*idn + W*H*idc + W*idh + idw] = 0;
        accum[W*H*C*idn + W*H*idc + W*idh + idw] = 0;
        float tmpi = 0;
        float tmpa = 0;

        for(int p=idh-hsize; p<idh+hsize+1; p++)
        {
            for(int q=idw-hsize; q<idw+hsize+1; q++)
            {
                if(p>-1 && p<H && q>-1 && q<W)
                {
                    int idz = (int) index[W*H*C*idn + W*H*0 + W*p + q];
                    int idx = (int) index[W*H*C*idn + W*H*1 + W*p + q];
                    int idy = (int) index[W*H*C*idn + W*H*2 + W*p + q];
                    if(idx==idh && idy==idw && idz==idc)
                    {
                        tmpi += darkc[W*H*idn + W*p + q];
                        tmpa += 1;
                    }
                }
            }
        }
        image[W*H*C*idn + W*H*idc + W*idh + idw] = tmpi;
        accum[W*H*C*idn + W*H*idc + W*idh + idw] = tmpa;
    }
}

#ifdef __cplusplus
extern "C"
{
    #endif

    void dark_channel_run(float * d_image, float * d_darkc, float * d_index, int N, int H, int W, int wsize)
    {
        int const threadsPerBlock = 1024;
        int const blocksPerGrid = (N*H*W + threadsPerBlock - 1) / threadsPerBlock;
        dark_channel_ker<<<blocksPerGrid, threadsPerBlock>>>(d_image, d_darkc, d_index, N, H, W, wsize);
    }

    void dark_extract_run(float * d_image, float * d_index, float * d_darkc, int N, int H, int W)
    {
        int const threadsPerBlock = 1024;
        int const blocksPerGrid = (N*H*W + threadsPerBlock - 1) / threadsPerBlock;
        dark_extract_ker<<<blocksPerGrid, threadsPerBlock>>>(d_image, d_index, d_darkc, N, H, W);
    }

    void place_back_run(float * d_darkc, float * d_index, float * d_image, float * d_accum, int N, int H, int W, int wsize)
    {
        int const threadsPerBlock = 1024;
        int const blocksPerGrid = (N*3*H*W + threadsPerBlock - 1) / threadsPerBlock;
        place_back_ker<<<blocksPerGrid, threadsPerBlock>>>(d_darkc, d_index, d_image, d_accum, N, H, W, wsize);
    }

    #ifdef __cplusplus
}
#endif

	.file	"tmpxft_002f6a85_00000000-6_kernels.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2013:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2013:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z44__device_stub__Z16dark_channel_kerPfS_S_iiiiPfS_S_iiii
	.type	_Z44__device_stub__Z16dark_channel_kerPfS_S_iiiiPfS_S_iiii, @function
_Z44__device_stub__Z16dark_channel_kerPfS_S_iiiiPfS_S_iiii:
.LFB2035:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z16dark_channel_kerPfS_S_iiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	_Z44__device_stub__Z16dark_channel_kerPfS_S_iiiiPfS_S_iiii, .-_Z44__device_stub__Z16dark_channel_kerPfS_S_iiiiPfS_S_iiii
	.globl	_Z16dark_channel_kerPfS_S_iiii
	.type	_Z16dark_channel_kerPfS_S_iiii, @function
_Z16dark_channel_kerPfS_S_iiii:
.LFB2036:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z16dark_channel_kerPfS_S_iiiiPfS_S_iiii
	.cfi_endproc
.LFE2036:
	.size	_Z16dark_channel_kerPfS_S_iiii, .-_Z16dark_channel_kerPfS_S_iiii
	.globl	dark_channel_run
	.type	dark_channel_run, @function
dark_channel_run:
.LFB2008:
	.cfi_startproc
	endbr64
	movl	%ecx, %eax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r9d, %r15d
	imull	%r8d, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	imull	%r9d, %eax
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%r9d, %r9d
	movl	%r8d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	movl	$1024, %ecx
	xorl	%r8d, %r8d
	addl	$1023, %eax
	cltd
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	idivl	%ecx
	movq	%rdi, 8(%rsp)
	movl	112(%rsp), %r12d
	movl	$4194305, %edx
	movl	$1, %ecx
	salq	$10, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	movl	%r12d, 112(%rsp)
	movq	8(%rsp), %rdi
	addq	$56, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movl	%ebx, %ecx
	movl	%r15d, %r9d
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%ebp, %r8d
	movq	%r14, %rdx
	popq	%rbp
	.cfi_def_cfa_offset 40
	movq	%r13, %rsi
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z44__device_stub__Z16dark_channel_kerPfS_S_iiiiPfS_S_iiii
.L8:
	.cfi_restore_state
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2008:
	.size	dark_channel_run, .-dark_channel_run
	.globl	_Z43__device_stub__Z16dark_extract_kerPfS_S_iiiPfS_S_iii
	.type	_Z43__device_stub__Z16dark_extract_kerPfS_S_iiiPfS_S_iii, @function
_Z43__device_stub__Z16dark_extract_kerPfS_S_iiiPfS_S_iii:
.LFB2037:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z16dark_extract_kerPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L11:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2037:
	.size	_Z43__device_stub__Z16dark_extract_kerPfS_S_iiiPfS_S_iii, .-_Z43__device_stub__Z16dark_extract_kerPfS_S_iiiPfS_S_iii
	.globl	_Z16dark_extract_kerPfS_S_iii
	.type	_Z16dark_extract_kerPfS_S_iii, @function
_Z16dark_extract_kerPfS_S_iii:
.LFB2038:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z16dark_extract_kerPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2038:
	.size	_Z16dark_extract_kerPfS_S_iii, .-_Z16dark_extract_kerPfS_S_iii
	.globl	dark_extract_run
	.type	dark_extract_run, @function
dark_extract_run:
.LFB2009:
	.cfi_startproc
	endbr64
	movl	%ecx, %eax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r9d, %r15d
	imull	%r8d, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%r8d, %r14d
	xorl	%r8d, %r8d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	imull	%r9d, %eax
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	xorl	%r9d, %r9d
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	movl	$1024, %ecx
	addl	$1023, %eax
	cltd
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	idivl	%ecx
	movl	$4194305, %edx
	movl	$1, %ecx
	salq	$10, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movl	%r15d, %r9d
	movl	%r14d, %r8d
	movl	%ebx, %ecx
	movq	%r13, %rdx
	popq	%rbx
	.cfi_def_cfa_offset 48
	movq	%r12, %rsi
	movq	%rbp, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z43__device_stub__Z16dark_extract_kerPfS_S_iiiPfS_S_iii
.L16:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2009:
	.size	dark_extract_run, .-dark_extract_run
	.globl	_Z44__device_stub__Z14place_back_kerPfS_S_S_iiiiPfS_S_S_iiii
	.type	_Z44__device_stub__Z14place_back_kerPfS_S_S_iiiiPfS_S_S_iiii, @function
_Z44__device_stub__Z14place_back_kerPfS_S_S_iiiiPfS_S_S_iiii:
.LFB2039:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z14place_back_kerPfS_S_S_iiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L19:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2039:
	.size	_Z44__device_stub__Z14place_back_kerPfS_S_S_iiiiPfS_S_S_iiii, .-_Z44__device_stub__Z14place_back_kerPfS_S_S_iiiiPfS_S_S_iiii
	.globl	_Z14place_back_kerPfS_S_S_iiii
	.type	_Z14place_back_kerPfS_S_S_iiii, @function
_Z14place_back_kerPfS_S_S_iiii:
.LFB2040:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z14place_back_kerPfS_S_S_iiiiPfS_S_S_iiii
	.cfi_endproc
.LFE2040:
	.size	_Z14place_back_kerPfS_S_S_iiii, .-_Z14place_back_kerPfS_S_S_iiii
	.globl	place_back_run
	.type	place_back_run, @function
place_back_run:
.LFB2010:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r8d, %eax
	movq	%rcx, %r15
	movl	$1024, %ecx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	imull	%r9d, %eax
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r9d, %ebp
	xorl	%r9d, %r9d
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%r8d, %ebx
	xorl	%r8d, %r8d
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movl	112(%rsp), %r12d
	movl	120(%rsp), %r13d
	movq	%rdi, (%rsp)
	movq	%rsi, 8(%rsp)
	imull	%r12d, %eax
	leal	(%rax,%rax,2), %eax
	addl	$1023, %eax
	cltd
	idivl	%ecx
	movl	$4194305, %edx
	movl	$1, %ecx
	salq	$10, %rdx
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	movl	%r13d, 120(%rsp)
	movq	8(%rsp), %rsi
	movl	%ebp, %r9d
	movl	%ebx, %r8d
	movl	%r12d, 112(%rsp)
	movq	(%rsp), %rdi
	addq	$56, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movq	%r15, %rcx
	popq	%rbx
	.cfi_def_cfa_offset 48
	movq	%r14, %rdx
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z44__device_stub__Z14place_back_kerPfS_S_S_iiiiPfS_S_S_iiii
.L24:
	.cfi_restore_state
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2010:
	.size	place_back_run, .-place_back_run
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z14place_back_kerPfS_S_S_iiii"
.LC1:
	.string	"_Z16dark_extract_kerPfS_S_iii"
.LC2:
	.string	"_Z16dark_channel_kerPfS_S_iiii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2042:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z14place_back_kerPfS_S_S_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16dark_extract_kerPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16dark_channel_kerPfS_S_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2042:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#define Inf 9999999

void __global__ dark_channel_ker(float * image, float * darkc, float * index, int N, int H, int W, int wsize)
{
    int C = 3;
    int D = 1;
    int hsize = (wsize - 1) / 2;

    int ids = blockDim.x * blockIdx.x + threadIdx.x;
    int idt = gridDim.x * blockDim.x;

    for(; ids<W*H*N; ids+=idt)
    {
        // ids = W*H*n + W*h + w
        int idw = ids % W;
        ids = (ids - idw) / W;
        int idh = ids % H;
        ids = (ids - idh) / H;
        int idn = ids;

        float tmpc = Inf;
        float tmp1 = 0;
        float tmp2 = 0;
        float tmp3 = 0;

        for(int idc=0; idc<C; idc++)
        {
            for(int p=idh-hsize; p<idh+hsize+1; p++)
            {
                for(int q=idw-hsize; q<idw+hsize+1; q++)
                {
                    if(p>-1 && p<H && q>-1 && q<W)
                    {
                        float pixel_value = image[W*H*C*idn + W*H*idc + W*p + q];
                        if(pixel_value<tmpc)
                        {
                            tmpc = pixel_value;
                            tmp1 = idc;
                            tmp2 = p;
                            tmp3 = q;
                        }
                    }
                }
            }
        }

        darkc[W*H*D*idn + W*H*0 + W*idh + idw] = tmpc;
        index[W*H*C*idn + W*H*0 + W*idh + idw] = tmp1;
        index[W*H*C*idn + W*H*1 + W*idh + idw] = tmp2;
        index[W*H*C*idn + W*H*2 + W*idh + idw] = tmp3;
    }
}

void __global__ dark_extract_ker(float * image, float * index, float * darkc, int N, int H, int W)
{
    int C = 3;

    int ids = blockDim.x * blockIdx.x + threadIdx.x;
    int idt = gridDim.x * blockDim.x;

    for(; ids<N*H*W; ids+=idt)
    {
        int idw = ids % W;
        ids = (ids - idw) / W;
        int idh = ids % H;
        ids = (ids - idh) / H;
        int idn = ids;

        int idz = index[W*H*C*idn + W*H*0 + W*idh + idw];
        int idx = index[W*H*C*idn + W*H*1 + W*idh + idw];
        int idy = index[W*H*C*idn + W*H*2 + W*idh + idw];

        darkc[W*H*idn + W*idh + idw] = image[W*H*C*idn + W*H*idz + W*idx + idy];
    }
}

void __global__ place_back_ker(float * darkc, float * index, float * image, float * accum, int N, int H, int W, int wsize)
{
    int C = 3;
    int hsize = (wsize - 1) / 2;

    int ids = blockDim.x * blockIdx.x + threadIdx.x;
    int idt = gridDim.x * blockDim.x;

    for(; ids<N*C*H*W; ids+=idt)
    {
        int idw = ids % W;
        ids = (ids - idw) / W;
        int idh = ids % H;
        ids = (ids - idh) / H;
        int idc = ids % C;
        ids = (ids - idc) / C;
        int idn = ids;

        image[W*H*C*idn + W*H*idc + W*idh + idw] = 0;
        accum[W*H*C*idn + W*H*idc + W*idh + idw] = 0;
        float tmpi = 0;
        float tmpa = 0;

        for(int p=idh-hsize; p<idh+hsize+1; p++)
        {
            for(int q=idw-hsize; q<idw+hsize+1; q++)
            {
                if(p>-1 && p<H && q>-1 && q<W)
                {
                    int idz = (int) index[W*H*C*idn + W*H*0 + W*p + q];
                    int idx = (int) index[W*H*C*idn + W*H*1 + W*p + q];
                    int idy = (int) index[W*H*C*idn + W*H*2 + W*p + q];
                    if(idx==idh && idy==idw && idz==idc)
                    {
                        tmpi += darkc[W*H*idn + W*p + q];
                        tmpa += 1;
                    }
                }
            }
        }
        image[W*H*C*idn + W*H*idc + W*idh + idw] = tmpi;
        accum[W*H*C*idn + W*H*idc + W*idh + idw] = tmpa;
    }
}

#ifdef __cplusplus
extern "C"
{
    #endif

    void dark_channel_run(float * d_image, float * d_darkc, float * d_index, int N, int H, int W, int wsize)
    {
        int const threadsPerBlock = 1024;
        int const blocksPerGrid = (N*H*W + threadsPerBlock - 1) / threadsPerBlock;
        dark_channel_ker<<<blocksPerGrid, threadsPerBlock>>>(d_image, d_darkc, d_index, N, H, W, wsize);
    }

    void dark_extract_run(float * d_image, float * d_index, float * d_darkc, int N, int H, int W)
    {
        int const threadsPerBlock = 1024;
        int const blocksPerGrid = (N*H*W + threadsPerBlock - 1) / threadsPerBlock;
        dark_extract_ker<<<blocksPerGrid, threadsPerBlock>>>(d_image, d_index, d_darkc, N, H, W);
    }

    void place_back_run(float * d_darkc, float * d_index, float * d_image, float * d_accum, int N, int H, int W, int wsize)
    {
        int const threadsPerBlock = 1024;
        int const blocksPerGrid = (N*3*H*W + threadsPerBlock - 1) / threadsPerBlock;
        place_back_ker<<<blocksPerGrid, threadsPerBlock>>>(d_darkc, d_index, d_image, d_accum, N, H, W, wsize);
    }

    #ifdef __cplusplus
}
#endif

	.text
	.file	"kernels.hip"
	.globl	_Z31__device_stub__dark_channel_kerPfS_S_iiii # -- Begin function _Z31__device_stub__dark_channel_kerPfS_S_iiii
	.type	_Z31__device_stub__dark_channel_kerPfS_S_iiii,@function
_Z31__device_stub__dark_channel_kerPfS_S_iiii: # @_Z31__device_stub__dark_channel_kerPfS_S_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16dark_channel_kerPfS_S_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__dark_channel_kerPfS_S_iiii, .Lfunc_end0-_Z31__device_stub__dark_channel_kerPfS_S_iiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__dark_extract_kerPfS_S_iii # -- Begin function _Z31__device_stub__dark_extract_kerPfS_S_iii
	.type	_Z31__device_stub__dark_extract_kerPfS_S_iii,@function
_Z31__device_stub__dark_extract_kerPfS_S_iii: # @_Z31__device_stub__dark_extract_kerPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16dark_extract_kerPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__dark_extract_kerPfS_S_iii, .Lfunc_end1-_Z31__device_stub__dark_extract_kerPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__place_back_kerPfS_S_S_iiii # -- Begin function _Z29__device_stub__place_back_kerPfS_S_S_iiii
	.type	_Z29__device_stub__place_back_kerPfS_S_S_iiii,@function
_Z29__device_stub__place_back_kerPfS_S_S_iiii: # @_Z29__device_stub__place_back_kerPfS_S_S_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14place_back_kerPfS_S_S_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z29__device_stub__place_back_kerPfS_S_S_iiii, .Lfunc_end2-_Z29__device_stub__place_back_kerPfS_S_S_iiii
	.cfi_endproc
                                        # -- End function
	.globl	dark_channel_run                # -- Begin function dark_channel_run
	.type	dark_channel_run,@function
dark_channel_run:                       # @dark_channel_run
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movl	%ecx, %r14d
	movq	%rdx, %r15
	movq	%rsi, %r12
	movq	%rdi, %r13
	movl	%r8d, %edi
	imull	%ecx, %edi
	imull	%r9d, %edi
	leal	1023(%rdi), %eax
	addl	$2046, %edi                     # imm = 0x7FE
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$10, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$1024, %rdx                     # imm = 0x400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB3_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_2:
	.cfi_def_cfa_offset 64
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movl	%r14d, %ecx
	movl	%ebp, %r8d
	movl	%ebx, %r9d
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z31__device_stub__dark_channel_kerPfS_S_iiii # TAILCALL
.Lfunc_end3:
	.size	dark_channel_run, .Lfunc_end3-dark_channel_run
	.cfi_endproc
                                        # -- End function
	.globl	dark_extract_run                # -- Begin function dark_extract_run
	.type	dark_extract_run,@function
dark_extract_run:                       # @dark_extract_run
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movl	%ecx, %r14d
	movq	%rdx, %r15
	movq	%rsi, %r12
	movq	%rdi, %r13
	movl	%r8d, %edi
	imull	%ecx, %edi
	imull	%r9d, %edi
	leal	1023(%rdi), %eax
	addl	$2046, %edi                     # imm = 0x7FE
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$10, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$1024, %rdx                     # imm = 0x400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB4_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_2:
	.cfi_def_cfa_offset 64
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movl	%r14d, %ecx
	movl	%ebp, %r8d
	movl	%ebx, %r9d
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z31__device_stub__dark_extract_kerPfS_S_iii # TAILCALL
.Lfunc_end4:
	.size	dark_extract_run, .Lfunc_end4-dark_extract_run
	.cfi_endproc
                                        # -- End function
	.globl	place_back_run                  # -- Begin function place_back_run
	.type	place_back_run,@function
place_back_run:                         # @place_back_run
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %ebp
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	%rsi, %r12
	movq	%rdi, %r13
	movl	%r8d, %eax
	imull	%r9d, %eax
	imull	64(%rsp), %eax
	leal	(%rax,%rax,2), %ecx
	addl	$1023, %ecx                     # imm = 0x3FF
	leal	(%rax,%rax,2), %edi
	addl	$2046, %edi                     # imm = 0x7FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %edi
	sarl	$10, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$1024, %rdx                     # imm = 0x400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB5_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_2:
	.cfi_def_cfa_offset 64
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movl	%ebp, %r8d
	movl	%ebx, %r9d
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z29__device_stub__place_back_kerPfS_S_S_iiii # TAILCALL
.Lfunc_end5:
	.size	place_back_run, .Lfunc_end5-place_back_run
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16dark_channel_kerPfS_S_iiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16dark_extract_kerPfS_S_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14place_back_kerPfS_S_S_iiii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16dark_channel_kerPfS_S_iiii,@object # @_Z16dark_channel_kerPfS_S_iiii
	.section	.rodata,"a",@progbits
	.globl	_Z16dark_channel_kerPfS_S_iiii
	.p2align	3, 0x0
_Z16dark_channel_kerPfS_S_iiii:
	.quad	_Z31__device_stub__dark_channel_kerPfS_S_iiii
	.size	_Z16dark_channel_kerPfS_S_iiii, 8

	.type	_Z16dark_extract_kerPfS_S_iii,@object # @_Z16dark_extract_kerPfS_S_iii
	.globl	_Z16dark_extract_kerPfS_S_iii
	.p2align	3, 0x0
_Z16dark_extract_kerPfS_S_iii:
	.quad	_Z31__device_stub__dark_extract_kerPfS_S_iii
	.size	_Z16dark_extract_kerPfS_S_iii, 8

	.type	_Z14place_back_kerPfS_S_S_iiii,@object # @_Z14place_back_kerPfS_S_S_iiii
	.globl	_Z14place_back_kerPfS_S_S_iiii
	.p2align	3, 0x0
_Z14place_back_kerPfS_S_S_iiii:
	.quad	_Z29__device_stub__place_back_kerPfS_S_S_iiii
	.size	_Z14place_back_kerPfS_S_S_iiii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z16dark_channel_kerPfS_S_iiii"
	.size	.L__unnamed_1, 31

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z16dark_extract_kerPfS_S_iii"
	.size	.L__unnamed_2, 30

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z14place_back_kerPfS_S_S_iiii"
	.size	.L__unnamed_3, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__dark_channel_kerPfS_S_iiii
	.addrsig_sym _Z31__device_stub__dark_extract_kerPfS_S_iii
	.addrsig_sym _Z29__device_stub__place_back_kerPfS_S_S_iiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16dark_channel_kerPfS_S_iiii
	.addrsig_sym _Z16dark_extract_kerPfS_S_iii
	.addrsig_sym _Z14place_back_kerPfS_S_S_iiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16dark_channel_kerPfS_S_iiii ; -- Begin function _Z16dark_channel_kerPfS_S_iiii
	.globl	_Z16dark_channel_kerPfS_S_iiii
	.p2align	8
	.type	_Z16dark_channel_kerPfS_S_iiii,@function
_Z16dark_channel_kerPfS_S_iiii:         ; @_Z16dark_channel_kerPfS_S_iiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s22, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s22, v[0:1]
	s_mul_i32 s15, s6, s5
	s_mul_i32 s16, s15, s4
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s16, v1
	s_cbranch_execz .LBB0_18
; %bb.1:                                ; %.lr.ph155
	s_ashr_i32 s17, s6, 31
	s_ashr_i32 s18, s5, 31
	s_add_i32 s4, s6, s17
	s_add_i32 s8, s5, s18
	s_xor_b32 s19, s4, s17
	s_xor_b32 s20, s8, s18
	v_cvt_f32_u32_e32 v0, s19
	v_cvt_f32_u32_e32 v2, s20
	s_load_b32 s2, s[2:3], 0x0
	s_sub_i32 s3, 0, s19
	s_sub_i32 s4, 0, s20
	v_rcp_iflag_f32_e32 v0, v0
	v_rcp_iflag_f32_e32 v2, v2
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[12:13], s[0:1], 0x10
	s_add_i32 s0, s7, -1
	s_mov_b32 s21, 0
	s_lshr_b32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s1
	s_ashr_i32 s7, s0, 1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_sub_i32 s14, 0, s7
	s_add_i32 s23, s7, 1
	s_or_b32 s24, s0, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s22, s2, s22
	v_mul_lo_u32 v3, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v0, v3
	v_dual_mul_f32 v2, 0x4f7ffffe, v2 :: v_dual_add_nc_u32 v3, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v2, v2
	v_mul_lo_u32 v4, s4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v2, v4
	v_add_nc_u32_e32 v4, v2, v4
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;       Child Loop BB0_5 Depth 3
                                        ;         Child Loop BB0_7 Depth 4
	v_ashrrev_i32_e32 v0, 31, v1
	s_mov_b32 s25, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v1, v0
	v_xor_b32_e32 v2, v2, v0
	v_xor_b32_e32 v0, s17, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v2, v3
	v_mul_lo_u32 v6, v5, s19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v6
	v_add_nc_u32_e32 v6, 1, v5
	v_subrev_nc_u32_e32 v7, s19, v2
	v_cmp_le_u32_e32 vcc_lo, s19, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v5, v6 :: v_dual_cndmask_b32 v2, v2, v7
	v_add_nc_u32_e32 v6, 1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s19, v2
	v_cndmask_b32_e32 v2, v5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v0
	v_sub_nc_u32_e32 v2, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v0, 31, v2
	v_add_nc_u32_e32 v5, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v5, v5, v0
	v_xor_b32_e32 v0, s18, v0
	v_mul_hi_u32 v6, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, v6, s20
	v_sub_nc_u32_e32 v5, v5, v7
	v_add_nc_u32_e32 v7, 1, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v8, s20, v5
	v_cmp_le_u32_e32 vcc_lo, s20, v5
	v_dual_cndmask_b32 v6, v6, v7 :: v_dual_cndmask_b32 v5, v5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, 1, v6
	v_cmp_le_u32_e32 vcc_lo, s20, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v5, v6, v7, vcc_lo
	v_lshlrev_b32_e32 v7, 1, v0
	v_xor_b32_e32 v5, v5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v8, 1, v5
	v_sub_nc_u32_e32 v6, v5, v0
	v_mul_lo_u32 v0, v2, s6
	v_sub_nc_u32_e32 v5, v8, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v9, v6, s5
	v_mad_u64_u32 v[7:8], null, s5, v5, s[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_nc_u32_e32 v0, v1, v0
	v_mov_b32_e32 v5, 0
	v_sub_nc_u32_e32 v10, v2, v9
	v_mov_b32_e32 v8, 0x4b18967f
	s_delay_alu instid0(VALU_DEP_4)
	v_subrev_nc_u32_e32 v11, s7, v0
	v_mul_lo_u32 v9, s6, v7
	v_add_nc_u32_e32 v2, s7, v0
	v_subrev_nc_u32_e32 v12, s7, v10
	v_dual_mov_b32 v7, 0 :: v_dual_add_nc_u32 v14, s7, v10
	v_add_nc_u32_e32 v13, s23, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_i32_e32 vcc_lo, v11, v2
	v_cmp_le_i32_e64 s0, v12, v14
	v_add3_u32 v14, s14, v1, v9
	v_mov_b32_e32 v9, 0
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_5 Depth 3
                                        ;         Child Loop BB0_7 Depth 4
	s_delay_alu instid0(VALU_DEP_3)
	s_and_saveexec_b32 s26, s0
	s_cbranch_execz .LBB0_16
; %bb.4:                                ; %.lr.ph142
                                        ;   in Loop: Header=BB0_3 Depth=2
	v_cvt_f32_i32_e32 v15, s25
	v_dual_mov_b32 v16, v14 :: v_dual_mov_b32 v17, v12
	s_mov_b32 s27, 0
.LBB0_5:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_7 Depth 4
	s_and_saveexec_b32 s28, vcc_lo
	s_cbranch_execz .LBB0_14
; %bb.6:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_5 Depth=3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e64 s1, -1, v17
	v_cmp_gt_i32_e64 s2, s5, v17
	v_cvt_f32_i32_e32 v18, v17
	v_mov_b32_e32 v1, v16
	v_mov_b32_e32 v19, v11
	s_mov_b32 s29, s24
.LBB0_7:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_5 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_and_saveexec_b32 s30, s1
	s_cbranch_execz .LBB0_13
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e64 s3, -1, v19
	v_cmp_gt_i32_e64 s4, s6, v19
	s_and_b32 s3, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s4, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB0_12
; %bb.9:                                ;   in Loop: Header=BB0_7 Depth=4
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s31, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[1:2]
	v_add_co_u32 v20, s3, s8, v20
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v21, s3, s9, v21, s3
	global_load_b32 v2, v[20:21], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_f32_e32 v2, v8
; %bb.10:                               ;   in Loop: Header=BB0_7 Depth=4
	v_cvt_f32_i32_e32 v5, v19
	v_mov_b32_e32 v7, v18
	v_dual_mov_b32 v9, v15 :: v_dual_mov_b32 v8, v2
; %bb.11:                               ; %Flow
                                        ;   in Loop: Header=BB0_7 Depth=4
	s_or_b32 exec_lo, exec_lo, s31
.LBB0_12:                               ; %Flow186
                                        ;   in Loop: Header=BB0_7 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_13:                               ;   in Loop: Header=BB0_7 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s30
	v_add_nc_u32_e32 v19, 1, v19
	v_add_nc_u32_e32 v1, 1, v1
	s_add_i32 s29, s29, -1
	s_cmp_eq_u32 s29, 0
	s_cbranch_scc0 .LBB0_7
.LBB0_14:                               ; %Flow188
                                        ;   in Loop: Header=BB0_5 Depth=3
	s_or_b32 exec_lo, exec_lo, s28
	v_add_nc_u32_e32 v17, 1, v17
	v_add_nc_u32_e32 v16, s6, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s1, v17, v13
	s_or_b32 s27, s1, s27
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s27
	s_cbranch_execnz .LBB0_5
; %bb.15:                               ; %Flow189
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s27
.LBB0_16:                               ; %Flow190
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s26
	v_add_nc_u32_e32 v14, s15, v14
	s_add_i32 s25, s25, 1
	s_cmp_eq_u32 s25, 3
	s_cbranch_scc0 .LBB0_3
; %bb.17:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mul_lo_u32 v12, v6, s15
	v_mad_u64_u32 v[1:2], null, v10, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[10:11], null, v12, 3, v[1:2]
	v_add_nc_u32_e32 v12, v1, v12
	v_add_nc_u32_e32 v1, s22, v6
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v14, s15, v10
	v_ashrrev_i32_e32 v11, 31, v10
	v_cmp_le_i32_e32 vcc_lo, s16, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_nc_u32_e32 v16, s15, v14
	v_ashrrev_i32_e32 v15, 31, v14
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_or_b32 s21, vcc_lo, s21
	s_delay_alu instid0(VALU_DEP_3)
	v_ashrrev_i32_e32 v17, 31, v16
	v_add_co_u32 v12, s0, s10, v12
	v_lshlrev_b64 v[14:15], 2, v[14:15]
	v_add_co_ci_u32_e64 v13, s0, s11, v13, s0
	v_add_co_u32 v10, s0, s12, v10
	v_lshlrev_b64 v[16:17], 2, v[16:17]
	v_add_co_ci_u32_e64 v11, s0, s13, v11, s0
	v_add_co_u32 v14, s0, s12, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v15, s0, s13, v15, s0
	v_add_co_u32 v16, s0, s12, v16
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v17, s0, s13, v17, s0
	global_store_b32 v[12:13], v8, off
	s_clause 0x2
	global_store_b32 v[10:11], v9, off
	global_store_b32 v[14:15], v7, off
	global_store_b32 v[16:17], v5, off
	s_and_not1_b32 exec_lo, exec_lo, s21
	s_cbranch_execnz .LBB0_2
.LBB0_18:                               ; %._crit_edge156
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16dark_channel_kerPfS_S_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 32
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16dark_channel_kerPfS_S_iiii, .Lfunc_end0-_Z16dark_channel_kerPfS_S_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1164
; NumSgprs: 34
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 34
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16dark_extract_kerPfS_S_iii ; -- Begin function _Z16dark_extract_kerPfS_S_iii
	.globl	_Z16dark_extract_kerPfS_S_iii
	.p2align	8
	.type	_Z16dark_extract_kerPfS_S_iii,@function
_Z16dark_extract_kerPfS_S_iii:          ; @_Z16dark_extract_kerPfS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s16, s8, 0xffff
	s_mul_i32 s7, s6, s5
	v_mad_u64_u32 v[1:2], null, s15, s16, v[0:1]
	s_mul_i32 s4, s7, s4
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB1_3
; %bb.1:                                ; %.lr.ph
	s_ashr_i32 s12, s6, 31
	s_ashr_i32 s13, s5, 31
	s_add_i32 s8, s6, s12
	s_add_i32 s9, s5, s13
	s_xor_b32 s14, s8, s12
	s_xor_b32 s15, s9, s13
	v_cvt_f32_u32_e32 v0, s14
	v_cvt_f32_u32_e32 v2, s15
	s_load_b32 s17, s[2:3], 0x0
	s_sub_i32 s2, 0, s14
	s_sub_i32 s3, 0, s15
	v_rcp_iflag_f32_e32 v0, v0
	v_rcp_iflag_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_mul_f32_e32 v2, 0x4f7ffffe, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v0, v0
	v_cvt_u32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, s2, v0
	v_mul_lo_u32 v4, s3, v2
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s17, s16
	s_mov_b32 s16, 0
	v_mul_hi_u32 v3, v0, v3
	v_mul_hi_u32 v4, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v0, v3
	v_add_nc_u32_e32 v2, v2, v4
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v3, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v1, v3
	v_xor_b32_e32 v5, s12, v3
	v_xor_b32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v0
	v_mul_lo_u32 v6, v4, s14
	v_add_nc_u32_e32 v7, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v6
	v_subrev_nc_u32_e32 v6, s14, v3
	v_cmp_le_u32_e32 vcc_lo, s14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v4, v4, v7 :: v_dual_cndmask_b32 v3, v3, v6
	v_add_nc_u32_e32 v6, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s14, v3
	v_cndmask_b32_e32 v3, v4, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v3, v5
	v_sub_nc_u32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_mul_lo_u32 v5, v3, s6
	v_add_nc_u32_e32 v6, v3, v4
	v_xor_b32_e32 v7, s13, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v1, v1, v5
	v_xor_b32_e32 v4, v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v4, v2
	v_add_nc_u32_e32 v8, 1, v5
	v_mul_lo_u32 v6, v5, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v4, v6
	v_subrev_nc_u32_e32 v6, s15, v4
	v_cmp_le_u32_e32 vcc_lo, s15, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v5, v8 :: v_dual_cndmask_b32 v4, v4, v6
	v_add_nc_u32_e32 v6, 1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s15, v4
	v_cndmask_b32_e32 v4, v5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v4, v4, v7
	v_sub_nc_u32_e32 v11, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v11, s5
	v_mul_lo_u32 v12, v11, s7
	v_sub_nc_u32_e32 v6, v3, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v3, v12, 1, v12
	v_mad_u64_u32 v[4:5], null, v6, s6, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v4, v3
	v_add_nc_u32_e32 v7, s7, v5
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v8, 31, v7
	v_add_nc_u32_e32 v9, s7, v7
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v5, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s10, v7
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	s_clause 0x1
	global_load_b32 v1, v[5:6], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v5, vcc_lo, s10, v9
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v10, vcc_lo
	global_load_b32 v8, v[5:6], off
	s_waitcnt vmcnt(2)
	v_cvt_i32_f32_e32 v1, v1
	s_waitcnt vmcnt(1)
	v_cvt_i32_f32_e32 v7, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[5:6], null, s7, v1, v[3:4]
	v_mul_lo_u32 v1, v7, s6
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v3, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add3_u32 v5, v5, v1, v3
	v_add_nc_u32_e32 v3, v4, v12
	v_add_nc_u32_e32 v1, s1, v11
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v5, vcc_lo, s8, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v6, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s4, v1
	v_add_co_u32 v3, s0, s2, v3
	global_load_b32 v5, v[5:6], off
	v_add_co_ci_u32_e64 v4, s0, s3, v4, s0
	s_or_b32 s16, vcc_lo, s16
	s_waitcnt vmcnt(0)
	global_store_b32 v[3:4], v5, off
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB1_2
.LBB1_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16dark_extract_kerPfS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z16dark_extract_kerPfS_S_iii, .Lfunc_end1-_Z16dark_extract_kerPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 812
; NumSgprs: 20
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14place_back_kerPfS_S_S_iiii ; -- Begin function _Z14place_back_kerPfS_S_S_iiii
	.globl	_Z14place_back_kerPfS_S_S_iiii
	.p2align	8
	.type	_Z14place_back_kerPfS_S_S_iiii,@function
_Z14place_back_kerPfS_S_S_iiii:         ; @_Z14place_back_kerPfS_S_S_iiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x3c
	s_load_b128 s[16:19], s[0:1], 0x20
	s_add_u32 s2, s0, 48
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s23, s4, 0xffff
	s_mul_i32 s13, s18, s17
	v_mad_u64_u32 v[5:6], null, s15, s23, v[0:1]
	s_mul_i32 s14, s13, s16
	s_mov_b32 s4, exec_lo
	s_mul_i32 s14, s14, 3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s14, v5
	s_cbranch_execz .LBB2_18
; %bb.1:                                ; %.lr.ph164
	s_ashr_i32 s15, s18, 31
	s_ashr_i32 s16, s17, 31
	s_add_i32 s4, s18, s15
	s_add_i32 s5, s17, s16
	s_xor_b32 s20, s4, s15
	s_xor_b32 s21, s5, s16
	v_cvt_f32_u32_e32 v0, s20
	v_cvt_f32_u32_e32 v1, s21
	s_load_b32 s2, s[2:3], 0x0
	s_sub_i32 s3, 0, s20
	s_sub_i32 s4, 0, s21
	v_rcp_iflag_f32_e32 v0, v0
	v_rcp_iflag_f32_e32 v1, v1
	s_mov_b32 s22, 0
	v_mov_b32_e32 v12, 0
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v0, 0x4f7ffffe, v0 :: v_dual_mul_f32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v0, v0
	v_cvt_u32_f32_e32 v1, v1
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s23, s2, s23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, s3, v0
	v_mul_lo_u32 v3, s4, v1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_add_i32 s0, s19, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s1, s0, 31
	s_add_i32 s0, s0, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v2, v0, v2
	v_mul_hi_u32 v3, v1, v3
	s_ashr_i32 s19, s0, 1
	s_or_b32 s25, s0, 1
	s_sub_i32 s12, 0, s19
	s_add_i32 s24, s19, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, v0, v2
	v_add_nc_u32_e32 v11, v1, v3
.LBB2_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_4 Depth 2
                                        ;       Child Loop BB2_6 Depth 3
	v_ashrrev_i32_e32 v0, 31, v5
	v_mov_b32_e32 v17, 0
	s_mov_b32 s26, exec_lo
	v_mov_b32_e32 v9, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v5, v0
	v_xor_b32_e32 v1, v1, v0
	v_xor_b32_e32 v0, s15, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v1, v10
	v_mul_lo_u32 v3, v2, s20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v1, v1, v3
	v_add_nc_u32_e32 v3, 1, v2
	v_subrev_nc_u32_e32 v4, s20, v1
	v_cmp_le_u32_e32 vcc_lo, s20, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v2, v2, v3 :: v_dual_cndmask_b32 v1, v1, v4
	v_add_nc_u32_e32 v3, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s20, v1
	v_cndmask_b32_e32 v1, v2, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v1, v0
	v_sub_nc_u32_e32 v0, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_nc_u32_e32 v2, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v1
	v_mul_hi_u32 v3, v2, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, v3, s21
	v_sub_nc_u32_e32 v2, v2, v4
	v_add_nc_u32_e32 v4, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s21, v2
	v_subrev_nc_u32_e32 v6, s21, v2
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v4, 1, v3
	v_cndmask_b32_e32 v2, v2, v6, vcc_lo
	v_xor_b32_e32 v6, s16, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_le_u32_e32 vcc_lo, s21, v2
	v_cndmask_b32_e32 v1, v3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v7, v1, v6
	v_sub_nc_u32_e32 v1, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_i32 v2, 0x55555556, v1
	v_mul_lo_u32 v4, v1, s17
	v_lshrrev_b32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v14, v0, v4
	v_add_nc_u32_e32 v13, v2, v3
	v_mul_lo_u32 v2, v0, s18
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v14, s18
	v_subrev_nc_u32_e32 v16, s19, v14
	v_add_nc_u32_e32 v18, s19, v14
	v_lshl_add_u32 v8, v13, 1, v13
	v_sub_nc_u32_e32 v0, v5, v2
	v_sub_nc_u32_e32 v15, v1, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, v8, s13, v[0:1]
	v_mul_lo_u32 v2, v15, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v3, v2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s8, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	global_store_b32 v[1:2], v12, off
	global_store_b32 v[3:4], v12, off
	v_cmpx_le_i32_e64 v16, v18
	s_cbranch_execz .LBB2_17
; %bb.3:                                ; %.lr.ph158
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_add_nc_u32_e32 v8, v6, v8
	v_add_nc_u32_e32 v6, v6, v13
	v_subrev_nc_u32_e32 v18, s19, v0
	v_add_nc_u32_e32 v19, s19, v0
	v_add_nc_u32_e32 v17, s12, v5
	v_sub_nc_u32_e32 v9, v8, v7
	v_sub_nc_u32_e32 v6, v6, v7
	s_mov_b32 s27, 0
	v_cmp_le_i32_e32 vcc_lo, v18, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v20, 2, v9
	v_mul_lo_u32 v21, s17, v9
	v_mad_u64_u32 v[7:8], null, s17, v6, s[12:13]
	v_mad_u64_u32 v[8:9], null, s17, v20, s[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add3_u32 v9, s12, s17, v21
	v_add_nc_u32_e32 v19, s12, v21
	v_mad_u64_u32 v[5:6], null, s18, v7, v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[6:7], null, s18, v8, v[17:18]
	v_mad_u64_u32 v[7:8], null, s18, v9, v[17:18]
	s_delay_alu instid0(VALU_DEP_4)
	v_mad_u64_u32 v[8:9], null, s18, v19, v[17:18]
	v_mov_b32_e32 v17, 0
	v_add_nc_u32_e32 v19, s24, v14
	v_mov_b32_e32 v9, 0
.LBB2_4:                                ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_6 Depth 3
	s_and_saveexec_b32 s28, vcc_lo
	s_cbranch_execz .LBB2_15
; %bb.5:                                ; %.lr.ph
                                        ;   in Loop: Header=BB2_4 Depth=2
	v_cmp_lt_i32_e64 s0, -1, v16
	v_cmp_gt_i32_e64 s1, s17, v16
	s_mov_b32 s29, 0
.LBB2_6:                                ;   Parent Loop BB2_2 Depth=1
                                        ;     Parent Loop BB2_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s30, s0
	s_cbranch_execz .LBB2_14
; %bb.7:                                ;   in Loop: Header=BB2_6 Depth=3
	v_add_nc_u32_e32 v20, s29, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e64 s2, -1, v20
	v_cmp_gt_i32_e64 s3, s18, v20
	s_and_b32 s2, s1, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s31, s2
	s_cbranch_execz .LBB2_13
; %bb.8:                                ;   in Loop: Header=BB2_6 Depth=3
	v_add_nc_u32_e32 v20, s29, v7
	s_mov_b32 s33, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v21, 31, v20
	v_lshlrev_b64 v[20:21], 2, v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s2, s6, v20
	v_add_co_ci_u32_e64 v21, s2, s7, v21, s2
	global_load_b32 v20, v[20:21], off
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v20, v20
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e64 v14, v20
	s_cbranch_execz .LBB2_12
; %bb.9:                                ;   in Loop: Header=BB2_6 Depth=3
	v_add_nc_u32_e32 v20, s29, v6
	v_add_nc_u32_e32 v22, s29, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v21, 31, v20
	v_ashrrev_i32_e32 v23, 31, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[20:21], 2, v[20:21]
	v_lshlrev_b64 v[22:23], 2, v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s2, s6, v20
	v_add_co_ci_u32_e64 v21, s2, s7, v21, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v22, s2, s6, v22
	v_add_co_ci_u32_e64 v23, s2, s7, v23, s2
	s_clause 0x1
	global_load_b32 v20, v[20:21], off
	global_load_b32 v21, v[22:23], off
	s_waitcnt vmcnt(1)
	v_cvt_i32_f32_e32 v20, v20
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v21, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s2, v0, v20
	v_cmp_eq_u32_e64 s3, v15, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_11
; %bb.10:                               ;   in Loop: Header=BB2_6 Depth=3
	v_add_nc_u32_e32 v20, s29, v5
	v_add_f32_e32 v17, 1.0, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v21, 31, v20
	v_lshlrev_b64 v[20:21], 2, v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s2, s4, v20
	v_add_co_ci_u32_e64 v21, s2, s5, v21, s2
	global_load_b32 v20, v[20:21], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v9, v9, v20
.LBB2_11:                               ; %Flow
                                        ;   in Loop: Header=BB2_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_12:                               ; %Flow200
                                        ;   in Loop: Header=BB2_6 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s33
.LBB2_13:                               ; %Flow201
                                        ;   in Loop: Header=BB2_6 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s31
.LBB2_14:                               ;   in Loop: Header=BB2_6 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s30
	s_add_i32 s29, s29, 1
	s_cmp_eq_u32 s25, s29
	s_cbranch_scc0 .LBB2_6
.LBB2_15:                               ; %Flow203
                                        ;   in Loop: Header=BB2_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s28
	v_add_nc_u32_e32 v16, 1, v16
	v_add_nc_u32_e32 v5, s18, v5
	v_add_nc_u32_e32 v6, s18, v6
	v_add_nc_u32_e32 v7, s18, v7
	v_add_nc_u32_e32 v8, s18, v8
	v_cmp_eq_u32_e64 s0, v16, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s27, s0, s27
	s_and_not1_b32 exec_lo, exec_lo, s27
	s_cbranch_execnz .LBB2_4
; %bb.16:                               ; %Flow204
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s27
.LBB2_17:                               ; %Flow205
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s26
	v_add_nc_u32_e32 v5, s23, v13
	global_store_b32 v[1:2], v9, off
	global_store_b32 v[3:4], v17, off
	v_cmp_le_i32_e32 vcc_lo, s14, v5
	s_or_b32 s22, vcc_lo, s22
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s22
	s_cbranch_execnz .LBB2_2
.LBB2_18:                               ; %._crit_edge165
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14place_back_kerPfS_S_S_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 34
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z14place_back_kerPfS_S_S_iiii, .Lfunc_end2-_Z14place_back_kerPfS_S_S_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1344
; NumSgprs: 36
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 36
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16dark_channel_kerPfS_S_iiii
    .private_segment_fixed_size: 0
    .sgpr_count:     34
    .sgpr_spill_count: 0
    .symbol:         _Z16dark_channel_kerPfS_S_iiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     22
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16dark_extract_kerPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z16dark_extract_kerPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14place_back_kerPfS_S_S_iiii
    .private_segment_fixed_size: 0
    .sgpr_count:     36
    .sgpr_spill_count: 0
    .symbol:         _Z14place_back_kerPfS_S_S_iiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     24
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
