#include <stdio.h>
#include <sys/time.h>

#define initTimer struct timeval tv1, tv2; struct timezone tz
#define startTimer gettimeofday(&tv1, &tz)
#define stopTimer gettimeofday(&tv2, &tz)
#define tpsCalcul (tv2.tv_sec-tv1.tv_sec)*1000000L + (tv2.tv_usec-tv1.tv_usec)


#define MAX_DIM_GRID 65535
#define MAX_DIM_BLOCK 1024


long tailleVecteur ;

/* KERNEL CUDA */

__global__ void add_vec_scalaire_gpu(int *vec, int *res, int a, long N) {
	long i = (long)blockIdx.x * (long)blockDim.x + (long)threadIdx.x;
	if (i < N) {
		res[i] = vec[i] + a;
	}
}

void add_vec_scalaire_cpu(int *vec, int *res, int a, long N) {
	int i ;
	for (i=0 ; i < N ; i ++) {
		res[i] = vec[i] + a;
	}
}

int main(int argc, char *argv[]) {
	int alpha = 10;
	if (argc < 2) {
		printf("Erreur, manque un argument\n");
		exit(0);
	}
	tailleVecteur = atol(argv[1]);
	long blocksize = 1;
	if (argc ==3) {
		blocksize = atoi(argv[2]);
	}

	int *vecteur;
	int *resultat;
	int *cudaVec;
	int *cudaRes;

	initTimer;

	long size = sizeof(int)*tailleVecteur;

	vecteur = (int *)malloc(size);
	resultat = (int *)malloc(size);

	if (vecteur == NULL) {
		printf("Allocation memoire qui pose probleme (vecteur) \n");
	}
	if (resultat == NULL) {
		printf("Allocation memoire qui pose probleme (resultat) \n");
	}

	long i ;
	for (i= 0 ; i < tailleVecteur ; i++) {
		vecteur[i] = rand() % 100;
		resultat[i] = 0;
	}

	// cudaSetDevice(1);

	if (cudaMalloc((void **)&cudaVec, size) == cudaErrorMemoryAllocation) {
		printf("Allocation memoire qui pose probleme (cudaVec) \n");
	}
	if (cudaMalloc((void **)&cudaRes, size)  == cudaErrorMemoryAllocation) {
		printf("Allocation memoire qui pose probleme (cudaRes) \n");
	}

	long dimBlock = blocksize;
	long dimGrid = tailleVecteur/blocksize;
	if ((tailleVecteur % blocksize) != 0) {
		dimGrid++;
	}



	int res = cudaMemcpy(&cudaVec[0], &vecteur[0], size, cudaMemcpyHostToDevice);

	printf("Copy CPU -> GPU %d \n",res);
	startTimer;
	add_vec_scalaire_gpu<<<dimGrid, dimBlock>>>(cudaVec, cudaRes, alpha, tailleVecteur);
	stopTimer;



	cudaMemcpy(&resultat[0], &cudaRes[0], size, cudaMemcpyDeviceToHost);


	/* Test bon fonctionnement */

	bool ok = true;
	int indice = -1;
	for (i= 0 ; i < tailleVecteur ; i++) {
	// printf("Resultat GPU %d     Resultat CPU %d \n",resultat[i], vecteur[i]+alpha);
		if (resultat[i] != vecteur[i] + alpha) {
			ok = false;
			if (indice ==-1) {
				indice = i;
			}
		}
	}
	printf("------ ");
	printf("dimGrid %ld dimBlock %ld ",dimGrid, dimBlock);
	if (ok) {
		printf("Resultat ok\n");
	} else {
		printf("resultat NON ok (%d)\n", indice);
	}
	printf("Vecteur %ld => Temps calcul GPU %ld \n", tailleVecteur, tpsCalcul);

	startTimer;
	add_vec_scalaire_cpu (vecteur, resultat, alpha, tailleVecteur);
	stopTimer;
	printf("Vecteur %ld => Temps total  CPU %ld \n", tailleVecteur, tpsCalcul);


	cudaFree(cudaVec);
	cudaFree(cudaRes);


}





	.file	"tmpxft_0021fa9d_00000000-6_Vecteur.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z20add_vec_scalaire_cpuPiS_il
	.type	_Z20add_vec_scalaire_cpuPiS_il, @function
_Z20add_vec_scalaire_cpuPiS_il:
.LFB2027:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L3:
	cmpq	%rax, %rcx
	jle	.L6
	movl	(%rdi,%rax,4), %r8d
	addl	%edx, %r8d
	movl	%r8d, (%rsi,%rax,4)
	incq	%rax
	jmp	.L3
.L6:
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z20add_vec_scalaire_cpuPiS_il, .-_Z20add_vec_scalaire_cpuPiS_il
	.globl	_Z44__device_stub__Z20add_vec_scalaire_gpuPiS_ilPiS_il
	.type	_Z44__device_stub__Z20add_vec_scalaire_gpuPiS_ilPiS_il, @function
_Z44__device_stub__Z20add_vec_scalaire_gpuPiS_ilPiS_il:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z20add_vec_scalaire_gpuPiS_il(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L7:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z44__device_stub__Z20add_vec_scalaire_gpuPiS_ilPiS_il, .-_Z44__device_stub__Z20add_vec_scalaire_gpuPiS_ilPiS_il
	.globl	_Z20add_vec_scalaire_gpuPiS_il
	.type	_Z20add_vec_scalaire_gpuPiS_il, @function
_Z20add_vec_scalaire_gpuPiS_il:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z20add_vec_scalaire_gpuPiS_ilPiS_il
	.cfi_endproc
.LFE2054:
	.size	_Z20add_vec_scalaire_gpuPiS_il, .-_Z20add_vec_scalaire_gpuPiS_il
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Erreur, manque un argument\n"
.LC1:
	.string	"Allocation memoire qui pose probleme (vecteur) \n"
.LC2:
	.string	"Allocation memoire qui pose probleme (resultat) \n"
.LC3:
	.string	"Allocation memoire qui pose probleme (cudaVec) \n"
.LC4:
	.string	"Allocation memoire qui pose probleme (cudaRes) \n"
.LC5:
	.string	"Copy CPU -> GPU %d \n"
.LC6:
	.string	"------ "
.LC7:
	.string	"dimGrid %ld dimBlock %ld "
.LC8:
	.string	"Resultat ok\n"
.LC9:
	.string	"resultat NON ok (%d)\n"
.LC10:
	.string	"Vecteur %ld => Temps calcul GPU %ld \n"
.LC11:
	.string	"Vecteur %ld => Temps total  CPU %ld \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	cmpl	$1, %edi
	jg	.L13
	movl	$2, %edi
	leaq	.LC0(%rip), %rsi
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	exit@PLT
.L13:
	movl	%edi, %r12d
	movq	8(%rsi), %rdi
	movq	%rsi, %rbp
	movl	$1, %r13d
	call	atol@PLT
	movq	%rax, tailleVecteur(%rip)
	movq	%rax, %r15
	cmpl	$3, %r12d
	jne	.L14
	movq	16(%rbp), %rdi
	call	atoi@PLT
	movslq	%eax, %r13
.L14:
	salq	$2, %r15
	movq	%r15, %rdi
	call	malloc@PLT
	movq	%r15, %rdi
	movq	%rax, %rbx
	call	malloc@PLT
	movq	%rax, %rbp
	testq	%rbx, %rbx
	jne	.L15
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L15:
	testq	%rbp, %rbp
	jne	.L16
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L16:
	xorl	%r12d, %r12d
	movl	$100, %r14d
.L17:
	cmpq	%r12, tailleVecteur(%rip)
	jle	.L34
	call	rand@PLT
	cltd
	idivl	%r14d
	xorl	%eax, %eax
	movl	%eax, 0(%rbp,%r12,4)
	movl	%edx, (%rbx,%r12,4)
	incq	%r12
	jmp	.L17
.L34:
	leaq	32(%rsp), %rdi
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	cmpl	$2, %eax
	jne	.L19
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L19:
	leaq	40(%rsp), %rdi
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	cmpl	$2, %eax
	jne	.L20
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L20:
	movq	tailleVecteur(%rip), %rax
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	cqto
	idivq	%r13
	cmpq	$1, %rdx
	movq	%r15, %rdx
	sbbq	$-1, %rax
	movq	%rax, %r12
	call	cudaMemcpy@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movl	%eax, %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	52(%rsp), %rax
	movq	%rax, 8(%rsp)
	leaq	72(%rsp), %rax
	movq	8(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	gettimeofday@PLT
	movl	%r13d, 88(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r12d, 60(%rsp)
	movq	%rax, 92(%rsp)
	movl	96(%rsp), %ecx
	movq	%rax, 64(%rsp)
	movq	88(%rsp), %rdx
	movq	60(%rsp), %rdi
	movl	68(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$10, %edx
	movq	tailleVecteur(%rip), %rcx
	call	_Z44__device_stub__Z20add_vec_scalaire_gpuPiS_ilPiS_il
.L22:
	leaq	88(%rsp), %rax
	movq	8(%rsp), %rsi
	orl	$-1, %r14d
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	gettimeofday@PLT
	movq	40(%rsp), %rsi
	movq	%r15, %rdx
	movq	%rbp, %rdi
	movl	$2, %ecx
	movb	$1, %r15b
	call	cudaMemcpy@PLT
	movq	tailleVecteur(%rip), %rcx
	xorl	%eax, %eax
.L23:
	cmpq	%rax, %rcx
	jle	.L35
	movl	(%rbx,%rax,4), %edx
	addl	$10, %edx
	cmpl	%edx, 0(%rbp,%rax,4)
	je	.L24
	xorl	%r15d, %r15d
	cmpl	$-1, %r14d
	cmove	%eax, %r14d
.L24:
	incq	%rax
	jmp	.L23
.L35:
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
	movq	%r13, %rcx
	movq	%r12, %rdx
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	testb	%r15b, %r15b
	je	.L26
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L27
.L26:
	movl	%r14d, %edx
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L27:
	movq	tailleVecteur(%rip), %rdx
	movq	88(%rsp), %rcx
	leaq	.LC10(%rip), %rsi
	xorl	%eax, %eax
	subq	72(%rsp), %rcx
	movl	$2, %edi
	imulq	$1000000, %rcx, %rcx
	addq	96(%rsp), %rcx
	subq	80(%rsp), %rcx
	call	__printf_chk@PLT
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	gettimeofday@PLT
	movl	$10, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movq	tailleVecteur(%rip), %rcx
	call	_Z20add_vec_scalaire_cpuPiS_il
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	gettimeofday@PLT
	movq	88(%rsp), %rcx
	subq	72(%rsp), %rcx
	xorl	%eax, %eax
	movq	tailleVecteur(%rip), %rdx
	imulq	$1000000, %rcx, %rcx
	movl	$2, %edi
	addq	96(%rsp), %rcx
	leaq	.LC11(%rip), %rsi
	subq	80(%rsp), %rcx
	call	__printf_chk@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z20add_vec_scalaire_gpuPiS_il"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z20add_vec_scalaire_gpuPiS_il(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	tailleVecteur
	.bss
	.align 8
	.type	tailleVecteur, @object
	.size	tailleVecteur, 8
tailleVecteur:
	.zero	8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <sys/time.h>

#define initTimer struct timeval tv1, tv2; struct timezone tz
#define startTimer gettimeofday(&tv1, &tz)
#define stopTimer gettimeofday(&tv2, &tz)
#define tpsCalcul (tv2.tv_sec-tv1.tv_sec)*1000000L + (tv2.tv_usec-tv1.tv_usec)


#define MAX_DIM_GRID 65535
#define MAX_DIM_BLOCK 1024


long tailleVecteur ;

/* KERNEL CUDA */

__global__ void add_vec_scalaire_gpu(int *vec, int *res, int a, long N) {
	long i = (long)blockIdx.x * (long)blockDim.x + (long)threadIdx.x;
	if (i < N) {
		res[i] = vec[i] + a;
	}
}

void add_vec_scalaire_cpu(int *vec, int *res, int a, long N) {
	int i ;
	for (i=0 ; i < N ; i ++) {
		res[i] = vec[i] + a;
	}
}

int main(int argc, char *argv[]) {
	int alpha = 10;
	if (argc < 2) {
		printf("Erreur, manque un argument\n");
		exit(0);
	}
	tailleVecteur = atol(argv[1]);
	long blocksize = 1;
	if (argc ==3) {
		blocksize = atoi(argv[2]);
	}

	int *vecteur;
	int *resultat;
	int *cudaVec;
	int *cudaRes;

	initTimer;

	long size = sizeof(int)*tailleVecteur;

	vecteur = (int *)malloc(size);
	resultat = (int *)malloc(size);

	if (vecteur == NULL) {
		printf("Allocation memoire qui pose probleme (vecteur) \n");
	}
	if (resultat == NULL) {
		printf("Allocation memoire qui pose probleme (resultat) \n");
	}

	long i ;
	for (i= 0 ; i < tailleVecteur ; i++) {
		vecteur[i] = rand() % 100;
		resultat[i] = 0;
	}

	// cudaSetDevice(1);

	if (hipMalloc((void **)&cudaVec, size) == hipErrorOutOfMemory) {
		printf("Allocation memoire qui pose probleme (cudaVec) \n");
	}
	if (hipMalloc((void **)&cudaRes, size)  == hipErrorOutOfMemory) {
		printf("Allocation memoire qui pose probleme (cudaRes) \n");
	}

	long dimBlock = blocksize;
	long dimGrid = tailleVecteur/blocksize;
	if ((tailleVecteur % blocksize) != 0) {
		dimGrid++;
	}



	int res = hipMemcpy(&cudaVec[0], &vecteur[0], size, hipMemcpyHostToDevice);

	printf("Copy CPU -> GPU %d \n",res);
	startTimer;
	add_vec_scalaire_gpu<<<dimGrid, dimBlock>>>(cudaVec, cudaRes, alpha, tailleVecteur);
	stopTimer;



	hipMemcpy(&resultat[0], &cudaRes[0], size, hipMemcpyDeviceToHost);


	/* Test bon fonctionnement */

	bool ok = true;
	int indice = -1;
	for (i= 0 ; i < tailleVecteur ; i++) {
	// printf("Resultat GPU %d     Resultat CPU %d \n",resultat[i], vecteur[i]+alpha);
		if (resultat[i] != vecteur[i] + alpha) {
			ok = false;
			if (indice ==-1) {
				indice = i;
			}
		}
	}
	printf("------ ");
	printf("dimGrid %ld dimBlock %ld ",dimGrid, dimBlock);
	if (ok) {
		printf("Resultat ok\n");
	} else {
		printf("resultat NON ok (%d)\n", indice);
	}
	printf("Vecteur %ld => Temps calcul GPU %ld \n", tailleVecteur, tpsCalcul);

	startTimer;
	add_vec_scalaire_cpu (vecteur, resultat, alpha, tailleVecteur);
	stopTimer;
	printf("Vecteur %ld => Temps total  CPU %ld \n", tailleVecteur, tpsCalcul);


	hipFree(cudaVec);
	hipFree(cudaRes);


}





	.text
	.file	"Vecteur.hip"
	.globl	_Z35__device_stub__add_vec_scalaire_gpuPiS_il # -- Begin function _Z35__device_stub__add_vec_scalaire_gpuPiS_il
	.type	_Z35__device_stub__add_vec_scalaire_gpuPiS_il,@function
_Z35__device_stub__add_vec_scalaire_gpuPiS_il: # @_Z35__device_stub__add_vec_scalaire_gpuPiS_il
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20add_vec_scalaire_gpuPiS_il, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z35__device_stub__add_vec_scalaire_gpuPiS_il, .Lfunc_end0-_Z35__device_stub__add_vec_scalaire_gpuPiS_il
	.cfi_endproc
                                        # -- End function
	.globl	_Z20add_vec_scalaire_cpuPiS_il  # -- Begin function _Z20add_vec_scalaire_cpuPiS_il
	.type	_Z20add_vec_scalaire_cpuPiS_il,@function
_Z20add_vec_scalaire_cpuPiS_il:         # @_Z20add_vec_scalaire_cpuPiS_il
	.cfi_startproc
# %bb.0:
	testq	%rcx, %rcx
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	xorl	%eax, %eax
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rdi,%rax,4), %r8d
	addl	%edx, %r8d
	movl	%r8d, (%rsi,%rax,4)
	incq	%rax
	cmpq	%rax, %rcx
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z20add_vec_scalaire_cpuPiS_il, .Lfunc_end1-_Z20add_vec_scalaire_cpuPiS_il
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$1, %edi
	jle	.LBB2_28
# %bb.1:
	movq	%rsi, %rbx
	movl	%edi, %ebp
	movq	8(%rsi), %rdi
	callq	atol
	movq	%rax, %r12
	movq	%rax, tailleVecteur(%rip)
	movl	$1, %r15d
	cmpl	$3, %ebp
	jne	.LBB2_3
# %bb.2:
	movq	16(%rbx), %rdi
	callq	atoi
	movslq	%eax, %r15
.LBB2_3:
	shlq	$2, %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r14
	testq	%rbx, %rbx
	jne	.LBB2_5
# %bb.4:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB2_5:
	testq	%r14, %r14
	jne	.LBB2_7
# %bb.6:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
.LBB2_7:
	cmpq	$0, tailleVecteur(%rip)
	jle	.LBB2_10
# %bb.8:                                # %.lr.ph.preheader
	xorl	%r13d, %r13d
.LBB2_9:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r13,4)
	movl	$0, (%r14,%r13,4)
	incq	%r13
	cmpq	tailleVecteur(%rip), %r13
	jl	.LBB2_9
.LBB2_10:                               # %._crit_edge
	leaq	8(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	cmpl	$2, %eax
	jne	.LBB2_12
# %bb.11:
	movl	$.Lstr.2, %edi
	callq	puts@PLT
.LBB2_12:
	movq	%rsp, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	cmpl	$2, %eax
	jne	.LBB2_14
# %bb.13:
	movl	$.Lstr.3, %edi
	callq	puts@PLT
.LBB2_14:
	movq	tailleVecteur(%rip), %rax
	cqto
	idivq	%r15
	movq	%rax, %r13
	cmpq	$1, %rdx
	sbbq	$-1, %r13
	movq	8(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.5, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
	leaq	40(%rsp), %rdi
	leaq	16(%rsp), %rsi
	callq	gettimeofday
	movl	%r13d, %edi
	btsq	$32, %rdi
	movl	%r15d, %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_16
# %bb.15:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movq	tailleVecteur(%rip), %rcx
	movl	$10, %edx
	callq	_Z35__device_stub__add_vec_scalaire_gpuPiS_il
.LBB2_16:
	leaq	24(%rsp), %rdi
	leaq	16(%rsp), %rsi
	callq	gettimeofday
	movq	(%rsp), %rsi
	movq	%r14, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	tailleVecteur(%rip), %rax
	xorl	%r12d, %r12d
	testq	%rax, %rax
	jle	.LBB2_17
# %bb.18:                               # %.lr.ph71.preheader
	movb	$1, %cl
	movl	$-1, %ebp
	xorl	%edx, %edx
.LBB2_19:                               # %.lr.ph71
                                        # =>This Inner Loop Header: Depth=1
	movl	%ebp, %esi
	movl	(%rbx,%rdx,4), %edi
	addl	$10, %edi
	cmpl	$-1, %ebp
	movl	%edx, %ebp
	cmovnel	%esi, %ebp
	cmpl	%edi, (%r14,%rdx,4)
	movzbl	%cl, %ecx
	cmovnel	%r12d, %ecx
	cmovel	%esi, %ebp
	incq	%rdx
	cmpq	%rdx, %rax
	jne	.LBB2_19
# %bb.20:                               # %._crit_edge72.loopexit
	testb	$1, %cl
	sete	%r12b
	jmp	.LBB2_21
.LBB2_17:
	movl	$-1, %ebp
.LBB2_21:                               # %._crit_edge72
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.7, %edi
	movq	%r13, %rsi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	printf
	testb	%r12b, %r12b
	je	.LBB2_22
# %bb.23:
	movl	$.L.str.9, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB2_24
.LBB2_22:
	movl	$.Lstr.4, %edi
	callq	puts@PLT
.LBB2_24:
	movq	tailleVecteur(%rip), %rsi
	movq	24(%rsp), %rax
	movq	32(%rsp), %rdx
	leaq	40(%rsp), %r15
	subq	(%r15), %rax
	imulq	$1000000, %rax, %rax            # imm = 0xF4240
	subq	8(%r15), %rdx
	addq	%rax, %rdx
	movl	$.L.str.10, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	16(%rsp), %rsi
	movq	%r15, %rdi
	callq	gettimeofday
	movq	tailleVecteur(%rip), %rax
	testq	%rax, %rax
	jle	.LBB2_27
# %bb.25:                               # %.lr.ph.i.preheader
	xorl	%ecx, %ecx
.LBB2_26:                               # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%rcx,4), %edx
	addl	$10, %edx
	movl	%edx, (%r14,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB2_26
.LBB2_27:                               # %_Z20add_vec_scalaire_cpuPiS_il.exit
	leaq	24(%rsp), %rbx
	leaq	16(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	movq	tailleVecteur(%rip), %rsi
	movq	(%rbx), %rax
	movq	8(%rbx), %rdx
	subq	40(%rsp), %rax
	imulq	$1000000, %rax, %rax            # imm = 0xF4240
	subq	48(%rsp), %rdx
	addq	%rax, %rdx
	movl	$.L.str.11, %edi
	xorl	%eax, %eax
	callq	printf
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_28:
	.cfi_def_cfa_offset 112
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	xorl	%edi, %edi
	callq	exit
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20add_vec_scalaire_gpuPiS_il, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	tailleVecteur,@object           # @tailleVecteur
	.bss
	.globl	tailleVecteur
	.p2align	3, 0x0
tailleVecteur:
	.quad	0                               # 0x0
	.size	tailleVecteur, 8

	.type	_Z20add_vec_scalaire_gpuPiS_il,@object # @_Z20add_vec_scalaire_gpuPiS_il
	.section	.rodata,"a",@progbits
	.globl	_Z20add_vec_scalaire_gpuPiS_il
	.p2align	3, 0x0
_Z20add_vec_scalaire_gpuPiS_il:
	.quad	_Z35__device_stub__add_vec_scalaire_gpuPiS_il
	.size	_Z20add_vec_scalaire_gpuPiS_il, 8

	.type	.L.str.5,@object                # @.str.5
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.5:
	.asciz	"Copy CPU -> GPU %d \n"
	.size	.L.str.5, 21

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"------ "
	.size	.L.str.6, 8

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"dimGrid %ld dimBlock %ld "
	.size	.L.str.7, 26

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"resultat NON ok (%d)\n"
	.size	.L.str.9, 22

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Vecteur %ld => Temps calcul GPU %ld \n"
	.size	.L.str.10, 38

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Vecteur %ld => Temps total  CPU %ld \n"
	.size	.L.str.11, 38

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z20add_vec_scalaire_gpuPiS_il"
	.size	.L__unnamed_1, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Allocation memoire qui pose probleme (vecteur) "
	.size	.Lstr, 48

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Allocation memoire qui pose probleme (resultat) "
	.size	.Lstr.1, 49

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Allocation memoire qui pose probleme (cudaVec) "
	.size	.Lstr.2, 48

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Allocation memoire qui pose probleme (cudaRes) "
	.size	.Lstr.3, 48

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Resultat ok"
	.size	.Lstr.4, 12

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"Erreur, manque un argument"
	.size	.Lstr.5, 27

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z35__device_stub__add_vec_scalaire_gpuPiS_il
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z20add_vec_scalaire_gpuPiS_il
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z20add_vec_scalaire_gpuPiS_il ; -- Begin function _Z20add_vec_scalaire_gpuPiS_il
	.globl	_Z20add_vec_scalaire_gpuPiS_il
	.p2align	8
	.type	_Z20add_vec_scalaire_gpuPiS_il,@function
_Z20add_vec_scalaire_gpuPiS_il:         ; @_Z20add_vec_scalaire_gpuPiS_il
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x18
	v_mov_b32_e32 v1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s4, s15, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[2:3]
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_load_b32 s0, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, s0, v2
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20add_vec_scalaire_gpuPiS_il
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z20add_vec_scalaire_gpuPiS_il, .Lfunc_end0-_Z20add_vec_scalaire_gpuPiS_il
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 156
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20add_vec_scalaire_gpuPiS_il
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20add_vec_scalaire_gpuPiS_il.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
