#include <stdio.h>
__global__ void matrix_add(float *c, float *a, float *b) {
	int x = threadIdx.x;
	c[x] = a[x] + b[x];
}

void matrix_add_cpu(float *c, float *a, float *b, int size) {
	for (int i=0; i<size; i++){
		c[i] = a[i] + b[i];
	}

}

void print_matrix(float *m, int size){
    for (int i=0; i<size; i++){
        printf("m[%d]=%f\n", i, m[i]);
	}
}

bool compare (float *ref, float *gpu_rlt, int size){
    for (int i = 0; i<size; i++) {
        if (ref[i] != gpu_rlt[i]) {
            return false;
        }
    }
    return true;
}

int main(int argc, char** argv){
	const int ARRAY_SIZE = 96;
	const int ARRAY_BYTES = ARRAY_SIZE * sizeof(float);

	//generate matrix A and B
	float A[ARRAY_SIZE];
	float B[ARRAY_SIZE];
	for (int i=0; i<ARRAY_SIZE; i++){
		A[i] = float(i);
		B[i] = float(i);
	}
	//for results
	float C[ARRAY_SIZE];
	float ref_results[ARRAY_SIZE];

	// alloc memory on gpu
	float *d_c, *d_a, *d_b;
	cudaMalloc((void**) &d_c, ARRAY_BYTES);
	cudaMalloc((void**) &d_a, ARRAY_BYTES);
	cudaMalloc((void**) &d_b, ARRAY_BYTES);

	// copy A and B to gpu
	cudaMemcpy(d_a, A, ARRAY_BYTES, cudaMemcpyHostToDevice);
	cudaMemcpy(d_b, B, ARRAY_BYTES, cudaMemcpyHostToDevice);

	// invoke kernel
	matrix_add<<<1, ARRAY_SIZE>>>(d_c, d_a, d_b);

	cudaMemcpy(C, d_c, ARRAY_BYTES, cudaMemcpyDeviceToHost);
	print_matrix(C, ARRAY_SIZE);

    matrix_add_cpu(ref_results, A, B, ARRAY_SIZE);
    if (compare(ref_results, C, ARRAY_SIZE)) {
        printf("Correct\n");
    } else {
        printf ("Wrong\n");
    }
}

	.file	"tmpxft_0035ae71_00000000-6_matrixadd.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z14matrix_add_cpuPfS_S_i
	.type	_Z14matrix_add_cpuPfS_S_i, @function
_Z14matrix_add_cpuPfS_S_i:
.LFB2027:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L3:
	cmpl	%eax, %ecx
	jle	.L6
	movss	(%rsi,%rax,4), %xmm0
	addss	(%rdx,%rax,4), %xmm0
	movss	%xmm0, (%rdi,%rax,4)
	incq	%rax
	jmp	.L3
.L6:
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z14matrix_add_cpuPfS_S_i, .-_Z14matrix_add_cpuPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"m[%d]=%f\n"
	.text
	.globl	_Z12print_matrixPfi
	.type	_Z12print_matrixPfi, @function
_Z12print_matrixPfi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC0(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L8:
	movl	%ebx, %edx
	cmpl	%ebx, %ebp
	jle	.L11
	movq	%r13, %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%r12,%rbx,4), %xmm0
	call	__printf_chk@PLT
	incq	%rbx
	jmp	.L8
.L11:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z12print_matrixPfi, .-_Z12print_matrixPfi
	.globl	_Z7comparePfS_i
	.type	_Z7comparePfS_i, @function
_Z7comparePfS_i:
.LFB2029:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L13:
	cmpl	%eax, %edx
	jle	.L18
	movss	(%rdi,%rax,4), %xmm0
	incq	%rax
	ucomiss	-4(%rsi,%rax,4), %xmm0
	jp	.L17
	je	.L13
	jmp	.L17
.L18:
	movb	$1, %al
	ret
.L17:
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z7comparePfS_i, .-_Z7comparePfS_i
	.globl	_Z34__device_stub__Z10matrix_addPfS_S_PfS_S_
	.type	_Z34__device_stub__Z10matrix_addPfS_S_PfS_S_, @function
_Z34__device_stub__Z10matrix_addPfS_S_PfS_S_:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10matrix_addPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L19:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z34__device_stub__Z10matrix_addPfS_S_PfS_S_, .-_Z34__device_stub__Z10matrix_addPfS_S_PfS_S_
	.globl	_Z10matrix_addPfS_S_
	.type	_Z10matrix_addPfS_S_, @function
_Z10matrix_addPfS_S_:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z10matrix_addPfS_S_PfS_S_
	.cfi_endproc
.LFE2056:
	.size	_Z10matrix_addPfS_S_, .-_Z10matrix_addPfS_S_
	.section	.rodata.str1.1
.LC1:
	.string	"Correct\n"
.LC2:
	.string	"Wrong\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$1600, %rsp
	.cfi_def_cfa_offset 1632
	movq	%fs:40, %rax
	movq	%rax, 1592(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rbp
	leaq	440(%rsp), %r12
.L25:
	cvtsi2ssl	%eax, %xmm0
	movss	%xmm0, 0(%rbp,%rax,4)
	movss	%xmm0, (%r12,%rax,4)
	incq	%rax
	cmpq	$96, %rax
	jne	.L25
	leaq	8(%rsp), %rdi
	movl	$384, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$384, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$384, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$384, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$384, %edx
	call	cudaMemcpy@PLT
	movl	$134217731, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$5, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z34__device_stub__Z10matrix_addPfS_S_PfS_S_
.L26:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$384, %edx
	leaq	824(%rsp), %rbx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	$96, %esi
	movq	%rbx, %rdi
	call	_Z12print_matrixPfi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movl	$96, %ecx
	leaq	1208(%rsp), %rdi
	call	_Z14matrix_add_cpuPfS_S_i
	movq	%rbx, %rsi
	movl	$96, %edx
	call	_Z7comparePfS_i
	leaq	.LC1(%rip), %rsi
	testb	%al, %al
	jne	.L32
	leaq	.LC2(%rip), %rsi
.L32:
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	1592(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$1600, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z10matrix_addPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10matrix_addPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
__global__ void matrix_add(float *c, float *a, float *b) {
	int x = threadIdx.x;
	c[x] = a[x] + b[x];
}

void matrix_add_cpu(float *c, float *a, float *b, int size) {
	for (int i=0; i<size; i++){
		c[i] = a[i] + b[i];
	}

}

void print_matrix(float *m, int size){
    for (int i=0; i<size; i++){
        printf("m[%d]=%f\n", i, m[i]);
	}
}

bool compare (float *ref, float *gpu_rlt, int size){
    for (int i = 0; i<size; i++) {
        if (ref[i] != gpu_rlt[i]) {
            return false;
        }
    }
    return true;
}

int main(int argc, char** argv){
	const int ARRAY_SIZE = 96;
	const int ARRAY_BYTES = ARRAY_SIZE * sizeof(float);

	//generate matrix A and B
	float A[ARRAY_SIZE];
	float B[ARRAY_SIZE];
	for (int i=0; i<ARRAY_SIZE; i++){
		A[i] = float(i);
		B[i] = float(i);
	}
	//for results
	float C[ARRAY_SIZE];
	float ref_results[ARRAY_SIZE];

	// alloc memory on gpu
	float *d_c, *d_a, *d_b;
	hipMalloc((void**) &d_c, ARRAY_BYTES);
	hipMalloc((void**) &d_a, ARRAY_BYTES);
	hipMalloc((void**) &d_b, ARRAY_BYTES);

	// copy A and B to gpu
	hipMemcpy(d_a, A, ARRAY_BYTES, hipMemcpyHostToDevice);
	hipMemcpy(d_b, B, ARRAY_BYTES, hipMemcpyHostToDevice);

	// invoke kernel
	matrix_add<<<1, ARRAY_SIZE>>>(d_c, d_a, d_b);

	hipMemcpy(C, d_c, ARRAY_BYTES, hipMemcpyDeviceToHost);
	print_matrix(C, ARRAY_SIZE);

    matrix_add_cpu(ref_results, A, B, ARRAY_SIZE);
    if (compare(ref_results, C, ARRAY_SIZE)) {
        printf("Correct\n");
    } else {
        printf ("Wrong\n");
    }
}

	.text
	.file	"matrixadd.hip"
	.globl	_Z25__device_stub__matrix_addPfS_S_ # -- Begin function _Z25__device_stub__matrix_addPfS_S_
	.type	_Z25__device_stub__matrix_addPfS_S_,@function
_Z25__device_stub__matrix_addPfS_S_:    # @_Z25__device_stub__matrix_addPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10matrix_addPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__matrix_addPfS_S_, .Lfunc_end0-_Z25__device_stub__matrix_addPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z14matrix_add_cpuPfS_S_i       # -- Begin function _Z14matrix_add_cpuPfS_S_i
	.type	_Z14matrix_add_cpuPfS_S_i,@function
_Z14matrix_add_cpuPfS_S_i:              # @_Z14matrix_add_cpuPfS_S_i
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ecx, %eax
	xorl	%ecx, %ecx
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rsi,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%rdx,%rcx,4), %xmm0
	movss	%xmm0, (%rdi,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z14matrix_add_cpuPfS_S_i, .Lfunc_end1-_Z14matrix_add_cpuPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z12print_matrixPfi             # -- Begin function _Z12print_matrixPfi
	.type	_Z12print_matrixPfi,@function
_Z12print_matrixPfi:                    # @_Z12print_matrixPfi
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB2_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r15d
	xorl	%r14d, %r14d
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r14,4), %xmm0
	movl	$.L.str, %edi
	movl	%r14d, %esi
	movb	$1, %al
	callq	printf
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB2_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB2_4:                                # %._crit_edge
	retq
.Lfunc_end2:
	.size	_Z12print_matrixPfi, .Lfunc_end2-_Z12print_matrixPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z7comparePfS_i                 # -- Begin function _Z7comparePfS_i
	.type	_Z7comparePfS_i,@function
_Z7comparePfS_i:                        # @_Z7comparePfS_i
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB3_3
# %bb.1:                                # %.lr.ph.preheader
	movss	(%rdi), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%rsi), %xmm0
	jne	.LBB3_2
	jnp	.LBB3_5
.LBB3_2:
	xorl	%eax, %eax
                                        # kill: def $al killed $al killed $eax
	retq
.LBB3_3:
	movb	$1, %al
                                        # kill: def $al killed $al killed $eax
	retq
.LBB3_5:                                # %.lr.ph14.preheader
	movl	%edx, %eax
	movl	$1, %edx
.LBB3_6:                                # %.lr.ph14
                                        # =>This Inner Loop Header: Depth=1
	movq	%rdx, %rcx
	cmpq	%rdx, %rax
	je	.LBB3_8
# %bb.7:                                # %.lr.ph
                                        #   in Loop: Header=BB3_6 Depth=1
	movss	(%rdi,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	leaq	1(%rcx), %rdx
	ucomiss	(%rsi,%rcx,4), %xmm0
	jne	.LBB3_8
	jnp	.LBB3_6
.LBB3_8:                                # %._crit_edge.loopexit
	cmpq	%rax, %rcx
	setae	%al
                                        # kill: def $al killed $al killed $eax
	retq
.Lfunc_end3:
	.size	_Z7comparePfS_i, .Lfunc_end3-_Z7comparePfS_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$1576, %rsp                     # imm = 0x628
	.cfi_def_cfa_offset 1600
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	xorl	%eax, %eax
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, 1184(%rsp,%rax,4)
	movss	%xmm0, 800(%rsp,%rax,4)
	incq	%rax
	cmpq	$96, %rax
	jne	.LBB4_1
# %bb.2:
	leaq	8(%rsp), %rdi
	movl	$384, %esi                      # imm = 0x180
	callq	hipMalloc
	leaq	24(%rsp), %rbx
	movl	$384, %esi                      # imm = 0x180
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r14
	movl	$384, %esi                      # imm = 0x180
	movq	%r14, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	leaq	1184(%rsp), %rsi
	movl	$384, %edx                      # imm = 0x180
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	leaq	800(%rsp), %rsi
	movl	$384, %edx                      # imm = 0x180
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	95(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_4
# %bb.3:
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	callq	_Z25__device_stub__matrix_addPfS_S_
.LBB4_4:
	movq	8(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movl	$384, %edx                      # imm = 0x180
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%ebx, %ebx
.LBB4_5:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	32(%rsp,%rbx,4), %xmm0
	movl	$.L.str, %edi
	movl	%ebx, %esi
	movb	$1, %al
	callq	printf
	incq	%rbx
	cmpq	$96, %rbx
	jne	.LBB4_5
# %bb.6:                                # %.lr.ph.i10.preheader
	xorl	%eax, %eax
.LBB4_7:                                # %.lr.ph.i10
                                        # =>This Inner Loop Header: Depth=1
	movss	1184(%rsp,%rax,4), %xmm0        # xmm0 = mem[0],zero,zero,zero
	addss	800(%rsp,%rax,4), %xmm0
	movss	%xmm0, 416(%rsp,%rax,4)
	incq	%rax
	cmpq	$96, %rax
	jne	.LBB4_7
# %bb.8:                                # %.lr.ph.i14.preheader
	movss	416(%rsp), %xmm0                # xmm0 = mem[0],zero,zero,zero
	ucomiss	32(%rsp), %xmm0
	jne	.LBB4_13
	jnp	.LBB4_9
.LBB4_13:                               # %.critedge
	movl	$.Lstr, %edi
.LBB4_14:                               # %_Z7comparePfS_i.exit.thread
	callq	puts@PLT
	xorl	%eax, %eax
	addq	$1576, %rsp                     # imm = 0x628
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB4_9:                                # %.lr.ph.preheader
	.cfi_def_cfa_offset 1600
	movq	$-1, %rax
	movl	$.Lstr.1, %edi
.LBB4_10:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	cmpq	$94, %rax
	je	.LBB4_14
# %bb.11:                               # %.lr.ph.i14
                                        #   in Loop: Header=BB4_10 Depth=1
	movss	424(%rsp,%rax,4), %xmm0         # xmm0 = mem[0],zero,zero,zero
	leaq	1(%rax), %rcx
	ucomiss	40(%rsp,%rax,4), %xmm0
	movq	%rcx, %rax
	jne	.LBB4_12
	jnp	.LBB4_10
.LBB4_12:                               # %_Z7comparePfS_i.exit
	cmpq	$94, %rcx
	jbe	.LBB4_13
	jmp	.LBB4_14
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10matrix_addPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10matrix_addPfS_S_,@object    # @_Z10matrix_addPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z10matrix_addPfS_S_
	.p2align	3, 0x0
_Z10matrix_addPfS_S_:
	.quad	_Z25__device_stub__matrix_addPfS_S_
	.size	_Z10matrix_addPfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"m[%d]=%f\n"
	.size	.L.str, 10

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10matrix_addPfS_S_"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Wrong"
	.size	.Lstr, 6

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Correct"
	.size	.Lstr.1, 8

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__matrix_addPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10matrix_addPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10matrix_addPfS_S_    ; -- Begin function _Z10matrix_addPfS_S_
	.globl	_Z10matrix_addPfS_S_
	.p2align	8
	.type	_Z10matrix_addPfS_S_,@function
_Z10matrix_addPfS_S_:                   ; @_Z10matrix_addPfS_S_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v0, s[6:7]
	global_load_b32 v2, v0, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v1, v2
	global_store_b32 v0, v1, s[4:5]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10matrix_addPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10matrix_addPfS_S_, .Lfunc_end0-_Z10matrix_addPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 76
; NumSgprs: 8
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10matrix_addPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z10matrix_addPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
