#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <assert.h>
#include <cuda.h>
#include <cuda_runtime.h>

int calculate_no_threads(int array_size){
 if(array_size<256){
   return array_size;	 
 } else {
   return 1024;
 }
}

void print_results(double *ARRAY, int array_size){
  printf("[\n");
  for(int i = 0; i < array_size; i++){
    printf("{");	  
    for(int j = 0; j < array_size; j++){
      printf("%1.1lf,",ARRAY[(i * array_size) +j]); 
    }	    
    printf("}\n");	  
  }
  printf("]");
  printf("\n");
}

__global__ void vector_dot_product(double *CUDA_A, double *CUDA_B, double *CUDA_C,double *CUDA_T,int array_size,int no_threads) {
  int tid = threadIdx.x;
  int bid = blockIdx.x;
  
  int row_count = array_size;
  int col_count = array_size;
  int NumberThreads = no_threads;
  int batch = array_size/NumberThreads;
  int Remaninder = array_size%NumberThreads;
  
  int StartRow;
  int EndRow; 
  
  StartRow = batch * tid; //For testing replace tid with 0..n batch

  if (StartRow == 0){
    EndRow = StartRow + batch + Remaninder;
  } else {
    StartRow = StartRow + Remaninder;
    EndRow = StartRow + batch;
  }

  int StarTingPoint =  array_size*StartRow;

  int increment = 0;
  float product = 0;

  for (int row = StartRow; row < EndRow; row++){
    for(int column = 0; column < array_size; column++){
      for (int cell = 0; cell < array_size; cell++){	  
	product = product + CUDA_A[row * col_count + cell] * CUDA_B[ cell * row_count + column];
      }	    

      CUDA_T[(StarTingPoint)+increment++] = product;
      product = 0;
    }
  }
   __syncthreads();
}

int main(){
    //int array_size = 7900;
    int array_size = 3000;
    double *C, *A, *B, *T;
    double *CUDA_A, *CUDA_B,  *CUDA_C, *CUDA_T; 
    
    A = (double *)malloc(array_size * array_size * sizeof(double));
    B = (double *)malloc(array_size * array_size * sizeof(double));
    T = (double *)malloc((array_size*array_size) * sizeof(double));
    C = (double *)malloc(array_size * array_size *  sizeof(double) );
  
    double a = 0.5;

    for(int i = 0; i<(array_size * array_size); i++){
      A[i] = ((double)rand()/(double)(RAND_MAX)) * a;
      B[i] = ((double)rand()/(double)(RAND_MAX)) * a;
    } 

    // Allocate device memory
    cudaMalloc((void**)&CUDA_A, sizeof(double) * array_size * array_size);
    cudaMalloc((void**)&CUDA_B, sizeof(double) * array_size * array_size);
    cudaMalloc((void**)&CUDA_C, sizeof(double) * array_size * array_size);
    cudaMalloc((void**)&CUDA_T, sizeof(double) * (array_size*array_size));

    // Transfer data from host to device memory
    cudaMemcpy(CUDA_A, A, sizeof(double) * array_size * array_size, cudaMemcpyHostToDevice);
    cudaMemcpy(CUDA_B, B, sizeof(double) * array_size * array_size, cudaMemcpyHostToDevice);
    cudaMemcpy(CUDA_T, T, sizeof(double) * array_size * array_size, cudaMemcpyHostToDevice);

    printf("calculate_no_threads %d\n",calculate_no_threads(array_size)); 
    vector_dot_product<<<1,calculate_no_threads(array_size)>>>(CUDA_A, CUDA_B, CUDA_C, CUDA_T,array_size,calculate_no_threads(array_size));

    cudaMemcpy(C, CUDA_C, sizeof(double) * array_size * array_size, cudaMemcpyDeviceToHost);
    cudaMemcpy(T, CUDA_T, sizeof(double) * (array_size*array_size), cudaMemcpyDeviceToHost);

    puts("DOT_PRODUCT");
    print_results(A,array_size);
    print_results(B,array_size);

    puts("MATRIX MULTI");
    print_results(T,array_size);


    // Deallocate device memory
    cudaFree(CUDA_A);
    cudaFree(CUDA_B);
    cudaFree(CUDA_C);
    cudaFree(CUDA_T);

    free(C);
    free(A);
    free(B);
    free(T);
    // Deallocate host memory
}


	.file	"tmpxft_003b1b7c_00000000-6_matrix.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z20calculate_no_threadsi
	.type	_Z20calculate_no_threadsi, @function
_Z20calculate_no_threadsi:
.LFB2027:
	.cfi_startproc
	endbr64
	movl	%edi, %eax
	cmpl	$255, %edi
	jle	.L3
	movl	$1024, %eax
.L3:
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z20calculate_no_threadsi, .-_Z20calculate_no_threadsi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"[\n"
.LC1:
	.string	"{"
.LC2:
	.string	"%1.1lf,"
.LC3:
	.string	"}\n"
.LC4:
	.string	"]"
.LC5:
	.string	"\n"
	.text
	.globl	_Z13print_resultsPdi
	.type	_Z13print_resultsPdi, @function
_Z13print_resultsPdi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%eax, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movslq	%esi, %r13
	leaq	.LC0(%rip), %rsi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r13, %r12
	salq	$3, %r13
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	movl	$2, %edi
	pushq	%rcx
	.cfi_def_cfa_offset 64
	call	__printf_chk@PLT
.L7:
	cmpl	%r12d, %ebp
	jge	.L12
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	leaq	(%rbx,%r13), %r14
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC2(%rip), %r15
.L8:
	movsd	(%rbx), %xmm0
	movq	%r15, %rsi
	movl	$2, %edi
	movb	$1, %al
	addq	$8, %rbx
	call	__printf_chk@PLT
	cmpq	%r14, %rbx
	jne	.L8
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%ebp
	call	__printf_chk@PLT
	jmp	.L7
.L12:
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	popq	%rdx
	.cfi_def_cfa_offset 56
	leaq	.LC5(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z13print_resultsPdi, .-_Z13print_resultsPdi
	.globl	_Z46__device_stub__Z18vector_dot_productPdS_S_S_iiPdS_S_S_ii
	.type	_Z46__device_stub__Z18vector_dot_productPdS_S_S_iiPdS_S_S_ii, @function
_Z46__device_stub__Z18vector_dot_productPdS_S_S_iiPdS_S_S_ii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z18vector_dot_productPdS_S_S_ii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L13:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z46__device_stub__Z18vector_dot_productPdS_S_S_iiPdS_S_S_ii, .-_Z46__device_stub__Z18vector_dot_productPdS_S_S_iiPdS_S_S_ii
	.globl	_Z18vector_dot_productPdS_S_S_ii
	.type	_Z18vector_dot_productPdS_S_S_ii, @function
_Z18vector_dot_productPdS_S_S_ii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z18vector_dot_productPdS_S_S_iiPdS_S_S_ii
	.cfi_endproc
.LFE2055:
	.size	_Z18vector_dot_productPdS_S_S_ii, .-_Z18vector_dot_productPdS_S_S_ii
	.section	.rodata.str1.1
.LC8:
	.string	"calculate_no_threads %d\n"
.LC9:
	.string	"DOT_PRODUCT"
.LC10:
	.string	"MATRIX MULTI"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$72000000, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$72000000, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$72000000, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$72000000, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movq	%rax, %r14
.L19:
	call	rand@PLT
	cvtsi2sdl	%eax, %xmm0
	divsd	.LC6(%rip), %xmm0
	mulsd	.LC7(%rip), %xmm0
	movsd	%xmm0, (%r12,%r13)
	call	rand@PLT
	cvtsi2sdl	%eax, %xmm0
	divsd	.LC6(%rip), %xmm0
	mulsd	.LC7(%rip), %xmm0
	movsd	%xmm0, 0(%rbp,%r13)
	addq	$8, %r13
	cmpq	$72000000, %r13
	jne	.L19
	movq	%rsp, %rdi
	movl	$72000000, %esi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$72000000, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$72000000, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$72000000, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$72000000, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$72000000, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$72000000, %edx
	call	cudaMemcpy@PLT
	movl	$1024, %edx
	leaq	.LC8(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movl	$1024, %r9d
	movl	$3000, %r8d
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z46__device_stub__Z18vector_dot_productPdS_S_S_iiPdS_S_S_ii
.L20:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$72000000, %edx
	movq	%r14, %rdi
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$72000000, %edx
	call	cudaMemcpy@PLT
	leaq	.LC9(%rip), %rdi
	call	puts@PLT
	movl	$3000, %esi
	movq	%r12, %rdi
	call	_Z13print_resultsPdi
	movl	$3000, %esi
	movq	%rbp, %rdi
	call	_Z13print_resultsPdi
	leaq	.LC10(%rip), %rdi
	call	puts@PLT
	movl	$3000, %esi
	movq	%rbx, %rdi
	call	_Z13print_resultsPdi
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z18vector_dot_productPdS_S_S_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18vector_dot_productPdS_S_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC6:
	.long	-4194304
	.long	1105199103
	.align 8
.LC7:
	.long	0
	.long	1071644672
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <assert.h>
#include <hip/hip_runtime.h>


int calculate_no_threads(int array_size){
 if(array_size<256){
   return array_size;	 
 } else {
   return 1024;
 }
}

void print_results(double *ARRAY, int array_size){
  printf("[\n");
  for(int i = 0; i < array_size; i++){
    printf("{");	  
    for(int j = 0; j < array_size; j++){
      printf("%1.1lf,",ARRAY[(i * array_size) +j]); 
    }	    
    printf("}\n");	  
  }
  printf("]");
  printf("\n");
}

__global__ void vector_dot_product(double *CUDA_A, double *CUDA_B, double *CUDA_C,double *CUDA_T,int array_size,int no_threads) {
  int tid = threadIdx.x;
  int bid = blockIdx.x;
  
  int row_count = array_size;
  int col_count = array_size;
  int NumberThreads = no_threads;
  int batch = array_size/NumberThreads;
  int Remaninder = array_size%NumberThreads;
  
  int StartRow;
  int EndRow; 
  
  StartRow = batch * tid; //For testing replace tid with 0..n batch

  if (StartRow == 0){
    EndRow = StartRow + batch + Remaninder;
  } else {
    StartRow = StartRow + Remaninder;
    EndRow = StartRow + batch;
  }

  int StarTingPoint =  array_size*StartRow;

  int increment = 0;
  float product = 0;

  for (int row = StartRow; row < EndRow; row++){
    for(int column = 0; column < array_size; column++){
      for (int cell = 0; cell < array_size; cell++){	  
	product = product + CUDA_A[row * col_count + cell] * CUDA_B[ cell * row_count + column];
      }	    

      CUDA_T[(StarTingPoint)+increment++] = product;
      product = 0;
    }
  }
   __syncthreads();
}

int main(){
    //int array_size = 7900;
    int array_size = 3000;
    double *C, *A, *B, *T;
    double *CUDA_A, *CUDA_B,  *CUDA_C, *CUDA_T; 
    
    A = (double *)malloc(array_size * array_size * sizeof(double));
    B = (double *)malloc(array_size * array_size * sizeof(double));
    T = (double *)malloc((array_size*array_size) * sizeof(double));
    C = (double *)malloc(array_size * array_size *  sizeof(double) );
  
    double a = 0.5;

    for(int i = 0; i<(array_size * array_size); i++){
      A[i] = ((double)rand()/(double)(RAND_MAX)) * a;
      B[i] = ((double)rand()/(double)(RAND_MAX)) * a;
    } 

    // Allocate device memory
    hipMalloc((void**)&CUDA_A, sizeof(double) * array_size * array_size);
    hipMalloc((void**)&CUDA_B, sizeof(double) * array_size * array_size);
    hipMalloc((void**)&CUDA_C, sizeof(double) * array_size * array_size);
    hipMalloc((void**)&CUDA_T, sizeof(double) * (array_size*array_size));

    // Transfer data from host to device memory
    hipMemcpy(CUDA_A, A, sizeof(double) * array_size * array_size, hipMemcpyHostToDevice);
    hipMemcpy(CUDA_B, B, sizeof(double) * array_size * array_size, hipMemcpyHostToDevice);
    hipMemcpy(CUDA_T, T, sizeof(double) * array_size * array_size, hipMemcpyHostToDevice);

    printf("calculate_no_threads %d\n",calculate_no_threads(array_size)); 
    vector_dot_product<<<1,calculate_no_threads(array_size)>>>(CUDA_A, CUDA_B, CUDA_C, CUDA_T,array_size,calculate_no_threads(array_size));

    hipMemcpy(C, CUDA_C, sizeof(double) * array_size * array_size, hipMemcpyDeviceToHost);
    hipMemcpy(T, CUDA_T, sizeof(double) * (array_size*array_size), hipMemcpyDeviceToHost);

    puts("DOT_PRODUCT");
    print_results(A,array_size);
    print_results(B,array_size);

    puts("MATRIX MULTI");
    print_results(T,array_size);


    // Deallocate device memory
    hipFree(CUDA_A);
    hipFree(CUDA_B);
    hipFree(CUDA_C);
    hipFree(CUDA_T);

    free(C);
    free(A);
    free(B);
    free(T);
    // Deallocate host memory
}


	.text
	.file	"matrix.hip"
	.globl	_Z20calculate_no_threadsi       # -- Begin function _Z20calculate_no_threadsi
	.type	_Z20calculate_no_threadsi,@function
_Z20calculate_no_threadsi:              # @_Z20calculate_no_threadsi
	.cfi_startproc
# %bb.0:
	cmpl	$256, %edi                      # imm = 0x100
	movl	$1024, %eax                     # imm = 0x400
	cmovll	%edi, %eax
	retq
.Lfunc_end0:
	.size	_Z20calculate_no_threadsi, .Lfunc_end0-_Z20calculate_no_threadsi
	.cfi_endproc
                                        # -- End function
	.globl	_Z13print_resultsPdi            # -- Begin function _Z13print_resultsPdi
	.type	_Z13print_resultsPdi,@function
_Z13print_resultsPdi:                   # @_Z13print_resultsPdi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	movq	%rdi, (%rsp)                    # 8-byte Spill
	movl	$.Lstr, %edi
	callq	puts
	testl	%ebx, %ebx
	jle	.LBB1_5
# %bb.1:                                # %.lr.ph17
	movl	%ebx, %r15d
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
.LBB1_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
	movl	%r12d, %eax
	movq	(%rsp), %rcx                    # 8-byte Reload
	leaq	(%rcx,%rax,8), %rbp
	movl	$123, %edi
	callq	putchar@PLT
	xorl	%r14d, %r14d
.LBB1_3:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%rbp,%r14,8), %xmm0            # xmm0 = mem[0],zero
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB1_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	$.Lstr.1, %edi
	callq	puts
	incq	%r13
	addl	%ebx, %r12d
	cmpq	%r15, %r13
	jne	.LBB1_2
.LBB1_5:                                # %._crit_edge18
	movl	$93, %edi
	callq	putchar@PLT
	movl	$10, %edi
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end1:
	.size	_Z13print_resultsPdi, .Lfunc_end1-_Z13print_resultsPdi
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__vector_dot_productPdS_S_S_ii # -- Begin function _Z33__device_stub__vector_dot_productPdS_S_S_ii
	.type	_Z33__device_stub__vector_dot_productPdS_S_S_ii,@function
_Z33__device_stub__vector_dot_productPdS_S_S_ii: # @_Z33__device_stub__vector_dot_productPdS_S_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18vector_dot_productPdS_S_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z33__device_stub__vector_dot_productPdS_S_S_ii, .Lfunc_end2-_Z33__device_stub__vector_dot_productPdS_S_S_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x41dfffffffc00000              # double 2147483647
.LCPI3_1:
	.quad	0x3fe0000000000000              # double 0.5
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$72000000, %edi                 # imm = 0x44AA200
	callq	malloc
	movq	%rax, %rbx
	movl	$72000000, %edi                 # imm = 0x44AA200
	callq	malloc
	movq	%rax, %r14
	movl	$72000000, %edi                 # imm = 0x44AA200
	callq	malloc
	movq	%rax, %r15
	movl	$72000000, %edi                 # imm = 0x44AA200
	callq	malloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	xorl	%r12d, %r12d
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	.LCPI3_0(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm1, %xmm0
	movsd	.LCPI3_1(%rip), %xmm1           # xmm1 = mem[0],zero
	mulsd	%xmm1, %xmm0
	movsd	%xmm0, (%rbx,%r12,8)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	.LCPI3_0(%rip), %xmm0
	mulsd	.LCPI3_1(%rip), %xmm0
	movsd	%xmm0, (%r14,%r12,8)
	incq	%r12
	cmpq	$9000000, %r12                  # imm = 0x895440
	jne	.LBB3_1
# %bb.2:
	leaq	24(%rsp), %rbp
	movl	$72000000, %esi                 # imm = 0x44AA200
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r13
	movl	$72000000, %esi                 # imm = 0x44AA200
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$72000000, %esi                 # imm = 0x44AA200
	callq	hipMalloc
	movq	%rsp, %r12
	movl	$72000000, %esi                 # imm = 0x44AA200
	movq	%r12, %rdi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movl	$72000000, %edx                 # imm = 0x44AA200
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$72000000, %edx                 # imm = 0x44AA200
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$72000000, %edx                 # imm = 0x44AA200
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.6, %edi
	movl	$1024, %esi                     # imm = 0x400
	xorl	%eax, %eax
	callq	printf
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	1023(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	(%rsp), %rcx
	movl	$3000, %r8d                     # imm = 0xBB8
	movl	$1024, %r9d                     # imm = 0x400
	callq	_Z33__device_stub__vector_dot_productPdS_S_S_ii
.LBB3_4:
	movq	8(%rsp), %rsi
	movl	$72000000, %edx                 # imm = 0x44AA200
	movq	32(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rsi
	movl	$72000000, %edx                 # imm = 0x44AA200
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.7, %edi
	callq	puts
	movq	%rbx, %rdi
	movl	$3000, %esi                     # imm = 0xBB8
	callq	_Z13print_resultsPdi
	movq	%r14, %rdi
	movl	$3000, %esi                     # imm = 0xBB8
	callq	_Z13print_resultsPdi
	movl	$.L.str.8, %edi
	callq	puts
	movq	%r15, %rdi
	movl	$3000, %esi                     # imm = 0xBB8
	callq	_Z13print_resultsPdi
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%r12, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18vector_dot_productPdS_S_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"%1.1lf,"
	.size	.L.str.2, 8

	.type	_Z18vector_dot_productPdS_S_S_ii,@object # @_Z18vector_dot_productPdS_S_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z18vector_dot_productPdS_S_S_ii
	.p2align	3, 0x0
_Z18vector_dot_productPdS_S_S_ii:
	.quad	_Z33__device_stub__vector_dot_productPdS_S_S_ii
	.size	_Z18vector_dot_productPdS_S_S_ii, 8

	.type	.L.str.6,@object                # @.str.6
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.6:
	.asciz	"calculate_no_threads %d\n"
	.size	.L.str.6, 25

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"DOT_PRODUCT"
	.size	.L.str.7, 12

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"MATRIX MULTI"
	.size	.L.str.8, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18vector_dot_productPdS_S_S_ii"
	.size	.L__unnamed_1, 33

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"["
	.size	.Lstr, 2

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"}"
	.size	.Lstr.1, 2

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__vector_dot_productPdS_S_S_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18vector_dot_productPdS_S_S_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18vector_dot_productPdS_S_S_ii ; -- Begin function _Z18vector_dot_productPdS_S_S_ii
	.globl	_Z18vector_dot_productPdS_S_S_ii
	.p2align	8
	.type	_Z18vector_dot_productPdS_S_S_ii,@function
_Z18vector_dot_productPdS_S_S_ii:       ; @_Z18vector_dot_productPdS_S_S_ii
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s4, s3, 31
	s_ashr_i32 s8, s2, 31
	s_add_i32 s5, s3, s4
	s_add_i32 s9, s2, s8
	s_xor_b32 s5, s5, s4
	s_xor_b32 s9, s9, s8
	v_cvt_f32_u32_e32 v1, s5
	s_sub_i32 s7, 0, s5
	s_xor_b32 s4, s8, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v1
	s_mul_i32 s7, s7, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s7, s6, s7
	s_add_i32 s6, s6, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s6, s9, s6
	s_mul_i32 s7, s6, s5
	s_add_i32 s8, s6, 1
	s_sub_i32 s7, s9, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s9, s7, s5
	s_cmp_ge_u32 s7, s5
	s_cselect_b32 s6, s8, s6
	s_cselect_b32 s7, s9, s7
	s_add_i32 s8, s6, 1
	s_cmp_ge_u32 s7, s5
	s_mov_b32 s9, 0
	s_cselect_b32 s5, s8, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s5, s5, s4
	s_sub_i32 s4, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v0, s4, v0
	s_mul_i32 s3, s4, s3
	s_sub_i32 s3, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v1, s3, v0
	v_cmp_ne_u32_e32 vcc_lo, 0, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, s4, v1
	v_cndmask_b32_e32 v6, 0, v1, vcc_lo
	v_cmpx_lt_i32_e64 v6, v5
	s_cbranch_execz .LBB0_8
; %bb.1:                                ; %.preheader55.lr.ph
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x18
	v_mul_lo_u32 v7, v6, s2
	v_mov_b32_e32 v8, 0
	s_cmp_gt_i32 s2, 0
	s_mov_b32 s11, 0
	s_cselect_b32 s10, -1, 0
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v0, v7
.LBB0_2:                                ; %.preheader55
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_5 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccnz .LBB0_7
; %bb.3:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_mov_b32 s13, 0
	v_lshlrev_b64 v[1:2], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
.LBB0_4:                                ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_5 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v9, 0 :: v_dual_mov_b32 v4, v2
	v_mov_b32_e32 v3, v1
	s_mov_b32 s8, s13
	s_mov_b32 s14, 0
.LBB0_5:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_lshl_b64 s[16:17], s[8:9], 3
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[14:15], v9
	s_add_u32 s16, s6, s16
	s_addc_u32 s17, s7, s17
	global_load_b64 v[10:11], v[3:4], off
	global_load_b64 v[12:13], v8, s[16:17]
	v_add_co_u32 v3, vcc_lo, v3, 8
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_add_i32 s14, s14, 1
	s_add_i32 s8, s8, s2
	s_cmp_eq_u32 s2, s14
	s_waitcnt vmcnt(0)
	v_fma_f64 v[9:10], v[10:11], v[12:13], v[14:15]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v9, v[9:10]
	s_cbranch_scc0 .LBB0_5
; %bb.6:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[3:4], v9
	v_add_nc_u32_e32 v9, s12, v7
	s_add_i32 s13, s13, 1
	s_add_i32 s12, s12, 1
	s_cmp_eq_u32 s13, s2
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	v_add_co_u32 v9, vcc_lo, s0, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v10, vcc_lo
	global_store_b64 v[9:10], v[3:4], off
	s_cbranch_scc0 .LBB0_4
.LBB0_7:                                ; %._crit_edge60
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v6, 1, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, s2, v0
	v_cmp_ge_i32_e32 vcc_lo, v6, v5
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_2
.LBB0_8:                                ; %Flow91
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18vector_dot_productPdS_S_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 40
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18vector_dot_productPdS_S_S_ii, .Lfunc_end0-_Z18vector_dot_productPdS_S_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 564
; NumSgprs: 20
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 40
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18vector_dot_productPdS_S_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z18vector_dot_productPdS_S_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
