﻿
#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#include <stdio.h>
#include <stdlib.h>
#include <algorithm>

#define uint16_t unsigned short


namespace {
	const size_t defaultNUM = 64;
}

uint16_t NextOrEqualPower2(size_t N)
{
	uint16_t size = static_cast<uint16_t>(N);
	uint16_t mask = 0x8000; //(16 byte, 32768, 1000 0000 0000 0000)

	//calculates the nearest 2^n from above
	while (!(mask & size))
		mask >>= 1;
	return  static_cast<size_t> (mask << (mask != size));
}

// Проверка на ошибку выполнения функций из cuda

void check_cuda_error(const char* message)
{
	cudaError_t err = cudaGetLastError();
	if (err != cudaSuccess)
		printf("ERROR: %s: %s\n", message,
			cudaGetErrorString(err));
}

template <typename T>
__global__ void kernel(T* res,size_t num)
{
	extern __shared__ T cache[];
	const T step = 1 / (float)(num);

	size_t cacheIndex = threadIdx.x;
	cache[cacheIndex] = 0;
	size_t tid = threadIdx.x + blockIdx.x * blockDim.x;
	if (tid < num)
	{
		T x0 = step * tid;
		T x1 = step * (tid + 1);
		T y0 = sqrtf(1 - x0 * x0);
		T y1 = sqrtf(1 - x1 * x1);

		cache[cacheIndex] = (y0 + y1) * step / 2.f; // Площадьтрапеции
	}

	__syncthreads();
	// reduction
	size_t i = blockDim.x / 2;

	while (i != 0) {
		if (cacheIndex < i)
		{
			cache[cacheIndex] += cache[cacheIndex + i];
		}
		__syncthreads();
		i /= 2;
	}
	if (cacheIndex == i)
		atomicAdd(res, cache[0]);
	return;
}



int main(int argc, char** argv)
{
	size_t N = 128;
	if (N < 1)
		N = defaultNUM;
	N = NextOrEqualPower2(N);

	float* res_d; // Результаты наустройстве
	float res = 0;
	cudaMalloc((void**)&res_d, sizeof(float)); 
	check_cuda_error("Allocating memory on GPU");

	// Рамеры грида и блока на GPU
	size_t THREADS_PER_BLOCK = std::min(std::max(64, static_cast<int>(N)), 1024);
	size_t BLOCKS_PER_GRID = ( N / THREADS_PER_BLOCK) + 1;
	kernel <<<BLOCKS_PER_GRID, THREADS_PER_BLOCK, THREADS_PER_BLOCK * sizeof(float) >>> (res_d,N);

	cudaThreadSynchronize(); 
	check_cuda_error("Executing kernel");

	cudaMemcpy(&res, res_d, sizeof(float), cudaMemcpyDeviceToHost);
	// Копируем результаты на хост
	check_cuda_error("Copying results from GPU");
	cudaFree(res_d);
	check_cuda_error("Freeing device memory");
	
	res *= 4;
	printf("PI = %.12f\n", res);
	return 0;
}

	.file	"tmpxft_003af893_00000000-6_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2314:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2314:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL31__device_stub__Z6kernelIfEvPT_mPfm, @function
_ZL31__device_stub__Z6kernelIfEvPT_mPfm:
.LFB2336:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z6kernelIfEvPT_m(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2336:
	.size	_ZL31__device_stub__Z6kernelIfEvPT_mPfm, .-_ZL31__device_stub__Z6kernelIfEvPT_mPfm
	.section	.text._Z6kernelIfEvPT_m,"axG",@progbits,_Z6kernelIfEvPT_m,comdat
	.weak	_Z6kernelIfEvPT_m
	.type	_Z6kernelIfEvPT_m, @function
_Z6kernelIfEvPT_m:
.LFB2387:
	.cfi_startproc
	endbr64
	jmp	_ZL31__device_stub__Z6kernelIfEvPT_mPfm
	.cfi_endproc
.LFE2387:
	.size	_Z6kernelIfEvPT_m, .-_Z6kernelIfEvPT_m
	.text
	.globl	_Z17NextOrEqualPower2m
	.type	_Z17NextOrEqualPower2m, @function
_Z17NextOrEqualPower2m:
.LFB2307:
	.cfi_startproc
	endbr64
	movl	%edi, %edx
	movl	$-32768, %eax
.L9:
	testw	%dx, %ax
	jne	.L11
	shrw	%ax
	jmp	.L9
.L11:
	cmpw	%di, %ax
	setne	%cl
	sall	%cl, %eax
	ret
	.cfi_endproc
.LFE2307:
	.size	_Z17NextOrEqualPower2m, .-_Z17NextOrEqualPower2m
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"ERROR: %s: %s\n"
	.text
	.globl	_Z16check_cuda_errorPKc
	.type	_Z16check_cuda_errorPKc, @function
_Z16check_cuda_errorPKc:
.LFB2308:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L12
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	%rbx, %rdx
	movl	$2, %edi
	popq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	movq	%rax, %rcx
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	jmp	__printf_chk@PLT
.L12:
	.cfi_restore_state
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2308:
	.size	_Z16check_cuda_errorPKc, .-_Z16check_cuda_errorPKc
	.section	.rodata.str1.1
.LC2:
	.string	"Allocating memory on GPU"
.LC3:
	.string	"Executing kernel"
.LC4:
	.string	"Copying results from GPU"
.LC5:
	.string	"Freeing device memory"
.LC7:
	.string	"PI = %.12f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2311:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$128, %edi
	movl	$4, %esi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$56, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	_Z17NextOrEqualPower2m
	leaq	8(%rsp), %rdi
	movl	$0x00000000, 4(%rsp)
	movzwl	%ax, %ebp
	call	cudaMalloc@PLT
	leaq	.LC2(%rip), %rdi
	call	_Z16check_cuda_errorPKc
	movl	$1024, %edx
	movzwl	%bp, %eax
	movabsq	$4294967297, %rsi
	cmpl	%edx, %eax
	movq	%rsi, 32(%rsp)
	cmovg	%edx, %eax
	movl	$64, %edx
	movq	%rsi, 20(%rsp)
	movl	24(%rsp), %esi
	cmpl	%edx, %eax
	cmovl	%edx, %eax
	xorl	%edx, %edx
	xorl	%r9d, %r9d
	movslq	%eax, %rcx
	movl	%eax, 28(%rsp)
	movq	%rbp, %rax
	divq	%rcx
	movq	28(%rsp), %rdx
	leaq	0(,%rcx,4), %r8
	incq	%rax
	movl	%eax, 16(%rsp)
	movl	36(%rsp), %eax
	movq	16(%rsp), %rdi
	movq	%rax, %rcx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	8(%rsp), %rdi
	movq	%rbp, %rsi
	call	_ZL31__device_stub__Z6kernelIfEvPT_mPfm
.L16:
	call	cudaThreadSynchronize@PLT
	leaq	.LC3(%rip), %rdi
	call	_Z16check_cuda_errorPKc
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	leaq	4(%rsp), %rdi
	call	cudaMemcpy@PLT
	leaq	.LC4(%rip), %rdi
	call	_Z16check_cuda_errorPKc
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC5(%rip), %rdi
	call	_Z16check_cuda_errorPKc
	movss	.LC6(%rip), %xmm0
	mulss	4(%rsp), %xmm0
	movb	$1, %al
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	movss	%xmm0, 4(%rsp)
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$56, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2311:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z6kernelIfEvPT_m"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2339:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6kernelIfEvPT_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2339:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC6:
	.long	1082130432
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

﻿
#include "hip/hip_runtime.h"


#include <stdio.h>
#include <stdlib.h>
#include <algorithm>

#define uint16_t unsigned short


namespace {
	const size_t defaultNUM = 64;
}

uint16_t NextOrEqualPower2(size_t N)
{
	uint16_t size = static_cast<uint16_t>(N);
	uint16_t mask = 0x8000; //(16 byte, 32768, 1000 0000 0000 0000)

	//calculates the nearest 2^n from above
	while (!(mask & size))
		mask >>= 1;
	return  static_cast<size_t> (mask << (mask != size));
}

// Проверка на ошибку выполнения функций из cuda

void check_cuda_error(const char* message)
{
	hipError_t err = hipGetLastError();
	if (err != hipSuccess)
		printf("ERROR: %s: %s\n", message,
			hipGetErrorString(err));
}

template <typename T>
__global__ void kernel(T* res,size_t num)
{
	extern __shared__ T cache[];
	const T step = 1 / (float)(num);

	size_t cacheIndex = threadIdx.x;
	cache[cacheIndex] = 0;
	size_t tid = threadIdx.x + blockIdx.x * blockDim.x;
	if (tid < num)
	{
		T x0 = step * tid;
		T x1 = step * (tid + 1);
		T y0 = sqrtf(1 - x0 * x0);
		T y1 = sqrtf(1 - x1 * x1);

		cache[cacheIndex] = (y0 + y1) * step / 2.f; // Площадьтрапеции
	}

	__syncthreads();
	// reduction
	size_t i = blockDim.x / 2;

	while (i != 0) {
		if (cacheIndex < i)
		{
			cache[cacheIndex] += cache[cacheIndex + i];
		}
		__syncthreads();
		i /= 2;
	}
	if (cacheIndex == i)
		atomicAdd(res, cache[0]);
	return;
}



int main(int argc, char** argv)
{
	size_t N = 128;
	if (N < 1)
		N = defaultNUM;
	N = NextOrEqualPower2(N);

	float* res_d; // Результаты наустройстве
	float res = 0;
	hipMalloc((void**)&res_d, sizeof(float)); 
	check_cuda_error("Allocating memory on GPU");

	// Рамеры грида и блока на GPU
	size_t THREADS_PER_BLOCK = std::min(std::max(64, static_cast<int>(N)), 1024);
	size_t BLOCKS_PER_GRID = ( N / THREADS_PER_BLOCK) + 1;
	kernel <<<BLOCKS_PER_GRID, THREADS_PER_BLOCK, THREADS_PER_BLOCK * sizeof(float) >>> (res_d,N);

	hipDeviceSynchronize(); 
	check_cuda_error("Executing kernel");

	hipMemcpy(&res, res_d, sizeof(float), hipMemcpyDeviceToHost);
	// Копируем результаты на хост
	check_cuda_error("Copying results from GPU");
	hipFree(res_d);
	check_cuda_error("Freeing device memory");
	
	res *= 4;
	printf("PI = %.12f\n", res);
	return 0;
}

	.text
	.file	"kernel.hip"
	.globl	_Z17NextOrEqualPower2m          # -- Begin function _Z17NextOrEqualPower2m
	.type	_Z17NextOrEqualPower2m,@function
_Z17NextOrEqualPower2m:                 # @_Z17NextOrEqualPower2m
	.cfi_startproc
# %bb.0:
	movzwl	%di, %ecx
	movl	$32768, %edx                    # imm = 0x8000
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	movl	%edx, %eax
	shrl	%edx
	testl	%ecx, %eax
	je	.LBB0_1
# %bb.2:
	cmpl	%ecx, %eax
	setne	%cl
	shll	%cl, %eax
                                        # kill: def $ax killed $ax killed $eax
	retq
.Lfunc_end0:
	.size	_Z17NextOrEqualPower2m, .Lfunc_end0-_Z17NextOrEqualPower2m
	.cfi_endproc
                                        # -- End function
	.globl	_Z16check_cuda_errorPKc         # -- Begin function _Z16check_cuda_errorPKc
	.type	_Z16check_cuda_errorPKc,@function
_Z16check_cuda_errorPKc:                # @_Z16check_cuda_errorPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_1
# %bb.2:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.LBB1_1:
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z16check_cuda_errorPKc, .Lfunc_end1-_Z16check_cuda_errorPKc
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x40800000                      # float 4
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:                                # %_Z17NextOrEqualPower2m.exit
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movl	$0, 12(%rsp)
	movq	%rsp, %rdi
	movl	$4, %esi
	callq	hipMalloc
	movl	$.L.str.1, %edi
	callq	_Z16check_cuda_errorPKc
	movabsq	$4294967298, %rdi               # imm = 0x100000002
	leaq	126(%rdi), %rdx
	movl	$512, %r8d                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	(%rsp), %rdi
	movl	$128, %esi
	callq	_Z21__device_stub__kernelIfEvPT_m
.LBB2_2:
	callq	hipDeviceSynchronize
	movl	$.L.str.2, %edi
	callq	_Z16check_cuda_errorPKc
	movq	(%rsp), %rsi
	leaq	12(%rsp), %rbx
	movl	$4, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.3, %edi
	callq	_Z16check_cuda_errorPKc
	movq	(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.4, %edi
	callq	_Z16check_cuda_errorPKc
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	mulss	.LCPI2_0(%rip), %xmm0
	movss	%xmm0, (%rbx)
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.section	.text._Z21__device_stub__kernelIfEvPT_m,"axG",@progbits,_Z21__device_stub__kernelIfEvPT_m,comdat
	.weak	_Z21__device_stub__kernelIfEvPT_m # -- Begin function _Z21__device_stub__kernelIfEvPT_m
	.type	_Z21__device_stub__kernelIfEvPT_m,@function
_Z21__device_stub__kernelIfEvPT_m:      # @_Z21__device_stub__kernelIfEvPT_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelIfEvPT_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z21__device_stub__kernelIfEvPT_m, .Lfunc_end3-_Z21__device_stub__kernelIfEvPT_m
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelIfEvPT_m, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"ERROR: %s: %s\n"
	.size	.L.str, 15

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Allocating memory on GPU"
	.size	.L.str.1, 25

	.type	_Z6kernelIfEvPT_m,@object       # @_Z6kernelIfEvPT_m
	.section	.rodata._Z6kernelIfEvPT_m,"aG",@progbits,_Z6kernelIfEvPT_m,comdat
	.weak	_Z6kernelIfEvPT_m
	.p2align	3, 0x0
_Z6kernelIfEvPT_m:
	.quad	_Z21__device_stub__kernelIfEvPT_m
	.size	_Z6kernelIfEvPT_m, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"Executing kernel"
	.size	.L.str.2, 17

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Copying results from GPU"
	.size	.L.str.3, 25

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Freeing device memory"
	.size	.L.str.4, 22

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"PI = %.12f\n"
	.size	.L.str.5, 12

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6kernelIfEvPT_m"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__kernelIfEvPT_m
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6kernelIfEvPT_m
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._Z6kernelIfEvPT_m,"axG",@progbits,_Z6kernelIfEvPT_m,comdat
	.protected	_Z6kernelIfEvPT_m       ; -- Begin function _Z6kernelIfEvPT_m
	.globl	_Z6kernelIfEvPT_m
	.p2align	8
	.type	_Z6kernelIfEvPT_m,@function
_Z6kernelIfEvPT_m:                      ; @_Z6kernelIfEvPT_m
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mov_b32_e32 v1, 0
	v_lshl_add_u32 v4, v0, 2, 0
	s_mov_b32 s3, exec_lo
	ds_store_b32 v4, v1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	v_mov_b32_e32 v3, v1
	v_cmpx_gt_u64_e64 s[6:7], v[2:3]
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_clz_i32_u32 s0, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_min_u32 s8, s0, 32
	s_lshl_b64 s[0:1], s[6:7], s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_min_u32 s0, s0, 1
	s_or_b32 s0, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cvt_f32_u32_e32 v3, s0
	s_sub_i32 s0, 32, s8
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_ldexp_f32 v3, v3, s0
	v_add_co_u32 v5, s0, v2, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v6, null, 0, 0, s0
	v_div_scale_f32 v7, null, v3, v3, 1.0
	v_div_scale_f32 v10, vcc_lo, 1.0, v3, 1.0
	v_cvt_f32_u32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v8, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v7, v8, 1.0
	v_fmac_f32_e32 v8, v9, v8
	v_clz_i32_u32_e32 v9, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v11, v10, v8
	v_min_u32_e32 v9, 32, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v12, -v7, v11, v10
	v_lshlrev_b64 v[5:6], v9, v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v11, v12, v8
	v_min_u32_e32 v5, 1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v7, -v7, v11, v10
	v_or_b32_e32 v5, v6, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v6, v7, v8, v11
	v_sub_nc_u32_e32 v7, 32, v9
	v_cvt_f32_u32_e32 v5, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v3, v6, v3, 1.0
	v_ldexp_f32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v2, v3, v2
	v_mul_f32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v2, -v2, v2, 1.0
	v_fma_f32 v5, -v5, v5, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v6, 0x4f800000, v2
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
	v_mul_f32_e32 v7, 0x4f800000, v5
	v_cmp_gt_f32_e64 s0, 0xf800000, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v2, v6, vcc_lo
	v_cndmask_b32_e64 v5, v5, v7, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sqrt_f32_e32 v6, v2
	v_sqrt_f32_e32 v7, v5
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v8, -1, v6
	v_add_nc_u32_e32 v10, 1, v6
	v_add_nc_u32_e32 v9, -1, v7
	v_add_nc_u32_e32 v11, 1, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v12, -v8, v6, v2
	v_fma_f32 v14, -v10, v6, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v13, -v9, v7, v5
	v_fma_f32 v15, -v11, v7, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s1, 0, v12
	v_cndmask_b32_e64 v6, v6, v8, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s1, 0, v13
	v_cndmask_b32_e64 v7, v7, v9, s1
	v_cmp_lt_f32_e64 s1, 0, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v6, v10, s1
	v_cmp_lt_f32_e64 s1, 0, v15
	v_mul_f32_e32 v8, 0x37800000, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v6, v6, v8, vcc_lo
	v_cndmask_b32_e64 v7, v7, v11, s1
	v_cmp_class_f32_e64 vcc_lo, v2, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v9, 0x37800000, v7 :: v_dual_cndmask_b32 v2, v6, v2
	v_cmp_class_f32_e64 vcc_lo, v5, 0x260
	v_cndmask_b32_e64 v7, v7, v9, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, v7, v5, vcc_lo
	v_add_f32_e32 v2, v2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v3, v2
	v_mul_f32_e32 v2, 0.5, v2
	ds_store_b32 v4, v2
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s3
	s_cmp_lt_u32 s2, 2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_7
; %bb.3:                                ; %.lr.ph.preheader
	s_lshr_b32 s0, s2, 1
	s_mov_b32 s1, 0
.LBB0_4:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u64_e64 s[0:1], v[0:1]
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	v_lshl_add_u32 v2, s0, 2, v4
	ds_load_b32 v2, v2
	ds_load_b32 v3, v4
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v4, v2
.LBB0_6:                                ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_gt_u64_e64 s2, s[0:1], 1
	s_lshr_b64 s[0:1], s[0:1], 1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_4
.LBB0_7:                                ; %._crit_edge
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_11
; %bb.8:
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s0, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s1, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s1
	s_cbranch_execz .LBB0_11
; %bb.9:
	s_bcnt1_i32_b32 s0, s0
	s_load_b32 s1, s[4:5], 0x0
	v_cvt_f32_ubyte0_e32 v1, s0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s0, 0
	ds_load_b32 v0, v2
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v3, v0, v1
	v_mov_b32_e32 v1, s1
.LBB0_10:                               ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v1, v3
	global_atomic_cmpswap_b32 v0, v2, v[0:1], s[4:5] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v1
	v_mov_b32_e32 v1, v0
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_10
.LBB0_11:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelIfEvPT_m
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z6kernelIfEvPT_m,"axG",@progbits,_Z6kernelIfEvPT_m,comdat
.Lfunc_end0:
	.size	_Z6kernelIfEvPT_m, .Lfunc_end0-_Z6kernelIfEvPT_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 908
; NumSgprs: 18
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         136
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelIfEvPT_m
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelIfEvPT_m.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
