#define d_vx(z,x)  d_vx[(x)*(nz)+(z)]
#define d_vz(z,x)  d_vz[(x)*(nz)+(z)]
#define d_sxx(z,x) d_sxx[(x)*(nz)+(z)]
#define d_szz(z,x) d_szz[(x)*(nz)+(z)]
#define d_sxz(z,x) d_sxz[(x)*(nz)+(z)]
#define d_mem_dszz_dz(z,x) d_mem_dszz_dz[(x)*(nz)+(z)]
#define d_mem_dsxz_dx(z,x) d_mem_dsxz_dx[(x)*(nz)+(z)]
#define d_mem_dsxz_dz(z,x) d_mem_dsxz_dz[(x)*(nz)+(z)]
#define d_mem_dsxx_dx(z,x) d_mem_dsxx_dx[(x)*(nz)+(z)]
#define d_mem_dvz_dz(z,x) d_mem_dvz_dz[(x)*(nz)+(z)]
#define d_mem_dvz_dx(z,x) d_mem_dvz_dx[(x)*(nz)+(z)]
#define d_mem_dvx_dz(z,x) d_mem_dvx_dz[(x)*(nz)+(z)]
#define d_mem_dvx_dx(z,x) d_mem_dvx_dx[(x)*(nz)+(z)]
#define d_Lambda(z,x)     d_Lambda[(x)*(nz)+(z)]
#define d_Den(z,x)        d_Den[(x)*(nz)+(z)]
#define d_Mu(z,x)         d_Mu[(x)*(nz)+(z)]
#define d_ave_Mu(z,x)     d_ave_Mu[(x)*(nz)+(z)]
#define d_ave_Byc_a(z,x) d_ave_Byc_a[(x)*(nz)+(z)]
#define d_ave_Byc_b(z,x) d_ave_Byc_b[(x)*(nz)+(z)]
#include<stdio.h>

__global__ void el_velocity_adj(
  float *d_vz, float *d_vx, float *d_szz, float *d_sxx, float *d_sxz, \
  float *d_mem_dszz_dz, float *d_mem_dsxz_dx, float *d_mem_dsxz_dz, float *d_mem_dsxx_dx, \
  float *d_mem_dvz_dz, float *d_mem_dvz_dx, float *d_mem_dvx_dz, float *d_mem_dvx_dx, \
  float *d_Lambda, float *d_Mu, float *d_ave_Mu, float *d_Den, float *d_ave_Byc_a, float *d_ave_Byc_b, \
	float *d_K_z_half, float *d_a_z_half, float *d_b_z_half, \
	float *d_K_x_half, float *d_a_x_half, float *d_b_x_half, \
	float *d_K_z, float *d_a_z, float *d_b_z, \
	float *d_K_x, float *d_a_x, float *d_b_x, \
	int nz, int nx, float dt, float dz, float dx, int nPml, int nPad){


	int gidz = blockIdx.x*blockDim.x + threadIdx.x;
  int gidx = blockIdx.y*blockDim.y + threadIdx.y;


  float dpsixx_dx = 0.0;
	float dszz_dx = 0.0;
	float dsxx_dx = 0.0;
	float dpsixz_dz = 0.0;
	float dsxz_dz = 0.0;
	float dpsizz_dz = 0.0;
	float dszz_dz = 0.0;
	float dsxx_dz = 0.0;
	float dpsizx_dx = 0.0;
	float dsxz_dx = 0.0;

  float c1 = 9.0/8.0;
	float c2 = 1.0/24.0;
	
	float lambda = d_Lambda(gidz,gidx);
  float mu = d_Mu(gidz,gidx);



  if(gidz>=2 && gidz<=nz-nPad-3 && gidx>=2 && gidx<=nx-3) {


		// update vx
		dpsixx_dx = (-c1*(d_mem_dvx_dx(gidz,gidx+1)-d_mem_dvx_dx(gidz,gidx)) \
				+ c2*(d_mem_dvx_dx(gidz,gidx+2)-d_mem_dvx_dx(gidz,gidx-1)))/dx;
		dszz_dx = (-c1*(d_szz(gidz,gidx+1)-d_szz(gidz,gidx)) + c2*(d_szz(gidz,gidx+2)-d_szz(gidz,gidx-1)))/dx;
		dsxx_dx = (-c1*(d_sxx(gidz,gidx+1)-d_sxx(gidz,gidx)) + c2*(d_sxx(gidz,gidx+2)-d_sxx(gidz,gidx-1)))/dx;
		dpsixz_dz = (-c1*(d_mem_dvx_dz(gidz,gidx)-d_mem_dvx_dz(gidz-1,gidx)) \
				+ c2*(d_mem_dvx_dz(gidz+1,gidx)-d_mem_dvx_dz(gidz-2,gidx)))/dz;
		dsxz_dz = (-c1*(d_sxz(gidz,gidx)-d_sxz(gidz-1,gidx)) + c2*(d_sxz(gidz+1,gidx)-d_sxz(gidz-2,gidx)))/dz;

		d_vx(gidz, gidx) += (d_a_x[gidx]*dpsixx_dx + lambda*dszz_dx/d_K_x[gidx]*dt \
				+ (lambda+2.0*mu)*dsxx_dx/d_K_x[gidx]*dt + d_a_z_half[gidz]*dpsixz_dz \
				+ d_ave_Mu(gidz,gidx)/d_K_z_half[gidz]*dsxz_dz*dt);

		//update phi_xx_x and phi_xz_z
		if(gidx<nPml || gidx>nx-nPml-1){
			d_mem_dsxx_dx(gidz, gidx) = d_b_x_half[gidx]*d_mem_dsxx_dx(gidz, gidx) + d_ave_Byc_b(gidz, gidx)*d_vx(gidz, gidx)*dt;
		}
		if(gidz<nPml || (gidz>nz-nPml-nPad-1)){
			d_mem_dsxz_dz(gidz, gidx) = d_b_z[gidz]*d_mem_dsxz_dz(gidz, gidx) + d_ave_Byc_b(gidz, gidx)*d_vx(gidz, gidx)*dt;
		}

	  // update vz
		dpsizz_dz = (-c1*(d_mem_dvz_dz(gidz+1,gidx)-d_mem_dvz_dz(gidz,gidx)) \
			+ c2*(d_mem_dvz_dz(gidz+2,gidx)-d_mem_dvz_dz(gidz-1,gidx)))/dz;
		dszz_dz = (-c1*(d_szz(gidz+1,gidx)-d_szz(gidz,gidx)) + c2*(d_szz(gidz+2,gidx)-d_szz(gidz-1,gidx)))/dz;
		dsxx_dz = (-c1*(d_sxx(gidz+1,gidx)-d_sxx(gidz,gidx)) + c2*(d_sxx(gidz+2,gidx)-d_sxx(gidz-1,gidx)))/dz;
		dpsizx_dx = (-c1*(d_mem_dvz_dx(gidz,gidx)-d_mem_dvz_dx(gidz,gidx-1)) \
			+ c2*(d_mem_dvz_dx(gidz,gidx+1)-d_mem_dvz_dx(gidz,gidx-2)))/dx;
		dsxz_dx = (-c1*(d_sxz(gidz,gidx)-d_sxz(gidz,gidx-1)) + c2*(d_sxz(gidz,gidx+1)-d_sxz(gidz,gidx-2)))/dx;

		d_vz(gidz, gidx) += (d_a_z[gidz]*dpsizz_dz + (lambda+2.0*mu)*dszz_dz/d_K_z[gidz]*dt \
			+ lambda*dsxx_dz/d_K_z[gidz]*dt + d_a_x_half[gidx]*dpsizx_dx \
			+ d_ave_Mu(gidz,gidx)/d_K_x_half[gidx]*dsxz_dx*dt);

		// update phi_xz_x and phi_zz_z
		if(gidx<nPml || gidx>nx-nPml-1){
			d_mem_dsxz_dx(gidz, gidx) = d_b_x[gidx]*d_mem_dsxz_dx(gidz, gidx) + d_ave_Byc_a(gidz, gidx)*d_vz(gidz, gidx)*dt;
		}
		if(gidz<nPml || (gidz>nz-nPml-nPad-1)){
			d_mem_dszz_dz(gidz, gidx) = d_b_z_half[gidz]*d_mem_dszz_dz(gidz, gidx) + d_ave_Byc_a(gidz, gidx)*d_vz(gidz, gidx)*dt;
		}

	}

	else {
		return;
	}

}
	.file	"tmpxft_0035b554_00000000-6_el_velocity_adj.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2029:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z102__device_stub__Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffiiPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
	.type	_Z102__device_stub__Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffiiPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii, @function
_Z102__device_stub__Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffiiPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii:
.LFB2051:
	.cfi_startproc
	endbr64
	subq	$664, %rsp
	.cfi_def_cfa_offset 672
	movq	672(%rsp), %rax
	movq	%rdi, 264(%rsp)
	leaq	296(%rsp), %rdi
	movq	%rsi, 256(%rsp)
	leaq	308(%rsp), %rsi
	movq	%rax, 216(%rsp)
	movq	680(%rsp), %rax
	movq	%rdx, 248(%rsp)
	leaq	280(%rsp), %rdx
	movq	%rax, 208(%rsp)
	movq	688(%rsp), %rax
	movq	%rcx, 240(%rsp)
	leaq	288(%rsp), %rcx
	movq	%rax, 200(%rsp)
	movq	696(%rsp), %rax
	movq	%r8, 232(%rsp)
	movq	%rax, 192(%rsp)
	movq	704(%rsp), %rax
	movq	%r9, 224(%rsp)
	movq	%rax, 184(%rsp)
	movq	712(%rsp), %rax
	movss	%xmm0, 20(%rsp)
	movq	%rax, 176(%rsp)
	movq	720(%rsp), %rax
	movss	%xmm1, 16(%rsp)
	movq	%rax, 168(%rsp)
	movq	728(%rsp), %rax
	movss	%xmm2, 12(%rsp)
	movq	%rax, 160(%rsp)
	movq	736(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	744(%rsp), %rax
	movq	%rax, 144(%rsp)
	movq	752(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	760(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	768(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	776(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	784(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	792(%rsp), %rax
	movq	%rax, 96(%rsp)
	movq	800(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	808(%rsp), %rax
	movq	%rax, 80(%rsp)
	movq	816(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	824(%rsp), %rax
	movq	%rax, 64(%rsp)
	movq	832(%rsp), %rax
	movq	%rax, 56(%rsp)
	movq	840(%rsp), %rax
	movq	%rax, 48(%rsp)
	movq	848(%rsp), %rax
	movq	%rax, 40(%rsp)
	movq	856(%rsp), %rax
	movq	%rax, 32(%rsp)
	movq	864(%rsp), %rax
	movq	%rax, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 648(%rsp)
	xorl	%eax, %eax
	leaq	264(%rsp), %rax
	movq	%rax, 344(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 352(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 360(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 368(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 376(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 384(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 392(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 400(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 408(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 416(%rsp)
	leaq	184(%rsp), %rax
	movq	%rax, 424(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 432(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 440(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 448(%rsp)
	leaq	152(%rsp), %rax
	movq	%rax, 456(%rsp)
	leaq	144(%rsp), %rax
	movq	%rax, 464(%rsp)
	leaq	136(%rsp), %rax
	movq	%rax, 472(%rsp)
	leaq	128(%rsp), %rax
	movq	%rax, 480(%rsp)
	leaq	120(%rsp), %rax
	movq	%rax, 488(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 496(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 504(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 512(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 520(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 528(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 536(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 544(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 552(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 560(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 568(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 576(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 584(%rsp)
	leaq	872(%rsp), %rax
	movq	%rax, 592(%rsp)
	leaq	880(%rsp), %rax
	movq	%rax, 600(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 608(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 616(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 624(%rsp)
	leaq	888(%rsp), %rax
	movq	%rax, 632(%rsp)
	leaq	896(%rsp), %rax
	movq	%rax, 640(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 296(%rsp)
	movl	$1, 304(%rsp)
	movq	%rax, 308(%rsp)
	movl	$1, 316(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	288(%rsp)
	.cfi_def_cfa_offset 680
	leaq	_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii(%rip), %rdi
	pushq	288(%rsp)
	.cfi_def_cfa_offset 688
	movq	324(%rsp), %rcx
	movl	332(%rsp), %r8d
	movq	312(%rsp), %rsi
	movl	320(%rsp), %edx
	leaq	360(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 680
	popq	%rdx
	.cfi_def_cfa_offset 672
.L2:
	movq	648(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$664, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2051:
	.size	_Z102__device_stub__Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffiiPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii, .-_Z102__device_stub__Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffiiPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
	.globl	_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
	.type	_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii, @function
_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii:
.LFB2052:
	.cfi_startproc
	endbr64
	jmp	_Z102__device_stub__Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffiiPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
	.cfi_endproc
.LFE2052:
	.size	_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii, .-_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2054:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#define d_vx(z,x)  d_vx[(x)*(nz)+(z)]
#define d_vz(z,x)  d_vz[(x)*(nz)+(z)]
#define d_sxx(z,x) d_sxx[(x)*(nz)+(z)]
#define d_szz(z,x) d_szz[(x)*(nz)+(z)]
#define d_sxz(z,x) d_sxz[(x)*(nz)+(z)]
#define d_mem_dszz_dz(z,x) d_mem_dszz_dz[(x)*(nz)+(z)]
#define d_mem_dsxz_dx(z,x) d_mem_dsxz_dx[(x)*(nz)+(z)]
#define d_mem_dsxz_dz(z,x) d_mem_dsxz_dz[(x)*(nz)+(z)]
#define d_mem_dsxx_dx(z,x) d_mem_dsxx_dx[(x)*(nz)+(z)]
#define d_mem_dvz_dz(z,x) d_mem_dvz_dz[(x)*(nz)+(z)]
#define d_mem_dvz_dx(z,x) d_mem_dvz_dx[(x)*(nz)+(z)]
#define d_mem_dvx_dz(z,x) d_mem_dvx_dz[(x)*(nz)+(z)]
#define d_mem_dvx_dx(z,x) d_mem_dvx_dx[(x)*(nz)+(z)]
#define d_Lambda(z,x)     d_Lambda[(x)*(nz)+(z)]
#define d_Den(z,x)        d_Den[(x)*(nz)+(z)]
#define d_Mu(z,x)         d_Mu[(x)*(nz)+(z)]
#define d_ave_Mu(z,x)     d_ave_Mu[(x)*(nz)+(z)]
#define d_ave_Byc_a(z,x) d_ave_Byc_a[(x)*(nz)+(z)]
#define d_ave_Byc_b(z,x) d_ave_Byc_b[(x)*(nz)+(z)]

#include <hip/hip_runtime.h>
#include<stdio.h>

__global__ void el_velocity_adj(
  float *d_vz, float *d_vx, float *d_szz, float *d_sxx, float *d_sxz, \
  float *d_mem_dszz_dz, float *d_mem_dsxz_dx, float *d_mem_dsxz_dz, float *d_mem_dsxx_dx, \
  float *d_mem_dvz_dz, float *d_mem_dvz_dx, float *d_mem_dvx_dz, float *d_mem_dvx_dx, \
  float *d_Lambda, float *d_Mu, float *d_ave_Mu, float *d_Den, float *d_ave_Byc_a, float *d_ave_Byc_b, \
	float *d_K_z_half, float *d_a_z_half, float *d_b_z_half, \
	float *d_K_x_half, float *d_a_x_half, float *d_b_x_half, \
	float *d_K_z, float *d_a_z, float *d_b_z, \
	float *d_K_x, float *d_a_x, float *d_b_x, \
	int nz, int nx, float dt, float dz, float dx, int nPml, int nPad){


	int gidz = blockIdx.x*blockDim.x + threadIdx.x;
  int gidx = blockIdx.y*blockDim.y + threadIdx.y;


  float dpsixx_dx = 0.0;
	float dszz_dx = 0.0;
	float dsxx_dx = 0.0;
	float dpsixz_dz = 0.0;
	float dsxz_dz = 0.0;
	float dpsizz_dz = 0.0;
	float dszz_dz = 0.0;
	float dsxx_dz = 0.0;
	float dpsizx_dx = 0.0;
	float dsxz_dx = 0.0;

  float c1 = 9.0/8.0;
	float c2 = 1.0/24.0;
	
	float lambda = d_Lambda(gidz,gidx);
  float mu = d_Mu(gidz,gidx);



  if(gidz>=2 && gidz<=nz-nPad-3 && gidx>=2 && gidx<=nx-3) {


		// update vx
		dpsixx_dx = (-c1*(d_mem_dvx_dx(gidz,gidx+1)-d_mem_dvx_dx(gidz,gidx)) \
				+ c2*(d_mem_dvx_dx(gidz,gidx+2)-d_mem_dvx_dx(gidz,gidx-1)))/dx;
		dszz_dx = (-c1*(d_szz(gidz,gidx+1)-d_szz(gidz,gidx)) + c2*(d_szz(gidz,gidx+2)-d_szz(gidz,gidx-1)))/dx;
		dsxx_dx = (-c1*(d_sxx(gidz,gidx+1)-d_sxx(gidz,gidx)) + c2*(d_sxx(gidz,gidx+2)-d_sxx(gidz,gidx-1)))/dx;
		dpsixz_dz = (-c1*(d_mem_dvx_dz(gidz,gidx)-d_mem_dvx_dz(gidz-1,gidx)) \
				+ c2*(d_mem_dvx_dz(gidz+1,gidx)-d_mem_dvx_dz(gidz-2,gidx)))/dz;
		dsxz_dz = (-c1*(d_sxz(gidz,gidx)-d_sxz(gidz-1,gidx)) + c2*(d_sxz(gidz+1,gidx)-d_sxz(gidz-2,gidx)))/dz;

		d_vx(gidz, gidx) += (d_a_x[gidx]*dpsixx_dx + lambda*dszz_dx/d_K_x[gidx]*dt \
				+ (lambda+2.0*mu)*dsxx_dx/d_K_x[gidx]*dt + d_a_z_half[gidz]*dpsixz_dz \
				+ d_ave_Mu(gidz,gidx)/d_K_z_half[gidz]*dsxz_dz*dt);

		//update phi_xx_x and phi_xz_z
		if(gidx<nPml || gidx>nx-nPml-1){
			d_mem_dsxx_dx(gidz, gidx) = d_b_x_half[gidx]*d_mem_dsxx_dx(gidz, gidx) + d_ave_Byc_b(gidz, gidx)*d_vx(gidz, gidx)*dt;
		}
		if(gidz<nPml || (gidz>nz-nPml-nPad-1)){
			d_mem_dsxz_dz(gidz, gidx) = d_b_z[gidz]*d_mem_dsxz_dz(gidz, gidx) + d_ave_Byc_b(gidz, gidx)*d_vx(gidz, gidx)*dt;
		}

	  // update vz
		dpsizz_dz = (-c1*(d_mem_dvz_dz(gidz+1,gidx)-d_mem_dvz_dz(gidz,gidx)) \
			+ c2*(d_mem_dvz_dz(gidz+2,gidx)-d_mem_dvz_dz(gidz-1,gidx)))/dz;
		dszz_dz = (-c1*(d_szz(gidz+1,gidx)-d_szz(gidz,gidx)) + c2*(d_szz(gidz+2,gidx)-d_szz(gidz-1,gidx)))/dz;
		dsxx_dz = (-c1*(d_sxx(gidz+1,gidx)-d_sxx(gidz,gidx)) + c2*(d_sxx(gidz+2,gidx)-d_sxx(gidz-1,gidx)))/dz;
		dpsizx_dx = (-c1*(d_mem_dvz_dx(gidz,gidx)-d_mem_dvz_dx(gidz,gidx-1)) \
			+ c2*(d_mem_dvz_dx(gidz,gidx+1)-d_mem_dvz_dx(gidz,gidx-2)))/dx;
		dsxz_dx = (-c1*(d_sxz(gidz,gidx)-d_sxz(gidz,gidx-1)) + c2*(d_sxz(gidz,gidx+1)-d_sxz(gidz,gidx-2)))/dx;

		d_vz(gidz, gidx) += (d_a_z[gidz]*dpsizz_dz + (lambda+2.0*mu)*dszz_dz/d_K_z[gidz]*dt \
			+ lambda*dsxx_dz/d_K_z[gidz]*dt + d_a_x_half[gidx]*dpsizx_dx \
			+ d_ave_Mu(gidz,gidx)/d_K_x_half[gidx]*dsxz_dx*dt);

		// update phi_xz_x and phi_zz_z
		if(gidx<nPml || gidx>nx-nPml-1){
			d_mem_dsxz_dx(gidz, gidx) = d_b_x[gidx]*d_mem_dsxz_dx(gidz, gidx) + d_ave_Byc_a(gidz, gidx)*d_vz(gidz, gidx)*dt;
		}
		if(gidz<nPml || (gidz>nz-nPml-nPad-1)){
			d_mem_dszz_dz(gidz, gidx) = d_b_z_half[gidz]*d_mem_dszz_dz(gidz, gidx) + d_ave_Byc_a(gidz, gidx)*d_vz(gidz, gidx)*dt;
		}

	}

	else {
		return;
	}

}
	.text
	.file	"el_velocity_adj.hip"
	.globl	_Z30__device_stub__el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii # -- Begin function _Z30__device_stub__el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
	.type	_Z30__device_stub__el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii,@function
_Z30__device_stub__el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii: # @_Z30__device_stub__el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$416, %rsp                      # imm = 0x1A0
	.cfi_def_cfa_offset 464
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %r10
	movq	%rdi, (%r10)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %r11
	movq	%rcx, (%r11)
	leaq	40(%rsp), %r14
	movq	%r8, (%r14)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	12(%rsp), %rax
	movss	%xmm0, (%rax)
	leaq	8(%rsp), %rcx
	movss	%xmm1, (%rcx)
	leaq	4(%rsp), %rdx
	movss	%xmm2, (%rdx)
	leaq	112(%rsp), %rbx
	movq	%r10, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%r11, 24(%rbx)
	movq	%r14, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	464(%rsp), %rsi
	movq	%rsi, 48(%rbx)
	leaq	472(%rsp), %rsi
	movq	%rsi, 56(%rbx)
	leaq	480(%rsp), %rsi
	movq	%rsi, 64(%rbx)
	leaq	488(%rsp), %rsi
	movq	%rsi, 72(%rbx)
	leaq	496(%rsp), %rsi
	movq	%rsi, 80(%rbx)
	leaq	504(%rsp), %rsi
	movq	%rsi, 88(%rbx)
	leaq	512(%rsp), %rsi
	movq	%rsi, 96(%rbx)
	leaq	520(%rsp), %rsi
	movq	%rsi, 104(%rbx)
	leaq	528(%rsp), %rsi
	movq	%rsi, 112(%rbx)
	leaq	536(%rsp), %rsi
	movq	%rsi, 120(%rbx)
	leaq	544(%rsp), %rsi
	movq	%rsi, 128(%rbx)
	leaq	552(%rsp), %rsi
	movq	%rsi, 136(%rbx)
	leaq	560(%rsp), %rsi
	movq	%rsi, 144(%rbx)
	leaq	568(%rsp), %rsi
	movq	%rsi, 152(%rbx)
	leaq	576(%rsp), %rsi
	movq	%rsi, 160(%rbx)
	leaq	584(%rsp), %rsi
	movq	%rsi, 168(%rbx)
	leaq	592(%rsp), %rsi
	movq	%rsi, 176(%rbx)
	leaq	600(%rsp), %rsi
	movq	%rsi, 184(%rbx)
	leaq	608(%rsp), %rsi
	movq	%rsi, 192(%rbx)
	leaq	616(%rsp), %rsi
	movq	%rsi, 200(%rbx)
	leaq	624(%rsp), %rsi
	movq	%rsi, 208(%rbx)
	leaq	632(%rsp), %rsi
	movq	%rsi, 216(%rbx)
	leaq	640(%rsp), %rsi
	movq	%rsi, 224(%rbx)
	leaq	648(%rsp), %rsi
	movq	%rsi, 232(%rbx)
	leaq	656(%rsp), %rsi
	movq	%rsi, 240(%rbx)
	leaq	664(%rsp), %rsi
	movq	%rsi, 248(%rbx)
	leaq	672(%rsp), %rsi
	movq	%rsi, 256(%rbx)
	movq	%rax, 264(%rbx)
	movq	%rcx, 272(%rbx)
	movq	%rdx, 280(%rbx)
	leaq	680(%rsp), %rax
	movq	%rax, 288(%rbx)
	leaq	688(%rsp), %rax
	movq	%rax, 296(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$432, %rsp                      # imm = 0x1B0
	.cfi_adjust_cfa_offset -432
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii, .Lfunc_end0-_Z30__device_stub__el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii,@object # @_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
	.section	.rodata,"a",@progbits
	.globl	_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
	.p2align	3, 0x0
_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii:
	.quad	_Z30__device_stub__el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
	.size	_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii"
	.size	.L__unnamed_1, 89

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii ; -- Begin function _Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
	.globl	_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
	.p2align	8
	.type	_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii,@function
_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii: ; @_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
; %bb.0:
	s_load_b32 s2, s[0:1], 0x124
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s14, s3, v[3:4]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e32 1, v1
	s_cbranch_execz .LBB0_18
; %bb.1:
	s_load_b256 s[24:31], s[0:1], 0xf8
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s2, s2, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[5:6], null, s15, s2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s2, s24, s30
	s_add_i32 s3, s25, -3
	s_add_i32 s2, s2, -3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_i32_e32 vcc_lo, s2, v1
	v_cmp_ge_i32_e64 s2, s3, v5
	v_cmp_lt_i32_e64 s3, 1, v5
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_18
; %bb.2:
	v_mad_u64_u32 v[2:3], null, v5, s24, v[1:2]
	s_clause 0x3
	s_load_b512 s[36:51], s[0:1], 0x40
	s_load_b512 s[8:23], s[0:1], 0x0
	s_load_b256 s[68:75], s[0:1], 0xc8
	s_load_b512 s[52:67], s[0:1], 0x88
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, s24, v2
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_nc_u32_e32 v11, s24, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	v_ashrrev_i32_e32 v7, 31, v6
	v_ashrrev_i32_e32 v12, 31, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[9:10], 2, v[6:7]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s44, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[13:14], null, s24, -3, v[11:12]
	v_add_co_ci_u32_e32 v7, vcc_lo, s45, v4, vcc_lo
	v_add_co_u32 v17, vcc_lo, s12, v3
	v_add_co_ci_u32_e32 v18, vcc_lo, s13, v4, vcc_lo
	v_ashrrev_i32_e32 v14, 31, v13
	v_add_co_u32 v15, vcc_lo, s44, v9
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_ci_u32_e32 v16, vcc_lo, s45, v10, vcc_lo
	v_add_co_u32 v19, vcc_lo, s12, v9
	v_lshlrev_b64 v[13:14], 2, v[13:14]
	v_add_co_ci_u32_e32 v20, vcc_lo, s13, v10, vcc_lo
	s_clause 0x1
	global_load_b32 v27, v[15:16], off
	global_load_b32 v28, v[6:7], off
	v_add_co_u32 v6, vcc_lo, s44, v11
	v_add_co_ci_u32_e32 v7, vcc_lo, s45, v12, vcc_lo
	s_clause 0x1
	global_load_b32 v29, v[19:20], off
	global_load_b32 v30, v[17:18], off
	v_add_co_u32 v19, vcc_lo, s44, v13
	v_add_co_ci_u32_e32 v20, vcc_lo, s45, v14, vcc_lo
	v_add_co_u32 v21, vcc_lo, s12, v11
	v_add_co_ci_u32_e32 v22, vcc_lo, s13, v12, vcc_lo
	v_add_co_u32 v23, vcc_lo, s14, v9
	v_add_co_ci_u32_e32 v24, vcc_lo, s15, v10, vcc_lo
	v_add_co_u32 v15, vcc_lo, s14, v3
	v_add_co_ci_u32_e32 v16, vcc_lo, s15, v4, vcc_lo
	v_add_co_u32 v25, vcc_lo, s12, v13
	v_add_co_ci_u32_e32 v26, vcc_lo, s13, v14, vcc_lo
	v_add_co_u32 v11, vcc_lo, s14, v11
	s_clause 0x1
	global_load_b32 v31, v[23:24], off
	global_load_b32 v32, v[15:16], off
	v_add_co_ci_u32_e32 v12, vcc_lo, s15, v12, vcc_lo
	v_add_co_u32 v23, vcc_lo, s14, v13
	v_add_co_ci_u32_e32 v24, vcc_lo, s15, v14, vcc_lo
	s_clause 0x1
	global_load_b32 v33, v[6:7], off
	global_load_b32 v34, v[19:20], off
	s_clause 0x1
	global_load_b32 v35, v[21:22], off
	global_load_b32 v25, v[25:26], off
	s_clause 0x1
	global_load_b32 v26, v[11:12], off
	global_load_b32 v23, v[23:24], off
	v_add_co_u32 v6, vcc_lo, s46, v3
	v_add_co_ci_u32_e32 v7, vcc_lo, s47, v4, vcc_lo
	v_add_co_u32 v11, vcc_lo, s48, v3
	v_add_co_ci_u32_e32 v12, vcc_lo, s49, v4, vcc_lo
	global_load_b32 v0, v[6:7], off
	global_load_b32 v36, v[11:12], off
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[5:6]
	v_add_co_u32 v11, vcc_lo, s74, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s75, v8, vcc_lo
	global_load_b32 v45, v[11:12], off
	v_add_nc_u32_e32 v11, -1, v2
	s_waitcnt vmcnt(11)
	v_sub_f32_e32 v24, v29, v30
	v_dual_sub_f32 v2, v27, v28 :: v_dual_add_nc_u32 v21, -2, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v12, 31, v11
	v_ashrrev_i32_e32 v22, 31, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v2, 0x3f900000, v2
	v_lshlrev_b64 v[19:20], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[21:22]
	s_waitcnt vmcnt(9)
	v_sub_f32_e32 v27, v31, v32
	v_add_co_u32 v31, s4, s42, v11
	s_waitcnt vmcnt(7)
	v_sub_f32_e32 v21, v33, v34
	v_add_co_ci_u32_e64 v32, s4, s43, v12, s4
	v_mul_f32_e32 v27, 0x3f900000, v27
	s_waitcnt vmcnt(3)
	v_sub_f32_e32 v26, v26, v23
	v_dual_mul_f32 v22, 0x3f900000, v24 :: v_dual_sub_f32 v25, v35, v25
	v_fma_f32 v46, 0x3d2aaaab, v21, -v2
	v_add_co_u32 v23, vcc_lo, s42, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v2, 0x3d2aaaab, v26, -v27
	v_fma_f32 v47, 0x3d2aaaab, v25, -v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_scale_f32 v35, null, s28, s28, v46
	v_add_co_ci_u32_e32 v24, vcc_lo, s43, v4, vcc_lo
	v_div_scale_f32 v37, null, s28, s28, v47
	v_div_scale_f32 v38, null, s28, s28, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v39, v35
	v_rcp_f32_e32 v40, v37
	v_add_co_u32 v21, vcc_lo, s16, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(TRANS32_DEP_3)
	v_rcp_f32_e32 v41, v38
	v_add_co_ci_u32_e32 v22, vcc_lo, s17, v4, vcc_lo
	v_add_co_u32 v25, vcc_lo, s42, v19
	v_add_co_ci_u32_e32 v26, vcc_lo, s43, v20, vcc_lo
	v_fma_f32 v27, -v35, v39, 1.0
	v_div_scale_f32 v42, vcc_lo, v46, s28, v46
	s_delay_alu instid0(TRANS32_DEP_2) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f32 v28, -v37, v40, 1.0
	v_fma_f32 v29, -v38, v41, 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v39, v27, v39
	v_div_scale_f32 v43, s2, v47, s28, v47
	v_fmac_f32_e32 v40, v28, v40
	v_div_scale_f32 v44, s3, v2, s28, v2
	v_fmac_f32_e32 v41, v29, v41
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[29:30], v36
	v_mul_f32_e32 v36, v42, v39
	v_mul_f32_e32 v48, v43, v40
	v_add_co_u32 v33, s4, s16, v19
	v_mul_f32_e32 v49, v44, v41
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v50, -v35, v36, v42
	v_fma_f32 v51, -v37, v48, v43
	v_add_co_ci_u32_e64 v34, s4, s17, v20, s4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v52, -v38, v49, v44
	v_fmac_f32_e32 v36, v50, v39
	s_clause 0x1
	global_load_b64 v[23:24], v[23:24], off
	global_load_b32 v50, v[25:26], off
	v_cvt_f64_f32_e32 v[27:28], v0
	s_load_b128 s[4:7], s[0:1], 0xe8
	v_fmac_f32_e32 v49, v52, v41
	v_fma_f32 v25, -v35, v36, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v35, -v38, v49, v44
	v_fma_f64 v[27:28], v[29:30], 2.0, v[27:28]
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v23, v23, v50
	v_fmac_f32_e32 v48, v51, v40
	v_div_fmas_f32 v51, v25, v39, v36
	s_mov_b32 vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v23, 0x3f900000, v23
	v_fma_f32 v26, -v37, v48, v43
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fmas_f32 v48, v26, v40, v48
	s_mov_b32 vcc_lo, s3
	v_div_fmas_f32 v25, v35, v41, v49
	s_clause 0x1
	global_load_b64 v[35:36], v[21:22], off
	global_load_b32 v49, v[33:34], off
	global_load_b32 v52, v[31:32], off
	v_add_co_u32 v11, vcc_lo, s16, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s17, v12, vcc_lo
	v_div_fixup_f32 v2, v25, s28, v2
	v_cvt_f64_f32_e32 v[31:32], v45
	global_load_b32 v53, v[11:12], off
	v_cvt_f64_f32_e32 v[11:12], v2
	v_mov_b32_e32 v2, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[33:34], v[27:28], v[11:12]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v11, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v12, vcc_lo, s5, v8, vcc_lo
	v_add_co_u32 v25, vcc_lo, s50, v3
	v_add_co_ci_u32_e32 v26, vcc_lo, s51, v4, vcc_lo
	global_load_b32 v6, v[11:12], off
	v_cmp_gt_i32_e64 s5, s29, v5
	v_div_scale_f64 v[37:38], null, v[31:32], v[31:32], v[33:34]
	v_div_scale_f64 v[43:44], s0, v[33:34], v[31:32], v[33:34]
	s_waitcnt vmcnt(3)
	v_sub_f32_e32 v35, v35, v49
	v_lshlrev_b64 v[11:12], 2, v[1:2]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v24, v24, v52 :: v_dual_mul_f32 v35, 0x3f900000, v35
	v_add_co_u32 v29, vcc_lo, s56, v11
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v30, vcc_lo, s57, v12, vcc_lo
	global_load_b32 v2, v[25:26], off
	global_load_b32 v54, v[29:30], off
	v_rcp_f64_e32 v[29:30], v[37:38]
	v_add_co_u32 v39, vcc_lo, s58, v11
	v_add_co_ci_u32_e32 v40, vcc_lo, s59, v12, vcc_lo
	s_waitcnt vmcnt(3)
	v_sub_f32_e32 v36, v36, v53
	v_fma_f32 v49, 0x3d2aaaab, v24, -v23
	v_div_fixup_f32 v23, v48, s28, v47
	global_load_b32 v55, v[39:40], off
	v_fma_f32 v47, 0x3d2aaaab, v36, -v35
	v_div_scale_f32 v35, null, s27, s27, v49
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v36, null, s27, s27, v47
	v_rcp_f32_e32 v50, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v53, v36
	s_waitcnt_depctr 0xfff
	v_fma_f32 v58, -v35, v50, 1.0
	v_fma_f32 v60, -v36, v53, 1.0
	v_dual_fmac_f32 v50, v58, v50 :: v_dual_fmac_f32 v53, v60, v53
	v_fma_f64 v[39:40], -v[37:38], v[29:30], 1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[39:40], v[29:30], v[39:40], v[29:30]
	v_add_co_u32 v29, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v30, vcc_lo, s11, v4, vcc_lo
	v_div_scale_f32 v59, vcc_lo, v49, s27, v49
	v_mul_f32_e32 v48, v0, v23
	global_load_b32 v56, v[29:30], off
	v_fma_f64 v[41:42], -v[37:38], v[39:40], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[39:40], v[39:40], v[41:42], v[39:40]
	v_mul_f64 v[41:42], v[43:44], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], -v[37:38], v[41:42], v[43:44]
	v_mul_f32_e32 v43, v59, v50
	v_div_scale_f32 v52, null, v45, v45, v48
	v_div_scale_f32 v37, s1, v47, s27, v47
	v_div_scale_f32 v44, s2, v48, v45, v48
	v_rcp_f32_e32 v57, v52
	v_fma_f32 v58, -v35, v43, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v43, v58, v50
	s_waitcnt_depctr 0xfff
	v_fma_f32 v38, -v52, v57, 1.0
	v_fma_f32 v35, -v35, v43, v59
	v_fmac_f32_e32 v57, v38, v57
	v_mul_f32_e32 v38, v37, v53
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v43, v35, v50, v43
	s_mov_b32 vcc_lo, s1
	v_mul_f32_e32 v60, v44, v57
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v61, -v36, v38, v37
	v_fma_f32 v58, -v52, v60, v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v38, v61, v53
	v_fmac_f32_e32 v60, v58, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v36, -v36, v38, v37
	v_fma_f32 v35, -v52, v60, v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v44, v36, v53, v38
	s_mov_b32 vcc_lo, s2
	s_mov_b32 s2, s5
	v_div_fmas_f32 v37, v35, v57, v60
	s_mov_b32 vcc_lo, s0
	v_cmp_le_i32_e64 s0, s29, v5
	v_div_fmas_f64 v[35:36], v[23:24], v[39:40], v[41:42]
	v_div_fixup_f32 v24, v51, s28, v46
	v_div_fixup_f32 v23, v37, v45, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v37, s26, v23
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v37, v24, v6
	v_cvt_f64_f32_e32 v[23:24], s26
	s_delay_alu instid0(VALU_DEP_2)
	v_cvt_f64_f32_e32 v[37:38], v37
	v_div_fixup_f64 v[31:32], v[35:36], v[31:32], v[33:34]
	s_waitcnt vmcnt(2)
	v_div_scale_f32 v6, null, v54, v54, v2
	v_div_scale_f32 v36, vcc_lo, v2, v54, v2
	v_div_fixup_f32 v34, v43, s27, v49
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v35, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v33, -v6, v35, 1.0
	v_fmac_f32_e32 v35, v33, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v39, v36, v35
	v_fma_f64 v[31:32], v[31:32], v[23:24], v[37:38]
	v_fma_f32 v37, -v6, v39, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v39, v37, v35
	v_fma_f32 v6, -v6, v39, v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v6, v6, v35, v39
	v_div_fixup_f32 v35, v44, s27, v47
	v_div_fixup_f32 v2, v6, v54, v2
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v2, v35, v2 :: v_dual_mul_f32 v33, v34, v55
	v_mul_f32_e32 v2, s26, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_f32_e32 v[33:34], v33
	v_cvt_f64_f32_e32 v[35:36], v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[31:32], v[33:34]
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[33:34], v56
	v_add_f64 v[31:32], v[31:32], v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[31:32], v[33:34]
	v_cvt_f32_f64_e32 v2, v[31:32]
	global_store_b32 v[29:30], v2, off
	s_and_saveexec_b32 s1, s0
; %bb.3:
	s_not_b32 s2, s29
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, s25
	v_cmp_lt_i32_e32 vcc_lo, s2, v5
	s_and_not1_b32 s2, s5, exec_lo
	s_and_b32 s3, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s3
; %bb.4:                                ; %Flow515
	s_or_b32 exec_lo, exec_lo, s1
	s_and_saveexec_b32 s1, s2
	s_cbranch_execz .LBB0_6
; %bb.5:
	v_add_co_u32 v31, vcc_lo, s54, v3
	v_add_co_ci_u32_e32 v32, vcc_lo, s55, v4, vcc_lo
	global_load_b32 v6, v[31:32], off
	v_add_co_u32 v31, vcc_lo, s66, v7
	v_add_co_ci_u32_e32 v32, vcc_lo, s67, v8, vcc_lo
	v_add_co_u32 v33, vcc_lo, s36, v3
	v_add_co_ci_u32_e32 v34, vcc_lo, s37, v4, vcc_lo
	global_load_b32 v31, v[31:32], off
	global_load_b32 v32, v[33:34], off
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v2, v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, s26, v2
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v2, v31, v32
	global_store_b32 v[33:34], v2, off
.LBB0_6:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_i32_e64 s10, s29, v1
	v_cmp_le_i32_e64 s1, s29, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s3, s10
	s_and_saveexec_b32 s2, s1
; %bb.7:
	s_add_i32 s3, s30, s29
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_not_b32 s3, s3
	s_add_i32 s3, s3, s24
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_lt_i32_e32 vcc_lo, s3, v1
	s_and_not1_b32 s3, s10, exec_lo
	s_and_b32 s4, vcc_lo, exec_lo
	s_or_b32 s3, s3, s4
; %bb.8:                                ; %Flow514
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB0_10
; %bb.9:
	v_add_co_u32 v31, vcc_lo, s54, v3
	v_add_co_ci_u32_e32 v32, vcc_lo, s55, v4, vcc_lo
	global_load_b32 v2, v[29:30], off
	global_load_b32 v6, v[31:32], off
	v_add_co_u32 v29, vcc_lo, s72, v11
	v_add_co_ci_u32_e32 v30, vcc_lo, s73, v12, vcc_lo
	v_add_co_u32 v31, vcc_lo, s22, v3
	v_add_co_ci_u32_e32 v32, vcc_lo, s23, v4, vcc_lo
	global_load_b32 v29, v[29:30], off
	global_load_b32 v30, v[31:32], off
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v2, v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, s26, v2
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v2, v29, v30
	global_store_b32 v[31:32], v2, off
.LBB0_10:
	s_or_b32 exec_lo, exec_lo, s2
	v_add_co_u32 v32, vcc_lo, s38, v3
	v_add_co_ci_u32_e32 v33, vcc_lo, s39, v4, vcc_lo
	global_load_b96 v[29:31], v[17:18], off
	v_add_co_u32 v17, vcc_lo, s12, v19
	v_add_co_ci_u32_e32 v18, vcc_lo, s13, v20, vcc_lo
	v_add_co_u32 v35, vcc_lo, s38, v19
	v_add_co_ci_u32_e32 v36, vcc_lo, s39, v20, vcc_lo
	global_load_b96 v[32:34], v[32:33], off
	global_load_b32 v2, v[17:18], off
	global_load_b32 v6, v[35:36], off
	v_add_co_u32 v17, vcc_lo, s68, v11
	v_add_co_ci_u32_e32 v18, vcc_lo, s69, v12, vcc_lo
	global_load_b32 v22, v[21:22], off
	global_load_b32 v35, v[17:18], off
	s_waitcnt vmcnt(4)
	v_dual_sub_f32 v17, v30, v29 :: v_dual_sub_f32 v18, v33, v32
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v17, 0x3f900000, v17 :: v_dual_sub_f32 v2, v31, v2
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v6, v34, v6
	v_fma_f32 v2, 0x3d2aaaab, v2, -v17
	global_load_b96 v[15:17], v[15:16], off
	v_mul_f32_e32 v18, 0x3f900000, v18
	v_div_scale_f32 v36, null, s27, s27, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v6, 0x3d2aaaab, v6, -v18
	v_add_co_u32 v18, vcc_lo, s14, v19
	v_rcp_f32_e32 v38, v36
	v_add_co_ci_u32_e32 v19, vcc_lo, s15, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_div_scale_f32 v37, null, s27, s27, v6
	v_div_scale_f32 v40, s2, v2, s27, v2
	global_load_b32 v46, v[18:19], off
	v_rcp_f32_e32 v39, v37
	v_add_co_u32 v29, vcc_lo, s40, v3
	v_fma_f32 v20, -v36, v38, 1.0
	v_add_co_ci_u32_e32 v30, vcc_lo, s41, v4, vcc_lo
	v_add_co_u32 v31, vcc_lo, s40, v13
	v_add_co_ci_u32_e32 v32, vcc_lo, s41, v14, vcc_lo
	s_waitcnt_depctr 0xfff
	v_fma_f32 v33, -v37, v39, 1.0
	v_div_scale_f32 v41, vcc_lo, v6, s27, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v39, v33, v39
	v_add_co_u32 v33, s3, s40, v9
	v_add_co_ci_u32_e64 v34, s3, s41, v10, s3
	v_add_co_u32 v13, s3, s16, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s3, s17, v14, s3
	v_add_co_u32 v9, s3, s16, v9
	v_add_co_ci_u32_e64 v10, s3, s17, v10, s3
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v15, v16, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v38, v20, v38 :: v_dual_mul_f32 v15, 0x3f900000, v15
	v_dual_mul_f32 v43, v40, v38 :: v_dual_add_nc_u32 v42, -2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[20:21], null, v42, s24, v[1:2]
	v_fma_f32 v42, -v36, v43, v40
	v_mul_f32_e32 v44, v41, v39
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v17, v17, v46
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v43, v42, v38
	s_clause 0x1
	global_load_b32 v42, v[29:30], off
	global_load_b32 v31, v[31:32], off
	global_load_b32 v32, v[13:14], off
	v_fma_f32 v45, -v37, v44, v41
	v_ashrrev_i32_e32 v21, 31, v20
	v_fma_f32 v17, 0x3d2aaaab, v17, -v15
	v_fma_f32 v19, -v36, v43, v40
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[13:14], 2, v[20:21]
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v16, v42, v31
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v22, v22, v32
	v_fmac_f32_e32 v44, v45, v39
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v16, 0x3f900000, v16 :: v_dual_mul_f32 v15, 0x3f900000, v22
	v_fma_f32 v18, -v37, v44, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v36, v18, v39, v44
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f32 v20, v19, v38, v43
	v_add_co_u32 v18, vcc_lo, s40, v13
	v_add_co_ci_u32_e32 v19, vcc_lo, s41, v14, vcc_lo
	v_div_fixup_f32 v2, v20, s27, v2
	v_add_co_u32 v13, vcc_lo, s16, v13
	s_clause 0x1
	global_load_b32 v33, v[33:34], off
	global_load_b32 v34, v[18:19], off
	v_add_co_ci_u32_e32 v14, vcc_lo, s17, v14, vcc_lo
	v_cvt_f64_f32_e32 v[18:19], v2
	s_clause 0x1
	global_load_b32 v2, v[9:10], off
	global_load_b32 v37, v[13:14], off
	v_cvt_f64_f32_e32 v[13:14], v35
	v_add_co_u32 v9, vcc_lo, s70, v11
	v_add_co_ci_u32_e32 v10, vcc_lo, s71, v12, vcc_lo
	v_div_fixup_f32 v6, v36, s27, v6
	global_load_b32 v38, v[9:10], off
	v_mul_f64 v[18:19], v[27:28], v[18:19]
	v_add_co_u32 v27, vcc_lo, s62, v7
	v_add_co_ci_u32_e32 v28, vcc_lo, s63, v8, vcc_lo
	global_load_b32 v39, v[25:26], off
	global_load_b32 v40, v[27:28], off
	v_add_co_u32 v27, vcc_lo, s64, v7
	v_add_co_ci_u32_e32 v28, vcc_lo, s65, v8, vcc_lo
	global_load_b32 v41, v[27:28], off
	v_div_scale_f64 v[20:21], null, v[13:14], v[13:14], v[18:19]
	v_div_scale_f64 v[29:30], s2, v[18:19], v[13:14], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[9:10], v[20:21]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[25:26], -v[20:21], v[9:10], 1.0
	v_fma_f64 v[25:26], v[9:10], v[25:26], v[9:10]
	v_add_co_u32 v9, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v4, vcc_lo
	v_div_scale_f32 v45, vcc_lo, v17, s27, v17
	global_load_b32 v43, v[9:10], off
	v_fma_f64 v[27:28], -v[20:21], v[25:26], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[25:26], v[27:28], v[25:26]
	v_mul_f64 v[27:28], v[29:30], v[25:26]
	s_waitcnt vmcnt(5)
	v_dual_sub_f32 v31, v33, v34 :: v_dual_sub_f32 v2, v2, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v22, 0x3d2aaaab, v31, -v16
	v_div_scale_f32 v31, null, s27, s27, v17
	v_fma_f32 v2, 0x3d2aaaab, v2, -v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_scale_f32 v32, null, s28, s28, v22
	v_rcp_f32_e32 v33, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v34, null, s28, s28, v2
	v_rcp_f32_e32 v37, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_3)
	v_rcp_f32_e32 v42, v34
	v_fma_f32 v44, -v31, v33, 1.0
	v_fma_f64 v[15:16], -v[20:21], v[27:28], v[29:30]
	s_delay_alu instid0(VALU_DEP_2)
	v_fmac_f32_e32 v33, v44, v33
	s_waitcnt_depctr 0xfff
	v_fma_f32 v46, -v32, v37, 1.0
	v_fma_f32 v21, -v34, v42, 1.0
	v_div_scale_f32 v20, s3, v22, s28, v22
	v_div_scale_f32 v29, s4, v2, s28, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v37, v46, v37 :: v_dual_fmac_f32 v42, v21, v42
	v_mul_f32_e32 v30, v45, v33
	v_dual_mul_f32 v21, v20, v37 :: v_dual_mul_f32 v46, v29, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v44, -v31, v30, v45
	v_fma_f32 v47, -v32, v21, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v30, v44, v33
	v_fma_f32 v44, -v34, v46, v29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v21, v47, v37
	v_fma_f32 v31, -v31, v30, v45
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v46, v44, v42
	v_fma_f32 v20, -v32, v21, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v30, v31, v33, v30
	v_fma_f32 v29, -v34, v46, v29
	s_mov_b32 vcc_lo, s3
	s_delay_alu instid0(VALU_DEP_3)
	v_div_fmas_f32 v31, v20, v37, v21
	s_mov_b32 vcc_lo, s4
	v_div_fixup_f32 v17, v30, s27, v17
	v_div_fmas_f32 v29, v29, v42, v46
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f64 v[15:16], v[15:16], v[25:26], v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v0, v0, v17
	v_div_fixup_f32 v2, v29, s28, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v17, null, v35, v35, v0
	v_div_scale_f32 v26, vcc_lo, v0, v35, v0
	v_rcp_f32_e32 v25, v17
	s_waitcnt_depctr 0xfff
	v_fma_f32 v20, -v17, v25, 1.0
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v6, v6, v38 :: v_dual_fmac_f32 v25, v20, v25
	v_cvt_f64_f32_e32 v[20:21], v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v6, v26, v25
	v_div_fixup_f64 v[13:14], v[15:16], v[13:14], v[18:19]
	v_fma_f32 v15, -v17, v6, v26
	v_div_fixup_f32 v18, v31, s28, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v15, v25
	v_fma_f32 v15, -v17, v6, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v6, v15, v25, v6
	s_waitcnt vmcnt(2)
	v_div_scale_f32 v19, vcc_lo, v39, v40, v39
	v_div_fixup_f32 v0, v6, v35, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v0, s26, v0
	v_cvt_f64_f32_e32 v[15:16], v0
	v_div_scale_f32 v0, null, v40, v40, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v6, v0
	v_fma_f64 v[13:14], v[13:14], v[23:24], v[20:21]
	s_waitcnt_depctr 0xfff
	v_fma_f32 v17, -v0, v6, 1.0
	s_waitcnt vmcnt(1)
	v_dual_fmac_f32 v6, v17, v6 :: v_dual_mul_f32 v17, v18, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v20, v19, v6
	v_cvt_f64_f32_e32 v[17:18], v17
	v_add_f64 v[13:14], v[13:14], v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v15, -v0, v20, v19
	v_fmac_f32_e32 v20, v15, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v0, -v0, v20, v19
	v_div_fmas_f32 v0, v0, v6, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v0, v0, v40, v39
	v_mul_f32_e32 v0, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v0, s26, v0
	v_cvt_f64_f32_e32 v[15:16], v0
	v_add_f64 v[13:14], v[13:14], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[13:14], v[13:14], v[15:16]
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[15:16], v43
	v_add_f64 v[13:14], v[13:14], v[15:16]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v0, v[13:14]
	global_store_b32 v[9:10], v0, off
	s_and_saveexec_b32 s2, s0
; %bb.11:
	s_not_b32 s0, s29
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s25
	v_cmp_lt_i32_e32 vcc_lo, s0, v5
	s_and_not1_b32 s0, s5, exec_lo
	s_and_b32 s3, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s5, s0, s3
; %bb.12:                               ; %Flow513
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s0, s5
	s_cbranch_execz .LBB0_14
; %bb.13:
	v_add_co_u32 v5, vcc_lo, s52, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s53, v4, vcc_lo
	global_load_b32 v2, v[5:6], off
	v_add_co_u32 v5, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v8, vcc_lo
	v_add_co_u32 v7, vcc_lo, s20, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s21, v4, vcc_lo
	global_load_b32 v5, v[5:6], off
	global_load_b32 v6, v[7:8], off
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v0, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v0, s26, v0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v0, v5, v6
	global_store_b32 v[7:8], v0, off
.LBB0_14:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
; %bb.15:
	s_add_i32 s1, s30, s29
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_not_b32 s1, s1
	s_add_i32 s1, s1, s24
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_lt_i32_e32 vcc_lo, s1, v1
	s_and_not1_b32 s1, s10, exec_lo
	s_and_b32 s2, vcc_lo, exec_lo
	s_or_b32 s10, s1, s2
; %bb.16:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s10
	s_cbranch_execz .LBB0_18
; %bb.17:
	v_add_co_u32 v0, vcc_lo, s52, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, s53, v4, vcc_lo
	global_load_b32 v5, v[9:10], off
	global_load_b32 v6, v[0:1], off
	v_add_co_u32 v0, vcc_lo, s60, v11
	v_add_co_ci_u32_e32 v1, vcc_lo, s61, v12, vcc_lo
	v_add_co_u32 v2, vcc_lo, s18, v3
	v_add_co_ci_u32_e32 v3, vcc_lo, s19, v4, vcc_lo
	global_load_b32 v0, v[0:1], off
	global_load_b32 v1, v[2:3], off
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v4, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, s26, v4
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v4, v0, v1
	global_store_b32 v[2:3], v4, off
.LBB0_18:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 536
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 62
		.amdhsa_next_free_sgpr 76
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii, .Lfunc_end0-_Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4140
; NumSgprs: 78
; NumVgprs: 62
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 9
; VGPRBlocks: 7
; NumSGPRsForWavesPerEU: 78
; NumVGPRsForWavesPerEU: 62
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         96
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         104
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         112
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         120
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         128
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         136
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         144
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         152
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         160
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         168
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         176
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         184
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         192
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         200
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         208
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         216
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         224
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         232
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         240
        .size:           8
        .value_kind:     global_buffer
      - .offset:         248
        .size:           4
        .value_kind:     by_value
      - .offset:         252
        .size:           4
        .value_kind:     by_value
      - .offset:         256
        .size:           4
        .value_kind:     by_value
      - .offset:         260
        .size:           4
        .value_kind:     by_value
      - .offset:         264
        .size:           4
        .value_kind:     by_value
      - .offset:         268
        .size:           4
        .value_kind:     by_value
      - .offset:         272
        .size:           4
        .value_kind:     by_value
      - .offset:         280
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         284
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         288
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         292
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         294
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         296
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         298
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         300
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         302
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         320
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         328
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         336
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         344
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 536
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii
    .private_segment_fixed_size: 0
    .sgpr_count:     78
    .sgpr_spill_count: 0
    .symbol:         _Z15el_velocity_adjPfS_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_S_iifffii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     62
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
