
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <thrust/device_vector.h>
#include <thrust/host_vector.h>

#include <stdio.h>
#include <iostream>

using namespace std;

class Matrix
{
private:
    int row, col;
public:
    thrust::host_vector<thrust::host_vector<int> > v;
    Matrix();
    Matrix(const int r, const int c);
    int randNum() { return rand() % 100; };
    int rows() { return row; };
    int cols() { return col; };
    void show() const;
    ~Matrix();
};

Matrix::Matrix()
{
    row = col = 0;
    for (size_t i = 0; i < row; i++)
    {
        thrust::host_vector<int> t;
        for (size_t j = 0; j < col; j++)
        {
            t.push_back(this->randNum());
        }
        v.push_back(t);
    }
}

Matrix::Matrix(const int r, const int c)
{
    row = r, col = c;
    for (size_t i = 0; i < row; i++)
    {
        thrust::host_vector<int> t;
        for (size_t j = 0; j < col; j++)
        {
            t.push_back(this->randNum());
        }
        v.push_back(t);
    }
}

void Matrix::show() const
{
    for (size_t i = 0; i < row; i++)
    {
        for (size_t j = 0; j < col; j++)
        {
            cout << v[i][j] << ", ";
        }
        cout << endl;
    }
}

Matrix::~Matrix()
{
}

__global__ void matrixMultiply(int *d_a, size_t pitch_a, int *d_b, size_t pitch_b, int *d_c, size_t pitch_c, const int N, const int M)
{
    __shared__ int input1Temp[4][3];
    __shared__ int input2Temp[3][4];

    int row = blockDim.y*blockIdx.y + threadIdx.y;
    int col = blockDim.x*blockIdx.x + threadIdx.x;

    if (row < N&&col < N)
    {
        // load d_a to shared memory
        if (col < N - 1)
        {
            int *shared_a = (int *)((char *)d_a + row*pitch_a) + col;
            input1Temp[row][col] = *shared_a;
            __syncthreads();
            printf("input1Temp[%d][%d]: %d\n", row, col, input1Temp[row][col]);
        }
        // load d_b to shared memory
        if (row < N - 1)
        {
            int *shared_b = (int *)((char *)d_b + row*pitch_b) + col;
            input2Temp[row][col] = *shared_b;
            __syncthreads();
            printf("input2Temp[%d][%d]: %d\n", row, col, input2Temp[row][col]);
        }

        int tmp = 0;
        for (size_t i = 0; i < N; i++)
        {
            tmp += input1Temp[row][i] * input2Temp[i][col];
        }
        //shared_c[col*pitch_c + row] = tmp;
        //d_c[row*pitch_c+col] = tmp;
        int *shared_c = (int *)((char *)d_c + row*pitch_c) + col;
        *shared_c = tmp;
    }

}

__global__ void showPitch(int *a, size_t pitch, int rows, int cols)
{
    int row = blockDim.y*blockIdx.y + threadIdx.y;
    int col = blockDim.x*blockIdx.x + threadIdx.x;

    if (row < rows&&col < cols)
    {
        int *t = (int *)((char *)a + row*pitch) + col;
        printf("a[%d][%d]: %d", row, col, *t);
    }
}

int main()
{
    cudaDeviceProp prop;
    cudaGetDeviceProperties(&prop, 0);

    const int N = 4;
    const int M = 3;
    
    // use three streams to async copy array from host to device
    cudaStream_t stream_a, stream_b, stream_c;
    cudaStreamCreate(&stream_a); cudaStreamCreate(&stream_b); cudaStreamCreate(&stream_c);

    // allocate output array on device
    static int h_c[N][N];
    int *d_c;
    size_t pitch_c;
    cudaMallocPitch(&d_c, &pitch_c, N * sizeof(int), N);
    cudaMemcpy2DAsync(d_c, pitch_c, h_c, N * sizeof(int), N * sizeof(int), N, cudaMemcpyHostToDevice, stream_c);

    // allocate 2d array on device
    int h_a[N][M] = { { 1,2,3 },{ 4,5,6 },{ 7,8,9 },{ 1,3,4 } };
    size_t pitch_a;
    int *d_a;
    cudaMallocPitch(&d_a, &pitch_a, M * sizeof(int), N);
    cudaMemcpy2DAsync(d_a, pitch_a, h_a, M * sizeof(int), M * sizeof(int), N, cudaMemcpyHostToDevice, stream_a);

    int h_b[M][N] = { { 1,2,3,4 },{ 4,5,6,7 },{ 7,8,9,10 } };
    size_t pitch_b;
    int *d_b;
    cudaMallocPitch(&d_b, &pitch_b, N * sizeof(int), M);
    cudaMemcpy2DAsync(d_b, pitch_b, h_b, N * sizeof(int), N * sizeof(int), M, cudaMemcpyHostToDevice, stream_b);

    cudaStreamSynchronize(stream_a); cudaStreamSynchronize(stream_b); cudaStreamSynchronize(stream_c);

    cout << "------------------" << endl;
    dim3 blockSize(1);
    dim3 threadSize(N, N);
    cout << threadSize.x << endl;
    //showPitch <<<blockSize, threadSize>>> (d_a, pitch, N, M);
    matrixMultiply <<<blockSize, threadSize>>>(d_a, pitch_a, d_b, pitch_b, d_c, pitch_c, N, M);
    cudaDeviceSynchronize();

    // copy result to host
    cudaMemcpy2D(h_c, M * sizeof(int), d_c, pitch_c, M * sizeof(int), N, cudaMemcpyDeviceToHost);

    for (size_t i = 0; i < N; i++)
    {
        for (size_t j = 0; j < M; j++)
        {
            cout << h_c[i][j] << ", ";
        }
        cout << endl;
    }

    system("pause");
    cudaFree(d_a);
    cudaFree(d_b);
    cudaFree(d_c);

    cudaStreamDestroy(stream_a); cudaStreamDestroy(stream_b); cudaStreamDestroy(stream_c);
    return 0;
}
	.file	"tmpxft_0035ff43_00000000-6_MatrixMultiply.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.section	.text.nvtxEtiGetModuleFunctionTable_v3,"axG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat
	.weak	nvtxEtiGetModuleFunctionTable_v3
	.hidden	nvtxEtiGetModuleFunctionTable_v3
	.type	nvtxEtiGetModuleFunctionTable_v3, @function
nvtxEtiGetModuleFunctionTable_v3:
.LFB8470:
	.cfi_startproc
	endbr64
	decl	%edi
	xorl	%eax, %eax
	cmpl	$5, %edi
	ja	.L1
	leaq	.L4(%rip), %rcx
	movslq	(%rcx,%rdi,4), %rax
	addq	%rcx, %rax
	notrack jmp	*%rax
	.section	.rodata.nvtxEtiGetModuleFunctionTable_v3,"aG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat
	.align 4
	.align 4
.L4:
	.long	.L9-.L4
	.long	.L14-.L4
	.long	.L7-.L4
	.long	.L6-.L4
	.long	.L5-.L4
	.long	.L3-.L4
	.section	.text.nvtxEtiGetModuleFunctionTable_v3,"axG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat
.L9:
	leaq	560+nvtxGlobals_v3(%rip), %rcx
	jmp	.L18
.L7:
	leaq	776+nvtxGlobals_v3(%rip), %rcx
	movl	$128, %eax
	jmp	.L8
.L6:
	leaq	904+nvtxGlobals_v3(%rip), %rcx
	jmp	.L19
.L5:
	leaq	968+nvtxGlobals_v3(%rip), %rcx
.L18:
	movl	$136, %eax
	jmp	.L8
.L3:
	leaq	1104+nvtxGlobals_v3(%rip), %rcx
.L19:
	movl	$64, %eax
	jmp	.L8
.L14:
	leaq	696+nvtxGlobals_v3(%rip), %rcx
	movl	$80, %eax
.L8:
	testq	%rdx, %rdx
	je	.L10
	shrl	$3, %eax
	decl	%eax
	movl	%eax, (%rdx)
.L10:
	testq	%rsi, %rsi
	jne	.L11
.L12:
	movl	$1, %eax
	ret
.L11:
	movq	%rcx, (%rsi)
	jmp	.L12
.L1:
	ret
	.cfi_endproc
.LFE8470:
	.size	nvtxEtiGetModuleFunctionTable_v3, .-nvtxEtiGetModuleFunctionTable_v3
	.section	.text.nvtxGetExportTable_v3,"axG",@progbits,nvtxGetExportTable_v3,comdat
	.weak	nvtxGetExportTable_v3
	.hidden	nvtxGetExportTable_v3
	.type	nvtxGetExportTable_v3, @function
nvtxGetExportTable_v3:
.LFB8471:
	.cfi_startproc
	endbr64
	leaq	8+nvtxGlobals_v3(%rip), %rax
	cmpl	$1, %edi
	je	.L21
	cmpl	$3, %edi
	leaq	16(%rax), %rax
	movl	$0, %edx
	cmovne	%rdx, %rax
.L21:
	ret
	.cfi_endproc
.LFE8471:
	.size	nvtxGetExportTable_v3, .-nvtxGetExportTable_v3
	.section	.text.nvtxEtiSetInjectionNvtxVersion_v3,"axG",@progbits,nvtxEtiSetInjectionNvtxVersion_v3,comdat
	.weak	nvtxEtiSetInjectionNvtxVersion_v3
	.hidden	nvtxEtiSetInjectionNvtxVersion_v3
	.type	nvtxEtiSetInjectionNvtxVersion_v3, @function
nvtxEtiSetInjectionNvtxVersion_v3:
.LFB8472:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE8472:
	.size	nvtxEtiSetInjectionNvtxVersion_v3, .-nvtxEtiSetInjectionNvtxVersion_v3
	.text
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB11211:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE11211:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequential14trivial_copy_nIiEEPT_PKS5_lS6_.isra.0, @function
_ZN6thrust20THRUST_200700_890_NS6system6detail10sequential14trivial_copy_nIiEEPT_PKS5_lS6_.isra.0:
.LFB12703:
	.cfi_startproc
	movq	%rdi, %rax
	movq	%rdx, %rdi
	testq	%rsi, %rsi
	je	.L28
	leaq	0(,%rsi,4), %rdx
	movq	%rax, %rsi
	jmp	memmove@PLT
.L28:
	ret
	.cfi_endproc
.LFE12703:
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequential14trivial_copy_nIiEEPT_PKS5_lS6_.isra.0, .-_ZN6thrust20THRUST_200700_890_NS6system6detail10sequential14trivial_copy_nIiEEPT_PKS5_lS6_.isra.0
	.section	.text._ZN6thrust20THRUST_200700_890_NS4copyINS0_6detail15normal_iteratorIPKiEENS3_IPiEEEET0_T_SA_S9_.isra.0,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_,comdat
	.type	_ZN6thrust20THRUST_200700_890_NS4copyINS0_6detail15normal_iteratorIPKiEENS3_IPiEEEET0_T_SA_S9_.isra.0, @function
_ZN6thrust20THRUST_200700_890_NS4copyINS0_6detail15normal_iteratorIPKiEENS3_IPiEEEET0_T_SA_S9_.isra.0:
.LFB12705:
	.cfi_startproc
	movq	%rsi, %rax
	movq	%rdi, %rsi
	subq	%rax, %rsi
	sarq	$2, %rsi
	negq	%rsi
	jmp	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequential14trivial_copy_nIiEEPT_PKS5_lS6_.isra.0
	.cfi_endproc
.LFE12705:
	.size	_ZN6thrust20THRUST_200700_890_NS4copyINS0_6detail15normal_iteratorIPKiEENS3_IPiEEEET0_T_SA_S9_.isra.0, .-_ZN6thrust20THRUST_200700_890_NS4copyINS0_6detail15normal_iteratorIPKiEENS3_IPiEEEET0_T_SA_S9_.isra.0
	.text
	.align 2
	.type	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS1_15normal_iteratorIPKiEEEENS6_IPiEET_SC_SB_.isra.0, @function
_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS1_15normal_iteratorIPKiEEEENS6_IPiEET_SC_SB_.isra.0:
.LFB12708:
	.cfi_startproc
	movq	%rsi, %rax
	movq	%rdi, %rsi
	subq	%rax, %rsi
	sarq	$2, %rsi
	negq	%rsi
	jmp	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequential14trivial_copy_nIiEEPT_PKS5_lS6_.isra.0
	.cfi_endproc
.LFE12708:
	.size	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS1_15normal_iteratorIPKiEEEENS6_IPiEET_SC_SB_.isra.0, .-_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS1_15normal_iteratorIPKiEEEENS6_IPiEET_SC_SB_.isra.0
	.align 2
	.type	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE8allocateEm.part.0, @function
_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE8allocateEm.part.0:
.LFB12698:
	.cfi_startproc
	movabsq	$2305843009213693951, %rax
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rsi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 32
	cmpq	%rsi, %rax
	jnb	.L33
	movabsq	$4611686018427387903, %rax
	cmpq	%rsi, %rax
	jnb	.L34
	call	_ZSt28__throw_bad_array_new_lengthv@PLT
.L34:
	call	_ZSt17__throw_bad_allocv@PLT
.L33:
	movq	%rdi, %rbp
	leaq	0(,%rsi,4), %rdi
	call	_Znwm@PLT
	movq	%rbx, 16(%rbp)
	movq	%rax, 8(%rbp)
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12698:
	.size	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE8allocateEm.part.0, .-_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE8allocateEm.part.0
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS1_15normal_iteratorIPiEEEES8_T_S9_S8_.isra.0,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE11fill_insertENS1_15normal_iteratorIPiEEmRKi,comdat
	.align 2
	.type	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS1_15normal_iteratorIPiEEEES8_T_S9_S8_.isra.0, @function
_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS1_15normal_iteratorIPiEEEES8_T_S9_S8_.isra.0:
.LFB12714:
	.cfi_startproc
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	subq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdx, %rbx
	sarq	$2, %rbp
	pushq	%rax
	.cfi_def_cfa_offset 32
	movq	%rbp, %rsi
	imulq	$-4, %rbp, %rbp
	negq	%rsi
	call	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequential14trivial_copy_nIiEEPT_PKS5_lS6_.isra.0
	popq	%rdx
	.cfi_def_cfa_offset 24
	leaq	(%rbx,%rbp), %rax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12714:
	.size	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS1_15normal_iteratorIPiEEEES8_T_S9_S8_.isra.0, .-_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS1_15normal_iteratorIPiEEEES8_T_S9_S8_.isra.0
	.section	.text._ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv,"axG",@progbits,_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv,comdat
	.weak	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv
	.hidden	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv
	.type	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv, @function
_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv:
.LFB11623:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L38:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L40
	call	__stack_chk_fail@PLT
.L40:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11623:
	.size	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv, .-_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv
	.section	.text.nvtxSetInitFunctionsToNoops_v3,"axG",@progbits,nvtxSetInitFunctionsToNoops_v3,comdat
	.weak	nvtxSetInitFunctionsToNoops_v3
	.hidden	nvtxSetInitFunctionsToNoops_v3
	.type	nvtxSetInitFunctionsToNoops_v3, @function
nvtxSetInitFunctionsToNoops_v3:
.LFB8537:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	leaq	nvtxMarkEx_impl_init_v3(%rip), %rdx
	setne	%al
	cmpq	%rdx, 48+nvtxGlobals_v3(%rip)
	je	.L171
	testb	%al, %al
	je	.L43
.L171:
	xorl	%r10d, %r10d
	movq	%r10, 48+nvtxGlobals_v3(%rip)
.L43:
	leaq	nvtxMarkA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 56+nvtxGlobals_v3(%rip)
	je	.L172
	testb	%al, %al
	je	.L45
.L172:
	xorl	%r9d, %r9d
	movq	%r9, 56+nvtxGlobals_v3(%rip)
.L45:
	leaq	nvtxMarkW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 64+nvtxGlobals_v3(%rip)
	je	.L173
	testb	%al, %al
	je	.L47
.L173:
	xorl	%r8d, %r8d
	movq	%r8, 64+nvtxGlobals_v3(%rip)
.L47:
	leaq	nvtxRangeStartEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 72+nvtxGlobals_v3(%rip)
	je	.L174
	testb	%al, %al
	je	.L49
.L174:
	xorl	%edi, %edi
	movq	%rdi, 72+nvtxGlobals_v3(%rip)
.L49:
	leaq	nvtxRangeStartA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 80+nvtxGlobals_v3(%rip)
	je	.L175
	testb	%al, %al
	je	.L51
.L175:
	xorl	%esi, %esi
	movq	%rsi, 80+nvtxGlobals_v3(%rip)
.L51:
	leaq	nvtxRangeStartW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 88+nvtxGlobals_v3(%rip)
	je	.L176
	testb	%al, %al
	je	.L53
.L176:
	xorl	%ecx, %ecx
	movq	%rcx, 88+nvtxGlobals_v3(%rip)
.L53:
	leaq	nvtxRangeEnd_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 96+nvtxGlobals_v3(%rip)
	je	.L177
	testb	%al, %al
	je	.L55
.L177:
	xorl	%edx, %edx
	movq	%rdx, 96+nvtxGlobals_v3(%rip)
.L55:
	leaq	nvtxRangePushEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 104+nvtxGlobals_v3(%rip)
	je	.L178
	testb	%al, %al
	je	.L57
.L178:
	xorl	%r11d, %r11d
	movq	%r11, 104+nvtxGlobals_v3(%rip)
.L57:
	leaq	nvtxRangePushA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 112+nvtxGlobals_v3(%rip)
	je	.L179
	testb	%al, %al
	je	.L59
.L179:
	xorl	%r10d, %r10d
	movq	%r10, 112+nvtxGlobals_v3(%rip)
.L59:
	leaq	nvtxRangePushW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 120+nvtxGlobals_v3(%rip)
	je	.L180
	testb	%al, %al
	je	.L61
.L180:
	xorl	%r9d, %r9d
	movq	%r9, 120+nvtxGlobals_v3(%rip)
.L61:
	leaq	nvtxRangePop_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 128+nvtxGlobals_v3(%rip)
	je	.L181
	testb	%al, %al
	je	.L63
.L181:
	xorl	%r8d, %r8d
	movq	%r8, 128+nvtxGlobals_v3(%rip)
.L63:
	leaq	nvtxNameCategoryA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 136+nvtxGlobals_v3(%rip)
	je	.L182
	testb	%al, %al
	je	.L65
.L182:
	xorl	%edi, %edi
	movq	%rdi, 136+nvtxGlobals_v3(%rip)
.L65:
	leaq	nvtxNameCategoryW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 144+nvtxGlobals_v3(%rip)
	je	.L183
	testb	%al, %al
	je	.L67
.L183:
	xorl	%esi, %esi
	movq	%rsi, 144+nvtxGlobals_v3(%rip)
.L67:
	leaq	nvtxNameOsThreadA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 152+nvtxGlobals_v3(%rip)
	je	.L184
	testb	%al, %al
	je	.L69
.L184:
	xorl	%ecx, %ecx
	movq	%rcx, 152+nvtxGlobals_v3(%rip)
.L69:
	leaq	nvtxNameOsThreadW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 160+nvtxGlobals_v3(%rip)
	je	.L185
	testb	%al, %al
	je	.L71
.L185:
	xorl	%edx, %edx
	movq	%rdx, 160+nvtxGlobals_v3(%rip)
.L71:
	leaq	nvtxNameCuDeviceA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 168+nvtxGlobals_v3(%rip)
	je	.L186
	testb	%al, %al
	je	.L73
.L186:
	xorl	%r11d, %r11d
	movq	%r11, 168+nvtxGlobals_v3(%rip)
.L73:
	leaq	nvtxNameCuDeviceW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 176+nvtxGlobals_v3(%rip)
	je	.L187
	testb	%al, %al
	je	.L75
.L187:
	xorl	%r10d, %r10d
	movq	%r10, 176+nvtxGlobals_v3(%rip)
.L75:
	leaq	nvtxNameCuContextA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 184+nvtxGlobals_v3(%rip)
	je	.L188
	testb	%al, %al
	je	.L77
.L188:
	xorl	%r9d, %r9d
	movq	%r9, 184+nvtxGlobals_v3(%rip)
.L77:
	leaq	nvtxNameCuContextW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 192+nvtxGlobals_v3(%rip)
	je	.L189
	testb	%al, %al
	je	.L79
.L189:
	xorl	%r8d, %r8d
	movq	%r8, 192+nvtxGlobals_v3(%rip)
.L79:
	leaq	nvtxNameCuStreamA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 200+nvtxGlobals_v3(%rip)
	je	.L190
	testb	%al, %al
	je	.L81
.L190:
	xorl	%edi, %edi
	movq	%rdi, 200+nvtxGlobals_v3(%rip)
.L81:
	leaq	nvtxNameCuStreamW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 208+nvtxGlobals_v3(%rip)
	je	.L191
	testb	%al, %al
	je	.L83
.L191:
	xorl	%esi, %esi
	movq	%rsi, 208+nvtxGlobals_v3(%rip)
.L83:
	leaq	nvtxNameCuEventA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 216+nvtxGlobals_v3(%rip)
	je	.L192
	testb	%al, %al
	je	.L85
.L192:
	xorl	%ecx, %ecx
	movq	%rcx, 216+nvtxGlobals_v3(%rip)
.L85:
	leaq	nvtxNameCuEventW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 224+nvtxGlobals_v3(%rip)
	je	.L193
	testb	%al, %al
	je	.L87
.L193:
	xorl	%edx, %edx
	movq	%rdx, 224+nvtxGlobals_v3(%rip)
.L87:
	leaq	nvtxNameClDeviceA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 232+nvtxGlobals_v3(%rip)
	je	.L194
	testb	%al, %al
	je	.L89
.L194:
	xorl	%r11d, %r11d
	movq	%r11, 232+nvtxGlobals_v3(%rip)
.L89:
	leaq	nvtxNameClDeviceW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 240+nvtxGlobals_v3(%rip)
	je	.L195
	testb	%al, %al
	je	.L91
.L195:
	xorl	%r10d, %r10d
	movq	%r10, 240+nvtxGlobals_v3(%rip)
.L91:
	leaq	nvtxNameClContextA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 248+nvtxGlobals_v3(%rip)
	je	.L196
	testb	%al, %al
	je	.L93
.L196:
	xorl	%r9d, %r9d
	movq	%r9, 248+nvtxGlobals_v3(%rip)
.L93:
	leaq	nvtxNameClContextW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 256+nvtxGlobals_v3(%rip)
	je	.L197
	testb	%al, %al
	je	.L95
.L197:
	xorl	%r8d, %r8d
	movq	%r8, 256+nvtxGlobals_v3(%rip)
.L95:
	leaq	nvtxNameClCommandQueueA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 264+nvtxGlobals_v3(%rip)
	je	.L198
	testb	%al, %al
	je	.L97
.L198:
	xorl	%edi, %edi
	movq	%rdi, 264+nvtxGlobals_v3(%rip)
.L97:
	leaq	nvtxNameClCommandQueueW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 272+nvtxGlobals_v3(%rip)
	je	.L199
	testb	%al, %al
	je	.L99
.L199:
	xorl	%esi, %esi
	movq	%rsi, 272+nvtxGlobals_v3(%rip)
.L99:
	leaq	nvtxNameClMemObjectA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 280+nvtxGlobals_v3(%rip)
	je	.L200
	testb	%al, %al
	je	.L101
.L200:
	xorl	%ecx, %ecx
	movq	%rcx, 280+nvtxGlobals_v3(%rip)
.L101:
	leaq	nvtxNameClMemObjectW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 288+nvtxGlobals_v3(%rip)
	je	.L201
	testb	%al, %al
	je	.L103
.L201:
	xorl	%edx, %edx
	movq	%rdx, 288+nvtxGlobals_v3(%rip)
.L103:
	leaq	nvtxNameClSamplerA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 296+nvtxGlobals_v3(%rip)
	je	.L202
	testb	%al, %al
	je	.L105
.L202:
	xorl	%r11d, %r11d
	movq	%r11, 296+nvtxGlobals_v3(%rip)
.L105:
	leaq	nvtxNameClSamplerW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 304+nvtxGlobals_v3(%rip)
	je	.L203
	testb	%al, %al
	je	.L107
.L203:
	xorl	%r10d, %r10d
	movq	%r10, 304+nvtxGlobals_v3(%rip)
.L107:
	leaq	nvtxNameClProgramA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 312+nvtxGlobals_v3(%rip)
	je	.L204
	testb	%al, %al
	je	.L109
.L204:
	xorl	%r9d, %r9d
	movq	%r9, 312+nvtxGlobals_v3(%rip)
.L109:
	leaq	nvtxNameClProgramW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 320+nvtxGlobals_v3(%rip)
	je	.L205
	testb	%al, %al
	je	.L111
.L205:
	xorl	%r8d, %r8d
	movq	%r8, 320+nvtxGlobals_v3(%rip)
.L111:
	leaq	nvtxNameClEventA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 328+nvtxGlobals_v3(%rip)
	je	.L206
	testb	%al, %al
	je	.L113
.L206:
	xorl	%edi, %edi
	movq	%rdi, 328+nvtxGlobals_v3(%rip)
.L113:
	leaq	nvtxNameClEventW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 336+nvtxGlobals_v3(%rip)
	je	.L207
	testb	%al, %al
	je	.L115
.L207:
	xorl	%esi, %esi
	movq	%rsi, 336+nvtxGlobals_v3(%rip)
.L115:
	leaq	nvtxNameCudaDeviceA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 344+nvtxGlobals_v3(%rip)
	je	.L208
	testb	%al, %al
	je	.L117
.L208:
	xorl	%ecx, %ecx
	movq	%rcx, 344+nvtxGlobals_v3(%rip)
.L117:
	leaq	nvtxNameCudaDeviceW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 352+nvtxGlobals_v3(%rip)
	je	.L209
	testb	%al, %al
	je	.L119
.L209:
	xorl	%edx, %edx
	movq	%rdx, 352+nvtxGlobals_v3(%rip)
.L119:
	leaq	nvtxNameCudaStreamA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 360+nvtxGlobals_v3(%rip)
	je	.L210
	testb	%al, %al
	je	.L121
.L210:
	xorl	%r11d, %r11d
	movq	%r11, 360+nvtxGlobals_v3(%rip)
.L121:
	leaq	nvtxNameCudaStreamW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 368+nvtxGlobals_v3(%rip)
	je	.L211
	testb	%al, %al
	je	.L123
.L211:
	xorl	%r10d, %r10d
	movq	%r10, 368+nvtxGlobals_v3(%rip)
.L123:
	leaq	nvtxNameCudaEventA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 376+nvtxGlobals_v3(%rip)
	je	.L212
	testb	%al, %al
	je	.L125
.L212:
	xorl	%r9d, %r9d
	movq	%r9, 376+nvtxGlobals_v3(%rip)
.L125:
	leaq	nvtxNameCudaEventW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 384+nvtxGlobals_v3(%rip)
	je	.L213
	testb	%al, %al
	je	.L127
.L213:
	xorl	%r8d, %r8d
	movq	%r8, 384+nvtxGlobals_v3(%rip)
.L127:
	leaq	nvtxDomainMarkEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 392+nvtxGlobals_v3(%rip)
	je	.L214
	testb	%al, %al
	je	.L129
.L214:
	xorl	%edi, %edi
	movq	%rdi, 392+nvtxGlobals_v3(%rip)
.L129:
	leaq	nvtxDomainRangeStartEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 400+nvtxGlobals_v3(%rip)
	je	.L215
	testb	%al, %al
	je	.L131
.L215:
	xorl	%esi, %esi
	movq	%rsi, 400+nvtxGlobals_v3(%rip)
.L131:
	leaq	nvtxDomainRangeEnd_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 408+nvtxGlobals_v3(%rip)
	je	.L216
	testb	%al, %al
	je	.L133
.L216:
	xorl	%ecx, %ecx
	movq	%rcx, 408+nvtxGlobals_v3(%rip)
.L133:
	leaq	nvtxDomainRangePushEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 416+nvtxGlobals_v3(%rip)
	je	.L217
	testb	%al, %al
	je	.L135
.L217:
	xorl	%edx, %edx
	movq	%rdx, 416+nvtxGlobals_v3(%rip)
.L135:
	leaq	nvtxDomainRangePop_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 424+nvtxGlobals_v3(%rip)
	je	.L218
	testb	%al, %al
	je	.L137
.L218:
	xorl	%r11d, %r11d
	movq	%r11, 424+nvtxGlobals_v3(%rip)
.L137:
	leaq	nvtxDomainResourceCreate_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 432+nvtxGlobals_v3(%rip)
	je	.L219
	testb	%al, %al
	je	.L139
.L219:
	xorl	%r10d, %r10d
	movq	%r10, 432+nvtxGlobals_v3(%rip)
.L139:
	leaq	nvtxDomainResourceDestroy_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 440+nvtxGlobals_v3(%rip)
	je	.L220
	testb	%al, %al
	je	.L141
.L220:
	xorl	%r9d, %r9d
	movq	%r9, 440+nvtxGlobals_v3(%rip)
.L141:
	leaq	nvtxDomainNameCategoryA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 448+nvtxGlobals_v3(%rip)
	je	.L221
	testb	%al, %al
	je	.L143
.L221:
	xorl	%r8d, %r8d
	movq	%r8, 448+nvtxGlobals_v3(%rip)
.L143:
	leaq	nvtxDomainNameCategoryW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 456+nvtxGlobals_v3(%rip)
	je	.L222
	testb	%al, %al
	je	.L145
.L222:
	xorl	%edi, %edi
	movq	%rdi, 456+nvtxGlobals_v3(%rip)
.L145:
	leaq	nvtxDomainRegisterStringA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 464+nvtxGlobals_v3(%rip)
	je	.L223
	testb	%al, %al
	je	.L147
.L223:
	xorl	%esi, %esi
	movq	%rsi, 464+nvtxGlobals_v3(%rip)
.L147:
	leaq	nvtxDomainRegisterStringW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 472+nvtxGlobals_v3(%rip)
	je	.L224
	testb	%al, %al
	je	.L149
.L224:
	xorl	%ecx, %ecx
	movq	%rcx, 472+nvtxGlobals_v3(%rip)
.L149:
	leaq	nvtxDomainCreateA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 480+nvtxGlobals_v3(%rip)
	je	.L225
	testb	%al, %al
	je	.L151
.L225:
	xorl	%edx, %edx
	movq	%rdx, 480+nvtxGlobals_v3(%rip)
.L151:
	leaq	nvtxDomainCreateW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 488+nvtxGlobals_v3(%rip)
	je	.L226
	testb	%al, %al
	je	.L153
.L226:
	xorl	%r11d, %r11d
	movq	%r11, 488+nvtxGlobals_v3(%rip)
.L153:
	leaq	nvtxDomainDestroy_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 496+nvtxGlobals_v3(%rip)
	je	.L227
	testb	%al, %al
	je	.L155
.L227:
	xorl	%r10d, %r10d
	movq	%r10, 496+nvtxGlobals_v3(%rip)
.L155:
	leaq	nvtxInitialize_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 504+nvtxGlobals_v3(%rip)
	je	.L228
	testb	%al, %al
	je	.L157
.L228:
	xorl	%r9d, %r9d
	movq	%r9, 504+nvtxGlobals_v3(%rip)
.L157:
	leaq	nvtxDomainSyncUserCreate_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 512+nvtxGlobals_v3(%rip)
	je	.L229
	testb	%al, %al
	je	.L159
.L229:
	xorl	%r8d, %r8d
	movq	%r8, 512+nvtxGlobals_v3(%rip)
.L159:
	leaq	nvtxDomainSyncUserDestroy_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 520+nvtxGlobals_v3(%rip)
	je	.L230
	testb	%al, %al
	je	.L161
.L230:
	xorl	%edi, %edi
	movq	%rdi, 520+nvtxGlobals_v3(%rip)
.L161:
	leaq	nvtxDomainSyncUserAcquireStart_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 528+nvtxGlobals_v3(%rip)
	je	.L231
	testb	%al, %al
	je	.L163
.L231:
	xorl	%esi, %esi
	movq	%rsi, 528+nvtxGlobals_v3(%rip)
.L163:
	leaq	nvtxDomainSyncUserAcquireFailed_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 536+nvtxGlobals_v3(%rip)
	je	.L232
	testb	%al, %al
	je	.L165
.L232:
	xorl	%ecx, %ecx
	movq	%rcx, 536+nvtxGlobals_v3(%rip)
.L165:
	leaq	nvtxDomainSyncUserAcquireSuccess_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 544+nvtxGlobals_v3(%rip)
	je	.L233
	testb	%al, %al
	je	.L167
.L233:
	xorl	%edx, %edx
	movq	%rdx, 544+nvtxGlobals_v3(%rip)
.L167:
	leaq	nvtxDomainSyncUserReleasing_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 552+nvtxGlobals_v3(%rip)
	je	.L234
	testb	%al, %al
	je	.L42
.L234:
	xorl	%eax, %eax
	movq	%rax, 552+nvtxGlobals_v3(%rip)
.L42:
	ret
	.cfi_endproc
.LFE8537:
	.size	nvtxSetInitFunctionsToNoops_v3, .-nvtxSetInitFunctionsToNoops_v3
	.section	.rodata.nvtxInitializeInjectionLibrary_v3.str1.1,"aMS",@progbits,1
.LC2:
	.string	"NVTX_INJECTION64_PATH"
.LC3:
	.string	"InitializeInjectionNvtx2"
	.section	.text.nvtxInitializeInjectionLibrary_v3,"axG",@progbits,nvtxInitializeInjectionLibrary_v3,comdat
	.weak	nvtxInitializeInjectionLibrary_v3
	.hidden	nvtxInitializeInjectionLibrary_v3
	.type	nvtxInitializeInjectionLibrary_v3, @function
nvtxInitializeInjectionLibrary_v3:
.LFB8538:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	.LC2(%rip), %rdi
	call	getenv@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	je	.L428
	movl	$1, %esi
	movq	%rax, %rdi
	call	dlopen@PLT
	movl	$4, %edx
	movq	%rax, %rbx
	testq	%rax, %rax
	je	.L427
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	dlsym@PLT
	testq	%rax, %rax
	jne	.L430
	movq	%rbx, %rdi
	call	dlclose@PLT
	movl	$5, %edx
	jmp	.L427
.L428:
	movq	InitializeInjectionNvtx2_fnptr(%rip), %rax
	movl	$7, %edx
	testq	%rax, %rax
	je	.L427
.L430:
	leaq	nvtxGetExportTable_v3(%rip), %rdi
	call	*%rax
	xorl	%edx, %edx
	testl	%eax, %eax
	jne	.L427
	testq	%rbx, %rbx
	je	.L431
	movq	%rbx, %rdi
	call	dlclose@PLT
.L431:
	movl	$6, %edx
.L427:
	movl	%edx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8538:
	.size	nvtxInitializeInjectionLibrary_v3, .-nvtxInitializeInjectionLibrary_v3
	.section	.text.nvtxInitOnce_v3,"axG",@progbits,nvtxInitOnce_v3,comdat
	.weak	nvtxInitOnce_v3
	.hidden	nvtxInitOnce_v3
	.type	nvtxInitOnce_v3, @function
nvtxInitOnce_v3:
.LFB8539:
	.cfi_startproc
	endbr64
	movl	nvtxGlobals_v3(%rip), %eax
	cmpl	$2, %eax
	je	.L447
	pushq	%rdx
	.cfi_def_cfa_offset 16
	movl	$1, %eax
	xorl	%edx, %edx
	mfence
	lock cmpxchgl	%edx, nvtxGlobals_v3(%rip)
	testl	%eax, %eax
	jne	.L450
	call	nvtxInitializeInjectionLibrary_v3
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	call	nvtxSetInitFunctionsToNoops_v3
	movl	$2, %eax
	mfence
	xchgl	nvtxGlobals_v3(%rip), %eax
	jmp	.L439
.L450:
	mfence
	movl	nvtxGlobals_v3(%rip), %eax
	cmpl	$2, %eax
	je	.L439
	call	sched_yield@PLT
	jmp	.L450
.L439:
	popq	%rax
	.cfi_def_cfa_offset 8
	ret
.L447:
	ret
	.cfi_endproc
.LFE8539:
	.size	nvtxInitOnce_v3, .-nvtxInitOnce_v3
	.section	.text.nvtxDomainSyncUserReleasing_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserReleasing_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserReleasing_impl_init_v3
	.hidden	nvtxDomainSyncUserReleasing_impl_init_v3
	.type	nvtxDomainSyncUserReleasing_impl_init_v3, @function
nvtxDomainSyncUserReleasing_impl_init_v3:
.LFB8536:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	552+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L451
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L451:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8536:
	.size	nvtxDomainSyncUserReleasing_impl_init_v3, .-nvtxDomainSyncUserReleasing_impl_init_v3
	.section	.text.nvtxDomainSyncUserAcquireSuccess_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireSuccess_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.hidden	nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.type	nvtxDomainSyncUserAcquireSuccess_impl_init_v3, @function
nvtxDomainSyncUserAcquireSuccess_impl_init_v3:
.LFB8535:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	544+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L454
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L454:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8535:
	.size	nvtxDomainSyncUserAcquireSuccess_impl_init_v3, .-nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.section	.text.nvtxDomainSyncUserAcquireFailed_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireFailed_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.hidden	nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.type	nvtxDomainSyncUserAcquireFailed_impl_init_v3, @function
nvtxDomainSyncUserAcquireFailed_impl_init_v3:
.LFB8534:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	536+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L457
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L457:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8534:
	.size	nvtxDomainSyncUserAcquireFailed_impl_init_v3, .-nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.section	.text.nvtxDomainSyncUserAcquireStart_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireStart_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserAcquireStart_impl_init_v3
	.hidden	nvtxDomainSyncUserAcquireStart_impl_init_v3
	.type	nvtxDomainSyncUserAcquireStart_impl_init_v3, @function
nvtxDomainSyncUserAcquireStart_impl_init_v3:
.LFB8533:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	528+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L460
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L460:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8533:
	.size	nvtxDomainSyncUserAcquireStart_impl_init_v3, .-nvtxDomainSyncUserAcquireStart_impl_init_v3
	.section	.text.nvtxDomainSyncUserDestroy_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserDestroy_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserDestroy_impl_init_v3
	.hidden	nvtxDomainSyncUserDestroy_impl_init_v3
	.type	nvtxDomainSyncUserDestroy_impl_init_v3, @function
nvtxDomainSyncUserDestroy_impl_init_v3:
.LFB8532:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	520+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L463
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L463:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8532:
	.size	nvtxDomainSyncUserDestroy_impl_init_v3, .-nvtxDomainSyncUserDestroy_impl_init_v3
	.section	.text.nvtxDomainSyncUserCreate_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserCreate_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserCreate_impl_init_v3
	.hidden	nvtxDomainSyncUserCreate_impl_init_v3
	.type	nvtxDomainSyncUserCreate_impl_init_v3, @function
nvtxDomainSyncUserCreate_impl_init_v3:
.LFB8531:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	512+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L467
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L467:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8531:
	.size	nvtxDomainSyncUserCreate_impl_init_v3, .-nvtxDomainSyncUserCreate_impl_init_v3
	.section	.text.nvtxInitialize_impl_init_v3,"axG",@progbits,nvtxInitialize_impl_init_v3,comdat
	.weak	nvtxInitialize_impl_init_v3
	.hidden	nvtxInitialize_impl_init_v3
	.type	nvtxInitialize_impl_init_v3, @function
nvtxInitialize_impl_init_v3:
.LFB8502:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	504+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L469
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L469:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8502:
	.size	nvtxInitialize_impl_init_v3, .-nvtxInitialize_impl_init_v3
	.section	.text.nvtxDomainDestroy_impl_init_v3,"axG",@progbits,nvtxDomainDestroy_impl_init_v3,comdat
	.weak	nvtxDomainDestroy_impl_init_v3
	.hidden	nvtxDomainDestroy_impl_init_v3
	.type	nvtxDomainDestroy_impl_init_v3, @function
nvtxDomainDestroy_impl_init_v3:
.LFB8501:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	496+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L472
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L472:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8501:
	.size	nvtxDomainDestroy_impl_init_v3, .-nvtxDomainDestroy_impl_init_v3
	.section	.text.nvtxDomainCreateW_impl_init_v3,"axG",@progbits,nvtxDomainCreateW_impl_init_v3,comdat
	.weak	nvtxDomainCreateW_impl_init_v3
	.hidden	nvtxDomainCreateW_impl_init_v3
	.type	nvtxDomainCreateW_impl_init_v3, @function
nvtxDomainCreateW_impl_init_v3:
.LFB8500:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	488+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L476
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L476:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8500:
	.size	nvtxDomainCreateW_impl_init_v3, .-nvtxDomainCreateW_impl_init_v3
	.section	.text.nvtxDomainCreateA_impl_init_v3,"axG",@progbits,nvtxDomainCreateA_impl_init_v3,comdat
	.weak	nvtxDomainCreateA_impl_init_v3
	.hidden	nvtxDomainCreateA_impl_init_v3
	.type	nvtxDomainCreateA_impl_init_v3, @function
nvtxDomainCreateA_impl_init_v3:
.LFB8499:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	480+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L479
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L479:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8499:
	.size	nvtxDomainCreateA_impl_init_v3, .-nvtxDomainCreateA_impl_init_v3
	.section	.text.nvtxDomainRegisterStringW_impl_init_v3,"axG",@progbits,nvtxDomainRegisterStringW_impl_init_v3,comdat
	.weak	nvtxDomainRegisterStringW_impl_init_v3
	.hidden	nvtxDomainRegisterStringW_impl_init_v3
	.type	nvtxDomainRegisterStringW_impl_init_v3, @function
nvtxDomainRegisterStringW_impl_init_v3:
.LFB8498:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	472+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L482
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L482:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8498:
	.size	nvtxDomainRegisterStringW_impl_init_v3, .-nvtxDomainRegisterStringW_impl_init_v3
	.section	.text.nvtxDomainRegisterStringA_impl_init_v3,"axG",@progbits,nvtxDomainRegisterStringA_impl_init_v3,comdat
	.weak	nvtxDomainRegisterStringA_impl_init_v3
	.hidden	nvtxDomainRegisterStringA_impl_init_v3
	.type	nvtxDomainRegisterStringA_impl_init_v3, @function
nvtxDomainRegisterStringA_impl_init_v3:
.LFB8497:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	464+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L485
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L485:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8497:
	.size	nvtxDomainRegisterStringA_impl_init_v3, .-nvtxDomainRegisterStringA_impl_init_v3
	.section	.text.nvtxDomainNameCategoryW_impl_init_v3,"axG",@progbits,nvtxDomainNameCategoryW_impl_init_v3,comdat
	.weak	nvtxDomainNameCategoryW_impl_init_v3
	.hidden	nvtxDomainNameCategoryW_impl_init_v3
	.type	nvtxDomainNameCategoryW_impl_init_v3, @function
nvtxDomainNameCategoryW_impl_init_v3:
.LFB8496:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 24(%rsp)
	movl	%esi, 20(%rsp)
	movq	%rdx, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	456+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L487
	movq	8(%rsp), %rdx
	movl	20(%rsp), %esi
	movq	24(%rsp), %rdi
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L487:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8496:
	.size	nvtxDomainNameCategoryW_impl_init_v3, .-nvtxDomainNameCategoryW_impl_init_v3
	.section	.text.nvtxDomainNameCategoryA_impl_init_v3,"axG",@progbits,nvtxDomainNameCategoryA_impl_init_v3,comdat
	.weak	nvtxDomainNameCategoryA_impl_init_v3
	.hidden	nvtxDomainNameCategoryA_impl_init_v3
	.type	nvtxDomainNameCategoryA_impl_init_v3, @function
nvtxDomainNameCategoryA_impl_init_v3:
.LFB8495:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 24(%rsp)
	movl	%esi, 20(%rsp)
	movq	%rdx, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	448+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L490
	movq	8(%rsp), %rdx
	movl	20(%rsp), %esi
	movq	24(%rsp), %rdi
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L490:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8495:
	.size	nvtxDomainNameCategoryA_impl_init_v3, .-nvtxDomainNameCategoryA_impl_init_v3
	.section	.text.nvtxDomainResourceDestroy_impl_init_v3,"axG",@progbits,nvtxDomainResourceDestroy_impl_init_v3,comdat
	.weak	nvtxDomainResourceDestroy_impl_init_v3
	.hidden	nvtxDomainResourceDestroy_impl_init_v3
	.type	nvtxDomainResourceDestroy_impl_init_v3, @function
nvtxDomainResourceDestroy_impl_init_v3:
.LFB8494:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	440+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L493
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L493:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8494:
	.size	nvtxDomainResourceDestroy_impl_init_v3, .-nvtxDomainResourceDestroy_impl_init_v3
	.section	.text.nvtxDomainResourceCreate_impl_init_v3,"axG",@progbits,nvtxDomainResourceCreate_impl_init_v3,comdat
	.weak	nvtxDomainResourceCreate_impl_init_v3
	.hidden	nvtxDomainResourceCreate_impl_init_v3
	.type	nvtxDomainResourceCreate_impl_init_v3, @function
nvtxDomainResourceCreate_impl_init_v3:
.LFB8493:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	432+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L497
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L497:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8493:
	.size	nvtxDomainResourceCreate_impl_init_v3, .-nvtxDomainResourceCreate_impl_init_v3
	.section	.text.nvtxDomainRangePop_impl_init_v3,"axG",@progbits,nvtxDomainRangePop_impl_init_v3,comdat
	.weak	nvtxDomainRangePop_impl_init_v3
	.hidden	nvtxDomainRangePop_impl_init_v3
	.type	nvtxDomainRangePop_impl_init_v3, @function
nvtxDomainRangePop_impl_init_v3:
.LFB8492:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	424+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L500
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L500:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8492:
	.size	nvtxDomainRangePop_impl_init_v3, .-nvtxDomainRangePop_impl_init_v3
	.section	.text.nvtxDomainRangePushEx_impl_init_v3,"axG",@progbits,nvtxDomainRangePushEx_impl_init_v3,comdat
	.weak	nvtxDomainRangePushEx_impl_init_v3
	.hidden	nvtxDomainRangePushEx_impl_init_v3
	.type	nvtxDomainRangePushEx_impl_init_v3, @function
nvtxDomainRangePushEx_impl_init_v3:
.LFB8491:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	416+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L503
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L503:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8491:
	.size	nvtxDomainRangePushEx_impl_init_v3, .-nvtxDomainRangePushEx_impl_init_v3
	.section	.text.nvtxDomainRangeEnd_impl_init_v3,"axG",@progbits,nvtxDomainRangeEnd_impl_init_v3,comdat
	.weak	nvtxDomainRangeEnd_impl_init_v3
	.hidden	nvtxDomainRangeEnd_impl_init_v3
	.type	nvtxDomainRangeEnd_impl_init_v3, @function
nvtxDomainRangeEnd_impl_init_v3:
.LFB8490:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	408+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L505
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L505:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8490:
	.size	nvtxDomainRangeEnd_impl_init_v3, .-nvtxDomainRangeEnd_impl_init_v3
	.section	.text.nvtxDomainRangeStartEx_impl_init_v3,"axG",@progbits,nvtxDomainRangeStartEx_impl_init_v3,comdat
	.weak	nvtxDomainRangeStartEx_impl_init_v3
	.hidden	nvtxDomainRangeStartEx_impl_init_v3
	.type	nvtxDomainRangeStartEx_impl_init_v3, @function
nvtxDomainRangeStartEx_impl_init_v3:
.LFB8489:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	400+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L509
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L509:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8489:
	.size	nvtxDomainRangeStartEx_impl_init_v3, .-nvtxDomainRangeStartEx_impl_init_v3
	.section	.text.nvtxDomainMarkEx_impl_init_v3,"axG",@progbits,nvtxDomainMarkEx_impl_init_v3,comdat
	.weak	nvtxDomainMarkEx_impl_init_v3
	.hidden	nvtxDomainMarkEx_impl_init_v3
	.type	nvtxDomainMarkEx_impl_init_v3, @function
nvtxDomainMarkEx_impl_init_v3:
.LFB8488:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	392+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L511
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L511:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8488:
	.size	nvtxDomainMarkEx_impl_init_v3, .-nvtxDomainMarkEx_impl_init_v3
	.section	.text.nvtxNameCudaEventW_impl_init_v3,"axG",@progbits,nvtxNameCudaEventW_impl_init_v3,comdat
	.weak	nvtxNameCudaEventW_impl_init_v3
	.hidden	nvtxNameCudaEventW_impl_init_v3
	.type	nvtxNameCudaEventW_impl_init_v3, @function
nvtxNameCudaEventW_impl_init_v3:
.LFB8516:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	384+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L514
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L514:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8516:
	.size	nvtxNameCudaEventW_impl_init_v3, .-nvtxNameCudaEventW_impl_init_v3
	.section	.text.nvtxNameCudaEventA_impl_init_v3,"axG",@progbits,nvtxNameCudaEventA_impl_init_v3,comdat
	.weak	nvtxNameCudaEventA_impl_init_v3
	.hidden	nvtxNameCudaEventA_impl_init_v3
	.type	nvtxNameCudaEventA_impl_init_v3, @function
nvtxNameCudaEventA_impl_init_v3:
.LFB8515:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	376+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L517
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L517:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8515:
	.size	nvtxNameCudaEventA_impl_init_v3, .-nvtxNameCudaEventA_impl_init_v3
	.section	.text.nvtxNameCudaStreamW_impl_init_v3,"axG",@progbits,nvtxNameCudaStreamW_impl_init_v3,comdat
	.weak	nvtxNameCudaStreamW_impl_init_v3
	.hidden	nvtxNameCudaStreamW_impl_init_v3
	.type	nvtxNameCudaStreamW_impl_init_v3, @function
nvtxNameCudaStreamW_impl_init_v3:
.LFB8514:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	368+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L520
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L520:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8514:
	.size	nvtxNameCudaStreamW_impl_init_v3, .-nvtxNameCudaStreamW_impl_init_v3
	.section	.text.nvtxNameCudaStreamA_impl_init_v3,"axG",@progbits,nvtxNameCudaStreamA_impl_init_v3,comdat
	.weak	nvtxNameCudaStreamA_impl_init_v3
	.hidden	nvtxNameCudaStreamA_impl_init_v3
	.type	nvtxNameCudaStreamA_impl_init_v3, @function
nvtxNameCudaStreamA_impl_init_v3:
.LFB8513:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	360+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L523
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L523:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8513:
	.size	nvtxNameCudaStreamA_impl_init_v3, .-nvtxNameCudaStreamA_impl_init_v3
	.section	.text.nvtxNameCudaDeviceW_impl_init_v3,"axG",@progbits,nvtxNameCudaDeviceW_impl_init_v3,comdat
	.weak	nvtxNameCudaDeviceW_impl_init_v3
	.hidden	nvtxNameCudaDeviceW_impl_init_v3
	.type	nvtxNameCudaDeviceW_impl_init_v3, @function
nvtxNameCudaDeviceW_impl_init_v3:
.LFB8512:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	352+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L526
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L526:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8512:
	.size	nvtxNameCudaDeviceW_impl_init_v3, .-nvtxNameCudaDeviceW_impl_init_v3
	.section	.text.nvtxNameCudaDeviceA_impl_init_v3,"axG",@progbits,nvtxNameCudaDeviceA_impl_init_v3,comdat
	.weak	nvtxNameCudaDeviceA_impl_init_v3
	.hidden	nvtxNameCudaDeviceA_impl_init_v3
	.type	nvtxNameCudaDeviceA_impl_init_v3, @function
nvtxNameCudaDeviceA_impl_init_v3:
.LFB8511:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	344+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L529
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L529:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8511:
	.size	nvtxNameCudaDeviceA_impl_init_v3, .-nvtxNameCudaDeviceA_impl_init_v3
	.section	.text.nvtxNameClEventW_impl_init_v3,"axG",@progbits,nvtxNameClEventW_impl_init_v3,comdat
	.weak	nvtxNameClEventW_impl_init_v3
	.hidden	nvtxNameClEventW_impl_init_v3
	.type	nvtxNameClEventW_impl_init_v3, @function
nvtxNameClEventW_impl_init_v3:
.LFB8530:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	336+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L532
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L532:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8530:
	.size	nvtxNameClEventW_impl_init_v3, .-nvtxNameClEventW_impl_init_v3
	.section	.text.nvtxNameClEventA_impl_init_v3,"axG",@progbits,nvtxNameClEventA_impl_init_v3,comdat
	.weak	nvtxNameClEventA_impl_init_v3
	.hidden	nvtxNameClEventA_impl_init_v3
	.type	nvtxNameClEventA_impl_init_v3, @function
nvtxNameClEventA_impl_init_v3:
.LFB8529:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	328+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L535
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L535:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8529:
	.size	nvtxNameClEventA_impl_init_v3, .-nvtxNameClEventA_impl_init_v3
	.section	.text.nvtxNameClProgramW_impl_init_v3,"axG",@progbits,nvtxNameClProgramW_impl_init_v3,comdat
	.weak	nvtxNameClProgramW_impl_init_v3
	.hidden	nvtxNameClProgramW_impl_init_v3
	.type	nvtxNameClProgramW_impl_init_v3, @function
nvtxNameClProgramW_impl_init_v3:
.LFB8528:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	320+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L538
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L538:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8528:
	.size	nvtxNameClProgramW_impl_init_v3, .-nvtxNameClProgramW_impl_init_v3
	.section	.text.nvtxNameClProgramA_impl_init_v3,"axG",@progbits,nvtxNameClProgramA_impl_init_v3,comdat
	.weak	nvtxNameClProgramA_impl_init_v3
	.hidden	nvtxNameClProgramA_impl_init_v3
	.type	nvtxNameClProgramA_impl_init_v3, @function
nvtxNameClProgramA_impl_init_v3:
.LFB8527:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	312+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L541
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L541:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8527:
	.size	nvtxNameClProgramA_impl_init_v3, .-nvtxNameClProgramA_impl_init_v3
	.section	.text.nvtxNameClSamplerW_impl_init_v3,"axG",@progbits,nvtxNameClSamplerW_impl_init_v3,comdat
	.weak	nvtxNameClSamplerW_impl_init_v3
	.hidden	nvtxNameClSamplerW_impl_init_v3
	.type	nvtxNameClSamplerW_impl_init_v3, @function
nvtxNameClSamplerW_impl_init_v3:
.LFB8526:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	304+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L544
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L544:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8526:
	.size	nvtxNameClSamplerW_impl_init_v3, .-nvtxNameClSamplerW_impl_init_v3
	.section	.text.nvtxNameClSamplerA_impl_init_v3,"axG",@progbits,nvtxNameClSamplerA_impl_init_v3,comdat
	.weak	nvtxNameClSamplerA_impl_init_v3
	.hidden	nvtxNameClSamplerA_impl_init_v3
	.type	nvtxNameClSamplerA_impl_init_v3, @function
nvtxNameClSamplerA_impl_init_v3:
.LFB8525:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	296+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L547
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L547:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8525:
	.size	nvtxNameClSamplerA_impl_init_v3, .-nvtxNameClSamplerA_impl_init_v3
	.section	.text.nvtxNameClMemObjectW_impl_init_v3,"axG",@progbits,nvtxNameClMemObjectW_impl_init_v3,comdat
	.weak	nvtxNameClMemObjectW_impl_init_v3
	.hidden	nvtxNameClMemObjectW_impl_init_v3
	.type	nvtxNameClMemObjectW_impl_init_v3, @function
nvtxNameClMemObjectW_impl_init_v3:
.LFB8524:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	288+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L550
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L550:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8524:
	.size	nvtxNameClMemObjectW_impl_init_v3, .-nvtxNameClMemObjectW_impl_init_v3
	.section	.text.nvtxNameClMemObjectA_impl_init_v3,"axG",@progbits,nvtxNameClMemObjectA_impl_init_v3,comdat
	.weak	nvtxNameClMemObjectA_impl_init_v3
	.hidden	nvtxNameClMemObjectA_impl_init_v3
	.type	nvtxNameClMemObjectA_impl_init_v3, @function
nvtxNameClMemObjectA_impl_init_v3:
.LFB8523:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	280+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L553
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L553:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8523:
	.size	nvtxNameClMemObjectA_impl_init_v3, .-nvtxNameClMemObjectA_impl_init_v3
	.section	.text.nvtxNameClCommandQueueW_impl_init_v3,"axG",@progbits,nvtxNameClCommandQueueW_impl_init_v3,comdat
	.weak	nvtxNameClCommandQueueW_impl_init_v3
	.hidden	nvtxNameClCommandQueueW_impl_init_v3
	.type	nvtxNameClCommandQueueW_impl_init_v3, @function
nvtxNameClCommandQueueW_impl_init_v3:
.LFB8522:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	272+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L556
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L556:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8522:
	.size	nvtxNameClCommandQueueW_impl_init_v3, .-nvtxNameClCommandQueueW_impl_init_v3
	.section	.text.nvtxNameClCommandQueueA_impl_init_v3,"axG",@progbits,nvtxNameClCommandQueueA_impl_init_v3,comdat
	.weak	nvtxNameClCommandQueueA_impl_init_v3
	.hidden	nvtxNameClCommandQueueA_impl_init_v3
	.type	nvtxNameClCommandQueueA_impl_init_v3, @function
nvtxNameClCommandQueueA_impl_init_v3:
.LFB8521:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	264+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L559
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L559:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8521:
	.size	nvtxNameClCommandQueueA_impl_init_v3, .-nvtxNameClCommandQueueA_impl_init_v3
	.section	.text.nvtxNameClContextW_impl_init_v3,"axG",@progbits,nvtxNameClContextW_impl_init_v3,comdat
	.weak	nvtxNameClContextW_impl_init_v3
	.hidden	nvtxNameClContextW_impl_init_v3
	.type	nvtxNameClContextW_impl_init_v3, @function
nvtxNameClContextW_impl_init_v3:
.LFB8520:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	256+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L562
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L562:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8520:
	.size	nvtxNameClContextW_impl_init_v3, .-nvtxNameClContextW_impl_init_v3
	.section	.text.nvtxNameClContextA_impl_init_v3,"axG",@progbits,nvtxNameClContextA_impl_init_v3,comdat
	.weak	nvtxNameClContextA_impl_init_v3
	.hidden	nvtxNameClContextA_impl_init_v3
	.type	nvtxNameClContextA_impl_init_v3, @function
nvtxNameClContextA_impl_init_v3:
.LFB8519:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	248+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L565
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L565:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8519:
	.size	nvtxNameClContextA_impl_init_v3, .-nvtxNameClContextA_impl_init_v3
	.section	.text.nvtxNameClDeviceW_impl_init_v3,"axG",@progbits,nvtxNameClDeviceW_impl_init_v3,comdat
	.weak	nvtxNameClDeviceW_impl_init_v3
	.hidden	nvtxNameClDeviceW_impl_init_v3
	.type	nvtxNameClDeviceW_impl_init_v3, @function
nvtxNameClDeviceW_impl_init_v3:
.LFB8518:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	240+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L568
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L568:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8518:
	.size	nvtxNameClDeviceW_impl_init_v3, .-nvtxNameClDeviceW_impl_init_v3
	.section	.text.nvtxNameClDeviceA_impl_init_v3,"axG",@progbits,nvtxNameClDeviceA_impl_init_v3,comdat
	.weak	nvtxNameClDeviceA_impl_init_v3
	.hidden	nvtxNameClDeviceA_impl_init_v3
	.type	nvtxNameClDeviceA_impl_init_v3, @function
nvtxNameClDeviceA_impl_init_v3:
.LFB8517:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	232+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L571
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L571:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8517:
	.size	nvtxNameClDeviceA_impl_init_v3, .-nvtxNameClDeviceA_impl_init_v3
	.section	.text.nvtxNameCuEventW_impl_init_v3,"axG",@progbits,nvtxNameCuEventW_impl_init_v3,comdat
	.weak	nvtxNameCuEventW_impl_init_v3
	.hidden	nvtxNameCuEventW_impl_init_v3
	.type	nvtxNameCuEventW_impl_init_v3, @function
nvtxNameCuEventW_impl_init_v3:
.LFB8510:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	224+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L574
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L574:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8510:
	.size	nvtxNameCuEventW_impl_init_v3, .-nvtxNameCuEventW_impl_init_v3
	.section	.text.nvtxNameCuEventA_impl_init_v3,"axG",@progbits,nvtxNameCuEventA_impl_init_v3,comdat
	.weak	nvtxNameCuEventA_impl_init_v3
	.hidden	nvtxNameCuEventA_impl_init_v3
	.type	nvtxNameCuEventA_impl_init_v3, @function
nvtxNameCuEventA_impl_init_v3:
.LFB8509:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	216+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L577
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L577:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8509:
	.size	nvtxNameCuEventA_impl_init_v3, .-nvtxNameCuEventA_impl_init_v3
	.section	.text.nvtxNameCuStreamW_impl_init_v3,"axG",@progbits,nvtxNameCuStreamW_impl_init_v3,comdat
	.weak	nvtxNameCuStreamW_impl_init_v3
	.hidden	nvtxNameCuStreamW_impl_init_v3
	.type	nvtxNameCuStreamW_impl_init_v3, @function
nvtxNameCuStreamW_impl_init_v3:
.LFB8508:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	208+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L580
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L580:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8508:
	.size	nvtxNameCuStreamW_impl_init_v3, .-nvtxNameCuStreamW_impl_init_v3
	.section	.text.nvtxNameCuStreamA_impl_init_v3,"axG",@progbits,nvtxNameCuStreamA_impl_init_v3,comdat
	.weak	nvtxNameCuStreamA_impl_init_v3
	.hidden	nvtxNameCuStreamA_impl_init_v3
	.type	nvtxNameCuStreamA_impl_init_v3, @function
nvtxNameCuStreamA_impl_init_v3:
.LFB8507:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	200+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L583
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L583:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8507:
	.size	nvtxNameCuStreamA_impl_init_v3, .-nvtxNameCuStreamA_impl_init_v3
	.section	.text.nvtxNameCuContextW_impl_init_v3,"axG",@progbits,nvtxNameCuContextW_impl_init_v3,comdat
	.weak	nvtxNameCuContextW_impl_init_v3
	.hidden	nvtxNameCuContextW_impl_init_v3
	.type	nvtxNameCuContextW_impl_init_v3, @function
nvtxNameCuContextW_impl_init_v3:
.LFB8506:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	192+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L586
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L586:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8506:
	.size	nvtxNameCuContextW_impl_init_v3, .-nvtxNameCuContextW_impl_init_v3
	.section	.text.nvtxNameCuContextA_impl_init_v3,"axG",@progbits,nvtxNameCuContextA_impl_init_v3,comdat
	.weak	nvtxNameCuContextA_impl_init_v3
	.hidden	nvtxNameCuContextA_impl_init_v3
	.type	nvtxNameCuContextA_impl_init_v3, @function
nvtxNameCuContextA_impl_init_v3:
.LFB8505:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	184+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L589
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L589:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8505:
	.size	nvtxNameCuContextA_impl_init_v3, .-nvtxNameCuContextA_impl_init_v3
	.section	.text.nvtxNameCuDeviceW_impl_init_v3,"axG",@progbits,nvtxNameCuDeviceW_impl_init_v3,comdat
	.weak	nvtxNameCuDeviceW_impl_init_v3
	.hidden	nvtxNameCuDeviceW_impl_init_v3
	.type	nvtxNameCuDeviceW_impl_init_v3, @function
nvtxNameCuDeviceW_impl_init_v3:
.LFB8504:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	176+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L592
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L592:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8504:
	.size	nvtxNameCuDeviceW_impl_init_v3, .-nvtxNameCuDeviceW_impl_init_v3
	.section	.text.nvtxNameCuDeviceA_impl_init_v3,"axG",@progbits,nvtxNameCuDeviceA_impl_init_v3,comdat
	.weak	nvtxNameCuDeviceA_impl_init_v3
	.hidden	nvtxNameCuDeviceA_impl_init_v3
	.type	nvtxNameCuDeviceA_impl_init_v3, @function
nvtxNameCuDeviceA_impl_init_v3:
.LFB8503:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	168+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L595
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L595:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8503:
	.size	nvtxNameCuDeviceA_impl_init_v3, .-nvtxNameCuDeviceA_impl_init_v3
	.section	.text.nvtxNameOsThreadW_impl_init_v3,"axG",@progbits,nvtxNameOsThreadW_impl_init_v3,comdat
	.weak	nvtxNameOsThreadW_impl_init_v3
	.hidden	nvtxNameOsThreadW_impl_init_v3
	.type	nvtxNameOsThreadW_impl_init_v3, @function
nvtxNameOsThreadW_impl_init_v3:
.LFB8487:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	160+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L598
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L598:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8487:
	.size	nvtxNameOsThreadW_impl_init_v3, .-nvtxNameOsThreadW_impl_init_v3
	.section	.text.nvtxNameOsThreadA_impl_init_v3,"axG",@progbits,nvtxNameOsThreadA_impl_init_v3,comdat
	.weak	nvtxNameOsThreadA_impl_init_v3
	.hidden	nvtxNameOsThreadA_impl_init_v3
	.type	nvtxNameOsThreadA_impl_init_v3, @function
nvtxNameOsThreadA_impl_init_v3:
.LFB8486:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	152+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L601
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L601:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8486:
	.size	nvtxNameOsThreadA_impl_init_v3, .-nvtxNameOsThreadA_impl_init_v3
	.section	.text.nvtxNameCategoryW_impl_init_v3,"axG",@progbits,nvtxNameCategoryW_impl_init_v3,comdat
	.weak	nvtxNameCategoryW_impl_init_v3
	.hidden	nvtxNameCategoryW_impl_init_v3
	.type	nvtxNameCategoryW_impl_init_v3, @function
nvtxNameCategoryW_impl_init_v3:
.LFB8485:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	144+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L604
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L604:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8485:
	.size	nvtxNameCategoryW_impl_init_v3, .-nvtxNameCategoryW_impl_init_v3
	.section	.text.nvtxNameCategoryA_impl_init_v3,"axG",@progbits,nvtxNameCategoryA_impl_init_v3,comdat
	.weak	nvtxNameCategoryA_impl_init_v3
	.hidden	nvtxNameCategoryA_impl_init_v3
	.type	nvtxNameCategoryA_impl_init_v3, @function
nvtxNameCategoryA_impl_init_v3:
.LFB8484:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	136+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L607
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L607:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8484:
	.size	nvtxNameCategoryA_impl_init_v3, .-nvtxNameCategoryA_impl_init_v3
	.section	.text.nvtxRangePop_impl_init_v3,"axG",@progbits,nvtxRangePop_impl_init_v3,comdat
	.weak	nvtxRangePop_impl_init_v3
	.hidden	nvtxRangePop_impl_init_v3
	.type	nvtxRangePop_impl_init_v3, @function
nvtxRangePop_impl_init_v3:
.LFB8483:
	.cfi_startproc
	endbr64
	pushq	%rsi
	.cfi_def_cfa_offset 16
	call	nvtxInitOnce_v3
	movq	128+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L611
	popq	%rcx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L611:
	.cfi_restore_state
	movl	$-2, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8483:
	.size	nvtxRangePop_impl_init_v3, .-nvtxRangePop_impl_init_v3
	.section	.text.nvtxRangePushW_impl_init_v3,"axG",@progbits,nvtxRangePushW_impl_init_v3,comdat
	.weak	nvtxRangePushW_impl_init_v3
	.hidden	nvtxRangePushW_impl_init_v3
	.type	nvtxRangePushW_impl_init_v3, @function
nvtxRangePushW_impl_init_v3:
.LFB8482:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	120+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L614
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L614:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8482:
	.size	nvtxRangePushW_impl_init_v3, .-nvtxRangePushW_impl_init_v3
	.section	.text.nvtxRangePushA_impl_init_v3,"axG",@progbits,nvtxRangePushA_impl_init_v3,comdat
	.weak	nvtxRangePushA_impl_init_v3
	.hidden	nvtxRangePushA_impl_init_v3
	.type	nvtxRangePushA_impl_init_v3, @function
nvtxRangePushA_impl_init_v3:
.LFB8481:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	112+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L617
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L617:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8481:
	.size	nvtxRangePushA_impl_init_v3, .-nvtxRangePushA_impl_init_v3
	.section	.text.nvtxRangePushEx_impl_init_v3,"axG",@progbits,nvtxRangePushEx_impl_init_v3,comdat
	.weak	nvtxRangePushEx_impl_init_v3
	.hidden	nvtxRangePushEx_impl_init_v3
	.type	nvtxRangePushEx_impl_init_v3, @function
nvtxRangePushEx_impl_init_v3:
.LFB8480:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	104+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L620
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L620:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8480:
	.size	nvtxRangePushEx_impl_init_v3, .-nvtxRangePushEx_impl_init_v3
	.section	.text.nvtxRangeEnd_impl_init_v3,"axG",@progbits,nvtxRangeEnd_impl_init_v3,comdat
	.weak	nvtxRangeEnd_impl_init_v3
	.hidden	nvtxRangeEnd_impl_init_v3
	.type	nvtxRangeEnd_impl_init_v3, @function
nvtxRangeEnd_impl_init_v3:
.LFB8479:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	96+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L622
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L622:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8479:
	.size	nvtxRangeEnd_impl_init_v3, .-nvtxRangeEnd_impl_init_v3
	.section	.text.nvtxRangeStartW_impl_init_v3,"axG",@progbits,nvtxRangeStartW_impl_init_v3,comdat
	.weak	nvtxRangeStartW_impl_init_v3
	.hidden	nvtxRangeStartW_impl_init_v3
	.type	nvtxRangeStartW_impl_init_v3, @function
nvtxRangeStartW_impl_init_v3:
.LFB8478:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	88+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L626
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L626:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8478:
	.size	nvtxRangeStartW_impl_init_v3, .-nvtxRangeStartW_impl_init_v3
	.section	.text.nvtxRangeStartA_impl_init_v3,"axG",@progbits,nvtxRangeStartA_impl_init_v3,comdat
	.weak	nvtxRangeStartA_impl_init_v3
	.hidden	nvtxRangeStartA_impl_init_v3
	.type	nvtxRangeStartA_impl_init_v3, @function
nvtxRangeStartA_impl_init_v3:
.LFB8477:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	80+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L629
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L629:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8477:
	.size	nvtxRangeStartA_impl_init_v3, .-nvtxRangeStartA_impl_init_v3
	.section	.text.nvtxRangeStartEx_impl_init_v3,"axG",@progbits,nvtxRangeStartEx_impl_init_v3,comdat
	.weak	nvtxRangeStartEx_impl_init_v3
	.hidden	nvtxRangeStartEx_impl_init_v3
	.type	nvtxRangeStartEx_impl_init_v3, @function
nvtxRangeStartEx_impl_init_v3:
.LFB8476:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	72+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L632
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L632:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8476:
	.size	nvtxRangeStartEx_impl_init_v3, .-nvtxRangeStartEx_impl_init_v3
	.section	.text.nvtxMarkW_impl_init_v3,"axG",@progbits,nvtxMarkW_impl_init_v3,comdat
	.weak	nvtxMarkW_impl_init_v3
	.hidden	nvtxMarkW_impl_init_v3
	.type	nvtxMarkW_impl_init_v3, @function
nvtxMarkW_impl_init_v3:
.LFB8475:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	64+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L634
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L634:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8475:
	.size	nvtxMarkW_impl_init_v3, .-nvtxMarkW_impl_init_v3
	.section	.text.nvtxMarkA_impl_init_v3,"axG",@progbits,nvtxMarkA_impl_init_v3,comdat
	.weak	nvtxMarkA_impl_init_v3
	.hidden	nvtxMarkA_impl_init_v3
	.type	nvtxMarkA_impl_init_v3, @function
nvtxMarkA_impl_init_v3:
.LFB8474:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	56+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L637
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L637:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8474:
	.size	nvtxMarkA_impl_init_v3, .-nvtxMarkA_impl_init_v3
	.section	.text.nvtxMarkEx_impl_init_v3,"axG",@progbits,nvtxMarkEx_impl_init_v3,comdat
	.weak	nvtxMarkEx_impl_init_v3
	.hidden	nvtxMarkEx_impl_init_v3
	.type	nvtxMarkEx_impl_init_v3, @function
nvtxMarkEx_impl_init_v3:
.LFB8473:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	48+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L640
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L640:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE8473:
	.size	nvtxMarkEx_impl_init_v3, .-nvtxMarkEx_impl_init_v3
	.text
	.align 2
	.globl	_ZN6MatrixC2Ev
	.type	_ZN6MatrixC2Ev, @function
_ZN6MatrixC2Ev:
.LFB11199:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	movq	%rax, 16(%rdi)
	movq	%rax, 24(%rdi)
	movq	%rax, 32(%rdi)
	movq	%rax, (%rdi)
	ret
	.cfi_endproc
.LFE11199:
	.size	_ZN6MatrixC2Ev, .-_ZN6MatrixC2Ev
	.globl	_ZN6MatrixC1Ev
	.set	_ZN6MatrixC1Ev,_ZN6MatrixC2Ev
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC4:
	.string	", "
	.text
	.align 2
	.globl	_ZNK6Matrix4showEv
	.type	_ZNK6Matrix4showEv, @function
_ZNK6Matrix4showEv:
.LFB11204:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	leaq	_ZSt4cout(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdi, %rbx
.L645:
	movslq	(%rbx), %rax
	cmpq	%rax, %r12
	jnb	.L644
	movq	%r12, %r14
	xorl	%ebp, %ebp
	salq	$5, %r14
.L648:
	movslq	4(%rbx), %rax
	cmpq	%rax, %rbp
	jnb	.L650
	movq	16(%rbx), %rax
	movq	%r13, %rdi
	movq	8(%rax,%r14), %rax
	movl	(%rax,%rbp,4), %esi
	incq	%rbp
	call	_ZNSolsEi@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L648
.L650:
	movq	%r13, %rdi
	incq	%r12
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	jmp	.L645
.L644:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11204:
	.size	_ZNK6Matrix4showEv, .-_ZNK6Matrix4showEv
	.globl	_Z43__device_stub__Z14matrixMultiplyPimS_mS_miiPimS_mS_mii
	.type	_Z43__device_stub__Z14matrixMultiplyPimS_mS_miiPimS_mS_mii, @function
_Z43__device_stub__Z14matrixMultiplyPimS_mS_miiPimS_mS_mii:
.LFB11233:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L651
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z14matrixMultiplyPimS_mS_mii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L651:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L653
	call	__stack_chk_fail@PLT
.L653:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11233:
	.size	_Z43__device_stub__Z14matrixMultiplyPimS_mS_miiPimS_mS_mii, .-_Z43__device_stub__Z14matrixMultiplyPimS_mS_miiPimS_mS_mii
	.globl	_Z14matrixMultiplyPimS_mS_mii
	.type	_Z14matrixMultiplyPimS_mS_mii, @function
_Z14matrixMultiplyPimS_mS_mii:
.LFB11234:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z14matrixMultiplyPimS_mS_miiPimS_mS_mii
	.cfi_endproc
.LFE11234:
	.size	_Z14matrixMultiplyPimS_mS_mii, .-_Z14matrixMultiplyPimS_mS_mii
	.section	.rodata.str1.1
.LC5:
	.string	"------------------"
.LC6:
	.string	"pause"
	.section	.rodata
	.align 32
.LC0:
	.long	1
	.long	2
	.long	3
	.long	4
	.long	5
	.long	6
	.long	7
	.long	8
	.long	9
	.long	1
	.long	3
	.long	4
	.align 32
.LC1:
	.long	1
	.long	2
	.long	3
	.long	4
	.long	4
	.long	5
	.long	6
	.long	7
	.long	7
	.long	8
	.long	9
	.long	10
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB11208:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	xorl	%esi, %esi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	leaq	_ZZ4mainE3h_c(%rip), %rbx
	subq	$1232, %rsp
	.cfi_def_cfa_offset 1280
	movq	%fs:40, %rax
	movq	%rax, 1224(%rsp)
	xorl	%eax, %eax
	leaq	192(%rsp), %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movq	%rsp, %rdi
	call	cudaStreamCreate@PLT
	leaq	8(%rsp), %rdi
	call	cudaStreamCreate@PLT
	leaq	16(%rsp), %rdi
	call	cudaStreamCreate@PLT
	leaq	32(%rsp), %rsi
	leaq	24(%rsp), %rdi
	movl	$4, %ecx
	movl	$16, %edx
	call	cudaMallocPitch@PLT
	pushq	16(%rsp)
	.cfi_def_cfa_offset 1288
	movl	$4, %r9d
	movq	%rbx, %rdx
	pushq	$1
	.cfi_def_cfa_offset 1296
	movl	$16, %r8d
	movl	$16, %ecx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	cudaMemcpy2DAsync@PLT
	movl	$12, %ecx
	movl	$12, %edx
	leaq	160(%rsp), %rdi
	leaq	.LC0(%rip), %rsi
	rep movsl
	movl	$4, %ecx
	popq	%r8
	.cfi_def_cfa_offset 1288
	popq	%r9
	.cfi_def_cfa_offset 1280
	leaq	40(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMallocPitch@PLT
	movl	$4, %r9d
	movl	$12, %r8d
	leaq	144(%rsp), %rdx
	pushq	(%rsp)
	.cfi_def_cfa_offset 1288
	movl	$12, %ecx
	pushq	$1
	.cfi_def_cfa_offset 1296
	movq	56(%rsp), %rsi
	movq	64(%rsp), %rdi
	call	cudaMemcpy2DAsync@PLT
	leaq	112(%rsp), %rdi
	movl	$12, %ecx
	leaq	.LC1(%rip), %rsi
	rep movsl
	movl	$16, %edx
	movl	$3, %ecx
	popq	%r10
	.cfi_def_cfa_offset 1288
	popq	%r11
	.cfi_def_cfa_offset 1280
	leaq	56(%rsp), %rsi
	leaq	64(%rsp), %rdi
	call	cudaMallocPitch@PLT
	leaq	96(%rsp), %rdx
	pushq	8(%rsp)
	.cfi_def_cfa_offset 1288
	movl	$3, %r9d
	pushq	$1
	.cfi_def_cfa_offset 1296
	movl	$16, %r8d
	movl	$16, %ecx
	movq	72(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	cudaMemcpy2DAsync@PLT
	popq	%rbp
	.cfi_def_cfa_offset 1288
	popq	%r12
	.cfi_def_cfa_offset 1280
	leaq	_ZSt4cout(%rip), %r12
	movq	(%rsp), %rdi
	call	cudaStreamSynchronize@PLT
	movq	8(%rsp), %rdi
	call	cudaStreamSynchronize@PLT
	movq	16(%rsp), %rdi
	call	cudaStreamSynchronize@PLT
	leaq	.LC5(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$4, %esi
	movq	%r12, %rdi
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movl	$1, 80(%rsp)
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	72(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	80(%rsp), %esi
	movl	$1, %ecx
	movabsq	$17179869188, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L657
	pushq	$3
	.cfi_def_cfa_offset 1288
	pushq	$4
	.cfi_def_cfa_offset 1296
	movq	48(%rsp), %r9
	movq	40(%rsp), %r8
	movq	72(%rsp), %rcx
	movq	80(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	64(%rsp), %rdi
	call	_Z43__device_stub__Z14matrixMultiplyPimS_mS_miiPimS_mS_mii
	popq	%rsi
	.cfi_def_cfa_offset 1288
	popq	%rdi
	.cfi_def_cfa_offset 1280
.L657:
	call	cudaDeviceSynchronize@PLT
	movl	$4, %r9d
	movl	$12, %r8d
	movq	%rbx, %rdi
	pushq	%rax
	.cfi_def_cfa_offset 1288
	movl	$12, %esi
	leaq	_ZZ4mainE3h_c(%rip), %rbp
	leaq	.LC4(%rip), %r14
	pushq	$2
	.cfi_def_cfa_offset 1296
	movq	48(%rsp), %rcx
	leaq	64(%rbp), %r13
	movq	40(%rsp), %rdx
	call	cudaMemcpy2D@PLT
	popq	%rdx
	.cfi_def_cfa_offset 1288
	popq	%rcx
	.cfi_def_cfa_offset 1280
.L658:
	xorl	%ebx, %ebx
.L659:
	movl	0(%rbp,%rbx,4), %esi
	movq	%r12, %rdi
	incq	%rbx
	call	_ZNSolsEi@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$3, %rbx
	jne	.L659
	movq	%r12, %rdi
	addq	$16, %rbp
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	cmpq	%r13, %rbp
	jne	.L658
	leaq	.LC6(%rip), %rdi
	call	system@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movq	8(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movq	16(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movq	1224(%rsp), %rax
	subq	%fs:40, %rax
	je	.L661
	call	__stack_chk_fail@PLT
.L661:
	addq	$1232, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11208:
	.size	main, .-main
	.text
	.globl	_Z31__device_stub__Z9showPitchPimiiPimii
	.type	_Z31__device_stub__Z9showPitchPimiiPimii, @function
_Z31__device_stub__Z9showPitchPimiiPimii:
.LFB11235:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L664
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9showPitchPimii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L664:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L666
	call	__stack_chk_fail@PLT
.L666:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11235:
	.size	_Z31__device_stub__Z9showPitchPimiiPimii, .-_Z31__device_stub__Z9showPitchPimiiPimii
	.globl	_Z9showPitchPimii
	.type	_Z9showPitchPimii, @function
_Z9showPitchPimii:
.LFB11236:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z9showPitchPimiiPimii
	.cfi_endproc
.LFE11236:
	.size	_Z9showPitchPimii, .-_Z9showPitchPimii
	.section	.rodata.str1.1
.LC7:
	.string	"_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv"
.LC8:
	.string	"_Z9showPitchPimii"
.LC9:
	.string	"_Z14matrixMultiplyPimS_mS_mii"
.LC10:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std3__45__cpo5beginE"
.LC11:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std3__45__cpo3endE"
.LC12:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std3__45__cpo6cbeginE"
.LC13:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std3__45__cpo4cendE"
.LC14:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std3__45__cpo6rbeginE"
.LC15:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std3__45__cpo4rendE"
.LC16:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std3__45__cpo7crbeginE"
.LC17:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std3__45__cpo5crendE"
.LC18:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std3__450_GLOBAL__N__a2668ab2_17_MatrixMultiply_cu_87f417746ignoreE"
.LC19:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std3__419piecewise_constructE"
.LC20:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std3__48in_placeE"
.LC21:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std3__47nulloptE"
.LC22:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std3__420unreachable_sentinelE"
.LC23:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std6ranges3__45__cpo4swapE"
.LC24:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std6ranges3__45__cpo9iter_moveE"
.LC25:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std6ranges3__45__cpo7advanceE"
.LC26:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std6ranges3__45__cpo5beginE"
.LC27:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std6ranges3__45__cpo3endE"
.LC28:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std6ranges3__45__cpo6cbeginE"
.LC29:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std6ranges3__45__cpo4cendE"
.LC30:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std6ranges3__45__cpo9iter_swapE"
.LC31:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std6ranges3__45__cpo4nextE"
.LC32:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std6ranges3__45__cpo4prevE"
.LC33:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std6ranges3__45__cpo4dataE"
.LC34:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std6ranges3__45__cpo5cdataE"
.LC35:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std6ranges3__45__cpo4sizeE"
.LC36:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std6ranges3__45__cpo5ssizeE"
.LC37:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417744cuda3std6ranges3__45__cpo8distanceE"
.LC38:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417746thrust20THRUST_200700_890_NS8cuda_cub3parE"
.LC39:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417746thrust20THRUST_200700_890_NS8cuda_cub10par_nosyncE"
.LC40:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417746thrust20THRUST_200700_890_NS6system6detail10sequential3seqE"
.LC41:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417746thrust20THRUST_200700_890_NS12placeholders2_1E"
.LC42:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417746thrust20THRUST_200700_890_NS12placeholders2_2E"
.LC43:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417746thrust20THRUST_200700_890_NS12placeholders2_3E"
.LC44:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417746thrust20THRUST_200700_890_NS12placeholders2_4E"
.LC45:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417746thrust20THRUST_200700_890_NS12placeholders2_5E"
.LC46:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417746thrust20THRUST_200700_890_NS12placeholders2_6E"
.LC47:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417746thrust20THRUST_200700_890_NS12placeholders2_7E"
.LC48:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417746thrust20THRUST_200700_890_NS12placeholders2_8E"
.LC49:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417746thrust20THRUST_200700_890_NS12placeholders2_9E"
.LC50:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417746thrust20THRUST_200700_890_NS12placeholders3_10E"
.LC51:
	.string	"_ZN48_INTERNAL_a2668ab2_17_MatrixMultiply_cu_87f417746thrust20THRUST_200700_890_NS3seqE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB11240:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9showPitchPimii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14matrixMultiplyPimS_mS_mii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo5beginE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo3endE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo6cbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo4cendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo6rbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo4rendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo7crbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo5crendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__450_GLOBAL__N__a2668ab2_17_MatrixMultiply_cu_87f417746ignoreE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__48in_placeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC21(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__47nulloptE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC22(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__420unreachable_sentinelE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC23(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC24(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC25(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo7advanceE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC26(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo5beginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC27(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo3endE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC28(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo6cbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC29(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4cendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC30(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC31(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4nextE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC32(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4prevE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC33(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4dataE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC34(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo5cdataE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC35(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4sizeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC36(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo5ssizeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC37(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo8distanceE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC38(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC39(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC40(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC41(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC42(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC43(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC44(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC45(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC46(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC47(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC48(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC49(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC50(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC51(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NSL3seqE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE11240:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE3endEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE3endEv,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE3endEv
	.type	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE3endEv, @function
_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE3endEv:
.LFB11919:
	.cfi_startproc
	endbr64
	movq	24(%rdi), %rdx
	movq	8(%rdi), %rax
	leaq	(%rax,%rdx,4), %rax
	ret
	.cfi_endproc
.LFE11919:
	.size	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE3endEv, .-_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE3endEv
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE3endEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE3endEv,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE3endEv
	.type	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE3endEv, @function
_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE3endEv:
.LFB11921:
	.cfi_startproc
	endbr64
	movq	24(%rdi), %rax
	salq	$5, %rax
	addq	8(%rdi), %rax
	ret
	.cfi_endproc
.LFE11921:
	.size	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE3endEv, .-_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE3endEv
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE10deallocateEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE10deallocateEv,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE10deallocateEv
	.type	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE10deallocateEv, @function
_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE10deallocateEv:
.LFB12153:
	.cfi_startproc
	endbr64
	movq	16(%rdi), %rsi
	testq	%rsi, %rsi
	je	.L679
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	movq	8(%rdi), %rdi
	salq	$5, %rsi
	call	_ZdlPvm@PLT
	xorl	%eax, %eax
	movq	%rax, 8(%rbx)
	movq	%rax, 16(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
.L679:
	.cfi_restore 3
	ret
	.cfi_endproc
.LFE12153:
	.size	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE10deallocateEv, .-_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE10deallocateEv
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv
	.type	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv, @function
_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv:
.LFB12170:
	.cfi_startproc
	endbr64
	movq	16(%rdi), %rsi
	testq	%rsi, %rsi
	je	.L688
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	movq	8(%rdi), %rdi
	salq	$2, %rsi
	call	_ZdlPvm@PLT
	xorl	%eax, %eax
	movq	%rax, 8(%rbx)
	movq	%rax, 16(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
.L688:
	.cfi_restore 3
	ret
	.cfi_endproc
.LFE12170:
	.size	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv, .-_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev, @function
_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev:
.LFB11917:
	.cfi_startproc
	endbr64
	jmp	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv
	.cfi_endproc
.LFE11917:
	.size	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev, .-_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED1Ev,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	.text
	.align 2
	.type	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE7destroyENS1_15normal_iteratorIPS5_EESA_.isra.0, @function
_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE7destroyENS1_15normal_iteratorIPS5_EESA_.isra.0:
.LFB12723:
	.cfi_startproc
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	subq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
	sarq	$5, %rbp
	negq	%rbp
.L693:
	cmpq	%r12, %rbp
	je	.L696
	movq	%rbx, %rdi
	incq	%r12
	addq	$32, %rbx
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	jmp	.L693
.L696:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12723:
	.size	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE7destroyENS1_15normal_iteratorIPS5_EESA_.isra.0, .-_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE7destroyENS1_15normal_iteratorIPS5_EESA_.isra.0
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EED2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EED5Ev,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EED2Ev
	.type	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EED2Ev, @function
_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EED2Ev:
.LFB11911:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	cmpq	$0, 24(%rdi)
	movq	%rdi, %rbx
	je	.L698
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE3endEv
	movq	8(%rbx), %rdi
	movq	%rax, %rsi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE7destroyENS1_15normal_iteratorIPS5_EESA_.isra.0
.L698:
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE10deallocateEv
	.cfi_endproc
.LFE11911:
	.size	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EED2Ev, .-_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EED2Ev
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EED1Ev
	.set	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EED1Ev,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EED2Ev
	.text
	.align 2
	.globl	_ZN6MatrixD2Ev
	.type	_ZN6MatrixD2Ev, @function
_ZN6MatrixD2Ev:
.LFB11206:
	.cfi_startproc
	endbr64
	addq	$8, %rdi
	jmp	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EED2Ev
	.cfi_endproc
.LFE11206:
	.size	_ZN6MatrixD2Ev, .-_ZN6MatrixD2Ev
	.globl	_ZN6MatrixD1Ev
	.set	_ZN6MatrixD1Ev,_ZN6MatrixD2Ev
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE11fill_insertENS1_15normal_iteratorIPiEEmRKi,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE11fill_insertENS1_15normal_iteratorIPiEEmRKi,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE11fill_insertENS1_15normal_iteratorIPiEEmRKi
	.type	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE11fill_insertENS1_15normal_iteratorIPiEEmRKi, @function
_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE11fill_insertENS1_15normal_iteratorIPiEEmRKi:
.LFB12229:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	testq	%rdx, %rdx
	je	.L701
	movq	16(%rdi), %rax
	movq	24(%rdi), %r13
	movq	%rdx, %rbp
	movq	%rdi, %rbx
	movq	%rsi, %r12
	movq	%rcx, %r14
	movq	%rax, %rdx
	subq	%r13, %rdx
	cmpq	%rbp, %rdx
	jb	.L704
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE3endEv
	movq	%r12, %r15
	movq	%rbx, %rdi
	subq	%rax, %r15
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE3endEv
	sarq	$2, %r15
	movq	%rax, (%rsp)
	movq	%r15, %rax
	negq	%rax
	cmpq	%rax, %rbp
	jnb	.L705
	movq	%rbx, %rdi
	imulq	$-4, %rbp, %r13
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE3endEv
	movq	%rbx, %rdi
	movq	%rax, 8(%rsp)
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE3endEv
	movq	%rbx, %rdi
	movq	%rax, %r15
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE3endEv
	movq	8(%rsp), %rdx
	movq	%r15, %rsi
	leaq	(%rax,%r13), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS1_15normal_iteratorIPiEEEES8_T_S9_S8_.isra.0
	movq	(%rsp), %rax
	movq	(%rsp), %rcx
	movq	%r12, %rdx
	addq	%rbp, 24(%rbx)
	addq	%r13, %rax
	movq	%rax, %rsi
	subq	%rax, %rdx
	subq	%r12, %rsi
	addq	%rdx, %rcx
	testq	%rsi, %rsi
	jle	.L706
	cmpq	%r12, %rcx
	jns	.L707
.L706:
	subq	%r12, %rax
	xorl	%edx, %edx
	jmp	.L708
.L707:
	cmpq	%rdx, %r13
	jle	.L706
	sarq	$2, %rdx
	imulq	$-4, %rdx, %rdx
	addq	%rdx, %rcx
	xorl	%edx, %edx
.L709:
	leaq	(%rax,%rdx), %rsi
	cmpq	%rsi, %r12
	je	.L713
	movl	-4(%rax,%rdx), %esi
	movl	%esi, -4(%rcx,%rdx)
	subq	$4, %rdx
	jmp	.L709
.L713:
	movl	(%r14), %edx
	xorl	%eax, %eax
	jmp	.L711
.L708:
	cmpq	%rdx, %rax
	je	.L713
	movl	(%r12,%rdx), %esi
	movl	%esi, (%rcx,%rdx)
	addq	$4, %rdx
	jmp	.L708
.L711:
	movl	%edx, (%r12,%rax,4)
	incq	%rax
	cmpq	%rax, %rbp
	jne	.L711
	jmp	.L701
.L705:
	movq	%rbx, %rdi
	addq	%r15, %rbp
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE3endEv
	movl	(%r14), %ecx
	xorl	%edx, %edx
.L715:
	cmpq	%rdx, %rbp
	je	.L726
	movl	%ecx, (%rax,%rdx,4)
	incq	%rdx
	jmp	.L715
.L726:
	addq	%r13, %rbp
	movq	%rbx, %rdi
	movq	%rbp, 24(%rbx)
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE3endEv
	movq	(%rsp), %rsi
	movq	%r12, %rdi
	movq	%rax, %rdx
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS1_15normal_iteratorIPiEEEES8_T_S9_S8_.isra.0
	subq	%r15, 24(%rbx)
	movl	(%r14), %eax
.L717:
	cmpq	%r12, (%rsp)
	je	.L701
	movl	%eax, (%r12)
	addq	$4, %r12
	jmp	.L717
.L704:
	cmpq	%rbp, %r13
	movq	%rbp, %rsi
	cmovnb	%r13, %rsi
	addq	%rax, %rax
	addq	%r13, %rsi
	cmpq	%rax, %rsi
	cmovb	%rax, %rsi
	xorl	%edx, %edx
	movq	%rdx, 24(%rsp)
	movq	%rdx, 32(%rsp)
	testq	%rsi, %rsi
	je	.L719
	movabsq	$2305843009213693951, %rax
	leaq	16(%rsp), %rdi
	cmpq	%rax, %rsi
	cmova	%rax, %rsi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE8allocateEm.part.0
	jmp	.L720
.L719:
	xorl	%eax, %eax
	movq	%rax, 24(%rsp)
.L720:
	movq	24(%rsp), %rdx
	movq	8(%rbx), %rdi
	movq	%r12, %rsi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS1_15normal_iteratorIPiEEEES8_T_S9_S8_.isra.0
	movl	(%r14), %ecx
	xorl	%edx, %edx
.L721:
	movl	%ecx, (%rax,%rdx,4)
	incq	%rdx
	cmpq	%rdx, %rbp
	jne	.L721
	movq	%rbx, %rdi
	leaq	(%rax,%rbp,4), %r14
	addq	%rbp, %r13
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE3endEv
	movq	%r14, %rdx
	movq	%r12, %rdi
	movq	%rax, %rsi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS1_15normal_iteratorIPiEEEES8_T_S9_S8_.isra.0
	movq	24(%rsp), %rdx
	movq	8(%rbx), %rax
	movq	%r13, 24(%rbx)
	leaq	16(%rsp), %rdi
	movq	%rdx, 8(%rbx)
	movq	32(%rsp), %rdx
	movq	%rax, 24(%rsp)
	movq	16(%rbx), %rax
	movq	%rdx, 16(%rbx)
	movq	%rax, 32(%rsp)
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv
.L701:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L722
	call	__stack_chk_fail@PLT
.L722:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12229:
	.size	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE11fill_insertENS1_15normal_iteratorIPiEEmRKi, .-_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE11fill_insertENS1_15normal_iteratorIPiEEmRKi
	.section	.rodata._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SA_RNS1_18contiguous_storageIiS3_EE.str1.1,"aMS",@progbits,1
.LC52:
	.string	"assignment exceeds max_size()."
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SA_RNS1_18contiguous_storageIiS3_EE,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SA_RNS1_18contiguous_storageIiS3_EE,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SA_RNS1_18contiguous_storageIiS3_EE
	.type	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SA_RNS1_18contiguous_storageIiS3_EE, @function
_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SA_RNS1_18contiguous_storageIiS3_EE:
.LFB12578:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12578
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	testq	%rsi, %rsi
	jne	.L728
	popq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	movq	%r8, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv
.L728:
	.cfi_restore_state
	movq	16(%rdi), %rax
	movq	%rsi, %r9
	addq	%rax, %rax
	cmpq	%rsi, %rax
	cmovb	%rsi, %rax
	movq	%rax, %rsi
	movabsq	$2305843009213693951, %rax
	cmpq	%rax, %rsi
	cmova	%rax, %rsi
	cmpq	%r9, %rsi
	jnb	.L729
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC52(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB0:
	call	_ZNSt12length_errorC1EPKc@PLT
.LEHE0:
	movq	_ZNSt12length_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt12length_error(%rip), %rsi
	movq	%rbx, %rdi
.LEHB1:
	call	__cxa_throw@PLT
.L729:
	movq	%r8, %rdi
	movq	%rdx, %rbx
	movq	%rcx, %rbp
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE8allocateEm.part.0
	movq	8(%r12), %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS1_15normal_iteratorIPKiEEEENS6_IPiEET_SC_SB_.isra.0
.L731:
	.cfi_restore_state
	endbr64
	movq	%rax, %rbp
.L730:
	movq	%rbx, %rdi
	call	__cxa_free_exception@PLT
	movq	%rbp, %rdi
	call	_Unwind_Resume@PLT
.LEHE1:
	.cfi_endproc
.LFE12578:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SA_RNS1_18contiguous_storageIiS3_EE,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SA_RNS1_18contiguous_storageIiS3_EE,comdat
.LLSDA12578:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12578-.LLSDACSB12578
.LLSDACSB12578:
	.uleb128 .LEHB0-.LFB12578
	.uleb128 .LEHE0-.LEHB0
	.uleb128 .L731-.LFB12578
	.uleb128 0
	.uleb128 .LEHB1-.LFB12578
	.uleb128 .LEHE1-.LEHB1
	.uleb128 0
	.uleb128 0
.LLSDACSE12578:
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SA_RNS1_18contiguous_storageIiS3_EE,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SA_RNS1_18contiguous_storageIiS3_EE,comdat
	.size	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SA_RNS1_18contiguous_storageIiS3_EE, .-_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SA_RNS1_18contiguous_storageIiS3_EE
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEaSERKS4_.part.0,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_,comdat
	.align 2
	.type	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEaSERKS4_.part.0, @function
_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEaSERKS4_.part.0:
.LFB12702:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12702
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	24(%rsi), %rbx
	movq	8(%rsi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	salq	$2, %rbx
	leaq	(%rdi,%rbx), %r12
	negq	%rbx
	sarq	$2, %rbx
	negq	%rbx
	cmpq	%rbx, 16(%rbp)
	jnb	.L734
	movq	%rsp, %r13
	xorl	%eax, %eax
	movq	%rdi, %rdx
	movq	%r12, %rcx
	movq	%r13, %r8
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	movq	%rax, 8(%rsp)
	movq	%rax, 16(%rsp)
.LEHB2:
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SA_RNS1_18contiguous_storageIiS3_EE
.LEHE2:
	movq	8(%rsp), %rdx
	movq	8(%rbp), %rax
	movq	%rbx, 24(%rbp)
	movq	%r13, %rdi
	movq	%rdx, 8(%rbp)
	movq	16(%rsp), %rdx
	movq	%rax, 8(%rsp)
	movq	16(%rbp), %rax
	movq	%rdx, 16(%rbp)
	movq	%rax, 16(%rsp)
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv
	jmp	.L733
.L734:
	movq	24(%rbp), %rax
	movq	8(%rbp), %rdx
	cmpq	%rbx, %rax
	jb	.L736
	movq	%r12, %rsi
	call	_ZN6thrust20THRUST_200700_890_NS4copyINS0_6detail15normal_iteratorIPKiEENS3_IPiEEEET0_T_SA_S9_.isra.0
	jmp	.L742
.L736:
	leaq	(%rdi,%rax,4), %r13
	movq	%r13, %rsi
	call	_ZN6thrust20THRUST_200700_890_NS4copyINS0_6detail15normal_iteratorIPKiEENS3_IPiEEEET0_T_SA_S9_.isra.0
	movq	%rbp, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE3endEv
	movq	%r12, %rsi
	movq	%r13, %rdi
	movq	%rax, %rdx
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS1_15normal_iteratorIPKiEEEENS6_IPiEET_SC_SB_.isra.0
.L742:
	movq	%rbx, 24(%rbp)
	jmp	.L733
.L740:
	endbr64
	movq	%rax, %rbx
.L737:
	movq	%r13, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L743
	movq	%rbx, %rdi
.LEHB3:
	call	_Unwind_Resume@PLT
.LEHE3:
.L733:
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L739
.L743:
	call	__stack_chk_fail@PLT
.L739:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12702:
	.section	.gcc_except_table._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEaSERKS4_.part.0,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_,comdat
.LLSDA12702:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12702-.LLSDACSB12702
.LLSDACSB12702:
	.uleb128 .LEHB2-.LFB12702
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L740-.LFB12702
	.uleb128 0
	.uleb128 .LEHB3-.LFB12702
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
.LLSDACSE12702:
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEaSERKS4_.part.0,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_,comdat
	.size	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEaSERKS4_.part.0, .-_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEaSERKS4_.part.0
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC5ERKS4_,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
	.type	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_, @function
_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_:
.LFB12459:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12459
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xorl	%ecx, %ecx
	movq	%rdi, %r8
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%rdx
	.cfi_def_cfa_offset 32
	movq	24(%rsi), %rbx
	movq	%rcx, 8(%rdi)
	movq	8(%rsi), %rdx
	salq	$2, %rbx
	movq	%rcx, 16(%rdi)
	movq	%rcx, 24(%rdi)
	leaq	(%rdx,%rbx), %rcx
	negq	%rbx
	sarq	$2, %rbx
	negq	%rbx
	movq	%rbx, %rsi
.LEHB4:
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SA_RNS1_18contiguous_storageIiS3_EE
.LEHE4:
	movq	%rbx, 24(%rbp)
	popq	%rax
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L746:
	.cfi_restore_state
	endbr64
	movq	%rax, %rbx
.L745:
	movq	%rbp, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv
	movq	%rbx, %rdi
.LEHB5:
	call	_Unwind_Resume@PLT
.LEHE5:
	.cfi_endproc
.LFE12459:
	.section	.gcc_except_table._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC5ERKS4_,comdat
.LLSDA12459:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12459-.LLSDACSB12459
.LLSDACSB12459:
	.uleb128 .LEHB4-.LFB12459
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L746-.LFB12459
	.uleb128 0
	.uleb128 .LEHB5-.LFB12459
	.uleb128 .LEHE5-.LEHB5
	.uleb128 0
	.uleb128 0
.LLSDACSE12459:
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC5ERKS4_,comdat
	.size	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_, .-_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC1ERKS4_
	.set	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC1ERKS4_,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE18uninitialized_copyINS1_15normal_iteratorIPS5_EEEESB_T_SC_SB_,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE18uninitialized_copyINS1_15normal_iteratorIPS5_EEEESB_T_SC_SB_,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE18uninitialized_copyINS1_15normal_iteratorIPS5_EEEESB_T_SC_SB_
	.type	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE18uninitialized_copyINS1_15normal_iteratorIPS5_EEEESB_T_SC_SB_, @function
_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE18uninitialized_copyINS1_15normal_iteratorIPS5_EEEESB_T_SC_SB_:
.LFB12234:
	.cfi_startproc
	endbr64
	movq	%rsi, %rax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	subq	%rdx, %rax
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rcx, %r12
	sarq	$5, %rax
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	imulq	$-32, %rax, %rax
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rsi, %rbx
	pushq	%rdi
	.cfi_def_cfa_offset 48
	leaq	(%rsi,%rax), %r13
	leaq	(%rcx,%rax), %rbp
.L750:
	cmpq	%rbx, %r13
	je	.L753
	movq	%rbx, %rsi
	movq	%r12, %rdi
	addq	$32, %rbx
	addq	$32, %r12
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
	jmp	.L750
.L753:
	popq	%rdx
	.cfi_def_cfa_offset 40
	movq	%rbp, %rax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12234:
	.size	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE18uninitialized_copyINS1_15normal_iteratorIPS5_EEEESB_T_SC_SB_, .-_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE18uninitialized_copyINS1_15normal_iteratorIPS5_EEEESB_T_SC_SB_
	.section	.text._ZN6thrust20THRUST_200700_890_NS20uninitialized_fill_nINS0_6system3cpp6detail3tagEPNS0_11host_vectorIiSaIiEEEmS8_EET0_RKNS0_6detail21execution_policy_baseIT_EESA_T1_RKT2_.isra.0,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_,comdat
	.type	_ZN6thrust20THRUST_200700_890_NS20uninitialized_fill_nINS0_6system3cpp6detail3tagEPNS0_11host_vectorIiSaIiEEEmS8_EET0_RKNS0_6detail21execution_policy_baseIT_EESA_T1_RKT2_.isra.0, @function
_ZN6thrust20THRUST_200700_890_NS20uninitialized_fill_nINS0_6system3cpp6detail3tagEPNS0_11host_vectorIiSaIiEEEmS8_EET0_RKNS0_6detail21execution_policy_baseIT_EESA_T1_RKT2_.isra.0:
.LFB12753:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12753
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	movq	%rdx, %rsi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rbp
	leaq	40(%rsp), %r12
	movq	%rbp, %rdi
.LEHB6:
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
.LEHE6:
	movq	%rbp, %rsi
	movq	%r12, %rdi
.LEHB7:
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
.LEHE7:
	leaq	72(%rsp), %r13
	movq	%r12, %rsi
	movq	%r13, %rdi
.LEHB8:
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
.LEHE8:
	xorl	%r14d, %r14d
.L755:
	cmpq	%r14, %r15
	je	.L769
	movq	%r13, %rsi
	movq	%rbx, %rdi
.LEHB9:
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
.LEHE9:
	addq	$32, %rbx
	incq	%r14
	jmp	.L755
.L769:
	movq	%r13, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	movq	%r12, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	movq	%rbp, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L761
	jmp	.L767
.L765:
	endbr64
	movq	%rax, %rbx
.L757:
	movq	%r13, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	jmp	.L758
.L764:
	endbr64
	movq	%rax, %rbx
.L758:
	movq	%r12, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	jmp	.L759
.L763:
	endbr64
	movq	%rax, %rbx
.L759:
	movq	%rbp, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L767
	movq	%rbx, %rdi
.LEHB10:
	call	_Unwind_Resume@PLT
.LEHE10:
.L767:
	call	__stack_chk_fail@PLT
.L761:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12753:
	.section	.gcc_except_table._ZN6thrust20THRUST_200700_890_NS20uninitialized_fill_nINS0_6system3cpp6detail3tagEPNS0_11host_vectorIiSaIiEEEmS8_EET0_RKNS0_6detail21execution_policy_baseIT_EESA_T1_RKT2_.isra.0,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_,comdat
.LLSDA12753:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12753-.LLSDACSB12753
.LLSDACSB12753:
	.uleb128 .LEHB6-.LFB12753
	.uleb128 .LEHE6-.LEHB6
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB7-.LFB12753
	.uleb128 .LEHE7-.LEHB7
	.uleb128 .L763-.LFB12753
	.uleb128 0
	.uleb128 .LEHB8-.LFB12753
	.uleb128 .LEHE8-.LEHB8
	.uleb128 .L764-.LFB12753
	.uleb128 0
	.uleb128 .LEHB9-.LFB12753
	.uleb128 .LEHE9-.LEHB9
	.uleb128 .L765-.LFB12753
	.uleb128 0
	.uleb128 .LEHB10-.LFB12753
	.uleb128 .LEHE10-.LEHB10
	.uleb128 0
	.uleb128 0
.LLSDACSE12753:
	.section	.text._ZN6thrust20THRUST_200700_890_NS20uninitialized_fill_nINS0_6system3cpp6detail3tagEPNS0_11host_vectorIiSaIiEEEmS8_EET0_RKNS0_6detail21execution_policy_baseIT_EESA_T1_RKT2_.isra.0,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_,comdat
	.size	_ZN6thrust20THRUST_200700_890_NS20uninitialized_fill_nINS0_6system3cpp6detail3tagEPNS0_11host_vectorIiSaIiEEEmS8_EET0_RKNS0_6detail21execution_policy_baseIT_EESA_T1_RKT2_.isra.0, .-_ZN6thrust20THRUST_200700_890_NS20uninitialized_fill_nINS0_6system3cpp6detail3tagEPNS0_11host_vectorIiSaIiEEEmS8_EET0_RKNS0_6detail21execution_policy_baseIT_EESA_T1_RKT2_.isra.0
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail21host_generate_functorINS1_12fill_functorINS0_11host_vectorIiSaIiEEEEEEclIS6_EEvRKT_,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail21host_generate_functorINS1_12fill_functorINS0_11host_vectorIiSaIiEEEEEEclIS6_EEvRKT_,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail21host_generate_functorINS1_12fill_functorINS0_11host_vectorIiSaIiEEEEEEclIS6_EEvRKT_
	.type	_ZN6thrust20THRUST_200700_890_NS6detail21host_generate_functorINS1_12fill_functorINS0_11host_vectorIiSaIiEEEEEEclIS6_EEvRKT_, @function
_ZN6thrust20THRUST_200700_890_NS6detail21host_generate_functorINS1_12fill_functorINS0_11host_vectorIiSaIiEEEEEEclIS6_EEvRKT_:
.LFB12579:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rsi, %rbx
	movq	%rdi, %rsi
	subq	$72, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rbp
	movq	%rbp, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
	cmpq	$0, 16(%rbx)
	je	.L771
	movq	%rbx, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv
.L771:
	movq	32(%rsp), %rax
	xorl	%edx, %edx
	movq	%rsp, %rdi
	movq	%rdx, 16(%rsp)
	movq	%rax, 8(%rbx)
	movq	40(%rsp), %rax
	movq	%rdx, 32(%rsp)
	movq	%rax, 16(%rbx)
	xorl	%eax, %eax
	movq	%rax, 40(%rsp)
	movq	48(%rsp), %rax
	movq	%rdx, 8(%rsp)
	movq	%rax, 24(%rbx)
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv
	xorl	%ecx, %ecx
	movq	%rbp, %rdi
	movq	%rcx, 48(%rsp)
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L772
	call	__stack_chk_fail@PLT
.L772:
	addq	$72, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12579:
	.size	_ZN6thrust20THRUST_200700_890_NS6detail21host_generate_functorINS1_12fill_functorINS0_11host_vectorIiSaIiEEEEEEclIS6_EEvRKT_, .-_ZN6thrust20THRUST_200700_890_NS6detail21host_generate_functorINS1_12fill_functorINS0_11host_vectorIiSaIiEEEEEEclIS6_EEvRKT_
	.section	.text._ZN6thrust20THRUST_200700_890_NS4fillINS0_6detail15normal_iteratorIPNS0_11host_vectorIiSaIiEEEEES6_EEvT_S9_RKT0_,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS4fillINS0_6detail15normal_iteratorIPNS0_11host_vectorIiSaIiEEEEES6_EEvT_S9_RKT0_,comdat
	.weak	_ZN6thrust20THRUST_200700_890_NS4fillINS0_6detail15normal_iteratorIPNS0_11host_vectorIiSaIiEEEEES6_EEvT_S9_RKT0_
	.type	_ZN6thrust20THRUST_200700_890_NS4fillINS0_6detail15normal_iteratorIPNS0_11host_vectorIiSaIiEEEEES6_EEvT_S9_RKT0_, @function
_ZN6thrust20THRUST_200700_890_NS4fillINS0_6detail15normal_iteratorIPNS0_11host_vectorIiSaIiEEEEES6_EEvT_S9_RKT0_:
.LFB12238:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12238
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	movq	%rdx, %rsi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$232, %rsp
	.cfi_def_cfa_offset 288
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
.LEHB11:
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
.LEHE11:
	leaq	56(%rsp), %rax
	movq	(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
.LEHB12:
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
.LEHE12:
	leaq	120(%rsp), %rbp
	movq	8(%rsp), %rsi
	movq	%rbp, %rdi
.LEHB13:
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
.LEHE13:
	leaq	88(%rsp), %r12
	movq	%rbp, %rsi
	movq	%r12, %rdi
.LEHB14:
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
.LEHE14:
	leaq	152(%rsp), %r13
	movq	%r12, %rsi
	movq	%r13, %rdi
.LEHB15:
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
.LEHE15:
	leaq	184(%rsp), %r14
	movq	%r13, %rsi
	movq	%r14, %rdi
.LEHB16:
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
.LEHE16:
.L775:
	cmpq	%r15, %rbx
	je	.L793
	movq	%rbx, %rsi
	movq	%r14, %rdi
.LEHB17:
	call	_ZN6thrust20THRUST_200700_890_NS6detail21host_generate_functorINS1_12fill_functorINS0_11host_vectorIiSaIiEEEEEEclIS6_EEvRKT_
.LEHE17:
	addq	$32, %rbx
	jmp	.L775
.L793:
	movq	%r14, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	movq	%r13, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	movq	%r12, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	movq	%rbp, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	movq	8(%rsp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	movq	(%rsp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L784
	jmp	.L791
.L790:
	endbr64
	movq	%rax, %rbx
.L777:
	movq	%r14, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	jmp	.L778
.L789:
	endbr64
	movq	%rax, %rbx
.L778:
	movq	%r13, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	jmp	.L779
.L788:
	endbr64
	movq	%rax, %rbx
.L779:
	movq	%r12, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	jmp	.L780
.L787:
	endbr64
	movq	%rax, %rbx
.L780:
	movq	%rbp, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	jmp	.L781
.L786:
	endbr64
	movq	%rax, %rbx
.L781:
	movq	8(%rsp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	jmp	.L782
.L785:
	endbr64
	movq	%rax, %rbx
.L782:
	movq	(%rsp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L791
	movq	%rbx, %rdi
.LEHB18:
	call	_Unwind_Resume@PLT
.LEHE18:
.L791:
	call	__stack_chk_fail@PLT
.L784:
	addq	$232, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12238:
	.section	.gcc_except_table._ZN6thrust20THRUST_200700_890_NS4fillINS0_6detail15normal_iteratorIPNS0_11host_vectorIiSaIiEEEEES6_EEvT_S9_RKT0_,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS4fillINS0_6detail15normal_iteratorIPNS0_11host_vectorIiSaIiEEEEES6_EEvT_S9_RKT0_,comdat
.LLSDA12238:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE12238-.LLSDACSB12238
.LLSDACSB12238:
	.uleb128 .LEHB11-.LFB12238
	.uleb128 .LEHE11-.LEHB11
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB12-.LFB12238
	.uleb128 .LEHE12-.LEHB12
	.uleb128 .L785-.LFB12238
	.uleb128 0
	.uleb128 .LEHB13-.LFB12238
	.uleb128 .LEHE13-.LEHB13
	.uleb128 .L786-.LFB12238
	.uleb128 0
	.uleb128 .LEHB14-.LFB12238
	.uleb128 .LEHE14-.LEHB14
	.uleb128 .L787-.LFB12238
	.uleb128 0
	.uleb128 .LEHB15-.LFB12238
	.uleb128 .LEHE15-.LEHB15
	.uleb128 .L788-.LFB12238
	.uleb128 0
	.uleb128 .LEHB16-.LFB12238
	.uleb128 .LEHE16-.LEHB16
	.uleb128 .L789-.LFB12238
	.uleb128 0
	.uleb128 .LEHB17-.LFB12238
	.uleb128 .LEHE17-.LEHB17
	.uleb128 .L790-.LFB12238
	.uleb128 0
	.uleb128 .LEHB18-.LFB12238
	.uleb128 .LEHE18-.LEHB18
	.uleb128 0
	.uleb128 0
.LLSDACSE12238:
	.section	.text._ZN6thrust20THRUST_200700_890_NS4fillINS0_6detail15normal_iteratorIPNS0_11host_vectorIiSaIiEEEEES6_EEvT_S9_RKT0_,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS4fillINS0_6detail15normal_iteratorIPNS0_11host_vectorIiSaIiEEEEES6_EEvT_S9_RKT0_,comdat
	.size	_ZN6thrust20THRUST_200700_890_NS4fillINS0_6detail15normal_iteratorIPNS0_11host_vectorIiSaIiEEEEES6_EEvT_S9_RKT0_, .-_ZN6thrust20THRUST_200700_890_NS4fillINS0_6detail15normal_iteratorIPNS0_11host_vectorIiSaIiEEEEES6_EEvT_S9_RKT0_
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_,comdat
	.align 2
	.weak	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_
	.type	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_, @function
_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_:
.LFB12180:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA12180
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$248, %rsp
	.cfi_def_cfa_offset 304
	movq	%rcx, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
	testq	%rdx, %rdx
	je	.L794
	movq	%rdx, %rbx
	movq	16(%rdi), %rdx
	movq	24(%rdi), %r14
	movq	%rdi, %r12
	movq	%rsi, %rbp
	movq	%rdx, %rax
	subq	%r14, %rax
	cmpq	%rbx, %rax
	jb	.L796
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE3endEv
	movq	%rbp, %r14
	movq	%r12, %rdi
	subq	%rax, %r14
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE3endEv
	sarq	$5, %r14
	movq	%rax, %r13
	movq	%r14, %rax
	negq	%rax
	cmpq	%rax, %rbx
	jnb	.L797
	movq	%r12, %rdi
	imulq	$-32, %rbx, %r14
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE3endEv
	movq	%r12, %rdi
	movq	%rax, 16(%rsp)
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE3endEv
	movq	%r12, %rdi
	movq	%rax, %r15
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE3endEv
	movq	16(%rsp), %rcx
	movq	%r15, %rdx
	movq	%r12, %rdi
	leaq	(%rax,%r14), %rsi
.LEHB19:
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE18uninitialized_copyINS1_15normal_iteratorIPS5_EEEESB_T_SC_SB_
	addq	%rbx, 24(%r12)
	leaq	0(%r13,%r14), %r12
	movq	%rbp, %rax
	movq	%r12, %rdx
	subq	%r12, %rax
	subq	%rbp, %rdx
	addq	%rax, %r13
	testq	%rdx, %rdx
	jg	.L798
.L800:
	movq	%rbp, %r14
	jmp	.L799
.L798:
	cmpq	%rbp, %r13
	js	.L800
	cmpq	%rax, %r14
	jle	.L800
	sarq	$5, %rax
	imulq	$-32, %rax, %rax
	addq	%rax, %r13
.L801:
	cmpq	%r12, %rbp
	je	.L807
	subq	$32, %r12
	subq	$32, %r13
	cmpq	%r13, %r12
	je	.L801
	movq	%r12, %rsi
	movq	%r13, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEaSERKS4_.part.0
	jmp	.L801
.L806:
	cmpq	%r14, %r13
	je	.L805
	movq	%r14, %rsi
	movq	%r13, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEaSERKS4_.part.0
.L805:
	addq	$32, %r13
	addq	$32, %r14
.L799:
	cmpq	%r14, %r12
	jne	.L806
.L807:
	leaq	40(%rsp), %rax
	movq	8(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
.LEHE19:
	leaq	72(%rsp), %rax
	movq	16(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
.LEHB20:
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
.LEHE20:
	leaq	136(%rsp), %rax
	movq	8(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
.LEHB21:
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
.LEHE21:
	leaq	104(%rsp), %r12
	movq	24(%rsp), %rsi
	movq	%r12, %rdi
.LEHB22:
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
.LEHE22:
	leaq	168(%rsp), %r13
	movq	%r12, %rsi
	movq	%r13, %rdi
.LEHB23:
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
.LEHE23:
	leaq	200(%rsp), %r14
	movq	%r13, %rsi
	movq	%r14, %rdi
.LEHB24:
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEEC2ERKS4_
.LEHE24:
	xorl	%r15d, %r15d
.L808:
	movq	%rbp, %rsi
	movq	%r14, %rdi
.LEHB25:
	call	_ZN6thrust20THRUST_200700_890_NS6detail21host_generate_functorINS1_12fill_functorINS0_11host_vectorIiSaIiEEEEEEclIS6_EEvRKT_
.LEHE25:
	incq	%r15
	addq	$32, %rbp
	cmpq	%r15, %rbx
	jne	.L808
	movq	%r14, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	movq	%r13, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	movq	%r12, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	movq	24(%rsp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	movq	8(%rsp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	movq	16(%rsp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	jmp	.L794
.L832:
	endbr64
	movq	%rax, %rbx
.L809:
	movq	%r14, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	jmp	.L810
.L831:
	endbr64
	movq	%rax, %rbx
.L810:
	movq	%r13, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	jmp	.L811
.L830:
	endbr64
	movq	%rax, %rbx
.L811:
	movq	%r12, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	jmp	.L812
.L829:
	endbr64
	movq	%rax, %rbx
.L812:
	movq	24(%rsp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	jmp	.L813
.L828:
	endbr64
	movq	%rax, %rbx
.L813:
	movq	8(%rsp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	jmp	.L814
.L827:
	endbr64
	movq	%rax, %rbx
.L814:
	movq	16(%rsp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	jmp	.L842
.L797:
	movq	%r12, %rdi
	addq	%r14, %rbx
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE3endEv
	movq	8(%rsp), %rdx
	movq	%rbx, %rsi
	movq	%rax, %rdi
.LEHB26:
	call	_ZN6thrust20THRUST_200700_890_NS20uninitialized_fill_nINS0_6system3cpp6detail3tagEPNS0_11host_vectorIiSaIiEEEmS8_EET0_RKNS0_6detail21execution_policy_baseIT_EESA_T1_RKT2_.isra.0
	addq	%rbx, 24(%r12)
	movq	%r12, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE3endEv
	movq	%r13, %rdx
	movq	%rbp, %rsi
	movq	%r12, %rdi
	movq	%rax, %rcx
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE18uninitialized_copyINS1_15normal_iteratorIPS5_EEEESB_T_SC_SB_
	subq	%r14, 24(%r12)
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L841
	movq	8(%rsp), %rdx
	addq	$248, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movq	%r13, %rsi
	movq	%rbp, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZN6thrust20THRUST_200700_890_NS4fillINS0_6detail15normal_iteratorIPNS0_11host_vectorIiSaIiEEEEES6_EEvT_S9_RKT0_
.L796:
	.cfi_restore_state
	cmpq	%rbx, %r14
	movq	%rbx, %rax
	cmovnb	%r14, %rax
	addq	%rdx, %rdx
	addq	%r14, %rax
	cmpq	%rdx, %rax
	cmovb	%rdx, %rax
	xorl	%edx, %edx
	movq	%rdx, 216(%rsp)
	testq	%rax, %rax
	je	.L817
	movabsq	$288230376151711743, %rdx
	cmpq	%rdx, %rax
	cmovbe	%rax, %rdx
	movq	%rdx, %rdi
	movq	%rdx, %r13
	salq	$5, %rdi
	call	_Znwm@PLT
.LEHE26:
	movq	%r13, 216(%rsp)
	movq	%rax, 208(%rsp)
	jmp	.L818
.L817:
	xorl	%eax, %eax
	movq	%rax, 208(%rsp)
.L818:
	movq	208(%rsp), %r15
	movq	8(%r12), %rsi
	movq	%rbp, %rdx
	movq	%r12, %rdi
	leaq	200(%rsp), %rax
	movq	%r15, %rcx
	movq	%rax, 16(%rsp)
.LEHB27:
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE18uninitialized_copyINS1_15normal_iteratorIPS5_EEEESB_T_SC_SB_
.LEHE27:
	movq	8(%rsp), %rdx
	movq	%rbx, %rsi
	movq	%rax, %rdi
	movq	%rax, %r13
.LEHB28:
	call	_ZN6thrust20THRUST_200700_890_NS20uninitialized_fill_nINS0_6system3cpp6detail3tagEPNS0_11host_vectorIiSaIiEEEmS8_EET0_RKNS0_6detail21execution_policy_baseIT_EESA_T1_RKT2_.isra.0
	movq	%rbx, %rax
	movq	%r12, %rdi
	salq	$5, %rax
	addq	%rax, %r13
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE3endEv
	movq	%r13, %rcx
	movq	%rbp, %rsi
	movq	%r12, %rdi
	movq	%rax, %rdx
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE18uninitialized_copyINS1_15normal_iteratorIPS5_EEEESB_T_SC_SB_
.LEHE28:
	movq	%r12, %rdi
	addq	%rbx, %r14
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE3endEv
	movq	8(%r12), %rdi
	movq	%rax, %rsi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE7destroyENS1_15normal_iteratorIPS5_EESA_.isra.0
	movq	8(%r12), %rax
	movq	%r14, 24(%r12)
	movq	208(%rsp), %rdx
	movq	16(%rsp), %rdi
	movq	%rax, 208(%rsp)
	movq	16(%r12), %rax
	movq	%rdx, 8(%r12)
	movq	216(%rsp), %rdx
	movq	%rax, 216(%rsp)
	movq	%rdx, 16(%r12)
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE10deallocateEv
	jmp	.L794
.L833:
	endbr64
.L819:
	movq	%r15, %r13
	jmp	.L820
.L825:
	endbr64
.L820:
	movq	%rax, %rdi
	call	__cxa_begin_catch@PLT
	movq	%r15, %rdi
	movq	%r13, %rsi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE7destroyENS1_15normal_iteratorIPS5_EESA_.isra.0
	movq	16(%rsp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE10deallocateEv
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L841
.LEHB29:
	call	__cxa_rethrow@PLT
.LEHE29:
.L826:
	endbr64
	movq	%rax, %rbx
.L822:
	call	__cxa_end_catch@PLT
	movq	16(%rsp), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageINS0_11host_vectorIiSaIiEEESaIS5_EE10deallocateEv
.L842:
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L841
	movq	%rbx, %rdi
.LEHB30:
	call	_Unwind_Resume@PLT
.LEHE30:
.L794:
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L824
.L841:
	call	__stack_chk_fail@PLT
.L824:
	addq	$248, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12180:
	.section	.gcc_except_table._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_,comdat
	.align 4
.LLSDA12180:
	.byte	0xff
	.byte	0x9b
	.uleb128 .LLSDATT12180-.LLSDATTD12180
.LLSDATTD12180:
	.byte	0x1
	.uleb128 .LLSDACSE12180-.LLSDACSB12180
.LLSDACSB12180:
	.uleb128 .LEHB19-.LFB12180
	.uleb128 .LEHE19-.LEHB19
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB20-.LFB12180
	.uleb128 .LEHE20-.LEHB20
	.uleb128 .L827-.LFB12180
	.uleb128 0
	.uleb128 .LEHB21-.LFB12180
	.uleb128 .LEHE21-.LEHB21
	.uleb128 .L828-.LFB12180
	.uleb128 0
	.uleb128 .LEHB22-.LFB12180
	.uleb128 .LEHE22-.LEHB22
	.uleb128 .L829-.LFB12180
	.uleb128 0
	.uleb128 .LEHB23-.LFB12180
	.uleb128 .LEHE23-.LEHB23
	.uleb128 .L830-.LFB12180
	.uleb128 0
	.uleb128 .LEHB24-.LFB12180
	.uleb128 .LEHE24-.LEHB24
	.uleb128 .L831-.LFB12180
	.uleb128 0
	.uleb128 .LEHB25-.LFB12180
	.uleb128 .LEHE25-.LEHB25
	.uleb128 .L832-.LFB12180
	.uleb128 0
	.uleb128 .LEHB26-.LFB12180
	.uleb128 .LEHE26-.LEHB26
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB27-.LFB12180
	.uleb128 .LEHE27-.LEHB27
	.uleb128 .L833-.LFB12180
	.uleb128 0x1
	.uleb128 .LEHB28-.LFB12180
	.uleb128 .LEHE28-.LEHB28
	.uleb128 .L825-.LFB12180
	.uleb128 0x1
	.uleb128 .LEHB29-.LFB12180
	.uleb128 .LEHE29-.LEHB29
	.uleb128 .L826-.LFB12180
	.uleb128 0
	.uleb128 .LEHB30-.LFB12180
	.uleb128 .LEHE30-.LEHB30
	.uleb128 0
	.uleb128 0
.LLSDACSE12180:
	.byte	0x1
	.byte	0
	.align 4
	.long	0

.LLSDATT12180:
	.section	.text._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_,comdat
	.size	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_, .-_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_
	.text
	.align 2
	.globl	_ZN6MatrixC2Eii
	.type	_ZN6MatrixC2Eii, @function
_ZN6MatrixC2Eii:
.LFB11202:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA11202
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	xorl	%ecx, %ecx
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdi, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movq	%rcx, 16(%rdi)
	leaq	8(%rsp), %rbp
	movq	%rcx, 24(%rdi)
	movq	%rcx, 32(%rdi)
	movl	%esi, (%rdi)
	movl	%edx, 4(%rdi)
.L844:
	movslq	(%rbx), %rax
	cmpq	%rax, %r13
	jnb	.L855
	xorl	%eax, %eax
	xorl	%r14d, %r14d
	movq	%rax, 16(%rsp)
	movq	%rax, 24(%rsp)
	movq	%rax, 32(%rsp)
.L845:
	movslq	4(%rbx), %rax
	cmpq	%rax, %r14
	jnb	.L856
	call	rand@PLT
	movq	%rbp, %rdi
	movl	%eax, %r12d
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE3endEv
	movl	$100, %ecx
	movq	%rbp, %rdi
	movq	%rax, %rsi
	movl	%r12d, %eax
	cltd
	idivl	%ecx
	leaq	4(%rsp), %rcx
	movl	%edx, 4(%rsp)
	movl	$1, %edx
.LEHB31:
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEE11fill_insertENS1_15normal_iteratorIPiEEmRKi
	incq	%r14
	jmp	.L845
.L856:
	leaq	8(%rbx), %r12
	movq	%r12, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE3endEv
	movq	%rbp, %rcx
	movl	$1, %edx
	movq	%r12, %rdi
	movq	%rax, %rsi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EE11fill_insertENS1_15normal_iteratorIPS5_EEmRKS5_
.LEHE31:
	movq	%rbp, %rdi
	incq	%r13
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	jmp	.L844
.L851:
	endbr64
	movq	%rax, %r12
.L848:
	movq	%rbp, %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiSaIiEED2Ev
	leaq	8(%rbx), %rdi
	call	_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseINS0_11host_vectorIiSaIiEEESaIS5_EED2Ev
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L854
	movq	%r12, %rdi
.LEHB32:
	call	_Unwind_Resume@PLT
.LEHE32:
.L855:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L850
.L854:
	call	__stack_chk_fail@PLT
.L850:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11202:
	.section	.gcc_except_table,"a",@progbits
.LLSDA11202:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE11202-.LLSDACSB11202
.LLSDACSB11202:
	.uleb128 .LEHB31-.LFB11202
	.uleb128 .LEHE31-.LEHB31
	.uleb128 .L851-.LFB11202
	.uleb128 0
	.uleb128 .LEHB32-.LFB11202
	.uleb128 .LEHE32-.LEHB32
	.uleb128 0
	.uleb128 0
.LLSDACSE11202:
	.text
	.size	_ZN6MatrixC2Eii, .-_ZN6MatrixC2Eii
	.globl	_ZN6MatrixC1Eii
	.set	_ZN6MatrixC1Eii,_ZN6MatrixC2Eii
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZZ4mainE3h_c
	.comm	_ZZ4mainE3h_c,64,32
	.weak	_ZN4cuda3std3__420unreachable_sentinelE
	.section	.rodata._ZN4cuda3std3__420unreachable_sentinelE,"aG",@progbits,_ZN4cuda3std3__420unreachable_sentinelE,comdat
	.type	_ZN4cuda3std3__420unreachable_sentinelE, @gnu_unique_object
	.size	_ZN4cuda3std3__420unreachable_sentinelE, 1
_ZN4cuda3std3__420unreachable_sentinelE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo5crendE
	.section	.rodata._ZN4cuda3std3__45__cpo5crendE,"aG",@progbits,_ZN4cuda3std3__45__cpo5crendE,comdat
	.type	_ZN4cuda3std3__45__cpo5crendE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo5crendE, 1
_ZN4cuda3std3__45__cpo5crendE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo7crbeginE
	.section	.rodata._ZN4cuda3std3__45__cpo7crbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo7crbeginE,comdat
	.type	_ZN4cuda3std3__45__cpo7crbeginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo7crbeginE, 1
_ZN4cuda3std3__45__cpo7crbeginE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo4rendE
	.section	.rodata._ZN4cuda3std3__45__cpo4rendE,"aG",@progbits,_ZN4cuda3std3__45__cpo4rendE,comdat
	.type	_ZN4cuda3std3__45__cpo4rendE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo4rendE, 1
_ZN4cuda3std3__45__cpo4rendE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo6rbeginE
	.section	.rodata._ZN4cuda3std3__45__cpo6rbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo6rbeginE,comdat
	.type	_ZN4cuda3std3__45__cpo6rbeginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo6rbeginE, 1
_ZN4cuda3std3__45__cpo6rbeginE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo8distanceE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo8distanceE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo8distanceE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo8distanceE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo8distanceE, 1
_ZN4cuda3std6ranges3__45__cpo8distanceE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo5ssizeE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo5ssizeE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5ssizeE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo5ssizeE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo5ssizeE, 1
_ZN4cuda3std6ranges3__45__cpo5ssizeE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4sizeE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4sizeE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4sizeE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4sizeE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4sizeE, 1
_ZN4cuda3std6ranges3__45__cpo4sizeE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo5cdataE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo5cdataE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5cdataE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo5cdataE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo5cdataE, 1
_ZN4cuda3std6ranges3__45__cpo5cdataE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4dataE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4dataE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4dataE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4dataE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4dataE, 1
_ZN4cuda3std6ranges3__45__cpo4dataE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4prevE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4prevE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4prevE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4prevE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4prevE, 1
_ZN4cuda3std6ranges3__45__cpo4prevE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4nextE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4nextE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4nextE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4nextE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4nextE, 1
_ZN4cuda3std6ranges3__45__cpo4nextE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_swapE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_swapE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4cendE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4cendE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4cendE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4cendE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4cendE, 1
_ZN4cuda3std6ranges3__45__cpo4cendE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo6cbeginE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo6cbeginE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo6cbeginE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo6cbeginE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo6cbeginE, 1
_ZN4cuda3std6ranges3__45__cpo6cbeginE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo3endE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo3endE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo3endE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo3endE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo3endE, 1
_ZN4cuda3std6ranges3__45__cpo3endE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo5beginE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo5beginE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5beginE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo5beginE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo5beginE, 1
_ZN4cuda3std6ranges3__45__cpo5beginE:
	.zero	1
	.weak	_ZN4cuda3std3__47nulloptE
	.section	.rodata._ZN4cuda3std3__47nulloptE,"aG",@progbits,_ZN4cuda3std3__47nulloptE,comdat
	.type	_ZN4cuda3std3__47nulloptE, @gnu_unique_object
	.size	_ZN4cuda3std3__47nulloptE, 1
_ZN4cuda3std3__47nulloptE:
	.zero	1
	.hidden	InitializeInjectionNvtx2_fnptr
	.weak	InitializeInjectionNvtx2_fnptr
	.bss
	.align 8
	.type	InitializeInjectionNvtx2_fnptr, @object
	.size	InitializeInjectionNvtx2_fnptr, 8
InitializeInjectionNvtx2_fnptr:
	.zero	8
	.hidden	nvtxGlobals_v3
	.weak	nvtxGlobals_v3
	.section	.data.rel.local,"aw"
	.align 32
	.type	nvtxGlobals_v3, @object
	.size	nvtxGlobals_v3, 1168
nvtxGlobals_v3:
	.long	0
	.zero	4
	.quad	16
	.quad	nvtxEtiGetModuleFunctionTable_v3
	.quad	24
	.long	3
	.long	0
	.quad	nvtxEtiSetInjectionNvtxVersion_v3
	.quad	nvtxMarkEx_impl_init_v3
	.quad	nvtxMarkA_impl_init_v3
	.quad	nvtxMarkW_impl_init_v3
	.quad	nvtxRangeStartEx_impl_init_v3
	.quad	nvtxRangeStartA_impl_init_v3
	.quad	nvtxRangeStartW_impl_init_v3
	.quad	nvtxRangeEnd_impl_init_v3
	.quad	nvtxRangePushEx_impl_init_v3
	.quad	nvtxRangePushA_impl_init_v3
	.quad	nvtxRangePushW_impl_init_v3
	.quad	nvtxRangePop_impl_init_v3
	.quad	nvtxNameCategoryA_impl_init_v3
	.quad	nvtxNameCategoryW_impl_init_v3
	.quad	nvtxNameOsThreadA_impl_init_v3
	.quad	nvtxNameOsThreadW_impl_init_v3
	.quad	nvtxNameCuDeviceA_impl_init_v3
	.quad	nvtxNameCuDeviceW_impl_init_v3
	.quad	nvtxNameCuContextA_impl_init_v3
	.quad	nvtxNameCuContextW_impl_init_v3
	.quad	nvtxNameCuStreamA_impl_init_v3
	.quad	nvtxNameCuStreamW_impl_init_v3
	.quad	nvtxNameCuEventA_impl_init_v3
	.quad	nvtxNameCuEventW_impl_init_v3
	.quad	nvtxNameClDeviceA_impl_init_v3
	.quad	nvtxNameClDeviceW_impl_init_v3
	.quad	nvtxNameClContextA_impl_init_v3
	.quad	nvtxNameClContextW_impl_init_v3
	.quad	nvtxNameClCommandQueueA_impl_init_v3
	.quad	nvtxNameClCommandQueueW_impl_init_v3
	.quad	nvtxNameClMemObjectA_impl_init_v3
	.quad	nvtxNameClMemObjectW_impl_init_v3
	.quad	nvtxNameClSamplerA_impl_init_v3
	.quad	nvtxNameClSamplerW_impl_init_v3
	.quad	nvtxNameClProgramA_impl_init_v3
	.quad	nvtxNameClProgramW_impl_init_v3
	.quad	nvtxNameClEventA_impl_init_v3
	.quad	nvtxNameClEventW_impl_init_v3
	.quad	nvtxNameCudaDeviceA_impl_init_v3
	.quad	nvtxNameCudaDeviceW_impl_init_v3
	.quad	nvtxNameCudaStreamA_impl_init_v3
	.quad	nvtxNameCudaStreamW_impl_init_v3
	.quad	nvtxNameCudaEventA_impl_init_v3
	.quad	nvtxNameCudaEventW_impl_init_v3
	.quad	nvtxDomainMarkEx_impl_init_v3
	.quad	nvtxDomainRangeStartEx_impl_init_v3
	.quad	nvtxDomainRangeEnd_impl_init_v3
	.quad	nvtxDomainRangePushEx_impl_init_v3
	.quad	nvtxDomainRangePop_impl_init_v3
	.quad	nvtxDomainResourceCreate_impl_init_v3
	.quad	nvtxDomainResourceDestroy_impl_init_v3
	.quad	nvtxDomainNameCategoryA_impl_init_v3
	.quad	nvtxDomainNameCategoryW_impl_init_v3
	.quad	nvtxDomainRegisterStringA_impl_init_v3
	.quad	nvtxDomainRegisterStringW_impl_init_v3
	.quad	nvtxDomainCreateA_impl_init_v3
	.quad	nvtxDomainCreateW_impl_init_v3
	.quad	nvtxDomainDestroy_impl_init_v3
	.quad	nvtxInitialize_impl_init_v3
	.quad	nvtxDomainSyncUserCreate_impl_init_v3
	.quad	nvtxDomainSyncUserDestroy_impl_init_v3
	.quad	nvtxDomainSyncUserAcquireStart_impl_init_v3
	.quad	nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.quad	nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.quad	nvtxDomainSyncUserReleasing_impl_init_v3
	.quad	0
	.quad	nvtxGlobals_v3+48
	.quad	nvtxGlobals_v3+56
	.quad	nvtxGlobals_v3+64
	.quad	nvtxGlobals_v3+72
	.quad	nvtxGlobals_v3+80
	.quad	nvtxGlobals_v3+88
	.quad	nvtxGlobals_v3+96
	.quad	nvtxGlobals_v3+104
	.quad	nvtxGlobals_v3+112
	.quad	nvtxGlobals_v3+120
	.quad	nvtxGlobals_v3+128
	.quad	nvtxGlobals_v3+136
	.quad	nvtxGlobals_v3+144
	.quad	nvtxGlobals_v3+152
	.quad	nvtxGlobals_v3+160
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+168
	.quad	nvtxGlobals_v3+176
	.quad	nvtxGlobals_v3+184
	.quad	nvtxGlobals_v3+192
	.quad	nvtxGlobals_v3+200
	.quad	nvtxGlobals_v3+208
	.quad	nvtxGlobals_v3+216
	.quad	nvtxGlobals_v3+224
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+232
	.quad	nvtxGlobals_v3+240
	.quad	nvtxGlobals_v3+248
	.quad	nvtxGlobals_v3+256
	.quad	nvtxGlobals_v3+264
	.quad	nvtxGlobals_v3+272
	.quad	nvtxGlobals_v3+280
	.quad	nvtxGlobals_v3+288
	.quad	nvtxGlobals_v3+296
	.quad	nvtxGlobals_v3+304
	.quad	nvtxGlobals_v3+312
	.quad	nvtxGlobals_v3+320
	.quad	nvtxGlobals_v3+328
	.quad	nvtxGlobals_v3+336
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+344
	.quad	nvtxGlobals_v3+352
	.quad	nvtxGlobals_v3+360
	.quad	nvtxGlobals_v3+368
	.quad	nvtxGlobals_v3+376
	.quad	nvtxGlobals_v3+384
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+392
	.quad	nvtxGlobals_v3+400
	.quad	nvtxGlobals_v3+408
	.quad	nvtxGlobals_v3+416
	.quad	nvtxGlobals_v3+424
	.quad	nvtxGlobals_v3+432
	.quad	nvtxGlobals_v3+440
	.quad	nvtxGlobals_v3+448
	.quad	nvtxGlobals_v3+456
	.quad	nvtxGlobals_v3+464
	.quad	nvtxGlobals_v3+472
	.quad	nvtxGlobals_v3+480
	.quad	nvtxGlobals_v3+488
	.quad	nvtxGlobals_v3+496
	.quad	nvtxGlobals_v3+504
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+512
	.quad	nvtxGlobals_v3+520
	.quad	nvtxGlobals_v3+528
	.quad	nvtxGlobals_v3+536
	.quad	nvtxGlobals_v3+544
	.quad	nvtxGlobals_v3+552
	.quad	0
	.section	.rodata
	.type	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE, @object
	.size	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE, 1
_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE, @object
	.size	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE, 1
_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E:
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	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E:
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	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E, @object
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_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E:
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	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E:
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	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E:
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	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NSL3seqE, @object
	.size	_ZN6thrust20THRUST_200700_890_NSL3seqE, 1
_ZN6thrust20THRUST_200700_890_NSL3seqE:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE, @object
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE, 1
_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo7advanceE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo7advanceE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo7advanceE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo7advanceE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo7advanceE, 1
_ZN4cuda3std6ranges3__45__cpo7advanceE:
	.zero	1
	.hidden	_ZN4cuda3std3__450_GLOBAL__N__a2668ab2_17_MatrixMultiply_cu_87f417746ignoreE
	.weak	_ZN4cuda3std3__450_GLOBAL__N__a2668ab2_17_MatrixMultiply_cu_87f417746ignoreE
	.section	.rodata._ZN4cuda3std3__450_GLOBAL__N__a2668ab2_17_MatrixMultiply_cu_87f417746ignoreE,"aG",@progbits,_ZN4cuda3std3__450_GLOBAL__N__a2668ab2_17_MatrixMultiply_cu_87f417746ignoreE,comdat
	.type	_ZN4cuda3std3__450_GLOBAL__N__a2668ab2_17_MatrixMultiply_cu_87f417746ignoreE, @gnu_unique_object
	.size	_ZN4cuda3std3__450_GLOBAL__N__a2668ab2_17_MatrixMultiply_cu_87f417746ignoreE, 1
_ZN4cuda3std3__450_GLOBAL__N__a2668ab2_17_MatrixMultiply_cu_87f417746ignoreE:
	.zero	1
	.weak	_ZN4cuda3std3__48in_placeE
	.section	.rodata._ZN4cuda3std3__48in_placeE,"aG",@progbits,_ZN4cuda3std3__48in_placeE,comdat
	.type	_ZN4cuda3std3__48in_placeE, @gnu_unique_object
	.size	_ZN4cuda3std3__48in_placeE, 1
_ZN4cuda3std3__48in_placeE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo4cendE
	.section	.rodata._ZN4cuda3std3__45__cpo4cendE,"aG",@progbits,_ZN4cuda3std3__45__cpo4cendE,comdat
	.type	_ZN4cuda3std3__45__cpo4cendE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo4cendE, 1
_ZN4cuda3std3__45__cpo4cendE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo6cbeginE
	.section	.rodata._ZN4cuda3std3__45__cpo6cbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo6cbeginE,comdat
	.type	_ZN4cuda3std3__45__cpo6cbeginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo6cbeginE, 1
_ZN4cuda3std3__45__cpo6cbeginE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo3endE
	.section	.rodata._ZN4cuda3std3__45__cpo3endE,"aG",@progbits,_ZN4cuda3std3__45__cpo3endE,comdat
	.type	_ZN4cuda3std3__45__cpo3endE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo3endE, 1
_ZN4cuda3std3__45__cpo3endE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo5beginE
	.section	.rodata._ZN4cuda3std3__45__cpo5beginE,"aG",@progbits,_ZN4cuda3std3__45__cpo5beginE,comdat
	.type	_ZN4cuda3std3__45__cpo5beginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo5beginE, 1
_ZN4cuda3std3__45__cpo5beginE:
	.zero	1
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include "hip/hip_runtime.h"

#include <thrust/device_vector.h>
#include <thrust/host_vector.h>

#include <stdio.h>
#include <iostream>

using namespace std;

class Matrix
{
private:
    int row, col;
public:
    thrust::host_vector<thrust::host_vector<int> > v;
    Matrix();
    Matrix(const int r, const int c);
    int randNum() { return rand() % 100; };
    int rows() { return row; };
    int cols() { return col; };
    void show() const;
    ~Matrix();
};

Matrix::Matrix()
{
    row = col = 0;
    for (size_t i = 0; i < row; i++)
    {
        thrust::host_vector<int> t;
        for (size_t j = 0; j < col; j++)
        {
            t.push_back(this->randNum());
        }
        v.push_back(t);
    }
}

Matrix::Matrix(const int r, const int c)
{
    row = r, col = c;
    for (size_t i = 0; i < row; i++)
    {
        thrust::host_vector<int> t;
        for (size_t j = 0; j < col; j++)
        {
            t.push_back(this->randNum());
        }
        v.push_back(t);
    }
}

void Matrix::show() const
{
    for (size_t i = 0; i < row; i++)
    {
        for (size_t j = 0; j < col; j++)
        {
            cout << v[i][j] << ", ";
        }
        cout << endl;
    }
}

Matrix::~Matrix()
{
}

__global__ void matrixMultiply(int *d_a, size_t pitch_a, int *d_b, size_t pitch_b, int *d_c, size_t pitch_c, const int N, const int M)
{
    __shared__ int input1Temp[4][3];
    __shared__ int input2Temp[3][4];

    int row = blockDim.y*blockIdx.y + threadIdx.y;
    int col = blockDim.x*blockIdx.x + threadIdx.x;

    if (row < N&&col < N)
    {
        // load d_a to shared memory
        if (col < N - 1)
        {
            int *shared_a = (int *)((char *)d_a + row*pitch_a) + col;
            input1Temp[row][col] = *shared_a;
            __syncthreads();
            printf("input1Temp[%d][%d]: %d\n", row, col, input1Temp[row][col]);
        }
        // load d_b to shared memory
        if (row < N - 1)
        {
            int *shared_b = (int *)((char *)d_b + row*pitch_b) + col;
            input2Temp[row][col] = *shared_b;
            __syncthreads();
            printf("input2Temp[%d][%d]: %d\n", row, col, input2Temp[row][col]);
        }

        int tmp = 0;
        for (size_t i = 0; i < N; i++)
        {
            tmp += input1Temp[row][i] * input2Temp[i][col];
        }
        //shared_c[col*pitch_c + row] = tmp;
        //d_c[row*pitch_c+col] = tmp;
        int *shared_c = (int *)((char *)d_c + row*pitch_c) + col;
        *shared_c = tmp;
    }

}

__global__ void showPitch(int *a, size_t pitch, int rows, int cols)
{
    int row = blockDim.y*blockIdx.y + threadIdx.y;
    int col = blockDim.x*blockIdx.x + threadIdx.x;

    if (row < rows&&col < cols)
    {
        int *t = (int *)((char *)a + row*pitch) + col;
        printf("a[%d][%d]: %d", row, col, *t);
    }
}

int main()
{
    hipDeviceProp_t prop;
    hipGetDeviceProperties(&prop, 0);

    const int N = 4;
    const int M = 3;
    
    // use three streams to async copy array from host to device
    hipStream_t stream_a, stream_b, stream_c;
    hipStreamCreate(&stream_a); hipStreamCreate(&stream_b); hipStreamCreate(&stream_c);

    // allocate output array on device
    static int h_c[N][N];
    int *d_c;
    size_t pitch_c;
    hipMallocPitch(&d_c, &pitch_c, N * sizeof(int), N);
    hipMemcpy2DAsync(d_c, pitch_c, h_c, N * sizeof(int), N * sizeof(int), N, hipMemcpyHostToDevice, stream_c);

    // allocate 2d array on device
    int h_a[N][M] = { { 1,2,3 },{ 4,5,6 },{ 7,8,9 },{ 1,3,4 } };
    size_t pitch_a;
    int *d_a;
    hipMallocPitch(&d_a, &pitch_a, M * sizeof(int), N);
    hipMemcpy2DAsync(d_a, pitch_a, h_a, M * sizeof(int), M * sizeof(int), N, hipMemcpyHostToDevice, stream_a);

    int h_b[M][N] = { { 1,2,3,4 },{ 4,5,6,7 },{ 7,8,9,10 } };
    size_t pitch_b;
    int *d_b;
    hipMallocPitch(&d_b, &pitch_b, N * sizeof(int), M);
    hipMemcpy2DAsync(d_b, pitch_b, h_b, N * sizeof(int), N * sizeof(int), M, hipMemcpyHostToDevice, stream_b);

    hipStreamSynchronize(stream_a); hipStreamSynchronize(stream_b); hipStreamSynchronize(stream_c);

    cout << "------------------" << endl;
    dim3 blockSize(1);
    dim3 threadSize(N, N);
    cout << threadSize.x << endl;
    //showPitch <<<blockSize, threadSize>>> (d_a, pitch, N, M);
    matrixMultiply <<<blockSize, threadSize>>>(d_a, pitch_a, d_b, pitch_b, d_c, pitch_c, N, M);
    hipDeviceSynchronize();

    // copy result to host
    hipMemcpy2D(h_c, M * sizeof(int), d_c, pitch_c, M * sizeof(int), N, hipMemcpyDeviceToHost);

    for (size_t i = 0; i < N; i++)
    {
        for (size_t j = 0; j < M; j++)
        {
            cout << h_c[i][j] << ", ";
        }
        cout << endl;
    }

    system("pause");
    hipFree(d_a);
    hipFree(d_b);
    hipFree(d_c);

    hipStreamDestroy(stream_a); hipStreamDestroy(stream_b); hipStreamDestroy(stream_c);
    return 0;
}
	.text
	.file	"MatrixMultiply.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_ZN6MatrixC2Ev                  # -- Begin function _ZN6MatrixC2Ev
	.p2align	1, 0x90
	.type	_ZN6MatrixC2Ev,@function
_ZN6MatrixC2Ev:                         # @_ZN6MatrixC2Ev
	.cfi_startproc
# %bb.0:                                # %._crit_edge20
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rdi)
	xorl	%eax, %eax
	movq	%rax, 32(%rdi)
	movq	%rax, (%rdi)
	retq
.Lfunc_end0:
	.size	_ZN6MatrixC2Ev, .Lfunc_end0-_ZN6MatrixC2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EED2Ev,"axG",@progbits,_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EED2Ev,comdat
	.weak	_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EED2Ev # -- Begin function _ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EED2Ev
	.p2align	1, 0x90
	.type	_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EED2Ev,@function
_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EED2Ev: # @_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EED2Ev
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	24(%rdi), %rdx
	testq	%rdx, %rdx
	je	.LBB1_2
# %bb.1:
	movq	8(%rbx), %rsi
	shlq	$5, %rdx
	addq	%rsi, %rdx
.Ltmp0:
	movq	%rbx, %rdi
	callq	_ZN6thrust6detail18contiguous_storageINS_11host_vectorIiSaIiEEESaIS4_EE7destroyENS0_15normal_iteratorIPS4_EES9_
.Ltmp1:
.LBB1_2:
	cmpq	$0, 16(%rbx)
	je	.LBB1_4
# %bb.3:
	movq	8(%rbx), %rdi
	callq	_ZdlPv
	xorps	%xmm0, %xmm0
	movups	%xmm0, 8(%rbx)
.LBB1_4:                                # %_ZN6thrust6detail18contiguous_storageINS_11host_vectorIiSaIiEEESaIS4_EED2Ev.exit
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB1_5:
	.cfi_def_cfa_offset 16
.Ltmp2:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end1:
	.size	_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EED2Ev, .Lfunc_end1-_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EED2Ev
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EED2Ev,"aG",@progbits,_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EED2Ev,comdat
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 1 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	1                               #   On action: 1
.Lcst_end0:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _ZN6MatrixC2Eii
.LCPI2_0:
	.zero	16
	.text
	.globl	_ZN6MatrixC2Eii
	.p2align	1, 0x90
	.type	_ZN6MatrixC2Eii,@function
_ZN6MatrixC2Eii:                        # @_ZN6MatrixC2Eii
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rdi)
	movq	$0, 32(%rdi)
	movl	%esi, (%rdi)
	movl	%edx, 4(%rdi)
	testl	%esi, %esi
	je	.LBB2_10
# %bb.1:                                # %.lr.ph21
	movq	%rdi, %r14
	leaq	8(%rdi), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	leaq	32(%rsp), %r13
	xorl	%ebp, %ebp
	leaq	24(%rsp), %r15
	leaq	12(%rsp), %r12
.LBB2_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%r13)
	movq	$0, 16(%r13)
	cmpl	$0, 4(%r14)
	je	.LBB2_6
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_2 Depth=1
	xorl	%ebx, %ebx
.LBB2_4:                                # %.lr.ph
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	movq	48(%rsp), %rsi
	shlq	$2, %rsi
	addq	32(%rsp), %rsi
	movl	%eax, 12(%rsp)
.Ltmp3:
	movl	$1, %edx
	movq	%r15, %rdi
	movq	%r12, %rcx
	callq	_ZN6thrust6detail11vector_baseIiSaIiEE11fill_insertENS0_15normal_iteratorIPiEEmRKi
.Ltmp4:
# %bb.5:                                #   in Loop: Header=BB2_4 Depth=2
	incq	%rbx
	movslq	4(%r14), %rax
	cmpq	%rax, %rbx
	jb	.LBB2_4
.LBB2_6:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	32(%r14), %rsi
	shlq	$5, %rsi
	addq	16(%r14), %rsi
.Ltmp6:
	movl	$1, %edx
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rcx
	callq	_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EE11fill_insertENS0_15normal_iteratorIPS4_EEmRKS4_
.Ltmp7:
# %bb.7:                                # %_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EE9push_backERKS4_.exit
                                        #   in Loop: Header=BB2_2 Depth=1
	cmpq	$0, 40(%rsp)
	je	.LBB2_9
# %bb.8:                                #   in Loop: Header=BB2_2 Depth=1
	movq	32(%rsp), %rdi
	callq	_ZdlPv
.LBB2_9:                                # %_ZN6thrust6detail11vector_baseIiSaIiEED2Ev.exit
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%rbp
	movslq	(%r14), %rax
	cmpq	%rax, %rbp
	jb	.LBB2_2
.LBB2_10:                               # %._crit_edge22
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_11:
	.cfi_def_cfa_offset 112
.Ltmp8:
	jmp	.LBB2_12
.LBB2_15:
.Ltmp5:
.LBB2_12:
	movq	%rax, %r14
	cmpq	$0, 40(%rsp)
	je	.LBB2_14
# %bb.13:
	movq	32(%rsp), %rdi
	callq	_ZdlPv
.LBB2_14:                               # %_ZN6thrust6detail11vector_baseIiSaIiEED2Ev.exit16
	movq	16(%rsp), %rdi                  # 8-byte Reload
	callq	_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EED2Ev
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end2:
	.size	_ZN6MatrixC2Eii, .Lfunc_end2-_ZN6MatrixC2Eii
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table2:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Ltmp3-.Lfunc_begin1           # >> Call Site 1 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin1           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin1           # >> Call Site 2 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin1           #     jumps to .Ltmp8
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp7-.Lfunc_begin1           # >> Call Site 3 <<
	.uleb128 .Lfunc_end2-.Ltmp7             #   Call between .Ltmp7 and .Lfunc_end2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	_ZNK6Matrix4showEv              # -- Begin function _ZNK6Matrix4showEv
	.p2align	1, 0x90
	.type	_ZNK6Matrix4showEv,@function
_ZNK6Matrix4showEv:                     # @_ZNK6Matrix4showEv
	.cfi_startproc
# %bb.0:
	cmpl	$0, (%rdi)
	je	.LBB3_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
	movl	$_ZSt4cout, %r15d
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	cmpl	$0, 4(%rbx)
	je	.LBB3_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB3_2 Depth=1
	movq	%r14, %r12
	shlq	$5, %r12
	xorl	%r13d, %r13d
.LBB3_4:                                # %.lr.ph
                                        #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	16(%rbx), %rax
	movq	8(%rax,%r12), %rax
	movl	(%rax,%r13,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r13
	movslq	4(%rbx), %rax
	cmpq	%rax, %r13
	jb	.LBB3_4
.LBB3_5:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r14
	movslq	(%rbx), %rax
	cmpq	%rax, %r14
	jb	.LBB3_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
.LBB3_7:                                # %._crit_edge9
	retq
.Lfunc_end3:
	.size	_ZNK6Matrix4showEv, .Lfunc_end3-_ZNK6Matrix4showEv
	.cfi_endproc
                                        # -- End function
	.globl	_ZN6MatrixD2Ev                  # -- Begin function _ZN6MatrixD2Ev
	.p2align	1, 0x90
	.type	_ZN6MatrixD2Ev,@function
_ZN6MatrixD2Ev:                         # @_ZN6MatrixD2Ev
	.cfi_startproc
# %bb.0:
	addq	$8, %rdi
	jmp	_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EED2Ev # TAILCALL
.Lfunc_end4:
	.size	_ZN6MatrixD2Ev, .Lfunc_end4-_ZN6MatrixD2Ev
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__matrixMultiplyPimS_mS_mii # -- Begin function _Z29__device_stub__matrixMultiplyPimS_mS_mii
	.type	_Z29__device_stub__matrixMultiplyPimS_mS_mii,@function
_Z29__device_stub__matrixMultiplyPimS_mS_mii: # @_Z29__device_stub__matrixMultiplyPimS_mS_mii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14matrixMultiplyPimS_mS_mii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z29__device_stub__matrixMultiplyPimS_mS_mii, .Lfunc_end5-_Z29__device_stub__matrixMultiplyPimS_mS_mii
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__showPitchPimii # -- Begin function _Z24__device_stub__showPitchPimii
	.type	_Z24__device_stub__showPitchPimii,@function
_Z24__device_stub__showPitchPimii:      # @_Z24__device_stub__showPitchPimii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9showPitchPimii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z24__device_stub__showPitchPimii, .Lfunc_end6-_Z24__device_stub__showPitchPimii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI7_0:
	.long	1                               # 0x1
	.long	2                               # 0x2
	.long	3                               # 0x3
	.long	4                               # 0x4
.LCPI7_1:
	.long	5                               # 0x5
	.long	6                               # 0x6
	.long	7                               # 0x7
	.long	8                               # 0x8
.LCPI7_2:
	.long	9                               # 0x9
	.long	1                               # 0x1
	.long	3                               # 0x3
	.long	4                               # 0x4
.LCPI7_3:
	.long	4                               # 0x4
	.long	5                               # 0x5
	.long	6                               # 0x6
	.long	7                               # 0x7
.LCPI7_4:
	.long	7                               # 0x7
	.long	8                               # 0x8
	.long	9                               # 0x9
	.long	10                              # 0xa
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1656, %rsp                     # imm = 0x678
	.cfi_def_cfa_offset 1712
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	184(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	leaq	72(%rsp), %r15
	movq	%r15, %rdi
	callq	hipStreamCreate
	leaq	48(%rsp), %rdi
	callq	hipStreamCreate
	leaq	40(%rsp), %rdi
	movq	%rdi, %rbp
	callq	hipStreamCreate
	leaq	8(%rsp), %r12
	leaq	32(%rsp), %r13
	movl	$16, %edx
	movl	$4, %ecx
	movq	%r12, %rdi
	movq	%r13, %rsi
	callq	hipMallocPitch
	movq	(%r12), %rdi
	movq	(%r13), %rsi
	movl	$1, %ebx
	movl	$_ZZ4mainE3h_c, %r14d
	movl	$_ZZ4mainE3h_c, %edx
	movl	$16, %ecx
	movl	$16, %r8d
	movl	$4, %r9d
	pushq	(%rbp)
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	callq	hipMemcpy2DAsync
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movaps	.LCPI7_0(%rip), %xmm0           # xmm0 = [1,2,3,4]
	leaq	128(%rsp), %r12
	movaps	%xmm0, (%r12)
	movaps	.LCPI7_1(%rip), %xmm0           # xmm0 = [5,6,7,8]
	movaps	%xmm0, 16(%r12)
	movaps	.LCPI7_2(%rip), %xmm0           # xmm0 = [9,1,3,4]
	movaps	%xmm0, 32(%r12)
	leaq	24(%rsp), %r13
	leaq	64(%rsp), %rbp
	movl	$12, %edx
	movl	$4, %ecx
	movq	%r13, %rdi
	movq	%rbp, %rsi
	callq	hipMallocPitch
	movq	(%r13), %rdi
	movq	(%rbp), %rsi
	movl	$12, %ecx
	movl	$12, %r8d
	movl	$4, %r9d
	movq	%r12, %rdx
	pushq	(%r15)
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	callq	hipMemcpy2DAsync
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	leaq	80(%rsp), %r12
	movaps	.LCPI7_0(%rip), %xmm0           # xmm0 = [1,2,3,4]
	movaps	%xmm0, (%r12)
	movaps	.LCPI7_3(%rip), %xmm0           # xmm0 = [4,5,6,7]
	movaps	%xmm0, 16(%r12)
	movaps	.LCPI7_4(%rip), %xmm0           # xmm0 = [7,8,9,10]
	movaps	%xmm0, 32(%r12)
	leaq	16(%rsp), %r13
	leaq	56(%rsp), %rbp
	movl	$16, %edx
	movl	$3, %ecx
	movq	%r13, %rdi
	movq	%rbp, %rsi
	callq	hipMallocPitch
	movq	(%r13), %rdi
	movq	(%rbp), %rsi
	movl	$16, %ecx
	movl	$16, %r8d
	movl	$3, %r9d
	movq	%r12, %rdx
	leaq	48(%rsp), %r12
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	callq	hipMemcpy2DAsync
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movq	(%r15), %rdi
	callq	hipStreamSynchronize
	movq	(%r12), %rdi
	callq	hipStreamSynchronize
	leaq	40(%rsp), %rax
	movq	(%rax), %rdi
	callq	hipStreamSynchronize
	movl	$_ZSt4cout, %r15d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$18, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$4, %esi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$17179869188, %rdx              # imm = 0x400000004
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	56(%rsp), %rcx
	movq	8(%rsp), %r8
	movq	32(%rsp), %r9
	pushq	$3
	.cfi_adjust_cfa_offset 8
	pushq	$4
	.cfi_adjust_cfa_offset 8
	callq	_Z29__device_stub__matrixMultiplyPimS_mS_mii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB7_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rcx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	$_ZZ4mainE3h_c, %edi
	movl	$12, %esi
	movl	$12, %r8d
	movl	$4, %r9d
	pushq	$2
	.cfi_adjust_cfa_offset 8
	callq	hipMemcpy2D
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	xorl	%ebx, %ebx
.LBB7_3:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_4 Depth 2
	xorl	%r12d, %r12d
.LBB7_4:                                #   Parent Loop BB7_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r14,%r12,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r12
	cmpq	$3, %r12
	jne	.LBB7_4
# %bb.5:                                #   in Loop: Header=BB7_3 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%rbx
	addq	$16, %r14
	cmpq	$4, %rbx
	jne	.LBB7_3
# %bb.6:
	movl	$.L.str.2, %edi
	callq	system
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipStreamDestroy
	movq	48(%rsp), %rdi
	callq	hipStreamDestroy
	movq	40(%rsp), %rdi
	callq	hipStreamDestroy
	xorl	%eax, %eax
	addq	$1656, %rsp                     # imm = 0x678
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.section	.text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat
	.hidden	__clang_call_terminate          # -- Begin function __clang_call_terminate
	.weak	__clang_call_terminate
	.type	__clang_call_terminate,@function
__clang_call_terminate:                 # @__clang_call_terminate
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__cxa_begin_catch
	callq	_ZSt9terminatev
.Lfunc_end8:
	.size	__clang_call_terminate, .Lfunc_end8-__clang_call_terminate
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _ZN6thrust6detail18contiguous_storageINS_11host_vectorIiSaIiEEESaIS4_EE7destroyENS0_15normal_iteratorIPS4_EES9_
.LCPI9_0:
	.zero	16
	.section	.text._ZN6thrust6detail18contiguous_storageINS_11host_vectorIiSaIiEEESaIS4_EE7destroyENS0_15normal_iteratorIPS4_EES9_,"axG",@progbits,_ZN6thrust6detail18contiguous_storageINS_11host_vectorIiSaIiEEESaIS4_EE7destroyENS0_15normal_iteratorIPS4_EES9_,comdat
	.weak	_ZN6thrust6detail18contiguous_storageINS_11host_vectorIiSaIiEEESaIS4_EE7destroyENS0_15normal_iteratorIPS4_EES9_
	.p2align	1, 0x90
	.type	_ZN6thrust6detail18contiguous_storageINS_11host_vectorIiSaIiEEESaIS4_EE7destroyENS0_15normal_iteratorIPS4_EES9_,@function
_ZN6thrust6detail18contiguous_storageINS_11host_vectorIiSaIiEEESaIS4_EE7destroyENS0_15normal_iteratorIPS4_EES9_: # @_ZN6thrust6detail18contiguous_storageINS_11host_vectorIiSaIiEEESaIS4_EE7destroyENS0_15normal_iteratorIPS4_EES9_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rsi, %r14
	subq	%rdx, %r14
	je	.LBB9_5
# %bb.1:                                # %.lr.ph.i.i.i.i.preheader
	movq	%rsi, %rbx
	sarq	$5, %r14
	addq	$8, %rbx
.LBB9_2:                                # %.lr.ph.i.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	cmpq	$0, 8(%rbx)
	je	.LBB9_4
# %bb.3:                                #   in Loop: Header=BB9_2 Depth=1
	movq	(%rbx), %rdi
	callq	_ZdlPv
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rbx)
.LBB9_4:                                # %_ZNK6thrust6detail16wrapped_functionINS0_23allocator_traits_detail5gozerEvEclINS_11host_vectorIiSaIiEEEEEvRT_.exit.i.i.i.i
                                        #   in Loop: Header=BB9_2 Depth=1
	addq	$32, %rbx
	incq	%r14
	jne	.LBB9_2
.LBB9_5:                                # %_ZN6thrust6detail13destroy_rangeISaINS_11host_vectorIiSaIiEEEEPS4_lEEvRT_T0_T1_.exit
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_ZN6thrust6detail18contiguous_storageINS_11host_vectorIiSaIiEEESaIS4_EE7destroyENS0_15normal_iteratorIPS4_EES9_, .Lfunc_end9-_ZN6thrust6detail18contiguous_storageINS_11host_vectorIiSaIiEEESaIS4_EE7destroyENS0_15normal_iteratorIPS4_EES9_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6detail11vector_baseIiSaIiEE11fill_insertENS0_15normal_iteratorIPiEEmRKi,"axG",@progbits,_ZN6thrust6detail11vector_baseIiSaIiEE11fill_insertENS0_15normal_iteratorIPiEEmRKi,comdat
	.weak	_ZN6thrust6detail11vector_baseIiSaIiEE11fill_insertENS0_15normal_iteratorIPiEEmRKi # -- Begin function _ZN6thrust6detail11vector_baseIiSaIiEE11fill_insertENS0_15normal_iteratorIPiEEmRKi
	.p2align	1, 0x90
	.type	_ZN6thrust6detail11vector_baseIiSaIiEE11fill_insertENS0_15normal_iteratorIPiEEmRKi,@function
_ZN6thrust6detail11vector_baseIiSaIiEE11fill_insertENS0_15normal_iteratorIPiEEmRKi: # @_ZN6thrust6detail11vector_baseIiSaIiEE11fill_insertENS0_15normal_iteratorIPiEEmRKi
	.cfi_startproc
# %bb.0:
	testq	%rdx, %rdx
	je	.LBB10_24
# %bb.1:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	movq	16(%rdi), %rax
	movq	24(%rdi), %r12
	movq	%rax, %rdx
	subq	%r12, %rdx
	cmpq	%rbx, %rdx
	jae	.LBB10_2
# %bb.12:
	cmpq	%rbx, %r12
	movq	%rbx, %rdx
	cmovaq	%r12, %rdx
	addq	%r12, %rdx
	addq	%rax, %rax
	cmpq	%rax, %rdx
	cmovaq	%rdx, %rax
	movabsq	$2305843009213693951, %r13      # imm = 0x1FFFFFFFFFFFFFFF
	cmpq	%r13, %rax
	cmovbq	%rax, %r13
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	testq	%rax, %rax
	je	.LBB10_13
# %bb.14:                               # %.noexc.i
	leaq	8(%rsp), %rdi
	movq	%r13, %rsi
	xorl	%edx, %edx
	movq	%rcx, %rbp
	callq	_ZNSt15__new_allocatorIiE8allocateEmPKv
	movq	%rbp, %rcx
	movq	%rax, %rbp
	jmp	.LBB10_15
.LBB10_2:
	leaq	(,%r12,4), %r13
	addq	8(%r15), %r13
	movq	%r14, %rbp
	subq	%r13, %rbp
	sarq	$2, %rbp
	movq	%rbp, %rdx
	negq	%rdx
	cmpq	%rbx, %rdx
	jbe	.LBB10_5
# %bb.3:                                # %_ZN6thrust6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS0_15normal_iteratorIPiEEEES7_T_S8_S7_.exit
	movq	%rbx, %r12
	negq	%r12
	leaq	(,%rbx,4), %rdx
	movq	%r13, %rbp
	subq	%rdx, %rbp
	shlq	$2, %r12
	movq	%r13, %rdi
	movq	%rbp, %rsi
	movq	%rcx, %r13
	callq	memmove@PLT
	addq	%rbx, 24(%r15)
	movq	%r14, %rcx
	subq	%r12, %rcx
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rbp, %rdx
	callq	_ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPiEES9_EET1_RNS5_16execution_policyIT_EET0_SF_SA_
	movl	(%r13), %eax
	xorl	%ecx, %ecx
.LBB10_4:                               # %.lr.ph.i.i.i.i.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movl	%eax, (%r14,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rbx
	jne	.LBB10_4
	jmp	.LBB10_23
.LBB10_5:
	addq	%rbp, %rbx
	je	.LBB10_8
# %bb.6:                                # %.lr.ph.i.i.i.i.i.i.i.i.i.i.i.i.preheader
	movl	(%rcx), %eax
	xorl	%esi, %esi
.LBB10_7:                               # %.lr.ph.i.i.i.i.i.i.i.i.i.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movl	%eax, (%r13,%rsi,4)
	incq	%rsi
	cmpq	%rsi, %rbx
	jne	.LBB10_7
.LBB10_8:                               # %_ZN6thrust6detail18contiguous_storageIiSaIiEE20uninitialized_fill_nENS0_15normal_iteratorIPiEEmRKi.exit
	addq	%r12, %rbx
	movq	%rbx, 24(%r15)
	cmpq	%r14, %r13
	je	.LBB10_9
# %bb.10:                               # %_ZN6thrust6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS0_15normal_iteratorIPiEEEES7_T_S8_S7_.exit55
	shlq	$2, %rbx
	addq	8(%r15), %rbx
	shlq	$2, %rdx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%rcx, %rbx
	callq	memmove@PLT
	subq	%rbp, 24(%r15)
	movl	(%rbx), %eax
.LBB10_11:                              # %.lr.ph.i.i.i.i.i.i.i56
                                        # =>This Inner Loop Header: Depth=1
	movl	%eax, (%r14)
	addq	$4, %r14
	cmpq	%r13, %r14
	jne	.LBB10_11
	jmp	.LBB10_23
.LBB10_13:
	xorl	%ebp, %ebp
.LBB10_15:
	movq	%rbp, 16(%rsp)
	movq	%r13, 24(%rsp)
	movq	8(%r15), %rsi
	movq	%rsi, %r13
	subq	%r14, %r13
	sarq	$2, %r13
	negq	%r13
	cmpq	%r14, %rsi
	je	.LBB10_17
# %bb.16:
	leaq	(,%r13,4), %rdx
	movq	%rbp, %rdi
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	callq	memmove@PLT
	movq	32(%rsp), %rcx                  # 8-byte Reload
.LBB10_17:
	leaq	(,%r13,4), %rax
	addq	%rbp, %rax
	movl	(%rcx), %ecx
	xorl	%edx, %edx
.LBB10_18:                              # %.lr.ph.i.i.i.i.i.i.i.i.i.i.i.i63
                                        # =>This Inner Loop Header: Depth=1
	movl	%ecx, (%rax,%rdx,4)
	incq	%rdx
	cmpq	%rdx, %rbx
	jne	.LBB10_18
# %bb.19:
	movq	8(%r15), %rdi
	movq	24(%r15), %rcx
	leaq	(%rdi,%rcx,4), %rdx
	subq	%r14, %rdx
	je	.LBB10_21
# %bb.20:
	leaq	(%rax,%rbx,4), %rdi
	movq	%r14, %rsi
	callq	memmove@PLT
	movq	8(%r15), %rdi
.LBB10_21:
	movq	16(%rsp), %rax
	movq	%rax, 8(%r15)
	movq	%rdi, 16(%rsp)
	movq	16(%r15), %rax
	movq	24(%rsp), %rcx
	movq	%rcx, 16(%r15)
	movq	%rax, 24(%rsp)
	addq	%rbx, %r12
	movq	%r12, 24(%r15)
	testq	%rax, %rax
	je	.LBB10_23
# %bb.22:
	callq	_ZdlPv
	jmp	.LBB10_23
.LBB10_9:                               # %_ZN6thrust6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS0_15normal_iteratorIPiEEEES7_T_S8_S7_.exit55.thread
	subq	%rbp, %rbx
	movq	%rbx, 24(%r15)
.LBB10_23:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB10_24:                              # %_ZN6thrust6fill_nINS_6detail15normal_iteratorIPiEEmiEET_S5_T0_RKT1_.exit
	retq
.Lfunc_end10:
	.size	_ZN6thrust6detail11vector_baseIiSaIiEE11fill_insertENS0_15normal_iteratorIPiEEmRKi, .Lfunc_end10-_ZN6thrust6detail11vector_baseIiSaIiEE11fill_insertENS0_15normal_iteratorIPiEEmRKi
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPiEES9_EET1_RNS5_16execution_policyIT_EET0_SF_SA_,"axG",@progbits,_ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPiEES9_EET1_RNS5_16execution_policyIT_EET0_SF_SA_,comdat
	.weak	_ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPiEES9_EET1_RNS5_16execution_policyIT_EET0_SF_SA_ # -- Begin function _ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPiEES9_EET1_RNS5_16execution_policyIT_EET0_SF_SA_
	.type	_ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPiEES9_EET1_RNS5_16execution_policyIT_EET0_SF_SA_,@function
_ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPiEES9_EET1_RNS5_16execution_policyIT_EET0_SF_SA_: # @_ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPiEES9_EET1_RNS5_16execution_policyIT_EET0_SF_SA_
	.cfi_startproc
# %bb.0:
	movq	%rcx, %rax
	movq	%rdx, %rcx
	subq	%rsi, %rcx
	testq	%rcx, %rcx
	jle	.LBB11_8
# %bb.1:
	cmpq	%rsi, %rax
	js	.LBB11_8
# %bb.2:
	movq	%rdx, %rcx
	subq	%rax, %rcx
	testq	%rcx, %rcx
	jle	.LBB11_8
# %bb.3:
	movq	%rsi, %rdi
	subq	%rdx, %rdi
	movq	%rax, %rcx
	subq	%rdi, %rcx
	cmpq	%rdx, %rsi
	je	.LBB11_4
# %bb.5:                                # %.lr.ph.i.preheader
	sarq	$2, %rdi
	shlq	$2, %rdi
	subq	%rdi, %rax
	addq	$-4, %rax
.LBB11_6:                               # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movl	-4(%rdx), %edi
	addq	$-4, %rdx
	movl	%edi, (%rax)
	addq	$-4, %rax
	cmpq	%rsi, %rdx
	jne	.LBB11_6
.LBB11_4:
	movq	%rcx, %rax
	retq
.LBB11_7:                               # %.lr.ph.i10
                                        #   in Loop: Header=BB11_8 Depth=1
	movl	(%rsi), %ecx
	movl	%ecx, (%rax)
	addq	$4, %rsi
	addq	$4, %rax
.LBB11_8:                               # %.lr.ph.i10
                                        # =>This Inner Loop Header: Depth=1
	cmpq	%rdx, %rsi
	jne	.LBB11_7
# %bb.9:                                # %_ZN6thrust6detail24sequential_copy_backwardINS0_15normal_iteratorIPiEES4_EET0_T_S6_S5_.exit
	retq
.Lfunc_end11:
	.size	_ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPiEES9_EET1_RNS5_16execution_policyIT_EET0_SF_SA_, .Lfunc_end11-_ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPiEES9_EET1_RNS5_16execution_policyIT_EET0_SF_SA_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorIiE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIiE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorIiE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIiE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorIiE8allocateEmPKv,@function
_ZNSt15__new_allocatorIiE8allocateEmPKv: # @_ZNSt15__new_allocatorIiE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$61, %rax
	jne	.LBB12_1
# %bb.3:
	shlq	$2, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB12_1:
	.cfi_def_cfa_offset 16
	shrq	$62, %rsi
	je	.LBB12_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB12_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end12:
	.size	_ZNSt15__new_allocatorIiE8allocateEmPKv, .Lfunc_end12-_ZNSt15__new_allocatorIiE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EE11fill_insertENS0_15normal_iteratorIPS4_EEmRKS4_,"axG",@progbits,_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EE11fill_insertENS0_15normal_iteratorIPS4_EEmRKS4_,comdat
	.weak	_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EE11fill_insertENS0_15normal_iteratorIPS4_EEmRKS4_ # -- Begin function _ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EE11fill_insertENS0_15normal_iteratorIPS4_EEmRKS4_
	.p2align	1, 0x90
	.type	_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EE11fill_insertENS0_15normal_iteratorIPS4_EEmRKS4_,@function
_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EE11fill_insertENS0_15normal_iteratorIPS4_EEmRKS4_: # @_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EE11fill_insertENS0_15normal_iteratorIPS4_EEmRKS4_
.Lfunc_begin2:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception2
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	testq	%rdx, %rdx
	je	.LBB13_11
# %bb.1:
	movq	%rdx, %r12
	movq	%rsi, %rbp
	movq	%rdi, %r14
	movq	16(%rdi), %rax
	movq	24(%rdi), %rbx
	movq	%rax, %rdx
	subq	%rbx, %rdx
	cmpq	%r12, %rdx
	movq	%rcx, 56(%rsp)                  # 8-byte Spill
	jae	.LBB13_2
# %bb.12:
	cmpq	%r12, %rbx
	movq	%r12, %rcx
	cmovaq	%rbx, %rcx
	addq	%rbx, %rcx
	addq	%rax, %rax
	cmpq	%rax, %rcx
	cmovaq	%rcx, %rax
	movabsq	$288230376151711743, %r13       # imm = 0x3FFFFFFFFFFFFFF
	cmpq	%r13, %rax
	cmovbq	%rax, %r13
	xorps	%xmm0, %xmm0
	movups	%xmm0, 40(%rsp)
	testq	%rax, %rax
	movq	%r12, 24(%rsp)                  # 8-byte Spill
	movq	%rbx, 16(%rsp)                  # 8-byte Spill
	je	.LBB13_13
# %bb.14:                               # %.noexc.i
	leaq	32(%rsp), %rdi
	movq	%r13, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIN6thrust11host_vectorIiSaIiEEEE8allocateEmPKv
	movq	%rax, %r15
	jmp	.LBB13_15
.LBB13_2:
	shlq	$5, %rbx
	addq	8(%r14), %rbx
	movq	%rbp, %r15
	subq	%rbx, %r15
	sarq	$5, %r15
	movq	%r15, %rax
	negq	%rax
	cmpq	%r12, %rax
	jbe	.LBB13_6
# %bb.3:
	movq	%r12, 24(%rsp)                  # 8-byte Spill
	shlq	$5, %r12
	movq	%rbx, %r15
	subq	%r12, %r15
	negq	%r12
	movq	%rbx, %r13
	xorl	%ebx, %ebx
	movq	%r13, 16(%rsp)                  # 8-byte Spill
.LBB13_4:                               # %.lr.ph.i.i.i.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%r12,%r13), %rsi
	movq	%r13, %rdi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
	addq	$32, %r13
	addq	$-32, %rbx
	cmpq	%rbx, %r12
	jne	.LBB13_4
# %bb.5:                                # %_ZN6thrust6detail18contiguous_storageINS_11host_vectorIiSaIiEEESaIS4_EE18uninitialized_copyINS0_15normal_iteratorIPS4_EEEESA_T_SB_SA_.exit
	movq	24(%rsp), %rbx                  # 8-byte Reload
	addq	%rbx, 24(%r14)
	movq	%rbp, %rax
	subq	%r15, %rax
	movq	16(%rsp), %rcx                  # 8-byte Reload
	addq	%rax, %rcx
	leaq	32(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%r15, %rdx
	callq	_ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESC_EET1_RNS5_16execution_policyIT_EET0_SI_SD_
	leaq	32(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%rbx, %rdx
	movq	56(%rsp), %rcx                  # 8-byte Reload
	callq	_ZN6thrust6system6detail7generic6fill_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmSB_EET0_RNS_16execution_policyIT_EESE_T1_RKT2_
	jmp	.LBB13_11
.LBB13_6:
	leaq	(%r15,%r12), %r13
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%r13, %rdx
	callq	_ZN6thrust6system6detail7generic6detail20uninitialized_fill_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmSA_EET0_RNS_16execution_policyIT_EESC_T1_RKT2_NS_6detail17integral_constantIbLb0EEE
	movq	24(%r14), %rax
	addq	%rax, %r13
	movq	%r13, 24(%r14)
	cmpq	%rbp, %rbx
	je	.LBB13_10
# %bb.7:                                # %.lr.ph.i.i.i.i.i.i56.preheader
	movq	%rbx, 16(%rsp)                  # 8-byte Spill
	shlq	$5, %rax
	shlq	$5, %r12
	addq	%rax, %r12
	addq	8(%r14), %r12
	movq	%r15, %rbx
	shlq	$5, %rbx
	movq	%rbp, %r13
.LBB13_8:                               # %.lr.ph.i.i.i.i.i.i56
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%r12,%rbx), %rdi
	movq	%r13, %rsi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
	addq	$32, %r13
	addq	$32, %rbx
	jne	.LBB13_8
# %bb.9:                                # %_ZN6thrust6detail18contiguous_storageINS_11host_vectorIiSaIiEEESaIS4_EE18uninitialized_copyINS0_15normal_iteratorIPS4_EEEESA_T_SB_SA_.exit60.loopexit
	movq	24(%r14), %r13
	movq	16(%rsp), %rbx                  # 8-byte Reload
.LBB13_10:                              # %_ZN6thrust6detail18contiguous_storageINS_11host_vectorIiSaIiEEESaIS4_EE18uninitialized_copyINS0_15normal_iteratorIPS4_EEEESA_T_SB_SA_.exit60
	subq	%r15, %r13
	movq	%r13, 24(%r14)
	leaq	32(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%rbx, %rdx
	movq	56(%rsp), %rcx                  # 8-byte Reload
	callq	_ZN6thrust6system6detail7generic4fillINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESB_EEvRNS_16execution_policyIT_EET0_SI_RKT1_
	jmp	.LBB13_11
.LBB13_13:
	xorl	%r15d, %r15d
.LBB13_15:
	movq	%r15, 40(%rsp)
	movq	%r13, 48(%rsp)
	movq	%r14, 64(%rsp)                  # 8-byte Spill
	movq	8(%r14), %r13
	movq	%r13, %rbx
	subq	%rbp, %rbx
	sarq	$5, %rbx
	cmpq	%rbp, %r13
	je	.LBB13_19
# %bb.16:                               # %.lr.ph.i.i.i.i.i.i65.preheader
	movq	%rbx, %r12
	shlq	$5, %r12
	negq	%r12
	xorl	%r14d, %r14d
.LBB13_17:                              # %.lr.ph.i.i.i.i.i.i65
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%r15,%r14), %rdi
	leaq	(%r14,%r13), %rsi
.Ltmp9:
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
.Ltmp10:
# %bb.18:                               # %.noexc
                                        #   in Loop: Header=BB13_17 Depth=1
	addq	$32, %r14
	cmpq	%r14, %r12
	jne	.LBB13_17
.LBB13_19:                              # %.loopexit112
	negq	%rbx
	shlq	$5, %rbx
	addq	%rbx, %r15
.Ltmp12:
	leaq	15(%rsp), %rdi
	movq	%r15, %rsi
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movq	56(%rsp), %rcx                  # 8-byte Reload
	callq	_ZN6thrust6system6detail7generic6detail20uninitialized_fill_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmSA_EET0_RNS_16execution_policyIT_EESC_T1_RKT2_NS_6detail17integral_constantIbLb0EEE
.Ltmp13:
# %bb.20:
	movq	64(%rsp), %rbx                  # 8-byte Reload
	movq	8(%rbx), %rsi
	movq	24(%rbx), %rdx
	movq	%rdx, %rax
	shlq	$5, %rax
	addq	%rsi, %rax
	movq	%rbp, %r12
	subq	%rax, %r12
	je	.LBB13_25
# %bb.21:                               # %.lr.ph.i.i.i.i.i.i73.preheader
	movq	24(%rsp), %rax                  # 8-byte Reload
	shlq	$5, %rax
	addq	%rax, %r15
	sarq	$5, %r12
	shlq	$5, %r12
	negq	%r12
	movq	%r15, %r13
.LBB13_22:                              # %.lr.ph.i.i.i.i.i.i73
                                        # =>This Inner Loop Header: Depth=1
.Ltmp15:
	movq	%r13, %rdi
	movq	%rbp, %rsi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
.Ltmp16:
# %bb.23:                               # %.noexc77
                                        #   in Loop: Header=BB13_22 Depth=1
	addq	$32, %rbp
	addq	$32, %r13
	addq	$-32, %r12
	jne	.LBB13_22
# %bb.24:                               # %.loopexit.loopexit
	movq	8(%rbx), %rsi
	movq	24(%rbx), %rdx
.LBB13_25:                              # %.loopexit
	shlq	$5, %rdx
	addq	%rsi, %rdx
.Ltmp26:
	movq	%rbx, %rdi
	callq	_ZN6thrust6detail18contiguous_storageINS_11host_vectorIiSaIiEEESaIS4_EE7destroyENS0_15normal_iteratorIPS4_EES9_
.Ltmp27:
# %bb.26:
	movq	8(%rbx), %rdi
	movq	40(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	%rdi, 40(%rsp)
	movq	16(%rbx), %rax
	movq	48(%rsp), %rcx
	movq	%rcx, 16(%rbx)
	movq	%rax, 48(%rsp)
	movq	16(%rsp), %rcx                  # 8-byte Reload
	addq	24(%rsp), %rcx                  # 8-byte Folded Reload
	movq	%rcx, 24(%rbx)
	testq	%rax, %rax
	je	.LBB13_11
# %bb.27:
	callq	_ZdlPv
.LBB13_11:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB13_36:
	.cfi_def_cfa_offset 128
.Ltmp28:
	movq	%rax, %rbx
	jmp	.LBB13_37
.LBB13_29:
.Ltmp14:
	jmp	.LBB13_31
.LBB13_30:
.Ltmp17:
	jmp	.LBB13_31
.LBB13_28:
.Ltmp11:
.LBB13_31:
	movq	%rax, %rdi
	callq	__cxa_begin_catch
	movq	40(%rsp), %rsi
.Ltmp18:
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rdx
	callq	_ZN6thrust6detail18contiguous_storageINS_11host_vectorIiSaIiEEESaIS4_EE7destroyENS0_15normal_iteratorIPS4_EES9_
.Ltmp19:
# %bb.32:
	cmpq	$0, 48(%rsp)
	je	.LBB13_34
# %bb.33:
	leaq	40(%rsp), %rbx
	movq	(%rbx), %rdi
	callq	_ZdlPv
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rbx)
.LBB13_34:                              # %_ZN6thrust6detail18contiguous_storageINS_11host_vectorIiSaIiEEESaIS4_EE10deallocateEv.exit
.Ltmp20:
	callq	__cxa_rethrow
.Ltmp21:
# %bb.41:
.LBB13_35:
.Ltmp22:
	movq	%rax, %rbx
.Ltmp23:
	callq	__cxa_end_catch
.Ltmp24:
.LBB13_37:
	cmpq	$0, 48(%rsp)
	je	.LBB13_39
# %bb.38:
	movq	40(%rsp), %rdi
	callq	_ZdlPv
.LBB13_39:
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.LBB13_40:
.Ltmp25:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end13:
	.size	_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EE11fill_insertENS0_15normal_iteratorIPS4_EEmRKS4_, .Lfunc_end13-_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EE11fill_insertENS0_15normal_iteratorIPS4_EEmRKS4_
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EE11fill_insertENS0_15normal_iteratorIPS4_EEmRKS4_,"aG",@progbits,_ZN6thrust6detail11vector_baseINS_11host_vectorIiSaIiEEESaIS4_EE11fill_insertENS0_15normal_iteratorIPS4_EEmRKS4_,comdat
	.p2align	2, 0x0
GCC_except_table13:
.Lexception2:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase1-.Lttbaseref1
.Lttbaseref1:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end2-.Lcst_begin2
.Lcst_begin2:
	.uleb128 .Lfunc_begin2-.Lfunc_begin2    # >> Call Site 1 <<
	.uleb128 .Ltmp9-.Lfunc_begin2           #   Call between .Lfunc_begin2 and .Ltmp9
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin2           # >> Call Site 2 <<
	.uleb128 .Ltmp10-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp10
	.uleb128 .Ltmp11-.Lfunc_begin2          #     jumps to .Ltmp11
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp12-.Lfunc_begin2          # >> Call Site 3 <<
	.uleb128 .Ltmp13-.Ltmp12                #   Call between .Ltmp12 and .Ltmp13
	.uleb128 .Ltmp14-.Lfunc_begin2          #     jumps to .Ltmp14
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp15-.Lfunc_begin2          # >> Call Site 4 <<
	.uleb128 .Ltmp16-.Ltmp15                #   Call between .Ltmp15 and .Ltmp16
	.uleb128 .Ltmp17-.Lfunc_begin2          #     jumps to .Ltmp17
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp26-.Lfunc_begin2          # >> Call Site 5 <<
	.uleb128 .Ltmp27-.Ltmp26                #   Call between .Ltmp26 and .Ltmp27
	.uleb128 .Ltmp28-.Lfunc_begin2          #     jumps to .Ltmp28
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp27-.Lfunc_begin2          # >> Call Site 6 <<
	.uleb128 .Ltmp18-.Ltmp27                #   Call between .Ltmp27 and .Ltmp18
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp18-.Lfunc_begin2          # >> Call Site 7 <<
	.uleb128 .Ltmp21-.Ltmp18                #   Call between .Ltmp18 and .Ltmp21
	.uleb128 .Ltmp22-.Lfunc_begin2          #     jumps to .Ltmp22
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp23-.Lfunc_begin2          # >> Call Site 8 <<
	.uleb128 .Ltmp24-.Ltmp23                #   Call between .Ltmp23 and .Ltmp24
	.uleb128 .Ltmp25-.Lfunc_begin2          #     jumps to .Ltmp25
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp24-.Lfunc_begin2          # >> Call Site 9 <<
	.uleb128 .Lfunc_end13-.Ltmp24           #   Call between .Ltmp24 and .Lfunc_end13
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end2:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_,"axG",@progbits,_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_,comdat
	.weak	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_ # -- Begin function _ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
	.p2align	1, 0x90
	.type	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_,@function
_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_: # @_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
.Lfunc_begin3:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception3
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	leaq	8(%rdi), %r15
	xorps	%xmm0, %xmm0
	movups	%xmm0, 8(%rdi)
	movq	$0, 24(%rdi)
	movq	8(%rsi), %rdx
	movq	24(%rsi), %r14
	leaq	(%rdx,%r14,4), %rcx
	shlq	$2, %r14
	negq	%r14
	sarq	$2, %r14
	negq	%r14
.Ltmp29:
	movq	%r14, %rsi
	movq	%rdi, %r8
	callq	_ZN6thrust6detail11vector_baseIiSaIiEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_S9_RNS0_18contiguous_storageIiS2_EE
.Ltmp30:
# %bb.1:
	movq	%r14, 24(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB14_2:
	.cfi_def_cfa_offset 32
.Ltmp31:
	movq	%rax, %r14
	cmpq	$0, 16(%rbx)
	je	.LBB14_4
# %bb.3:
	movq	(%r15), %rdi
	callq	_ZdlPv
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%r15)
.LBB14_4:                               # %_ZN6thrust6detail18contiguous_storageIiSaIiEED2Ev.exit
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end14:
	.size	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_, .Lfunc_end14-_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_,"aG",@progbits,_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_,comdat
	.p2align	2, 0x0
GCC_except_table14:
.Lexception3:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end3-.Lcst_begin3
.Lcst_begin3:
	.uleb128 .Ltmp29-.Lfunc_begin3          # >> Call Site 1 <<
	.uleb128 .Ltmp30-.Ltmp29                #   Call between .Ltmp29 and .Ltmp30
	.uleb128 .Ltmp31-.Lfunc_begin3          #     jumps to .Ltmp31
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp30-.Lfunc_begin3          # >> Call Site 2 <<
	.uleb128 .Lfunc_end14-.Ltmp30           #   Call between .Ltmp30 and .Lfunc_end14
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end3:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6detail11vector_baseIiSaIiEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_S9_RNS0_18contiguous_storageIiS2_EE,"axG",@progbits,_ZN6thrust6detail11vector_baseIiSaIiEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_S9_RNS0_18contiguous_storageIiS2_EE,comdat
	.weak	_ZN6thrust6detail11vector_baseIiSaIiEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_S9_RNS0_18contiguous_storageIiS2_EE # -- Begin function _ZN6thrust6detail11vector_baseIiSaIiEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_S9_RNS0_18contiguous_storageIiS2_EE
	.p2align	1, 0x90
	.type	_ZN6thrust6detail11vector_baseIiSaIiEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_S9_RNS0_18contiguous_storageIiS2_EE,@function
_ZN6thrust6detail11vector_baseIiSaIiEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_S9_RNS0_18contiguous_storageIiS2_EE: # @_ZN6thrust6detail11vector_baseIiSaIiEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_S9_RNS0_18contiguous_storageIiS2_EE
.Lfunc_begin4:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception4
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r8, %rbx
	testq	%rsi, %rsi
	je	.LBB15_1
# %bb.3:
	movq	%rsi, %rax
	shrq	$61, %rax
	jne	.LBB15_4
# %bb.7:                                # %_ZN6thrust6detail18contiguous_storageIiSaIiEE8allocateEm.exit
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	16(%rdi), %r12
	addq	%r12, %r12
	cmpq	%r12, %rsi
	cmovaq	%rsi, %r12
	movabsq	$2305843009213693951, %rax      # imm = 0x1FFFFFFFFFFFFFFF
	cmpq	%rax, %r12
	cmovaeq	%rax, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIiE8allocateEmPKv
	movq	%rax, 8(%rbx)
	movq	%r12, 16(%rbx)
	cmpq	%r14, %r15
	je	.LBB15_8
# %bb.9:
	subq	%r15, %r14
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	memmove@PLT                     # TAILCALL
.LBB15_1:
	.cfi_def_cfa_offset 48
	cmpq	$0, 16(%rbx)
	je	.LBB15_8
# %bb.2:
	movq	8(%rbx), %rdi
	callq	_ZdlPv
	xorps	%xmm0, %xmm0
	movups	%xmm0, 8(%rbx)
.LBB15_8:                               # %_ZN6thrust6detail18contiguous_storageIiSaIiEE10deallocateEv.exit
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB15_4:
	.cfi_def_cfa_offset 48
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp32:
	movl	$.L.str.5, %esi
	movq	%rax, %rdi
	callq	_ZNSt12length_errorC1EPKc
.Ltmp33:
# %bb.5:
	movl	$_ZTISt12length_error, %esi
	movl	$_ZNSt12length_errorD1Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.LBB15_6:
.Ltmp34:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end15:
	.size	_ZN6thrust6detail11vector_baseIiSaIiEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_S9_RNS0_18contiguous_storageIiS2_EE, .Lfunc_end15-_ZN6thrust6detail11vector_baseIiSaIiEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_S9_RNS0_18contiguous_storageIiS2_EE
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6detail11vector_baseIiSaIiEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_S9_RNS0_18contiguous_storageIiS2_EE,"aG",@progbits,_ZN6thrust6detail11vector_baseIiSaIiEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_S9_RNS0_18contiguous_storageIiS2_EE,comdat
	.p2align	2, 0x0
GCC_except_table15:
.Lexception4:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end4-.Lcst_begin4
.Lcst_begin4:
	.uleb128 .Lfunc_begin4-.Lfunc_begin4    # >> Call Site 1 <<
	.uleb128 .Ltmp32-.Lfunc_begin4          #   Call between .Lfunc_begin4 and .Ltmp32
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp32-.Lfunc_begin4          # >> Call Site 2 <<
	.uleb128 .Ltmp33-.Ltmp32                #   Call between .Ltmp32 and .Ltmp33
	.uleb128 .Ltmp34-.Lfunc_begin4          #     jumps to .Ltmp34
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp33-.Lfunc_begin4          # >> Call Site 3 <<
	.uleb128 .Lfunc_end15-.Ltmp33           #   Call between .Ltmp33 and .Lfunc_end15
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end4:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESC_EET1_RNS5_16execution_policyIT_EET0_SI_SD_,"axG",@progbits,_ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESC_EET1_RNS5_16execution_policyIT_EET0_SI_SD_,comdat
	.weak	_ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESC_EET1_RNS5_16execution_policyIT_EET0_SI_SD_ # -- Begin function _ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESC_EET1_RNS5_16execution_policyIT_EET0_SI_SD_
	.type	_ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESC_EET1_RNS5_16execution_policyIT_EET0_SI_SD_,@function
_ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESC_EET1_RNS5_16execution_policyIT_EET0_SI_SD_: # @_ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESC_EET1_RNS5_16execution_policyIT_EET0_SI_SD_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdx, %rax
	subq	%rsi, %rax
	testq	%rax, %rax
	jle	.LBB16_9
# %bb.1:
	cmpq	%r15, %rbx
	js	.LBB16_9
# %bb.2:
	movq	%r14, %rax
	subq	%rbx, %rax
	testq	%rax, %rax
	jle	.LBB16_9
# %bb.3:
	movq	%r14, %rax
	subq	%r15, %rax
	leaq	(%rbx,%rax), %rbx
	je	.LBB16_8
# %bb.4:                                # %.lr.ph.i.preheader
	movq	%rbx, %rax
.LBB16_5:                               # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	leaq	-32(%rax), %r12
	cmpq	%rax, %r14
	je	.LBB16_7
# %bb.6:                                #   in Loop: Header=BB16_5 Depth=1
	movq	-24(%r14), %rsi
	movq	-8(%r14), %rax
	leaq	(%rsi,%rax,4), %rdx
	movq	%r12, %rdi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEE12range_assignINS0_15normal_iteratorIPKiEEEEvT_S9_NS_27random_access_traversal_tagE
.LBB16_7:                               # %_ZN6thrust11host_vectorIiSaIiEEaSERKS2_.exit.i
                                        #   in Loop: Header=BB16_5 Depth=1
	addq	$-32, %r14
	movq	%r12, %rax
	cmpq	%r15, %r14
	jne	.LBB16_5
	jmp	.LBB16_8
.LBB16_10:                              # %.lr.ph.i10
                                        #   in Loop: Header=BB16_9 Depth=1
	cmpq	%rbx, %r15
	je	.LBB16_12
# %bb.11:                               #   in Loop: Header=BB16_9 Depth=1
	movq	8(%r15), %rsi
	movq	24(%r15), %rax
	leaq	(%rsi,%rax,4), %rdx
	movq	%rbx, %rdi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEE12range_assignINS0_15normal_iteratorIPKiEEEEvT_S9_NS_27random_access_traversal_tagE
.LBB16_12:                              # %_ZN6thrust11host_vectorIiSaIiEEaSERKS2_.exit.i13
                                        #   in Loop: Header=BB16_9 Depth=1
	addq	$32, %r15
	addq	$32, %rbx
.LBB16_9:                               # =>This Inner Loop Header: Depth=1
	cmpq	%r14, %r15
	jne	.LBB16_10
.LBB16_8:                               # %_ZN6thrust6detail24sequential_copy_backwardINS0_15normal_iteratorIPNS_11host_vectorIiSaIiEEEEES7_EET0_T_S9_S8_.exit
	movq	%rbx, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end16:
	.size	_ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESC_EET1_RNS5_16execution_policyIT_EET0_SI_SD_, .Lfunc_end16-_ZN6thrust6detail8dispatch15overlapped_copyINS_6system3cpp6detail3tagENS0_15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESC_EET1_RNS5_16execution_policyIT_EET0_SI_SD_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6detail11vector_baseIiSaIiEE12range_assignINS0_15normal_iteratorIPKiEEEEvT_S9_NS_27random_access_traversal_tagE,"axG",@progbits,_ZN6thrust6detail11vector_baseIiSaIiEE12range_assignINS0_15normal_iteratorIPKiEEEEvT_S9_NS_27random_access_traversal_tagE,comdat
	.weak	_ZN6thrust6detail11vector_baseIiSaIiEE12range_assignINS0_15normal_iteratorIPKiEEEEvT_S9_NS_27random_access_traversal_tagE # -- Begin function _ZN6thrust6detail11vector_baseIiSaIiEE12range_assignINS0_15normal_iteratorIPKiEEEEvT_S9_NS_27random_access_traversal_tagE
	.p2align	1, 0x90
	.type	_ZN6thrust6detail11vector_baseIiSaIiEE12range_assignINS0_15normal_iteratorIPKiEEEEvT_S9_NS_27random_access_traversal_tagE,@function
_ZN6thrust6detail11vector_baseIiSaIiEE12range_assignINS0_15normal_iteratorIPKiEEEEvT_S9_NS_27random_access_traversal_tagE: # @_ZN6thrust6detail11vector_baseIiSaIiEE12range_assignINS0_15normal_iteratorIPKiEEEEvT_S9_NS_27random_access_traversal_tagE
.Lfunc_begin5:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception5
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r15
	movq	%rsi, %rax
	movq	%rdi, %rbx
	movq	%rsi, %r14
	subq	%rdx, %r14
	sarq	$2, %r14
	negq	%r14
	cmpq	%r14, 16(%rdi)
	jae	.LBB17_7
# %bb.1:
	xorps	%xmm0, %xmm0
	movq	%rsp, %r8
	movups	%xmm0, 8(%r8)
.Ltmp35:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%rax, %rdx
	movq	%r15, %rcx
	callq	_ZN6thrust6detail11vector_baseIiSaIiEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_S9_RNS0_18contiguous_storageIiS2_EE
.Ltmp36:
# %bb.2:
	movq	8(%rbx), %rdi
	movq	8(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	%rdi, 8(%rsp)
	movq	16(%rbx), %rax
	movq	16(%rsp), %rcx
	movq	%rcx, 16(%rbx)
	movq	%rax, 16(%rsp)
	movq	%r14, 24(%rbx)
	testq	%rax, %rax
	je	.LBB17_16
# %bb.3:
	callq	_ZdlPv
	jmp	.LBB17_16
.LBB17_7:
	movq	24(%rbx), %rdx
	cmpq	%r14, %rdx
	jae	.LBB17_8
# %bb.10:
	leaq	(%rax,%rdx,4), %r12
	testq	%rdx, %rdx
	je	.LBB17_12
# %bb.11:
	movq	8(%rbx), %rdi
	shlq	$2, %rdx
	movq	%rax, %rsi
	callq	memmove@PLT
.LBB17_12:                              # %_ZN6thrust4copyINS_6detail15normal_iteratorIPKiEENS2_IPiEEEET0_T_S9_S8_.exit35
	cmpq	%r15, %r12
	je	.LBB17_15
# %bb.13:
	subq	%r12, %r15
	movq	24(%rbx), %rdi
	shlq	$2, %rdi
	addq	8(%rbx), %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	jmp	.LBB17_14
.LBB17_8:
	cmpq	%r15, %rax
	je	.LBB17_15
# %bb.9:
	movq	8(%rbx), %rdi
	leaq	(,%r14,4), %rdx
	movq	%rax, %rsi
.LBB17_14:                              # %_ZN6thrust6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS0_15normal_iteratorIPKiEEEENS5_IPiEET_SB_SA_.exit
	callq	memmove@PLT
.LBB17_15:                              # %_ZN6thrust6detail18contiguous_storageIiSaIiEE18uninitialized_copyINS0_15normal_iteratorIPKiEEEENS5_IPiEET_SB_SA_.exit
	movq	%r14, 24(%rbx)
.LBB17_16:
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB17_4:
	.cfi_def_cfa_offset 64
.Ltmp37:
	movq	%rax, %rbx
	cmpq	$0, 16(%rsp)
	je	.LBB17_6
# %bb.5:
	movq	8(%rsp), %rdi
	callq	_ZdlPv
.LBB17_6:                               # %_ZN6thrust6detail18contiguous_storageIiSaIiEED2Ev.exit31
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end17:
	.size	_ZN6thrust6detail11vector_baseIiSaIiEE12range_assignINS0_15normal_iteratorIPKiEEEEvT_S9_NS_27random_access_traversal_tagE, .Lfunc_end17-_ZN6thrust6detail11vector_baseIiSaIiEE12range_assignINS0_15normal_iteratorIPKiEEEEvT_S9_NS_27random_access_traversal_tagE
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6detail11vector_baseIiSaIiEE12range_assignINS0_15normal_iteratorIPKiEEEEvT_S9_NS_27random_access_traversal_tagE,"aG",@progbits,_ZN6thrust6detail11vector_baseIiSaIiEE12range_assignINS0_15normal_iteratorIPKiEEEEvT_S9_NS_27random_access_traversal_tagE,comdat
	.p2align	2, 0x0
GCC_except_table17:
.Lexception5:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end5-.Lcst_begin5
.Lcst_begin5:
	.uleb128 .Ltmp35-.Lfunc_begin5          # >> Call Site 1 <<
	.uleb128 .Ltmp36-.Ltmp35                #   Call between .Ltmp35 and .Ltmp36
	.uleb128 .Ltmp37-.Lfunc_begin5          #     jumps to .Ltmp37
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp36-.Lfunc_begin5          # >> Call Site 2 <<
	.uleb128 .Lfunc_end17-.Ltmp36           #   Call between .Ltmp36 and .Lfunc_end17
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end5:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system6detail7generic6fill_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmSB_EET0_RNS_16execution_policyIT_EESE_T1_RKT2_,"axG",@progbits,_ZN6thrust6system6detail7generic6fill_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmSB_EET0_RNS_16execution_policyIT_EESE_T1_RKT2_,comdat
	.weak	_ZN6thrust6system6detail7generic6fill_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmSB_EET0_RNS_16execution_policyIT_EESE_T1_RKT2_ # -- Begin function _ZN6thrust6system6detail7generic6fill_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmSB_EET0_RNS_16execution_policyIT_EESE_T1_RKT2_
	.type	_ZN6thrust6system6detail7generic6fill_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmSB_EET0_RNS_16execution_policyIT_EESE_T1_RKT2_,@function
_ZN6thrust6system6detail7generic6fill_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmSB_EET0_RNS_16execution_policyIT_EESE_T1_RKT2_: # @_ZN6thrust6system6detail7generic6fill_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmSB_EET0_RNS_16execution_policyIT_EESE_T1_RKT2_
.Lfunc_begin6:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception6
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	movq	%rcx, %rsi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
.Ltmp38:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movq	%r12, %rcx
	callq	_ZN6thrust10generate_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_12fill_functorIS9_EEEET0_RKNS5_21execution_policy_baseIT_EESE_T1_T2_
.Ltmp39:
# %bb.1:
	movq	%rax, %rbx
	cmpq	$0, 24(%rsp)
	je	.LBB18_3
# %bb.2:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
.LBB18_3:                               # %_ZN6thrust6detail12fill_functorINS_11host_vectorIiSaIiEEEED2Ev.exit
	movq	%rbx, %rax
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB18_4:
	.cfi_def_cfa_offset 80
.Ltmp40:
	movq	%rax, %rbx
	cmpq	$0, 24(%rsp)
	je	.LBB18_6
# %bb.5:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
.LBB18_6:                               # %_ZN6thrust6detail12fill_functorINS_11host_vectorIiSaIiEEEED2Ev.exit7
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end18:
	.size	_ZN6thrust6system6detail7generic6fill_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmSB_EET0_RNS_16execution_policyIT_EESE_T1_RKT2_, .Lfunc_end18-_ZN6thrust6system6detail7generic6fill_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmSB_EET0_RNS_16execution_policyIT_EESE_T1_RKT2_
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6system6detail7generic6fill_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmSB_EET0_RNS_16execution_policyIT_EESE_T1_RKT2_,"aG",@progbits,_ZN6thrust6system6detail7generic6fill_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmSB_EET0_RNS_16execution_policyIT_EESE_T1_RKT2_,comdat
	.p2align	2, 0x0
GCC_except_table18:
.Lexception6:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end6-.Lcst_begin6
.Lcst_begin6:
	.uleb128 .Lfunc_begin6-.Lfunc_begin6    # >> Call Site 1 <<
	.uleb128 .Ltmp38-.Lfunc_begin6          #   Call between .Lfunc_begin6 and .Ltmp38
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp38-.Lfunc_begin6          # >> Call Site 2 <<
	.uleb128 .Ltmp39-.Ltmp38                #   Call between .Ltmp38 and .Ltmp39
	.uleb128 .Ltmp40-.Lfunc_begin6          #     jumps to .Ltmp40
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp39-.Lfunc_begin6          # >> Call Site 3 <<
	.uleb128 .Lfunc_end18-.Ltmp39           #   Call between .Ltmp39 and .Lfunc_end18
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end6:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust10generate_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_12fill_functorIS9_EEEET0_RKNS5_21execution_policy_baseIT_EESE_T1_T2_,"axG",@progbits,_ZN6thrust10generate_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_12fill_functorIS9_EEEET0_RKNS5_21execution_policy_baseIT_EESE_T1_T2_,comdat
	.weak	_ZN6thrust10generate_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_12fill_functorIS9_EEEET0_RKNS5_21execution_policy_baseIT_EESE_T1_T2_ # -- Begin function _ZN6thrust10generate_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_12fill_functorIS9_EEEET0_RKNS5_21execution_policy_baseIT_EESE_T1_T2_
	.type	_ZN6thrust10generate_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_12fill_functorIS9_EEEET0_RKNS5_21execution_policy_baseIT_EESE_T1_T2_,@function
_ZN6thrust10generate_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_12fill_functorIS9_EEEET0_RKNS5_21execution_policy_baseIT_EESE_T1_T2_: # @_ZN6thrust10generate_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_12fill_functorIS9_EEEET0_RKNS5_21execution_policy_baseIT_EESE_T1_T2_
.Lfunc_begin7:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception7
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	movq	%rcx, %rsi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
.Ltmp41:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movq	%r12, %rcx
	callq	_ZN6thrust6system6detail7generic10generate_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_12fill_functorISB_EEEET0_RNS_16execution_policyIT_EESG_T1_T2_
.Ltmp42:
# %bb.1:
	movq	%rax, %rbx
	cmpq	$0, 24(%rsp)
	je	.LBB19_3
# %bb.2:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
.LBB19_3:                               # %_ZN6thrust6detail12fill_functorINS_11host_vectorIiSaIiEEEED2Ev.exit
	movq	%rbx, %rax
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB19_4:
	.cfi_def_cfa_offset 80
.Ltmp43:
	movq	%rax, %rbx
	cmpq	$0, 24(%rsp)
	je	.LBB19_6
# %bb.5:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
.LBB19_6:                               # %_ZN6thrust6detail12fill_functorINS_11host_vectorIiSaIiEEEED2Ev.exit6
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end19:
	.size	_ZN6thrust10generate_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_12fill_functorIS9_EEEET0_RKNS5_21execution_policy_baseIT_EESE_T1_T2_, .Lfunc_end19-_ZN6thrust10generate_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_12fill_functorIS9_EEEET0_RKNS5_21execution_policy_baseIT_EESE_T1_T2_
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust10generate_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_12fill_functorIS9_EEEET0_RKNS5_21execution_policy_baseIT_EESE_T1_T2_,"aG",@progbits,_ZN6thrust10generate_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_12fill_functorIS9_EEEET0_RKNS5_21execution_policy_baseIT_EESE_T1_T2_,comdat
	.p2align	2, 0x0
GCC_except_table19:
.Lexception7:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end7-.Lcst_begin7
.Lcst_begin7:
	.uleb128 .Lfunc_begin7-.Lfunc_begin7    # >> Call Site 1 <<
	.uleb128 .Ltmp41-.Lfunc_begin7          #   Call between .Lfunc_begin7 and .Ltmp41
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp41-.Lfunc_begin7          # >> Call Site 2 <<
	.uleb128 .Ltmp42-.Ltmp41                #   Call between .Ltmp41 and .Ltmp42
	.uleb128 .Ltmp43-.Lfunc_begin7          #     jumps to .Ltmp43
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp42-.Lfunc_begin7          # >> Call Site 3 <<
	.uleb128 .Lfunc_end19-.Ltmp42           #   Call between .Ltmp42 and .Lfunc_end19
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end7:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system6detail7generic10generate_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_12fill_functorISB_EEEET0_RNS_16execution_policyIT_EESG_T1_T2_,"axG",@progbits,_ZN6thrust6system6detail7generic10generate_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_12fill_functorISB_EEEET0_RNS_16execution_policyIT_EESG_T1_T2_,comdat
	.weak	_ZN6thrust6system6detail7generic10generate_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_12fill_functorISB_EEEET0_RNS_16execution_policyIT_EESG_T1_T2_ # -- Begin function _ZN6thrust6system6detail7generic10generate_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_12fill_functorISB_EEEET0_RNS_16execution_policyIT_EESG_T1_T2_
	.type	_ZN6thrust6system6detail7generic10generate_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_12fill_functorISB_EEEET0_RNS_16execution_policyIT_EESG_T1_T2_,@function
_ZN6thrust6system6detail7generic10generate_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_12fill_functorISB_EEEET0_RNS_16execution_policyIT_EESG_T1_T2_: # @_ZN6thrust6system6detail7generic10generate_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_12fill_functorISB_EEEET0_RNS_16execution_policyIT_EESG_T1_T2_
.Lfunc_begin8:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception8
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	leaq	40(%rsp), %r12
	movq	%r12, %rdi
	movq	%rcx, %rsi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
.Ltmp44:
	leaq	8(%rsp), %rdi
	movq	%r12, %rsi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
.Ltmp45:
# %bb.1:                                # %_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEEC2ES6_.exit
.Ltmp47:
	leaq	8(%rsp), %rcx
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	callq	_ZN6thrust10for_each_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_T1_T2_
.Ltmp48:
# %bb.2:
	movq	%rax, %rbx
	cmpq	$0, 24(%rsp)
	je	.LBB20_4
# %bb.3:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
.LBB20_4:                               # %_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEED2Ev.exit
	cmpq	$0, 56(%rsp)
	je	.LBB20_6
# %bb.5:
	movq	48(%rsp), %rdi
	callq	_ZdlPv
.LBB20_6:                               # %_ZN6thrust6detail12fill_functorINS_11host_vectorIiSaIiEEEED2Ev.exit
	movq	%rbx, %rax
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB20_8:
	.cfi_def_cfa_offset 112
.Ltmp49:
	movq	%rax, %rbx
	cmpq	$0, 24(%rsp)
	je	.LBB20_10
# %bb.9:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	jmp	.LBB20_10
.LBB20_7:
.Ltmp46:
	movq	%rax, %rbx
.LBB20_10:                              # %_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEED2Ev.exit8
	cmpq	$0, 56(%rsp)
	je	.LBB20_12
# %bb.11:
	movq	48(%rsp), %rdi
	callq	_ZdlPv
.LBB20_12:                              # %_ZN6thrust6detail12fill_functorINS_11host_vectorIiSaIiEEEED2Ev.exit10
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end20:
	.size	_ZN6thrust6system6detail7generic10generate_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_12fill_functorISB_EEEET0_RNS_16execution_policyIT_EESG_T1_T2_, .Lfunc_end20-_ZN6thrust6system6detail7generic10generate_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_12fill_functorISB_EEEET0_RNS_16execution_policyIT_EESG_T1_T2_
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6system6detail7generic10generate_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_12fill_functorISB_EEEET0_RNS_16execution_policyIT_EESG_T1_T2_,"aG",@progbits,_ZN6thrust6system6detail7generic10generate_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_12fill_functorISB_EEEET0_RNS_16execution_policyIT_EESG_T1_T2_,comdat
	.p2align	2, 0x0
GCC_except_table20:
.Lexception8:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end8-.Lcst_begin8
.Lcst_begin8:
	.uleb128 .Lfunc_begin8-.Lfunc_begin8    # >> Call Site 1 <<
	.uleb128 .Ltmp44-.Lfunc_begin8          #   Call between .Lfunc_begin8 and .Ltmp44
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp44-.Lfunc_begin8          # >> Call Site 2 <<
	.uleb128 .Ltmp45-.Ltmp44                #   Call between .Ltmp44 and .Ltmp45
	.uleb128 .Ltmp46-.Lfunc_begin8          #     jumps to .Ltmp46
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp47-.Lfunc_begin8          # >> Call Site 3 <<
	.uleb128 .Ltmp48-.Ltmp47                #   Call between .Ltmp47 and .Ltmp48
	.uleb128 .Ltmp49-.Lfunc_begin8          #     jumps to .Ltmp49
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp48-.Lfunc_begin8          # >> Call Site 4 <<
	.uleb128 .Lfunc_end20-.Ltmp48           #   Call between .Ltmp48 and .Lfunc_end20
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end8:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust10for_each_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_T1_T2_,"axG",@progbits,_ZN6thrust10for_each_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_T1_T2_,comdat
	.weak	_ZN6thrust10for_each_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_T1_T2_ # -- Begin function _ZN6thrust10for_each_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_T1_T2_
	.type	_ZN6thrust10for_each_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_T1_T2_,@function
_ZN6thrust10for_each_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_T1_T2_: # @_ZN6thrust10for_each_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_T1_T2_
.Lfunc_begin9:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception9
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	movq	%rcx, %rsi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
.Ltmp50:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movq	%r12, %rcx
	callq	_ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_T1_T2_
.Ltmp51:
# %bb.1:
	movq	%rax, %rbx
	cmpq	$0, 24(%rsp)
	je	.LBB21_3
# %bb.2:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
.LBB21_3:                               # %_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEED2Ev.exit
	movq	%rbx, %rax
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB21_4:
	.cfi_def_cfa_offset 80
.Ltmp52:
	movq	%rax, %rbx
	cmpq	$0, 24(%rsp)
	je	.LBB21_6
# %bb.5:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
.LBB21_6:                               # %_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEED2Ev.exit6
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end21:
	.size	_ZN6thrust10for_each_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_T1_T2_, .Lfunc_end21-_ZN6thrust10for_each_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_T1_T2_
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust10for_each_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_T1_T2_,"aG",@progbits,_ZN6thrust10for_each_nINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_T1_T2_,comdat
	.p2align	2, 0x0
GCC_except_table21:
.Lexception9:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end9-.Lcst_begin9
.Lcst_begin9:
	.uleb128 .Lfunc_begin9-.Lfunc_begin9    # >> Call Site 1 <<
	.uleb128 .Ltmp50-.Lfunc_begin9          #   Call between .Lfunc_begin9 and .Ltmp50
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp50-.Lfunc_begin9          # >> Call Site 2 <<
	.uleb128 .Ltmp51-.Ltmp50                #   Call between .Ltmp50 and .Ltmp51
	.uleb128 .Ltmp52-.Lfunc_begin9          #     jumps to .Ltmp52
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp51-.Lfunc_begin9          # >> Call Site 3 <<
	.uleb128 .Lfunc_end21-.Ltmp51           #   Call between .Ltmp51 and .Lfunc_end21
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end9:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_T1_T2_,"axG",@progbits,_ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_T1_T2_,comdat
	.weak	_ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_T1_T2_ # -- Begin function _ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_T1_T2_
	.type	_ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_T1_T2_,@function
_ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_T1_T2_: # @_ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_T1_T2_
.Lfunc_begin10:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception10
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %rbx
	movq	%rsp, %rdi
	movq	%rcx, %rsi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
	testq	%r14, %r14
	je	.LBB22_4
# %bb.1:
	movq	%rsp, %r15
.LBB22_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
.Ltmp53:
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEEclIS5_EEvRKT_
.Ltmp54:
# %bb.3:                                #   in Loop: Header=BB22_2 Depth=1
	addq	$32, %rbx
	decq	%r14
	jne	.LBB22_2
.LBB22_4:                               # %._crit_edge
	cmpq	$0, 16(%rsp)
	je	.LBB22_6
# %bb.5:
	movq	8(%rsp), %rdi
	callq	_ZdlPv
.LBB22_6:                               # %_ZN6thrust6detail16wrapped_functionINS0_21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEEEvED2Ev.exit
	movq	%rbx, %rax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB22_7:
	.cfi_def_cfa_offset 64
.Ltmp55:
	movq	%rax, %rbx
	cmpq	$0, 16(%rsp)
	je	.LBB22_9
# %bb.8:
	movq	8(%rsp), %rdi
	callq	_ZdlPv
.LBB22_9:                               # %_ZN6thrust6detail16wrapped_functionINS0_21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEEEvED2Ev.exit5
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end22:
	.size	_ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_T1_T2_, .Lfunc_end22-_ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_T1_T2_
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_T1_T2_,"aG",@progbits,_ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEEmNS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_T1_T2_,comdat
	.p2align	2, 0x0
GCC_except_table22:
.Lexception10:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end10-.Lcst_begin10
.Lcst_begin10:
	.uleb128 .Lfunc_begin10-.Lfunc_begin10  # >> Call Site 1 <<
	.uleb128 .Ltmp53-.Lfunc_begin10         #   Call between .Lfunc_begin10 and .Ltmp53
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp53-.Lfunc_begin10         # >> Call Site 2 <<
	.uleb128 .Ltmp54-.Ltmp53                #   Call between .Ltmp53 and .Ltmp54
	.uleb128 .Ltmp55-.Lfunc_begin10         #     jumps to .Ltmp55
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp54-.Lfunc_begin10         # >> Call Site 3 <<
	.uleb128 .Lfunc_end22-.Ltmp54           #   Call between .Ltmp54 and .Lfunc_end22
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end10:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEEclIS5_EEvRKT_,"axG",@progbits,_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEEclIS5_EEvRKT_,comdat
	.weak	_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEEclIS5_EEvRKT_ # -- Begin function _ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEEclIS5_EEvRKT_
	.p2align	1, 0x90
	.type	_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEEclIS5_EEvRKT_,@function
_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEEclIS5_EEvRKT_: # @_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEEclIS5_EEvRKT_
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	%rsi, %rbx
	movq	%rdi, %rsi
	movq	%rsp, %rdi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
	cmpq	$0, 16(%rbx)
	je	.LBB23_2
# %bb.1:                                # %_ZN6thrust6detail18contiguous_storageIiSaIiEE10deallocateEv.exit.i.i
	movq	8(%rbx), %rdi
	callq	_ZdlPv
.LBB23_2:                               # %_ZN6thrust6detail11vector_baseIiSaIiEED2Ev.exit
	movq	8(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	16(%rsp), %rax
	movq	%rax, 16(%rbx)
	movq	24(%rsp), %rax
	movq	%rax, 24(%rbx)
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end23:
	.size	_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEEclIS5_EEvRKT_, .Lfunc_end23-_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEEclIS5_EEvRKT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6thrust6system6detail7generic6detail20uninitialized_fill_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmSA_EET0_RNS_16execution_policyIT_EESC_T1_RKT2_NS_6detail17integral_constantIbLb0EEE,"axG",@progbits,_ZN6thrust6system6detail7generic6detail20uninitialized_fill_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmSA_EET0_RNS_16execution_policyIT_EESC_T1_RKT2_NS_6detail17integral_constantIbLb0EEE,comdat
	.weak	_ZN6thrust6system6detail7generic6detail20uninitialized_fill_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmSA_EET0_RNS_16execution_policyIT_EESC_T1_RKT2_NS_6detail17integral_constantIbLb0EEE # -- Begin function _ZN6thrust6system6detail7generic6detail20uninitialized_fill_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmSA_EET0_RNS_16execution_policyIT_EESC_T1_RKT2_NS_6detail17integral_constantIbLb0EEE
	.type	_ZN6thrust6system6detail7generic6detail20uninitialized_fill_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmSA_EET0_RNS_16execution_policyIT_EESC_T1_RKT2_NS_6detail17integral_constantIbLb0EEE,@function
_ZN6thrust6system6detail7generic6detail20uninitialized_fill_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmSA_EET0_RNS_16execution_policyIT_EESC_T1_RKT2_NS_6detail17integral_constantIbLb0EEE: # @_ZN6thrust6system6detail7generic6detail20uninitialized_fill_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmSA_EET0_RNS_16execution_policyIT_EESC_T1_RKT2_NS_6detail17integral_constantIbLb0EEE
.Lfunc_begin11:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception11
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	movq	%rcx, %rsi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
.Ltmp56:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movq	%r12, %rcx
	callq	_ZN6thrust10for_each_nINS_6system3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS7_EEEET0_RKNS9_21execution_policy_baseIT_EESC_T1_T2_
.Ltmp57:
# %bb.1:
	movq	%rax, %rbx
	cmpq	$0, 24(%rsp)
	je	.LBB24_3
# %bb.2:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
.LBB24_3:                               # %_ZN6thrust6detail26uninitialized_fill_functorINS_11host_vectorIiSaIiEEEED2Ev.exit
	movq	%rbx, %rax
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB24_4:
	.cfi_def_cfa_offset 80
.Ltmp58:
	movq	%rax, %rbx
	cmpq	$0, 24(%rsp)
	je	.LBB24_6
# %bb.5:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
.LBB24_6:                               # %_ZN6thrust6detail26uninitialized_fill_functorINS_11host_vectorIiSaIiEEEED2Ev.exit6
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end24:
	.size	_ZN6thrust6system6detail7generic6detail20uninitialized_fill_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmSA_EET0_RNS_16execution_policyIT_EESC_T1_RKT2_NS_6detail17integral_constantIbLb0EEE, .Lfunc_end24-_ZN6thrust6system6detail7generic6detail20uninitialized_fill_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmSA_EET0_RNS_16execution_policyIT_EESC_T1_RKT2_NS_6detail17integral_constantIbLb0EEE
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6system6detail7generic6detail20uninitialized_fill_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmSA_EET0_RNS_16execution_policyIT_EESC_T1_RKT2_NS_6detail17integral_constantIbLb0EEE,"aG",@progbits,_ZN6thrust6system6detail7generic6detail20uninitialized_fill_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmSA_EET0_RNS_16execution_policyIT_EESC_T1_RKT2_NS_6detail17integral_constantIbLb0EEE,comdat
	.p2align	2, 0x0
GCC_except_table24:
.Lexception11:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end11-.Lcst_begin11
.Lcst_begin11:
	.uleb128 .Lfunc_begin11-.Lfunc_begin11  # >> Call Site 1 <<
	.uleb128 .Ltmp56-.Lfunc_begin11         #   Call between .Lfunc_begin11 and .Ltmp56
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp56-.Lfunc_begin11         # >> Call Site 2 <<
	.uleb128 .Ltmp57-.Ltmp56                #   Call between .Ltmp56 and .Ltmp57
	.uleb128 .Ltmp58-.Lfunc_begin11         #     jumps to .Ltmp58
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp57-.Lfunc_begin11         # >> Call Site 3 <<
	.uleb128 .Lfunc_end24-.Ltmp57           #   Call between .Ltmp57 and .Lfunc_end24
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end11:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust10for_each_nINS_6system3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS7_EEEET0_RKNS9_21execution_policy_baseIT_EESC_T1_T2_,"axG",@progbits,_ZN6thrust10for_each_nINS_6system3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS7_EEEET0_RKNS9_21execution_policy_baseIT_EESC_T1_T2_,comdat
	.weak	_ZN6thrust10for_each_nINS_6system3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS7_EEEET0_RKNS9_21execution_policy_baseIT_EESC_T1_T2_ # -- Begin function _ZN6thrust10for_each_nINS_6system3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS7_EEEET0_RKNS9_21execution_policy_baseIT_EESC_T1_T2_
	.type	_ZN6thrust10for_each_nINS_6system3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS7_EEEET0_RKNS9_21execution_policy_baseIT_EESC_T1_T2_,@function
_ZN6thrust10for_each_nINS_6system3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS7_EEEET0_RKNS9_21execution_policy_baseIT_EESC_T1_T2_: # @_ZN6thrust10for_each_nINS_6system3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS7_EEEET0_RKNS9_21execution_policy_baseIT_EESC_T1_T2_
.Lfunc_begin12:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception12
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	movq	%rcx, %rsi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
.Ltmp59:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movq	%r12, %rcx
	callq	_ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS9_EEEET0_RNS2_16execution_policyIT_EESE_T1_T2_
.Ltmp60:
# %bb.1:
	movq	%rax, %rbx
	cmpq	$0, 24(%rsp)
	je	.LBB25_3
# %bb.2:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
.LBB25_3:                               # %_ZN6thrust6detail26uninitialized_fill_functorINS_11host_vectorIiSaIiEEEED2Ev.exit
	movq	%rbx, %rax
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB25_4:
	.cfi_def_cfa_offset 80
.Ltmp61:
	movq	%rax, %rbx
	cmpq	$0, 24(%rsp)
	je	.LBB25_6
# %bb.5:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
.LBB25_6:                               # %_ZN6thrust6detail26uninitialized_fill_functorINS_11host_vectorIiSaIiEEEED2Ev.exit5
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end25:
	.size	_ZN6thrust10for_each_nINS_6system3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS7_EEEET0_RKNS9_21execution_policy_baseIT_EESC_T1_T2_, .Lfunc_end25-_ZN6thrust10for_each_nINS_6system3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS7_EEEET0_RKNS9_21execution_policy_baseIT_EESC_T1_T2_
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust10for_each_nINS_6system3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS7_EEEET0_RKNS9_21execution_policy_baseIT_EESC_T1_T2_,"aG",@progbits,_ZN6thrust10for_each_nINS_6system3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS7_EEEET0_RKNS9_21execution_policy_baseIT_EESC_T1_T2_,comdat
	.p2align	2, 0x0
GCC_except_table25:
.Lexception12:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end12-.Lcst_begin12
.Lcst_begin12:
	.uleb128 .Lfunc_begin12-.Lfunc_begin12  # >> Call Site 1 <<
	.uleb128 .Ltmp59-.Lfunc_begin12         #   Call between .Lfunc_begin12 and .Ltmp59
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp59-.Lfunc_begin12         # >> Call Site 2 <<
	.uleb128 .Ltmp60-.Ltmp59                #   Call between .Ltmp59 and .Ltmp60
	.uleb128 .Ltmp61-.Lfunc_begin12         #     jumps to .Ltmp61
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp60-.Lfunc_begin12         # >> Call Site 3 <<
	.uleb128 .Lfunc_end25-.Ltmp60           #   Call between .Ltmp60 and .Lfunc_end25
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end12:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS9_EEEET0_RNS2_16execution_policyIT_EESE_T1_T2_,"axG",@progbits,_ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS9_EEEET0_RNS2_16execution_policyIT_EESE_T1_T2_,comdat
	.weak	_ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS9_EEEET0_RNS2_16execution_policyIT_EESE_T1_T2_ # -- Begin function _ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS9_EEEET0_RNS2_16execution_policyIT_EESE_T1_T2_
	.type	_ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS9_EEEET0_RNS2_16execution_policyIT_EESE_T1_T2_,@function
_ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS9_EEEET0_RNS2_16execution_policyIT_EESE_T1_T2_: # @_ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS9_EEEET0_RNS2_16execution_policyIT_EESE_T1_T2_
.Lfunc_begin13:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception13
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %rbx
	movq	%rsp, %rdi
	movq	%rcx, %rsi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
	testq	%r14, %r14
	je	.LBB26_4
# %bb.1:
	movq	%rsp, %r15
.LBB26_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
.Ltmp62:
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
.Ltmp63:
# %bb.3:                                # %_ZNK6thrust6detail16wrapped_functionINS0_26uninitialized_fill_functorINS_11host_vectorIiSaIiEEEEEvEclIS5_EEvRT_.exit
                                        #   in Loop: Header=BB26_2 Depth=1
	addq	$32, %rbx
	decq	%r14
	jne	.LBB26_2
.LBB26_4:                               # %._crit_edge
	cmpq	$0, 16(%rsp)
	je	.LBB26_6
# %bb.5:
	movq	8(%rsp), %rdi
	callq	_ZdlPv
.LBB26_6:                               # %_ZN6thrust6detail16wrapped_functionINS0_26uninitialized_fill_functorINS_11host_vectorIiSaIiEEEEEvED2Ev.exit
	movq	%rbx, %rax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB26_7:
	.cfi_def_cfa_offset 64
.Ltmp64:
	movq	%rax, %rbx
	cmpq	$0, 16(%rsp)
	je	.LBB26_9
# %bb.8:
	movq	8(%rsp), %rdi
	callq	_ZdlPv
.LBB26_9:                               # %_ZN6thrust6detail16wrapped_functionINS0_26uninitialized_fill_functorINS_11host_vectorIiSaIiEEEEEvED2Ev.exit9
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end26:
	.size	_ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS9_EEEET0_RNS2_16execution_policyIT_EESE_T1_T2_, .Lfunc_end26-_ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS9_EEEET0_RNS2_16execution_policyIT_EESE_T1_T2_
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS9_EEEET0_RNS2_16execution_policyIT_EESE_T1_T2_,"aG",@progbits,_ZN6thrust6system6detail10sequential10for_each_nINS0_3cpp6detail3tagEPNS_11host_vectorIiSaIiEEEmNS_6detail26uninitialized_fill_functorIS9_EEEET0_RNS2_16execution_policyIT_EESE_T1_T2_,comdat
	.p2align	2, 0x0
GCC_except_table26:
.Lexception13:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end13-.Lcst_begin13
.Lcst_begin13:
	.uleb128 .Lfunc_begin13-.Lfunc_begin13  # >> Call Site 1 <<
	.uleb128 .Ltmp62-.Lfunc_begin13         #   Call between .Lfunc_begin13 and .Ltmp62
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp62-.Lfunc_begin13         # >> Call Site 2 <<
	.uleb128 .Ltmp63-.Ltmp62                #   Call between .Ltmp62 and .Ltmp63
	.uleb128 .Ltmp64-.Lfunc_begin13         #     jumps to .Ltmp64
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp63-.Lfunc_begin13         # >> Call Site 3 <<
	.uleb128 .Lfunc_end26-.Ltmp63           #   Call between .Ltmp63 and .Lfunc_end26
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end13:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system6detail7generic4fillINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESB_EEvRNS_16execution_policyIT_EET0_SI_RKT1_,"axG",@progbits,_ZN6thrust6system6detail7generic4fillINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESB_EEvRNS_16execution_policyIT_EET0_SI_RKT1_,comdat
	.weak	_ZN6thrust6system6detail7generic4fillINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESB_EEvRNS_16execution_policyIT_EET0_SI_RKT1_ # -- Begin function _ZN6thrust6system6detail7generic4fillINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESB_EEvRNS_16execution_policyIT_EET0_SI_RKT1_
	.type	_ZN6thrust6system6detail7generic4fillINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESB_EEvRNS_16execution_policyIT_EET0_SI_RKT1_,@function
_ZN6thrust6system6detail7generic4fillINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESB_EEvRNS_16execution_policyIT_EET0_SI_RKT1_: # @_ZN6thrust6system6detail7generic4fillINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESB_EEvRNS_16execution_policyIT_EET0_SI_RKT1_
.Lfunc_begin14:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception14
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	movq	%rcx, %rsi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
.Ltmp65:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movq	%r12, %rcx
	callq	_ZN6thrust8generateINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_12fill_functorIS9_EEEEvRKNS5_21execution_policy_baseIT_EET0_SJ_T1_
.Ltmp66:
# %bb.1:
	cmpq	$0, 24(%rsp)
	je	.LBB27_3
# %bb.2:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
.LBB27_3:                               # %_ZN6thrust6detail12fill_functorINS_11host_vectorIiSaIiEEEED2Ev.exit
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB27_4:
	.cfi_def_cfa_offset 80
.Ltmp67:
	movq	%rax, %rbx
	cmpq	$0, 24(%rsp)
	je	.LBB27_6
# %bb.5:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
.LBB27_6:                               # %_ZN6thrust6detail12fill_functorINS_11host_vectorIiSaIiEEEED2Ev.exit7
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end27:
	.size	_ZN6thrust6system6detail7generic4fillINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESB_EEvRNS_16execution_policyIT_EET0_SI_RKT1_, .Lfunc_end27-_ZN6thrust6system6detail7generic4fillINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESB_EEvRNS_16execution_policyIT_EET0_SI_RKT1_
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6system6detail7generic4fillINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESB_EEvRNS_16execution_policyIT_EET0_SI_RKT1_,"aG",@progbits,_ZN6thrust6system6detail7generic4fillINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEESB_EEvRNS_16execution_policyIT_EET0_SI_RKT1_,comdat
	.p2align	2, 0x0
GCC_except_table27:
.Lexception14:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end14-.Lcst_begin14
.Lcst_begin14:
	.uleb128 .Lfunc_begin14-.Lfunc_begin14  # >> Call Site 1 <<
	.uleb128 .Ltmp65-.Lfunc_begin14         #   Call between .Lfunc_begin14 and .Ltmp65
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp65-.Lfunc_begin14         # >> Call Site 2 <<
	.uleb128 .Ltmp66-.Ltmp65                #   Call between .Ltmp65 and .Ltmp66
	.uleb128 .Ltmp67-.Lfunc_begin14         #     jumps to .Ltmp67
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp66-.Lfunc_begin14         # >> Call Site 3 <<
	.uleb128 .Lfunc_end27-.Ltmp66           #   Call between .Ltmp66 and .Lfunc_end27
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end14:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust8generateINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_12fill_functorIS9_EEEEvRKNS5_21execution_policy_baseIT_EET0_SJ_T1_,"axG",@progbits,_ZN6thrust8generateINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_12fill_functorIS9_EEEEvRKNS5_21execution_policy_baseIT_EET0_SJ_T1_,comdat
	.weak	_ZN6thrust8generateINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_12fill_functorIS9_EEEEvRKNS5_21execution_policy_baseIT_EET0_SJ_T1_ # -- Begin function _ZN6thrust8generateINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_12fill_functorIS9_EEEEvRKNS5_21execution_policy_baseIT_EET0_SJ_T1_
	.type	_ZN6thrust8generateINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_12fill_functorIS9_EEEEvRKNS5_21execution_policy_baseIT_EET0_SJ_T1_,@function
_ZN6thrust8generateINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_12fill_functorIS9_EEEEvRKNS5_21execution_policy_baseIT_EET0_SJ_T1_: # @_ZN6thrust8generateINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_12fill_functorIS9_EEEEvRKNS5_21execution_policy_baseIT_EET0_SJ_T1_
.Lfunc_begin15:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception15
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	movq	%rcx, %rsi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
.Ltmp68:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movq	%r12, %rcx
	callq	_ZN6thrust6system6detail7generic8generateINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_12fill_functorISB_EEEEvRNS_16execution_policyIT_EET0_SK_T1_
.Ltmp69:
# %bb.1:
	cmpq	$0, 24(%rsp)
	je	.LBB28_3
# %bb.2:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
.LBB28_3:                               # %_ZN6thrust6detail12fill_functorINS_11host_vectorIiSaIiEEEED2Ev.exit
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB28_4:
	.cfi_def_cfa_offset 80
.Ltmp70:
	movq	%rax, %rbx
	cmpq	$0, 24(%rsp)
	je	.LBB28_6
# %bb.5:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
.LBB28_6:                               # %_ZN6thrust6detail12fill_functorINS_11host_vectorIiSaIiEEEED2Ev.exit6
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end28:
	.size	_ZN6thrust8generateINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_12fill_functorIS9_EEEEvRKNS5_21execution_policy_baseIT_EET0_SJ_T1_, .Lfunc_end28-_ZN6thrust8generateINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_12fill_functorIS9_EEEEvRKNS5_21execution_policy_baseIT_EET0_SJ_T1_
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust8generateINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_12fill_functorIS9_EEEEvRKNS5_21execution_policy_baseIT_EET0_SJ_T1_,"aG",@progbits,_ZN6thrust8generateINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_12fill_functorIS9_EEEEvRKNS5_21execution_policy_baseIT_EET0_SJ_T1_,comdat
	.p2align	2, 0x0
GCC_except_table28:
.Lexception15:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end15-.Lcst_begin15
.Lcst_begin15:
	.uleb128 .Lfunc_begin15-.Lfunc_begin15  # >> Call Site 1 <<
	.uleb128 .Ltmp68-.Lfunc_begin15         #   Call between .Lfunc_begin15 and .Ltmp68
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp68-.Lfunc_begin15         # >> Call Site 2 <<
	.uleb128 .Ltmp69-.Ltmp68                #   Call between .Ltmp68 and .Ltmp69
	.uleb128 .Ltmp70-.Lfunc_begin15         #     jumps to .Ltmp70
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp69-.Lfunc_begin15         # >> Call Site 3 <<
	.uleb128 .Lfunc_end28-.Ltmp69           #   Call between .Ltmp69 and .Lfunc_end28
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end15:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system6detail7generic8generateINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_12fill_functorISB_EEEEvRNS_16execution_policyIT_EET0_SK_T1_,"axG",@progbits,_ZN6thrust6system6detail7generic8generateINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_12fill_functorISB_EEEEvRNS_16execution_policyIT_EET0_SK_T1_,comdat
	.weak	_ZN6thrust6system6detail7generic8generateINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_12fill_functorISB_EEEEvRNS_16execution_policyIT_EET0_SK_T1_ # -- Begin function _ZN6thrust6system6detail7generic8generateINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_12fill_functorISB_EEEEvRNS_16execution_policyIT_EET0_SK_T1_
	.type	_ZN6thrust6system6detail7generic8generateINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_12fill_functorISB_EEEEvRNS_16execution_policyIT_EET0_SK_T1_,@function
_ZN6thrust6system6detail7generic8generateINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_12fill_functorISB_EEEEvRNS_16execution_policyIT_EET0_SK_T1_: # @_ZN6thrust6system6detail7generic8generateINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_12fill_functorISB_EEEEvRNS_16execution_policyIT_EET0_SK_T1_
.Lfunc_begin16:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception16
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	leaq	40(%rsp), %r12
	movq	%r12, %rdi
	movq	%rcx, %rsi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
.Ltmp71:
	leaq	8(%rsp), %rdi
	movq	%r12, %rsi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
.Ltmp72:
# %bb.1:                                # %_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEEC2ES6_.exit
.Ltmp74:
	leaq	8(%rsp), %rcx
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	callq	_ZN6thrust8for_eachINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_SG_T1_
.Ltmp75:
# %bb.2:
	cmpq	$0, 24(%rsp)
	je	.LBB29_4
# %bb.3:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
.LBB29_4:                               # %_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEED2Ev.exit
	cmpq	$0, 56(%rsp)
	je	.LBB29_6
# %bb.5:
	movq	48(%rsp), %rdi
	callq	_ZdlPv
.LBB29_6:                               # %_ZN6thrust6detail12fill_functorINS_11host_vectorIiSaIiEEEED2Ev.exit
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB29_8:
	.cfi_def_cfa_offset 112
.Ltmp76:
	movq	%rax, %rbx
	cmpq	$0, 24(%rsp)
	je	.LBB29_10
# %bb.9:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	jmp	.LBB29_10
.LBB29_7:
.Ltmp73:
	movq	%rax, %rbx
.LBB29_10:                              # %_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEED2Ev.exit9
	cmpq	$0, 56(%rsp)
	je	.LBB29_12
# %bb.11:
	movq	48(%rsp), %rdi
	callq	_ZdlPv
.LBB29_12:                              # %_ZN6thrust6detail12fill_functorINS_11host_vectorIiSaIiEEEED2Ev.exit11
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end29:
	.size	_ZN6thrust6system6detail7generic8generateINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_12fill_functorISB_EEEEvRNS_16execution_policyIT_EET0_SK_T1_, .Lfunc_end29-_ZN6thrust6system6detail7generic8generateINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_12fill_functorISB_EEEEvRNS_16execution_policyIT_EET0_SK_T1_
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6system6detail7generic8generateINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_12fill_functorISB_EEEEvRNS_16execution_policyIT_EET0_SK_T1_,"aG",@progbits,_ZN6thrust6system6detail7generic8generateINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_12fill_functorISB_EEEEvRNS_16execution_policyIT_EET0_SK_T1_,comdat
	.p2align	2, 0x0
GCC_except_table29:
.Lexception16:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end16-.Lcst_begin16
.Lcst_begin16:
	.uleb128 .Lfunc_begin16-.Lfunc_begin16  # >> Call Site 1 <<
	.uleb128 .Ltmp71-.Lfunc_begin16         #   Call between .Lfunc_begin16 and .Ltmp71
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp71-.Lfunc_begin16         # >> Call Site 2 <<
	.uleb128 .Ltmp72-.Ltmp71                #   Call between .Ltmp71 and .Ltmp72
	.uleb128 .Ltmp73-.Lfunc_begin16         #     jumps to .Ltmp73
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp74-.Lfunc_begin16         # >> Call Site 3 <<
	.uleb128 .Ltmp75-.Ltmp74                #   Call between .Ltmp74 and .Ltmp75
	.uleb128 .Ltmp76-.Lfunc_begin16         #     jumps to .Ltmp76
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp75-.Lfunc_begin16         # >> Call Site 4 <<
	.uleb128 .Lfunc_end29-.Ltmp75           #   Call between .Ltmp75 and .Lfunc_end29
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end16:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust8for_eachINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_SG_T1_,"axG",@progbits,_ZN6thrust8for_eachINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_SG_T1_,comdat
	.weak	_ZN6thrust8for_eachINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_SG_T1_ # -- Begin function _ZN6thrust8for_eachINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_SG_T1_
	.type	_ZN6thrust8for_eachINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_SG_T1_,@function
_ZN6thrust8for_eachINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_SG_T1_: # @_ZN6thrust8for_eachINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_SG_T1_
.Lfunc_begin17:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception17
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	movq	%rcx, %rsi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
.Ltmp77:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movq	%r12, %rcx
	callq	_ZN6thrust6system6detail10sequential8for_eachINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_SI_T1_
.Ltmp78:
# %bb.1:
	movq	%rax, %rbx
	cmpq	$0, 24(%rsp)
	je	.LBB30_3
# %bb.2:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
.LBB30_3:                               # %_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEED2Ev.exit
	movq	%rbx, %rax
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB30_4:
	.cfi_def_cfa_offset 80
.Ltmp79:
	movq	%rax, %rbx
	cmpq	$0, 24(%rsp)
	je	.LBB30_6
# %bb.5:
	movq	16(%rsp), %rdi
	callq	_ZdlPv
.LBB30_6:                               # %_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEED2Ev.exit7
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end30:
	.size	_ZN6thrust8for_eachINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_SG_T1_, .Lfunc_end30-_ZN6thrust8for_eachINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_SG_T1_
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust8for_eachINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_SG_T1_,"aG",@progbits,_ZN6thrust8for_eachINS_6system3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS5_21host_generate_functorINS5_12fill_functorIS9_EEEEEET0_RKNS5_21execution_policy_baseIT_EESG_SG_T1_,comdat
	.p2align	2, 0x0
GCC_except_table30:
.Lexception17:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end17-.Lcst_begin17
.Lcst_begin17:
	.uleb128 .Lfunc_begin17-.Lfunc_begin17  # >> Call Site 1 <<
	.uleb128 .Ltmp77-.Lfunc_begin17         #   Call between .Lfunc_begin17 and .Ltmp77
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp77-.Lfunc_begin17         # >> Call Site 2 <<
	.uleb128 .Ltmp78-.Ltmp77                #   Call between .Ltmp77 and .Ltmp78
	.uleb128 .Ltmp79-.Lfunc_begin17         #     jumps to .Ltmp79
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp78-.Lfunc_begin17         # >> Call Site 3 <<
	.uleb128 .Lfunc_end30-.Ltmp78           #   Call between .Ltmp78 and .Lfunc_end30
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end17:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6thrust6system6detail10sequential8for_eachINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_SI_T1_,"axG",@progbits,_ZN6thrust6system6detail10sequential8for_eachINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_SI_T1_,comdat
	.weak	_ZN6thrust6system6detail10sequential8for_eachINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_SI_T1_ # -- Begin function _ZN6thrust6system6detail10sequential8for_eachINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_SI_T1_
	.type	_ZN6thrust6system6detail10sequential8for_eachINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_SI_T1_,@function
_ZN6thrust6system6detail10sequential8for_eachINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_SI_T1_: # @_ZN6thrust6system6detail10sequential8for_eachINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_SI_T1_
.Lfunc_begin18:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception18
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %rbx
	movq	%rsp, %rdi
	movq	%rcx, %rsi
	callq	_ZN6thrust6detail11vector_baseIiSaIiEEC2ERKS3_
	cmpq	%r14, %rbx
	je	.LBB31_5
# %bb.1:                                # %.lr.ph.preheader
	movq	%rsp, %r15
.LBB31_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
.Ltmp80:
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	_ZN6thrust6detail21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEEclIS5_EEvRKT_
.Ltmp81:
# %bb.3:                                # %_ZNK6thrust6detail16wrapped_functionINS0_21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEEEvEclIS6_EEvRT_.exit
                                        #   in Loop: Header=BB31_2 Depth=1
	addq	$32, %rbx
	cmpq	%r14, %rbx
	jne	.LBB31_2
# %bb.4:
	movq	%r14, %rbx
.LBB31_5:                               # %._crit_edge
	cmpq	$0, 16(%rsp)
	je	.LBB31_7
# %bb.6:
	movq	8(%rsp), %rdi
	callq	_ZdlPv
.LBB31_7:                               # %_ZN6thrust6detail16wrapped_functionINS0_21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEEEvED2Ev.exit2
	movq	%rbx, %rax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB31_8:
	.cfi_def_cfa_offset 64
.Ltmp82:
	movq	%rax, %rbx
	cmpq	$0, 16(%rsp)
	je	.LBB31_10
# %bb.9:
	movq	8(%rsp), %rdi
	callq	_ZdlPv
.LBB31_10:                              # %_ZN6thrust6detail16wrapped_functionINS0_21host_generate_functorINS0_12fill_functorINS_11host_vectorIiSaIiEEEEEEEvED2Ev.exit
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end31:
	.size	_ZN6thrust6system6detail10sequential8for_eachINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_SI_T1_, .Lfunc_end31-_ZN6thrust6system6detail10sequential8for_eachINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_SI_T1_
	.cfi_endproc
	.section	.gcc_except_table._ZN6thrust6system6detail10sequential8for_eachINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_SI_T1_,"aG",@progbits,_ZN6thrust6system6detail10sequential8for_eachINS0_3cpp6detail3tagENS_6detail15normal_iteratorIPNS_11host_vectorIiSaIiEEEEENS7_21host_generate_functorINS7_12fill_functorISB_EEEEEET0_RNS2_16execution_policyIT_EESI_SI_T1_,comdat
	.p2align	2, 0x0
GCC_except_table31:
.Lexception18:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end18-.Lcst_begin18
.Lcst_begin18:
	.uleb128 .Lfunc_begin18-.Lfunc_begin18  # >> Call Site 1 <<
	.uleb128 .Ltmp80-.Lfunc_begin18         #   Call between .Lfunc_begin18 and .Ltmp80
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp80-.Lfunc_begin18         # >> Call Site 2 <<
	.uleb128 .Ltmp81-.Ltmp80                #   Call between .Ltmp80 and .Ltmp81
	.uleb128 .Ltmp82-.Lfunc_begin18         #     jumps to .Ltmp82
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp81-.Lfunc_begin18         # >> Call Site 3 <<
	.uleb128 .Lfunc_end31-.Ltmp81           #   Call between .Ltmp81 and .Lfunc_end31
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end18:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorIN6thrust11host_vectorIiSaIiEEEE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIN6thrust11host_vectorIiSaIiEEEE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorIN6thrust11host_vectorIiSaIiEEEE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIN6thrust11host_vectorIiSaIiEEEE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorIN6thrust11host_vectorIiSaIiEEEE8allocateEmPKv,@function
_ZNSt15__new_allocatorIN6thrust11host_vectorIiSaIiEEEE8allocateEmPKv: # @_ZNSt15__new_allocatorIN6thrust11host_vectorIiSaIiEEEE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$58, %rax
	jne	.LBB32_1
# %bb.3:
	shlq	$5, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB32_1:
	.cfi_def_cfa_offset 16
	shrq	$59, %rsi
	je	.LBB32_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB32_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end32:
	.size	_ZNSt15__new_allocatorIN6thrust11host_vectorIiSaIiEEEE8allocateEmPKv, .Lfunc_end32-_ZNSt15__new_allocatorIN6thrust11host_vectorIiSaIiEEEE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB33_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB33_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14matrixMultiplyPimS_mS_mii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9showPitchPimii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end33:
	.size	__hip_module_ctor, .Lfunc_end33-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB34_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB34_2:
	retq
.Lfunc_end34:
	.size	__hip_module_dtor, .Lfunc_end34-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	", "
	.size	.L.str, 3

	.type	_Z14matrixMultiplyPimS_mS_mii,@object # @_Z14matrixMultiplyPimS_mS_mii
	.section	.rodata,"a",@progbits
	.globl	_Z14matrixMultiplyPimS_mS_mii
	.p2align	3, 0x0
_Z14matrixMultiplyPimS_mS_mii:
	.quad	_Z29__device_stub__matrixMultiplyPimS_mS_mii
	.size	_Z14matrixMultiplyPimS_mS_mii, 8

	.type	_Z9showPitchPimii,@object       # @_Z9showPitchPimii
	.globl	_Z9showPitchPimii
	.p2align	3, 0x0
_Z9showPitchPimii:
	.quad	_Z24__device_stub__showPitchPimii
	.size	_Z9showPitchPimii, 8

	.type	_ZZ4mainE3h_c,@object           # @_ZZ4mainE3h_c
	.local	_ZZ4mainE3h_c
	.comm	_ZZ4mainE3h_c,64,16
	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"------------------"
	.size	.L.str.1, 19

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"pause"
	.size	.L.str.2, 6

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"assignment exceeds max_size()."
	.size	.L.str.5, 31

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14matrixMultiplyPimS_mS_mii"
	.size	.L__unnamed_1, 30

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9showPitchPimii"
	.size	.L__unnamed_2, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.globl	_ZN6MatrixC1Ev
	.type	_ZN6MatrixC1Ev,@function
.set _ZN6MatrixC1Ev, _ZN6MatrixC2Ev
	.globl	_ZN6MatrixC1Eii
	.type	_ZN6MatrixC1Eii,@function
.set _ZN6MatrixC1Eii, _ZN6MatrixC2Eii
	.globl	_ZN6MatrixD1Ev
	.type	_ZN6MatrixD1Ev,@function
.set _ZN6MatrixD1Ev, _ZN6MatrixD2Ev
	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _Z29__device_stub__matrixMultiplyPimS_mS_mii
	.addrsig_sym _Z24__device_stub__showPitchPimii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z14matrixMultiplyPimS_mS_mii
	.addrsig_sym _Z9showPitchPimii
	.addrsig_sym _ZZ4mainE3h_c
	.addrsig_sym _ZTISt12length_error
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.p2align	2                               ; -- Begin function __ockl_printf_append_string_n
	.type	__ockl_printf_append_string_n,@function
__ockl_printf_append_string_n:          ; @__ockl_printf_append_string_n
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v7, v3 :: v_dual_mov_b32 v6, v2
	v_mov_b32_e32 v8, v0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_ne_u64_e32 0, v[6:7]
	s_xor_b32 s10, exec_lo, s0
	s_cbranch_execz .LBB0_87
; %bb.1:
	s_load_b64 s[2:3], s[8:9], 0x50
	v_dual_mov_b32 v29, 0 :: v_dual_and_b32 v32, 2, v8
	v_dual_mov_b32 v11, 1 :: v_dual_and_b32 v0, -3, v8
	v_mbcnt_lo_u32_b32 v33, -1, 0
	v_mov_b32_e32 v10, 2
	s_mov_b32 s12, 0
	s_mov_b32 s11, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
                                        ;     Child Loop BB0_13 Depth 2
                                        ;     Child Loop BB0_21 Depth 2
                                        ;     Child Loop BB0_29 Depth 2
                                        ;     Child Loop BB0_37 Depth 2
                                        ;     Child Loop BB0_45 Depth 2
                                        ;     Child Loop BB0_53 Depth 2
                                        ;     Child Loop BB0_61 Depth 2
                                        ;     Child Loop BB0_69 Depth 2
                                        ;     Child Loop BB0_75 Depth 2
                                        ;     Child Loop BB0_84 Depth 2
	v_cmp_gt_u64_e32 vcc_lo, 56, v[4:5]
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $sgpr4
	s_mov_b32 s0, exec_lo
	v_dual_cndmask_b32 v31, 0, v5 :: v_dual_cndmask_b32 v30, 56, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 8, v30
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB0_8
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_ne_u32_e32 0, v30
	s_cbranch_execz .LBB0_7
; %bb.4:                                ; %.preheader31.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_lshlrev_b64 v[8:9], 3, v[30:31]
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v13, v7
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v12, v6
	s_mov_b64 s[4:5], 0
	s_mov_b32 s7, 0
.LBB0_5:                                ; %.preheader31
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_u8 v9, v[12:13]
	v_mov_b32_e32 v15, s12
	v_add_co_u32 v12, vcc_lo, v12, 1
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v14, 0xffff, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[14:15], s4, v[14:15]
	s_add_u32 s4, s4, 8
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e64 s0, s4, v8
	v_or_b32_e32 v3, v15, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v2, v14, v2
	s_or_b32 s7, s0, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_5
; %bb.6:                                ; %Flow172
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_7:                                ; %Flow174
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	s_mov_b32 s4, 0
.LBB0_8:                                ; %Flow176
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s1
	v_dual_mov_b32 v14, s4 :: v_dual_mov_b32 v9, v7
	v_mov_b32_e32 v8, v6
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_2 Depth=1
	s_waitcnt vmcnt(0)
	s_clause 0x5
	flat_load_u8 v2, v[6:7]
	flat_load_u8 v3, v[6:7] offset:1
	flat_load_u8 v8, v[6:7] offset:2
	flat_load_u8 v9, v[6:7] offset:3
	flat_load_u8 v12, v[6:7] offset:5
	flat_load_u8 v13, v[6:7] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v15, v29 :: v_dual_and_b32 v2, 0xffff, v2
	s_clause 0x1
	flat_load_u8 v14, v[6:7] offset:7
	flat_load_d16_hi_u8 v15, v[6:7] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v3, 8, v3
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v8, 16, v8
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v9, 24, v9
	v_or_b32_e32 v2, v3, v2
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v3, 8, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_or3_b32 v2, v2, v8, v9
	s_waitcnt vmcnt(2)
	v_or3_b32 v3, 0, v13, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v2, v2, 0, 0
	v_or3_b32 v2, v2, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v8, 24, v14
	v_add_nc_u32_e32 v14, -8, v30
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_or3_b32 v3, v3, v15, v8
	v_add_co_u32 v8, vcc_lo, v6, 8
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v7, vcc_lo
.LBB0_10:                               ; %.loopexit32
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr12_vgpr13
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v14
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_16
; %bb.11:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v12, 0
	v_mov_b32_e32 v13, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v14
	s_cbranch_execz .LBB0_15
; %bb.12:                               ; %.preheader29.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v12, 0
	v_mov_b32_e32 v13, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_13:                               ; %.preheader29
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v15, vcc_lo, v8, s4
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v9, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v14
	flat_load_u8 v15, v[15:16]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v16, s12 :: v_dual_and_b32 v15, 0xffff, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[15:16], s0, v[15:16]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v13, v16, v13
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v12, v15, v12
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_13
; %bb.14:                               ; %Flow167
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_15:                               ; %Flow169
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr14
.LBB0_16:                               ; %Flow171
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v16, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v12, v[8:9]
	flat_load_u8 v13, v[8:9] offset:1
	flat_load_u8 v15, v[8:9] offset:2
	flat_load_u8 v16, v[8:9] offset:3
	flat_load_u8 v17, v[8:9] offset:5
	flat_load_u8 v18, v[8:9] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v19, v29 :: v_dual_and_b32 v12, 0xffff, v12
	s_clause 0x1
	flat_load_u8 v20, v[8:9] offset:7
	flat_load_d16_hi_u8 v19, v[8:9] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v13, 8, v13
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v15, 16, v15
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v16, 24, v16
	v_add_co_u32 v8, vcc_lo, v8, 8
	v_or_b32_e32 v12, v13, v12
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v13, 8, v17
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v12, v12, v15, v16
	s_waitcnt vmcnt(2)
	v_or3_b32 v13, 0, v18, v13
	v_add_nc_u32_e32 v16, -8, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v12, v12, 0, 0
	v_or3_b32 v12, v12, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v15, 24, v20
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v13, v13, v19, v15
.LBB0_18:                               ; %.loopexit30
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v16
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_24
; %bb.19:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v14, 0
	v_mov_b32_e32 v15, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v16
	s_cbranch_execz .LBB0_23
; %bb.20:                               ; %.preheader27.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v14, 0
	v_mov_b32_e32 v15, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_21:                               ; %.preheader27
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v17, vcc_lo, v8, s4
	v_add_co_ci_u32_e32 v18, vcc_lo, s5, v9, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v16
	flat_load_u8 v17, v[17:18]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v18, s12 :: v_dual_and_b32 v17, 0xffff, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[17:18], s0, v[17:18]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v15, v18, v15
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v14, v17, v14
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_21
; %bb.22:                               ; %Flow162
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_23:                               ; %Flow164
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr16
.LBB0_24:                               ; %Flow166
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v18, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_26
; %bb.25:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v14, v[8:9]
	flat_load_u8 v15, v[8:9] offset:1
	flat_load_u8 v17, v[8:9] offset:2
	flat_load_u8 v18, v[8:9] offset:3
	flat_load_u8 v19, v[8:9] offset:5
	flat_load_u8 v20, v[8:9] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v21, v29 :: v_dual_and_b32 v14, 0xffff, v14
	s_clause 0x1
	flat_load_u8 v22, v[8:9] offset:7
	flat_load_d16_hi_u8 v21, v[8:9] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v15, 8, v15
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v17, 16, v17
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v18, 24, v18
	v_add_co_u32 v8, vcc_lo, v8, 8
	v_or_b32_e32 v14, v15, v14
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v15, 8, v19
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v14, v14, v17, v18
	s_waitcnt vmcnt(2)
	v_or3_b32 v15, 0, v20, v15
	v_add_nc_u32_e32 v18, -8, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v14, v14, 0, 0
	v_or3_b32 v14, v14, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v17, 24, v22
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v15, v15, v21, v17
.LBB0_26:                               ; %.loopexit28
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr16_vgpr17
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v18
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_32
; %bb.27:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v16, 0
	v_mov_b32_e32 v17, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v18
	s_cbranch_execz .LBB0_31
; %bb.28:                               ; %.preheader25.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v16, 0
	v_mov_b32_e32 v17, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_29:                               ; %.preheader25
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v19, vcc_lo, v8, s4
	v_add_co_ci_u32_e32 v20, vcc_lo, s5, v9, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v18
	flat_load_u8 v19, v[19:20]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v20, s12 :: v_dual_and_b32 v19, 0xffff, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], s0, v[19:20]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v17, v20, v17
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v16, v19, v16
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_29
; %bb.30:                               ; %Flow157
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_31:                               ; %Flow159
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr18
.LBB0_32:                               ; %Flow161
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v20, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_34
; %bb.33:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v16, v[8:9]
	flat_load_u8 v17, v[8:9] offset:1
	flat_load_u8 v19, v[8:9] offset:2
	flat_load_u8 v20, v[8:9] offset:3
	flat_load_u8 v21, v[8:9] offset:5
	flat_load_u8 v22, v[8:9] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v23, v29 :: v_dual_and_b32 v16, 0xffff, v16
	s_clause 0x1
	flat_load_u8 v24, v[8:9] offset:7
	flat_load_d16_hi_u8 v23, v[8:9] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v17, 8, v17
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v19, 16, v19
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v20, 24, v20
	v_add_co_u32 v8, vcc_lo, v8, 8
	v_or_b32_e32 v16, v17, v16
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v17, 8, v21
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v16, v16, v19, v20
	s_waitcnt vmcnt(2)
	v_or3_b32 v17, 0, v22, v17
	v_add_nc_u32_e32 v20, -8, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v16, v16, 0, 0
	v_or3_b32 v16, v16, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v19, 24, v24
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v17, v17, v23, v19
.LBB0_34:                               ; %.loopexit26
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v20
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_40
; %bb.35:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v18, 0
	v_mov_b32_e32 v19, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v20
	s_cbranch_execz .LBB0_39
; %bb.36:                               ; %.preheader23.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v18, 0
	v_mov_b32_e32 v19, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_37:                               ; %.preheader23
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v21, vcc_lo, v8, s4
	v_add_co_ci_u32_e32 v22, vcc_lo, s5, v9, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v20
	flat_load_u8 v21, v[21:22]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v22, s12 :: v_dual_and_b32 v21, 0xffff, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[21:22], s0, v[21:22]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v19, v22, v19
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v18, v21, v18
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_37
; %bb.38:                               ; %Flow152
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_39:                               ; %Flow154
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr20
.LBB0_40:                               ; %Flow156
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v22, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_42
; %bb.41:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v18, v[8:9]
	flat_load_u8 v19, v[8:9] offset:1
	flat_load_u8 v21, v[8:9] offset:2
	flat_load_u8 v22, v[8:9] offset:3
	flat_load_u8 v23, v[8:9] offset:5
	flat_load_u8 v24, v[8:9] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v25, v29 :: v_dual_and_b32 v18, 0xffff, v18
	s_clause 0x1
	flat_load_u8 v26, v[8:9] offset:7
	flat_load_d16_hi_u8 v25, v[8:9] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v19, 8, v19
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v21, 16, v21
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v22, 24, v22
	v_add_co_u32 v8, vcc_lo, v8, 8
	v_or_b32_e32 v18, v19, v18
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v19, 8, v23
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v18, v18, v21, v22
	s_waitcnt vmcnt(2)
	v_or3_b32 v19, 0, v24, v19
	v_add_nc_u32_e32 v22, -8, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v18, v18, 0, 0
	v_or3_b32 v18, v18, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v21, 24, v26
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v19, v19, v25, v21
.LBB0_42:                               ; %.loopexit24
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr20_vgpr21
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v22
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_48
; %bb.43:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v20, 0
	v_mov_b32_e32 v21, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v22
	s_cbranch_execz .LBB0_47
; %bb.44:                               ; %.preheader21.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v20, 0
	v_mov_b32_e32 v21, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_45:                               ; %.preheader21
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v23, vcc_lo, v8, s4
	v_add_co_ci_u32_e32 v24, vcc_lo, s5, v9, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v22
	flat_load_u8 v23, v[23:24]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v24, s12 :: v_dual_and_b32 v23, 0xffff, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[23:24], s0, v[23:24]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v21, v24, v21
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v20, v23, v20
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_45
; %bb.46:                               ; %Flow147
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_47:                               ; %Flow149
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr22
.LBB0_48:                               ; %Flow151
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v24, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_50
; %bb.49:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v20, v[8:9]
	flat_load_u8 v21, v[8:9] offset:1
	flat_load_u8 v23, v[8:9] offset:2
	flat_load_u8 v24, v[8:9] offset:3
	flat_load_u8 v25, v[8:9] offset:5
	flat_load_u8 v26, v[8:9] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v27, v29 :: v_dual_and_b32 v20, 0xffff, v20
	s_clause 0x1
	flat_load_u8 v28, v[8:9] offset:7
	flat_load_d16_hi_u8 v27, v[8:9] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v21, 8, v21
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v23, 16, v23
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v24, 24, v24
	v_add_co_u32 v8, vcc_lo, v8, 8
	v_or_b32_e32 v20, v21, v20
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v21, 8, v25
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v20, v20, v23, v24
	s_waitcnt vmcnt(2)
	v_or3_b32 v21, 0, v26, v21
	v_add_nc_u32_e32 v24, -8, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v20, v20, 0, 0
	v_or3_b32 v20, v20, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v23, 24, v28
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v21, v21, v27, v23
.LBB0_50:                               ; %.loopexit22
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v24
	s_xor_b32 s4, exec_lo, s0
	s_cbranch_execz .LBB0_56
; %bb.51:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v22, 0
	v_mov_b32_e32 v23, 0
	s_mov_b32 s5, exec_lo
	v_cmpx_ne_u32_e32 0, v24
	s_cbranch_execz .LBB0_55
; %bb.52:                               ; %.preheader.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v22, 0
	v_mov_b32_e32 v23, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s6, 0
.LBB0_53:                               ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_u8 v25, v[8:9]
	v_mov_b32_e32 v26, s12
	v_add_nc_u32_e32 v24, -1, v24
	v_add_co_u32 v8, vcc_lo, v8, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v24
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v25, 0xffff, v25
	v_lshlrev_b64 v[25:26], s0, v[25:26]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v23, v26, v23
	v_or_b32_e32 v22, v25, v22
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_53
; %bb.54:                               ; %Flow142
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_55:                               ; %Flow144
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr8_vgpr9
.LBB0_56:                               ; %Flow146
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB0_58
; %bb.57:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v22, v[8:9]
	flat_load_u8 v23, v[8:9] offset:1
	flat_load_u8 v24, v[8:9] offset:2
	flat_load_u8 v25, v[8:9] offset:3
	flat_load_u8 v26, v[8:9] offset:5
	flat_load_u8 v27, v[8:9] offset:4
	v_mov_b32_e32 v28, v29
	s_clause 0x1
	flat_load_u8 v34, v[8:9] offset:7
	flat_load_d16_hi_u8 v28, v[8:9] offset:6
	s_waitcnt vmcnt(7) lgkmcnt(0)
	v_and_b32_e32 v8, 0xffff, v22
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v9, 8, v23
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v22, 16, v24
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v23, 8, v26
	v_or_b32_e32 v8, v9, v8
	v_lshlrev_b32_e32 v9, 24, v25
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v8, v8, v22, v9
	s_waitcnt vmcnt(2)
	v_or3_b32 v9, 0, v27, v23
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v22, 24, v34
	v_or3_b32 v8, v8, 0, 0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or3_b32 v23, v9, v28, v22
	v_or3_b32 v22, v8, 0, 0
.LBB0_58:                               ; %.loopexit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v28, v33
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v28
	v_cmp_eq_u32_e64 s0, s0, v28
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_64
; %bb.59:                               ;   in Loop: Header=BB0_2 Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[26:27], v29, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[8:9], v29, s[2:3] offset:40
	global_load_b64 v[24:25], v29, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v9, v9, v27
	v_and_b32_e32 v8, v8, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v9, v9, 24
	v_mul_hi_u32 v34, v8, 24
	v_mul_lo_u32 v8, v8, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v9, v34, v9
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v24, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v25, v9, vcc_lo
	global_load_b64 v[24:25], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v29, v[24:27], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[26:27]
	s_cbranch_execz .LBB0_63
; %bb.60:                               ; %.preheader3.i.i19.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s5, 0
.LBB0_61:                               ; %.preheader3.i.i19
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[24:25], v29, s[2:3] offset:40
	global_load_b64 v[34:35], v29, s[2:3]
	v_dual_mov_b32 v27, v9 :: v_dual_mov_b32 v26, v8
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v24, v24, v26
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[8:9], null, v24, 24, v[34:35]
	v_and_b32_e32 v34, v25, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[24:25], null, v34, 24, v[9:10]
	v_mov_b32_e32 v9, v24
	global_load_b64 v[24:25], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v29, v[24:27], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[26:27]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_61
; %bb.62:                               ; %Flow139
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_63:                               ; %Flow141
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_64:                               ; %.loopexit4.i.i14
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[34:35], v29, s[2:3] offset:40
	global_load_b128 v[24:27], v29, s[2:3]
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_mov_b32 s15, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v34
	v_readfirstlane_b32 s7, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s13, s6, 24
	s_mul_i32 s14, s6, 24
	s_and_saveexec_b32 s16, s0
	s_cbranch_execz .LBB0_66
; %bb.65:                               ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s17, s13, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v34, vcc_lo, v24, s14
	v_add_co_ci_u32_e32 v35, vcc_lo, s17, v25, vcc_lo
	v_dual_mov_b32 v8, s15 :: v_dual_mov_b32 v9, v29
	global_store_b128 v[34:35], v[8:11], off offset:8
.LBB0_66:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	v_cmp_lt_u64_e32 vcc_lo, 56, v[4:5]
	v_or_b32_e32 v8, 0, v1
	v_or_b32_e32 v9, v0, v32
	v_lshl_add_u32 v34, v30, 2, 28
	s_lshl_b64 s[6:7], s[6:7], 12
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v1, v8, v1 :: v_dual_cndmask_b32 v0, v9, v0
	v_lshlrev_b64 v[8:9], 6, v[28:29]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v26, vcc_lo, v26, s6
	v_and_b32_e32 v34, 0x1e0, v34
	v_add_co_ci_u32_e32 v27, vcc_lo, s7, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, v26, v8
	v_and_or_b32 v0, 0xffffff1f, v0, v34
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, v27, v9, vcc_lo
	s_clause 0x3
	global_store_b128 v[8:9], v[0:3], off
	global_store_b128 v[8:9], v[12:15], off offset:16
	global_store_b128 v[8:9], v[16:19], off offset:32
	global_store_b128 v[8:9], v[20:23], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_74
; %bb.67:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x1
	global_load_b64 v[16:17], v29, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v29, s[2:3] offset:40
	v_dual_mov_b32 v14, s4 :: v_dual_mov_b32 v15, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v0
	v_readfirstlane_b32 s17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[16:17], s[16:17], s[4:5]
	s_mul_i32 s7, s17, 24
	s_mul_hi_u32 s15, s16, 24
	s_mul_i32 s16, s16, 24
	s_add_i32 s15, s15, s7
	v_add_co_u32 v12, vcc_lo, v24, s16
	v_add_co_ci_u32_e32 v13, vcc_lo, s15, v25, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[12:13], v[16:17], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v29, v[14:17], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[16:17]
	s_cbranch_execz .LBB0_70
; %bb.68:                               ; %.preheader1.i.i17.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s15, 0
.LBB0_69:                               ; %.preheader1.i.i17
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[12:13], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v29, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s15, vcc_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB0_69
.LBB0_70:                               ; %Flow137
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[0:1], v29, s[2:3] offset:16
	s_mov_b32 s15, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s15, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_72
; %bb.71:                               ;   in Loop: Header=BB0_2 Depth=1
	s_bcnt1_i32_b32 s15, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v28, s15
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[28:29], off offset:8
.LBB0_72:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_74
; %bb.73:                               ;   in Loop: Header=BB0_2 Depth=1
	global_load_b32 v28, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v28
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[28:29], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_74:                               ; %Flow138
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s13, s13, s1
	v_add_co_u32 v0, vcc_lo, v24, s14
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_75:                               ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_77
; %bb.76:                               ;   in Loop: Header=BB0_75 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB0_77:                               ;   in Loop: Header=BB0_75 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_79
; %bb.78:                               ;   in Loop: Header=BB0_75 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_80
.LBB0_79:                               ;   in Loop: Header=BB0_75 Depth=2
	s_mov_b32 s1, -1
.LBB0_80:                               ; %Flow132
                                        ;   in Loop: Header=BB0_75 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_75
; %bb.81:                               ;   in Loop: Header=BB0_2 Depth=1
	global_load_b128 v[0:3], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_85
; %bb.82:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v29, s[2:3] offset:40
	global_load_b64 v[8:9], v29, s[2:3] offset:24 glc
	global_load_b64 v[14:15], v29, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v16, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, v16, s4
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[12:13]
	v_dual_cndmask_b32 v13, v13, v17 :: v_dual_cndmask_b32 v12, v12, v16
	v_and_b32_e32 v3, v13, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v12, v2
	v_mul_hi_u32 v16, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, vcc_lo, v14, v2
	v_mov_b32_e32 v14, v8
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v16, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, v15, v3, vcc_lo
	v_mov_b32_e32 v15, v9
	global_store_b64 v[2:3], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[14:15], v29, v[12:15], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[14:15], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_85
; %bb.83:                               ; %.preheader.i.i16.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s0, 0
.LBB0_84:                               ; %.preheader.i.i16
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[2:3], v[14:15], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v29, v[12:15], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[14:15]
	v_dual_mov_b32 v15, v9 :: v_dual_mov_b32 v14, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_84
.LBB0_85:                               ; %__ockl_hostcall_preview.exit20
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_sub_co_u32 v4, vcc_lo, v4, v30
	v_sub_co_ci_u32_e32 v5, vcc_lo, v5, v31, vcc_lo
	v_add_co_u32 v6, s0, v6, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v7, s0, v7, v31, s0
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_2
; %bb.86:                               ; %Flow177
	s_or_b32 exec_lo, exec_lo, s11
                                        ; implicit-def: $vgpr8
.LBB0_87:                               ; %Flow193
	s_and_not1_saveexec_b32 s1, s10
	s_cbranch_execz .LBB0_116
; %bb.88:
	s_load_b64 s[2:3], s[8:9], 0x50
	s_waitcnt vmcnt(0)
	v_mbcnt_lo_u32_b32 v2, -1, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s0, v2
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v10, 0
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB0_94
; %bb.89:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[5:6], v0, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[3:4], v0, s[2:3] offset:40
	global_load_b64 v[9:10], v0, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v7, v3, 24
	v_mul_lo_u32 v4, v4, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v7, v4
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v9, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v10, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v0, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[9:10], v[5:6]
	s_cbranch_execz .LBB0_93
; %bb.90:                               ; %.preheader3.i.i.preheader
	s_mov_b32 s6, 0
.LBB0_91:                               ; %.preheader3.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[3:4], v0, s[2:3] offset:40
	global_load_b64 v[11:12], v0, s[2:3]
	v_dual_mov_b32 v5, v9 :: v_dual_mov_b32 v6, v10
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, v3, v5
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, v3, 24, v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, v10 :: v_dual_and_b32 v4, v4, v6
	v_mad_u64_u32 v[10:11], null, v4, 24, v[3:4]
	global_load_b64 v[3:4], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v0, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[5:6]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_91
; %bb.92:                               ; %Flow189
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_93:                               ; %Flow191
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_94:                               ; %.loopexit4.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_mov_b32 s11, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[11:12], v3, s[2:3] offset:40
	global_load_b128 v[4:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v11
	v_readfirstlane_b32 s7, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s8, s7, 24
	s_mul_hi_u32 s9, s6, 24
	s_mul_i32 s10, s6, 24
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB0_96
; %bb.95:
	s_add_i32 s13, s9, s8
	s_waitcnt vmcnt(0)
	v_add_co_u32 v13, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v14, vcc_lo, s13, v5, vcc_lo
	v_dual_mov_b32 v9, s11 :: v_dual_mov_b32 v10, v3
	v_dual_mov_b32 v11, 2 :: v_dual_mov_b32 v12, 1
	global_store_b128 v[13:14], v[9:12], off offset:8
.LBB0_96:
	s_or_b32 exec_lo, exec_lo, s12
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[9:10], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v9
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_and_or_b32 v0, 0xffffff1f, v8, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v10, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v11, s15
	v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v10, s14
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_104
; %bb.97:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v10, s[2:3] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, s5, v1
	v_and_b32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v2, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v2, v1
	v_add_co_u32 v8, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v5, v1, vcc_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB0_100
; %bb.98:                               ; %.preheader1.i.i.preheader
	s_mov_b32 s11, 0
.LBB0_99:                               ; %.preheader1.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_99
.LBB0_100:                              ; %Flow187
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s11, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s11, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_102
; %bb.101:
	s_bcnt1_i32_b32 s11, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s11
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB0_102:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_104
; %bb.103:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_104:                              ; %Flow188
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s9, s9, s8
	v_add_co_u32 v0, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_105:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_107
; %bb.106:                              ;   in Loop: Header=BB0_105 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB0_107:                              ;   in Loop: Header=BB0_105 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v2
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB0_109
; %bb.108:                              ;   in Loop: Header=BB0_105 Depth=1
	s_mov_b32 s6, 0
	s_sleep 1
	s_branch .LBB0_110
.LBB0_109:                              ;   in Loop: Header=BB0_105 Depth=1
	s_mov_b32 s6, -1
.LBB0_110:                              ; %Flow182
                                        ;   in Loop: Header=BB0_105 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_105
; %bb.111:
	global_load_b128 v[0:3], v[6:7], off
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_115
; %bb.112:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[2:3] offset:40
	global_load_b64 v[9:10], v8, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v8, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_115
; %bb.113:                              ; %.preheader.i.i.preheader
	s_mov_b32 s0, 0
.LBB0_114:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_114
.LBB0_115:                              ; %__ockl_hostcall_preview.exit
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_116:                              ; %Flow194
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end0:
	.size	__ockl_printf_append_string_n, .Lfunc_end0-__ockl_printf_append_string_n
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 5688
; NumSgprs: 34
; NumVgprs: 36
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	_Z14matrixMultiplyPimS_mS_mii ; -- Begin function _Z14matrixMultiplyPimS_mS_mii
	.globl	_Z14matrixMultiplyPimS_mS_mii
	.p2align	8
	.type	_Z14matrixMultiplyPimS_mS_mii,@function
_Z14matrixMultiplyPimS_mS_mii:          ; @_Z14matrixMultiplyPimS_mS_mii
; %bb.0:
	s_mov_b64 s[18:19], s[0:1]
	s_load_b32 s0, s[0:1], 0x44
	s_load_b32 s28, s[18:19], 0x30
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_add_u32 s34, s18, 56
	s_addc_u32 s35, s19, 0
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s1, s0, 16
	s_and_b32 s0, s0, 0xffff
	v_mad_u64_u32 v[38:39], null, s15, s1, v[1:2]
	v_mad_u64_u32 v[41:42], null, s14, s0, v[0:1]
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v0, v38, v41
	v_cmpx_gt_i32_e64 s28, v0
	s_cbranch_execz .LBB1_221
; %bb.1:
	s_clause 0x1
	s_load_b256 s[20:27], s[18:19], 0x0
	s_load_b128 s[36:39], s[18:19], 0x20
	v_mul_lo_u32 v49, v38, 12
	v_ashrrev_i32_e32 v48, 31, v38
	v_ashrrev_i32_e32 v47, 31, v41
	s_add_i32 s29, s28, -1
	s_mov_b32 s33, exec_lo
	v_cmpx_gt_i32_e64 s29, v41
	s_cbranch_execz .LBB1_109
; %bb.2:
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v4, v38, s23
	v_mul_lo_u32 v5, v48, s22
	v_mad_u64_u32 v[0:1], null, v38, s22, s[20:21]
	v_mov_b32_e32 v42, v47
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	v_mbcnt_lo_u32_b32 v45, -1, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[41:42]
	v_add3_u32 v1, v5, v1, v4
	v_mov_b32_e32 v4, v45
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, v0, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo
	global_load_b32 v0, v[0:1], off
	v_mul_lo_u32 v1, v38, 12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v1, v41, 2, v1
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v44, v1
	s_load_b64 s[20:21], s[34:35], 0x50
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_8
; %bb.3:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_7
; %bb.4:                                ; %.preheader3.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB1_5:                                ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_5
; %bb.6:                                ; %Flow447
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_7:                                ; %Flow449
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_8:                                ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_10
; %bb.9:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_10:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_17
; %bb.11:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_13
.LBB1_12:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_12
.LBB1_13:                               ; %Flow445
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_15
; %bb.14:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_15:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_17
; %bb.16:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_17:                               ; %Flow446
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_18:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_20
; %bb.19:                               ;   in Loop: Header=BB1_18 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_20:                               ;   in Loop: Header=BB1_18 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_22
; %bb.21:                               ;   in Loop: Header=BB1_18 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_23
.LBB1_22:                               ;   in Loop: Header=BB1_18 Depth=1
	s_mov_b32 s1, -1
.LBB1_23:                               ; %Flow440
                                        ;   in Loop: Header=BB1_18 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_18
; %bb.24:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_28
; %bb.25:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_28
; %bb.26:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB1_27:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_27
.LBB1_28:                               ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str@rel32@lo+4
	s_addc_u32 s1, s1, .str@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v5, 0
	s_cselect_b32 s4, 24, 0
	s_add_u32 s8, s18, 56
	v_mov_b32_e32 v4, s4
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v5, v45
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v5
	v_mov_b32_e32 v7, 0
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v5
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_34
; %bb.29:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[9:10], v1, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[6:7], v1, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v3, v3, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v3, v3, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[7:8], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[9:10]
	s_cbranch_execz .LBB1_33
; %bb.30:                               ; %.preheader3.i.i.i56.preheader
	s_mov_b32 s3, 0
.LBB1_31:                               ; %.preheader3.i.i.i56
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[11:12], v1, s[20:21]
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v8, v3, v10
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v2, 24, v[11:12]
	v_mov_b32_e32 v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v8, 24, v[2:3]
	v_mov_b32_e32 v7, v3
	global_load_b64 v[7:8], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[9:10]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_31
; %bb.32:                               ; %Flow433
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_33:                               ; %Flow435
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_34:                               ; %.loopexit4.i.i.i51
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v6, 0
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[9:10], v6, s[20:21] offset:40
	global_load_b128 v[1:4], v6, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_36
; %bb.35:
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, v6
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s8, v2, vcc_lo
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB1_36:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[7:8], 6, v[5:6]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v3, v7
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v36, 0xffffff1f, v0, 32
	v_add_co_ci_u32_e32 v8, vcc_lo, v4, v8, vcc_lo
	v_mov_b32_e32 v39, v6
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v6, s11
	v_dual_mov_b32 v4, s9 :: v_dual_mov_b32 v5, s10
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_44
; %bb.37:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v0, s[20:21] offset:32 glc
	global_load_b64 v[3:4], v0, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v9, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[9:10], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v0, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[13:14]
	s_cbranch_execz .LBB1_40
; %bb.38:                               ; %.preheader1.i.i.i54.preheader
	s_mov_b32 s8, 0
.LBB1_39:                               ; %.preheader1.i.i.i54
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[9:10], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v0, v[3:6], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_39
.LBB1_40:                               ; %Flow431
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_42
; %bb.41:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB1_42:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB1_44
; %bb.43:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_44:                               ; %Flow432
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_45:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_47
; %bb.46:                               ;   in Loop: Header=BB1_45 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_47:                               ;   in Loop: Header=BB1_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_49
; %bb.48:                               ;   in Loop: Header=BB1_45 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_50
.LBB1_49:                               ;   in Loop: Header=BB1_45 Depth=1
	s_mov_b32 s1, -1
.LBB1_50:                               ; %Flow426
                                        ;   in Loop: Header=BB1_45 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_45
; %bb.51:
	global_load_b64 v[39:40], v[7:8], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_55
; %bb.52:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_55
; %bb.53:                               ; %.preheader.i.i.i53.preheader
	s_mov_b32 s0, 0
.LBB1_54:                               ; %.preheader.i.i.i53
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_54
.LBB1_55:                               ; %__ockl_printf_append_args.exit
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v4, v45
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_61
; %bb.56:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_60
; %bb.57:                               ; %.preheader3.i.i.i62.preheader
	s_mov_b32 s3, 0
.LBB1_58:                               ; %.preheader3.i.i.i62
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_58
; %bb.59:                               ; %Flow419
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_60:                               ; %Flow421
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_61:                               ; %.loopexit4.i.i.i57
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_63
; %bb.62:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_63:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v6
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v39, 0xffffff1f, v39, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v7, vcc_lo
	v_mov_b32_e32 v42, v5
	v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v5, s11
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[39:42], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_71
; %bb.64:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_67
; %bb.65:                               ; %.preheader1.i.i.i60.preheader
	s_mov_b32 s8, 0
.LBB1_66:                               ; %.preheader1.i.i.i60
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_66
.LBB1_67:                               ; %Flow417
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_69
; %bb.68:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_69:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_71
; %bb.70:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_71:                               ; %Flow418
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_72:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_74
; %bb.73:                               ;   in Loop: Header=BB1_72 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_74:                               ;   in Loop: Header=BB1_72 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_76
; %bb.75:                               ;   in Loop: Header=BB1_72 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_77
.LBB1_76:                               ;   in Loop: Header=BB1_72 Depth=1
	s_mov_b32 s1, -1
.LBB1_77:                               ; %Flow412
                                        ;   in Loop: Header=BB1_72 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_72
; %bb.78:
	global_load_b64 v[42:43], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_82
; %bb.79:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_82
; %bb.80:                               ; %.preheader.i.i.i59.preheader
	s_mov_b32 s0, 0
.LBB1_81:                               ; %.preheader.i.i.i59
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_81
.LBB1_82:                               ; %__ockl_printf_append_args.exit63
	s_or_b32 exec_lo, exec_lo, s1
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v45
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v45
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_88
; %bb.83:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[3:4], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v6
	v_and_b32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v4, v2, vcc_lo
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[6:7]
	s_cbranch_execz .LBB1_87
; %bb.84:                               ; %.preheader3.i.i.i69.preheader
	s_mov_b32 s3, 0
.LBB1_85:                               ; %.preheader3.i.i.i69
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[8:9], v0, s[20:21]
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, v1, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v1, 24, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, v4 :: v_dual_and_b32 v2, v2, v7
	v_mad_u64_u32 v[4:5], null, v2, 24, v[1:2]
	global_load_b64 v[4:5], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_85
; %bb.86:                               ; %Flow405
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_87:                               ; %Flow407
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_88:                               ; %.loopexit4.i.i.i64
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v46, 0
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[6:7], v46, s[20:21] offset:40
	global_load_b128 v[0:3], v46, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_90
; %bb.89:
	v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, v46
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v9, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v6, 2 :: v_dual_mov_b32 v7, 1
	global_store_b128 v[8:9], v[4:7], off offset:8
.LBB1_90:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[45:46]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v42, 0xffffff1d, v42, 34
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v45, v46 :: v_dual_mov_b32 v2, s8
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	v_mov_b32_e32 v5, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[42:45], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_98
; %bb.91:
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v8, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v8, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[9:12], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[11:12]
	s_cbranch_execz .LBB1_94
; %bb.92:                               ; %.preheader1.i.i.i67.preheader
	s_mov_b32 s8, 0
.LBB1_93:                               ; %.preheader1.i.i.i67
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v8, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_93
.LBB1_94:                               ; %Flow403
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_96
; %bb.95:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_96:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_98
; %bb.97:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_98:                               ; %Flow404
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_99:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_101
; %bb.100:                              ;   in Loop: Header=BB1_99 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_101:                              ;   in Loop: Header=BB1_99 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_103
; %bb.102:                              ;   in Loop: Header=BB1_99 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_104
.LBB1_103:                              ;   in Loop: Header=BB1_99 Depth=1
	s_mov_b32 s1, -1
.LBB1_104:                              ; %Flow398
                                        ;   in Loop: Header=BB1_99 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_99
; %bb.105:
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_109
; %bb.106:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_109
; %bb.107:                              ; %.preheader.i.i.i66.preheader
	s_mov_b32 s0, 0
.LBB1_108:                              ; %.preheader.i.i.i66
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_108
.LBB1_109:                              ; %Flow450
	s_or_b32 exec_lo, exec_lo, s33
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s22, exec_lo
	v_cmpx_gt_i32_e64 s29, v38
	s_cbranch_execz .LBB1_217
; %bb.110:
	v_mul_lo_u32 v4, v38, s27
	v_mul_lo_u32 v5, v48, s26
	v_mad_u64_u32 v[0:1], null, v38, s26, s[24:25]
	v_mov_b32_e32 v42, v47
	v_mbcnt_lo_u32_b32 v45, -1, 0
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[41:42]
	v_add3_u32 v1, v5, v1, v4
	v_mov_b32_e32 v4, v45
	v_add_co_u32 v0, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo
	global_load_b32 v0, v[0:1], off
	v_lshlrev_b32_e32 v1, 2, v41
	v_lshl_add_u32 v1, v38, 4, v1
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v0 offset:48
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v44, v1 offset:48
	s_load_b64 s[20:21], s[34:35], 0x50
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_116
; %bb.111:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_115
; %bb.112:                              ; %.preheader3.i.i.i76.preheader
	s_mov_b32 s3, 0
.LBB1_113:                              ; %.preheader3.i.i.i76
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_113
; %bb.114:                              ; %Flow389
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_115:                              ; %Flow391
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_116:                              ; %.loopexit4.i.i.i71
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_118
; %bb.117:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_118:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_125
; %bb.119:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_121
.LBB1_120:                              ; %.preheader1.i.i.i74
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_120
.LBB1_121:                              ; %Flow387
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_123
; %bb.122:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_123:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_125
; %bb.124:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_125:                              ; %Flow388
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_126:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_128
; %bb.127:                              ;   in Loop: Header=BB1_126 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_128:                              ;   in Loop: Header=BB1_126 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_130
; %bb.129:                              ;   in Loop: Header=BB1_126 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_131
.LBB1_130:                              ;   in Loop: Header=BB1_126 Depth=1
	s_mov_b32 s1, -1
.LBB1_131:                              ; %Flow382
                                        ;   in Loop: Header=BB1_126 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_126
; %bb.132:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_136
; %bb.133:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_136
; %bb.134:                              ; %.preheader.i.i.i73.preheader
	s_mov_b32 s0, 0
.LBB1_135:                              ; %.preheader.i.i.i73
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_135
.LBB1_136:                              ; %__ockl_printf_begin.exit77
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.1@rel32@lo+4
	s_addc_u32 s1, s1, .str.1@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v5, 0
	s_cselect_b32 s4, 24, 0
	s_add_u32 s8, s18, 56
	v_mov_b32_e32 v4, s4
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v5, v45
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v5
	v_mov_b32_e32 v7, 0
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v5
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_142
; %bb.137:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[9:10], v1, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[6:7], v1, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v3, v3, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v3, v3, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[7:8], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[9:10]
	s_cbranch_execz .LBB1_141
; %bb.138:                              ; %.preheader3.i.i.i83.preheader
	s_mov_b32 s3, 0
.LBB1_139:                              ; %.preheader3.i.i.i83
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[11:12], v1, s[20:21]
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v8, v3, v10
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v2, 24, v[11:12]
	v_mov_b32_e32 v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v8, 24, v[2:3]
	v_mov_b32_e32 v7, v3
	global_load_b64 v[7:8], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[9:10]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_139
; %bb.140:                              ; %Flow375
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_141:                              ; %Flow377
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_142:                              ; %.loopexit4.i.i.i78
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v6, 0
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[9:10], v6, s[20:21] offset:40
	global_load_b128 v[1:4], v6, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_144
; %bb.143:
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, v6
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s8, v2, vcc_lo
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB1_144:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[7:8], 6, v[5:6]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v3, v7
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v36, 0xffffff1f, v0, 32
	v_add_co_ci_u32_e32 v8, vcc_lo, v4, v8, vcc_lo
	v_mov_b32_e32 v39, v6
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v6, s11
	v_dual_mov_b32 v4, s9 :: v_dual_mov_b32 v5, s10
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_152
; %bb.145:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v0, s[20:21] offset:32 glc
	global_load_b64 v[3:4], v0, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v9, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[9:10], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v0, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[13:14]
	s_cbranch_execz .LBB1_148
; %bb.146:                              ; %.preheader1.i.i.i81.preheader
	s_mov_b32 s8, 0
.LBB1_147:                              ; %.preheader1.i.i.i81
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[9:10], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v0, v[3:6], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_147
.LBB1_148:                              ; %Flow373
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_150
; %bb.149:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB1_150:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB1_152
; %bb.151:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_152:                              ; %Flow374
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_153:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_155
; %bb.154:                              ;   in Loop: Header=BB1_153 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_155:                              ;   in Loop: Header=BB1_153 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_157
; %bb.156:                              ;   in Loop: Header=BB1_153 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_158
.LBB1_157:                              ;   in Loop: Header=BB1_153 Depth=1
	s_mov_b32 s1, -1
.LBB1_158:                              ; %Flow368
                                        ;   in Loop: Header=BB1_153 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_153
; %bb.159:
	global_load_b64 v[39:40], v[7:8], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_163
; %bb.160:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_163
; %bb.161:                              ; %.preheader.i.i.i80.preheader
	s_mov_b32 s0, 0
.LBB1_162:                              ; %.preheader.i.i.i80
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_162
.LBB1_163:                              ; %__ockl_printf_append_args.exit84
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v4, v45
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_169
; %bb.164:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_168
; %bb.165:                              ; %.preheader3.i.i.i90.preheader
	s_mov_b32 s3, 0
.LBB1_166:                              ; %.preheader3.i.i.i90
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_166
; %bb.167:                              ; %Flow361
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_168:                              ; %Flow363
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_169:                              ; %.loopexit4.i.i.i85
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_171
; %bb.170:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_171:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v6
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v39, 0xffffff1f, v39, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v7, vcc_lo
	v_mov_b32_e32 v42, v5
	v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v5, s11
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[39:42], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_179
; %bb.172:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_175
; %bb.173:                              ; %.preheader1.i.i.i88.preheader
	s_mov_b32 s8, 0
.LBB1_174:                              ; %.preheader1.i.i.i88
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_174
.LBB1_175:                              ; %Flow359
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_177
; %bb.176:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_177:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_179
; %bb.178:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_179:                              ; %Flow360
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_180:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_182
; %bb.181:                              ;   in Loop: Header=BB1_180 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_182:                              ;   in Loop: Header=BB1_180 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_184
; %bb.183:                              ;   in Loop: Header=BB1_180 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_185
.LBB1_184:                              ;   in Loop: Header=BB1_180 Depth=1
	s_mov_b32 s1, -1
.LBB1_185:                              ; %Flow354
                                        ;   in Loop: Header=BB1_180 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_180
; %bb.186:
	global_load_b64 v[42:43], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_190
; %bb.187:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_190
; %bb.188:                              ; %.preheader.i.i.i87.preheader
	s_mov_b32 s0, 0
.LBB1_189:                              ; %.preheader.i.i.i87
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_189
.LBB1_190:                              ; %__ockl_printf_append_args.exit91
	s_or_b32 exec_lo, exec_lo, s1
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v45
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v45
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_196
; %bb.191:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[3:4], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v6
	v_and_b32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v4, v2, vcc_lo
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[6:7]
	s_cbranch_execz .LBB1_195
; %bb.192:                              ; %.preheader3.i.i.i97.preheader
	s_mov_b32 s3, 0
.LBB1_193:                              ; %.preheader3.i.i.i97
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[8:9], v0, s[20:21]
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, v1, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v1, 24, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, v4 :: v_dual_and_b32 v2, v2, v7
	v_mad_u64_u32 v[4:5], null, v2, 24, v[1:2]
	global_load_b64 v[4:5], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_193
; %bb.194:                              ; %Flow347
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_195:                              ; %Flow349
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_196:                              ; %.loopexit4.i.i.i92
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v46, 0
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[6:7], v46, s[20:21] offset:40
	global_load_b128 v[0:3], v46, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_198
; %bb.197:
	v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, v46
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v9, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v6, 2 :: v_dual_mov_b32 v7, 1
	global_store_b128 v[8:9], v[4:7], off offset:8
.LBB1_198:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[45:46]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v42, 0xffffff1d, v42, 34
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v45, v46 :: v_dual_mov_b32 v2, s8
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	v_mov_b32_e32 v5, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[42:45], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_206
; %bb.199:
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v8, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v8, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[9:12], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[11:12]
	s_cbranch_execz .LBB1_202
; %bb.200:                              ; %.preheader1.i.i.i95.preheader
	s_mov_b32 s8, 0
.LBB1_201:                              ; %.preheader1.i.i.i95
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v8, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_201
.LBB1_202:                              ; %Flow345
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_204
; %bb.203:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_204:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_206
; %bb.205:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_206:                              ; %Flow346
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_207:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_209
; %bb.208:                              ;   in Loop: Header=BB1_207 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_209:                              ;   in Loop: Header=BB1_207 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_211
; %bb.210:                              ;   in Loop: Header=BB1_207 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_212
.LBB1_211:                              ;   in Loop: Header=BB1_207 Depth=1
	s_mov_b32 s1, -1
.LBB1_212:                              ; %Flow340
                                        ;   in Loop: Header=BB1_207 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_207
; %bb.213:
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_217
; %bb.214:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_217
; %bb.215:                              ; %.preheader.i.i.i94.preheader
	s_mov_b32 s0, 0
.LBB1_216:                              ; %.preheader.i.i.i94
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_216
.LBB1_217:                              ; %Flow392
	s_or_b32 exec_lo, exec_lo, s22
	v_mov_b32_e32 v0, 0
	s_cmp_eq_u32 s28, 0
	s_cbranch_scc1 .LBB1_220
; %bb.218:                              ; %.lr.ph.preheader
	v_lshl_add_u32 v1, v41, 2, 48
	v_mov_b32_e32 v0, 0
	s_ashr_i32 s29, s28, 31
.LBB1_219:                              ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v4, v49
	ds_load_b32 v5, v1
	s_add_u32 s28, s28, -1
	v_add_nc_u32_e32 v49, 4, v49
	s_addc_u32 s29, s29, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_cmp_eq_u64 s[28:29], 0
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[2:3], null, v5, v4, v[0:1]
	v_dual_mov_b32 v0, v2 :: v_dual_add_nc_u32 v1, 16, v1
	s_cbranch_scc0 .LBB1_219
.LBB1_220:                              ; %Flow335
	v_mul_lo_u32 v5, v38, s39
	v_mul_lo_u32 v6, v48, s38
	v_mad_u64_u32 v[1:2], null, v38, s38, s[36:37]
	v_mov_b32_e32 v42, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[3:4], 2, v[41:42]
	v_add3_u32 v2, v6, v2, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, v1, v3
	v_add_co_ci_u32_e32 v2, vcc_lo, v2, v4, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB1_221:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14matrixMultiplyPimS_mS_mii
		.amdhsa_group_segment_fixed_size 96
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 50
		.amdhsa_next_free_sgpr 40
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z14matrixMultiplyPimS_mS_mii, .Lfunc_end1-_Z14matrixMultiplyPimS_mS_mii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 11688
; NumSgprs: 42
; NumVgprs: 50
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 96 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 6
; NumSGPRsForWavesPerEU: 42
; NumVGPRsForWavesPerEU: 50
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z9showPitchPimii       ; -- Begin function _Z9showPitchPimii
	.globl	_Z9showPitchPimii
	.p2align	8
	.type	_Z9showPitchPimii,@function
_Z9showPitchPimii:                      ; @_Z9showPitchPimii
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_add_u32 s4, s0, 24
	s_addc_u32 s5, s1, 0
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s7, s6, 16
	s_and_b32 s6, s6, 0xffff
	v_mad_u64_u32 v[38:39], null, s15, s7, v[1:2]
	v_mad_u64_u32 v[43:44], null, s14, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s2, v38
	v_cmp_gt_i32_e64 s2, s3, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_109
; %bb.1:
	s_load_b128 s[8:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v0, 31, v38
	v_ashrrev_i32_e32 v44, 31, v43
	s_load_b64 s[18:19], s[4:5], 0x50
	v_mbcnt_lo_u32_b32 v45, -1, 0
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	v_lshlrev_b64 v[2:3], 2, v[43:44]
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v4, v38, s11
	v_mul_lo_u32 v5, v0, s10
	v_mad_u64_u32 v[0:1], null, v38, s10, s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v1, v5, v1, v4
	v_add_co_u32 v0, vcc_lo, v0, v2
	v_mov_b32_e32 v4, v45
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo
	global_load_b32 v40, v[0:1], off
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s2, v4
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_7
; %bb.2:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s4, exec_lo
	global_load_b64 v[8:9], v0, s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[18:19] offset:40
	global_load_b64 v[5:6], v0, s[18:19]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB2_6
; %bb.3:                                ; %.preheader3.i.i.i.preheader
	s_mov_b32 s5, 0
.LBB2_4:                                ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[18:19] offset:40
	global_load_b64 v[10:11], v0, s[18:19]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB2_4
; %bb.5:                                ; %Flow194
	s_or_b32 exec_lo, exec_lo, s5
.LBB2_6:                                ; %Flow196
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB2_7:                                ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_mov_b32 s10, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[18:19] offset:40
	global_load_b128 v[0:3], v5, s[18:19]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v8
	v_readfirstlane_b32 s7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s3, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s11, s2
	s_cbranch_execz .LBB2_9
; %bb.8:
	v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v7, v5
	s_add_i32 s10, s8, s3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s9
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB2_9:
	s_or_b32 exec_lo, exec_lo, s11
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s6
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_mov_b32_e32 v6, v5
	v_dual_mov_b32 v10, s12 :: v_dual_mov_b32 v13, s15
	v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v12, s14
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s6, s2
	s_cbranch_execz .LBB2_17
; %bb.10:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[18:19] offset:32 glc
	global_load_b64 v[2:3], v10, s[18:19] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s5, v3
	v_and_b32_e32 v2, s4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB2_13
; %bb.11:                               ; %.preheader1.i.i.i.preheader
	s_mov_b32 s10, 0
.LBB2_12:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB2_12
.LBB2_13:                               ; %Flow192
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v5, 0
	s_mov_b32 s10, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v4, s10, 0
	global_load_b64 v[2:3], v5, s[18:19] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_15
; %bb.14:
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s10
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB2_15:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_17
; %bb.16:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_17:                               ; %Flow193
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s3
	v_add_co_u32 v0, vcc_lo, v0, s9
	v_add_co_ci_u32_e32 v1, vcc_lo, s8, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_18:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_20
; %bb.19:                               ;   in Loop: Header=BB2_18 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_20:                               ;   in Loop: Header=BB2_18 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s3, v2
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB2_22
; %bb.21:                               ;   in Loop: Header=BB2_18 Depth=1
	s_mov_b32 s3, 0
	s_sleep 1
	s_branch .LBB2_23
.LBB2_22:                               ;   in Loop: Header=BB2_18 Depth=1
	s_mov_b32 s3, -1
.LBB2_23:                               ; %Flow187
                                        ;   in Loop: Header=BB2_18 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB2_18
; %bb.24:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_28
; %bb.25:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[18:19] offset:40
	global_load_b64 v[9:10], v8, s[18:19] offset:24 glc
	global_load_b64 v[6:7], v8, s[18:19]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_28
; %bb.26:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s2, 0
.LBB2_27:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB2_27
.LBB2_28:                               ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s3
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, .str.2@rel32@lo+4
	s_addc_u32 s3, s3, .str.2@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_cmp_lg_u64 s[2:3], 0
	v_mov_b32_e32 v5, 0
	s_cselect_b32 s4, 14, 0
	s_add_u32 s8, s0, 24
	v_mov_b32_e32 v4, s4
	s_addc_u32 s9, s1, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_mov_b32_e32 v5, v45
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v5
	v_mov_b32_e32 v7, 0
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v5
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_34
; %bb.29:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[9:10], v1, s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[18:19] offset:40
	global_load_b64 v[6:7], v1, s[18:19]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v3, v3, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v3, v3, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[7:8], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[9:10]
	s_cbranch_execz .LBB2_33
; %bb.30:                               ; %.preheader3.i.i.i18.preheader
	s_mov_b32 s3, 0
.LBB2_31:                               ; %.preheader3.i.i.i18
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[18:19] offset:40
	global_load_b64 v[11:12], v1, s[18:19]
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v8, v3, v10
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v2, 24, v[11:12]
	v_mov_b32_e32 v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v8, 24, v[2:3]
	v_mov_b32_e32 v7, v3
	global_load_b64 v[7:8], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[9:10]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_31
; %bb.32:                               ; %Flow180
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_33:                               ; %Flow182
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_34:                               ; %.loopexit4.i.i.i13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v6, 0
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[9:10], v6, s[18:19] offset:40
	global_load_b128 v[1:4], v6, s[18:19]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_36
; %bb.35:
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, v6
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s8, v2, vcc_lo
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB2_36:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[7:8], 6, v[5:6]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v3, v7
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v36, 0xffffff1f, v0, 32
	v_add_co_ci_u32_e32 v8, vcc_lo, v4, v8, vcc_lo
	v_mov_b32_e32 v39, v6
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v6, s11
	v_dual_mov_b32 v4, s9 :: v_dual_mov_b32 v5, s10
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_44
; %bb.37:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v0, s[18:19] offset:32 glc
	global_load_b64 v[3:4], v0, s[18:19] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v9, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[9:10], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v0, v[11:14], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[13:14]
	s_cbranch_execz .LBB2_40
; %bb.38:                               ; %.preheader1.i.i.i16.preheader
	s_mov_b32 s8, 0
.LBB2_39:                               ; %.preheader1.i.i.i16
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[9:10], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v0, v[3:6], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_39
.LBB2_40:                               ; %Flow178
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[18:19] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB2_42
; %bb.41:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB2_42:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB2_44
; %bb.43:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_44:                               ; %Flow179
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_45:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_47
; %bb.46:                               ;   in Loop: Header=BB2_45 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_47:                               ;   in Loop: Header=BB2_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_49
; %bb.48:                               ;   in Loop: Header=BB2_45 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_50
.LBB2_49:                               ;   in Loop: Header=BB2_45 Depth=1
	s_mov_b32 s1, -1
.LBB2_50:                               ; %Flow173
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_45
; %bb.51:
	global_load_b64 v[41:42], v[7:8], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_55
; %bb.52:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[18:19] offset:40
	global_load_b64 v[7:8], v6, s[18:19] offset:24 glc
	global_load_b64 v[4:5], v6, s[18:19]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_55
; %bb.53:                               ; %.preheader.i.i.i15.preheader
	s_mov_b32 s0, 0
.LBB2_54:                               ; %.preheader.i.i.i15
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_54
.LBB2_55:                               ; %__ockl_printf_append_args.exit
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v4, v45
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_61
; %bb.56:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[18:19] offset:40
	global_load_b64 v[5:6], v0, s[18:19]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB2_60
; %bb.57:                               ; %.preheader3.i.i.i24.preheader
	s_mov_b32 s3, 0
.LBB2_58:                               ; %.preheader3.i.i.i24
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[18:19] offset:40
	global_load_b64 v[10:11], v0, s[18:19]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_58
; %bb.59:                               ; %Flow166
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_60:                               ; %Flow168
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_61:                               ; %.loopexit4.i.i.i19
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[18:19] offset:40
	global_load_b128 v[0:3], v5, s[18:19]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_63
; %bb.62:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB2_63:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v6
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v41, 0xffffff1f, v41, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v7, vcc_lo
	v_mov_b32_e32 v44, v5
	v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v5, s11
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[41:44], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_71
; %bb.64:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[18:19] offset:32 glc
	global_load_b64 v[2:3], v10, s[18:19] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB2_67
; %bb.65:                               ; %.preheader1.i.i.i22.preheader
	s_mov_b32 s8, 0
.LBB2_66:                               ; %.preheader1.i.i.i22
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_66
.LBB2_67:                               ; %Flow164
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[18:19] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_69
; %bb.68:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB2_69:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_71
; %bb.70:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_71:                               ; %Flow165
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_72:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_74
; %bb.73:                               ;   in Loop: Header=BB2_72 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_74:                               ;   in Loop: Header=BB2_72 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_76
; %bb.75:                               ;   in Loop: Header=BB2_72 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_77
.LBB2_76:                               ;   in Loop: Header=BB2_72 Depth=1
	s_mov_b32 s1, -1
.LBB2_77:                               ; %Flow159
                                        ;   in Loop: Header=BB2_72 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_72
; %bb.78:
	global_load_b64 v[38:39], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_82
; %bb.79:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[18:19] offset:40
	global_load_b64 v[7:8], v6, s[18:19] offset:24 glc
	global_load_b64 v[4:5], v6, s[18:19]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_82
; %bb.80:                               ; %.preheader.i.i.i21.preheader
	s_mov_b32 s0, 0
.LBB2_81:                               ; %.preheader.i.i.i21
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_81
.LBB2_82:                               ; %__ockl_printf_append_args.exit25
	s_or_b32 exec_lo, exec_lo, s1
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v45
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v45
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_88
; %bb.83:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v0, s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[18:19] offset:40
	global_load_b64 v[3:4], v0, s[18:19]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v6
	v_and_b32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v4, v2, vcc_lo
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[6:7]
	s_cbranch_execz .LBB2_87
; %bb.84:                               ; %.preheader3.i.i.i31.preheader
	s_mov_b32 s3, 0
.LBB2_85:                               ; %.preheader3.i.i.i31
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[18:19] offset:40
	global_load_b64 v[8:9], v0, s[18:19]
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, v1, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v1, 24, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, v4 :: v_dual_and_b32 v2, v2, v7
	v_mad_u64_u32 v[4:5], null, v2, 24, v[1:2]
	global_load_b64 v[4:5], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_85
; %bb.86:                               ; %Flow152
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_87:                               ; %Flow154
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_88:                               ; %.loopexit4.i.i.i26
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v46, 0
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[6:7], v46, s[18:19] offset:40
	global_load_b128 v[0:3], v46, s[18:19]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_90
; %bb.89:
	v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, v46
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v9, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v6, 2 :: v_dual_mov_b32 v7, 1
	global_store_b128 v[8:9], v[4:7], off offset:8
.LBB2_90:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[45:46]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v38, 0xffffff1d, v38, 34
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v41, v46 :: v_dual_mov_b32 v2, s8
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	v_mov_b32_e32 v5, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[38:41], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_98
; %bb.91:
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v8, s[18:19] offset:32 glc
	global_load_b64 v[2:3], v8, s[18:19] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[9:12], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[11:12]
	s_cbranch_execz .LBB2_94
; %bb.92:                               ; %.preheader1.i.i.i29.preheader
	s_mov_b32 s8, 0
.LBB2_93:                               ; %.preheader1.i.i.i29
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v8, v[2:5], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_93
.LBB2_94:                               ; %Flow150
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[18:19] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_96
; %bb.95:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB2_96:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_98
; %bb.97:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_98:                               ; %Flow151
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_99:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_101
; %bb.100:                              ;   in Loop: Header=BB2_99 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_101:                              ;   in Loop: Header=BB2_99 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_103
; %bb.102:                              ;   in Loop: Header=BB2_99 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_104
.LBB2_103:                              ;   in Loop: Header=BB2_99 Depth=1
	s_mov_b32 s1, -1
.LBB2_104:                              ; %Flow145
                                        ;   in Loop: Header=BB2_99 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_99
; %bb.105:
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB2_109
; %bb.106:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[18:19] offset:40
	global_load_b64 v[7:8], v6, s[18:19] offset:24 glc
	global_load_b64 v[4:5], v6, s[18:19]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_109
; %bb.107:                              ; %.preheader.i.i.i28.preheader
	s_mov_b32 s0, 0
.LBB2_108:                              ; %.preheader.i.i.i28
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_108
.LBB2_109:                              ; %__ockl_printf_append_args.exit32
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9showPitchPimii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 47
		.amdhsa_next_free_sgpr 33
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z9showPitchPimii, .Lfunc_end2-_Z9showPitchPimii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 5740
; NumSgprs: 35
; NumVgprs: 47
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 35
; NumVGPRsForWavesPerEU: 47
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	.str,@object                    ; @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.str:
	.asciz	"input1Temp[%d][%d]: %d\n"
	.size	.str, 24

	.type	.str.1,@object                  ; @.str.1
.str.1:
	.asciz	"input2Temp[%d][%d]: %d\n"
	.size	.str.1, 24

	.type	.str.2,@object                  ; @.str.2
.str.2:
	.asciz	"a[%d][%d]: %d"
	.size	.str.2, 14

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           8
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         52
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         136
        .size:           8
        .value_kind:     hidden_hostcall_buffer
    .group_segment_fixed_size: 96
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14matrixMultiplyPimS_mS_mii
    .private_segment_fixed_size: 0
    .sgpr_count:     42
    .sgpr_spill_count: 0
    .symbol:         _Z14matrixMultiplyPimS_mS_mii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     50
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         104
        .size:           8
        .value_kind:     hidden_hostcall_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9showPitchPimii
    .private_segment_fixed_size: 0
    .sgpr_count:     35
    .sgpr_spill_count: 0
    .symbol:         _Z9showPitchPimii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     47
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
