
#include <stdio.h>
#include <cuda_runtime.h>
#define MatrixWidth 10


//GPU matrix add function
__global__ void mat_add(float *A,float *B,float *C,int N)
{
	int row=threadIdx.x;
	int col=threadIdx.y;
	C[row*MatrixWidth+col]=A[row*MatrixWidth+col]+B[row*MatrixWidth+col];
   
}

//GPU matrix sub function
__global__ void mat_sub(float *A,float *B,float *C,int N)
{
	int row=threadIdx.x;
	int col=threadIdx.y;
	C[row*MatrixWidth+col]=A[row*MatrixWidth+col]-B[row*MatrixWidth+col];
   
}

//GPU matrix mult function
__global__ void mat_mult(float *A,float *B,float *C,int N)
{
	int row=threadIdx.x;
	int col=threadIdx.y;
	for (int i=0;i<MatrixWidth;i++)
	{
	C[row*MatrixWidth+col]+=A[row*MatrixWidth+i]*B[i*MatrixWidth+col];
	}
   
}

//CPU matrix add function
void mat_add_serial(float *A,float *B,float *C,int N)
{
	for(int i=0;i<N;i++)
	{
		C[i]=A[i]+B[i];
	}
}

//CPU matrix sub function
void mat_sub_serial(float *A,float *B,float *C,int N)
{
	for(int i=0;i<N;i++)
	{
		C[i]=A[i]-B[i];
	}
}

//CPU matrix mult function
void mat_mult_serial(float *A,float *B,float *C)
{
	for(int i=0;i<MatrixWidth;i++)
	{
		for(int j=0;j<MatrixWidth;j++)
		{
			float sum=0;
			for(int k=0;k<MatrixWidth;k++)
			{
				sum+=A[i*MatrixWidth+k]*B[k*MatrixWidth+j];
			}
			C[i*MatrixWidth+j]=sum;
		}
	}

	
}


int main(){

	float *A, *B, *C;
	float *d_A, *d_B, *d_C;
	int Size=MatrixWidth*MatrixWidth;
	A=(float *)malloc(Size*sizeof(float));
	B=(float *)malloc(Size*sizeof(float));
	C=(float *)malloc(Size*sizeof(float));
	//Allocate input memory on GPU
	cudaMalloc(&d_A,Size*sizeof(float));
	cudaMalloc(&d_B,Size*sizeof(float));
	cudaMalloc(&d_C,Size*sizeof(float));

	//init A, B, and C
	for (int i=0;i<MatrixWidth;i++)
	{
		for (int j=0;j<MatrixWidth;j++)
		{
			A[i+j*MatrixWidth]=i+j*MatrixWidth;
			B[i+j*MatrixWidth]=i+j*MatrixWidth;
			C[i+j*MatrixWidth]=0;
		}
	}

	cudaMemcpy(d_A,A,Size*sizeof(float),cudaMemcpyHostToDevice);
	cudaMemcpy(d_B,B,Size*sizeof(float),cudaMemcpyHostToDevice);
	cudaMemcpy(d_C,C,Size*sizeof(float),cudaMemcpyHostToDevice);



	dim3 BlocksPerGrid(1,1);
	dim3 ThreadsPerBlock(MatrixWidth,MatrixWidth);

	//init for cuda timer
	cudaEvent_t start;
	cudaEvent_t end;
	cudaEventCreate(&start);
	cudaEventCreate(&end);
	cudaEventRecord(start,0);

	//mat_add<<< BlocksPerGrid,ThreadsPerBlock>>>(d_A,d_B,d_C,Size);
	//mat_sub<<< BlocksPerGrid,ThreadsPerBlock>>>(d_A,d_B,d_C,Size);
	mat_mult<<< BlocksPerGrid,ThreadsPerBlock>>>(d_A,d_B,d_C,Size);
    //mat_add_serial(A,B,C,Size);
	//mat_sub_serial(A,B,C,Size);
	//mat_mult_serial(A,B,C);
	
	cudaEventRecord(end,0);
	cudaEventSynchronize(end);
	float time;
	cudaEventElapsedTime(&time,start,end);
	

	//Read C from device
	cudaMemcpy(C,d_C,Size*sizeof(float),cudaMemcpyDeviceToHost);
	

	for (int i=0; i<MatrixWidth;i++)
	{
		for(int j=0;j<MatrixWidth;j++)
		{
		printf("%f ",C[i*MatrixWidth+j]);
		}
		printf("\n");
	}

	printf("Time: %f \n\n",time);
	cudaEventDestroy(start);
	cudaEventDestroy(end);

	free(A);
	free(B);
	free(C);

	cudaFree(d_A);
	cudaFree(d_B);
	cudaFree(d_C);

	getchar();
	return 0;
}

	.file	"tmpxft_003b7c22_00000000-6_matrix_math.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z14mat_add_serialPfS_S_i
	.type	_Z14mat_add_serialPfS_S_i, @function
_Z14mat_add_serialPfS_S_i:
.LFB2027:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L3:
	cmpl	%eax, %ecx
	jle	.L6
	movss	(%rdi,%rax,4), %xmm0
	addss	(%rsi,%rax,4), %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	jmp	.L3
.L6:
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z14mat_add_serialPfS_S_i, .-_Z14mat_add_serialPfS_S_i
	.globl	_Z14mat_sub_serialPfS_S_i
	.type	_Z14mat_sub_serialPfS_S_i, @function
_Z14mat_sub_serialPfS_S_i:
.LFB2028:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L8:
	cmpl	%eax, %ecx
	jle	.L10
	movss	(%rdi,%rax,4), %xmm0
	subss	(%rsi,%rax,4), %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	jmp	.L8
.L10:
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z14mat_sub_serialPfS_S_i, .-_Z14mat_sub_serialPfS_S_i
	.globl	_Z15mat_mult_serialPfS_S_
	.type	_Z15mat_mult_serialPfS_S_, @function
_Z15mat_mult_serialPfS_S_:
.LFB2029:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L12:
	xorl	%ecx, %ecx
	leaq	(%rdi,%rax), %r11
	leaq	(%rdx,%rax), %r10
.L16:
	leaq	(%rsi,%rcx,4), %r9
	xorl	%r8d, %r8d
	xorps	%xmm0, %xmm0
.L13:
	movss	(%r11,%r8,4), %xmm1
	mulss	(%r9), %xmm1
	incq	%r8
	addq	$40, %r9
	addss	%xmm1, %xmm0
	cmpq	$10, %r8
	jne	.L13
	movss	%xmm0, (%r10,%rcx,4)
	incq	%rcx
	cmpq	$10, %rcx
	jne	.L16
	addq	$40, %rax
	cmpq	$400, %rax
	jne	.L12
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z15mat_mult_serialPfS_S_, .-_Z15mat_mult_serialPfS_S_
	.globl	_Z31__device_stub__Z7mat_addPfS_S_iPfS_S_i
	.type	_Z31__device_stub__Z7mat_addPfS_S_iPfS_S_i, @function
_Z31__device_stub__Z7mat_addPfS_S_iPfS_S_i:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7mat_addPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L18:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z31__device_stub__Z7mat_addPfS_S_iPfS_S_i, .-_Z31__device_stub__Z7mat_addPfS_S_iPfS_S_i
	.globl	_Z7mat_addPfS_S_i
	.type	_Z7mat_addPfS_S_i, @function
_Z7mat_addPfS_S_i:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z7mat_addPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2056:
	.size	_Z7mat_addPfS_S_i, .-_Z7mat_addPfS_S_i
	.globl	_Z31__device_stub__Z7mat_subPfS_S_iPfS_S_i
	.type	_Z31__device_stub__Z7mat_subPfS_S_iPfS_S_i, @function
_Z31__device_stub__Z7mat_subPfS_S_iPfS_S_i:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7mat_subPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L23:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z31__device_stub__Z7mat_subPfS_S_iPfS_S_i, .-_Z31__device_stub__Z7mat_subPfS_S_iPfS_S_i
	.globl	_Z7mat_subPfS_S_i
	.type	_Z7mat_subPfS_S_i, @function
_Z7mat_subPfS_S_i:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z7mat_subPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2058:
	.size	_Z7mat_subPfS_S_i, .-_Z7mat_subPfS_S_i
	.globl	_Z32__device_stub__Z8mat_multPfS_S_iPfS_S_i
	.type	_Z32__device_stub__Z8mat_multPfS_S_iPfS_S_i, @function
_Z32__device_stub__Z8mat_multPfS_S_iPfS_S_i:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8mat_multPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L28:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z32__device_stub__Z8mat_multPfS_S_iPfS_S_i, .-_Z32__device_stub__Z8mat_multPfS_S_iPfS_S_i
	.globl	_Z8mat_multPfS_S_i
	.type	_Z8mat_multPfS_S_i, @function
_Z8mat_multPfS_S_i:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z8mat_multPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2060:
	.size	_Z8mat_multPfS_S_i, .-_Z8mat_multPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"%f "
.LC2:
	.string	"\n"
.LC3:
	.string	"Time: %f \n\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$400, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$400, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$400, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movl	$400, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$400, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$400, %esi
	call	cudaMalloc@PLT
	xorl	%edx, %edx
.L34:
	leaq	0(,%rdx,4), %rcx
	movl	%edx, %eax
	leal	100(%rdx), %esi
.L35:
	cvtsi2ssl	%eax, %xmm0
	addl	$10, %eax
	movl	$0x00000000, (%rbx,%rcx)
	movss	%xmm0, (%r12,%rcx)
	movss	%xmm0, 0(%rbp,%rcx)
	addq	$40, %rcx
	cmpl	%esi, %eax
	jne	.L35
	incq	%rdx
	cmpq	$10, %rdx
	jne	.L34
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$400, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$400, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$400, %edx
	call	cudaMemcpy@PLT
	leaq	32(%rsp), %rdi
	movabsq	$4294967297, %rax
	movl	$1, 56(%rsp)
	movq	%rax, 48(%rsp)
	movabsq	$42949672970, %rax
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$100, %ecx
	movq	8(%rsp), %rdi
	call	_Z32__device_stub__Z8mat_multPfS_S_iPfS_S_i
.L37:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	xorl	%r13d, %r13d
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	4(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$400, %edx
	call	cudaMemcpy@PLT
.L38:
	imulq	$40, %r13, %r14
	xorl	%r15d, %r15d
	addq	%rbx, %r14
.L39:
	cvtss2sd	(%r14,%r15,4), %xmm0
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%r15
	cmpq	$10, %r15
	jne	.L39
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r13
	call	__printf_chk@PLT
	cmpq	$10, %r13
	jne	.L38
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	4(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	32(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	40(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	call	getchar@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L41
	call	__stack_chk_fail@PLT
.L41:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z8mat_multPfS_S_i"
.LC5:
	.string	"_Z7mat_subPfS_S_i"
.LC6:
	.string	"_Z7mat_addPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2062:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8mat_multPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7mat_subPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7mat_addPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2062:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <stdio.h>
#include <hip/hip_runtime.h>
#define MatrixWidth 10


//GPU matrix add function
__global__ void mat_add(float *A,float *B,float *C,int N)
{
	int row=threadIdx.x;
	int col=threadIdx.y;
	C[row*MatrixWidth+col]=A[row*MatrixWidth+col]+B[row*MatrixWidth+col];
   
}

//GPU matrix sub function
__global__ void mat_sub(float *A,float *B,float *C,int N)
{
	int row=threadIdx.x;
	int col=threadIdx.y;
	C[row*MatrixWidth+col]=A[row*MatrixWidth+col]-B[row*MatrixWidth+col];
   
}

//GPU matrix mult function
__global__ void mat_mult(float *A,float *B,float *C,int N)
{
	int row=threadIdx.x;
	int col=threadIdx.y;
	for (int i=0;i<MatrixWidth;i++)
	{
	C[row*MatrixWidth+col]+=A[row*MatrixWidth+i]*B[i*MatrixWidth+col];
	}
   
}

//CPU matrix add function
void mat_add_serial(float *A,float *B,float *C,int N)
{
	for(int i=0;i<N;i++)
	{
		C[i]=A[i]+B[i];
	}
}

//CPU matrix sub function
void mat_sub_serial(float *A,float *B,float *C,int N)
{
	for(int i=0;i<N;i++)
	{
		C[i]=A[i]-B[i];
	}
}

//CPU matrix mult function
void mat_mult_serial(float *A,float *B,float *C)
{
	for(int i=0;i<MatrixWidth;i++)
	{
		for(int j=0;j<MatrixWidth;j++)
		{
			float sum=0;
			for(int k=0;k<MatrixWidth;k++)
			{
				sum+=A[i*MatrixWidth+k]*B[k*MatrixWidth+j];
			}
			C[i*MatrixWidth+j]=sum;
		}
	}

	
}


int main(){

	float *A, *B, *C;
	float *d_A, *d_B, *d_C;
	int Size=MatrixWidth*MatrixWidth;
	A=(float *)malloc(Size*sizeof(float));
	B=(float *)malloc(Size*sizeof(float));
	C=(float *)malloc(Size*sizeof(float));
	//Allocate input memory on GPU
	hipMalloc(&d_A,Size*sizeof(float));
	hipMalloc(&d_B,Size*sizeof(float));
	hipMalloc(&d_C,Size*sizeof(float));

	//init A, B, and C
	for (int i=0;i<MatrixWidth;i++)
	{
		for (int j=0;j<MatrixWidth;j++)
		{
			A[i+j*MatrixWidth]=i+j*MatrixWidth;
			B[i+j*MatrixWidth]=i+j*MatrixWidth;
			C[i+j*MatrixWidth]=0;
		}
	}

	hipMemcpy(d_A,A,Size*sizeof(float),hipMemcpyHostToDevice);
	hipMemcpy(d_B,B,Size*sizeof(float),hipMemcpyHostToDevice);
	hipMemcpy(d_C,C,Size*sizeof(float),hipMemcpyHostToDevice);



	dim3 BlocksPerGrid(1,1);
	dim3 ThreadsPerBlock(MatrixWidth,MatrixWidth);

	//init for cuda timer
	hipEvent_t start;
	hipEvent_t end;
	hipEventCreate(&start);
	hipEventCreate(&end);
	hipEventRecord(start,0);

	//mat_add<<< BlocksPerGrid,ThreadsPerBlock>>>(d_A,d_B,d_C,Size);
	//mat_sub<<< BlocksPerGrid,ThreadsPerBlock>>>(d_A,d_B,d_C,Size);
	mat_mult<<< BlocksPerGrid,ThreadsPerBlock>>>(d_A,d_B,d_C,Size);
    //mat_add_serial(A,B,C,Size);
	//mat_sub_serial(A,B,C,Size);
	//mat_mult_serial(A,B,C);
	
	hipEventRecord(end,0);
	hipEventSynchronize(end);
	float time;
	hipEventElapsedTime(&time,start,end);
	

	//Read C from device
	hipMemcpy(C,d_C,Size*sizeof(float),hipMemcpyDeviceToHost);
	

	for (int i=0; i<MatrixWidth;i++)
	{
		for(int j=0;j<MatrixWidth;j++)
		{
		printf("%f ",C[i*MatrixWidth+j]);
		}
		printf("\n");
	}

	printf("Time: %f \n\n",time);
	hipEventDestroy(start);
	hipEventDestroy(end);

	free(A);
	free(B);
	free(C);

	hipFree(d_A);
	hipFree(d_B);
	hipFree(d_C);

	getchar();
	return 0;
}

	.text
	.file	"matrix_math.hip"
	.globl	_Z22__device_stub__mat_addPfS_S_i # -- Begin function _Z22__device_stub__mat_addPfS_S_i
	.type	_Z22__device_stub__mat_addPfS_S_i,@function
_Z22__device_stub__mat_addPfS_S_i:      # @_Z22__device_stub__mat_addPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7mat_addPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__mat_addPfS_S_i, .Lfunc_end0-_Z22__device_stub__mat_addPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__mat_subPfS_S_i # -- Begin function _Z22__device_stub__mat_subPfS_S_i
	.type	_Z22__device_stub__mat_subPfS_S_i,@function
_Z22__device_stub__mat_subPfS_S_i:      # @_Z22__device_stub__mat_subPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7mat_subPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z22__device_stub__mat_subPfS_S_i, .Lfunc_end1-_Z22__device_stub__mat_subPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__mat_multPfS_S_i # -- Begin function _Z23__device_stub__mat_multPfS_S_i
	.type	_Z23__device_stub__mat_multPfS_S_i,@function
_Z23__device_stub__mat_multPfS_S_i:     # @_Z23__device_stub__mat_multPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8mat_multPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z23__device_stub__mat_multPfS_S_i, .Lfunc_end2-_Z23__device_stub__mat_multPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z14mat_add_serialPfS_S_i       # -- Begin function _Z14mat_add_serialPfS_S_i
	.type	_Z14mat_add_serialPfS_S_i,@function
_Z14mat_add_serialPfS_S_i:              # @_Z14mat_add_serialPfS_S_i
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB3_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ecx, %eax
	xorl	%ecx, %ecx
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rdi,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%rsi,%rcx,4), %xmm0
	movss	%xmm0, (%rdx,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB3_2
.LBB3_3:                                # %._crit_edge
	retq
.Lfunc_end3:
	.size	_Z14mat_add_serialPfS_S_i, .Lfunc_end3-_Z14mat_add_serialPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z14mat_sub_serialPfS_S_i       # -- Begin function _Z14mat_sub_serialPfS_S_i
	.type	_Z14mat_sub_serialPfS_S_i,@function
_Z14mat_sub_serialPfS_S_i:              # @_Z14mat_sub_serialPfS_S_i
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB4_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ecx, %eax
	xorl	%ecx, %ecx
.LBB4_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rdi,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	subss	(%rsi,%rcx,4), %xmm0
	movss	%xmm0, (%rdx,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB4_2
.LBB4_3:                                # %._crit_edge
	retq
.Lfunc_end4:
	.size	_Z14mat_sub_serialPfS_S_i, .Lfunc_end4-_Z14mat_sub_serialPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z15mat_mult_serialPfS_S_       # -- Begin function _Z15mat_mult_serialPfS_S_
	.type	_Z15mat_mult_serialPfS_S_,@function
_Z15mat_mult_serialPfS_S_:              # @_Z15mat_mult_serialPfS_S_
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
.LBB5_1:                                # %.preheader19
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_2 Depth 2
                                        #       Child Loop BB5_3 Depth 3
	leaq	(%rax,%rax,4), %rcx
	leaq	(%rdx,%rcx,8), %rcx
	movq	%rsi, %r8
	xorl	%r9d, %r9d
.LBB5_2:                                # %.preheader
                                        #   Parent Loop BB5_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB5_3 Depth 3
	xorps	%xmm0, %xmm0
	movq	%r8, %r10
	xorl	%r11d, %r11d
.LBB5_3:                                #   Parent Loop BB5_1 Depth=1
                                        #     Parent Loop BB5_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rdi,%r11,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%r10), %xmm1
	addss	%xmm1, %xmm0
	incq	%r11
	addq	$40, %r10
	cmpq	$10, %r11
	jne	.LBB5_3
# %bb.4:                                #   in Loop: Header=BB5_2 Depth=2
	movss	%xmm0, (%rcx,%r9,4)
	incq	%r9
	addq	$4, %r8
	cmpq	$10, %r9
	jne	.LBB5_2
# %bb.5:                                #   in Loop: Header=BB5_1 Depth=1
	incq	%rax
	addq	$40, %rdi
	cmpq	$10, %rax
	jne	.LBB5_1
# %bb.6:
	retq
.Lfunc_end5:
	.size	_Z15mat_mult_serialPfS_S_, .Lfunc_end5-_Z15mat_mult_serialPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$400, %edi                      # imm = 0x190
	callq	malloc
	movq	%rax, %rbx
	movl	$400, %edi                      # imm = 0x190
	callq	malloc
	movq	%rax, %r14
	movl	$400, %edi                      # imm = 0x190
	callq	malloc
	movq	%rax, %r15
	leaq	32(%rsp), %rdi
	movl	$400, %esi                      # imm = 0x190
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$400, %esi                      # imm = 0x190
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$400, %esi                      # imm = 0x190
	callq	hipMalloc
	xorl	%eax, %eax
.LBB6_1:                                # %.preheader53
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_2 Depth 2
	movl	$10, %ecx
	movq	%rax, %rdx
.LBB6_2:                                #   Parent Loop BB6_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edx, %xmm0
	movss	%xmm0, (%rbx,%rdx,4)
	movss	%xmm0, (%r14,%rdx,4)
	movl	$0, (%r15,%rdx,4)
	addq	$10, %rdx
	decq	%rcx
	jne	.LBB6_2
# %bb.3:                                #   in Loop: Header=BB6_1 Depth=1
	incq	%rax
	cmpq	$10, %rax
	jne	.LBB6_1
# %bb.4:
	movq	32(%rsp), %rdi
	movl	$400, %edx                      # imm = 0x190
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movl	$400, %edx                      # imm = 0x190
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movl	$400, %edx                      # imm = 0x190
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$42949672970, %rdx              # imm = 0xA0000000A
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_6
# %bb.5:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	$100, %ecx
	callq	_Z23__device_stub__mat_multPfS_S_i
.LBB6_6:
	movq	8(%rsp), %rdi
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	48(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	44(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	16(%rsp), %rsi
	movl	$400, %edx                      # imm = 0x190
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r15, %r13
.LBB6_7:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_8 Depth 2
	xorl	%ebp, %ebp
.LBB6_8:                                #   Parent Loop BB6_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13,%rbp,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%rbp
	cmpq	$10, %rbp
	jne	.LBB6_8
# %bb.9:                                #   in Loop: Header=BB6_7 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r12
	addq	$40, %r13
	cmpq	$10, %r12
	jne	.LBB6_7
# %bb.10:
	xorps	%xmm0, %xmm0
	cvtss2sd	44(%rsp), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movq	48(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	callq	getchar
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7mat_addPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7mat_subPfS_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8mat_multPfS_S_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7mat_addPfS_S_i,@object       # @_Z7mat_addPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z7mat_addPfS_S_i
	.p2align	3, 0x0
_Z7mat_addPfS_S_i:
	.quad	_Z22__device_stub__mat_addPfS_S_i
	.size	_Z7mat_addPfS_S_i, 8

	.type	_Z7mat_subPfS_S_i,@object       # @_Z7mat_subPfS_S_i
	.globl	_Z7mat_subPfS_S_i
	.p2align	3, 0x0
_Z7mat_subPfS_S_i:
	.quad	_Z22__device_stub__mat_subPfS_S_i
	.size	_Z7mat_subPfS_S_i, 8

	.type	_Z8mat_multPfS_S_i,@object      # @_Z8mat_multPfS_S_i
	.globl	_Z8mat_multPfS_S_i
	.p2align	3, 0x0
_Z8mat_multPfS_S_i:
	.quad	_Z23__device_stub__mat_multPfS_S_i
	.size	_Z8mat_multPfS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%f "
	.size	.L.str, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Time: %f \n\n"
	.size	.L.str.2, 12

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7mat_addPfS_S_i"
	.size	.L__unnamed_1, 18

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z7mat_subPfS_S_i"
	.size	.L__unnamed_2, 18

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z8mat_multPfS_S_i"
	.size	.L__unnamed_3, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__mat_addPfS_S_i
	.addrsig_sym _Z22__device_stub__mat_subPfS_S_i
	.addrsig_sym _Z23__device_stub__mat_multPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7mat_addPfS_S_i
	.addrsig_sym _Z7mat_subPfS_S_i
	.addrsig_sym _Z8mat_multPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7mat_addPfS_S_i       ; -- Begin function _Z7mat_addPfS_S_i
	.globl	_Z7mat_addPfS_S_i
	.p2align	8
	.type	_Z7mat_addPfS_S_i,@function
_Z7mat_addPfS_S_i:                      ; @_Z7mat_addPfS_S_i
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_u32_u24_e32 v1, 10, v1
	v_add_lshl_u32 v0, v1, v0, 2
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v0, s[4:5]
	global_load_b32 v2, v0, s[6:7]
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v1, v2
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7mat_addPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7mat_addPfS_S_i, .Lfunc_end0-_Z7mat_addPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 100
; NumSgprs: 8
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z7mat_subPfS_S_i       ; -- Begin function _Z7mat_subPfS_S_i
	.globl	_Z7mat_subPfS_S_i
	.p2align	8
	.type	_Z7mat_subPfS_S_i,@function
_Z7mat_subPfS_S_i:                      ; @_Z7mat_subPfS_S_i
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_u32_u24_e32 v1, 10, v1
	v_add_lshl_u32 v0, v1, v0, 2
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v0, s[4:5]
	global_load_b32 v2, v0, s[6:7]
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v1, v1, v2
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7mat_subPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z7mat_subPfS_S_i, .Lfunc_end1-_Z7mat_subPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 100
; NumSgprs: 8
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z8mat_multPfS_S_i      ; -- Begin function _Z8mat_multPfS_S_i
	.globl	_Z8mat_multPfS_S_i
	.p2align	8
	.type	_Z8mat_multPfS_S_i,@function
_Z8mat_multPfS_S_i:                     ; @_Z8mat_multPfS_S_i
; %bb.0:
	s_load_b64 s[4:5], s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_load_b128 s[0:3], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_u32_u24_e32 v2, 10, v1
	v_lshlrev_b32_e32 v3, 2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_lshl_u32 v1, v2, v0, 2
	v_lshlrev_b32_e32 v5, 2, v2
	s_waitcnt lgkmcnt(0)
	global_load_b32 v4, v1, s[4:5]
	v_add_co_u32 v0, s4, s4, v1
	v_add_co_u32 v2, s2, s2, v3
	v_add_co_u32 v5, s0, s0, v5
	v_add_co_ci_u32_e64 v1, null, s5, 0, s4
	v_add_co_ci_u32_e64 v3, null, s3, 0, s2
	v_add_co_ci_u32_e64 v6, null, s1, 0, s0
	s_mov_b64 s[0:1], 0
.LBB2_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v5, s0
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v6, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	global_load_b32 v9, v[2:3], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, 40
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_cmp_eq_u32 s0, 40
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v4, v7, v9
	global_store_b32 v[0:1], v4, off
	s_cbranch_scc0 .LBB2_1
; %bb.2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8mat_multPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 6
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z8mat_multPfS_S_i, .Lfunc_end2-_Z8mat_multPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 212
; NumSgprs: 8
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7mat_addPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z7mat_addPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7mat_subPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z7mat_subPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8mat_multPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z8mat_multPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
