#include <cstdio>
#include <cstring>
#include <getopt.h>
//#include <pybind11.h>

#define BLOCK_SIZE 64
//#define CELL_SIZE 4
// Matrices are stored in row-major order:
// M(row, col) = *(M.elements + row * M.stride + col)
typedef struct {
    int width;
    int height;
    int stride; 
    float* elements;
} Matrix;

// Get a matrix element
__device__ float GetElement(const Matrix A, int row, int col)
{
    return A.elements[row * A.stride + col];
}

// Set a matrix element
__device__ void SetElement(Matrix A, int row, int col,
                           float value)
{
    A.elements[row * A.stride + col] = value;
}

// Get the BLOCK_SIZExBLOCK_SIZE sub-matrix Asub of A that is
// located col sub-matrices to the right and row sub-matrices down
// from the upper-left corner of A
 __device__ Matrix GetSubMatrix(Matrix A, int row, int col) 
{
    Matrix Asub;
    Asub.width    = BLOCK_SIZE;
    Asub.height   = BLOCK_SIZE;
    Asub.stride   = A.stride;
    Asub.elements = &A.elements[A.stride * BLOCK_SIZE * row
                                         + BLOCK_SIZE * col];
    return Asub;
}


// Forward declaration of the matrix multiplication kernel
__global__ void MatMulKernel(const Matrix, const Matrix, Matrix);

// Matrix multiplication - Host code
// Matrix dimensions are assumed to be multiples of BLOCK_SIZE
void MatMul(const Matrix A, const Matrix B, Matrix C)
{
    // Load A and B to device memory
    Matrix d_A;
    d_A.width = d_A.stride = A.width;
    d_A.height = A.height;
    size_t size = A.width * A.height * sizeof(float);
    cudaMalloc(&d_A.elements, size);
    cudaMemcpy(d_A.elements, A.elements, size,
               cudaMemcpyHostToDevice);
    Matrix d_B;
    d_B.width = d_B.stride = B.width; d_B.height = B.height;
    size = B.width * B.height * sizeof(float);
    cudaMalloc(&d_B.elements, size);
    cudaMemcpy(d_B.elements, B.elements, size,
    cudaMemcpyHostToDevice);

    // Allocate C in device memory
    Matrix d_C;
    d_C.width = d_C.stride = C.width;
    d_C.height = C.height;
    size = C.width * C.height * sizeof(float);
    cudaMalloc(&d_C.elements, size);

    // Invoke kernel
    dim3 dimBlock(BLOCK_SIZE/4, BLOCK_SIZE/4);
    dim3 dimGrid(B.width / BLOCK_SIZE, A.height / BLOCK_SIZE);
    for (int i = 0; i < 10; i++)
        MatMulKernel<<<dimGrid, dimBlock>>>(d_A, d_B, d_C);

    // Read C from device memory
    cudaMemcpy(C.elements, d_C.elements, size,
               cudaMemcpyDeviceToHost);

    // Free device memory
    cudaFree(d_A.elements);
    cudaFree(d_B.elements);
    cudaFree(d_C.elements);
}

// Matrix multiplication kernel called by MatMul()
 __global__ void MatMulKernel(Matrix A, Matrix B, Matrix C)
{
    // Block row and column
    int blockRow = blockIdx.y;
    int blockCol = blockIdx.x;

    // Each thread block computes one sub-matrix Csub of C
    Matrix Csub = GetSubMatrix(C, blockRow, blockCol);

    // Each thread computes one element of Csuba
    // by accumulating results into Cvalue

    // Thread row and column within Csub
    int row = threadIdx.y;
    int col = threadIdx.x;

    // Loop over all the sub-matrices of A and B that are
    // required to compute Csub
    // Multiply each pair of sub-matrices together
    // and accumulate the results

    float c[4][4];

    for (int i = 0; i < 4; i++)
        for (int j = 0; j < 4; j++)
            c[i][j] = 0.0f;

    for (int m = 0; m < (A.width / BLOCK_SIZE); ++m) {
        // Get sub-matrix Asub of A
        Matrix Asub = GetSubMatrix(A, blockRow, m);
        // Get sub-matrix Bsub of B
        Matrix Bsub = GetSubMatrix(B, m, blockCol);

        // Shared memory used to store Asub and Bsub respectively
        __shared__ float As[BLOCK_SIZE][BLOCK_SIZE];
        __shared__ float Bs[BLOCK_SIZE][BLOCK_SIZE];



        // Load Asub and Bsub from device memory to shared memory
        // Each thread loads one element of each sub-matrix
        for (int i = 0; i < (4); i++) 
            for (int j = 0; j < (4); j++) {
                As[row * 4 + i][col * 4 + j] = GetElement(Asub, row * 4 + i, col * 4 + j);
                Bs[row * 4 + i][col * 4 + j] = GetElement(Bsub, row * 4 + i, col * 4 + j);
            }

        // Synchronize to make sure the sub-matrices are loaded
        // before starting the computation
        __syncthreads();
        // Multiply Asub and Bsub together
        // for (int e = 0; e < BLOCK_SIZE; ++e)
        //     Cvalue += As[row][e] * Bs[e][col];

        float a[4][4];
        float b[4][4];

        for (int k = 0; k < (BLOCK_SIZE / 4); k++) {
            for (int i = 0; i < 4; i++) 
                for (int j = 0; j < 4; j++) {
                    a[i][j] = As[(row) * 4 + i][(k) * 4 + j];
                    b[i][j] = Bs[(k) * 4 + i][(col) * 4 + j];
                }

            for (int i = 0; i < 4; i++) //row
                for (int j = 0; j < 4; j++) //col
                    for (int l = 0; l < 4; l++)
                        c[i][j] += a[i][l] * b[l][j];
        }

        // Synchronize to make sure that the preceding
        // computation is done before loading two new
        // sub-matrices of A and B in the next iteration
        __syncthreads();
    }

    // Write Csub to device memory
    // Each thread writes one element
    //SetElement(Csub, row, col, Cvalue);
    for (int i = 0; i < 4; i++)
        for (int j = 0; j < 4; j++)
            SetElement(Csub, row*4 + i, col*4 + j, c[i][j]);
}


void __create_matrix(Matrix *m, int h, int w)
{
    m->width = w;
    m->height = h;
    m->stride = w;
    m->elements = static_cast<float *>(malloc(h * w * sizeof(float)));

    for (int i = 0; i < h; i++) {
        for (int j = 0; j < w; j++) {
            if (i==j)
                m->elements[i*w + j] = i;
        }
    }
}


int main(int argc, char *argv[])
{
    Matrix A, B, C;

    int matsz = 8192;
    int opt;
    int show_result = 0;

    while (-1 != (opt = getopt(argc, argv, "ps:"))) {
        switch (opt) {
        case 'p': 
            show_result = 1;
            break;
        case 's':
            matsz = atoi(optarg);
            break;
        default:
            printf("-p show result\n-s matrix size\n");
            break;
        }
    }

    __create_matrix(&A, matsz, matsz);
    __create_matrix(&B, matsz, matsz);
    __create_matrix(&C, matsz, matsz);

    MatMul(A, B, C);

    if (!show_result)
        return 0;
    for (int i = 0; i < C.height; i++) {
        for (int j = 0; j < C.width; j++)
            printf("%.0f ", C.elements[i * C.stride + j]);
        printf("\n");
    }

    return 0;
}
	.file	"tmpxft_0023e770_00000000-6_matmul.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2035:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10GetElement6Matrixii
	.type	_Z10GetElement6Matrixii, @function
_Z10GetElement6Matrixii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z10GetElement6Matrixii, .-_Z10GetElement6Matrixii
	.globl	_Z10SetElement6Matrixiif
	.type	_Z10SetElement6Matrixiif, @function
_Z10SetElement6Matrixiif:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z10SetElement6Matrixiif, .-_Z10SetElement6Matrixiif
	.globl	_Z12GetSubMatrix6Matrixii
	.type	_Z12GetSubMatrix6Matrixii, @function
_Z12GetSubMatrix6Matrixii:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z12GetSubMatrix6Matrixii, .-_Z12GetSubMatrix6Matrixii
	.globl	_Z15__create_matrixP6Matrixii
	.type	_Z15__create_matrixP6Matrixii, @function
_Z15__create_matrixP6Matrixii:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%edx, %ebx
	movl	%edx, (%rdi)
	movl	%esi, 4(%rdi)
	movl	%edx, 8(%rdi)
	movl	%edx, %edi
	imull	%esi, %edi
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	xorl	%esi, %esi
	xorl	%edx, %edx
	movq	%rax, 16(%rbp)
.L9:
	cmpl	%r12d, %edx
	jge	.L16
	leal	(%rdx,%rsi), %edi
	xorl	%ecx, %ecx
	movslq	%edi, %rdi
.L12:
	cmpl	%ebx, %ecx
	jge	.L17
	cmpl	%ecx, %edx
	jne	.L10
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%rax,%rdi,4)
.L10:
	incl	%ecx
	jmp	.L12
.L17:
	incl	%edx
	addl	%ebx, %esi
	jmp	.L9
.L16:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z15__create_matrixP6Matrixii, .-_Z15__create_matrixP6Matrixii
	.globl	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_
	.type	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_, @function
_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rdi, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 72(%rsp)
	leaq	16(%rsp), %rdi
	leaq	28(%rsp), %rsi
	movq	%rdx, 80(%rsp)
	movq	%rsp, %rdx
	movq	%rax, 16(%rsp)
	movl	$1, 24(%rsp)
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	8(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z12MatMulKernel6MatrixS_S_(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 128
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L18:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_, .-_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_
	.globl	_Z12MatMulKernel6MatrixS_S_
	.type	_Z12MatMulKernel6MatrixS_S_, @function
_Z12MatMulKernel6MatrixS_S_:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	64(%rsp), %rdx
	leaq	40(%rsp), %rsi
	leaq	16(%rsp), %rdi
	call	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z12MatMulKernel6MatrixS_S_, .-_Z12MatMulKernel6MatrixS_S_
	.globl	_Z6MatMul6MatrixS_S_
	.type	_Z6MatMul6MatrixS_S_, @function
_Z6MatMul6MatrixS_S_:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	movl	240(%rsp), %edx
	movl	244(%rsp), %r14d
	leaq	40(%rsp), %rdi
	movl	264(%rsp), %r13d
	movl	288(%rsp), %ebx
	movl	%edx, 32(%rsp)
	movl	268(%rsp), %r12d
	movl	%edx, 24(%rsp)
	imull	%r14d, %edx
	movl	292(%rsp), %r15d
	movl	%r14d, 28(%rsp)
	movslq	%edx, %rbp
	salq	$2, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movq	256(%rsp), %rsi
	movq	40(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r12d, 52(%rsp)
	imull	%r13d, %r12d
	leaq	64(%rsp), %rdi
	movl	%r13d, 56(%rsp)
	movl	%r13d, 48(%rsp)
	movslq	%r12d, %rbp
	leaq	144(%rsp), %r12
	salq	$2, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movq	280(%rsp), %rsi
	movq	64(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$1, %ecx
	movl	$10, %ebp
	call	cudaMemcpy@PLT
	movl	%ebx, 80(%rsp)
	leaq	88(%rsp), %rdi
	movl	%ebx, 72(%rsp)
	imull	%r15d, %ebx
	movl	%r15d, 76(%rsp)
	movslq	%ebx, %rbx
	salq	$2, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movl	$64, %ecx
	movabsq	$68719476752, %rax
	movl	$1, 8(%rsp)
	movq	%rax, (%rsp)
	movl	%r13d, %eax
	cltd
	movl	$1, 20(%rsp)
	idivl	%ecx
	movl	%eax, 12(%rsp)
	movl	%r14d, %eax
	cltd
	idivl	%ecx
	movl	%eax, 16(%rsp)
.L26:
	movl	8(%rsp), %ecx
	movq	(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	12(%rsp), %rdi
	movl	20(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movq	40(%rsp), %rax
	movups	24(%rsp), %xmm0
	leaq	120(%rsp), %rsi
	movq	%r12, %rdx
	movups	48(%rsp), %xmm1
	movups	72(%rsp), %xmm2
	leaq	96(%rsp), %rdi
	movq	%rax, 112(%rsp)
	movq	64(%rsp), %rax
	movups	%xmm0, 96(%rsp)
	movq	%rax, 136(%rsp)
	movq	88(%rsp), %rax
	movups	%xmm1, 120(%rsp)
	movq	%rax, 160(%rsp)
	movups	%xmm2, 144(%rsp)
	call	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_
.L25:
	decl	%ebp
	jne	.L26
	movq	88(%rsp), %rsi
	movq	304(%rsp), %rdi
	movl	$2, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z6MatMul6MatrixS_S_, .-_Z6MatMul6MatrixS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"-p show result\n-s matrix size\n"
.LC1:
	.string	"ps:"
.LC2:
	.string	"%.0f "
.LC3:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC1(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	$8192, %ebx
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
.L31:
	movq	%r14, %rdx
	movq	%r12, %rsi
	movl	%ebp, %edi
	call	getopt@PLT
	cmpl	$-1, %eax
	je	.L46
	cmpl	$112, %eax
	je	.L40
	cmpl	$115, %eax
	jne	.L33
	movq	optarg(%rip), %rdi
	call	atoi@PLT
	movl	%eax, %ebx
	jmp	.L31
.L33:
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L31
.L40:
	movl	$1, %r13d
	jmp	.L31
.L46:
	movq	%rsp, %rdi
	movl	%ebx, %edx
	leaq	.LC2(%rip), %r12
	movl	%ebx, %esi
	call	_Z15__create_matrixP6Matrixii
	leaq	24(%rsp), %rdi
	movl	%ebx, %edx
	movl	%ebx, %esi
	call	_Z15__create_matrixP6Matrixii
	leaq	48(%rsp), %rdi
	movl	%ebx, %edx
	movl	%ebx, %esi
	call	_Z15__create_matrixP6Matrixii
	subq	$80, %rsp
	.cfi_def_cfa_offset 208
	xorl	%ebx, %ebx
	movq	144(%rsp), %rax
	movups	128(%rsp), %xmm1
	movups	104(%rsp), %xmm2
	movups	80(%rsp), %xmm3
	movq	%rax, 64(%rsp)
	movq	120(%rsp), %rax
	movups	%xmm1, 48(%rsp)
	movq	%rax, 40(%rsp)
	movq	96(%rsp), %rax
	movups	%xmm2, 24(%rsp)
	movq	%rax, 16(%rsp)
	movups	%xmm3, (%rsp)
	call	_Z6MatMul6MatrixS_S_
	addq	$80, %rsp
	.cfi_def_cfa_offset 128
	testl	%r13d, %r13d
	je	.L35
.L36:
	cmpl	%ebx, 52(%rsp)
	jle	.L35
	xorl	%ebp, %ebp
.L38:
	cmpl	%ebp, 48(%rsp)
	jle	.L47
	movl	56(%rsp), %eax
	movq	64(%rsp), %rdx
	movq	%r12, %rsi
	movl	$2, %edi
	imull	%ebx, %eax
	addl	%ebp, %eax
	incl	%ebp
	cltq
	cvtss2sd	(%rdx,%rax,4), %xmm0
	movb	$1, %al
	call	__printf_chk@PLT
	jmp	.L38
.L47:
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%ebx
	call	__printf_chk@PLT
	jmp	.L36
.L35:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$80, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z12MatMulKernel6MatrixS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12MatMulKernel6MatrixS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <cstdio>
#include <cstring>
#include <getopt.h>
//#include <pybind11.h>

#define BLOCK_SIZE 64
//#define CELL_SIZE 4
// Matrices are stored in row-major order:
// M(row, col) = *(M.elements + row * M.stride + col)
typedef struct {
    int width;
    int height;
    int stride; 
    float* elements;
} Matrix;

// Get a matrix element
__device__ float GetElement(const Matrix A, int row, int col)
{
    return A.elements[row * A.stride + col];
}

// Set a matrix element
__device__ void SetElement(Matrix A, int row, int col,
                           float value)
{
    A.elements[row * A.stride + col] = value;
}

// Get the BLOCK_SIZExBLOCK_SIZE sub-matrix Asub of A that is
// located col sub-matrices to the right and row sub-matrices down
// from the upper-left corner of A
 __device__ Matrix GetSubMatrix(Matrix A, int row, int col) 
{
    Matrix Asub;
    Asub.width    = BLOCK_SIZE;
    Asub.height   = BLOCK_SIZE;
    Asub.stride   = A.stride;
    Asub.elements = &A.elements[A.stride * BLOCK_SIZE * row
                                         + BLOCK_SIZE * col];
    return Asub;
}


// Forward declaration of the matrix multiplication kernel
__global__ void MatMulKernel(const Matrix, const Matrix, Matrix);

// Matrix multiplication - Host code
// Matrix dimensions are assumed to be multiples of BLOCK_SIZE
void MatMul(const Matrix A, const Matrix B, Matrix C)
{
    // Load A and B to device memory
    Matrix d_A;
    d_A.width = d_A.stride = A.width;
    d_A.height = A.height;
    size_t size = A.width * A.height * sizeof(float);
    hipMalloc(&d_A.elements, size);
    hipMemcpy(d_A.elements, A.elements, size,
               hipMemcpyHostToDevice);
    Matrix d_B;
    d_B.width = d_B.stride = B.width; d_B.height = B.height;
    size = B.width * B.height * sizeof(float);
    hipMalloc(&d_B.elements, size);
    hipMemcpy(d_B.elements, B.elements, size,
    hipMemcpyHostToDevice);

    // Allocate C in device memory
    Matrix d_C;
    d_C.width = d_C.stride = C.width;
    d_C.height = C.height;
    size = C.width * C.height * sizeof(float);
    hipMalloc(&d_C.elements, size);

    // Invoke kernel
    dim3 dimBlock(BLOCK_SIZE/4, BLOCK_SIZE/4);
    dim3 dimGrid(B.width / BLOCK_SIZE, A.height / BLOCK_SIZE);
    for (int i = 0; i < 10; i++)
        MatMulKernel<<<dimGrid, dimBlock>>>(d_A, d_B, d_C);

    // Read C from device memory
    hipMemcpy(C.elements, d_C.elements, size,
               hipMemcpyDeviceToHost);

    // Free device memory
    hipFree(d_A.elements);
    hipFree(d_B.elements);
    hipFree(d_C.elements);
}

// Matrix multiplication kernel called by MatMul()
 __global__ void MatMulKernel(Matrix A, Matrix B, Matrix C)
{
    // Block row and column
    int blockRow = blockIdx.y;
    int blockCol = blockIdx.x;

    // Each thread block computes one sub-matrix Csub of C
    Matrix Csub = GetSubMatrix(C, blockRow, blockCol);

    // Each thread computes one element of Csuba
    // by accumulating results into Cvalue

    // Thread row and column within Csub
    int row = threadIdx.y;
    int col = threadIdx.x;

    // Loop over all the sub-matrices of A and B that are
    // required to compute Csub
    // Multiply each pair of sub-matrices together
    // and accumulate the results

    float c[4][4];

    for (int i = 0; i < 4; i++)
        for (int j = 0; j < 4; j++)
            c[i][j] = 0.0f;

    for (int m = 0; m < (A.width / BLOCK_SIZE); ++m) {
        // Get sub-matrix Asub of A
        Matrix Asub = GetSubMatrix(A, blockRow, m);
        // Get sub-matrix Bsub of B
        Matrix Bsub = GetSubMatrix(B, m, blockCol);

        // Shared memory used to store Asub and Bsub respectively
        __shared__ float As[BLOCK_SIZE][BLOCK_SIZE];
        __shared__ float Bs[BLOCK_SIZE][BLOCK_SIZE];



        // Load Asub and Bsub from device memory to shared memory
        // Each thread loads one element of each sub-matrix
        for (int i = 0; i < (4); i++) 
            for (int j = 0; j < (4); j++) {
                As[row * 4 + i][col * 4 + j] = GetElement(Asub, row * 4 + i, col * 4 + j);
                Bs[row * 4 + i][col * 4 + j] = GetElement(Bsub, row * 4 + i, col * 4 + j);
            }

        // Synchronize to make sure the sub-matrices are loaded
        // before starting the computation
        __syncthreads();
        // Multiply Asub and Bsub together
        // for (int e = 0; e < BLOCK_SIZE; ++e)
        //     Cvalue += As[row][e] * Bs[e][col];

        float a[4][4];
        float b[4][4];

        for (int k = 0; k < (BLOCK_SIZE / 4); k++) {
            for (int i = 0; i < 4; i++) 
                for (int j = 0; j < 4; j++) {
                    a[i][j] = As[(row) * 4 + i][(k) * 4 + j];
                    b[i][j] = Bs[(k) * 4 + i][(col) * 4 + j];
                }

            for (int i = 0; i < 4; i++) //row
                for (int j = 0; j < 4; j++) //col
                    for (int l = 0; l < 4; l++)
                        c[i][j] += a[i][l] * b[l][j];
        }

        // Synchronize to make sure that the preceding
        // computation is done before loading two new
        // sub-matrices of A and B in the next iteration
        __syncthreads();
    }

    // Write Csub to device memory
    // Each thread writes one element
    //SetElement(Csub, row, col, Cvalue);
    for (int i = 0; i < 4; i++)
        for (int j = 0; j < 4; j++)
            SetElement(Csub, row*4 + i, col*4 + j, c[i][j]);
}


void __create_matrix(Matrix *m, int h, int w)
{
    m->width = w;
    m->height = h;
    m->stride = w;
    m->elements = static_cast<float *>(malloc(h * w * sizeof(float)));

    for (int i = 0; i < h; i++) {
        for (int j = 0; j < w; j++) {
            if (i==j)
                m->elements[i*w + j] = i;
        }
    }
}


int main(int argc, char *argv[])
{
    Matrix A, B, C;

    int matsz = 8192;
    int opt;
    int show_result = 0;

    while (-1 != (opt = getopt(argc, argv, "ps:"))) {
        switch (opt) {
        case 'p': 
            show_result = 1;
            break;
        case 's':
            matsz = atoi(optarg);
            break;
        default:
            printf("-p show result\n-s matrix size\n");
            break;
        }
    }

    __create_matrix(&A, matsz, matsz);
    __create_matrix(&B, matsz, matsz);
    __create_matrix(&C, matsz, matsz);

    MatMul(A, B, C);

    if (!show_result)
        return 0;
    for (int i = 0; i < C.height; i++) {
        for (int j = 0; j < C.width; j++)
            printf("%.0f ", C.elements[i * C.stride + j]);
        printf("\n");
    }

    return 0;
}
	.text
	.file	"matmul.hip"
	.globl	_Z6MatMul6MatrixS_S_            # -- Begin function _Z6MatMul6MatrixS_S_
	.type	_Z6MatMul6MatrixS_S_,@function
_Z6MatMul6MatrixS_S_:                   # @_Z6MatMul6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$248, %rsp
	.cfi_def_cfa_offset 304
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	352(%rsp), %r13
	movl	304(%rsp), %eax
	movl	308(%rsp), %r15d
	leaq	152(%rsp), %rbx
	movl	%eax, -8(%rbx)
	movl	%eax, -16(%rbx)
	movl	%r15d, -12(%rbx)
	imull	%r15d, %eax
	movslq	%eax, %r14
	shlq	$2, %r14
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	320(%rsp), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	328(%rsp), %r12d
	movl	332(%rsp), %eax
	leaq	128(%rsp), %rbx
	movl	%r12d, -8(%rbx)
	movl	%r12d, -16(%rbx)
	movl	%eax, -12(%rbx)
	imull	%r12d, %eax
	movslq	%eax, %r14
	shlq	$2, %r14
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	344(%rsp), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	(%r13), %eax
	movl	4(%r13), %ecx
	leaq	72(%rsp), %rdi
	movl	%eax, -8(%rdi)
	movl	%eax, -16(%rdi)
	movl	%ecx, -12(%rdi)
	imull	%eax, %ecx
	movslq	%ecx, %rsi
	shlq	$2, %rsi
	movq	%rsi, (%rsp)                    # 8-byte Spill
	callq	hipMalloc
	leal	63(%r12), %eax
	testl	%r12d, %r12d
	cmovnsl	%r12d, %eax
	sarl	$6, %eax
	leal	63(%r15), %r14d
	testl	%r15d, %r15d
	cmovnsl	%r15d, %r14d
	sarl	$6, %r14d
	shlq	$32, %r14
	orq	%rax, %r14
	movl	$10, %r13d
	movabsq	$68719476752, %r15              # imm = 0x1000000010
	leaq	16(%rsp), %rbp
	leaq	8(%rsp), %rbx
	leaq	80(%rsp), %r12
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_3
# %bb.2:                                #   in Loop: Header=BB0_1 Depth=1
	movq	152(%rsp), %rax
	movq	%rax, 176(%rsp)
	movups	136(%rsp), %xmm0
	movaps	%xmm0, 160(%rsp)
	movq	128(%rsp), %rax
	movq	%rax, 208(%rsp)
	movups	112(%rsp), %xmm0
	movaps	%xmm0, 192(%rsp)
	movq	72(%rsp), %rax
	movq	%rax, 240(%rsp)
	movups	56(%rsp), %xmm0
	movaps	%xmm0, 224(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	40(%rsp), %rdi
	leaq	24(%rsp), %rsi
	movq	%rbp, %rdx
	movq	%rbx, %rcx
	callq	__hipPopCallConfiguration
	movq	40(%rsp), %rsi
	movl	48(%rsp), %edx
	movq	24(%rsp), %rcx
	movl	32(%rsp), %r8d
	movl	$_Z12MatMulKernel6MatrixS_S_, %edi
	movq	%r12, %r9
	pushq	8(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB0_3:                                #   in Loop: Header=BB0_1 Depth=1
	decl	%r13d
	jne	.LBB0_1
# %bb.4:
	leaq	352(%rsp), %rax
	movq	16(%rax), %rdi
	movq	72(%rsp), %rsi
	movq	(%rsp), %rdx                    # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	152(%rsp), %rdi
	callq	hipFree
	movq	128(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
	addq	$248, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z6MatMul6MatrixS_S_, .Lfunc_end0-_Z6MatMul6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__MatMulKernel6MatrixS_S_ # -- Begin function _Z27__device_stub__MatMulKernel6MatrixS_S_
	.type	_Z27__device_stub__MatMulKernel6MatrixS_S_,@function
_Z27__device_stub__MatMulKernel6MatrixS_S_: # @_Z27__device_stub__MatMulKernel6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	128(%rsp), %rax
	leaq	48(%rsp), %rbx
	movq	%rax, (%rbx)
	leaq	152(%rsp), %rax
	movq	%rax, 8(%rbx)
	leaq	176(%rsp), %rax
	movq	%rax, 16(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12MatMulKernel6MatrixS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z27__device_stub__MatMulKernel6MatrixS_S_, .Lfunc_end1-_Z27__device_stub__MatMulKernel6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z15__create_matrixP6Matrixii   # -- Begin function _Z15__create_matrixP6Matrixii
	.type	_Z15__create_matrixP6Matrixii,@function
_Z15__create_matrixP6Matrixii:          # @_Z15__create_matrixP6Matrixii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movl	%esi, %ebp
	movq	%rdi, %r14
	movl	%edx, (%rdi)
	movl	%esi, 4(%rdi)
	movl	%edx, 8(%rdi)
	movl	%edx, %eax
	imull	%esi, %eax
	movslq	%eax, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, 16(%r14)
	testl	%ebp, %ebp
	jle	.LBB2_8
# %bb.1:                                # %.preheader.lr.ph
	movl	%ebp, %ecx
	movl	%ebx, %edx
	xorl	%esi, %esi
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB2_7
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%esi, %xmm0
	movl	%esi, %edi
	imull	%ebx, %edi
	leaq	(%rax,%rsi,4), %r8
	xorl	%r9d, %r9d
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpq	%r9, %rsi
	jne	.LBB2_6
# %bb.5:                                #   in Loop: Header=BB2_4 Depth=2
	movss	%xmm0, (%r8,%rdi,4)
.LBB2_6:                                #   in Loop: Header=BB2_4 Depth=2
	incq	%r9
	cmpq	%r9, %rdx
	jne	.LBB2_4
.LBB2_7:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%rsi
	cmpq	%rcx, %rsi
	jne	.LBB2_2
.LBB2_8:                                # %._crit_edge25
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z15__create_matrixP6Matrixii, .Lfunc_end2-_Z15__create_matrixP6Matrixii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movl	%edi, %ebp
	xorl	%r13d, %r13d
	movl	$8192, %ebx                     # imm = 0x2000
.LBB3_2:                                # =>This Inner Loop Header: Depth=1
	movl	$.L.str, %edx
	movl	%ebp, %edi
	movq	%r14, %rsi
	callq	getopt
	cmpl	$-1, %eax
	je	.LBB3_7
# %bb.3:                                #   in Loop: Header=BB3_2 Depth=1
	cmpl	$112, %eax
	je	.LBB3_1
# %bb.4:                                #   in Loop: Header=BB3_2 Depth=1
	cmpl	$115, %eax
	je	.LBB3_5
# %bb.6:                                #   in Loop: Header=BB3_2 Depth=1
	movl	$.Lstr, %edi
	callq	puts@PLT
	jmp	.LBB3_2
.LBB3_5:                                #   in Loop: Header=BB3_2 Depth=1
	movq	optarg(%rip), %rdi
	callq	atoi
	movl	%eax, %ebx
	jmp	.LBB3_2
.LBB3_1:                                # %.outer32.loopexit
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	$1, %r13d
	jmp	.LBB3_2
.LBB3_7:
	leaq	128(%rsp), %r14
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%ebx, %edx
	callq	_Z15__create_matrixP6Matrixii
	leaq	104(%rsp), %r15
	movq	%r15, %rdi
	movl	%ebx, %esi
	movl	%ebx, %edx
	callq	_Z15__create_matrixP6Matrixii
	leaq	80(%rsp), %r12
	movq	%r12, %rdi
	movl	%ebx, %esi
	movl	%ebx, %edx
	callq	_Z15__create_matrixP6Matrixii
	movq	16(%r12), %rax
	movq	%rax, 64(%rsp)
	movups	(%r12), %xmm0
	movups	%xmm0, 48(%rsp)
	movq	16(%r15), %rax
	movq	%rax, 40(%rsp)
	movups	(%r15), %xmm0
	movups	%xmm0, 24(%rsp)
	movq	16(%r14), %rax
	movq	%rax, 16(%rsp)
	movups	(%r14), %xmm0
	movups	%xmm0, (%rsp)
	callq	_Z6MatMul6MatrixS_S_
	testl	%r13d, %r13d
	je	.LBB3_14
# %bb.8:                                # %.preheader23
	movl	84(%rsp), %ebx
	testl	%ebx, %ebx
	jle	.LBB3_14
# %bb.9:                                # %.preheader.lr.ph
	movl	80(%rsp), %r14d
	movq	96(%rsp), %r15
	movslq	88(%rsp), %r12
	shlq	$2, %r12
	xorl	%r13d, %r13d
.LBB3_10:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_12 Depth 2
	testl	%r14d, %r14d
	jle	.LBB3_13
# %bb.11:                               # %.lr.ph
                                        #   in Loop: Header=BB3_10 Depth=1
	xorl	%ebp, %ebp
.LBB3_12:                               #   Parent Loop BB3_10 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15,%rbp,4), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	incq	%rbp
	cmpq	%rbp, %r14
	jne	.LBB3_12
.LBB3_13:                               # %._crit_edge
                                        #   in Loop: Header=BB3_10 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r13
	addq	%r12, %r15
	cmpq	%rbx, %r13
	jne	.LBB3_10
.LBB3_14:                               # %.loopexit
	xorl	%eax, %eax
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12MatMulKernel6MatrixS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12MatMulKernel6MatrixS_S_,@object # @_Z12MatMulKernel6MatrixS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z12MatMulKernel6MatrixS_S_
	.p2align	3, 0x0
_Z12MatMulKernel6MatrixS_S_:
	.quad	_Z27__device_stub__MatMulKernel6MatrixS_S_
	.size	_Z12MatMulKernel6MatrixS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"ps:"
	.size	.L.str, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%.0f "
	.size	.L.str.2, 6

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12MatMulKernel6MatrixS_S_"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"-p show result\n-s matrix size"
	.size	.Lstr, 30

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__MatMulKernel6MatrixS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12MatMulKernel6MatrixS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12MatMulKernel6MatrixS_S_ ; -- Begin function _Z12MatMulKernel6MatrixS_S_
	.globl	_Z12MatMulKernel6MatrixS_S_
	.p2align	8
	.type	_Z12MatMulKernel6MatrixS_S_,@function
_Z12MatMulKernel6MatrixS_S_:            ; @_Z12MatMulKernel6MatrixS_S_
; %bb.0:
	s_clause 0x6
	s_load_b32 s6, s[0:1], 0x0
	s_load_b32 s13, s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b32 s16, s[0:1], 0x20
	s_load_b64 s[4:5], s[0:1], 0x28
	s_load_b32 s12, s[0:1], 0x38
	s_load_b64 s[0:1], s[0:1], 0x40
	v_mov_b32_e32 v1, 0
	s_mov_b32 s7, 0
.LBB0_1:                                ; %.preheader154
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v2, v1
	v_mov_b32_e32 v3, v1
	v_mov_b32_e32 v4, v1
	s_add_i32 s8, s7, 16
	s_add_i32 s7, s7, 16
	s_cmp_lg_u32 s7, 64
	scratch_store_b128 off, v[1:4], s8
	s_cbranch_scc1 .LBB0_1
; %bb.2:                                ; %.preheader153
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s6, 63
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v4, 2, v1
	v_lshlrev_b32_e32 v5, 2, v0
	s_cbranch_scc1 .LBB0_4
; %bb.3:                                ; %.preheader153..preheader146_crit_edge
	v_lshlrev_b32_e32 v3, 2, v1
	v_lshlrev_b32_e32 v2, 2, v0
	s_mov_b32 s7, 0
	s_branch .LBB0_5
.LBB0_4:
	s_mov_b32 s7, -1
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr2
.LBB0_5:                                ; %Flow247
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB0_25
; %bb.6:                                ; %.lr.ph
	v_mul_lo_u32 v2, v1, s13
	v_mul_lo_u32 v3, v1, s16
	v_lshlrev_b32_e32 v6, 10, v1
	v_lshlrev_b32_e32 v0, 4, v0
	s_ashr_i32 s7, s6, 31
	s_lshl_b32 s8, s14, 6
	s_lshr_b32 s7, s7, 26
	s_lshl_b32 s18, s16, 6
	v_lshl_add_u32 v7, v2, 2, v5
	v_lshl_add_u32 v8, v3, 2, v5
	v_add_nc_u32_e32 v9, v0, v6
	v_or_b32_e32 v10, 0x4000, v0
	s_add_i32 s6, s6, s7
	s_mul_i32 s7, s15, s13
	s_ashr_i32 s17, s6, 6
	s_lshl_b32 s6, s7, 6
	s_mov_b32 s19, 0
.LBB0_7:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_8 Depth 2
                                        ;       Child Loop BB0_9 Depth 3
                                        ;     Child Loop BB0_12 Depth 2
                                        ;       Child Loop BB0_13 Depth 3
                                        ;         Child Loop BB0_14 Depth 4
                                        ;       Child Loop BB0_17 Depth 3
                                        ;         Child Loop BB0_18 Depth 4
                                        ;           Child Loop BB0_19 Depth 5
	s_ashr_i32 s7, s6, 31
	s_ashr_i32 s9, s8, 31
	s_lshl_b64 s[10:11], s[6:7], 2
	s_lshl_b64 s[20:21], s[8:9], 2
	s_add_u32 s7, s2, s10
	v_dual_mov_b32 v11, v9 :: v_dual_mov_b32 v0, v8
	v_mov_b32_e32 v2, v7
	s_addc_u32 s9, s3, s11
	s_add_u32 s20, s4, s20
	s_addc_u32 s21, s5, s21
	s_mov_b32 s22, 0
.LBB0_8:                                ; %.preheader152
                                        ;   Parent Loop BB0_7 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_9 Depth 3
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v1, 31, v0
	s_mov_b64 s[10:11], 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[12:13], 2, v[2:3]
	v_lshlrev_b64 v[14:15], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v1, vcc_lo, s7, v12
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, s20, v14
	v_add_co_ci_u32_e32 v13, vcc_lo, s21, v15, vcc_lo
	v_mov_b32_e32 v14, v11
.LBB0_9:                                ;   Parent Loop BB0_7 Depth=1
                                        ;     Parent Loop BB0_8 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_add_co_u32 v15, vcc_lo, v1, s10
	v_add_co_ci_u32_e32 v16, vcc_lo, s11, v3, vcc_lo
	v_add_co_u32 v17, vcc_lo, v12, s10
	v_add_co_ci_u32_e32 v18, vcc_lo, s11, v13, vcc_lo
	s_add_u32 s10, s10, 4
	global_load_b32 v15, v[15:16], off
	global_load_b32 v16, v[17:18], off
	s_addc_u32 s11, s11, 0
	s_cmp_eq_u32 s10, 16
	s_waitcnt vmcnt(0)
	ds_store_2addr_stride64_b32 v14, v15, v16 offset1:64
	v_add_nc_u32_e32 v14, 4, v14
	s_cbranch_scc0 .LBB0_9
; %bb.10:                               ;   in Loop: Header=BB0_8 Depth=2
	v_add_nc_u32_e32 v2, s13, v2
	v_add_nc_u32_e32 v0, s16, v0
	v_add_nc_u32_e32 v11, 0x100, v11
	s_add_i32 s22, s22, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s22, 4
	s_cbranch_scc0 .LBB0_8
; %bb.11:                               ;   in Loop: Header=BB0_7 Depth=1
	v_mov_b32_e32 v0, v10
	v_mov_b32_e32 v1, v6
	s_mov_b32 s7, 0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB0_12:                               ; %.preheader151
                                        ;   Parent Loop BB0_7 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_13 Depth 3
                                        ;         Child Loop BB0_14 Depth 4
                                        ;       Child Loop BB0_17 Depth 3
                                        ;         Child Loop BB0_18 Depth 4
                                        ;           Child Loop BB0_19 Depth 5
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v2, v0 :: v_dual_mov_b32 v3, v1
	s_mov_b32 s9, 0
	s_mov_b32 s10, 0
.LBB0_13:                               ; %.preheader149
                                        ;   Parent Loop BB0_7 Depth=1
                                        ;     Parent Loop BB0_12 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_14 Depth 4
	v_add_nc_u32_e64 v11, 0x50, s9
	v_add_nc_u32_e64 v12, 0x90, s9
	s_mov_b32 s11, 0
.LBB0_14:                               ;   Parent Loop BB0_7 Depth=1
                                        ;     Parent Loop BB0_12 Depth=2
                                        ;       Parent Loop BB0_13 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e32 v13, s11, v3
	v_add_nc_u32_e32 v14, s11, v2
	v_add_nc_u32_e32 v15, s11, v11
	v_add_nc_u32_e32 v16, s11, v12
	s_add_i32 s11, s11, 4
	ds_load_b32 v13, v13
	ds_load_b32 v14, v14
	s_cmp_eq_u32 s11, 16
	s_waitcnt lgkmcnt(1)
	scratch_store_b32 v15, v13, off
	s_waitcnt lgkmcnt(0)
	scratch_store_b32 v16, v14, off
	s_cbranch_scc0 .LBB0_14
; %bb.15:                               ;   in Loop: Header=BB0_13 Depth=3
	v_add_nc_u32_e32 v3, 0x100, v3
	v_add_nc_u32_e32 v2, 0x100, v2
	s_add_i32 s10, s10, 1
	s_add_i32 s9, s9, 16
	s_cmp_lg_u32 s10, 4
	s_cbranch_scc1 .LBB0_13
; %bb.16:                               ; %.preheader148.preheader
                                        ;   in Loop: Header=BB0_12 Depth=2
	v_mov_b32_e32 v2, 0x50
	s_mov_b32 s9, 0
.LBB0_17:                               ; %.preheader148
                                        ;   Parent Loop BB0_7 Depth=1
                                        ;     Parent Loop BB0_12 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_18 Depth 4
                                        ;           Child Loop BB0_19 Depth 5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s10, s9, 4
	v_mov_b32_e32 v3, 0x90
	v_add_nc_u32_e64 v11, s10, 16
	s_mov_b32 s10, 0
.LBB0_18:                               ; %.preheader147
                                        ;   Parent Loop BB0_7 Depth=1
                                        ;     Parent Loop BB0_12 Depth=2
                                        ;       Parent Loop BB0_17 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB0_19 Depth 5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_lshl_b32 s11, s10, 2
	v_mov_b32_e32 v14, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v12, s11, v11
	s_mov_b32 s11, 0
	scratch_load_b32 v13, v12, off
.LBB0_19:                               ;   Parent Loop BB0_7 Depth=1
                                        ;     Parent Loop BB0_12 Depth=2
                                        ;       Parent Loop BB0_17 Depth=3
                                        ;         Parent Loop BB0_18 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_add_nc_u32_e32 v15, s11, v2
	s_add_i32 s11, s11, 4
	scratch_load_b32 v16, v14, off
	scratch_load_b32 v15, v15, off
	v_add_nc_u32_e32 v14, 16, v14
	s_cmp_eq_u32 s11, 16
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v13, v15, v16
	s_cbranch_scc0 .LBB0_19
; %bb.20:                               ;   in Loop: Header=BB0_18 Depth=4
	v_add_nc_u32_e32 v3, 4, v3
	s_add_i32 s10, s10, 1
	scratch_store_b32 v12, v13, off
	s_cmp_eq_u32 s10, 4
	s_cbranch_scc0 .LBB0_18
; %bb.21:                               ;   in Loop: Header=BB0_17 Depth=3
	v_add_nc_u32_e32 v2, 16, v2
	s_add_i32 s9, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s9, 4
	s_cbranch_scc0 .LBB0_17
; %bb.22:                               ;   in Loop: Header=BB0_12 Depth=2
	v_add_nc_u32_e32 v1, 16, v1
	v_add_nc_u32_e32 v0, 0x400, v0
	s_add_i32 s7, s7, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s7, 16
	s_cbranch_scc0 .LBB0_12
; %bb.23:                               ;   in Loop: Header=BB0_7 Depth=1
	s_add_i32 s19, s19, 1
	s_add_i32 s6, s6, 64
	s_add_i32 s8, s8, s18
	s_cmp_eq_u32 s19, s17
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_7
; %bb.24:
	v_dual_mov_b32 v3, v4 :: v_dual_mov_b32 v2, v5
.LBB0_25:                               ; %Flow248
	s_mul_i32 s2, s12, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, v3, s12, v[2:3]
	s_add_i32 s2, s2, s14
	v_mov_b32_e32 v1, 16
	s_lshl_b32 s2, s2, 6
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[2:3], 2
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	s_mov_b32 s2, 0
.LBB0_26:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_27 Depth 2
	v_mov_b32_e32 v2, v1
	s_mov_b32 s3, 0
.LBB0_27:                               ;   Parent Loop BB0_26 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	scratch_load_b32 v5, v2, off
	v_add_nc_u32_e32 v3, s3, v0
	v_add_nc_u32_e32 v2, 4, v2
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_eq_u32 s3, 4
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[3:4], v5, off
	s_cbranch_scc0 .LBB0_27
; %bb.28:                               ;   in Loop: Header=BB0_26 Depth=1
	v_add_nc_u32_e32 v1, 16, v1
	v_add_nc_u32_e32 v0, s12, v0
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, 4
	s_cbranch_scc0 .LBB0_26
; %bb.29:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12MatMulKernel6MatrixS_S_
		.amdhsa_group_segment_fixed_size 32768
		.amdhsa_private_segment_fixed_size 208
		.amdhsa_kernarg_size 72
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 23
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12MatMulKernel6MatrixS_S_, .Lfunc_end0-_Z12MatMulKernel6MatrixS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1068
; NumSgprs: 25
; NumVgprs: 19
; ScratchSize: 208
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 32768 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 25
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           24
        .value_kind:     by_value
      - .offset:         24
        .size:           24
        .value_kind:     by_value
      - .offset:         48
        .size:           24
        .value_kind:     by_value
    .group_segment_fixed_size: 32768
    .kernarg_segment_align: 8
    .kernarg_segment_size: 72
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12MatMulKernel6MatrixS_S_
    .private_segment_fixed_size: 208
    .sgpr_count:     25
    .sgpr_spill_count: 0
    .symbol:         _Z12MatMulKernel6MatrixS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
