#include <stdio.h>
#include <math.h>

__global__ void evenReduce(int *a, int *b, int numP)
{
	int index = blockIdx.x * blockDim.x + threadIdx.x;
	if(index < numP)
		b[index] = a[index * 2] + a[index * 2 + 1];
}

__global__ void oddReduce(int *a, int *b, int numP)
{
	int index = blockIdx.x * blockDim.x + threadIdx.x;
	if(index < numP) 
	{
	if(index != numP - 1)
			{ 
				b[index] = a[index * 2] + a[index * 2 + 1];
			}
	else 
			{
				/*puts the remaining value that doesn't have a pair in the right index*/
				b[index] = a[index * 2];
			}
	}		
} 

#define LENGTH 512
#define BLOCK_THREADS 512

int main()
{
	double length = LENGTH;
	int numP, l;

	cudaEvent_t start, stop;
	cudaEventCreate(&start);
	cudaEventCreate(&stop);
   	
   	/*create arrays for host and GPU*/
   	int *a, *b, *k_b, *k_a;
	int size = length * sizeof( int );

	a = (int *)malloc( size );
	b = (int *)malloc( size );

	cudaMalloc( (void **) &k_a, size );
	cudaMalloc( (void **) &k_b, size );

   	/*initialize the array*/
	for( int i = 0; i < length; i++ )
	{
		a[i] = i;
		b[i] = 0;
	}

	/*array debug*/
	// printf("A:\n");
	// for(int i=0; i< length; i++)
	// {
	// 	printf("%d ", a[i]);
	// }

	/* copy inputs to device */
	cudaMemcpy(k_a, a, size, cudaMemcpyHostToDevice );
	cudaMemcpy(k_b, b, size, cudaMemcpyHostToDevice );

 	dim3 dimGrid( 1, 1 );
 	dim3 dimBlock(BLOCK_THREADS, 1);
	
	/*Since each thread does 2 additions there are log2(N) iterations.*/
	int gates = ceil(log(length) / log(2));
	
	cudaEventRecord(start);
	
	for(int i=0; i < gates; i++) {

		/*get the number of threads needed. Ceiling used for odd array lengths*/
		numP = ceil(length/2);
				
		l = (int)length;
		/*when threads are divisble by 2 use less code...*/
		if( l % 2 == 0)
			evenReduce<<<dimGrid,dimBlock>>>(k_a, k_b, numP);
		else 
			oddReduce<<<dimGrid,dimBlock>>>(k_a, k_b, numP);
		
		/*last # of threads will equal next array length to compute*/
		length = numP;
		
		// printf("\niteration %d reduction is\n", i + 1);
		// cudaMemcpy(b, k_b, size, cudaMemcpyDeviceToHost );
		// for(int i=0; i< N; i++)
		// 	{
		// 	printf("%d ", b[i]);
		// 	}

		/*send array b's data back to a after each iteration*/
		cudaMemcpy(k_a, k_b, size, cudaMemcpyDeviceToDevice );
	}
	
	cudaEventRecord(stop);
	cudaEventSynchronize(stop);
	float milliseconds = 0;
	cudaEventElapsedTime(&milliseconds, start, stop);

	/* copy result back to host*/

	cudaMemcpy(b, k_b, size, cudaMemcpyDeviceToHost );
	printf("\nFinal reduction is %d\n", b[0]);
	printf("\nThis took %f milliseconds\n", milliseconds);

	/* clean up */

	free(a);
	free(b);
	cudaFree( k_a );
	cudaFree( k_b );
	
	return 0;
} 


	.file	"tmpxft_00241b5f_00000000-6_reduce.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z33__device_stub__Z10evenReducePiS_iPiS_i
	.type	_Z33__device_stub__Z10evenReducePiS_iPiS_i, @function
_Z33__device_stub__Z10evenReducePiS_iPiS_i:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10evenReducePiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z33__device_stub__Z10evenReducePiS_iPiS_i, .-_Z33__device_stub__Z10evenReducePiS_iPiS_i
	.globl	_Z10evenReducePiS_i
	.type	_Z10evenReducePiS_i, @function
_Z10evenReducePiS_i:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z10evenReducePiS_iPiS_i
	.cfi_endproc
.LFE2054:
	.size	_Z10evenReducePiS_i, .-_Z10evenReducePiS_i
	.globl	_Z31__device_stub__Z9oddReducePiS_iPiS_i
	.type	_Z31__device_stub__Z9oddReducePiS_iPiS_i, @function
_Z31__device_stub__Z9oddReducePiS_iPiS_i:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9oddReducePiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L8:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z31__device_stub__Z9oddReducePiS_iPiS_i, .-_Z31__device_stub__Z9oddReducePiS_iPiS_i
	.globl	_Z9oddReducePiS_i
	.type	_Z9oddReducePiS_i, @function
_Z9oddReducePiS_i:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z9oddReducePiS_iPiS_i
	.cfi_endproc
.LFE2056:
	.size	_Z9oddReducePiS_i, .-_Z9oddReducePiS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"\nFinal reduction is %d\n"
.LC4:
	.string	"\nThis took %f milliseconds\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$104, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$2048, %edi
	call	malloc@PLT
	movl	$2048, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	leaq	56(%rsp), %rdi
	movl	$2048, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$2048, %esi
	call	cudaMalloc@PLT
	xorl	%ecx, %ecx
.L14:
	movl	%ecx, 0(%rbp,%rcx,4)
	incq	%rcx
	cmpq	$512, %rcx
	jne	.L14
	xorl	%eax, %eax
	movq	%rbx, %rdi
	movl	$2048, %edx
	movq	%rbp, %rsi
	rep stosl
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movl	$9, %r12d
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$2048, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	addq	$511, %rax
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	cudaEventRecord@PLT
	movsd	.LC0(%rip), %xmm1
	movsd	%xmm1, 8(%rsp)
.L19:
	movsd	.LC1(%rip), %xmm0
	mulsd	8(%rsp), %xmm0
	call	ceil@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	76(%rsp), %rdx
	cvttsd2sil	%xmm0, %r13d
	movl	84(%rsp), %ecx
	movq	64(%rsp), %rdi
	cvttsd2sil	8(%rsp), %eax
	movl	72(%rsp), %esi
	testb	$1, %al
	jne	.L15
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	48(%rsp), %rsi
	movq	56(%rsp), %rdi
	movl	%r13d, %edx
	call	_Z33__device_stub__Z10evenReducePiS_iPiS_i
	jmp	.L17
.L15:
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	48(%rsp), %rsi
	movq	56(%rsp), %rdi
	movl	%r13d, %edx
	call	_Z31__device_stub__Z9oddReducePiS_iPiS_i
.L17:
	cvtsi2sdl	%r13d, %xmm3
	movq	48(%rsp), %rsi
	movq	56(%rsp), %rdi
	movl	$3, %ecx
	movl	$2048, %edx
	movsd	%xmm3, 8(%rsp)
	call	cudaMemcpy@PLT
	decl	%r12d
	jne	.L19
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	28(%rsp), %rdi
	movl	$0x00000000, 28(%rsp)
	call	cudaEventElapsedTime@PLT
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$2048, %edx
	call	cudaMemcpy@PLT
	movl	(%rbx), %edx
	leaq	.LC3(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	28(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$104, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z9oddReducePiS_i"
.LC6:
	.string	"_Z10evenReducePiS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9oddReducePiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10evenReducePiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1082130432
	.align 8
.LC1:
	.long	0
	.long	1071644672
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>

__global__ void evenReduce(int *a, int *b, int numP)
{
	int index = blockIdx.x * blockDim.x + threadIdx.x;
	if(index < numP)
		b[index] = a[index * 2] + a[index * 2 + 1];
}

__global__ void oddReduce(int *a, int *b, int numP)
{
	int index = blockIdx.x * blockDim.x + threadIdx.x;
	if(index < numP) 
	{
	if(index != numP - 1)
			{ 
				b[index] = a[index * 2] + a[index * 2 + 1];
			}
	else 
			{
				/*puts the remaining value that doesn't have a pair in the right index*/
				b[index] = a[index * 2];
			}
	}		
} 

#define LENGTH 512
#define BLOCK_THREADS 512

int main()
{
	double length = LENGTH;
	int numP, l;

	hipEvent_t start, stop;
	hipEventCreate(&start);
	hipEventCreate(&stop);
   	
   	/*create arrays for host and GPU*/
   	int *a, *b, *k_b, *k_a;
	int size = length * sizeof( int );

	a = (int *)malloc( size );
	b = (int *)malloc( size );

	hipMalloc( (void **) &k_a, size );
	hipMalloc( (void **) &k_b, size );

   	/*initialize the array*/
	for( int i = 0; i < length; i++ )
	{
		a[i] = i;
		b[i] = 0;
	}

	/*array debug*/
	// printf("A:\n");
	// for(int i=0; i< length; i++)
	// {
	// 	printf("%d ", a[i]);
	// }

	/* copy inputs to device */
	hipMemcpy(k_a, a, size, hipMemcpyHostToDevice );
	hipMemcpy(k_b, b, size, hipMemcpyHostToDevice );

 	dim3 dimGrid( 1, 1 );
 	dim3 dimBlock(BLOCK_THREADS, 1);
	
	/*Since each thread does 2 additions there are log2(N) iterations.*/
	int gates = ceil(log(length) / log(2));
	
	hipEventRecord(start);
	
	for(int i=0; i < gates; i++) {

		/*get the number of threads needed. Ceiling used for odd array lengths*/
		numP = ceil(length/2);
				
		l = (int)length;
		/*when threads are divisble by 2 use less code...*/
		if( l % 2 == 0)
			evenReduce<<<dimGrid,dimBlock>>>(k_a, k_b, numP);
		else 
			oddReduce<<<dimGrid,dimBlock>>>(k_a, k_b, numP);
		
		/*last # of threads will equal next array length to compute*/
		length = numP;
		
		// printf("\niteration %d reduction is\n", i + 1);
		// cudaMemcpy(b, k_b, size, cudaMemcpyDeviceToHost );
		// for(int i=0; i< N; i++)
		// 	{
		// 	printf("%d ", b[i]);
		// 	}

		/*send array b's data back to a after each iteration*/
		hipMemcpy(k_a, k_b, size, hipMemcpyDeviceToDevice );
	}
	
	hipEventRecord(stop);
	hipEventSynchronize(stop);
	float milliseconds = 0;
	hipEventElapsedTime(&milliseconds, start, stop);

	/* copy result back to host*/

	hipMemcpy(b, k_b, size, hipMemcpyDeviceToHost );
	printf("\nFinal reduction is %d\n", b[0]);
	printf("\nThis took %f milliseconds\n", milliseconds);

	/* clean up */

	free(a);
	free(b);
	hipFree( k_a );
	hipFree( k_b );
	
	return 0;
} 


	.text
	.file	"reduce.hip"
	.globl	_Z25__device_stub__evenReducePiS_i # -- Begin function _Z25__device_stub__evenReducePiS_i
	.type	_Z25__device_stub__evenReducePiS_i,@function
_Z25__device_stub__evenReducePiS_i:     # @_Z25__device_stub__evenReducePiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10evenReducePiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__evenReducePiS_i, .Lfunc_end0-_Z25__device_stub__evenReducePiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__oddReducePiS_i # -- Begin function _Z24__device_stub__oddReducePiS_i
	.type	_Z24__device_stub__oddReducePiS_i,@function
_Z24__device_stub__oddReducePiS_i:      # @_Z24__device_stub__oddReducePiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9oddReducePiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__oddReducePiS_i, .Lfunc_end1-_Z24__device_stub__oddReducePiS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI2_0:
	.quad	0x4080000000000000              # double 512
.LCPI2_1:
	.quad	0x3fe0000000000000              # double 0.5
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	32(%rsp), %rdi
	callq	hipEventCreate
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	movl	$2048, %edi                     # imm = 0x800
	callq	malloc
	movq	%rax, %rbx
	movl	$1, %edi
	movl	$2048, %esi                     # imm = 0x800
	callq	calloc@PLT
	movq	%rax, %r14
	leaq	8(%rsp), %rdi
	movl	$2048, %esi                     # imm = 0x800
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$2048, %esi                     # imm = 0x800
	callq	hipMalloc
	xorl	%eax, %eax
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, (%rbx,%rax,4)
	incq	%rax
	cmpq	$512, %rax                      # imm = 0x200
	jne	.LBB2_1
# %bb.2:
	movabsq	$4294967297, %r15               # imm = 0x100000001
	movq	8(%rsp), %rdi
	movl	$2048, %edx                     # imm = 0x800
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	movl	$2048, %edx                     # imm = 0x800
	movq	%r14, 40(%rsp)                  # 8-byte Spill
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movsd	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$9, %r13d
	leaq	511(%r15), %r12
.LBB2_3:                                # =>This Inner Loop Header: Depth=1
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI2_1(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %ebp
	cvttsd2si	16(%rsp), %r14d         # 8-byte Folded Reload
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testb	$1, %r14b
	jne	.LBB2_6
# %bb.4:                                #   in Loop: Header=BB2_3 Depth=1
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.5:                                #   in Loop: Header=BB2_3 Depth=1
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	%ebp, %edx
	callq	_Z25__device_stub__evenReducePiS_i
	jmp	.LBB2_8
.LBB2_6:                                #   in Loop: Header=BB2_3 Depth=1
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.7:                                #   in Loop: Header=BB2_3 Depth=1
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	%ebp, %edx
	callq	_Z24__device_stub__oddReducePiS_i
.LBB2_8:                                #   in Loop: Header=BB2_3 Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ebp, %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$2048, %edx                     # imm = 0x800
	movl	$3, %ecx
	callq	hipMemcpy
	decl	%r13d
	jne	.LBB2_3
# %bb.9:
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	52(%rsp), %r15
	movl	$0, (%r15)
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	movq	(%rsp), %rsi
	movl	$2048, %edx                     # imm = 0x800
	movq	40(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	(%r14), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10evenReducePiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9oddReducePiS_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10evenReducePiS_i,@object     # @_Z10evenReducePiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z10evenReducePiS_i
	.p2align	3, 0x0
_Z10evenReducePiS_i:
	.quad	_Z25__device_stub__evenReducePiS_i
	.size	_Z10evenReducePiS_i, 8

	.type	_Z9oddReducePiS_i,@object       # @_Z9oddReducePiS_i
	.globl	_Z9oddReducePiS_i
	.p2align	3, 0x0
_Z9oddReducePiS_i:
	.quad	_Z24__device_stub__oddReducePiS_i
	.size	_Z9oddReducePiS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\nFinal reduction is %d\n"
	.size	.L.str, 24

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\nThis took %f milliseconds\n"
	.size	.L.str.1, 28

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10evenReducePiS_i"
	.size	.L__unnamed_1, 20

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9oddReducePiS_i"
	.size	.L__unnamed_2, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__evenReducePiS_i
	.addrsig_sym _Z24__device_stub__oddReducePiS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10evenReducePiS_i
	.addrsig_sym _Z9oddReducePiS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10evenReducePiS_i     ; -- Begin function _Z10evenReducePiS_i
	.globl	_Z10evenReducePiS_i
	.p2align	8
	.type	_Z10evenReducePiS_i,@function
_Z10evenReducePiS_i:                    ; @_Z10evenReducePiS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v2, 1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_load_b64 v[3:4], v[2:3], off
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v4, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10evenReducePiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10evenReducePiS_i, .Lfunc_end0-_Z10evenReducePiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 176
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9oddReducePiS_i       ; -- Begin function _Z9oddReducePiS_i
	.globl	_Z9oddReducePiS_i
	.p2align	8
	.type	_Z9oddReducePiS_i,@function
_Z9oddReducePiS_i:                      ; @_Z9oddReducePiS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s4, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB1_4
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v2, 1, v1
	s_add_i32 s4, s4, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_mov_b32 s0, exec_lo
	global_load_b32 v0, v[2:3], off
	v_cmpx_ne_u32_e64 s4, v1
	s_cbranch_execz .LBB1_3
; %bb.2:
	global_load_b32 v2, v[2:3], off offset:4
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v2, v0
.LBB1_3:                                ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[1:2], v0, off
.LBB1_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9oddReducePiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9oddReducePiS_i, .Lfunc_end1-_Z9oddReducePiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 212
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10evenReducePiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10evenReducePiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9oddReducePiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9oddReducePiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
