#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <math.h>
#include <limits>

#include <sys/time.h>
#include <time.h>

#include <cuda_runtime.h>

using namespace std;

__global__ void assignmentKernel(float* d_in, float* d_out, int threads_num) {
  const unsigned int tid = blockIdx.x * blockDim.x + threadIdx.x;
  if(tid < threads_num) {
    float x = d_in[tid];
    d_out[tid] = pow((x/(x-2.3)),3.0);
  }
}

int timeval_subtract( struct timeval* result, struct timeval* t2,struct timeval* t1) {
  unsigned int resolution=1000000;
  long int diff = (t2->tv_usec + resolution * t2->tv_sec) -
    (t1->tv_usec + resolution * t1->tv_sec) ;
  result->tv_sec = diff / resolution;
  result->tv_usec = diff % resolution;
  return (diff<0);
}

unsigned long int cudaCalculation(unsigned int num_threads, unsigned int mem_size, float* h_in, float* h_out) {
  unsigned int block_size  = 1024;
  unsigned int num_blocks  = ceil(((num_threads + (block_size -1)) / block_size));

  // Allocate device memory
  float* d_in;
  cudaMalloc((void**) &d_in,  mem_size);
  float* d_out;
  cudaMalloc((void**) &d_out, mem_size);

  // Copy host memory to device
  cudaMemcpy(d_in, h_in, mem_size, cudaMemcpyHostToDevice);

  // Start timing the CUDA run.
  unsigned long int elapsed;
  struct timeval t_start, t_end, t_diff;
  gettimeofday(&t_start, NULL);

  // Execute the kernel
  assignmentKernel<<<num_blocks, block_size>>>(d_in, d_out, num_threads);
  cudaThreadSynchronize();

  // End timing the CUDA run,
  gettimeofday(&t_end, NULL);
  timeval_subtract(&t_diff, &t_end, &t_start);
  elapsed = t_diff.tv_sec*1e6+t_diff.tv_usec;

  // Copy the result form device to host
  cudaMemcpy(h_out, d_out, mem_size, cudaMemcpyDeviceToHost);

  // Free device memory.
  cudaFree(d_in);
  cudaFree(d_out);

  return elapsed;
}

unsigned long int cpuCalculation(unsigned int array_length, float* h_in, float* h_out) {

  // Start timing the CPU run.
  unsigned long int elapsed;
  struct timeval t_start, t_end, t_diff;
  gettimeofday(&t_start, NULL);

  // Perform serial calculations
  for (unsigned int i=0 ; i < array_length ; i++) {
      float x = h_in[i];
      h_out[i] = pow((x/(x-2.3)),3.0);
  }

  // End timing the CPU run,
  gettimeofday(&t_end, NULL);
  timeval_subtract(&t_diff, &t_end, &t_start);
  elapsed = t_diff.tv_sec*1e6+t_diff.tv_usec;

  return elapsed;
}

bool areSame(float* h_in, float* cpu_arr, float* cuda_arr, unsigned int array_length) {
  for(unsigned int i = 0 ; i < array_length ; i++) {
    if(!(std::abs(cpu_arr[i] - cuda_arr[i]) < std::numeric_limits<float>::epsilon())) {
      printf("INVALID:\nInput: %f\nCPU: %.15f\nGPU: %.15f\n", h_in[i], cpu_arr[i], cuda_arr[i]);
      return false;
    }
  }
  return true;
}

int main(int argc, char** argv) {
  unsigned int array_length = 753411;
  unsigned int mem_size   = array_length*sizeof(float);

  // Allocate host memory
  float* h_in  = (float*) malloc(mem_size);
  float* cuda_out = (float*) malloc(mem_size);
  float* cpu_out = (float*) malloc(mem_size);

  // Initialize the memory
  for(unsigned int i=0 ; i < array_length ; ++i) {
    h_in[i] = (float)i+1;
  }

  // Call the CUDA code.
  unsigned long int cuda_elapsed = cudaCalculation(array_length, mem_size, h_in, cuda_out);
  printf("CUDA took %d microseconds (%.2fms)\n",cuda_elapsed,cuda_elapsed/1000.0);

  // Call the CPU code.
  unsigned long int cpu_elapsed = cpuCalculation(array_length, h_in, cpu_out);
  printf("CPU took %d microseconds (%.2fms)\n",cpu_elapsed,cpu_elapsed/1000.0);

  if(areSame(h_in, cpu_out, cuda_out, array_length)) {
    printf("VALID: CPU and GPU agreed on results.\n");
  }

  // print result
  //for(unsigned int i=0; i<array_length; ++i) printf("%.6f\n", cuda_out[i]);

  // Clean up memory
  free(h_in);
  free(cuda_out);
  free(cpu_out);

  return 0;
}

	.file	"tmpxft_00284bd7_00000000-6_task4.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z16timeval_subtractP7timevalS0_S0_
	.type	_Z16timeval_subtractP7timevalS0_S0_, @function
_Z16timeval_subtractP7timevalS0_S0_:
.LFB2027:
	.cfi_startproc
	endbr64
	imulq	$1000000, (%rsi), %rcx
	addq	8(%rsi), %rcx
	movl	$1000000, %esi
	imulq	$1000000, (%rdx), %rax
	addq	8(%rdx), %rax
	subq	%rax, %rcx
	movq	%rcx, %rax
	shrq	$63, %rcx
	cqto
	idivq	%rsi
	movq	%rax, (%rdi)
	movq	%rcx, %rax
	movq	%rdx, 8(%rdi)
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z16timeval_subtractP7timevalS0_S0_, .-_Z16timeval_subtractP7timevalS0_S0_
	.globl	_Z14cpuCalculationjPfS_
	.type	_Z14cpuCalculationjPfS_, @function
_Z14cpuCalculationjPfS_:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rsi, %r12
	xorl	%esi, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%edi, %ebx
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %r14
	movq	%r14, %rdi
	call	gettimeofday@PLT
.L4:
	cmpq	%rbx, %rbp
	je	.L11
	cvtss2sd	(%r12,%rbp,4), %xmm0
	movaps	%xmm0, %xmm1
	subsd	.LC1(%rip), %xmm1
	divsd	%xmm1, %xmm0
	movsd	.LC0(%rip), %xmm1
	call	pow@PLT
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 0(%r13,%rbp,4)
	incq	%rbp
	jmp	.L4
.L11:
	leaq	24(%rsp), %rbx
	xorl	%esi, %esi
	movq	%rbx, %rdi
	call	gettimeofday@PLT
	leaq	40(%rsp), %rdi
	movq	%r14, %rdx
	movq	%rbx, %rsi
	call	_Z16timeval_subtractP7timevalS0_S0_
	cvtsi2sdq	40(%rsp), %xmm0
	mulsd	.LC2(%rip), %xmm0
	cvtsi2sdq	48(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movsd	.LC3(%rip), %xmm1
	comisd	%xmm1, %xmm0
	jnb	.L6
	cvttsd2siq	%xmm0, %rax
	jmp	.L7
.L6:
	subsd	%xmm1, %xmm0
	cvttsd2siq	%xmm0, %rax
	btcq	$63, %rax
.L7:
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z14cpuCalculationjPfS_, .-_Z14cpuCalculationjPfS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC6:
	.string	"INVALID:\nInput: %f\nCPU: %.15f\nGPU: %.15f\n"
	.text
	.globl	_Z7areSamePfS_S_j
	.type	_Z7areSamePfS_S_j, @function
_Z7areSamePfS_S_j:
.LFB2030:
	.cfi_startproc
	endbr64
	movss	.LC5(%rip), %xmm4
	xorl	%eax, %eax
	movss	.LC4(%rip), %xmm3
.L13:
	cmpl	%ecx, %eax
	jnb	.L21
	movss	(%rsi,%rax,4), %xmm1
	movss	(%rdx,%rax,4), %xmm2
	leaq	1(%rax), %r8
	movaps	%xmm1, %xmm0
	subss	%xmm2, %xmm0
	andps	%xmm3, %xmm0
	comiss	%xmm0, %xmm4
	ja	.L16
	pushq	%rdx
	.cfi_def_cfa_offset 16
	leaq	.LC6(%rip), %rsi
	cvtss2sd	(%rdi,%rax,4), %xmm0
	movl	$2, %edi
	movb	$3, %al
	cvtss2sd	%xmm2, %xmm2
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	ret
.L16:
	movq	%r8, %rax
	jmp	.L13
.L21:
	movb	$1, %al
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z7areSamePfS_S_j, .-_Z7areSamePfS_S_j
	.globl	_Z39__device_stub__Z16assignmentKernelPfS_iPfS_i
	.type	_Z39__device_stub__Z16assignmentKernelPfS_iPfS_i, @function
_Z39__device_stub__Z16assignmentKernelPfS_iPfS_i:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16assignmentKernelPfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L22:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z39__device_stub__Z16assignmentKernelPfS_iPfS_i, .-_Z39__device_stub__Z16assignmentKernelPfS_iPfS_i
	.globl	_Z16assignmentKernelPfS_i
	.type	_Z16assignmentKernelPfS_i, @function
_Z16assignmentKernelPfS_i:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z16assignmentKernelPfS_iPfS_i
	.cfi_endproc
.LFE2057:
	.size	_Z16assignmentKernelPfS_i, .-_Z16assignmentKernelPfS_i
	.globl	_Z15cudaCalculationjjPfS_
	.type	_Z15cudaCalculationjjPfS_, @function
_Z15cudaCalculationjjPfS_:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%esi, %ebx
	movq	%rbx, %rsi
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	leaq	24(%rsp), %r13
	call	cudaMemcpy@PLT
	xorl	%esi, %esi
	movq	%r13, %rdi
	call	gettimeofday@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	leal	1023(%rbp), %eax
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, 64(%rsp)
	shrl	$10, %eax
	movq	%rdx, 56(%rsp)
	movl	%eax, 40(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 44(%rsp)
	movq	40(%rsp), %rdi
	movl	48(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	%ebp, %edx
	call	_Z39__device_stub__Z16assignmentKernelPfS_iPfS_i
.L28:
	call	cudaThreadSynchronize@PLT
	leaq	40(%rsp), %rbp
	xorl	%esi, %esi
	movq	%rbp, %rdi
	call	gettimeofday@PLT
	leaq	56(%rsp), %rdi
	movq	%r13, %rdx
	movq	%rbp, %rsi
	call	_Z16timeval_subtractP7timevalS0_S0_
	cvtsi2sdq	56(%rsp), %xmm0
	mulsd	.LC2(%rip), %xmm0
	cvtsi2sdq	64(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movsd	.LC3(%rip), %xmm1
	comisd	%xmm1, %xmm0
	jnb	.L29
	cvttsd2siq	%xmm0, %rbp
	jmp	.L30
.L29:
	subsd	%xmm1, %xmm0
	cvttsd2siq	%xmm0, %rbp
	btcq	$63, %rbp
.L30:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbp, %rax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z15cudaCalculationjjPfS_, .-_Z15cudaCalculationjjPfS_
	.section	.rodata.str1.1
.LC9:
	.string	"CUDA took %d microseconds (%.2fms)\n"
.LC10:
	.string	"CPU took %d microseconds (%.2fms)\n"
.LC11:
	.string	"VALID: CPU and GPU agreed on results.\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$3013644, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	call	malloc@PLT
	movl	$3013644, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$3013644, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movss	.LC7(%rip), %xmm1
	movq	%rax, %rbp
	xorl	%eax, %eax
.L34:
	cvtsi2ssl	%eax, %xmm0
	addss	%xmm1, %xmm0
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	cmpq	$753411, %rax
	jne	.L34
	movq	%rbx, %rdx
	movq	%r12, %rcx
	movl	$3013644, %esi
	movl	$753411, %edi
	call	_Z15cudaCalculationjjPfS_
	movq	%rax, %rdx
	testq	%rax, %rax
	js	.L35
	cvtsi2sdq	%rax, %xmm0
	jmp	.L36
.L35:
	movq	%rdx, %rcx
	shrq	%rax
	andl	$1, %ecx
	orq	%rcx, %rax
	cvtsi2sdq	%rax, %xmm0
	addsd	%xmm0, %xmm0
.L36:
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	divsd	.LC8(%rip), %xmm0
	call	__printf_chk@PLT
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	$753411, %edi
	call	_Z14cpuCalculationjPfS_
	movq	%rax, %rdx
	testq	%rax, %rax
	js	.L37
	cvtsi2sdq	%rax, %xmm0
	jmp	.L38
.L37:
	movq	%rdx, %rcx
	shrq	%rax
	andl	$1, %ecx
	orq	%rcx, %rax
	cvtsi2sdq	%rax, %xmm0
	addsd	%xmm0, %xmm0
.L38:
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	divsd	.LC8(%rip), %xmm0
	call	__printf_chk@PLT
	movl	$753411, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_Z7areSamePfS_S_j
	testb	%al, %al
	je	.L39
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L39:
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	popq	%rbx
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z16assignmentKernelPfS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z16assignmentKernelPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1074266112
	.align 8
.LC1:
	.long	1717986918
	.long	1073899110
	.align 8
.LC2:
	.long	0
	.long	1093567616
	.align 8
.LC3:
	.long	0
	.long	1138753536
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC4:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC5:
	.long	872415232
	.align 4
.LC7:
	.long	1065353216
	.section	.rodata.cst8
	.align 8
.LC8:
	.long	0
	.long	1083129856
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <math.h>
#include <limits>

#include <sys/time.h>
#include <time.h>

#include <hip/hip_runtime.h>

using namespace std;

__global__ void assignmentKernel(float* d_in, float* d_out, int threads_num) {
  const unsigned int tid = blockIdx.x * blockDim.x + threadIdx.x;
  if(tid < threads_num) {
    float x = d_in[tid];
    d_out[tid] = pow((x/(x-2.3)),3.0);
  }
}

int timeval_subtract( struct timeval* result, struct timeval* t2,struct timeval* t1) {
  unsigned int resolution=1000000;
  long int diff = (t2->tv_usec + resolution * t2->tv_sec) -
    (t1->tv_usec + resolution * t1->tv_sec) ;
  result->tv_sec = diff / resolution;
  result->tv_usec = diff % resolution;
  return (diff<0);
}

unsigned long int cudaCalculation(unsigned int num_threads, unsigned int mem_size, float* h_in, float* h_out) {
  unsigned int block_size  = 1024;
  unsigned int num_blocks  = ceil(((num_threads + (block_size -1)) / block_size));

  // Allocate device memory
  float* d_in;
  hipMalloc((void**) &d_in,  mem_size);
  float* d_out;
  hipMalloc((void**) &d_out, mem_size);

  // Copy host memory to device
  hipMemcpy(d_in, h_in, mem_size, hipMemcpyHostToDevice);

  // Start timing the CUDA run.
  unsigned long int elapsed;
  struct timeval t_start, t_end, t_diff;
  gettimeofday(&t_start, NULL);

  // Execute the kernel
  assignmentKernel<<<num_blocks, block_size>>>(d_in, d_out, num_threads);
  hipDeviceSynchronize();

  // End timing the CUDA run,
  gettimeofday(&t_end, NULL);
  timeval_subtract(&t_diff, &t_end, &t_start);
  elapsed = t_diff.tv_sec*1e6+t_diff.tv_usec;

  // Copy the result form device to host
  hipMemcpy(h_out, d_out, mem_size, hipMemcpyDeviceToHost);

  // Free device memory.
  hipFree(d_in);
  hipFree(d_out);

  return elapsed;
}

unsigned long int cpuCalculation(unsigned int array_length, float* h_in, float* h_out) {

  // Start timing the CPU run.
  unsigned long int elapsed;
  struct timeval t_start, t_end, t_diff;
  gettimeofday(&t_start, NULL);

  // Perform serial calculations
  for (unsigned int i=0 ; i < array_length ; i++) {
      float x = h_in[i];
      h_out[i] = pow((x/(x-2.3)),3.0);
  }

  // End timing the CPU run,
  gettimeofday(&t_end, NULL);
  timeval_subtract(&t_diff, &t_end, &t_start);
  elapsed = t_diff.tv_sec*1e6+t_diff.tv_usec;

  return elapsed;
}

bool areSame(float* h_in, float* cpu_arr, float* cuda_arr, unsigned int array_length) {
  for(unsigned int i = 0 ; i < array_length ; i++) {
    if(!(std::abs(cpu_arr[i] - cuda_arr[i]) < std::numeric_limits<float>::epsilon())) {
      printf("INVALID:\nInput: %f\nCPU: %.15f\nGPU: %.15f\n", h_in[i], cpu_arr[i], cuda_arr[i]);
      return false;
    }
  }
  return true;
}

int main(int argc, char** argv) {
  unsigned int array_length = 753411;
  unsigned int mem_size   = array_length*sizeof(float);

  // Allocate host memory
  float* h_in  = (float*) malloc(mem_size);
  float* cuda_out = (float*) malloc(mem_size);
  float* cpu_out = (float*) malloc(mem_size);

  // Initialize the memory
  for(unsigned int i=0 ; i < array_length ; ++i) {
    h_in[i] = (float)i+1;
  }

  // Call the CUDA code.
  unsigned long int cuda_elapsed = cudaCalculation(array_length, mem_size, h_in, cuda_out);
  printf("CUDA took %d microseconds (%.2fms)\n",cuda_elapsed,cuda_elapsed/1000.0);

  // Call the CPU code.
  unsigned long int cpu_elapsed = cpuCalculation(array_length, h_in, cpu_out);
  printf("CPU took %d microseconds (%.2fms)\n",cpu_elapsed,cpu_elapsed/1000.0);

  if(areSame(h_in, cpu_out, cuda_out, array_length)) {
    printf("VALID: CPU and GPU agreed on results.\n");
  }

  // print result
  //for(unsigned int i=0; i<array_length; ++i) printf("%.6f\n", cuda_out[i]);

  // Clean up memory
  free(h_in);
  free(cuda_out);
  free(cpu_out);

  return 0;
}

	.text
	.file	"task4.hip"
	.globl	_Z31__device_stub__assignmentKernelPfS_i # -- Begin function _Z31__device_stub__assignmentKernelPfS_i
	.type	_Z31__device_stub__assignmentKernelPfS_i,@function
_Z31__device_stub__assignmentKernelPfS_i: # @_Z31__device_stub__assignmentKernelPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16assignmentKernelPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__assignmentKernelPfS_i, .Lfunc_end0-_Z31__device_stub__assignmentKernelPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z16timeval_subtractP7timevalS0_S0_ # -- Begin function _Z16timeval_subtractP7timevalS0_S0_
	.type	_Z16timeval_subtractP7timevalS0_S0_,@function
_Z16timeval_subtractP7timevalS0_S0_:    # @_Z16timeval_subtractP7timevalS0_S0_
	.cfi_startproc
# %bb.0:
	movq	(%rsi), %rax
	movq	8(%rsi), %rcx
	subq	(%rdx), %rax
	imulq	$1000000, %rax, %rax            # imm = 0xF4240
	subq	8(%rdx), %rcx
	addq	%rax, %rcx
	movabsq	$4835703278458516699, %rdx      # imm = 0x431BDE82D7B634DB
	movq	%rcx, %rax
	imulq	%rdx
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$18, %rdx
	addq	%rax, %rdx
	movq	%rdx, (%rdi)
	imulq	$1000000, %rdx, %rax            # imm = 0xF4240
	movq	%rcx, %rdx
	subq	%rax, %rdx
	movq	%rdx, 8(%rdi)
	shrq	$63, %rcx
	movl	%ecx, %eax
	retq
.Lfunc_end1:
	.size	_Z16timeval_subtractP7timevalS0_S0_, .Lfunc_end1-_Z16timeval_subtractP7timevalS0_S0_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z15cudaCalculationjjPfS_
.LCPI2_0:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI2_1:
	.quad	0x43e0000000000000              # double 9.2233720368547758E+18
	.text
	.globl	_Z15cudaCalculationjjPfS_
	.type	_Z15cudaCalculationjjPfS_,@function
_Z15cudaCalculationjjPfS_:              # @_Z15cudaCalculationjjPfS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %rbx
	movq	%rdx, %r13
	movl	%edi, %r15d
	leal	1023(%r15), %r12d
	shrl	$10, %r12d
	movl	%esi, %r14d
	leaq	16(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	%r13, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	btsq	$32, %r12
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$1024, %rdx                     # imm = 0x400
	movq	%r12, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	%r15d, %edx
	callq	_Z31__device_stub__assignmentKernelPfS_i
.LBB2_2:
	callq	hipDeviceSynchronize
	leaq	40(%rsp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r15), %rax
	movq	8(%r15), %rcx
	subq	24(%rsp), %rax
	imulq	$1000000, %rax, %rax            # imm = 0xF4240
	subq	32(%rsp), %rcx
	addq	%rax, %rcx
	movabsq	$4835703278458516699, %rdx      # imm = 0x431BDE82D7B634DB
	movq	%rcx, %rax
	imulq	%rdx
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$18, %rdx
	addq	%rax, %rdx
	imulq	$1000000, %rdx, %rax            # imm = 0xF4240
	subq	%rax, %rcx
	cvtsi2sd	%rdx, %xmm0
	mulsd	.LCPI2_0(%rip), %xmm0
	cvtsi2sd	%rcx, %xmm1
	addsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %rax
	movq	%rax, %rcx
	subsd	.LCPI2_1(%rip), %xmm1
	cvttsd2si	%xmm1, %r15
	sarq	$63, %rcx
	andq	%rcx, %r15
	orq	%rax, %r15
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%r15, %rax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z15cudaCalculationjjPfS_, .Lfunc_end2-_Z15cudaCalculationjjPfS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z14cpuCalculationjPfS_
.LCPI3_0:
	.quad	0xc002666666666666              # double -2.2999999999999998
.LCPI3_1:
	.quad	0x4008000000000000              # double 3
.LCPI3_2:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI3_3:
	.quad	0x43e0000000000000              # double 9.2233720368547758E+18
	.text
	.globl	_Z14cpuCalculationjPfS_
	.type	_Z14cpuCalculationjPfS_,@function
_Z14cpuCalculationjPfS_:                # @_Z14cpuCalculationjPfS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movl	%edi, %ebp
	movq	%rsp, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	testl	%ebp, %ebp
	je	.LBB3_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebp, %r15d
	xorl	%r12d, %r12d
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r12,4), %xmm0
	movaps	%xmm0, %xmm1
	addsd	.LCPI3_0(%rip), %xmm1
	divsd	%xmm1, %xmm0
	movsd	.LCPI3_1(%rip), %xmm1           # xmm1 = mem[0],zero
	callq	pow
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbx,%r12,4)
	incq	%r12
	cmpq	%r12, %r15
	jne	.LBB3_2
.LBB3_3:                                # %._crit_edge
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%rbx), %rax
	movq	8(%rbx), %rcx
	subq	(%rsp), %rax
	imulq	$1000000, %rax, %rax            # imm = 0xF4240
	subq	8(%rsp), %rcx
	addq	%rax, %rcx
	movabsq	$4835703278458516699, %rdx      # imm = 0x431BDE82D7B634DB
	movq	%rcx, %rax
	imulq	%rdx
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$18, %rdx
	addq	%rax, %rdx
	imulq	$1000000, %rdx, %rax            # imm = 0xF4240
	subq	%rax, %rcx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rdx, %xmm0
	mulsd	.LCPI3_2(%rip), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rcx, %xmm1
	addsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %rcx
	movq	%rcx, %rdx
	subsd	.LCPI3_3(%rip), %xmm1
	cvttsd2si	%xmm1, %rax
	sarq	$63, %rdx
	andq	%rdx, %rax
	orq	%rcx, %rax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z14cpuCalculationjPfS_, .Lfunc_end3-_Z14cpuCalculationjPfS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z7areSamePfS_S_j
.LCPI4_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI4_1:
	.long	0x34000000                      # float 1.1920929E-7
	.text
	.globl	_Z7areSamePfS_S_j
	.type	_Z7areSamePfS_S_j,@function
_Z7areSamePfS_S_j:                      # @_Z7areSamePfS_S_j
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movb	$1, %bl
	testl	%ecx, %ecx
	je	.LBB4_8
# %bb.1:                                # %.lr.ph.preheader
	movss	(%rsi), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	movss	(%rdx), %xmm2                   # xmm2 = mem[0],zero,zero,zero
	movaps	%xmm1, %xmm3
	subss	%xmm2, %xmm3
	andps	.LCPI4_0(%rip), %xmm3
	movss	.LCPI4_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	ucomiss	%xmm3, %xmm0
	jbe	.LBB4_2
# %bb.3:                                # %.lr.ph44.preheader
	movl	%ecx, %ecx
	leaq	-1(%rcx), %r8
	xorl	%eax, %eax
	movaps	.LCPI4_0(%rip), %xmm3           # xmm3 = [NaN,NaN,NaN,NaN]
.LBB4_4:                                # %.lr.ph44
                                        # =>This Inner Loop Header: Depth=1
	cmpq	%rax, %r8
	je	.LBB4_8
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB4_4 Depth=1
	movss	4(%rsi,%rax,4), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movss	4(%rdx,%rax,4), %xmm2           # xmm2 = mem[0],zero,zero,zero
	movaps	%xmm1, %xmm4
	subss	%xmm2, %xmm4
	andps	%xmm3, %xmm4
	incq	%rax
	ucomiss	%xmm4, %xmm0
	ja	.LBB4_4
# %bb.6:                                # %.lr.ph._crit_edge.loopexit
	cmpq	%rcx, %rax
	setae	%bl
	jmp	.LBB4_7
.LBB4_2:
	xorl	%eax, %eax
	xorl	%ebx, %ebx
.LBB4_7:                                # %.lr.ph._crit_edge
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rdi,%rax,4), %xmm0
	cvtss2sd	%xmm1, %xmm1
	cvtss2sd	%xmm2, %xmm2
	movl	$.L.str, %edi
	movb	$3, %al
	callq	printf
.LBB4_8:                                # %.loopexit
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z7areSamePfS_S_j, .Lfunc_end4-_Z7areSamePfS_S_j
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI5_0:
	.long	0x3f800000                      # float 1
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI5_1:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI5_2:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI5_3:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$3013644, %edi                  # imm = 0x2DFC0C
	callq	malloc
	movq	%rax, %rbx
	movl	$3013644, %edi                  # imm = 0x2DFC0C
	callq	malloc
	movq	%rax, %r14
	movl	$3013644, %edi                  # imm = 0x2DFC0C
	callq	malloc
	movq	%rax, %r15
	xorl	%eax, %eax
	movss	.LCPI5_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
.LBB5_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, %ecx
	xorps	%xmm1, %xmm1
	cvtsi2ss	%rcx, %xmm1
	addss	%xmm0, %xmm1
	movss	%xmm1, (%rbx,%rax,4)
	incq	%rax
	cmpq	$753411, %rax                   # imm = 0xB7F03
	jne	.LBB5_1
# %bb.2:
	movl	$753411, %edi                   # imm = 0xB7F03
	movl	$3013644, %esi                  # imm = 0x2DFC0C
	movq	%rbx, %rdx
	movq	%r14, %rcx
	callq	_Z15cudaCalculationjjPfS_
	movq	%rax, %xmm1
	punpckldq	.LCPI5_1(%rip), %xmm1   # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
	subpd	.LCPI5_2(%rip), %xmm1
	movapd	%xmm1, %xmm0
	unpckhpd	%xmm1, %xmm0                    # xmm0 = xmm0[1],xmm1[1]
	addsd	%xmm1, %xmm0
	divsd	.LCPI5_3(%rip), %xmm0
	movl	$.L.str.1, %edi
	movq	%rax, %rsi
	movb	$1, %al
	callq	printf
	movl	$753411, %edi                   # imm = 0xB7F03
	movq	%rbx, %rsi
	movq	%r15, %rdx
	callq	_Z14cpuCalculationjPfS_
	movq	%rax, %xmm1
	punpckldq	.LCPI5_1(%rip), %xmm1   # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
	subpd	.LCPI5_2(%rip), %xmm1
	movapd	%xmm1, %xmm0
	unpckhpd	%xmm1, %xmm0                    # xmm0 = xmm0[1],xmm1[1]
	addsd	%xmm1, %xmm0
	divsd	.LCPI5_3(%rip), %xmm0
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	movb	$1, %al
	callq	printf
	movq	%rbx, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	$753411, %ecx                   # imm = 0xB7F03
	callq	_Z7areSamePfS_S_j
	testb	%al, %al
	je	.LBB5_4
# %bb.3:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB5_4:
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16assignmentKernelPfS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16assignmentKernelPfS_i,@object # @_Z16assignmentKernelPfS_i
	.section	.rodata,"a",@progbits
	.globl	_Z16assignmentKernelPfS_i
	.p2align	3, 0x0
_Z16assignmentKernelPfS_i:
	.quad	_Z31__device_stub__assignmentKernelPfS_i
	.size	_Z16assignmentKernelPfS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"INVALID:\nInput: %f\nCPU: %.15f\nGPU: %.15f\n"
	.size	.L.str, 42

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"CUDA took %d microseconds (%.2fms)\n"
	.size	.L.str.1, 36

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"CPU took %d microseconds (%.2fms)\n"
	.size	.L.str.2, 35

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16assignmentKernelPfS_i"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"VALID: CPU and GPU agreed on results."
	.size	.Lstr, 38

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__assignmentKernelPfS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16assignmentKernelPfS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16assignmentKernelPfS_i ; -- Begin function _Z16assignmentKernelPfS_i
	.globl	_Z16assignmentKernelPfS_i
	.p2align	8
	.type	_Z16assignmentKernelPfS_i,@function
_Z16assignmentKernelPfS_i:              ; @_Z16assignmentKernelPfS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s4, 0x968915a9
	s_mov_b32 s6, 0x4222de17
	s_mov_b32 s5, 0x3fba6564
	s_mov_b32 s7, 0x3fbdee67
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v1, vcc_lo
	s_mov_b32 s0, 0x66666666
	s_mov_b32 s1, 0xc0026666
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[3:4], v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[3:4], s[0:1]
	s_mov_b32 s1, 0x3fe55555
	s_mov_b32 s0, 0x55555555
	v_div_scale_f64 v[7:8], null, v[5:6], v[5:6], v[3:4]
	v_div_scale_f64 v[13:14], vcc_lo, v[3:4], v[5:6], v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[9:10], v[7:8]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[11:12], v[13:14], v[9:10]
	v_fma_f64 v[7:8], -v[7:8], v[11:12], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[7:8], v[7:8], v[9:10], v[11:12]
	v_div_fixup_f64 v[3:4], v[7:8], v[5:6], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e64 v[5:6], |v[3:4]|
	v_cmp_gt_f64_e32 vcc_lo, s[0:1], v[5:6]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[5:6], v[5:6], v7
	v_add_f64 v[7:8], v[5:6], 1.0
	v_add_f64 v[13:14], v[5:6], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[9:10], v[7:8]
	v_add_f64 v[15:16], v[7:8], -1.0
	v_add_f64 v[5:6], v[5:6], -v[15:16]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[11:12], v[9:10], v[9:10]
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[11:12], v[9:10], v[9:10]
	v_mul_f64 v[11:12], v[13:14], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[17:18], v[7:8], v[11:12]
	v_fma_f64 v[7:8], v[11:12], v[7:8], -v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], v[11:12], v[5:6], v[7:8]
	v_add_f64 v[7:8], v[17:18], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[13:14], -v[7:8]
	v_add_f64 v[17:18], v[7:8], -v[17:18]
	v_add_f64 v[13:14], v[13:14], -v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[17:18], -v[5:6]
	v_add_f64 v[7:8], v[13:14], -v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_add_f64 v[5:6], v[15:16], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[5:6], v[9:10], v[5:6]
	v_add_f64 v[7:8], v[11:12], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[7:8], -v[11:12]
	v_mul_f64 v[11:12], v[7:8], v[7:8]
	v_add_f64 v[5:6], v[5:6], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[9:10], v[7:8], v[7:8], -v[11:12]
	v_add_f64 v[13:14], v[5:6], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[7:8], v[13:14], v[9:10]
	v_add_f64 v[13:14], v[11:12], v[9:10]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[15:16], v[13:14], s[6:7], s[4:5]
	s_mov_b32 s4, 0x3abe935a
	s_mov_b32 s5, 0x3fbe25e4
	v_add_f64 v[11:12], v[13:14], -v[11:12]
	v_mul_f64 v[21:22], v[7:8], v[13:14]
	s_mov_b32 s6, 0x652b82fe
	s_mov_b32 s7, 0x3ff71547
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[4:5]
	s_mov_b32 s4, 0x47e6c9c2
	s_mov_b32 s5, 0x3fc110ef
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[4:5]
	s_mov_b32 s4, 0xcfa74449
	s_mov_b32 s5, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[4:5]
	s_mov_b32 s4, 0x71bf3c30
	s_mov_b32 s5, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[4:5]
	s_mov_b32 s4, 0x1c7792ce
	s_mov_b32 s5, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[4:5]
	s_mov_b32 s4, 0x924920da
	s_mov_b32 s5, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[4:5]
	s_mov_b32 s4, 0x9999999c
	s_mov_b32 s5, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[4:5]
	s_mov_b32 s5, 0x3c7abc9e
	s_mov_b32 s4, 0x3b39803f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[17:18], v[13:14], v[15:16]
	v_fma_f64 v[11:12], v[13:14], v[15:16], -v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[9:10], v[15:16], v[11:12]
	v_add_f64 v[15:16], v[17:18], v[11:12]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[19:20], v[15:16], s[0:1]
	v_add_f64 v[17:18], v[15:16], -v[17:18]
	s_mov_b32 s1, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[23:24], v[19:20], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[11:12], -v[17:18]
	v_fma_f64 v[17:18], v[13:14], v[7:8], -v[21:22]
	s_mov_b32 s0, 0xd5df274d
	s_mov_b32 s1, 0x3c8543b0
	v_add_f64 v[15:16], v[15:16], -v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[11:12], s[0:1]
	v_fma_f64 v[13:14], v[13:14], v[5:6], v[17:18]
	s_mov_b32 s1, 0x3fe62e42
	s_mov_b32 s0, 0xfefa39ef
	v_ldexp_f64 v[5:6], v[5:6], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[11:12], v[15:16]
	v_fma_f64 v[9:10], v[9:10], v[7:8], v[13:14]
	v_ldexp_f64 v[7:8], v[7:8], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[13:14], v[19:20], v[11:12]
	v_add_f64 v[15:16], v[21:22], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[19:20], -v[13:14]
	v_mul_f64 v[19:20], v[15:16], v[13:14]
	v_add_f64 v[21:22], v[15:16], -v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[11:12], v[17:18]
	v_fma_f64 v[17:18], v[15:16], v[13:14], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], -v[21:22]
	v_fma_f64 v[11:12], v[15:16], v[11:12], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[9:10], v[9:10], v[13:14], v[11:12]
	v_frexp_exp_i32_f64_e32 v13, v[3:4]
	v_add_f64 v[11:12], v[19:20], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 1.0, v[3:4]
	v_cvt_f64_i32_e32 v[13:14], v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[15:16], v[7:8], v[11:12]
	v_add_f64 v[17:18], v[11:12], -v[19:20]
	v_mul_f64 v[19:20], v[13:14], s[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[7:8], v[15:16], -v[7:8]
	v_add_f64 v[9:10], v[9:10], -v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[17:18], v[13:14], s[0:1], -v[19:20]
	s_mov_b32 s1, 0xbfe62e42
	v_add_f64 v[7:8], v[11:12], -v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[5:6], v[9:10]
	v_fma_f64 v[9:10], v[13:14], s[4:5], v[17:18]
	s_mov_b32 s5, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_add_f64 v[7:8], v[19:20], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[15:16], v[5:6]
	v_add_f64 v[19:20], v[7:8], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[13:14], v[7:8], v[11:12]
	v_add_f64 v[15:16], v[11:12], -v[15:16]
	v_add_f64 v[9:10], v[9:10], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[17:18], v[13:14], -v[7:8]
	v_add_f64 v[5:6], v[5:6], -v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[21:22], v[13:14], -v[17:18]
	v_add_f64 v[11:12], v[11:12], -v[17:18]
	v_add_f64 v[15:16], v[9:10], v[5:6]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[21:22]
	v_add_f64 v[7:8], v[11:12], v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[15:16], -v[9:10]
	v_add_f64 v[7:8], v[15:16], v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[15:16], v[15:16], -v[11:12]
	v_add_f64 v[5:6], v[5:6], -v[11:12]
	v_add_f64 v[17:18], v[13:14], v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], -v[15:16]
	v_add_f64 v[11:12], v[17:18], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], v[9:10]
	v_dual_mov_b32 v10, 0x3ff00000 :: v_dual_mov_b32 v9, v2
	v_cndmask_b32_e32 v10, 0x40080000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[11:12]
	v_add_f64 v[5:6], v[5:6], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[17:18], v[5:6]
	v_add_f64 v[11:12], v[7:8], -v[17:18]
	v_mul_f64 v[13:14], v[9:10], v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], -v[11:12]
	v_fma_f64 v[7:8], v[9:10], v[7:8], -v[13:14]
	v_cmp_class_f64_e64 vcc_lo, v[13:14], 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], v[9:10], v[5:6], v[7:8]
	v_add_f64 v[7:8], v[13:14], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v12, v8, v14 :: v_dual_cndmask_b32 v11, v7, v13
	v_add_f64 v[7:8], v[7:8], -v[13:14]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[11:12]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	v_trunc_f64_e32 v[7:8], v[9:10]
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	v_mul_f64 v[15:16], v[11:12], s[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[15:16], v[15:16]
	v_fma_f64 v[17:18], v[15:16], s[0:1], v[11:12]
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	v_cvt_i32_f64_e32 v2, v[15:16]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[17:18], v[15:16], s[4:5], v[17:18]
	s_mov_b32 s4, 0x6a5dcb37
	s_mov_b32 s5, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[19:20], v[17:18], s[4:5], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_class_f64_e64 s4, v[3:4], 0x204
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[19:20], v[17:18], v[19:20], s[0:1]
	v_cmp_nlt_f64_e64 s0, 0x40900000, v[11:12]
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[19:20], v[17:18], v[19:20], 1.0
	v_fma_f64 v[15:16], v[17:18], v[19:20], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[13:14], v[15:16], v2
	v_mul_f64 v[15:16], v[9:10], 0.5
	v_cndmask_b32_e32 v6, 0, v6, vcc_lo
	s_and_b32 vcc_lo, s1, s0
	v_cndmask_b32_e32 v13, 0, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_trunc_f64_e32 v[11:12], v[15:16]
	v_cndmask_b32_e64 v2, 0x7ff00000, v14, s0
	v_cmp_eq_f64_e32 vcc_lo, v[7:8], v[9:10]
	v_cndmask_b32_e64 v14, 0, v2, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[5:6], v[13:14], v[5:6], v[13:14]
	v_cmp_class_f64_e64 s1, v[13:14], 0x204
	v_cmp_neq_f64_e64 s0, v[11:12], v[15:16]
	v_cndmask_b32_e64 v6, v6, v14, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v5, v5, v13, s1
	v_cmp_eq_f64_e64 s1, 0, v[3:4]
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v2, 0x3ff00000, v4, s0
	v_cndmask_b32_e64 v9, 0, v4, s0
	v_bfi_b32 v2, 0x7fffffff, v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v6, 0x7ff80000, v2, vcc_lo
	v_cndmask_b32_e32 v7, 0, v5, vcc_lo
	v_cmp_gt_f64_e32 vcc_lo, 0, v[3:4]
	v_cndmask_b32_e64 v8, 0x7ff00000, 0, s1
	v_bfi_b32 v8, 0x7fffffff, v8, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v2, v2, v6 :: v_dual_cndmask_b32 v5, v5, v7
	s_or_b32 vcc_lo, s1, s4
	v_cndmask_b32_e32 v6, v2, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v2, v5, 0, vcc_lo
	v_cmp_o_f64_e32 vcc_lo, v[3:4], v[3:4]
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v3, 0x7ff80000, v6, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_cvt_f32_f64_e32 v2, v[2:3]
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16assignmentKernelPfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16assignmentKernelPfS_i, .Lfunc_end0-_Z16assignmentKernelPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2356
; NumSgprs: 18
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16assignmentKernelPfS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16assignmentKernelPfS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     25
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
