


#include <stdio.h>
#include <math.h>



///////////////////////////////// DEVICE FUNCTIONS  /////////////////////////////////


__device__ void _bicubicCoeff(float* alpha, float* psi, int pitch, int i, int j);
__device__ void _newtonStep(float* A, float& x, float& y, float& error, int xi, int yi);

__device__ int sgn(float val) {
    return ((0.0 < val) ? 1 : -1 );
}

///////////////////////////////// GLOBAL GPU FUNCTIONS  /////////////////////////////////


// Determines which voxels are active. 
// Gets coefficients for interpolating polynomial for each active voxel.
__global__ void getVoxels(float* psi, int pitch, int* voxelList, float* alphaList, int Nx, int Ny)
{
	int row = blockDim.x*blockIdx.x + threadIdx.x;
	int col = blockDim.y*blockIdx.y + threadIdx.y;

	if (row<Nx-1 && col<Ny-1)
	{
		int idx = row * pitch + col;
		int pairity = sgn(psi[idx]) + sgn(psi[idx+pitch]) + sgn(psi[idx+pitch+1]) + sgn(psi[idx+1]);

		if (-3<pairity && pairity<3)
		{
			int old = atomicAdd(voxelList,1);
			*(voxelList + old + 1) = idx;

			_bicubicCoeff(alphaList+16*old, psi, pitch, row, col);
		}

	}
}

__global__ void reinitPhi(float* phi, int pitch, float* psi, int* voxelList, float* alphaList, 
						int Nx, int Ny, float dx, float thres)
{

    int row = blockDim.x*blockIdx.x + threadIdx.x;
    int col = blockDim.y*blockIdx.y + threadIdx.y;

    if (row<Nx && col<Ny)
    {

		float* alpha;
		int idx, r ,c;

		float minDist = 7770000.0; //for error checking
		float xO, yO;
		float error;		

		for(int k = 0; k < voxelList[0]; ++k)
		{
		   idx = voxelList[k+1];
		   alpha = alphaList + 16*k;

		   r = idx/pitch;
		   c = idx%pitch;
		   xO = .5;
		   yO = .5;
		   bool inVoxel = true;

		   do
		   {
			   _newtonStep(alpha, xO, yO, error, row-r, col-c);
			   inVoxel =  (yO>=-0.1f) && (yO<=1.1f) && (xO>=-0.1f) && (xO<=1.1f);
			   
			   
		   } while (error>thres && inVoxel);

		   if (inVoxel){
			float xdist = (row-r-xO);
			float ydist = (col-c-yO);
			minDist = min(minDist, dx*sqrt(ydist*ydist + xdist*xdist));
		   }

			   
		}
		
//		if (minDist>100){
//			printf("\nWHAT IS UP HERE? err=%3.3f, (x,y)=(%2.2f,%2.2f)  [r,c]=%d,%d\n", error, xO,yO,row,col );
//		}

		phi[row*pitch+col] = sgn(psi[row*pitch+col]) * minDist;		

    
	}

}

///////////////////////////////// DEVICE FUNCTION IMPLEMENTATIONS /////////////////////////////////

__device__ void _bicubicCoeff(float* alpha, float* psi, int pitch, int i, int j)
{
	int idx = i*pitch + j;

	float    f00,   f10,   f01,   f11;
	float   fx00,  fx10,  fx01,  fx11;
	float   fy00,  fy10,  fy01,  fy11;
	float  fxy00, fxy10, fxy01, fxy11;

	//f00 = psi[idx];
	//f01 = psi[idx+pitch];//psi[idx+1];
	//f10 = psi[idx+1];//psi[idx+N];
	//f11 = psi[idx+pitch+1];//psi[idx+N+1];

	//fy00 = (psi[idx+pitch]-psi[idx-pitch])/2.0;//(psi[idx+1]-psi[idx-1])/2.0;
	//fy01 = (psi[idx+2*pitch]-psi[idx])/2.0;//(psi[idx+2]-psi[idx])/2.0;
	//fy10 = (psi[idx+pitch+1]-psi[idx-pitch+1])/2.0;//(psi[idx+N+1]-psi[idx+N-1])/2.0;
	//fy11 = (psi[idx+2*pitch+1]-psi[idx+1])/2.0;//(psi[idx+N+2]-psi[idx+N])/2.0;

	//fx00 = (psi[idx+1]-psi[idx-1])/2.0;//(psi[idx+N]-psi[idx-N])/2.0;
	//fx01 = (psi[idx+pitch+1]-psi[idx+pitch-1])/2.0;//(psi[idx+N+1]-psi[idx-N+1])/2.0;
	//fx10 = (psi[idx+2]-psi[idx])/2.0;//(psi[idx+2*N]-psi[idx])/2.0;
	//fx11 = (psi[idx+pitch+2]-psi[idx+pitch])/2.0;//(psi[idx+2*N+1]-psi[idx+1])/2.0;

	//fxy00 = (psi[idx+pitch+1]-psi[idx+pitch-1]-psi[idx-pitch+1]+psi[idx-pitch-1])/4.0;
	//fxy01 = (psi[idx+2*pitch+1]-psi[idx+2*pitch-1]-psi[idx+1]+psi[idx-1])/4.0;
	//fxy10 = (psi[idx+pitch+2]-psi[idx+pitch]-psi[idx-pitch+2]+psi[idx-pitch])/4.0;
	//fxy11 = (psi[idx+2*pitch+2]-psi[idx+2*pitch]-psi[idx+2]+psi[idx])/4.0;



	f00 = psi[idx];
	f01 = psi[idx+1];
	f10 = psi[idx+pitch];
	f11 = psi[idx+pitch+1];

	fy00 = (psi[idx+1]-psi[idx-1])/2.0;
	fy01 = (psi[idx+2]-psi[idx])/2.0;
	fy10 = (psi[idx+pitch+1]-psi[idx+pitch-1])/2.0;
	fy11 = (psi[idx+pitch+2]-psi[idx+pitch])/2.0;

	fx00 = (psi[idx+pitch]-psi[idx-pitch])/2.0;
	fx01 = (psi[idx+pitch+1]-psi[idx-pitch+1])/2.0;
	fx10 = (psi[idx+2*pitch]-psi[idx])/2.0;
	fx11 = (psi[idx+2*pitch+1]-psi[idx+1])/2.0;

	fxy00 = (psi[idx+pitch+1]-psi[idx+1-pitch]-psi[idx-1+pitch]+psi[idx-pitch-1])/4.0;
	fxy01 = (psi[idx+pitch+2]-psi[idx-pitch+2]-psi[idx+pitch]+psi[idx-pitch])/4.0;
	fxy10 = (psi[idx+2*pitch+1]-psi[idx+1]-psi[idx+2*pitch-1]+psi[idx-1])/4.0;
	fxy11 = (psi[idx+2*pitch+2]-psi[idx+2]-psi[idx+2*pitch]+psi[idx])/4.0;


	alpha[0] = f00;
	alpha[1] = fy00;
	alpha[2] = -3*f00 + 3*f01 - 2*fy00 - fy01;
	alpha[3] =  2*f00 - 2*f01 + fy00 + fy01;
	alpha[4] = fx00;
	alpha[5] = fxy00;
	alpha[6] = -3*fx00 + 3*fx01 - 2*fxy00 - fxy10;
	alpha[7] =  2*fx00 - 2*fx01 + fxy00 + fxy01;
	alpha[8] = -3*f00 + 3*f10 - 2*fx00 - fx10;
	alpha[9] = -3*fy00 + 3*fy10 - 2*fxy00 -fxy10;
	alpha[10] = 9*f00 -9*f01 -9*f10 +9*f11 +6*fy00 +3*fy01 -6*fy10 -3*fy11 
			   +6*fx00 -6*fx01 +3*fx10 -3*fx11 +4*fxy00 +2*fxy01 +2*fxy10 + fxy11;
	alpha[11] = -6*f00 +6*f01 +6*f10 -6*f11 -3*fy00 -3*fy01 +3*fy10 +3*fy11 
			    -4*fx00 +4*fx01 -2*fx10 +2*fx11 -2*fxy00 -2*fxy01 - fxy10 - fxy11;
	alpha[12] = 2*f00 - 2*f10 + fx00 + fx10;
	alpha[13] = 2*fy00 - 2*fy10 + fxy00 + fxy10;
	alpha[14] = -6*f00 +6*f01 +6*f10 -6*f11 -4*fy00 -2*fy01 +4*fy10 +2*fy11 
			    -3*fx00 +3*fx01 -3*fx10 +3*fx11 -2*fxy00 -fxy01 -2*fxy10 - fxy11;
	alpha[15] = 4*f00 -4*f01 -4*f10 +4*f11 +2*fy00 +2*fy01 -2*fy10 -2*fy11 
			    +2*fx00 -2*fx01 +2*fx10 -2*fx11 + fxy00 + fxy01 + fxy10 + fxy11;


}//_bicubicCoeff


__device__ void _newtonStep(float* A, float& x, float& y, float& error, int xi, int yi)
{
	float p, px, py, pxx, pyy, pxy;
	float d1, d2, d3, D;

	float y2 = y*y;
	float y3 = y2*y;
	float x2 = x*x;
	float x3 = x2*x;

	p =    A[0]  + A[1]*y  + A[2]*y2  + A[3]*y3
		+ (A[4]  + A[5]*y  + A[6]*y2  + A[7]*y3)*x
		+ (A[8]  + A[9]*y  + A[10]*y2 + A[11]*y3)*x2
		+ (A[12] + A[13]*y + A[14]*y2 + A[15]*y3)*x3;

	py =   A[1]  + 2*A[2]*y  + 3*A[3]*y2
		+ (A[5]  + 2*A[6]*y  + 3*A[7]*y2)*x
		+ (A[9]  + 2*A[10]*y + 3*A[11]*y2)*x2
		+ (A[13] + 2*A[14]*y + 3*A[15]*y2)*x3;

	px =   A[4] + 2*A[8]*x  + 3*A[12]*x2 
		+ (A[5] + 2*A[9]*x  + 3*A[13]*x2)*y
		+ (A[6] + 2*A[10]*x + 3*A[14]*x2)*y2
		+ (A[7] + 2*A[11]*x + 3*A[15]*x2)*y3;	

	pyy = 2*A[2] + 6*A[3]*y + (2*A[6]  + 6*A[7]*y)*x 
			   				+ (2*A[10] + 6*A[11]*y)*x2 
			   				+ (2*A[14] + 6*A[15]*y)*x3;

	pxx = 2*A[8] + 6*A[12]*x + (2*A[9]  + 6*A[13]*x)*y
							 + (2*A[10] + 6*A[14]*x)*y2  
							 + (2*A[11] + 6*A[15]*x)*y3;

	pxy =  A[5]  + 2*A[6]*y  + 3*A[7]*y2 +
	 	  (A[9]  + 2*A[10]*y + 3*A[11]*y2)*2*x +
		  (A[13] + 2*A[14]*y + 3*A[15]*y2)*3*x2;

	d1 =  py*(x-xi) -  px*(y-yi);
	d2 = pyy*(x-xi) - pxy*(y-yi) - px;
	d3 = pxy*(x-xi) - pxx*(y-yi) + py ;
	D  = py*d3 - px*d2;

	error = p*p + d1*d1;

	y -= ( p*d3  - px*d1) / D;
	x -= ( py*d1 - p*d2 ) / D;

}//_newtonStep



	.file	"tmpxft_002466be_00000000-6_VoxelsFM_Kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z3sgnf
	.type	_Z3sgnf, @function
_Z3sgnf:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z3sgnf, .-_Z3sgnf
	.globl	_Z13_bicubicCoeffPfS_iii
	.type	_Z13_bicubicCoeffPfS_iii, @function
_Z13_bicubicCoeffPfS_iii:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z13_bicubicCoeffPfS_iii, .-_Z13_bicubicCoeffPfS_iii
	.globl	_Z11_newtonStepPfRfS0_S0_ii
	.type	_Z11_newtonStepPfRfS0_S0_ii, @function
_Z11_newtonStepPfRfS0_S0_ii:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z11_newtonStepPfRfS0_S0_ii, .-_Z11_newtonStepPfRfS0_S0_ii
	.globl	_Z35__device_stub__Z9getVoxelsPfiPiS_iiPfiPiS_ii
	.type	_Z35__device_stub__Z9getVoxelsPfiPiS_iiPfiPiS_ii, @function
_Z35__device_stub__Z9getVoxelsPfiPiS_iiPfiPiS_ii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 36(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 32(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z9getVoxelsPfiPiS_ii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L8:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z35__device_stub__Z9getVoxelsPfiPiS_iiPfiPiS_ii, .-_Z35__device_stub__Z9getVoxelsPfiPiS_iiPfiPiS_ii
	.globl	_Z9getVoxelsPfiPiS_ii
	.type	_Z9getVoxelsPfiPiS_ii, @function
_Z9getVoxelsPfiPiS_ii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z9getVoxelsPfiPiS_iiPfiPiS_ii
	.cfi_endproc
.LFE2055:
	.size	_Z9getVoxelsPfiPiS_ii, .-_Z9getVoxelsPfiPiS_ii
	.globl	_Z39__device_stub__Z9reinitPhiPfiS_PiS_iiffPfiS_PiS_iiff
	.type	_Z39__device_stub__Z9reinitPhiPfiS_PiS_iiffPfiS_PiS_iiff, @function
_Z39__device_stub__Z9reinitPhiPfiS_PiS_iiffPfiS_PiS_iiff:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 36(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 32(%rsp)
	movss	%xmm0, 4(%rsp)
	movss	%xmm1, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	%rsp, %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	56(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z9reinitPhiPfiS_PiS_iiff(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L14:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z39__device_stub__Z9reinitPhiPfiS_PiS_iiffPfiS_PiS_iiff, .-_Z39__device_stub__Z9reinitPhiPfiS_PiS_iiffPfiS_PiS_iiff
	.globl	_Z9reinitPhiPfiS_PiS_iiff
	.type	_Z9reinitPhiPfiS_PiS_iiff, @function
_Z9reinitPhiPfiS_PiS_iiff:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z9reinitPhiPfiS_PiS_iiffPfiS_PiS_iiff
	.cfi_endproc
.LFE2057:
	.size	_Z9reinitPhiPfiS_PiS_iiff, .-_Z9reinitPhiPfiS_PiS_iiff
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z9reinitPhiPfiS_PiS_iiff"
.LC1:
	.string	"_Z9getVoxelsPfiPiS_ii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9reinitPhiPfiS_PiS_iiff(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9getVoxelsPfiPiS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:





#include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>



///////////////////////////////// DEVICE FUNCTIONS  /////////////////////////////////


__device__ void _bicubicCoeff(float* alpha, float* psi, int pitch, int i, int j);
__device__ void _newtonStep(float* A, float& x, float& y, float& error, int xi, int yi);

__device__ int sgn(float val) {
    return ((0.0 < val) ? 1 : -1 );
}

///////////////////////////////// GLOBAL GPU FUNCTIONS  /////////////////////////////////


// Determines which voxels are active. 
// Gets coefficients for interpolating polynomial for each active voxel.
__global__ void getVoxels(float* psi, int pitch, int* voxelList, float* alphaList, int Nx, int Ny)
{
	int row = blockDim.x*blockIdx.x + threadIdx.x;
	int col = blockDim.y*blockIdx.y + threadIdx.y;

	if (row<Nx-1 && col<Ny-1)
	{
		int idx = row * pitch + col;
		int pairity = sgn(psi[idx]) + sgn(psi[idx+pitch]) + sgn(psi[idx+pitch+1]) + sgn(psi[idx+1]);

		if (-3<pairity && pairity<3)
		{
			int old = atomicAdd(voxelList,1);
			*(voxelList + old + 1) = idx;

			_bicubicCoeff(alphaList+16*old, psi, pitch, row, col);
		}

	}
}

__global__ void reinitPhi(float* phi, int pitch, float* psi, int* voxelList, float* alphaList, 
						int Nx, int Ny, float dx, float thres)
{

    int row = blockDim.x*blockIdx.x + threadIdx.x;
    int col = blockDim.y*blockIdx.y + threadIdx.y;

    if (row<Nx && col<Ny)
    {

		float* alpha;
		int idx, r ,c;

		float minDist = 7770000.0; //for error checking
		float xO, yO;
		float error;		

		for(int k = 0; k < voxelList[0]; ++k)
		{
		   idx = voxelList[k+1];
		   alpha = alphaList + 16*k;

		   r = idx/pitch;
		   c = idx%pitch;
		   xO = .5;
		   yO = .5;
		   bool inVoxel = true;

		   do
		   {
			   _newtonStep(alpha, xO, yO, error, row-r, col-c);
			   inVoxel =  (yO>=-0.1f) && (yO<=1.1f) && (xO>=-0.1f) && (xO<=1.1f);
			   
			   
		   } while (error>thres && inVoxel);

		   if (inVoxel){
			float xdist = (row-r-xO);
			float ydist = (col-c-yO);
			minDist = min(minDist, dx*sqrt(ydist*ydist + xdist*xdist));
		   }

			   
		}
		
//		if (minDist>100){
//			printf("\nWHAT IS UP HERE? err=%3.3f, (x,y)=(%2.2f,%2.2f)  [r,c]=%d,%d\n", error, xO,yO,row,col );
//		}

		phi[row*pitch+col] = sgn(psi[row*pitch+col]) * minDist;		

    
	}

}

///////////////////////////////// DEVICE FUNCTION IMPLEMENTATIONS /////////////////////////////////

__device__ void _bicubicCoeff(float* alpha, float* psi, int pitch, int i, int j)
{
	int idx = i*pitch + j;

	float    f00,   f10,   f01,   f11;
	float   fx00,  fx10,  fx01,  fx11;
	float   fy00,  fy10,  fy01,  fy11;
	float  fxy00, fxy10, fxy01, fxy11;

	//f00 = psi[idx];
	//f01 = psi[idx+pitch];//psi[idx+1];
	//f10 = psi[idx+1];//psi[idx+N];
	//f11 = psi[idx+pitch+1];//psi[idx+N+1];

	//fy00 = (psi[idx+pitch]-psi[idx-pitch])/2.0;//(psi[idx+1]-psi[idx-1])/2.0;
	//fy01 = (psi[idx+2*pitch]-psi[idx])/2.0;//(psi[idx+2]-psi[idx])/2.0;
	//fy10 = (psi[idx+pitch+1]-psi[idx-pitch+1])/2.0;//(psi[idx+N+1]-psi[idx+N-1])/2.0;
	//fy11 = (psi[idx+2*pitch+1]-psi[idx+1])/2.0;//(psi[idx+N+2]-psi[idx+N])/2.0;

	//fx00 = (psi[idx+1]-psi[idx-1])/2.0;//(psi[idx+N]-psi[idx-N])/2.0;
	//fx01 = (psi[idx+pitch+1]-psi[idx+pitch-1])/2.0;//(psi[idx+N+1]-psi[idx-N+1])/2.0;
	//fx10 = (psi[idx+2]-psi[idx])/2.0;//(psi[idx+2*N]-psi[idx])/2.0;
	//fx11 = (psi[idx+pitch+2]-psi[idx+pitch])/2.0;//(psi[idx+2*N+1]-psi[idx+1])/2.0;

	//fxy00 = (psi[idx+pitch+1]-psi[idx+pitch-1]-psi[idx-pitch+1]+psi[idx-pitch-1])/4.0;
	//fxy01 = (psi[idx+2*pitch+1]-psi[idx+2*pitch-1]-psi[idx+1]+psi[idx-1])/4.0;
	//fxy10 = (psi[idx+pitch+2]-psi[idx+pitch]-psi[idx-pitch+2]+psi[idx-pitch])/4.0;
	//fxy11 = (psi[idx+2*pitch+2]-psi[idx+2*pitch]-psi[idx+2]+psi[idx])/4.0;



	f00 = psi[idx];
	f01 = psi[idx+1];
	f10 = psi[idx+pitch];
	f11 = psi[idx+pitch+1];

	fy00 = (psi[idx+1]-psi[idx-1])/2.0;
	fy01 = (psi[idx+2]-psi[idx])/2.0;
	fy10 = (psi[idx+pitch+1]-psi[idx+pitch-1])/2.0;
	fy11 = (psi[idx+pitch+2]-psi[idx+pitch])/2.0;

	fx00 = (psi[idx+pitch]-psi[idx-pitch])/2.0;
	fx01 = (psi[idx+pitch+1]-psi[idx-pitch+1])/2.0;
	fx10 = (psi[idx+2*pitch]-psi[idx])/2.0;
	fx11 = (psi[idx+2*pitch+1]-psi[idx+1])/2.0;

	fxy00 = (psi[idx+pitch+1]-psi[idx+1-pitch]-psi[idx-1+pitch]+psi[idx-pitch-1])/4.0;
	fxy01 = (psi[idx+pitch+2]-psi[idx-pitch+2]-psi[idx+pitch]+psi[idx-pitch])/4.0;
	fxy10 = (psi[idx+2*pitch+1]-psi[idx+1]-psi[idx+2*pitch-1]+psi[idx-1])/4.0;
	fxy11 = (psi[idx+2*pitch+2]-psi[idx+2]-psi[idx+2*pitch]+psi[idx])/4.0;


	alpha[0] = f00;
	alpha[1] = fy00;
	alpha[2] = -3*f00 + 3*f01 - 2*fy00 - fy01;
	alpha[3] =  2*f00 - 2*f01 + fy00 + fy01;
	alpha[4] = fx00;
	alpha[5] = fxy00;
	alpha[6] = -3*fx00 + 3*fx01 - 2*fxy00 - fxy10;
	alpha[7] =  2*fx00 - 2*fx01 + fxy00 + fxy01;
	alpha[8] = -3*f00 + 3*f10 - 2*fx00 - fx10;
	alpha[9] = -3*fy00 + 3*fy10 - 2*fxy00 -fxy10;
	alpha[10] = 9*f00 -9*f01 -9*f10 +9*f11 +6*fy00 +3*fy01 -6*fy10 -3*fy11 
			   +6*fx00 -6*fx01 +3*fx10 -3*fx11 +4*fxy00 +2*fxy01 +2*fxy10 + fxy11;
	alpha[11] = -6*f00 +6*f01 +6*f10 -6*f11 -3*fy00 -3*fy01 +3*fy10 +3*fy11 
			    -4*fx00 +4*fx01 -2*fx10 +2*fx11 -2*fxy00 -2*fxy01 - fxy10 - fxy11;
	alpha[12] = 2*f00 - 2*f10 + fx00 + fx10;
	alpha[13] = 2*fy00 - 2*fy10 + fxy00 + fxy10;
	alpha[14] = -6*f00 +6*f01 +6*f10 -6*f11 -4*fy00 -2*fy01 +4*fy10 +2*fy11 
			    -3*fx00 +3*fx01 -3*fx10 +3*fx11 -2*fxy00 -fxy01 -2*fxy10 - fxy11;
	alpha[15] = 4*f00 -4*f01 -4*f10 +4*f11 +2*fy00 +2*fy01 -2*fy10 -2*fy11 
			    +2*fx00 -2*fx01 +2*fx10 -2*fx11 + fxy00 + fxy01 + fxy10 + fxy11;


}//_bicubicCoeff


__device__ void _newtonStep(float* A, float& x, float& y, float& error, int xi, int yi)
{
	float p, px, py, pxx, pyy, pxy;
	float d1, d2, d3, D;

	float y2 = y*y;
	float y3 = y2*y;
	float x2 = x*x;
	float x3 = x2*x;

	p =    A[0]  + A[1]*y  + A[2]*y2  + A[3]*y3
		+ (A[4]  + A[5]*y  + A[6]*y2  + A[7]*y3)*x
		+ (A[8]  + A[9]*y  + A[10]*y2 + A[11]*y3)*x2
		+ (A[12] + A[13]*y + A[14]*y2 + A[15]*y3)*x3;

	py =   A[1]  + 2*A[2]*y  + 3*A[3]*y2
		+ (A[5]  + 2*A[6]*y  + 3*A[7]*y2)*x
		+ (A[9]  + 2*A[10]*y + 3*A[11]*y2)*x2
		+ (A[13] + 2*A[14]*y + 3*A[15]*y2)*x3;

	px =   A[4] + 2*A[8]*x  + 3*A[12]*x2 
		+ (A[5] + 2*A[9]*x  + 3*A[13]*x2)*y
		+ (A[6] + 2*A[10]*x + 3*A[14]*x2)*y2
		+ (A[7] + 2*A[11]*x + 3*A[15]*x2)*y3;	

	pyy = 2*A[2] + 6*A[3]*y + (2*A[6]  + 6*A[7]*y)*x 
			   				+ (2*A[10] + 6*A[11]*y)*x2 
			   				+ (2*A[14] + 6*A[15]*y)*x3;

	pxx = 2*A[8] + 6*A[12]*x + (2*A[9]  + 6*A[13]*x)*y
							 + (2*A[10] + 6*A[14]*x)*y2  
							 + (2*A[11] + 6*A[15]*x)*y3;

	pxy =  A[5]  + 2*A[6]*y  + 3*A[7]*y2 +
	 	  (A[9]  + 2*A[10]*y + 3*A[11]*y2)*2*x +
		  (A[13] + 2*A[14]*y + 3*A[15]*y2)*3*x2;

	d1 =  py*(x-xi) -  px*(y-yi);
	d2 = pyy*(x-xi) - pxy*(y-yi) - px;
	d3 = pxy*(x-xi) - pxx*(y-yi) + py ;
	D  = py*d3 - px*d2;

	error = p*p + d1*d1;

	y -= ( p*d3  - px*d1) / D;
	x -= ( py*d1 - p*d2 ) / D;

}//_newtonStep



	.text
	.file	"VoxelsFM_Kernel.hip"
	.globl	_Z24__device_stub__getVoxelsPfiPiS_ii # -- Begin function _Z24__device_stub__getVoxelsPfiPiS_ii
	.type	_Z24__device_stub__getVoxelsPfiPiS_ii,@function
_Z24__device_stub__getVoxelsPfiPiS_ii:  # @_Z24__device_stub__getVoxelsPfiPiS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9getVoxelsPfiPiS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__getVoxelsPfiPiS_ii, .Lfunc_end0-_Z24__device_stub__getVoxelsPfiPiS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__reinitPhiPfiS_PiS_iiff # -- Begin function _Z24__device_stub__reinitPhiPfiS_PiS_iiff
	.type	_Z24__device_stub__reinitPhiPfiS_PiS_iiff,@function
_Z24__device_stub__reinitPhiPfiS_PiS_iiff: # @_Z24__device_stub__reinitPhiPfiS_PiS_iiff
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	4(%rsp), %r9
	movss	%xmm0, (%r9)
	movq	%rsp, %r10
	movss	%xmm1, (%r10)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	movq	%r9, 56(%rbx)
	movq	%r10, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9reinitPhiPfiS_PiS_iiff, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__reinitPhiPfiS_PiS_iiff, .Lfunc_end1-_Z24__device_stub__reinitPhiPfiS_PiS_iiff
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9getVoxelsPfiPiS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9reinitPhiPfiS_PiS_iiff, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9getVoxelsPfiPiS_ii,@object   # @_Z9getVoxelsPfiPiS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z9getVoxelsPfiPiS_ii
	.p2align	3, 0x0
_Z9getVoxelsPfiPiS_ii:
	.quad	_Z24__device_stub__getVoxelsPfiPiS_ii
	.size	_Z9getVoxelsPfiPiS_ii, 8

	.type	_Z9reinitPhiPfiS_PiS_iiff,@object # @_Z9reinitPhiPfiS_PiS_iiff
	.globl	_Z9reinitPhiPfiS_PiS_iiff
	.p2align	3, 0x0
_Z9reinitPhiPfiS_PiS_iiff:
	.quad	_Z24__device_stub__reinitPhiPfiS_PiS_iiff
	.size	_Z9reinitPhiPfiS_PiS_iiff, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z9getVoxelsPfiPiS_ii"
	.size	.L__unnamed_1, 22

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9reinitPhiPfiS_PiS_iiff"
	.size	.L__unnamed_2, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__getVoxelsPfiPiS_ii
	.addrsig_sym _Z24__device_stub__reinitPhiPfiS_PiS_iiff
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9getVoxelsPfiPiS_ii
	.addrsig_sym _Z9reinitPhiPfiS_PiS_iiff
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9getVoxelsPfiPiS_ii   ; -- Begin function _Z9getVoxelsPfiPiS_ii
	.globl	_Z9getVoxelsPfiPiS_ii
	.p2align	8
	.type	_Z9getVoxelsPfiPiS_ii,@function
_Z9getVoxelsPfiPiS_ii:                  ; @_Z9getVoxelsPfiPiS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x34
	s_load_b64 s[2:3], s[0:1], 0x20
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s4, 16
	s_and_b32 s4, s4, 0xffff
	s_add_i32 s2, s2, -1
	v_mad_u64_u32 v[2:3], null, s14, s4, v[1:2]
	v_mad_u64_u32 v[3:4], null, s15, s5, v[0:1]
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	v_cmp_gt_i32_e64 s2, s3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_5
; %bb.1:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x8
	s_load_b64 s[4:5], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[0:1], null, v2, s6, v[3:4]
	s_ashr_i32 s7, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[2:3], s[6:7], 2
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v1, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, v1, s2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v2, vcc_lo
	s_clause 0x1
	global_load_b64 v[5:6], v[3:4], off
	global_load_b64 v[7:8], v[1:2], off
	s_waitcnt vmcnt(1)
	v_cmp_lt_f32_e32 vcc_lo, 0, v5
	v_cndmask_b32_e64 v5, -1, 1, vcc_lo
	s_waitcnt vmcnt(0)
	v_cmp_lt_f32_e32 vcc_lo, 0, v7
	v_cndmask_b32_e64 v7, 1, 3, vcc_lo
	v_cmp_lt_f32_e32 vcc_lo, 0, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v7, v5
	v_cndmask_b32_e64 v6, -1, 1, vcc_lo
	v_cmp_lt_f32_e32 vcc_lo, 0, v8
	v_cndmask_b32_e64 v8, -1, 1, vcc_lo
	v_add3_u32 v5, v5, v6, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, 5, v5
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_5
; %bb.2:
	s_load_b128 s[0:3], s[0:1], 0x10
	s_mov_b32 s7, exec_lo
	s_mov_b32 s8, exec_lo
	v_mbcnt_lo_u32_b32 v5, s7, 0
                                        ; implicit-def: $vgpr6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v5
	s_cbranch_execz .LBB0_4
; %bb.3:
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v7, s7
	s_waitcnt lgkmcnt(0)
	global_atomic_add_u32 v6, v6, v7, s[0:1] glc
.LBB0_4:
	s_or_b32 exec_lo, exec_lo, s8
	s_clause 0x1
	global_load_b128 v[7:10], v[1:2], off offset:-4
	global_load_b128 v[1:4], v[3:4], off offset:-4
	v_subrev_nc_u32_e32 v11, s6, v0
	v_add3_u32 v13, s6, s6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v12, 31, v11
	v_ashrrev_i32_e32 v14, 31, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_lshlrev_b64 v[13:14], 2, v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s4, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v15, vcc_lo, s4, v13
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v14, vcc_lo
	s_clause 0x1
	global_load_b128 v[11:14], v[11:12], off offset:-4
	global_load_b128 v[15:18], v[15:16], off offset:-4
	s_waitcnt vmcnt(4)
	v_readfirstlane_b32 s4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, s4, v5
	v_lshlrev_b32_e32 v19, 4, v5
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v31, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v32, vcc_lo, s1, v6, vcc_lo
	s_waitcnt vmcnt(2)
	v_dual_sub_f32 v5, v9, v7 :: v_dual_sub_f32 v22, v4, v2
	v_ashrrev_i32_e32 v20, 31, v19
	v_sub_f32_e32 v6, v10, v8
	v_mul_f32_e32 v26, -4.0, v9
	v_mul_f32_e32 v21, 0xc1100000, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[19:20], 2, v[19:20]
	v_fmac_f32_e32 v26, 4.0, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_u32 v33, vcc_lo, s2, v19
	v_mul_f32_e32 v19, 0xc0400000, v8
	v_add_co_ci_u32_e32 v34, vcc_lo, s3, v20, vcc_lo
	v_dual_sub_f32 v20, v3, v1 :: v_dual_add_f32 v23, v8, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_dual_mul_f32 v28, 0.5, v5 :: v_dual_fmamk_f32 v29, v9, 0x40400000, v19
	v_fmac_f32_e32 v26, -4.0, v2
	v_mul_f32_e32 v35, 0.5, v6
	v_fma_f32 v30, -2.0, v9, v23
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v24, v28, v28
	v_dual_mul_f32 v25, 0xc0c00000, v8 :: v_dual_fmac_f32 v26, 4.0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v37, 0.5, v22 :: v_dual_fmac_f32 v30, 0.5, v5
	v_fmac_f32_e32 v21, 0x41100000, v8
	v_dual_fmac_f32 v25, 0x40c00000, v9 :: v_dual_fmac_f32 v26, 2.0, v28
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v29, -2.0, v28 :: v_dual_fmac_f32 v30, 0.5, v6
	v_fmac_f32_e32 v21, 0xc1100000, v2
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_fmac_f32 v25, 0x40c00000, v2 :: v_dual_fmac_f32 v26, 2.0, v35
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v4, v4, v14
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v10, v18, v10 :: v_dual_fmac_f32 v21, 0x41100000, v3
	v_fmac_f32_e32 v25, 0xc0c00000, v3
	v_dual_mov_b32 v27, v8 :: v_dual_mul_f32 v36, 0.5, v20
	v_dual_fmac_f32 v23, -2.0, v2 :: v_dual_mul_f32 v20, 0xc0400000, v28
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_fmamk_f32 v22, v28, 0xc0400000, v25 :: v_dual_sub_f32 v5, v2, v12
	v_fmac_f32_e32 v19, 0x40400000, v2
	v_dual_fmac_f32 v29, -0.5, v6 :: v_dual_sub_f32 v6, v3, v13
	v_fmac_f32_e32 v22, 0xc0400000, v35
	v_fmac_f32_e32 v21, 0x40c00000, v28
	v_dual_sub_f32 v9, v17, v9 :: v_dual_sub_f32 v2, v4, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v25, -4.0, v28 :: v_dual_mul_f32 v14, 0.5, v6
	v_dual_fmac_f32 v21, 0x40400000, v35 :: v_dual_mul_f32 v18, 0.5, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_fmac_f32 v22, 0x40400000, v36 :: v_dual_fmac_f32 v25, -2.0, v35
	v_dual_mul_f32 v3, 0.5, v5 :: v_dual_fmac_f32 v26, -2.0, v36
	v_sub_f32_e32 v1, v6, v1
	v_sub_f32_e32 v6, v10, v16
	v_fmac_f32_e32 v21, 0xc0c00000, v36
	v_dual_fmac_f32 v25, 4.0, v36 :: v_dual_fmac_f32 v22, 0x40400000, v37
	v_dual_sub_f32 v13, v16, v8 :: v_dual_sub_f32 v4, v9, v15
	v_fmac_f32_e32 v26, -2.0, v37
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v21, 0xc0400000, v37 :: v_dual_fmac_f32 v22, -4.0, v3
	v_dual_fmac_f32 v24, -2.0, v36 :: v_dual_mul_f32 v17, 0.5, v13
	v_dual_add_f32 v2, v12, v2 :: v_dual_fmac_f32 v23, 0.5, v5
	v_add_f32_e32 v8, v8, v6
	v_dual_add_f32 v6, v14, v14 :: v_dual_add_f32 v1, v1, v11
	v_dual_fmac_f32 v22, 4.0, v14 :: v_dual_fmac_f32 v25, 2.0, v37
	v_fmac_f32_e32 v26, 2.0, v3
	v_mul_f32_e32 v5, 0xc0400000, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_add_f32 v7, v7, v4 :: v_dual_mul_f32 v4, 0x3e800000, v1
	v_fmac_f32_e32 v22, -2.0, v17
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v26, -2.0, v14
	v_fmac_f32_e32 v5, 0x40400000, v14
	v_fmac_f32_e32 v21, 0x40c00000, v3
	v_fma_f32 v6, v3, 2.0, -v6
	v_dual_fmac_f32 v25, 0xc0400000, v3 :: v_dual_fmac_f32 v22, 2.0, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v26, 2.0, v17 :: v_dual_fmac_f32 v21, 0xc0c00000, v14
	v_dual_mul_f32 v9, 0x3e800000, v2 :: v_dual_fmac_f32 v6, 0x3e800000, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v22, -2.0, v4 :: v_dual_fmac_f32 v25, 0x40400000, v14
	v_dual_fmac_f32 v21, 0x40400000, v17 :: v_dual_fmac_f32 v20, 0x40400000, v36
	v_dual_fmac_f32 v19, -2.0, v3 :: v_dual_fmac_f32 v24, 0x3e800000, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v22, -2.0, v9
	v_fmac_f32_e32 v25, 0xc0400000, v17
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v21, 0xc0400000, v18
	v_dual_fmac_f32 v5, -2.0, v4 :: v_dual_fmac_f32 v26, -2.0, v18
	v_fmac_f32_e32 v24, 0x3e800000, v7
	v_fmac_f32_e32 v25, 0x40400000, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v21, 4.0, v4
	v_dual_fmac_f32 v23, 0.5, v13 :: v_dual_mul_f32 v10, 0x3e800000, v7
	v_dual_fmac_f32 v26, 0x3e800000, v1 :: v_dual_fmac_f32 v25, -2.0, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v21, 2.0, v9
	v_dual_fmac_f32 v19, -0.5, v13 :: v_dual_fmac_f32 v20, -2.0, v4
	v_fmac_f32_e32 v26, 0x3e800000, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v25, 0xbe800000, v2 :: v_dual_fmac_f32 v22, 0xbe800000, v7
	v_fmac_f32_e32 v21, 2.0, v10
	v_fmac_f32_e32 v5, 0xbe800000, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v26, 0x3e800000, v7 :: v_dual_fmac_f32 v25, -2.0, v10
	v_fmac_f32_e32 v20, 0xbe800000, v7
	v_dual_fmac_f32 v6, 0x3e800000, v2 :: v_dual_fmac_f32 v21, 0x3e800000, v8
	v_fmac_f32_e32 v22, 0xbe800000, v8
	s_delay_alu instid0(VALU_DEP_4)
	v_fmac_f32_e32 v25, 0xbe800000, v8
	v_fmac_f32_e32 v26, 0x3e800000, v8
	global_store_b32 v[31:32], v0, off offset:4
	s_clause 0x3
	global_store_b128 v[33:34], v[27:30], off
	global_store_b128 v[33:34], v[3:6], off offset:16
	global_store_b128 v[33:34], v[19:22], off offset:32
	global_store_b128 v[33:34], v[23:26], off offset:48
.LBB0_5:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9getVoxelsPfiPiS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 38
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9getVoxelsPfiPiS_ii, .Lfunc_end0-_Z9getVoxelsPfiPiS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1396
; NumSgprs: 18
; NumVgprs: 38
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 38
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z9reinitPhiPfiS_PiS_iiff ; -- Begin function _Z9reinitPhiPfiS_PiS_iiff
	.globl	_Z9reinitPhiPfiS_PiS_iiff
	.p2align	8
	.type	_Z9reinitPhiPfiS_PiS_iiff,@function
_Z9reinitPhiPfiS_PiS_iiff:              ; @_Z9reinitPhiPfiS_PiS_iiff
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b128 s[4:7], s[0:1], 0x28
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_10
; %bb.1:                                ; %.preheader
	s_load_b128 s[24:27], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_load_b32 s31, s[26:27], 0x0
	s_clause 0x1
	s_load_b32 s30, s[0:1], 0x8
	s_load_b64 s[28:29], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s31, 1
	s_cbranch_scc1 .LBB1_8
; %bb.2:                                ; %.lr.ph.preheader
	s_add_u32 s33, s26, 4
	s_addc_u32 s34, s27, 0
	s_ashr_i32 s35, s30, 31
	s_mov_b32 s27, 0
	s_add_i32 s2, s30, s35
	s_mov_b32 s26, s27
	s_xor_b32 s36, s2, s35
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v2, s36
	s_sub_i32 s3, 0, s36
	v_rcp_iflag_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v2, 0x4f7ffffe, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v2, v2
	v_readfirstlane_b32 s2, v2
	v_mov_b32_e32 v2, 0x4aed1f20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s3, s3, s2
	s_mul_hi_u32 s3, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s37, s2, s3
.LBB1_3:                                ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_4 Depth 2
	s_lshl_b64 s[2:3], s[26:27], 2
	s_mov_b32 s5, s27
	s_add_u32 s2, s33, s2
	s_addc_u32 s3, s34, s3
	s_lshl_b32 s4, s26, 4
	s_load_b32 s38, s[2:3], 0x0
	s_lshl_b64 s[2:3], s[4:5], 2
	v_dual_mov_b32 v3, 0.5 :: v_dual_mov_b32 v24, 0.5
	s_add_u32 s2, s28, s2
	s_addc_u32 s3, s29, s3
	s_load_b512 s[8:23], s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s2, s38, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s38, s2
	s_xor_b32 s4, s2, s35
	s_xor_b32 s2, s3, s2
	s_mul_hi_u32 s3, s2, s37
	v_add_f32_e64 v4, s10, s10
	s_mul_i32 s5, s3, s36
	v_mul_f32_e64 v5, 0x40400000, s11
	s_sub_i32 s2, s2, s5
	s_add_i32 s5, s3, 1
	s_sub_i32 s39, s2, s36
	s_cmp_ge_u32 s2, s36
	v_add_f32_e64 v6, s14, s14
	s_cselect_b32 s3, s5, s3
	s_cselect_b32 s2, s39, s2
	s_add_i32 s5, s3, 1
	s_cmp_ge_u32 s2, s36
	v_mul_f32_e64 v7, 0x40400000, s15
	s_cselect_b32 s2, s5, s3
	v_add_f32_e64 v8, s18, s18
	s_xor_b32 s2, s2, s4
	v_mul_f32_e64 v9, 0x40400000, s19
	s_sub_i32 s2, s2, s4
	v_add_f32_e64 v10, s22, s22
	s_mul_i32 s3, s2, s30
	v_subrev_nc_u32_e32 v20, s2, v0
	s_sub_i32 s3, s3, s38
	v_mul_f32_e64 v11, 0x40400000, s23
	v_add_nc_u32_e32 v21, s3, v1
	v_add_f32_e64 v12, s16, s16
	v_mul_f32_e64 v13, 0x40400000, s20
	v_add_f32_e64 v14, s17, s17
	v_mul_f32_e64 v15, 0x40400000, s21
	v_mul_f32_e64 v16, 0x40400000, s22
	v_add_f32_e64 v17, s19, s19
	v_mul_f32_e64 v18, 0x40c00000, s11
	v_mul_f32_e64 v19, 0x40c00000, s15
	v_mul_f32_e64 v22, 0x40c00000, s19
	v_mul_f32_e64 v23, 0x40c00000, s23
	v_mul_f32_e64 v25, 0x40c00000, s20
	v_mul_f32_e64 v26, 0x40c00000, s21
	v_mul_f32_e64 v27, 0x40c00000, s22
	v_cvt_f32_i32_e32 v20, v20
	v_cvt_f32_i32_e32 v21, v21
	s_mov_b32 s39, 0
                                        ; implicit-def: $sgpr38
.LBB1_4:                                ;   Parent Loop BB1_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mul_f32 v28, v3, v3 :: v_dual_mul_f32 v29, v24, v24
	v_fma_f32 v30, v3, s9, s8
	v_fma_f32 v31, v3, s13, s12
	v_fma_f32 v32, v3, s17, s16
	v_fma_f32 v34, v3, v4, s9
	v_fma_f32 v35, v3, v6, s13
	v_fma_f32 v38, v24, v12, s12
	v_fma_f32 v39, v24, v14, s13
	v_dual_mul_f32 v52, v3, v28 :: v_dual_mul_f32 v53, v24, v29
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_fmac_f32 v30, s10, v28 :: v_dual_fmac_f32 v35, v28, v7
	v_dual_fmac_f32 v31, s14, v28 :: v_dual_fmac_f32 v34, v28, v5
	v_fma_f32 v33, v3, s21, s20
	v_fma_f32 v37, v3, v10, s21
	v_fma_f32 v41, v24, v17, s15
	v_fmac_f32_e32 v32, s18, v28
	v_dual_fmac_f32 v38, v29, v13 :: v_dual_fmac_f32 v31, s15, v52
	v_dual_fmac_f32 v39, v29, v15 :: v_dual_fmac_f32 v30, s11, v52
	v_fma_f32 v36, v3, v8, s17
	v_fma_f32 v42, v3, v18, v4
	v_fma_f32 v43, v3, v19, v6
	v_fmac_f32_e32 v33, s22, v28
	v_fmac_f32_e32 v37, v28, v11
	v_dual_fmac_f32 v36, v28, v9 :: v_dual_fmac_f32 v41, v29, v11
	v_fmac_f32_e32 v32, s19, v52
	v_fmac_f32_e32 v30, v24, v31
	v_fma_f32 v40, v24, v8, s14
	v_dual_fmac_f32 v42, v24, v43 :: v_dual_fmac_f32 v33, s23, v52
	v_fma_f32 v46, v24, v25, v12
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v30, v29, v32
	v_fma_f32 v47, v24, v26, v14
	v_dual_fmac_f32 v40, v29, v16 :: v_dual_mul_f32 v43, 0x40400000, v37
	v_fma_f32 v44, v3, v22, v8
	v_fmac_f32_e32 v30, v53, v33
	v_fmac_f32_e32 v38, v3, v39
	v_dual_fmac_f32 v46, v3, v47 :: v_dual_add_f32 v39, v36, v36
	v_fma_f32 v48, v24, v27, v8
	v_dual_sub_f32 v50, v24, v20 :: v_dual_sub_f32 v51, v3, v21
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v38, v28, v40
	v_fmac_f32_e32 v42, v29, v44
	v_fma_f32 v45, v3, v23, v10
	v_fma_f32 v49, v24, v23, v17
	v_fmac_f32_e32 v38, v52, v41
	v_fmac_f32_e32 v34, v24, v35
	v_fmac_f32_e32 v35, v24, v39
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v46, v28, v48 :: v_dual_mul_f32 v31, v51, v38
	v_fmac_f32_e32 v35, v29, v43
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v34, v29, v36
	v_dual_fmac_f32 v46, v52, v49 :: v_dual_mul_f32 v29, v51, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v34, v53, v37
	v_mul_f32_e32 v28, v51, v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v31, v50, v34, -v31
	v_fmac_f32_e32 v42, v53, v45
	v_fma_f32 v28, v50, v35, -v28
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v33, v38, v31
	v_fma_f32 v29, v50, v42, -v29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v28, v34, v28
	v_dual_mul_f32 v32, v31, v31 :: v_dual_sub_f32 v29, v29, v38
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v33, v30, v28, -v33
	v_fmac_f32_e32 v32, v30, v30
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v35, v38, v29
	v_mul_f32_e32 v29, v30, v29
	v_fma_f32 v28, v34, v28, -v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v29, v34, v31, -v29
	v_div_scale_f32 v31, null, v28, v28, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_scale_f32 v34, null, v28, v28, v29
	v_div_scale_f32 v35, vcc_lo, v33, v28, v33
	v_rcp_f32_e32 v36, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v37, v34
	v_div_scale_f32 v38, s2, v29, v28, v29
	s_waitcnt_depctr 0xfff
	v_fma_f32 v39, -v31, v36, 1.0
	v_fma_f32 v40, -v34, v37, 1.0
	v_dual_fmac_f32 v36, v39, v36 :: v_dual_fmac_f32 v37, v40, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v39, v35, v36 :: v_dual_mul_f32 v40, v38, v37
	v_fma_f32 v41, -v31, v39, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v42, -v34, v40, v38
	v_dual_fmac_f32 v39, v41, v36 :: v_dual_fmac_f32 v40, v42, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v31, -v31, v39, v35
	v_fma_f32 v34, -v34, v40, v38
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v31, v31, v36, v39
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f32 v34, v34, v37, v40
	v_cmp_nlt_f32_e32 vcc_lo, s7, v32
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v31, v31, v28, v33
	v_div_fixup_f32 v28, v34, v28, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v3, v3, v31 :: v_dual_sub_f32 v24, v24, v28
	v_cmp_le_f32_e64 s2, 0xbdcccccd, v3
	v_cmp_ge_f32_e64 s4, 0x3f8ccccd, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_le_f32_e64 s3, 0xbdcccccd, v24
	v_cmp_ge_f32_e64 s5, 0x3f8ccccd, v24
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s2, -1
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, exec_lo, s3
	s_or_b32 s39, s3, s39
	s_and_not1_b32 s3, s38, exec_lo
	s_and_b32 s2, s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s38, s3, s2
	s_and_not1_b32 exec_lo, exec_lo, s39
	s_cbranch_execnz .LBB1_4
; %bb.5:                                ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s39
	s_and_saveexec_b32 s3, s38
	s_cbranch_execz .LBB1_7
; %bb.6:                                ;   in Loop: Header=BB1_3 Depth=1
	v_dual_sub_f32 v4, v20, v24 :: v_dual_sub_f32 v3, v21, v3
	v_max_f32_e32 v2, v2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v4, v4
	v_fmac_f32_e32 v4, v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v4
	v_mul_f32_e32 v3, 0x4f800000, v4
	v_cndmask_b32_e32 v3, v4, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v6, 1, v4
	v_add_nc_u32_e32 v5, -1, v4
	v_fma_f32 v8, -v6, v4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, -v5, v4, v3
	v_cmp_ge_f32_e64 s2, 0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v4, v4, v5, s2
	v_cmp_lt_f32_e64 s2, 0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v6, s2
	v_mul_f32_e32 v5, 0x37800000, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, v4, v5, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v3, 0x260
	v_cndmask_b32_e32 v3, v4, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v3, s6, v3
	v_min_f32_e32 v2, v2, v3
.LBB1_7:                                ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_add_i32 s26, s26, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s26, s31
	s_cbranch_scc0 .LBB1_3
	s_branch .LBB1_9
.LBB1_8:
	v_mov_b32_e32 v2, 0x4aed1f20
.LBB1_9:                                ; %Flow101
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v0, s30, v[1:2]
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s24, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s25, v1, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e64 v2, -v2, v2, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB1_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9reinitPhiPfiS_PiS_iiff
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 54
		.amdhsa_next_free_sgpr 40
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9reinitPhiPfiS_PiS_iiff, .Lfunc_end1-_Z9reinitPhiPfiS_PiS_iiff
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1744
; NumSgprs: 42
; NumVgprs: 54
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 6
; NumSGPRsForWavesPerEU: 42
; NumVGPRsForWavesPerEU: 54
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9getVoxelsPfiPiS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9getVoxelsPfiPiS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     38
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         52
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9reinitPhiPfiS_PiS_iiff
    .private_segment_fixed_size: 0
    .sgpr_count:     42
    .sgpr_spill_count: 0
    .symbol:         _Z9reinitPhiPfiS_PiS_iiff.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     54
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
