#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <string.h>

#define R 4
#define C 40 

/*
 * It returns the length of a string pointed by pointer s,
 * It acts like the cpu strlen() function
 */
__device__ int gpu_strlen(char * s) 
{
    int i = 0;
    while(s[i] != '\0')
    {
	i++;
    }
    return i;
}

/*
 * It returns 0 if input character ch is NOT an alphabetical letter
 * Otherwise, it returns one.
 */
__device__ int gpu_isAlpha(char ch)
{
	//potentially think about using isalpha() function 
	if(ch == 'a' || ch == 'b' || ch == 'c' || ch == 'd' || ch == 'e' || ch == 'f' || ch == 'g' || ch == 'h' || ch == 'i' || ch == 'j' || ch == 'k' || ch == 'l' || ch == 'm' || ch == 'n' || ch == 'o' || ch == 'p' || ch == 'q' || ch == 'r' || ch == 's' || ch == 't' || ch == 'u' || ch == 'v' || ch == 'w' || ch == 'x' || ch == 'y' || ch == 'z')
		return 1;
	else if(ch == 'A' || ch == 'B' || ch == 'C' || ch == 'D' || ch == 'E' || ch == 'F' || ch == 'G' || ch == 'H' || ch == 'I' || ch == 'J' || ch == 'K' || ch == 'L' || ch == 'M' || ch == 'N' || ch == 'O' || ch == 'P' || ch == 'Q' || ch == 'R' || ch == 'S' || ch == 'T' || ch == 'U' || ch == 'V' || ch == 'W' || ch == 'X' || ch == 'Y' || ch == 'Z')
		return 1;
	else 
		return 0;
}

/* Cuda kernel to count number of words in each line of text pointed by a.
 * The output is stored back in 'out' array.
 * numLine specifies the num of lines in a, maxLineLen specifies the maximal
 * num of characters in one line of text.
 */
__global__ void wordCount( char **a, int **out, int numLine, int maxLineLen )
{
	
    	int ix   = blockIdx.x*blockDim.x + threadIdx.x;
    	int iy   = blockIdx.y*blockDim.y + threadIdx.y;
    	int currLen = gpu_strlen(a[iy]);
        
	
    	//each thread process one character within a line 
    	if( iy < numLine && ix < currLen && gpu_isAlpha(a[iy][ix]) != 1 )
    	{
        	out[iy][ix] += 1;
	}
	__syncthreads();

	if(out[iy][ix] == 1 && ix < currLen)
		out[iy][ix + 1] = 0;

	/*
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	
	if( row < maxLineLen || col < numLine)
		return;
		
	
	out[iy][ix] = 1;
	
	
	int rowLen = gpu_strlen(a[row]);
	
	if(col < rowLen)
		return;

	if(gpu_isAlpha(a[row][col]) == 1) {
		out[row][col] = 1;
	} else {
		out[row][col] = 1;
	}
	__syncthreads();
	
	if(col != 1 && out[row][col - 1] == 1) {
		out[row][col] = 0;
	}
	*/
		
}  

/* Print out the all lines of text in a on stdout
 */ 
void printArr( char **a, int lines )
{
    int i;
    for(i=0; i<lines; i++)
    {
        printf("%s\n", a[i]);
    }
}


int main()
{
    int i; 
    char **d_in, **h_in, **h_out;
    int h_count_in[R][C], **h_count_out, **d_count_in;

    //allocate
    h_in = (char **)malloc(R * sizeof(char *));
    h_out = (char **)malloc(R * sizeof(char *));
    h_count_out = (int **)malloc(R * sizeof(int *));

    cudaMalloc((void ***)&d_in, sizeof(char *) * R);
    cudaMalloc((void ***)&d_count_in, sizeof(int *) * R);

    //alocate for string data
    for(i = 0; i < R; ++i) 
    {
        cudaMalloc((void **) &h_out[i],C * sizeof(char));
        h_in[i]=(char *)calloc(C, sizeof(char));//allocate or connect the input data to it
//!!!!!!!!!!!!!!!!!
        strcpy(h_in[i], "for you:: he ");
        cudaMemcpy(h_out[i], h_in[i], strlen(h_in[i]) + 1, cudaMemcpyHostToDevice);
    }
    cudaMemcpy(d_in, h_out, sizeof(char *) * R,cudaMemcpyHostToDevice);

    //alocate for output occurrence
    for(i = 0; i < R; ++i) 
    {
        cudaMalloc((void **) &h_count_out[i], C * sizeof(int));
        cudaMemset(h_count_out[i], 0, C * sizeof(int));
    }
    cudaMemcpy(d_count_in, h_count_out, sizeof(int *) * R,cudaMemcpyHostToDevice);

    printArr(h_in, R);
    printf("\n\n");
     
    //set up kernel configuartion variables
    dim3 grid, block;
    block.x = 2;
    block.y = 2;
    grid.x  = ceil((float)C / block.x);
    grid.y  = ceil((float)R / block.y); //careful must be type cast into float, otherwise, integer division used
    //printf("grid.x = %d, grid.y=%d\n", grid.x, grid.y );

    //launch kernel
    wordCount<<<grid, block>>>( d_in, d_count_in, R, C);

    //copy data back from device to host
    for(i = 0; i < R; ++i) {
        cudaMemcpy(h_count_in[i], h_count_out[i], sizeof(int) * C,cudaMemcpyDeviceToHost);
    }
    printf("Occurrence array obtained from device:\n");

    for(i = 0; i < R; i ++) {
        for(int j = 0; j < C; j ++)
            printf("%4d", h_count_in[i][j]);
        printf("\n");
    }
 
    return 0;
}


	.file	"tmpxft_00268fc3_00000000-6_lab6.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10gpu_strlenPc
	.type	_Z10gpu_strlenPc, @function
_Z10gpu_strlenPc:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z10gpu_strlenPc, .-_Z10gpu_strlenPc
	.globl	_Z11gpu_isAlphac
	.type	_Z11gpu_isAlphac, @function
_Z11gpu_isAlphac:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z11gpu_isAlphac, .-_Z11gpu_isAlphac
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%s\n"
	.text
	.globl	_Z8printArrPPci
	.type	_Z8printArrPPci, @function
_Z8printArrPPci:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC0(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L7:
	cmpl	%ebx, %ebp
	jle	.L11
	movq	(%r12,%rbx,8), %rdx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L7
.L11:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z8printArrPPci, .-_Z8printArrPPci
	.globl	_Z34__device_stub__Z9wordCountPPcPPiiiPPcPPiii
	.type	_Z34__device_stub__Z9wordCountPPcPPiiiPPcPPiii, @function
_Z34__device_stub__Z9wordCountPPcPPiiiPPcPPiii:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9wordCountPPcPPiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L12:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z34__device_stub__Z9wordCountPPcPPiiiPPcPPiii, .-_Z34__device_stub__Z9wordCountPPcPPiiiPPcPPiii
	.globl	_Z9wordCountPPcPPiii
	.type	_Z9wordCountPPcPPiii, @function
_Z9wordCountPPcPPiii:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z9wordCountPPcPPiiiPPcPPiii
	.cfi_endproc
.LFE2056:
	.size	_Z9wordCountPPcPPiii, .-_Z9wordCountPPcPPiii
	.section	.rodata.str1.1
.LC1:
	.string	"\n\n"
.LC2:
	.string	"Occurrence array obtained from device:\n"
.LC3:
	.string	"%4d"
.LC4:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$32, %edi
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movabsq	$4212395592501063526, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$696, %rsp
	.cfi_def_cfa_offset 752
	movq	%fs:40, %rax
	movq	%rax, 680(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$32, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$32, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movq	%rsp, %rdi
	movl	$32, %esi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$32, %esi
	call	cudaMalloc@PLT
.L18:
	leaq	(%r12,%r15), %rdi
	movl	$40, %esi
	call	cudaMalloc@PLT
	movl	$1, %esi
	movl	$40, %edi
	call	calloc@PLT
	movq	%rax, %rbx
	movq	%rax, 0(%r13,%r15)
	movq	%r14, (%rax)
	movq	%rbx, %rdi
	movabsq	$9118697146432117, %rax
	movq	%rax, 6(%rbx)
	call	strlen@PLT
	movq	(%r12,%r15), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	leaq	1(%rax), %rdx
	addq	$8, %r15
	call	cudaMemcpy@PLT
	cmpq	$32, %r15
	jne	.L18
	movq	(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	movq	%rbp, %rbx
	movl	$32, %edx
	leaq	32(%rbp), %r12
	call	cudaMemcpy@PLT
.L19:
	movq	%rbx, %rdi
	movl	$160, %esi
	addq	$8, %rbx
	call	cudaMalloc@PLT
	movq	-8(%rbx), %rdi
	movl	$160, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	cmpq	%r12, %rbx
	jne	.L19
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$32, %edx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	movl	$4, %esi
	movq	%r13, %rdi
	call	_Z8printArrPPci
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$2147483653, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$2, %rdi
	movl	$1, %ecx
	movabsq	$8589934594, %rdx
	movl	$1, %esi
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$40, %ecx
	movl	$4, %edx
	call	_Z34__device_stub__Z9wordCountPPcPPiiiPPcPPiii
.L20:
	xorl	%r12d, %r12d
.L21:
	movq	0(%rbp,%r12,8), %rsi
	leaq	40(%rsp), %rbx
	movl	$2, %ecx
	movl	$160, %edx
	imulq	$160, %r12, %rdi
	incq	%r12
	addq	%rbx, %rdi
	call	cudaMemcpy@PLT
	cmpq	$4, %r12
	jne	.L21
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	680(%rsp), %r12
	leaq	.LC3(%rip), %r13
.L22:
	xorl	%ebp, %ebp
.L23:
	movl	(%rbx,%rbp,4), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbp
	call	__printf_chk@PLT
	cmpq	$40, %rbp
	jne	.L23
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$160, %rbx
	call	__printf_chk@PLT
	cmpq	%rbx, %r12
	jne	.L22
	movq	680(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$696, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z9wordCountPPcPPiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9wordCountPPcPPiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <string.h>

#define R 4
#define C 40 

/*
 * It returns the length of a string pointed by pointer s,
 * It acts like the cpu strlen() function
 */
__device__ int gpu_strlen(char * s) 
{
    int i = 0;
    while(s[i] != '\0')
    {
	i++;
    }
    return i;
}

/*
 * It returns 0 if input character ch is NOT an alphabetical letter
 * Otherwise, it returns one.
 */
__device__ int gpu_isAlpha(char ch)
{
	//potentially think about using isalpha() function 
	if(ch == 'a' || ch == 'b' || ch == 'c' || ch == 'd' || ch == 'e' || ch == 'f' || ch == 'g' || ch == 'h' || ch == 'i' || ch == 'j' || ch == 'k' || ch == 'l' || ch == 'm' || ch == 'n' || ch == 'o' || ch == 'p' || ch == 'q' || ch == 'r' || ch == 's' || ch == 't' || ch == 'u' || ch == 'v' || ch == 'w' || ch == 'x' || ch == 'y' || ch == 'z')
		return 1;
	else if(ch == 'A' || ch == 'B' || ch == 'C' || ch == 'D' || ch == 'E' || ch == 'F' || ch == 'G' || ch == 'H' || ch == 'I' || ch == 'J' || ch == 'K' || ch == 'L' || ch == 'M' || ch == 'N' || ch == 'O' || ch == 'P' || ch == 'Q' || ch == 'R' || ch == 'S' || ch == 'T' || ch == 'U' || ch == 'V' || ch == 'W' || ch == 'X' || ch == 'Y' || ch == 'Z')
		return 1;
	else 
		return 0;
}

/* Cuda kernel to count number of words in each line of text pointed by a.
 * The output is stored back in 'out' array.
 * numLine specifies the num of lines in a, maxLineLen specifies the maximal
 * num of characters in one line of text.
 */
__global__ void wordCount( char **a, int **out, int numLine, int maxLineLen )
{
	
    	int ix   = blockIdx.x*blockDim.x + threadIdx.x;
    	int iy   = blockIdx.y*blockDim.y + threadIdx.y;
    	int currLen = gpu_strlen(a[iy]);
        
	
    	//each thread process one character within a line 
    	if( iy < numLine && ix < currLen && gpu_isAlpha(a[iy][ix]) != 1 )
    	{
        	out[iy][ix] += 1;
	}
	__syncthreads();

	if(out[iy][ix] == 1 && ix < currLen)
		out[iy][ix + 1] = 0;

	/*
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	
	if( row < maxLineLen || col < numLine)
		return;
		
	
	out[iy][ix] = 1;
	
	
	int rowLen = gpu_strlen(a[row]);
	
	if(col < rowLen)
		return;

	if(gpu_isAlpha(a[row][col]) == 1) {
		out[row][col] = 1;
	} else {
		out[row][col] = 1;
	}
	__syncthreads();
	
	if(col != 1 && out[row][col - 1] == 1) {
		out[row][col] = 0;
	}
	*/
		
}  

/* Print out the all lines of text in a on stdout
 */ 
void printArr( char **a, int lines )
{
    int i;
    for(i=0; i<lines; i++)
    {
        printf("%s\n", a[i]);
    }
}


int main()
{
    int i; 
    char **d_in, **h_in, **h_out;
    int h_count_in[R][C], **h_count_out, **d_count_in;

    //allocate
    h_in = (char **)malloc(R * sizeof(char *));
    h_out = (char **)malloc(R * sizeof(char *));
    h_count_out = (int **)malloc(R * sizeof(int *));

    hipMalloc((void ***)&d_in, sizeof(char *) * R);
    hipMalloc((void ***)&d_count_in, sizeof(int *) * R);

    //alocate for string data
    for(i = 0; i < R; ++i) 
    {
        hipMalloc((void **) &h_out[i],C * sizeof(char));
        h_in[i]=(char *)calloc(C, sizeof(char));//allocate or connect the input data to it
//!!!!!!!!!!!!!!!!!
        strcpy(h_in[i], "for you:: he ");
        hipMemcpy(h_out[i], h_in[i], strlen(h_in[i]) + 1, hipMemcpyHostToDevice);
    }
    hipMemcpy(d_in, h_out, sizeof(char *) * R,hipMemcpyHostToDevice);

    //alocate for output occurrence
    for(i = 0; i < R; ++i) 
    {
        hipMalloc((void **) &h_count_out[i], C * sizeof(int));
        hipMemset(h_count_out[i], 0, C * sizeof(int));
    }
    hipMemcpy(d_count_in, h_count_out, sizeof(int *) * R,hipMemcpyHostToDevice);

    printArr(h_in, R);
    printf("\n\n");
     
    //set up kernel configuartion variables
    dim3 grid, block;
    block.x = 2;
    block.y = 2;
    grid.x  = ceil((float)C / block.x);
    grid.y  = ceil((float)R / block.y); //careful must be type cast into float, otherwise, integer division used
    //printf("grid.x = %d, grid.y=%d\n", grid.x, grid.y );

    //launch kernel
    wordCount<<<grid, block>>>( d_in, d_count_in, R, C);

    //copy data back from device to host
    for(i = 0; i < R; ++i) {
        hipMemcpy(h_count_in[i], h_count_out[i], sizeof(int) * C,hipMemcpyDeviceToHost);
    }
    printf("Occurrence array obtained from device:\n");

    for(i = 0; i < R; i ++) {
        for(int j = 0; j < C; j ++)
            printf("%4d", h_count_in[i][j]);
        printf("\n");
    }
 
    return 0;
}


	.text
	.file	"lab6.hip"
	.globl	_Z24__device_stub__wordCountPPcPPiii # -- Begin function _Z24__device_stub__wordCountPPcPPiii
	.type	_Z24__device_stub__wordCountPPcPPiii,@function
_Z24__device_stub__wordCountPPcPPiii:   # @_Z24__device_stub__wordCountPPcPPiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9wordCountPPcPPiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__wordCountPPcPPiii, .Lfunc_end0-_Z24__device_stub__wordCountPPcPPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z8printArrPPci                 # -- Begin function _Z8printArrPPci
	.type	_Z8printArrPPci,@function
_Z8printArrPPci:                        # @_Z8printArrPPci
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB1_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rbx,%r15,8), %rdi
	callq	puts@PLT
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB1_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB1_4:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z8printArrPPci, .Lfunc_end1-_Z8printArrPPci
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$664, %rsp                      # imm = 0x298
	.cfi_def_cfa_offset 720
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$32, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$32, %edi
	callq	malloc
	movq	%rax, %r15
	movl	$32, %edi
	callq	malloc
	movq	%rax, %rbx
	leaq	8(%rsp), %rdi
	movl	$32, %esi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$32, %esi
	callq	hipMalloc
	xorl	%ebp, %ebp
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	leaq	(%r15,%rbp), %rdi
	movl	$40, %esi
	callq	hipMalloc
	movl	$40, %edi
	movl	$1, %esi
	callq	calloc
	movq	%rax, %r12
	movq	%rax, (%r14,%rbp)
	movabsq	$4212395592501063526, %rax      # imm = 0x3A756F7920726F66
	movq	%rax, (%r12)
	movabsq	$9118697146432117, %rax         # imm = 0x206568203A3A75
	movq	%rax, 6(%r12)
	movq	(%r15,%rbp), %r13
	movq	%r12, %rdi
	callq	strlen
	leaq	1(%rax), %rdx
	movq	%r13, %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	addq	$8, %rbp
	cmpq	$32, %rbp
	jne	.LBB2_1
# %bb.2:
	movq	8(%rsp), %rdi
	movl	$32, %edx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	xorl	%r15d, %r15d
.LBB2_3:                                # =>This Inner Loop Header: Depth=1
	leaq	(%rbx,%r15), %rdi
	movl	$160, %esi
	callq	hipMalloc
	movq	(%rbx,%r15), %rdi
	movl	$160, %edx
	xorl	%esi, %esi
	callq	hipMemset
	addq	$8, %r15
	cmpq	$32, %r15
	jne	.LBB2_3
# %bb.4:
	movq	(%rsp), %rdi
	movl	$32, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	xorl	%r15d, %r15d
.LBB2_5:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movq	(%r14,%r15,8), %rdi
	callq	puts@PLT
	incq	%r15
	cmpq	$4, %r15
	jne	.LBB2_5
# %bb.6:                                # %_Z8printArrPPci.exit
	movl	$.Lstr, %edi
	callq	puts@PLT
	movabsq	$8589934594, %rdx               # imm = 0x200000002
	leaq	18(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.7:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$4, %edx
	movl	$40, %ecx
	callq	_Z24__device_stub__wordCountPPcPPiii
.LBB2_8:                                # %.preheader76
	leaq	16(%rsp), %r14
	xorl	%r15d, %r15d
.LBB2_9:                                # =>This Inner Loop Header: Depth=1
	movq	(%rbx,%r15,8), %rsi
	movl	$160, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	incq	%r15
	addq	$160, %r14
	cmpq	$4, %r15
	jne	.LBB2_9
# %bb.10:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	leaq	16(%rsp), %rbx
	xorl	%r14d, %r14d
.LBB2_11:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_12 Depth 2
	xorl	%r15d, %r15d
.LBB2_12:                               #   Parent Loop BB2_11 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	$40, %r15
	jne	.LBB2_12
# %bb.13:                               #   in Loop: Header=BB2_11 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$160, %rbx
	cmpq	$4, %r14
	jne	.LBB2_11
# %bb.14:
	xorl	%eax, %eax
	addq	$664, %rsp                      # imm = 0x298
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9wordCountPPcPPiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9wordCountPPcPPiii,@object    # @_Z9wordCountPPcPPiii
	.section	.rodata,"a",@progbits
	.globl	_Z9wordCountPPcPPiii
	.p2align	3, 0x0
_Z9wordCountPPcPPiii:
	.quad	_Z24__device_stub__wordCountPPcPPiii
	.size	_Z9wordCountPPcPPiii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"for you:: he "
	.size	.L.str.1, 14

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%4d"
	.size	.L.str.4, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9wordCountPPcPPiii"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\n"
	.size	.Lstr, 2

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Occurrence array obtained from device:"
	.size	.Lstr.1, 39

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__wordCountPPcPPiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9wordCountPPcPPiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9wordCountPPcPPiii    ; -- Begin function _Z9wordCountPPcPPiii
	.globl	_Z9wordCountPPcPPiii
	.p2align	8
	.type	_Z9wordCountPPcPPiii,@function
_Z9wordCountPPcPPiii:                   ; @_Z9wordCountPPcPPiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s2, s8, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[7:8], null, s15, s2, v[1:2]
	s_mov_b64 s[2:3], 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[1:2], 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
	s_mov_b32 s4, 0
	global_load_b64 v[5:6], v[3:4], off
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v5, s2
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v6, vcc_lo
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v9, s3 :: v_dual_mov_b32 v8, s2
	global_load_u8 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v3
	s_or_b32 s4, vcc_lo, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB0_1
; %bb.2:                                ; %_Z10gpu_strlenPc.exit
	s_or_b32 exec_lo, exec_lo, s4
	s_load_b32 s0, s[0:1], 0x10
	v_and_b32_e32 v0, 0x3ff, v0
	s_and_b32 s1, s8, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[3:4], null, s14, s1, v[0:1]
	v_add_nc_u32_e32 v0, -1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, v3, v0
	v_ashrrev_i32_e32 v4, 31, v3
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e64 s0, s0, v7
	s_and_b32 s0, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_5
; %bb.3:
	v_add_co_u32 v5, s0, v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s0, v6, v4, s0
	global_load_u8 v0, v[5:6], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v0, 0xdf, v0
	v_add_nc_u16 v0, v0, 0xffa5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v0, 0xff, v0
	v_cmp_gt_u16_e64 s0, 0xe6, v0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_5
; %bb.4:
	v_add_co_u32 v5, s0, s6, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s0, s7, v2, s0
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v5, s0, v5, v7
	v_add_co_ci_u32_e64 v6, s0, v6, v8, s0
	global_load_b32 v0, v[5:6], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	global_store_b32 v[5:6], v0, off
.LBB0_5:                                ; %_Z10gpu_strlenPc.exit._crit_edge
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v0, s0, s6, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, s0, s7, v2, s0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_load_b64 v[0:1], v[0:1], off
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, s0, v0, v2
	v_add_co_ci_u32_e64 v1, s0, v1, v3, s0
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s0, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_7
; %bb.6:
	v_mov_b32_e32 v2, 0
	global_store_b32 v[0:1], v2, off offset:4
.LBB0_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9wordCountPPcPPiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9wordCountPPcPPiii, .Lfunc_end0-_Z9wordCountPPcPPiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 552
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9wordCountPPcPPiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9wordCountPPcPPiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
