#include<stdlib.h>
#include<stdio.h>
#include<time.h>
__global__ void oddevenSort(int *d_in,int size,int oe_flag,int &d_ch_flag){
	int idx = threadIdx.x+blockIdx.x*blockDim.x;
	int p = 2*idx+oe_flag;
	if(p+1<size){
		if(d_in[p]>d_in[p+1]){
			int temp = d_in[p];
			d_in[p] = d_in[p+1];
			d_in[p+1] = temp;
			d_ch_flag = 1;
		}
	}
}
void init(int *p,const int size){
	srand((unsigned int)time(NULL));
	for(int i=0;i<size;i++){
		p[i] = rand()%size;
	}
}
void show(int *p,const int size){
	for(int i=0;i<size;i++){
		printf("%d ",p[i]);
	}
	printf("\n");
}
void bubbleSort(int *p,const int size){
	for(int i=0;i<size-1;i++){
		for(int j=0;j<size-i-1;j++){
			if(p[j]>p[j+1]){
				int temp = p[j];
				p[j] = p[j+1];
				p[j+1] = temp;
			}
		}
	}
}
int main(){
	int size = 10*1024;
	int *h_in;
	int *h_out;
	h_in = (int *)malloc(size*sizeof(int));
	h_out = (int *)malloc(size*sizeof(int));
	init(h_in,size);
	//show(h_in,size);
	//printf("\n");
	int *d_in;
	int *d_ch_flag;
	cudaMalloc((int **)&d_in,size*sizeof(int));
	cudaMalloc((int **)&d_ch_flag,sizeof(int));
	cudaMemcpy(d_in,h_in,size*sizeof(int),cudaMemcpyHostToDevice);
	int oe_flag = 0;//判断当前进行排序的类型
	int ch_flag = 1;//判断数组是否发生改变
	dim3 block(10);
	dim3 thread(1024/2);
	time_t t_start = clock();
	while(ch_flag||oe_flag){//偶排序和奇排序必须成对出现
		ch_flag = 0;
		cudaMemcpy(d_ch_flag,&ch_flag,sizeof(int),cudaMemcpyHostToDevice);
		oddevenSort<<<block,thread>>>(d_in,size,oe_flag,d_ch_flag[0]);
		cudaMemcpy(&ch_flag,d_ch_flag,sizeof(int),cudaMemcpyDeviceToHost);
		oe_flag = 1^oe_flag;
	}
	time_t t_end = clock();
	cudaMemcpy(h_out,d_in,size*sizeof(int),cudaMemcpyDeviceToHost);
	//show(h_out,size);
	printf("GPU time:%fms\n",difftime(t_end,t_start));
	t_start = clock();
	bubbleSort(h_in,size);
	t_end = clock();
	printf("CPU time:%fms\n",difftime(t_end,t_start));
	free(h_in);
	free(h_out);
	cudaFree(d_in);
	cudaFree(d_ch_flag);
	return 0;
}

	.file	"tmpxft_00272319_00000000-6_OddevenSort.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z4initPii
	.type	_Z4initPii, @function
_Z4initPii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	xorl	%edi, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%esi, %ebx
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L3:
	cmpl	%ebp, %ebx
	jle	.L7
	call	rand@PLT
	cltd
	idivl	%ebx
	movl	%edx, (%r12,%rbp,4)
	incq	%rbp
	jmp	.L3
.L7:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z4initPii, .-_Z4initPii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d "
.LC1:
	.string	"\n"
	.text
	.globl	_Z4showPii
	.type	_Z4showPii, @function
_Z4showPii:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC0(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 48
.L9:
	cmpl	%ebx, %ebp
	jle	.L12
	movl	(%r12,%rbx,4), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L9
.L12:
	popq	%rdx
	.cfi_def_cfa_offset 40
	leaq	.LC1(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z4showPii, .-_Z4showPii
	.globl	_Z10bubbleSortPii
	.type	_Z10bubbleSortPii, @function
_Z10bubbleSortPii:
.LFB2029:
	.cfi_startproc
	endbr64
	xorl	%edx, %edx
	decl	%esi
.L14:
	cmpl	%edx, %esi
	jle	.L19
	movl	%esi, %r9d
	xorl	%eax, %eax
	subl	%edx, %r9d
.L17:
	cmpl	%eax, %r9d
	jle	.L20
	movl	(%rdi,%rax,4), %ecx
	movl	4(%rdi,%rax,4), %r8d
	cmpl	%r8d, %ecx
	jle	.L15
	movl	%r8d, (%rdi,%rax,4)
	movl	%ecx, 4(%rdi,%rax,4)
.L15:
	incq	%rax
	jmp	.L17
.L20:
	incl	%edx
	jmp	.L14
.L19:
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z10bubbleSortPii, .-_Z10bubbleSortPii
	.globl	_Z35__device_stub__Z11oddevenSortPiiiRiPiiiS_
	.type	_Z35__device_stub__Z11oddevenSortPiiiRiPiiiS_, @function
_Z35__device_stub__Z11oddevenSortPiiiRiPiiiS_:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11oddevenSortPiiiRi(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L21:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z35__device_stub__Z11oddevenSortPiiiRiPiiiS_, .-_Z35__device_stub__Z11oddevenSortPiiiRiPiiiS_
	.globl	_Z11oddevenSortPiiiRi
	.type	_Z11oddevenSortPiiiRi, @function
_Z11oddevenSortPiiiRi:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z11oddevenSortPiiiRiPiiiS_
	.cfi_endproc
.LFE2056:
	.size	_Z11oddevenSortPiiiRi, .-_Z11oddevenSortPiiiRi
	.section	.rodata.str1.1
.LC2:
	.string	"GPU time:%fms\n"
.LC3:
	.string	"CPU time:%fms\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$40960, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %r14
	call	malloc@PLT
	movl	$40960, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$10240, %esi
	movq	%rbx, %rdi
	movq	%rax, %rbp
	call	_Z4initPii
	leaq	16(%rsp), %rdi
	movl	$40960, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$40960, %edx
	call	cudaMemcpy@PLT
	movl	$2147483653, %eax
	movl	$1, 12(%rsp)
	addq	%rax, %rax
	movl	$1, 40(%rsp)
	movq	%rax, 32(%rsp)
	addq	$502, %rax
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	clock@PLT
	movq	%rax, %r13
.L27:
	movl	%r12d, %eax
	orl	12(%rsp), %eax
	je	.L32
	movq	24(%rsp), %rdi
	xorl	%eax, %eax
	movl	$1, %ecx
	movq	%r14, %rsi
	movl	$4, %edx
	movl	%eax, 12(%rsp)
	call	cudaMemcpy@PLT
	movl	52(%rsp), %ecx
	movl	40(%rsp), %esi
	xorl	%r9d, %r9d
	movq	44(%rsp), %rdx
	movq	32(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdi
	movl	%r12d, %edx
	movl	$10240, %esi
	call	_Z35__device_stub__Z11oddevenSortPiiiRiPiiiS_
.L28:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	movq	%r14, %rdi
	xorl	$1, %r12d
	call	cudaMemcpy@PLT
	jmp	.L27
.L32:
	call	clock@PLT
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$40960, %edx
	movq	%rax, %r12
	call	cudaMemcpy@PLT
	movq	%r12, %rdi
	movq	%r13, %rsi
	call	difftime@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	call	clock@PLT
	movl	$10240, %esi
	movq	%rbx, %rdi
	movq	%rax, %r12
	call	_Z10bubbleSortPii
	call	clock@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	difftime@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z11oddevenSortPiiiRi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z11oddevenSortPiiiRi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<stdlib.h>
#include<stdio.h>
#include<time.h>
__global__ void oddevenSort(int *d_in,int size,int oe_flag,int &d_ch_flag){
	int idx = threadIdx.x+blockIdx.x*blockDim.x;
	int p = 2*idx+oe_flag;
	if(p+1<size){
		if(d_in[p]>d_in[p+1]){
			int temp = d_in[p];
			d_in[p] = d_in[p+1];
			d_in[p+1] = temp;
			d_ch_flag = 1;
		}
	}
}
void init(int *p,const int size){
	srand((unsigned int)time(NULL));
	for(int i=0;i<size;i++){
		p[i] = rand()%size;
	}
}
void show(int *p,const int size){
	for(int i=0;i<size;i++){
		printf("%d ",p[i]);
	}
	printf("\n");
}
void bubbleSort(int *p,const int size){
	for(int i=0;i<size-1;i++){
		for(int j=0;j<size-i-1;j++){
			if(p[j]>p[j+1]){
				int temp = p[j];
				p[j] = p[j+1];
				p[j+1] = temp;
			}
		}
	}
}
int main(){
	int size = 10*1024;
	int *h_in;
	int *h_out;
	h_in = (int *)malloc(size*sizeof(int));
	h_out = (int *)malloc(size*sizeof(int));
	init(h_in,size);
	//show(h_in,size);
	//printf("\n");
	int *d_in;
	int *d_ch_flag;
	hipMalloc((int **)&d_in,size*sizeof(int));
	hipMalloc((int **)&d_ch_flag,sizeof(int));
	hipMemcpy(d_in,h_in,size*sizeof(int),hipMemcpyHostToDevice);
	int oe_flag = 0;//判断当前进行排序的类型
	int ch_flag = 1;//判断数组是否发生改变
	dim3 block(10);
	dim3 thread(1024/2);
	time_t t_start = clock();
	while(ch_flag||oe_flag){//偶排序和奇排序必须成对出现
		ch_flag = 0;
		hipMemcpy(d_ch_flag,&ch_flag,sizeof(int),hipMemcpyHostToDevice);
		oddevenSort<<<block,thread>>>(d_in,size,oe_flag,d_ch_flag[0]);
		hipMemcpy(&ch_flag,d_ch_flag,sizeof(int),hipMemcpyDeviceToHost);
		oe_flag = 1^oe_flag;
	}
	time_t t_end = clock();
	hipMemcpy(h_out,d_in,size*sizeof(int),hipMemcpyDeviceToHost);
	//show(h_out,size);
	printf("GPU time:%fms\n",difftime(t_end,t_start));
	t_start = clock();
	bubbleSort(h_in,size);
	t_end = clock();
	printf("CPU time:%fms\n",difftime(t_end,t_start));
	free(h_in);
	free(h_out);
	hipFree(d_in);
	hipFree(d_ch_flag);
	return 0;
}

	.text
	.file	"OddevenSort.hip"
	.globl	_Z26__device_stub__oddevenSortPiiiRi # -- Begin function _Z26__device_stub__oddevenSortPiiiRi
	.type	_Z26__device_stub__oddevenSortPiiiRi,@function
_Z26__device_stub__oddevenSortPiiiRi:   # @_Z26__device_stub__oddevenSortPiiiRi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11oddevenSortPiiiRi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__oddevenSortPiiiRi, .Lfunc_end0-_Z26__device_stub__oddevenSortPiiiRi
	.cfi_endproc
                                        # -- End function
	.globl	_Z4initPii                      # -- Begin function _Z4initPii
	.type	_Z4initPii,@function
_Z4initPii:                             # @_Z4initPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%esi, %ebx
	movq	%rdi, %r14
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	testl	%ebx, %ebx
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebx, %r15d
	xorl	%r12d, %r12d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltd
	idivl	%ebx
	movl	%edx, (%r14,%r12,4)
	incq	%r12
	cmpq	%r12, %r15
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z4initPii, .Lfunc_end1-_Z4initPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z4showPii                      # -- Begin function _Z4showPii
	.type	_Z4showPii,@function
_Z4showPii:                             # @_Z4showPii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB2_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB2_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB2_4:                                # %._crit_edge
	movl	$10, %edi
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end2:
	.size	_Z4showPii, .Lfunc_end2-_Z4showPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z10bubbleSortPii               # -- Begin function _Z10bubbleSortPii
	.type	_Z10bubbleSortPii,@function
_Z10bubbleSortPii:                      # @_Z10bubbleSortPii
	.cfi_startproc
# %bb.0:
                                        # kill: def $esi killed $esi def $rsi
	cmpl	$2, %esi
	jl	.LBB3_7
# %bb.1:                                # %.preheader.preheader
	leal	-1(%rsi), %eax
	xorl	%ecx, %ecx
	movl	%eax, %edx
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	movl	%edx, %edx
	movl	%ecx, %r8d
	subl	%esi, %r8d
	cmpl	$-2, %r8d
	jg	.LBB3_6
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	(%rdi), %r8d
	xorl	%r9d, %r9d
.LBB3_4:                                # %.lr.ph
                                        #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	4(%rdi,%r9,4), %r10d
	cmpl	%r10d, %r8d
	jle	.LBB3_5
# %bb.8:                                #   in Loop: Header=BB3_4 Depth=2
	movl	%r10d, (%rdi,%r9,4)
	movl	%r8d, 4(%rdi,%r9,4)
	jmp	.LBB3_9
.LBB3_5:                                #   in Loop: Header=BB3_4 Depth=2
	movl	%r10d, %r8d
.LBB3_9:                                #   in Loop: Header=BB3_4 Depth=2
	incq	%r9
	cmpq	%r9, %rdx
	jne	.LBB3_4
.LBB3_6:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	incl	%ecx
	decl	%edx
	cmpl	%eax, %ecx
	jne	.LBB3_2
.LBB3_7:                                # %._crit_edge24
	retq
.Lfunc_end3:
	.size	_Z10bubbleSortPii, .Lfunc_end3-_Z10bubbleSortPii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967306, %r15               # imm = 0x10000000A
	movl	$40960, %edi                    # imm = 0xA000
	callq	malloc
	movq	%rax, %rbx
	movl	$40960, %edi                    # imm = 0xA000
	callq	malloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	movl	$10240, %esi                    # imm = 0x2800
	callq	_Z4initPii
	leaq	24(%rsp), %r14
	movl	$40960, %esi                    # imm = 0xA000
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$40960, %edx                    # imm = 0xA000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	xorl	%r13d, %r13d
	callq	clock
	movq	%rax, %r12
	leaq	12(%rsp), %rbp
	leaq	502(%r15), %r14
.LBB4_1:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$0, 12(%rsp)
	movq	16(%rsp), %rdi
	movl	$4, %edx
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_3
# %bb.2:                                #   in Loop: Header=BB4_1 Depth=1
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rcx
	movl	$10240, %esi                    # imm = 0x2800
	movl	%r13d, %edx
	callq	_Z26__device_stub__oddevenSortPiiiRi
.LBB4_3:                                #   in Loop: Header=BB4_1 Depth=1
	movq	16(%rsp), %rsi
	movl	$4, %edx
	movq	%rbp, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	$1, %r13d
	movl	12(%rsp), %eax
	orl	%r13d, %eax
	jne	.LBB4_1
# %bb.4:                                # %._crit_edge
	callq	clock
	movq	%rax, %r14
	movq	24(%rsp), %rsi
	movl	$40960, %edx                    # imm = 0xA000
	movq	32(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	difftime
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	xorl	%r15d, %r15d
	movl	$10239, %r12d                   # imm = 0x27FF
	callq	clock
	movq	%rax, %r14
.LBB4_5:                                # %.lr.ph.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_6 Depth 2
	movl	(%rbx), %eax
	xorl	%ecx, %ecx
.LBB4_6:                                # %.lr.ph.i
                                        #   Parent Loop BB4_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	4(%rbx,%rcx,4), %edx
	cmpl	%edx, %eax
	jle	.LBB4_7
# %bb.8:                                #   in Loop: Header=BB4_6 Depth=2
	movl	%edx, (%rbx,%rcx,4)
	movl	%eax, 4(%rbx,%rcx,4)
	jmp	.LBB4_9
.LBB4_7:                                #   in Loop: Header=BB4_6 Depth=2
	movl	%edx, %eax
.LBB4_9:                                #   in Loop: Header=BB4_6 Depth=2
	incq	%rcx
	cmpq	%rcx, %r12
	jne	.LBB4_6
# %bb.10:                               # %._crit_edge.i
                                        #   in Loop: Header=BB4_5 Depth=1
	incl	%r15d
	decq	%r12
	cmpl	$10239, %r15d                   # imm = 0x27FF
	jne	.LBB4_5
# %bb.11:                               # %_Z10bubbleSortPii.exit
	callq	clock
	movq	%rax, %rdi
	movq	%r14, %rsi
	callq	difftime
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11oddevenSortPiiiRi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11oddevenSortPiiiRi,@object   # @_Z11oddevenSortPiiiRi
	.section	.rodata,"a",@progbits
	.globl	_Z11oddevenSortPiiiRi
	.p2align	3, 0x0
_Z11oddevenSortPiiiRi:
	.quad	_Z26__device_stub__oddevenSortPiiiRi
	.size	_Z11oddevenSortPiiiRi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d "
	.size	.L.str, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"GPU time:%fms\n"
	.size	.L.str.2, 15

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"CPU time:%fms\n"
	.size	.L.str.3, 15

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11oddevenSortPiiiRi"
	.size	.L__unnamed_1, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__oddevenSortPiiiRi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11oddevenSortPiiiRi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11oddevenSortPiiiRi   ; -- Begin function _Z11oddevenSortPiiiRi
	.globl	_Z11oddevenSortPiiiRi
	.p2align	8
	.type	_Z11oddevenSortPiiiRi,@function
_Z11oddevenSortPiiiRi:                  ; @_Z11oddevenSortPiiiRi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_lshl_add_u32 v0, v1, 1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, 1, v0
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_3
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b64 v[2:3], v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v2, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_3
; %bb.2:
	s_load_b64 s[0:1], s[0:1], 0x10
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, v2
	v_mov_b32_e32 v2, 1
	global_store_b64 v[0:1], v[3:4], off
	s_waitcnt lgkmcnt(0)
	global_store_b32 v5, v2, s[0:1]
.LBB0_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11oddevenSortPiiiRi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11oddevenSortPiiiRi, .Lfunc_end0-_Z11oddevenSortPiiiRi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 192
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11oddevenSortPiiiRi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11oddevenSortPiiiRi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
