#include <stdio.h>
#include <ctime>
#include <stdlib.h>
#include <sys/time.h>
 
// Thread block size
#define BLOCK_SIZE 16
#define TILE_SIZE 32 

#define ROW 1024
#define COL 1024

// GPU Functions
void MM_Basic(float *a, float *b, float *c, int row, int col, int k);
__global__ void MM_Basic_kernel( float *devA, float *devB, float *devC, int row, int col, int k);

void MM_Improved(float *a, float *b, float *c, int row, int col, int k);
__global__ void MM_Improved_kernel( float *devA, float *devB, float *devC, int row, int col, int k);

/*
 * Main function
 */
int main(int argC, char** argV) {
        
        //
        // Setup
        //////////////////

	// Time Variables
	float time;
	cudaEvent_t start, stop;
	cudaEventCreate (&start);
	cudaEventCreate (&stop);
	
	// Matrices
	float *a, *b;
        float *c_cpu, *c_gpu_basic, *c_gpu_improved;
		
	//Setting matrix parameters.
	int row = ROW;
	int col = COL;
	int   k = COL;
	int sum = 0;
	
	// Process input arguments (if specified)
	switch (argC) {
		case 2: {
	                row = atoi(argV[1]);
        	        col = row;
                	  k = col;
			break;
		}
		case 3: {
			row = atoi(argV[1]);
			col = atoi(argV[2]);
			  k = col;
			break;
		}
		default: {
			//Nothing
		}
	}
	
	//Setting host memory space.
	a               = (float *) malloc(row*k*sizeof(float));
	b               = (float *) malloc(k*col*sizeof(float));
	c_cpu           = (float *) malloc(row*col*sizeof(float));
	c_gpu_basic     = (float *) malloc(row*col*sizeof(float));
	c_gpu_improved  = (float *) malloc(row*col*sizeof(float));
	
	//Initializing [A] and [B] with random values from 1 to 10, and C to 0
	printf ("Initializing Matricies, could take some time...\n");
	for(int i = 0 ; i < row ; i++ ){
		for(int j = 0 ; j < k ; j++ ){
			a[i*k+j] = rand()%10;
		}
	}
	for(int i = 0 ; i < k ; i++ ){
		for(int j = 0 ; j < col ; j++ ){
			b[i*col+j] = rand()%10;
		}
	}
	for(int i = 0 ; i < k ; i++ ){
		for(int j = 0 ; j < col ; j++ ){
			c_cpu           [i*col+j] = 0;
			c_gpu_basic     [i*col+j] = 0;
			c_gpu_improved  [i*col+j] = 0;
		}
	}

        //
        // CPU Calculation
        //////////////////
        
	printf("Running sequential job.\n");
	cudaEventRecord(start,0);
	for(int i = 0 ; i < row ; i++ ){
		for(int j = 0 ; j < col ; j++ ){
			sum = 0;
			for(int w = 0 ; w < k ; w++ ){
				sum += a[i*k+w] * b[w*col+j];
			}
			c_cpu[i*col+j] = sum;
		}
	}
	cudaEventRecord(stop,0);
	cudaEventSynchronize(stop);
	cudaEventElapsedTime(&time, start, stop);
	printf("\tSequential Job Time: %.2f ms\n", time);

	//
        // Basic GPU Calculation
        ////////////////////////
        
	printf("Running Basic parallel job.\n");
	
	cudaEventRecord(start,0);
	MM_Basic(a, b, c_gpu_basic, row, col, k);
	cudaEventRecord(stop,0);
	cudaEventSynchronize(stop);

	cudaEventElapsedTime(&time, start, stop);
	printf("\tBasic Parallel Job Time: %.2f ms\n", time);

	// Compares matrices to make sure answer is correct, initializes c for next kernel.
	bool error = false;
	for(int i = 0 ; i < k ; i++ ){
		for(int j = 0 ; j < col ; j++ ){
			if (c_cpu[i*col+j] != c_gpu_basic[i*col+j]) {
				printf("\tError: Starting at [%d][%d]\n", i, j);
				error = true;
			}
			if (error) break;
		}
		if (error) break;
	}
	if (!error) printf("\tNo errors found.\n");
	
        //
        // Improved GPU Calculation
        ////////////////////////
        
	printf("Running Improved parallel job.\n");
	
	cudaEventRecord(start,0);
	MM_Improved(a, b, c_gpu_improved, row, col, k);
	cudaEventRecord(stop,0);
	cudaEventSynchronize(stop);

	cudaEventElapsedTime(&time, start, stop);
	printf("\tImproved Parallel Job Time: %.2f ms\n", time);

	// Compares matrices to make sure answer is correct, initializes c for next kernel.
	error = false;
	for(int i = 0 ; i < k ; i++ ){
		for(int j = 0 ; j < col ; j++ ){
			if (c_cpu[i*col+j] != c_gpu_improved[i*col+j]) {
				printf("\tError: Starting at [%d][%d]\n", i, j);
				error = true;
			}
			if (error) break;
		}
		if (error) break;
	}
	if (!error) printf("\tNo errors found.\n");

        free (a);
        free (b);
        free (c_cpu);
        free (c_gpu_basic);
        free (c_gpu_improved);
}

void MM_Basic(float *a, float *b, float *c, int row, int col, int k) {
	
	cudaEvent_t kernelstart, kernelstop;
	float time;
	cudaEventCreate (&kernelstart);
	cudaEventCreate (&kernelstop);
	
	int sizeA = row*k*sizeof(float);
	int sizeB = k*col*sizeof(float);
	int sizeC = row*col*sizeof(float);
	float *devA, *devB, *devC;
	
	cudaMalloc((void**)&devA, sizeA);
	cudaMalloc((void**)&devB, sizeB);
	cudaMalloc((void**)&devC, sizeC);
	
	cudaMemcpy(devA, a, sizeA, cudaMemcpyHostToDevice);
	cudaMemcpy(devB, b, sizeB, cudaMemcpyHostToDevice);
	
	dim3 dimBlock(16, 16, 1);
	dim3 dimGrid((COL+dimBlock.x-1)/dimBlock.x, (ROW+dimBlock.y-1)/dimBlock.y, 1);
	
	cudaEventRecord(kernelstart,0);
	MM_Basic_kernel<<<dimGrid, dimBlock>>>(devA, devB, devC, row, col, k);
	cudaEventRecord(kernelstop,0);
	cudaEventSynchronize(kernelstop);

	cudaEventElapsedTime(&time, kernelstart, kernelstop);
	printf("\tKernel Job Time: %.2f ms\n", time);
	
	cudaMemcpy(c, devC, sizeC, cudaMemcpyDeviceToHost);
	
	//Freeing device matrices.
	cudaFree(devA); cudaFree(devB); cudaFree(devC);
}

__global__ void MM_Basic_kernel( float *devA, float *devB, float *devC, int row, int col, int k) {
	int txID = blockIdx.x * blockDim.x + threadIdx.x;
	int tyID = blockIdx.y * blockDim.y + threadIdx.y;
	
	if ((txID < col) && (tyID < row)) {
		float Pvalue = 0;
		for(int w = 0 ; w < k ; w++) {
			Pvalue += devA[tyID*k+w] * devB[w*k+txID];
		}
		devC[tyID*k+txID] = Pvalue;
	}
}

void MM_Improved(float *a, float *b, float *c, int row, int col, int k){

        // Write Code here
        cudaEvent_t kernelstart, kernelstop;
        float time;
        cudaEventCreate (&kernelstart);
        cudaEventCreate (&kernelstop);

        int sizeA = row*k*sizeof(float);
        int sizeB = k*col*sizeof(float);
        int sizeC = row*col*sizeof(float);
        float *devA, *devB, *devC;

        cudaMalloc((void**)&devA, sizeA);
        cudaMalloc((void**)&devB, sizeB);
        cudaMalloc((void**)&devC, sizeC);

        cudaMemcpy(devA, a, sizeA, cudaMemcpyHostToDevice);
        cudaMemcpy(devB, b, sizeB, cudaMemcpyHostToDevice);

        dim3 dimBlock(32, 32, 1);
        dim3 dimGrid((COL+dimBlock.x-1)/dimBlock.x, (ROW+dimBlock.y-1)/dimBlock.y, 1);

        cudaEventRecord(kernelstart,0);
        MM_Basic_kernel<<<dimGrid, dimBlock>>>(devA, devB, devC, row, col, k);
        cudaEventRecord(kernelstop,0);
        cudaEventSynchronize(kernelstop);

        cudaEventElapsedTime(&time, kernelstart, kernelstop);
        printf("\tKernel Job Time: %.2f ms\n", time);

        cudaMemcpy(c, devC, sizeC, cudaMemcpyDeviceToHost);

        //Freeing device matrices.
        cudaFree(devA); cudaFree(devB); cudaFree(devC);

        
}
__global__ void MM_Improved_kernel( float *devA, float *devB, float *devC, int row, int col, int k){
        // Write Code here
	
	__shared__ int shareBlockA[TILE_SIZE][TILE_SIZE];
	__shared__ int shareBlockB[TILE_SIZE][TILE_SIZE];

	int bx = blockIdx.x;
	int by = blockIdx.y;
	int tx = threadIdx.x;
	int ty = threadIdx.y;
	int Row = by * TILE_SIZE + ty;
	int Col = bx * TILE_SIZE + tx;
	
	float Cvalue = 0;
        for (int m = 0; m < row/TILE_SIZE; ++m) {
          shareBlockA[ty][tx] = devA[Row * row + (m*TILE_SIZE + tx)];
	      shareBlockB[ty][tx] = devB[Col + (m * TILE_SIZE + ty) * row];
	      __syncthreads();
	      for (int k = 0; k < TILE_SIZE; ++k)
 		    Cvalue += shareBlockA[ty][k] * shareBlockB[k][tx];
	      __syncthreads();
      }
      devC[Row*row+Col] = Cvalue;
} 

	.file	"tmpxft_003ad560_00000000-6_MatrixMul.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z42__device_stub__Z15MM_Basic_kernelPfS_S_iiiPfS_S_iii
	.type	_Z42__device_stub__Z15MM_Basic_kernelPfS_S_iiiPfS_S_iii, @function
_Z42__device_stub__Z15MM_Basic_kernelPfS_S_iiiPfS_S_iii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15MM_Basic_kernelPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z42__device_stub__Z15MM_Basic_kernelPfS_S_iiiPfS_S_iii, .-_Z42__device_stub__Z15MM_Basic_kernelPfS_S_iiiPfS_S_iii
	.globl	_Z15MM_Basic_kernelPfS_S_iii
	.type	_Z15MM_Basic_kernelPfS_S_iii, @function
_Z15MM_Basic_kernelPfS_S_iii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z15MM_Basic_kernelPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2055:
	.size	_Z15MM_Basic_kernelPfS_S_iii, .-_Z15MM_Basic_kernelPfS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\tKernel Job Time: %.2f ms\n"
	.text
	.globl	_Z8MM_BasicPfS_S_iii
	.type	_Z8MM_BasicPfS_S_iii, @function
_Z8MM_BasicPfS_S_iii:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r9d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r8d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%r13d, %ebx
	imull	%r12d, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdi
	sall	$2, %ebx
	movslq	%ebx, %rbx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	cudaEventCreate@PLT
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	%ebp, %edx
	leaq	56(%rsp), %rdi
	imull	%r13d, %edx
	sall	$2, %edx
	movslq	%edx, %rdx
	movq	%rdx, %rsi
	movq	%rdx, 24(%rsp)
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movl	%ebp, %eax
	leaq	72(%rsp), %rdi
	imull	%r12d, %eax
	sall	$2, %eax
	cltq
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdx
	movq	56(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	64(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	movabsq	$274877907008, %rax
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	cudaEventRecord@PLT
	movq	92(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	100(%rsp), %esi
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	%r13d, %r9d
	movl	%r12d, %r8d
	movq	56(%rsp), %rdi
	movl	%ebp, %ecx
	call	_Z42__device_stub__Z15MM_Basic_kernelPfS_S_iiiPfS_S_iii
.L9:
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	48(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	leaq	36(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	36(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rdx
	movq	72(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z8MM_BasicPfS_S_iii, .-_Z8MM_BasicPfS_S_iii
	.globl	_Z11MM_ImprovedPfS_S_iii
	.type	_Z11MM_ImprovedPfS_S_iii, @function
_Z11MM_ImprovedPfS_S_iii:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r9d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r8d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%r13d, %ebx
	imull	%r12d, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdi
	sall	$2, %ebx
	movslq	%ebx, %rbx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	cudaEventCreate@PLT
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	%ebp, %edx
	leaq	56(%rsp), %rdi
	imull	%r13d, %edx
	sall	$2, %edx
	movslq	%edx, %rdx
	movq	%rdx, %rsi
	movq	%rdx, 24(%rsp)
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	leaq	64(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%ebp, %eax
	leaq	72(%rsp), %rdi
	imull	%r12d, %eax
	sall	$2, %eax
	cltq
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdx
	movq	56(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	64(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movabsq	$137438953504, %rbx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbx, 92(%rsp)
	movl	$1, 100(%rsp)
	call	cudaEventRecord@PLT
	movq	92(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	100(%rsp), %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	%r13d, %r9d
	movl	%r12d, %r8d
	movq	56(%rsp), %rdi
	movl	%ebp, %ecx
	call	_Z42__device_stub__Z15MM_Basic_kernelPfS_S_iiiPfS_S_iii
.L13:
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	48(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	leaq	36(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	36(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rdx
	movq	72(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z11MM_ImprovedPfS_S_iii, .-_Z11MM_ImprovedPfS_S_iii
	.section	.rodata.str1.1
.LC1:
	.string	"Initializing Matricies, could take some time...\n"
.LC2:
	.string	"Running sequential job.\n"
.LC3:
	.string	"\tSequential Job Time: %.2f ms\n"
.LC4:
	.string	"Running Basic parallel job.\n"
.LC5:
	.string	"\tBasic Parallel Job Time: %.2f ms\n"
.LC6:
	.string	"\tError: Starting at [%d][%d]\n"
.LC7:
	.string	"\tNo errors found.\n"
.LC8:
	.string	"Running Improved parallel job.\n"
.LC9:
	.string	"\tImproved Parallel Job Time: %.2f ms\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	cmpl	$2, %ebp
	je	.L17
	cmpl	$3, %ebp
	je	.L18
	movl	$1024, %ebx
	movl	$1024, %ebp
	jmp	.L19
.L17:
	movq	8(%rbx), %rdi
	call	atoi@PLT
	movl	%eax, %ebp
	movl	%eax, %ebx
	jmp	.L19
.L18:
	movq	8(%rbx), %rdi
	call	atoi@PLT
	movq	16(%rbx), %rdi
	movl	%eax, %ebp
	call	atoi@PLT
	movl	%eax, %ebx
.L19:
	movl	%ebp, %r12d
	imull	%ebx, %r12d
	movslq	%r12d, %r12
	salq	$2, %r12
	movq	%r12, %rdi
	call	malloc@PLT
	movl	%ebx, %edi
	imull	%ebx, %edi
	movq	%rax, %r14
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movq	%r12, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	%r12, %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movq	%r12, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%ecx, %ecx
	xorl	%esi, %esi
.L20:
	cmpl	%esi, %ebp
	jle	.L22
	movslq	%ecx, %rax
	xorl	%r15d, %r15d
	leaq	(%r14,%rax,4), %r12
.L23:
	cmpl	%r15d, %ebx
	jle	.L54
	movl	%ecx, 40(%rsp)
	movl	%esi, 32(%rsp)
	call	rand@PLT
	movl	$10, %ecx
	movl	32(%rsp), %esi
	cltd
	idivl	%ecx
	movl	40(%rsp), %ecx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%r12,%r15,4)
	incq	%r15
	jmp	.L23
.L54:
	incl	%esi
	addl	%ebx, %ecx
	jmp	.L20
.L22:
	movslq	%ebx, %r12
	movq	8(%rsp), %rcx
	xorl	%r15d, %r15d
	salq	$2, %r12
.L24:
	cmpl	%r15d, %ebx
	jle	.L55
	leaq	(%rcx,%r12), %rdi
.L25:
	movq	%rdi, 40(%rsp)
	movq	%rcx, 32(%rsp)
	call	rand@PLT
	movl	$10, %ecx
	movq	40(%rsp), %rdi
	cltd
	idivl	%ecx
	movq	32(%rsp), %rcx
	addq	$4, %rcx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, -4(%rcx)
	cmpq	%rdi, %rcx
	jne	.L25
	incl	%r15d
	jmp	.L24
.L55:
	leal	-1(%rbx), %eax
	movq	16(%rsp), %r8
	movq	24(%rsp), %r9
	movq	%r13, %rsi
	leaq	4(,%rax,4), %rdx
	xorl	%r10d, %r10d
	xorl	%eax, %eax
.L27:
	cmpl	%r10d, %ebx
	jle	.L56
	movq	%rsi, %rdi
	movq	%rdx, %rcx
	incl	%r10d
	addq	%r12, %rsi
	rep stosb
	movq	%r8, %rdi
	movq	%rdx, %rcx
	addq	%r12, %r8
	rep stosb
	movq	%r9, %rdi
	movq	%rdx, %rcx
	addq	%r12, %r9
	rep stosb
	jmp	.L27
.L56:
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	xorl	%esi, %esi
	xorl	%edi, %edi
.L29:
	cmpl	%edi, %ebp
	jle	.L32
	movslq	%esi, %rax
	salq	$2, %rax
	leaq	(%r14,%rax), %r9
	leaq	0(%r13,%rax), %rdx
	xorl	%eax, %eax
.L33:
	cmpl	%eax, %ebx
	jle	.L57
	movq	8(%rsp), %rcx
	xorl	%r8d, %r8d
	leaq	(%rcx,%rax,4), %r10
	xorl	%ecx, %ecx
.L30:
	movss	(%r9,%rcx,4), %xmm0
	mulss	(%r10), %xmm0
	incq	%rcx
	addq	%r12, %r10
	cvtsi2ssl	%r8d, %xmm1
	addss	%xmm1, %xmm0
	cvttss2sil	%xmm0, %r8d
	cmpl	%ecx, %ebx
	jg	.L30
	cvtsi2ssl	%r8d, %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	jmp	.L33
.L57:
	incl	%edi
	addl	%ebx, %esi
	jmp	.L29
.L32:
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	leaq	52(%rsp), %r15
	call	cudaEventRecord@PLT
	movq	64(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	%r15, %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	52(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC4(%rip), %rsi
	call	__printf_chk@PLT
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	16(%rsp), %rdx
	movl	%ebx, %r9d
	movl	%ebx, %r8d
	movq	8(%rsp), %rsi
	movl	%ebp, %ecx
	movq	%r14, %rdi
	call	_Z8MM_BasicPfS_S_iii
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	64(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	%r15, %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	52(%rsp), %xmm0
	call	__printf_chk@PLT
	xorl	%esi, %esi
	xorl	%edx, %edx
.L34:
	cmpl	%edx, %ebx
	jle	.L58
	movq	%rsi, %rax
	xorl	%ecx, %ecx
.L38:
	movq	16(%rsp), %rdi
	movss	0(%r13,%rax), %xmm0
	ucomiss	(%rdi,%rax), %xmm0
	jp	.L47
	je	.L35
.L47:
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L37
.L35:
	incl	%ecx
	addq	$4, %rax
	cmpl	%ecx, %ebx
	jne	.L38
	incl	%edx
	addq	%r12, %rsi
	jmp	.L34
.L58:
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L37:
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdx
	movl	%ebx, %r9d
	movl	%ebx, %r8d
	movq	8(%rsp), %rsi
	movl	%ebp, %ecx
	movq	%r14, %rdi
	call	_Z11MM_ImprovedPfS_S_iii
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	64(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	%r15, %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	52(%rsp), %xmm0
	call	__printf_chk@PLT
	xorl	%esi, %esi
	xorl	%edx, %edx
.L39:
	cmpl	%edx, %ebx
	jle	.L59
	movq	%rsi, %rax
	xorl	%ecx, %ecx
.L43:
	movq	24(%rsp), %rdi
	movss	0(%r13,%rax), %xmm0
	ucomiss	(%rdi,%rax), %xmm0
	jp	.L48
	je	.L40
.L48:
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L42
.L40:
	incl	%ecx
	addq	$4, %rax
	cmpl	%ecx, %ebx
	jne	.L43
	incl	%edx
	addq	%r12, %rsi
	jmp	.L39
.L59:
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L42:
	movq	%r14, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.text
	.globl	_Z45__device_stub__Z18MM_Improved_kernelPfS_S_iiiPfS_S_iii
	.type	_Z45__device_stub__Z18MM_Improved_kernelPfS_S_iiiPfS_S_iii, @function
_Z45__device_stub__Z18MM_Improved_kernelPfS_S_iiiPfS_S_iii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L60
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z18MM_Improved_kernelPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L60:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L62
	call	__stack_chk_fail@PLT
.L62:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z45__device_stub__Z18MM_Improved_kernelPfS_S_iiiPfS_S_iii, .-_Z45__device_stub__Z18MM_Improved_kernelPfS_S_iiiPfS_S_iii
	.globl	_Z18MM_Improved_kernelPfS_S_iii
	.type	_Z18MM_Improved_kernelPfS_S_iii, @function
_Z18MM_Improved_kernelPfS_S_iii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z18MM_Improved_kernelPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2057:
	.size	_Z18MM_Improved_kernelPfS_S_iii, .-_Z18MM_Improved_kernelPfS_S_iii
	.section	.rodata.str1.1
.LC10:
	.string	"_Z18MM_Improved_kernelPfS_S_iii"
.LC11:
	.string	"_Z15MM_Basic_kernelPfS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z18MM_Improved_kernelPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15MM_Basic_kernelPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <ctime>
#include <stdlib.h>
#include <sys/time.h>
 
// Thread block size
#define BLOCK_SIZE 16
#define TILE_SIZE 32 

#define ROW 1024
#define COL 1024

// GPU Functions
void MM_Basic(float *a, float *b, float *c, int row, int col, int k);
__global__ void MM_Basic_kernel( float *devA, float *devB, float *devC, int row, int col, int k);

void MM_Improved(float *a, float *b, float *c, int row, int col, int k);
__global__ void MM_Improved_kernel( float *devA, float *devB, float *devC, int row, int col, int k);

/*
 * Main function
 */
int main(int argC, char** argV) {
        
        //
        // Setup
        //////////////////

	// Time Variables
	float time;
	hipEvent_t start, stop;
	hipEventCreate (&start);
	hipEventCreate (&stop);
	
	// Matrices
	float *a, *b;
        float *c_cpu, *c_gpu_basic, *c_gpu_improved;
		
	//Setting matrix parameters.
	int row = ROW;
	int col = COL;
	int   k = COL;
	int sum = 0;
	
	// Process input arguments (if specified)
	switch (argC) {
		case 2: {
	                row = atoi(argV[1]);
        	        col = row;
                	  k = col;
			break;
		}
		case 3: {
			row = atoi(argV[1]);
			col = atoi(argV[2]);
			  k = col;
			break;
		}
		default: {
			//Nothing
		}
	}
	
	//Setting host memory space.
	a               = (float *) malloc(row*k*sizeof(float));
	b               = (float *) malloc(k*col*sizeof(float));
	c_cpu           = (float *) malloc(row*col*sizeof(float));
	c_gpu_basic     = (float *) malloc(row*col*sizeof(float));
	c_gpu_improved  = (float *) malloc(row*col*sizeof(float));
	
	//Initializing [A] and [B] with random values from 1 to 10, and C to 0
	printf ("Initializing Matricies, could take some time...\n");
	for(int i = 0 ; i < row ; i++ ){
		for(int j = 0 ; j < k ; j++ ){
			a[i*k+j] = rand()%10;
		}
	}
	for(int i = 0 ; i < k ; i++ ){
		for(int j = 0 ; j < col ; j++ ){
			b[i*col+j] = rand()%10;
		}
	}
	for(int i = 0 ; i < k ; i++ ){
		for(int j = 0 ; j < col ; j++ ){
			c_cpu           [i*col+j] = 0;
			c_gpu_basic     [i*col+j] = 0;
			c_gpu_improved  [i*col+j] = 0;
		}
	}

        //
        // CPU Calculation
        //////////////////
        
	printf("Running sequential job.\n");
	hipEventRecord(start,0);
	for(int i = 0 ; i < row ; i++ ){
		for(int j = 0 ; j < col ; j++ ){
			sum = 0;
			for(int w = 0 ; w < k ; w++ ){
				sum += a[i*k+w] * b[w*col+j];
			}
			c_cpu[i*col+j] = sum;
		}
	}
	hipEventRecord(stop,0);
	hipEventSynchronize(stop);
	hipEventElapsedTime(&time, start, stop);
	printf("\tSequential Job Time: %.2f ms\n", time);

	//
        // Basic GPU Calculation
        ////////////////////////
        
	printf("Running Basic parallel job.\n");
	
	hipEventRecord(start,0);
	MM_Basic(a, b, c_gpu_basic, row, col, k);
	hipEventRecord(stop,0);
	hipEventSynchronize(stop);

	hipEventElapsedTime(&time, start, stop);
	printf("\tBasic Parallel Job Time: %.2f ms\n", time);

	// Compares matrices to make sure answer is correct, initializes c for next kernel.
	bool error = false;
	for(int i = 0 ; i < k ; i++ ){
		for(int j = 0 ; j < col ; j++ ){
			if (c_cpu[i*col+j] != c_gpu_basic[i*col+j]) {
				printf("\tError: Starting at [%d][%d]\n", i, j);
				error = true;
			}
			if (error) break;
		}
		if (error) break;
	}
	if (!error) printf("\tNo errors found.\n");
	
        //
        // Improved GPU Calculation
        ////////////////////////
        
	printf("Running Improved parallel job.\n");
	
	hipEventRecord(start,0);
	MM_Improved(a, b, c_gpu_improved, row, col, k);
	hipEventRecord(stop,0);
	hipEventSynchronize(stop);

	hipEventElapsedTime(&time, start, stop);
	printf("\tImproved Parallel Job Time: %.2f ms\n", time);

	// Compares matrices to make sure answer is correct, initializes c for next kernel.
	error = false;
	for(int i = 0 ; i < k ; i++ ){
		for(int j = 0 ; j < col ; j++ ){
			if (c_cpu[i*col+j] != c_gpu_improved[i*col+j]) {
				printf("\tError: Starting at [%d][%d]\n", i, j);
				error = true;
			}
			if (error) break;
		}
		if (error) break;
	}
	if (!error) printf("\tNo errors found.\n");

        free (a);
        free (b);
        free (c_cpu);
        free (c_gpu_basic);
        free (c_gpu_improved);
}

void MM_Basic(float *a, float *b, float *c, int row, int col, int k) {
	
	hipEvent_t kernelstart, kernelstop;
	float time;
	hipEventCreate (&kernelstart);
	hipEventCreate (&kernelstop);
	
	int sizeA = row*k*sizeof(float);
	int sizeB = k*col*sizeof(float);
	int sizeC = row*col*sizeof(float);
	float *devA, *devB, *devC;
	
	hipMalloc((void**)&devA, sizeA);
	hipMalloc((void**)&devB, sizeB);
	hipMalloc((void**)&devC, sizeC);
	
	hipMemcpy(devA, a, sizeA, hipMemcpyHostToDevice);
	hipMemcpy(devB, b, sizeB, hipMemcpyHostToDevice);
	
	dim3 dimBlock(16, 16, 1);
	dim3 dimGrid((COL+dimBlock.x-1)/dimBlock.x, (ROW+dimBlock.y-1)/dimBlock.y, 1);
	
	hipEventRecord(kernelstart,0);
	MM_Basic_kernel<<<dimGrid, dimBlock>>>(devA, devB, devC, row, col, k);
	hipEventRecord(kernelstop,0);
	hipEventSynchronize(kernelstop);

	hipEventElapsedTime(&time, kernelstart, kernelstop);
	printf("\tKernel Job Time: %.2f ms\n", time);
	
	hipMemcpy(c, devC, sizeC, hipMemcpyDeviceToHost);
	
	//Freeing device matrices.
	hipFree(devA); hipFree(devB); hipFree(devC);
}

__global__ void MM_Basic_kernel( float *devA, float *devB, float *devC, int row, int col, int k) {
	int txID = blockIdx.x * blockDim.x + threadIdx.x;
	int tyID = blockIdx.y * blockDim.y + threadIdx.y;
	
	if ((txID < col) && (tyID < row)) {
		float Pvalue = 0;
		for(int w = 0 ; w < k ; w++) {
			Pvalue += devA[tyID*k+w] * devB[w*k+txID];
		}
		devC[tyID*k+txID] = Pvalue;
	}
}

void MM_Improved(float *a, float *b, float *c, int row, int col, int k){

        // Write Code here
        hipEvent_t kernelstart, kernelstop;
        float time;
        hipEventCreate (&kernelstart);
        hipEventCreate (&kernelstop);

        int sizeA = row*k*sizeof(float);
        int sizeB = k*col*sizeof(float);
        int sizeC = row*col*sizeof(float);
        float *devA, *devB, *devC;

        hipMalloc((void**)&devA, sizeA);
        hipMalloc((void**)&devB, sizeB);
        hipMalloc((void**)&devC, sizeC);

        hipMemcpy(devA, a, sizeA, hipMemcpyHostToDevice);
        hipMemcpy(devB, b, sizeB, hipMemcpyHostToDevice);

        dim3 dimBlock(32, 32, 1);
        dim3 dimGrid((COL+dimBlock.x-1)/dimBlock.x, (ROW+dimBlock.y-1)/dimBlock.y, 1);

        hipEventRecord(kernelstart,0);
        MM_Basic_kernel<<<dimGrid, dimBlock>>>(devA, devB, devC, row, col, k);
        hipEventRecord(kernelstop,0);
        hipEventSynchronize(kernelstop);

        hipEventElapsedTime(&time, kernelstart, kernelstop);
        printf("\tKernel Job Time: %.2f ms\n", time);

        hipMemcpy(c, devC, sizeC, hipMemcpyDeviceToHost);

        //Freeing device matrices.
        hipFree(devA); hipFree(devB); hipFree(devC);

        
}
__global__ void MM_Improved_kernel( float *devA, float *devB, float *devC, int row, int col, int k){
        // Write Code here
	
	__shared__ int shareBlockA[TILE_SIZE][TILE_SIZE];
	__shared__ int shareBlockB[TILE_SIZE][TILE_SIZE];

	int bx = blockIdx.x;
	int by = blockIdx.y;
	int tx = threadIdx.x;
	int ty = threadIdx.y;
	int Row = by * TILE_SIZE + ty;
	int Col = bx * TILE_SIZE + tx;
	
	float Cvalue = 0;
        for (int m = 0; m < row/TILE_SIZE; ++m) {
          shareBlockA[ty][tx] = devA[Row * row + (m*TILE_SIZE + tx)];
	      shareBlockB[ty][tx] = devB[Col + (m * TILE_SIZE + ty) * row];
	      __syncthreads();
	      for (int k = 0; k < TILE_SIZE; ++k)
 		    Cvalue += shareBlockA[ty][k] * shareBlockB[k][tx];
	      __syncthreads();
      }
      devC[Row*row+Col] = Cvalue;
} 

	.text
	.file	"MatrixMul.hip"
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %r14d
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	cmpl	$3, %r14d
	je	.LBB0_3
# %bb.1:
	movl	$1024, %r13d                    # imm = 0x400
	movl	$1024, %ebp                     # imm = 0x400
	cmpl	$2, %r14d
	jne	.LBB0_5
# %bb.2:
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %r13d
	jmp	.LBB0_4
.LBB0_3:
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %r13d
	movq	16(%rbx), %rdi
	callq	atoi
.LBB0_4:
	movl	%eax, %ebp
.LBB0_5:
	movl	%ebp, %eax
	imull	%r13d, %eax
	movslq	%eax, %r12
	shlq	$2, %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movl	%ebp, %edi
	imull	%edi, %edi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	%r13d, %eax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movl	%ebp, %r15d
	movl	%r13d, 20(%rsp)                 # 4-byte Spill
	testl	%r13d, %r13d
	jle	.LBB0_11
# %bb.6:                                # %.preheader184.lr.ph
	xorl	%ebx, %ebx
	xorl	%r12d, %r12d
.LBB0_7:                                # %.preheader184
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_9 Depth 2
	testl	%ebp, %ebp
	jle	.LBB0_10
# %bb.8:                                # %.lr.ph
                                        #   in Loop: Header=BB0_7 Depth=1
	movl	%ebx, %eax
	movq	72(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%r13d, %r13d
.LBB0_9:                                #   Parent Loop BB0_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r14,%r13,4)
	incq	%r13
	cmpq	%r13, %r15
	jne	.LBB0_9
.LBB0_10:                               # %._crit_edge
                                        #   in Loop: Header=BB0_7 Depth=1
	incq	%r12
	addl	%ebp, %ebx
	cmpq	80(%rsp), %r12                  # 8-byte Folded Reload
	jne	.LBB0_7
.LBB0_11:                               # %.preheader183
	testl	%ebp, %ebp
	movl	%ebp, %eax
	movq	40(%rsp), %r12                  # 8-byte Reload
	jle	.LBB0_19
# %bb.12:                               # %.preheader182.lr.ph
	xorl	%ebx, %ebx
	xorl	%r12d, %r12d
	movl	%eax, %ebp
.LBB0_13:                               # %.lr.ph192
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_14 Depth 2
	movl	%ebx, %eax
	movq	32(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%r13d, %r13d
.LBB0_14:                               #   Parent Loop BB0_13 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r14,%r13,4)
	incq	%r13
	cmpq	%r13, %r15
	jne	.LBB0_14
# %bb.15:                               # %._crit_edge193
                                        #   in Loop: Header=BB0_13 Depth=1
	incq	%r12
	addl	%ebp, %ebx
	cmpq	%r15, %r12
	jne	.LBB0_13
# %bb.16:                               # %.preheader181
	testl	%ebp, %ebp
	movl	%ebp, %eax
	movq	40(%rsp), %r12                  # 8-byte Reload
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movq	56(%rsp), %rsi                  # 8-byte Reload
	jle	.LBB0_19
# %bb.17:                               # %.preheader180.lr.ph
	leaq	(,%r15,4), %rdi
	movq	%rdi, 88(%rsp)                  # 8-byte Spill
	xorl	%r14d, %r14d
	movq	%r15, %rbp
	movl	%eax, 64(%rsp)                  # 4-byte Spill
	movq	88(%rsp), %rbx                  # 8-byte Reload
.LBB0_18:                               # %._crit_edge197
                                        # =>This Inner Loop Header: Depth=1
	movl	%r14d, %eax
	leaq	(%r12,%rax,4), %rdi
	leaq	(%rdx,%rax,4), %r13
	leaq	(%rsi,%rax,4), %rax
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	memset@PLT
	movq	%r13, %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	memset@PLT
	movq	96(%rsp), %rdi                  # 8-byte Reload
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	memset@PLT
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	64(%rsp), %eax                  # 4-byte Reload
	addl	%eax, %r14d
	decq	%rbp
	jne	.LBB0_18
.LBB0_19:                               # %._crit_edge199
	movl	$.Lstr.1, %edi
	movl	%eax, %ebp
	callq	puts@PLT
	movq	24(%rsp), %rdi
	xorl	%ebx, %ebx
	xorl	%esi, %esi
	callq	hipEventRecord
	cmpl	$0, 20(%rsp)                    # 4-byte Folded Reload
	movq	72(%rsp), %r13                  # 8-byte Reload
	jle	.LBB0_27
# %bb.20:                               # %.preheader179.lr.ph
	movslq	%ebp, %rax
	leaq	(,%rax,4), %rcx
	xorl	%edx, %edx
.LBB0_21:                               # %.preheader179
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_23 Depth 2
                                        #       Child Loop BB0_24 Depth 3
	movl	%ebp, %r14d
	testl	%ebp, %ebp
	jle	.LBB0_26
# %bb.22:                               # %.preheader178.lr.ph
                                        #   in Loop: Header=BB0_21 Depth=1
	movl	%ebx, %esi
	leaq	(,%rsi,4), %rsi
	addq	%r13, %rsi
	movq	%rdx, %rdi
	imulq	%rax, %rdi
	leaq	(%r12,%rdi,4), %rdi
	movq	32(%rsp), %r8                   # 8-byte Reload
	xorl	%r9d, %r9d
.LBB0_23:                               # %.preheader178
                                        #   Parent Loop BB0_21 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_24 Depth 3
	xorl	%r10d, %r10d
	movq	%r8, %r11
	xorl	%ebp, %ebp
.LBB0_24:                               #   Parent Loop BB0_21 Depth=1
                                        #     Parent Loop BB0_23 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rsi,%r10,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	mulss	(%r11), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2ss	%ebp, %xmm1
	addss	%xmm0, %xmm1
	cvttss2si	%xmm1, %ebp
	incq	%r10
	addq	%rcx, %r11
	cmpq	%r10, %r15
	jne	.LBB0_24
# %bb.25:                               # %._crit_edge203
                                        #   in Loop: Header=BB0_23 Depth=2
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebp, %xmm0
	movss	%xmm0, (%rdi,%r9,4)
	incq	%r9
	addq	$4, %r8
	cmpq	%r15, %r9
	jne	.LBB0_23
.LBB0_26:                               # %._crit_edge205
                                        #   in Loop: Header=BB0_21 Depth=1
	incq	%rdx
	movl	%r14d, %ebp
	addl	%r14d, %ebx
	cmpq	80(%rsp), %rdx                  # 8-byte Folded Reload
	jne	.LBB0_21
.LBB0_27:                               # %._crit_edge207
	movq	8(%rsp), %rdi
	xorl	%ebx, %ebx
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	68(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r13, %rdi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	48(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rdx
	movl	20(%rsp), %ecx                  # 4-byte Reload
	movl	%ebp, %r8d
	movl	%ebp, %r9d
	callq	_Z8MM_BasicPfS_S_iii
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12), %xmm0
	movq	40(%rsp), %r12                  # 8-byte Reload
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	testl	%ebp, %ebp
	jle	.LBB0_34
# %bb.28:                               # %.preheader177.lr.ph
	xorl	%esi, %esi
.LBB0_29:                               # %.lr.ph209
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_30 Depth 2
	movl	%ebx, %ecx
	leaq	(%r14,%rcx,4), %rax
	leaq	(%r12,%rcx,4), %rcx
	xorl	%edx, %edx
.LBB0_30:                               #   Parent Loop BB0_29 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rcx,%rdx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%rax,%rdx,4), %xmm0
	jne	.LBB0_31
	jp	.LBB0_31
# %bb.32:                               #   in Loop: Header=BB0_30 Depth=2
	incq	%rdx
	cmpq	%rdx, %r15
	jne	.LBB0_30
# %bb.33:                               # %._crit_edge210
                                        #   in Loop: Header=BB0_29 Depth=1
	incq	%rsi
	addl	%ebp, %ebx
	cmpq	%r15, %rsi
	jne	.LBB0_29
.LBB0_34:                               # %._crit_edge212
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	jmp	.LBB0_35
.LBB0_31:                               # %.thread165
	movl	$.L.str.5, %edi
                                        # kill: def $esi killed $esi killed $rsi
                                        # kill: def $edx killed $edx killed $rdx
	xorl	%eax, %eax
	callq	printf
.LBB0_35:
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movq	24(%rsp), %rdi
	xorl	%r14d, %r14d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r13, %rdi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	56(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	20(%rsp), %ecx                  # 4-byte Reload
	movl	%ebp, %r8d
	movl	%ebp, %r9d
	callq	_Z11MM_ImprovedPfS_S_iii
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	68(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12), %xmm0
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	testl	%ebp, %ebp
	movq	40(%rsp), %r12                  # 8-byte Reload
	jle	.LBB0_42
# %bb.36:                               # %.preheader.lr.ph
	xorl	%esi, %esi
.LBB0_37:                               # %.lr.ph214
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_38 Depth 2
	movl	%r14d, %ecx
	leaq	(%rbx,%rcx,4), %rax
	leaq	(%r12,%rcx,4), %rcx
	xorl	%edx, %edx
.LBB0_38:                               #   Parent Loop BB0_37 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rcx,%rdx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%rax,%rdx,4), %xmm0
	jne	.LBB0_39
	jp	.LBB0_39
# %bb.40:                               #   in Loop: Header=BB0_38 Depth=2
	incq	%rdx
	cmpq	%rdx, %r15
	jne	.LBB0_38
# %bb.41:                               # %._crit_edge215
                                        #   in Loop: Header=BB0_37 Depth=1
	incq	%rsi
	addl	%ebp, %r14d
	cmpq	%r15, %rsi
	jne	.LBB0_37
.LBB0_42:                               # %._crit_edge217
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	jmp	.LBB0_43
.LBB0_39:                               # %.thread174
	movl	$.L.str.5, %edi
                                        # kill: def $esi killed $esi killed $rsi
                                        # kill: def $edx killed $edx killed $rdx
	xorl	%eax, %eax
	callq	printf
.LBB0_43:
	movq	%r13, %rdi
	callq	free
	movq	32(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	48(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%rbx, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z8MM_BasicPfS_S_iii            # -- Begin function _Z8MM_BasicPfS_S_iii
	.type	_Z8MM_BasicPfS_S_iii,@function
_Z8MM_BasicPfS_S_iii:                   # @_Z8MM_BasicPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %r14d
	movl	%ecx, %r15d
	movq	%rdx, 72(%rsp)                  # 8-byte Spill
	movq	%rsi, 64(%rsp)                  # 8-byte Spill
	movq	%rdi, %r13
	leaq	48(%rsp), %rdi
	callq	hipEventCreate
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	movq	%r15, 56(%rsp)                  # 8-byte Spill
	leal	(,%r15,4), %r15d
	movl	%r15d, %eax
	imull	%ebx, %eax
	movl	%r14d, %ebp
	movl	%ebx, 28(%rsp)                  # 4-byte Spill
	imull	%ebx, %ebp
	shll	$2, %ebp
	movl	%r14d, 24(%rsp)                 # 4-byte Spill
	imull	%r14d, %r15d
	movslq	%eax, %r12
	leaq	40(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movslq	%ebp, %r14
	leaq	32(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movslq	%r15d, %r15
	leaq	8(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %rax
	movq	(%rax), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$274877907008, %rdi             # imm = 0x4000000040
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	24(%rsp), %r8d                  # 4-byte Reload
	movl	28(%rsp), %r9d                  # 4-byte Reload
	callq	_Z30__device_stub__MM_Basic_kernelPfS_S_iii
.LBB1_2:
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	callq	hipEventSynchronize
	movq	48(%rsp), %rsi
	movq	16(%rsp), %rdx
	leaq	84(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rsi
	movq	72(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z8MM_BasicPfS_S_iii, .Lfunc_end1-_Z8MM_BasicPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11MM_ImprovedPfS_S_iii        # -- Begin function _Z11MM_ImprovedPfS_S_iii
	.type	_Z11MM_ImprovedPfS_S_iii,@function
_Z11MM_ImprovedPfS_S_iii:               # @_Z11MM_ImprovedPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %r15d
	movl	%ecx, %r14d
	movq	%rdx, 72(%rsp)                  # 8-byte Spill
	movq	%rsi, 64(%rsp)                  # 8-byte Spill
	movq	%rdi, 56(%rsp)                  # 8-byte Spill
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	%r14, 48(%rsp)                  # 8-byte Spill
	leal	(,%r14,4), %r13d
	movl	%r13d, %eax
	imull	%ebx, %eax
	movl	%r15d, %ebp
	movl	%ebx, 20(%rsp)                  # 4-byte Spill
	imull	%ebx, %ebp
	shll	$2, %ebp
	imull	%r15d, %r13d
	movslq	%eax, %r12
	leaq	32(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movslq	%ebp, %r14
	leaq	24(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movslq	%r13d, %r13
	movq	%rsp, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	40(%rsp), %rax
	movq	(%rax), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$137438953504, %rdi             # imm = 0x2000000020
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	(%rsp), %rdx
	movq	48(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	%r15d, %r8d
	movl	20(%rsp), %r9d                  # 4-byte Reload
	callq	_Z30__device_stub__MM_Basic_kernelPfS_S_iii
.LBB2_2:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	40(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	84(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	movq	(%rsp), %rsi
	movq	72(%rsp), %rdi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z11MM_ImprovedPfS_S_iii, .Lfunc_end2-_Z11MM_ImprovedPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__MM_Basic_kernelPfS_S_iii # -- Begin function _Z30__device_stub__MM_Basic_kernelPfS_S_iii
	.type	_Z30__device_stub__MM_Basic_kernelPfS_S_iii,@function
_Z30__device_stub__MM_Basic_kernelPfS_S_iii: # @_Z30__device_stub__MM_Basic_kernelPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15MM_Basic_kernelPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z30__device_stub__MM_Basic_kernelPfS_S_iii, .Lfunc_end3-_Z30__device_stub__MM_Basic_kernelPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__MM_Improved_kernelPfS_S_iii # -- Begin function _Z33__device_stub__MM_Improved_kernelPfS_S_iii
	.type	_Z33__device_stub__MM_Improved_kernelPfS_S_iii,@function
_Z33__device_stub__MM_Improved_kernelPfS_S_iii: # @_Z33__device_stub__MM_Improved_kernelPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18MM_Improved_kernelPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z33__device_stub__MM_Improved_kernelPfS_S_iii, .Lfunc_end4-_Z33__device_stub__MM_Improved_kernelPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15MM_Basic_kernelPfS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18MM_Improved_kernelPfS_S_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"\tSequential Job Time: %.2f ms\n"
	.size	.L.str.2, 31

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\tBasic Parallel Job Time: %.2f ms\n"
	.size	.L.str.4, 35

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"\tError: Starting at [%d][%d]\n"
	.size	.L.str.5, 30

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"\tImproved Parallel Job Time: %.2f ms\n"
	.size	.L.str.8, 38

	.type	_Z15MM_Basic_kernelPfS_S_iii,@object # @_Z15MM_Basic_kernelPfS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z15MM_Basic_kernelPfS_S_iii
	.p2align	3, 0x0
_Z15MM_Basic_kernelPfS_S_iii:
	.quad	_Z30__device_stub__MM_Basic_kernelPfS_S_iii
	.size	_Z15MM_Basic_kernelPfS_S_iii, 8

	.type	.L.str.9,@object                # @.str.9
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.9:
	.asciz	"\tKernel Job Time: %.2f ms\n"
	.size	.L.str.9, 27

	.type	_Z18MM_Improved_kernelPfS_S_iii,@object # @_Z18MM_Improved_kernelPfS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z18MM_Improved_kernelPfS_S_iii
	.p2align	3, 0x0
_Z18MM_Improved_kernelPfS_S_iii:
	.quad	_Z33__device_stub__MM_Improved_kernelPfS_S_iii
	.size	_Z18MM_Improved_kernelPfS_S_iii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z15MM_Basic_kernelPfS_S_iii"
	.size	.L__unnamed_1, 29

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z18MM_Improved_kernelPfS_S_iii"
	.size	.L__unnamed_2, 32

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Initializing Matricies, could take some time..."
	.size	.Lstr, 48

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Running sequential job."
	.size	.Lstr.1, 24

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Running Basic parallel job."
	.size	.Lstr.2, 28

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Running Improved parallel job."
	.size	.Lstr.4, 31

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"\tNo errors found."
	.size	.Lstr.5, 18

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__MM_Basic_kernelPfS_S_iii
	.addrsig_sym _Z33__device_stub__MM_Improved_kernelPfS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15MM_Basic_kernelPfS_S_iii
	.addrsig_sym _Z18MM_Improved_kernelPfS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15MM_Basic_kernelPfS_S_iii ; -- Begin function _Z15MM_Basic_kernelPfS_S_iii
	.globl	_Z15MM_Basic_kernelPfS_S_iii
	.p2align	8
	.type	_Z15MM_Basic_kernelPfS_S_iii,@function
_Z15MM_Basic_kernelPfS_S_iii:           ; @_Z15MM_Basic_kernelPfS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	v_cmp_gt_i32_e64 s2, s4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_lo_u32 v1, v1, s6
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, v0
	s_mov_b32 s2, s6
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s2, 0
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_add_nc_u32_e32 v4, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	global_load_b32 v5, v[2:3], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v5, v7
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v6, 0
.LBB0_5:                                ; %Flow53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15MM_Basic_kernelPfS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15MM_Basic_kernelPfS_S_iii, .Lfunc_end0-_Z15MM_Basic_kernelPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 344
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z18MM_Improved_kernelPfS_S_iii ; -- Begin function _Z18MM_Improved_kernelPfS_S_iii
	.globl	_Z18MM_Improved_kernelPfS_S_iii
	.p2align	8
	.type	_Z18MM_Improved_kernelPfS_S_iii,@function
_Z18MM_Improved_kernelPfS_S_iii:        ; @_Z18MM_Improved_kernelPfS_S_iii
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_bfe_u32 v2, v0, 10, 10
	v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v6, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v1, s15, 5, v2
	v_lshl_add_u32 v0, s14, 5, v6
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, s2
	s_cmp_lt_i32 s2, 32
	s_cbranch_scc1 .LBB1_5
; %bb.1:                                ; %.lr.ph
	v_lshlrev_b32_e32 v3, 2, v6
	v_lshlrev_b32_e32 v4, 7, v2
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(VALU_DEP_3)
	v_add_nc_u32_e32 v6, v1, v6
	s_lshr_b32 s3, s3, 27
	v_or_b32_e32 v5, 0x1000, v3
	v_add_nc_u32_e32 v7, v4, v3
	v_mov_b32_e32 v3, 0
	s_add_i32 s3, s2, s3
	s_mov_b32 s8, 0
	v_add_nc_u32_e32 v8, v5, v4
	s_ashr_i32 s3, s3, 5
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_3 Depth 2
	s_lshl_b32 s9, s8, 5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, s9, v2
	v_add_nc_u32_e32 v9, s9, v6
	s_mov_b32 s9, 0
	v_mad_u64_u32 v[11:12], null, v10, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v12, 31, v11
	v_add_co_u32 v9, vcc_lo, s4, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
	global_load_b32 v9, v[9:10], off
	global_load_b32 v10, v[11:12], off
	s_waitcnt vmcnt(1)
	v_cvt_i32_f32_e32 v11, v9
	v_mov_b32_e32 v9, v5
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v10, v10
	ds_store_b32 v7, v11
	ds_store_b32 v8, v10
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_3:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v10, s9, v4
	s_add_i32 s9, s9, 4
	ds_load_b32 v11, v9
	ds_load_b32 v10, v10
	v_add_nc_u32_e32 v9, 0x80, v9
	s_cmpk_eq_i32 s9, 0x80
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v10, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v10, v10
	v_add_f32_e32 v3, v3, v10
	s_cbranch_scc0 .LBB1_3
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s8, s3
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_2
.LBB1_5:                                ; %Flow56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v3, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18MM_Improved_kernelPfS_S_iii
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z18MM_Improved_kernelPfS_S_iii, .Lfunc_end1-_Z18MM_Improved_kernelPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 460
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15MM_Basic_kernelPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15MM_Basic_kernelPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18MM_Improved_kernelPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18MM_Improved_kernelPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
