#include <stdio.h>

static void HandleError(cudaError_t err,const char * file,int line){
    if(err!=cudaSuccess){
        printf("%s in %s at line %d\n",cudaGetErrorString(err),file,line);
        exit(EXIT_FAILURE);
    }
}

#define HANDLE_ERROR(err) (HandleError(err,__FILE__,__LINE__))

int getThreadNum(){
    cudaDeviceProp prop;
    int count;
    HANDLE_ERROR(cudaGetDeviceCount(&count));
    printf("gpu num %d\n",count);
    HANDLE_ERROR(cudaGetDeviceProperties(&prop,0));
    printf("max thread num:%d\n",prop.maxThreadsPerBlock);
    printf("max grid dimensions:%d %d %d\n",prop.maxGridSize[0],prop.maxGridSize[1],prop.maxGridSize[2]);
    return prop.maxThreadsPerBlock;
}

__global__ void conv(float *img,float *kernel,float *result,int width,int height,int kernelSize){
    int ti=threadIdx.x;
    int bi=blockIdx.x;
    int id=bi*blockDim.x+ti;
    if(id>=width*height){
        return ;
    }
    int row=id/width,col=id%width;
    for(int i=0;i<kernelSize;i++){
        for(int j=0;j<kernelSize;j++){
            float imgValue=0;
            int curRow=row-kernelSize/2+i;
            int curCol=col-kernelSize/2+j;
            if(curRow<0||curCol<0||curRow>=height||curCol>=width){
                    ;
            }else{
                imgValue=img[curRow*width+curCol];
            }
            result[id]+=kernel[i*kernelSize+j]*imgValue;
        }
    }
}
int main(){
    int width=10;
    int height=10;
    float *img=new float[width*height];
    for(int i=0;i<height;i++){
        for(int j=0;j<width;j++){
            img[j+i*width]=(i+j)%256;
        }
    }

    int kernelSize=3;
    float *kernel=new float[kernelSize*kernelSize];
    for(int i=0;i<kernelSize*kernelSize;i++){
        kernel[i]=i%kernelSize-1;
    }

    float *imgGpu,*kernelGpu,*resultGpu;

    HANDLE_ERROR(cudaMalloc((void**)&imgGpu,width*height*sizeof(float)));
    HANDLE_ERROR(cudaMalloc((void**)&kernelGpu,kernelSize*kernelSize*sizeof(float)));
    HANDLE_ERROR(cudaMalloc((void**)&resultGpu,width*height*sizeof(float)));

    HANDLE_ERROR(cudaMemcpy(imgGpu,img,width*height*sizeof(float),cudaMemcpyHostToDevice));
    HANDLE_ERROR(cudaMemcpy(kernelGpu,kernel,kernelSize*kernelSize*sizeof(float),cudaMemcpyHostToDevice));

    int threadNum=getThreadNum();
    int blockNum=(width*height-0.5)/threadNum+1;
    conv<<<blockNum,threadNum>>>(imgGpu,kernelGpu,resultGpu,width,height,kernelSize);

    float *result=new float[width*height];
    HANDLE_ERROR(cudaMemcpy(result,resultGpu,width*height*sizeof(float),cudaMemcpyDeviceToHost));
    //Visualization
    printf("img:\n");
    for(int i=0;i<10;i++){
        for(int j=0;j<10;j++){
            printf("%2.0f ",img[j+i*width]);
        }
        puts("");
    }
    printf("kernel:\n");
    for(int i=0;i<kernelSize;i++){
        for(int j=0;j<kernelSize;j++){
            printf("%2.0lf ",kernel[i*kernelSize+j]);
        }
        puts("");
    }
    printf("result:\n");
    for(int i=0;i<10;i++){
        for(int j=0;j<10;j++){
            printf("%2.0f ",result[j+i*width]);
        }
        puts("");
    }
    return 0;
}
	.file	"tmpxft_002ea7a2_00000000-6_main.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/Zhang-Jing-Xuan/CudaLearning/main/conv/main.cu"
.LC1:
	.string	"%s in %s at line %d\n"
	.text
	.type	_ZL11HandleError9cudaErrorPKci.constprop.0, @function
_ZL11HandleError9cudaErrorPKci.constprop.0:
.LFB2174:
	.cfi_startproc
	testl	%edi, %edi
	je	.L2
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%esi, 12(%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r8d
	movl	$2, %edi
	leaq	.LC0(%rip), %rcx
	movq	%rax, %rdx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2174:
	.size	_ZL11HandleError9cudaErrorPKci.constprop.0, .-_ZL11HandleError9cudaErrorPKci.constprop.0
	.section	.rodata.str1.1
.LC2:
	.string	"gpu num %d\n"
.LC3:
	.string	"max thread num:%d\n"
.LC4:
	.string	"max grid dimensions:%d %d %d\n"
	.text
	.globl	_Z12getThreadNumv
	.type	_Z12getThreadNumv, @function
_Z12getThreadNumv:
.LFB2028:
	.cfi_startproc
	endbr64
	subq	$1064, %rsp
	.cfi_def_cfa_offset 1072
	movq	%fs:40, %rax
	movq	%rax, 1048(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rdi
	call	cudaGetDeviceCount@PLT
	movl	$15, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movl	12(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC2(%rip), %rsi
	call	__printf_chk@PLT
	leaq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaGetDeviceProperties_v2@PLT
	movl	$17, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movl	336(%rsp), %edx
	leaq	.LC3(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	360(%rsp), %r8d
	xorl	%eax, %eax
	movl	356(%rsp), %ecx
	movl	352(%rsp), %edx
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	336(%rsp), %eax
	movq	1048(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$1064, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z12getThreadNumv, .-_Z12getThreadNumv
	.globl	_Z30__device_stub__Z4convPfS_S_iiiPfS_S_iii
	.type	_Z30__device_stub__Z4convPfS_S_iiiPfS_S_iii, @function
_Z30__device_stub__Z4convPfS_S_iiiPfS_S_iii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z4convPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L11:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z30__device_stub__Z4convPfS_S_iiiPfS_S_iii, .-_Z30__device_stub__Z4convPfS_S_iiiPfS_S_iii
	.globl	_Z4convPfS_S_iii
	.type	_Z4convPfS_S_iii, @function
_Z4convPfS_S_iii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z4convPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2055:
	.size	_Z4convPfS_S_iii, .-_Z4convPfS_S_iii
	.section	.rodata.str1.1
.LC7:
	.string	"img:\n"
.LC8:
	.string	"%2.0f "
.LC9:
	.string	""
.LC10:
	.string	"kernel:\n"
.LC11:
	.string	"%2.0lf "
.LC12:
	.string	"result:\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$400, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	xorl	%edx, %edx
	movq	%rax, %r12
	movq	%rax, %rcx
.L17:
	xorl	%eax, %eax
.L18:
	leal	(%rdx,%rax), %esi
	cvtsi2ssl	%esi, %xmm0
	movss	%xmm0, (%rcx,%rax,4)
	incq	%rax
	cmpq	$10, %rax
	jne	.L18
	incl	%edx
	addq	$40, %rcx
	cmpl	$10, %edx
	jne	.L17
	movl	$36, %edi
	call	_Znam@PLT
	xorl	%ecx, %ecx
	movl	$3, %esi
	movq	%rax, %rbx
.L20:
	movl	%ecx, %eax
	cltd
	idivl	%esi
	decl	%edx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%rbx,%rcx,4)
	incq	%rcx
	cmpq	$9, %rcx
	jne	.L20
	leaq	8(%rsp), %rdi
	movl	$400, %esi
	call	cudaMalloc@PLT
	movl	$63, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	leaq	16(%rsp), %rdi
	movl	$36, %esi
	call	cudaMalloc@PLT
	movl	$64, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	leaq	24(%rsp), %rdi
	movl	$400, %esi
	call	cudaMalloc@PLT
	movl	$65, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$400, %edx
	call	cudaMemcpy@PLT
	movl	$67, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$36, %edx
	call	cudaMemcpy@PLT
	movl	$68, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	call	_Z12getThreadNumv
	movsd	.LC5(%rip), %xmm0
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvtsi2sdl	%eax, %xmm1
	movl	%eax, 44(%rsp)
	movabsq	$4294967297, %rdx
	movq	%rdx, 36(%rsp)
	movl	40(%rsp), %esi
	movq	%rdx, 48(%rsp)
	movl	52(%rsp), %ecx
	movq	44(%rsp), %rdx
	divsd	%xmm1, %xmm0
	addsd	.LC6(%rip), %xmm0
	cvttsd2sil	%xmm0, %eax
	movl	%eax, 32(%rsp)
	movq	32(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$3, %r9d
	movl	$10, %r8d
	movq	8(%rsp), %rdi
	movl	$10, %ecx
	call	_Z30__device_stub__Z4convPfS_S_iiiPfS_S_iii
.L21:
	movl	$400, %edi
	xorl	%r14d, %r14d
	call	_Znam@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$400, %edx
	movq	%rax, %rdi
	movq	%rax, %rbp
	call	cudaMemcpy@PLT
	movl	$75, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L22:
	imulq	$40, %r14, %r13
	xorl	%r15d, %r15d
	addq	%r12, %r13
.L23:
	cvtss2sd	0(%r13,%r15,4), %xmm0
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%r15
	cmpq	$10, %r15
	jne	.L23
	leaq	.LC9(%rip), %rdi
	incq	%r14
	call	puts@PLT
	cmpq	$10, %r14
	jne	.L22
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r12d, %r12d
	call	__printf_chk@PLT
	leaq	.LC11(%rip), %r15
.L25:
	imulq	$12, %r12, %r14
	xorl	%r13d, %r13d
	addq	%rbx, %r14
.L26:
	cvtss2sd	(%r14,%r13,4), %xmm0
	movq	%r15, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%r13
	cmpq	$3, %r13
	jne	.L26
	leaq	.LC9(%rip), %rdi
	incq	%r12
	call	puts@PLT
	cmpq	$3, %r12
	jne	.L25
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r12d, %r12d
	call	__printf_chk@PLT
.L28:
	imulq	$40, %r12, %r14
	xorl	%ebx, %ebx
	addq	%rbp, %r14
.L29:
	cvtss2sd	(%r14,%rbx,4), %xmm0
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%rbx
	cmpq	$10, %rbx
	jne	.L29
	leaq	.LC9(%rip), %rdi
	incq	%r12
	call	puts@PLT
	cmpq	$10, %r12
	jne	.L28
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC13:
	.string	"_Z4convPfS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z4convPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1079566336
	.align 8
.LC6:
	.long	0
	.long	1072693248
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>

static void HandleError(hipError_t err,const char * file,int line){
    if(err!=hipSuccess){
        printf("%s in %s at line %d\n",hipGetErrorString(err),file,line);
        exit(EXIT_FAILURE);
    }
}

#define HANDLE_ERROR(err) (HandleError(err,__FILE__,__LINE__))

int getThreadNum(){
    hipDeviceProp_t prop;
    int count;
    HANDLE_ERROR(hipGetDeviceCount(&count));
    printf("gpu num %d\n",count);
    HANDLE_ERROR(hipGetDeviceProperties(&prop,0));
    printf("max thread num:%d\n",prop.maxThreadsPerBlock);
    printf("max grid dimensions:%d %d %d\n",prop.maxGridSize[0],prop.maxGridSize[1],prop.maxGridSize[2]);
    return prop.maxThreadsPerBlock;
}

__global__ void conv(float *img,float *kernel,float *result,int width,int height,int kernelSize){
    int ti=threadIdx.x;
    int bi=blockIdx.x;
    int id=bi*blockDim.x+ti;
    if(id>=width*height){
        return ;
    }
    int row=id/width,col=id%width;
    for(int i=0;i<kernelSize;i++){
        for(int j=0;j<kernelSize;j++){
            float imgValue=0;
            int curRow=row-kernelSize/2+i;
            int curCol=col-kernelSize/2+j;
            if(curRow<0||curCol<0||curRow>=height||curCol>=width){
                    ;
            }else{
                imgValue=img[curRow*width+curCol];
            }
            result[id]+=kernel[i*kernelSize+j]*imgValue;
        }
    }
}
int main(){
    int width=10;
    int height=10;
    float *img=new float[width*height];
    for(int i=0;i<height;i++){
        for(int j=0;j<width;j++){
            img[j+i*width]=(i+j)%256;
        }
    }

    int kernelSize=3;
    float *kernel=new float[kernelSize*kernelSize];
    for(int i=0;i<kernelSize*kernelSize;i++){
        kernel[i]=i%kernelSize-1;
    }

    float *imgGpu,*kernelGpu,*resultGpu;

    HANDLE_ERROR(hipMalloc((void**)&imgGpu,width*height*sizeof(float)));
    HANDLE_ERROR(hipMalloc((void**)&kernelGpu,kernelSize*kernelSize*sizeof(float)));
    HANDLE_ERROR(hipMalloc((void**)&resultGpu,width*height*sizeof(float)));

    HANDLE_ERROR(hipMemcpy(imgGpu,img,width*height*sizeof(float),hipMemcpyHostToDevice));
    HANDLE_ERROR(hipMemcpy(kernelGpu,kernel,kernelSize*kernelSize*sizeof(float),hipMemcpyHostToDevice));

    int threadNum=getThreadNum();
    int blockNum=(width*height-0.5)/threadNum+1;
    conv<<<blockNum,threadNum>>>(imgGpu,kernelGpu,resultGpu,width,height,kernelSize);

    float *result=new float[width*height];
    HANDLE_ERROR(hipMemcpy(result,resultGpu,width*height*sizeof(float),hipMemcpyDeviceToHost));
    //Visualization
    printf("img:\n");
    for(int i=0;i<10;i++){
        for(int j=0;j<10;j++){
            printf("%2.0f ",img[j+i*width]);
        }
        puts("");
    }
    printf("kernel:\n");
    for(int i=0;i<kernelSize;i++){
        for(int j=0;j<kernelSize;j++){
            printf("%2.0lf ",kernel[i*kernelSize+j]);
        }
        puts("");
    }
    printf("result:\n");
    for(int i=0;i<10;i++){
        for(int j=0;j<10;j++){
            printf("%2.0f ",result[j+i*width]);
        }
        puts("");
    }
    return 0;
}
	.text
	.file	"main.hip"
	.globl	_Z12getThreadNumv               # -- Begin function _Z12getThreadNumv
	.type	_Z12getThreadNumv,@function
_Z12getThreadNumv:                      # @_Z12getThreadNumv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$1488, %rsp                     # imm = 0x5D0
	.cfi_def_cfa_offset 1504
	.cfi_offset %rbx, -16
	leaq	12(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	movl	%eax, %edi
	movl	$17, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movl	(%rbx), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	movl	%eax, %edi
	movl	$19, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movl	320(%rbx), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movl	336(%rbx), %esi
	movl	340(%rbx), %edx
	movl	344(%rbx), %ecx
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movl	320(%rbx), %eax
	addq	$1488, %rsp                     # imm = 0x5D0
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z12getThreadNumv, .Lfunc_end0-_Z12getThreadNumv
	.cfi_endproc
                                        # -- End function
	.type	_ZL11HandleError10hipError_tPKci,@function # -- Begin function _ZL11HandleError10hipError_tPKci
_ZL11HandleError10hipError_tPKci:       # @_ZL11HandleError10hipError_tPKci
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB1_2
# %bb.1:
	retq
.LBB1_2:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%esi, %ebx
	callq	hipGetErrorString
	movl	$.L.str.10, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	%ebx, %ecx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	_ZL11HandleError10hipError_tPKci, .Lfunc_end1-_ZL11HandleError10hipError_tPKci
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__convPfS_S_iii # -- Begin function _Z19__device_stub__convPfS_S_iii
	.type	_Z19__device_stub__convPfS_S_iii,@function
_Z19__device_stub__convPfS_S_iii:       # @_Z19__device_stub__convPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4convPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z19__device_stub__convPfS_S_iii, .Lfunc_end2-_Z19__device_stub__convPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x4058e00000000000              # double 99.5
.LCPI3_1:
	.quad	0x3ff0000000000000              # double 1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$400, %edi                      # imm = 0x190
	callq	_Znam
	movq	%rax, %r14
	xorl	%eax, %eax
	movq	%r14, %rcx
.LBB3_1:                                # %.preheader94
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
	xorl	%edx, %edx
.LBB3_2:                                #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rax,%rdx), %esi
	xorps	%xmm0, %xmm0
	cvtsi2ss	%esi, %xmm0
	movss	%xmm0, (%rcx,%rdx,4)
	incq	%rdx
	cmpq	$10, %rdx
	jne	.LBB3_2
# %bb.3:                                #   in Loop: Header=BB3_1 Depth=1
	incq	%rax
	addq	$40, %rcx
	cmpq	$10, %rax
	jne	.LBB3_1
# %bb.4:
	movl	$36, %edi
	callq	_Znam
	movq	%rax, %rbx
	movl	$-1, %eax
	xorl	%ecx, %ecx
	movl	$2863311531, %edx               # imm = 0xAAAAAAAB
.LBB3_5:                                # =>This Inner Loop Header: Depth=1
	movl	%ecx, %esi
	imulq	%rdx, %rsi
	shrq	$33, %rsi
	leal	(%rsi,%rsi,2), %esi
	movl	%eax, %edi
	subl	%esi, %edi
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edi, %xmm0
	movss	%xmm0, (%rbx,%rcx,4)
	incq	%rcx
	incl	%eax
	cmpq	$9, %rcx
	jne	.LBB3_5
# %bb.6:
	leaq	24(%rsp), %r12
	movl	$400, %esi                      # imm = 0x190
	movq	%r12, %rdi
	callq	hipMalloc
	movl	%eax, %edi
	movl	$65, %esi
	callq	_ZL11HandleError10hipError_tPKci
	leaq	16(%rsp), %r15
	movl	$36, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	movl	%eax, %edi
	movl	$66, %esi
	callq	_ZL11HandleError10hipError_tPKci
	leaq	8(%rsp), %rdi
	movl	$400, %esi                      # imm = 0x190
	callq	hipMalloc
	movl	%eax, %edi
	movl	$67, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	(%r12), %rdi
	movl	$400, %edx                      # imm = 0x190
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	movl	$69, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	(%r15), %rdi
	movl	$36, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	movl	$70, %esi
	callq	_ZL11HandleError10hipError_tPKci
	callq	_Z12getThreadNumv
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	.LCPI3_0(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	addsd	.LCPI3_1(%rip), %xmm1
	cvttsd2si	%xmm1, %edi
	btsq	$32, %rdi
	movl	%eax, %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_8
# %bb.7:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$10, %ecx
	movl	$10, %r8d
	movl	$3, %r9d
	callq	_Z19__device_stub__convPfS_S_iii
.LBB3_8:
	movl	$400, %edi                      # imm = 0x190
	callq	_Znam
	movq	%rax, %r15
	movq	8(%rsp), %rsi
	movl	$400, %edx                      # imm = 0x190
	movq	%rax, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	movl	$77, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movl	$.Lstr, %edi
	callq	puts
	xorl	%r12d, %r12d
.LBB3_9:                                # %.preheader93
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_10 Depth 2
	xorl	%r13d, %r13d
.LBB3_10:                               #   Parent Loop BB3_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r13,4), %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	incq	%r13
	cmpq	$10, %r13
	jne	.LBB3_10
# %bb.11:                               #   in Loop: Header=BB3_9 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r12
	addq	$40, %r14
	cmpq	$10, %r12
	jne	.LBB3_9
# %bb.12:
	movl	$.Lstr.1, %edi
	callq	puts
	xorl	%r14d, %r14d
.LBB3_13:                               # %.preheader92
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_14 Depth 2
	xorl	%r12d, %r12d
.LBB3_14:                               #   Parent Loop BB3_13 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r12,4), %xmm0
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	incq	%r12
	cmpq	$3, %r12
	jne	.LBB3_14
# %bb.15:                               #   in Loop: Header=BB3_13 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$12, %rbx
	cmpq	$3, %r14
	jne	.LBB3_13
# %bb.16:
	movl	$.Lstr.2, %edi
	callq	puts
	xorl	%ebx, %ebx
.LBB3_17:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_18 Depth 2
	xorl	%r14d, %r14d
.LBB3_18:                               #   Parent Loop BB3_17 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15,%r14,4), %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	incq	%r14
	cmpq	$10, %r14
	jne	.LBB3_18
# %bb.19:                               #   in Loop: Header=BB3_17 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%rbx
	addq	$40, %r15
	cmpq	$10, %rbx
	jne	.LBB3_17
# %bb.20:
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4convPfS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/Zhang-Jing-Xuan/CudaLearning/main/conv/main.hip"
	.size	.L.str, 110

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"gpu num %d\n"
	.size	.L.str.1, 12

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"max thread num:%d\n"
	.size	.L.str.2, 19

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"max grid dimensions:%d %d %d\n"
	.size	.L.str.3, 30

	.type	_Z4convPfS_S_iii,@object        # @_Z4convPfS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z4convPfS_S_iii
	.p2align	3, 0x0
_Z4convPfS_S_iii:
	.quad	_Z19__device_stub__convPfS_S_iii
	.size	_Z4convPfS_S_iii, 8

	.type	.L.str.5,@object                # @.str.5
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.5:
	.asciz	"%2.0f "
	.size	.L.str.5, 7

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"%2.0lf "
	.size	.L.str.8, 8

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"%s in %s at line %d\n"
	.size	.L.str.10, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z4convPfS_S_iii"
	.size	.L__unnamed_1, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"img:"
	.size	.Lstr, 5

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"kernel:"
	.size	.Lstr.1, 8

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"result:"
	.size	.Lstr.2, 8

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__convPfS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4convPfS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4convPfS_S_iii        ; -- Begin function _Z4convPfS_S_iii
	.globl	_Z4convPfS_S_iii
	.p2align	8
	.type	_Z4convPfS_S_iii,@function
_Z4convPfS_S_iii:                       ; @_Z4convPfS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	s_mov_b32 s3, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_cmp_gt_i32 s6, 0
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	s_mul_i32 s2, s5, s4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s7, s2
	s_cbranch_execz .LBB0_7
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[8:9], s[0:1], 0x10
	v_ashrrev_i32_e32 v3, 31, v2
	s_ashr_i32 s2, s4, 31
	s_mov_b32 s12, 0
	s_add_i32 s7, s4, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_xor_b32 s7, s7, s2
	v_add_nc_u32_e32 v7, v2, v3
	v_cvt_f32_u32_e32 v4, s7
	v_xor_b32_e32 v7, v7, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_rcp_iflag_f32_e32 v4, v4
	v_xor_b32_e32 v3, s2, v3
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	s_sub_i32 s8, 0, s7
	global_load_b32 v5, v[0:1], off
	v_cvt_u32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v6, s8, v4
	s_load_b128 s[8:11], s[0:1], 0x0
	s_lshr_b32 s0, s6, 1
	s_not_b32 s1, s4
	v_mul_hi_u32 v6, v4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v4, v6
	v_mul_hi_u32 v4, v7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v6, v4, s7
	v_sub_nc_u32_e32 v6, v7, v6
	v_add_nc_u32_e32 v7, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v8, s7, v6
	v_cmp_le_u32_e32 vcc_lo, s7, v6
	v_cndmask_b32_e32 v4, v4, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v6, v6, v8, vcc_lo
	v_add_nc_u32_e32 v7, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s7, v6
	s_mov_b32 s7, 0
	v_cndmask_b32_e32 v4, v4, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v4, v4, v3
	v_sub_nc_u32_e32 v6, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v6, s4
	v_sub_nc_u32_e32 v7, v2, v3
	v_mad_u64_u32 v[3:4], null, s0, s1, v[2:3]
	v_subrev_nc_u32_e32 v2, s0, v6
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_4)
	v_subrev_nc_u32_e32 v4, s0, v7
.LBB0_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v7, s12, v2
	s_mov_b32 s13, 0
	v_cmp_lt_i32_e32 vcc_lo, -1, v7
	v_cmp_gt_i32_e64 s0, s5, v7
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v7, s13, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_lt_i32_e64 s1, -1, v7
	v_cmp_gt_i32_e64 s2, s4, v7
	v_mov_b32_e32 v7, 0
	s_and_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=2
	v_add_nc_u32_e32 v7, s13, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, s1, s8, v7
	v_add_co_ci_u32_e64 v8, s1, s9, v8, s1
	global_load_b32 v7, v[7:8], off
.LBB0_5:                                ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_add_i32 s2, s7, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[14:15], s[2:3], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s14, s10, s14
	s_addc_u32 s15, s11, s15
	s_add_i32 s13, s13, 1
	global_load_b32 v8, v6, s[14:15]
	s_cmp_eq_u32 s6, s13
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v7, v8
	global_store_b32 v[0:1], v5, off
	s_cbranch_scc0 .LBB0_3
; %bb.6:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v3, s4, v3
	s_add_i32 s12, s12, 1
	s_add_i32 s7, s7, s6
	s_cmp_eq_u32 s12, s6
	s_cbranch_scc0 .LBB0_2
.LBB0_7:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4convPfS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4convPfS_S_iii, .Lfunc_end0-_Z4convPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 588
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4convPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4convPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
