#include <stdio.h>
#include<cuda.h>


const int N = 100 ;//256

__global__ void MatrixAdd_CUDA(int *A, int *B, int *C) { 
      int i= blockIdx.y*blockDim.y+ threadIdx.y; 
      int j = blockIdx.x*blockDim.x+ threadIdx.x; 
    *(C + i*N + j) =  *(A + i*N + j)+ *(B + i*N + j); 
      
}      
void DisplayMatrix(int *A, int row,  int col)
{
    int i,j;
    for(i=0;i<row;i++){
        for(j=0;j<col;j++) printf("  %d",*(A+i*col+j));
        printf("\n");
    }
}
   
int main (void)
{
      int *Host_a, *Host_b, *Host_c;
      Host_a  = (int *) malloc ((N*N)*sizeof(int));
      Host_b   = (int *) malloc ((N*N)*sizeof(int));
      Host_c   = (int *) malloc ((N*N)*sizeof(int));
     

      int *dev_a , *dev_b, *dev_c ;
       cudaMalloc(&dev_a , (N*N)*sizeof(int));
      cudaMalloc(&dev_b , (N*N)*sizeof(int));
      cudaMalloc(&dev_c , (N*N)*sizeof(int));

      for ( int i = 0; i <N ; i++ )
          for(int j=0;j<N;j++){
              *(Host_a+i*N+j)=i*2+1;
              *(Host_b+i*N+j)=i+j;
               
          }
      cudaMemcpy (dev_a , Host_a , (N*N)*sizeof(int) , cudaMemcpyHostToDevice);
      cudaMemcpy (dev_b , Host_b , (N*N)*sizeof(int) , cudaMemcpyHostToDevice);

      //int threadsPerBlock = 256;    int blocksPerGrid = (N + threadsPerBlock - 1) / threadsPerBlock
   
      dim3 threadsPerBlock(10, 10);    //16 16 
      dim3 numBlocks(N / threadsPerBlock.x, N / threadsPerBlock.y); 

      MatrixAdd_CUDA <<< numBlocks, threadsPerBlock  >>> (dev_a , dev_b , dev_c ) ;

     cudaMemcpy(Host_c , dev_c , (N*N)*sizeof(int) , cudaMemcpyDeviceToHost);

      DisplayMatrix(Host_c,10,10);
                 

      cudaFree (dev_a) ;
      cudaFree (dev_b) ;
      cudaFree (dev_c) ;
      
      return 0 ;

}
	.file	"tmpxft_00234ee7_00000000-6_matrix_plus.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"  %d"
.LC1:
	.string	"\n"
	.text
	.globl	_Z13DisplayMatrixPiii
	.type	_Z13DisplayMatrixPiii, @function
_Z13DisplayMatrixPiii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%esi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L3:
	cmpl	%r14d, %r13d
	jge	.L2
	movslq	%r12d, %rax
	xorl	%r15d, %r15d
	leaq	0(%rbp,%rax,4), %r8
.L6:
	cmpl	%r15d, %ebx
	jle	.L9
	movl	(%r8,%r15,4), %edx
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	incq	%r15
	movl	$2, %edi
	movq	%r8, 8(%rsp)
	call	__printf_chk@PLT
	movq	8(%rsp), %r8
	jmp	.L6
.L9:
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	incl	%r13d
	addl	%ebx, %r12d
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L3
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z13DisplayMatrixPiii, .-_Z13DisplayMatrixPiii
	.globl	_Z38__device_stub__Z14MatrixAdd_CUDAPiS_S_PiS_S_
	.type	_Z38__device_stub__Z14MatrixAdd_CUDAPiS_S_PiS_S_, @function
_Z38__device_stub__Z14MatrixAdd_CUDAPiS_S_PiS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z14MatrixAdd_CUDAPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L10:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z38__device_stub__Z14MatrixAdd_CUDAPiS_S_PiS_S_, .-_Z38__device_stub__Z14MatrixAdd_CUDAPiS_S_PiS_S_
	.globl	_Z14MatrixAdd_CUDAPiS_S_
	.type	_Z14MatrixAdd_CUDAPiS_S_, @function
_Z14MatrixAdd_CUDAPiS_S_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z14MatrixAdd_CUDAPiS_S_PiS_S_
	.cfi_endproc
.LFE2054:
	.size	_Z14MatrixAdd_CUDAPiS_S_, .-_Z14MatrixAdd_CUDAPiS_S_
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$40000, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$40000, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$40000, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movl	$40000, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$40000, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$40000, %esi
	call	cudaMalloc@PLT
	xorl	%eax, %eax
.L16:
	imulq	$400, %rax, %rcx
	movl	%eax, %edi
	leal	1(%rax,%rax), %esi
	xorl	%edx, %edx
.L17:
	leal	(%rdx,%rdi), %r8d
	incl	%edx
	movl	%esi, (%r12,%rcx)
	movl	%r8d, 0(%rbp,%rcx)
	addq	$4, %rcx
	cmpl	$100, %edx
	jne	.L17
	incq	%rax
	cmpq	$100, %rax
	jne	.L16
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$40000, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$40000, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$42949672970, %rdi
	movl	$1, %esi
	movq	%rdi, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z38__device_stub__Z14MatrixAdd_CUDAPiS_S_PiS_S_
.L19:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$40000, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	$10, %edx
	movl	$10, %esi
	movq	%rbx, %rdi
	call	_Z13DisplayMatrixPiii
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z14MatrixAdd_CUDAPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14MatrixAdd_CUDAPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include<hip/hip_runtime.h>


const int N = 100 ;//256

__global__ void MatrixAdd_CUDA(int *A, int *B, int *C) { 
      int i= blockIdx.y*blockDim.y+ threadIdx.y; 
      int j = blockIdx.x*blockDim.x+ threadIdx.x; 
    *(C + i*N + j) =  *(A + i*N + j)+ *(B + i*N + j); 
      
}      
void DisplayMatrix(int *A, int row,  int col)
{
    int i,j;
    for(i=0;i<row;i++){
        for(j=0;j<col;j++) printf("  %d",*(A+i*col+j));
        printf("\n");
    }
}
   
int main (void)
{
      int *Host_a, *Host_b, *Host_c;
      Host_a  = (int *) malloc ((N*N)*sizeof(int));
      Host_b   = (int *) malloc ((N*N)*sizeof(int));
      Host_c   = (int *) malloc ((N*N)*sizeof(int));
     

      int *dev_a , *dev_b, *dev_c ;
       hipMalloc(&dev_a , (N*N)*sizeof(int));
      hipMalloc(&dev_b , (N*N)*sizeof(int));
      hipMalloc(&dev_c , (N*N)*sizeof(int));

      for ( int i = 0; i <N ; i++ )
          for(int j=0;j<N;j++){
              *(Host_a+i*N+j)=i*2+1;
              *(Host_b+i*N+j)=i+j;
               
          }
      hipMemcpy (dev_a , Host_a , (N*N)*sizeof(int) , hipMemcpyHostToDevice);
      hipMemcpy (dev_b , Host_b , (N*N)*sizeof(int) , hipMemcpyHostToDevice);

      //int threadsPerBlock = 256;    int blocksPerGrid = (N + threadsPerBlock - 1) / threadsPerBlock
   
      dim3 threadsPerBlock(10, 10);    //16 16 
      dim3 numBlocks(N / threadsPerBlock.x, N / threadsPerBlock.y); 

      MatrixAdd_CUDA <<< numBlocks, threadsPerBlock  >>> (dev_a , dev_b , dev_c ) ;

     hipMemcpy(Host_c , dev_c , (N*N)*sizeof(int) , hipMemcpyDeviceToHost);

      DisplayMatrix(Host_c,10,10);
                 

      hipFree (dev_a) ;
      hipFree (dev_b) ;
      hipFree (dev_c) ;
      
      return 0 ;

}
	.text
	.file	"matrix_plus.hip"
	.globl	_Z29__device_stub__MatrixAdd_CUDAPiS_S_ # -- Begin function _Z29__device_stub__MatrixAdd_CUDAPiS_S_
	.type	_Z29__device_stub__MatrixAdd_CUDAPiS_S_,@function
_Z29__device_stub__MatrixAdd_CUDAPiS_S_: # @_Z29__device_stub__MatrixAdd_CUDAPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14MatrixAdd_CUDAPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__MatrixAdd_CUDAPiS_S_, .Lfunc_end0-_Z29__device_stub__MatrixAdd_CUDAPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z13DisplayMatrixPiii           # -- Begin function _Z13DisplayMatrixPiii
	.type	_Z13DisplayMatrixPiii,@function
_Z13DisplayMatrixPiii:                  # @_Z13DisplayMatrixPiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, 4(%rsp)                   # 4-byte Spill
	testl	%esi, %esi
	jle	.LBB1_6
# %bb.1:                                # %.preheader.lr.ph
	movq	%rdi, %r14
	movslq	4(%rsp), %r15                   # 4-byte Folded Reload
	movl	%esi, %r12d
	movl	%r15d, %r13d
	shlq	$2, %r15
	xorl	%ebp, %ebp
.LBB1_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	cmpl	$0, 4(%rsp)                     # 4-byte Folded Reload
	jle	.LBB1_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	xorl	%ebx, %ebx
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r14,%rbx,4), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	%rbx, %r13
	jne	.LBB1_4
.LBB1_5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%rbp
	addq	%r15, %r14
	cmpq	%r12, %rbp
	jne	.LBB1_2
.LBB1_6:                                # %._crit_edge13
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z13DisplayMatrixPiii, .Lfunc_end1-_Z13DisplayMatrixPiii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$40000, %edi                    # imm = 0x9C40
	callq	malloc
	movq	%rax, %r15
	movl	$40000, %edi                    # imm = 0x9C40
	callq	malloc
	movq	%rax, %r14
	movl	$40000, %edi                    # imm = 0x9C40
	callq	malloc
	movq	%rax, %rbx
	leaq	24(%rsp), %rdi
	movl	$40000, %esi                    # imm = 0x9C40
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$40000, %esi                    # imm = 0x9C40
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$40000, %esi                    # imm = 0x9C40
	callq	hipMalloc
	xorl	%eax, %eax
	movl	$400, %ecx                      # imm = 0x190
	movq	%r15, %rdx
	movq	%r14, %rsi
.LBB2_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	leal	1(,%rax,2), %edi
	xorl	%r8d, %r8d
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%edi, (%rdx,%r8,4)
	leal	(%rax,%r8), %r9d
	movl	%r9d, (%rsi,%r8,4)
	incq	%r8
	cmpq	$100, %r8
	jne	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%rax
	addq	%rcx, %rsi
	addq	%rcx, %rdx
	cmpq	$100, %rax
	jne	.LBB2_1
# %bb.4:
	movq	24(%rsp), %rdi
	movl	$40000, %edx                    # imm = 0x9C40
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movl	$40000, %edx                    # imm = 0x9C40
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$42949672970, %rdi              # imm = 0xA0000000A
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z29__device_stub__MatrixAdd_CUDAPiS_S_
.LBB2_6:
	movq	8(%rsp), %rsi
	movl	$40000, %edx                    # imm = 0x9C40
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	movl	$10, %esi
	movl	$10, %edx
	callq	_Z13DisplayMatrixPiii
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14MatrixAdd_CUDAPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14MatrixAdd_CUDAPiS_S_,@object # @_Z14MatrixAdd_CUDAPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z14MatrixAdd_CUDAPiS_S_
	.p2align	3, 0x0
_Z14MatrixAdd_CUDAPiS_S_:
	.quad	_Z29__device_stub__MatrixAdd_CUDAPiS_S_
	.size	_Z14MatrixAdd_CUDAPiS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"  %d"
	.size	.L.str, 5

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14MatrixAdd_CUDAPiS_S_"
	.size	.L__unnamed_1, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__MatrixAdd_CUDAPiS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14MatrixAdd_CUDAPiS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14MatrixAdd_CUDAPiS_S_ ; -- Begin function _Z14MatrixAdd_CUDAPiS_S_
	.globl	_Z14MatrixAdd_CUDAPiS_S_
	.p2align	8
	.type	_Z14MatrixAdd_CUDAPiS_S_,@function
_Z14MatrixAdd_CUDAPiS_S_:               ; @_Z14MatrixAdd_CUDAPiS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, 0x64, v2
	v_mad_u64_u32 v[3:4], null, s14, s2, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	v_add_co_u32 v4, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, v4, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo
	global_load_b32 v4, v[4:5], off
	global_load_b32 v5, v[6:7], off
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, v5, v4
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14MatrixAdd_CUDAPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14MatrixAdd_CUDAPiS_S_, .Lfunc_end0-_Z14MatrixAdd_CUDAPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 256
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14MatrixAdd_CUDAPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14MatrixAdd_CUDAPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
