#include <iostream>
#include <cuda.h>
#include <cstdlib>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#include <algorithm>


#define HISTOGRAM_LENGTH 256
#define CBLOCK 512


//@@ insert code here
__global__
	void FtoCKernel(float *IIData, unsigned char *ICData, int Ipixels){
	int pos = blockIdx.x*CBLOCK+threadIdx.x;
	if(pos < Ipixels) ICData[pos] = (unsigned char) 255.0 * IIData[pos];
}

__global__
	void RtoGKernel(unsigned char *IIData, unsigned char *ICGData, int Ipixels){
	int i = blockIdx.x*CBLOCK+threadIdx.x*3;
	if(i < Ipixels*3){
		ICGData[i] = (unsigned char) (0.21*IIData[i] + 0.71*IIData[i+1] + 0.07*IIData[i+2] );  
	}
	
}

__global__
	void HKernel(unsigned char * IIData, unsigned int * IHistogram, int Ipixels){
	int b = blockIdx.x *blockDim.x; 
        int t = threadIdx.x;
	__shared__ int pHistogram[HISTOGRAM_LENGTH];
	if(t < HISTOGRAM_LENGTH)pHistogram[t] = 0;
	__syncthreads();
	int i = b+t;
	int s = blockDim.x* gridDim.x;
	while(i < Ipixels){
		atomicAdd( &(pHistogram[IIData[i]]), 1);
		i+=s;
	}
	__syncthreads();
	if(t < HISTOGRAM_LENGTH)atomicAdd( &(IHistogram[t]), pHistogram[t]);	
}

__global__
	void CDFKernel(unsigned int * IHistogram, float * ICDF, float fIarea){ 
    int t = threadIdx.x;
	if(t < HISTOGRAM_LENGTH) ICDF[t] = 0.0;
	//reductio
	for(int s = 1; s <= HISTOGRAM_LENGTH/2; s*=2){
        int i = (t+1)*s*2-1;
        if (i < HISTOGRAM_LENGTH) ICDF[i] += (float) ICDF[i-s] / fIarea;         
        __syncthreads();
        
    }
	//post-reduction
    for(int s =  HISTOGRAM_LENGTH/4; s > 0; s /= 2){
        __syncthreads();
        int j = (t+1)*s*2-1; // Same as other index
        if(j+s < HISTOGRAM_LENGTH)ICDF[j+s] += (float) ICDF[j] / fIarea;
    } 
}

__global__
void CDFminKernel(float * I, float minv) {
    
    int t = threadIdx.x;
    __shared__ int pMin[HISTOGRAM_LENGTH];
    if(t < HISTOGRAM_LENGTH)pMin[t] = I[t];//First half
    __syncthreads();
    for(int s = blockDim.x/2; s > 0; s/=2){
        __syncthreads();
        if(t < s) pMin[t] = (pMin[t] < pMin[t+s]) ? pMin[t+s] : pMin[t];
    }
    minv = pMin[0];
}

void populateArray(float a[], int l){
        srand48(time(NULL));
        float prev = drand48();
        float nxt;
	for(int i = 1; i < l; i++){
        	do{
		    nxt = drand48(); 
                }while(nxt==prev);
            a[i] = nxt;
            prev = nxt;
	}
}

float absDif(float a, float b){
      float c = a-b;
      if(c < 0)c*=-1;
      return c;
}


int main(){
    //int lengths[5] = {5, 10, 20, 40, 50};
    //for(int x=0; x < 5; x++){
    //int ilen = lengths[x];
    int ilen = 5;
    int imageWidth = ilen;
    int imageHeight = ilen;
    int imageChannels = 3;
    float * hostInputImageData;
    float * hostOutputImageData;
    const char * inputImageFile;
    float * dInputImageData;
    unsigned char * dcharImageData;
    unsigned char * charImageData; // host
    unsigned char * dcharGImageData;
    unsigned char * charGImageData; // host
    unsigned int * dImageHistogram;
    float * dImageCDF;
    float dminCDF;
    float * dOutputImageData;
    printf("Size %dx%d\n", ilen, ilen);
    int imageArea = imageWidth*imageHeight;
    float I[imageArea*imageChannels];
    populateArray(I, imageArea*imageChannels);
    //Cuda malloc
    cudaMalloc((void **) &dInputImageData, imageArea * imageChannels * sizeof(float));
    cudaMalloc((void **) &dcharImageData, imageArea * imageChannels * sizeof(unsigned char));
//    cudaMalloc((void **) &dImageHistogram, HISTOGRAM_LENGTH * sizeof(unsigned int));
//    cudaMalloc((void **) &dImageCDF, HISTOGRAM_LENGTH * sizeof(float));
//    cudaMalloc((void **) &dminCDF, sizeof(float));
//    cudaMalloc((void **) &dOutputImageData, imageArea * sizeof(float));
    //Cuda memcpy
    cudaMemcpy(dInputImageData,
               hostInputImageData,
               imageArea * imageChannels *sizeof(float),
               cudaMemcpyHostToDevice);
    //Cuda conv 1
    dim3 dimCGrid = (imageArea*imageChannels-1)/CBLOCK + 1; 
    dim3 dimCBlock = CBLOCK;
    FtoCKernel<<<dimCGrid, dimCBlock>>>(dInputImageData,dcharImageData,imageArea*imageChannels);
    cudaDeviceSynchronize();    
    //Cuda conv 2
    //dim3 dimGGrid = (imageArea-1)/CBLOCK + 1;
    //dim3 dimGBlock = CBLOCK;
    //RtoGKernel<<<dimGGrid, dimGBlock>>>(dcharImageData, dcharGImageData, imageArea);
    //cudaDeviceSynchronize(); 
    //Cuda mcpy to compare
    printf("Copying back\n");
    cudaError_t err = cudaMemcpy(charImageData,dcharImageData, imageArea * imageChannels *sizeof(unsigned char), cudaMemcpyDeviceToHost);
    printf("Copied\n");
    printf("Error %s\n", cudaGetErrorString(err));

//    for(int i = 0; i < imageArea*imageChannels; i ++){
//        unsigned char dres = charImageData[i];
//        unsigned char cres = (unsigned char) 255 * I[i];
//        if(dres != cres)printf("%c != %c at %d\n",dres, cres, i);
//        else printf("OK at %d\n", i);
//    }
    //cudaMemcpy(charGImageData,
    //           dcharGImageData,
    //           imageArea *sizeof(unsigned char),
    //           cudaMemcpyDeviceToHost);
    //for(int i = 0; i < imageArea; i++){
    //		if(charGImageData[i] != (unsigned char) (0.21*charImageData[i] + 0.71*charImageData[i+1] + 0.07*charImageData[i+2] ))printf("Error at %d", i);
    //}

    
    cudaFree(dInputImageData);cudaFree(dcharImageData);cudaFree(dcharImageData);
    cudaFree(dImageCDF); cudaFree(dOutputImageData);
    //}
    return 0;
}


	.file	"tmpxft_001ffd80_00000000-6_histogram.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3894:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3894:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z13populateArrayPfi
	.type	_Z13populateArrayPfi, @function
_Z13populateArrayPfi:
.LFB3889:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	xorl	%edi, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	$1, %ebx
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	call	time@PLT
	movq	%rax, %rdi
	call	srand48@PLT
	call	drand48@PLT
	cvtsd2ss	%xmm0, %xmm1
.L3:
	cmpl	%ebx, %ebp
	jle	.L11
.L4:
	movss	%xmm1, 12(%rsp)
	call	drand48@PLT
	movss	12(%rsp), %xmm1
	cvtsd2ss	%xmm0, %xmm0
	ucomiss	%xmm0, %xmm1
	jp	.L6
	je	.L4
.L6:
	movss	%xmm0, (%r12,%rbx,4)
	movaps	%xmm0, %xmm1
	incq	%rbx
	jmp	.L3
.L11:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3889:
	.size	_Z13populateArrayPfi, .-_Z13populateArrayPfi
	.globl	_Z6absDifff
	.type	_Z6absDifff, @function
_Z6absDifff:
.LFB3890:
	.cfi_startproc
	endbr64
	subss	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	comiss	%xmm0, %xmm1
	jbe	.L12
	xorps	.LC1(%rip), %xmm0
.L12:
	ret
	.cfi_endproc
.LFE3890:
	.size	_Z6absDifff, .-_Z6absDifff
	.globl	_Z33__device_stub__Z10FtoCKernelPfPhiPfPhi
	.type	_Z33__device_stub__Z10FtoCKernelPfPhiPfPhi, @function
_Z33__device_stub__Z10FtoCKernelPfPhiPfPhi:
.LFB3916:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10FtoCKernelPfPhi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L16:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3916:
	.size	_Z33__device_stub__Z10FtoCKernelPfPhiPfPhi, .-_Z33__device_stub__Z10FtoCKernelPfPhiPfPhi
	.globl	_Z10FtoCKernelPfPhi
	.type	_Z10FtoCKernelPfPhi, @function
_Z10FtoCKernelPfPhi:
.LFB3917:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z10FtoCKernelPfPhiPfPhi
	.cfi_endproc
.LFE3917:
	.size	_Z10FtoCKernelPfPhi, .-_Z10FtoCKernelPfPhi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Size %dx%d\n"
.LC3:
	.string	"Copying back\n"
.LC4:
	.string	"Copied\n"
.LC5:
	.string	"Error %s\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3891:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$5, %ecx
	movl	$5, %edx
	movl	$2, %edi
	leaq	.LC2(%rip), %rsi
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%rbx
	subq	$56, %rsp
	.cfi_offset 3, -24
	movq	%fs:40, %rax
	movq	%rax, -24(%rbp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rsp, %rax
.L22:
	cmpq	%rax, %rsp
	je	.L23
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L22
.L23:
	subq	$304, %rsp
	orq	$0, 296(%rsp)
	movl	$75, %esi
	movq	%rsp, %rdi
	call	_Z13populateArrayPfi
	leaq	-64(%rbp), %rdi
	movl	$300, %esi
	call	cudaMalloc@PLT
	leaq	-56(%rbp), %rdi
	movl	$75, %esi
	call	cudaMalloc@PLT
	movq	-64(%rbp), %rdi
	xorl	%esi, %esi
	movl	$1, %ecx
	movl	$300, %edx
	call	cudaMemcpy@PLT
	movl	$8388609, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$9, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movq	-56(%rbp), %rsi
	movq	-64(%rbp), %rdi
	movl	$75, %edx
	call	_Z33__device_stub__Z10FtoCKernelPfPhiPfPhi
.L25:
	call	cudaDeviceSynchronize@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	-56(%rbp), %rsi
	movl	$2, %ecx
	xorl	%edi, %edi
	movl	$75, %edx
	call	cudaMemcpy@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	movl	%eax, %ebx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	-64(%rbp), %rdi
	call	cudaFree@PLT
	movq	-56(%rbp), %rdi
	call	cudaFree@PLT
	movq	-56(%rbp), %rdi
	call	cudaFree@PLT
	xorl	%edi, %edi
	call	cudaFree@PLT
	xorl	%edi, %edi
	call	cudaFree@PLT
	movq	-24(%rbp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	movq	-8(%rbp), %rbx
	xorl	%eax, %eax
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3891:
	.size	main, .-main
	.text
	.globl	_Z33__device_stub__Z10RtoGKernelPhS_iPhS_i
	.type	_Z33__device_stub__Z10RtoGKernelPhS_iPhS_i, @function
_Z33__device_stub__Z10RtoGKernelPhS_iPhS_i:
.LFB3918:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10RtoGKernelPhS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L28:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3918:
	.size	_Z33__device_stub__Z10RtoGKernelPhS_iPhS_i, .-_Z33__device_stub__Z10RtoGKernelPhS_iPhS_i
	.globl	_Z10RtoGKernelPhS_i
	.type	_Z10RtoGKernelPhS_i, @function
_Z10RtoGKernelPhS_i:
.LFB3919:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z10RtoGKernelPhS_iPhS_i
	.cfi_endproc
.LFE3919:
	.size	_Z10RtoGKernelPhS_i, .-_Z10RtoGKernelPhS_i
	.globl	_Z29__device_stub__Z7HKernelPhPjiPhPji
	.type	_Z29__device_stub__Z7HKernelPhPjiPhPji, @function
_Z29__device_stub__Z7HKernelPhPjiPhPji:
.LFB3920:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z7HKernelPhPji(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L33:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3920:
	.size	_Z29__device_stub__Z7HKernelPhPjiPhPji, .-_Z29__device_stub__Z7HKernelPhPjiPhPji
	.globl	_Z7HKernelPhPji
	.type	_Z7HKernelPhPji, @function
_Z7HKernelPhPji:
.LFB3921:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z7HKernelPhPjiPhPji
	.cfi_endproc
.LFE3921:
	.size	_Z7HKernelPhPji, .-_Z7HKernelPhPji
	.globl	_Z31__device_stub__Z9CDFKernelPjPffPjPff
	.type	_Z31__device_stub__Z9CDFKernelPjPffPjPff, @function
_Z31__device_stub__Z9CDFKernelPjPffPjPff:
.LFB3922:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	32(%rsp), %rdx
	movq	%rsi, 16(%rsp)
	leaq	48(%rsp), %rdi
	leaq	60(%rsp), %rsi
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9CDFKernelPjPff(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L38:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L40
	call	__stack_chk_fail@PLT
.L40:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3922:
	.size	_Z31__device_stub__Z9CDFKernelPjPffPjPff, .-_Z31__device_stub__Z9CDFKernelPjPffPjPff
	.globl	_Z9CDFKernelPjPff
	.type	_Z9CDFKernelPjPff, @function
_Z9CDFKernelPjPff:
.LFB3923:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z9CDFKernelPjPffPjPff
	.cfi_endproc
.LFE3923:
	.size	_Z9CDFKernelPjPff, .-_Z9CDFKernelPjPff
	.globl	_Z33__device_stub__Z12CDFminKernelPffPff
	.type	_Z33__device_stub__Z12CDFminKernelPffPff, @function
_Z33__device_stub__Z12CDFminKernelPffPff:
.LFB3924:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movss	%xmm0, 4(%rsp)
	leaq	52(%rsp), %rsi
	leaq	40(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12CDFminKernelPff(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L43:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L45
	call	__stack_chk_fail@PLT
.L45:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3924:
	.size	_Z33__device_stub__Z12CDFminKernelPffPff, .-_Z33__device_stub__Z12CDFminKernelPffPff
	.globl	_Z12CDFminKernelPff
	.type	_Z12CDFminKernelPff, @function
_Z12CDFminKernelPff:
.LFB3925:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z12CDFminKernelPffPff
	.cfi_endproc
.LFE3925:
	.size	_Z12CDFminKernelPff, .-_Z12CDFminKernelPff
	.section	.rodata.str1.1
.LC6:
	.string	"_Z12CDFminKernelPff"
.LC7:
	.string	"_Z9CDFKernelPjPff"
.LC8:
	.string	"_Z7HKernelPhPji"
.LC9:
	.string	"_Z10RtoGKernelPhS_i"
.LC10:
	.string	"_Z10FtoCKernelPfPhi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3927:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12CDFminKernelPff(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9CDFKernelPjPff(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7HKernelPhPji(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10RtoGKernelPhS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10FtoCKernelPfPhi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3927:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC1:
	.long	-2147483648
	.long	0
	.long	0
	.long	0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <cstdlib>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#include <algorithm>


#define HISTOGRAM_LENGTH 256
#define CBLOCK 512


//@@ insert code here
__global__
	void FtoCKernel(float *IIData, unsigned char *ICData, int Ipixels){
	int pos = blockIdx.x*CBLOCK+threadIdx.x;
	if(pos < Ipixels) ICData[pos] = (unsigned char) 255.0 * IIData[pos];
}

__global__
	void RtoGKernel(unsigned char *IIData, unsigned char *ICGData, int Ipixels){
	int i = blockIdx.x*CBLOCK+threadIdx.x*3;
	if(i < Ipixels*3){
		ICGData[i] = (unsigned char) (0.21*IIData[i] + 0.71*IIData[i+1] + 0.07*IIData[i+2] );  
	}
	
}

__global__
	void HKernel(unsigned char * IIData, unsigned int * IHistogram, int Ipixels){
	int b = blockIdx.x *blockDim.x; 
        int t = threadIdx.x;
	__shared__ int pHistogram[HISTOGRAM_LENGTH];
	if(t < HISTOGRAM_LENGTH)pHistogram[t] = 0;
	__syncthreads();
	int i = b+t;
	int s = blockDim.x* gridDim.x;
	while(i < Ipixels){
		atomicAdd( &(pHistogram[IIData[i]]), 1);
		i+=s;
	}
	__syncthreads();
	if(t < HISTOGRAM_LENGTH)atomicAdd( &(IHistogram[t]), pHistogram[t]);	
}

__global__
	void CDFKernel(unsigned int * IHistogram, float * ICDF, float fIarea){ 
    int t = threadIdx.x;
	if(t < HISTOGRAM_LENGTH) ICDF[t] = 0.0;
	//reductio
	for(int s = 1; s <= HISTOGRAM_LENGTH/2; s*=2){
        int i = (t+1)*s*2-1;
        if (i < HISTOGRAM_LENGTH) ICDF[i] += (float) ICDF[i-s] / fIarea;         
        __syncthreads();
        
    }
	//post-reduction
    for(int s =  HISTOGRAM_LENGTH/4; s > 0; s /= 2){
        __syncthreads();
        int j = (t+1)*s*2-1; // Same as other index
        if(j+s < HISTOGRAM_LENGTH)ICDF[j+s] += (float) ICDF[j] / fIarea;
    } 
}

__global__
void CDFminKernel(float * I, float minv) {
    
    int t = threadIdx.x;
    __shared__ int pMin[HISTOGRAM_LENGTH];
    if(t < HISTOGRAM_LENGTH)pMin[t] = I[t];//First half
    __syncthreads();
    for(int s = blockDim.x/2; s > 0; s/=2){
        __syncthreads();
        if(t < s) pMin[t] = (pMin[t] < pMin[t+s]) ? pMin[t+s] : pMin[t];
    }
    minv = pMin[0];
}

void populateArray(float a[], int l){
        srand48(time(NULL));
        float prev = drand48();
        float nxt;
	for(int i = 1; i < l; i++){
        	do{
		    nxt = drand48(); 
                }while(nxt==prev);
            a[i] = nxt;
            prev = nxt;
	}
}

float absDif(float a, float b){
      float c = a-b;
      if(c < 0)c*=-1;
      return c;
}


int main(){
    //int lengths[5] = {5, 10, 20, 40, 50};
    //for(int x=0; x < 5; x++){
    //int ilen = lengths[x];
    int ilen = 5;
    int imageWidth = ilen;
    int imageHeight = ilen;
    int imageChannels = 3;
    float * hostInputImageData;
    float * hostOutputImageData;
    const char * inputImageFile;
    float * dInputImageData;
    unsigned char * dcharImageData;
    unsigned char * charImageData; // host
    unsigned char * dcharGImageData;
    unsigned char * charGImageData; // host
    unsigned int * dImageHistogram;
    float * dImageCDF;
    float dminCDF;
    float * dOutputImageData;
    printf("Size %dx%d\n", ilen, ilen);
    int imageArea = imageWidth*imageHeight;
    float I[imageArea*imageChannels];
    populateArray(I, imageArea*imageChannels);
    //Cuda malloc
    hipMalloc((void **) &dInputImageData, imageArea * imageChannels * sizeof(float));
    hipMalloc((void **) &dcharImageData, imageArea * imageChannels * sizeof(unsigned char));
//    cudaMalloc((void **) &dImageHistogram, HISTOGRAM_LENGTH * sizeof(unsigned int));
//    cudaMalloc((void **) &dImageCDF, HISTOGRAM_LENGTH * sizeof(float));
//    cudaMalloc((void **) &dminCDF, sizeof(float));
//    cudaMalloc((void **) &dOutputImageData, imageArea * sizeof(float));
    //Cuda memcpy
    hipMemcpy(dInputImageData,
               hostInputImageData,
               imageArea * imageChannels *sizeof(float),
               hipMemcpyHostToDevice);
    //Cuda conv 1
    dim3 dimCGrid = (imageArea*imageChannels-1)/CBLOCK + 1; 
    dim3 dimCBlock = CBLOCK;
    FtoCKernel<<<dimCGrid, dimCBlock>>>(dInputImageData,dcharImageData,imageArea*imageChannels);
    hipDeviceSynchronize();    
    //Cuda conv 2
    //dim3 dimGGrid = (imageArea-1)/CBLOCK + 1;
    //dim3 dimGBlock = CBLOCK;
    //RtoGKernel<<<dimGGrid, dimGBlock>>>(dcharImageData, dcharGImageData, imageArea);
    //cudaDeviceSynchronize(); 
    //Cuda mcpy to compare
    printf("Copying back\n");
    hipError_t err = hipMemcpy(charImageData,dcharImageData, imageArea * imageChannels *sizeof(unsigned char), hipMemcpyDeviceToHost);
    printf("Copied\n");
    printf("Error %s\n", hipGetErrorString(err));

//    for(int i = 0; i < imageArea*imageChannels; i ++){
//        unsigned char dres = charImageData[i];
//        unsigned char cres = (unsigned char) 255 * I[i];
//        if(dres != cres)printf("%c != %c at %d\n",dres, cres, i);
//        else printf("OK at %d\n", i);
//    }
    //cudaMemcpy(charGImageData,
    //           dcharGImageData,
    //           imageArea *sizeof(unsigned char),
    //           cudaMemcpyDeviceToHost);
    //for(int i = 0; i < imageArea; i++){
    //		if(charGImageData[i] != (unsigned char) (0.21*charImageData[i] + 0.71*charImageData[i+1] + 0.07*charImageData[i+2] ))printf("Error at %d", i);
    //}

    
    hipFree(dInputImageData);hipFree(dcharImageData);hipFree(dcharImageData);
    hipFree(dImageCDF); hipFree(dOutputImageData);
    //}
    return 0;
}


	.text
	.file	"histogram.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z25__device_stub__FtoCKernelPfPhi # -- Begin function _Z25__device_stub__FtoCKernelPfPhi
	.type	_Z25__device_stub__FtoCKernelPfPhi,@function
_Z25__device_stub__FtoCKernelPfPhi:     # @_Z25__device_stub__FtoCKernelPfPhi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10FtoCKernelPfPhi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__FtoCKernelPfPhi, .Lfunc_end0-_Z25__device_stub__FtoCKernelPfPhi
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__RtoGKernelPhS_i # -- Begin function _Z25__device_stub__RtoGKernelPhS_i
	.type	_Z25__device_stub__RtoGKernelPhS_i,@function
_Z25__device_stub__RtoGKernelPhS_i:     # @_Z25__device_stub__RtoGKernelPhS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10RtoGKernelPhS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__RtoGKernelPhS_i, .Lfunc_end1-_Z25__device_stub__RtoGKernelPhS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__HKernelPhPji # -- Begin function _Z22__device_stub__HKernelPhPji
	.type	_Z22__device_stub__HKernelPhPji,@function
_Z22__device_stub__HKernelPhPji:        # @_Z22__device_stub__HKernelPhPji
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7HKernelPhPji, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z22__device_stub__HKernelPhPji, .Lfunc_end2-_Z22__device_stub__HKernelPhPji
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__CDFKernelPjPff # -- Begin function _Z24__device_stub__CDFKernelPjPff
	.type	_Z24__device_stub__CDFKernelPjPff,@function
_Z24__device_stub__CDFKernelPjPff:      # @_Z24__device_stub__CDFKernelPjPff
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdx, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9CDFKernelPjPff, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z24__device_stub__CDFKernelPjPff, .Lfunc_end3-_Z24__device_stub__CDFKernelPjPff
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__CDFminKernelPff # -- Begin function _Z27__device_stub__CDFminKernelPff
	.type	_Z27__device_stub__CDFminKernelPff,@function
_Z27__device_stub__CDFminKernelPff:     # @_Z27__device_stub__CDFminKernelPff
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12CDFminKernelPff, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z27__device_stub__CDFminKernelPff, .Lfunc_end4-_Z27__device_stub__CDFminKernelPff
	.cfi_endproc
                                        # -- End function
	.globl	_Z13populateArrayPfi            # -- Begin function _Z13populateArrayPfi
	.type	_Z13populateArrayPfi,@function
_Z13populateArrayPfi:                   # @_Z13populateArrayPfi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movq	%rdi, %rbx
	xorl	%edi, %edi
	callq	time
	movq	%rax, %rdi
	callq	srand48
	callq	drand48
	cmpl	$2, %ebp
	jl	.LBB5_5
# %bb.1:                                # %.preheader.preheader
	cvtsd2ss	%xmm0, %xmm1
	movl	%ebp, %r14d
	movl	$1, %r15d
.LBB5_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_3 Depth 2
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
.LBB5_3:                                #   Parent Loop BB5_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	drand48
	movss	4(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	cvtsd2ss	%xmm0, %xmm0
	ucomiss	%xmm0, %xmm1
	jne	.LBB5_4
	jnp	.LBB5_3
.LBB5_4:                                #   in Loop: Header=BB5_2 Depth=1
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	movaps	%xmm0, %xmm1
	cmpq	%r14, %r15
	jne	.LBB5_2
.LBB5_5:                                # %._crit_edge
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z13populateArrayPfi, .Lfunc_end5-_Z13populateArrayPfi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z6absDifff
.LCPI6_0:
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.text
	.globl	_Z6absDifff
	.type	_Z6absDifff,@function
_Z6absDifff:                            # @_Z6absDifff
	.cfi_startproc
# %bb.0:
	subss	%xmm1, %xmm0
	movaps	.LCPI6_0(%rip), %xmm1           # xmm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
	xorps	%xmm0, %xmm1
	maxss	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	retq
.Lfunc_end6:
	.size	_Z6absDifff, .Lfunc_end6-_Z6absDifff
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$328, %rsp                      # imm = 0x148
	.cfi_def_cfa_offset 352
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	$.L.str, %edi
	movl	$5, %esi
	movl	$5, %edx
	xorl	%eax, %eax
	callq	printf
	movq	%rsp, %r14
	leaq	16(%rsp), %rdi
	movl	$75, %esi
	callq	_Z13populateArrayPfi
	leaq	8(%rsp), %rbx
	movl	$300, %esi                      # imm = 0x12C
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$75, %esi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movl	$300, %edx                      # imm = 0x12C
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	511(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_2
# %bb.1:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$75, %edx
	callq	_Z25__device_stub__FtoCKernelPfPhi
.LBB7_2:
	callq	hipDeviceSynchronize
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	(%rsp), %rsi
	movl	$75, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %ebx
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	callq	hipFree
	callq	hipFree
	movq	%r14, %rsp
	xorl	%eax, %eax
	addq	$328, %rsp                      # imm = 0x148
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10FtoCKernelPfPhi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10RtoGKernelPhS_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7HKernelPhPji, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9CDFKernelPjPff, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12CDFminKernelPff, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10FtoCKernelPfPhi,@object     # @_Z10FtoCKernelPfPhi
	.section	.rodata,"a",@progbits
	.globl	_Z10FtoCKernelPfPhi
	.p2align	3, 0x0
_Z10FtoCKernelPfPhi:
	.quad	_Z25__device_stub__FtoCKernelPfPhi
	.size	_Z10FtoCKernelPfPhi, 8

	.type	_Z10RtoGKernelPhS_i,@object     # @_Z10RtoGKernelPhS_i
	.globl	_Z10RtoGKernelPhS_i
	.p2align	3, 0x0
_Z10RtoGKernelPhS_i:
	.quad	_Z25__device_stub__RtoGKernelPhS_i
	.size	_Z10RtoGKernelPhS_i, 8

	.type	_Z7HKernelPhPji,@object         # @_Z7HKernelPhPji
	.globl	_Z7HKernelPhPji
	.p2align	3, 0x0
_Z7HKernelPhPji:
	.quad	_Z22__device_stub__HKernelPhPji
	.size	_Z7HKernelPhPji, 8

	.type	_Z9CDFKernelPjPff,@object       # @_Z9CDFKernelPjPff
	.globl	_Z9CDFKernelPjPff
	.p2align	3, 0x0
_Z9CDFKernelPjPff:
	.quad	_Z24__device_stub__CDFKernelPjPff
	.size	_Z9CDFKernelPjPff, 8

	.type	_Z12CDFminKernelPff,@object     # @_Z12CDFminKernelPff
	.globl	_Z12CDFminKernelPff
	.p2align	3, 0x0
_Z12CDFminKernelPff:
	.quad	_Z27__device_stub__CDFminKernelPff
	.size	_Z12CDFminKernelPff, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Size %dx%d\n"
	.size	.L.str, 12

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Error %s\n"
	.size	.L.str.3, 10

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10FtoCKernelPfPhi"
	.size	.L__unnamed_1, 20

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10RtoGKernelPhS_i"
	.size	.L__unnamed_2, 20

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z7HKernelPhPji"
	.size	.L__unnamed_3, 16

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z9CDFKernelPjPff"
	.size	.L__unnamed_4, 18

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z12CDFminKernelPff"
	.size	.L__unnamed_5, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Copying back"
	.size	.Lstr, 13

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Copied"
	.size	.Lstr.1, 7

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__FtoCKernelPfPhi
	.addrsig_sym _Z25__device_stub__RtoGKernelPhS_i
	.addrsig_sym _Z22__device_stub__HKernelPhPji
	.addrsig_sym _Z24__device_stub__CDFKernelPjPff
	.addrsig_sym _Z27__device_stub__CDFminKernelPff
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10FtoCKernelPfPhi
	.addrsig_sym _Z10RtoGKernelPhS_i
	.addrsig_sym _Z7HKernelPhPji
	.addrsig_sym _Z9CDFKernelPjPff
	.addrsig_sym _Z12CDFminKernelPff
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10FtoCKernelPfPhi     ; -- Begin function _Z10FtoCKernelPfPhi
	.globl	_Z10FtoCKernelPfPhi
	.p2align	8
	.type	_Z10FtoCKernelPfPhi,@function
_Z10FtoCKernelPfPhi:                    ; @_Z10FtoCKernelPfPhi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x10
	v_lshl_add_u32 v0, s15, 9, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v2, 0x437f0000, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f32_e32 v2, v2
	global_store_b8 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10FtoCKernelPfPhi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10FtoCKernelPfPhi, .Lfunc_end0-_Z10FtoCKernelPfPhi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 140
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10RtoGKernelPhS_i     ; -- Begin function _Z10RtoGKernelPhS_i
	.globl	_Z10RtoGKernelPhS_i
	.p2align	8
	.type	_Z10RtoGKernelPhS_i,@function
_Z10RtoGKernelPhS_i:                    ; @_Z10RtoGKernelPhS_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x10
	v_mul_u32_u24_e32 v0, 3, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v0, s15, 9, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, 3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v5, 31, v0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v5, vcc_lo
	s_mov_b32 s0, 0xeb851eb8
	s_mov_b32 s1, 0x3fe6b851
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_clause 0x1
	global_load_u16 v3, v[1:2], off
	global_load_u8 v6, v[1:2], off offset:2
	s_waitcnt vmcnt(1)
	v_bfe_u32 v1, v3, 8, 8
	v_and_b32_e32 v3, 0xff, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[1:2], v1
	v_and_b32_e32 v3, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f64_u32_e32 v[3:4], v3
	v_mul_f64 v[1:2], v[1:2], s[0:1]
	s_mov_b32 s0, 0xae147ae1
	s_mov_b32 s1, 0x3fcae147
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[1:2], v[3:4], s[0:1], v[1:2]
	s_waitcnt vmcnt(0)
	v_cvt_f64_u32_e32 v[3:4], v6
	s_mov_b32 s0, 0x1eb851ec
	s_mov_b32 s1, 0x3fb1eb85
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[1:2], v[3:4], s[0:1], v[1:2]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f64_e32 v2, v[1:2]
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v5, vcc_lo
	global_store_b8 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10RtoGKernelPhS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10RtoGKernelPhS_i, .Lfunc_end1-_Z10RtoGKernelPhS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 272
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7HKernelPhPji         ; -- Begin function _Z7HKernelPhPji
	.globl	_Z7HKernelPhPji
	.p2align	8
	.type	_Z7HKernelPhPji,@function
_Z7HKernelPhPji:                        ; @_Z7HKernelPhPji
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_cmp_gt_u32_e32 vcc_lo, 0x100, v0
	v_lshlrev_b32_e32 v4, 2, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB2_2
; %bb.1:
	v_mov_b32_e32 v1, 0
	ds_store_b32 v4, v1
.LBB2_2:
	s_or_b32 exec_lo, exec_lo, s3
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, 0xffff, s2
	s_mov_b32 s8, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB2_5
; %bb.3:                                ; %.lr.ph.preheader
	s_load_b32 s1, s[0:1], 0x18
	v_ashrrev_i32_e32 v3, 31, v1
	v_add_co_u32 v2, s0, s4, v1
	v_mov_b32_e32 v0, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v3, s0, s5, v3, s0
	s_mov_b32 s5, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s1, s9
	s_ashr_i32 s4, s2, 31
.LBB2_4:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_u8 v5, v[2:3], off
	v_add_nc_u32_e32 v1, s2, v1
	v_add_co_u32 v2, s1, v2, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v3, s1, s4, v3, s1
	v_cmp_le_i32_e64 s0, s3, v1
	s_delay_alu instid0(VALU_DEP_1)
	s_or_b32 s5, s0, s5
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v5, 2, v5
	ds_add_u32 v5, v0
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB2_4
.LBB2_5:                                ; %Flow33
	s_or_b32 exec_lo, exec_lo, s8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB2_7
; %bb.6:
	ds_load_b32 v0, v4
	s_waitcnt lgkmcnt(0)
	global_atomic_add_u32 v4, v0, s[6:7]
.LBB2_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7HKernelPhPji
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z7HKernelPhPji, .Lfunc_end2-_Z7HKernelPhPji
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 296
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9CDFKernelPjPff       ; -- Begin function _Z9CDFKernelPjPff
	.globl	_Z9CDFKernelPjPff
	.p2align	8
	.type	_Z9CDFKernelPjPff,@function
_Z9CDFKernelPjPff:                      ; @_Z9CDFKernelPjPff
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x8
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_u32_e32 0x100, v0
	s_cbranch_execz .LBB3_2
; %bb.1:
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v1, v2, s[2:3]
.LBB3_2:
	s_or_b32 exec_lo, exec_lo, s4
	s_load_b32 s4, s[0:1], 0x10
	v_add_nc_u32_e32 v1, 1, v0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s2, -4
	s_mov_b32 s1, 1
	s_addc_u32 s5, s3, -1
.LBB3_3:                                ; =>This Inner Loop Header: Depth=1
	v_mul_lo_u32 v2, s1, v1
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x81, v2
	s_cbranch_execz .LBB3_5
; %bb.4:                                ;   in Loop: Header=BB3_3 Depth=1
	v_lshlrev_b32_e32 v2, 1, v2
	s_ashr_i32 s7, s1, 31
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 31, v2
	v_sub_co_u32 v4, vcc_lo, v2, s1
	v_subrev_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v6, null, s4, s4, v4
	v_rcp_f32_e32 v7, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v6, v7, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v7
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	v_div_scale_f32 v8, vcc_lo, v4, s4, v4
	global_load_b32 v5, v[2:3], off
	v_mul_f32_e32 v9, v8, v7
	v_fma_f32 v10, -v6, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v9, v10, v7
	v_fma_f32 v6, -v6, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v6, v6, v7, v9
	v_div_fixup_f32 v4, v6, s4, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v4, v5, v4
	global_store_b32 v[2:3], v4, off
.LBB3_5:                                ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_lshl_b32 s6, s1, 1
	s_cmp_gt_u32 s1, 64
	s_mov_b32 s1, s6
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB3_3
; %bb.6:                                ; %.preheader
	v_lshl_add_u32 v2, v0, 1, 2
	s_mov_b32 s0, 64
.LBB3_7:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_u32_u24_e32 v0, s0, v2
	s_mov_b32 s5, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add3_u32 v1, v0, s0, -1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 0x100, v1
	s_cbranch_execz .LBB3_9
; %bb.8:                                ;   in Loop: Header=BB3_7 Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[6:7], s[0:1], 2
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v3, v[0:1], off offset:-4
	v_add_co_u32 v0, vcc_lo, v0, s6
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v4, v[0:1], off offset:-4
	s_waitcnt vmcnt(1)
	v_div_scale_f32 v5, null, s4, s4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v5, v6, 1.0
	v_fmac_f32_e32 v6, v7, v6
	v_div_scale_f32 v7, vcc_lo, v3, s4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v7, v6
	v_fma_f32 v9, -v5, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v9, v6
	v_fma_f32 v5, -v5, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v5, v5, v6, v8
	v_div_fixup_f32 v3, v5, s4, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v3, v4, v3
	global_store_b32 v[0:1], v3, off offset:-4
.LBB3_9:                                ;   in Loop: Header=BB3_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_lshr_b32 s1, s0, 1
	s_cmp_lt_u32 s0, 2
	s_mov_b32 s0, s1
	s_cbranch_scc0 .LBB3_7
; %bb.10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9CDFKernelPjPff
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 8
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z9CDFKernelPjPff, .Lfunc_end3-_Z9CDFKernelPjPff
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 628
; NumSgprs: 10
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 10
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12CDFminKernelPff     ; -- Begin function _Z12CDFminKernelPff
	.globl	_Z12CDFminKernelPff
	.p2align	8
	.type	_Z12CDFminKernelPff,@function
_Z12CDFminKernelPff:                    ; @_Z12CDFminKernelPff
; %bb.0:
	v_lshlrev_b32_e32 v1, 2, v0
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e32 0x100, v0
	s_cbranch_execz .LBB4_2
; %bb.1:
	s_load_b64 s[4:5], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	global_load_b32 v2, v1, s[4:5]
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v2, v2
	ds_store_b32 v1, v2
.LBB4_2:
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_load_b32 s0, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s0, 2
	s_cbranch_scc1 .LBB4_7
; %bb.3:                                ; %.lr.ph
	s_lshr_b32 s0, s0, 1
.LBB4_4:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB4_6
; %bb.5:                                ;   in Loop: Header=BB4_4 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v3, v1
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_max_i32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB4_6:                                ;   in Loop: Header=BB4_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_lshr_b32 s1, s0, 1
	s_cmp_lt_u32 s0, 2
	s_mov_b32 s0, s1
	s_cbranch_scc0 .LBB4_4
.LBB4_7:                                ; %._crit_edge
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12CDFminKernelPff
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 6
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z12CDFminKernelPff, .Lfunc_end4-_Z12CDFminKernelPff
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 208
; NumSgprs: 6
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 6
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10FtoCKernelPfPhi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10FtoCKernelPfPhi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10RtoGKernelPhS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10RtoGKernelPhS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7HKernelPhPji
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7HKernelPhPji.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9CDFKernelPjPff
    .private_segment_fixed_size: 0
    .sgpr_count:     10
    .sgpr_spill_count: 0
    .symbol:         _Z9CDFKernelPjPff.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12CDFminKernelPff
    .private_segment_fixed_size: 0
    .sgpr_count:     6
    .sgpr_spill_count: 0
    .symbol:         _Z12CDFminKernelPff.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
