#include "includes.h"
__device__ double digamma(double x) {
double result = 0.0, xx, xx2, xx4;
for ( ; x < 7.0; ++x) { /* reduce x till x<7 */
result -= 1.0/x;
}
x -= 1.0/2.0;
xx = 1.0/x;
xx2 = xx*xx;
xx4 = xx2*xx2;
result += log(x)+(1./24.)*xx2-(7.0/960.0)*xx4+(31.0/8064.0)*xx4*xx2-(127.0/30720.0)*xx4*xx4;
return result;
}
__global__ void kernel_evaluatenu(int Nd, double qsum, double *q, double deltanu,double nulow) {
unsigned int tid = blockIdx.x*blockDim.x + threadIdx.x;
if (tid<Nd) {
double thisnu=(nulow+((double)tid)*deltanu);
double dgm=digamma(thisnu*0.5+0.5);
q[tid]=dgm-log((thisnu+1.0)*0.5); /* psi((nu+1)/2)-log((nu+1)/2) */
dgm=digamma(thisnu*0.5);
q[tid]+=-dgm+log((thisnu)*0.5); /* -psi((nu)/2)+log((nu)/2) */
q[tid]+=-qsum+1.0; /* -(-sum(ln(w_i))/N+sum(w_i)/N)+1 */
}
}
	.file	"tmpxft_0033d656_00000000-6_kernel_evaluatenu.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2011:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2011:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z7digammad
	.type	_Z7digammad, @function
_Z7digammad:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2008:
	.size	_Z7digammad, .-_Z7digammad
	.globl	_Z41__device_stub__Z17kernel_evaluatenuidPdddidPddd
	.type	_Z41__device_stub__Z17kernel_evaluatenuidPdddidPddd, @function
_Z41__device_stub__Z17kernel_evaluatenuidPdddidPddd:
.LFB2033:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movl	%edi, 44(%rsp)
	leaq	56(%rsp), %rcx
	leaq	48(%rsp), %rdx
	movq	%rsi, 24(%rsp)
	leaq	64(%rsp), %rdi
	leaq	76(%rsp), %rsi
	movsd	%xmm0, 32(%rsp)
	movsd	%xmm1, 16(%rsp)
	movsd	%xmm2, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z17kernel_evaluatenuidPddd(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L4:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z41__device_stub__Z17kernel_evaluatenuidPdddidPddd, .-_Z41__device_stub__Z17kernel_evaluatenuidPdddidPddd
	.globl	_Z17kernel_evaluatenuidPddd
	.type	_Z17kernel_evaluatenuidPddd, @function
_Z17kernel_evaluatenuidPddd:
.LFB2034:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z17kernel_evaluatenuidPdddidPddd
	.cfi_endproc
.LFE2034:
	.size	_Z17kernel_evaluatenuidPddd, .-_Z17kernel_evaluatenuidPddd
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z17kernel_evaluatenuidPddd"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z17kernel_evaluatenuidPddd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2036:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__device__ double digamma(double x) {
double result = 0.0, xx, xx2, xx4;
for ( ; x < 7.0; ++x) { /* reduce x till x<7 */
result -= 1.0/x;
}
x -= 1.0/2.0;
xx = 1.0/x;
xx2 = xx*xx;
xx4 = xx2*xx2;
result += log(x)+(1./24.)*xx2-(7.0/960.0)*xx4+(31.0/8064.0)*xx4*xx2-(127.0/30720.0)*xx4*xx4;
return result;
}
__global__ void kernel_evaluatenu(int Nd, double qsum, double *q, double deltanu,double nulow) {
unsigned int tid = blockIdx.x*blockDim.x + threadIdx.x;
if (tid<Nd) {
double thisnu=(nulow+((double)tid)*deltanu);
double dgm=digamma(thisnu*0.5+0.5);
q[tid]=dgm-log((thisnu+1.0)*0.5); /* psi((nu+1)/2)-log((nu+1)/2) */
dgm=digamma(thisnu*0.5);
q[tid]+=-dgm+log((thisnu)*0.5); /* -psi((nu)/2)+log((nu)/2) */
q[tid]+=-qsum+1.0; /* -(-sum(ln(w_i))/N+sum(w_i)/N)+1 */
}
}
	.text
	.file	"kernel_evaluatenu.hip"
	.globl	_Z32__device_stub__kernel_evaluatenuidPddd # -- Begin function _Z32__device_stub__kernel_evaluatenuidPddd
	.type	_Z32__device_stub__kernel_evaluatenuidPddd,@function
_Z32__device_stub__kernel_evaluatenuidPddd: # @_Z32__device_stub__kernel_evaluatenuidPddd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	48(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	40(%rsp), %rsi
	movsd	%xmm1, (%rsi)
	leaq	32(%rsp), %rdi
	movsd	%xmm2, (%rdi)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdx, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdi, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_evaluatenuidPddd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z32__device_stub__kernel_evaluatenuidPddd, .Lfunc_end0-_Z32__device_stub__kernel_evaluatenuidPddd
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17kernel_evaluatenuidPddd, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17kernel_evaluatenuidPddd,@object # @_Z17kernel_evaluatenuidPddd
	.section	.rodata,"a",@progbits
	.globl	_Z17kernel_evaluatenuidPddd
	.p2align	3, 0x0
_Z17kernel_evaluatenuidPddd:
	.quad	_Z32__device_stub__kernel_evaluatenuidPddd
	.size	_Z17kernel_evaluatenuidPddd, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z17kernel_evaluatenuidPddd"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__kernel_evaluatenuidPddd
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17kernel_evaluatenuidPddd
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17kernel_evaluatenuidPddd ; -- Begin function _Z17kernel_evaluatenuidPddd
	.globl	_Z17kernel_evaluatenuidPddd
	.p2align	8
	.type	_Z17kernel_evaluatenuidPddd,@function
_Z17kernel_evaluatenuidPddd:            ; @_Z17kernel_evaluatenuidPddd
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b32 s3, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB0_10
; %bb.1:
	v_cvt_f64_u32_e32 v[2:3], v1
	s_load_b256 s[4:11], s[0:1], 0x8
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[2:3], s[8:9], s[10:11]
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	v_fma_f64 v[8:9], v[10:11], 0.5, 0.5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_f64_e32 0x401c0000, v[8:9]
	s_cbranch_execz .LBB0_5
; %bb.2:                                ; %.lr.ph.i.preheader
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s1, 0
.LBB0_3:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_div_scale_f64 v[4:5], null, v[8:9], v[8:9], 1.0
	v_div_scale_f64 v[14:15], vcc_lo, 1.0, v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[12:13], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[6:7], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[6:7], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[14:15], v[6:7]
	v_fma_f64 v[4:5], -v[4:5], v[12:13], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[12:13]
	v_div_fixup_f64 v[4:5], v[4:5], v[8:9], 1.0
	v_add_f64 v[8:9], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], -v[4:5]
	v_cmp_ngt_f64_e32 vcc_lo, 0x401c0000, v[8:9]
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_3
; %bb.4:                                ; %Flow59
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_5:                                ; %Flow60
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[4:5], v[10:11], 0.5
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	s_mov_b32 s0, exec_lo
	v_dual_mov_b32 v13, v5 :: v_dual_mov_b32 v12, v4
	v_cmpx_gt_f64_e32 0x401c0000, v[4:5]
	s_cbranch_execz .LBB0_9
; %bb.6:                                ; %.lr.ph.i20.preheader
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v13, v5
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v12, v4
	s_mov_b32 s1, 0
.LBB0_7:                                ; %.lr.ph.i20
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[14:15], null, v[12:13], v[12:13], 1.0
	v_div_scale_f64 v[20:21], vcc_lo, 1.0, v[12:13], 1.0
	v_rcp_f64_e32 v[16:17], v[14:15]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[18:19], -v[14:15], v[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[16:17], v[18:19], v[16:17]
	v_fma_f64 v[18:19], -v[14:15], v[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[16:17], v[18:19], v[16:17]
	v_mul_f64 v[18:19], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], -v[14:15], v[18:19], v[20:21]
	v_div_fmas_f64 v[14:15], v[14:15], v[16:17], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[14:15], v[14:15], v[12:13], 1.0
	v_add_f64 v[12:13], v[12:13], 1.0
	v_add_f64 v[6:7], v[6:7], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ngt_f64_e32 vcc_lo, 0x401c0000, v[12:13]
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_7
; %bb.8:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_9:                                ; %Flow58
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	v_add_f64 v[8:9], v[8:9], -0.5
	v_add_f64 v[12:13], v[12:13], -0.5
	s_mov_b32 s8, 0x55555555
	s_mov_b32 s9, 0x3fe55555
	v_add_f64 v[10:11], v[10:11], 1.0
	v_frexp_mant_f64_e32 v[30:31], v[4:5]
	s_mov_b32 s10, 0x6b47b09a
	s_mov_b32 s12, 0xbf559e2b
	s_mov_b32 s11, 0x3fc38538
	s_mov_b32 s13, 0x3fc3ab76
	s_mov_b32 s14, 0xd7f4df2e
	s_mov_b32 s15, 0x3fc7474d
	s_mov_b32 s16, 0x16291751
	s_mov_b32 s17, 0x3fcc71c0
	s_mov_b32 s18, 0x9b27acf1
	s_mov_b32 s19, 0x3fd24924
	s_mov_b32 s20, 0x998ef7b6
	s_mov_b32 s21, 0x3fd99999
	s_mov_b32 s22, 0x55555780
	s_mov_b32 s23, s9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_frexp_mant_f64_e32 v[14:15], v[8:9]
	v_frexp_mant_f64_e32 v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[10:11], v[10:11], 0.5
	v_cmp_gt_f64_e64 s1, s[8:9], v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_gt_f64_e32 vcc_lo, s[8:9], v[14:15]
	v_cmp_gt_f64_e64 s0, s[8:9], v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_frexp_mant_f64_e32 v[32:33], v[10:11]
	v_cndmask_b32_e64 v0, 0, 1, vcc_lo
	v_cndmask_b32_e64 v18, 0, 1, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e64 s2, s[8:9], v[32:33]
	v_ldexp_f64 v[14:15], v[14:15], v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[16:17], v[16:17], v18
	v_cndmask_b32_e64 v0, 0, 1, s1
	s_mov_b32 s9, 0x3fa55555
	v_add_f64 v[18:19], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[16:17], 1.0
	v_add_f64 v[38:39], v[14:15], -1.0
	v_rcp_f64_e32 v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[24:25], v[20:21]
	v_add_f64 v[50:51], v[18:19], -1.0
	v_add_f64 v[54:55], v[20:21], -1.0
	v_add_f64 v[14:15], v[14:15], -v[50:51]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[18:19], v[22:23], 1.0
	v_fma_f64 v[28:29], -v[20:21], v[24:25], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[26:27], v[22:23], v[22:23]
	v_fma_f64 v[24:25], v[28:29], v[24:25], v[24:25]
	v_cndmask_b32_e64 v28, 0, 1, s2
	v_ldexp_f64 v[26:27], v[30:31], v0
	v_frexp_exp_i32_f64_e32 v0, v[8:9]
	s_delay_alu instid0(VALU_DEP_3)
	v_ldexp_f64 v[28:29], v[32:33], v28
	v_fma_f64 v[30:31], -v[18:19], v[22:23], 1.0
	v_fma_f64 v[32:33], -v[20:21], v[24:25], 1.0
	v_add_f64 v[34:35], v[26:27], 1.0
	v_subrev_co_ci_u32_e32 v0, vcc_lo, 0, v0, vcc_lo
	v_add_f64 v[36:37], v[28:29], 1.0
	v_fma_f64 v[22:23], v[30:31], v[22:23], v[22:23]
	v_fma_f64 v[24:25], v[32:33], v[24:25], v[24:25]
	v_add_f64 v[30:31], v[16:17], -1.0
	v_rcp_f64_e32 v[32:33], v[34:35]
	v_add_f64 v[16:17], v[16:17], -v[54:55]
	v_add_f64 v[62:63], v[34:35], -1.0
	v_rcp_f64_e32 v[40:41], v[36:37]
	v_add_f64 v[66:67], v[36:37], -1.0
	v_mul_f64 v[42:43], v[38:39], v[22:23]
	v_mul_f64 v[44:45], v[30:31], v[24:25]
	s_delay_alu instid0(TRANS32_DEP_2)
	v_fma_f64 v[46:47], -v[34:35], v[32:33], 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[48:49], -v[36:37], v[40:41], 1.0
	v_mul_f64 v[52:53], v[18:19], v[42:43]
	v_mul_f64 v[56:57], v[20:21], v[44:45]
	v_fma_f64 v[32:33], v[46:47], v[32:33], v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[40:41], v[48:49], v[40:41], v[40:41]
	v_fma_f64 v[18:19], v[42:43], v[18:19], -v[52:53]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[20:21], v[44:45], v[20:21], -v[56:57]
	v_fma_f64 v[46:47], -v[34:35], v[32:33], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[48:49], -v[36:37], v[40:41], 1.0
	v_fma_f64 v[14:15], v[42:43], v[14:15], v[18:19]
	v_add_f64 v[18:19], v[26:27], -1.0
	v_fma_f64 v[16:17], v[44:45], v[16:17], v[20:21]
	v_add_f64 v[26:27], v[26:27], -v[62:63]
	v_fma_f64 v[20:21], v[46:47], v[32:33], v[32:33]
	v_add_f64 v[32:33], v[28:29], -1.0
	v_add_f64 v[28:29], v[28:29], -v[66:67]
	v_div_scale_f64 v[66:67], null, v[8:9], v[8:9], 1.0
	v_fma_f64 v[40:41], v[48:49], v[40:41], v[40:41]
	v_add_f64 v[46:47], v[52:53], v[14:15]
	v_add_f64 v[48:49], v[56:57], v[16:17]
	v_mul_f64 v[50:51], v[18:19], v[20:21]
	v_rcp_f64_e32 v[74:75], v[66:67]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[54:55], v[32:33], v[40:41]
	v_add_f64 v[58:59], v[38:39], -v[46:47]
	v_add_f64 v[52:53], v[46:47], -v[52:53]
	v_add_f64 v[60:61], v[30:31], -v[48:49]
	v_add_f64 v[56:57], v[48:49], -v[56:57]
	v_mul_f64 v[64:65], v[34:35], v[50:51]
	v_mul_f64 v[68:69], v[36:37], v[54:55]
	s_delay_alu instid0(TRANS32_DEP_1)
	v_fma_f64 v[82:83], -v[66:67], v[74:75], 1.0
	v_add_f64 v[38:39], v[38:39], -v[58:59]
	v_add_f64 v[14:15], v[52:53], -v[14:15]
	v_add_f64 v[30:31], v[30:31], -v[60:61]
	v_add_f64 v[16:17], v[56:57], -v[16:17]
	v_frexp_exp_i32_f64_e32 v56, v[12:13]
	v_fma_f64 v[34:35], v[50:51], v[34:35], -v[64:65]
	v_fma_f64 v[36:37], v[54:55], v[36:37], -v[68:69]
	v_add_f64 v[38:39], v[38:39], -v[46:47]
	v_add_f64 v[30:31], v[30:31], -v[48:49]
	v_subrev_co_ci_u32_e64 v56, vcc_lo, 0, v56, s0
	v_fma_f64 v[26:27], v[50:51], v[26:27], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cvt_f64_i32_e32 v[56:57], v56
	v_fma_f64 v[28:29], v[54:55], v[28:29], v[36:37]
	v_add_f64 v[14:15], v[14:15], v[38:39]
	v_add_f64 v[16:17], v[16:17], v[30:31]
	v_add_f64 v[30:31], v[64:65], v[26:27]
	v_add_f64 v[34:35], v[68:69], v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[14:15], v[58:59], v[14:15]
	v_add_f64 v[16:17], v[60:61], v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[36:37], v[18:19], -v[30:31]
	v_add_f64 v[38:39], v[32:33], -v[34:35]
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f64 v[14:15], v[22:23], v[14:15]
	v_add_f64 v[22:23], v[30:31], -v[64:65]
	v_mul_f64 v[16:17], v[24:25], v[16:17]
	v_add_f64 v[24:25], v[34:35], -v[68:69]
	v_div_scale_f64 v[68:69], null, v[12:13], v[12:13], 1.0
	v_add_f64 v[18:19], v[18:19], -v[36:37]
	v_add_f64 v[32:33], v[32:33], -v[38:39]
	v_add_f64 v[46:47], v[42:43], v[14:15]
	v_add_f64 v[22:23], v[22:23], -v[26:27]
	v_add_f64 v[48:49], v[44:45], v[16:17]
	v_add_f64 v[24:25], v[24:25], -v[28:29]
	v_rcp_f64_e32 v[76:77], v[68:69]
	v_add_f64 v[18:19], v[18:19], -v[30:31]
	v_add_f64 v[26:27], v[32:33], -v[34:35]
	v_mul_f64 v[28:29], v[46:47], v[46:47]
	v_add_f64 v[42:43], v[46:47], -v[42:43]
	v_mul_f64 v[30:31], v[48:49], v[48:49]
	v_add_f64 v[44:45], v[48:49], -v[44:45]
	v_add_f64 v[18:19], v[22:23], v[18:19]
	s_delay_alu instid0(TRANS32_DEP_1)
	v_fma_f64 v[84:85], -v[68:69], v[76:77], 1.0
	v_add_f64 v[22:23], v[24:25], v[26:27]
	v_fma_f64 v[24:25], v[28:29], s[12:13], s[10:11]
	v_mul_f64 v[52:53], v[46:47], v[28:29]
	v_fma_f64 v[26:27], v[30:31], s[12:13], s[10:11]
	v_add_f64 v[14:15], v[14:15], -v[42:43]
	v_add_f64 v[16:17], v[16:17], -v[44:45]
	v_add_f64 v[18:19], v[36:37], v[18:19]
	v_add_f64 v[22:23], v[38:39], v[22:23]
	v_fma_f64 v[24:25], v[28:29], v[24:25], s[14:15]
	v_fma_f64 v[26:27], v[30:31], v[26:27], s[14:15]
	v_ldexp_f64 v[14:15], v[14:15], 1
	v_ldexp_f64 v[16:17], v[16:17], 1
	v_mul_f64 v[18:19], v[20:21], v[18:19]
	v_mul_f64 v[20:21], v[40:41], v[22:23]
	v_fma_f64 v[22:23], v[28:29], v[24:25], s[16:17]
	v_fma_f64 v[24:25], v[30:31], v[26:27], s[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[50:51], v[18:19]
	v_add_f64 v[32:33], v[54:55], v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[22:23], v[28:29], v[22:23], s[18:19]
	v_fma_f64 v[24:25], v[30:31], v[24:25], s[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[34:35], v[26:27], v[26:27]
	v_mul_f64 v[36:37], v[32:33], v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[22:23], v[28:29], v[22:23], s[20:21]
	v_fma_f64 v[24:25], v[30:31], v[24:25], s[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[38:39], v[34:35], s[12:13], s[10:11]
	v_fma_f64 v[40:41], v[36:37], s[12:13], s[10:11]
	s_mov_b32 s10, 0xfefa39ef
	s_mov_b32 s11, 0x3fe62e42
	s_mov_b32 s12, 0x3b39803f
	v_mul_f64 v[42:43], v[56:57], s[10:11]
	s_mov_b32 s13, 0x3c7abc9e
	v_mul_f64 v[60:61], v[32:33], v[36:37]
	v_fma_f64 v[22:23], v[28:29], v[22:23], s[22:23]
	v_mul_f64 v[28:29], v[48:49], v[30:31]
	v_fma_f64 v[24:25], v[30:31], v[24:25], s[22:23]
	v_fma_f64 v[30:31], v[34:35], v[38:39], s[14:15]
	v_fma_f64 v[38:39], v[36:37], v[40:41], s[14:15]
	v_ldexp_f64 v[40:41], v[46:47], 1
	v_mul_f64 v[22:23], v[52:53], v[22:23]
	v_ldexp_f64 v[52:53], v[48:49], 1
	v_mul_f64 v[24:25], v[28:29], v[24:25]
	v_fma_f64 v[28:29], v[34:35], v[30:31], s[16:17]
	v_fma_f64 v[30:31], v[36:37], v[38:39], s[16:17]
	v_cvt_f64_i32_e32 v[38:39], v0
	v_frexp_exp_i32_f64_e32 v0, v[4:5]
	v_add_f64 v[46:47], v[40:41], v[22:23]
	v_add_f64 v[48:49], v[52:53], v[24:25]
	v_fma_f64 v[28:29], v[34:35], v[28:29], s[18:19]
	v_fma_f64 v[30:31], v[36:37], v[30:31], s[18:19]
	v_mul_f64 v[58:59], v[38:39], s[10:11]
	v_subrev_co_ci_u32_e64 v0, vcc_lo, 0, v0, s1
	v_add_f64 v[40:41], v[46:47], -v[40:41]
	v_add_f64 v[44:45], v[48:49], -v[52:53]
	v_fma_f64 v[28:29], v[34:35], v[28:29], s[20:21]
	v_fma_f64 v[30:31], v[36:37], v[30:31], s[20:21]
	v_fma_f64 v[52:53], v[38:39], s[10:11], -v[58:59]
	v_add_f64 v[22:23], v[22:23], -v[40:41]
	v_fma_f64 v[40:41], v[56:57], s[10:11], -v[42:43]
	v_add_f64 v[24:25], v[24:25], -v[44:45]
	v_mul_f64 v[44:45], v[26:27], v[34:35]
	v_fma_f64 v[28:29], v[34:35], v[28:29], s[22:23]
	v_fma_f64 v[30:31], v[36:37], v[30:31], s[22:23]
	v_fma_f64 v[34:35], v[38:39], s[12:13], v[52:53]
	v_ldexp_f64 v[36:37], v[32:33], 1
	v_add_f64 v[32:33], v[32:33], -v[54:55]
	v_add_f64 v[14:15], v[14:15], v[22:23]
	v_fma_f64 v[22:23], v[56:57], s[12:13], v[40:41]
	v_add_f64 v[16:17], v[16:17], v[24:25]
	v_ldexp_f64 v[24:25], v[26:27], 1
	v_add_f64 v[26:27], v[26:27], -v[50:51]
	v_frexp_exp_i32_f64_e32 v56, v[10:11]
	v_mul_f64 v[28:29], v[44:45], v[28:29]
	v_mul_f64 v[30:31], v[60:61], v[30:31]
	v_add_f64 v[38:39], v[58:59], v[34:35]
	v_add_f64 v[20:21], v[20:21], -v[32:33]
	v_add_f64 v[40:41], v[46:47], v[14:15]
	v_add_f64 v[44:45], v[42:43], v[22:23]
	v_add_f64 v[52:53], v[48:49], v[16:17]
	v_add_f64 v[18:19], v[18:19], -v[26:27]
	v_subrev_co_ci_u32_e64 v60, vcc_lo, 0, v56, s2
	v_add_f64 v[50:51], v[24:25], v[28:29]
	v_cvt_f64_i32_e32 v[56:57], v0
	s_mov_b32 s2, 0xddddddde
	v_add_f64 v[54:55], v[36:37], v[30:31]
	v_add_f64 v[58:59], v[38:39], -v[58:59]
	v_cvt_f64_i32_e32 v[60:61], v60
	v_ldexp_f64 v[20:21], v[20:21], 1
	s_mov_b32 s3, 0xbf7ddddd
	v_add_f64 v[62:63], v[38:39], v[40:41]
	v_add_f64 v[42:43], v[44:45], -v[42:43]
	v_add_f64 v[64:65], v[44:45], v[52:53]
	v_ldexp_f64 v[18:19], v[18:19], 1
	v_add_f64 v[24:25], v[50:51], -v[24:25]
	v_mul_f64 v[70:71], v[56:57], s[10:11]
	v_add_f64 v[26:27], v[54:55], -v[36:37]
	v_add_f64 v[34:35], v[34:35], -v[58:59]
	v_mul_f64 v[72:73], v[60:61], s[10:11]
	v_add_f64 v[32:33], v[62:63], -v[38:39]
	v_add_f64 v[22:23], v[22:23], -v[42:43]
	v_add_f64 v[36:37], v[64:65], -v[44:45]
	v_add_f64 v[24:25], v[28:29], -v[24:25]
	v_add_f64 v[28:29], v[40:41], -v[46:47]
	v_add_f64 v[46:47], v[52:53], -v[48:49]
	v_add_f64 v[26:27], v[30:31], -v[26:27]
	v_fma_f64 v[78:79], v[56:57], s[10:11], -v[70:71]
	v_fma_f64 v[80:81], v[60:61], s[10:11], -v[72:73]
	v_add_f64 v[30:31], v[62:63], -v[32:33]
	v_add_f64 v[48:49], v[64:65], -v[36:37]
	v_add_f64 v[18:19], v[18:19], v[24:25]
	v_add_f64 v[14:15], v[14:15], -v[28:29]
	v_add_f64 v[24:25], v[40:41], -v[32:33]
	v_add_f64 v[20:21], v[20:21], v[26:27]
	v_add_f64 v[16:17], v[16:17], -v[46:47]
	v_add_f64 v[28:29], v[52:53], -v[36:37]
	v_fma_f64 v[32:33], v[74:75], v[82:83], v[74:75]
	v_fma_f64 v[56:57], v[56:57], s[12:13], v[78:79]
	v_fma_f64 v[36:37], v[76:77], v[84:85], v[76:77]
	v_div_scale_f64 v[78:79], vcc_lo, 1.0, v[8:9], 1.0
	v_fma_f64 v[60:61], v[60:61], s[12:13], v[80:81]
	v_add_f64 v[26:27], v[38:39], -v[30:31]
	v_add_f64 v[30:31], v[44:45], -v[48:49]
	v_add_f64 v[40:41], v[50:51], v[18:19]
	v_add_f64 v[46:47], v[34:35], v[14:15]
	v_add_f64 v[44:45], v[54:55], v[20:21]
	v_add_f64 v[38:39], v[70:71], v[56:57]
	v_fma_f64 v[48:49], -v[68:69], v[36:37], 1.0
	v_add_f64 v[42:43], v[72:73], v[60:61]
	v_add_f64 v[24:25], v[24:25], v[26:27]
	v_add_f64 v[26:27], v[22:23], v[16:17]
	v_add_f64 v[28:29], v[28:29], v[30:31]
	v_fma_f64 v[30:31], -v[66:67], v[32:33], 1.0
	v_add_f64 v[50:51], v[40:41], -v[50:51]
	v_add_f64 v[74:75], v[46:47], -v[34:35]
	v_add_f64 v[54:55], v[44:45], -v[54:55]
	v_add_f64 v[52:53], v[38:39], v[40:41]
	v_fma_f64 v[36:37], v[36:37], v[48:49], v[36:37]
	v_add_f64 v[70:71], v[38:39], -v[70:71]
	v_add_f64 v[58:59], v[42:43], v[44:45]
	v_add_f64 v[72:73], v[42:43], -v[72:73]
	v_add_f64 v[24:25], v[46:47], v[24:25]
	v_add_f64 v[76:77], v[26:27], -v[22:23]
	v_add_f64 v[28:29], v[26:27], v[28:29]
	v_fma_f64 v[30:31], v[32:33], v[30:31], v[32:33]
	v_div_scale_f64 v[32:33], s0, 1.0, v[12:13], 1.0
	v_add_f64 v[18:19], v[18:19], -v[50:51]
	v_add_f64 v[46:47], v[46:47], -v[74:75]
	v_add_f64 v[14:15], v[14:15], -v[74:75]
	v_add_f64 v[20:21], v[20:21], -v[54:55]
	v_add_f64 v[48:49], v[52:53], -v[38:39]
	v_add_f64 v[56:57], v[56:57], -v[70:71]
	v_add_f64 v[80:81], v[58:59], -v[42:43]
	v_add_f64 v[60:61], v[60:61], -v[72:73]
	v_add_f64 v[82:83], v[62:63], v[24:25]
	v_add_f64 v[26:27], v[26:27], -v[76:77]
	v_add_f64 v[84:85], v[64:65], v[28:29]
	v_mul_f64 v[86:87], v[78:79], v[30:31]
	v_mul_f64 v[88:89], v[32:33], v[36:37]
	v_add_f64 v[16:17], v[16:17], -v[76:77]
	v_add_f64 v[34:35], v[34:35], -v[46:47]
	v_add_f64 v[90:91], v[52:53], -v[48:49]
	v_add_f64 v[40:41], v[40:41], -v[48:49]
	v_add_f64 v[74:75], v[58:59], -v[80:81]
	v_add_f64 v[44:45], v[44:45], -v[80:81]
	v_add_f64 v[46:47], v[82:83], -v[62:63]
	v_add_f64 v[22:23], v[22:23], -v[26:27]
	v_add_f64 v[26:27], v[84:85], -v[64:65]
	v_fma_f64 v[62:63], -v[66:67], v[86:87], v[78:79]
	v_fma_f64 v[32:33], -v[68:69], v[88:89], v[32:33]
	v_add_f64 v[14:15], v[14:15], v[34:35]
	v_add_f64 v[38:39], v[38:39], -v[90:91]
	v_add_f64 v[34:35], v[42:43], -v[74:75]
	v_add_f64 v[24:25], v[24:25], -v[46:47]
	v_add_f64 v[16:17], v[16:17], v[22:23]
	v_add_f64 v[22:23], v[28:29], -v[26:27]
	v_div_fmas_f64 v[26:27], v[62:63], v[30:31], v[86:87]
	s_mov_b32 vcc_lo, s0
	v_cmp_class_f64_e64 s0, v[12:13], 0x204
	v_div_fmas_f64 v[28:29], v[32:33], v[36:37], v[88:89]
	v_cmp_class_f64_e64 vcc_lo, v[8:9], 0x204
	v_add_f64 v[30:31], v[56:57], v[18:19]
	v_add_f64 v[32:33], v[60:61], v[20:21]
	v_add_f64 v[36:37], v[40:41], v[38:39]
	v_add_f64 v[14:15], v[14:15], v[24:25]
	v_add_f64 v[24:25], v[44:45], v[34:35]
	v_add_f64 v[16:17], v[16:17], v[22:23]
	v_div_fixup_f64 v[22:23], v[26:27], v[8:9], 1.0
	v_div_fixup_f64 v[26:27], v[28:29], v[12:13], 1.0
	v_add_f64 v[28:29], v[30:31], -v[56:57]
	v_add_f64 v[34:35], v[32:33], -v[60:61]
	v_add_f64 v[36:37], v[30:31], v[36:37]
	v_add_f64 v[14:15], v[82:83], v[14:15]
	v_add_f64 v[24:25], v[32:33], v[24:25]
	v_add_f64 v[16:17], v[84:85], v[16:17]
	v_mul_f64 v[22:23], v[22:23], v[22:23]
	v_mul_f64 v[26:27], v[26:27], v[26:27]
	v_add_f64 v[30:31], v[30:31], -v[28:29]
	v_add_f64 v[32:33], v[32:33], -v[34:35]
	v_add_f64 v[18:19], v[18:19], -v[28:29]
	v_add_f64 v[20:21], v[20:21], -v[34:35]
	v_add_f64 v[38:39], v[52:53], v[36:37]
	v_cndmask_b32_e32 v0, v14, v8, vcc_lo
	v_cndmask_b32_e32 v40, v15, v9, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[8:9]
	v_cndmask_b32_e64 v41, v16, v12, s0
	v_cndmask_b32_e64 v17, v17, v13, s0
	v_add_f64 v[14:15], v[58:59], v[24:25]
	s_mov_b32 s0, 0xdf7df7df
	s_mov_b32 s1, 0x3f6f7df7
	v_add_f64 v[28:29], v[56:57], -v[30:31]
	v_add_f64 v[32:33], v[60:61], -v[32:33]
	v_add_f64 v[30:31], v[38:39], -v[52:53]
	v_cndmask_b32_e32 v42, 0x7ff80000, v40, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[8:9]
	v_add_f64 v[34:35], v[14:15], -v[58:59]
	v_add_f64 v[18:19], v[18:19], v[28:29]
	v_add_f64 v[20:21], v[20:21], v[32:33]
	v_add_f64 v[28:29], v[36:37], -v[30:31]
	v_cndmask_b32_e32 v16, 0, v0, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[12:13]
	v_add_f64 v[24:25], v[24:25], -v[34:35]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], v[28:29]
	v_cndmask_b32_e32 v0, 0x7ff80000, v17, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[12:13]
	v_add_f64 v[20:21], v[20:21], v[24:25]
	v_cndmask_b32_e32 v40, 0, v41, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[8:9]
	v_mul_f64 v[8:9], v[22:23], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_add_f64 v[14:15], v[14:15], v[20:21]
	v_cndmask_b32_e32 v17, 0xfff00000, v42, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[12:13]
	v_mul_f64 v[12:13], v[26:27], v[26:27]
	v_mul_f64 v[42:43], v[8:9], s[0:1]
	v_fma_f64 v[16:17], v[22:23], s[8:9], v[16:17]
	v_cndmask_b32_e32 v41, 0xfff00000, v0, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[44:45], v[12:13], s[0:1]
	s_mov_b32 s0, 0xeeeeeeef
	s_mov_b32 s1, 0x3f70eeee
	v_fma_f64 v[16:17], v[8:9], s[2:3], v[16:17]
	v_fma_f64 v[40:41], v[26:27], s[8:9], v[40:41]
	v_mul_f64 v[30:31], v[8:9], s[0:1]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
	v_mul_f64 v[32:33], v[12:13], s[0:1]
	v_cmp_class_f64_e64 s0, v[10:11], 0x204
	v_fma_f64 v[16:17], v[22:23], v[42:43], v[16:17]
	v_fma_f64 v[40:41], v[12:13], s[2:3], v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], -v[8:9], v[30:31], v[16:17]
	v_add_f64 v[16:17], v[38:39], v[18:19]
	v_fma_f64 v[22:23], v[26:27], v[44:45], v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_cndmask_b32_e32 v0, v16, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v8, v17, v5, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[4:5]
	v_fma_f64 v[12:13], -v[12:13], v[32:33], v[22:23]
	v_cndmask_b32_e64 v9, v14, v10, s0
	v_cndmask_b32_e32 v14, 0x7ff80000, v8, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], v[12:13]
	v_cndmask_b32_e64 v12, v15, v11, s0
	v_cndmask_b32_e32 v13, 0x7ff80000, v12, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[4:5]
	v_cndmask_b32_e32 v8, 0, v0, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[10:11]
	v_cndmask_b32_e32 v12, 0, v9, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[10:11]
	v_cndmask_b32_e32 v13, 0xfff00000, v13, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], -v[12:13]
	v_cndmask_b32_e32 v9, 0xfff00000, v14, vcc_lo
	v_add_f64 v[4:5], v[8:9], -v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_add_f64 v[4:5], -s[4:5], 1.0
	v_add_f64 v[3:4], v[4:5], v[2:3]
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b64 v[0:1], v[3:4], off
.LBB0_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_evaluatenuidPddd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 92
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17kernel_evaluatenuidPddd, .Lfunc_end0-_Z17kernel_evaluatenuidPddd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3836
; NumSgprs: 26
; NumVgprs: 92
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 11
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 92
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           8
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17kernel_evaluatenuidPddd
    .private_segment_fixed_size: 0
    .sgpr_count:     26
    .sgpr_spill_count: 0
    .symbol:         _Z17kernel_evaluatenuidPddd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     92
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
