#include <stdio.h>
#include <cstdlib>
#include <cmath>
#include <iostream>
#include <sys/time.h>

#define TIME_RESOLUTION 1000000	// time measuring resolution (us)

#define NUM_BLOCKS 128				// this is wrong
#define NUM_THREADS_PER_BLOCK 256	// this is wrong
#define SIZE 2048
#define TILE_SIZE 16

using namespace std;

float m1[SIZE][SIZE], m2[SIZE][SIZE], result[SIZE][SIZE], _result[SIZE][SIZE];
long long unsigned cpu_time;
timeval t;

void startTime (void) {
    gettimeofday(&t, NULL);
    cpu_time = t.tv_sec * TIME_RESOLUTION + t.tv_usec;
}

void stopTime (void) {
    gettimeofday(&t, NULL);
    long long unsigned final_time = t.tv_sec * TIME_RESOLUTION + t.tv_usec;

    final_time -= cpu_time;

    cout << final_time << " us have elapsed for the CPU execution" << endl;
}

void fillMatrices (void) {

    for (unsigned i = 0; i < SIZE; ++i) {
        for (unsigned j = 0; j < SIZE; ++j) {
            result[i][j] = 0.0;
            _result[i][j] = 0.0;
            m1[i][j] = ((float) rand()) / ((float) RAND_MAX);
            m2[i][j] = ((float) rand()) / ((float) RAND_MAX);
        }
    }
}

void checkCUDAError (const char *msg) {
    cudaError_t err = cudaGetLastError();
    if( cudaSuccess != err) {
        cerr << "Cuda error: " << msg << ", " << cudaGetErrorString( err) << endl;
        exit(-1);
    }
}

// You need to optimize AND parallelize this first
void regularMatrixMult (void) {
    for (unsigned i = 0; i < SIZE; ++i) {
        for (unsigned j = 0; j < SIZE; ++j) {

            result[i][j] = 0;
            for (unsigned k = 0; k < SIZE; ++k) {
                result[i][j] += m1[i][k] * m2[k][j];
            }
        }
    }
}

void tiledMatrixMult (void) {
    for (unsigned m = 0; m < SIZE; m += TILE_SIZE) {
        for (unsigned n = 0; n < SIZE; n += TILE_SIZE) {
            //...
        }
    }
}

// Fill the input parameters and kernel qualifier
__global__
void matrixMultKernel (double *dev_m1, double *dev_m2, double *dev_res) {
    int id = blockIdx.x*blockDim.x+threadIdx.x;



}

// Fill with the code required for the GPU stencil (mem allocation, transfers, kernel launch of stencilKernel)
double* matrixMultGPU (void) {
    // you can either:
    // 1 - use 2D matrices, as in CPU
    // 2 - use 1D matrices, but YOU have to convert them here

    return NULL;
}

int main (int argc, char** argv) {

    fillMatrices ();

    // GPU stuff
    matrixMultGPU ();

    // CPU stuff
    startTime();
    regularMatrixMult ();
    stopTime();


    return 0;
}

	.file	"tmpxft_00297b0a_00000000-6_lab5.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3645:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3645:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9startTimev
	.type	_Z9startTimev, @function
_Z9startTimev:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	xorl	%esi, %esi
	leaq	t(%rip), %rdi
	call	gettimeofday@PLT
	imulq	$1000000, t(%rip), %rax
	addq	8+t(%rip), %rax
	movq	%rax, cpu_time(%rip)
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z9startTimev, .-_Z9startTimev
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	" us have elapsed for the CPU execution"
	.text
	.globl	_Z8stopTimev
	.type	_Z8stopTimev, @function
_Z8stopTimev:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	xorl	%esi, %esi
	leaq	t(%rip), %rdi
	call	gettimeofday@PLT
	leaq	_ZSt4cout(%rip), %rdi
	imulq	$1000000, t(%rip), %rsi
	addq	8+t(%rip), %rsi
	subq	cpu_time(%rip), %rsi
	call	_ZNSo9_M_insertIyEERSoT_@PLT
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	popq	%rdx
	.cfi_def_cfa_offset 8
	movq	%rax, %rdi
	jmp	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	.cfi_endproc
.LFE3636:
	.size	_Z8stopTimev, .-_Z8stopTimev
	.globl	_Z12fillMatricesv
	.type	_Z12fillMatricesv, @function
_Z12fillMatricesv:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	result(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L7:
	movq	%rbp, %rbx
	movl	$2048, %r12d
.L8:
	movl	$0x00000000, 0(%r13,%rbx)
	leaq	_result(%rip), %rax
	movl	$0x00000000, (%rax,%rbx)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	leaq	m1(%rip), %rax
	movss	%xmm0, (%rax,%rbx)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	leaq	m2(%rip), %rax
	movss	%xmm0, (%rax,%rbx)
	addq	$4, %rbx
	decl	%r12d
	jne	.L8
	addq	$8192, %rbp
	cmpq	$16777216, %rbp
	jne	.L7
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z12fillMatricesv, .-_Z12fillMatricesv
	.section	.rodata.str1.1
.LC3:
	.string	"Cuda error: "
.LC4:
	.string	", "
	.text
	.globl	_Z14checkCUDAErrorPKc
	.type	_Z14checkCUDAErrorPKc, @function
_Z14checkCUDAErrorPKc:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%rdx
	.cfi_def_cfa_offset 32
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L13
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	movl	%eax, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %edi
	call	exit@PLT
.L13:
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	_Z14checkCUDAErrorPKc, .-_Z14checkCUDAErrorPKc
	.globl	_Z17regularMatrixMultv
	.type	_Z17regularMatrixMultv, @function
_Z17regularMatrixMultv:
.LFB3639:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	leaq	m2(%rip), %r11
	leaq	m1(%rip), %r10
	leaq	result(%rip), %r8
.L17:
	xorl	%edx, %edx
	leaq	(%rax,%r10), %r9
	leaq	(%rax,%r8), %rdi
.L19:
	leaq	(%rdx,%r11), %rsi
	xorl	%ecx, %ecx
	xorps	%xmm0, %xmm0
.L18:
	movss	(%r9,%rcx,4), %xmm1
	mulss	(%rsi), %xmm1
	incq	%rcx
	addq	$8192, %rsi
	addss	%xmm1, %xmm0
	cmpq	$2048, %rcx
	jne	.L18
	movss	%xmm0, (%rdi,%rdx)
	addq	$4, %rdx
	cmpq	$8192, %rdx
	jne	.L19
	addq	$8192, %rax
	cmpq	$16777216, %rax
	jne	.L17
	ret
	.cfi_endproc
.LFE3639:
	.size	_Z17regularMatrixMultv, .-_Z17regularMatrixMultv
	.globl	_Z15tiledMatrixMultv
	.type	_Z15tiledMatrixMultv, @function
_Z15tiledMatrixMultv:
.LFB3640:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE3640:
	.size	_Z15tiledMatrixMultv, .-_Z15tiledMatrixMultv
	.globl	_Z13matrixMultGPUv
	.type	_Z13matrixMultGPUv, @function
_Z13matrixMultGPUv:
.LFB3641:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE3641:
	.size	_Z13matrixMultGPUv, .-_Z13matrixMultGPUv
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3642:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z12fillMatricesv
	call	_Z9startTimev
	call	_Z17regularMatrixMultv
	call	_Z8stopTimev
	xorl	%eax, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3642:
	.size	main, .-main
	.text
	.globl	_Z40__device_stub__Z16matrixMultKernelPdS_S_PdS_S_
	.type	_Z40__device_stub__Z16matrixMultKernelPdS_S_PdS_S_, @function
_Z40__device_stub__Z16matrixMultKernelPdS_S_PdS_S_:
.LFB3667:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16matrixMultKernelPdS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L27:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3667:
	.size	_Z40__device_stub__Z16matrixMultKernelPdS_S_PdS_S_, .-_Z40__device_stub__Z16matrixMultKernelPdS_S_PdS_S_
	.globl	_Z16matrixMultKernelPdS_S_
	.type	_Z16matrixMultKernelPdS_S_, @function
_Z16matrixMultKernelPdS_S_:
.LFB3668:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z16matrixMultKernelPdS_S_PdS_S_
	.cfi_endproc
.LFE3668:
	.size	_Z16matrixMultKernelPdS_S_, .-_Z16matrixMultKernelPdS_S_
	.section	.rodata.str1.1
.LC5:
	.string	"_Z16matrixMultKernelPdS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3670:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z16matrixMultKernelPdS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3670:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	t
	.bss
	.align 16
	.type	t, @object
	.size	t, 16
t:
	.zero	16
	.globl	cpu_time
	.align 8
	.type	cpu_time, @object
	.size	cpu_time, 8
cpu_time:
	.zero	8
	.globl	_result
	.align 32
	.type	_result, @object
	.size	_result, 16777216
_result:
	.zero	16777216
	.globl	result
	.align 32
	.type	result, @object
	.size	result, 16777216
result:
	.zero	16777216
	.globl	m2
	.align 32
	.type	m2, @object
	.size	m2, 16777216
m2:
	.zero	16777216
	.globl	m1
	.align 32
	.type	m1, @object
	.size	m1, 16777216
m1:
	.zero	16777216
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <cstdlib>
#include <cmath>
#include <iostream>
#include <sys/time.h>

#define TIME_RESOLUTION 1000000	// time measuring resolution (us)

#define NUM_BLOCKS 128				// this is wrong
#define NUM_THREADS_PER_BLOCK 256	// this is wrong
#define SIZE 2048
#define TILE_SIZE 16

using namespace std;

float m1[SIZE][SIZE], m2[SIZE][SIZE], result[SIZE][SIZE], _result[SIZE][SIZE];
long long unsigned cpu_time;
timeval t;

void startTime (void) {
    gettimeofday(&t, NULL);
    cpu_time = t.tv_sec * TIME_RESOLUTION + t.tv_usec;
}

void stopTime (void) {
    gettimeofday(&t, NULL);
    long long unsigned final_time = t.tv_sec * TIME_RESOLUTION + t.tv_usec;

    final_time -= cpu_time;

    cout << final_time << " us have elapsed for the CPU execution" << endl;
}

void fillMatrices (void) {

    for (unsigned i = 0; i < SIZE; ++i) {
        for (unsigned j = 0; j < SIZE; ++j) {
            result[i][j] = 0.0;
            _result[i][j] = 0.0;
            m1[i][j] = ((float) rand()) / ((float) RAND_MAX);
            m2[i][j] = ((float) rand()) / ((float) RAND_MAX);
        }
    }
}

void checkCUDAError (const char *msg) {
    hipError_t err = hipGetLastError();
    if( hipSuccess != err) {
        cerr << "Cuda error: " << msg << ", " << hipGetErrorString( err) << endl;
        exit(-1);
    }
}

// You need to optimize AND parallelize this first
void regularMatrixMult (void) {
    for (unsigned i = 0; i < SIZE; ++i) {
        for (unsigned j = 0; j < SIZE; ++j) {

            result[i][j] = 0;
            for (unsigned k = 0; k < SIZE; ++k) {
                result[i][j] += m1[i][k] * m2[k][j];
            }
        }
    }
}

void tiledMatrixMult (void) {
    for (unsigned m = 0; m < SIZE; m += TILE_SIZE) {
        for (unsigned n = 0; n < SIZE; n += TILE_SIZE) {
            //...
        }
    }
}

// Fill the input parameters and kernel qualifier
__global__
void matrixMultKernel (double *dev_m1, double *dev_m2, double *dev_res) {
    int id = blockIdx.x*blockDim.x+threadIdx.x;



}

// Fill with the code required for the GPU stencil (mem allocation, transfers, kernel launch of stencilKernel)
double* matrixMultGPU (void) {
    // you can either:
    // 1 - use 2D matrices, as in CPU
    // 2 - use 1D matrices, but YOU have to convert them here

    return NULL;
}

int main (int argc, char** argv) {

    fillMatrices ();

    // GPU stuff
    matrixMultGPU ();

    // CPU stuff
    startTime();
    regularMatrixMult ();
    stopTime();


    return 0;
}

	.text
	.file	"lab5.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z9startTimev                   # -- Begin function _Z9startTimev
	.type	_Z9startTimev,@function
_Z9startTimev:                          # @_Z9startTimev
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$t, %edi
	xorl	%esi, %esi
	callq	gettimeofday
	imulq	$1000000, t(%rip), %rax         # imm = 0xF4240
	addq	t+8(%rip), %rax
	movq	%rax, cpu_time(%rip)
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z9startTimev, .Lfunc_end0-_Z9startTimev
	.cfi_endproc
                                        # -- End function
	.globl	_Z8stopTimev                    # -- Begin function _Z8stopTimev
	.type	_Z8stopTimev,@function
_Z8stopTimev:                           # @_Z8stopTimev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	$t, %edi
	xorl	%esi, %esi
	callq	gettimeofday
	imulq	$1000000, t(%rip), %rsi         # imm = 0xF4240
	addq	t+8(%rip), %rsi
	subq	cpu_time(%rip), %rsi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIyEERSoT_
	movq	%rax, %rbx
	movl	$.L.str, %esi
	movl	$38, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSo5flushEv                   # TAILCALL
.Lfunc_end1:
	.size	_Z8stopTimev, .Lfunc_end1-_Z8stopTimev
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z12fillMatricesv
.LCPI2_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z12fillMatricesv
	.type	_Z12fillMatricesv,@function
_Z12fillMatricesv:                      # @_Z12fillMatricesv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB2_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	movq	$-2048, %r12                    # imm = 0xF800
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%ebx, result+8192(%r14,%r12,4)
	movl	%ebx, _result+8192(%r14,%r12,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	movss	%xmm0, m1+8192(%r14,%r12,4)
	callq	rand
	movss	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, m2+8192(%r14,%r12,4)
	incq	%r12
	jne	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%r15
	addq	$8192, %r14                     # imm = 0x2000
	cmpq	$2048, %r15                     # imm = 0x800
	jne	.LBB2_1
# %bb.4:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z12fillMatricesv, .Lfunc_end2-_Z12fillMatricesv
	.cfi_endproc
                                        # -- End function
	.globl	_Z14checkCUDAErrorPKc           # -- Begin function _Z14checkCUDAErrorPKc
	.type	_Z14checkCUDAErrorPKc,@function
_Z14checkCUDAErrorPKc:                  # @_Z14checkCUDAErrorPKc
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %r14
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB3_2:
	.cfi_def_cfa_offset 32
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movq	%r14, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$-1, %edi
	callq	exit
.Lfunc_end3:
	.size	_Z14checkCUDAErrorPKc, .Lfunc_end3-_Z14checkCUDAErrorPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z17regularMatrixMultv          # -- Begin function _Z17regularMatrixMultv
	.type	_Z17regularMatrixMultv,@function
_Z17regularMatrixMultv:                 # @_Z17regularMatrixMultv
	.cfi_startproc
# %bb.0:
	movl	$m1, %eax
	xorl	%ecx, %ecx
.LBB4_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_2 Depth 2
                                        #       Child Loop BB4_3 Depth 3
	movl	$m2, %edx
	movq	%rcx, %rsi
	shlq	$13, %rsi
	xorl	%edi, %edi
.LBB4_2:                                #   Parent Loop BB4_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB4_3 Depth 3
	leaq	(%rsi,%rdi,4), %r8
	addq	$result, %r8
	xorps	%xmm0, %xmm0
	movq	%rdx, %r9
	xorl	%r10d, %r10d
.LBB4_3:                                #   Parent Loop BB4_1 Depth=1
                                        #     Parent Loop BB4_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rax,%r10,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%r9), %xmm1
	addss	%xmm1, %xmm0
	incq	%r10
	addq	$8192, %r9                      # imm = 0x2000
	cmpq	$2048, %r10                     # imm = 0x800
	jne	.LBB4_3
# %bb.4:                                #   in Loop: Header=BB4_2 Depth=2
	movss	%xmm0, (%r8)
	incq	%rdi
	addq	$4, %rdx
	cmpq	$2048, %rdi                     # imm = 0x800
	jne	.LBB4_2
# %bb.5:                                #   in Loop: Header=BB4_1 Depth=1
	incq	%rcx
	addq	$8192, %rax                     # imm = 0x2000
	cmpq	$2048, %rcx                     # imm = 0x800
	jne	.LBB4_1
# %bb.6:
	retq
.Lfunc_end4:
	.size	_Z17regularMatrixMultv, .Lfunc_end4-_Z17regularMatrixMultv
	.cfi_endproc
                                        # -- End function
	.globl	_Z15tiledMatrixMultv            # -- Begin function _Z15tiledMatrixMultv
	.type	_Z15tiledMatrixMultv,@function
_Z15tiledMatrixMultv:                   # @_Z15tiledMatrixMultv
	.cfi_startproc
# %bb.0:
	retq
.Lfunc_end5:
	.size	_Z15tiledMatrixMultv, .Lfunc_end5-_Z15tiledMatrixMultv
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__matrixMultKernelPdS_S_ # -- Begin function _Z31__device_stub__matrixMultKernelPdS_S_
	.type	_Z31__device_stub__matrixMultKernelPdS_S_,@function
_Z31__device_stub__matrixMultKernelPdS_S_: # @_Z31__device_stub__matrixMultKernelPdS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16matrixMultKernelPdS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z31__device_stub__matrixMultKernelPdS_S_, .Lfunc_end6-_Z31__device_stub__matrixMultKernelPdS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z13matrixMultGPUv              # -- Begin function _Z13matrixMultGPUv
	.type	_Z13matrixMultGPUv,@function
_Z13matrixMultGPUv:                     # @_Z13matrixMultGPUv
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
	retq
.Lfunc_end7:
	.size	_Z13matrixMultGPUv, .Lfunc_end7-_Z13matrixMultGPUv
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	_Z12fillMatricesv
	movl	$t, %edi
	xorl	%esi, %esi
	callq	gettimeofday
	imulq	$1000000, t(%rip), %rax         # imm = 0xF4240
	addq	t+8(%rip), %rax
	movq	%rax, cpu_time(%rip)
	callq	_Z17regularMatrixMultv
	callq	_Z8stopTimev
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	main, .Lfunc_end8-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16matrixMultKernelPdS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	m1,@object                      # @m1
	.bss
	.globl	m1
	.p2align	4, 0x0
m1:
	.zero	16777216
	.size	m1, 16777216

	.type	m2,@object                      # @m2
	.globl	m2
	.p2align	4, 0x0
m2:
	.zero	16777216
	.size	m2, 16777216

	.type	result,@object                  # @result
	.globl	result
	.p2align	4, 0x0
result:
	.zero	16777216
	.size	result, 16777216

	.type	_result,@object                 # @_result
	.globl	_result
	.p2align	4, 0x0
_result:
	.zero	16777216
	.size	_result, 16777216

	.type	cpu_time,@object                # @cpu_time
	.globl	cpu_time
	.p2align	3, 0x0
cpu_time:
	.quad	0                               # 0x0
	.size	cpu_time, 8

	.type	t,@object                       # @t
	.globl	t
	.p2align	3, 0x0
t:
	.zero	16
	.size	t, 16

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" us have elapsed for the CPU execution"
	.size	.L.str, 39

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Cuda error: "
	.size	.L.str.1, 13

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	", "
	.size	.L.str.2, 3

	.type	_Z16matrixMultKernelPdS_S_,@object # @_Z16matrixMultKernelPdS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z16matrixMultKernelPdS_S_
	.p2align	3, 0x0
_Z16matrixMultKernelPdS_S_:
	.quad	_Z31__device_stub__matrixMultKernelPdS_S_
	.size	_Z16matrixMultKernelPdS_S_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z16matrixMultKernelPdS_S_"
	.size	.L__unnamed_1, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__matrixMultKernelPdS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym t
	.addrsig_sym _ZSt4cout
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _Z16matrixMultKernelPdS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16matrixMultKernelPdS_S_ ; -- Begin function _Z16matrixMultKernelPdS_S_
	.globl	_Z16matrixMultKernelPdS_S_
	.p2align	8
	.type	_Z16matrixMultKernelPdS_S_,@function
_Z16matrixMultKernelPdS_S_:             ; @_Z16matrixMultKernelPdS_S_
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16matrixMultKernelPdS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16matrixMultKernelPdS_S_, .Lfunc_end0-_Z16matrixMultKernelPdS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16matrixMultKernelPdS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z16matrixMultKernelPdS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
