/**
 * jrc3_cuda_rho.cu
 * block loading rho calculation. should be much faster
 * system('nvcc -ptx -m 64 -arch sm_35 jrc3_cuda_rho.cu')
 * i1 is multiple of chunk (16)
 * J. James Jun, Vidrio Technologies, LLC., 2017 Jun 11
 * 7/13/17: fDc_spk option added, which uses spike-specific distance cut-off (dc)
*/

#include <cuda_runtime.h>
// #include "cublas_v2.h"
#include <math.h>
#define ABS(my_val) ((my_val) < 0) ? (-1*(my_val)) : (my_val)
#define MIN(A,B) ((A)<(B)) ? (A) : (B)
#define MAX(A,B) ((A)>(B)) ? (A) : (B)
#define NTHREADS 128
#define NC 45 //max dimm
#define CHUNK 16
#define SINGLE_INF (3.402E+38) // equipvalent to NAN. consider -1 value

/** Main entry point.
 * Works out where the current thread should read/write to global memory
 * and calls doIterations to do the actual work.
 * Step through one B at a time
 */
__global__ void jrc3_cuda_rho(float * vrRho1, const float * mrFet12, const int * viiSpk12_ord, const int *  vnConst, const float dc2){
//__global__ void jrc3_cuda_rho(int *vnRho1, int *vnComp1, float const *mrFet12, int const *viiSpk12_ord, int const *vnC4, float const dc2){
    int i1 = (blockIdx.x + blockIdx.y * gridDim.x) * CHUNK;   // base index of i1    
    int tx = threadIdx.x; //nThreads for i12 index    
    int i1_tx = i1+tx;
    int n1 = vnConst[0];
    int n12 = vnConst[1];
    int nC = vnConst[2];
    int dn_max = vnConst[3];    
    int fDc_spk = vnConst[4];
    
    __shared__ int viiSpk1_ord_[CHUNK];
    __shared__ float mrFet1_[NC][CHUNK];    
    __shared__ int mnRho1_[NTHREADS][CHUNK]; // count then divide later    
    __shared__ int mnComp1_[NTHREADS][CHUNK]; // count number of elements compared        
    __shared__ float vrDc1_[CHUNK];  // use if fDc_spk=1
    
    // cache shared memory
    if (tx < nC){ //use tx as iC
        for (int i_c = 0; i_c < CHUNK; ++i_c){
            int i1_c = i_c + i1;
            if (i1_c < n1){
                mrFet1_[tx][i_c] = mrFet12[tx + i1_c * nC];
            }else{
                mrFet1_[tx][i_c] = 0.0f;
            }
        }
    }
    if (tx < CHUNK && i1_tx < n1) viiSpk1_ord_[tx] = viiSpk12_ord[i1_tx];
    
    for (int i_c = 0; i_c < CHUNK; ++i_c){
        mnRho1_[tx][i_c] = 0; // initialize rho
        mnComp1_[tx][i_c] = 0;
    }
    
    // calculate spike-specific distance cut-off vrDc1_ only if fDc_spk==1
    if (tx < CHUNK && fDc_spk==1){
        vrDc1_[tx] = 0.0f; //init
        //for (int iC = 0; iC < 1; ++iC){ //center only scale
        for (int iC = 0; iC < nC; ++iC){
            float temp_ = mrFet1_[iC][tx];
            vrDc1_[tx] += (temp_ * temp_);
        }
        vrDc1_[tx] *= dc2;
    }

    __syncthreads();        

    
    // Inspect distance relationship between i1 and i12_tx
    for (int i12_tx = tx; i12_tx < n12; i12_tx += blockDim.x){
    //for (int i12_tx = 1; i12_tx < n12; ++i12_tx){
        // compute time difference
        //char vlDist_c[CHUNK];
        int iiSpk12_ord_tx = viiSpk12_ord[i12_tx];        
        /*for (int i_c = 0; i_c < CHUNK; ++i_c){
            int di_spk_tx = ABS(viiSpk1_ord_[i_c] - iiSpk12_ord_tx);
            vlDist_c[i_c] = (di_spk_tx <= dn_max);
        } */
        
        // compute distance
        float vrDist_c[CHUNK];
        for (int i_c = 0; i_c < CHUNK; ++i_c) vrDist_c[i_c] = 0.0f;        
        for (int iC = 0; iC < nC; ++iC){
            float fet12_tx = mrFet12[iC + i12_tx * nC];
            for (int i_c = 0; i_c < CHUNK; ++i_c){
                float temp = fet12_tx - mrFet1_[iC][i_c];
                vrDist_c[i_c] += temp * temp;
            }            
        }
        
        // Compare the index and distance
        for (int i_c = 0; i_c < CHUNK; ++i_c){
            int di_spk_tx = ABS(viiSpk1_ord_[i_c] - iiSpk12_ord_tx);
            if (di_spk_tx <= dn_max){
            //if (vlDist_c[i_c] == 1){
                ++mnComp1_[tx][i_c];
                if (fDc_spk==0){
                    if (vrDist_c[i_c] <= dc2) ++mnRho1_[tx][i_c];
                }else{
                    if (vrDist_c[i_c] < vrDc1_[i_c]) ++mnRho1_[tx][i_c];
                }
            }
        }
    } // while
    
    // final count
    __syncthreads();
    //if (tx < CHUNK && i1_tx < n1){  // use tx as i_c
    if (tx < CHUNK){  // use tx as i_c
        int nRho1 = 0;
        int nComp1 = 0;
        for (int tx1=0; tx1<blockDim.x; ++tx1){
            nRho1 += mnRho1_[tx1][tx];
            nComp1 += mnComp1_[tx1][tx];
        }
        if (i1_tx < n1){
            //if (nRho1<1) nRho1 = 1; 
            vrRho1[i1_tx] = (float)(((double)(nRho1)) / ((double)nComp1));
        }
        // vnRho1[i1 + i_c_] = nRho1 - 1;
        // vnComp1[i1 + i_c_] = nComp1;
    }
    //vnRho1[0] = blockDim.x; //debug
    //vnComp1[0] = blockDim.x; //debug
} // func
	.file	"tmpxft_00322c86_00000000-6_irc_cuda_rho.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z43__device_stub__Z13jrc3_cuda_rhoPfPKfPKiS3_fPfPKfPKiS3_f
	.type	_Z43__device_stub__Z13jrc3_cuda_rhoPfPKfPKiS3_fPfPKfPKiS3_f, @function
_Z43__device_stub__Z13jrc3_cuda_rhoPfPKfPKiS3_fPfPKfPKiS3_f:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z13jrc3_cuda_rhoPfPKfPKiS3_f(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L2:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z43__device_stub__Z13jrc3_cuda_rhoPfPKfPKiS3_fPfPKfPKiS3_f, .-_Z43__device_stub__Z13jrc3_cuda_rhoPfPKfPKiS3_fPfPKfPKiS3_f
	.globl	_Z13jrc3_cuda_rhoPfPKfPKiS3_f
	.type	_Z13jrc3_cuda_rhoPfPKfPKiS3_f, @function
_Z13jrc3_cuda_rhoPfPKfPKiS3_f:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z13jrc3_cuda_rhoPfPKfPKiS3_fPfPKfPKiS3_f
	.cfi_endproc
.LFE2033:
	.size	_Z13jrc3_cuda_rhoPfPKfPKiS3_f, .-_Z13jrc3_cuda_rhoPfPKfPKiS3_f
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z13jrc3_cuda_rhoPfPKfPKiS3_f"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z13jrc3_cuda_rhoPfPKfPKiS3_f(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
 * jrc3_cuda_rho.cu
 * block loading rho calculation. should be much faster
 * system('nvcc -ptx -m 64 -arch sm_35 jrc3_cuda_rho.cu')
 * i1 is multiple of chunk (16)
 * J. James Jun, Vidrio Technologies, LLC., 2017 Jun 11
 * 7/13/17: fDc_spk option added, which uses spike-specific distance cut-off (dc)
*/

#include <hip/hip_runtime.h>
// #include "cublas_v2.h"
#include <math.h>
#define ABS(my_val) ((my_val) < 0) ? (-1*(my_val)) : (my_val)
#define MIN(A,B) ((A)<(B)) ? (A) : (B)
#define MAX(A,B) ((A)>(B)) ? (A) : (B)
#define NTHREADS 128
#define NC 45 //max dimm
#define CHUNK 16
#define SINGLE_INF (3.402E+38) // equipvalent to NAN. consider -1 value

/** Main entry point.
 * Works out where the current thread should read/write to global memory
 * and calls doIterations to do the actual work.
 * Step through one B at a time
 */
__global__ void jrc3_cuda_rho(float * vrRho1, const float * mrFet12, const int * viiSpk12_ord, const int *  vnConst, const float dc2){
//__global__ void jrc3_cuda_rho(int *vnRho1, int *vnComp1, float const *mrFet12, int const *viiSpk12_ord, int const *vnC4, float const dc2){
    int i1 = (blockIdx.x + blockIdx.y * gridDim.x) * CHUNK;   // base index of i1    
    int tx = threadIdx.x; //nThreads for i12 index    
    int i1_tx = i1+tx;
    int n1 = vnConst[0];
    int n12 = vnConst[1];
    int nC = vnConst[2];
    int dn_max = vnConst[3];    
    int fDc_spk = vnConst[4];
    
    __shared__ int viiSpk1_ord_[CHUNK];
    __shared__ float mrFet1_[NC][CHUNK];    
    __shared__ int mnRho1_[NTHREADS][CHUNK]; // count then divide later    
    __shared__ int mnComp1_[NTHREADS][CHUNK]; // count number of elements compared        
    __shared__ float vrDc1_[CHUNK];  // use if fDc_spk=1
    
    // cache shared memory
    if (tx < nC){ //use tx as iC
        for (int i_c = 0; i_c < CHUNK; ++i_c){
            int i1_c = i_c + i1;
            if (i1_c < n1){
                mrFet1_[tx][i_c] = mrFet12[tx + i1_c * nC];
            }else{
                mrFet1_[tx][i_c] = 0.0f;
            }
        }
    }
    if (tx < CHUNK && i1_tx < n1) viiSpk1_ord_[tx] = viiSpk12_ord[i1_tx];
    
    for (int i_c = 0; i_c < CHUNK; ++i_c){
        mnRho1_[tx][i_c] = 0; // initialize rho
        mnComp1_[tx][i_c] = 0;
    }
    
    // calculate spike-specific distance cut-off vrDc1_ only if fDc_spk==1
    if (tx < CHUNK && fDc_spk==1){
        vrDc1_[tx] = 0.0f; //init
        //for (int iC = 0; iC < 1; ++iC){ //center only scale
        for (int iC = 0; iC < nC; ++iC){
            float temp_ = mrFet1_[iC][tx];
            vrDc1_[tx] += (temp_ * temp_);
        }
        vrDc1_[tx] *= dc2;
    }

    __syncthreads();        

    
    // Inspect distance relationship between i1 and i12_tx
    for (int i12_tx = tx; i12_tx < n12; i12_tx += blockDim.x){
    //for (int i12_tx = 1; i12_tx < n12; ++i12_tx){
        // compute time difference
        //char vlDist_c[CHUNK];
        int iiSpk12_ord_tx = viiSpk12_ord[i12_tx];        
        /*for (int i_c = 0; i_c < CHUNK; ++i_c){
            int di_spk_tx = ABS(viiSpk1_ord_[i_c] - iiSpk12_ord_tx);
            vlDist_c[i_c] = (di_spk_tx <= dn_max);
        } */
        
        // compute distance
        float vrDist_c[CHUNK];
        for (int i_c = 0; i_c < CHUNK; ++i_c) vrDist_c[i_c] = 0.0f;        
        for (int iC = 0; iC < nC; ++iC){
            float fet12_tx = mrFet12[iC + i12_tx * nC];
            for (int i_c = 0; i_c < CHUNK; ++i_c){
                float temp = fet12_tx - mrFet1_[iC][i_c];
                vrDist_c[i_c] += temp * temp;
            }            
        }
        
        // Compare the index and distance
        for (int i_c = 0; i_c < CHUNK; ++i_c){
            int di_spk_tx = ABS(viiSpk1_ord_[i_c] - iiSpk12_ord_tx);
            if (di_spk_tx <= dn_max){
            //if (vlDist_c[i_c] == 1){
                ++mnComp1_[tx][i_c];
                if (fDc_spk==0){
                    if (vrDist_c[i_c] <= dc2) ++mnRho1_[tx][i_c];
                }else{
                    if (vrDist_c[i_c] < vrDc1_[i_c]) ++mnRho1_[tx][i_c];
                }
            }
        }
    } // while
    
    // final count
    __syncthreads();
    //if (tx < CHUNK && i1_tx < n1){  // use tx as i_c
    if (tx < CHUNK){  // use tx as i_c
        int nRho1 = 0;
        int nComp1 = 0;
        for (int tx1=0; tx1<blockDim.x; ++tx1){
            nRho1 += mnRho1_[tx1][tx];
            nComp1 += mnComp1_[tx1][tx];
        }
        if (i1_tx < n1){
            //if (nRho1<1) nRho1 = 1; 
            vrRho1[i1_tx] = (float)(((double)(nRho1)) / ((double)nComp1));
        }
        // vnRho1[i1 + i_c_] = nRho1 - 1;
        // vnComp1[i1 + i_c_] = nComp1;
    }
    //vnRho1[0] = blockDim.x; //debug
    //vnComp1[0] = blockDim.x; //debug
} // func
	.text
	.file	"irc_cuda_rho.hip"
	.globl	_Z28__device_stub__jrc3_cuda_rhoPfPKfPKiS3_f # -- Begin function _Z28__device_stub__jrc3_cuda_rhoPfPKfPKiS3_f
	.type	_Z28__device_stub__jrc3_cuda_rhoPfPKfPKiS3_f,@function
_Z28__device_stub__jrc3_cuda_rhoPfPKfPKiS3_f: # @_Z28__device_stub__jrc3_cuda_rhoPfPKfPKiS3_f
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13jrc3_cuda_rhoPfPKfPKiS3_f, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__jrc3_cuda_rhoPfPKfPKiS3_f, .Lfunc_end0-_Z28__device_stub__jrc3_cuda_rhoPfPKfPKiS3_f
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13jrc3_cuda_rhoPfPKfPKiS3_f, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13jrc3_cuda_rhoPfPKfPKiS3_f,@object # @_Z13jrc3_cuda_rhoPfPKfPKiS3_f
	.section	.rodata,"a",@progbits
	.globl	_Z13jrc3_cuda_rhoPfPKfPKiS3_f
	.p2align	3, 0x0
_Z13jrc3_cuda_rhoPfPKfPKiS3_f:
	.quad	_Z28__device_stub__jrc3_cuda_rhoPfPKfPKiS3_f
	.size	_Z13jrc3_cuda_rhoPfPKfPKiS3_f, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z13jrc3_cuda_rhoPfPKfPKiS3_f"
	.size	.L__unnamed_1, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__jrc3_cuda_rhoPfPKfPKiS3_f
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13jrc3_cuda_rhoPfPKfPKiS3_f
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13jrc3_cuda_rhoPfPKfPKiS3_f ; -- Begin function _Z13jrc3_cuda_rhoPfPKfPKiS3_f
	.globl	_Z13jrc3_cuda_rhoPfPKfPKiS3_f
	.p2align	8
	.type	_Z13jrc3_cuda_rhoPfPKfPKiS3_f,@function
_Z13jrc3_cuda_rhoPfPKfPKiS3_f:          ; @_Z13jrc3_cuda_rhoPfPKfPKiS3_f
; %bb.0:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s2, s[0:1], 0x28
	s_mov_b32 s3, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	s_load_b128 s[16:19], s[10:11], 0x0
	s_load_b32 s20, s[10:11], 0x10
	s_mul_i32 s12, s2, s15
	s_add_u32 s10, s0, 40
	s_addc_u32 s11, s1, 0
	s_add_i32 s12, s12, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s2, s12, 4
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s18, v0
	s_cbranch_execz .LBB0_5
; %bb.1:                                ; %.preheader137.preheader
	s_mul_i32 s12, s18, s12
	v_lshl_add_u32 v3, v0, 6, 0x4000
	v_lshl_add_u32 v1, s12, 4, v0
	s_mov_b32 s12, 0
	s_mov_b32 s13, s2
.LBB0_2:                                ; %.preheader137
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 0
	s_cmp_ge_i32 s13, s16
	s_cbranch_scc1 .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_co_u32 v4, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	global_load_b32 v2, v[4:5], off
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v4, s12, v3
	v_add_nc_u32_e32 v1, s18, v1
	s_add_i32 s12, s12, 4
	s_add_i32 s13, s13, 1
	s_cmp_lg_u32 s12, 64
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v2
	s_cbranch_scc1 .LBB0_2
.LBB0_5:                                ; %Flow265
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v17, s2, v0
	v_cmp_gt_u32_e64 s3, 16, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s16, v17
	s_and_b32 s13, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s12, s13
	s_cbranch_execz .LBB0_7
; %bb.6:
	v_ashrrev_i32_e32 v18, 31, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[17:18]
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	v_lshlrev_b32_e32 v2, 2, v0
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v1 offset:19264
.LBB0_7:                                ; %.preheader189
	s_or_b32 exec_lo, exec_lo, s12
	v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v20, 6, v0
	s_mov_b32 s12, 0
.LBB0_8:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v2, s12, v20
	s_add_i32 s12, s12, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s12, 64
	ds_store_2addr_stride64_b32 v2, v1, v1 offset1:32
	s_cbranch_scc0 .LBB0_8
; %bb.9:
	s_load_b32 s12, s[0:1], 0x20
	s_cmp_eq_u32 s20, 1
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s3, s0
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_15
; %bb.10:
	s_cmp_lt_i32 s18, 1
	s_cbranch_scc1 .LBB0_13
; %bb.11:                               ; %.lr.ph.preheader
	v_lshl_or_b32 v2, v0, 2, 0x4000
	v_mov_b32_e32 v1, 0
	s_mov_b32 s1, s18
.LBB0_12:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v3, v2
	v_add_nc_u32_e32 v2, 64, v2
	s_add_i32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s1, 0
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v1, v3, v3
	s_cbranch_scc0 .LBB0_12
	s_branch .LBB0_14
.LBB0_13:
	v_mov_b32_e32 v1, 0
.LBB0_14:                               ; %._crit_edge
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mul_f32 v1, s12, v1 :: v_dual_lshlrev_b32 v2, 2, v0
	ds_store_b32 v2, v1 offset:19328
.LBB0_15:                               ; %Flow263
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s13, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_i32_e64 s17, v0
	s_cbranch_execz .LBB0_35
; %bb.16:                               ; %.lr.ph152
	s_load_b32 s0, s[10:11], 0xc
	s_cmp_gt_i32 s18, 0
	v_mov_b32_e32 v18, v0
	s_cselect_b32 s14, -1, 0
	s_cmp_lg_u32 s20, 0
	s_mov_b32 s15, 0
	s_cselect_b32 s16, -1, 0
                                        ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16
	s_waitcnt lgkmcnt(0)
	s_and_b32 s20, s0, 0xffff
.LBB0_17:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_18 Depth 2
                                        ;     Child Loop BB0_21 Depth 2
                                        ;       Child Loop BB0_22 Depth 3
                                        ;     Child Loop BB0_25 Depth 2
	v_ashrrev_i32_e32 v19, 31, v18
	s_mov_b64 s[0:1], 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[21:22], 2, v[18:19]
	v_add_co_u32 v21, vcc_lo, s8, v21
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v22, vcc_lo, s9, v22, vcc_lo
	global_load_b32 v19, v[21:22], off
.LBB0_18:                               ;   Parent Loop BB0_17 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 16
	v_movreld_b32_e32 v1, 0
	s_cbranch_scc0 .LBB0_18
; %bb.19:                               ; %.preheader136
                                        ;   in Loop: Header=BB0_17 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB0_24
; %bb.20:                               ; %.lr.ph147
                                        ;   in Loop: Header=BB0_17 Depth=1
	v_mul_lo_u32 v21, v18, s18
	s_mov_b32 s21, 0
	s_movk_i32 s22, 0x4000
.LBB0_21:                               ;   Parent Loop BB0_17 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_22 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v22, s21, v21
	s_mov_b64 s[0:1], 0
	s_mov_b32 s23, s22
	v_ashrrev_i32_e32 v23, 31, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], 2, v[22:23]
	v_add_co_u32 v22, vcc_lo, s6, v22
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v23, vcc_lo, s7, v23, vcc_lo
	global_load_b32 v22, v[22:23], off
.LBB0_22:                               ;   Parent Loop BB0_17 Depth=1
                                        ;     Parent Loop BB0_21 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v23, s23
	s_mov_b32 m0, s0
	s_add_u32 s0, s0, 1
	v_movrels_b32_e32 v24, v1
	s_addc_u32 s1, s1, 0
	ds_load_b32 v23, v23
	s_add_i32 s23, s23, 4
	s_cmp_eq_u32 s0, 16
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_f32_e32 v23, v22, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v24, v23, v23
	v_movreld_b32_e32 v1, v24
	s_cbranch_scc0 .LBB0_22
; %bb.23:                               ;   in Loop: Header=BB0_21 Depth=2
	s_add_i32 s21, s21, 1
	s_add_i32 s22, s22, 64
	s_cmp_eq_u32 s21, s18
	s_cbranch_scc0 .LBB0_21
.LBB0_24:                               ; %Flow258
                                        ;   in Loop: Header=BB0_17 Depth=1
	s_mov_b32 s21, 0
	s_mov_b64 s[0:1], 0
.LBB0_25:                               ;   Parent Loop BB0_17 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v21, s21
	s_mov_b32 s22, exec_lo
	ds_load_b32 v21, v21 offset:19264
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_nc_u32_e32 v21, v21, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v22, 0, v21
	v_max_i32_e32 v21, v21, v22
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ge_i32_e64 s19, v21
	s_cbranch_execz .LBB0_33
; %bb.26:                               ;   in Loop: Header=BB0_25 Depth=2
	v_add_nc_u32_e32 v21, s21, v20
	s_mov_b32 m0, s0
	s_and_b32 vcc_lo, exec_lo, s16
	ds_load_b32 v22, v21 offset:8192
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v23, 1, v22
	v_movrels_b32_e32 v22, v1
	ds_store_b32 v21, v23 offset:8192
	s_cbranch_vccz .LBB0_28
; %bb.27:                               ;   in Loop: Header=BB0_25 Depth=2
	v_mov_b32_e32 v23, s21
	s_mov_b32 s24, 0
	ds_load_b32 v23, v23 offset:19328
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_f32_e32 vcc_lo, v22, v23
	s_and_b32 s23, vcc_lo, exec_lo
	s_branch .LBB0_29
.LBB0_28:                               ;   in Loop: Header=BB0_25 Depth=2
	s_mov_b32 s24, -1
	s_mov_b32 s23, 0
.LBB0_29:                               ; %Flow254
                                        ;   in Loop: Header=BB0_25 Depth=2
	s_and_not1_b32 vcc_lo, exec_lo, s24
	s_cbranch_vccnz .LBB0_31
; %bb.30:                               ;   in Loop: Header=BB0_25 Depth=2
	v_cmp_ge_f32_e32 vcc_lo, s12, v22
	s_and_not1_b32 s23, s23, exec_lo
	s_and_b32 s24, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s23, s23, s24
.LBB0_31:                               ; %Flow255
                                        ;   in Loop: Header=BB0_25 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s23
	s_cbranch_execz .LBB0_33
; %bb.32:                               ; %.sink.split
                                        ;   in Loop: Header=BB0_25 Depth=2
	ds_load_b32 v22, v21
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v22, 1, v22
	ds_store_b32 v21, v22
.LBB0_33:                               ;   in Loop: Header=BB0_25 Depth=2
	s_or_b32 exec_lo, exec_lo, s22
	s_add_i32 s21, s21, 4
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s0, 16
	s_cbranch_scc0 .LBB0_25
; %bb.34:                               ;   in Loop: Header=BB0_17 Depth=1
	v_add_nc_u32_e32 v18, s20, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s17, v18
	s_or_b32 s15, vcc_lo, s15
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB0_17
.LBB0_35:                               ; %Flow260
	s_or_b32 exec_lo, exec_lo, s13
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB0_42
; %bb.36:                               ; %.preheader
	s_load_b32 s0, s[10:11], 0xc
	v_mov_b32_e32 v1, 0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_cmp_eq_u32 s0, 0
	s_cbranch_scc1 .LBB0_40
; %bb.37:                               ; %.lr.ph157.preheader
	v_dual_mov_b32 v0, 0 :: v_dual_lshlrev_b32 v1, 2, v0
	v_mov_b32_e32 v2, 0
.LBB0_38:                               ; %.lr.ph157
                                        ; =>This Inner Loop Header: Depth=1
	ds_load_2addr_stride64_b32 v[3:4], v1 offset1:32
	v_add_nc_u32_e32 v1, 64, v1
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	v_add_nc_u32_e32 v0, v4, v0
	s_cbranch_scc0 .LBB0_38
; %bb.39:                               ; %._crit_edge158.loopexit
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[3:4], v2
	v_cvt_f64_i32_e32 v[1:2], v0
.LBB0_40:                               ; %Flow251
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_42
; %bb.41:
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[5:6], null, v[1:2], v[1:2], v[3:4]
	v_ashrrev_i32_e32 v18, 31, v17
	v_rcp_f64_e32 v[7:8], v[5:6]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	v_div_scale_f64 v[9:10], vcc_lo, v[3:4], v[1:2], v[3:4]
	v_mul_f64 v[11:12], v[9:10], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], -v[5:6], v[11:12], v[9:10]
	v_div_fmas_f64 v[5:6], v[5:6], v[7:8], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[0:1], v[5:6], v[1:2], v[3:4]
	v_cvt_f32_f64_e32 v2, v[0:1]
	v_lshlrev_b64 v[0:1], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_42:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13jrc3_cuda_rhoPfPKfPKiS3_f
		.amdhsa_group_segment_fixed_size 19392
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 25
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13jrc3_cuda_rhoPfPKfPKiS3_f, .Lfunc_end0-_Z13jrc3_cuda_rhoPfPKfPKiS3_f
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1356
; NumSgprs: 27
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 19392 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 27
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 19392
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13jrc3_cuda_rhoPfPKfPKiS3_f
    .private_segment_fixed_size: 0
    .sgpr_count:     27
    .sgpr_spill_count: 0
    .symbol:         _Z13jrc3_cuda_rhoPfPKfPKiS3_f.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     25
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
