//#include "cuda_runtime.h"
//#include "device_launch_parameters.h"

#include <iostream>
#include <fstream>
#include <sstream>
#include <string>
#include <vector>
#include <map>
#include <iterator>
#include <algorithm>
#include <assert.h>
//#include <time.h>

using namespace std;


const int N = 2394385;
const int M = 5021410;
const int BLOCK_SIZE = 256;

const unsigned MAX_NUM = 4294967295;

const int NUM_BANKS = 16;
const int LOG_NUM_BANKS = 4;
//const string fn("test.txt");
const string fn("WikiTalk.txt");
//const string fn("soc-LiveJournal1.txt");

unsigned **scanBlockSums;
unsigned numEltsAllocated = 0;
unsigned numLevelsAllocated = 0;

__device__  unsigned Mterminate;
__device__ unsigned numActiveThreads;
__device__ unsigned *range;
__device__ unsigned *pivot;

#define FALSE 0u
#define  TRUE 1u

#define CONFLICT_FREE_OFFSET(index) ((index) >> LOG_NUM_BANKS)
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort = true) {
	if (code != cudaSuccess) {
		fprintf(stderr, "Error: %s\nFile %s, line %d\n", cudaGetErrorString(code), file, line);
		exit(code);
	}
}

inline
bool isPowerOfTwo(int n) {
	return (n & (n - 1)) == 0;
}

inline
int floorPow2(int n) {
	int exp;
	frexp((float)n, &exp);
	return 1 << (exp - 1);
}

template <bool isNP2>
__device__
void loadSharedChunkFromMem(unsigned *s_data, const unsigned *idata, int n, int baseIndex, int& ai, int& bi, int& mem_ai, int& mem_bi, int& bankOffsetA, int& bankOffsetB);
template <bool isNP2>
__device__
void storeSharedChunkToMem(unsigned* odata, const unsigned* s_data, int n, int ai, int bi, int mem_ai, int mem_bi, int bankOffsetA, int bankOffsetB);
template <bool storeSum>
__device__
void clearLastElement(unsigned* s_data, unsigned *blockSums, int blockIndex);
__device__
unsigned int buildSum(unsigned *s_data);
__device__
void scanRootToLeaves(unsigned *s_data, unsigned int stride);
template <bool storeSum>
__device__
void prescanBlock(unsigned *data, int blockIndex, unsigned *blockSums);
template <bool storeSum, bool isNP2>
__global__
void prescan(unsigned *odata, const unsigned *idata, unsigned *blockSums, int n, int blockIndex, int baseIndex);
__global__
void uniformAdd(unsigned *data, unsigned *uniforms, int n, int blockOffset, int baseIndex);

__global__
void BFSKernel1(
size_t graphSize, unsigned *activeMask, unsigned *V, unsigned *E,
unsigned *F, unsigned *X,unsigned *Fu);
__global__
void BFSKernel2(size_t graphSize, unsigned *F, unsigned *X, unsigned *Fu);
__global__
void TRIMKernel(size_t graphSize,unsigned *VF,unsigned *EF,unsigned *VB,unsigned *EB);
/*__global__
void getActiveMaskTemp(size_t graphSize, unsigned *F, unsigned *activeMask);*/
__global__
void compactSIMD(size_t N, unsigned *prefixSums, unsigned *activeMask, size_t blockSize);
__global__
void PIVOTS_SEL_Kernel(size_t graphSize);
__global__
void UpdateKernel(size_t graphSize, unsigned *visF,unsigned *visB);
__global__
void UpdateKernel1(size_t graphSize,unsigned *visF,unsigned *visB,unsigned *ac);
__global__
void RenumberKernel(size_t graphSize,unsigned *prefixsum);
__global__
void initpivot(size_t graphSize);
__global__
void ReadPivot(size_t graphSize, unsigned *pivot_);

__host__
void setUInt(unsigned *address, unsigned value);
__host__
void Graphpreproc(const string filename, vector<unsigned> &VF, vector<unsigned> &EF, vector<unsigned> &VB, vector<unsigned> &EB);
__host__
void BFS(vector<unsigned> &V, vector<unsigned> &E, unsigned index_s, unsigned index_e, vector<unsigned> &visited);
__host__
void TRIMMING(vector<unsigned> &VF, vector<unsigned> &EF, vector<unsigned> &VB, vector<unsigned> &EB);
__host__
void PIVOTS_SEL();
__host__
void Update(vector<unsigned> &visF,vector<unsigned> &visB,unsigned &termin);
__host__
void Update1(vector<unsigned> &visF,vector<unsigned> &visB,vector<unsigned> &prefixsum, unsigned &termin);
__host__
void preallocBlockSums(unsigned maxNumElements);
__host__
void deallocBlockSums();
__host__
void prescanArrayRecursive(unsigned *outArray, const unsigned *inArray, int numElements, int level);
__host__
void prescanArray(unsigned *outArray, unsigned *inArray, int numElements);

int main()
{
	vector<unsigned> VF, EF, VB, EB, visF, visB,range_,pivot_,prefixsum_;
	vector<unsigned>::iterator itr;

	/*ofstream out("out1.txt");
	if(!out){  
    	cout << "Unable to open outfile";  
        exit(1); // terminate with error  
    }*/
  

	unsigned termin;

	unsigned *d_r,*d_p;
	unsigned *d_prefixsum;

	range_.resize(N);
	pivot_.resize(N);
	//prefixsum_.resize(N+1);
	VF.reserve(N + 1);
	EF.reserve(M);
	VB.reserve(N + 1);
	EB.reserve(M);
	Graphpreproc(fn, VF, EF, VB, EB);

	unsigned index_s = 0;
	unsigned index_e = 0;
	unsigned loop = 0;
 

	const size_t gridSizeK2 =
			(N + BLOCK_SIZE - 1) / BLOCK_SIZE;


	gpuErrchk(cudaMalloc(&d_r, N*sizeof(unsigned)));
	gpuErrchk(cudaMemset(d_r, FALSE, N*sizeof(unsigned)));
	//gpuErrchk(cudaMemcpyToSymbol(range, &d_r, sizeof(unsigned *),size_t(0), cudaMemcpyHostToDevice));
	gpuErrchk(cudaMemcpyToSymbol(range, &d_r, sizeof(d_r)));

	gpuErrchk(cudaMalloc(&d_p, N*sizeof(unsigned)));
	gpuErrchk(cudaMemset(d_p, 255, N*sizeof(unsigned)));
	//gpuErrchk(cudaMemcpyToSymbol(pivot, &d_p, sizeof(unsigned *),size_t(0), cudaMemcpyHostToDevice));
	gpuErrchk(cudaMemcpyToSymbol(pivot, &d_p, sizeof(d_p)));

	gpuErrchk(cudaMalloc(&d_prefixsum, (N+1)*sizeof(unsigned)));

	cudaEvent_t start;
    	cudaEvent_t stop;
    	cudaEventCreate(&start);
    	cudaEventCreate(&stop);
    	cudaEventRecord(start, 0);
	while(true){
		loop++;
		TRIMMING(VF,EF,VB,EB);

		PIVOTS_SEL();

		BFS(VF, EF, index_s, index_e, visF);
		BFS(VB, EB, index_s, index_e ,visB);

		if(true){
			Update1(visF,visB,prefixsum_,termin);
			if(termin == FALSE){
				gpuErrchk(cudaMemcpy(d_prefixsum, prefixsum_.data(), (N+1)*sizeof(unsigned), cudaMemcpyHostToDevice));
				RenumberKernel<<<gridSizeK2,BLOCK_SIZE>>>(N,d_prefixsum);
				gpuErrchk(cudaDeviceSynchronize());
				index_e = prefixsum_.at(N) - 1;
			}
		}
		else{
			Update(visF,visB,termin);
			index_e = 3 * index_e + 2;
		}
		

		if(termin)
			break;
		initpivot<<<gridSizeK2,BLOCK_SIZE>>>(N);

		gpuErrchk(cudaDeviceSynchronize());
	}

	cudaEventRecord(stop,0);
    	cudaEventSynchronize(stop);
    	float time;
    	cudaEventElapsedTime(&time,start,stop);
   	printf("time is %f\n",time);
	printf("%u\n", loop);
	
	gpuErrchk(cudaFree(d_r));
	gpuErrchk(cudaFree(d_p));
	gpuErrchk(cudaFree(d_prefixsum));
	//out.close();
	return 0;
}

__host__
void setUInt(unsigned *address, unsigned value) {
	gpuErrchk(cudaMemcpy(address, &value, sizeof(unsigned), cudaMemcpyHostToDevice));
}

__host__
void Graphpreproc(const string filename, vector<unsigned> &VF, vector<unsigned> &EF, vector<unsigned> &VB, vector<unsigned> &EB)
{
	ifstream in_f;
	vector<unsigned> t;
	vector<unsigned>::iterator itr;
	multimap<const unsigned, unsigned> m;
	multimap<const unsigned, unsigned>::iterator mitr;
	unsigned count = 0;
	in_f.open(filename.c_str(), ios::in);
	while (!in_f.eof()){
		string temp, s1, s2;
		stringstream ss1, ss2;
		unsigned t1, t2;
		getline(in_f, temp);
		if(temp.length() == 0)
			continue;
		if (*(temp.begin()) == '#')
			continue;
		s1 = string(temp, 0, temp.find_first_of('\t'));
		s2 = string(temp, temp.find_first_not_of('\t', temp.find_first_of('\t')), temp.find_last_not_of('\t'));
		ss1 << s1;
		ss1 >> t1;
		ss2 << s2;
		ss2 >> t2;
		t.push_back(t1);
		m.insert(make_pair(t2, t1));
		EF.push_back(t2);
	}

	itr = t.begin();
	VF.push_back(0);
	for (int i = 0; i < N - 1; i++){
		while ((itr != t.end()) && (*itr == i)){
			count++;
			itr++;
		}
		count += VF.at(i);
		VF.push_back(count);
		count = 0;
	}
	VF.push_back(M);

	mitr = m.begin();
	VB.push_back(0);
	for (int i = 0; i < N - 1; i++){
		while ((mitr != m.end()) && ((mitr->first) == i)){
			count++;
			mitr++;
		}
		count += VB.at(i);
		VB.push_back(count);
		count = 0;
	}
	VB.push_back(M);
	for (mitr = m.begin(); mitr != m.end(); mitr++){
		EB.push_back(mitr->second);
	}
}

__global__
void BFSKernel1(
size_t graphSize, unsigned *activeMask, unsigned *V, unsigned *E,
unsigned *F, unsigned *X,unsigned *Fu) {

	unsigned activeMaskIdx = blockIdx.x * BLOCK_SIZE + threadIdx.x;

	// If vertex is active at current iteration
	if (activeMaskIdx < numActiveThreads) {

		unsigned v = activeMask[activeMaskIdx];

		// Remove v from current frontier
		F[v] = FALSE;

		// Iterate over v's neighbors
		for (unsigned edge = V[v]; edge < V[v + 1]; ++edge) {
			unsigned neighbor = E[edge];

			// If neighbor wasn't visited
			if(range[v] == range[neighbor]){
				if (X[neighbor] == FALSE){
					//C[neighbor] = C[v] + 1;
					Fu[neighbor] = TRUE;
				}
			}
		}
	}
}

__global__
void BFSKernel2(size_t graphSize, unsigned *F, unsigned *X, unsigned *Fu) {

	int v = blockIdx.x * BLOCK_SIZE + threadIdx.x;

	// If vertex v exists and has recently joined the frontier
	if (v < graphSize && Fu[v]) {
		// Copy the new frontier into F
		F[v] = TRUE;
		// Set v as visited
		X[v] = TRUE;
		// Clean up the new frontier
		Fu[v] = FALSE;

		Mterminate = FALSE;
	}
}

__global__
void TRIMKernel(size_t graphSize,unsigned *VF,unsigned *EF,unsigned *VB,unsigned *EB)
{
	int v = blockIdx.x * BLOCK_SIZE + threadIdx.x;
	bool elim;

	if(v < graphSize){
		if(range[v] != MAX_NUM){
			elim = true;

			for (unsigned edge = VF[v]; edge < VF[v + 1]; ++edge) {
				unsigned neighbor = EF[edge];
				if(range[neighbor] == range[v]){
					elim = false;
					break;
				}
			}
			if(elim == false){
				elim = true;
				for (unsigned edge = VB[v]; edge < VB[v + 1]; ++edge) {
					unsigned neighbor = EB[edge];
					if(range[neighbor] == range[v]){
						elim = false;
						break;
					}
				}
			}
			if(elim == true){
				range[v] = MAX_NUM;
				Mterminate = FALSE;
			}
		}
	}
}

__global__
void PIVOTS_SEL_Kernel(size_t graphSize)
{
	int v = blockIdx.x * BLOCK_SIZE + threadIdx.x;

	if(v < graphSize){
		if(range[v] != MAX_NUM)
			pivot[range[v]] = v;
	}
}

__global__
void UpdateKernel(size_t graphSize,unsigned *visF,unsigned *visB)
{
	int v = blockIdx.x * BLOCK_SIZE + threadIdx.x;

	if(v < graphSize){
		if(range[v] != MAX_NUM){
			if(visF[v] == TRUE){
				if(visB[v] == TRUE){
					range[v] = MAX_NUM;
				}
				else if(visB[v] == FALSE){
					range[v] = 3*range[v];
					Mterminate = FALSE;
				}
			}
			else if(visF[v] == FALSE){
				if(visB[v] == TRUE){
					range[v] = 3*range[v] + 1;
					Mterminate = FALSE;
				}
				else if(visB[v] == FALSE){
					range[v] = 3*range[v] + 2;
					Mterminate = FALSE;
				}
			}
		}
	}
}

__global__
void UpdateKernel1(size_t graphSize,unsigned *visF,unsigned *visB,unsigned *ac)
{
	int v = blockIdx.x * BLOCK_SIZE + threadIdx.x;

	if(v < graphSize){
		if(range[v] != MAX_NUM){
			if(visF[v] == TRUE){
				if(visB[v] == TRUE){
					range[v] = MAX_NUM;
				}
				else if(visB[v] == FALSE){
					range[v] = 3*range[v];
					ac[range[v]] = TRUE;
					Mterminate = FALSE;
				}
			}
			else if(visF[v] == FALSE){
				if(visB[v] == TRUE){
					range[v] = 3*range[v] + 1;
					ac[range[v]] = TRUE;
					Mterminate = FALSE;
				}
				else if(visB[v] == FALSE){
					range[v] = 3*range[v] + 2;
					ac[range[v]] = TRUE;
					Mterminate = FALSE;
				}
			}
		}
	}
}

__global__
void RenumberKernel(size_t graphSize,unsigned *prefixsum)
{
	int v = blockIdx.x * BLOCK_SIZE + threadIdx.x;

	if(v < graphSize){
		if(range[v] != MAX_NUM)
			range[v] = prefixsum[range[v]];
	}
}

__global__
void initpivot(size_t graphSize)
{
	int v = blockIdx.x * BLOCK_SIZE + threadIdx.x;

	if(v < graphSize){
		pivot[v] = MAX_NUM;
	}
}

__global__
void ReadPivot(size_t graphSize ,unsigned *pivot_)
{
	int v = blockIdx.x * BLOCK_SIZE + threadIdx.x;

	if(v < graphSize){
		pivot_[v] = pivot[v];
	}
}



// Very slow but correct "active mask" calculation; for debugging
/*__global__
void getActiveMaskTemp(size_t graphSize, unsigned *F, unsigned *activeMask) {

	numActiveThreads = 0;
	for (int i = 0; i < graphSize; ++i) {
		if (F[i]) {
			activeMask[numActiveThreads] = i;
			++numActiveThreads;
		}
	}
}*/

__global__
void compactSIMD(size_t N, unsigned *prefixSums, unsigned *activeMask, size_t blockSize) {

	size_t v = blockIdx.x * blockSize + threadIdx.x;

	if (v < N) {
		// Can possibly be accelerated by using shared memory
		if (prefixSums[v + 1] != prefixSums[v]) {
			activeMask[prefixSums[v]] = v;
		}
	}
}

__host__
void BFS(vector<unsigned> &V, vector<unsigned> &E, unsigned index_s, unsigned index_e, vector<unsigned> &visited)
{
	assert(sizeof(unsigned) == 4);

	unsigned size_sub = index_e - index_s + 1;
	visited.clear();
	visited.resize(N);

	vector<unsigned> pivot_h;
	pivot_h.resize(size_sub);

	unsigned *d_V, *d_E, *d_p;
	unsigned *d_F, *d_X, *d_Fu;
	unsigned *activeMask, *prefixSums;
	//unsigned **prefixSums;
	size_t memSize = (N + 1) * sizeof(unsigned);
	size_t memSizeE = M * sizeof(unsigned);

	gpuErrchk(cudaMalloc(&d_F, memSize));
	gpuErrchk(cudaMemset(d_F, FALSE, memSize));
	//setUInt(d_F + piv, TRUE); // add source to frontier

	gpuErrchk(cudaMalloc(&d_X, memSize));
	gpuErrchk(cudaMemset(d_X, FALSE, memSize));
	//setUInt(d_X + sourceVertex, TRUE); // set source as visited

	gpuErrchk(cudaMalloc(&d_Fu, memSize));
	gpuErrchk(cudaMemset(d_Fu, FALSE, memSize));

	gpuErrchk(cudaMalloc(&d_V, memSize));
	gpuErrchk(cudaMemcpy(d_V, V.data(), memSize, cudaMemcpyHostToDevice));

	gpuErrchk(cudaMalloc(&d_E, memSizeE));
	gpuErrchk(cudaMemcpy(d_E, E.data(), memSizeE, cudaMemcpyHostToDevice));

	gpuErrchk(cudaMalloc(&activeMask, memSize));
	//setUInt(activeMask + 0, sourceVertex); // set thread #source as active
	gpuErrchk(cudaMalloc(&d_p, size_sub*sizeof(unsigned)));
	//gpuErrchk(cudaMemset(d_p, FALSE, N*sizeof(unsigned)));



	gpuErrchk(cudaMalloc(&prefixSums, memSize));
	preallocBlockSums(N + 1);

	const size_t gridSizeK2 =
			(N + BLOCK_SIZE - 1) / BLOCK_SIZE;

	const size_t gridSizeK3 =
			(size_sub + BLOCK_SIZE - 1) / BLOCK_SIZE;

	ReadPivot<<<gridSizeK3,BLOCK_SIZE>>>(size_sub,d_p);
	gpuErrchk(cudaDeviceSynchronize());
	cudaMemcpy(pivot_h.data(), d_p, size_sub*sizeof(unsigned), cudaMemcpyDeviceToHost);

	unsigned numActiveThreadsHost = 0;
	for(int i = index_s;i <= index_e;i++){
		if(pivot_h.at(i) == MAX_NUM)
			continue;
		setUInt(d_F + pivot_h.at(i), TRUE);
		setUInt(d_X + pivot_h.at(i), TRUE);
		setUInt(activeMask + numActiveThreadsHost, pivot_h.at(i));
		numActiveThreadsHost++;
	}

	gpuErrchk(cudaMemcpyToSymbol(numActiveThreads, &numActiveThreadsHost, sizeof(unsigned)));
	// Main loop

	/*const size_t prefixSumGridSize =
		(N + BLOCK_SIZE - 1) / BLOCK_SIZE;*/

	

	while (true) {

		// Terminate <- TRUE
		unsigned terminateHost = TRUE;

		gpuErrchk(cudaMemcpyToSymbol(Mterminate, &terminateHost, sizeof(unsigned)));

		// Kernel 1: need to assign ACTIVE vertices to SIMD lanes (threads)
		//gpuErrchk(cudaMemcpyFromSymbol(&numActiveThreadsHost, numActiveThreads, sizeof(unsigned)));
		const size_t gridSizeK1 =
			(numActiveThreadsHost + BLOCK_SIZE - 1) / BLOCK_SIZE;

		// launch kernel 1
		BFSKernel1 <<<gridSizeK1, BLOCK_SIZE >>> (N,activeMask, d_V, d_E, d_F, d_X,d_Fu);
		//gpuErrchk(cudaPeekAtLastError());
		gpuErrchk(cudaDeviceSynchronize());

		// Kernel 2: need to assign ALL vertices to SIMD lanes

		// launch kernel 2
		BFSKernel2 <<<gridSizeK2, BLOCK_SIZE >>> (N, d_F, d_X, d_Fu);
		//gpuErrchk(cudaPeekAtLastError());
		gpuErrchk(cudaDeviceSynchronize());


		gpuErrchk(cudaMemcpyFromSymbol(&terminateHost, Mterminate, sizeof(unsigned)));

		if (terminateHost) {
			break;
		}
		else {
			// Get prefix sums of F
			prescanArray(prefixSums, d_F, N + 1);
			//cudaMemcpy(&numActiveThreads, prefixSums + N, sizeof(unsigned), cudaMemcpyDeviceToDevice);
			cudaMemcpy(&numActiveThreadsHost, prefixSums + N, sizeof(unsigned), cudaMemcpyDeviceToHost);
           	gpuErrchk(cudaMemcpyToSymbol(numActiveThreads, &numActiveThreadsHost, sizeof(unsigned)));

			compactSIMD <<<gridSizeK2, BLOCK_SIZE>>> (N, prefixSums, activeMask, BLOCK_SIZE);
			//gpuErrchk(cudaPeekAtLastError());
			//getActiveMaskTemp<<<1,1>>>(N,d_F,activeMask);
			gpuErrchk(cudaDeviceSynchronize());

			//gpuErrchk(cudaPeekAtLastError());
		}
	}

	// Download result

	//gpuErrchk(cudaMemcpy(distances.data(), d_C, memSize - sizeof(unsigned), cudaMemcpyDeviceToHost));
	gpuErrchk(cudaMemcpy(visited.data(), d_X, memSize - sizeof(unsigned), cudaMemcpyDeviceToHost));

	// Free memory

	gpuErrchk(cudaFree(d_F));
	gpuErrchk(cudaFree(d_X));
	gpuErrchk(cudaFree(d_Fu));
	gpuErrchk(cudaFree(d_V));
	gpuErrchk(cudaFree(d_E));
	gpuErrchk(cudaFree(d_p));
	gpuErrchk(cudaFree(activeMask));
	deallocBlockSums();
	gpuErrchk(cudaFree(prefixSums));
}

__host__
void TRIMMING(vector<unsigned> &VF, vector<unsigned> &EF, vector<unsigned> &VB, vector<unsigned> &EB)
{
	unsigned *d_VF, *d_EF, *d_VB, *d_EB;

	size_t memSize = (N + 1) * sizeof(unsigned);
	size_t memSizeE = M * sizeof(unsigned);

	gpuErrchk(cudaMalloc(&d_VF, memSize));
	gpuErrchk(cudaMemcpy(d_VF, VF.data(), memSize, cudaMemcpyHostToDevice));

	gpuErrchk(cudaMalloc(&d_EF, memSizeE));
	gpuErrchk(cudaMemcpy(d_EF, EF.data(), memSizeE, cudaMemcpyHostToDevice));

	gpuErrchk(cudaMalloc(&d_VB, memSize));
	gpuErrchk(cudaMemcpy(d_VB, VB.data(), memSize, cudaMemcpyHostToDevice));

	gpuErrchk(cudaMalloc(&d_EB, memSizeE));
	gpuErrchk(cudaMemcpy(d_EB, EB.data(), memSizeE, cudaMemcpyHostToDevice));

	const size_t gridSizeK2 =
			(N + BLOCK_SIZE - 1) / BLOCK_SIZE;

	while (true) {

	// Terminate <- TRUE
		unsigned terminateHost = TRUE;

		gpuErrchk(cudaMemcpyToSymbol(Mterminate, &terminateHost, sizeof(unsigned)));

		
	// launch kernel 2
		TRIMKernel <<<gridSizeK2, BLOCK_SIZE >>> (N, d_VF, d_EF, d_VB, d_EB);
	//gpuErrchk(cudaPeekAtLastError());
		gpuErrchk(cudaDeviceSynchronize());


		gpuErrchk(cudaMemcpyFromSymbol(&terminateHost, Mterminate, sizeof(unsigned)));

		if (terminateHost) {
			break;
		}
	}
	
	gpuErrchk(cudaFree(d_VF));
	gpuErrchk(cudaFree(d_EF));
	gpuErrchk(cudaFree(d_VB));
	gpuErrchk(cudaFree(d_EB));
}

__host__
void PIVOTS_SEL()
{
	const size_t gridSizeK2 =
			(N + BLOCK_SIZE - 1) / BLOCK_SIZE;

	PIVOTS_SEL_Kernel<<<gridSizeK2, BLOCK_SIZE>>>(N);
	//gpuErrchk(cudaGetLastError());

	gpuErrchk(cudaDeviceSynchronize());

}

__host__
void Update(vector<unsigned> &visF,vector<unsigned> &visB,unsigned &termin)
{
	unsigned *d_vf,*d_vb;

	size_t memSize = N * sizeof(unsigned);

	gpuErrchk(cudaMalloc(&d_vf, memSize));
	gpuErrchk(cudaMemcpy(d_vf, visF.data(), memSize, cudaMemcpyHostToDevice));

	gpuErrchk(cudaMalloc(&d_vb, memSize));
	gpuErrchk(cudaMemcpy(d_vb, visB.data(), memSize, cudaMemcpyHostToDevice));


	// Terminate <- TRUE
	termin = TRUE;

	gpuErrchk(cudaMemcpyToSymbol(Mterminate, &termin, sizeof(unsigned)));

	const size_t gridSizeK2 =
			(N + BLOCK_SIZE - 1) / BLOCK_SIZE;

	UpdateKernel<<<gridSizeK2, BLOCK_SIZE>>>(N,d_vf,d_vb);

	gpuErrchk(cudaDeviceSynchronize());

	gpuErrchk(cudaMemcpyFromSymbol(&termin, Mterminate, sizeof(unsigned)));

	gpuErrchk(cudaFree(d_vf));
	gpuErrchk(cudaFree(d_vb));
}

__host__
void Update1(vector<unsigned> &visF,vector<unsigned> &visB,vector<unsigned> &prefixsum, unsigned &termin)
{
	prefixsum.clear();
	prefixsum.resize(N+1);

	unsigned *d_vf,*d_vb,*d_ac;
	unsigned *prefixSums;

	size_t memSize = (N + 1) * sizeof(unsigned);

	gpuErrchk(cudaMalloc(&d_ac, memSize));
	gpuErrchk(cudaMemset(d_ac, FALSE, memSize));

	gpuErrchk(cudaMalloc(&d_vf, memSize));
	gpuErrchk(cudaMemcpy(d_vf, visF.data(), memSize - sizeof(unsigned), cudaMemcpyHostToDevice));

	gpuErrchk(cudaMalloc(&d_vb, memSize));
	gpuErrchk(cudaMemcpy(d_vb, visB.data(), memSize - sizeof(unsigned), cudaMemcpyHostToDevice));

	gpuErrchk(cudaMalloc(&prefixSums, memSize));
	preallocBlockSums(N + 1);


	// Terminate <- TRUE
	termin = TRUE;

	gpuErrchk(cudaMemcpyToSymbol(Mterminate, &termin, sizeof(unsigned)));

	const size_t gridSizeK2 =
			(N + BLOCK_SIZE - 1) / BLOCK_SIZE;

	UpdateKernel1<<<gridSizeK2, BLOCK_SIZE>>>(N,d_vf,d_vb,d_ac);

	gpuErrchk(cudaDeviceSynchronize());

	gpuErrchk(cudaMemcpyFromSymbol(&termin, Mterminate, sizeof(unsigned)));

	if(termin == FALSE){
		prescanArray(prefixSums, d_ac, N + 1);
		//gpuErrchk(cudaMemcpyToSymbol(prefixsum, &prefixSums, sizeof(unsigned *),size_t(0), cudaMemcpyHostToDevice));
		gpuErrchk(cudaMemcpy(prefixsum.data(), prefixSums, memSize, cudaMemcpyDeviceToHost));
	}

	gpuErrchk(cudaFree(d_vf));
	gpuErrchk(cudaFree(d_vb));
	gpuErrchk(cudaFree(d_ac));
	deallocBlockSums();
	gpuErrchk(cudaFree(prefixSums));
}


__host__
void preallocBlockSums(unsigned maxNumElements) {
	numEltsAllocated = maxNumElements;

	unsigned blockSize = BLOCK_SIZE;
	unsigned numElts = maxNumElements;

	int level = 0;

	do {
		unsigned numBlocks =
			max(1, (int)ceil((float)numElts / (2.f * blockSize)));
		if (numBlocks > 1) {
			level++;
		}
		numElts = numBlocks;
	} while (numElts > 1);

	scanBlockSums = (unsigned**)malloc(level * sizeof(unsigned*));
	numLevelsAllocated = level;

	numElts = maxNumElements;
	level = 0;

	do {
		unsigned numBlocks =
			max(1, (int)ceil((float)numElts / (2.f * blockSize)));
		if (numBlocks > 1) {
			gpuErrchk(cudaMalloc(&scanBlockSums[level++], numBlocks * sizeof(unsigned)));
		}
		numElts = numBlocks;
	} while (numElts > 1);
}

__host__
void deallocBlockSums() {
	for (unsigned i = 0; i < numLevelsAllocated; i++) {
		cudaFree(scanBlockSums[i]);
	}

	free(scanBlockSums);

	scanBlockSums = 0;
	numEltsAllocated = 0;
	numLevelsAllocated = 0;
}

__host__
void prescanArrayRecursive(unsigned *outArray,
const unsigned *inArray,
int numElements,
int level) {

	unsigned blockSize = BLOCK_SIZE;
	unsigned numBlocks =
		max(1, (int)ceil((float)numElements / (2.f * blockSize)));
	unsigned numThreads;

	if (numBlocks > 1)
		numThreads = blockSize;
	else if (isPowerOfTwo(numElements))
		numThreads = numElements / 2;
	else
		numThreads = floorPow2(numElements);

	unsigned numEltsPerBlock = numThreads * 2;

	unsigned numEltsLastBlock =
		numElements - (numBlocks - 1) * numEltsPerBlock;
	unsigned numThreadsLastBlock = max(1u, numEltsLastBlock / 2);
	unsigned np2LastBlock = 0;
	unsigned sharedMemLastBlock = 0;

	if (numEltsLastBlock != numEltsPerBlock) {
		np2LastBlock = 1;

		if (!isPowerOfTwo(numEltsLastBlock))
			numThreadsLastBlock = floorPow2(numEltsLastBlock);

		unsigned extraSpace = (2 * numThreadsLastBlock) / NUM_BANKS;
		sharedMemLastBlock =
			sizeof(unsigned)* (2 * numThreadsLastBlock + extraSpace);
	}

	// Avoid shared memory bank conflicts
	unsigned extraSpace = numEltsPerBlock / NUM_BANKS;
	unsigned sharedMemSize =
		sizeof(unsigned)* (numEltsPerBlock + extraSpace);

	dim3 grid(max(1u, numBlocks - np2LastBlock), 1, 1);
	dim3 threads(numThreads, 1, 1);

	// Main action

	if (numBlocks > 1) {
		prescan<true, false> <<< grid, threads, sharedMemSize >>> (
			outArray, inArray, scanBlockSums[level], numThreads * 2, 0, 0);

		if (np2LastBlock) {
			prescan<true, true> <<< 1, numThreadsLastBlock, sharedMemLastBlock >>> (
				outArray, inArray, scanBlockSums[level], numEltsLastBlock,
				numBlocks - 1, numElements - numEltsLastBlock);
		}

		prescanArrayRecursive(scanBlockSums[level], scanBlockSums[level], numBlocks, level + 1);

		uniformAdd <<< grid, threads >>> (
			outArray, scanBlockSums[level], numElements - numEltsLastBlock, 0, 0);

		if (np2LastBlock) {
			uniformAdd <<<1, numThreadsLastBlock >>> (
				outArray, scanBlockSums[level], numEltsLastBlock,
				numBlocks - 1, numElements - numEltsLastBlock);
		}
	}
	else if (isPowerOfTwo(numElements)) {
		prescan<false, false> <<<grid, threads, sharedMemSize >>> (
			outArray, inArray, 0, numThreads * 2, 0, 0);
	}
	else {
		prescan<false, true> <<<grid, threads, sharedMemSize >>> (
			outArray, inArray, 0, numElements, 0, 0);
	}
}

__host__
void prescanArray(unsigned *outArray, unsigned *inArray, int numElements) {
	prescanArrayRecursive(outArray, inArray, numElements, 0);
}

template <bool isNP2>
__device__ void loadSharedChunkFromMem(unsigned *s_data,
	const unsigned *idata,
	int n, int baseIndex,
	int& ai, int& bi,
	int& mem_ai, int& mem_bi,
	int& bankOffsetA, int& bankOffsetB) {
	int thid = threadIdx.x;
	mem_ai = baseIndex + threadIdx.x;
	mem_bi = mem_ai + blockDim.x;

	ai = thid;
	bi = thid + blockDim.x;

	bankOffsetA = CONFLICT_FREE_OFFSET(ai);
	bankOffsetB = CONFLICT_FREE_OFFSET(bi);

	s_data[ai + bankOffsetA] = idata[mem_ai];

	if (isNP2) {
		s_data[bi + bankOffsetB] = (bi < n) ? idata[mem_bi] : 0;
	}
	else {
		s_data[bi + bankOffsetB] = idata[mem_bi];
	}
}

template <bool isNP2>
__device__
void storeSharedChunkToMem(unsigned* odata,
const unsigned* s_data,
int n,
int ai, int bi,
int mem_ai, int mem_bi,
int bankOffsetA, int bankOffsetB) {
	__syncthreads();

	odata[mem_ai] = s_data[ai + bankOffsetA];
	if (isNP2) {
		if (bi < n)
			odata[mem_bi] = s_data[bi + bankOffsetB];
	}
	else {
		odata[mem_bi] = s_data[bi + bankOffsetB];
	}
}

template <bool storeSum>
__device__
void clearLastElement(unsigned* s_data,
unsigned *blockSums,
int blockIndex) {
	if (threadIdx.x == 0) {
		int index = (blockDim.x << 1) - 1;
		index += CONFLICT_FREE_OFFSET(index);

		if (storeSum) {
			blockSums[blockIndex] = s_data[index];
		}

		s_data[index] = 0;
	}
}

__device__
unsigned int buildSum(unsigned *s_data) {
	unsigned int thid = threadIdx.x;
	unsigned int stride = 1;

	for (int d = blockDim.x; d > 0; d >>= 1) {
		__syncthreads();

		if (thid < d) {
			int i = __mul24(__mul24(2, stride), thid);
			int ai = i + stride - 1;
			int bi = ai + stride;

			ai += CONFLICT_FREE_OFFSET(ai);
			bi += CONFLICT_FREE_OFFSET(bi);

			s_data[bi] += s_data[ai];
		}

		stride *= 2;
	}

	return stride;
}

__device__
void scanRootToLeaves(unsigned *s_data, unsigned int stride) {
	unsigned int thid = threadIdx.x;

	for (int d = 1; d <= blockDim.x; d *= 2) {
		stride >>= 1;

		__syncthreads();

		if (thid < d)
		{
			int i = __mul24(__mul24(2, stride), thid);
			int ai = i + stride - 1;
			int bi = ai + stride;

			ai += CONFLICT_FREE_OFFSET(ai);
			bi += CONFLICT_FREE_OFFSET(bi);

			unsigned t = s_data[ai];
			s_data[ai] = s_data[bi];
			s_data[bi] += t;
		}
	}
}

template <bool storeSum>
__device__
void prescanBlock(unsigned *data, int blockIndex, unsigned *blockSums) {
	int stride = buildSum(data);
	clearLastElement<storeSum>(data, blockSums,
		(blockIndex == 0) ? blockIdx.x : blockIndex);
	scanRootToLeaves(data, stride);
}

template <bool storeSum, bool isNP2>
__global__
void prescan(unsigned *odata,
const unsigned *idata,
unsigned *blockSums,
int n,
int blockIndex,
int baseIndex) {
	int ai, bi, mem_ai, mem_bi, bankOffsetA, bankOffsetB;
	extern __shared__ unsigned s_data[];

	loadSharedChunkFromMem<isNP2>(s_data, idata, n,
		(baseIndex == 0) ?
		__mul24(blockIdx.x, (blockDim.x << 1)) : baseIndex,
		ai, bi, mem_ai, mem_bi,
		bankOffsetA, bankOffsetB);

	prescanBlock<storeSum>(s_data, blockIndex, blockSums);

	storeSharedChunkToMem<isNP2>(odata, s_data, n,
		ai, bi, mem_ai, mem_bi,
		bankOffsetA, bankOffsetB);
}

__global__
void uniformAdd(unsigned *data,
unsigned *uniforms,
int n,
int blockOffset,
int baseIndex) {
	__shared__ unsigned uni;
	if (threadIdx.x == 0)
		uni = uniforms[blockIdx.x + blockOffset];

	unsigned int address = __mul24(blockIdx.x, (blockDim.x << 1)) + baseIndex + threadIdx.x;

	__syncthreads();

	data[address] += uni;
	data[address + blockDim.x] += (threadIdx.x + blockDim.x < n) * uni;
}

	.file	"tmpxft_003a6239_00000000-6_scc2.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4935:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4935:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZSt14__relocate_a_1IjjENSt9enable_ifIXsrSt24__is_bitwise_relocatableIT_vE5valueEPS2_E4typeES4_S4_S4_RSaIT0_E.isra.0, @function
_ZSt14__relocate_a_1IjjENSt9enable_ifIXsrSt24__is_bitwise_relocatableIT_vE5valueEPS2_E4typeES4_S4_S4_RSaIT0_E.isra.0:
.LFB5943:
	.cfi_startproc
	subq	%rdi, %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdx, %rcx
	movq	%rsi, %rbx
	testq	%rsi, %rsi
	jle	.L3
	movq	%rsi, %rdx
	movq	%rdi, %rsi
	movq	%rcx, %rdi
	call	memmove@PLT
	movq	%rax, %rcx
.L3:
	leaq	(%rcx,%rbx), %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5943:
	.size	_ZSt14__relocate_a_1IjjENSt9enable_ifIXsrSt24__is_bitwise_relocatableIT_vE5valueEPS2_E4typeES4_S4_S4_RSaIT0_E.isra.0, .-_ZSt14__relocate_a_1IjjENSt9enable_ifIXsrSt24__is_bitwise_relocatableIT_vE5valueEPS2_E4typeES4_S4_S4_RSaIT0_E.isra.0
	.align 2
	.type	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE8_M_eraseEPSt13_Rb_tree_nodeIS2_E.isra.0, @function
_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE8_M_eraseEPSt13_Rb_tree_nodeIS2_E.isra.0:
.LFB5944:
	.cfi_startproc
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 32
.L7:
	testq	%rbx, %rbx
	je	.L10
	movq	24(%rbx), %rdi
	call	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE8_M_eraseEPSt13_Rb_tree_nodeIS2_E.isra.0
	movq	16(%rbx), %rbp
	movq	%rbx, %rdi
	movl	$40, %esi
	call	_ZdlPvm@PLT
	movq	%rbp, %rbx
	jmp	.L7
.L10:
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5944:
	.size	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE8_M_eraseEPSt13_Rb_tree_nodeIS2_E.isra.0, .-_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE8_M_eraseEPSt13_Rb_tree_nodeIS2_E.isra.0
	.align 2
	.type	_ZNSt12_Vector_baseIjSaIjEE11_M_allocateEm.isra.0, @function
_ZNSt12_Vector_baseIjSaIjEE11_M_allocateEm.isra.0:
.LFB5947:
	.cfi_startproc
	testq	%rdi, %rdi
	je	.L12
	movabsq	$2305843009213693951, %rax
	cmpq	%rdi, %rax
	jnb	.L13
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$4611686018427387903, %rax
	cmpq	%rdi, %rax
	jnb	.L14
	call	_ZSt28__throw_bad_array_new_lengthv@PLT
.L14:
	call	_ZSt17__throw_bad_allocv@PLT
.L13:
	.cfi_def_cfa_offset 8
	salq	$2, %rdi
	jmp	_Znwm@PLT
.L12:
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE5947:
	.size	_ZNSt12_Vector_baseIjSaIjEE11_M_allocateEm.isra.0, .-_ZNSt12_Vector_baseIjSaIjEE11_M_allocateEm.isra.0
	.align 2
	.type	_ZNSt12_Vector_baseIjSaIjEE13_M_deallocateEPjm.isra.0, @function
_ZNSt12_Vector_baseIjSaIjEE13_M_deallocateEPjm.isra.0:
.LFB5950:
	.cfi_startproc
	testq	%rdi, %rdi
	je	.L18
	salq	$2, %rsi
	jmp	_ZdlPvm@PLT
.L18:
	ret
	.cfi_endproc
.LFE5950:
	.size	_ZNSt12_Vector_baseIjSaIjEE13_M_deallocateEPjm.isra.0, .-_ZNSt12_Vector_baseIjSaIjEE13_M_deallocateEPjm.isra.0
	.type	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, @function
_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0:
.LFB5952:
	.cfi_startproc
	jmp	cudaLaunchKernel@PLT
	.cfi_endproc
.LFE5952:
	.size	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, .-_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	.type	_ZL46__device_stub__Z7prescanILb0ELb1EEvPjPKjS0_iiiPjPKjS_iii, @function
_ZL46__device_stub__Z7prescanILb0ELb1EEvPjPKjS0_iiiPjPKjS_iii:
.LFB4983:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7prescanILb0ELb1EEvPjPKjS0_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L21:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4983:
	.size	_ZL46__device_stub__Z7prescanILb0ELb1EEvPjPKjS0_iiiPjPKjS_iii, .-_ZL46__device_stub__Z7prescanILb0ELb1EEvPjPKjS0_iiiPjPKjS_iii
	.type	_ZL46__device_stub__Z7prescanILb0ELb0EEvPjPKjS0_iiiPjPKjS_iii, @function
_ZL46__device_stub__Z7prescanILb0ELb0EEvPjPKjS0_iiiPjPKjS_iii:
.LFB4981:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7prescanILb0ELb0EEvPjPKjS0_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L25:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4981:
	.size	_ZL46__device_stub__Z7prescanILb0ELb0EEvPjPKjS0_iiiPjPKjS_iii, .-_ZL46__device_stub__Z7prescanILb0ELb0EEvPjPKjS0_iiiPjPKjS_iii
	.type	_ZL46__device_stub__Z7prescanILb1ELb1EEvPjPKjS0_iiiPjPKjS_iii, @function
_ZL46__device_stub__Z7prescanILb1ELb1EEvPjPKjS0_iiiPjPKjS_iii:
.LFB4979:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7prescanILb1ELb1EEvPjPKjS0_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L29:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4979:
	.size	_ZL46__device_stub__Z7prescanILb1ELb1EEvPjPKjS0_iiiPjPKjS_iii, .-_ZL46__device_stub__Z7prescanILb1ELb1EEvPjPKjS0_iiiPjPKjS_iii
	.type	_ZL46__device_stub__Z7prescanILb1ELb0EEvPjPKjS0_iiiPjPKjS_iii, @function
_ZL46__device_stub__Z7prescanILb1ELb0EEvPjPKjS0_iiiPjPKjS_iii:
.LFB4977:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7prescanILb1ELb0EEvPjPKjS0_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L33:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4977:
	.size	_ZL46__device_stub__Z7prescanILb1ELb0EEvPjPKjS0_iiiPjPKjS_iii, .-_ZL46__device_stub__Z7prescanILb1ELb0EEvPjPKjS0_iiiPjPKjS_iii
	.align 2
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0, @function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0:
.LFB5953:
	.cfi_startproc
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	movq	%rsi, %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rsi, %rbx
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv@PLT
	testb	%al, %al
	je	.L38
	cmpq	%rbp, %rbx
	je	.L39
	movq	8(%rbx), %rdx
	testq	%rdx, %rdx
	je	.L40
	movq	(%rbx), %rsi
	movq	0(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7_S_copyEPcPKcm@PLT
.L40:
	movq	8(%rbx), %rax
	movq	0(%rbp), %rdx
	movq	%rax, 8(%rbp)
	movb	$0, (%rdx,%rax)
	jmp	.L39
.L38:
	movq	%rbp, %rdi
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv@PLT
	movl	%eax, %edx
	xorl	%eax, %eax
	testb	%dl, %dl
	jne	.L41
	movq	0(%rbp), %rax
	movq	16(%rbp), %r12
.L41:
	movq	(%rbx), %rdx
	movq	%rdx, 0(%rbp)
	movq	8(%rbx), %rdx
	movq	%rdx, 8(%rbp)
	movq	16(%rbx), %rdx
	movq	%rdx, 16(%rbp)
	testq	%rax, %rax
	je	.L42
	movq	%rax, (%rbx)
	movq	%r12, 16(%rbx)
	jmp	.L39
.L42:
	leaq	16(%rbx), %rax
	movq	%rax, (%rbx)
.L39:
	xorl	%eax, %eax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rax
	movb	$0, (%rax)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5953:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Error: %s\nFile %s, line %d\n"
	.text
	.type	_Z9gpuAssert9cudaErrorPKcib.isra.0, @function
_Z9gpuAssert9cudaErrorPKcib.isra.0:
.LFB5954:
	.cfi_startproc
	testl	%edi, %edi
	je	.L48
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%edi, %ebx
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movl	12(%rsp), %r9d
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	%ebx, %edi
	call	exit@PLT
.L48:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	ret
	.cfi_endproc
.LFE5954:
	.size	_Z9gpuAssert9cudaErrorPKcib.isra.0, .-_Z9gpuAssert9cudaErrorPKcib.isra.0
	.section	.text._Z7prescanILb1ELb0EEvPjPKjS0_iii,"axG",@progbits,_Z7prescanILb1ELb0EEvPjPKjS0_iii,comdat
	.weak	_Z7prescanILb1ELb0EEvPjPKjS0_iii
	.type	_Z7prescanILb1ELb0EEvPjPKjS0_iii, @function
_Z7prescanILb1ELb0EEvPjPKjS0_iii:
.LFB5393:
	.cfi_startproc
	endbr64
	jmp	_ZL46__device_stub__Z7prescanILb1ELb0EEvPjPKjS0_iiiPjPKjS_iii
	.cfi_endproc
.LFE5393:
	.size	_Z7prescanILb1ELb0EEvPjPKjS0_iii, .-_Z7prescanILb1ELb0EEvPjPKjS0_iii
	.section	.text._Z7prescanILb1ELb1EEvPjPKjS0_iii,"axG",@progbits,_Z7prescanILb1ELb1EEvPjPKjS0_iii,comdat
	.weak	_Z7prescanILb1ELb1EEvPjPKjS0_iii
	.type	_Z7prescanILb1ELb1EEvPjPKjS0_iii, @function
_Z7prescanILb1ELb1EEvPjPKjS0_iii:
.LFB5394:
	.cfi_startproc
	endbr64
	jmp	_ZL46__device_stub__Z7prescanILb1ELb1EEvPjPKjS0_iiiPjPKjS_iii
	.cfi_endproc
.LFE5394:
	.size	_Z7prescanILb1ELb1EEvPjPKjS0_iii, .-_Z7prescanILb1ELb1EEvPjPKjS0_iii
	.section	.text._Z7prescanILb0ELb0EEvPjPKjS0_iii,"axG",@progbits,_Z7prescanILb0ELb0EEvPjPKjS0_iii,comdat
	.weak	_Z7prescanILb0ELb0EEvPjPKjS0_iii
	.type	_Z7prescanILb0ELb0EEvPjPKjS0_iii, @function
_Z7prescanILb0ELb0EEvPjPKjS0_iii:
.LFB5395:
	.cfi_startproc
	endbr64
	jmp	_ZL46__device_stub__Z7prescanILb0ELb0EEvPjPKjS0_iiiPjPKjS_iii
	.cfi_endproc
.LFE5395:
	.size	_Z7prescanILb0ELb0EEvPjPKjS0_iii, .-_Z7prescanILb0ELb0EEvPjPKjS0_iii
	.section	.text._Z7prescanILb0ELb1EEvPjPKjS0_iii,"axG",@progbits,_Z7prescanILb0ELb1EEvPjPKjS0_iii,comdat
	.weak	_Z7prescanILb0ELb1EEvPjPKjS0_iii
	.type	_Z7prescanILb0ELb1EEvPjPKjS0_iii, @function
_Z7prescanILb0ELb1EEvPjPKjS0_iii:
.LFB5396:
	.cfi_startproc
	endbr64
	jmp	_ZL46__device_stub__Z7prescanILb0ELb1EEvPjPKjS0_iiiPjPKjS_iii
	.cfi_endproc
.LFE5396:
	.size	_Z7prescanILb0ELb1EEvPjPKjS0_iii, .-_Z7prescanILb0ELb1EEvPjPKjS0_iii
	.section	.text._Z9floorPow2i,"axG",@progbits,_Z9floorPow2i,comdat
	.weak	_Z9floorPow2i
	.type	_Z9floorPow2i, @function
_Z9floorPow2i:
.LFB4864:
	.cfi_startproc
	endbr64
	movl	%edi, %eax
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%fs:40, %rdx
	movq	%rdx, 8(%rsp)
	xorl	%edx, %edx
	cvtsi2ssl	%eax, %xmm0
	leaq	4(%rsp), %rdi
	call	frexpf@PLT
	movl	4(%rsp), %eax
	leal	-1(%rax), %ecx
	movl	$1, %eax
	sall	%cl, %eax
	movq	8(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L58
	call	__stack_chk_fail@PLT
.L58:
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4864:
	.size	_Z9floorPow2i, .-_Z9floorPow2i
	.section	.rodata.str1.1
.LC1:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/HinPeng/SCC_on_GPU/master/scc2.cu"
	.text
	.globl	_Z7setUIntPjj
	.type	_Z7setUIntPjj, @function
_Z7setUIntPjj:
.LFB4879:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, %ecx
	movl	$4, %edx
	movl	%esi, 12(%rsp)
	leaq	12(%rsp), %rsi
	call	cudaMemcpy@PLT
	movl	$232, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4879:
	.size	_Z7setUIntPjj, .-_Z7setUIntPjj
	.globl	_Z17preallocBlockSumsj
	.type	_Z17preallocBlockSumsj, @function
_Z17preallocBlockSumsj:
.LFB4921:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	%edi, %eax
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%edi, %ebx
	movl	%edi, numEltsAllocated(%rip)
.L67:
	movl	%eax, %eax
	cvtsi2ssq	%rax, %xmm0
	mulss	.LC2(%rip), %xmm0
	call	ceilf@PLT
	cvttss2sil	%xmm0, %eax
	cmpl	$1, %eax
	jg	.L65
	movslq	%ebp, %rdi
	leaq	.LC1(%rip), %r12
	salq	$3, %rdi
	call	malloc@PLT
	movl	%ebp, numLevelsAllocated(%rip)
	xorl	%ebp, %ebp
	movq	%rax, scanBlockSums(%rip)
	jmp	.L66
.L65:
	incl	%ebp
	jmp	.L67
.L66:
	movl	%ebx, %ebx
	cvtsi2ssq	%rbx, %xmm0
	mulss	.LC2(%rip), %xmm0
	call	ceilf@PLT
	cvttss2sil	%xmm0, %ebx
	cmpl	$1, %ebx
	jle	.L71
	movq	scanBlockSums(%rip), %rdi
	movslq	%ebx, %rsi
	salq	$2, %rsi
	addq	%rbp, %rdi
	addq	$8, %rbp
	call	cudaMalloc@PLT
	movl	$824, %edx
	movq	%r12, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	jmp	.L66
.L71:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4921:
	.size	_Z17preallocBlockSumsj, .-_Z17preallocBlockSumsj
	.globl	_Z16deallocBlockSumsv
	.type	_Z16deallocBlockSumsv, @function
_Z16deallocBlockSumsv:
.LFB4922:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	xorl	%ebx, %ebx
.L74:
	cmpl	numLevelsAllocated(%rip), %ebx
	movq	scanBlockSums(%rip), %rdi
	jnb	.L77
	movl	%ebx, %eax
	incl	%ebx
	movq	(%rdi,%rax,8), %rdi
	call	cudaFree@PLT
	jmp	.L74
.L77:
	call	free@PLT
	xorl	%edx, %edx
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	movq	%rax, scanBlockSums(%rip)
	movl	%edx, numEltsAllocated(%rip)
	movl	%edx, numLevelsAllocated(%rip)
	ret
	.cfi_endproc
.LFE4922:
	.size	_Z16deallocBlockSumsv, .-_Z16deallocBlockSumsv
	.globl	_Z8buildSumPj
	.type	_Z8buildSumPj, @function
_Z8buildSumPj:
.LFB4928:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4928:
	.size	_Z8buildSumPj, .-_Z8buildSumPj
	.globl	_Z16scanRootToLeavesPjj
	.type	_Z16scanRootToLeavesPjj, @function
_Z16scanRootToLeavesPjj:
.LFB4929:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4929:
	.size	_Z16scanRootToLeavesPjj, .-_Z16scanRootToLeavesPjj
	.globl	_Z41__device_stub__Z10BFSKernel1mPjS_S_S_S_S_mPjS_S_S_S_S_
	.type	_Z41__device_stub__Z10BFSKernel1mPjS_S_S_S_S_mPjS_S_S_S_S_, @function
_Z41__device_stub__Z10BFSKernel1mPjS_S_S_S_S_mPjS_S_S_S_S_:
.LFB4957:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 112(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L82
	pushq	80(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z10BFSKernel1mPjS_S_S_S_S_(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 208
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	128(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L82:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L84
	call	__stack_chk_fail@PLT
.L84:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4957:
	.size	_Z41__device_stub__Z10BFSKernel1mPjS_S_S_S_S_mPjS_S_S_S_S_, .-_Z41__device_stub__Z10BFSKernel1mPjS_S_S_S_S_mPjS_S_S_S_S_
	.globl	_Z10BFSKernel1mPjS_S_S_S_S_
	.type	_Z10BFSKernel1mPjS_S_S_S_S_, @function
_Z10BFSKernel1mPjS_S_S_S_S_:
.LFB4958:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z10BFSKernel1mPjS_S_S_S_S_mPjS_S_S_S_S_
	.cfi_endproc
.LFE4958:
	.size	_Z10BFSKernel1mPjS_S_S_S_S_, .-_Z10BFSKernel1mPjS_S_S_S_S_
	.globl	_Z35__device_stub__Z10BFSKernel2mPjS_S_mPjS_S_
	.type	_Z35__device_stub__Z10BFSKernel2mPjS_S_mPjS_S_, @function
_Z35__device_stub__Z10BFSKernel2mPjS_S_mPjS_S_:
.LFB4959:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L87
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10BFSKernel2mPjS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L87:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L89
	call	__stack_chk_fail@PLT
.L89:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4959:
	.size	_Z35__device_stub__Z10BFSKernel2mPjS_S_mPjS_S_, .-_Z35__device_stub__Z10BFSKernel2mPjS_S_mPjS_S_
	.globl	_Z10BFSKernel2mPjS_S_
	.type	_Z10BFSKernel2mPjS_S_, @function
_Z10BFSKernel2mPjS_S_:
.LFB4960:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10BFSKernel2mPjS_S_mPjS_S_
	.cfi_endproc
.LFE4960:
	.size	_Z10BFSKernel2mPjS_S_, .-_Z10BFSKernel2mPjS_S_
	.globl	_Z37__device_stub__Z10TRIMKernelmPjS_S_S_mPjS_S_S_
	.type	_Z37__device_stub__Z10TRIMKernelmPjS_S_S_mPjS_S_S_, @function
_Z37__device_stub__Z10TRIMKernelmPjS_S_S_mPjS_S_S_:
.LFB4961:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L92
	pushq	64(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10TRIMKernelmPjS_S_S_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 176
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L92:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L94
	call	__stack_chk_fail@PLT
.L94:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4961:
	.size	_Z37__device_stub__Z10TRIMKernelmPjS_S_S_mPjS_S_S_, .-_Z37__device_stub__Z10TRIMKernelmPjS_S_S_mPjS_S_S_
	.globl	_Z10TRIMKernelmPjS_S_S_
	.type	_Z10TRIMKernelmPjS_S_S_, @function
_Z10TRIMKernelmPjS_S_S_:
.LFB4962:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z10TRIMKernelmPjS_S_S_mPjS_S_S_
	.cfi_endproc
.LFE4962:
	.size	_Z10TRIMKernelmPjS_S_S_, .-_Z10TRIMKernelmPjS_S_S_
	.globl	_Z8TRIMMINGRSt6vectorIjSaIjEES2_S2_S2_
	.type	_Z8TRIMMINGRSt6vectorIjSaIjEES2_S2_S2_, @function
_Z8TRIMMINGRSt6vectorIjSaIjEES2_S2_S2_:
.LFB4917:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rsi, %r13
	movl	$9577544, %esi
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	leaq	.LC1(%rip), %rbx
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$657, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	(%r14), %rsi
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movl	$9577544, %edx
	call	cudaMemcpy@PLT
	movl	$658, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	leaq	24(%rsp), %rdi
	movl	$20085640, %esi
	call	cudaMalloc@PLT
	movl	$660, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	0(%r13), %rsi
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$20085640, %edx
	call	cudaMemcpy@PLT
	movl	$661, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	leaq	32(%rsp), %rdi
	movl	$9577544, %esi
	call	cudaMalloc@PLT
	movl	$663, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	(%r12), %rsi
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$9577544, %edx
	call	cudaMemcpy@PLT
	movl	$664, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	leaq	40(%rsp), %rdi
	movl	$20085640, %esi
	call	cudaMalloc@PLT
	movl	$666, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	0(%rbp), %rsi
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movl	$20085640, %edx
	leaq	_ZL10Mterminate(%rip), %rbp
	call	cudaMemcpy@PLT
	movl	$667, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
.L100:
	leaq	12(%rsp), %r12
	xorl	%ecx, %ecx
	movl	$1, %r8d
	movq	%rbp, %rdi
	movl	$4, %edx
	movq	%r12, %rsi
	movl	$1, 12(%rsp)
	call	cudaMemcpyToSymbol@PLT
	movl	$677, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$2147488325, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	addq	%rdi, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L98
	movq	40(%rsp), %r8
	movq	32(%rsp), %rcx
	movl	$2394385, %edi
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	call	_Z37__device_stub__Z10TRIMKernelmPjS_S_S_mPjS_S_S_
.L98:
	call	cudaDeviceSynchronize@PLT
	movl	$683, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	xorl	%ecx, %ecx
	movl	$2, %r8d
	movq	%rbp, %rsi
	movl	$4, %edx
	movq	%r12, %rdi
	call	cudaMemcpyFromSymbol@PLT
	movl	$686, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	cmpl	$0, 12(%rsp)
	je	.L100
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movl	$693, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movl	$694, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movl	$695, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movl	$696, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L101
	call	__stack_chk_fail@PLT
.L101:
	addq	$80, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4917:
	.size	_Z8TRIMMINGRSt6vectorIjSaIjEES2_S2_S2_, .-_Z8TRIMMINGRSt6vectorIjSaIjEES2_S2_S2_
	.globl	_Z36__device_stub__Z17PIVOTS_SEL_Kernelmm
	.type	_Z36__device_stub__Z17PIVOTS_SEL_Kernelmm, @function
_Z36__device_stub__Z17PIVOTS_SEL_Kernelmm:
.LFB4963:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	leaq	52(%rsp), %rsi
	leaq	40(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L103
	pushq	32(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z17PIVOTS_SEL_Kernelm(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 112
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	80(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L103:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L105
	call	__stack_chk_fail@PLT
.L105:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4963:
	.size	_Z36__device_stub__Z17PIVOTS_SEL_Kernelmm, .-_Z36__device_stub__Z17PIVOTS_SEL_Kernelmm
	.globl	_Z17PIVOTS_SEL_Kernelm
	.type	_Z17PIVOTS_SEL_Kernelm, @function
_Z17PIVOTS_SEL_Kernelm:
.LFB4964:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z17PIVOTS_SEL_Kernelmm
	.cfi_endproc
.LFE4964:
	.size	_Z17PIVOTS_SEL_Kernelm, .-_Z17PIVOTS_SEL_Kernelm
	.globl	_Z10PIVOTS_SELv
	.type	_Z10PIVOTS_SELv, @function
_Z10PIVOTS_SELv:
.LFB4918:
	.cfi_startproc
	endbr64
	movl	$16777217, %edx
	movl	$2147488325, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	salq	$8, %rdx
	addq	%rdi, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L109
	movl	$2394385, %edi
	call	_Z36__device_stub__Z17PIVOTS_SEL_Kernelmm
.L109:
	call	cudaDeviceSynchronize@PLT
	movl	$708, %edx
	leaq	.LC1(%rip), %rsi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	movl	%eax, %edi
	jmp	_Z9gpuAssert9cudaErrorPKcib.isra.0
	.cfi_endproc
.LFE4918:
	.size	_Z10PIVOTS_SELv, .-_Z10PIVOTS_SELv
	.globl	_Z35__device_stub__Z12UpdateKernelmPjS_mPjS_
	.type	_Z35__device_stub__Z12UpdateKernelmPjS_mPjS_, @function
_Z35__device_stub__Z12UpdateKernelmPjS_mPjS_:
.LFB4965:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L111
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12UpdateKernelmPjS_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L111:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L113
	call	__stack_chk_fail@PLT
.L113:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4965:
	.size	_Z35__device_stub__Z12UpdateKernelmPjS_mPjS_, .-_Z35__device_stub__Z12UpdateKernelmPjS_mPjS_
	.globl	_Z12UpdateKernelmPjS_
	.type	_Z12UpdateKernelmPjS_, @function
_Z12UpdateKernelmPjS_:
.LFB4966:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z12UpdateKernelmPjS_mPjS_
	.cfi_endproc
.LFE4966:
	.size	_Z12UpdateKernelmPjS_, .-_Z12UpdateKernelmPjS_
	.globl	_Z6UpdateRSt6vectorIjSaIjEES2_Rj
	.type	_Z6UpdateRSt6vectorIjSaIjEES2_Rj, @function
_Z6UpdateRSt6vectorIjSaIjEES2_Rj:
.LFB4919:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	movl	$9577540, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	leaq	.LC1(%rip), %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	movl	$719, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	0(%r13), %rsi
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movl	$9577540, %edx
	call	cudaMemcpy@PLT
	movl	$720, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	leaq	8(%rsp), %rdi
	movl	$9577540, %esi
	call	cudaMalloc@PLT
	movl	$722, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	(%r12), %rsi
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$9577540, %edx
	leaq	_ZL10Mterminate(%rip), %r12
	call	cudaMemcpy@PLT
	movl	$723, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	xorl	%ecx, %ecx
	movl	$1, %r8d
	movq	%rbp, %rsi
	movl	$1, 0(%rbp)
	movl	$4, %edx
	movq	%r12, %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	$729, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$2147488325, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	addq	%rdi, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L117
	movq	8(%rsp), %rdx
	movq	(%rsp), %rsi
	movl	$2394385, %edi
	call	_Z35__device_stub__Z12UpdateKernelmPjS_mPjS_
.L117:
	call	cudaDeviceSynchronize@PLT
	movl	$736, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	xorl	%ecx, %ecx
	movl	$2, %r8d
	movq	%r12, %rsi
	movl	$4, %edx
	movq	%rbp, %rdi
	call	cudaMemcpyFromSymbol@PLT
	movl	$738, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movl	$740, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movl	$741, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L118
	call	__stack_chk_fail@PLT
.L118:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4919:
	.size	_Z6UpdateRSt6vectorIjSaIjEES2_Rj, .-_Z6UpdateRSt6vectorIjSaIjEES2_Rj
	.globl	_Z38__device_stub__Z13UpdateKernel1mPjS_S_mPjS_S_
	.type	_Z38__device_stub__Z13UpdateKernel1mPjS_S_mPjS_S_, @function
_Z38__device_stub__Z13UpdateKernel1mPjS_S_mPjS_S_:
.LFB4967:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L120
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z13UpdateKernel1mPjS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L120:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L122
	call	__stack_chk_fail@PLT
.L122:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4967:
	.size	_Z38__device_stub__Z13UpdateKernel1mPjS_S_mPjS_S_, .-_Z38__device_stub__Z13UpdateKernel1mPjS_S_mPjS_S_
	.globl	_Z13UpdateKernel1mPjS_S_
	.type	_Z13UpdateKernel1mPjS_S_, @function
_Z13UpdateKernel1mPjS_S_:
.LFB4968:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z13UpdateKernel1mPjS_S_mPjS_S_
	.cfi_endproc
.LFE4968:
	.size	_Z13UpdateKernel1mPjS_S_, .-_Z13UpdateKernel1mPjS_S_
	.globl	_Z35__device_stub__Z14RenumberKernelmPjmPj
	.type	_Z35__device_stub__Z14RenumberKernelmPjmPj, @function
_Z35__device_stub__Z14RenumberKernelmPjmPj:
.LFB4969:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	32(%rsp), %rdi
	leaq	44(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 56(%rsp)
	movq	%rsp, %rax
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L125
	pushq	24(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z14RenumberKernelmPj(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 112
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L125:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L127
	call	__stack_chk_fail@PLT
.L127:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4969:
	.size	_Z35__device_stub__Z14RenumberKernelmPjmPj, .-_Z35__device_stub__Z14RenumberKernelmPjmPj
	.globl	_Z14RenumberKernelmPj
	.type	_Z14RenumberKernelmPj, @function
_Z14RenumberKernelmPj:
.LFB4970:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z14RenumberKernelmPjmPj
	.cfi_endproc
.LFE4970:
	.size	_Z14RenumberKernelmPj, .-_Z14RenumberKernelmPj
	.globl	_Z27__device_stub__Z9initpivotmm
	.type	_Z27__device_stub__Z9initpivotmm, @function
_Z27__device_stub__Z9initpivotmm:
.LFB4971:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	leaq	52(%rsp), %rsi
	leaq	40(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L130
	pushq	32(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z9initpivotm(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 112
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	80(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L130:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L132
	call	__stack_chk_fail@PLT
.L132:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4971:
	.size	_Z27__device_stub__Z9initpivotmm, .-_Z27__device_stub__Z9initpivotmm
	.globl	_Z9initpivotm
	.type	_Z9initpivotm, @function
_Z9initpivotm:
.LFB4972:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z9initpivotmm
	.cfi_endproc
.LFE4972:
	.size	_Z9initpivotm, .-_Z9initpivotm
	.globl	_Z29__device_stub__Z9ReadPivotmPjmPj
	.type	_Z29__device_stub__Z9ReadPivotmPjmPj, @function
_Z29__device_stub__Z9ReadPivotmPjmPj:
.LFB4973:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	32(%rsp), %rdi
	leaq	44(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 56(%rsp)
	movq	%rsp, %rax
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L135
	pushq	24(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z9ReadPivotmPj(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 112
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L135:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L137
	call	__stack_chk_fail@PLT
.L137:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4973:
	.size	_Z29__device_stub__Z9ReadPivotmPjmPj, .-_Z29__device_stub__Z9ReadPivotmPjmPj
	.globl	_Z9ReadPivotmPj
	.type	_Z9ReadPivotmPj, @function
_Z9ReadPivotmPj:
.LFB4974:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z9ReadPivotmPjmPj
	.cfi_endproc
.LFE4974:
	.size	_Z9ReadPivotmPj, .-_Z9ReadPivotmPj
	.globl	_Z35__device_stub__Z11compactSIMDmPjS_mmPjS_m
	.type	_Z35__device_stub__Z11compactSIMDmPjS_mmPjS_m, @function
_Z35__device_stub__Z11compactSIMDmPjS_mmPjS_m:
.LFB4975:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L140
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11compactSIMDmPjS_m(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L140:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L142
	call	__stack_chk_fail@PLT
.L142:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4975:
	.size	_Z35__device_stub__Z11compactSIMDmPjS_mmPjS_m, .-_Z35__device_stub__Z11compactSIMDmPjS_mmPjS_m
	.globl	_Z11compactSIMDmPjS_m
	.type	_Z11compactSIMDmPjS_m, @function
_Z11compactSIMDmPjS_m:
.LFB4976:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z11compactSIMDmPjS_mmPjS_m
	.cfi_endproc
.LFE4976:
	.size	_Z11compactSIMDmPjS_m, .-_Z11compactSIMDmPjS_m
	.globl	_Z35__device_stub__Z10uniformAddPjS_iiiPjS_iii
	.type	_Z35__device_stub__Z10uniformAddPjS_iiiPjS_iii, @function
_Z35__device_stub__Z10uniformAddPjS_iiiPjS_iii:
.LFB4985:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L145
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10uniformAddPjS_iii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L145:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L147
	call	__stack_chk_fail@PLT
.L147:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4985:
	.size	_Z35__device_stub__Z10uniformAddPjS_iiiPjS_iii, .-_Z35__device_stub__Z10uniformAddPjS_iiiPjS_iii
	.globl	_Z10uniformAddPjS_iii
	.type	_Z10uniformAddPjS_iii, @function
_Z10uniformAddPjS_iii:
.LFB4986:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10uniformAddPjS_iiiPjS_iii
	.cfi_endproc
.LFE4986:
	.size	_Z10uniformAddPjS_iii, .-_Z10uniformAddPjS_iii
	.globl	_Z21prescanArrayRecursivePjPKjii
	.type	_Z21prescanArrayRecursivePjPKjii, @function
_Z21prescanArrayRecursivePjPKjii:
.LFB4923:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	cvtsi2ssl	%edx, %xmm0
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	mulss	.LC2(%rip), %xmm0
	movl	%ecx, 44(%rsp)
	movq	%rdi, 8(%rsp)
	movq	%rsi, 24(%rsp)
	call	ceilf@PLT
	movl	$1, %eax
	movl	$256, %ecx
	cvttss2sil	%xmm0, %r15d
	testl	%r15d, %r15d
	cmovg	%r15d, %eax
	movl	%eax, 36(%rsp)
	cmpl	$1, %r15d
	jg	.L151
	leal	-1(%rbx), %eax
	testl	%ebx, %eax
	jne	.L152
	movl	%ebx, %eax
	movl	$2, %ecx
	cltd
	idivl	%ecx
	jmp	.L174
.L152:
	movl	%ebx, %edi
	call	_Z9floorPow2i
.L174:
	movl	%eax, %ecx
.L151:
	movl	36(%rsp), %eax
	leal	(%rcx,%rcx), %r12d
	movl	%ebx, %r13d
	decl	%eax
	movl	%eax, 32(%rsp)
	imull	%r12d, %eax
	subl	%eax, %r13d
	movl	%eax, 20(%rsp)
	movl	$1, %eax
	movl	%r13d, %ebp
	shrl	%ebp
	cmove	%eax, %ebp
	cmpl	%r13d, %r12d
	je	.L166
	leal	-1(%r13), %eax
	testl	%r13d, %eax
	je	.L154
	movl	%r13d, %edi
	movl	%ecx, 40(%rsp)
	call	_Z9floorPow2i
	movl	40(%rsp), %ecx
	movl	%eax, %ebp
.L154:
	leal	(%rbp,%rbp), %edx
	movl	$1, %r14d
	movl	%edx, %eax
	shrl	$4, %eax
	addl	%edx, %eax
	sall	$2, %eax
	movl	%eax, 40(%rsp)
	jmp	.L153
.L166:
	xorl	%eax, %eax
	xorl	%r14d, %r14d
	movl	%eax, 40(%rsp)
.L153:
	movl	36(%rsp), %eax
	movl	$1, %edx
	movl	%ecx, 60(%rsp)
	subl	%r14d, %eax
	cmove	%edx, %eax
	movl	%eax, 48(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 52(%rsp)
	movq	48(%rsp), %rdi
	movq	%rax, 64(%rsp)
	movl	%r12d, %eax
	movq	60(%rsp), %rdx
	shrl	$4, %eax
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	addl	%r12d, %eax
	decl	%r15d
	leal	0(,%rax,4), %r8d
	jle	.L155
	xorl	%r9d, %r9d
	call	__cudaPushCallConfiguration@PLT
	movslq	44(%rsp), %rbx
	testl	%eax, %eax
	jne	.L156
	movq	scanBlockSums(%rip), %rax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r12d, %ecx
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdi
	movq	(%rax,%rbx,8), %rdx
	call	_ZL46__device_stub__Z7prescanILb1ELb0EEvPjPKjS0_iiiPjPKjS_iii
.L156:
	testl	%r14d, %r14d
	je	.L157
	movl	%ebp, 84(%rsp)
	movl	40(%rsp), %r8d
	xorl	%r9d, %r9d
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 80(%rsp)
	movq	%rdi, 88(%rsp)
	movl	92(%rsp), %ecx
	movq	84(%rsp), %rdx
	movq	%rdi, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L157
	movq	scanBlockSums(%rip), %rax
	movl	20(%rsp), %r9d
	movl	%r13d, %ecx
	movl	32(%rsp), %r8d
	movq	24(%rsp), %rsi
	movq	(%rax,%rbx,8), %rdx
	movq	8(%rsp), %rdi
	call	_ZL46__device_stub__Z7prescanILb1ELb1EEvPjPKjS0_iiiPjPKjS_iii
.L157:
	movq	scanBlockSums(%rip), %rax
	movl	44(%rsp), %ecx
	movl	36(%rsp), %edx
	movq	(%rax,%rbx,8), %rdi
	incl	%ecx
	movq	%rdi, %rsi
	call	_Z21prescanArrayRecursivePjPKjii
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L159
	movq	scanBlockSums(%rip), %rax
	movl	20(%rsp), %edx
	xorl	%r8d, %r8d
	xorl	%ecx, %ecx
	movq	8(%rsp), %rdi
	movq	(%rax,%rbx,8), %rsi
	call	_Z35__device_stub__Z10uniformAddPjS_iiiPjS_iii
.L159:
	testl	%r14d, %r14d
	je	.L150
	movl	%ebp, 84(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 80(%rsp)
	movq	%rdi, 88(%rsp)
	movl	92(%rsp), %ecx
	movq	84(%rsp), %rdx
	movq	%rdi, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L150
	movq	scanBlockSums(%rip), %rax
	movl	20(%rsp), %r8d
	movl	%r13d, %edx
	movl	32(%rsp), %ecx
	movq	8(%rsp), %rdi
	movq	(%rax,%rbx,8), %rsi
	addq	$104, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z35__device_stub__Z10uniformAddPjS_iiiPjS_iii
.L155:
	.cfi_restore_state
	leal	-1(%rbx), %eax
	xorl	%r9d, %r9d
	testl	%ebx, %eax
	jne	.L163
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L150
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$104, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	xorl	%edx, %edx
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%r12d, %ecx
	popq	%rbp
	.cfi_def_cfa_offset 40
	xorl	%r9d, %r9d
	popq	%r12
	.cfi_def_cfa_offset 32
	xorl	%r8d, %r8d
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZL46__device_stub__Z7prescanILb0ELb0EEvPjPKjS0_iiiPjPKjS_iii
.L163:
	.cfi_restore_state
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L150
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$104, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movl	%ebx, %ecx
	xorl	%r9d, %r9d
	popq	%rbx
	.cfi_def_cfa_offset 48
	xorl	%r8d, %r8d
	popq	%rbp
	.cfi_def_cfa_offset 40
	xorl	%edx, %edx
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZL46__device_stub__Z7prescanILb0ELb1EEvPjPKjS0_iiiPjPKjS_iii
.L150:
	.cfi_restore_state
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4923:
	.size	_Z21prescanArrayRecursivePjPKjii, .-_Z21prescanArrayRecursivePjPKjii
	.globl	_Z12prescanArrayPjS_i
	.type	_Z12prescanArrayPjS_i, @function
_Z12prescanArrayPjS_i:
.LFB4924:
	.cfi_startproc
	endbr64
	xorl	%ecx, %ecx
	jmp	_Z21prescanArrayRecursivePjPKjii
	.cfi_endproc
.LFE4924:
	.size	_Z12prescanArrayPjS_i, .-_Z12prescanArrayPjS_i
	.section	.rodata.str1.1
.LC3:
	.string	"_Z10uniformAddPjS_iii"
.LC4:
	.string	"_Z7prescanILb0ELb1EEvPjPKjS0_iii"
.LC5:
	.string	"_Z7prescanILb0ELb0EEvPjPKjS0_iii"
.LC6:
	.string	"_Z7prescanILb1ELb1EEvPjPKjS0_iii"
.LC7:
	.string	"_Z7prescanILb1ELb0EEvPjPKjS0_iii"
.LC8:
	.string	"_Z11compactSIMDmPjS_m"
.LC9:
	.string	"_Z9ReadPivotmPj"
.LC10:
	.string	"_Z9initpivotm"
.LC11:
	.string	"_Z14RenumberKernelmPj"
.LC12:
	.string	"_Z13UpdateKernel1mPjS_S_"
.LC13:
	.string	"_Z12UpdateKernelmPjS_"
.LC14:
	.string	"_Z17PIVOTS_SEL_Kernelm"
.LC15:
	.string	"_Z10TRIMKernelmPjS_S_S_"
.LC16:
	.string	"_Z10BFSKernel2mPjS_S_"
.LC17:
	.string	"_Z10BFSKernel1mPjS_S_S_S_S_"
.LC18:
	.string	"Mterminate"
.LC19:
	.string	"numActiveThreads"
.LC20:
	.string	"range"
.LC21:
	.string	"pivot"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4988:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10uniformAddPjS_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z7prescanILb0ELb1EEvPjPKjS0_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z7prescanILb0ELb0EEvPjPKjS0_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z7prescanILb1ELb1EEvPjPKjS0_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z7prescanILb1ELb0EEvPjPKjS0_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11compactSIMDmPjS_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9ReadPivotmPj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9initpivotm(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC11(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z14RenumberKernelmPj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13UpdateKernel1mPjS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12UpdateKernelmPjS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17PIVOTS_SEL_Kernelm(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10TRIMKernelmPjS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10BFSKernel2mPjS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10BFSKernel1mPjS_S_S_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	movl	$4, %r9d
	leaq	_ZL10Mterminate(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL16numActiveThreads(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$8, %r9d
	leaq	_ZL5range(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC21(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$8, %r9d
	movq	%rdx, %rcx
	leaq	_ZL5pivot(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4988:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt6vectorIjSaIjEED2Ev,"axG",@progbits,_ZNSt6vectorIjSaIjEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIjSaIjEED2Ev
	.type	_ZNSt6vectorIjSaIjEED2Ev, @function
_ZNSt6vectorIjSaIjEED2Ev:
.LFB5317:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	movq	16(%rdi), %rsi
	subq	%rax, %rsi
	movq	%rax, %rdi
	sarq	$2, %rsi
	jmp	_ZNSt12_Vector_baseIjSaIjEE13_M_deallocateEPjm.isra.0
	.cfi_endproc
.LFE5317:
	.size	_ZNSt6vectorIjSaIjEED2Ev, .-_ZNSt6vectorIjSaIjEED2Ev
	.weak	_ZNSt6vectorIjSaIjEED1Ev
	.set	_ZNSt6vectorIjSaIjEED1Ev,_ZNSt6vectorIjSaIjEED2Ev
	.section	.rodata._ZNSt6vectorIjSaIjEE7reserveEm.str1.1,"aMS",@progbits,1
.LC22:
	.string	"vector::reserve"
	.section	.text._ZNSt6vectorIjSaIjEE7reserveEm,"axG",@progbits,_ZNSt6vectorIjSaIjEE7reserveEm,comdat
	.align 2
	.weak	_ZNSt6vectorIjSaIjEE7reserveEm
	.type	_ZNSt6vectorIjSaIjEE7reserveEm, @function
_ZNSt6vectorIjSaIjEE7reserveEm:
.LFB5320:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693951, %rax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	cmpq	%rsi, %rax
	jnb	.L180
	leaq	.LC22(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L180:
	movq	(%rdi), %rdx
	movq	16(%rdi), %rax
	movq	%rdi, %rbx
	movq	%rsi, %r12
	subq	%rdx, %rax
	sarq	$2, %rax
	cmpq	%rsi, %rax
	jnb	.L179
	movq	8(%rdi), %r13
	movq	%rsi, %rdi
	subq	%rdx, %r13
	call	_ZNSt12_Vector_baseIjSaIjEE11_M_allocateEm.isra.0
	movq	(%rbx), %r14
	movq	8(%rbx), %rsi
	movq	%rax, %rdx
	movq	%rax, %rbp
	movq	%r14, %rdi
	addq	%rbp, %r13
	call	_ZSt14__relocate_a_1IjjENSt9enable_ifIXsrSt24__is_bitwise_relocatableIT_vE5valueEPS2_E4typeES4_S4_S4_RSaIT0_E.isra.0
	movq	16(%rbx), %rsi
	movq	%r14, %rdi
	subq	%r14, %rsi
	sarq	$2, %rsi
	call	_ZNSt12_Vector_baseIjSaIjEE13_M_deallocateEPjm.isra.0
	leaq	0(%rbp,%r12,4), %rax
	movq	%rbp, (%rbx)
	movq	%r13, 8(%rbx)
	movq	%rax, 16(%rbx)
.L179:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5320:
	.size	_ZNSt6vectorIjSaIjEE7reserveEm, .-_ZNSt6vectorIjSaIjEE7reserveEm
	.section	.rodata._ZNSt6vectorIjSaIjEE2atEm.str1.1,"aMS",@progbits,1
.LC23:
	.string	"vector::_M_range_check: __n (which is %zu) >= this->size() (which is %zu)"
	.section	.text._ZNSt6vectorIjSaIjEE2atEm,"axG",@progbits,_ZNSt6vectorIjSaIjEE2atEm,comdat
	.align 2
	.weak	_ZNSt6vectorIjSaIjEE2atEm
	.type	_ZNSt6vectorIjSaIjEE2atEm, @function
_ZNSt6vectorIjSaIjEE2atEm:
.LFB5330:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	movq	8(%rdi), %rdx
	subq	%rax, %rdx
	sarq	$2, %rdx
	cmpq	%rdx, %rsi
	jb	.L184
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	.LC23(%rip), %rdi
	xorl	%eax, %eax
	call	_ZSt24__throw_out_of_range_fmtPKcz@PLT
.L184:
	.cfi_def_cfa_offset 8
	leaq	(%rax,%rsi,4), %rax
	ret
	.cfi_endproc
.LFE5330:
	.size	_ZNSt6vectorIjSaIjEE2atEm, .-_ZNSt6vectorIjSaIjEE2atEm
	.section	.text._ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_,"axG",@progbits,_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_,comdat
	.align 2
	.weak	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_
	.type	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_, @function
_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_:
.LFB5632:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
	movl	$40, %edi
	call	_Znwm@PLT
	leaq	8(%rbx), %rcx
	movl	(%r12), %esi
	movq	16(%rbx), %rdx
	movq	%rax, %rbp
	movq	(%r12), %rax
	movq	%rax, 32(%rbp)
	movq	%rcx, %rax
.L189:
	testq	%rdx, %rdx
	je	.L195
	movq	24(%rdx), %rdi
	cmpl	32(%rdx), %esi
	movq	%rdx, %rax
	cmovb	16(%rdx), %rdi
	movq	%rdi, %rdx
	jmp	.L189
.L195:
	movb	$1, %dil
	cmpq	%rax, %rcx
	je	.L192
	cmpl	32(%rax), %esi
	setb	%dil
.L192:
	movq	%rax, %rdx
	movq	%rbp, %rsi
	movzbl	%dil, %edi
	call	_ZSt29_Rb_tree_insert_and_rebalancebPSt18_Rb_tree_node_baseS0_RS_@PLT
	incq	40(%rbx)
	movq	%rbp, %rax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5632:
	.size	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_, .-_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_
	.section	.text._ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc,comdat
	.align 2
	.weak	_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc
	.type	_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc, @function
_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc:
.LFB5732:
	.cfi_startproc
	endbr64
	movq	%rdi, %rax
	movq	%rdx, %rdi
	movq	8(%rax), %rcx
	subq	(%rax), %rcx
	movabsq	$2305843009213693951, %rax
	sarq	$2, %rcx
	movq	%rax, %rdx
	subq	%rcx, %rdx
	cmpq	%rsi, %rdx
	jnb	.L197
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_ZSt20__throw_length_errorPKc@PLT
.L197:
	.cfi_def_cfa_offset 8
	cmpq	%rcx, %rsi
	cmovb	%rcx, %rsi
	addq	%rsi, %rcx
	jc	.L196
	movabsq	$2305843009213693951, %rax
	cmpq	%rax, %rcx
	cmovbe	%rcx, %rax
.L196:
	ret
	.cfi_endproc
.LFE5732:
	.size	_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc, .-_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc
	.section	.rodata.str1.1
.LC24:
	.string	"vector::_M_realloc_insert"
	.text
	.align 2
	.type	_ZNSt6vectorIjSaIjEE12emplace_backIJjEEERjDpOT_.isra.0, @function
_ZNSt6vectorIjSaIjEE12emplace_backIJjEEERjDpOT_.isra.0:
.LFB5966:
	.cfi_startproc
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %rbp
	cmpq	16(%rdi), %rbp
	je	.L206
	movl	(%rsi), %eax
	addq	$4, %rbp
	movl	%eax, -4(%rbp)
	movq	%rbp, 8(%rdi)
	jmp	.L205
.L206:
	leaq	.LC24(%rip), %rdx
	movl	$1, %esi
	call	_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc
	movq	(%rbx), %r13
	movq	%rax, %r14
	movq	8(%rbx), %rax
	movq	%r14, %rdi
	movq	%rax, (%rsp)
	movq	%rbp, %rax
	subq	%r13, %rax
	movq	%rax, 8(%rsp)
	call	_ZNSt12_Vector_baseIjSaIjEE11_M_allocateEm.isra.0
	movq	8(%rsp), %rcx
	movq	%rbp, %rsi
	movq	%r13, %rdi
	movq	%rax, %r12
	movl	(%r15), %eax
	movq	%r12, %rdx
	movl	%eax, (%r12,%rcx)
	call	_ZSt14__relocate_a_1IjjENSt9enable_ifIXsrSt24__is_bitwise_relocatableIT_vE5valueEPS2_E4typeES4_S4_S4_RSaIT0_E.isra.0
	movq	(%rsp), %rsi
	movq	%rbp, %rdi
	leaq	4(%rax), %rdx
	call	_ZSt14__relocate_a_1IjjENSt9enable_ifIXsrSt24__is_bitwise_relocatableIT_vE5valueEPS2_E4typeES4_S4_S4_RSaIT0_E.isra.0
	movq	16(%rbx), %rsi
	movq	%r13, %rdi
	movq	%rax, %rbp
	subq	%r13, %rsi
	sarq	$2, %rsi
	call	_ZNSt12_Vector_baseIjSaIjEE13_M_deallocateEPjm.isra.0
	leaq	(%r12,%r14,4), %rax
	movq	%r12, (%rbx)
	movq	%rbp, 8(%rbx)
	movq	%rax, 16(%rbx)
.L205:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5966:
	.size	_ZNSt6vectorIjSaIjEE12emplace_backIJjEEERjDpOT_.isra.0, .-_ZNSt6vectorIjSaIjEE12emplace_backIJjEEERjDpOT_.isra.0
	.section	.text._ZNSt6vectorIjSaIjEE9push_backERKj,"axG",@progbits,_ZNSt6vectorIjSaIjEE9push_backERKj,comdat
	.align 2
	.weak	_ZNSt6vectorIjSaIjEE9push_backERKj
	.type	_ZNSt6vectorIjSaIjEE9push_backERKj, @function
_ZNSt6vectorIjSaIjEE9push_backERKj:
.LFB5377:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %rbp
	cmpq	16(%rdi), %rbp
	je	.L210
	movl	(%rsi), %eax
	addq	$4, %rbp
	movl	%eax, -4(%rbp)
	movq	%rbp, 8(%rdi)
	jmp	.L209
.L210:
	leaq	.LC24(%rip), %rdx
	movl	$1, %esi
	call	_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc
	movq	(%rbx), %r13
	movq	%rax, %r14
	movq	8(%rbx), %rax
	movq	%r14, %rdi
	movq	%rax, (%rsp)
	movq	%rbp, %rax
	subq	%r13, %rax
	movq	%rax, 8(%rsp)
	call	_ZNSt12_Vector_baseIjSaIjEE11_M_allocateEm.isra.0
	movq	8(%rsp), %rcx
	movq	%rbp, %rsi
	movq	%r13, %rdi
	movq	%rax, %r12
	movl	(%r15), %eax
	movq	%r12, %rdx
	movl	%eax, (%r12,%rcx)
	call	_ZSt14__relocate_a_1IjjENSt9enable_ifIXsrSt24__is_bitwise_relocatableIT_vE5valueEPS2_E4typeES4_S4_S4_RSaIT0_E.isra.0
	movq	(%rsp), %rsi
	movq	%rbp, %rdi
	leaq	4(%rax), %rdx
	call	_ZSt14__relocate_a_1IjjENSt9enable_ifIXsrSt24__is_bitwise_relocatableIT_vE5valueEPS2_E4typeES4_S4_S4_RSaIT0_E.isra.0
	movq	16(%rbx), %rsi
	movq	%r13, %rdi
	movq	%rax, %rbp
	subq	%r13, %rsi
	sarq	$2, %rsi
	call	_ZNSt12_Vector_baseIjSaIjEE13_M_deallocateEPjm.isra.0
	leaq	(%r12,%r14,4), %rax
	movq	%r12, (%rbx)
	movq	%rbp, 8(%rbx)
	movq	%rax, 16(%rbx)
.L209:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5377:
	.size	_ZNSt6vectorIjSaIjEE9push_backERKj, .-_ZNSt6vectorIjSaIjEE9push_backERKj
	.text
	.globl	_Z12GraphpreprocNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERSt6vectorIjSaIjEES8_S8_S8_
	.type	_Z12GraphpreprocNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERSt6vectorIjSaIjEES8_S8_S8_, @function
_Z12GraphpreprocNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERSt6vectorIjSaIjEES8_S8_S8_:
.LFB4880:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4880
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$1592, %rsp
	.cfi_def_cfa_offset 1648
	movq	%rcx, 16(%rsp)
	movq	%r8, 40(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 1576(%rsp)
	xorl	%eax, %eax
	leaq	1056(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
.LEHB0:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE0:
	movq	(%r12), %rsi
	xorl	%r10d, %r10d
	xorl	%r11d, %r11d
	movq	8(%rsp), %rdi
	movq	%r13, 112(%rsp)
	movl	$8, %edx
	leaq	104(%rsp), %r13
	movq	%r10, 72(%rsp)
	movq	%r10, 80(%rsp)
	movq	%r10, 88(%rsp)
	movl	%r11d, 104(%rsp)
	movq	%r13, 120(%rsp)
	movq	%r13, 128(%rsp)
	movq	%r14, 136(%rsp)
	movl	%r15d, 52(%rsp)
.LEHB1:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
.LEHE1:
	leaq	160(%rsp), %r15
.L214:
	testb	$2, 1344(%rsp)
	jne	.L257
	leaq	192(%rsp), %rax
	xorl	%edi, %edi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	movq	%rax, 176(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	272(%rsp), %rax
	movq	%rax, 24(%rsp)
	leaq	144(%rsp), %rax
	movq	%rdi, 152(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, (%rsp)
	leaq	176(%rsp), %rax
	movq	%r15, 144(%rsp)
	movb	$0, 160(%rsp)
	movq	%r8, 184(%rsp)
	movb	$0, 192(%rsp)
	movq	%r9, 216(%rsp)
	movb	$0, 224(%rsp)
	movq	%rax, 32(%rsp)
.LEHB2:
	call	_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEC1Ev@PLT
.LEHE2:
	leaq	664(%rsp), %rdi
.LEHB3:
	call	_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEC1Ev@PLT
.LEHE3:
	movq	1056(%rsp), %rax
	movq	-24(%rax), %rax
	movq	1296(%rsp,%rax), %r12
	testq	%r12, %r12
	jne	.L215
	movq	1576(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L252
.LEHB4:
	call	_ZSt16__throw_bad_castv@PLT
.L215:
	cmpb	$0, 56(%r12)
	je	.L217
	movb	67(%r12), %al
	jmp	.L218
.L217:
	movq	%r12, %rdi
	call	_ZNKSt5ctypeIcE13_M_widen_initEv@PLT
	movq	(%r12), %rax
	movl	$10, %esi
	movq	%r12, %rdi
	call	*48(%rax)
.L218:
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	movsbl	%al, %edx
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_@PLT
	cmpq	$0, 152(%rsp)
	je	.L219
	movq	144(%rsp), %rax
	cmpb	$35, (%rax)
	je	.L219
	movq	(%rsp), %rdi
	xorl	%edx, %edx
	movl	$9, %esi
	leaq	240(%rsp), %r12
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcm@PLT
	movq	(%rsp), %rsi
	xorl	%edx, %edx
	movq	%r12, %rdi
	movq	%rax, %rcx
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1ERKS4_mm@PLT
	movq	32(%rsp), %rdi
	movq	%r12, %rsi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	(%rsp), %rdi
	orq	$-1, %rdx
	movl	$9, %esi
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE16find_last_not_ofEcm@PLT
	movq	(%rsp), %rdi
	xorl	%edx, %edx
	movl	$9, %esi
	movq	%rax, %r14
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcm@PLT
	movq	(%rsp), %rdi
	movl	$9, %esi
	movq	%rax, %rdx
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE17find_first_not_ofEcm@PLT
	movq	(%rsp), %rsi
	movq	%r14, %rcx
	movq	%r12, %rdi
	movq	%rax, %rdx
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1ERKS4_mm@PLT
	movq	%r12, %rsi
	leaq	208(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	184(%rsp), %rdx
	movq	176(%rsp), %rsi
	leaq	288(%rsp), %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	leaq	56(%rsp), %r14
	movq	24(%rsp), %rdi
	movq	%r14, %rsi
	call	_ZNSi10_M_extractIjEERSiRT_@PLT
	movq	216(%rsp), %rdx
	movq	208(%rsp), %rsi
	leaq	680(%rsp), %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	leaq	60(%rsp), %r12
	leaq	664(%rsp), %rdi
	movq	%r12, %rsi
	call	_ZNSi10_M_extractIjEERSiRT_@PLT
	leaq	72(%rsp), %rdi
	movq	%r14, %rsi
	call	_ZNSt6vectorIjSaIjEE9push_backERKj
	movl	60(%rsp), %eax
	leaq	64(%rsp), %rsi
	leaq	96(%rsp), %rdi
	movl	%eax, 64(%rsp)
	movl	56(%rsp), %eax
	movl	%eax, 68(%rsp)
	call	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	_ZNSt6vectorIjSaIjEE9push_backERKj
.LEHE4:
.L219:
	leaq	664(%rsp), %rdi
	call	_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
	movq	24(%rsp), %rdi
	call	_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
	leaq	208(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	32(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L214
.L257:
	xorl	%esi, %esi
	leaq	64(%rsp), %r14
	movq	%rbx, %rdi
	movq	72(%rsp), %rbp
	movl	%esi, 64(%rsp)
	movq	%r14, %rsi
.LEHB5:
	call	_ZNSt6vectorIjSaIjEE12emplace_backIJjEEERjDpOT_.isra.0
	xorl	%r12d, %r12d
.L221:
	movq	80(%rsp), %rsi
	movq	%rbp, %rcx
	xorl	%eax, %eax
	xorl	%edx, %edx
.L224:
	movq	%rcx, %rbp
	cmpq	%rsi, %rcx
	je	.L255
	leal	1(%rax), %edi
	leaq	4(%rcx), %rcx
	cmpl	%r12d, 0(%rbp)
	jne	.L255
	movl	%edi, %eax
	movb	$1, %dl
	jmp	.L224
.L255:
	testb	%dl, %dl
	je	.L226
	movl	%eax, 52(%rsp)
.L226:
	movq	%r12, %rsi
	movq	%rbx, %rdi
	call	_ZNSt6vectorIjSaIjEE2atEm
	leaq	52(%rsp), %r15
	movq	%rbx, %rdi
	movl	(%rax), %eax
	addl	%eax, 52(%rsp)
	movq	%r15, %rsi
	call	_ZNSt6vectorIjSaIjEE9push_backERKj
	xorl	%ecx, %ecx
	incq	%r12
	movl	%ecx, 52(%rsp)
	cmpq	$2394384, %r12
	jne	.L221
	movq	%r14, %rsi
	movq	%rbx, %rdi
	movl	$5021410, 64(%rsp)
	call	_ZNSt6vectorIjSaIjEE12emplace_backIJjEEERjDpOT_.isra.0
	movq	16(%rsp), %rdi
	xorl	%edx, %edx
	movq	%r14, %rsi
	movq	120(%rsp), %rbx
	movl	%edx, 64(%rsp)
	call	_ZNSt6vectorIjSaIjEE12emplace_backIJjEEERjDpOT_.isra.0
	xorl	%ebp, %ebp
.L233:
	cmpq	%r13, %rbx
	je	.L230
	cmpl	%ebp, 32(%rbx)
	je	.L231
.L230:
	movq	16(%rsp), %rdi
	movq	%rbp, %rsi
	call	_ZNSt6vectorIjSaIjEE2atEm
	movq	16(%rsp), %rdi
	movq	%r15, %rsi
	movl	(%rax), %eax
	addl	%eax, 52(%rsp)
	call	_ZNSt6vectorIjSaIjEE9push_backERKj
	jmp	.L258
.L231:
	movq	%rbx, %rdi
	incl	52(%rsp)
	call	_ZSt18_Rb_tree_incrementPSt18_Rb_tree_node_base@PLT
	movq	%rax, %rbx
	jmp	.L233
.L258:
	xorl	%eax, %eax
	incq	%rbp
	movl	%eax, 52(%rsp)
	cmpq	$2394384, %rbp
	jne	.L233
	movq	16(%rsp), %rdi
	movq	%r14, %rsi
	movl	$5021410, 64(%rsp)
	call	_ZNSt6vectorIjSaIjEE12emplace_backIJjEEERjDpOT_.isra.0
	movq	120(%rsp), %rbx
.L235:
	cmpq	%r13, %rbx
	je	.L259
	movq	40(%rsp), %rdi
	leaq	36(%rbx), %rsi
	call	_ZNSt6vectorIjSaIjEE9push_backERKj
.LEHE5:
	movq	%rbx, %rdi
	call	_ZSt18_Rb_tree_incrementPSt18_Rb_tree_node_base@PLT
	movq	%rax, %rbx
	jmp	.L235
.L259:
	movq	112(%rsp), %rdi
	call	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE8_M_eraseEPSt13_Rb_tree_nodeIS2_E.isra.0
	leaq	72(%rsp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	1576(%rsp), %rax
	subq	%fs:40, %rax
	je	.L242
	jmp	.L252
.L247:
	endbr64
	movq	%rax, %rbx
.L237:
	leaq	664(%rsp), %rdi
	call	_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
	jmp	.L238
.L246:
	endbr64
	movq	%rax, %rbx
.L238:
	movq	24(%rsp), %rdi
	call	_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
	jmp	.L239
.L245:
	endbr64
	movq	%rax, %rbx
.L239:
	leaq	208(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	32(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L240
.L244:
	endbr64
	movq	%rax, %rbx
.L240:
	movq	112(%rsp), %rdi
	call	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE8_M_eraseEPSt13_Rb_tree_nodeIS2_E.isra.0
	leaq	72(%rsp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	1576(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L252
	movq	%rbx, %rdi
.LEHB6:
	call	_Unwind_Resume@PLT
.LEHE6:
.L252:
	call	__stack_chk_fail@PLT
.L242:
	addq	$1592, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4880:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4880:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4880-.LLSDACSB4880
.LLSDACSB4880:
	.uleb128 .LEHB0-.LFB4880
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4880
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L244-.LFB4880
	.uleb128 0
	.uleb128 .LEHB2-.LFB4880
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L245-.LFB4880
	.uleb128 0
	.uleb128 .LEHB3-.LFB4880
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L246-.LFB4880
	.uleb128 0
	.uleb128 .LEHB4-.LFB4880
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L247-.LFB4880
	.uleb128 0
	.uleb128 .LEHB5-.LFB4880
	.uleb128 .LEHE5-.LEHB5
	.uleb128 .L244-.LFB4880
	.uleb128 0
	.uleb128 .LEHB6-.LFB4880
	.uleb128 .LEHE6-.LEHB6
	.uleb128 0
	.uleb128 0
.LLSDACSE4880:
	.text
	.size	_Z12GraphpreprocNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERSt6vectorIjSaIjEES8_S8_S8_, .-_Z12GraphpreprocNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERSt6vectorIjSaIjEES8_S8_S8_
	.section	.text._ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIPjmEET_S3_T0_,"axG",@progbits,_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIPjmEET_S3_T0_,comdat
	.weak	_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIPjmEET_S3_T0_
	.type	_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIPjmEET_S3_T0_, @function
_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIPjmEET_S3_T0_:
.LFB5885:
	.cfi_startproc
	endbr64
	movq	%rdi, %rax
	testq	%rsi, %rsi
	je	.L260
	xorl	%r8d, %r8d
	leaq	4(%rdi), %rax
	movl	%r8d, (%rdi)
	decq	%rsi
	je	.L260
	leaq	(%rax,%rsi,4), %rdx
	movq	%rax, %rcx
.L262:
	cmpq	%rcx, %rdx
	je	.L269
	xorl	%esi, %esi
	addq	$4, %rcx
	movl	%esi, -4(%rcx)
	jmp	.L262
.L269:
	subq	%rdi, %rdx
	leaq	-4(%rax,%rdx), %rax
.L260:
	ret
	.cfi_endproc
.LFE5885:
	.size	_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIPjmEET_S3_T0_, .-_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIPjmEET_S3_T0_
	.section	.rodata._ZNSt6vectorIjSaIjEE17_M_default_appendEm.str1.1,"aMS",@progbits,1
.LC25:
	.string	"vector::_M_default_append"
	.section	.text._ZNSt6vectorIjSaIjEE17_M_default_appendEm,"axG",@progbits,_ZNSt6vectorIjSaIjEE17_M_default_appendEm,comdat
	.align 2
	.weak	_ZNSt6vectorIjSaIjEE17_M_default_appendEm
	.type	_ZNSt6vectorIjSaIjEE17_M_default_appendEm, @function
_ZNSt6vectorIjSaIjEE17_M_default_appendEm:
.LFB5551:
	.cfi_startproc
	endbr64
	testq	%rsi, %rsi
	je	.L277
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %rcx
	movq	16(%rdi), %rax
	movq	(%rdi), %r14
	subq	%rcx, %rax
	sarq	$2, %rax
	cmpq	%rsi, %rax
	jb	.L272
	movq	%rcx, %rdi
	call	_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIPjmEET_S3_T0_
	movq	%rax, 8(%rbx)
	jmp	.L270
.L272:
	leaq	.LC25(%rip), %rdx
	movq	%rcx, %r13
	movq	%rcx, 8(%rsp)
	call	_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc
	subq	%r14, %r13
	movq	%rax, %rdi
	movq	%rax, %r15
	call	_ZNSt12_Vector_baseIjSaIjEE11_M_allocateEm.isra.0
	movq	%rbp, %rsi
	leaq	(%rax,%r13), %rdi
	movq	%rax, %r12
	sarq	$2, %r13
	call	_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIPjmEET_S3_T0_
	movq	8(%rsp), %rsi
	movq	%r12, %rdx
	movq	%r14, %rdi
	addq	%rbp, %r13
	call	_ZSt14__relocate_a_1IjjENSt9enable_ifIXsrSt24__is_bitwise_relocatableIT_vE5valueEPS2_E4typeES4_S4_S4_RSaIT0_E.isra.0
	movq	16(%rbx), %rsi
	movq	%r14, %rdi
	subq	%r14, %rsi
	sarq	$2, %rsi
	call	_ZNSt12_Vector_baseIjSaIjEE13_M_deallocateEPjm.isra.0
	leaq	(%r12,%r13,4), %rax
	movq	%r12, (%rbx)
	movq	%rax, 8(%rbx)
	leaq	(%r12,%r15,4), %rax
	movq	%rax, 16(%rbx)
.L270:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
.L277:
	.cfi_restore 3
	.cfi_restore 6
	.cfi_restore 12
	.cfi_restore 13
	.cfi_restore 14
	.cfi_restore 15
	ret
	.cfi_endproc
.LFE5551:
	.size	_ZNSt6vectorIjSaIjEE17_M_default_appendEm, .-_ZNSt6vectorIjSaIjEE17_M_default_appendEm
	.section	.text._ZNSt6vectorIjSaIjEE6resizeEm,"axG",@progbits,_ZNSt6vectorIjSaIjEE6resizeEm,comdat
	.align 2
	.weak	_ZNSt6vectorIjSaIjEE6resizeEm
	.type	_ZNSt6vectorIjSaIjEE6resizeEm, @function
_ZNSt6vectorIjSaIjEE6resizeEm:
.LFB5319:
	.cfi_startproc
	endbr64
	movq	8(%rdi), %rdx
	movq	(%rdi), %rcx
	movq	%rdx, %rax
	subq	%rcx, %rax
	sarq	$2, %rax
	cmpq	%rsi, %rax
	jnb	.L281
	subq	%rax, %rsi
	jmp	_ZNSt6vectorIjSaIjEE17_M_default_appendEm
.L281:
	cmpq	%rax, %rsi
	jnb	.L280
	leaq	(%rcx,%rsi,4), %rax
	cmpq	%rdx, %rax
	je	.L280
	movq	%rax, 8(%rdi)
.L280:
	ret
	.cfi_endproc
.LFE5319:
	.size	_ZNSt6vectorIjSaIjEE6resizeEm, .-_ZNSt6vectorIjSaIjEE6resizeEm
	.text
	.globl	_Z3BFSRSt6vectorIjSaIjEES2_jjS2_
	.type	_Z3BFSRSt6vectorIjSaIjEES2_jjS2_, @function
_Z3BFSRSt6vectorIjSaIjEES2_jjS2_:
.LFB4916:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4916
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	.cfi_offset 15, -24
	movq	%rdi, %r15
	pushq	%r14
	.cfi_offset 14, -32
	movq	%rsi, %r14
	pushq	%r13
	pushq	%r12
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	movl	%ecx, %r12d
	pushq	%rbx
	subl	%edx, %r12d
	.cfi_offset 3, -56
	movl	%edx, %ebx
	leal	1(%r12), %r13d
	subq	$168, %rsp
	movl	%ecx, -188(%rbp)
	movq	%r8, -184(%rbp)
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	movq	(%r8), %rax
	cmpq	8(%r8), %rax
	je	.L284
	movq	%rax, 8(%r8)
.L284:
	movq	-184(%rbp), %rdi
	movl	$2394385, %esi
.LEHB7:
	call	_ZNSt6vectorIjSaIjEE6resizeEm
.LEHE7:
	xorl	%edi, %edi
	leaq	-80(%rbp), %rax
	movq	%r13, %rsi
	movq	%rdi, -80(%rbp)
	movq	%rdi, -72(%rbp)
	movq	%rdi, -64(%rbp)
	movq	%rax, %rdi
	movq	%rax, -200(%rbp)
.LEHB8:
	call	_ZNSt6vectorIjSaIjEE6resizeEm
	leaq	-144(%rbp), %rdi
	movl	$9577544, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$530, %edx
	leaq	.LC1(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	-144(%rbp), %rdi
	movl	$9577544, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	%eax, %edi
	movl	$531, %edx
	leaq	.LC1(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	leaq	-136(%rbp), %rdi
	movl	$9577544, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$534, %edx
	leaq	.LC1(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	-136(%rbp), %rdi
	movl	$9577544, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	%eax, %edi
	movl	$535, %edx
	leaq	.LC1(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	leaq	-128(%rbp), %rdi
	movl	$9577544, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$538, %edx
	leaq	.LC1(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	-128(%rbp), %rdi
	movl	$9577544, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	%eax, %edi
	movl	$539, %edx
	leaq	.LC1(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	leaq	-168(%rbp), %rdi
	movl	$9577544, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$541, %edx
	leaq	.LC1(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	(%r15), %rsi
	movl	$1, %ecx
	movl	$9577544, %edx
	movq	-168(%rbp), %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	$542, %edx
	leaq	.LC1(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	leaq	-160(%rbp), %rdi
	movl	$20085640, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$544, %edx
	leaq	.LC1(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	(%r14), %rsi
	movl	$1, %ecx
	movl	$20085640, %edx
	movq	-160(%rbp), %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	$545, %edx
	leaq	.LC1(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	leaq	-120(%rbp), %rdi
	movl	$9577544, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$547, %edx
	leaq	.LC1(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	leaq	0(,%r13,4), %r14
	leaq	-152(%rbp), %rdi
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$549, %edx
	leaq	.LC1(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	leaq	-112(%rbp), %rdi
	movl	$9577544, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$554, %edx
	leaq	.LC1(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movl	$2394386, %edi
	call	_Z17preallocBlockSumsj
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	addl	$256, %r12d
	salq	$8, %rdx
	movabsq	$4294967297, %rax
	movl	$1, -84(%rbp)
	shrl	$8, %r12d
	movq	%rax, -100(%rbp)
	movl	-96(%rbp), %esi
	movl	%r12d, -104(%rbp)
	movq	-104(%rbp), %rdi
	movq	%rdx, -92(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L285
.L287:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	movl	$564, %edx
	leaq	.LC1(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	jmp	.L311
.L285:
	movq	-152(%rbp), %rsi
	movq	%r13, %rdi
	call	_Z29__device_stub__Z9ReadPivotmPjmPj
	jmp	.L287
.L311:
	movq	-152(%rbp), %rsi
	movq	-80(%rbp), %rdi
	movl	$2, %ecx
	movq	%r14, %rdx
	call	cudaMemcpy@PLT
	xorl	%esi, %esi
	movslq	%ebx, %r12
	leaq	-80(%rbp), %r13
	movl	%esi, -176(%rbp)
.L288:
	cmpl	%ebx, -188(%rbp)
	jb	.L312
	movq	%r12, %rsi
	movq	%r13, %rdi
	call	_ZNSt6vectorIjSaIjEE2atEm
	cmpl	$-1, (%rax)
	je	.L289
	movq	%r12, %rsi
	movq	%r13, %rdi
	movq	-144(%rbp), %r14
	call	_ZNSt6vectorIjSaIjEE2atEm
	movl	(%rax), %eax
	movl	$1, %esi
	leaq	(%r14,%rax,4), %rdi
	call	_Z7setUIntPjj
	movq	%r12, %rsi
	movq	%r13, %rdi
	movq	-136(%rbp), %r14
	call	_ZNSt6vectorIjSaIjEE2atEm
	movl	(%rax), %eax
	movl	$1, %esi
	leaq	(%r14,%rax,4), %rdi
	call	_Z7setUIntPjj
	movq	%r12, %rsi
	movq	%r13, %rdi
	call	_ZNSt6vectorIjSaIjEE2atEm
	movl	-176(%rbp), %ecx
	movq	-120(%rbp), %rdx
	movl	(%rax), %esi
	leaq	(%rdx,%rcx,4), %rdi
	call	_Z7setUIntPjj
	incl	-176(%rbp)
.L289:
	incl	%ebx
	incq	%r12
	jmp	.L288
.L312:
	leaq	-176(%rbp), %r12
	leaq	_ZL16numActiveThreads(%rip), %r13
	xorl	%ecx, %ecx
	movl	$4, %edx
	movl	$1, %r8d
	movq	%r12, %rsi
	movq	%r13, %rdi
	call	cudaMemcpyToSymbol@PLT
	leaq	.LC1(%rip), %rbx
	movl	%eax, %edi
	movl	$577, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	leaq	_ZL10Mterminate(%rip), %r14
.L301:
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movl	$4, %edx
	movq	%r14, %rdi
	leaq	-172(%rbp), %r15
	movl	$1, -172(%rbp)
	movq	%r15, %rsi
	call	cudaMemcpyToSymbol@PLT
	movl	%eax, %edi
	movl	$590, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	-176(%rbp), %eax
	salq	$8, %rdx
	movl	$1, -84(%rbp)
	movq	%rdx, -92(%rbp)
	addl	$255, %eax
	shrl	$8, %eax
	movl	%eax, -104(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -100(%rbp)
	movq	-104(%rbp), %rdi
	movl	-96(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L291
.L293:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	movl	$600, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	jmp	.L313
.L291:
	pushq	%rcx
	movl	$2394385, %edi
	pushq	-128(%rbp)
	movq	-136(%rbp), %r9
	movq	-144(%rbp), %r8
	movq	-160(%rbp), %rcx
	movq	-168(%rbp), %rdx
	movq	-120(%rbp), %rsi
	.cfi_escape 0x2e,0x10
	call	_Z41__device_stub__Z10BFSKernel1mPjS_S_S_S_S_mPjS_S_S_S_S_
	popq	%rax
	popq	%rdx
	jmp	.L293
.L313:
	movl	$16777217, %edx
	movl	$2147488325, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	addq	%rdi, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, -92(%rbp)
	movl	$1, -84(%rbp)
	movq	%rdi, -104(%rbp)
	movl	$1, -96(%rbp)
	.cfi_escape 0x2e,0
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L294
.L296:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	movl	$607, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	jmp	.L314
.L294:
	movq	-128(%rbp), %rcx
	movq	-136(%rbp), %rdx
	movl	$2394385, %edi
	movq	-144(%rbp), %rsi
	call	_Z35__device_stub__Z10BFSKernel2mPjS_S_mPjS_S_
	jmp	.L296
.L314:
	movl	$2, %r8d
	xorl	%ecx, %ecx
	movl	$4, %edx
	movq	%r14, %rsi
	movq	%r15, %rdi
	call	cudaMemcpyFromSymbol@PLT
	movl	%eax, %edi
	movl	$610, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	cmpl	$0, -172(%rbp)
	jne	.L297
	movq	-144(%rbp), %rsi
	movq	-112(%rbp), %rdi
	movl	$2394386, %edx
	call	_Z12prescanArrayPjS_i
	movq	-112(%rbp), %rax
	movl	$2, %ecx
	movl	$4, %edx
	movq	%r12, %rdi
	leaq	9577540(%rax), %rsi
	call	cudaMemcpy@PLT
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movl	$4, %edx
	movq	%r12, %rsi
	movq	%r13, %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	%eax, %edi
	movl	$620, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movl	$16777217, %edx
	movl	$2147488325, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	addq	%rdi, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, -92(%rbp)
	movl	$1, -84(%rbp)
	movq	%rdi, -104(%rbp)
	movl	$1, -96(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L298
.L300:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	movl	$625, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	jmp	.L301
.L298:
	movq	-120(%rbp), %rdx
	movq	-112(%rbp), %rsi
	movl	$256, %ecx
	movl	$2394385, %edi
	call	_Z35__device_stub__Z11compactSIMDmPjS_mmPjS_m
	jmp	.L300
.L297:
	movq	-184(%rbp), %rax
	movl	$2, %ecx
	movl	$9577540, %edx
	movq	-136(%rbp), %rsi
	movq	(%rax), %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	$634, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	-144(%rbp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$638, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	-136(%rbp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$639, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	-128(%rbp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$640, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	-168(%rbp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$641, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	-160(%rbp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$642, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	-152(%rbp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$643, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	-120(%rbp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$644, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	call	_Z16deallocBlockSumsv
	movq	-112(%rbp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$646, %edx
	leaq	.LC1(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
.LEHE8:
	leaq	-80(%rbp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L304
	jmp	.L309
.L305:
	endbr64
	movq	%rax, %rbx
.L302:
	movq	-200(%rbp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L309
	movq	%rbx, %rdi
.LEHB9:
	call	_Unwind_Resume@PLT
.LEHE9:
.L309:
	call	__stack_chk_fail@PLT
.L304:
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4916:
	.section	.gcc_except_table
.LLSDA4916:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4916-.LLSDACSB4916
.LLSDACSB4916:
	.uleb128 .LEHB7-.LFB4916
	.uleb128 .LEHE7-.LEHB7
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB8-.LFB4916
	.uleb128 .LEHE8-.LEHB8
	.uleb128 .L305-.LFB4916
	.uleb128 0
	.uleb128 .LEHB9-.LFB4916
	.uleb128 .LEHE9-.LEHB9
	.uleb128 0
	.uleb128 0
.LLSDACSE4916:
	.text
	.size	_Z3BFSRSt6vectorIjSaIjEES2_jjS2_, .-_Z3BFSRSt6vectorIjSaIjEES2_jjS2_
	.globl	_Z7Update1RSt6vectorIjSaIjEES2_S2_Rj
	.type	_Z7Update1RSt6vectorIjSaIjEES2_S2_Rj, @function
_Z7Update1RSt6vectorIjSaIjEES2_S2_Rj:
.LFB4920:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	movq	(%rdx), %rax
	cmpq	8(%rdx), %rax
	je	.L316
	movq	%rax, 8(%rdx)
.L316:
	movl	$2394386, %esi
	movq	%rbp, %rdi
	leaq	.LC1(%rip), %rbx
	call	_ZNSt6vectorIjSaIjEE6resizeEm
	leaq	16(%rsp), %rdi
	movl	$9577544, %esi
	call	cudaMalloc@PLT
	movl	$755, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	movl	$9577544, %edx
	call	cudaMemset@PLT
	movl	$756, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	%rsp, %rdi
	movl	$9577544, %esi
	call	cudaMalloc@PLT
	movl	$758, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	(%r14), %rsi
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movl	$9577540, %edx
	call	cudaMemcpy@PLT
	movl	$759, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	leaq	8(%rsp), %rdi
	movl	$9577544, %esi
	call	cudaMalloc@PLT
	movl	$761, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	0(%r13), %rsi
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$9577540, %edx
	leaq	_ZL10Mterminate(%rip), %r13
	call	cudaMemcpy@PLT
	movl	$762, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	leaq	24(%rsp), %rdi
	movl	$9577544, %esi
	call	cudaMalloc@PLT
	movl	$764, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movl	$2394386, %edi
	call	_Z17preallocBlockSumsj
	xorl	%ecx, %ecx
	movl	$1, %r8d
	movq	%r12, %rsi
	movl	$1, (%r12)
	movl	$4, %edx
	movq	%r13, %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	$771, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$2147488325, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	addq	%rdi, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L317
	movq	16(%rsp), %rcx
	movq	8(%rsp), %rdx
	movl	$2394385, %edi
	movq	(%rsp), %rsi
	call	_Z38__device_stub__Z13UpdateKernel1mPjS_S_mPjS_S_
.L317:
	call	cudaDeviceSynchronize@PLT
	movl	$778, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	xorl	%ecx, %ecx
	movl	$2, %r8d
	movq	%r13, %rsi
	movl	$4, %edx
	movq	%r12, %rdi
	call	cudaMemcpyFromSymbol@PLT
	movl	$780, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	cmpl	$0, (%r12)
	jne	.L318
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$2394386, %edx
	call	_Z12prescanArrayPjS_i
	movq	24(%rsp), %rsi
	movq	0(%rbp), %rdi
	movl	$9577544, %edx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movl	$785, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
.L318:
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movl	$788, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movl	$789, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movl	$790, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	call	_Z16deallocBlockSumsv
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movl	$792, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L319
	call	__stack_chk_fail@PLT
.L319:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4920:
	.size	_Z7Update1RSt6vectorIjSaIjEES2_S2_Rj, .-_Z7Update1RSt6vectorIjSaIjEES2_S2_Rj
	.section	.rodata.str1.1
.LC26:
	.string	"time is %f\n"
.LC27:
	.string	"%u\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4865:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4865
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$2394385, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$392, %rsp
	.cfi_def_cfa_offset 448
	movq	%fs:40, %rax
	movq	%rax, 376(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	leaq	296(%rsp), %r14
	movq	%rax, 128(%rsp)
	movq	%rax, 136(%rsp)
	movq	%rax, 144(%rsp)
	movq	%rax, 152(%rsp)
	movq	%rax, 160(%rsp)
	movq	%rax, 168(%rsp)
	movq	%rax, 176(%rsp)
	movq	%rax, 184(%rsp)
	movq	%rax, 192(%rsp)
	movq	%rax, 200(%rsp)
	movq	%rax, 208(%rsp)
	movq	%rax, 216(%rsp)
	movq	%rax, 224(%rsp)
	movq	%rax, 232(%rsp)
	movq	%rax, 240(%rsp)
	movq	%rax, 248(%rsp)
	movq	%rax, 256(%rsp)
	movq	%rax, 264(%rsp)
	movq	%rax, 272(%rsp)
	movq	%rax, 280(%rsp)
	movq	%rax, 288(%rsp)
	movq	%rax, 296(%rsp)
	movq	%rax, 304(%rsp)
	movq	%rax, 312(%rsp)
	movq	%rax, 320(%rsp)
	movq	%rax, 328(%rsp)
	movq	%rax, 336(%rsp)
	leaq	272(%rsp), %rax
	movq	%rax, 40(%rsp)
	leaq	128(%rsp), %rax
	movq	40(%rsp), %rdi
	movq	%rax, (%rsp)
	leaq	152(%rsp), %rax
	movq	%rax, 8(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 16(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 24(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 32(%rsp)
.LEHB10:
	call	_ZNSt6vectorIjSaIjEE6resizeEm
	movl	$2394385, %esi
	movq	%r14, %rdi
	call	_ZNSt6vectorIjSaIjEE6resizeEm
	movq	(%rsp), %rdi
	movl	$2394386, %esi
	call	_ZNSt6vectorIjSaIjEE7reserveEm
	movq	8(%rsp), %rdi
	movl	$5021410, %esi
	call	_ZNSt6vectorIjSaIjEE7reserveEm
	movq	16(%rsp), %rdi
	movl	$2394386, %esi
	call	_ZNSt6vectorIjSaIjEE7reserveEm
	movq	24(%rsp), %rdi
	movl	$5021410, %esi
	call	_ZNSt6vectorIjSaIjEE7reserveEm
	leaq	344(%rsp), %rbp
	leaq	_ZL2fn(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1ERKS4_@PLT
.LEHE10:
	movq	24(%rsp), %r8
	movq	16(%rsp), %rcx
	movq	%rbp, %rdi
	movq	8(%rsp), %rdx
	movq	(%rsp), %rsi
.LEHB11:
	call	_Z12GraphpreprocNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERSt6vectorIjSaIjEES8_S8_S8_
.LEHE11:
	movq	%rbp, %rdi
	leaq	64(%rsp), %rbp
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movl	$9577540, %esi
	movq	%rbp, %rdi
.LEHB12:
	call	cudaMalloc@PLT
	leaq	.LC1(%rip), %rbx
	movl	%eax, %edi
	movl	$168, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	64(%rsp), %rdi
	movl	$9577540, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	%eax, %edi
	movl	$169, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movl	$8, %edx
	movq	%rbp, %rsi
	leaq	_ZL5range(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	%eax, %edi
	movl	$171, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	leaq	72(%rsp), %rbp
	movl	$9577540, %esi
	movq	%rbp, %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$173, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	72(%rsp), %rdi
	movl	$9577540, %edx
	movl	$255, %esi
	call	cudaMemset@PLT
	movl	%eax, %edi
	movl	$174, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movl	$8, %edx
	movq	%rbp, %rsi
	leaq	_ZL5pivot(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	%eax, %edi
	movl	$176, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	leaq	80(%rsp), %rdi
	movl	$9577544, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$178, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	leaq	88(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	96(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	xorl	%r12d, %r12d
	xorl	%ebx, %ebx
	leaq	.LC1(%rip), %r13
.L329:
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	incl	%r12d
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z8TRIMMINGRSt6vectorIjSaIjEES2_S2_S2_
	call	_Z10PIVOTS_SELv
	movq	32(%rsp), %r8
	movq	8(%rsp), %rsi
	movl	%ebx, %ecx
	xorl	%edx, %edx
	movq	(%rsp), %rdi
	call	_Z3BFSRSt6vectorIjSaIjEES2_jjS2_
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %ecx
	xorl	%edx, %edx
	leaq	248(%rsp), %rbp
	movq	%rbp, %r8
	call	_Z3BFSRSt6vectorIjSaIjEES2_jjS2_
	leaq	320(%rsp), %r15
	movq	32(%rsp), %rdi
	leaq	60(%rsp), %rcx
	movq	%rbp, %rsi
	movq	%r15, %rdx
	call	_Z7Update1RSt6vectorIjSaIjEES2_S2_Rj
	cmpl	$0, 60(%rsp)
	jne	.L322
	movq	80(%rsp), %rdi
	movl	$1, %ecx
	movl	$9577544, %edx
	movq	320(%rsp), %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	$197, %edx
	movq	%r13, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movl	$16777217, %edx
	movl	$2147488325, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	addq	%rdi, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 116(%rsp)
	movl	$1, 124(%rsp)
	movq	%rdi, 104(%rsp)
	movl	$1, 112(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L323
.L325:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	movl	$199, %edx
	movq	%r13, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	jmp	.L339
.L323:
	movq	80(%rsp), %rsi
	movl	$2394385, %edi
	call	_Z35__device_stub__Z14RenumberKernelmPjmPj
	jmp	.L325
.L339:
	leaq	320(%rsp), %rdi
	movl	$2394385, %esi
	call	_ZNSt6vectorIjSaIjEE2atEm
	movl	(%rax), %ebx
	decl	%ebx
	cmpl	$0, 60(%rsp)
	jne	.L322
	movl	$16777217, %edx
	movl	$2147488325, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	addq	%rdi, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 116(%rsp)
	movl	$1, 124(%rsp)
	movq	%rdi, 104(%rsp)
	movl	$1, 112(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L326
.L328:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	movl	$213, %edx
	movq	%r13, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	jmp	.L329
.L326:
	movl	$2394385, %edi
	call	_Z27__device_stub__Z9initpivotmm
	jmp	.L328
.L322:
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	96(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	96(%rsp), %rdx
	movq	88(%rsp), %rsi
	leaq	116(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC26(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	116(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	%r12d, %edx
	leaq	.LC27(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC1(%rip), %rbx
	movl	%eax, %edi
	movl	$223, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$224, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$225, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib.isra.0
.LEHE12:
	movq	%r15, %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	leaq	296(%rsp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	leaq	272(%rsp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	movq	%rbp, %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	leaq	224(%rsp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	leaq	200(%rsp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	leaq	176(%rsp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	leaq	152(%rsp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	leaq	128(%rsp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	movq	376(%rsp), %rax
	subq	%fs:40, %rax
	je	.L333
	jmp	.L337
.L335:
	endbr64
	movq	%rax, %rbx
.L330:
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L331
.L334:
	endbr64
	movq	%rax, %rbx
.L331:
	leaq	320(%rsp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	movq	%r14, %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	movq	40(%rsp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	leaq	248(%rsp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	movq	32(%rsp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	movq	24(%rsp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	movq	16(%rsp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	movq	8(%rsp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	movq	(%rsp), %rdi
	call	_ZNSt6vectorIjSaIjEED1Ev
	movq	376(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L337
	movq	%rbx, %rdi
.LEHB13:
	call	_Unwind_Resume@PLT
.LEHE13:
.L337:
	call	__stack_chk_fail@PLT
.L333:
	addq	$392, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4865:
	.section	.gcc_except_table
.LLSDA4865:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4865-.LLSDACSB4865
.LLSDACSB4865:
	.uleb128 .LEHB10-.LFB4865
	.uleb128 .LEHE10-.LEHB10
	.uleb128 .L334-.LFB4865
	.uleb128 0
	.uleb128 .LEHB11-.LFB4865
	.uleb128 .LEHE11-.LEHB11
	.uleb128 .L335-.LFB4865
	.uleb128 0
	.uleb128 .LEHB12-.LFB4865
	.uleb128 .LEHE12-.LEHB12
	.uleb128 .L334-.LFB4865
	.uleb128 0
	.uleb128 .LEHB13-.LFB4865
	.uleb128 .LEHE13-.LEHB13
	.uleb128 0
	.uleb128 0
.LLSDACSE4865:
	.section	.text.startup
	.size	main, .-main
	.section	.rodata.str1.1
.LC28:
	.string	"WikiTalk.txt"
	.section	.text.startup
	.type	_GLOBAL__sub_I_scanBlockSums, @function
_GLOBAL__sub_I_scanBlockSums:
.LFB5933:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	12+.LC28(%rip), %rdx
	leaq	16+_ZL2fn(%rip), %rdi
	leaq	-12(%rdx), %rsi
	movq	%rdi, _ZL2fn(%rip)
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	_ZL2fn(%rip), %rax
	movq	$12, 8+_ZL2fn(%rip)
	leaq	__dso_handle(%rip), %rdx
	movq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GOTPCREL(%rip), %rdi
	leaq	_ZL2fn(%rip), %rsi
	movb	$0, 12(%rax)
	popq	%rcx
	.cfi_def_cfa_offset 8
	jmp	__cxa_atexit@PLT
	.cfi_endproc
.LFE5933:
	.size	_GLOBAL__sub_I_scanBlockSums, .-_GLOBAL__sub_I_scanBlockSums
	.section	.init_array
	.align 8
	.quad	_GLOBAL__sub_I_scanBlockSums
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL5pivot
	.comm	_ZL5pivot,8,8
	.local	_ZL5range
	.comm	_ZL5range,8,8
	.local	_ZL16numActiveThreads
	.comm	_ZL16numActiveThreads,4,4
	.local	_ZL10Mterminate
	.comm	_ZL10Mterminate,4,4
	.globl	numLevelsAllocated
	.bss
	.align 4
	.type	numLevelsAllocated, @object
	.size	numLevelsAllocated, 4
numLevelsAllocated:
	.zero	4
	.globl	numEltsAllocated
	.align 4
	.type	numEltsAllocated, @object
	.size	numEltsAllocated, 4
numEltsAllocated:
	.zero	4
	.globl	scanBlockSums
	.align 8
	.type	scanBlockSums, @object
	.size	scanBlockSums, 8
scanBlockSums:
	.zero	8
	.local	_ZL2fn
	.comm	_ZL2fn,32,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	989855744
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.hidden	__dso_handle
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//#include "cuda_runtime.h"
//#include "device_launch_parameters.h"


#include <hip/hip_runtime.h>
#include <iostream>
#include <fstream>
#include <sstream>
#include <string>
#include <vector>
#include <map>
#include <iterator>
#include <algorithm>
#include <assert.h>
//#include <time.h>

using namespace std;


const int N = 2394385;
const int M = 5021410;
const int BLOCK_SIZE = 256;

const unsigned MAX_NUM = 4294967295;

const int NUM_BANKS = 16;
const int LOG_NUM_BANKS = 4;
//const string fn("test.txt");
const string fn("WikiTalk.txt");
//const string fn("soc-LiveJournal1.txt");

unsigned **scanBlockSums;
unsigned numEltsAllocated = 0;
unsigned numLevelsAllocated = 0;

__device__  unsigned Mterminate;
__device__ unsigned numActiveThreads;
__device__ unsigned *range;
__device__ unsigned *pivot;

#define FALSE 0u
#define  TRUE 1u

#define CONFLICT_FREE_OFFSET(index) ((index) >> LOG_NUM_BANKS)
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort = true) {
	if (code != hipSuccess) {
		fprintf(stderr, "Error: %s\nFile %s, line %d\n", hipGetErrorString(code), file, line);
		exit(code);
	}
}

inline
bool isPowerOfTwo(int n) {
	return (n & (n - 1)) == 0;
}

inline
int floorPow2(int n) {
	int exp;
	frexp((float)n, &exp);
	return 1 << (exp - 1);
}

template <bool isNP2>
__device__
void loadSharedChunkFromMem(unsigned *s_data, const unsigned *idata, int n, int baseIndex, int& ai, int& bi, int& mem_ai, int& mem_bi, int& bankOffsetA, int& bankOffsetB);
template <bool isNP2>
__device__
void storeSharedChunkToMem(unsigned* odata, const unsigned* s_data, int n, int ai, int bi, int mem_ai, int mem_bi, int bankOffsetA, int bankOffsetB);
template <bool storeSum>
__device__
void clearLastElement(unsigned* s_data, unsigned *blockSums, int blockIndex);
__device__
unsigned int buildSum(unsigned *s_data);
__device__
void scanRootToLeaves(unsigned *s_data, unsigned int stride);
template <bool storeSum>
__device__
void prescanBlock(unsigned *data, int blockIndex, unsigned *blockSums);
template <bool storeSum, bool isNP2>
__global__
void prescan(unsigned *odata, const unsigned *idata, unsigned *blockSums, int n, int blockIndex, int baseIndex);
__global__
void uniformAdd(unsigned *data, unsigned *uniforms, int n, int blockOffset, int baseIndex);

__global__
void BFSKernel1(
size_t graphSize, unsigned *activeMask, unsigned *V, unsigned *E,
unsigned *F, unsigned *X,unsigned *Fu);
__global__
void BFSKernel2(size_t graphSize, unsigned *F, unsigned *X, unsigned *Fu);
__global__
void TRIMKernel(size_t graphSize,unsigned *VF,unsigned *EF,unsigned *VB,unsigned *EB);
/*__global__
void getActiveMaskTemp(size_t graphSize, unsigned *F, unsigned *activeMask);*/
__global__
void compactSIMD(size_t N, unsigned *prefixSums, unsigned *activeMask, size_t blockSize);
__global__
void PIVOTS_SEL_Kernel(size_t graphSize);
__global__
void UpdateKernel(size_t graphSize, unsigned *visF,unsigned *visB);
__global__
void UpdateKernel1(size_t graphSize,unsigned *visF,unsigned *visB,unsigned *ac);
__global__
void RenumberKernel(size_t graphSize,unsigned *prefixsum);
__global__
void initpivot(size_t graphSize);
__global__
void ReadPivot(size_t graphSize, unsigned *pivot_);

__host__
void setUInt(unsigned *address, unsigned value);
__host__
void Graphpreproc(const string filename, vector<unsigned> &VF, vector<unsigned> &EF, vector<unsigned> &VB, vector<unsigned> &EB);
__host__
void BFS(vector<unsigned> &V, vector<unsigned> &E, unsigned index_s, unsigned index_e, vector<unsigned> &visited);
__host__
void TRIMMING(vector<unsigned> &VF, vector<unsigned> &EF, vector<unsigned> &VB, vector<unsigned> &EB);
__host__
void PIVOTS_SEL();
__host__
void Update(vector<unsigned> &visF,vector<unsigned> &visB,unsigned &termin);
__host__
void Update1(vector<unsigned> &visF,vector<unsigned> &visB,vector<unsigned> &prefixsum, unsigned &termin);
__host__
void preallocBlockSums(unsigned maxNumElements);
__host__
void deallocBlockSums();
__host__
void prescanArrayRecursive(unsigned *outArray, const unsigned *inArray, int numElements, int level);
__host__
void prescanArray(unsigned *outArray, unsigned *inArray, int numElements);

int main()
{
	vector<unsigned> VF, EF, VB, EB, visF, visB,range_,pivot_,prefixsum_;
	vector<unsigned>::iterator itr;

	/*ofstream out("out1.txt");
	if(!out){  
    	cout << "Unable to open outfile";  
        exit(1); // terminate with error  
    }*/
  

	unsigned termin;

	unsigned *d_r,*d_p;
	unsigned *d_prefixsum;

	range_.resize(N);
	pivot_.resize(N);
	//prefixsum_.resize(N+1);
	VF.reserve(N + 1);
	EF.reserve(M);
	VB.reserve(N + 1);
	EB.reserve(M);
	Graphpreproc(fn, VF, EF, VB, EB);

	unsigned index_s = 0;
	unsigned index_e = 0;
	unsigned loop = 0;
 

	const size_t gridSizeK2 =
			(N + BLOCK_SIZE - 1) / BLOCK_SIZE;


	gpuErrchk(hipMalloc(&d_r, N*sizeof(unsigned)));
	gpuErrchk(hipMemset(d_r, FALSE, N*sizeof(unsigned)));
	//gpuErrchk(cudaMemcpyToSymbol(range, &d_r, sizeof(unsigned *),size_t(0), cudaMemcpyHostToDevice));
	gpuErrchk(hipMemcpyToSymbol(HIP_SYMBOL(range), &d_r, sizeof(d_r)));

	gpuErrchk(hipMalloc(&d_p, N*sizeof(unsigned)));
	gpuErrchk(hipMemset(d_p, 255, N*sizeof(unsigned)));
	//gpuErrchk(cudaMemcpyToSymbol(pivot, &d_p, sizeof(unsigned *),size_t(0), cudaMemcpyHostToDevice));
	gpuErrchk(hipMemcpyToSymbol(HIP_SYMBOL(pivot), &d_p, sizeof(d_p)));

	gpuErrchk(hipMalloc(&d_prefixsum, (N+1)*sizeof(unsigned)));

	hipEvent_t start;
    	hipEvent_t stop;
    	hipEventCreate(&start);
    	hipEventCreate(&stop);
    	hipEventRecord(start, 0);
	while(true){
		loop++;
		TRIMMING(VF,EF,VB,EB);

		PIVOTS_SEL();

		BFS(VF, EF, index_s, index_e, visF);
		BFS(VB, EB, index_s, index_e ,visB);

		if(true){
			Update1(visF,visB,prefixsum_,termin);
			if(termin == FALSE){
				gpuErrchk(hipMemcpy(d_prefixsum, prefixsum_.data(), (N+1)*sizeof(unsigned), hipMemcpyHostToDevice));
				RenumberKernel<<<gridSizeK2,BLOCK_SIZE>>>(N,d_prefixsum);
				gpuErrchk(hipDeviceSynchronize());
				index_e = prefixsum_.at(N) - 1;
			}
		}
		else{
			Update(visF,visB,termin);
			index_e = 3 * index_e + 2;
		}
		

		if(termin)
			break;
		initpivot<<<gridSizeK2,BLOCK_SIZE>>>(N);

		gpuErrchk(hipDeviceSynchronize());
	}

	hipEventRecord(stop,0);
    	hipEventSynchronize(stop);
    	float time;
    	hipEventElapsedTime(&time,start,stop);
   	printf("time is %f\n",time);
	printf("%u\n", loop);
	
	gpuErrchk(hipFree(d_r));
	gpuErrchk(hipFree(d_p));
	gpuErrchk(hipFree(d_prefixsum));
	//out.close();
	return 0;
}

__host__
void setUInt(unsigned *address, unsigned value) {
	gpuErrchk(hipMemcpy(address, &value, sizeof(unsigned), hipMemcpyHostToDevice));
}

__host__
void Graphpreproc(const string filename, vector<unsigned> &VF, vector<unsigned> &EF, vector<unsigned> &VB, vector<unsigned> &EB)
{
	ifstream in_f;
	vector<unsigned> t;
	vector<unsigned>::iterator itr;
	multimap<const unsigned, unsigned> m;
	multimap<const unsigned, unsigned>::iterator mitr;
	unsigned count = 0;
	in_f.open(filename.c_str(), ios::in);
	while (!in_f.eof()){
		string temp, s1, s2;
		stringstream ss1, ss2;
		unsigned t1, t2;
		getline(in_f, temp);
		if(temp.length() == 0)
			continue;
		if (*(temp.begin()) == '#')
			continue;
		s1 = string(temp, 0, temp.find_first_of('\t'));
		s2 = string(temp, temp.find_first_not_of('\t', temp.find_first_of('\t')), temp.find_last_not_of('\t'));
		ss1 << s1;
		ss1 >> t1;
		ss2 << s2;
		ss2 >> t2;
		t.push_back(t1);
		m.insert(make_pair(t2, t1));
		EF.push_back(t2);
	}

	itr = t.begin();
	VF.push_back(0);
	for (int i = 0; i < N - 1; i++){
		while ((itr != t.end()) && (*itr == i)){
			count++;
			itr++;
		}
		count += VF.at(i);
		VF.push_back(count);
		count = 0;
	}
	VF.push_back(M);

	mitr = m.begin();
	VB.push_back(0);
	for (int i = 0; i < N - 1; i++){
		while ((mitr != m.end()) && ((mitr->first) == i)){
			count++;
			mitr++;
		}
		count += VB.at(i);
		VB.push_back(count);
		count = 0;
	}
	VB.push_back(M);
	for (mitr = m.begin(); mitr != m.end(); mitr++){
		EB.push_back(mitr->second);
	}
}

__global__
void BFSKernel1(
size_t graphSize, unsigned *activeMask, unsigned *V, unsigned *E,
unsigned *F, unsigned *X,unsigned *Fu) {

	unsigned activeMaskIdx = blockIdx.x * BLOCK_SIZE + threadIdx.x;

	// If vertex is active at current iteration
	if (activeMaskIdx < numActiveThreads) {

		unsigned v = activeMask[activeMaskIdx];

		// Remove v from current frontier
		F[v] = FALSE;

		// Iterate over v's neighbors
		for (unsigned edge = V[v]; edge < V[v + 1]; ++edge) {
			unsigned neighbor = E[edge];

			// If neighbor wasn't visited
			if(range[v] == range[neighbor]){
				if (X[neighbor] == FALSE){
					//C[neighbor] = C[v] + 1;
					Fu[neighbor] = TRUE;
				}
			}
		}
	}
}

__global__
void BFSKernel2(size_t graphSize, unsigned *F, unsigned *X, unsigned *Fu) {

	int v = blockIdx.x * BLOCK_SIZE + threadIdx.x;

	// If vertex v exists and has recently joined the frontier
	if (v < graphSize && Fu[v]) {
		// Copy the new frontier into F
		F[v] = TRUE;
		// Set v as visited
		X[v] = TRUE;
		// Clean up the new frontier
		Fu[v] = FALSE;

		Mterminate = FALSE;
	}
}

__global__
void TRIMKernel(size_t graphSize,unsigned *VF,unsigned *EF,unsigned *VB,unsigned *EB)
{
	int v = blockIdx.x * BLOCK_SIZE + threadIdx.x;
	bool elim;

	if(v < graphSize){
		if(range[v] != MAX_NUM){
			elim = true;

			for (unsigned edge = VF[v]; edge < VF[v + 1]; ++edge) {
				unsigned neighbor = EF[edge];
				if(range[neighbor] == range[v]){
					elim = false;
					break;
				}
			}
			if(elim == false){
				elim = true;
				for (unsigned edge = VB[v]; edge < VB[v + 1]; ++edge) {
					unsigned neighbor = EB[edge];
					if(range[neighbor] == range[v]){
						elim = false;
						break;
					}
				}
			}
			if(elim == true){
				range[v] = MAX_NUM;
				Mterminate = FALSE;
			}
		}
	}
}

__global__
void PIVOTS_SEL_Kernel(size_t graphSize)
{
	int v = blockIdx.x * BLOCK_SIZE + threadIdx.x;

	if(v < graphSize){
		if(range[v] != MAX_NUM)
			pivot[range[v]] = v;
	}
}

__global__
void UpdateKernel(size_t graphSize,unsigned *visF,unsigned *visB)
{
	int v = blockIdx.x * BLOCK_SIZE + threadIdx.x;

	if(v < graphSize){
		if(range[v] != MAX_NUM){
			if(visF[v] == TRUE){
				if(visB[v] == TRUE){
					range[v] = MAX_NUM;
				}
				else if(visB[v] == FALSE){
					range[v] = 3*range[v];
					Mterminate = FALSE;
				}
			}
			else if(visF[v] == FALSE){
				if(visB[v] == TRUE){
					range[v] = 3*range[v] + 1;
					Mterminate = FALSE;
				}
				else if(visB[v] == FALSE){
					range[v] = 3*range[v] + 2;
					Mterminate = FALSE;
				}
			}
		}
	}
}

__global__
void UpdateKernel1(size_t graphSize,unsigned *visF,unsigned *visB,unsigned *ac)
{
	int v = blockIdx.x * BLOCK_SIZE + threadIdx.x;

	if(v < graphSize){
		if(range[v] != MAX_NUM){
			if(visF[v] == TRUE){
				if(visB[v] == TRUE){
					range[v] = MAX_NUM;
				}
				else if(visB[v] == FALSE){
					range[v] = 3*range[v];
					ac[range[v]] = TRUE;
					Mterminate = FALSE;
				}
			}
			else if(visF[v] == FALSE){
				if(visB[v] == TRUE){
					range[v] = 3*range[v] + 1;
					ac[range[v]] = TRUE;
					Mterminate = FALSE;
				}
				else if(visB[v] == FALSE){
					range[v] = 3*range[v] + 2;
					ac[range[v]] = TRUE;
					Mterminate = FALSE;
				}
			}
		}
	}
}

__global__
void RenumberKernel(size_t graphSize,unsigned *prefixsum)
{
	int v = blockIdx.x * BLOCK_SIZE + threadIdx.x;

	if(v < graphSize){
		if(range[v] != MAX_NUM)
			range[v] = prefixsum[range[v]];
	}
}

__global__
void initpivot(size_t graphSize)
{
	int v = blockIdx.x * BLOCK_SIZE + threadIdx.x;

	if(v < graphSize){
		pivot[v] = MAX_NUM;
	}
}

__global__
void ReadPivot(size_t graphSize ,unsigned *pivot_)
{
	int v = blockIdx.x * BLOCK_SIZE + threadIdx.x;

	if(v < graphSize){
		pivot_[v] = pivot[v];
	}
}



// Very slow but correct "active mask" calculation; for debugging
/*__global__
void getActiveMaskTemp(size_t graphSize, unsigned *F, unsigned *activeMask) {

	numActiveThreads = 0;
	for (int i = 0; i < graphSize; ++i) {
		if (F[i]) {
			activeMask[numActiveThreads] = i;
			++numActiveThreads;
		}
	}
}*/

__global__
void compactSIMD(size_t N, unsigned *prefixSums, unsigned *activeMask, size_t blockSize) {

	size_t v = blockIdx.x * blockSize + threadIdx.x;

	if (v < N) {
		// Can possibly be accelerated by using shared memory
		if (prefixSums[v + 1] != prefixSums[v]) {
			activeMask[prefixSums[v]] = v;
		}
	}
}

__host__
void BFS(vector<unsigned> &V, vector<unsigned> &E, unsigned index_s, unsigned index_e, vector<unsigned> &visited)
{
	assert(sizeof(unsigned) == 4);

	unsigned size_sub = index_e - index_s + 1;
	visited.clear();
	visited.resize(N);

	vector<unsigned> pivot_h;
	pivot_h.resize(size_sub);

	unsigned *d_V, *d_E, *d_p;
	unsigned *d_F, *d_X, *d_Fu;
	unsigned *activeMask, *prefixSums;
	//unsigned **prefixSums;
	size_t memSize = (N + 1) * sizeof(unsigned);
	size_t memSizeE = M * sizeof(unsigned);

	gpuErrchk(hipMalloc(&d_F, memSize));
	gpuErrchk(hipMemset(d_F, FALSE, memSize));
	//setUInt(d_F + piv, TRUE); // add source to frontier

	gpuErrchk(hipMalloc(&d_X, memSize));
	gpuErrchk(hipMemset(d_X, FALSE, memSize));
	//setUInt(d_X + sourceVertex, TRUE); // set source as visited

	gpuErrchk(hipMalloc(&d_Fu, memSize));
	gpuErrchk(hipMemset(d_Fu, FALSE, memSize));

	gpuErrchk(hipMalloc(&d_V, memSize));
	gpuErrchk(hipMemcpy(d_V, V.data(), memSize, hipMemcpyHostToDevice));

	gpuErrchk(hipMalloc(&d_E, memSizeE));
	gpuErrchk(hipMemcpy(d_E, E.data(), memSizeE, hipMemcpyHostToDevice));

	gpuErrchk(hipMalloc(&activeMask, memSize));
	//setUInt(activeMask + 0, sourceVertex); // set thread #source as active
	gpuErrchk(hipMalloc(&d_p, size_sub*sizeof(unsigned)));
	//gpuErrchk(cudaMemset(d_p, FALSE, N*sizeof(unsigned)));



	gpuErrchk(hipMalloc(&prefixSums, memSize));
	preallocBlockSums(N + 1);

	const size_t gridSizeK2 =
			(N + BLOCK_SIZE - 1) / BLOCK_SIZE;

	const size_t gridSizeK3 =
			(size_sub + BLOCK_SIZE - 1) / BLOCK_SIZE;

	ReadPivot<<<gridSizeK3,BLOCK_SIZE>>>(size_sub,d_p);
	gpuErrchk(hipDeviceSynchronize());
	hipMemcpy(pivot_h.data(), d_p, size_sub*sizeof(unsigned), hipMemcpyDeviceToHost);

	unsigned numActiveThreadsHost = 0;
	for(int i = index_s;i <= index_e;i++){
		if(pivot_h.at(i) == MAX_NUM)
			continue;
		setUInt(d_F + pivot_h.at(i), TRUE);
		setUInt(d_X + pivot_h.at(i), TRUE);
		setUInt(activeMask + numActiveThreadsHost, pivot_h.at(i));
		numActiveThreadsHost++;
	}

	gpuErrchk(hipMemcpyToSymbol(HIP_SYMBOL(numActiveThreads), &numActiveThreadsHost, sizeof(unsigned)));
	// Main loop

	/*const size_t prefixSumGridSize =
		(N + BLOCK_SIZE - 1) / BLOCK_SIZE;*/

	

	while (true) {

		// Terminate <- TRUE
		unsigned terminateHost = TRUE;

		gpuErrchk(hipMemcpyToSymbol(HIP_SYMBOL(Mterminate), &terminateHost, sizeof(unsigned)));

		// Kernel 1: need to assign ACTIVE vertices to SIMD lanes (threads)
		//gpuErrchk(cudaMemcpyFromSymbol(&numActiveThreadsHost, numActiveThreads, sizeof(unsigned)));
		const size_t gridSizeK1 =
			(numActiveThreadsHost + BLOCK_SIZE - 1) / BLOCK_SIZE;

		// launch kernel 1
		BFSKernel1 <<<gridSizeK1, BLOCK_SIZE >>> (N,activeMask, d_V, d_E, d_F, d_X,d_Fu);
		//gpuErrchk(cudaPeekAtLastError());
		gpuErrchk(hipDeviceSynchronize());

		// Kernel 2: need to assign ALL vertices to SIMD lanes

		// launch kernel 2
		BFSKernel2 <<<gridSizeK2, BLOCK_SIZE >>> (N, d_F, d_X, d_Fu);
		//gpuErrchk(cudaPeekAtLastError());
		gpuErrchk(hipDeviceSynchronize());


		gpuErrchk(hipMemcpyFromSymbol(&terminateHost, HIP_SYMBOL(Mterminate), sizeof(unsigned)));

		if (terminateHost) {
			break;
		}
		else {
			// Get prefix sums of F
			prescanArray(prefixSums, d_F, N + 1);
			//cudaMemcpy(&numActiveThreads, prefixSums + N, sizeof(unsigned), cudaMemcpyDeviceToDevice);
			hipMemcpy(&numActiveThreadsHost, prefixSums + N, sizeof(unsigned), hipMemcpyDeviceToHost);
           	gpuErrchk(hipMemcpyToSymbol(HIP_SYMBOL(numActiveThreads), &numActiveThreadsHost, sizeof(unsigned)));

			compactSIMD <<<gridSizeK2, BLOCK_SIZE>>> (N, prefixSums, activeMask, BLOCK_SIZE);
			//gpuErrchk(cudaPeekAtLastError());
			//getActiveMaskTemp<<<1,1>>>(N,d_F,activeMask);
			gpuErrchk(hipDeviceSynchronize());

			//gpuErrchk(cudaPeekAtLastError());
		}
	}

	// Download result

	//gpuErrchk(cudaMemcpy(distances.data(), d_C, memSize - sizeof(unsigned), cudaMemcpyDeviceToHost));
	gpuErrchk(hipMemcpy(visited.data(), d_X, memSize - sizeof(unsigned), hipMemcpyDeviceToHost));

	// Free memory

	gpuErrchk(hipFree(d_F));
	gpuErrchk(hipFree(d_X));
	gpuErrchk(hipFree(d_Fu));
	gpuErrchk(hipFree(d_V));
	gpuErrchk(hipFree(d_E));
	gpuErrchk(hipFree(d_p));
	gpuErrchk(hipFree(activeMask));
	deallocBlockSums();
	gpuErrchk(hipFree(prefixSums));
}

__host__
void TRIMMING(vector<unsigned> &VF, vector<unsigned> &EF, vector<unsigned> &VB, vector<unsigned> &EB)
{
	unsigned *d_VF, *d_EF, *d_VB, *d_EB;

	size_t memSize = (N + 1) * sizeof(unsigned);
	size_t memSizeE = M * sizeof(unsigned);

	gpuErrchk(hipMalloc(&d_VF, memSize));
	gpuErrchk(hipMemcpy(d_VF, VF.data(), memSize, hipMemcpyHostToDevice));

	gpuErrchk(hipMalloc(&d_EF, memSizeE));
	gpuErrchk(hipMemcpy(d_EF, EF.data(), memSizeE, hipMemcpyHostToDevice));

	gpuErrchk(hipMalloc(&d_VB, memSize));
	gpuErrchk(hipMemcpy(d_VB, VB.data(), memSize, hipMemcpyHostToDevice));

	gpuErrchk(hipMalloc(&d_EB, memSizeE));
	gpuErrchk(hipMemcpy(d_EB, EB.data(), memSizeE, hipMemcpyHostToDevice));

	const size_t gridSizeK2 =
			(N + BLOCK_SIZE - 1) / BLOCK_SIZE;

	while (true) {

	// Terminate <- TRUE
		unsigned terminateHost = TRUE;

		gpuErrchk(hipMemcpyToSymbol(HIP_SYMBOL(Mterminate), &terminateHost, sizeof(unsigned)));

		
	// launch kernel 2
		TRIMKernel <<<gridSizeK2, BLOCK_SIZE >>> (N, d_VF, d_EF, d_VB, d_EB);
	//gpuErrchk(cudaPeekAtLastError());
		gpuErrchk(hipDeviceSynchronize());


		gpuErrchk(hipMemcpyFromSymbol(&terminateHost, HIP_SYMBOL(Mterminate), sizeof(unsigned)));

		if (terminateHost) {
			break;
		}
	}
	
	gpuErrchk(hipFree(d_VF));
	gpuErrchk(hipFree(d_EF));
	gpuErrchk(hipFree(d_VB));
	gpuErrchk(hipFree(d_EB));
}

__host__
void PIVOTS_SEL()
{
	const size_t gridSizeK2 =
			(N + BLOCK_SIZE - 1) / BLOCK_SIZE;

	PIVOTS_SEL_Kernel<<<gridSizeK2, BLOCK_SIZE>>>(N);
	//gpuErrchk(cudaGetLastError());

	gpuErrchk(hipDeviceSynchronize());

}

__host__
void Update(vector<unsigned> &visF,vector<unsigned> &visB,unsigned &termin)
{
	unsigned *d_vf,*d_vb;

	size_t memSize = N * sizeof(unsigned);

	gpuErrchk(hipMalloc(&d_vf, memSize));
	gpuErrchk(hipMemcpy(d_vf, visF.data(), memSize, hipMemcpyHostToDevice));

	gpuErrchk(hipMalloc(&d_vb, memSize));
	gpuErrchk(hipMemcpy(d_vb, visB.data(), memSize, hipMemcpyHostToDevice));


	// Terminate <- TRUE
	termin = TRUE;

	gpuErrchk(hipMemcpyToSymbol(HIP_SYMBOL(Mterminate), &termin, sizeof(unsigned)));

	const size_t gridSizeK2 =
			(N + BLOCK_SIZE - 1) / BLOCK_SIZE;

	UpdateKernel<<<gridSizeK2, BLOCK_SIZE>>>(N,d_vf,d_vb);

	gpuErrchk(hipDeviceSynchronize());

	gpuErrchk(hipMemcpyFromSymbol(&termin, HIP_SYMBOL(Mterminate), sizeof(unsigned)));

	gpuErrchk(hipFree(d_vf));
	gpuErrchk(hipFree(d_vb));
}

__host__
void Update1(vector<unsigned> &visF,vector<unsigned> &visB,vector<unsigned> &prefixsum, unsigned &termin)
{
	prefixsum.clear();
	prefixsum.resize(N+1);

	unsigned *d_vf,*d_vb,*d_ac;
	unsigned *prefixSums;

	size_t memSize = (N + 1) * sizeof(unsigned);

	gpuErrchk(hipMalloc(&d_ac, memSize));
	gpuErrchk(hipMemset(d_ac, FALSE, memSize));

	gpuErrchk(hipMalloc(&d_vf, memSize));
	gpuErrchk(hipMemcpy(d_vf, visF.data(), memSize - sizeof(unsigned), hipMemcpyHostToDevice));

	gpuErrchk(hipMalloc(&d_vb, memSize));
	gpuErrchk(hipMemcpy(d_vb, visB.data(), memSize - sizeof(unsigned), hipMemcpyHostToDevice));

	gpuErrchk(hipMalloc(&prefixSums, memSize));
	preallocBlockSums(N + 1);


	// Terminate <- TRUE
	termin = TRUE;

	gpuErrchk(hipMemcpyToSymbol(HIP_SYMBOL(Mterminate), &termin, sizeof(unsigned)));

	const size_t gridSizeK2 =
			(N + BLOCK_SIZE - 1) / BLOCK_SIZE;

	UpdateKernel1<<<gridSizeK2, BLOCK_SIZE>>>(N,d_vf,d_vb,d_ac);

	gpuErrchk(hipDeviceSynchronize());

	gpuErrchk(hipMemcpyFromSymbol(&termin, HIP_SYMBOL(Mterminate), sizeof(unsigned)));

	if(termin == FALSE){
		prescanArray(prefixSums, d_ac, N + 1);
		//gpuErrchk(cudaMemcpyToSymbol(prefixsum, &prefixSums, sizeof(unsigned *),size_t(0), cudaMemcpyHostToDevice));
		gpuErrchk(hipMemcpy(prefixsum.data(), prefixSums, memSize, hipMemcpyDeviceToHost));
	}

	gpuErrchk(hipFree(d_vf));
	gpuErrchk(hipFree(d_vb));
	gpuErrchk(hipFree(d_ac));
	deallocBlockSums();
	gpuErrchk(hipFree(prefixSums));
}


__host__
void preallocBlockSums(unsigned maxNumElements) {
	numEltsAllocated = maxNumElements;

	unsigned blockSize = BLOCK_SIZE;
	unsigned numElts = maxNumElements;

	int level = 0;

	do {
		unsigned numBlocks =
			max(1, (int)ceil((float)numElts / (2.f * blockSize)));
		if (numBlocks > 1) {
			level++;
		}
		numElts = numBlocks;
	} while (numElts > 1);

	scanBlockSums = (unsigned**)malloc(level * sizeof(unsigned*));
	numLevelsAllocated = level;

	numElts = maxNumElements;
	level = 0;

	do {
		unsigned numBlocks =
			max(1, (int)ceil((float)numElts / (2.f * blockSize)));
		if (numBlocks > 1) {
			gpuErrchk(hipMalloc(&scanBlockSums[level++], numBlocks * sizeof(unsigned)));
		}
		numElts = numBlocks;
	} while (numElts > 1);
}

__host__
void deallocBlockSums() {
	for (unsigned i = 0; i < numLevelsAllocated; i++) {
		hipFree(scanBlockSums[i]);
	}

	free(scanBlockSums);

	scanBlockSums = 0;
	numEltsAllocated = 0;
	numLevelsAllocated = 0;
}

__host__
void prescanArrayRecursive(unsigned *outArray,
const unsigned *inArray,
int numElements,
int level) {

	unsigned blockSize = BLOCK_SIZE;
	unsigned numBlocks =
		max(1, (int)ceil((float)numElements / (2.f * blockSize)));
	unsigned numThreads;

	if (numBlocks > 1)
		numThreads = blockSize;
	else if (isPowerOfTwo(numElements))
		numThreads = numElements / 2;
	else
		numThreads = floorPow2(numElements);

	unsigned numEltsPerBlock = numThreads * 2;

	unsigned numEltsLastBlock =
		numElements - (numBlocks - 1) * numEltsPerBlock;
	unsigned numThreadsLastBlock = max(1u, numEltsLastBlock / 2);
	unsigned np2LastBlock = 0;
	unsigned sharedMemLastBlock = 0;

	if (numEltsLastBlock != numEltsPerBlock) {
		np2LastBlock = 1;

		if (!isPowerOfTwo(numEltsLastBlock))
			numThreadsLastBlock = floorPow2(numEltsLastBlock);

		unsigned extraSpace = (2 * numThreadsLastBlock) / NUM_BANKS;
		sharedMemLastBlock =
			sizeof(unsigned)* (2 * numThreadsLastBlock + extraSpace);
	}

	// Avoid shared memory bank conflicts
	unsigned extraSpace = numEltsPerBlock / NUM_BANKS;
	unsigned sharedMemSize =
		sizeof(unsigned)* (numEltsPerBlock + extraSpace);

	dim3 grid(max(1u, numBlocks - np2LastBlock), 1, 1);
	dim3 threads(numThreads, 1, 1);

	// Main action

	if (numBlocks > 1) {
		prescan<true, false> <<< grid, threads, sharedMemSize >>> (
			outArray, inArray, scanBlockSums[level], numThreads * 2, 0, 0);

		if (np2LastBlock) {
			prescan<true, true> <<< 1, numThreadsLastBlock, sharedMemLastBlock >>> (
				outArray, inArray, scanBlockSums[level], numEltsLastBlock,
				numBlocks - 1, numElements - numEltsLastBlock);
		}

		prescanArrayRecursive(scanBlockSums[level], scanBlockSums[level], numBlocks, level + 1);

		uniformAdd <<< grid, threads >>> (
			outArray, scanBlockSums[level], numElements - numEltsLastBlock, 0, 0);

		if (np2LastBlock) {
			uniformAdd <<<1, numThreadsLastBlock >>> (
				outArray, scanBlockSums[level], numEltsLastBlock,
				numBlocks - 1, numElements - numEltsLastBlock);
		}
	}
	else if (isPowerOfTwo(numElements)) {
		prescan<false, false> <<<grid, threads, sharedMemSize >>> (
			outArray, inArray, 0, numThreads * 2, 0, 0);
	}
	else {
		prescan<false, true> <<<grid, threads, sharedMemSize >>> (
			outArray, inArray, 0, numElements, 0, 0);
	}
}

__host__
void prescanArray(unsigned *outArray, unsigned *inArray, int numElements) {
	prescanArrayRecursive(outArray, inArray, numElements, 0);
}

template <bool isNP2>
__device__ void loadSharedChunkFromMem(unsigned *s_data,
	const unsigned *idata,
	int n, int baseIndex,
	int& ai, int& bi,
	int& mem_ai, int& mem_bi,
	int& bankOffsetA, int& bankOffsetB) {
	int thid = threadIdx.x;
	mem_ai = baseIndex + threadIdx.x;
	mem_bi = mem_ai + blockDim.x;

	ai = thid;
	bi = thid + blockDim.x;

	bankOffsetA = CONFLICT_FREE_OFFSET(ai);
	bankOffsetB = CONFLICT_FREE_OFFSET(bi);

	s_data[ai + bankOffsetA] = idata[mem_ai];

	if (isNP2) {
		s_data[bi + bankOffsetB] = (bi < n) ? idata[mem_bi] : 0;
	}
	else {
		s_data[bi + bankOffsetB] = idata[mem_bi];
	}
}

template <bool isNP2>
__device__
void storeSharedChunkToMem(unsigned* odata,
const unsigned* s_data,
int n,
int ai, int bi,
int mem_ai, int mem_bi,
int bankOffsetA, int bankOffsetB) {
	__syncthreads();

	odata[mem_ai] = s_data[ai + bankOffsetA];
	if (isNP2) {
		if (bi < n)
			odata[mem_bi] = s_data[bi + bankOffsetB];
	}
	else {
		odata[mem_bi] = s_data[bi + bankOffsetB];
	}
}

template <bool storeSum>
__device__
void clearLastElement(unsigned* s_data,
unsigned *blockSums,
int blockIndex) {
	if (threadIdx.x == 0) {
		int index = (blockDim.x << 1) - 1;
		index += CONFLICT_FREE_OFFSET(index);

		if (storeSum) {
			blockSums[blockIndex] = s_data[index];
		}

		s_data[index] = 0;
	}
}

__device__
unsigned int buildSum(unsigned *s_data) {
	unsigned int thid = threadIdx.x;
	unsigned int stride = 1;

	for (int d = blockDim.x; d > 0; d >>= 1) {
		__syncthreads();

		if (thid < d) {
			int i = __mul24(__mul24(2, stride), thid);
			int ai = i + stride - 1;
			int bi = ai + stride;

			ai += CONFLICT_FREE_OFFSET(ai);
			bi += CONFLICT_FREE_OFFSET(bi);

			s_data[bi] += s_data[ai];
		}

		stride *= 2;
	}

	return stride;
}

__device__
void scanRootToLeaves(unsigned *s_data, unsigned int stride) {
	unsigned int thid = threadIdx.x;

	for (int d = 1; d <= blockDim.x; d *= 2) {
		stride >>= 1;

		__syncthreads();

		if (thid < d)
		{
			int i = __mul24(__mul24(2, stride), thid);
			int ai = i + stride - 1;
			int bi = ai + stride;

			ai += CONFLICT_FREE_OFFSET(ai);
			bi += CONFLICT_FREE_OFFSET(bi);

			unsigned t = s_data[ai];
			s_data[ai] = s_data[bi];
			s_data[bi] += t;
		}
	}
}

template <bool storeSum>
__device__
void prescanBlock(unsigned *data, int blockIndex, unsigned *blockSums) {
	int stride = buildSum(data);
	clearLastElement<storeSum>(data, blockSums,
		(blockIndex == 0) ? blockIdx.x : blockIndex);
	scanRootToLeaves(data, stride);
}

template <bool storeSum, bool isNP2>
__global__
void prescan(unsigned *odata,
const unsigned *idata,
unsigned *blockSums,
int n,
int blockIndex,
int baseIndex) {
	int ai, bi, mem_ai, mem_bi, bankOffsetA, bankOffsetB;
	extern __shared__ unsigned s_data[];

	loadSharedChunkFromMem<isNP2>(s_data, idata, n,
		(baseIndex == 0) ?
		__mul24(blockIdx.x, (blockDim.x << 1)) : baseIndex,
		ai, bi, mem_ai, mem_bi,
		bankOffsetA, bankOffsetB);

	prescanBlock<storeSum>(s_data, blockIndex, blockSums);

	storeSharedChunkToMem<isNP2>(odata, s_data, n,
		ai, bi, mem_ai, mem_bi,
		bankOffsetA, bankOffsetB);
}

__global__
void uniformAdd(unsigned *data,
unsigned *uniforms,
int n,
int blockOffset,
int baseIndex) {
	__shared__ unsigned uni;
	if (threadIdx.x == 0)
		uni = uniforms[blockIdx.x + blockOffset];

	unsigned int address = __mul24(blockIdx.x, (blockDim.x << 1)) + baseIndex + threadIdx.x;

	__syncthreads();

	data[address] += uni;
	data[address + blockDim.x] += (threadIdx.x + blockDim.x < n) * uni;
}

	.text
	.file	"scc2.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$376, %rsp                      # imm = 0x178
	.cfi_def_cfa_offset 432
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorps	%xmm0, %xmm0
	movaps	%xmm0, 160(%rsp)
	xorl	%eax, %eax
	movq	%rax, 176(%rsp)
	movq	%rax, 144(%rsp)
	movaps	%xmm0, 128(%rsp)
	movq	%rax, 112(%rsp)
	movaps	%xmm0, 96(%rsp)
	movq	%rax, 208(%rsp)
	movaps	%xmm0, 192(%rsp)
	movq	%rax, 304(%rsp)
	movaps	%xmm0, 288(%rsp)
	movq	%rax, 272(%rsp)
	movaps	%xmm0, 256(%rsp)
	leaq	352(%rsp), %rdi
	movq	%rax, 16(%rdi)
	movaps	%xmm0, (%rdi)
	movq	%rax, 240(%rsp)
	movaps	%xmm0, 224(%rsp)
	movq	%rax, 80(%rsp)
	movaps	%xmm0, 64(%rsp)
.Ltmp0:
	movl	$2394385, %esi                  # imm = 0x248911
	callq	_ZNSt6vectorIjSaIjEE6resizeEm
.Ltmp1:
# %bb.1:
.Ltmp2:
	leaq	224(%rsp), %rdi
	movl	$2394385, %esi                  # imm = 0x248911
	callq	_ZNSt6vectorIjSaIjEE6resizeEm
.Ltmp3:
# %bb.2:
.Ltmp4:
	leaq	160(%rsp), %rdi
	movl	$2394386, %esi                  # imm = 0x248912
	callq	_ZNSt6vectorIjSaIjEE7reserveEm
.Ltmp5:
# %bb.3:
.Ltmp6:
	leaq	128(%rsp), %rdi
	movl	$5021410, %esi                  # imm = 0x4C9EE2
	callq	_ZNSt6vectorIjSaIjEE7reserveEm
.Ltmp7:
# %bb.4:
.Ltmp8:
	leaq	96(%rsp), %rdi
	movl	$2394386, %esi                  # imm = 0x248912
	callq	_ZNSt6vectorIjSaIjEE7reserveEm
.Ltmp9:
# %bb.5:
.Ltmp10:
	leaq	192(%rsp), %rdi
	movl	$5021410, %esi                  # imm = 0x4C9EE2
	callq	_ZNSt6vectorIjSaIjEE7reserveEm
.Ltmp11:
# %bb.6:
	leaq	336(%rsp), %r14
	movq	%r14, -16(%r14)
	movq	_ZL2fnB5cxx11(%rip), %rsi
	movq	_ZL2fnB5cxx11+8(%rip), %rdx
	addq	%rsi, %rdx
.Ltmp12:
	leaq	320(%rsp), %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
.Ltmp13:
# %bb.7:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ERKS4_.exit
.Ltmp15:
	leaq	320(%rsp), %rdi
	leaq	160(%rsp), %rsi
	leaq	128(%rsp), %rdx
	leaq	96(%rsp), %rcx
	leaq	192(%rsp), %r8
	callq	_Z12GraphpreprocNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERSt6vectorIjSaIjEES8_S8_S8_
.Ltmp16:
# %bb.8:
	movq	320(%rsp), %rdi
	cmpq	%r14, %rdi
	je	.LBB0_10
# %bb.9:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB0_10:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
.Ltmp18:
	leaq	40(%rsp), %rdi
	movl	$9577540, %esi                  # imm = 0x922444
	callq	hipMalloc
.Ltmp19:
# %bb.11:                               # %_ZL9hipMallocIjE10hipError_tPPT_m.exit
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB0_12
# %bb.15:                               # %_Z9gpuAssert10hipError_tPKcib.exit
	movq	40(%rsp), %rdi
.Ltmp22:
	movl	$9577540, %edx                  # imm = 0x922444
	xorl	%esi, %esi
	callq	hipMemset
.Ltmp23:
# %bb.16:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB0_17
# %bb.19:                               # %_Z9gpuAssert10hipError_tPKcib.exit27
.Ltmp26:
	leaq	40(%rsp), %rsi
	movl	$range, %edi
	movl	$8, %edx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
.Ltmp27:
# %bb.20:                               # %_Z17hipMemcpyToSymbolIPjE10hipError_tRKT_PKvmm13hipMemcpyKind.exit
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB0_21
# %bb.23:                               # %_Z9gpuAssert10hipError_tPKcib.exit31
.Ltmp30:
	leaq	32(%rsp), %rdi
	movl	$9577540, %esi                  # imm = 0x922444
	callq	hipMalloc
.Ltmp31:
# %bb.24:                               # %_ZL9hipMallocIjE10hipError_tPPT_m.exit33
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB0_25
# %bb.27:                               # %_Z9gpuAssert10hipError_tPKcib.exit36
	movq	32(%rsp), %rdi
.Ltmp34:
	movl	$9577540, %edx                  # imm = 0x922444
	movl	$255, %esi
	callq	hipMemset
.Ltmp35:
# %bb.28:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB0_29
# %bb.31:                               # %_Z9gpuAssert10hipError_tPKcib.exit39
.Ltmp38:
	leaq	32(%rsp), %rsi
	movl	$pivot, %edi
	movl	$8, %edx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
.Ltmp39:
# %bb.32:                               # %_Z17hipMemcpyToSymbolIPjE10hipError_tRKT_PKvmm13hipMemcpyKind.exit41
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB0_33
# %bb.35:                               # %_Z9gpuAssert10hipError_tPKcib.exit44
.Ltmp42:
	leaq	24(%rsp), %rdi
	movl	$9577544, %esi                  # imm = 0x922448
	callq	hipMalloc
.Ltmp43:
# %bb.36:                               # %_ZL9hipMallocIjE10hipError_tPPT_m.exit46
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB0_37
# %bb.39:                               # %_Z9gpuAssert10hipError_tPKcib.exit49
.Ltmp47:
	leaq	56(%rsp), %rdi
	callq	hipEventCreate
.Ltmp48:
# %bb.40:
.Ltmp49:
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
.Ltmp50:
# %bb.41:
	movq	56(%rsp), %rdi
.Ltmp51:
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp52:
# %bb.42:                               # %_Z9gpuAssert10hipError_tPKcib.exit62.preheader
	movl	$1, %ebx
	leaq	192(%rsp), %r13
	leaq	288(%rsp), %rbp
	leaq	256(%rsp), %r14
.LBB0_43:                               # %_Z9gpuAssert10hipError_tPKcib.exit62
                                        # =>This Inner Loop Header: Depth=1
.Ltmp53:
	leaq	160(%rsp), %rdi
	leaq	128(%rsp), %rsi
	leaq	96(%rsp), %rdx
	movq	%r13, %rcx
	callq	_Z8TRIMMINGRSt6vectorIjSaIjEES2_S2_S2_
.Ltmp54:
# %bb.44:                               #   in Loop: Header=BB0_43 Depth=1
.Ltmp55:
	callq	_Z10PIVOTS_SELv
.Ltmp56:
# %bb.45:                               #   in Loop: Header=BB0_43 Depth=1
.Ltmp57:
	leaq	160(%rsp), %rdi
	leaq	128(%rsp), %rsi
	xorl	%edx, %edx
	movl	%r15d, %ecx
	movq	%rbp, %r8
	callq	_Z3BFSRSt6vectorIjSaIjEES2_jjS2_
.Ltmp58:
# %bb.46:                               #   in Loop: Header=BB0_43 Depth=1
.Ltmp59:
	leaq	96(%rsp), %rdi
	movq	%r13, %rsi
	xorl	%edx, %edx
	movl	%r15d, %ecx
	movq	%r14, %r8
	callq	_Z3BFSRSt6vectorIjSaIjEES2_jjS2_
.Ltmp60:
# %bb.47:                               #   in Loop: Header=BB0_43 Depth=1
.Ltmp61:
	movq	%rbp, %rdi
	movq	%r14, %rsi
	leaq	64(%rsp), %rdx
	leaq	12(%rsp), %rcx
	callq	_Z7Update1RSt6vectorIjSaIjEES2_S2_Rj
.Ltmp62:
# %bb.48:                               #   in Loop: Header=BB0_43 Depth=1
	cmpl	$0, 12(%rsp)
	jne	.LBB0_78
# %bb.49:                               #   in Loop: Header=BB0_43 Depth=1
	movq	24(%rsp), %rdi
	movq	64(%rsp), %rsi
.Ltmp63:
	movl	$9577544, %edx                  # imm = 0x922448
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp64:
# %bb.50:                               #   in Loop: Header=BB0_43 Depth=1
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	.LBB0_51
# %bb.54:                               # %_Z9gpuAssert10hipError_tPKcib.exit52
                                        #   in Loop: Header=BB0_43 Depth=1
.Ltmp67:
	movabsq	$4294976650, %rdi               # imm = 0x10000248A
	movl	$1, %esi
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp68:
# %bb.55:                               #   in Loop: Header=BB0_43 Depth=1
	testl	%eax, %eax
	jne	.LBB0_57
# %bb.56:                               #   in Loop: Header=BB0_43 Depth=1
	movq	24(%rsp), %rsi
.Ltmp69:
	movl	$2394385, %edi                  # imm = 0x248911
	callq	_Z29__device_stub__RenumberKernelmPj
.Ltmp70:
.LBB0_57:                               #   in Loop: Header=BB0_43 Depth=1
.Ltmp71:
	callq	hipDeviceSynchronize
.Ltmp72:
# %bb.58:                               #   in Loop: Header=BB0_43 Depth=1
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	.LBB0_59
# %bb.67:                               # %_Z9gpuAssert10hipError_tPKcib.exit58
                                        #   in Loop: Header=BB0_43 Depth=1
	movq	64(%rsp), %rax
	movq	72(%rsp), %rdx
	subq	%rax, %rdx
	sarq	$2, %rdx
	cmpq	$2394385, %rdx                  # imm = 0x248911
	jbe	.LBB0_68
# %bb.70:                               #   in Loop: Header=BB0_43 Depth=1
	cmpl	$0, 12(%rsp)
	jne	.LBB0_78
# %bb.71:                               #   in Loop: Header=BB0_43 Depth=1
.Ltmp96:
	movl	9577540(%rax), %r15d
	movabsq	$4294976650, %rdi               # imm = 0x10000248A
	movl	$1, %esi
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp97:
# %bb.72:                               #   in Loop: Header=BB0_43 Depth=1
	testl	%eax, %eax
	jne	.LBB0_74
# %bb.73:                               #   in Loop: Header=BB0_43 Depth=1
.Ltmp98:
	movl	$2394385, %edi                  # imm = 0x248911
	callq	_Z24__device_stub__initpivotm
.Ltmp99:
.LBB0_74:                               #   in Loop: Header=BB0_43 Depth=1
.Ltmp100:
	callq	hipDeviceSynchronize
.Ltmp101:
# %bb.75:                               #   in Loop: Header=BB0_43 Depth=1
	movl	%eax, %r12d
	decl	%r15d
	incl	%ebx
	testl	%eax, %eax
	je	.LBB0_43
# %bb.76:
	movq	stderr(%rip), %rbx
.Ltmp103:
	movl	%r12d, %edi
	callq	hipGetErrorString
.Ltmp104:
# %bb.77:                               # %.noexc61
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$215, %r8d
	xorl	%eax, %eax
	callq	fprintf
	movl	%r12d, %edi
	callq	exit
.LBB0_78:                               # %.thread
	movq	16(%rsp), %rdi
.Ltmp77:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp78:
# %bb.79:
	movq	16(%rsp), %rdi
.Ltmp79:
	callq	hipEventSynchronize
.Ltmp80:
# %bb.80:
	movq	56(%rsp), %rsi
	movq	16(%rsp), %rdx
.Ltmp81:
	leaq	52(%rsp), %rdi
	callq	hipEventElapsedTime
.Ltmp82:
# %bb.81:
	cvtss2sd	52(%rsp), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.3, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	movq	40(%rsp), %rdi
.Ltmp83:
	callq	hipFree
.Ltmp84:
# %bb.82:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB0_83
# %bb.85:                               # %_Z9gpuAssert10hipError_tPKcib.exit65
	movq	32(%rsp), %rdi
.Ltmp87:
	callq	hipFree
.Ltmp88:
# %bb.86:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB0_87
# %bb.89:                               # %_Z9gpuAssert10hipError_tPKcib.exit68
	movq	24(%rsp), %rdi
.Ltmp91:
	callq	hipFree
.Ltmp92:
# %bb.90:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB0_91
# %bb.93:                               # %_Z9gpuAssert10hipError_tPKcib.exit71
	movq	64(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_95
# %bb.94:
	callq	_ZdlPv
.LBB0_95:                               # %_ZNSt6vectorIjSaIjEED2Ev.exit
	movq	224(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_97
# %bb.96:
	callq	_ZdlPv
.LBB0_97:                               # %_ZNSt6vectorIjSaIjEED2Ev.exit73
	movq	352(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_99
# %bb.98:
	callq	_ZdlPv
.LBB0_99:                               # %_ZNSt6vectorIjSaIjEED2Ev.exit75
	movq	256(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_101
# %bb.100:
	callq	_ZdlPv
.LBB0_101:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit77
	movq	288(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_103
# %bb.102:
	callq	_ZdlPv
.LBB0_103:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit79
	movq	192(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_105
# %bb.104:
	callq	_ZdlPv
.LBB0_105:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit81
	movq	96(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_107
# %bb.106:
	callq	_ZdlPv
.LBB0_107:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit83
	movq	128(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_109
# %bb.108:
	callq	_ZdlPv
.LBB0_109:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit85
	movq	160(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_111
# %bb.110:
	callq	_ZdlPv
.LBB0_111:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit87
	xorl	%eax, %eax
	addq	$376, %rsp                      # imm = 0x178
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB0_68:
	.cfi_def_cfa_offset 432
.Ltmp75:
	movl	$.L.str.8, %edi
	movl	$2394385, %esi                  # imm = 0x248911
	xorl	%eax, %eax
	callq	_ZSt24__throw_out_of_range_fmtPKcz
.Ltmp76:
# %bb.69:                               # %.noexc59
.LBB0_51:
	movq	stderr(%rip), %rbx
.Ltmp65:
	movl	%r15d, %edi
	callq	hipGetErrorString
.Ltmp66:
# %bb.52:                               # %.noexc51
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$199, %r8d
	jmp	.LBB0_53
.LBB0_59:
	movq	stderr(%rip), %rbx
.Ltmp73:
	movl	%r15d, %edi
	callq	hipGetErrorString
.Ltmp74:
# %bb.60:                               # %.noexc57
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$201, %r8d
.LBB0_53:                               # %.noexc51
	xorl	%eax, %eax
	callq	fprintf
	movl	%r15d, %edi
	callq	exit
.LBB0_12:
	movq	stderr(%rip), %r14
.Ltmp20:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp21:
# %bb.13:                               # %.noexc
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$170, %r8d
	jmp	.LBB0_14
.LBB0_17:
	movq	stderr(%rip), %r14
.Ltmp24:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp25:
# %bb.18:                               # %.noexc26
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$171, %r8d
	jmp	.LBB0_14
.LBB0_21:
	movq	stderr(%rip), %r14
.Ltmp28:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp29:
# %bb.22:                               # %.noexc30
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$173, %r8d
	jmp	.LBB0_14
.LBB0_25:
	movq	stderr(%rip), %r14
.Ltmp32:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp33:
# %bb.26:                               # %.noexc35
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$175, %r8d
	jmp	.LBB0_14
.LBB0_29:
	movq	stderr(%rip), %r14
.Ltmp36:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp37:
# %bb.30:                               # %.noexc38
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$176, %r8d
	jmp	.LBB0_14
.LBB0_33:
	movq	stderr(%rip), %r14
.Ltmp40:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp41:
# %bb.34:                               # %.noexc43
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$178, %r8d
	jmp	.LBB0_14
.LBB0_37:
	movq	stderr(%rip), %r14
.Ltmp44:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp45:
# %bb.38:                               # %.noexc48
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$180, %r8d
	jmp	.LBB0_14
.LBB0_83:
	movq	stderr(%rip), %r14
.Ltmp85:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp86:
# %bb.84:                               # %.noexc64
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$225, %r8d
	jmp	.LBB0_14
.LBB0_87:
	movq	stderr(%rip), %r14
.Ltmp89:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp90:
# %bb.88:                               # %.noexc67
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$226, %r8d
	jmp	.LBB0_14
.LBB0_91:
	movq	stderr(%rip), %r14
.Ltmp93:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp94:
# %bb.92:                               # %.noexc70
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$227, %r8d
.LBB0_14:                               # %.noexc
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.LBB0_62:
.Ltmp17:
	movq	%rax, %rbx
	movq	320(%rsp), %rdi
	cmpq	%r14, %rdi
	je	.LBB0_114
# %bb.63:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i53
	callq	_ZdlPv
	jmp	.LBB0_114
.LBB0_112:
.Ltmp95:
	jmp	.LBB0_113
.LBB0_61:
.Ltmp14:
	jmp	.LBB0_113
.LBB0_64:
.Ltmp46:
	jmp	.LBB0_113
.LBB0_66:                               # %.loopexit.split-lp
.Ltmp105:
	jmp	.LBB0_113
.LBB0_65:                               # %.loopexit
.Ltmp102:
.LBB0_113:
	movq	%rax, %rbx
.LBB0_114:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit55
	movq	64(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_116
# %bb.115:
	callq	_ZdlPv
.LBB0_116:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit89
	movq	224(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_118
# %bb.117:
	callq	_ZdlPv
.LBB0_118:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit91
	movq	352(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_120
# %bb.119:
	callq	_ZdlPv
.LBB0_120:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit93
	movq	256(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_122
# %bb.121:
	callq	_ZdlPv
.LBB0_122:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit95
	movq	288(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_124
# %bb.123:
	callq	_ZdlPv
.LBB0_124:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit97
	movq	192(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_126
# %bb.125:
	callq	_ZdlPv
.LBB0_126:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit99
	movq	96(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_128
# %bb.127:
	callq	_ZdlPv
.LBB0_128:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit101
	movq	128(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_130
# %bb.129:
	callq	_ZdlPv
.LBB0_130:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit103
	movq	160(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB0_132
# %bb.131:
	callq	_ZdlPv
.LBB0_132:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit105
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table0:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 1 <<
	.uleb128 .Ltmp13-.Ltmp0                 #   Call between .Ltmp0 and .Ltmp13
	.uleb128 .Ltmp14-.Lfunc_begin0          #     jumps to .Ltmp14
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp15-.Lfunc_begin0          # >> Call Site 2 <<
	.uleb128 .Ltmp16-.Ltmp15                #   Call between .Ltmp15 and .Ltmp16
	.uleb128 .Ltmp17-.Lfunc_begin0          #     jumps to .Ltmp17
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp18-.Lfunc_begin0          # >> Call Site 3 <<
	.uleb128 .Ltmp43-.Ltmp18                #   Call between .Ltmp18 and .Ltmp43
	.uleb128 .Ltmp46-.Lfunc_begin0          #     jumps to .Ltmp46
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp47-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp52-.Ltmp47                #   Call between .Ltmp47 and .Ltmp52
	.uleb128 .Ltmp105-.Lfunc_begin0         #     jumps to .Ltmp105
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp53-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp101-.Ltmp53               #   Call between .Ltmp53 and .Ltmp101
	.uleb128 .Ltmp102-.Lfunc_begin0         #     jumps to .Ltmp102
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp103-.Lfunc_begin0         # >> Call Site 6 <<
	.uleb128 .Ltmp80-.Ltmp103               #   Call between .Ltmp103 and .Ltmp80
	.uleb128 .Ltmp105-.Lfunc_begin0         #     jumps to .Ltmp105
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp81-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp92-.Ltmp81                #   Call between .Ltmp81 and .Ltmp92
	.uleb128 .Ltmp95-.Lfunc_begin0          #     jumps to .Ltmp95
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp75-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp74-.Ltmp75                #   Call between .Ltmp75 and .Ltmp74
	.uleb128 .Ltmp105-.Lfunc_begin0         #     jumps to .Ltmp105
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp20-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp45-.Ltmp20                #   Call between .Ltmp20 and .Ltmp45
	.uleb128 .Ltmp46-.Lfunc_begin0          #     jumps to .Ltmp46
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp85-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp94-.Ltmp85                #   Call between .Ltmp85 and .Ltmp94
	.uleb128 .Ltmp95-.Lfunc_begin0          #     jumps to .Ltmp95
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp94-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Lfunc_end0-.Ltmp94            #   Call between .Ltmp94 and .Lfunc_end0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorIjSaIjEE6resizeEm,"axG",@progbits,_ZNSt6vectorIjSaIjEE6resizeEm,comdat
	.weak	_ZNSt6vectorIjSaIjEE6resizeEm   # -- Begin function _ZNSt6vectorIjSaIjEE6resizeEm
	.p2align	1, 0x90
	.type	_ZNSt6vectorIjSaIjEE6resizeEm,@function
_ZNSt6vectorIjSaIjEE6resizeEm:          # @_ZNSt6vectorIjSaIjEE6resizeEm
	.cfi_startproc
# %bb.0:
	movq	(%rdi), %rdx
	movq	8(%rdi), %rcx
	movq	%rcx, %r8
	subq	%rdx, %r8
	sarq	$2, %r8
	movq	%rsi, %rax
	subq	%r8, %rax
	jbe	.LBB1_1
# %bb.5:
	movq	%rax, %rsi
	jmp	_ZNSt6vectorIjSaIjEE17_M_default_appendEm # TAILCALL
.LBB1_1:
	jae	.LBB1_4
# %bb.2:
	leaq	(%rdx,%rsi,4), %rax
	cmpq	%rax, %rcx
	je	.LBB1_4
# %bb.3:
	movq	%rax, 8(%rdi)
.LBB1_4:                                # %_ZNSt6vectorIjSaIjEE15_M_erase_at_endEPj.exit
	retq
.Lfunc_end1:
	.size	_ZNSt6vectorIjSaIjEE6resizeEm, .Lfunc_end1-_ZNSt6vectorIjSaIjEE6resizeEm
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIjSaIjEE7reserveEm,"axG",@progbits,_ZNSt6vectorIjSaIjEE7reserveEm,comdat
	.weak	_ZNSt6vectorIjSaIjEE7reserveEm  # -- Begin function _ZNSt6vectorIjSaIjEE7reserveEm
	.p2align	1, 0x90
	.type	_ZNSt6vectorIjSaIjEE7reserveEm,@function
_ZNSt6vectorIjSaIjEE7reserveEm:         # @_ZNSt6vectorIjSaIjEE7reserveEm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rax
	shrq	$61, %rax
	jne	.LBB2_8
# %bb.1:
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	(%rdi), %r13
	movq	16(%rdi), %rax
	subq	%r13, %rax
	sarq	$2, %rax
	cmpq	%rsi, %rax
	jae	.LBB2_7
# %bb.2:                                # %_ZNSt12_Vector_baseIjSaIjEE11_M_allocateEm.exit
	movq	8(%rbx), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIjE8allocateEmPKv
	movq	%rax, %r15
	movq	(%rbx), %rsi
	movq	8(%rbx), %rdx
	subq	%rsi, %rdx
	testq	%rdx, %rdx
	jle	.LBB2_4
# %bb.3:
	movq	%r15, %rdi
	callq	memmove@PLT
	movq	(%rbx), %rsi
.LBB2_4:                                # %_ZNSt6vectorIjSaIjEE11_S_relocateEPjS2_S2_RS0_.exit
	subq	%r13, %r12
	testq	%rsi, %rsi
	je	.LBB2_6
# %bb.5:
	movq	%rsi, %rdi
	callq	_ZdlPv
.LBB2_6:                                # %_ZNSt12_Vector_baseIjSaIjEE13_M_deallocateEPjm.exit
	movq	%r15, (%rbx)
	addq	%r15, %r12
	movq	%r12, 8(%rbx)
	leaq	(%r15,%r14,4), %rax
	movq	%rax, 16(%rbx)
.LBB2_7:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB2_8:
	.cfi_def_cfa_offset 48
	movl	$.L.str.7, %edi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end2:
	.size	_ZNSt6vectorIjSaIjEE7reserveEm, .Lfunc_end2-_ZNSt6vectorIjSaIjEE7reserveEm
	.cfi_endproc
                                        # -- End function
	.text
	.globl	_Z12GraphpreprocNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERSt6vectorIjSaIjEES8_S8_S8_ # -- Begin function _Z12GraphpreprocNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERSt6vectorIjSaIjEES8_S8_S8_
	.type	_Z12GraphpreprocNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERSt6vectorIjSaIjEES8_S8_S8_,@function
_Z12GraphpreprocNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERSt6vectorIjSaIjEES8_S8_S8_: # @_Z12GraphpreprocNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERSt6vectorIjSaIjEES8_S8_S8_
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1560, %rsp                     # imm = 0x618
	.cfi_def_cfa_offset 1616
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, 80(%rsp)                   # 8-byte Spill
	movq	%rcx, %r14
	movq	%rdx, %rbx
	movq	%rsi, %r15
	movq	%rdi, %r12
	leaq	648(%rsp), %r13
	movq	%r13, %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev
	xorl	%eax, %eax
	movq	%rax, 32(%rsp)
	xorps	%xmm0, %xmm0
	movaps	%xmm0, 16(%rsp)
	leaq	216(%rsp), %rbp
	movl	%eax, (%rbp)
	movq	%rax, 8(%rbp)
	movq	%rbp, 16(%rbp)
	movq	%rbp, 24(%rbp)
	movq	%rax, 32(%rbp)
	movl	%eax, 4(%rsp)
	movq	(%r12), %rsi
.Ltmp106:
	movq	%r13, %rdi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp107:
# %bb.1:                                # %.preheader121
	movq	648(%rsp), %rax
	movq	-24(%rax), %rax
	testb	$2, 680(%rsp,%rax)
	jne	.LBB3_2
# %bb.3:                                # %.lr.ph
	movq	%rbx, 168(%rsp)                 # 8-byte Spill
	leaq	64(%rsp), %r13
	movl	$128, %eax
	leaq	1168(%rsp), %rcx
	addq	%rax, %rcx
	movq	%rcx, 88(%rsp)                  # 8-byte Spill
	leaq	256(%rsp), %rcx
	addq	%rcx, %rax
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	xorl	%r12d, %r12d
	leaq	176(%rsp), %rbx
.LBB3_4:                                # =>This Inner Loop Header: Depth=1
	movq	%r13, 48(%rsp)
	movq	%r12, 56(%rsp)
	movb	%r12b, 64(%rsp)
	leaq	152(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%r12, 144(%rsp)
	movb	%r12b, 152(%rsp)
	leaq	120(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%r12, 112(%rsp)
	movb	%r12b, 120(%rsp)
.Ltmp109:
	leaq	256(%rsp), %rdi
	callq	_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEC1Ev
.Ltmp110:
# %bb.5:                                #   in Loop: Header=BB3_4 Depth=1
.Ltmp112:
	leaq	1168(%rsp), %rdi
	callq	_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEC1Ev
.Ltmp113:
# %bb.6:                                #   in Loop: Header=BB3_4 Depth=1
	movq	648(%rsp), %rax
	movq	-24(%rax), %rdi
	leaq	648(%rsp), %rax
	addq	%rax, %rdi
.Ltmp115:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp116:
# %bb.7:                                # %.noexc
                                        #   in Loop: Header=BB3_4 Depth=1
.Ltmp117:
	movsbl	%al, %edx
	leaq	648(%rsp), %rdi
	leaq	48(%rsp), %rsi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp118:
# %bb.8:                                # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit
                                        #   in Loop: Header=BB3_4 Depth=1
	cmpq	$0, 56(%rsp)
	je	.LBB3_32
# %bb.9:                                #   in Loop: Header=BB3_4 Depth=1
	movq	48(%rsp), %rax
	cmpb	$35, (%rax)
	je	.LBB3_32
# %bb.10:                               #   in Loop: Header=BB3_4 Depth=1
	leaq	48(%rsp), %r13
	movq	%r13, %rdi
	movl	$9, %esi
	xorl	%edx, %edx
	callq	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcm
.Ltmp119:
	movq	%rbx, %rdi
	movq	%r13, %rsi
	xorl	%edx, %edx
	movq	%rax, %rcx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ERKS4_mm
.Ltmp120:
# %bb.11:                               #   in Loop: Header=BB3_4 Depth=1
	leaq	136(%rsp), %rdi
	movq	%rbx, %rsi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_
	movq	176(%rsp), %rdi
	leaq	192(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB3_13
# %bb.12:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
                                        #   in Loop: Header=BB3_4 Depth=1
	callq	_ZdlPv
.LBB3_13:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
                                        #   in Loop: Header=BB3_4 Depth=1
	leaq	48(%rsp), %r12
	movq	%r12, %rdi
	movl	$9, %esi
	xorl	%edx, %edx
	callq	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcm
	movq	%r12, %rdi
	movl	$9, %esi
	movq	%rax, %rdx
	callq	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE17find_first_not_ofEcm
	movq	%rax, %r13
	movq	%r12, %rdi
	movl	$9, %esi
	movq	$-1, %rdx
	callq	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE16find_last_not_ofEcm
.Ltmp122:
	leaq	176(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	movq	%rax, %rcx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ERKS4_mm
.Ltmp123:
# %bb.14:                               #   in Loop: Header=BB3_4 Depth=1
	leaq	104(%rsp), %rdi
	movq	%rbx, %rsi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_
	movq	176(%rsp), %rdi
	leaq	192(%rsp), %rax
	cmpq	%rax, %rdi
	leaq	64(%rsp), %r13
	movl	$0, %r12d
	je	.LBB3_16
# %bb.15:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i38
                                        #   in Loop: Header=BB3_4 Depth=1
	callq	_ZdlPv
.LBB3_16:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit40
                                        #   in Loop: Header=BB3_4 Depth=1
	movq	136(%rsp), %rsi
	movq	144(%rsp), %rdx
.Ltmp125:
	leaq	272(%rsp), %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp126:
# %bb.17:                               # %_ZStlsIcSt11char_traitsIcESaIcEERSt13basic_ostreamIT_T0_ES7_RKNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit
                                        #   in Loop: Header=BB3_4 Depth=1
.Ltmp127:
	leaq	256(%rsp), %rdi
	leaq	12(%rsp), %rsi
	callq	_ZNSi10_M_extractIjEERSiRT_
.Ltmp128:
# %bb.18:                               # %_ZNSirsERj.exit
                                        #   in Loop: Header=BB3_4 Depth=1
	movq	104(%rsp), %rsi
	movq	112(%rsp), %rdx
.Ltmp129:
	leaq	1184(%rsp), %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp130:
# %bb.19:                               # %_ZStlsIcSt11char_traitsIcESaIcEERSt13basic_ostreamIT_T0_ES7_RKNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit44
                                        #   in Loop: Header=BB3_4 Depth=1
.Ltmp131:
	leaq	1168(%rsp), %rdi
	leaq	8(%rsp), %rsi
	callq	_ZNSi10_M_extractIjEERSiRT_
.Ltmp132:
# %bb.20:                               # %_ZNSirsERj.exit46
                                        #   in Loop: Header=BB3_4 Depth=1
	movq	24(%rsp), %rsi
	cmpq	32(%rsp), %rsi
	je	.LBB3_26
# %bb.21:                               #   in Loop: Header=BB3_4 Depth=1
	movl	12(%rsp), %eax
	movl	%eax, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 24(%rsp)
	jmp	.LBB3_28
.LBB3_26:                               #   in Loop: Header=BB3_4 Depth=1
.Ltmp133:
	leaq	16(%rsp), %rdi
	leaq	12(%rsp), %rdx
	callq	_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJRKjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_
.Ltmp134:
# %bb.27:                               # %._crit_edge203
                                        #   in Loop: Header=BB3_4 Depth=1
	movl	12(%rsp), %eax
.LBB3_28:                               #   in Loop: Header=BB3_4 Depth=1
	movl	8(%rsp), %ecx
	shlq	$32, %rax
	orq	%rcx, %rax
	movq	%rax, 176(%rsp)
.Ltmp135:
	leaq	208(%rsp), %rdi
	movq	%rbx, %rsi
	callq	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_
.Ltmp136:
# %bb.29:                               # %_ZNSt8multimapIKjjSt4lessIS0_ESaISt4pairIS0_jEEE6insertIS3_IjjEEENSt9enable_ifIXsr16is_constructibleIS4_T_EE5valueESt17_Rb_tree_iteratorIS4_EE4typeEOSA_.exit
                                        #   in Loop: Header=BB3_4 Depth=1
	movq	168(%rsp), %rdi                 # 8-byte Reload
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.LBB3_31
# %bb.30:                               #   in Loop: Header=BB3_4 Depth=1
	movl	8(%rsp), %eax
	movl	%eax, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 8(%rdi)
	jmp	.LBB3_32
.LBB3_31:                               #   in Loop: Header=BB3_4 Depth=1
.Ltmp138:
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJRKjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_
.Ltmp139:
.LBB3_32:                               # %_ZNSt6vectorIjSaIjEE9push_backERKj.exit51
                                        #   in Loop: Header=BB3_4 Depth=1
	movl	$_ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE, %esi
	leaq	1168(%rsp), %rdi
	callq	_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED2Ev
	movq	88(%rsp), %rdi                  # 8-byte Reload
	callq	_ZNSt8ios_baseD2Ev
	movl	$_ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE, %esi
	leaq	256(%rsp), %rdi
	callq	_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED2Ev
	movq	96(%rsp), %rdi                  # 8-byte Reload
	callq	_ZNSt8ios_baseD2Ev
	movq	104(%rsp), %rdi
	leaq	120(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB3_34
# %bb.33:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i52
                                        #   in Loop: Header=BB3_4 Depth=1
	callq	_ZdlPv
.LBB3_34:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit54
                                        #   in Loop: Header=BB3_4 Depth=1
	movq	136(%rsp), %rdi
	leaq	152(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB3_36
# %bb.35:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i55
                                        #   in Loop: Header=BB3_4 Depth=1
	callq	_ZdlPv
.LBB3_36:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit57
                                        #   in Loop: Header=BB3_4 Depth=1
	movq	48(%rsp), %rdi
	cmpq	%r13, %rdi
	je	.LBB3_38
# %bb.37:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i58
                                        #   in Loop: Header=BB3_4 Depth=1
	callq	_ZdlPv
.LBB3_38:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit60
                                        #   in Loop: Header=BB3_4 Depth=1
	movq	648(%rsp), %rax
	movq	-24(%rax), %rax
	testb	$2, 680(%rsp,%rax)
	je	.LBB3_4
# %bb.39:                               # %._crit_edge.loopexit
	movq	16(%rsp), %r13
	jmp	.LBB3_40
.LBB3_2:
	xorl	%r13d, %r13d
.LBB3_40:                               # %._crit_edge
	movl	$0, 256(%rsp)
	movq	8(%r15), %rsi
	cmpq	16(%r15), %rsi
	je	.LBB3_53
# %bb.41:
	movl	$0, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 8(%r15)
	jmp	.LBB3_54
.LBB3_53:
.Ltmp141:
	leaq	256(%rsp), %rdx
	movq	%r15, %rdi
	callq	_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_
.Ltmp142:
.LBB3_54:                               # %_ZNSt6vectorIjSaIjEE9push_backEOj.exit
	leaq	4(%rsp), %rbx
	movl	(%rbx), %eax
	xorl	%r12d, %r12d
.LBB3_55:                               # %.preheader115
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_56 Depth 2
	movq	24(%rsp), %rcx
	cmpq	%rcx, %r13
	je	.LBB3_59
.LBB3_56:                               # %.lr.ph169
                                        #   Parent Loop BB3_55 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r13), %edx
	cmpq	%rdx, %r12
	jne	.LBB3_59
# %bb.57:                               #   in Loop: Header=BB3_56 Depth=2
	incl	%eax
	movl	%eax, 4(%rsp)
	addq	$4, %r13
	cmpq	%rcx, %r13
	jne	.LBB3_56
# %bb.58:                               #   in Loop: Header=BB3_55 Depth=1
	movq	%rcx, %r13
.LBB3_59:                               # %.critedge
                                        #   in Loop: Header=BB3_55 Depth=1
	movq	(%r15), %rcx
	movq	8(%r15), %rsi
	movq	%rsi, %rdx
	subq	%rcx, %rdx
	sarq	$2, %rdx
	cmpq	%r12, %rdx
	jbe	.LBB3_60
# %bb.65:                               #   in Loop: Header=BB3_55 Depth=1
	addl	(%rcx,%r12,4), %eax
	movl	%eax, 4(%rsp)
	cmpq	16(%r15), %rsi
	je	.LBB3_67
# %bb.66:                               #   in Loop: Header=BB3_55 Depth=1
	movl	%eax, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 8(%r15)
	jmp	.LBB3_68
.LBB3_67:                               #   in Loop: Header=BB3_55 Depth=1
.Ltmp147:
	movq	%r15, %rdi
	movq	%rbx, %rdx
	callq	_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJRKjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_
.Ltmp148:
.LBB3_68:                               # %_ZNSt6vectorIjSaIjEE9push_backERKj.exit78
                                        #   in Loop: Header=BB3_55 Depth=1
	movl	$0, 4(%rsp)
	incq	%r12
	xorl	%eax, %eax
	cmpq	$2394384, %r12                  # imm = 0x248910
	jne	.LBB3_55
# %bb.61:
	movl	$5021410, 256(%rsp)             # imm = 0x4C9EE2
	movq	8(%r15), %rsi
	cmpq	16(%r15), %rsi
	je	.LBB3_71
# %bb.62:
	movl	$5021410, (%rsi)                # imm = 0x4C9EE2
	addq	$4, %rsi
	movq	%rsi, 8(%r15)
	jmp	.LBB3_72
.LBB3_71:
.Ltmp150:
	leaq	256(%rsp), %rdx
	movq	%r15, %rdi
	callq	_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_
.Ltmp151:
.LBB3_72:                               # %_ZNSt6vectorIjSaIjEE9push_backEOj.exit73
	movq	232(%rsp), %r13
	movl	$0, 256(%rsp)
	movq	8(%r14), %rsi
	cmpq	16(%r14), %rsi
	je	.LBB3_74
# %bb.73:
	movl	$0, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 8(%r14)
	jmp	.LBB3_75
.LBB3_74:
.Ltmp153:
	leaq	256(%rsp), %rdx
	movq	%r14, %rdi
	callq	_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_
.Ltmp154:
.LBB3_75:                               # %_ZNSt6vectorIjSaIjEE9push_backEOj.exit81
	leaq	4(%rsp), %rbx
	movl	(%rbx), %r12d
	xorl	%r15d, %r15d
.LBB3_76:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_77 Depth 2
	movq	%r13, %rax
	cmpq	%rbp, %r13
	movq	%rbp, %r13
	je	.LBB3_85
.LBB3_77:                               # %.lr.ph177
                                        #   Parent Loop BB3_76 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	32(%rax), %ecx
	cmpq	%rcx, %r15
	jne	.LBB3_78
# %bb.83:                               #   in Loop: Header=BB3_77 Depth=2
	incl	%r12d
	movl	%r12d, 4(%rsp)
	movq	%rax, %rdi
	callq	_ZSt18_Rb_tree_incrementPSt18_Rb_tree_node_base
	cmpq	%rbp, %rax
	jne	.LBB3_77
# %bb.84:                               #   in Loop: Header=BB3_76 Depth=1
	movq	%rbp, %r13
	jmp	.LBB3_85
.LBB3_78:                               #   in Loop: Header=BB3_76 Depth=1
	movq	%rax, %r13
.LBB3_85:                               # %.critedge2
                                        #   in Loop: Header=BB3_76 Depth=1
	movq	(%r14), %rax
	movq	8(%r14), %rsi
	movq	%rsi, %rdx
	subq	%rax, %rdx
	sarq	$2, %rdx
	cmpq	%r15, %rdx
	jbe	.LBB3_86
# %bb.88:                               #   in Loop: Header=BB3_76 Depth=1
	addl	(%rax,%r15,4), %r12d
	movl	%r12d, 4(%rsp)
	cmpq	16(%r14), %rsi
	je	.LBB3_90
# %bb.89:                               #   in Loop: Header=BB3_76 Depth=1
	movl	%r12d, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 8(%r14)
	jmp	.LBB3_91
.LBB3_90:                               #   in Loop: Header=BB3_76 Depth=1
.Ltmp159:
	movq	%r14, %rdi
	movq	%rbx, %rdx
	callq	_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJRKjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_
.Ltmp160:
.LBB3_91:                               # %_ZNSt6vectorIjSaIjEE9push_backERKj.exit90
                                        #   in Loop: Header=BB3_76 Depth=1
	movl	$0, 4(%rsp)
	incq	%r15
	xorl	%r12d, %r12d
	cmpq	$2394384, %r15                  # imm = 0x248910
	jne	.LBB3_76
# %bb.79:
	movl	$5021410, 256(%rsp)             # imm = 0x4C9EE2
	movq	8(%r14), %rsi
	cmpq	16(%r14), %rsi
	je	.LBB3_94
# %bb.80:
	movl	$5021410, (%rsi)                # imm = 0x4C9EE2
	addq	$4, %rsi
	movq	%rsi, 8(%r14)
	movq	80(%rsp), %rbx                  # 8-byte Reload
	jmp	.LBB3_95
.LBB3_94:
.Ltmp162:
	leaq	256(%rsp), %rdx
	movq	%r14, %rdi
	callq	_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_
.Ltmp163:
	movq	80(%rsp), %rbx                  # 8-byte Reload
.LBB3_95:                               # %_ZNSt6vectorIjSaIjEE9push_backEOj.exit84
	movq	232(%rsp), %r14
	cmpq	%rbp, %r14
	je	.LBB3_100
.LBB3_96:                               # =>This Inner Loop Header: Depth=1
	leaq	36(%r14), %rdx
	movq	8(%rbx), %rsi
	cmpq	16(%rbx), %rsi
	je	.LBB3_98
# %bb.97:                               #   in Loop: Header=BB3_96 Depth=1
	movl	(%rdx), %eax
	movl	%eax, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 8(%rbx)
	jmp	.LBB3_99
.LBB3_98:                               #   in Loop: Header=BB3_96 Depth=1
.Ltmp165:
	movq	%rbx, %rdi
	callq	_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJRKjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_
.Ltmp166:
.LBB3_99:                               # %_ZNSt6vectorIjSaIjEE9push_backERKj.exit93
                                        #   in Loop: Header=BB3_96 Depth=1
	movq	%r14, %rdi
	callq	_ZSt18_Rb_tree_incrementPSt18_Rb_tree_node_base
	movq	%rax, %r14
	cmpq	%rbp, %rax
	jne	.LBB3_96
.LBB3_100:                              # %._crit_edge186
	leaq	208(%rsp), %rdi
	callq	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EED2Ev
	movq	16(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB3_102
# %bb.101:
	callq	_ZdlPv
.LBB3_102:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit
	leaq	648(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	addq	$1560, %rsp                     # imm = 0x618
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_60:
	.cfi_def_cfa_offset 1616
.Ltmp144:
	movl	$.L.str.8, %edi
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	_ZSt24__throw_out_of_range_fmtPKcz
.Ltmp145:
# %bb.64:                               # %.noexc75
.LBB3_86:
.Ltmp156:
	movl	$.L.str.8, %edi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	_ZSt24__throw_out_of_range_fmtPKcz
.Ltmp157:
# %bb.87:                               # %.noexc86
.LBB3_108:
.Ltmp164:
	jmp	.LBB3_104
.LBB3_82:
.Ltmp155:
	jmp	.LBB3_104
.LBB3_81:
.Ltmp152:
	jmp	.LBB3_104
.LBB3_63:
.Ltmp143:
	jmp	.LBB3_104
.LBB3_22:                               # %.loopexit.split-lp
.Ltmp108:
	jmp	.LBB3_104
.LBB3_42:
.Ltmp121:
	jmp	.LBB3_45
.LBB3_44:
.Ltmp137:
	jmp	.LBB3_45
.LBB3_43:
.Ltmp124:
	jmp	.LBB3_45
.LBB3_103:                              # %.loopexit
.Ltmp167:
	jmp	.LBB3_104
.LBB3_92:                               # %.loopexit110
.Ltmp161:
	jmp	.LBB3_104
.LBB3_69:                               # %.loopexit116
.Ltmp149:
	jmp	.LBB3_104
.LBB3_23:
.Ltmp111:
	movq	%rax, %rbx
	jmp	.LBB3_47
.LBB3_24:
.Ltmp114:
	movq	%rax, %rbx
	jmp	.LBB3_46
.LBB3_93:                               # %.loopexit.split-lp111
.Ltmp158:
	jmp	.LBB3_104
.LBB3_70:                               # %.loopexit.split-lp117
.Ltmp146:
.LBB3_104:
	movq	%rax, %rbx
	jmp	.LBB3_105
.LBB3_25:
.Ltmp140:
.LBB3_45:
	movq	%rax, %rbx
	leaq	1168(%rsp), %rdi
	movl	$_ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE, %esi
	callq	_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED2Ev
	movq	88(%rsp), %rdi                  # 8-byte Reload
	callq	_ZNSt8ios_baseD2Ev
.LBB3_46:
	leaq	256(%rsp), %rdi
	movl	$_ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE, %esi
	callq	_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED2Ev
	movq	96(%rsp), %rdi                  # 8-byte Reload
	callq	_ZNSt8ios_baseD2Ev
.LBB3_47:
	movq	104(%rsp), %rdi
	leaq	120(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB3_49
# %bb.48:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i61
	callq	_ZdlPv
.LBB3_49:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit63
	movq	136(%rsp), %rdi
	leaq	152(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB3_51
# %bb.50:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i64
	callq	_ZdlPv
.LBB3_51:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit66
	movq	48(%rsp), %rdi
	leaq	64(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB3_105
# %bb.52:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i67
	callq	_ZdlPv
.LBB3_105:
	leaq	208(%rsp), %rdi
	callq	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EED2Ev
	movq	16(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB3_107
# %bb.106:
	callq	_ZdlPv
.LBB3_107:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit96
	leaq	648(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end3:
	.size	_Z12GraphpreprocNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERSt6vectorIjSaIjEES8_S8_S8_, .Lfunc_end3-_Z12GraphpreprocNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERSt6vectorIjSaIjEES8_S8_S8_
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table3:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp106-.Lfunc_begin1         #   Call between .Lfunc_begin1 and .Ltmp106
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp106-.Lfunc_begin1         # >> Call Site 2 <<
	.uleb128 .Ltmp107-.Ltmp106              #   Call between .Ltmp106 and .Ltmp107
	.uleb128 .Ltmp108-.Lfunc_begin1         #     jumps to .Ltmp108
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp109-.Lfunc_begin1         # >> Call Site 3 <<
	.uleb128 .Ltmp110-.Ltmp109              #   Call between .Ltmp109 and .Ltmp110
	.uleb128 .Ltmp111-.Lfunc_begin1         #     jumps to .Ltmp111
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp112-.Lfunc_begin1         # >> Call Site 4 <<
	.uleb128 .Ltmp113-.Ltmp112              #   Call between .Ltmp112 and .Ltmp113
	.uleb128 .Ltmp114-.Lfunc_begin1         #     jumps to .Ltmp114
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp115-.Lfunc_begin1         # >> Call Site 5 <<
	.uleb128 .Ltmp118-.Ltmp115              #   Call between .Ltmp115 and .Ltmp118
	.uleb128 .Ltmp140-.Lfunc_begin1         #     jumps to .Ltmp140
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp119-.Lfunc_begin1         # >> Call Site 6 <<
	.uleb128 .Ltmp120-.Ltmp119              #   Call between .Ltmp119 and .Ltmp120
	.uleb128 .Ltmp121-.Lfunc_begin1         #     jumps to .Ltmp121
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp122-.Lfunc_begin1         # >> Call Site 7 <<
	.uleb128 .Ltmp123-.Ltmp122              #   Call between .Ltmp122 and .Ltmp123
	.uleb128 .Ltmp124-.Lfunc_begin1         #     jumps to .Ltmp124
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp125-.Lfunc_begin1         # >> Call Site 8 <<
	.uleb128 .Ltmp134-.Ltmp125              #   Call between .Ltmp125 and .Ltmp134
	.uleb128 .Ltmp140-.Lfunc_begin1         #     jumps to .Ltmp140
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp135-.Lfunc_begin1         # >> Call Site 9 <<
	.uleb128 .Ltmp136-.Ltmp135              #   Call between .Ltmp135 and .Ltmp136
	.uleb128 .Ltmp137-.Lfunc_begin1         #     jumps to .Ltmp137
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp138-.Lfunc_begin1         # >> Call Site 10 <<
	.uleb128 .Ltmp139-.Ltmp138              #   Call between .Ltmp138 and .Ltmp139
	.uleb128 .Ltmp140-.Lfunc_begin1         #     jumps to .Ltmp140
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp141-.Lfunc_begin1         # >> Call Site 11 <<
	.uleb128 .Ltmp142-.Ltmp141              #   Call between .Ltmp141 and .Ltmp142
	.uleb128 .Ltmp143-.Lfunc_begin1         #     jumps to .Ltmp143
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp147-.Lfunc_begin1         # >> Call Site 12 <<
	.uleb128 .Ltmp148-.Ltmp147              #   Call between .Ltmp147 and .Ltmp148
	.uleb128 .Ltmp149-.Lfunc_begin1         #     jumps to .Ltmp149
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp150-.Lfunc_begin1         # >> Call Site 13 <<
	.uleb128 .Ltmp151-.Ltmp150              #   Call between .Ltmp150 and .Ltmp151
	.uleb128 .Ltmp152-.Lfunc_begin1         #     jumps to .Ltmp152
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp153-.Lfunc_begin1         # >> Call Site 14 <<
	.uleb128 .Ltmp154-.Ltmp153              #   Call between .Ltmp153 and .Ltmp154
	.uleb128 .Ltmp155-.Lfunc_begin1         #     jumps to .Ltmp155
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp159-.Lfunc_begin1         # >> Call Site 15 <<
	.uleb128 .Ltmp160-.Ltmp159              #   Call between .Ltmp159 and .Ltmp160
	.uleb128 .Ltmp161-.Lfunc_begin1         #     jumps to .Ltmp161
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp162-.Lfunc_begin1         # >> Call Site 16 <<
	.uleb128 .Ltmp163-.Ltmp162              #   Call between .Ltmp162 and .Ltmp163
	.uleb128 .Ltmp164-.Lfunc_begin1         #     jumps to .Ltmp164
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp165-.Lfunc_begin1         # >> Call Site 17 <<
	.uleb128 .Ltmp166-.Ltmp165              #   Call between .Ltmp165 and .Ltmp166
	.uleb128 .Ltmp167-.Lfunc_begin1         #     jumps to .Ltmp167
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp144-.Lfunc_begin1         # >> Call Site 18 <<
	.uleb128 .Ltmp145-.Ltmp144              #   Call between .Ltmp144 and .Ltmp145
	.uleb128 .Ltmp146-.Lfunc_begin1         #     jumps to .Ltmp146
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp156-.Lfunc_begin1         # >> Call Site 19 <<
	.uleb128 .Ltmp157-.Ltmp156              #   Call between .Ltmp156 and .Ltmp157
	.uleb128 .Ltmp158-.Lfunc_begin1         #     jumps to .Ltmp158
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp157-.Lfunc_begin1         # >> Call Site 20 <<
	.uleb128 .Lfunc_end3-.Ltmp157           #   Call between .Ltmp157 and .Lfunc_end3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	_Z8TRIMMINGRSt6vectorIjSaIjEES2_S2_S2_ # -- Begin function _Z8TRIMMINGRSt6vectorIjSaIjEES2_S2_S2_
	.type	_Z8TRIMMINGRSt6vectorIjSaIjEES2_S2_S2_,@function
_Z8TRIMMINGRSt6vectorIjSaIjEES2_S2_S2_: # @_Z8TRIMMINGRSt6vectorIjSaIjEES2_S2_S2_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %r12
	leaq	40(%rsp), %rdi
	movl	$9577544, %esi                  # imm = 0x922448
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_1
# %bb.3:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	movq	40(%rsp), %rdi
	movq	(%r12), %rsi
	movl	$9577544, %edx                  # imm = 0x922448
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_4
# %bb.5:                                # %_Z9gpuAssert10hipError_tPKcib.exit16
	leaq	32(%rsp), %rdi
	movl	$20085640, %esi                 # imm = 0x1327B88
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_6
# %bb.7:                                # %_Z9gpuAssert10hipError_tPKcib.exit18
	movq	32(%rsp), %rdi
	movq	(%r15), %rsi
	movl	$20085640, %edx                 # imm = 0x1327B88
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_8
# %bb.9:                                # %_Z9gpuAssert10hipError_tPKcib.exit20
	leaq	24(%rsp), %rdi
	movl	$9577544, %esi                  # imm = 0x922448
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_10
# %bb.11:                               # %_Z9gpuAssert10hipError_tPKcib.exit22
	movq	24(%rsp), %rdi
	movq	(%r14), %rsi
	movl	$9577544, %edx                  # imm = 0x922448
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_12
# %bb.13:                               # %_Z9gpuAssert10hipError_tPKcib.exit24
	leaq	16(%rsp), %rdi
	movl	$20085640, %esi                 # imm = 0x1327B88
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_14
# %bb.15:                               # %_Z9gpuAssert10hipError_tPKcib.exit26
	movq	16(%rsp), %rdi
	movq	(%rbx), %rsi
	movl	$20085640, %edx                 # imm = 0x1327B88
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_19
# %bb.16:                               # %_Z9gpuAssert10hipError_tPKcib.exit28.preheader
	movabsq	$4294967552, %rbx               # imm = 0x100000100
	leaq	12(%rsp), %r14
	leaq	9098(%rbx), %r15
.LBB4_17:                               # %_Z9gpuAssert10hipError_tPKcib.exit28
                                        # =>This Inner Loop Header: Depth=1
	movl	$1, 12(%rsp)
	movl	$Mterminate, %edi
	movl	$4, %edx
	movq	%r14, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	testl	%eax, %eax
	jne	.LBB4_18
# %bb.21:                               # %_Z9gpuAssert10hipError_tPKcib.exit30
                                        #   in Loop: Header=BB4_17 Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_23
# %bb.22:                               #   in Loop: Header=BB4_17 Depth=1
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rcx
	movq	16(%rsp), %r8
	movl	$2394385, %edi                  # imm = 0x248911
	callq	_Z25__device_stub__TRIMKernelmPjS_S_S_
.LBB4_23:                               #   in Loop: Header=BB4_17 Depth=1
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB4_24
# %bb.25:                               # %_Z9gpuAssert10hipError_tPKcib.exit32
                                        #   in Loop: Header=BB4_17 Depth=1
	movl	$Mterminate, %esi
	movl	$4, %edx
	movq	%r14, %rdi
	xorl	%ecx, %ecx
	movl	$2, %r8d
	callq	hipMemcpyFromSymbol
	testl	%eax, %eax
	jne	.LBB4_26
# %bb.27:                               # %_Z9gpuAssert10hipError_tPKcib.exit34
                                        #   in Loop: Header=BB4_17 Depth=1
	cmpl	$0, 12(%rsp)
	je	.LBB4_17
# %bb.28:
	movq	40(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_29
# %bb.30:                               # %_Z9gpuAssert10hipError_tPKcib.exit36
	movq	32(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_31
# %bb.32:                               # %_Z9gpuAssert10hipError_tPKcib.exit38
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_33
# %bb.34:                               # %_Z9gpuAssert10hipError_tPKcib.exit40
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_35
# %bb.36:                               # %_Z9gpuAssert10hipError_tPKcib.exit42
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_26:
	.cfi_def_cfa_offset 96
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$688, %r8d                      # imm = 0x2B0
	jmp	.LBB4_2
.LBB4_24:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$685, %r8d                      # imm = 0x2AD
	jmp	.LBB4_2
.LBB4_18:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$679, %r8d                      # imm = 0x2A7
.LBB4_2:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.LBB4_1:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$659, %r8d                      # imm = 0x293
	jmp	.LBB4_2
.LBB4_4:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$660, %r8d                      # imm = 0x294
	jmp	.LBB4_2
.LBB4_6:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$662, %r8d                      # imm = 0x296
	jmp	.LBB4_2
.LBB4_8:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$663, %r8d                      # imm = 0x297
	jmp	.LBB4_2
.LBB4_10:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$665, %r8d                      # imm = 0x299
	jmp	.LBB4_2
.LBB4_12:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$666, %r8d                      # imm = 0x29A
	jmp	.LBB4_2
.LBB4_14:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$668, %r8d                      # imm = 0x29C
	jmp	.LBB4_2
.LBB4_19:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$669, %r8d                      # imm = 0x29D
	jmp	.LBB4_20
.LBB4_29:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$695, %r8d                      # imm = 0x2B7
	jmp	.LBB4_20
.LBB4_31:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$696, %r8d                      # imm = 0x2B8
	jmp	.LBB4_20
.LBB4_33:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$697, %r8d                      # imm = 0x2B9
	jmp	.LBB4_20
.LBB4_35:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$698, %r8d                      # imm = 0x2BA
.LBB4_20:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.Lfunc_end4:
	.size	_Z8TRIMMINGRSt6vectorIjSaIjEES2_S2_S2_, .Lfunc_end4-_Z8TRIMMINGRSt6vectorIjSaIjEES2_S2_S2_
	.cfi_endproc
                                        # -- End function
	.globl	_Z10PIVOTS_SELv                 # -- Begin function _Z10PIVOTS_SELv
	.type	_Z10PIVOTS_SELv,@function
_Z10PIVOTS_SELv:                        # @_Z10PIVOTS_SELv
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	leaq	9098(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_2
# %bb.1:
	movl	$2394385, %edi                  # imm = 0x248911
	callq	_Z32__device_stub__PIVOTS_SEL_Kernelm
.LBB5_2:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB5_4
# %bb.3:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB5_4:
	.cfi_def_cfa_offset 32
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$710, %r8d                      # imm = 0x2C6
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.Lfunc_end5:
	.size	_Z10PIVOTS_SELv, .Lfunc_end5-_Z10PIVOTS_SELv
	.cfi_endproc
                                        # -- End function
	.globl	_Z3BFSRSt6vectorIjSaIjEES2_jjS2_ # -- Begin function _Z3BFSRSt6vectorIjSaIjEES2_jjS2_
	.type	_Z3BFSRSt6vectorIjSaIjEES2_jjS2_,@function
_Z3BFSRSt6vectorIjSaIjEES2_jjS2_:       # @_Z3BFSRSt6vectorIjSaIjEES2_jjS2_
.Lfunc_begin2:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception2
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movl	%edx, %r14d
	movq	%rsi, 128(%rsp)                 # 8-byte Spill
	movq	%rdi, %rbx
	movl	%ecx, %r15d
	subl	%edx, %r15d
	leal	1(%r15), %r12d
	movq	(%r8), %rax
	cmpq	%rax, 8(%r8)
	je	.LBB6_2
# %bb.1:
	movq	%rax, 8(%r8)
.LBB6_2:                                # %_ZNSt6vectorIjSaIjEE5clearEv.exit
	movl	$2394385, %esi                  # imm = 0x248911
	movq	%r8, 120(%rsp)                  # 8-byte Spill
	movq	%r8, %rdi
	callq	_ZNSt6vectorIjSaIjEE6resizeEm
	xorps	%xmm0, %xmm0
	leaq	96(%rsp), %rdi
	movaps	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
	movl	%r12d, %r12d
.Ltmp168:
	movq	%r12, %rsi
	callq	_ZNSt6vectorIjSaIjEE6resizeEm
.Ltmp169:
# %bb.3:
.Ltmp171:
	leaq	32(%rsp), %rdi
	movl	$9577544, %esi                  # imm = 0x922448
	callq	hipMalloc
.Ltmp172:
# %bb.4:                                # %_ZL9hipMallocIjE10hipError_tPPT_m.exit
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB6_5
# %bb.8:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	movq	32(%rsp), %rdi
.Ltmp175:
	movl	$9577544, %edx                  # imm = 0x922448
	xorl	%esi, %esi
	callq	hipMemset
.Ltmp176:
# %bb.9:
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB6_10
# %bb.12:                               # %_Z9gpuAssert10hipError_tPKcib.exit71
.Ltmp179:
	leaq	24(%rsp), %rdi
	movl	$9577544, %esi                  # imm = 0x922448
	callq	hipMalloc
.Ltmp180:
# %bb.13:                               # %_ZL9hipMallocIjE10hipError_tPPT_m.exit73
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB6_14
# %bb.16:                               # %_Z9gpuAssert10hipError_tPKcib.exit76
	movq	24(%rsp), %rdi
.Ltmp183:
	movl	$9577544, %edx                  # imm = 0x922448
	xorl	%esi, %esi
	callq	hipMemset
.Ltmp184:
# %bb.17:
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB6_18
# %bb.20:                               # %_Z9gpuAssert10hipError_tPKcib.exit79
.Ltmp187:
	leaq	64(%rsp), %rdi
	movl	$9577544, %esi                  # imm = 0x922448
	callq	hipMalloc
.Ltmp188:
# %bb.21:                               # %_ZL9hipMallocIjE10hipError_tPPT_m.exit81
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB6_22
# %bb.24:                               # %_Z9gpuAssert10hipError_tPKcib.exit84
	movq	64(%rsp), %rdi
.Ltmp191:
	movl	$9577544, %edx                  # imm = 0x922448
	xorl	%esi, %esi
	callq	hipMemset
.Ltmp192:
# %bb.25:
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB6_26
# %bb.28:                               # %_Z9gpuAssert10hipError_tPKcib.exit87
.Ltmp195:
	leaq	88(%rsp), %rdi
	movl	$9577544, %esi                  # imm = 0x922448
	callq	hipMalloc
.Ltmp196:
# %bb.29:                               # %_ZL9hipMallocIjE10hipError_tPPT_m.exit89
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB6_30
# %bb.32:                               # %_Z9gpuAssert10hipError_tPKcib.exit92
	movq	88(%rsp), %rdi
	movq	(%rbx), %rsi
.Ltmp199:
	movl	$9577544, %edx                  # imm = 0x922448
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp200:
# %bb.33:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_34
# %bb.37:                               # %_Z9gpuAssert10hipError_tPKcib.exit95
.Ltmp203:
	leaq	80(%rsp), %rdi
	movl	$20085640, %esi                 # imm = 0x1327B88
	callq	hipMalloc
.Ltmp204:
# %bb.38:                               # %_ZL9hipMallocIjE10hipError_tPPT_m.exit97
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_39
# %bb.41:                               # %_Z9gpuAssert10hipError_tPKcib.exit100
	movq	80(%rsp), %rdi
	movq	128(%rsp), %rax                 # 8-byte Reload
	movq	(%rax), %rsi
.Ltmp207:
	movl	$20085640, %edx                 # imm = 0x1327B88
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp208:
# %bb.42:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_43
# %bb.45:                               # %_Z9gpuAssert10hipError_tPKcib.exit103
.Ltmp211:
	leaq	56(%rsp), %rdi
	movl	$9577544, %esi                  # imm = 0x922448
	callq	hipMalloc
.Ltmp212:
# %bb.46:                               # %_ZL9hipMallocIjE10hipError_tPPT_m.exit105
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_47
# %bb.49:                               # %_Z9gpuAssert10hipError_tPKcib.exit108
	leaq	(,%r12,4), %rbx
.Ltmp215:
	leaq	72(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
.Ltmp216:
# %bb.50:                               # %_ZL9hipMallocIjE10hipError_tPPT_m.exit110
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB6_51
# %bb.53:                               # %_Z9gpuAssert10hipError_tPKcib.exit113
.Ltmp219:
	leaq	48(%rsp), %rdi
	movl	$9577544, %esi                  # imm = 0x922448
	callq	hipMalloc
.Ltmp220:
# %bb.54:                               # %_ZL9hipMallocIjE10hipError_tPPT_m.exit115
	movl	%eax, %r13d
	testl	%eax, %eax
	jne	.LBB6_55
# %bb.57:                               # %_Z9gpuAssert10hipError_tPKcib.exit118
.Ltmp223:
	movl	$2394386, %edi                  # imm = 0x248912
	callq	_Z17preallocBlockSumsj
.Ltmp224:
# %bb.58:
	addl	$256, %r15d                     # imm = 0x100
	shrl	$8, %r15d
	btsq	$32, %r15
.Ltmp226:
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp227:
# %bb.59:
	testl	%eax, %eax
	jne	.LBB6_61
# %bb.60:
	movq	72(%rsp), %rsi
.Ltmp228:
	movq	%r12, %rdi
	callq	_Z24__device_stub__ReadPivotmPj
.Ltmp229:
.LBB6_61:
.Ltmp230:
	callq	hipDeviceSynchronize
.Ltmp231:
# %bb.62:
	movl	%eax, %r15d
	testl	%eax, %eax
	jne	.LBB6_63
# %bb.68:                               # %_Z9gpuAssert10hipError_tPKcib.exit121
	movq	96(%rsp), %rdi
	movq	72(%rsp), %rsi
.Ltmp234:
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp235:
# %bb.69:
	movl	$0, 20(%rsp)
	cmpl	%r14d, %ebp
	jb	.LBB6_83
# %bb.70:                               # %.lr.ph
	movslq	%r14d, %rbx
	movl	$4294967295, %r14d              # imm = 0xFFFFFFFF
.LBB6_71:                               # =>This Inner Loop Header: Depth=1
	movq	96(%rsp), %rax
	movq	104(%rsp), %rdx
	subq	%rax, %rdx
	sarq	$2, %rdx
	cmpq	%rbx, %rdx
	jbe	.LBB6_72
# %bb.75:                               #   in Loop: Header=BB6_71 Depth=1
	movl	(%rax,%rbx,4), %edi
	cmpq	%r14, %rdi
	je	.LBB6_82
# %bb.76:                               #   in Loop: Header=BB6_71 Depth=1
	shlq	$2, %rdi
	addq	32(%rsp), %rdi
.Ltmp237:
	movl	$1, %esi
	callq	_Z7setUIntPjj
.Ltmp238:
# %bb.77:                               #   in Loop: Header=BB6_71 Depth=1
	movq	96(%rsp), %rax
	movq	104(%rsp), %rdx
	subq	%rax, %rdx
	sarq	$2, %rdx
	cmpq	%rbx, %rdx
	jbe	.LBB6_72
# %bb.78:                               #   in Loop: Header=BB6_71 Depth=1
	movl	(%rax,%rbx,4), %edi
	shlq	$2, %rdi
	addq	24(%rsp), %rdi
.Ltmp239:
	movl	$1, %esi
	callq	_Z7setUIntPjj
.Ltmp240:
# %bb.79:                               #   in Loop: Header=BB6_71 Depth=1
	movq	96(%rsp), %rax
	movq	104(%rsp), %rdx
	subq	%rax, %rdx
	sarq	$2, %rdx
	cmpq	%rbx, %rdx
	jbe	.LBB6_72
# %bb.80:                               #   in Loop: Header=BB6_71 Depth=1
	movl	20(%rsp), %edi
	shlq	$2, %rdi
	addq	56(%rsp), %rdi
	movl	(%rax,%rbx,4), %esi
.Ltmp244:
	callq	_Z7setUIntPjj
.Ltmp245:
# %bb.81:                               #   in Loop: Header=BB6_71 Depth=1
	incl	20(%rsp)
.LBB6_82:                               #   in Loop: Header=BB6_71 Depth=1
	incq	%rbx
	cmpl	%ebp, %ebx
	jbe	.LBB6_71
.LBB6_83:                               # %._crit_edge
.Ltmp247:
	leaq	20(%rsp), %rsi
	movl	$numActiveThreads, %edi
	movl	$4, %edx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
.Ltmp248:
# %bb.84:                               # %_Z17hipMemcpyToSymbolIjE10hipError_tRKT_PKvmm13hipMemcpyKind.exit
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_90
# %bb.85:
	leaq	44(%rsp), %r14
	movl	$255, %ebp
	movabsq	$4294967552, %r15               # imm = 0x100000100
	movabsq	$4294976650, %r12               # imm = 0x10000248A
	leaq	20(%rsp), %r13
.LBB6_86:                               # %_Z9gpuAssert10hipError_tPKcib.exit136
                                        # =>This Inner Loop Header: Depth=1
	movl	$1, 44(%rsp)
.Ltmp251:
	movl	$Mterminate, %edi
	movl	$4, %edx
	movq	%r14, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
.Ltmp252:
# %bb.87:                               # %_Z17hipMemcpyToSymbolIjE10hipError_tRKT_PKvmm13hipMemcpyKind.exit138
                                        #   in Loop: Header=BB6_86 Depth=1
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_88
# %bb.92:                               # %_Z9gpuAssert10hipError_tPKcib.exit141
                                        #   in Loop: Header=BB6_86 Depth=1
	movl	20(%rsp), %edi
	addl	%ebp, %edi
	shrl	$8, %edi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
.Ltmp257:
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp258:
# %bb.93:                               #   in Loop: Header=BB6_86 Depth=1
	testl	%eax, %eax
	jne	.LBB6_95
# %bb.94:                               #   in Loop: Header=BB6_86 Depth=1
	movq	56(%rsp), %rsi
	movq	88(%rsp), %rdx
	movq	80(%rsp), %rcx
	movq	32(%rsp), %r8
	movq	24(%rsp), %r9
	movq	64(%rsp), %rax
.Ltmp259:
	movq	%rax, (%rsp)
	movl	$2394385, %edi                  # imm = 0x248911
	callq	_Z25__device_stub__BFSKernel1mPjS_S_S_S_S_
.Ltmp260:
.LBB6_95:                               #   in Loop: Header=BB6_86 Depth=1
.Ltmp261:
	callq	hipDeviceSynchronize
.Ltmp262:
# %bb.96:                               #   in Loop: Header=BB6_86 Depth=1
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_97
# %bb.104:                              # %_Z9gpuAssert10hipError_tPKcib.exit144
                                        #   in Loop: Header=BB6_86 Depth=1
.Ltmp265:
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp266:
# %bb.105:                              #   in Loop: Header=BB6_86 Depth=1
	testl	%eax, %eax
	jne	.LBB6_107
# %bb.106:                              #   in Loop: Header=BB6_86 Depth=1
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	64(%rsp), %rcx
.Ltmp267:
	movl	$2394385, %edi                  # imm = 0x248911
	callq	_Z25__device_stub__BFSKernel2mPjS_S_
.Ltmp268:
.LBB6_107:                              #   in Loop: Header=BB6_86 Depth=1
.Ltmp269:
	callq	hipDeviceSynchronize
.Ltmp270:
# %bb.108:                              #   in Loop: Header=BB6_86 Depth=1
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_109
# %bb.111:                              # %_Z9gpuAssert10hipError_tPKcib.exit147
                                        #   in Loop: Header=BB6_86 Depth=1
.Ltmp273:
	movl	$Mterminate, %esi
	movl	$4, %edx
	movq	%r14, %rdi
	xorl	%ecx, %ecx
	movl	$2, %r8d
	callq	hipMemcpyFromSymbol
.Ltmp274:
# %bb.112:                              # %_Z19hipMemcpyFromSymbolIjE10hipError_tPvRKT_mm13hipMemcpyKind.exit
                                        #   in Loop: Header=BB6_86 Depth=1
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_113
# %bb.115:                              # %_Z9gpuAssert10hipError_tPKcib.exit151
                                        #   in Loop: Header=BB6_86 Depth=1
	cmpl	$0, 44(%rsp)
	jne	.LBB6_129
# %bb.116:                              #   in Loop: Header=BB6_86 Depth=1
	movq	48(%rsp), %rdi
	movq	32(%rsp), %rsi
.Ltmp316:
	movl	$2394386, %edx                  # imm = 0x248912
	xorl	%ecx, %ecx
	callq	_Z21prescanArrayRecursivePjPKjii
.Ltmp317:
# %bb.117:                              # %_Z12prescanArrayPjS_i.exit
                                        #   in Loop: Header=BB6_86 Depth=1
	movq	48(%rsp), %rsi
	movl	$9577540, %eax                  # imm = 0x922444
	addq	%rax, %rsi
.Ltmp318:
	movl	$4, %edx
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp319:
# %bb.118:                              #   in Loop: Header=BB6_86 Depth=1
.Ltmp320:
	movl	$numActiveThreads, %edi
	movl	$4, %edx
	movq	%r13, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
.Ltmp321:
# %bb.119:                              # %_Z17hipMemcpyToSymbolIjE10hipError_tRKT_PKvmm13hipMemcpyKind.exit154
                                        #   in Loop: Header=BB6_86 Depth=1
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_120
# %bb.122:                              # %_Z9gpuAssert10hipError_tPKcib.exit157
                                        #   in Loop: Header=BB6_86 Depth=1
.Ltmp324:
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp325:
# %bb.123:                              #   in Loop: Header=BB6_86 Depth=1
	testl	%eax, %eax
	jne	.LBB6_125
# %bb.124:                              #   in Loop: Header=BB6_86 Depth=1
	movq	48(%rsp), %rsi
	movq	56(%rsp), %rdx
.Ltmp326:
	movl	$2394385, %edi                  # imm = 0x248911
	movl	$256, %ecx                      # imm = 0x100
	callq	_Z26__device_stub__compactSIMDmPjS_m
.Ltmp327:
.LBB6_125:                              #   in Loop: Header=BB6_86 Depth=1
.Ltmp328:
	callq	hipDeviceSynchronize
.Ltmp329:
# %bb.126:                              #   in Loop: Header=BB6_86 Depth=1
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.LBB6_86
# %bb.127:
	movq	stderr(%rip), %r14
.Ltmp331:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp332:
# %bb.128:                              # %.noexc159
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$627, %r8d                      # imm = 0x273
	jmp	.LBB6_36
.LBB6_129:
	movq	120(%rsp), %rax                 # 8-byte Reload
	movq	(%rax), %rdi
	movq	24(%rsp), %rsi
.Ltmp277:
	movl	$9577540, %edx                  # imm = 0x922444
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp278:
# %bb.130:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_131
# %bb.133:                              # %_Z9gpuAssert10hipError_tPKcib.exit163
	movq	32(%rsp), %rdi
.Ltmp281:
	callq	hipFree
.Ltmp282:
# %bb.134:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_135
# %bb.137:                              # %_Z9gpuAssert10hipError_tPKcib.exit166
	movq	24(%rsp), %rdi
.Ltmp285:
	callq	hipFree
.Ltmp286:
# %bb.138:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_139
# %bb.141:                              # %_Z9gpuAssert10hipError_tPKcib.exit169
	movq	64(%rsp), %rdi
.Ltmp289:
	callq	hipFree
.Ltmp290:
# %bb.142:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_143
# %bb.145:                              # %_Z9gpuAssert10hipError_tPKcib.exit172
	movq	88(%rsp), %rdi
.Ltmp293:
	callq	hipFree
.Ltmp294:
# %bb.146:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_147
# %bb.149:                              # %_Z9gpuAssert10hipError_tPKcib.exit175
	movq	80(%rsp), %rdi
.Ltmp297:
	callq	hipFree
.Ltmp298:
# %bb.150:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_151
# %bb.153:                              # %_Z9gpuAssert10hipError_tPKcib.exit178
	movq	72(%rsp), %rdi
.Ltmp301:
	callq	hipFree
.Ltmp302:
# %bb.154:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_155
# %bb.157:                              # %_Z9gpuAssert10hipError_tPKcib.exit181
	movq	56(%rsp), %rdi
.Ltmp305:
	callq	hipFree
.Ltmp306:
# %bb.158:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_159
# %bb.161:                              # %_Z9gpuAssert10hipError_tPKcib.exit184
.Ltmp309:
	callq	_Z16deallocBlockSumsv
.Ltmp310:
# %bb.162:
	movq	48(%rsp), %rdi
.Ltmp311:
	callq	hipFree
.Ltmp312:
# %bb.163:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB6_164
# %bb.166:                              # %_Z9gpuAssert10hipError_tPKcib.exit187
	movq	96(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB6_168
# %bb.167:
	callq	_ZdlPv
.LBB6_168:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB6_72:                               # %.invoke
	.cfi_def_cfa_offset 192
.Ltmp241:
	movl	$.L.str.8, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	_ZSt24__throw_out_of_range_fmtPKcz
.Ltmp242:
# %bb.73:                               # %.cont
.LBB6_113:
	movq	stderr(%rip), %r14
.Ltmp275:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp276:
# %bb.114:                              # %.noexc150
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$612, %r8d                      # imm = 0x264
	jmp	.LBB6_36
.LBB6_109:
	movq	stderr(%rip), %r14
.Ltmp271:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp272:
# %bb.110:                              # %.noexc146
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$609, %r8d                      # imm = 0x261
	jmp	.LBB6_36
.LBB6_97:
	movq	stderr(%rip), %r14
.Ltmp263:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp264:
# %bb.98:                               # %.noexc143
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$602, %r8d                      # imm = 0x25A
	jmp	.LBB6_36
.LBB6_88:
	movq	stderr(%rip), %r14
.Ltmp254:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp255:
# %bb.89:                               # %.noexc140
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$592, %r8d                      # imm = 0x250
	jmp	.LBB6_36
.LBB6_120:
	movq	stderr(%rip), %r14
.Ltmp322:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp323:
# %bb.121:                              # %.noexc156
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$622, %r8d                      # imm = 0x26E
.LBB6_36:                               # %.noexc94
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.LBB6_5:
	movq	stderr(%rip), %rbx
.Ltmp173:
	movl	%r13d, %edi
	callq	hipGetErrorString
.Ltmp174:
# %bb.6:                                # %.noexc
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$532, %r8d                      # imm = 0x214
	jmp	.LBB6_7
.LBB6_10:
	movq	stderr(%rip), %rbx
.Ltmp177:
	movl	%r13d, %edi
	callq	hipGetErrorString
.Ltmp178:
# %bb.11:                               # %.noexc70
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$533, %r8d                      # imm = 0x215
	jmp	.LBB6_7
.LBB6_14:
	movq	stderr(%rip), %rbx
.Ltmp181:
	movl	%r13d, %edi
	callq	hipGetErrorString
.Ltmp182:
# %bb.15:                               # %.noexc75
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$536, %r8d                      # imm = 0x218
	jmp	.LBB6_7
.LBB6_18:
	movq	stderr(%rip), %rbx
.Ltmp185:
	movl	%r13d, %edi
	callq	hipGetErrorString
.Ltmp186:
# %bb.19:                               # %.noexc78
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$537, %r8d                      # imm = 0x219
	jmp	.LBB6_7
.LBB6_22:
	movq	stderr(%rip), %rbx
.Ltmp189:
	movl	%r13d, %edi
	callq	hipGetErrorString
.Ltmp190:
# %bb.23:                               # %.noexc83
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$540, %r8d                      # imm = 0x21C
	jmp	.LBB6_7
.LBB6_26:
	movq	stderr(%rip), %rbx
.Ltmp193:
	movl	%r13d, %edi
	callq	hipGetErrorString
.Ltmp194:
# %bb.27:                               # %.noexc86
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$541, %r8d                      # imm = 0x21D
	jmp	.LBB6_7
.LBB6_30:
	movq	stderr(%rip), %rbx
.Ltmp197:
	movl	%r13d, %edi
	callq	hipGetErrorString
.Ltmp198:
# %bb.31:                               # %.noexc91
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$543, %r8d                      # imm = 0x21F
	jmp	.LBB6_7
.LBB6_34:
	movq	stderr(%rip), %r14
.Ltmp201:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp202:
# %bb.35:                               # %.noexc94
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$544, %r8d                      # imm = 0x220
	jmp	.LBB6_36
.LBB6_39:
	movq	stderr(%rip), %r14
.Ltmp205:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp206:
# %bb.40:                               # %.noexc99
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$546, %r8d                      # imm = 0x222
	jmp	.LBB6_36
.LBB6_43:
	movq	stderr(%rip), %r14
.Ltmp209:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp210:
# %bb.44:                               # %.noexc102
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$547, %r8d                      # imm = 0x223
	jmp	.LBB6_36
.LBB6_47:
	movq	stderr(%rip), %r14
.Ltmp213:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp214:
# %bb.48:                               # %.noexc107
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$549, %r8d                      # imm = 0x225
	jmp	.LBB6_36
.LBB6_51:
	movq	stderr(%rip), %rbx
.Ltmp217:
	movl	%r13d, %edi
	callq	hipGetErrorString
.Ltmp218:
# %bb.52:                               # %.noexc112
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$551, %r8d                      # imm = 0x227
	jmp	.LBB6_7
.LBB6_55:
	movq	stderr(%rip), %rbx
.Ltmp221:
	movl	%r13d, %edi
	callq	hipGetErrorString
.Ltmp222:
# %bb.56:                               # %.noexc117
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$556, %r8d                      # imm = 0x22C
.LBB6_7:                                # %.noexc
	xorl	%eax, %eax
	callq	fprintf
	movl	%r13d, %edi
	callq	exit
.LBB6_63:
	movq	stderr(%rip), %rbx
.Ltmp232:
	movl	%r15d, %edi
	callq	hipGetErrorString
.Ltmp233:
# %bb.64:                               # %.noexc120
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$566, %r8d                      # imm = 0x236
	xorl	%eax, %eax
	callq	fprintf
	movl	%r15d, %edi
	callq	exit
.LBB6_90:
	movq	stderr(%rip), %r14
.Ltmp249:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp250:
# %bb.91:                               # %.noexc135
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$579, %r8d                      # imm = 0x243
	jmp	.LBB6_36
.LBB6_131:
	movq	stderr(%rip), %r14
.Ltmp279:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp280:
# %bb.132:                              # %.noexc162
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$636, %r8d                      # imm = 0x27C
	jmp	.LBB6_36
.LBB6_135:
	movq	stderr(%rip), %r14
.Ltmp283:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp284:
# %bb.136:                              # %.noexc165
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$640, %r8d                      # imm = 0x280
	jmp	.LBB6_36
.LBB6_139:
	movq	stderr(%rip), %r14
.Ltmp287:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp288:
# %bb.140:                              # %.noexc168
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$641, %r8d                      # imm = 0x281
	jmp	.LBB6_36
.LBB6_143:
	movq	stderr(%rip), %r14
.Ltmp291:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp292:
# %bb.144:                              # %.noexc171
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$642, %r8d                      # imm = 0x282
	jmp	.LBB6_36
.LBB6_147:
	movq	stderr(%rip), %r14
.Ltmp295:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp296:
# %bb.148:                              # %.noexc174
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$643, %r8d                      # imm = 0x283
	jmp	.LBB6_36
.LBB6_151:
	movq	stderr(%rip), %r14
.Ltmp299:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp300:
# %bb.152:                              # %.noexc177
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$644, %r8d                      # imm = 0x284
	jmp	.LBB6_36
.LBB6_155:
	movq	stderr(%rip), %r14
.Ltmp303:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp304:
# %bb.156:                              # %.noexc180
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$645, %r8d                      # imm = 0x285
	jmp	.LBB6_36
.LBB6_159:
	movq	stderr(%rip), %r14
.Ltmp307:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp308:
# %bb.160:                              # %.noexc183
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$646, %r8d                      # imm = 0x286
	jmp	.LBB6_36
.LBB6_164:
	movq	stderr(%rip), %r14
.Ltmp313:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp314:
# %bb.165:                              # %.noexc186
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$648, %r8d                      # imm = 0x288
	jmp	.LBB6_36
.LBB6_65:
.Ltmp170:
	jmp	.LBB6_170
.LBB6_67:
.Ltmp236:
	jmp	.LBB6_170
.LBB6_101:                              # %.loopexit.split-lp
.Ltmp256:
	jmp	.LBB6_170
.LBB6_99:
.Ltmp315:
	jmp	.LBB6_170
.LBB6_66:
.Ltmp225:
	jmp	.LBB6_170
.LBB6_169:                              # %.loopexit218
.Ltmp246:
	jmp	.LBB6_170
.LBB6_100:                              # %.loopexit
.Ltmp253:
	jmp	.LBB6_170
.LBB6_74:                               # %.loopexit.split-lp219
.Ltmp243:
	jmp	.LBB6_170
.LBB6_103:                              # %.loopexit.split-lp214
.Ltmp333:
	jmp	.LBB6_170
.LBB6_102:                              # %.loopexit213
.Ltmp330:
.LBB6_170:
	movq	%rax, %rbx
	movq	96(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB6_172
# %bb.171:
	callq	_ZdlPv
.LBB6_172:                              # %_ZNSt6vectorIjSaIjEED2Ev.exit189
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end6:
	.size	_Z3BFSRSt6vectorIjSaIjEES2_jjS2_, .Lfunc_end6-_Z3BFSRSt6vectorIjSaIjEES2_jjS2_
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table6:
.Lexception2:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end2-.Lcst_begin2
.Lcst_begin2:
	.uleb128 .Lfunc_begin2-.Lfunc_begin2    # >> Call Site 1 <<
	.uleb128 .Ltmp168-.Lfunc_begin2         #   Call between .Lfunc_begin2 and .Ltmp168
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp168-.Lfunc_begin2         # >> Call Site 2 <<
	.uleb128 .Ltmp169-.Ltmp168              #   Call between .Ltmp168 and .Ltmp169
	.uleb128 .Ltmp170-.Lfunc_begin2         #     jumps to .Ltmp170
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp171-.Lfunc_begin2         # >> Call Site 3 <<
	.uleb128 .Ltmp224-.Ltmp171              #   Call between .Ltmp171 and .Ltmp224
	.uleb128 .Ltmp225-.Lfunc_begin2         #     jumps to .Ltmp225
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp226-.Lfunc_begin2         # >> Call Site 4 <<
	.uleb128 .Ltmp235-.Ltmp226              #   Call between .Ltmp226 and .Ltmp235
	.uleb128 .Ltmp236-.Lfunc_begin2         #     jumps to .Ltmp236
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp237-.Lfunc_begin2         # >> Call Site 5 <<
	.uleb128 .Ltmp245-.Ltmp237              #   Call between .Ltmp237 and .Ltmp245
	.uleb128 .Ltmp246-.Lfunc_begin2         #     jumps to .Ltmp246
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp247-.Lfunc_begin2         # >> Call Site 6 <<
	.uleb128 .Ltmp248-.Ltmp247              #   Call between .Ltmp247 and .Ltmp248
	.uleb128 .Ltmp315-.Lfunc_begin2         #     jumps to .Ltmp315
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp251-.Lfunc_begin2         # >> Call Site 7 <<
	.uleb128 .Ltmp252-.Ltmp251              #   Call between .Ltmp251 and .Ltmp252
	.uleb128 .Ltmp253-.Lfunc_begin2         #     jumps to .Ltmp253
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp257-.Lfunc_begin2         # >> Call Site 8 <<
	.uleb128 .Ltmp329-.Ltmp257              #   Call between .Ltmp257 and .Ltmp329
	.uleb128 .Ltmp330-.Lfunc_begin2         #     jumps to .Ltmp330
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp331-.Lfunc_begin2         # >> Call Site 9 <<
	.uleb128 .Ltmp332-.Ltmp331              #   Call between .Ltmp331 and .Ltmp332
	.uleb128 .Ltmp333-.Lfunc_begin2         #     jumps to .Ltmp333
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp277-.Lfunc_begin2         # >> Call Site 10 <<
	.uleb128 .Ltmp312-.Ltmp277              #   Call between .Ltmp277 and .Ltmp312
	.uleb128 .Ltmp315-.Lfunc_begin2         #     jumps to .Ltmp315
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp241-.Lfunc_begin2         # >> Call Site 11 <<
	.uleb128 .Ltmp242-.Ltmp241              #   Call between .Ltmp241 and .Ltmp242
	.uleb128 .Ltmp243-.Lfunc_begin2         #     jumps to .Ltmp243
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp275-.Lfunc_begin2         # >> Call Site 12 <<
	.uleb128 .Ltmp264-.Ltmp275              #   Call between .Ltmp275 and .Ltmp264
	.uleb128 .Ltmp333-.Lfunc_begin2         #     jumps to .Ltmp333
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp254-.Lfunc_begin2         # >> Call Site 13 <<
	.uleb128 .Ltmp255-.Ltmp254              #   Call between .Ltmp254 and .Ltmp255
	.uleb128 .Ltmp256-.Lfunc_begin2         #     jumps to .Ltmp256
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp322-.Lfunc_begin2         # >> Call Site 14 <<
	.uleb128 .Ltmp323-.Ltmp322              #   Call between .Ltmp322 and .Ltmp323
	.uleb128 .Ltmp333-.Lfunc_begin2         #     jumps to .Ltmp333
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp173-.Lfunc_begin2         # >> Call Site 15 <<
	.uleb128 .Ltmp222-.Ltmp173              #   Call between .Ltmp173 and .Ltmp222
	.uleb128 .Ltmp225-.Lfunc_begin2         #     jumps to .Ltmp225
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp232-.Lfunc_begin2         # >> Call Site 16 <<
	.uleb128 .Ltmp233-.Ltmp232              #   Call between .Ltmp232 and .Ltmp233
	.uleb128 .Ltmp236-.Lfunc_begin2         #     jumps to .Ltmp236
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp249-.Lfunc_begin2         # >> Call Site 17 <<
	.uleb128 .Ltmp314-.Ltmp249              #   Call between .Ltmp249 and .Ltmp314
	.uleb128 .Ltmp315-.Lfunc_begin2         #     jumps to .Ltmp315
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp314-.Lfunc_begin2         # >> Call Site 18 <<
	.uleb128 .Lfunc_end6-.Ltmp314           #   Call between .Ltmp314 and .Lfunc_end6
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end2:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	_Z7Update1RSt6vectorIjSaIjEES2_S2_Rj # -- Begin function _Z7Update1RSt6vectorIjSaIjEES2_S2_Rj
	.type	_Z7Update1RSt6vectorIjSaIjEES2_S2_Rj,@function
_Z7Update1RSt6vectorIjSaIjEES2_S2_Rj:   # @_Z7Update1RSt6vectorIjSaIjEES2_S2_Rj
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %r14
	movq	%rdx, %rbx
	movq	%rsi, %r15
	movq	%rdi, %r12
	movq	(%rdx), %rax
	cmpq	%rax, 8(%rdx)
	je	.LBB7_2
# %bb.1:
	movq	%rax, 8(%rbx)
.LBB7_2:                                # %_ZNSt6vectorIjSaIjEE5clearEv.exit
	movl	$2394386, %esi                  # imm = 0x248912
	movq	%rbx, %rdi
	callq	_ZNSt6vectorIjSaIjEE6resizeEm
	movq	%rsp, %rdi
	movl	$9577544, %esi                  # imm = 0x922448
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB7_3
# %bb.5:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	movq	(%rsp), %rdi
	movl	$9577544, %edx                  # imm = 0x922448
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB7_6
# %bb.7:                                # %_Z9gpuAssert10hipError_tPKcib.exit19
	leaq	24(%rsp), %rdi
	movl	$9577544, %esi                  # imm = 0x922448
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB7_8
# %bb.9:                                # %_Z9gpuAssert10hipError_tPKcib.exit21
	movq	24(%rsp), %rdi
	movq	(%r12), %rsi
	movl	$9577540, %edx                  # imm = 0x922444
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB7_10
# %bb.11:                               # %_Z9gpuAssert10hipError_tPKcib.exit23
	leaq	16(%rsp), %rdi
	movl	$9577544, %esi                  # imm = 0x922448
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB7_12
# %bb.13:                               # %_Z9gpuAssert10hipError_tPKcib.exit25
	movq	16(%rsp), %rdi
	movq	(%r15), %rsi
	movl	$9577540, %edx                  # imm = 0x922444
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB7_14
# %bb.15:                               # %_Z9gpuAssert10hipError_tPKcib.exit27
	leaq	8(%rsp), %rdi
	movl	$9577544, %esi                  # imm = 0x922448
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB7_16
# %bb.17:                               # %_Z9gpuAssert10hipError_tPKcib.exit29
	movl	$2394386, %edi                  # imm = 0x248912
	callq	_Z17preallocBlockSumsj
	movl	$1, (%r14)
	movl	$Mterminate, %edi
	movl	$4, %edx
	movq	%r14, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	testl	%eax, %eax
	jne	.LBB7_18
# %bb.19:                               # %_Z9gpuAssert10hipError_tPKcib.exit31
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	leaq	9098(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_21
# %bb.20:
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	(%rsp), %rcx
	movl	$2394385, %edi                  # imm = 0x248911
	callq	_Z28__device_stub__UpdateKernel1mPjS_S_
.LBB7_21:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB7_22
# %bb.23:                               # %_Z9gpuAssert10hipError_tPKcib.exit33
	movl	$Mterminate, %esi
	movl	$4, %edx
	movq	%r14, %rdi
	xorl	%ecx, %ecx
	movl	$2, %r8d
	callq	hipMemcpyFromSymbol
	testl	%eax, %eax
	jne	.LBB7_24
# %bb.25:                               # %_Z9gpuAssert10hipError_tPKcib.exit35
	cmpl	$0, (%r14)
	jne	.LBB7_29
# %bb.26:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$2394386, %edx                  # imm = 0x248912
	xorl	%ecx, %ecx
	callq	_Z21prescanArrayRecursivePjPKjii
	movq	(%rbx), %rdi
	movq	8(%rsp), %rsi
	movl	$9577544, %edx                  # imm = 0x922448
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB7_27
.LBB7_29:                               # %_Z9gpuAssert10hipError_tPKcib.exit37
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB7_30
# %bb.31:                               # %_Z9gpuAssert10hipError_tPKcib.exit39
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB7_32
# %bb.33:                               # %_Z9gpuAssert10hipError_tPKcib.exit41
	movq	(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB7_34
# %bb.35:                               # %_Z9gpuAssert10hipError_tPKcib.exit43
	callq	_Z16deallocBlockSumsv
	movq	8(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB7_36
# %bb.37:                               # %_Z9gpuAssert10hipError_tPKcib.exit45
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB7_3:
	.cfi_def_cfa_offset 80
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$757, %r8d                      # imm = 0x2F5
	jmp	.LBB7_4
.LBB7_6:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$758, %r8d                      # imm = 0x2F6
	jmp	.LBB7_4
.LBB7_8:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$760, %r8d                      # imm = 0x2F8
	jmp	.LBB7_4
.LBB7_10:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$761, %r8d                      # imm = 0x2F9
	jmp	.LBB7_4
.LBB7_12:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$763, %r8d                      # imm = 0x2FB
	jmp	.LBB7_4
.LBB7_14:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$764, %r8d                      # imm = 0x2FC
	jmp	.LBB7_4
.LBB7_16:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$766, %r8d                      # imm = 0x2FE
	jmp	.LBB7_4
.LBB7_18:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$773, %r8d                      # imm = 0x305
	jmp	.LBB7_4
.LBB7_22:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$780, %r8d                      # imm = 0x30C
	jmp	.LBB7_4
.LBB7_24:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$782, %r8d                      # imm = 0x30E
.LBB7_4:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.LBB7_30:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$790, %r8d                      # imm = 0x316
	jmp	.LBB7_28
.LBB7_32:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$791, %r8d                      # imm = 0x317
	jmp	.LBB7_28
.LBB7_34:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$792, %r8d                      # imm = 0x318
	jmp	.LBB7_28
.LBB7_36:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$794, %r8d                      # imm = 0x31A
	jmp	.LBB7_28
.LBB7_27:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$787, %r8d                      # imm = 0x313
.LBB7_28:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.Lfunc_end7:
	.size	_Z7Update1RSt6vectorIjSaIjEES2_S2_Rj, .Lfunc_end7-_Z7Update1RSt6vectorIjSaIjEES2_S2_Rj
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__RenumberKernelmPj # -- Begin function _Z29__device_stub__RenumberKernelmPj
	.type	_Z29__device_stub__RenumberKernelmPj,@function
_Z29__device_stub__RenumberKernelmPj:   # @_Z29__device_stub__RenumberKernelmPj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14RenumberKernelmPj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z29__device_stub__RenumberKernelmPj, .Lfunc_end8-_Z29__device_stub__RenumberKernelmPj
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__initpivotm   # -- Begin function _Z24__device_stub__initpivotm
	.type	_Z24__device_stub__initpivotm,@function
_Z24__device_stub__initpivotm:          # @_Z24__device_stub__initpivotm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9initpivotm, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z24__device_stub__initpivotm, .Lfunc_end9-_Z24__device_stub__initpivotm
	.cfi_endproc
                                        # -- End function
	.globl	_Z7setUIntPjj                   # -- Begin function _Z7setUIntPjj
	.type	_Z7setUIntPjj,@function
_Z7setUIntPjj:                          # @_Z7setUIntPjj
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	4(%rsp), %rax
	movl	%esi, (%rax)
	movl	$4, %edx
	movq	%rax, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB10_2
# %bb.1:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB10_2:
	.cfi_def_cfa_offset 32
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$234, %r8d
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.Lfunc_end10:
	.size	_Z7setUIntPjj, .Lfunc_end10-_Z7setUIntPjj
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__BFSKernel1mPjS_S_S_S_S_ # -- Begin function _Z25__device_stub__BFSKernel1mPjS_S_S_S_S_
	.type	_Z25__device_stub__BFSKernel1mPjS_S_S_S_S_,@function
_Z25__device_stub__BFSKernel1mPjS_S_S_S_S_: # @_Z25__device_stub__BFSKernel1mPjS_S_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10BFSKernel1mPjS_S_S_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z25__device_stub__BFSKernel1mPjS_S_S_S_S_, .Lfunc_end11-_Z25__device_stub__BFSKernel1mPjS_S_S_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__BFSKernel2mPjS_S_ # -- Begin function _Z25__device_stub__BFSKernel2mPjS_S_
	.type	_Z25__device_stub__BFSKernel2mPjS_S_,@function
_Z25__device_stub__BFSKernel2mPjS_S_:   # @_Z25__device_stub__BFSKernel2mPjS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10BFSKernel2mPjS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z25__device_stub__BFSKernel2mPjS_S_, .Lfunc_end12-_Z25__device_stub__BFSKernel2mPjS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__TRIMKernelmPjS_S_S_ # -- Begin function _Z25__device_stub__TRIMKernelmPjS_S_S_
	.type	_Z25__device_stub__TRIMKernelmPjS_S_S_,@function
_Z25__device_stub__TRIMKernelmPjS_S_S_: # @_Z25__device_stub__TRIMKernelmPjS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10TRIMKernelmPjS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_Z25__device_stub__TRIMKernelmPjS_S_S_, .Lfunc_end13-_Z25__device_stub__TRIMKernelmPjS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__PIVOTS_SEL_Kernelm # -- Begin function _Z32__device_stub__PIVOTS_SEL_Kernelm
	.type	_Z32__device_stub__PIVOTS_SEL_Kernelm,@function
_Z32__device_stub__PIVOTS_SEL_Kernelm:  # @_Z32__device_stub__PIVOTS_SEL_Kernelm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17PIVOTS_SEL_Kernelm, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end14:
	.size	_Z32__device_stub__PIVOTS_SEL_Kernelm, .Lfunc_end14-_Z32__device_stub__PIVOTS_SEL_Kernelm
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__UpdateKernelmPjS_ # -- Begin function _Z27__device_stub__UpdateKernelmPjS_
	.type	_Z27__device_stub__UpdateKernelmPjS_,@function
_Z27__device_stub__UpdateKernelmPjS_:   # @_Z27__device_stub__UpdateKernelmPjS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12UpdateKernelmPjS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end15:
	.size	_Z27__device_stub__UpdateKernelmPjS_, .Lfunc_end15-_Z27__device_stub__UpdateKernelmPjS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__UpdateKernel1mPjS_S_ # -- Begin function _Z28__device_stub__UpdateKernel1mPjS_S_
	.type	_Z28__device_stub__UpdateKernel1mPjS_S_,@function
_Z28__device_stub__UpdateKernel1mPjS_S_: # @_Z28__device_stub__UpdateKernel1mPjS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13UpdateKernel1mPjS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end16:
	.size	_Z28__device_stub__UpdateKernel1mPjS_S_, .Lfunc_end16-_Z28__device_stub__UpdateKernel1mPjS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__ReadPivotmPj # -- Begin function _Z24__device_stub__ReadPivotmPj
	.type	_Z24__device_stub__ReadPivotmPj,@function
_Z24__device_stub__ReadPivotmPj:        # @_Z24__device_stub__ReadPivotmPj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9ReadPivotmPj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end17:
	.size	_Z24__device_stub__ReadPivotmPj, .Lfunc_end17-_Z24__device_stub__ReadPivotmPj
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__compactSIMDmPjS_m # -- Begin function _Z26__device_stub__compactSIMDmPjS_m
	.type	_Z26__device_stub__compactSIMDmPjS_m,@function
_Z26__device_stub__compactSIMDmPjS_m:   # @_Z26__device_stub__compactSIMDmPjS_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11compactSIMDmPjS_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end18:
	.size	_Z26__device_stub__compactSIMDmPjS_m, .Lfunc_end18-_Z26__device_stub__compactSIMDmPjS_m
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z17preallocBlockSumsj
.LCPI19_0:
	.long	0x3b000000                      # float 0.001953125
	.text
	.globl	_Z17preallocBlockSumsj
	.type	_Z17preallocBlockSumsj,@function
_Z17preallocBlockSumsj:                 # @_Z17preallocBlockSumsj
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%edi, %ebx
	movl	%edi, numEltsAllocated(%rip)
	movq	$-8, %r14
	movl	$-1, %ebp
	movl	%edi, %eax
.LBB19_1:                               # =>This Inner Loop Header: Depth=1
	movl	%eax, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	mulss	.LCPI19_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %ecx
	cmpl	$2, %ecx
	movl	$1, %eax
	cmovgel	%ecx, %eax
	addq	$8, %r14
	incl	%ebp
	cmpl	$1, %ecx
	jg	.LBB19_1
# %bb.2:
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, scanBlockSums(%rip)
	movl	%ebp, numLevelsAllocated(%rip)
	xorl	%r14d, %r14d
.LBB19_3:                               # %_Z9gpuAssert10hipError_tPKcib.exit
                                        # =>This Inner Loop Header: Depth=1
	movl	%ebx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	mulss	.LCPI19_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %ebx
	cmpl	$2, %ebx
	jl	.LBB19_6
# %bb.4:                                #   in Loop: Header=BB19_3 Depth=1
	movq	scanBlockSums(%rip), %rdi
	addq	%r14, %rdi
	movl	%ebx, %esi
	shlq	$2, %rsi
	callq	hipMalloc
	addq	$8, %r14
	testl	%eax, %eax
	je	.LBB19_3
# %bb.5:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$826, %r8d                      # imm = 0x33A
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.LBB19_6:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end19:
	.size	_Z17preallocBlockSumsj, .Lfunc_end19-_Z17preallocBlockSumsj
	.cfi_endproc
                                        # -- End function
	.globl	_Z12prescanArrayPjS_i           # -- Begin function _Z12prescanArrayPjS_i
	.type	_Z12prescanArrayPjS_i,@function
_Z12prescanArrayPjS_i:                  # @_Z12prescanArrayPjS_i
	.cfi_startproc
# %bb.0:
	xorl	%ecx, %ecx
	jmp	_Z21prescanArrayRecursivePjPKjii # TAILCALL
.Lfunc_end20:
	.size	_Z12prescanArrayPjS_i, .Lfunc_end20-_Z12prescanArrayPjS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z16deallocBlockSumsv           # -- Begin function _Z16deallocBlockSumsv
	.type	_Z16deallocBlockSumsv,@function
_Z16deallocBlockSumsv:                  # @_Z16deallocBlockSumsv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	cmpl	$0, numLevelsAllocated(%rip)
	je	.LBB21_3
# %bb.1:                                # %.lr.ph.preheader
	xorl	%ebx, %ebx
.LBB21_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	scanBlockSums(%rip), %rax
	movq	(%rax,%rbx,8), %rdi
	callq	hipFree
	incq	%rbx
	movl	numLevelsAllocated(%rip), %eax
	cmpq	%rax, %rbx
	jb	.LBB21_2
.LBB21_3:                               # %._crit_edge
	movq	scanBlockSums(%rip), %rdi
	callq	free
	movq	$0, scanBlockSums(%rip)
	xorl	%eax, %eax
	movl	%eax, numEltsAllocated(%rip)
	movl	%eax, numLevelsAllocated(%rip)
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end21:
	.size	_Z16deallocBlockSumsv, .Lfunc_end21-_Z16deallocBlockSumsv
	.cfi_endproc
                                        # -- End function
	.globl	_Z6UpdateRSt6vectorIjSaIjEES2_Rj # -- Begin function _Z6UpdateRSt6vectorIjSaIjEES2_Rj
	.type	_Z6UpdateRSt6vectorIjSaIjEES2_Rj,@function
_Z6UpdateRSt6vectorIjSaIjEES2_Rj:       # @_Z6UpdateRSt6vectorIjSaIjEES2_Rj
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	leaq	16(%rsp), %rdi
	movl	$9577540, %esi                  # imm = 0x922444
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB22_1
# %bb.3:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	movq	16(%rsp), %rdi
	movq	(%r15), %rsi
	movl	$9577540, %edx                  # imm = 0x922444
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB22_4
# %bb.5:                                # %_Z9gpuAssert10hipError_tPKcib.exit11
	leaq	8(%rsp), %rdi
	movl	$9577540, %esi                  # imm = 0x922444
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB22_6
# %bb.7:                                # %_Z9gpuAssert10hipError_tPKcib.exit13
	movq	8(%rsp), %rdi
	movq	(%r14), %rsi
	movl	$9577540, %edx                  # imm = 0x922444
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB22_8
# %bb.9:                                # %_Z9gpuAssert10hipError_tPKcib.exit15
	movl	$1, (%rbx)
	movl	$Mterminate, %edi
	movl	$4, %edx
	movq	%rbx, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	testl	%eax, %eax
	jne	.LBB22_10
# %bb.11:                               # %_Z9gpuAssert10hipError_tPKcib.exit17
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	leaq	9098(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB22_13
# %bb.12:
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$2394385, %edi                  # imm = 0x248911
	callq	_Z27__device_stub__UpdateKernelmPjS_
.LBB22_13:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB22_14
# %bb.15:                               # %_Z9gpuAssert10hipError_tPKcib.exit19
	movl	$Mterminate, %esi
	movl	$4, %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	movl	$2, %r8d
	callq	hipMemcpyFromSymbol
	testl	%eax, %eax
	jne	.LBB22_16
# %bb.18:                               # %_Z9gpuAssert10hipError_tPKcib.exit21
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB22_19
# %bb.20:                               # %_Z9gpuAssert10hipError_tPKcib.exit23
	movq	8(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB22_21
# %bb.22:                               # %_Z9gpuAssert10hipError_tPKcib.exit25
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB22_1:
	.cfi_def_cfa_offset 64
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$721, %r8d                      # imm = 0x2D1
	jmp	.LBB22_2
.LBB22_4:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$722, %r8d                      # imm = 0x2D2
	jmp	.LBB22_2
.LBB22_6:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$724, %r8d                      # imm = 0x2D4
	jmp	.LBB22_2
.LBB22_8:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$725, %r8d                      # imm = 0x2D5
	jmp	.LBB22_2
.LBB22_10:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$731, %r8d                      # imm = 0x2DB
	jmp	.LBB22_2
.LBB22_14:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$738, %r8d                      # imm = 0x2E2
.LBB22_2:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.LBB22_16:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$740, %r8d                      # imm = 0x2E4
	jmp	.LBB22_17
.LBB22_19:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$742, %r8d                      # imm = 0x2E6
	jmp	.LBB22_17
.LBB22_21:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$743, %r8d                      # imm = 0x2E7
.LBB22_17:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.Lfunc_end22:
	.size	_Z6UpdateRSt6vectorIjSaIjEES2_Rj, .Lfunc_end22-_Z6UpdateRSt6vectorIjSaIjEES2_Rj
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z21prescanArrayRecursivePjPKjii
.LCPI23_0:
	.long	0x3b000000                      # float 0.001953125
	.text
	.globl	_Z21prescanArrayRecursivePjPKjii
	.type	_Z21prescanArrayRecursivePjPKjii,@function
_Z21prescanArrayRecursivePjPKjii:       # @_Z21prescanArrayRecursivePjPKjii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, 32(%rsp)                  # 4-byte Spill
	movl	%edx, %r14d
	cvtsi2ss	%edx, %xmm1
	movq	%rsi, 24(%rsp)                  # 8-byte Spill
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	movss	.LCPI23_0(%rip), %xmm0          # xmm0 = mem[0],zero,zero,zero
	movss	%xmm1, (%rsp)                   # 4-byte Spill
	mulss	%xmm1, %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %esi
	movl	$1, %ebx
	movl	$256, %r12d                     # imm = 0x100
	cmpl	$2, %esi
	cmovgel	%esi, %ebx
	jge	.LBB23_4
# %bb.1:
	leal	-1(%r14), %eax
	testl	%eax, %r14d
	jne	.LBB23_3
# %bb.2:
	movl	%r14d, %r12d
	shrl	$31, %r12d
	addl	%r14d, %r12d
	sarl	%r12d
	jmp	.LBB23_4
.LBB23_3:
	leaq	52(%rsp), %r15
	movss	(%rsp), %xmm0                   # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	%r15, %rdi
	movl	%esi, %ebp
	callq	frexpf@PLT
	movl	%ebp, %esi
	movb	(%r15), %cl
	decb	%cl
	movl	$1, %r12d
	shll	%cl, %r12d
.LBB23_4:
	leal	(%r12,%r12), %eax
	leal	-1(%rbx), %ecx
	movl	%eax, %edx
	movl	%ecx, 20(%rsp)                  # 4-byte Spill
	imull	%ecx, %edx
	movl	%r14d, %r13d
	movl	%edx, 4(%rsp)                   # 4-byte Spill
	subl	%edx, %r13d
	movl	%r13d, %ebp
	shrl	%ebp
	cmpl	$1, %ebp
	adcl	$0, %ebp
	movl	%eax, (%rsp)                    # 4-byte Spill
	cmpl	%eax, %r13d
	jne	.LBB23_6
# %bb.5:
	xorl	%edx, %edx
	xorl	%r15d, %r15d
	jmp	.LBB23_7
.LBB23_6:
	leal	-1(%r13), %eax
	movl	%eax, 40(%rsp)                  # 4-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r13d, %xmm0
	leaq	48(%rsp), %rdi
	movl	%esi, %r15d
	callq	frexpf@PLT
	movl	%r15d, %esi
	leaq	48(%rsp), %rax
	movb	(%rax), %cl
	decb	%cl
	movl	$1, %eax
	shll	%cl, %eax
	testl	%r13d, 40(%rsp)                 # 4-byte Folded Reload
	cmovel	%ebp, %eax
	leal	(%rax,%rax), %ecx
	shrl	$4, %ecx
	leal	(%rcx,%rax,2), %edx
	shll	$2, %edx
	movl	$-1, %r15d
	movl	%eax, %ebp
.LBB23_7:                               # %._crit_edge
	movl	(%rsp), %ecx                    # 4-byte Reload
	movl	%ecx, %eax
	shrl	$4, %eax
	addl	%ecx, %eax
	shll	$2, %eax
	leal	(%r15,%rbx), %ecx
	cmpl	$1, %ecx
	adcl	%ebx, %r15d
	btsq	$32, %r15
	movl	%r12d, %r12d
	btsq	$32, %r12
	cmpl	$2, %esi
	jl	.LBB23_18
# %bb.8:
	movq	%rdx, 40(%rsp)                  # 8-byte Spill
	movl	%eax, %r8d
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	movslq	32(%rsp), %r14                  # 4-byte Folded Reload
	testl	%eax, %eax
	jne	.LBB23_10
# %bb.9:
	movq	scanBlockSums(%rip), %rax
	movq	(%rax,%r14,8), %rdx
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movl	(%rsp), %ecx                    # 4-byte Reload
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	_Z22__device_stub__prescanILb1ELb0EEvPjPKjS0_iii
.LBB23_10:
	movl	%ebp, %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	cmpl	(%rsp), %r13d                   # 4-byte Folded Reload
	je	.LBB23_13
# %bb.11:
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdx
	leaq	1(%rax), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	movq	40(%rsp), %r8                   # 8-byte Reload
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB23_13
# %bb.12:
	movq	scanBlockSums(%rip), %rax
	movq	(%rax,%r14,8), %rdx
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movl	%r13d, %ecx
	movl	20(%rsp), %r8d                  # 4-byte Reload
	movl	4(%rsp), %r9d                   # 4-byte Reload
	callq	_Z22__device_stub__prescanILb1ELb1EEvPjPKjS0_iii
.LBB23_13:
	movq	scanBlockSums(%rip), %rax
	movq	(%rax,%r14,8), %rdi
	leal	1(%r14), %ecx
	movq	%rdi, %rsi
	movl	%ebx, %edx
	callq	_Z21prescanArrayRecursivePjPKjii
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB23_15
# %bb.14:
	movq	scanBlockSums(%rip), %rax
	movq	(%rax,%r14,8), %rsi
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movl	4(%rsp), %edx                   # 4-byte Reload
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	callq	_Z25__device_stub__uniformAddPjS_iii
.LBB23_15:
	cmpl	(%rsp), %r13d                   # 4-byte Folded Reload
	je	.LBB23_22
# %bb.16:
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movabsq	$4294967296, %rdi               # imm = 0x100000000
	orq	%rdi, %rdx
	incq	%rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB23_22
# %bb.17:
	movq	scanBlockSums(%rip), %rax
	movq	(%rax,%r14,8), %rsi
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movl	%r13d, %edx
	movl	20(%rsp), %ecx                  # 4-byte Reload
	movl	4(%rsp), %r8d                   # 4-byte Reload
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25__device_stub__uniformAddPjS_iii # TAILCALL
.LBB23_18:
	.cfi_def_cfa_offset 112
	leal	-1(%r14), %ebx
	movl	%eax, %r8d
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%ebx, %r14d
	jne	.LBB23_21
# %bb.19:
	testl	%eax, %eax
	jne	.LBB23_22
# %bb.20:
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	24(%rsp), %rsi                  # 8-byte Reload
	xorl	%edx, %edx
	movl	(%rsp), %ecx                    # 4-byte Reload
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z22__device_stub__prescanILb0ELb0EEvPjPKjS0_iii # TAILCALL
.LBB23_21:
	.cfi_def_cfa_offset 112
	testl	%eax, %eax
	je	.LBB23_23
.LBB23_22:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB23_23:
	.cfi_def_cfa_offset 112
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	24(%rsp), %rsi                  # 8-byte Reload
	xorl	%edx, %edx
	movl	%r14d, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z22__device_stub__prescanILb0ELb1EEvPjPKjS0_iii # TAILCALL
.Lfunc_end23:
	.size	_Z21prescanArrayRecursivePjPKjii, .Lfunc_end23-_Z21prescanArrayRecursivePjPKjii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22__device_stub__prescanILb1ELb0EEvPjPKjS0_iii,"axG",@progbits,_Z22__device_stub__prescanILb1ELb0EEvPjPKjS0_iii,comdat
	.weak	_Z22__device_stub__prescanILb1ELb0EEvPjPKjS0_iii # -- Begin function _Z22__device_stub__prescanILb1ELb0EEvPjPKjS0_iii
	.type	_Z22__device_stub__prescanILb1ELb0EEvPjPKjS0_iii,@function
_Z22__device_stub__prescanILb1ELb0EEvPjPKjS0_iii: # @_Z22__device_stub__prescanILb1ELb0EEvPjPKjS0_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7prescanILb1ELb0EEvPjPKjS0_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end24:
	.size	_Z22__device_stub__prescanILb1ELb0EEvPjPKjS0_iii, .Lfunc_end24-_Z22__device_stub__prescanILb1ELb0EEvPjPKjS0_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22__device_stub__prescanILb1ELb1EEvPjPKjS0_iii,"axG",@progbits,_Z22__device_stub__prescanILb1ELb1EEvPjPKjS0_iii,comdat
	.weak	_Z22__device_stub__prescanILb1ELb1EEvPjPKjS0_iii # -- Begin function _Z22__device_stub__prescanILb1ELb1EEvPjPKjS0_iii
	.type	_Z22__device_stub__prescanILb1ELb1EEvPjPKjS0_iii,@function
_Z22__device_stub__prescanILb1ELb1EEvPjPKjS0_iii: # @_Z22__device_stub__prescanILb1ELb1EEvPjPKjS0_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7prescanILb1ELb1EEvPjPKjS0_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end25:
	.size	_Z22__device_stub__prescanILb1ELb1EEvPjPKjS0_iii, .Lfunc_end25-_Z22__device_stub__prescanILb1ELb1EEvPjPKjS0_iii
	.cfi_endproc
                                        # -- End function
	.text
	.globl	_Z25__device_stub__uniformAddPjS_iii # -- Begin function _Z25__device_stub__uniformAddPjS_iii
	.type	_Z25__device_stub__uniformAddPjS_iii,@function
_Z25__device_stub__uniformAddPjS_iii:   # @_Z25__device_stub__uniformAddPjS_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10uniformAddPjS_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end26:
	.size	_Z25__device_stub__uniformAddPjS_iii, .Lfunc_end26-_Z25__device_stub__uniformAddPjS_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22__device_stub__prescanILb0ELb0EEvPjPKjS0_iii,"axG",@progbits,_Z22__device_stub__prescanILb0ELb0EEvPjPKjS0_iii,comdat
	.weak	_Z22__device_stub__prescanILb0ELb0EEvPjPKjS0_iii # -- Begin function _Z22__device_stub__prescanILb0ELb0EEvPjPKjS0_iii
	.type	_Z22__device_stub__prescanILb0ELb0EEvPjPKjS0_iii,@function
_Z22__device_stub__prescanILb0ELb0EEvPjPKjS0_iii: # @_Z22__device_stub__prescanILb0ELb0EEvPjPKjS0_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7prescanILb0ELb0EEvPjPKjS0_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end27:
	.size	_Z22__device_stub__prescanILb0ELb0EEvPjPKjS0_iii, .Lfunc_end27-_Z22__device_stub__prescanILb0ELb0EEvPjPKjS0_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22__device_stub__prescanILb0ELb1EEvPjPKjS0_iii,"axG",@progbits,_Z22__device_stub__prescanILb0ELb1EEvPjPKjS0_iii,comdat
	.weak	_Z22__device_stub__prescanILb0ELb1EEvPjPKjS0_iii # -- Begin function _Z22__device_stub__prescanILb0ELb1EEvPjPKjS0_iii
	.type	_Z22__device_stub__prescanILb0ELb1EEvPjPKjS0_iii,@function
_Z22__device_stub__prescanILb0ELb1EEvPjPKjS0_iii: # @_Z22__device_stub__prescanILb0ELb1EEvPjPKjS0_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7prescanILb0ELb1EEvPjPKjS0_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end28:
	.size	_Z22__device_stub__prescanILb0ELb1EEvPjPKjS0_iii, .Lfunc_end28-_Z22__device_stub__prescanILb0ELb1EEvPjPKjS0_iii
	.cfi_endproc
                                        # -- End function
	.section	.text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat
	.hidden	__clang_call_terminate          # -- Begin function __clang_call_terminate
	.weak	__clang_call_terminate
	.type	__clang_call_terminate,@function
__clang_call_terminate:                 # @__clang_call_terminate
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__cxa_begin_catch
	callq	_ZSt9terminatev
.Lfunc_end29:
	.size	__clang_call_terminate, .Lfunc_end29-__clang_call_terminate
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EED2Ev,"axG",@progbits,_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EED2Ev,comdat
	.weak	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EED2Ev # -- Begin function _ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EED2Ev
	.p2align	1, 0x90
	.type	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EED2Ev,@function
_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EED2Ev: # @_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EED2Ev
.Lfunc_begin3:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception3
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	16(%rdi), %rsi
.Ltmp334:
	callq	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE8_M_eraseEPSt13_Rb_tree_nodeIS2_E
.Ltmp335:
# %bb.1:
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.LBB30_2:
	.cfi_def_cfa_offset 16
.Ltmp336:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end30:
	.size	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EED2Ev, .Lfunc_end30-_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EED2Ev
	.cfi_endproc
	.section	.gcc_except_table._ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EED2Ev,"aG",@progbits,_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EED2Ev,comdat
	.p2align	2, 0x0
GCC_except_table30:
.Lexception3:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end3-.Lcst_begin3
.Lcst_begin3:
	.uleb128 .Ltmp334-.Lfunc_begin3         # >> Call Site 1 <<
	.uleb128 .Ltmp335-.Ltmp334              #   Call between .Ltmp334 and .Ltmp335
	.uleb128 .Ltmp336-.Lfunc_begin3         #     jumps to .Ltmp336
	.byte	1                               #   On action: 1
.Lcst_end3:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE8_M_eraseEPSt13_Rb_tree_nodeIS2_E,"axG",@progbits,_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE8_M_eraseEPSt13_Rb_tree_nodeIS2_E,comdat
	.weak	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE8_M_eraseEPSt13_Rb_tree_nodeIS2_E # -- Begin function _ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE8_M_eraseEPSt13_Rb_tree_nodeIS2_E
	.p2align	1, 0x90
	.type	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE8_M_eraseEPSt13_Rb_tree_nodeIS2_E,@function
_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE8_M_eraseEPSt13_Rb_tree_nodeIS2_E: # @_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE8_M_eraseEPSt13_Rb_tree_nodeIS2_E
	.cfi_startproc
# %bb.0:
	testq	%rsi, %rsi
	je	.LBB31_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r14
	movq	%rdi, %rbx
.LBB31_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	24(%r14), %rsi
	movq	%rbx, %rdi
	callq	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE8_M_eraseEPSt13_Rb_tree_nodeIS2_E
	movq	16(%r14), %r15
	movq	%r14, %rdi
	callq	_ZdlPv
	movq	%r15, %r14
	testq	%r15, %r15
	jne	.LBB31_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB31_4:                               # %._crit_edge
	retq
.Lfunc_end31:
	.size	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE8_M_eraseEPSt13_Rb_tree_nodeIS2_E, .Lfunc_end31-_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE8_M_eraseEPSt13_Rb_tree_nodeIS2_E
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIjSaIjEE17_M_default_appendEm,"axG",@progbits,_ZNSt6vectorIjSaIjEE17_M_default_appendEm,comdat
	.weak	_ZNSt6vectorIjSaIjEE17_M_default_appendEm # -- Begin function _ZNSt6vectorIjSaIjEE17_M_default_appendEm
	.p2align	1, 0x90
	.type	_ZNSt6vectorIjSaIjEE17_M_default_appendEm,@function
_ZNSt6vectorIjSaIjEE17_M_default_appendEm: # @_ZNSt6vectorIjSaIjEE17_M_default_appendEm
	.cfi_startproc
# %bb.0:
	testq	%rsi, %rsi
	je	.LBB32_16
# %bb.1:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	8(%rdi), %r15
	movq	16(%rdi), %rax
	subq	%r15, %rax
	sarq	$2, %rax
	cmpq	%rsi, %rax
	jae	.LBB32_2
# %bb.5:
	movq	(%rbx), %r12
	subq	%r12, %r15
	movq	%r15, %r13
	sarq	$2, %r13
	movl	$.L.str.6, %edx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc
	testq	%rax, %rax
	movq	%rax, (%rsp)                    # 8-byte Spill
	je	.LBB32_6
# %bb.7:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIjE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB32_8
.LBB32_2:
	movl	$0, (%r15)
	leaq	4(%r15), %rdi
	cmpq	$1, %r14
	je	.LBB32_4
# %bb.3:                                # %_ZSt6fill_nIPjmjET_S1_T0_RKT1_.exit.loopexit.i.i.i
	leaq	-4(,%r14,4), %rdx
	xorl	%esi, %esi
	callq	memset@PLT
	leaq	(%r15,%r14,4), %rdi
.LBB32_4:                               # %_ZSt27__uninitialized_default_n_aIPjmjET_S1_T0_RSaIT1_E.exit
	movq	%rdi, 8(%rbx)
	jmp	.LBB32_15
.LBB32_6:
	xorl	%ebp, %ebp
.LBB32_8:
	leaq	(,%r13,4), %r13
	addq	%rbp, %r13
	movl	$0, (%r13)
	cmpq	$1, %r14
	je	.LBB32_10
# %bb.9:                                # %_ZSt6fill_nIPjmjET_S1_T0_RKT1_.exit.loopexit.i.i.i30
	leaq	4(%r13), %rdi
	leaq	-4(,%r14,4), %rdx
	xorl	%esi, %esi
	callq	memset@PLT
.LBB32_10:                              # %_ZSt27__uninitialized_default_n_aIPjmjET_S1_T0_RSaIT1_E.exit32
	testq	%r15, %r15
	jle	.LBB32_12
# %bb.11:
	movq	%rbp, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB32_12:                              # %_ZNSt6vectorIjSaIjEE11_S_relocateEPjS2_S2_RS0_.exit
	testq	%r12, %r12
	je	.LBB32_14
# %bb.13:
	movq	%r12, %rdi
	callq	_ZdlPv
.LBB32_14:                              # %_ZNSt12_Vector_baseIjSaIjEE13_M_deallocateEPjm.exit35
	movq	%rbp, (%rbx)
	leaq	(,%r14,4), %rax
	addq	%r13, %rax
	movq	%rax, 8(%rbx)
	movq	(%rsp), %rax                    # 8-byte Reload
	leaq	(,%rax,4), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
.LBB32_15:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB32_16:
	retq
.Lfunc_end32:
	.size	_ZNSt6vectorIjSaIjEE17_M_default_appendEm, .Lfunc_end32-_ZNSt6vectorIjSaIjEE17_M_default_appendEm
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc,@function
_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc: # @_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$2305843009213693951, %rcx      # imm = 0x1FFFFFFFFFFFFFFF
	movq	8(%rdi), %r8
	subq	(%rdi), %r8
	sarq	$2, %r8
	movq	%rcx, %rax
	subq	%r8, %rax
	cmpq	%rsi, %rax
	jb	.LBB33_2
# %bb.1:
	cmpq	%rsi, %r8
	cmovaq	%r8, %rsi
	leaq	(%rsi,%r8), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%r8, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB33_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end33:
	.size	_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc, .Lfunc_end33-_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorIjE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIjE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorIjE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIjE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorIjE8allocateEmPKv,@function
_ZNSt15__new_allocatorIjE8allocateEmPKv: # @_ZNSt15__new_allocatorIjE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$61, %rax
	jne	.LBB34_1
# %bb.3:
	shlq	$2, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB34_1:
	.cfi_def_cfa_offset 16
	shrq	$62, %rsi
	je	.LBB34_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB34_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end34:
	.size	_ZNSt15__new_allocatorIjE8allocateEmPKv, .Lfunc_end34-_ZNSt15__new_allocatorIjE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB35_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB35_3
.LBB35_1:                               # %._crit_edge
	movq	(%rbx), %rax
.LBB35_3:
	testq	%r14, %r14
	je	.LBB35_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB35_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB35_7
.LBB35_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB35_7:                               # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end35:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag, .Lfunc_end35-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIjSaIjEE17_M_realloc_insertIJRKjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_,"axG",@progbits,_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJRKjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_,comdat
	.weak	_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJRKjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_ # -- Begin function _ZNSt6vectorIjSaIjEE17_M_realloc_insertIJRKjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJRKjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_,@function
_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJRKjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_: # @_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJRKjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.11, %edx
	callq	_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %r14
	sarq	$2, %r14
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB36_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIjE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB36_3
.LBB36_1:
	xorl	%ebp, %ebp
.LBB36_3:                               # %_ZNSt12_Vector_baseIjSaIjEE11_M_allocateEm.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movl	(%rax), %eax
	movl	%eax, (%rbp,%r14,4)
	testq	%r12, %r12
	jle	.LBB36_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB36_5:                               # %_ZNSt6vectorIjSaIjEE11_S_relocateEPjS2_S2_RS0_.exit
	addq	%rbp, %r12
	addq	$4, %r12
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB36_7
# %bb.6:
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB36_7:                               # %_ZNSt6vectorIjSaIjEE11_S_relocateEPjS2_S2_RS0_.exit16
	testq	%r13, %r13
	je	.LBB36_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB36_9:                               # %_ZNSt12_Vector_baseIjSaIjEE13_M_deallocateEPjm.exit
	addq	%r15, %r12
	movq	%rbp, (%rbx)
	movq	%r12, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,4), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end36:
	.size	_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJRKjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_, .Lfunc_end36-_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJRKjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_,"axG",@progbits,_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_,comdat
	.weak	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_ # -- Begin function _ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_
	.p2align	1, 0x90
	.type	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_,@function
_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_: # @_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_
.Lfunc_begin4:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception4
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r15
	movq	%rdi, %r14
	movl	$40, %edi
	callq	_Znwm
	movq	%rax, %rbx
	movl	(%r15), %eax
	movl	%eax, 32(%rbx)
	movl	4(%r15), %ecx
	movl	%ecx, 36(%rbx)
	movq	16(%r14), %rcx
	testq	%rcx, %rcx
	je	.LBB37_1
.LBB37_2:                               # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movq	%rcx, %rdx
	xorl	%ecx, %ecx
	cmpl	32(%rdx), %eax
	setae	%cl
	movq	16(%rdx,%rcx,8), %rcx
	testq	%rcx, %rcx
	jne	.LBB37_2
	jmp	.LBB37_3
.LBB37_1:
	leaq	8(%r14), %rdx
.LBB37_3:                               # %.loopexit
.Ltmp337:
	movq	%r14, %rdi
	xorl	%esi, %esi
	movq	%rbx, %rcx
	callq	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE14_M_insert_nodeEPSt18_Rb_tree_node_baseSA_PSt13_Rb_tree_nodeIS2_E
.Ltmp338:
# %bb.4:                                # %_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE10_Auto_nodeD2Ev.exit
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB37_5:                               # %_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE10_Auto_nodeD2Ev.exit7
	.cfi_def_cfa_offset 32
.Ltmp339:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_ZdlPv
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end37:
	.size	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_, .Lfunc_end37-_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_
	.cfi_endproc
	.section	.gcc_except_table._ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_,"aG",@progbits,_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE16_M_emplace_equalIJS1_IjjEEEESt17_Rb_tree_iteratorIS2_EDpOT_,comdat
	.p2align	2, 0x0
GCC_except_table37:
.Lexception4:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end4-.Lcst_begin4
.Lcst_begin4:
	.uleb128 .Lfunc_begin4-.Lfunc_begin4    # >> Call Site 1 <<
	.uleb128 .Ltmp337-.Lfunc_begin4         #   Call between .Lfunc_begin4 and .Ltmp337
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp337-.Lfunc_begin4         # >> Call Site 2 <<
	.uleb128 .Ltmp338-.Ltmp337              #   Call between .Ltmp337 and .Ltmp338
	.uleb128 .Ltmp339-.Lfunc_begin4         #     jumps to .Ltmp339
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp338-.Lfunc_begin4         # >> Call Site 3 <<
	.uleb128 .Lfunc_end37-.Ltmp338          #   Call between .Ltmp338 and .Lfunc_end37
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end4:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE14_M_insert_nodeEPSt18_Rb_tree_node_baseSA_PSt13_Rb_tree_nodeIS2_E,"axG",@progbits,_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE14_M_insert_nodeEPSt18_Rb_tree_node_baseSA_PSt13_Rb_tree_nodeIS2_E,comdat
	.weak	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE14_M_insert_nodeEPSt18_Rb_tree_node_baseSA_PSt13_Rb_tree_nodeIS2_E # -- Begin function _ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE14_M_insert_nodeEPSt18_Rb_tree_node_baseSA_PSt13_Rb_tree_nodeIS2_E
	.p2align	1, 0x90
	.type	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE14_M_insert_nodeEPSt18_Rb_tree_node_baseSA_PSt13_Rb_tree_nodeIS2_E,@function
_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE14_M_insert_nodeEPSt18_Rb_tree_node_baseSA_PSt13_Rb_tree_nodeIS2_E: # @_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE14_M_insert_nodeEPSt18_Rb_tree_node_baseSA_PSt13_Rb_tree_nodeIS2_E
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rcx, %rbx
	movq	%rdi, %r14
	leaq	8(%rdi), %rcx
	movb	$1, %al
	testq	%rsi, %rsi
	jne	.LBB38_3
# %bb.1:
	cmpq	%rdx, %rcx
	je	.LBB38_3
# %bb.2:
	movl	32(%rbx), %eax
	cmpl	32(%rdx), %eax
	setb	%al
.LBB38_3:
	movzbl	%al, %edi
	movq	%rbx, %rsi
	callq	_ZSt29_Rb_tree_insert_and_rebalancebPSt18_Rb_tree_node_baseS0_RS_
	incq	40(%r14)
	movq	%rbx, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end38:
	.size	_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE14_M_insert_nodeEPSt18_Rb_tree_node_baseSA_PSt13_Rb_tree_nodeIS2_E, .Lfunc_end38-_ZNSt8_Rb_treeIKjSt4pairIS0_jESt10_Select1stIS2_ESt4lessIS0_ESaIS2_EE14_M_insert_nodeEPSt18_Rb_tree_node_baseSA_PSt13_Rb_tree_nodeIS2_E
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIjSaIjEE17_M_realloc_insertIJjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_,"axG",@progbits,_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_,comdat
	.weak	_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_ # -- Begin function _ZNSt6vectorIjSaIjEE17_M_realloc_insertIJjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_,@function
_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_: # @_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.11, %edx
	callq	_ZNKSt6vectorIjSaIjEE12_M_check_lenEmPKc
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %r14
	sarq	$2, %r14
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB39_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIjE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB39_3
.LBB39_1:
	xorl	%ebp, %ebp
.LBB39_3:                               # %_ZNSt12_Vector_baseIjSaIjEE11_M_allocateEm.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movl	(%rax), %eax
	movl	%eax, (%rbp,%r14,4)
	testq	%r12, %r12
	jle	.LBB39_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB39_5:                               # %_ZNSt6vectorIjSaIjEE11_S_relocateEPjS2_S2_RS0_.exit
	addq	%rbp, %r12
	addq	$4, %r12
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB39_7
# %bb.6:
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB39_7:                               # %_ZNSt6vectorIjSaIjEE11_S_relocateEPjS2_S2_RS0_.exit16
	testq	%r13, %r13
	je	.LBB39_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB39_9:                               # %_ZNSt12_Vector_baseIjSaIjEE13_M_deallocateEPjm.exit
	addq	%r15, %r12
	movq	%rbp, (%rbx)
	movq	%r12, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,4), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end39:
	.size	_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_, .Lfunc_end39-_ZNSt6vectorIjSaIjEE17_M_realloc_insertIJjEEEvN9__gnu_cxx17__normal_iteratorIPjS1_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text.startup,"ax",@progbits
	.type	_GLOBAL__sub_I_scc2.hip,@function # -- Begin function _GLOBAL__sub_I_scc2.hip
_GLOBAL__sub_I_scc2.hip:                # @_GLOBAL__sub_I_scc2.hip
	.cfi_startproc
# %bb.0:
	movq	$_ZL2fnB5cxx11+16, _ZL2fnB5cxx11(%rip)
	movabsq	$7740668874716834135, %rax      # imm = 0x6B6C6154696B6957
	movq	%rax, _ZL2fnB5cxx11+16(%rip)
	movl	$1954051118, _ZL2fnB5cxx11+24(%rip) # imm = 0x7478742E
	movq	$12, _ZL2fnB5cxx11+8(%rip)
	movb	$0, _ZL2fnB5cxx11+28(%rip)
	movl	$_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev, %edi
	movl	$_ZL2fnB5cxx11, %esi
	movl	$__dso_handle, %edx
	jmp	__cxa_atexit                    # TAILCALL
.Lfunc_end40:
	.size	_GLOBAL__sub_I_scc2.hip, .Lfunc_end40-_GLOBAL__sub_I_scc2.hip
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB41_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB41_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10BFSKernel1mPjS_S_S_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10BFSKernel2mPjS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10TRIMKernelmPjS_S_S_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17PIVOTS_SEL_Kernelm, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12UpdateKernelmPjS_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13UpdateKernel1mPjS_S_, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14RenumberKernelmPj, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9initpivotm, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9ReadPivotmPj, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11compactSIMDmPjS_m, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10uniformAddPjS_iii, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7prescanILb1ELb0EEvPjPKjS0_iii, %esi
	movl	$.L__unnamed_12, %edx
	movl	$.L__unnamed_12, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7prescanILb1ELb1EEvPjPKjS0_iii, %esi
	movl	$.L__unnamed_13, %edx
	movl	$.L__unnamed_13, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7prescanILb0ELb0EEvPjPKjS0_iii, %esi
	movl	$.L__unnamed_14, %edx
	movl	$.L__unnamed_14, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7prescanILb0ELb1EEvPjPKjS0_iii, %esi
	movl	$.L__unnamed_15, %edx
	movl	$.L__unnamed_15, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$0, (%rsp)
	movl	$Mterminate, %esi
	movl	$.L__unnamed_16, %edx
	movl	$.L__unnamed_16, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$0, (%rsp)
	movl	$numActiveThreads, %esi
	movl	$.L__unnamed_17, %edx
	movl	$.L__unnamed_17, %ecx
	movl	$4, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$0, (%rsp)
	movl	$range, %esi
	movl	$.L__unnamed_18, %edx
	movl	$.L__unnamed_18, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$0, (%rsp)
	movl	$pivot, %esi
	movl	$.L__unnamed_19, %edx
	movl	$.L__unnamed_19, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end41:
	.size	__hip_module_ctor, .Lfunc_end41-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB42_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB42_2:
	retq
.Lfunc_end42:
	.size	__hip_module_dtor, .Lfunc_end42-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_ZL2fnB5cxx11,@object           # @_ZL2fnB5cxx11
	.local	_ZL2fnB5cxx11
	.comm	_ZL2fnB5cxx11,32,8
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"WikiTalk.txt"
	.size	.L.str, 13

	.hidden	__dso_handle
	.type	scanBlockSums,@object           # @scanBlockSums
	.bss
	.globl	scanBlockSums
	.p2align	3, 0x0
scanBlockSums:
	.quad	0
	.size	scanBlockSums, 8

	.type	numEltsAllocated,@object        # @numEltsAllocated
	.globl	numEltsAllocated
	.p2align	2, 0x0
numEltsAllocated:
	.long	0                               # 0x0
	.size	numEltsAllocated, 4

	.type	numLevelsAllocated,@object      # @numLevelsAllocated
	.globl	numLevelsAllocated
	.p2align	2, 0x0
numLevelsAllocated:
	.long	0                               # 0x0
	.size	numLevelsAllocated, 4

	.type	Mterminate,@object              # @Mterminate
	.local	Mterminate
	.comm	Mterminate,4,4
	.type	numActiveThreads,@object        # @numActiveThreads
	.local	numActiveThreads
	.comm	numActiveThreads,4,4
	.type	range,@object                   # @range
	.local	range
	.comm	range,8,8
	.type	pivot,@object                   # @pivot
	.local	pivot
	.comm	pivot,8,8
	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/HinPeng/SCC_on_GPU/master/scc2.hip"
	.size	.L.str.1, 97

	.type	_Z14RenumberKernelmPj,@object   # @_Z14RenumberKernelmPj
	.section	.rodata,"a",@progbits
	.globl	_Z14RenumberKernelmPj
	.p2align	3, 0x0
_Z14RenumberKernelmPj:
	.quad	_Z29__device_stub__RenumberKernelmPj
	.size	_Z14RenumberKernelmPj, 8

	.type	_Z9initpivotm,@object           # @_Z9initpivotm
	.globl	_Z9initpivotm
	.p2align	3, 0x0
_Z9initpivotm:
	.quad	_Z24__device_stub__initpivotm
	.size	_Z9initpivotm, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"time is %f\n"
	.size	.L.str.2, 12

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%u\n"
	.size	.L.str.3, 4

	.type	_Z10BFSKernel1mPjS_S_S_S_S_,@object # @_Z10BFSKernel1mPjS_S_S_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z10BFSKernel1mPjS_S_S_S_S_
	.p2align	3, 0x0
_Z10BFSKernel1mPjS_S_S_S_S_:
	.quad	_Z25__device_stub__BFSKernel1mPjS_S_S_S_S_
	.size	_Z10BFSKernel1mPjS_S_S_S_S_, 8

	.type	_Z10BFSKernel2mPjS_S_,@object   # @_Z10BFSKernel2mPjS_S_
	.globl	_Z10BFSKernel2mPjS_S_
	.p2align	3, 0x0
_Z10BFSKernel2mPjS_S_:
	.quad	_Z25__device_stub__BFSKernel2mPjS_S_
	.size	_Z10BFSKernel2mPjS_S_, 8

	.type	_Z10TRIMKernelmPjS_S_S_,@object # @_Z10TRIMKernelmPjS_S_S_
	.globl	_Z10TRIMKernelmPjS_S_S_
	.p2align	3, 0x0
_Z10TRIMKernelmPjS_S_S_:
	.quad	_Z25__device_stub__TRIMKernelmPjS_S_S_
	.size	_Z10TRIMKernelmPjS_S_S_, 8

	.type	_Z17PIVOTS_SEL_Kernelm,@object  # @_Z17PIVOTS_SEL_Kernelm
	.globl	_Z17PIVOTS_SEL_Kernelm
	.p2align	3, 0x0
_Z17PIVOTS_SEL_Kernelm:
	.quad	_Z32__device_stub__PIVOTS_SEL_Kernelm
	.size	_Z17PIVOTS_SEL_Kernelm, 8

	.type	_Z12UpdateKernelmPjS_,@object   # @_Z12UpdateKernelmPjS_
	.globl	_Z12UpdateKernelmPjS_
	.p2align	3, 0x0
_Z12UpdateKernelmPjS_:
	.quad	_Z27__device_stub__UpdateKernelmPjS_
	.size	_Z12UpdateKernelmPjS_, 8

	.type	_Z13UpdateKernel1mPjS_S_,@object # @_Z13UpdateKernel1mPjS_S_
	.globl	_Z13UpdateKernel1mPjS_S_
	.p2align	3, 0x0
_Z13UpdateKernel1mPjS_S_:
	.quad	_Z28__device_stub__UpdateKernel1mPjS_S_
	.size	_Z13UpdateKernel1mPjS_S_, 8

	.type	_Z9ReadPivotmPj,@object         # @_Z9ReadPivotmPj
	.globl	_Z9ReadPivotmPj
	.p2align	3, 0x0
_Z9ReadPivotmPj:
	.quad	_Z24__device_stub__ReadPivotmPj
	.size	_Z9ReadPivotmPj, 8

	.type	_Z11compactSIMDmPjS_m,@object   # @_Z11compactSIMDmPjS_m
	.globl	_Z11compactSIMDmPjS_m
	.p2align	3, 0x0
_Z11compactSIMDmPjS_m:
	.quad	_Z26__device_stub__compactSIMDmPjS_m
	.size	_Z11compactSIMDmPjS_m, 8

	.type	_Z7prescanILb1ELb0EEvPjPKjS0_iii,@object # @_Z7prescanILb1ELb0EEvPjPKjS0_iii
	.weak	_Z7prescanILb1ELb0EEvPjPKjS0_iii
	.p2align	3, 0x0
_Z7prescanILb1ELb0EEvPjPKjS0_iii:
	.quad	_Z22__device_stub__prescanILb1ELb0EEvPjPKjS0_iii
	.size	_Z7prescanILb1ELb0EEvPjPKjS0_iii, 8

	.type	_Z7prescanILb1ELb1EEvPjPKjS0_iii,@object # @_Z7prescanILb1ELb1EEvPjPKjS0_iii
	.weak	_Z7prescanILb1ELb1EEvPjPKjS0_iii
	.p2align	3, 0x0
_Z7prescanILb1ELb1EEvPjPKjS0_iii:
	.quad	_Z22__device_stub__prescanILb1ELb1EEvPjPKjS0_iii
	.size	_Z7prescanILb1ELb1EEvPjPKjS0_iii, 8

	.type	_Z10uniformAddPjS_iii,@object   # @_Z10uniformAddPjS_iii
	.globl	_Z10uniformAddPjS_iii
	.p2align	3, 0x0
_Z10uniformAddPjS_iii:
	.quad	_Z25__device_stub__uniformAddPjS_iii
	.size	_Z10uniformAddPjS_iii, 8

	.type	_Z7prescanILb0ELb0EEvPjPKjS0_iii,@object # @_Z7prescanILb0ELb0EEvPjPKjS0_iii
	.weak	_Z7prescanILb0ELb0EEvPjPKjS0_iii
	.p2align	3, 0x0
_Z7prescanILb0ELb0EEvPjPKjS0_iii:
	.quad	_Z22__device_stub__prescanILb0ELb0EEvPjPKjS0_iii
	.size	_Z7prescanILb0ELb0EEvPjPKjS0_iii, 8

	.type	_Z7prescanILb0ELb1EEvPjPKjS0_iii,@object # @_Z7prescanILb0ELb1EEvPjPKjS0_iii
	.weak	_Z7prescanILb0ELb1EEvPjPKjS0_iii
	.p2align	3, 0x0
_Z7prescanILb0ELb1EEvPjPKjS0_iii:
	.quad	_Z22__device_stub__prescanILb0ELb1EEvPjPKjS0_iii
	.size	_Z7prescanILb0ELb1EEvPjPKjS0_iii, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"Error: %s\nFile %s, line %d\n"
	.size	.L.str.4, 28

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"vector::_M_default_append"
	.size	.L.str.6, 26

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"vector::reserve"
	.size	.L.str.7, 16

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"vector::_M_range_check: __n (which is %zu) >= this->size() (which is %zu)"
	.size	.L.str.8, 74

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"vector::_M_realloc_insert"
	.size	.L.str.11, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10BFSKernel1mPjS_S_S_S_S_"
	.size	.L__unnamed_1, 28

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10BFSKernel2mPjS_S_"
	.size	.L__unnamed_2, 22

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z10TRIMKernelmPjS_S_S_"
	.size	.L__unnamed_3, 24

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z17PIVOTS_SEL_Kernelm"
	.size	.L__unnamed_4, 23

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z12UpdateKernelmPjS_"
	.size	.L__unnamed_5, 22

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z13UpdateKernel1mPjS_S_"
	.size	.L__unnamed_6, 25

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z14RenumberKernelmPj"
	.size	.L__unnamed_7, 22

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z9initpivotm"
	.size	.L__unnamed_8, 14

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"_Z9ReadPivotmPj"
	.size	.L__unnamed_9, 16

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"_Z11compactSIMDmPjS_m"
	.size	.L__unnamed_10, 22

	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"_Z10uniformAddPjS_iii"
	.size	.L__unnamed_11, 22

	.type	.L__unnamed_12,@object          # @11
.L__unnamed_12:
	.asciz	"_Z7prescanILb1ELb0EEvPjPKjS0_iii"
	.size	.L__unnamed_12, 33

	.type	.L__unnamed_13,@object          # @12
.L__unnamed_13:
	.asciz	"_Z7prescanILb1ELb1EEvPjPKjS0_iii"
	.size	.L__unnamed_13, 33

	.type	.L__unnamed_14,@object          # @13
.L__unnamed_14:
	.asciz	"_Z7prescanILb0ELb0EEvPjPKjS0_iii"
	.size	.L__unnamed_14, 33

	.type	.L__unnamed_15,@object          # @14
.L__unnamed_15:
	.asciz	"_Z7prescanILb0ELb1EEvPjPKjS0_iii"
	.size	.L__unnamed_15, 33

	.type	.L__unnamed_16,@object          # @15
.L__unnamed_16:
	.asciz	"Mterminate"
	.size	.L__unnamed_16, 11

	.type	.L__unnamed_17,@object          # @16
.L__unnamed_17:
	.asciz	"numActiveThreads"
	.size	.L__unnamed_17, 17

	.type	.L__unnamed_18,@object          # @17
.L__unnamed_18:
	.asciz	"range"
	.size	.L__unnamed_18, 6

	.type	.L__unnamed_19,@object          # @18
.L__unnamed_19:
	.asciz	"pivot"
	.size	.L__unnamed_19, 6

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	_GLOBAL__sub_I_scc2.hip
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _Z29__device_stub__RenumberKernelmPj
	.addrsig_sym _Z24__device_stub__initpivotm
	.addrsig_sym _Z25__device_stub__BFSKernel1mPjS_S_S_S_S_
	.addrsig_sym _Z25__device_stub__BFSKernel2mPjS_S_
	.addrsig_sym _Z25__device_stub__TRIMKernelmPjS_S_S_
	.addrsig_sym _Z32__device_stub__PIVOTS_SEL_Kernelm
	.addrsig_sym _Z27__device_stub__UpdateKernelmPjS_
	.addrsig_sym _Z28__device_stub__UpdateKernel1mPjS_S_
	.addrsig_sym _Z24__device_stub__ReadPivotmPj
	.addrsig_sym _Z26__device_stub__compactSIMDmPjS_m
	.addrsig_sym _Z22__device_stub__prescanILb1ELb0EEvPjPKjS0_iii
	.addrsig_sym _Z22__device_stub__prescanILb1ELb1EEvPjPKjS0_iii
	.addrsig_sym _Z25__device_stub__uniformAddPjS_iii
	.addrsig_sym _Z22__device_stub__prescanILb0ELb0EEvPjPKjS0_iii
	.addrsig_sym _Z22__device_stub__prescanILb0ELb1EEvPjPKjS0_iii
	.addrsig_sym _GLOBAL__sub_I_scc2.hip
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _ZL2fnB5cxx11
	.addrsig_sym __dso_handle
	.addrsig_sym Mterminate
	.addrsig_sym numActiveThreads
	.addrsig_sym range
	.addrsig_sym pivot
	.addrsig_sym _Z14RenumberKernelmPj
	.addrsig_sym _Z9initpivotm
	.addrsig_sym _Z10BFSKernel1mPjS_S_S_S_S_
	.addrsig_sym _Z10BFSKernel2mPjS_S_
	.addrsig_sym _Z10TRIMKernelmPjS_S_S_
	.addrsig_sym _Z17PIVOTS_SEL_Kernelm
	.addrsig_sym _Z12UpdateKernelmPjS_
	.addrsig_sym _Z13UpdateKernel1mPjS_S_
	.addrsig_sym _Z9ReadPivotmPj
	.addrsig_sym _Z11compactSIMDmPjS_m
	.addrsig_sym _Z7prescanILb1ELb0EEvPjPKjS0_iii
	.addrsig_sym _Z7prescanILb1ELb1EEvPjPKjS0_iii
	.addrsig_sym _Z10uniformAddPjS_iii
	.addrsig_sym _Z7prescanILb0ELb0EEvPjPKjS0_iii
	.addrsig_sym _Z7prescanILb0ELb1EEvPjPKjS0_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10BFSKernel1mPjS_S_S_S_S_ ; -- Begin function _Z10BFSKernel1mPjS_S_S_S_S_
	.globl	_Z10BFSKernel1mPjS_S_S_S_S_
	.p2align	8
	.type	_Z10BFSKernel1mPjS_S_S_S_S_,@function
_Z10BFSKernel1mPjS_S_S_S_S_:            ; @_Z10BFSKernel1mPjS_S_S_S_S_
; %bb.0:
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, numActiveThreads@rel32@lo+4
	s_addc_u32 s3, s3, numActiveThreads@rel32@hi+12
	v_lshl_add_u32 v0, s15, 8, v0
	s_load_b32 s2, s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s2, v0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_8
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x8
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v0, v[2:3], off
	s_waitcnt vmcnt(0)
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_nc_u32_e32 v0, 1, v0
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v8, vcc_lo
	v_add_co_u32 v9, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v8, vcc_lo
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	global_store_b32 v[4:5], v1, off
	s_clause 0x1
	global_load_b32 v4, v[9:10], off
	global_load_b32 v11, v[2:3], off
	s_mov_b32 s10, 0
	s_waitcnt vmcnt(0)
	v_cmp_lt_u32_e32 vcc_lo, v4, v11
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_8
; %bb.2:                                ; %.lr.ph
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, range@rel32@lo+4
	s_addc_u32 s3, s3, range@rel32@hi+12
	v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v12, 1
	s_load_b64 s[2:3], s[2:3], 0x0
	s_load_b128 s[4:7], s[0:1], 0x28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[4:5]
	v_add_co_u32 v5, vcc_lo, s8, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s2, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v0, v[5:6], off
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_lshlrev_b64 v[9:10], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, s2, v9
	v_add_co_ci_u32_e32 v14, vcc_lo, s3, v10, vcc_lo
	s_clause 0x1
	flat_load_b32 v0, v[7:8]
	flat_load_b32 v13, v[13:14]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_eq_u32_e64 v0, v13
	s_cbranch_execz .LBB0_7
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	v_add_co_u32 v13, vcc_lo, s4, v9
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v10, vcc_lo
	s_mov_b32 s1, exec_lo
	global_load_b32 v0, v[13:14], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	v_add_co_u32 v9, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	global_store_b32 v[9:10], v12, off
	global_load_b32 v11, v[2:3], off
.LBB0_6:                                ; %Flow
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_7:                                ;   in Loop: Header=BB0_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v4, 1, v4
	v_add_co_u32 v5, s0, v5, 4
	v_add_co_ci_u32_e64 v6, s0, 0, v6, s0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v4, v11
	s_or_b32 s10, vcc_lo, s10
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB0_3
.LBB0_8:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10BFSKernel1mPjS_S_S_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 56
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10BFSKernel1mPjS_S_S_S_S_, .Lfunc_end0-_Z10BFSKernel1mPjS_S_S_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 516
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10BFSKernel2mPjS_S_   ; -- Begin function _Z10BFSKernel2mPjS_S_
	.globl	_Z10BFSKernel2mPjS_S_
	.p2align	8
	.type	_Z10BFSKernel2mPjS_S_,@function
_Z10BFSKernel2mPjS_S_:                  ; @_Z10BFSKernel2mPjS_S_
; %bb.0:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_lshl_add_u32 v0, s15, 8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e32 vcc_lo, s[0:1], v[0:1]
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB1_3
; %bb.1:
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v4, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_3
; %bb.2:
	v_add_co_u32 v4, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_dual_mov_b32 v6, 1 :: v_dual_mov_b32 v7, 0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, Mterminate@rel32@lo+4
	s_addc_u32 s1, s1, Mterminate@rel32@hi+12
	global_store_b32 v[4:5], v6, off
	global_store_b32 v[2:3], v6, off
	global_store_b32 v[0:1], v7, off
	global_store_b32 v7, v7, s[0:1]
.LBB1_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10BFSKernel2mPjS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10BFSKernel2mPjS_S_, .Lfunc_end1-_Z10BFSKernel2mPjS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 184
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10TRIMKernelmPjS_S_S_ ; -- Begin function _Z10TRIMKernelmPjS_S_S_
	.globl	_Z10TRIMKernelmPjS_S_S_
	.p2align	8
	.type	_Z10TRIMKernelmPjS_S_S_,@function
_Z10TRIMKernelmPjS_S_S_:                ; @_Z10TRIMKernelmPjS_S_S_
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_lshl_add_u32 v0, s15, 8, v0
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_u64_e64 s[4:5], v[0:1]
	s_cbranch_execz .LBB2_18
; %bb.1:
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, range@rel32@lo+4
	s_addc_u32 s3, s3, range@rel32@hi+12
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_load_b64 s[2:3], s[2:3], 0x0
	s_mov_b32 s12, -1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v3, vcc_lo
	flat_load_b32 v10, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, -1, v10
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_18
; %bb.2:
	v_add_co_u32 v4, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	s_load_b64 s[4:5], s[0:1], 0x20
	s_mov_b32 s6, exec_lo
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_u32_e64 v4, v5
	s_cbranch_execz .LBB2_16
; %bb.3:                                ; %.lr.ph.preheader
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v6, v4
	s_mov_b32 s7, 0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[6:7]
	v_add_co_u32 v8, vcc_lo, s8, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v9, vcc_lo
                                        ; implicit-def: $sgpr9
                                        ; implicit-def: $sgpr8
.LBB2_4:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v6, v[8:9], off
	s_or_b32 s8, s8, exec_lo
	s_or_b32 s9, s9, exec_lo
	s_mov_b32 s12, exec_lo
	s_waitcnt vmcnt(0)
	v_lshlrev_b64 v[11:12], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s2, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v12, vcc_lo
	flat_load_b32 v6, v[11:12]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v6, v10
; %bb.5:                                ;   in Loop: Header=BB2_4 Depth=1
	v_add_nc_u32_e32 v4, 1, v4
	v_add_co_u32 v8, s0, v8, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v9, s0, 0, v9, s0
	v_cmp_ge_u32_e32 vcc_lo, v4, v5
	s_and_not1_b32 s0, s9, exec_lo
	s_and_not1_b32 s8, s8, exec_lo
	s_and_b32 s9, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s9, s0, s9
; %bb.6:                                ; %Flow75
                                        ;   in Loop: Header=BB2_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s9
	s_or_b32 s7, s0, s7
	s_and_not1_b32 s0, s1, exec_lo
	s_and_b32 s1, s8, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s1, s0, s1
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_4
; %bb.7:                                ; %loop.exit.guard
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s0, -1
	s_and_saveexec_b32 s7, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s7, exec_lo, s7
	s_cbranch_execz .LBB2_15
; %bb.8:                                ; %.critedge
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_mov_b32 s8, exec_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_u32_e32 vcc_lo, v2, v3
	v_cmpx_lt_u32_e64 v2, v3
	s_cbranch_execz .LBB2_14
; %bb.9:                                ; %.lr.ph51.preheader
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, v2
                                        ; implicit-def: $sgpr10
                                        ; implicit-def: $sgpr9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[4:5]
	v_add_co_u32 v6, s0, s4, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, s5, v7, s0
	s_mov_b32 s4, 0
                                        ; implicit-def: $sgpr5
.LBB2_10:                               ; %.lr.ph51
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v4, v[6:7], off
	s_or_b32 s9, s9, exec_lo
	s_or_b32 s10, s10, exec_lo
	s_mov_b32 s11, exec_lo
	s_waitcnt vmcnt(0)
	v_lshlrev_b64 v[8:9], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s0, s2, v8
	v_add_co_ci_u32_e64 v9, s0, s3, v9, s0
	flat_load_b32 v4, v[8:9]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u32_e64 v4, v10
; %bb.11:                               ;   in Loop: Header=BB2_10 Depth=1
	v_add_nc_u32_e32 v2, 1, v2
	v_add_co_u32 v6, s1, v6, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v7, s1, 0, v7, s1
	v_cmp_ge_u32_e64 s0, v2, v3
	s_and_not1_b32 s1, s10, exec_lo
	s_and_not1_b32 s9, s9, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s10, s1, s0
; %bb.12:                               ; %Flow
                                        ;   in Loop: Header=BB2_10 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_xor_b32 s0, s9, -1
	s_and_b32 s1, exec_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s4, s1, s4
	s_and_not1_b32 s1, s5, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s5, s1, s0
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB2_10
; %bb.13:                               ; %loop.exit.guard74
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s0, vcc_lo, exec_lo
	s_and_b32 s1, s5, exec_lo
	s_or_b32 vcc_lo, s0, s1
.LBB2_14:                               ; %Flow79
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s0, vcc_lo, exec_lo
.LBB2_15:                               ; %Flow78
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s12, s0, exec_lo
.LBB2_16:                               ; %Flow77
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s12
	s_cbranch_execz .LBB2_18
; %bb.17:                               ; %.critedge45
	v_dual_mov_b32 v2, -1 :: v_dual_mov_b32 v3, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, Mterminate@rel32@lo+4
	s_addc_u32 s1, s1, Mterminate@rel32@hi+12
	flat_store_b32 v[0:1], v2
	global_store_b32 v3, v3, s[0:1]
.LBB2_18:                               ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10TRIMKernelmPjS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 40
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z10TRIMKernelmPjS_S_S_, .Lfunc_end2-_Z10TRIMKernelmPjS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 756
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17PIVOTS_SEL_Kernelm  ; -- Begin function _Z17PIVOTS_SEL_Kernelm
	.globl	_Z17PIVOTS_SEL_Kernelm
	.p2align	8
	.type	_Z17PIVOTS_SEL_Kernelm,@function
_Z17PIVOTS_SEL_Kernelm:                 ; @_Z17PIVOTS_SEL_Kernelm
; %bb.0:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_lshl_add_u32 v0, s15, 8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e32 vcc_lo, s[0:1], v[0:1]
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB3_3
; %bb.1:
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, range@rel32@lo+4
	s_addc_u32 s1, s1, range@rel32@hi+12
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	flat_load_b32 v1, v[1:2]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_3
; %bb.2:
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, pivot@rel32@lo+4
	s_addc_u32 s1, s1, pivot@rel32@hi+12
	v_mov_b32_e32 v2, 0
	s_load_b64 s[0:1], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	flat_store_b32 v[1:2], v0
.LBB3_3:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17PIVOTS_SEL_Kernelm
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z17PIVOTS_SEL_Kernelm, .Lfunc_end3-_Z17PIVOTS_SEL_Kernelm
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 196
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12UpdateKernelmPjS_   ; -- Begin function _Z12UpdateKernelmPjS_
	.globl	_Z12UpdateKernelmPjS_
	.p2align	8
	.type	_Z12UpdateKernelmPjS_,@function
_Z12UpdateKernelmPjS_:                  ; @_Z12UpdateKernelmPjS_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshl_add_u32 v0, s15, 8, v0
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_u64_e64 s[4:5], v[0:1]
	s_cbranch_execz .LBB4_21
; %bb.1:
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, range@rel32@lo+4
	s_addc_u32 s3, s3, range@rel32@hi+12
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_load_b64 s[2:3], s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v3, vcc_lo
	flat_load_b32 v4, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB4_21
; %bb.2:
	v_add_co_u32 v5, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v3, vcc_lo
	s_load_b64 s[0:1], s[0:1], 0x10
	s_mov_b32 s2, exec_lo
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v5
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB4_12
; %bb.3:                                ; %LeafBlock35
	s_mov_b32 s3, exec_lo
	v_cmpx_eq_u32_e32 1, v5
	s_cbranch_execz .LBB4_11
; %bb.4:                                ; %NodeBlock41
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_mov_b32 s4, exec_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v2
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB4_8
; %bb.5:                                ; %LeafBlock39
	s_mov_b32 s5, exec_lo
	v_cmpx_eq_u32_e32 1, v2
	s_cbranch_execz .LBB4_7
; %bb.6:
	v_mov_b32_e32 v2, -1
	flat_store_b32 v[0:1], v2
.LBB4_7:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr2
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr0_vgpr1
.LBB4_8:                                ; %Flow50
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB4_11
; %bb.9:                                ; %LeafBlock37
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB4_11
; %bb.10:
	v_lshl_add_u32 v2, v4, 1, v4
	v_mov_b32_e32 v3, 0
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, Mterminate@rel32@lo+4
	s_addc_u32 s5, s5, Mterminate@rel32@hi+12
	flat_store_b32 v[0:1], v2
	global_store_b32 v3, v3, s[4:5]
.LBB4_11:                               ; %Flow52
	s_or_b32 exec_lo, exec_lo, s3
                                        ; implicit-def: $vgpr5
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr0_vgpr1
.LBB4_12:                               ; %Flow58
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB4_21
; %bb.13:                               ; %LeafBlock
	v_cmp_eq_u32_e32 vcc_lo, 0, v5
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB4_21
; %bb.14:                               ; %NodeBlock47
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_mov_b32 s0, exec_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v2
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB4_18
; %bb.15:                               ; %LeafBlock45
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 1, v2
	s_cbranch_execz .LBB4_17
; %bb.16:
	v_mad_u64_u32 v[2:3], null, v4, 3, 1
	v_mov_b32_e32 v3, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, Mterminate@rel32@lo+4
	s_addc_u32 s3, s3, Mterminate@rel32@hi+12
	flat_store_b32 v[0:1], v2
	global_store_b32 v3, v3, s[2:3]
.LBB4_17:                               ; %Flow53
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr2
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr0_vgpr1
.LBB4_18:                               ; %Flow55
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB4_21
; %bb.19:                               ; %LeafBlock43
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB4_21
; %bb.20:
	v_mad_u64_u32 v[2:3], null, v4, 3, 2
	v_mov_b32_e32 v3, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, Mterminate@rel32@lo+4
	s_addc_u32 s1, s1, Mterminate@rel32@hi+12
	flat_store_b32 v[0:1], v2
	global_store_b32 v3, v3, s[0:1]
.LBB4_21:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12UpdateKernelmPjS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z12UpdateKernelmPjS_, .Lfunc_end4-_Z12UpdateKernelmPjS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 528
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13UpdateKernel1mPjS_S_ ; -- Begin function _Z13UpdateKernel1mPjS_S_
	.globl	_Z13UpdateKernel1mPjS_S_
	.p2align	8
	.type	_Z13UpdateKernel1mPjS_S_,@function
_Z13UpdateKernel1mPjS_S_:               ; @_Z13UpdateKernel1mPjS_S_
; %bb.0:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_lshl_add_u32 v0, s15, 8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e32 vcc_lo, s[0:1], v[0:1]
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB5_21
; %bb.1:
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, range@rel32@lo+4
	s_addc_u32 s1, s1, range@rel32@hi+12
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v3, vcc_lo
	flat_load_b32 v4, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB5_21
; %bb.2:                                ; %NodeBlock
	v_add_co_u32 v5, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v3, vcc_lo
	s_mov_b32 s0, exec_lo
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v5
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB5_12
; %bb.3:                                ; %LeafBlock45
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 1, v5
	s_cbranch_execz .LBB5_11
; %bb.4:                                ; %NodeBlock51
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s2, exec_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v2
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB5_8
; %bb.5:                                ; %LeafBlock49
	s_mov_b32 s3, exec_lo
	v_cmpx_eq_u32_e32 1, v2
	s_cbranch_execz .LBB5_7
; %bb.6:
	v_mov_b32_e32 v2, -1
	flat_store_b32 v[0:1], v2
.LBB5_7:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s3
                                        ; implicit-def: $vgpr2
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr0_vgpr1
.LBB5_8:                                ; %Flow60
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB5_11
; %bb.9:                                ; %LeafBlock47
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB5_11
; %bb.10:
	v_lshl_add_u32 v2, v4, 1, v4
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v6, 1
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, Mterminate@rel32@lo+4
	s_addc_u32 s3, s3, Mterminate@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	v_add_co_u32 v4, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	flat_store_b32 v[0:1], v2
	global_store_b32 v[4:5], v6, off
	global_store_b32 v3, v3, s[2:3]
.LBB5_11:                               ; %Flow62
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr5
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr0_vgpr1
.LBB5_12:                               ; %Flow68
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB5_21
; %bb.13:                               ; %LeafBlock
	v_cmp_eq_u32_e32 vcc_lo, 0, v5
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB5_21
; %bb.14:                               ; %NodeBlock57
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s0, exec_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v2
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB5_18
; %bb.15:                               ; %LeafBlock55
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 1, v2
	s_cbranch_execz .LBB5_17
; %bb.16:
	v_mad_u64_u32 v[2:3], null, v4, 3, 1
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v6, 1
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, Mterminate@rel32@lo+4
	s_addc_u32 s3, s3, Mterminate@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	v_add_co_u32 v4, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	flat_store_b32 v[0:1], v2
	global_store_b32 v[4:5], v6, off
	global_store_b32 v3, v3, s[2:3]
.LBB5_17:                               ; %Flow63
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr2
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr0_vgpr1
.LBB5_18:                               ; %Flow65
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB5_21
; %bb.19:                               ; %LeafBlock53
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB5_21
; %bb.20:
	v_mad_u64_u32 v[2:3], null, v4, 3, 2
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v6, 1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, Mterminate@rel32@lo+4
	s_addc_u32 s1, s1, Mterminate@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	v_add_co_u32 v4, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	flat_store_b32 v[0:1], v2
	global_store_b32 v[4:5], v6, off
	global_store_b32 v3, v3, s[0:1]
.LBB5_21:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13UpdateKernel1mPjS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z13UpdateKernel1mPjS_S_, .Lfunc_end5-_Z13UpdateKernel1mPjS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 628
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14RenumberKernelmPj   ; -- Begin function _Z14RenumberKernelmPj
	.globl	_Z14RenumberKernelmPj
	.p2align	8
	.type	_Z14RenumberKernelmPj,@function
_Z14RenumberKernelmPj:                  ; @_Z14RenumberKernelmPj
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshl_add_u32 v0, s15, 8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e32 vcc_lo, s[0:1], v[0:1]
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB6_3
; %bb.1:
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, range@rel32@lo+4
	s_addc_u32 s1, s1, range@rel32@hi+12
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	flat_load_b32 v2, v[0:1]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, -1, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB6_3
; %bb.2:
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	flat_store_b32 v[0:1], v2
.LBB6_3:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14RenumberKernelmPj
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z14RenumberKernelmPj, .Lfunc_end6-_Z14RenumberKernelmPj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 176
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9initpivotm           ; -- Begin function _Z9initpivotm
	.globl	_Z9initpivotm
	.p2align	8
	.type	_Z9initpivotm,@function
_Z9initpivotm:                          ; @_Z9initpivotm
; %bb.0:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_lshl_add_u32 v0, s15, 8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e32 vcc_lo, s[0:1], v[0:1]
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB7_2
; %bb.1:
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, pivot@rel32@lo+4
	s_addc_u32 s1, s1, pivot@rel32@hi+12
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mov_b32_e32 v2, -1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	flat_store_b32 v[0:1], v2
.LBB7_2:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9initpivotm
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	_Z9initpivotm, .Lfunc_end7-_Z9initpivotm
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 112
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9ReadPivotmPj         ; -- Begin function _Z9ReadPivotmPj
	.globl	_Z9ReadPivotmPj
	.p2align	8
	.type	_Z9ReadPivotmPj,@function
_Z9ReadPivotmPj:                        ; @_Z9ReadPivotmPj
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshl_add_u32 v0, s15, 8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e32 vcc_lo, s[0:1], v[0:1]
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB8_2
; %bb.1:
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, pivot@rel32@lo+4
	s_addc_u32 s1, s1, pivot@rel32@hi+12
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	flat_load_b32 v2, v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB8_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9ReadPivotmPj
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end8:
	.size	_Z9ReadPivotmPj, .Lfunc_end8-_Z9ReadPivotmPj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 140
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11compactSIMDmPjS_m   ; -- Begin function _Z11compactSIMDmPjS_m
	.globl	_Z11compactSIMDmPjS_m
	.p2align	8
	.type	_Z11compactSIMDmPjS_m,@function
_Z11compactSIMDmPjS_m:                  ; @_Z11compactSIMDmPjS_m
; %bb.0:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_mov_b32_e32 v1, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s6, v[0:1]
	v_mov_b32_e32 v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s15, s7, v[0:1]
	v_cmp_gt_u64_e32 vcc_lo, s[0:1], v[2:3]
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB9_3
; %bb.1:
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v1, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB9_3
; %bb.2:
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB9_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11compactSIMDmPjS_m
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end9:
	.size	_Z11compactSIMDmPjS_m, .Lfunc_end9-_Z11compactSIMDmPjS_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 156
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10uniformAddPjS_iii   ; -- Begin function _Z10uniformAddPjS_iii
	.globl	_Z10uniformAddPjS_iii
	.p2align	8
	.type	_Z10uniformAddPjS_iii,@function
_Z10uniformAddPjS_iii:                  ; @_Z10uniformAddPjS_iii
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_mov_b32 s3, 0
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s11, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB10_2
; %bb.1:
	s_add_i32 s2, s15, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[2:3], 2
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
	s_load_b32 s2, s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, s2
	ds_store_b32 v1, v2
.LBB10_2:                               ; %._crit_edge
	s_or_b32 exec_lo, exec_lo, s11
	s_load_b32 s0, s[0:1], 0x2c
	s_lshl_b32 s1, s15, 8
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s1, s1, 7
	s_barrier
	buffer_gl0_inv
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s1, s1, s0
	v_add3_u32 v1, s1, s10, v0
	v_mov_b32_e32 v2, 0
	v_add_nc_u32_e32 v0, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_nc_u32_e32 v1, s0, v1
	ds_load_b32 v6, v2
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v1, vcc_lo, s4, v1
	global_load_b32 v5, v[3:4], off
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s8, v0
	s_waitcnt lgkmcnt(0)
	v_cndmask_b32_e32 v0, 0, v6, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, v5, v6
	global_store_b32 v[3:4], v5, off
	global_load_b32 v3, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v3, v0
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10uniformAddPjS_iii
		.amdhsa_group_segment_fixed_size 4
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end10:
	.size	_Z10uniformAddPjS_iii, .Lfunc_end10-_Z10uniformAddPjS_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 276
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z7prescanILb1ELb0EEvPjPKjS0_iii,"axG",@progbits,_Z7prescanILb1ELb0EEvPjPKjS0_iii,comdat
	.protected	_Z7prescanILb1ELb0EEvPjPKjS0_iii ; -- Begin function _Z7prescanILb1ELb0EEvPjPKjS0_iii
	.globl	_Z7prescanILb1ELb0EEvPjPKjS0_iii
	.p2align	8
	.type	_Z7prescanILb1ELb0EEvPjPKjS0_iii,@function
_Z7prescanILb1ELb0EEvPjPKjS0_iii:       ; @_Z7prescanILb1ELb0EEvPjPKjS0_iii
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x1c
	s_mov_b32 s6, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB11_2
; %bb.1:                                ; %._crit_edge
	s_add_u32 s4, s0, 40
	s_addc_u32 s5, s1, 0
	s_branch .LBB11_3
.LBB11_2:
	s_mov_b32 s6, -1
                                        ; implicit-def: $sgpr4_sgpr5
.LBB11_3:                               ; %Flow42
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_mov_b32 s8, 1
	s_cbranch_vccnz .LBB11_5
; %bb.4:
	s_load_b32 s3, s[0:1], 0x34
	s_add_u32 s4, s0, 40
	s_addc_u32 s5, s1, 0
	s_lshl_b32 s6, s15, 8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s6, s6, 7
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_mul_i32 s3, s6, s3
.LBB11_5:
	s_load_b32 s9, s[4:5], 0xc
	s_load_b128 s[4:7], s[0:1], 0x0
	v_add_nc_u32_e32 v1, s3, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s9, 0xffff
	v_add_nc_u32_e32 v3, s3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v7, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v4, vcc_lo
	s_lshl_b32 s6, s3, 2
	s_clause 0x1
	global_load_b32 v9, v[5:6], off
	global_load_b32 v7, v[7:8], off
	v_add_nc_u32_e32 v5, s3, v0
	v_lshrrev_b32_e32 v6, 2, v0
	v_lshl_add_u32 v8, v0, 2, 0
	s_cmp_lg_u32 s3, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v5, 2, v5
	v_and_b32_e32 v6, 0xfc, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v5, 0x7ffc, v5
	v_add_nc_u32_e32 v6, v8, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add3_u32 v5, v8, s6, v5
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s3, 0
	s_waitcnt vmcnt(1)
	ds_store_b32 v6, v9
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v7
	s_cbranch_scc1 .LBB11_11
; %bb.6:                                ; %.lr.ph.i.i.preheader
	s_mov_b32 s7, s3
.LBB11_7:                               ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s9, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s7, v0
	s_cbranch_execz .LBB11_9
; %bb.8:                                ;   in Loop: Header=BB11_7 Depth=1
	s_lshl_b32 s10, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_i32_i24_e32 v7, s10, v0
	s_lshl_b32 s10, s8, 2
	v_add3_u32 v7, s8, -1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v8, s8, v7
	v_ashrrev_i32_e32 v9, 4, v7
	v_lshl_add_u32 v7, v7, 2, 0
	v_ashrrev_i32_e32 v8, 4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v9, v9, 2, v7
	v_lshlrev_b32_e32 v8, 2, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v7, v7, s10, v8
	ds_load_b32 v8, v9
	ds_load_b32 v9, v7
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v8, v9, v8
	ds_store_b32 v7, v8
.LBB11_9:                               ;   in Loop: Header=BB11_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b32 s8, s8, 1
	s_lshr_b32 s9, s7, 1
	s_cmp_gt_u32 s7, 1
	s_cbranch_scc0 .LBB11_11
; %bb.10:                               ;   in Loop: Header=BB11_7 Depth=1
	s_mov_b32 s7, s9
	s_branch .LBB11_7
.LBB11_11:                              ; %_Z8buildSumPj.exit.i
	s_mov_b32 s7, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB11_13
; %bb.12:
	s_cmp_eq_u32 s2, 0
	v_mov_b32_e32 v9, 0
	s_cselect_b32 s10, s15, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s11, s10, 31
	s_lshl_b64 s[10:11], s[10:11], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s0, s0, s10
	s_addc_u32 s1, s1, s11
	s_lshl_b32 s2, s3, 1
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s9, s2, 2
	s_ashr_i32 s2, s2, 4
	s_add_i32 s9, s9, 0
	s_lshl_b32 s2, s2, 2
	s_add_i32 s2, s9, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v7, s2
	ds_load_b32 v8, v7
	ds_store_b32 v7, v9
	s_waitcnt lgkmcnt(1)
	global_store_b32 v9, v8, s[0:1]
.LBB11_13:                              ; %_Z16clearLastElementILb1EEvPjS0_i.exit.i
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_mov_b32 s0, 1
	s_cbranch_vccnz .LBB11_17
.LBB11_14:                              ; %.lr.ph.i6.i
                                        ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s1, s8, 1
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB11_16
; %bb.15:                               ;   in Loop: Header=BB11_14 Depth=1
	s_and_b32 s6, s8, 0xfffffe
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_i32_i24_e32 v7, s6, v0
	s_lshl_b32 s6, s1, 2
	v_add3_u32 v7, s1, -1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v8, s1, v7
	v_ashrrev_i32_e32 v9, 4, v7
	v_lshl_add_u32 v7, v7, 2, 0
	v_ashrrev_i32_e32 v8, 4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v9, v9, 2, v7
	v_lshlrev_b32_e32 v8, 2, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v7, v7, s6, v8
	ds_load_b32 v8, v9
	ds_load_b32 v10, v7
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v8, v10, v8
	ds_store_b32 v9, v10
	ds_store_b32 v7, v8
.LBB11_16:                              ;   in Loop: Header=BB11_14 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_lshl_b32 s0, s0, 1
	s_mov_b32 s8, s1
	s_cmp_le_u32 s0, s3
	s_cbranch_scc1 .LBB11_14
.LBB11_17:                              ; %_Z12prescanBlockILb1EEvPjiS0_.exit
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v6, v6
	ds_load_b32 v5, v5
	v_add_co_u32 v0, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v2, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v4, vcc_lo
	s_waitcnt lgkmcnt(1)
	global_store_b32 v[0:1], v6, off
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[2:3], v5, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7prescanILb1ELb0EEvPjPKjS0_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z7prescanILb1ELb0EEvPjPKjS0_iii,"axG",@progbits,_Z7prescanILb1ELb0EEvPjPKjS0_iii,comdat
.Lfunc_end11:
	.size	_Z7prescanILb1ELb0EEvPjPKjS0_iii, .Lfunc_end11-_Z7prescanILb1ELb0EEvPjPKjS0_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 920
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z7prescanILb1ELb1EEvPjPKjS0_iii,"axG",@progbits,_Z7prescanILb1ELb1EEvPjPKjS0_iii,comdat
	.protected	_Z7prescanILb1ELb1EEvPjPKjS0_iii ; -- Begin function _Z7prescanILb1ELb1EEvPjPKjS0_iii
	.globl	_Z7prescanILb1ELb1EEvPjPKjS0_iii
	.p2align	8
	.type	_Z7prescanILb1ELb1EEvPjPKjS0_iii,@function
_Z7prescanILb1ELb1EEvPjPKjS0_iii:       ; @_Z7prescanILb1ELb1EEvPjPKjS0_iii
; %bb.0:
	s_load_b128 s[8:11], s[0:1], 0x18
	s_mov_b32 s2, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s10, 0
	s_cbranch_scc1 .LBB12_2
; %bb.1:                                ; %._crit_edge
	s_add_u32 s12, s0, 40
	s_addc_u32 s13, s1, 0
	s_branch .LBB12_3
.LBB12_2:
	s_mov_b32 s2, -1
                                        ; implicit-def: $sgpr12_sgpr13
.LBB12_3:                               ; %Flow45
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB12_5
; %bb.4:
	s_load_b32 s2, s[0:1], 0x34
	s_add_u32 s12, s0, 40
	s_addc_u32 s13, s1, 0
	s_lshl_b32 s3, s15, 8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s3, s3, 7
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_mul_i32 s10, s3, s2
.LBB12_5:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_dual_mov_b32 v8, 0 :: v_dual_add_nc_u32 v1, s10, v0
	s_load_b32 s0, s[12:13], 0xc
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
	s_and_b32 s1, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e32 v7, s1, v0
	global_load_b32 v2, v[5:6], off
	v_lshrrev_b32_e32 v5, 2, v0
	v_lshl_add_u32 v6, v0, 2, 0
	v_add_nc_u32_e32 v1, s1, v1
	v_cmp_gt_i32_e64 s0, s8, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v5, 0xfc, v5
	v_add_nc_u32_e32 v5, v6, v5
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v2
	s_and_saveexec_b32 s8, s0
	s_cbranch_execz .LBB12_7
; %bb.6:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[1:2]
	v_add_co_u32 v8, vcc_lo, s6, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
.LBB12_7:                               ; %_Z22loadSharedChunkFromMemILb1EEvPjPKjiiRiS3_S3_S3_S3_S3_.exit
	s_or_b32 exec_lo, exec_lo, s8
	v_lshrrev_b32_e32 v2, 2, v7
	s_lshl_b32 s6, s1, 2
	s_cmp_lg_u32 s1, 0
	s_cselect_b32 s7, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, 0x7ffc, v2
	s_cmp_eq_u32 s1, 0
	v_add3_u32 v2, v6, s6, v2
	s_mov_b32 s6, 1
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v8
	s_cbranch_scc1 .LBB12_13
; %bb.8:                                ; %.lr.ph.i.i.preheader
	s_mov_b32 s8, s1
.LBB12_9:                               ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s10, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s8, v0
	s_cbranch_execz .LBB12_11
; %bb.10:                               ;   in Loop: Header=BB12_9 Depth=1
	s_lshl_b32 s11, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_i32_i24_e32 v6, s11, v0
	s_lshl_b32 s11, s6, 2
	v_add3_u32 v6, s6, -1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v7, s6, v6
	v_ashrrev_i32_e32 v8, 4, v6
	v_lshl_add_u32 v6, v6, 2, 0
	v_ashrrev_i32_e32 v7, 4, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v8, v8, 2, v6
	v_lshlrev_b32_e32 v7, 2, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v6, v6, s11, v7
	ds_load_b32 v7, v8
	ds_load_b32 v8, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v7, v8, v7
	ds_store_b32 v6, v7
.LBB12_11:                              ;   in Loop: Header=BB12_9 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_lshl_b32 s6, s6, 1
	s_lshr_b32 s10, s8, 1
	s_cmp_gt_u32 s8, 1
	s_cbranch_scc0 .LBB12_13
; %bb.12:                               ;   in Loop: Header=BB12_9 Depth=1
	s_mov_b32 s8, s10
	s_branch .LBB12_9
.LBB12_13:                              ; %_Z8buildSumPj.exit.i
	s_mov_b32 s8, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB12_15
; %bb.14:
	s_cmp_eq_u32 s9, 0
	v_mov_b32_e32 v8, 0
	s_cselect_b32 s10, s15, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s11, s10, 31
	s_lshl_b64 s[10:11], s[10:11], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s2, s2, s10
	s_addc_u32 s3, s3, s11
	s_lshl_b32 s9, s1, 1
	s_add_i32 s9, s9, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s10, s9, 2
	s_ashr_i32 s9, s9, 4
	s_add_i32 s10, s10, 0
	s_lshl_b32 s9, s9, 2
	s_add_i32 s9, s10, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v6, s9
	ds_load_b32 v7, v6
	ds_store_b32 v6, v8
	s_waitcnt lgkmcnt(1)
	global_store_b32 v8, v7, s[2:3]
.LBB12_15:                              ; %_Z16clearLastElementILb1EEvPjS0_i.exit.i
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_mov_b32 s2, 1
	s_cbranch_vccnz .LBB12_19
.LBB12_16:                              ; %.lr.ph.i6.i
                                        ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s3, s6, 1
	s_mov_b32 s7, exec_lo
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s2, v0
	s_cbranch_execz .LBB12_18
; %bb.17:                               ;   in Loop: Header=BB12_16 Depth=1
	s_and_b32 s6, s6, 0xfffffe
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_i32_i24_e32 v6, s6, v0
	s_lshl_b32 s6, s3, 2
	v_add3_u32 v6, s3, -1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v7, s3, v6
	v_ashrrev_i32_e32 v8, 4, v6
	v_lshl_add_u32 v6, v6, 2, 0
	v_ashrrev_i32_e32 v7, 4, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v8, v8, 2, v6
	v_lshlrev_b32_e32 v7, 2, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v6, v6, s6, v7
	ds_load_b32 v7, v8
	ds_load_b32 v9, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v7, v9, v7
	ds_store_b32 v8, v9
	ds_store_b32 v6, v7
.LBB12_18:                              ;   in Loop: Header=BB12_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_lshl_b32 s2, s2, 1
	s_mov_b32 s6, s3
	s_cmp_le_u32 s2, s1
	s_cbranch_scc1 .LBB12_16
.LBB12_19:                              ; %_Z12prescanBlockILb1EEvPjiS0_.exit
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v0, v5
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v0, off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB12_21
; %bb.20:
	ds_load_b32 v3, v2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v3, off
.LBB12_21:                              ; %_Z21storeSharedChunkToMemILb1EEvPjPKjiiiiiii.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7prescanILb1ELb1EEvPjPKjS0_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z7prescanILb1ELb1EEvPjPKjS0_iii,"axG",@progbits,_Z7prescanILb1ELb1EEvPjPKjS0_iii,comdat
.Lfunc_end12:
	.size	_Z7prescanILb1ELb1EEvPjPKjS0_iii, .Lfunc_end12-_Z7prescanILb1ELb1EEvPjPKjS0_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 968
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z7prescanILb0ELb0EEvPjPKjS0_iii,"axG",@progbits,_Z7prescanILb0ELb0EEvPjPKjS0_iii,comdat
	.protected	_Z7prescanILb0ELb0EEvPjPKjS0_iii ; -- Begin function _Z7prescanILb0ELb0EEvPjPKjS0_iii
	.globl	_Z7prescanILb0ELb0EEvPjPKjS0_iii
	.p2align	8
	.type	_Z7prescanILb0ELb0EEvPjPKjS0_iii,@function
_Z7prescanILb0ELb0EEvPjPKjS0_iii:       ; @_Z7prescanILb0ELb0EEvPjPKjS0_iii
; %bb.0:
	s_load_b32 s5, s[0:1], 0x20
	s_mov_b32 s4, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB13_2
; %bb.1:                                ; %._crit_edge
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_branch .LBB13_3
.LBB13_2:
	s_mov_b32 s4, -1
                                        ; implicit-def: $sgpr5
                                        ; implicit-def: $sgpr2_sgpr3
.LBB13_3:                               ; %Flow33
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_mov_b32 s4, 1
	s_cbranch_vccnz .LBB13_5
; %bb.4:
	s_load_b32 s5, s[0:1], 0x34
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_lshl_b32 s6, s15, 8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s6, s6, 7
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_mul_i32 s5, s6, s5
.LBB13_5:
	s_load_b32 s6, s[2:3], 0xc
	s_load_b128 s[0:3], s[0:1], 0x0
	v_add_nc_u32_e32 v1, s5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s6, 0xffff
	v_add_nc_u32_e32 v3, s5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v7, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v4, vcc_lo
	s_lshl_b32 s2, s5, 2
	s_clause 0x1
	global_load_b32 v9, v[5:6], off
	global_load_b32 v7, v[7:8], off
	v_add_nc_u32_e32 v5, s5, v0
	v_lshrrev_b32_e32 v6, 2, v0
	v_lshl_add_u32 v8, v0, 2, 0
	s_cmp_lg_u32 s5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v5, 2, v5
	v_and_b32_e32 v6, 0xfc, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v5, 0x7ffc, v5
	v_add_nc_u32_e32 v6, v8, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add3_u32 v5, v8, s2, v5
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s5, 0
	s_waitcnt vmcnt(1)
	ds_store_b32 v6, v9
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v7
	s_cbranch_scc1 .LBB13_11
; %bb.6:                                ; %.lr.ph.i.i.preheader
	s_mov_b32 s3, s5
.LBB13_7:                               ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s3, v0
	s_cbranch_execz .LBB13_9
; %bb.8:                                ;   in Loop: Header=BB13_7 Depth=1
	s_lshl_b32 s7, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_i32_i24_e32 v7, s7, v0
	s_lshl_b32 s7, s4, 2
	v_add3_u32 v7, s4, -1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v8, s4, v7
	v_ashrrev_i32_e32 v9, 4, v7
	v_lshl_add_u32 v7, v7, 2, 0
	v_ashrrev_i32_e32 v8, 4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v9, v9, 2, v7
	v_lshlrev_b32_e32 v8, 2, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v7, v7, s7, v8
	ds_load_b32 v8, v9
	ds_load_b32 v9, v7
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v8, v9, v8
	ds_store_b32 v7, v8
.LBB13_9:                               ;   in Loop: Header=BB13_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_lshl_b32 s4, s4, 1
	s_lshr_b32 s6, s3, 1
	s_cmp_gt_u32 s3, 1
	s_cbranch_scc0 .LBB13_11
; %bb.10:                               ;   in Loop: Header=BB13_7 Depth=1
	s_mov_b32 s3, s6
	s_branch .LBB13_7
.LBB13_11:                              ; %_Z8buildSumPj.exit.i
	s_mov_b32 s3, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB13_13
; %bb.12:
	s_lshl_b32 s6, s5, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s6, s6, -1
	s_lshl_b32 s7, s6, 2
	s_ashr_i32 s6, s6, 4
	s_add_i32 s7, s7, 0
	s_lshl_b32 s6, s6, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s6, s7, s6
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v8, s6
	ds_store_b32 v8, v7
.LBB13_13:                              ; %_Z16clearLastElementILb0EEvPjS0_i.exit.i
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_mov_b32 s2, 1
	s_cbranch_vccnz .LBB13_17
.LBB13_14:                              ; %.lr.ph.i6.i
                                        ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s3, s4, 1
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s2, v0
	s_cbranch_execz .LBB13_16
; %bb.15:                               ;   in Loop: Header=BB13_14 Depth=1
	s_and_b32 s4, s4, 0xfffffe
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_i32_i24_e32 v7, s4, v0
	s_lshl_b32 s4, s3, 2
	v_add3_u32 v7, s3, -1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v8, s3, v7
	v_ashrrev_i32_e32 v9, 4, v7
	v_lshl_add_u32 v7, v7, 2, 0
	v_ashrrev_i32_e32 v8, 4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v9, v9, 2, v7
	v_lshlrev_b32_e32 v8, 2, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v7, v7, s4, v8
	ds_load_b32 v8, v9
	ds_load_b32 v10, v7
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v8, v10, v8
	ds_store_b32 v9, v10
	ds_store_b32 v7, v8
.LBB13_16:                              ;   in Loop: Header=BB13_14 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_lshl_b32 s2, s2, 1
	s_mov_b32 s4, s3
	s_cmp_le_u32 s2, s5
	s_cbranch_scc1 .LBB13_14
.LBB13_17:                              ; %_Z12prescanBlockILb0EEvPjiS0_.exit
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v6, v6
	ds_load_b32 v5, v5
	v_add_co_u32 v0, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v2, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v4, vcc_lo
	s_waitcnt lgkmcnt(1)
	global_store_b32 v[0:1], v6, off
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[2:3], v5, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7prescanILb0ELb0EEvPjPKjS0_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z7prescanILb0ELb0EEvPjPKjS0_iii,"axG",@progbits,_Z7prescanILb0ELb0EEvPjPKjS0_iii,comdat
.Lfunc_end13:
	.size	_Z7prescanILb0ELb0EEvPjPKjS0_iii, .Lfunc_end13-_Z7prescanILb0ELb0EEvPjPKjS0_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 852
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z7prescanILb0ELb1EEvPjPKjS0_iii,"axG",@progbits,_Z7prescanILb0ELb1EEvPjPKjS0_iii,comdat
	.protected	_Z7prescanILb0ELb1EEvPjPKjS0_iii ; -- Begin function _Z7prescanILb0ELb1EEvPjPKjS0_iii
	.globl	_Z7prescanILb0ELb1EEvPjPKjS0_iii
	.p2align	8
	.type	_Z7prescanILb0ELb1EEvPjPKjS0_iii,@function
_Z7prescanILb0ELb1EEvPjPKjS0_iii:       ; @_Z7prescanILb0ELb1EEvPjPKjS0_iii
; %bb.0:
	s_load_b32 s8, s[0:1], 0x20
	s_mov_b32 s4, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s8, 0
	s_cbranch_scc1 .LBB14_2
; %bb.1:                                ; %._crit_edge
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_branch .LBB14_3
.LBB14_2:
	s_mov_b32 s4, -1
                                        ; implicit-def: $sgpr8
                                        ; implicit-def: $sgpr2_sgpr3
.LBB14_3:                               ; %Flow35
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB14_5
; %bb.4:
	s_load_b32 s4, s[0:1], 0x34
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_lshl_b32 s5, s15, 8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s5, s5, 7
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_mul_i32 s8, s5, s4
.LBB14_5:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_dual_mov_b32 v8, 0 :: v_dual_add_nc_u32 v1, s8, v0
	s_load_b32 s0, s[0:1], 0x18
	s_load_b32 s1, s[2:3], 0xc
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
	s_and_b32 s1, s1, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e32 v7, s1, v0
	global_load_b32 v2, v[5:6], off
	v_lshrrev_b32_e32 v5, 2, v0
	v_lshl_add_u32 v6, v0, 2, 0
	v_add_nc_u32_e32 v1, s1, v1
	v_cmp_gt_i32_e64 s0, s0, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v5, 0xfc, v5
	v_add_nc_u32_e32 v5, v6, v5
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v2
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB14_7
; %bb.6:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[1:2]
	v_add_co_u32 v8, vcc_lo, s6, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
.LBB14_7:                               ; %_Z22loadSharedChunkFromMemILb1EEvPjPKjiiRiS3_S3_S3_S3_S3_.exit
	s_or_b32 exec_lo, exec_lo, s2
	v_lshrrev_b32_e32 v2, 2, v7
	s_lshl_b32 s2, s1, 2
	s_cmp_lg_u32 s1, 0
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, 0x7ffc, v2
	s_cmp_eq_u32 s1, 0
	v_add3_u32 v2, v6, s2, v2
	s_mov_b32 s2, 1
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v8
	s_cbranch_scc1 .LBB14_13
; %bb.8:                                ; %.lr.ph.i.i.preheader
	s_mov_b32 s6, s1
.LBB14_9:                               ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s7, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s6, v0
	s_cbranch_execz .LBB14_11
; %bb.10:                               ;   in Loop: Header=BB14_9 Depth=1
	s_lshl_b32 s8, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_i32_i24_e32 v6, s8, v0
	s_lshl_b32 s8, s2, 2
	v_add3_u32 v6, s2, -1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v7, s2, v6
	v_ashrrev_i32_e32 v8, 4, v6
	v_lshl_add_u32 v6, v6, 2, 0
	v_ashrrev_i32_e32 v7, 4, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v8, v8, 2, v6
	v_lshlrev_b32_e32 v7, 2, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v6, v6, s8, v7
	ds_load_b32 v7, v8
	ds_load_b32 v8, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v7, v8, v7
	ds_store_b32 v6, v7
.LBB14_11:                              ;   in Loop: Header=BB14_9 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_lshl_b32 s2, s2, 1
	s_lshr_b32 s7, s6, 1
	s_cmp_gt_u32 s6, 1
	s_cbranch_scc0 .LBB14_13
; %bb.12:                               ;   in Loop: Header=BB14_9 Depth=1
	s_mov_b32 s6, s7
	s_branch .LBB14_9
.LBB14_13:                              ; %_Z8buildSumPj.exit.i
	s_mov_b32 s6, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB14_15
; %bb.14:
	s_lshl_b32 s7, s1, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s7, s7, -1
	s_lshl_b32 s8, s7, 2
	s_ashr_i32 s7, s7, 4
	s_add_i32 s8, s8, 0
	s_lshl_b32 s7, s7, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s7, s8, s7
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v7, s7
	ds_store_b32 v7, v6
.LBB14_15:                              ; %_Z16clearLastElementILb0EEvPjS0_i.exit.i
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_mov_b32 s3, 1
	s_cbranch_vccnz .LBB14_19
.LBB14_16:                              ; %.lr.ph.i6.i
                                        ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s6, s2, 1
	s_mov_b32 s7, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s3, v0
	s_cbranch_execz .LBB14_18
; %bb.17:                               ;   in Loop: Header=BB14_16 Depth=1
	s_and_b32 s2, s2, 0xfffffe
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_i32_i24_e32 v6, s2, v0
	s_lshl_b32 s2, s6, 2
	v_add3_u32 v6, s6, -1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v7, s6, v6
	v_ashrrev_i32_e32 v8, 4, v6
	v_lshl_add_u32 v6, v6, 2, 0
	v_ashrrev_i32_e32 v7, 4, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v8, v8, 2, v6
	v_lshlrev_b32_e32 v7, 2, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v6, v6, s2, v7
	ds_load_b32 v7, v8
	ds_load_b32 v9, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v7, v9, v7
	ds_store_b32 v8, v9
	ds_store_b32 v6, v7
.LBB14_18:                              ;   in Loop: Header=BB14_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_lshl_b32 s3, s3, 1
	s_mov_b32 s2, s6
	s_cmp_le_u32 s3, s1
	s_cbranch_scc1 .LBB14_16
.LBB14_19:                              ; %_Z12prescanBlockILb0EEvPjiS0_.exit
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v0, v5
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v0, off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB14_21
; %bb.20:
	ds_load_b32 v3, v2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v3, off
.LBB14_21:                              ; %_Z21storeSharedChunkToMemILb1EEvPjPKjiiiiiii.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7prescanILb0ELb1EEvPjPKjS0_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z7prescanILb0ELb1EEvPjPKjS0_iii,"axG",@progbits,_Z7prescanILb0ELb1EEvPjPKjS0_iii,comdat
.Lfunc_end14:
	.size	_Z7prescanILb0ELb1EEvPjPKjS0_iii, .Lfunc_end14-_Z7prescanILb0ELb1EEvPjPKjS0_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 904
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	Mterminate              ; @Mterminate
	.type	Mterminate,@object
	.section	.bss,"aw",@nobits
	.globl	Mterminate
	.p2align	2, 0x0
Mterminate:
	.long	0                               ; 0x0
	.size	Mterminate, 4

	.protected	numActiveThreads        ; @numActiveThreads
	.type	numActiveThreads,@object
	.globl	numActiveThreads
	.p2align	2, 0x0
numActiveThreads:
	.long	0                               ; 0x0
	.size	numActiveThreads, 4

	.protected	range                   ; @range
	.type	range,@object
	.globl	range
	.p2align	3, 0x0
range:
	.quad	0
	.size	range, 8

	.protected	pivot                   ; @pivot
	.type	pivot,@object
	.globl	pivot
	.p2align	3, 0x0
pivot:
	.quad	0
	.size	pivot, 8

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym Mterminate
	.addrsig_sym numActiveThreads
	.addrsig_sym range
	.addrsig_sym pivot
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 56
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10BFSKernel1mPjS_S_S_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10BFSKernel1mPjS_S_S_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10BFSKernel2mPjS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10BFSKernel2mPjS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 40
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10TRIMKernelmPjS_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10TRIMKernelmPjS_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17PIVOTS_SEL_Kernelm
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17PIVOTS_SEL_Kernelm.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12UpdateKernelmPjS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12UpdateKernelmPjS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13UpdateKernel1mPjS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13UpdateKernel1mPjS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14RenumberKernelmPj
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14RenumberKernelmPj.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9initpivotm
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9initpivotm.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9ReadPivotmPj
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9ReadPivotmPj.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11compactSIMDmPjS_m
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11compactSIMDmPjS_m.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 4
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10uniformAddPjS_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10uniformAddPjS_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         160
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7prescanILb1ELb0EEvPjPKjS0_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7prescanILb1ELb0EEvPjPKjS0_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         160
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7prescanILb1ELb1EEvPjPKjS0_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7prescanILb1ELb1EEvPjPKjS0_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         160
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7prescanILb0ELb0EEvPjPKjS0_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7prescanILb0ELb0EEvPjPKjS0_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         160
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7prescanILb0ELb1EEvPjPKjS0_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7prescanILb0ELb1EEvPjPKjS0_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
