#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <math.h>
#include<curand_kernel.h>
//
__device__ float calcDistance(int target_row ,int target_col,int source_row, int source_col , double * target_block ,double * source_block,int target_rows,int target_cols ,int source_rows,int source_cols)
{	
	int r = 3;
	double dif=0;
	double dif0=1,dif1=1,dif2=1;

	if( target_row-r<0 )  target_row = r;
	if( target_col-r<0 )  target_col =r;
	if( source_row-r<0 )  source_row = r;
	if( source_col-r<0 )  source_col = r;

	if( target_row+r>=target_rows )  target_row = target_cols-1-r;
	if( target_col+r>= target_cols )  target_col = target_rows-1-r;
	if( source_row+r>=source_rows  )  source_row = source_rows-1-r;
	if( source_col+r>= source_cols )  source_col = source_cols-1-r;	

	for(int i=-r ;i<=r;i++){
		for(int j=-r ;j<=r;j++){
			int temp = 3*((source_row+i)*source_cols+source_col+j) ;
			int temp2 = 3*((target_row+i)*target_cols+target_col+j) ;
			dif0 = source_block[ temp+ 0] - target_block[temp2+ 0] ;
			dif1 = source_block[ temp+ 1] - target_block[temp2+ 1] ;
			dif2 = source_block[ temp+ 2] - target_block[temp2+ 2] ;
			dif += sqrt(dif0*dif0 +dif1*dif1 +dif2*dif2);
		}	
	}
	return dif;
}
__device__ int calcDistance(int target_row ,int target_col,int source_row1, int source_col1,int source_row2, int source_col2 ,int source_row3, int source_col3,double * target_block , double *source_block,int target_rows,int target_cols ,int source_rows,int source_cols)
{
	float first2Second = calcDistance(target_row,  target_col , source_row1,  source_col1,target_block ,source_block,target_rows,target_cols,source_rows, source_cols);
	float first2Third = calcDistance(  target_row, target_col , source_row2,  source_col2,target_block ,source_block,target_rows,target_cols,source_rows, source_cols);
	float first2Fourth = calcDistance( target_row,target_col , source_row3,  source_col3,target_block ,source_block,target_rows,target_cols,source_rows, source_cols);
	if (first2Second<=first2Third)
	{
		if (first2Second<=first2Fourth)
			return 1;
		else
			return 3;
	}
	else if (first2Third<= first2Fourth)
		return 2;
	else
		return 3;
}
__device__ int calcDistance(int target_row,int target_col ,int source_row1, int source_col1,int source_row2, int source_col2 ,double * target_block ,double * source_block,int target_rows,int target_cols ,int source_rows,int source_cols)
{
	float first2Second = calcDistance(target_row,  target_col , source_row1,  source_col1,target_block ,source_block,target_rows,target_cols,source_rows, source_cols);
	float first2Third = calcDistance(  target_row, target_col , source_row2,  source_col2,target_block ,source_block,target_rows,target_cols,source_rows, source_cols);
	if (first2Second <= first2Third)
		return 1;
	return 2;
}

__global__ void extern PropagationGPU(double * target_block ,double * source_block ,  int * relation_block  ,  int target_rows  ,  int target_cols ,int source_rows  ,  int source_cols)
{
	//ݹ̣
	int y = blockIdx.x;
	int x = threadIdx.x;

	//뾶
	int c_r0 = relation_block[ 2*(y*target_cols+x) + 0 ];
	int c_c0 = relation_block[ 2*(y*target_cols+x) + 1];

	int c_r1 = relation_block[ 2*((y+1)*target_cols+x) + 0 ]-1;
	int c_c1 = relation_block[ 2*((y+1)*target_cols+x) + 1 ];

	int c_r2 = relation_block[ 2*(y*target_cols+x+1) + 0];
	int c_c2 = relation_block[ 2*(y*target_cols+x+1) + 1]-1;

	int patchNumber = calcDistance(y  ,  x  ,  c_r0 ,  c_c0 , c_r1, c_c1 , c_r2 , c_c2 , target_block ,source_block,target_rows,target_cols,source_rows, source_cols);
	switch(patchNumber)
	{ 
		case 2:
			relation_block[ 2*(y*target_cols+x) + 0 ]= c_r1;
			relation_block[ 2*(y*target_cols+x) + 1 ]= c_c1;
			break;
		case 3:
			relation_block[ 2*(y*target_cols+x) + 0 ] = c_r2;
			relation_block[ 2*(y*target_cols+x) + 1 ] = c_c2;
			break;
	}
}
__global__ void extern RandomSearchGPU(double * target_block ,double * source_block ,int * relation_block,int target_rows,int target_cols ,int source_rows,int source_cols){
	//ݹ̣
	int y = blockIdx.x;
	int x = threadIdx.x;

	//뾶
	int c_r0 = relation_block[ 2*(y*target_cols+x) + 0 ];
	int c_c0 = relation_block[ 2*(y*target_cols+x) + 1];

	int c_r1 = relation_block[ 2*((y-2)*target_cols+x) + 0 ]+2;
	int c_c1 = relation_block[ 2*((y-2)*target_cols+x) + 1 ];

	int c_r2 = relation_block[ 2*(y*target_cols+x-2) + 0];
	int c_c2 = relation_block[ 2*(y*target_cols+x-2) + 1]+2;

	int patchNumber = calcDistance(y  ,  x  ,  c_r0 ,  c_c0 , c_r1, c_c1 , c_r2 , c_c2 , target_block ,source_block,target_rows,target_cols,source_rows, source_cols);
	switch(patchNumber)
	{
		case 2:
			relation_block[ 2*(y*target_cols+x) + 0 ]= c_r1;
			relation_block[ 2*(y*target_cols+x) + 1 ]= c_c1;
			break;
		case 3:
			relation_block[ 2*(y*target_cols+x) + 0 ] = c_r2;
			relation_block[ 2*(y*target_cols+x) + 1 ] = c_c2;
			break;
	}
}

__global__ void extern baoli(double * target_block ,double * source_block ,int * relation_block,int target_rows,int target_cols ,int source_rows,int source_cols,double *distance){
	int y = threadIdx.y;
	int x = threadIdx.x;

	for(int i  = 0 ; i<12;i++){
		for(int j =  0 ;j< 12 ; j++){
			double c =  calcDistance(y  ,  x  ,  i ,  j ,  target_block ,source_block,target_rows,target_cols,source_rows, source_cols);
			if( c < distance[ y*target_cols+x ]){
				relation_block[ 2*(y*target_cols+x) + 0 ]= 1;
				relation_block[ 2*(y*target_cols+x) + 1 ]= 1;
				distance[ y*target_cols+x ] = c;
			}
		}
	}
}

void extern  bridge(double * target_block ,double * source_block  ,int *  relation_block,int target_rows,int target_cols ,int source_rows,int source_cols, double * distance){
	//̴߳Сƣ
/**/	for(int i = 0;i<130 ;i++){
		PropagationGPU<<<target_rows  ,target_cols>>>(target_block, source_block, relation_block , target_rows , target_cols , source_rows , source_cols);
		cudaThreadSynchronize();
		RandomSearchGPU<<<target_rows	,target_cols>>>(target_block, source_block, relation_block,target_rows,target_cols,source_rows, source_cols);
		cudaThreadSynchronize();
	}

	//baoli<<<target_rows  ,target_cols>>>(target_block, source_block, relation_block , target_rows , target_cols , source_rows , source_cols	,distance);
}
	.file	"tmpxft_0033098c_00000000-6__patchGPU.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2228:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2228:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z12calcDistanceiiiiPdS_iiii
	.type	_Z12calcDistanceiiiiPdS_iiii, @function
_Z12calcDistanceiiiiPdS_iiii:
.LFB2222:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2222:
	.size	_Z12calcDistanceiiiiPdS_iiii, .-_Z12calcDistanceiiiiPdS_iiii
	.globl	_Z12calcDistanceiiiiiiiiPdS_iiii
	.type	_Z12calcDistanceiiiiiiiiPdS_iiii, @function
_Z12calcDistanceiiiiiiiiPdS_iiii:
.LFB2223:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2223:
	.size	_Z12calcDistanceiiiiiiiiPdS_iiii, .-_Z12calcDistanceiiiiiiiiPdS_iiii
	.globl	_Z12calcDistanceiiiiiiPdS_iiii
	.type	_Z12calcDistanceiiiiiiPdS_iiii, @function
_Z12calcDistanceiiiiiiPdS_iiii:
.LFB2224:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2224:
	.size	_Z12calcDistanceiiiiiiPdS_iiii, .-_Z12calcDistanceiiiiiiPdS_iiii
	.globl	_Z42__device_stub__Z14PropagationGPUPdS_PiiiiiPdS_Piiiii
	.type	_Z42__device_stub__Z14PropagationGPUPdS_PiiiiiPdS_Piiiii, @function
_Z42__device_stub__Z14PropagationGPUPdS_PiiiiiPdS_Piiiii:
.LFB2250:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z14PropagationGPUPdS_Piiiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L8:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2250:
	.size	_Z42__device_stub__Z14PropagationGPUPdS_PiiiiiPdS_Piiiii, .-_Z42__device_stub__Z14PropagationGPUPdS_PiiiiiPdS_Piiiii
	.globl	_Z14PropagationGPUPdS_Piiiii
	.type	_Z14PropagationGPUPdS_Piiiii, @function
_Z14PropagationGPUPdS_Piiiii:
.LFB2251:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z14PropagationGPUPdS_PiiiiiPdS_Piiiii
	.cfi_endproc
.LFE2251:
	.size	_Z14PropagationGPUPdS_Piiiii, .-_Z14PropagationGPUPdS_Piiiii
	.globl	_Z43__device_stub__Z15RandomSearchGPUPdS_PiiiiiPdS_Piiiii
	.type	_Z43__device_stub__Z15RandomSearchGPUPdS_PiiiiiPdS_Piiiii, @function
_Z43__device_stub__Z15RandomSearchGPUPdS_PiiiiiPdS_Piiiii:
.LFB2252:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15RandomSearchGPUPdS_Piiiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L14:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2252:
	.size	_Z43__device_stub__Z15RandomSearchGPUPdS_PiiiiiPdS_Piiiii, .-_Z43__device_stub__Z15RandomSearchGPUPdS_PiiiiiPdS_Piiiii
	.globl	_Z15RandomSearchGPUPdS_Piiiii
	.type	_Z15RandomSearchGPUPdS_Piiiii, @function
_Z15RandomSearchGPUPdS_Piiiii:
.LFB2253:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z15RandomSearchGPUPdS_PiiiiiPdS_Piiiii
	.cfi_endproc
.LFE2253:
	.size	_Z15RandomSearchGPUPdS_Piiiii, .-_Z15RandomSearchGPUPdS_Piiiii
	.globl	_Z6bridgePdS_PiiiiiS_
	.type	_Z6bridgePdS_PiiiiiS_, @function
_Z6bridgePdS_PiiiiiS_:
.LFB2225:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	$130, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movabsq	$4294967297, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r9d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r8d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	movl	128(%rsp), %r15d
	movq	%rsi, 16(%rsp)
	movq	%rdx, 24(%rsp)
.L22:
	movq	%r13, 56(%rsp)
	movl	60(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, 44(%rsp)
	movl	48(%rsp), %esi
	movl	%ebp, 52(%rsp)
	movq	52(%rsp), %rdx
	movl	%ebx, 40(%rsp)
	movq	40(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	%rsi
	.cfi_def_cfa_offset 136
	movl	%ebp, %r8d
	movl	%r12d, %r9d
	movl	%ebx, %ecx
	pushq	%r15
	.cfi_def_cfa_offset 144
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z42__device_stub__Z14PropagationGPUPdS_PiiiiiPdS_Piiiii
	popq	%rdi
	.cfi_def_cfa_offset 136
	popq	%r8
	.cfi_def_cfa_offset 128
.L20:
	call	cudaThreadSynchronize@PLT
	movq	%r13, 56(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, 44(%rsp)
	movl	60(%rsp), %ecx
	movl	%ebp, 52(%rsp)
	movl	48(%rsp), %esi
	movl	%ebx, 40(%rsp)
	movq	52(%rsp), %rdx
	movq	40(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	pushq	%rax
	.cfi_def_cfa_offset 136
	movl	%ebx, %ecx
	movl	%r12d, %r9d
	movl	%ebp, %r8d
	pushq	%r15
	.cfi_def_cfa_offset 144
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z43__device_stub__Z15RandomSearchGPUPdS_PiiiiiPdS_Piiiii
	popq	%rdx
	.cfi_def_cfa_offset 136
	popq	%rcx
	.cfi_def_cfa_offset 128
.L21:
	call	cudaThreadSynchronize@PLT
	decl	%r14d
	jne	.L22
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2225:
	.size	_Z6bridgePdS_PiiiiiS_, .-_Z6bridgePdS_PiiiiiS_
	.globl	_Z34__device_stub__Z5baoliPdS_PiiiiiS_PdS_PiiiiiS_
	.type	_Z34__device_stub__Z5baoliPdS_PiiiiiS_PdS_PiiiiiS_, @function
_Z34__device_stub__Z5baoliPdS_PiiiiiS_PdS_PiiiiiS_:
.LFB2254:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	216(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	%rsp, %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z5baoliPdS_PiiiiiS_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L25:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2254:
	.size	_Z34__device_stub__Z5baoliPdS_PiiiiiS_PdS_PiiiiiS_, .-_Z34__device_stub__Z5baoliPdS_PiiiiiS_PdS_PiiiiiS_
	.globl	_Z5baoliPdS_PiiiiiS_
	.type	_Z5baoliPdS_PiiiiiS_, @function
_Z5baoliPdS_PiiiiiS_:
.LFB2255:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z5baoliPdS_PiiiiiS_PdS_PiiiiiS_
	.cfi_endproc
.LFE2255:
	.size	_Z5baoliPdS_PiiiiiS_, .-_Z5baoliPdS_PiiiiiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z5baoliPdS_PiiiiiS_"
.LC1:
	.string	"_Z15RandomSearchGPUPdS_Piiiii"
.LC2:
	.string	"_Z14PropagationGPUPdS_Piiiii"
.LC3:
	.string	"precalc_xorwow_matrix"
.LC4:
	.string	"precalc_xorwow_offset_matrix"
.LC5:
	.string	"mrg32k3aM1"
.LC6:
	.string	"mrg32k3aM2"
.LC7:
	.string	"mrg32k3aM1SubSeq"
.LC8:
	.string	"mrg32k3aM2SubSeq"
.LC9:
	.string	"mrg32k3aM1Seq"
.LC10:
	.string	"mrg32k3aM2Seq"
.LC11:
	.string	"__cr_lgamma_table"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2257:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z5baoliPdS_PiiiiiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15RandomSearchGPUPdS_Piiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14PropagationGPUPdS_Piiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2257:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include "hip/hip_runtime.h"

#include <math.h>
#include<hiprand/hiprand_kernel.h>
//
__device__ float calcDistance(int target_row ,int target_col,int source_row, int source_col , double * target_block ,double * source_block,int target_rows,int target_cols ,int source_rows,int source_cols)
{	
	int r = 3;
	double dif=0;
	double dif0=1,dif1=1,dif2=1;

	if( target_row-r<0 )  target_row = r;
	if( target_col-r<0 )  target_col =r;
	if( source_row-r<0 )  source_row = r;
	if( source_col-r<0 )  source_col = r;

	if( target_row+r>=target_rows )  target_row = target_cols-1-r;
	if( target_col+r>= target_cols )  target_col = target_rows-1-r;
	if( source_row+r>=source_rows  )  source_row = source_rows-1-r;
	if( source_col+r>= source_cols )  source_col = source_cols-1-r;	

	for(int i=-r ;i<=r;i++){
		for(int j=-r ;j<=r;j++){
			int temp = 3*((source_row+i)*source_cols+source_col+j) ;
			int temp2 = 3*((target_row+i)*target_cols+target_col+j) ;
			dif0 = source_block[ temp+ 0] - target_block[temp2+ 0] ;
			dif1 = source_block[ temp+ 1] - target_block[temp2+ 1] ;
			dif2 = source_block[ temp+ 2] - target_block[temp2+ 2] ;
			dif += sqrt(dif0*dif0 +dif1*dif1 +dif2*dif2);
		}	
	}
	return dif;
}
__device__ int calcDistance(int target_row ,int target_col,int source_row1, int source_col1,int source_row2, int source_col2 ,int source_row3, int source_col3,double * target_block , double *source_block,int target_rows,int target_cols ,int source_rows,int source_cols)
{
	float first2Second = calcDistance(target_row,  target_col , source_row1,  source_col1,target_block ,source_block,target_rows,target_cols,source_rows, source_cols);
	float first2Third = calcDistance(  target_row, target_col , source_row2,  source_col2,target_block ,source_block,target_rows,target_cols,source_rows, source_cols);
	float first2Fourth = calcDistance( target_row,target_col , source_row3,  source_col3,target_block ,source_block,target_rows,target_cols,source_rows, source_cols);
	if (first2Second<=first2Third)
	{
		if (first2Second<=first2Fourth)
			return 1;
		else
			return 3;
	}
	else if (first2Third<= first2Fourth)
		return 2;
	else
		return 3;
}
__device__ int calcDistance(int target_row,int target_col ,int source_row1, int source_col1,int source_row2, int source_col2 ,double * target_block ,double * source_block,int target_rows,int target_cols ,int source_rows,int source_cols)
{
	float first2Second = calcDistance(target_row,  target_col , source_row1,  source_col1,target_block ,source_block,target_rows,target_cols,source_rows, source_cols);
	float first2Third = calcDistance(  target_row, target_col , source_row2,  source_col2,target_block ,source_block,target_rows,target_cols,source_rows, source_cols);
	if (first2Second <= first2Third)
		return 1;
	return 2;
}

__global__ void extern PropagationGPU(double * target_block ,double * source_block ,  int * relation_block  ,  int target_rows  ,  int target_cols ,int source_rows  ,  int source_cols)
{
	//ݹ̣
	int y = blockIdx.x;
	int x = threadIdx.x;

	//뾶
	int c_r0 = relation_block[ 2*(y*target_cols+x) + 0 ];
	int c_c0 = relation_block[ 2*(y*target_cols+x) + 1];

	int c_r1 = relation_block[ 2*((y+1)*target_cols+x) + 0 ]-1;
	int c_c1 = relation_block[ 2*((y+1)*target_cols+x) + 1 ];

	int c_r2 = relation_block[ 2*(y*target_cols+x+1) + 0];
	int c_c2 = relation_block[ 2*(y*target_cols+x+1) + 1]-1;

	int patchNumber = calcDistance(y  ,  x  ,  c_r0 ,  c_c0 , c_r1, c_c1 , c_r2 , c_c2 , target_block ,source_block,target_rows,target_cols,source_rows, source_cols);
	switch(patchNumber)
	{ 
		case 2:
			relation_block[ 2*(y*target_cols+x) + 0 ]= c_r1;
			relation_block[ 2*(y*target_cols+x) + 1 ]= c_c1;
			break;
		case 3:
			relation_block[ 2*(y*target_cols+x) + 0 ] = c_r2;
			relation_block[ 2*(y*target_cols+x) + 1 ] = c_c2;
			break;
	}
}
__global__ void extern RandomSearchGPU(double * target_block ,double * source_block ,int * relation_block,int target_rows,int target_cols ,int source_rows,int source_cols){
	//ݹ̣
	int y = blockIdx.x;
	int x = threadIdx.x;

	//뾶
	int c_r0 = relation_block[ 2*(y*target_cols+x) + 0 ];
	int c_c0 = relation_block[ 2*(y*target_cols+x) + 1];

	int c_r1 = relation_block[ 2*((y-2)*target_cols+x) + 0 ]+2;
	int c_c1 = relation_block[ 2*((y-2)*target_cols+x) + 1 ];

	int c_r2 = relation_block[ 2*(y*target_cols+x-2) + 0];
	int c_c2 = relation_block[ 2*(y*target_cols+x-2) + 1]+2;

	int patchNumber = calcDistance(y  ,  x  ,  c_r0 ,  c_c0 , c_r1, c_c1 , c_r2 , c_c2 , target_block ,source_block,target_rows,target_cols,source_rows, source_cols);
	switch(patchNumber)
	{
		case 2:
			relation_block[ 2*(y*target_cols+x) + 0 ]= c_r1;
			relation_block[ 2*(y*target_cols+x) + 1 ]= c_c1;
			break;
		case 3:
			relation_block[ 2*(y*target_cols+x) + 0 ] = c_r2;
			relation_block[ 2*(y*target_cols+x) + 1 ] = c_c2;
			break;
	}
}

__global__ void extern baoli(double * target_block ,double * source_block ,int * relation_block,int target_rows,int target_cols ,int source_rows,int source_cols,double *distance){
	int y = threadIdx.y;
	int x = threadIdx.x;

	for(int i  = 0 ; i<12;i++){
		for(int j =  0 ;j< 12 ; j++){
			double c =  calcDistance(y  ,  x  ,  i ,  j ,  target_block ,source_block,target_rows,target_cols,source_rows, source_cols);
			if( c < distance[ y*target_cols+x ]){
				relation_block[ 2*(y*target_cols+x) + 0 ]= 1;
				relation_block[ 2*(y*target_cols+x) + 1 ]= 1;
				distance[ y*target_cols+x ] = c;
			}
		}
	}
}

void extern  bridge(double * target_block ,double * source_block  ,int *  relation_block,int target_rows,int target_cols ,int source_rows,int source_cols, double * distance){
	//̴߳Сƣ
/**/	for(int i = 0;i<130 ;i++){
		PropagationGPU<<<target_rows  ,target_cols>>>(target_block, source_block, relation_block , target_rows , target_cols , source_rows , source_cols);
		hipDeviceSynchronize();
		RandomSearchGPU<<<target_rows	,target_cols>>>(target_block, source_block, relation_block,target_rows,target_cols,source_rows, source_cols);
		hipDeviceSynchronize();
	}

	//baoli<<<target_rows  ,target_cols>>>(target_block, source_block, relation_block , target_rows , target_cols , source_rows , source_cols	,distance);
}
	.text
	.file	"_patchGPU.hip"
	.globl	_Z29__device_stub__PropagationGPUPdS_Piiiii # -- Begin function _Z29__device_stub__PropagationGPUPdS_Piiiii
	.type	_Z29__device_stub__PropagationGPUPdS_Piiiii,@function
_Z29__device_stub__PropagationGPUPdS_Piiiii: # @_Z29__device_stub__PropagationGPUPdS_Piiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14PropagationGPUPdS_Piiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__PropagationGPUPdS_Piiiii, .Lfunc_end0-_Z29__device_stub__PropagationGPUPdS_Piiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__RandomSearchGPUPdS_Piiiii # -- Begin function _Z30__device_stub__RandomSearchGPUPdS_Piiiii
	.type	_Z30__device_stub__RandomSearchGPUPdS_Piiiii,@function
_Z30__device_stub__RandomSearchGPUPdS_Piiiii: # @_Z30__device_stub__RandomSearchGPUPdS_Piiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15RandomSearchGPUPdS_Piiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z30__device_stub__RandomSearchGPUPdS_Piiiii, .Lfunc_end1-_Z30__device_stub__RandomSearchGPUPdS_Piiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__baoliPdS_PiiiiiS_ # -- Begin function _Z20__device_stub__baoliPdS_PiiiiiS_
	.type	_Z20__device_stub__baoliPdS_PiiiiiS_,@function
_Z20__device_stub__baoliPdS_PiiiiiS_:   # @_Z20__device_stub__baoliPdS_PiiiiiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5baoliPdS_PiiiiiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z20__device_stub__baoliPdS_PiiiiiS_, .Lfunc_end2-_Z20__device_stub__baoliPdS_PiiiiiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z6bridgePdS_PiiiiiS_           # -- Begin function _Z6bridgePdS_PiiiiiS_
	.type	_Z6bridgePdS_PiiiiiS_,@function
_Z6bridgePdS_PiiiiiS_:                  # @_Z6bridgePdS_PiiiiiS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 20(%rsp)                  # 4-byte Spill
	movl	%r8d, %ebp
	movl	%ecx, %r14d
	movq	%rdx, 32(%rsp)                  # 8-byte Spill
	movq	%rsi, 24(%rsp)                  # 8-byte Spill
	movq	%rdi, %r13
	movl	%ecx, %ebx
	btsq	$32, %rbx
	movl	%r8d, %r15d
	btsq	$32, %r15
	movl	$130, %r12d
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_3
# %bb.2:                                #   in Loop: Header=BB3_1 Depth=1
	movl	96(%rsp), %eax
	movl	%eax, (%rsp)
	movq	%r13, %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movl	%r14d, %ecx
	movl	%ebp, %r8d
	movl	20(%rsp), %r9d                  # 4-byte Reload
	callq	_Z29__device_stub__PropagationGPUPdS_Piiiii
.LBB3_3:                                #   in Loop: Header=BB3_1 Depth=1
	callq	hipDeviceSynchronize
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_5
# %bb.4:                                #   in Loop: Header=BB3_1 Depth=1
	movl	96(%rsp), %eax
	movl	%eax, (%rsp)
	movq	%r13, %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movl	%r14d, %ecx
	movl	%ebp, %r8d
	movl	20(%rsp), %r9d                  # 4-byte Reload
	callq	_Z30__device_stub__RandomSearchGPUPdS_Piiiii
.LBB3_5:                                #   in Loop: Header=BB3_1 Depth=1
	callq	hipDeviceSynchronize
	decl	%r12d
	jne	.LBB3_1
# %bb.6:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z6bridgePdS_PiiiiiS_, .Lfunc_end3-_Z6bridgePdS_PiiiiiS_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14PropagationGPUPdS_Piiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15RandomSearchGPUPdS_Piiiii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5baoliPdS_PiiiiiS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14PropagationGPUPdS_Piiiii,@object # @_Z14PropagationGPUPdS_Piiiii
	.section	.rodata,"a",@progbits
	.globl	_Z14PropagationGPUPdS_Piiiii
	.p2align	3, 0x0
_Z14PropagationGPUPdS_Piiiii:
	.quad	_Z29__device_stub__PropagationGPUPdS_Piiiii
	.size	_Z14PropagationGPUPdS_Piiiii, 8

	.type	_Z15RandomSearchGPUPdS_Piiiii,@object # @_Z15RandomSearchGPUPdS_Piiiii
	.globl	_Z15RandomSearchGPUPdS_Piiiii
	.p2align	3, 0x0
_Z15RandomSearchGPUPdS_Piiiii:
	.quad	_Z30__device_stub__RandomSearchGPUPdS_Piiiii
	.size	_Z15RandomSearchGPUPdS_Piiiii, 8

	.type	_Z5baoliPdS_PiiiiiS_,@object    # @_Z5baoliPdS_PiiiiiS_
	.globl	_Z5baoliPdS_PiiiiiS_
	.p2align	3, 0x0
_Z5baoliPdS_PiiiiiS_:
	.quad	_Z20__device_stub__baoliPdS_PiiiiiS_
	.size	_Z5baoliPdS_PiiiiiS_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z14PropagationGPUPdS_Piiiii"
	.size	.L__unnamed_1, 29

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15RandomSearchGPUPdS_Piiiii"
	.size	.L__unnamed_2, 30

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z5baoliPdS_PiiiiiS_"
	.size	.L__unnamed_3, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__PropagationGPUPdS_Piiiii
	.addrsig_sym _Z30__device_stub__RandomSearchGPUPdS_Piiiii
	.addrsig_sym _Z20__device_stub__baoliPdS_PiiiiiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14PropagationGPUPdS_Piiiii
	.addrsig_sym _Z15RandomSearchGPUPdS_Piiiii
	.addrsig_sym _Z5baoliPdS_PiiiiiS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.p2align	2                               ; -- Begin function _Z12calcDistanceiiiiiiiiPdS_iiii
	.type	_Z12calcDistanceiiiiiiiiPdS_iiii,@function
_Z12calcDistanceiiiiiiiiPdS_iiii:       ; @_Z12calcDistanceiiiiiiiiPdS_iiii
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_max_i32_e32 v0, 3, v0
	v_max_i32_e32 v1, 3, v1
	v_max_i32_e32 v3, 3, v3
	v_add_nc_u32_e32 v20, -4, v12
	v_max_i32_e32 v2, 3, v2
	v_add_nc_u32_e32 v16, 3, v0
	v_add_nc_u32_e32 v18, -4, v14
	v_add_nc_u32_e32 v17, -4, v13
	s_mov_b32 s0, -3
	v_add_nc_u32_e32 v21, 3, v2
	v_cmp_lt_i32_e32 vcc_lo, v16, v12
	v_add_nc_u32_e32 v19, 3, v1
	v_lshl_add_u32 v16, v13, 1, v13
	v_cndmask_b32_e32 v0, v17, v0, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_lt_i32_e32 vcc_lo, v19, v13
	v_add_nc_u32_e32 v17, 3, v3
	v_add_nc_u32_e32 v19, -4, v15
	v_cndmask_b32_e32 v1, v20, v1, vcc_lo
	v_cmp_lt_i32_e32 vcc_lo, v21, v14
	v_add_nc_u32_e32 v20, -3, v0
	v_cndmask_b32_e32 v12, v18, v2, vcc_lo
	v_cmp_lt_i32_e32 vcc_lo, v17, v15
	v_lshl_add_u32 v2, v1, 1, v1
	v_lshl_add_u32 v17, v15, 1, v15
	v_cndmask_b32_e32 v3, v19, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[0:1], null, v16, v20, v[2:3]
	v_add_nc_u32_e32 v2, -3, v12
	v_lshl_add_u32 v1, v3, 1, v3
	v_mov_b32_e32 v3, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u64_u32 v[12:13], null, v17, v2, v[1:2]
	v_mov_b32_e32 v1, 0
	v_mov_b32_e32 v2, 0
.LBB0_1:                                ; %.preheader.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_2 Depth 2
	s_mov_b32 s1, -9
.LBB0_2:                                ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v20, s1, v3
	v_add_nc_u32_e32 v22, s1, v12
	s_add_i32 s1, s1, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_eq_u32 s1, 12
	v_ashrrev_i32_e32 v21, 31, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v23, 31, v22
	v_lshlrev_b64 v[20:21], 3, v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[22:23], 3, v[22:23]
	v_add_co_u32 v28, vcc_lo, v8, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v29, vcc_lo, v9, v21, vcc_lo
	v_add_co_u32 v30, vcc_lo, v10, v22
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v31, vcc_lo, v11, v23, vcc_lo
	flat_load_b128 v[20:23], v[28:29]
	s_clause 0x1
	flat_load_b128 v[24:27], v[30:31]
	flat_load_b64 v[30:31], v[30:31] offset:16
	flat_load_b64 v[28:29], v[28:29] offset:16
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_add_f64 v[22:23], v[26:27], -v[22:23]
	v_add_f64 v[20:21], v[24:25], -v[20:21]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[24:25], v[30:31], -v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[22:23], v[22:23], v[22:23]
	v_fma_f64 v[20:21], v[20:21], v[20:21], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[24:25], v[24:25], v[20:21]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[20:21]
	v_cndmask_b32_e64 v13, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v13, 8, v13
	v_ldexp_f64 v[20:21], v[20:21], v13
	v_cndmask_b32_e64 v13, 0, 0xffffff80, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[22:23], v[20:21]
	v_cmp_class_f64_e64 vcc_lo, v[20:21], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[24:25], v[20:21], v[22:23]
	v_mul_f64 v[22:23], v[22:23], 0.5
	v_fma_f64 v[26:27], -v[22:23], v[24:25], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[26:27], -v[24:25], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[24:25], v[26:27], v[22:23], v[24:25]
	v_fma_f64 v[26:27], -v[24:25], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[26:27], v[22:23], v[24:25]
	v_ldexp_f64 v[22:23], v[22:23], v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v20, v22, v20 :: v_dual_cndmask_b32 v21, v23, v21
	v_add_f64 v[1:2], v[1:2], v[20:21]
	s_cbranch_scc0 .LBB0_2
; %bb.3:                                ;   in Loop: Header=BB0_1 Depth=1
	v_add_nc_u32_e32 v3, v3, v16
	v_add_nc_u32_e32 v12, v12, v17
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 4
	s_cbranch_scc0 .LBB0_1
; %bb.4:                                ; %_Z12calcDistanceiiiiPdS_iiii.exit
	v_max_i32_e32 v3, 3, v4
	v_max_i32_e32 v5, 3, v5
	s_mov_b32 s0, -3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, 3, v3
	v_cmp_lt_i32_e32 vcc_lo, v4, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v3, v18, v3 :: v_dual_add_nc_u32 v4, 3, v5
	v_cmp_lt_i32_e32 vcc_lo, v4, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v4, v19, v5 :: v_dual_add_nc_u32 v3, -3, v3
	v_mul_lo_u32 v5, v15, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v3, v4, 1, v4
	v_mad_u64_u32 v[12:13], null, v5, 3, v[3:4]
	v_mov_b32_e32 v3, 0
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, v0
.LBB0_5:                                ; %.preheader.i51
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
	s_mov_b32 s1, -9
.LBB0_6:                                ;   Parent Loop BB0_5 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v20, s1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v22, s1, v12
	s_add_i32 s1, s1, 3
	s_cmp_eq_u32 s1, 12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v21, 31, v20
	v_ashrrev_i32_e32 v23, 31, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[20:21], 3, v[20:21]
	v_lshlrev_b64 v[22:23], 3, v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v28, vcc_lo, v8, v20
	v_add_co_ci_u32_e32 v29, vcc_lo, v9, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v30, vcc_lo, v10, v22
	v_add_co_ci_u32_e32 v31, vcc_lo, v11, v23, vcc_lo
	flat_load_b128 v[20:23], v[28:29]
	s_clause 0x1
	flat_load_b128 v[24:27], v[30:31]
	flat_load_b64 v[30:31], v[30:31] offset:16
	flat_load_b64 v[28:29], v[28:29] offset:16
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_add_f64 v[22:23], v[26:27], -v[22:23]
	v_add_f64 v[20:21], v[24:25], -v[20:21]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[24:25], v[30:31], -v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[22:23], v[22:23], v[22:23]
	v_fma_f64 v[20:21], v[20:21], v[20:21], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[24:25], v[24:25], v[20:21]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[20:21]
	v_cndmask_b32_e64 v13, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v13, 8, v13
	v_ldexp_f64 v[20:21], v[20:21], v13
	v_cndmask_b32_e64 v13, 0, 0xffffff80, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[22:23], v[20:21]
	v_cmp_class_f64_e64 vcc_lo, v[20:21], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[24:25], v[20:21], v[22:23]
	v_mul_f64 v[22:23], v[22:23], 0.5
	v_fma_f64 v[26:27], -v[22:23], v[24:25], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_fma_f64 v[26:27], -v[24:25], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[24:25], v[26:27], v[22:23], v[24:25]
	v_fma_f64 v[26:27], -v[24:25], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[26:27], v[22:23], v[24:25]
	v_ldexp_f64 v[22:23], v[22:23], v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v20, v22, v20 :: v_dual_cndmask_b32 v21, v23, v21
	v_add_f64 v[3:4], v[3:4], v[20:21]
	s_cbranch_scc0 .LBB0_6
; %bb.7:                                ;   in Loop: Header=BB0_5 Depth=1
	v_add_nc_u32_e32 v5, v5, v16
	v_add_nc_u32_e32 v12, v12, v17
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 4
	s_cbranch_scc0 .LBB0_5
; %bb.8:                                ; %_Z12calcDistanceiiiiPdS_iiii.exit58
	v_max_i32_e32 v5, 3, v6
	v_max_i32_e32 v7, 3, v7
	s_mov_b32 s0, -3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, 3, v5
	v_cmp_lt_i32_e32 vcc_lo, v6, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v18, v5 :: v_dual_add_nc_u32 v6, 3, v7
	v_cmp_lt_i32_e32 vcc_lo, v6, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v6, v19, v7 :: v_dual_add_nc_u32 v5, -3, v5
	v_mul_lo_u32 v7, v15, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v5, v6, 1, v6
	v_mad_u64_u32 v[12:13], null, v7, 3, v[5:6]
	v_mov_b32_e32 v5, 0
	v_mov_b32_e32 v6, 0
.LBB0_9:                                ; %.preheader.i71
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_10 Depth 2
	s_mov_b32 s1, -9
.LBB0_10:                               ;   Parent Loop BB0_9 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v13, s1, v0
	v_add_nc_u32_e32 v18, s1, v12
	s_add_i32 s1, s1, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_eq_u32 s1, 12
	v_ashrrev_i32_e32 v14, 31, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v19, 31, v18
	v_lshlrev_b64 v[13:14], 3, v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[18:19], 3, v[18:19]
	v_add_co_u32 v13, vcc_lo, v8, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, v9, v14, vcc_lo
	v_add_co_u32 v26, vcc_lo, v10, v18
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v27, vcc_lo, v11, v19, vcc_lo
	flat_load_b128 v[18:21], v[13:14]
	s_clause 0x1
	flat_load_b128 v[22:25], v[26:27]
	flat_load_b64 v[26:27], v[26:27] offset:16
	flat_load_b64 v[13:14], v[13:14] offset:16
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_add_f64 v[20:21], v[24:25], -v[20:21]
	v_add_f64 v[18:19], v[22:23], -v[18:19]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[13:14], v[26:27], -v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[20:21], v[20:21], v[20:21]
	v_fma_f64 v[18:19], v[18:19], v[18:19], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[13:14], v[13:14], v[18:19]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[13:14]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v7, 8, v7
	v_ldexp_f64 v[13:14], v[13:14], v7
	v_cndmask_b32_e64 v7, 0, 0xffffff80, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[18:19], v[13:14]
	v_cmp_class_f64_e64 vcc_lo, v[13:14], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[20:21], v[13:14], v[18:19]
	v_mul_f64 v[18:19], v[18:19], 0.5
	v_fma_f64 v[22:23], -v[18:19], v[20:21], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_fma_f64 v[18:19], v[18:19], v[22:23], v[18:19]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[22:23], v[18:19], v[20:21]
	v_fma_f64 v[22:23], -v[20:21], v[20:21], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[22:23], v[18:19], v[20:21]
	v_ldexp_f64 v[18:19], v[18:19], v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v14, v19, v14 :: v_dual_cndmask_b32 v13, v18, v13
	v_add_f64 v[5:6], v[5:6], v[13:14]
	s_cbranch_scc0 .LBB0_10
; %bb.11:                               ;   in Loop: Header=BB0_9 Depth=1
	v_add_nc_u32_e32 v0, v0, v16
	v_add_nc_u32_e32 v12, v12, v17
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 4
	s_cbranch_scc0 .LBB0_9
; %bb.12:                               ; %_Z12calcDistanceiiiiPdS_iiii.exit78
	v_cvt_f32_f64_e32 v0, v[1:2]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_f64_e32 v1, v[5:6]
	v_cvt_f32_f64_e32 v2, v[3:4]
	v_cmp_nle_f32_e32 vcc_lo, v0, v1
	v_cndmask_b32_e64 v3, 1, 3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_nle_f32_e32 vcc_lo, v2, v1
	v_cndmask_b32_e64 v1, 2, 3, vcc_lo
	v_cmp_nle_f32_e32 vcc_lo, v0, v2
	v_cndmask_b32_e32 v0, v3, v1, vcc_lo
	s_setpc_b64 s[30:31]
.Lfunc_end0:
	.size	_Z12calcDistanceiiiiiiiiPdS_iiii, .Lfunc_end0-_Z12calcDistanceiiiiiiiiPdS_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 1604
; NumSgprs: 34
; NumVgprs: 32
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	_Z14PropagationGPUPdS_Piiiii ; -- Begin function _Z14PropagationGPUPdS_Piiiii
	.globl	_Z14PropagationGPUPdS_Piiiii
	.p2align	8
	.type	_Z14PropagationGPUPdS_Piiiii,@function
_Z14PropagationGPUPdS_Piiiii:           ; @_Z14PropagationGPUPdS_Piiiii
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x18
	s_load_b64 s[2:3], s[0:1], 0x10
	v_mov_b32_e32 v1, v0
	s_mov_b32 s32, 0
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, _Z12calcDistanceiiiiiiiiPdS_iiii@rel32@lo+4
	s_addc_u32 s9, s9, _Z12calcDistanceiiiiiiiiPdS_iiii@rel32@hi+12
	v_mov_b32_e32 v0, s15
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[2:3], null, s15, s5, v[1:2]
	v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v14, s6
	v_dual_mov_b32 v15, s7 :: v_dual_mov_b32 v12, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_lshl_u32 v3, v2, s5, 1
	v_lshlrev_b32_e32 v5, 1, v2
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[5:6]
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	v_add_co_u32 v38, vcc_lo, s2, v4
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v39, vcc_lo, s3, v5, vcc_lo
	s_clause 0x1
	global_load_b64 v[36:37], v[2:3], off
	global_load_b128 v[32:35], v[38:39], off
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v9, s1 :: v_dual_mov_b32 v10, s2
	v_dual_mov_b32 v11, s3 :: v_dual_mov_b32 v8, s0
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v36, -1, v36
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v2, v32 :: v_dual_add_nc_u32 v35, -1, v35
	v_mov_b32_e32 v3, v33
	v_dual_mov_b32 v5, v37 :: v_dual_mov_b32 v6, v34
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v4, v36 :: v_dual_mov_b32 v7, v35
	s_swappc_b64 s[30:31], s[8:9]
	s_mov_b32 s0, 0
	s_mov_b32 s1, exec_lo
	v_cmpx_lt_i32_e32 2, v0
	s_xor_b32 s1, exec_lo, s1
; %bb.1:
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr37
                                        ; implicit-def: $vgpr36
; %bb.2:                                ; %Flow
	s_and_not1_saveexec_b32 s1, s1
; %bb.3:                                ; %LeafBlock
	v_cmp_eq_u32_e32 vcc_lo, 2, v0
	v_dual_mov_b32 v35, v37 :: v_dual_mov_b32 v34, v36
	s_and_not1_b32 s0, s0, exec_lo
	s_and_b32 s2, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s0, s0, s2
; %bb.4:                                ; %Flow82
	s_or_b32 exec_lo, exec_lo, s1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_6
; %bb.5:                                ; %.sink.split
	global_store_b64 v[38:39], v[34:35], off
.LBB1_6:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14PropagationGPUPdS_Piiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 40
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 40
		.amdhsa_next_free_sgpr 33
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z14PropagationGPUPdS_Piiiii, .Lfunc_end1-_Z14PropagationGPUPdS_Piiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 332
; NumSgprs: 35
; NumVgprs: 40
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 35
; NumVGPRsForWavesPerEU: 40
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15RandomSearchGPUPdS_Piiiii ; -- Begin function _Z15RandomSearchGPUPdS_Piiiii
	.globl	_Z15RandomSearchGPUPdS_Piiiii
	.p2align	8
	.type	_Z15RandomSearchGPUPdS_Piiiii,@function
_Z15RandomSearchGPUPdS_Piiiii:          ; @_Z15RandomSearchGPUPdS_Piiiii
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x18
	s_load_b64 s[2:3], s[0:1], 0x10
	v_mov_b32_e32 v1, v0
	s_mov_b32 s32, 0
	v_mov_b32_e32 v0, s15
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s15, s5
	s_lshl_b32 s9, s5, 1
	v_add_lshl_u32 v2, s8, v1, 1
	s_sub_i32 s9, s8, s9
	v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v14, s6
	v_add_lshl_u32 v3, s9, v1, 1
	s_delay_alu instid0(VALU_DEP_3)
	v_add_nc_u32_e32 v5, -4, v2
	v_mov_b32_e32 v15, s7
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, _Z12calcDistanceiiiiiiiiPdS_iiii@rel32@lo+4
	s_addc_u32 s9, s9, _Z12calcDistanceiiiiiiiiPdS_iiii@rel32@hi+12
	v_mov_b32_e32 v12, s4
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_lshlrev_b64 v[4:5], 2, v[5:6]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s2, v7
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_clause 0x1
	global_load_b64 v[34:35], v[6:7], off
	global_load_b64 v[32:33], v[4:5], off
	v_add_co_u32 v36, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v37, vcc_lo, s3, v3, vcc_lo
	s_load_b128 s[0:3], s[0:1], 0x0
	global_load_b64 v[2:3], v[36:37], off
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v9, s1 :: v_dual_mov_b32 v10, s2
	v_dual_mov_b32 v11, s3 :: v_dual_mov_b32 v8, s0
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v34, 2, v34
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v33, 2, v33
	v_dual_mov_b32 v5, v35 :: v_dual_mov_b32 v6, v32
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v4, v34 :: v_dual_mov_b32 v7, v33
	s_swappc_b64 s[30:31], s[8:9]
	s_mov_b32 s0, 0
	s_mov_b32 s1, exec_lo
	v_cmpx_lt_i32_e32 2, v0
	s_xor_b32 s1, exec_lo, s1
; %bb.1:
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr35
                                        ; implicit-def: $vgpr34
; %bb.2:                                ; %Flow
	s_and_not1_saveexec_b32 s1, s1
; %bb.3:                                ; %LeafBlock
	v_cmp_eq_u32_e32 vcc_lo, 2, v0
	v_dual_mov_b32 v33, v35 :: v_dual_mov_b32 v32, v34
	s_and_not1_b32 s0, s0, exec_lo
	s_and_b32 s2, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s0, s0, s2
; %bb.4:                                ; %Flow82
	s_or_b32 exec_lo, exec_lo, s1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_6
; %bb.5:                                ; %.sink.split
	global_store_b64 v[36:37], v[32:33], off
.LBB2_6:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15RandomSearchGPUPdS_Piiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 40
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 38
		.amdhsa_next_free_sgpr 33
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z15RandomSearchGPUPdS_Piiiii, .Lfunc_end2-_Z15RandomSearchGPUPdS_Piiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 364
; NumSgprs: 35
; NumVgprs: 38
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 35
; NumVGPRsForWavesPerEU: 38
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z5baoliPdS_PiiiiiS_    ; -- Begin function _Z5baoliPdS_PiiiiiS_
	.globl	_Z5baoliPdS_PiiiiiS_
	.p2align	8
	.type	_Z5baoliPdS_PiiiiiS_,@function
_Z5baoliPdS_PiiiiiS_:                   ; @_Z5baoliPdS_PiiiiiS_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x18
	s_load_b64 s[2:3], s[0:1], 0x28
	v_bfe_u32 v7, v0, 10, 10
	v_dual_mov_b32 v11, 0 :: v_dual_and_b32 v4, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v7, s5, v[4:5]
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[0:1], 3, v[5:6]
	v_max_i32_e32 v6, 3, v7
	v_max_i32_e32 v7, 3, v4
	v_lshlrev_b32_e32 v4, 1, v5
	v_add_nc_u32_e32 v8, 3, v6
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s4, v8
	v_ashrrev_i32_e32 v5, 31, v4
	global_load_b64 v[2:3], v[0:1], off
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_add_i32 s0, s5, -4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v6, s0, v6 :: v_dual_add_nc_u32 v9, 3, v7
	s_add_i32 s0, s4, -4
	s_mul_i32 s1, s5, 3
	s_mov_b32 s4, 0
	v_cmp_gt_i32_e32 vcc_lo, s5, v9
	v_add_nc_u32_e32 v9, -3, v6
	v_cndmask_b32_e32 v7, s0, v7, vcc_lo
	s_add_i32 s0, s6, -4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v6, v7, 1, v7
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_mad_u64_u32 v[4:5], null, s1, v9, v[6:7]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s2, v7
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v8, vcc_lo
	v_mov_b32_e32 v7, 1
	s_add_i32 s2, s7, -4
	s_mul_i32 s3, s7, 3
.LBB3_1:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_2 Depth 2
                                        ;       Child Loop BB3_3 Depth 3
                                        ;         Child Loop BB3_4 Depth 4
	s_max_i32 s5, s4, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s12, s5, 3
	s_cmp_lt_i32 s12, s6
	s_mov_b32 s12, 0
	s_cselect_b32 s5, s5, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s5, s5, -3
	s_mul_i32 s5, s3, s5
.LBB3_2:                                ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_3 Depth 3
                                        ;         Child Loop BB3_4 Depth 4
	s_max_i32 s13, s12, 3
	v_mov_b32_e32 v8, 0
	s_add_i32 s14, s13, 3
	v_dual_mov_b32 v9, 0 :: v_dual_mov_b32 v10, v4
	s_cmp_lt_i32 s14, s7
	s_mov_b32 s14, -3
	s_cselect_b32 s13, s13, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s13, s13, 3
	s_add_i32 s13, s5, s13
.LBB3_3:                                ; %.preheader.i
                                        ;   Parent Loop BB3_1 Depth=1
                                        ;     Parent Loop BB3_2 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB3_4 Depth 4
	s_mov_b32 s15, -9
.LBB3_4:                                ;   Parent Loop BB3_1 Depth=1
                                        ;     Parent Loop BB3_2 Depth=2
                                        ;       Parent Loop BB3_3 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v12, s15, v10
	s_add_i32 s16, s13, s15
	s_ashr_i32 s17, s16, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[16:17], s[16:17], 3
	v_ashrrev_i32_e32 v13, 31, v12
	s_add_u32 s16, s10, s16
	s_addc_u32 s17, s11, s17
	s_add_i32 s15, s15, 3
	global_load_b64 v[20:21], v11, s[16:17] offset:16
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	s_cmp_eq_u32 s15, 12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v22, vcc_lo, s8, v12
	v_add_co_ci_u32_e32 v23, vcc_lo, s9, v13, vcc_lo
	global_load_b128 v[12:15], v11, s[16:17]
	s_clause 0x1
	global_load_b128 v[16:19], v[22:23], off
	global_load_b64 v[22:23], v[22:23], off offset:16
	s_waitcnt vmcnt(1)
	v_add_f64 v[14:15], v[14:15], -v[18:19]
	v_add_f64 v[12:13], v[12:13], -v[16:17]
	s_waitcnt vmcnt(0)
	v_add_f64 v[16:17], v[20:21], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[14:15], v[14:15], v[14:15]
	v_fma_f64 v[12:13], v[12:13], v[12:13], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[16:17], v[16:17], v[12:13]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[12:13]
	v_cndmask_b32_e64 v14, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v14, 8, v14
	v_ldexp_f64 v[12:13], v[12:13], v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[14:15], v[12:13]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[16:17], v[12:13], v[14:15]
	v_mul_f64 v[14:15], v[14:15], 0.5
	v_fma_f64 v[18:19], -v[14:15], v[16:17], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[16:17], v[18:19], v[16:17]
	v_fma_f64 v[14:15], v[14:15], v[18:19], v[14:15]
	v_fma_f64 v[18:19], -v[16:17], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[18:19], v[14:15], v[16:17]
	v_fma_f64 v[18:19], -v[16:17], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[18:19], v[14:15], v[16:17]
	v_cndmask_b32_e64 v16, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[12:13], 0x260
	v_ldexp_f64 v[14:15], v[14:15], v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v15, v13 :: v_dual_cndmask_b32 v12, v14, v12
	v_add_f64 v[8:9], v[8:9], v[12:13]
	s_cbranch_scc0 .LBB3_4
; %bb.5:                                ;   in Loop: Header=BB3_3 Depth=3
	v_add_nc_u32_e32 v10, s1, v10
	s_add_i32 s14, s14, 1
	s_add_i32 s13, s13, s3
	s_cmp_eq_u32 s14, 4
	s_cbranch_scc0 .LBB3_3
; %bb.6:                                ; %_Z12calcDistanceiiiiPdS_iiii.exit
                                        ;   in Loop: Header=BB3_2 Depth=2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v8, v[8:9]
	s_mov_b32 s13, exec_lo
	v_cvt_f64_f32_e32 v[9:10], v8
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_f64_e32 v[2:3], v[9:10]
	s_cbranch_execz .LBB3_8
; %bb.7:                                ;   in Loop: Header=BB3_2 Depth=2
	v_mov_b32_e32 v2, v9
	v_dual_mov_b32 v8, v7 :: v_dual_mov_b32 v3, v10
	global_store_b64 v[5:6], v[7:8], off
	global_store_b64 v[0:1], v[9:10], off
.LBB3_8:                                ;   in Loop: Header=BB3_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s13
	s_add_i32 s12, s12, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s12, 12
	s_cbranch_scc0 .LBB3_2
; %bb.9:                                ;   in Loop: Header=BB3_1 Depth=1
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s4, 12
	s_cbranch_scc0 .LBB3_1
; %bb.10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5baoliPdS_PiiiiiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 48
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z5baoliPdS_PiiiiiS_, .Lfunc_end3-_Z5baoliPdS_PiiiiiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 804
; NumSgprs: 20
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 40
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14PropagationGPUPdS_Piiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     35
    .sgpr_spill_count: 0
    .symbol:         _Z14PropagationGPUPdS_Piiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     40
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 40
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15RandomSearchGPUPdS_Piiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     35
    .sgpr_spill_count: 0
    .symbol:         _Z15RandomSearchGPUPdS_Piiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     38
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 48
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5baoliPdS_PiiiiiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z5baoliPdS_PiiiiiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     24
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
