#include <stdio.h>
#include <cuda.h>

#include "pnpoly.cu"

#ifndef grid_size_x
    #define grid_size_x 1
#endif
#ifndef grid_size_y
    #define grid_size_y 1
#endif

/*
 * This function contains the host code for benchmarking the cn_pnpoly CUDA kernel
 * Including the time spent on data transfers between host and device memory
 *
 * This host code uses device mapped host memory to overlap communication
 * between host and device with kernel execution on the GPU. Because each input
 * is read only once and each output is written only once, this implementation
 * almost fully overlaps all communication and the kernel execution time dominates
 * the total execution time.
 *
 * The code has the option to precompute all polygon line slopes on the CPU and
 * reuse those results on the GPU, instead of recomputing them on the GPU all
 * the time. The time spent on precomputing these values on the CPU is also 
 * taken into account by the time measurement in the code below. 
 *
 * This code was written for use with the Kernel Tuner. See: 
 *      https://github.com/benvanwerkhoven/kernel_tuner
 *
 * Author: Ben van Werkhoven <b.vanwerkhoven@esciencecenter.nl>
 */
extern "C" float cn_pnpoly_host(int* bitmap, float2* points, float2* vertices, int n) {

    cudaError_t err;

    #if use_precomputed_slopes == 1
    float *h_slopes;
    err = cudaHostAlloc((void **)&h_slopes, VERTICES*sizeof(float), cudaHostAllocMapped);
    if (err != cudaSuccess) {
        fprintf(stderr, "Error in cudaHostAlloc: %s\n", cudaGetErrorString(err));
    }
    #endif

    //create CUDA streams and events
    cudaStream_t stream[1];
    err = cudaStreamCreate(&stream[0]);
    if (err != cudaSuccess) {
        fprintf(stderr, "Error in cudaStreamCreate: %s\n", cudaGetErrorString(err));
    }
    cudaEvent_t start;
    err = cudaEventCreate(&start);
    if (err != cudaSuccess) {
        fprintf(stderr, "Error in cudaEventCreate: %s\n", cudaGetErrorString(err));
    }

    cudaEvent_t stop;
    err = cudaEventCreate(&stop);
    if (err != cudaSuccess) {
        fprintf(stderr, "Error in cudaEventCreate: %s\n", cudaGetErrorString(err));
    }

    //kernel parameters
    dim3 threads(block_size_x, block_size_y, block_size_z);
    dim3 grid(grid_size_x, grid_size_y);

    //start measuring time
    cudaDeviceSynchronize();
    cudaEventRecord(start, stream[0]);

    //transfer vertices to d_vertices
    err = cudaMemcpyToSymbolAsync(d_vertices, vertices, VERTICES*sizeof(float2), 0, cudaMemcpyHostToDevice, stream[0]);
    if (err != cudaSuccess) {
        fprintf(stderr, "Error in cudaMemcpyToSymbolAsync: %s\n", cudaGetErrorString(err));
    }

    #if use_precomputed_slopes == 1
    //precompute the slopes and transfer to symbol d_slopes
    h_slopes[0] = (vertices[VERTICES-1].x - vertices[0].x) / (vertices[VERTICES-1].y - vertices[0].y);
    for (int i=1; i<VERTICES; i++) {
        h_slopes[i] = (vertices[i-1].x - vertices[i].x) / (vertices[i-1].y - vertices[i].y);
    }
    err = cudaMemcpyToSymbolAsync(d_slopes, h_slopes, VERTICES*sizeof(float), 0, cudaMemcpyHostToDevice, stream[0]);
    if (err != cudaSuccess) {
        fprintf(stderr, "Error in cudaMemcpyToSymbolAsync: %s\n", cudaGetErrorString(err));
    }
    #endif

    //call the kernel
    cn_pnpoly<<<grid, threads, 0, stream[0]>>>(bitmap, points, n);  //using mapped memory

    //stop time measurement
    cudaEventRecord(stop, stream[0]);
    cudaDeviceSynchronize();
    float time = 0.0;
    cudaEventElapsedTime(&time, start, stop);

    //cleanup
    #if use_precomputed_slopes == 1
    cudaFreeHost(h_slopes);
    #endif
    cudaStreamDestroy(stream[0]);
    cudaEventDestroy(start);
    cudaEventDestroy(stop);

    cudaDeviceSynchronize();
    err = cudaGetLastError();
    if (err != cudaSuccess) {
        const char *error_string = cudaGetErrorString(err);
        if (strncmp("too many resources requested for launch", error_string, 10) == 0) {
            time = -1.0;
        } else {
            fprintf(stderr, "Error after CUDA kernel: %s\n", error_string);
            exit(1);
        }
    }

    return time; //ms
}

	.file	"tmpxft_002b30f5_00000000-6_pnpoly_host.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z37__device_stub__Z9cn_pnpolyPiP6float2iPiP6float2i
	.type	_Z37__device_stub__Z9cn_pnpolyPiP6float2iPiP6float2i, @function
_Z37__device_stub__Z9cn_pnpolyPiP6float2iPiP6float2i:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9cn_pnpolyPiP6float2i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z37__device_stub__Z9cn_pnpolyPiP6float2iPiP6float2i, .-_Z37__device_stub__Z9cn_pnpolyPiP6float2iPiP6float2i
	.globl	_Z9cn_pnpolyPiP6float2i
	.type	_Z9cn_pnpolyPiP6float2i, @function
_Z9cn_pnpolyPiP6float2i:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z9cn_pnpolyPiP6float2iPiP6float2i
	.cfi_endproc
.LFE2054:
	.size	_Z9cn_pnpolyPiP6float2i, .-_Z9cn_pnpolyPiP6float2i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Error in cudaStreamCreate: %s\n"
.LC1:
	.string	"Error in cudaEventCreate: %s\n"
.LC2:
	.string	"Error in cudaMemcpyToSymbolAsync: %s\n"
.LC4:
	.string	"too many resources requested for launch"
.LC6:
	.string	"Error after CUDA kernel: %s\n"
	.text
	.globl	cn_pnpoly_host
	.type	cn_pnpoly_host, @function
cn_pnpoly_host:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%ecx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	48(%rsp), %rdi
	call	cudaStreamCreate@PLT
	testl	%eax, %eax
	je	.L9
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L9:
	leaq	8(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L10
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L10:
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L11
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L11:
	movl	$16777217, %eax
	movl	$1, 32(%rsp)
	salq	$8, %rax
	movl	$1, 44(%rsp)
	movq	%rax, 24(%rsp)
	subq	$255, %rax
	movq	%rax, 36(%rsp)
	call	cudaDeviceSynchronize@PLT
	movq	48(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	cudaEventRecord@PLT
	movq	48(%rsp), %r9
	xorl	%ecx, %ecx
	movq	%r13, %rsi
	leaq	_ZL10d_vertices(%rip), %rdi
	movl	$1, %r8d
	movl	$4800, %edx
	call	cudaMemcpyToSymbolAsync@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L12
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L12:
	movl	32(%rsp), %ecx
	movq	48(%rsp), %r9
	xorl	%r8d, %r8d
	movq	24(%rsp), %rdx
	movq	36(%rsp), %rdi
	movl	44(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_Z37__device_stub__Z9cn_pnpolyPiP6float2iPiP6float2i
.L13:
	movq	48(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	cudaEventRecord@PLT
	call	cudaDeviceSynchronize@PLT
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	leaq	4(%rsp), %rdi
	movl	$0x00000000, 4(%rsp)
	call	cudaEventElapsedTime@PLT
	movq	48(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movq	8(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	16(%rsp), %rdi
	call	cudaEventDestroy@PLT
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L14
	call	cudaGetErrorString@PLT
	movl	$10, %edx
	leaq	.LC4(%rip), %rdi
	movq	%rax, %rsi
	movq	%rax, %rbx
	call	strncmp@PLT
	testl	%eax, %eax
	jne	.L15
	movl	$0xbf800000, 4(%rsp)
	jmp	.L14
.L15:
	movq	stderr(%rip), %rdi
	movq	%rbx, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rdx
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L14:
	movss	4(%rsp), %xmm0
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	cn_pnpoly_host, .-cn_pnpoly_host
	.globl	_Z44__device_stub__Z15cn_pnpoly_naivePiP6float2iPiP6float2i
	.type	_Z44__device_stub__Z15cn_pnpoly_naivePiP6float2iPiP6float2i, @function
_Z44__device_stub__Z15cn_pnpoly_naivePiP6float2iPiP6float2i:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15cn_pnpoly_naivePiP6float2i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L33:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z44__device_stub__Z15cn_pnpoly_naivePiP6float2iPiP6float2i, .-_Z44__device_stub__Z15cn_pnpoly_naivePiP6float2iPiP6float2i
	.globl	_Z15cn_pnpoly_naivePiP6float2i
	.type	_Z15cn_pnpoly_naivePiP6float2i, @function
_Z15cn_pnpoly_naivePiP6float2i:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z15cn_pnpoly_naivePiP6float2iPiP6float2i
	.cfi_endproc
.LFE2056:
	.size	_Z15cn_pnpoly_naivePiP6float2i, .-_Z15cn_pnpoly_naivePiP6float2i
	.section	.rodata.str1.1
.LC7:
	.string	"_Z15cn_pnpoly_naivePiP6float2i"
.LC8:
	.string	"_Z9cn_pnpolyPiP6float2i"
.LC9:
	.string	"d_vertices"
.LC10:
	.string	"d_slopes"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15cn_pnpoly_naivePiP6float2i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9cn_pnpolyPiP6float2i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	movl	$4800, %r9d
	leaq	_ZL10d_vertices(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2400, %r9d
	leaq	_ZL8d_slopes(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL8d_slopes
	.comm	_ZL8d_slopes,2400,32
	.local	_ZL10d_vertices
	.comm	_ZL10d_vertices,4800,32
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>

#include "pnpoly.cu"

#ifndef grid_size_x
    #define grid_size_x 1
#endif
#ifndef grid_size_y
    #define grid_size_y 1
#endif

/*
 * This function contains the host code for benchmarking the cn_pnpoly CUDA kernel
 * Including the time spent on data transfers between host and device memory
 *
 * This host code uses device mapped host memory to overlap communication
 * between host and device with kernel execution on the GPU. Because each input
 * is read only once and each output is written only once, this implementation
 * almost fully overlaps all communication and the kernel execution time dominates
 * the total execution time.
 *
 * The code has the option to precompute all polygon line slopes on the CPU and
 * reuse those results on the GPU, instead of recomputing them on the GPU all
 * the time. The time spent on precomputing these values on the CPU is also 
 * taken into account by the time measurement in the code below. 
 *
 * This code was written for use with the Kernel Tuner. See: 
 *      https://github.com/benvanwerkhoven/kernel_tuner
 *
 * Author: Ben van Werkhoven <b.vanwerkhoven@esciencecenter.nl>
 */
extern "C" float cn_pnpoly_host(int* bitmap, float2* points, float2* vertices, int n) {

    hipError_t err;

    #if use_precomputed_slopes == 1
    float *h_slopes;
    err = hipHostAlloc((void **)&h_slopes, VERTICES*sizeof(float), hipHostMallocMapped);
    if (err != hipSuccess) {
        fprintf(stderr, "Error in cudaHostAlloc: %s\n", hipGetErrorString(err));
    }
    #endif

    //create CUDA streams and events
    hipStream_t stream[1];
    err = hipStreamCreate(&stream[0]);
    if (err != hipSuccess) {
        fprintf(stderr, "Error in cudaStreamCreate: %s\n", hipGetErrorString(err));
    }
    hipEvent_t start;
    err = hipEventCreate(&start);
    if (err != hipSuccess) {
        fprintf(stderr, "Error in cudaEventCreate: %s\n", hipGetErrorString(err));
    }

    hipEvent_t stop;
    err = hipEventCreate(&stop);
    if (err != hipSuccess) {
        fprintf(stderr, "Error in cudaEventCreate: %s\n", hipGetErrorString(err));
    }

    //kernel parameters
    dim3 threads(block_size_x, block_size_y, block_size_z);
    dim3 grid(grid_size_x, grid_size_y);

    //start measuring time
    hipDeviceSynchronize();
    hipEventRecord(start, stream[0]);

    //transfer vertices to d_vertices
    err = hipMemcpyToSymbolAsync(HIP_SYMBOL(d_vertices), vertices, VERTICES*sizeof(float2), 0, hipMemcpyHostToDevice, stream[0]);
    if (err != hipSuccess) {
        fprintf(stderr, "Error in cudaMemcpyToSymbolAsync: %s\n", hipGetErrorString(err));
    }

    #if use_precomputed_slopes == 1
    //precompute the slopes and transfer to symbol d_slopes
    h_slopes[0] = (vertices[VERTICES-1].x - vertices[0].x) / (vertices[VERTICES-1].y - vertices[0].y);
    for (int i=1; i<VERTICES; i++) {
        h_slopes[i] = (vertices[i-1].x - vertices[i].x) / (vertices[i-1].y - vertices[i].y);
    }
    err = hipMemcpyToSymbolAsync(HIP_SYMBOL(d_slopes), h_slopes, VERTICES*sizeof(float), 0, hipMemcpyHostToDevice, stream[0]);
    if (err != hipSuccess) {
        fprintf(stderr, "Error in cudaMemcpyToSymbolAsync: %s\n", hipGetErrorString(err));
    }
    #endif

    //call the kernel
    cn_pnpoly<<<grid, threads, 0, stream[0]>>>(bitmap, points, n);  //using mapped memory

    //stop time measurement
    hipEventRecord(stop, stream[0]);
    hipDeviceSynchronize();
    float time = 0.0;
    hipEventElapsedTime(&time, start, stop);

    //cleanup
    #if use_precomputed_slopes == 1
    hipHostFree(h_slopes);
    #endif
    hipStreamDestroy(stream[0]);
    hipEventDestroy(start);
    hipEventDestroy(stop);

    hipDeviceSynchronize();
    err = hipGetLastError();
    if (err != hipSuccess) {
        const char *error_string = hipGetErrorString(err);
        if (strncmp("too many resources requested for launch", error_string, 10) == 0) {
            time = -1.0;
        } else {
            fprintf(stderr, "Error after CUDA kernel: %s\n", error_string);
            exit(1);
        }
    }

    return time; //ms
}

	.text
	.file	"pnpoly_host.hip"
	.globl	_Z24__device_stub__cn_pnpolyPiP15HIP_vector_typeIfLj2EEi # -- Begin function _Z24__device_stub__cn_pnpolyPiP15HIP_vector_typeIfLj2EEi
	.type	_Z24__device_stub__cn_pnpolyPiP15HIP_vector_typeIfLj2EEi,@function
_Z24__device_stub__cn_pnpolyPiP15HIP_vector_typeIfLj2EEi: # @_Z24__device_stub__cn_pnpolyPiP15HIP_vector_typeIfLj2EEi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__cn_pnpolyPiP15HIP_vector_typeIfLj2EEi, .Lfunc_end0-_Z24__device_stub__cn_pnpolyPiP15HIP_vector_typeIfLj2EEi
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi # -- Begin function _Z30__device_stub__cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi
	.type	_Z30__device_stub__cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi,@function
_Z30__device_stub__cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi: # @_Z30__device_stub__cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z30__device_stub__cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi, .Lfunc_end1-_Z30__device_stub__cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function cn_pnpoly_host
.LCPI2_0:
	.long	0xbf800000                      # float -1
	.text
	.globl	cn_pnpoly_host
	.type	cn_pnpoly_host,@function
cn_pnpoly_host:                         # @cn_pnpoly_host
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%ecx, %ebx
	movq	%rdx, %r12
	movq	%rsi, %r14
	movq	%rdi, %r15
	movq	%rsp, %rdi
	callq	hipStreamCreate
	testl	%eax, %eax
	jne	.LBB2_1
.LBB2_2:
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB2_3
.LBB2_4:
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB2_5
.LBB2_6:
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rdi
	movq	(%rsp), %rsi
	callq	hipEventRecord
	movq	(%rsp), %r9
	movl	$d_vertices, %edi
	movl	$4800, %edx                     # imm = 0x12C0
	movq	%r12, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbolAsync
	testl	%eax, %eax
	jne	.LBB2_7
.LBB2_8:
	movq	(%rsp), %r9
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	255(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.9:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z24__device_stub__cn_pnpolyPiP15HIP_vector_typeIfLj2EEi
.LBB2_10:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	callq	hipEventRecord
	callq	hipDeviceSynchronize
	leaq	28(%rsp), %rdi
	movl	$0, (%rdi)
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	hipEventElapsedTime
	movq	(%rsp), %rdi
	callq	hipStreamDestroy
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB2_11
# %bb.12:
	movl	%eax, %edi
	callq	hipGetErrorString
	movq	%rax, %rbx
	movl	$.L.str.3, %edi
	movl	$10, %edx
	movq	%rax, %rsi
	callq	strncmp
	testl	%eax, %eax
	jne	.LBB2_15
# %bb.13:
	movss	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	jmp	.LBB2_14
.LBB2_11:                               # %._crit_edge
	movss	28(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
.LBB2_14:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB2_1:
	.cfi_def_cfa_offset 80
	movq	stderr(%rip), %r13
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movq	%r13, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_2
.LBB2_3:
	movq	stderr(%rip), %r13
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movq	%r13, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_4
.LBB2_5:
	movq	stderr(%rip), %r13
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movq	%r13, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_6
.LBB2_7:
	movq	stderr(%rip), %r12
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%r12, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_8
.LBB2_15:
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	cn_pnpoly_host, .Lfunc_end2-cn_pnpoly_host
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$d_vertices, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$4800, %r9d                     # imm = 0x12C0
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$d_slopes, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movl	$2400, %r9d                     # imm = 0x960
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	d_vertices,@object              # @d_vertices
	.local	d_vertices
	.comm	d_vertices,4800,16
	.type	d_slopes,@object                # @d_slopes
	.local	d_slopes
	.comm	d_slopes,2400,16
	.type	_Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi,@object # @_Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi
	.section	.rodata,"a",@progbits
	.globl	_Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi
	.p2align	3, 0x0
_Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi:
	.quad	_Z24__device_stub__cn_pnpolyPiP15HIP_vector_typeIfLj2EEi
	.size	_Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi, 8

	.type	_Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi,@object # @_Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi
	.globl	_Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi
	.p2align	3, 0x0
_Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi:
	.quad	_Z30__device_stub__cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi
	.size	_Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error in cudaStreamCreate: %s\n"
	.size	.L.str, 31

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Error in cudaEventCreate: %s\n"
	.size	.L.str.1, 30

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Error in cudaMemcpyToSymbolAsync: %s\n"
	.size	.L.str.2, 38

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"too many resources requested for launch"
	.size	.L.str.3, 40

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Error after CUDA kernel: %s\n"
	.size	.L.str.4, 29

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi"
	.size	.L__unnamed_1, 41

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi"
	.size	.L__unnamed_2, 48

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"d_vertices"
	.size	.L__unnamed_3, 11

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"d_slopes"
	.size	.L__unnamed_4, 9

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__cn_pnpolyPiP15HIP_vector_typeIfLj2EEi
	.addrsig_sym _Z30__device_stub__cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym d_vertices
	.addrsig_sym d_slopes
	.addrsig_sym _Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi
	.addrsig_sym _Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi ; -- Begin function _Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi
	.globl	_Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi
	.p2align	8
	.type	_Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi,@function
_Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi: ; @_Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x10
	v_lshl_add_u32 v0, s15, 8, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_9
; %bb.1:                                ; %.critedge
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_vertices@rel32@lo+4800
	s_addc_u32 s1, s1, d_vertices@rel32@hi+4808
	v_mov_b32_e32 v4, 0
	s_load_b32 s11, s[0:1], 0x0
	s_mov_b32 s3, 0
	v_lshlrev_b64 v[2:3], 3, v[0:1]
	s_movk_i32 s2, 0x257
	s_mov_b32 s1, s3
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_mov_b64 s[6:7], 4
	global_load_b64 v[2:3], v[2:3], off
.LBB0_2:                                ; %.critedge50
                                        ; =>This Inner Loop Header: Depth=1
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, d_vertices@rel32@lo+4
	s_addc_u32 s9, s9, d_vertices@rel32@hi+12
	s_add_u32 s12, s6, s8
	s_addc_u32 s13, s7, s9
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f32_e64 s0, s11, v3
	s_load_b32 s10, s[12:13], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, s10, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s0, vcc_lo, s0
	s_xor_b32 s12, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s12
	s_cbranch_execz .LBB0_6
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	s_lshl_b64 s[12:13], s[2:3], 3
	v_sub_f32_e64 v5, s11, s10
	s_add_u32 s8, s12, s8
	s_addc_u32 s9, s13, s9
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, d_vertices@rel32@lo
	s_addc_u32 s13, s13, d_vertices@rel32@hi+8
	s_add_u32 s12, s6, s12
	s_addc_u32 s13, s7, s13
	s_clause 0x1
	s_load_b32 s2, s[8:9], 0x0
	s_load_b32 s8, s[12:13], 0x0
	s_waitcnt lgkmcnt(0)
	v_sub_f32_e64 v6, s2, s8
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v7, null, v5, v5, v6
	v_div_scale_f32 v10, vcc_lo, v6, v5, v6
	v_rcp_f32_e32 v8, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v7, v8, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v9, v8
	v_mul_f32_e32 v9, v10, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, -v7, v9, v10
	v_fmac_f32_e32 v9, v11, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, -v7, v9, v10
	v_div_fmas_f32 v7, v7, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v5, v7, v5, v6
	v_subrev_f32_e32 v6, s10, v3
	v_fma_f32 v5, v6, v5, s8
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_f32_e32 v2, v5
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 0, v4
	v_cndmask_b32_e64 v4, 0, 1, vcc_lo
; %bb.5:                                ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_6:                                ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s0, s1, 1
	s_add_u32 s6, s6, 8
	s_addc_u32 s7, s7, 0
	s_cmpk_lg_i32 s6, 0x12c4
	s_cbranch_scc0 .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s11, s10
	s_mov_b32 s2, s1
	s_mov_b32 s1, s0
	s_branch .LBB0_2
.LBB0_8:                                ; %.critedge52
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
.LBB0_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi, .Lfunc_end0-_Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 516
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi ; -- Begin function _Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi
	.globl	_Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi
	.p2align	8
	.type	_Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi,@function
_Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi: ; @_Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB1_9
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_vertices@rel32@lo+4800
	s_addc_u32 s1, s1, d_vertices@rel32@hi+4808
	v_mov_b32_e32 v0, 0
	s_load_b32 s11, s[0:1], 0x0
	s_mov_b32 s3, 0
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	s_movk_i32 s2, 0x257
	s_mov_b32 s1, s3
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	s_mov_b64 s[6:7], 4
	global_load_b64 v[3:4], v[3:4], off
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, d_vertices@rel32@lo+4
	s_addc_u32 s9, s9, d_vertices@rel32@hi+12
	s_add_u32 s12, s6, s8
	s_addc_u32 s13, s7, s9
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f32_e64 s0, s11, v4
	s_load_b32 s10, s[12:13], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, s10, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s0, vcc_lo, s0
	s_xor_b32 s12, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s12
	s_cbranch_execz .LBB1_6
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	s_lshl_b64 s[12:13], s[2:3], 3
	v_sub_f32_e64 v5, s11, s10
	s_add_u32 s8, s12, s8
	s_addc_u32 s9, s13, s9
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, d_vertices@rel32@lo
	s_addc_u32 s13, s13, d_vertices@rel32@hi+8
	s_add_u32 s12, s6, s12
	s_addc_u32 s13, s7, s13
	s_clause 0x1
	s_load_b32 s2, s[8:9], 0x0
	s_load_b32 s8, s[12:13], 0x0
	s_waitcnt lgkmcnt(0)
	v_sub_f32_e64 v6, s2, s8
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v7, null, v5, v5, v6
	v_div_scale_f32 v10, vcc_lo, v6, v5, v6
	v_rcp_f32_e32 v8, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v7, v8, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v9, v8
	v_mul_f32_e32 v9, v10, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, -v7, v9, v10
	v_fmac_f32_e32 v9, v11, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, -v7, v9, v10
	v_div_fmas_f32 v7, v7, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v5, v7, v5, v6
	v_subrev_f32_e32 v6, s10, v4
	v_fma_f32 v5, v6, v5, s8
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_f32_e32 v3, v5
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	v_cndmask_b32_e64 v0, 0, 1, vcc_lo
; %bb.5:                                ; %Flow
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_6:                                ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s0, s1, 1
	s_add_u32 s6, s6, 8
	s_addc_u32 s7, s7, 0
	s_cmpk_eq_i32 s6, 0x12c4
	s_cbranch_scc1 .LBB1_8
; %bb.7:                                ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s11, s10
	s_mov_b32 s2, s1
	s_mov_b32 s1, s0
	s_branch .LBB1_2
.LBB1_8:
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB1_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi, .Lfunc_end1-_Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 540
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	d_vertices              ; @d_vertices
	.type	d_vertices,@object
	.section	.bss,"aw",@nobits
	.globl	d_vertices
	.p2align	4, 0x0
d_vertices:
	.zero	4800
	.size	d_vertices, 4800

	.protected	d_slopes                ; @d_slopes
	.type	d_slopes,@object
	.globl	d_slopes
	.p2align	4, 0x0
d_slopes:
	.zero	2400
	.size	d_slopes, 2400

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym d_vertices
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9cn_pnpolyPiP15HIP_vector_typeIfLj2EEi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15cn_pnpoly_naivePiP15HIP_vector_typeIfLj2EEi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
