#include <stdbool.h>
#include <stdio.h>
#include <string.h>
#include <getopt.h>
#include <curand_kernel.h>
#include <stdlib.h>
#include <cuda.h>
#include <sys/time.h>
#include "Overlay_Cuda.cu"
#include<chrono>
#include<iostream>
using namespace std;
using namespace std::chrono;
int blocks_[20][2] = {{8,8},{16,16},{24,24},{32,32},{1,64},{1,128},{1,192},{1,256},{1,320},{1,384},{1,448},{1,512},{1,576},{1,640},{1,704},{1,768},{1,832},{1,896},{1,960},{1,1024}};
int matrices_[7][2] = {{240,240},{496,496},{784,784},{1016,1016},{1232,1232},{1680,1680},{2024,2024}};
int main(int argc, char **argv) {
cudaSetDevice(0);
char* p;int matrix_len=strtol(argv[1], &p, 10);
for(int matrix_looper=0;matrix_looper<matrix_len;matrix_looper++){
for(int block_looper=0;block_looper<20;block_looper++){
int XSIZE=matrices_[matrix_looper][0],YSIZE=matrices_[matrix_looper][1],BLOCKX=blocks_[block_looper][0],BLOCKY=blocks_[block_looper][1];
int x_position = 1;
int y_position = 1;
unsigned char *main = NULL;
cudaMalloc(&main, XSIZE*YSIZE);
int main_linesize = XSIZE*YSIZE;
unsigned char *overlay = NULL;
cudaMalloc(&overlay, XSIZE*YSIZE);
int overlay_linesize = XSIZE*YSIZE;
int overlay_w = 1;
int overlay_h = 1;
unsigned char *overlay_alpha = NULL;
cudaMalloc(&overlay_alpha, XSIZE*YSIZE);
int alpha_linesize = XSIZE*YSIZE;
int alpha_adj_x = 2;
int alpha_adj_y = 2;
int iXSIZE= XSIZE;
int iYSIZE= YSIZE;
while(iXSIZE%BLOCKX!=0)
{
iXSIZE++;
}
while(iYSIZE%BLOCKY!=0)
{
iYSIZE++;
}
dim3 gridBlock(iXSIZE/BLOCKX, iYSIZE/BLOCKY);
dim3 threadBlock(BLOCKX, BLOCKY);
cudaFree(0);
Overlay_Cuda<<<gridBlock,threadBlock>>>(x_position,y_position,main,main_linesize,overlay,overlay_linesize,overlay_w,overlay_h,overlay_alpha,alpha_linesize,alpha_adj_x,alpha_adj_y);
cudaDeviceSynchronize();
for (int loop_counter = 0; loop_counter < 10; ++loop_counter) {
Overlay_Cuda<<<gridBlock,threadBlock>>>(x_position,y_position,main,main_linesize,overlay,overlay_linesize,overlay_w,overlay_h,overlay_alpha,alpha_linesize,alpha_adj_x,alpha_adj_y);
}
auto start = steady_clock::now();
for (int loop_counter = 0; loop_counter < 1000; loop_counter++) {
Overlay_Cuda<<<gridBlock,threadBlock>>>(x_position,y_position,main,main_linesize,overlay,overlay_linesize,overlay_w,overlay_h,overlay_alpha,alpha_linesize,alpha_adj_x,alpha_adj_y);
}
auto end = steady_clock::now();
auto usecs = duration_cast<duration<float, microseconds::period> >(end - start);
cout <<'['<<usecs.count()<<','<<'('<<BLOCKX<<','<<BLOCKY<<')' << ','<<'('<<XSIZE<<','<<YSIZE<<')'<<']' << endl;
}
}}
	.file	"tmpxft_0028b4c8_00000000-6_main.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3954:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3954:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z45__device_stub__Z12Overlay_CudaiiPhiS_iiiS_iiiiiPhiS_iiiS_iii
	.type	_Z45__device_stub__Z12Overlay_CudaiiPhiS_iiiS_iiiiiPhiS_iiiS_iii, @function
_Z45__device_stub__Z12Overlay_CudaiiPhiS_iiiS_iiiiiPhiS_iiiS_iii:
.LFB3976:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	256(%rsp), %rax
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 32(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 28(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movl	%r9d, 24(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	264(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	272(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	280(%rsp), %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z12Overlay_CudaiiPhiS_iiiS_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 256
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L2:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3976:
	.size	_Z45__device_stub__Z12Overlay_CudaiiPhiS_iiiS_iiiiiPhiS_iiiS_iii, .-_Z45__device_stub__Z12Overlay_CudaiiPhiS_iiiS_iiiiiPhiS_iiiS_iii
	.globl	_Z12Overlay_CudaiiPhiS_iiiS_iii
	.type	_Z12Overlay_CudaiiPhiS_iiiS_iii, @function
_Z12Overlay_CudaiiPhiS_iiiS_iii:
.LFB3977:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z12Overlay_CudaiiPhiS_iiiS_iiiiiPhiS_iiiS_iii
	.cfi_endproc
.LFE3977:
	.size	_Z12Overlay_CudaiiPhiS_iiiS_iii, .-_Z12Overlay_CudaiiPhiS_iiiS_iii
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3948:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%edi, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	cudaSetDevice@PLT
	movq	8(%rbx), %rdi
	leaq	16(%rsp), %rsi
	movl	$10, %edx
	call	__isoc23_strtol@PLT
	movl	%eax, 8(%rsp)
.L9:
	cmpl	%ebp, 8(%rsp)
	jle	.L26
	leaq	blocks_(%rip), %r12
.L19:
	leaq	matrices_(%rip), %rax
	leaq	24(%rsp), %rdi
	movl	(%r12), %r13d
	movl	(%rax,%rbp,8), %eax
	movl	%eax, (%rsp)
	leaq	4+matrices_(%rip), %rax
	movl	(%rsp), %ebx
	movl	(%rax,%rbp,8), %r15d
	movl	4(%r12), %eax
	imull	%r15d, %ebx
	movl	%eax, 4(%rsp)
	xorl	%eax, %eax
	movq	%rax, 24(%rsp)
	movslq	%ebx, %r14
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	xorl	%edx, %edx
	leaq	32(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rdx, 32(%rsp)
	call	cudaMalloc@PLT
	xorl	%ecx, %ecx
	leaq	40(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rcx, 40(%rsp)
	call	cudaMalloc@PLT
	movl	(%rsp), %ecx
.L10:
	movl	%ecx, %eax
	cltd
	idivl	%r13d
	movl	%eax, %esi
	testl	%edx, %edx
	je	.L27
	incl	%ecx
	jmp	.L10
.L27:
	movl	%r15d, %ecx
.L12:
	movl	%ecx, %eax
	cltd
	idivl	4(%rsp)
	testl	%edx, %edx
	je	.L28
	incl	%ecx
	jmp	.L12
.L28:
	movl	%eax, 52(%rsp)
	movl	4(%rsp), %eax
	xorl	%edi, %edi
	movl	%esi, 48(%rsp)
	movl	$1, 56(%rsp)
	movl	%r13d, 60(%rsp)
	movl	%eax, 64(%rsp)
	movl	$1, 68(%rsp)
	call	cudaFree@PLT
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	$2
	.cfi_def_cfa_offset 152
	movl	%ebx, %r9d
	movl	%ebx, %ecx
	movl	$1, %esi
	pushq	$2
	.cfi_def_cfa_offset 160
	movl	$1, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 168
	pushq	64(%rsp)
	.cfi_def_cfa_offset 176
	pushq	$1
	.cfi_def_cfa_offset 184
	pushq	$1
	.cfi_def_cfa_offset 192
	movq	80(%rsp), %r8
	movq	72(%rsp), %rdx
	call	_Z45__device_stub__Z12Overlay_CudaiiPhiS_iiiS_iiiiiPhiS_iiiS_iii
	addq	$48, %rsp
	.cfi_def_cfa_offset 144
.L14:
	call	cudaDeviceSynchronize@PLT
	movl	$10, %r14d
.L16:
	movl	68(%rsp), %ecx
	movq	60(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	$2
	.cfi_def_cfa_offset 152
	movl	%ebx, %r9d
	movl	%ebx, %ecx
	movl	$1, %esi
	pushq	$2
	.cfi_def_cfa_offset 160
	movl	$1, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 168
	pushq	64(%rsp)
	.cfi_def_cfa_offset 176
	pushq	$1
	.cfi_def_cfa_offset 184
	pushq	$1
	.cfi_def_cfa_offset 192
	movq	80(%rsp), %r8
	movq	72(%rsp), %rdx
	call	_Z45__device_stub__Z12Overlay_CudaiiPhiS_iiiS_iiiiiPhiS_iiiS_iii
	addq	$48, %rsp
	.cfi_def_cfa_offset 144
.L15:
	decl	%r14d
	jne	.L16
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	movl	$1000, 12(%rsp)
	movq	%rax, %r14
.L18:
	movl	68(%rsp), %ecx
	movq	60(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	$2
	.cfi_def_cfa_offset 152
	movl	%ebx, %r9d
	movl	%ebx, %ecx
	movl	$1, %esi
	pushq	$2
	.cfi_def_cfa_offset 160
	movl	$1, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 168
	pushq	64(%rsp)
	.cfi_def_cfa_offset 176
	pushq	$1
	.cfi_def_cfa_offset 184
	pushq	$1
	.cfi_def_cfa_offset 192
	movq	80(%rsp), %r8
	movq	72(%rsp), %rdx
	call	_Z45__device_stub__Z12Overlay_CudaiiPhiS_iiiS_iiiiiPhiS_iiiS_iii
	addq	$48, %rsp
	.cfi_def_cfa_offset 144
.L17:
	decl	12(%rsp)
	jne	.L18
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	movl	$91, %esi
	leaq	_ZSt4cout(%rip), %rdi
	addq	$8, %r12
	subq	%r14, %rax
	cvtsi2ssq	%rax, %xmm0
	divss	.LC0(%rip), %xmm0
	movss	%xmm0, 12(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movss	12(%rsp), %xmm0
	movq	%rax, %rdi
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movl	$44, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	$40, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	%r13d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movl	$44, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	4(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movl	$41, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	$44, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	$40, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movl	$44, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	%r15d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movl	$41, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	$93, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	160+blocks_(%rip), %rax
	cmpq	%rax, %r12
	jne	.L19
	incq	%rbp
	jmp	.L9
.L26:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3948:
	.size	main, .-main
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"_Z12Overlay_CudaiiPhiS_iiiS_iii"
.LC2:
	.string	"precalc_xorwow_matrix"
.LC3:
	.string	"precalc_xorwow_offset_matrix"
.LC4:
	.string	"mrg32k3aM1"
.LC5:
	.string	"mrg32k3aM2"
.LC6:
	.string	"mrg32k3aM1SubSeq"
.LC7:
	.string	"mrg32k3aM2SubSeq"
.LC8:
	.string	"mrg32k3aM1Seq"
.LC9:
	.string	"mrg32k3aM2Seq"
.LC10:
	.string	"__cr_lgamma_table"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3979:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12Overlay_CudaiiPhiS_iiiS_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3979:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	matrices_
	.data
	.align 32
	.type	matrices_, @object
	.size	matrices_, 56
matrices_:
	.long	240
	.long	240
	.long	496
	.long	496
	.long	784
	.long	784
	.long	1016
	.long	1016
	.long	1232
	.long	1232
	.long	1680
	.long	1680
	.long	2024
	.long	2024
	.globl	blocks_
	.align 32
	.type	blocks_, @object
	.size	blocks_, 160
blocks_:
	.long	8
	.long	8
	.long	16
	.long	16
	.long	24
	.long	24
	.long	32
	.long	32
	.long	1
	.long	64
	.long	1
	.long	128
	.long	1
	.long	192
	.long	1
	.long	256
	.long	1
	.long	320
	.long	1
	.long	384
	.long	1
	.long	448
	.long	1
	.long	512
	.long	1
	.long	576
	.long	1
	.long	640
	.long	1
	.long	704
	.long	1
	.long	768
	.long	1
	.long	832
	.long	1
	.long	896
	.long	1
	.long	960
	.long	1
	.long	1024
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdbool.h>
#include <stdio.h>
#include <string.h>
#include <getopt.h>
#include <hiprand/hiprand_kernel.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <sys/time.h>
#include "Overlay_Cuda.cu"
#include<chrono>
#include<iostream>
using namespace std;
using namespace std::chrono;
int blocks_[20][2] = {{8,8},{16,16},{24,24},{32,32},{1,64},{1,128},{1,192},{1,256},{1,320},{1,384},{1,448},{1,512},{1,576},{1,640},{1,704},{1,768},{1,832},{1,896},{1,960},{1,1024}};
int matrices_[7][2] = {{240,240},{496,496},{784,784},{1016,1016},{1232,1232},{1680,1680},{2024,2024}};
int main(int argc, char **argv) {
hipSetDevice(0);
char* p;int matrix_len=strtol(argv[1], &p, 10);
for(int matrix_looper=0;matrix_looper<matrix_len;matrix_looper++){
for(int block_looper=0;block_looper<20;block_looper++){
int XSIZE=matrices_[matrix_looper][0],YSIZE=matrices_[matrix_looper][1],BLOCKX=blocks_[block_looper][0],BLOCKY=blocks_[block_looper][1];
int x_position = 1;
int y_position = 1;
unsigned char *main = NULL;
hipMalloc(&main, XSIZE*YSIZE);
int main_linesize = XSIZE*YSIZE;
unsigned char *overlay = NULL;
hipMalloc(&overlay, XSIZE*YSIZE);
int overlay_linesize = XSIZE*YSIZE;
int overlay_w = 1;
int overlay_h = 1;
unsigned char *overlay_alpha = NULL;
hipMalloc(&overlay_alpha, XSIZE*YSIZE);
int alpha_linesize = XSIZE*YSIZE;
int alpha_adj_x = 2;
int alpha_adj_y = 2;
int iXSIZE= XSIZE;
int iYSIZE= YSIZE;
while(iXSIZE%BLOCKX!=0)
{
iXSIZE++;
}
while(iYSIZE%BLOCKY!=0)
{
iYSIZE++;
}
dim3 gridBlock(iXSIZE/BLOCKX, iYSIZE/BLOCKY);
dim3 threadBlock(BLOCKX, BLOCKY);
hipFree(0);
Overlay_Cuda<<<gridBlock,threadBlock>>>(x_position,y_position,main,main_linesize,overlay,overlay_linesize,overlay_w,overlay_h,overlay_alpha,alpha_linesize,alpha_adj_x,alpha_adj_y);
hipDeviceSynchronize();
for (int loop_counter = 0; loop_counter < 10; ++loop_counter) {
Overlay_Cuda<<<gridBlock,threadBlock>>>(x_position,y_position,main,main_linesize,overlay,overlay_linesize,overlay_w,overlay_h,overlay_alpha,alpha_linesize,alpha_adj_x,alpha_adj_y);
}
auto start = steady_clock::now();
for (int loop_counter = 0; loop_counter < 1000; loop_counter++) {
Overlay_Cuda<<<gridBlock,threadBlock>>>(x_position,y_position,main,main_linesize,overlay,overlay_linesize,overlay_w,overlay_h,overlay_alpha,alpha_linesize,alpha_adj_x,alpha_adj_y);
}
auto end = steady_clock::now();
auto usecs = duration_cast<duration<float, microseconds::period> >(end - start);
cout <<'['<<usecs.count()<<','<<'('<<BLOCKX<<','<<BLOCKY<<')' << ','<<'('<<XSIZE<<','<<YSIZE<<')'<<']' << endl;
}
}}
	.text
	.file	"main.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z27__device_stub__Overlay_CudaiiPhiS_iiiS_iii # -- Begin function _Z27__device_stub__Overlay_CudaiiPhiS_iiiS_iii
	.type	_Z27__device_stub__Overlay_CudaiiPhiS_iiiS_iii,@function
_Z27__device_stub__Overlay_CudaiiPhiS_iiiS_iii: # @_Z27__device_stub__Overlay_CudaiiPhiS_iiiS_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12Overlay_CudaiiPhiS_iiiS_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__Overlay_CudaiiPhiS_iiiS_iii, .Lfunc_end0-_Z27__device_stub__Overlay_CudaiiPhiS_iiiS_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x447a0000                      # float 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	xorl	%edi, %edi
	callq	hipSetDevice
	movq	8(%rbx), %rdi
	leaq	80(%rsp), %rsi
	movl	$10, %edx
	callq	__isoc23_strtol
	testl	%eax, %eax
	jle	.LBB1_20
# %bb.1:                                # %.preheader143.preheader
	movl	%eax, %eax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	xorl	%eax, %eax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
.LBB1_2:                                # %.preheader143
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
                                        #       Child Loop BB1_4 Depth 3
                                        #       Child Loop BB1_6 Depth 3
                                        #       Child Loop BB1_10 Depth 3
                                        #       Child Loop BB1_14 Depth 3
	xorl	%ecx, %ecx
.LBB1_3:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_4 Depth 3
                                        #       Child Loop BB1_6 Depth 3
                                        #       Child Loop BB1_10 Depth 3
                                        #       Child Loop BB1_14 Depth 3
	movq	40(%rsp), %rax                  # 8-byte Reload
	movl	matrices_(,%rax,8), %r13d
	movl	matrices_+4(,%rax,8), %eax
	movl	blocks_(,%rcx,8), %r14d
	movq	%rcx, 72(%rsp)                  # 8-byte Spill
	movl	blocks_+4(,%rcx,8), %ebp
	xorl	%r12d, %r12d
	movq	%r12, 32(%rsp)
	movl	%eax, 12(%rsp)                  # 4-byte Spill
	movl	%eax, %r15d
	imull	%r13d, %r15d
	movslq	%r15d, %rbx
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r12, 24(%rsp)
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r12, 16(%rsp)
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	%r13d, 60(%rsp)                 # 4-byte Spill
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	%r13d, %eax
	cltd
	idivl	%r14d
	incl	%r13d
	testl	%edx, %edx
	jne	.LBB1_4
# %bb.5:                                # %.preheader.preheader
                                        #   in Loop: Header=BB1_3 Depth=2
	movl	%eax, %ecx
	movl	12(%rsp), %esi                  # 4-byte Reload
.LBB1_6:                                # %.preheader
                                        #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	%esi, %eax
	cltd
	idivl	%ebp
	incl	%esi
	testl	%edx, %edx
	jne	.LBB1_6
# %bb.7:                                #   in Loop: Header=BB1_3 Depth=2
	movl	%eax, %r12d
	movl	%ecx, %eax
	shlq	$32, %r12
	orq	%rax, %r12
	movq	%rbp, %rbx
	shlq	$32, %rbx
	orq	%r14, %rbx
	xorl	%edi, %edi
	callq	hipFree
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.8:                                #   in Loop: Header=BB1_3 Depth=2
	movq	32(%rsp), %rdx
	movq	24(%rsp), %r8
	movl	$1, %edi
	movl	$1, %esi
	movl	%r15d, %ecx
	movl	%r15d, %r9d
	movl	$2, %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	movl	$1, %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z27__device_stub__Overlay_CudaiiPhiS_iiiS_iii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB1_9:                                #   in Loop: Header=BB1_3 Depth=2
	callq	hipDeviceSynchronize
	movl	$10, %r13d
.LBB1_10:                               #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.11:                               #   in Loop: Header=BB1_10 Depth=3
	movq	32(%rsp), %rdx
	movq	24(%rsp), %r8
	movl	$1, %edi
	movl	$1, %esi
	movl	%r15d, %ecx
	movl	%r15d, %r9d
	movl	$2, %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	movl	$1, %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z27__device_stub__Overlay_CudaiiPhiS_iiiS_iii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB1_12:                               #   in Loop: Header=BB1_10 Depth=3
	decl	%r13d
	jne	.LBB1_10
# %bb.13:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1000, %r13d                    # imm = 0x3E8
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	movq	%rax, 48(%rsp)                  # 8-byte Spill
.LBB1_14:                               #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_16
# %bb.15:                               #   in Loop: Header=BB1_14 Depth=3
	movq	32(%rsp), %rdx
	movq	24(%rsp), %r8
	movl	$1, %edi
	movl	$1, %esi
	movl	%r15d, %ecx
	movl	%r15d, %r9d
	movl	$2, %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	movl	$1, %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z27__device_stub__Overlay_CudaiiPhiS_iiiS_iii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB1_16:                               #   in Loop: Header=BB1_14 Depth=3
	decl	%r13d
	jne	.LBB1_14
# %bb.17:                               #   in Loop: Header=BB1_3 Depth=2
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	subq	48(%rsp), %rax                  # 8-byte Folded Reload
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI1_0(%rip), %xmm0
	movss	%xmm0, 48(%rsp)                 # 4-byte Spill
	movb	$91, 11(%rsp)
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	cmpq	$0, _ZSt4cout+16(%rax)
	je	.LBB1_21
# %bb.18:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$_ZSt4cout, %edi
	movl	$1, %edx
	leaq	11(%rsp), %r15
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_22
.LBB1_21:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$91, %esi
	callq	_ZNSo3putEc
	leaq	11(%rsp), %r15
.LBB1_22:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
                                        #   in Loop: Header=BB1_3 Depth=2
	movl	12(%rsp), %r12d                 # 4-byte Reload
	xorps	%xmm0, %xmm0
	cvtss2sd	48(%rsp), %xmm0                 # 4-byte Folded Reload
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movb	$44, 11(%rsp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_24
# %bb.23:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_25
.LBB1_24:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$44, %esi
	callq	_ZNSo3putEc
.LBB1_25:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit104
                                        #   in Loop: Header=BB1_3 Depth=2
	movb	$40, 11(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_27
# %bb.26:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_28
.LBB1_27:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$40, %esi
	callq	_ZNSo3putEc
.LBB1_28:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit107
                                        #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movb	$44, 11(%rsp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_30
# %bb.29:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_31
.LBB1_30:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$44, %esi
	callq	_ZNSo3putEc
.LBB1_31:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit110
                                        #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movb	$41, 11(%rsp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_33
# %bb.32:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_34
.LBB1_33:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$41, %esi
	callq	_ZNSo3putEc
.LBB1_34:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit113
                                        #   in Loop: Header=BB1_3 Depth=2
	movb	$44, 11(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_36
# %bb.35:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_37
.LBB1_36:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$44, %esi
	callq	_ZNSo3putEc
.LBB1_37:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit116
                                        #   in Loop: Header=BB1_3 Depth=2
	movb	$40, 11(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_39
# %bb.38:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_40
.LBB1_39:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$40, %esi
	callq	_ZNSo3putEc
.LBB1_40:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit119
                                        #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	60(%rsp), %esi                  # 4-byte Reload
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movb	$44, 11(%rsp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_42
# %bb.41:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_43
.LBB1_42:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$44, %esi
	callq	_ZNSo3putEc
.LBB1_43:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit122
                                        #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	%r12d, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movb	$41, 11(%rsp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_45
# %bb.44:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_46
.LBB1_45:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$41, %esi
	callq	_ZNSo3putEc
.LBB1_46:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit125
                                        #   in Loop: Header=BB1_3 Depth=2
	movb	$93, 11(%rsp)
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rbx,%rax)
	je	.LBB1_48
# %bb.47:                               #   in Loop: Header=BB1_3 Depth=2
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %rbx
	jmp	.LBB1_49
.LBB1_48:                               #   in Loop: Header=BB1_3 Depth=2
	movq	%rbx, %rdi
	movl	$93, %esi
	callq	_ZNSo3putEc
.LBB1_49:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit128
                                        #   in Loop: Header=BB1_3 Depth=2
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	72(%rsp), %rcx                  # 8-byte Reload
	incq	%rcx
	cmpq	$20, %rcx
	jne	.LBB1_3
# %bb.19:                               #   in Loop: Header=BB1_2 Depth=1
	movq	40(%rsp), %rcx                  # 8-byte Reload
	incq	%rcx
	movq	%rcx, %rax
	movq	%rcx, 40(%rsp)                  # 8-byte Spill
	cmpq	64(%rsp), %rcx                  # 8-byte Folded Reload
	jne	.LBB1_2
.LBB1_20:                               # %._crit_edge
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12Overlay_CudaiiPhiS_iiiS_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12Overlay_CudaiiPhiS_iiiS_iii,@object # @_Z12Overlay_CudaiiPhiS_iiiS_iii
	.section	.rodata,"a",@progbits
	.globl	_Z12Overlay_CudaiiPhiS_iiiS_iii
	.p2align	3, 0x0
_Z12Overlay_CudaiiPhiS_iiiS_iii:
	.quad	_Z27__device_stub__Overlay_CudaiiPhiS_iiiS_iii
	.size	_Z12Overlay_CudaiiPhiS_iiiS_iii, 8

	.type	blocks_,@object                 # @blocks_
	.data
	.globl	blocks_
	.p2align	4, 0x0
blocks_:
	.long	8                               # 0x8
	.long	8                               # 0x8
	.long	16                              # 0x10
	.long	16                              # 0x10
	.long	24                              # 0x18
	.long	24                              # 0x18
	.long	32                              # 0x20
	.long	32                              # 0x20
	.long	1                               # 0x1
	.long	64                              # 0x40
	.long	1                               # 0x1
	.long	128                             # 0x80
	.long	1                               # 0x1
	.long	192                             # 0xc0
	.long	1                               # 0x1
	.long	256                             # 0x100
	.long	1                               # 0x1
	.long	320                             # 0x140
	.long	1                               # 0x1
	.long	384                             # 0x180
	.long	1                               # 0x1
	.long	448                             # 0x1c0
	.long	1                               # 0x1
	.long	512                             # 0x200
	.long	1                               # 0x1
	.long	576                             # 0x240
	.long	1                               # 0x1
	.long	640                             # 0x280
	.long	1                               # 0x1
	.long	704                             # 0x2c0
	.long	1                               # 0x1
	.long	768                             # 0x300
	.long	1                               # 0x1
	.long	832                             # 0x340
	.long	1                               # 0x1
	.long	896                             # 0x380
	.long	1                               # 0x1
	.long	960                             # 0x3c0
	.long	1                               # 0x1
	.long	1024                            # 0x400
	.size	blocks_, 160

	.type	matrices_,@object               # @matrices_
	.globl	matrices_
	.p2align	4, 0x0
matrices_:
	.long	240                             # 0xf0
	.long	240                             # 0xf0
	.long	496                             # 0x1f0
	.long	496                             # 0x1f0
	.long	784                             # 0x310
	.long	784                             # 0x310
	.long	1016                            # 0x3f8
	.long	1016                            # 0x3f8
	.long	1232                            # 0x4d0
	.long	1232                            # 0x4d0
	.long	1680                            # 0x690
	.long	1680                            # 0x690
	.long	2024                            # 0x7e8
	.long	2024                            # 0x7e8
	.size	matrices_, 56

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z12Overlay_CudaiiPhiS_iiiS_iii"
	.size	.L__unnamed_1, 32

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__Overlay_CudaiiPhiS_iiiS_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12Overlay_CudaiiPhiS_iiiS_iii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12Overlay_CudaiiPhiS_iiiS_iii ; -- Begin function _Z12Overlay_CudaiiPhiS_iiiS_iii
	.globl	_Z12Overlay_CudaiiPhiS_iiiS_iii
	.p2align	8
	.type	_Z12Overlay_CudaiiPhiS_iiiS_iii,@function
_Z12Overlay_CudaiiPhiS_iiiS_iii:        ; @_Z12Overlay_CudaiiPhiS_iiiS_iii
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x54
	s_load_b64 s[12:13], s[0:1], 0x0
	s_load_b128 s[8:11], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_add_i32 s2, s9, s12
	s_add_i32 s3, s10, s13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	v_cmp_gt_i32_e64 s2, s3, v1
	v_cmp_le_i32_e64 s3, s12, v0
	v_cmp_le_i32_e64 s4, s13, v1
	s_delay_alu instid0(VALU_DEP_3)
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s3, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_5
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x38
	v_subrev_nc_u32_e32 v2, s12, v0
	v_subrev_nc_u32_e32 v3, s13, v1
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s4, 0
	s_cbranch_scc1 .LBB0_3
; %bb.2:
	s_load_b64 s[2:3], s[0:1], 0x30
	v_mul_lo_u32 v4, v2, s5
	s_mul_i32 s4, s6, s4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[5:6], null, s4, v3, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v6, vcc_lo
	global_load_u8 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v5, null, 0x437f0000, 0x437f0000, v4
	v_rcp_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v5, v6, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v7, v6
	v_div_scale_f32 v7, vcc_lo, v4, 0x437f0000, v4
	v_mul_f32_e32 v8, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v5, v8, v7
	v_fmac_f32_e32 v8, v9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, -v5, v8, v7
	v_div_fmas_f32 v5, v5, v6, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v4, v5, 0x437f0000, v4
	s_branch .LBB0_4
.LBB0_3:
	v_mov_b32_e32 v4, 1.0
.LBB0_4:
	s_clause 0x2
	s_load_b32 s4, s[0:1], 0x10
	s_load_b64 s[2:3], s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[5:6], null, v1, s4, v[0:1]
	v_mad_u64_u32 v[0:1], null, v3, s8, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v2, 31, v5
	v_add_co_u32 v1, vcc_lo, s2, v5
	v_ashrrev_i32_e32 v3, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	v_add_co_u32 v5, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v3, vcc_lo
	global_load_u8 v0, v[1:2], off
	global_load_u8 v3, v[5:6], off
	s_waitcnt vmcnt(1)
	v_cvt_f32_ubyte0_e32 v0, v0
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v3, v3
	v_sub_f32_e32 v5, 1.0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v0, v5, v0
	v_fmac_f32_e32 v0, v4, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f32_e32 v0, v0
	global_store_b8 v[1:2], v0, off
.LBB0_5:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12Overlay_CudaiiPhiS_iiiS_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12Overlay_CudaiiPhiS_iiiS_iii, .Lfunc_end0-_Z12Overlay_CudaiiPhiS_iiiS_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 536
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           4
        .value_kind:     by_value
      - .offset:         60
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     by_value
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         76
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         84
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         86
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         88
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         90
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         92
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         94
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         136
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 328
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12Overlay_CudaiiPhiS_iiiS_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12Overlay_CudaiiPhiS_iiiS_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
