#include <iostream>
#include <algorithm>

#include <cuda.h>
#include <cuda_runtime.h>

using namespace std;

#define BLOCK_SIZE 128
#define CHECK(call)                                                            \
  {                                                                            \
    const cudaError_t error = call;                                            \
    if (error != cudaSuccess) {                                                \
      fprintf(stderr, "Error: %s:%d, ", __FILE__, __LINE__);                   \
      fprintf(stderr, "code: %d, reason: %s\n", error,                         \
              cudaGetErrorString(error));                                      \
      exit(1);                                                                 \
    }                                                                          \
  }

struct Tree {
  int num_nodes;
  Tree *left;
  Tree *right;
  float total_length;
  float branch_length[2];
  Tree(int _num_nodes, float _length, Tree *_left, Tree *_right, float length1,
       float length2)
      : num_nodes(_num_nodes), left(_left), right(_right),
        total_length(_length) {
    branch_length[0] = length1;
    branch_length[1] = length2;
  }
};

__global__ void getMin(float *input, int *input_idx, int n, float *output_val,
                       int *output_idx) {
  __shared__ float smem_val[BLOCK_SIZE];
  __shared__ int smem_idx[BLOCK_SIZE];

  int tx = threadIdx.x;
  int bx = blockIdx.x;
  int i = tx + bx * BLOCK_SIZE * 8;

  float min_val = INFINITY;
  int min_idx = i;

  if (i < n) {
    float a1, a2, a3, a4, a5, a6, a7, a8;
    a1 = input[i];
    a1 = (a1 != 0.0f) ? a1 : INFINITY;

    a2 = (i + BLOCK_SIZE) < n ? input[i + BLOCK_SIZE] : INFINITY;
    a2 = (a2 != 0.0f) ? a2 : INFINITY;

    a3 = (i + 2 * BLOCK_SIZE) < n ? input[i + 2 * BLOCK_SIZE] : INFINITY;
    a3 = (a3 != 0.0f) ? a3 : INFINITY;

    a4 = (i + 3 * BLOCK_SIZE) < n ? input[i + 3 * BLOCK_SIZE] : INFINITY;
    a4 = (a4 != 0.0f) ? a4 : INFINITY;

    a5 = (i + 4 * BLOCK_SIZE) < n ? input[i + 4 * BLOCK_SIZE] : INFINITY;
    a5 = (a5 != 0.0f) ? a5 : INFINITY;

    a6 = (i + 5 * BLOCK_SIZE) < n ? input[i + 5 * BLOCK_SIZE] : INFINITY;
    a6 = (a6 != 0.0f) ? a6 : INFINITY;

    a7 = (i + 6 * BLOCK_SIZE) < n ? input[i + 6 * BLOCK_SIZE] : INFINITY;
    a7 = (a7 != 0.0f) ? a7 : INFINITY;

    a8 = (i + 7 * BLOCK_SIZE) < n ? input[i + 7 * BLOCK_SIZE] : INFINITY;
    a8 = (a8 != 0.0f) ? a8 : INFINITY;

    min_val = a1;
    min_idx = i;
    if (a2 < min_val) {
      min_val = a2;
      min_idx = i + BLOCK_SIZE;
    }
    if (a3 < min_val) {
      min_val = a3;
      min_idx = i + 2 * BLOCK_SIZE;
    }
    if (a4 < min_val) {
      min_val = a4;
      min_idx = i + 3 * BLOCK_SIZE;
    }
    if (a5 < min_val) {
      min_val = a5;
      min_idx = i + 4 * BLOCK_SIZE;
    }
    if (a6 < min_val) {
      min_val = a6;
      min_idx = i + 5 * BLOCK_SIZE;
    }
    if (a7 < min_val) {
      min_val = a7;
      min_idx = i + 6 * BLOCK_SIZE;
    }
    if (a8 < min_val) {
      min_val = a8;
      min_idx = i + 7 * BLOCK_SIZE;
    }
  }

  smem_val[tx] = min_val;
  smem_idx[tx] = min_idx;
  __syncthreads();

  // in-place reduction in shared memory
  if (blockDim.x >= 1024 && tx < 512 && smem_val[tx + 512] < smem_val[tx]) {
    smem_val[tx] = min_val = smem_val[tx + 512];
    smem_idx[tx] = min_idx = smem_idx[tx + 512];
  }
  __syncthreads();

  if (blockDim.x >= 512 && tx < 256 && smem_val[tx + 256] < smem_val[tx]) {
    smem_val[tx] = min_val = smem_val[tx + 256];
    smem_idx[tx] = min_idx = smem_idx[tx + 256];
  }
  __syncthreads();

  if (blockDim.x >= 256 && tx < 128 && smem_val[tx + 128] < smem_val[tx]) {
    smem_val[tx] = min_val = smem_val[tx + 128];
    smem_idx[tx] = min_idx = smem_idx[tx + 128];
  }
  __syncthreads();

  if (blockDim.x >= 128 && tx < 64 && smem_val[tx + 64] < smem_val[tx]) {
    smem_val[tx] = min_val = smem_val[tx + 64];
    smem_idx[tx] = min_idx = smem_idx[tx + 64];
  }
  __syncthreads();

  // unrolling warp
  if (tx < 32) {
    volatile float *vsmem_val = smem_val;
    volatile int *vsmem_idx = smem_idx;
    if (vsmem_val[tx + 32] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 32];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 32];
    }
    if (vsmem_val[tx + 16] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 16];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 16];
    }
    if (vsmem_val[tx + 8] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 8];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 8];
    }
    if (vsmem_val[tx + 4] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 4];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 4];
    }
    if (vsmem_val[tx + 2] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 2];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 2];
    }
    if (vsmem_val[tx + 1] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 1];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 1];
    }
  }

  if (tx == 0) {
    output_val[bx] = min_val;
    output_idx[bx] = (input_idx == nullptr) ? min_idx : input_idx[min_idx];
  }
}

/*
void update(float *mat, int n, int idx1, int idx2, int num_nodes1,
            int num_nodes2) {
  int total_nodes = num_nodes1 + num_nodes2;
  for (int i = 0; i < n; ++i) {
    float val =
        (mat[n * idx1 + i] * num_nodes1 + mat[n * idx2 + i] * num_nodes2) /
        total_nodes;
    mat[n * idx1 + i] = val;
    mat[n * idx2 + i] = 0.0f;
    mat[n * i + idx1] = val;
    mat[n * i + idx2] = 0.0f;
  }
  mat[n * idx1 + idx1] = 0.0f;
  mat[n * idx2 + idx1] = 0.0f;
  mat[n * idx1 + idx2] = 0.0f;
  mat[n * idx2 + idx2] = 0.0f;
  }*/

__global__ void update(float *mat, int n, int idx1, int idx2, int num_nodes1,
                       int num_nodes2) {
  int tx = threadIdx.x;
  int i = tx + blockDim.x * blockIdx.x;
  if (i >= n || i == idx1) {
    return;
  } else if (i == idx2) {
    mat[n * idx1 + i] = 0.0f;
    mat[n * i + idx1] = 0.0f;
    return;
  }
  int total_nodes = num_nodes1 + num_nodes2;
  float val =
      (mat[n * idx1 + i] * num_nodes1 + mat[n * idx2 + i] * num_nodes2) /
      total_nodes;
  mat[n * idx1 + i] = val;
  mat[n * idx2 + i] = 0.0f;
  mat[n * i + idx1] = val;
  mat[n * i + idx2] = 0.0f;
}

void cleanupTree(Tree *tree) {
  // Reach the leaf
  if (tree->left == nullptr && tree->right == nullptr) {
    delete tree;
    return;
  }
  cleanupTree(tree->left);
  cleanupTree(tree->right);
}

void printTree(Tree *tree) {
  // Reach the leaf
  if (tree->left == nullptr && tree->right == nullptr) {
    return;
  }
  cout << "(";
  printTree(tree->left);
  cout << ": " << tree->branch_length[0] << ", ";
  printTree(tree->right);
  cout << ": " << tree->branch_length[1] << ")";
}

int main() {
  const int num_seqs = 7;
  float h_a[num_seqs][num_seqs]{
      {0.0f, 19.0f, 27.0f, 8.0f, 33.0f, 18.0f, 13.0f},
      {19.0f, 0.0f, 31.0f, 18.0f, 36.0f, 1.0f, 13.0f},
      {27.0f, 31.0f, 0.0f, 26.0f, 41.0f, 32.0f, 29.0f},
      {8.0f, 18.0f, 26.0f, 0.0f, 31.0f, 17.0f, 14.0f},
      {33.0f, 36.0f, 41.0f, 31.0f, 0.0f, 35.0f, 28.0f},
      {18.0f, 1.0f, 32.0f, 17.0f, 35.0f, 0.0f, 12.0f},
      {13.0f, 13.0f, 29.0f, 14.0f, 28.0f, 12.0f, 0.0f}};

  Tree *nodes[num_seqs];
  for (int i = 0; i < num_seqs; ++i) {
    nodes[i] = new Tree(1, 0.0f, nullptr, nullptr, 0.0f, 0.0f);
  }

  int n = num_seqs * num_seqs;
  int n_out_level0 = ceil((float)n / (BLOCK_SIZE * 8));
  int n_out_level1 = ceil((float)n_out_level0 / (BLOCK_SIZE * 8));
  float *h_val = (float *)malloc(sizeof(float) * n_out_level1);
  int *h_idx = (int *)malloc(sizeof(int) * n_out_level1);

  float *d_a;
  float *d_val_level0, *d_val_level1;
  int *d_idx_level0, *d_idx_level1;

  CHECK(cudaMalloc((void **)&d_a, sizeof(float) * n));
  CHECK(cudaMalloc((void **)&d_val_level0, sizeof(float) * n_out_level0));
  CHECK(cudaMalloc((void **)&d_idx_level0, sizeof(int) * n_out_level0));
  CHECK(cudaMalloc((void **)&d_val_level1, sizeof(float) * n_out_level1));
  CHECK(cudaMalloc((void **)&d_idx_level1, sizeof(int) * n_out_level1));

  CHECK(cudaMemcpy(d_a, h_a, sizeof(float) * n, cudaMemcpyHostToDevice));

  Tree *root;
  for (int remain = num_seqs; remain >= 2; --remain) {
    // int idx = getMinIdx((float *)a, num_seqs * num_seqs);
    getMin<<<n_out_level0, BLOCK_SIZE>>>(d_a, nullptr, n, d_val_level0,
                                         d_idx_level0);

    CHECK(cudaDeviceSynchronize());

    getMin<<<n_out_level1, BLOCK_SIZE>>>(
        d_val_level0, d_idx_level0, n_out_level0, d_val_level1, d_idx_level1);

    CHECK(cudaDeviceSynchronize());

    CHECK(cudaMemcpy(h_val, d_val_level1, sizeof(float) * n_out_level1,
                     cudaMemcpyDeviceToHost));
    CHECK(cudaMemcpy(h_idx, d_idx_level1, sizeof(int) * n_out_level1,
                     cudaMemcpyDeviceToHost));

    float val = h_val[0];
    int idx = h_idx[0];
    for (int i = 0; i < n_out_level1; ++i) {
      if (h_val[i] < val) {
        val = h_val[i];
        idx = h_idx[i];
      }
    }

    int idx1 = idx / num_seqs;
    int idx2 = idx % num_seqs;
    if (idx1 > idx2) {
      swap(idx1, idx2);
    }
    update<<<num_seqs, BLOCK_SIZE>>>(d_a, num_seqs, idx1, idx2,
                                     nodes[idx1]->num_nodes,
                                     nodes[idx2]->num_nodes);
    float length = val;
    root = new Tree(nodes[idx1]->num_nodes + nodes[idx2]->num_nodes, length / 2,
                    nodes[idx1], nodes[idx2],
                    length / 2 - nodes[idx1]->total_length,
                    length / 2 - nodes[idx2]->total_length);

    CHECK(cudaDeviceSynchronize());
    nodes[idx1] = root;
  }

  printTree(root);

  // Free device
  CHECK(cudaFree(d_a));
  CHECK(cudaFree(d_val_level0));
  CHECK(cudaFree(d_idx_level0));
  CHECK(cudaFree(d_val_level1));
  CHECK(cudaFree(d_idx_level1));

  // Free host
  free(h_val);
  free(h_idx);

  // Clean up tree
  cleanupTree(root);

  return 0;
}

	.file	"tmpxft_00348cf4_00000000-6_upgma.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3898:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3898:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z11cleanupTreeP4Tree
	.type	_Z11cleanupTreeP4Tree, @function
_Z11cleanupTreeP4Tree:
.LFB3892:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
.L4:
	movq	8(%rbx), %rdi
	testq	%rdi, %rdi
	jne	.L3
	cmpq	$0, 16(%rbx)
	jne	.L3
	movq	%rbx, %rdi
	movl	$40, %esi
	popq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	_ZdlPvm@PLT
.L3:
	.cfi_restore_state
	call	_Z11cleanupTreeP4Tree
	movq	16(%rbx), %rbx
	jmp	.L4
	.cfi_endproc
.LFE3892:
	.size	_Z11cleanupTreeP4Tree, .-_Z11cleanupTreeP4Tree
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"("
.LC2:
	.string	": "
.LC3:
	.string	", "
.LC4:
	.string	")"
	.text
	.globl	_Z9printTreeP4Tree
	.type	_Z9printTreeP4Tree, @function
_Z9printTreeP4Tree:
.LFB3893:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	cmpq	$0, 8(%rdi)
	movq	%rdi, %rbx
	jne	.L8
	cmpq	$0, 16(%rdi)
	je	.L7
.L8:
	leaq	_ZSt4cout(%rip), %rbp
	leaq	.LC1(%rip), %rsi
	movq	%rbp, %rdi
	leaq	.LC2(%rip), %r12
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	8(%rbx), %rdi
	call	_Z9printTreeP4Tree
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	28(%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	16(%rbx), %rdi
	call	_Z9printTreeP4Tree
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	32(%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	popq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rsi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movq	%rax, %rdi
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L7:
	.cfi_restore_state
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3893:
	.size	_Z9printTreeP4Tree, .-_Z9printTreeP4Tree
	.globl	_Z33__device_stub__Z6getMinPfPiiS_S0_PfPiiS_S0_
	.type	_Z33__device_stub__Z6getMinPfPiiS_S0_PfPiiS_S0_, @function
_Z33__device_stub__Z6getMinPfPiiS_S0_PfPiiS_S0_:
.LFB3920:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 28(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z6getMinPfPiiS_S0_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L11:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3920:
	.size	_Z33__device_stub__Z6getMinPfPiiS_S0_PfPiiS_S0_, .-_Z33__device_stub__Z6getMinPfPiiS_S0_PfPiiS_S0_
	.globl	_Z6getMinPfPiiS_S0_
	.type	_Z6getMinPfPiiS_S0_, @function
_Z6getMinPfPiiS_S0_:
.LFB3921:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z6getMinPfPiiS_S0_PfPiiS_S0_
	.cfi_endproc
.LFE3921:
	.size	_Z6getMinPfPiiS_S0_, .-_Z6getMinPfPiiS_S0_
	.globl	_Z30__device_stub__Z6updatePfiiiiiPfiiiii
	.type	_Z30__device_stub__Z6updatePfiiiiiPfiiiii, @function
_Z30__device_stub__Z6updatePfiiiiiPfiiiii:
.LFB3922:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z6updatePfiiiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L16:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3922:
	.size	_Z30__device_stub__Z6updatePfiiiiiPfiiiii, .-_Z30__device_stub__Z6updatePfiiiiiPfiiiii
	.globl	_Z6updatePfiiiii
	.type	_Z6updatePfiiiii, @function
_Z6updatePfiiiii:
.LFB3923:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6updatePfiiiiiPfiiiii
	.cfi_endproc
.LFE3923:
	.size	_Z6updatePfiiiii, .-_Z6updatePfiiiii
	.section	.rodata.str1.1
.LC6:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/hle46/UPGMA/master/gpu/upgma.cu"
.LC7:
	.string	"Error: %s:%d, "
.LC8:
	.string	"code: %d, reason: %s\n"
	.section	.rodata
	.align 32
.LC0:
	.long	0
	.long	1100480512
	.long	1104674816
	.long	1090519040
	.long	1107558400
	.long	1099956224
	.long	1095761920
	.long	1100480512
	.long	0
	.long	1106771968
	.long	1099956224
	.long	1108344832
	.long	1065353216
	.long	1095761920
	.long	1104674816
	.long	1106771968
	.long	0
	.long	1104150528
	.long	1109655552
	.long	1107296256
	.long	1105723392
	.long	1090519040
	.long	1099956224
	.long	1104150528
	.long	0
	.long	1106771968
	.long	1099431936
	.long	1096810496
	.long	1107558400
	.long	1108344832
	.long	1109655552
	.long	1106771968
	.long	0
	.long	1108082688
	.long	1105199104
	.long	1099956224
	.long	1065353216
	.long	1107296256
	.long	1099431936
	.long	1108082688
	.long	0
	.long	1094713344
	.long	1095761920
	.long	1095761920
	.long	1105723392
	.long	1096810496
	.long	1105199104
	.long	1094713344
	.long	0
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3894:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %rsi
	movl	$49, %ecx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$360, %rsp
	.cfi_def_cfa_offset 416
	movq	%fs:40, %rax
	movq	%rax, 344(%rsp)
	xorl	%eax, %eax
	leaq	148(%rsp), %rdi
	rep movsl
.L22:
	movl	$40, %edi
	call	_Znwm@PLT
	xorl	%edx, %edx
	movq	%rax, 88(%rsp,%rbx,8)
	incq	%rbx
	movl	$1, (%rax)
	movq	%rdx, 8(%rax)
	movq	%rdx, 16(%rax)
	movq	%rdx, 24(%rax)
	movl	$0x00000000, 32(%rax)
	cmpq	$7, %rbx
	jne	.L22
	movl	$4, %edi
	call	malloc@PLT
	movl	$4, %edi
	movq	%rax, (%rsp)
	call	malloc@PLT
	leaq	24(%rsp), %rdi
	movl	$196, %esi
	movq	%rax, %r12
	call	cudaMalloc@PLT
	movl	$259, %r8d
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L49
	leaq	32(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L24
	movl	$260, %r8d
.L49:
	movq	stderr(%rip), %rdi
	leaq	.LC6(%rip), %rcx
	leaq	.LC7(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	movl	%ebx, %ecx
	movq	%rax, %r8
.L50:
	movq	stderr(%rip), %rdi
	leaq	.LC8(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L24:
	leaq	48(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movl	$261, %r8d
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L49
	leaq	40(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movl	$262, %r8d
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L49
	leaq	56(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movl	$263, %r8d
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L49
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$196, %edx
	leaq	148(%rsp), %rsi
	movl	$33554433, %ebp
	movl	$6, %r14d
	call	cudaMemcpy@PLT
	salq	$7, %rbp
	movl	$265, %r8d
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L49
.L28:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbp, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rbp, 76(%rsp)
	movl	$1, 84(%rsp)
	movq	%rdi, 64(%rsp)
	movl	$1, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movq	48(%rsp), %r8
	movq	32(%rsp), %rcx
	movl	$49, %edx
	xorl	%esi, %esi
	movq	24(%rsp), %rdi
	call	_Z33__device_stub__Z6getMinPfPiiS_S0_PfPiiS_S0_
.L29:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L30
	movl	$273, %r8d
	jmp	.L49
.L30:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbp, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rbp, 76(%rsp)
	movl	$1, 84(%rsp)
	movq	%rdi, 64(%rsp)
	movl	$1, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	56(%rsp), %r8
	movq	40(%rsp), %rcx
	movl	$1, %edx
	movq	48(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z33__device_stub__Z6getMinPfPiiS_S0_PfPiiS_S0_
.L31:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L32
	movl	$278, %r8d
	jmp	.L49
.L32:
	movq	40(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$2, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L33
	movl	$280, %r8d
	jmp	.L49
.L33:
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L34
	movl	$282, %r8d
	jmp	.L49
.L34:
	movq	(%rsp), %rax
	movl	$7, %ecx
	movabsq	$4294967303, %rdi
	movq	%rbp, 76(%rsp)
	movl	$1, 84(%rsp)
	movss	(%rax), %xmm3
	movl	(%r12), %eax
	movq	%rdi, 64(%rsp)
	movl	$1, 72(%rsp)
	cltd
	movss	%xmm3, 12(%rsp)
	idivl	%ecx
	movl	$1, %ecx
	cmpl	%edx, %eax
	movl	%eax, %esi
	movl	%edx, %ebx
	cmovg	%edx, %esi
	cmovg	%eax, %ebx
	movq	%rbp, %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%esi, 8(%rsp)
	movl	$1, %esi
	movslq	%ebx, %r15
	call	__cudaPushCallConfiguration@PLT
	movslq	8(%rsp), %r13
	testl	%eax, %eax
	jne	.L36
	movq	88(%rsp,%r15,8), %rdx
	movq	88(%rsp,%r13,8), %rax
	movl	%ebx, %ecx
	movl	$7, %esi
	movq	24(%rsp), %rdi
	movl	(%rdx), %r9d
	movl	(%rax), %r8d
	movl	8(%rsp), %edx
	call	_Z30__device_stub__Z6updatePfiiiiiPfiiiii
.L36:
	movl	$40, %edi
	call	_Znwm@PLT
	movss	12(%rsp), %xmm0
	movq	88(%rsp,%r13,8), %rdx
	mulss	.LC9(%rip), %xmm0
	movq	%rax, %rbx
	movq	88(%rsp,%r15,8), %rax
	movl	(%rax), %ecx
	addl	(%rdx), %ecx
	movaps	%xmm0, %xmm1
	movaps	%xmm0, %xmm2
	subss	24(%rax), %xmm1
	subss	24(%rdx), %xmm2
	movl	%ecx, (%rbx)
	movq	%rdx, 8(%rbx)
	movq	%rax, 16(%rbx)
	movss	%xmm0, 24(%rbx)
	movss	%xmm2, 28(%rbx)
	movss	%xmm1, 32(%rbx)
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %r15d
	testl	%eax, %eax
	je	.L37
	movq	stderr(%rip), %rdi
	movl	$308, %r8d
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rcx
	leaq	.LC7(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	%r15d, %edi
	call	cudaGetErrorString@PLT
	movl	%r15d, %ecx
	movq	%rax, %r8
	jmp	.L50
.L37:
	movq	%rbx, 88(%rsp,%r13,8)
	decl	%r14d
	jne	.L28
	movq	%rbx, %rdi
	call	_Z9printTreeP4Tree
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movl	$315, %r8d
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L51
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movl	$316, %r8d
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L51
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movl	$317, %r8d
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L51
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movl	$318, %r8d
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L51
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L42
	movl	$319, %r8d
.L51:
	movq	stderr(%rip), %rdi
	leaq	.LC6(%rip), %rcx
	leaq	.LC7(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	%ebp, %edi
	call	cudaGetErrorString@PLT
	movl	%ebp, %ecx
	movq	%rax, %r8
	jmp	.L50
.L42:
	movq	(%rsp), %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	_Z11cleanupTreeP4Tree
	movq	344(%rsp), %rax
	subq	%fs:40, %rax
	je	.L43
	call	__stack_chk_fail@PLT
.L43:
	addq	$360, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3894:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z6updatePfiiiii"
.LC12:
	.string	"_Z6getMinPfPiiS_S0_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3925:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z6updatePfiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6getMinPfPiiS_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3925:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC9:
	.long	1056964608
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <algorithm>

#include <hip/hip_runtime.h>


using namespace std;

#define BLOCK_SIZE 128
#define CHECK(call)                                                            \
  {                                                                            \
    const hipError_t error = call;                                            \
    if (error != hipSuccess) {                                                \
      fprintf(stderr, "Error: %s:%d, ", __FILE__, __LINE__);                   \
      fprintf(stderr, "code: %d, reason: %s\n", error,                         \
              hipGetErrorString(error));                                      \
      exit(1);                                                                 \
    }                                                                          \
  }

struct Tree {
  int num_nodes;
  Tree *left;
  Tree *right;
  float total_length;
  float branch_length[2];
  Tree(int _num_nodes, float _length, Tree *_left, Tree *_right, float length1,
       float length2)
      : num_nodes(_num_nodes), left(_left), right(_right),
        total_length(_length) {
    branch_length[0] = length1;
    branch_length[1] = length2;
  }
};

__global__ void getMin(float *input, int *input_idx, int n, float *output_val,
                       int *output_idx) {
  __shared__ float smem_val[BLOCK_SIZE];
  __shared__ int smem_idx[BLOCK_SIZE];

  int tx = threadIdx.x;
  int bx = blockIdx.x;
  int i = tx + bx * BLOCK_SIZE * 8;

  float min_val = INFINITY;
  int min_idx = i;

  if (i < n) {
    float a1, a2, a3, a4, a5, a6, a7, a8;
    a1 = input[i];
    a1 = (a1 != 0.0f) ? a1 : INFINITY;

    a2 = (i + BLOCK_SIZE) < n ? input[i + BLOCK_SIZE] : INFINITY;
    a2 = (a2 != 0.0f) ? a2 : INFINITY;

    a3 = (i + 2 * BLOCK_SIZE) < n ? input[i + 2 * BLOCK_SIZE] : INFINITY;
    a3 = (a3 != 0.0f) ? a3 : INFINITY;

    a4 = (i + 3 * BLOCK_SIZE) < n ? input[i + 3 * BLOCK_SIZE] : INFINITY;
    a4 = (a4 != 0.0f) ? a4 : INFINITY;

    a5 = (i + 4 * BLOCK_SIZE) < n ? input[i + 4 * BLOCK_SIZE] : INFINITY;
    a5 = (a5 != 0.0f) ? a5 : INFINITY;

    a6 = (i + 5 * BLOCK_SIZE) < n ? input[i + 5 * BLOCK_SIZE] : INFINITY;
    a6 = (a6 != 0.0f) ? a6 : INFINITY;

    a7 = (i + 6 * BLOCK_SIZE) < n ? input[i + 6 * BLOCK_SIZE] : INFINITY;
    a7 = (a7 != 0.0f) ? a7 : INFINITY;

    a8 = (i + 7 * BLOCK_SIZE) < n ? input[i + 7 * BLOCK_SIZE] : INFINITY;
    a8 = (a8 != 0.0f) ? a8 : INFINITY;

    min_val = a1;
    min_idx = i;
    if (a2 < min_val) {
      min_val = a2;
      min_idx = i + BLOCK_SIZE;
    }
    if (a3 < min_val) {
      min_val = a3;
      min_idx = i + 2 * BLOCK_SIZE;
    }
    if (a4 < min_val) {
      min_val = a4;
      min_idx = i + 3 * BLOCK_SIZE;
    }
    if (a5 < min_val) {
      min_val = a5;
      min_idx = i + 4 * BLOCK_SIZE;
    }
    if (a6 < min_val) {
      min_val = a6;
      min_idx = i + 5 * BLOCK_SIZE;
    }
    if (a7 < min_val) {
      min_val = a7;
      min_idx = i + 6 * BLOCK_SIZE;
    }
    if (a8 < min_val) {
      min_val = a8;
      min_idx = i + 7 * BLOCK_SIZE;
    }
  }

  smem_val[tx] = min_val;
  smem_idx[tx] = min_idx;
  __syncthreads();

  // in-place reduction in shared memory
  if (blockDim.x >= 1024 && tx < 512 && smem_val[tx + 512] < smem_val[tx]) {
    smem_val[tx] = min_val = smem_val[tx + 512];
    smem_idx[tx] = min_idx = smem_idx[tx + 512];
  }
  __syncthreads();

  if (blockDim.x >= 512 && tx < 256 && smem_val[tx + 256] < smem_val[tx]) {
    smem_val[tx] = min_val = smem_val[tx + 256];
    smem_idx[tx] = min_idx = smem_idx[tx + 256];
  }
  __syncthreads();

  if (blockDim.x >= 256 && tx < 128 && smem_val[tx + 128] < smem_val[tx]) {
    smem_val[tx] = min_val = smem_val[tx + 128];
    smem_idx[tx] = min_idx = smem_idx[tx + 128];
  }
  __syncthreads();

  if (blockDim.x >= 128 && tx < 64 && smem_val[tx + 64] < smem_val[tx]) {
    smem_val[tx] = min_val = smem_val[tx + 64];
    smem_idx[tx] = min_idx = smem_idx[tx + 64];
  }
  __syncthreads();

  // unrolling warp
  if (tx < 32) {
    volatile float *vsmem_val = smem_val;
    volatile int *vsmem_idx = smem_idx;
    if (vsmem_val[tx + 32] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 32];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 32];
    }
    if (vsmem_val[tx + 16] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 16];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 16];
    }
    if (vsmem_val[tx + 8] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 8];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 8];
    }
    if (vsmem_val[tx + 4] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 4];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 4];
    }
    if (vsmem_val[tx + 2] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 2];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 2];
    }
    if (vsmem_val[tx + 1] < vsmem_val[tx]) {
      vsmem_val[tx] = min_val = vsmem_val[tx + 1];
      vsmem_idx[tx] = min_idx = vsmem_idx[tx + 1];
    }
  }

  if (tx == 0) {
    output_val[bx] = min_val;
    output_idx[bx] = (input_idx == nullptr) ? min_idx : input_idx[min_idx];
  }
}

/*
void update(float *mat, int n, int idx1, int idx2, int num_nodes1,
            int num_nodes2) {
  int total_nodes = num_nodes1 + num_nodes2;
  for (int i = 0; i < n; ++i) {
    float val =
        (mat[n * idx1 + i] * num_nodes1 + mat[n * idx2 + i] * num_nodes2) /
        total_nodes;
    mat[n * idx1 + i] = val;
    mat[n * idx2 + i] = 0.0f;
    mat[n * i + idx1] = val;
    mat[n * i + idx2] = 0.0f;
  }
  mat[n * idx1 + idx1] = 0.0f;
  mat[n * idx2 + idx1] = 0.0f;
  mat[n * idx1 + idx2] = 0.0f;
  mat[n * idx2 + idx2] = 0.0f;
  }*/

__global__ void update(float *mat, int n, int idx1, int idx2, int num_nodes1,
                       int num_nodes2) {
  int tx = threadIdx.x;
  int i = tx + blockDim.x * blockIdx.x;
  if (i >= n || i == idx1) {
    return;
  } else if (i == idx2) {
    mat[n * idx1 + i] = 0.0f;
    mat[n * i + idx1] = 0.0f;
    return;
  }
  int total_nodes = num_nodes1 + num_nodes2;
  float val =
      (mat[n * idx1 + i] * num_nodes1 + mat[n * idx2 + i] * num_nodes2) /
      total_nodes;
  mat[n * idx1 + i] = val;
  mat[n * idx2 + i] = 0.0f;
  mat[n * i + idx1] = val;
  mat[n * i + idx2] = 0.0f;
}

void cleanupTree(Tree *tree) {
  // Reach the leaf
  if (tree->left == nullptr && tree->right == nullptr) {
    delete tree;
    return;
  }
  cleanupTree(tree->left);
  cleanupTree(tree->right);
}

void printTree(Tree *tree) {
  // Reach the leaf
  if (tree->left == nullptr && tree->right == nullptr) {
    return;
  }
  cout << "(";
  printTree(tree->left);
  cout << ": " << tree->branch_length[0] << ", ";
  printTree(tree->right);
  cout << ": " << tree->branch_length[1] << ")";
}

int main() {
  const int num_seqs = 7;
  float h_a[num_seqs][num_seqs]{
      {0.0f, 19.0f, 27.0f, 8.0f, 33.0f, 18.0f, 13.0f},
      {19.0f, 0.0f, 31.0f, 18.0f, 36.0f, 1.0f, 13.0f},
      {27.0f, 31.0f, 0.0f, 26.0f, 41.0f, 32.0f, 29.0f},
      {8.0f, 18.0f, 26.0f, 0.0f, 31.0f, 17.0f, 14.0f},
      {33.0f, 36.0f, 41.0f, 31.0f, 0.0f, 35.0f, 28.0f},
      {18.0f, 1.0f, 32.0f, 17.0f, 35.0f, 0.0f, 12.0f},
      {13.0f, 13.0f, 29.0f, 14.0f, 28.0f, 12.0f, 0.0f}};

  Tree *nodes[num_seqs];
  for (int i = 0; i < num_seqs; ++i) {
    nodes[i] = new Tree(1, 0.0f, nullptr, nullptr, 0.0f, 0.0f);
  }

  int n = num_seqs * num_seqs;
  int n_out_level0 = ceil((float)n / (BLOCK_SIZE * 8));
  int n_out_level1 = ceil((float)n_out_level0 / (BLOCK_SIZE * 8));
  float *h_val = (float *)malloc(sizeof(float) * n_out_level1);
  int *h_idx = (int *)malloc(sizeof(int) * n_out_level1);

  float *d_a;
  float *d_val_level0, *d_val_level1;
  int *d_idx_level0, *d_idx_level1;

  CHECK(hipMalloc((void **)&d_a, sizeof(float) * n));
  CHECK(hipMalloc((void **)&d_val_level0, sizeof(float) * n_out_level0));
  CHECK(hipMalloc((void **)&d_idx_level0, sizeof(int) * n_out_level0));
  CHECK(hipMalloc((void **)&d_val_level1, sizeof(float) * n_out_level1));
  CHECK(hipMalloc((void **)&d_idx_level1, sizeof(int) * n_out_level1));

  CHECK(hipMemcpy(d_a, h_a, sizeof(float) * n, hipMemcpyHostToDevice));

  Tree *root;
  for (int remain = num_seqs; remain >= 2; --remain) {
    // int idx = getMinIdx((float *)a, num_seqs * num_seqs);
    getMin<<<n_out_level0, BLOCK_SIZE>>>(d_a, nullptr, n, d_val_level0,
                                         d_idx_level0);

    CHECK(hipDeviceSynchronize());

    getMin<<<n_out_level1, BLOCK_SIZE>>>(
        d_val_level0, d_idx_level0, n_out_level0, d_val_level1, d_idx_level1);

    CHECK(hipDeviceSynchronize());

    CHECK(hipMemcpy(h_val, d_val_level1, sizeof(float) * n_out_level1,
                     hipMemcpyDeviceToHost));
    CHECK(hipMemcpy(h_idx, d_idx_level1, sizeof(int) * n_out_level1,
                     hipMemcpyDeviceToHost));

    float val = h_val[0];
    int idx = h_idx[0];
    for (int i = 0; i < n_out_level1; ++i) {
      if (h_val[i] < val) {
        val = h_val[i];
        idx = h_idx[i];
      }
    }

    int idx1 = idx / num_seqs;
    int idx2 = idx % num_seqs;
    if (idx1 > idx2) {
      swap(idx1, idx2);
    }
    update<<<num_seqs, BLOCK_SIZE>>>(d_a, num_seqs, idx1, idx2,
                                     nodes[idx1]->num_nodes,
                                     nodes[idx2]->num_nodes);
    float length = val;
    root = new Tree(nodes[idx1]->num_nodes + nodes[idx2]->num_nodes, length / 2,
                    nodes[idx1], nodes[idx2],
                    length / 2 - nodes[idx1]->total_length,
                    length / 2 - nodes[idx2]->total_length);

    CHECK(hipDeviceSynchronize());
    nodes[idx1] = root;
  }

  printTree(root);

  // Free device
  CHECK(hipFree(d_a));
  CHECK(hipFree(d_val_level0));
  CHECK(hipFree(d_idx_level0));
  CHECK(hipFree(d_val_level1));
  CHECK(hipFree(d_idx_level1));

  // Free host
  free(h_val);
  free(h_idx);

  // Clean up tree
  cleanupTree(root);

  return 0;
}

	.text
	.file	"upgma.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__getMinPfPiiS_S0_ # -- Begin function _Z21__device_stub__getMinPfPiiS_S0_
	.type	_Z21__device_stub__getMinPfPiiS_S0_,@function
_Z21__device_stub__getMinPfPiiS_S0_:    # @_Z21__device_stub__getMinPfPiiS_S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6getMinPfPiiS_S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__getMinPfPiiS_S0_, .Lfunc_end0-_Z21__device_stub__getMinPfPiiS_S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__updatePfiiiii # -- Begin function _Z21__device_stub__updatePfiiiii
	.type	_Z21__device_stub__updatePfiiiii,@function
_Z21__device_stub__updatePfiiiii:       # @_Z21__device_stub__updatePfiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6updatePfiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z21__device_stub__updatePfiiiii, .Lfunc_end1-_Z21__device_stub__updatePfiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11cleanupTreeP4Tree           # -- Begin function _Z11cleanupTreeP4Tree
	.type	_Z11cleanupTreeP4Tree,@function
_Z11cleanupTreeP4Tree:                  # @_Z11cleanupTreeP4Tree
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
.LBB2_1:                                # %tailrecurse
                                        # =>This Inner Loop Header: Depth=1
	movq	8(%rbx), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_3
# %bb.2:                                #   in Loop: Header=BB2_1 Depth=1
	cmpq	$0, 16(%rbx)
	je	.LBB2_4
.LBB2_3:                                #   in Loop: Header=BB2_1 Depth=1
	callq	_Z11cleanupTreeP4Tree
	movq	16(%rbx), %rbx
	jmp	.LBB2_1
.LBB2_4:
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZdlPv                          # TAILCALL
.Lfunc_end2:
	.size	_Z11cleanupTreeP4Tree, .Lfunc_end2-_Z11cleanupTreeP4Tree
	.cfi_endproc
                                        # -- End function
	.globl	_Z9printTreeP4Tree              # -- Begin function _Z9printTreeP4Tree
	.type	_Z9printTreeP4Tree,@function
_Z9printTreeP4Tree:                     # @_Z9printTreeP4Tree
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	cmpq	$0, 8(%rdi)
	jne	.LBB3_3
# %bb.1:
	cmpq	$0, 16(%rbx)
	je	.LBB3_2
.LBB3_3:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	8(%rbx), %rdi
	callq	_Z9printTreeP4Tree
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$2, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtss2sd	28(%rbx), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.2, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rbx), %rdi
	callq	_Z9printTreeP4Tree
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$2, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	32(%rbx), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.3, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l # TAILCALL
.LBB3_2:                                # %common.ret6
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z9printTreeP4Tree, .Lfunc_end3-_Z9printTreeP4Tree
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI4_0:
	.long	0x3f000000                      # float 0.5
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$344, %rsp                      # imm = 0x158
	.cfi_def_cfa_offset 400
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	144(%rsp), %rdi
	movl	$.L__const.main.h_a, %esi
	movl	$196, %edx
	callq	memcpy@PLT
	xorl	%ebx, %ebx
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	movl	$40, %edi
	callq	_Znwm
	movl	$1, (%rax)
	xorps	%xmm0, %xmm0
	movups	%xmm0, 8(%rax)
	movups	%xmm0, 20(%rax)
	movq	%rax, 80(%rsp,%rbx,8)
	incq	%rbx
	cmpq	$7, %rbx
	jne	.LBB4_1
# %bb.2:
	movl	$4, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$4, %edi
	callq	malloc
	movq	%rax, %r13
	leaq	8(%rsp), %rdi
	movl	$196, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_3
# %bb.6:
	leaq	40(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_7
# %bb.8:
	leaq	24(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_9
# %bb.10:
	leaq	32(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_11
# %bb.12:
	leaq	16(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_13
# %bb.14:
	movq	8(%rsp), %rdi
	leaq	144(%rsp), %rsi
	movl	$196, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_20
# %bb.15:                               # %.preheader.preheader
	movl	$8, %ebx
	movabsq	$4294967424, %r15               # imm = 0x100000080
	leaq	-127(%r15), %r12
	leaq	-121(%r15), %rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movq	%r14, 64(%rsp)                  # 8-byte Spill
	movq	%r13, 56(%rsp)                  # 8-byte Spill
.LBB4_16:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_18
# %bb.17:                               #   in Loop: Header=BB4_16 Depth=1
	movq	8(%rsp), %rdi
	movq	40(%rsp), %rcx
	movq	24(%rsp), %r8
	xorl	%esi, %esi
	movl	$49, %edx
	callq	_Z21__device_stub__getMinPfPiiS_S0_
.LBB4_18:                               #   in Loop: Header=BB4_16 Depth=1
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB4_19
# %bb.21:                               #   in Loop: Header=BB4_16 Depth=1
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_23
# %bb.22:                               #   in Loop: Header=BB4_16 Depth=1
	movq	40(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rcx
	movq	16(%rsp), %r8
	movl	$1, %edx
	callq	_Z21__device_stub__getMinPfPiiS_S0_
.LBB4_23:                               #   in Loop: Header=BB4_16 Depth=1
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB4_24
# %bb.25:                               #   in Loop: Header=BB4_16 Depth=1
	movq	32(%rsp), %rsi
	movl	$4, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_26
# %bb.27:                               #   in Loop: Header=BB4_16 Depth=1
	movq	16(%rsp), %rsi
	movl	$4, %edx
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_28
# %bb.29:                               #   in Loop: Header=BB4_16 Depth=1
	movss	(%r14), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 52(%rsp)                 # 4-byte Spill
	movslq	(%r13), %rax
	imulq	$-1840700269, %rax, %rcx        # imm = 0x92492493
	shrq	$32, %rcx
	addl	%eax, %ecx
	movl	%ecx, %edx
	shrl	$31, %edx
	sarl	$2, %ecx
	addl	%edx, %ecx
	leal	(,%rcx,8), %edx
	movl	%ecx, %ebp
	subl	%edx, %ebp
	addl	%eax, %ebp
	cmpl	%ebp, %ecx
	movl	%ebp, %r13d
	cmovgl	%ecx, %r13d
	cmovll	%ecx, %ebp
	movq	72(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB4_31
# %bb.30:                               # %._crit_edge
                                        #   in Loop: Header=BB4_16 Depth=1
	movslq	%ebp, %r14
	movslq	%r13d, %r15
	jmp	.LBB4_32
.LBB4_31:                               #   in Loop: Header=BB4_16 Depth=1
	movq	8(%rsp), %rdi
	movslq	%ebp, %r14
	movq	80(%rsp,%r14,8), %rax
	movl	(%rax), %r8d
	movslq	%r13d, %r15
	movq	80(%rsp,%r15,8), %rax
	movl	(%rax), %r9d
	movl	$7, %esi
	movl	%ebp, %edx
	movl	%r13d, %ecx
	callq	_Z21__device_stub__updatePfiiiii
.LBB4_32:                               #   in Loop: Header=BB4_16 Depth=1
	movl	$40, %edi
	callq	_Znwm
	movq	%rax, %rbp
	movq	80(%rsp,%r14,8), %rax
	movq	80(%rsp,%r15,8), %rcx
	movl	(%rcx), %edx
	addl	(%rax), %edx
	movss	52(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	mulss	.LCPI4_0(%rip), %xmm2
	movaps	%xmm2, %xmm0
	subss	24(%rax), %xmm0
	movaps	%xmm2, %xmm1
	subss	24(%rcx), %xmm1
	movl	%edx, (%rbp)
	movq	%rax, 8(%rbp)
	movq	%rcx, 16(%rbp)
	movss	%xmm2, 24(%rbp)
	movss	%xmm0, 28(%rbp)
	movss	%xmm1, 32(%rbp)
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB4_33
# %bb.34:                               #   in Loop: Header=BB4_16 Depth=1
	movq	%rbp, 80(%rsp,%r14,8)
	decl	%ebx
	cmpl	$2, %ebx
	movq	64(%rsp), %r14                  # 8-byte Reload
	movq	56(%rsp), %r13                  # 8-byte Reload
	movabsq	$4294967424, %r15               # imm = 0x100000080
	ja	.LBB4_16
# %bb.35:
	movq	%rbp, %rdi
	callq	_Z9printTreeP4Tree
	movq	8(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_36
# %bb.38:
	movq	40(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_39
# %bb.40:
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_41
# %bb.42:
	movq	32(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_43
# %bb.44:
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_45
# %bb.46:
	movq	%r14, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	%rbp, %rdi
	callq	_Z11cleanupTreeP4Tree
	xorl	%eax, %eax
	addq	$344, %rsp                      # imm = 0x158
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_33:
	.cfi_def_cfa_offset 400
	movl	%eax, %r13d
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$308, %ecx                      # imm = 0x134
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %rbx
	movl	%r13d, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movq	%rbx, %rdi
	movl	%r13d, %edx
	jmp	.LBB4_5
.LBB4_28:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$283, %ecx                      # imm = 0x11B
	jmp	.LBB4_4
.LBB4_26:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$281, %ecx                      # imm = 0x119
	jmp	.LBB4_4
.LBB4_24:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$278, %ecx                      # imm = 0x116
	jmp	.LBB4_4
.LBB4_19:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$273, %ecx                      # imm = 0x111
.LBB4_4:
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %rbx
	movl	%ebp, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movq	%rbx, %rdi
	movl	%ebp, %edx
.LBB4_5:
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.LBB4_3:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$259, %ecx                      # imm = 0x103
	jmp	.LBB4_4
.LBB4_7:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$260, %ecx                      # imm = 0x104
	jmp	.LBB4_4
.LBB4_9:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$261, %ecx                      # imm = 0x105
	jmp	.LBB4_4
.LBB4_11:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$262, %ecx                      # imm = 0x106
	jmp	.LBB4_4
.LBB4_13:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$263, %ecx                      # imm = 0x107
	jmp	.LBB4_4
.LBB4_20:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$265, %ecx                      # imm = 0x109
	jmp	.LBB4_4
.LBB4_36:
	movl	%eax, %r15d
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$315, %ecx                      # imm = 0x13B
	jmp	.LBB4_37
.LBB4_39:
	movl	%eax, %r15d
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$316, %ecx                      # imm = 0x13C
	jmp	.LBB4_37
.LBB4_41:
	movl	%eax, %r15d
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$317, %ecx                      # imm = 0x13D
	jmp	.LBB4_37
.LBB4_43:
	movl	%eax, %r15d
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$318, %ecx                      # imm = 0x13E
	jmp	.LBB4_37
.LBB4_45:
	movl	%eax, %r15d
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$319, %ecx                      # imm = 0x13F
.LBB4_37:
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %rbx
	movl	%r15d, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movq	%rbx, %rdi
	movl	%r15d, %edx
	jmp	.LBB4_5
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6getMinPfPiiS_S0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6updatePfiiiii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6getMinPfPiiS_S0_,@object     # @_Z6getMinPfPiiS_S0_
	.section	.rodata,"a",@progbits
	.globl	_Z6getMinPfPiiS_S0_
	.p2align	3, 0x0
_Z6getMinPfPiiS_S0_:
	.quad	_Z21__device_stub__getMinPfPiiS_S0_
	.size	_Z6getMinPfPiiS_S0_, 8

	.type	_Z6updatePfiiiii,@object        # @_Z6updatePfiiiii
	.globl	_Z6updatePfiiiii
	.p2align	3, 0x0
_Z6updatePfiiiii:
	.quad	_Z21__device_stub__updatePfiiiii
	.size	_Z6updatePfiiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"("
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	": "
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	", "
	.size	.L.str.2, 3

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	")"
	.size	.L.str.3, 2

	.type	.L__const.main.h_a,@object      # @__const.main.h_a
	.section	.rodata,"a",@progbits
	.p2align	4, 0x0
.L__const.main.h_a:
	.long	0x00000000                      # float 0
	.long	0x41980000                      # float 19
	.long	0x41d80000                      # float 27
	.long	0x41000000                      # float 8
	.long	0x42040000                      # float 33
	.long	0x41900000                      # float 18
	.long	0x41500000                      # float 13
	.long	0x41980000                      # float 19
	.long	0x00000000                      # float 0
	.long	0x41f80000                      # float 31
	.long	0x41900000                      # float 18
	.long	0x42100000                      # float 36
	.long	0x3f800000                      # float 1
	.long	0x41500000                      # float 13
	.long	0x41d80000                      # float 27
	.long	0x41f80000                      # float 31
	.long	0x00000000                      # float 0
	.long	0x41d00000                      # float 26
	.long	0x42240000                      # float 41
	.long	0x42000000                      # float 32
	.long	0x41e80000                      # float 29
	.long	0x41000000                      # float 8
	.long	0x41900000                      # float 18
	.long	0x41d00000                      # float 26
	.long	0x00000000                      # float 0
	.long	0x41f80000                      # float 31
	.long	0x41880000                      # float 17
	.long	0x41600000                      # float 14
	.long	0x42040000                      # float 33
	.long	0x42100000                      # float 36
	.long	0x42240000                      # float 41
	.long	0x41f80000                      # float 31
	.long	0x00000000                      # float 0
	.long	0x420c0000                      # float 35
	.long	0x41e00000                      # float 28
	.long	0x41900000                      # float 18
	.long	0x3f800000                      # float 1
	.long	0x42000000                      # float 32
	.long	0x41880000                      # float 17
	.long	0x420c0000                      # float 35
	.long	0x00000000                      # float 0
	.long	0x41400000                      # float 12
	.long	0x41500000                      # float 13
	.long	0x41500000                      # float 13
	.long	0x41e80000                      # float 29
	.long	0x41600000                      # float 14
	.long	0x41e00000                      # float 28
	.long	0x41400000                      # float 12
	.long	0x00000000                      # float 0
	.size	.L__const.main.h_a, 196

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"Error: %s:%d, "
	.size	.L.str.4, 15

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/hle46/UPGMA/master/gpu/upgma.hip"
	.size	.L.str.5, 95

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"code: %d, reason: %s\n"
	.size	.L.str.6, 22

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6getMinPfPiiS_S0_"
	.size	.L__unnamed_1, 20

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z6updatePfiiiii"
	.size	.L__unnamed_2, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__getMinPfPiiS_S0_
	.addrsig_sym _Z21__device_stub__updatePfiiiii
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6getMinPfPiiS_S0_
	.addrsig_sym _Z6updatePfiiiii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6getMinPfPiiS_S0_     ; -- Begin function _Z6getMinPfPiiS_S0_
	.globl	_Z6getMinPfPiiS_S0_
	.p2align	8
	.type	_Z6getMinPfPiiS_S0_,@function
_Z6getMinPfPiiS_S0_:                    ; @_Z6getMinPfPiiS_S0_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s8, s15
	v_mov_b32_e32 v7, 0x7f800000
	v_lshl_or_b32 v1, s8, 10, v0
	s_mov_b32 s3, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB0_16
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_nc_u32_e32 v4, 0x80, v1
	v_dual_mov_b32 v5, 0x7f800000 :: v_dual_mov_b32 v8, 0x7f800000
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s4, exec_lo
	global_load_b32 v6, v[2:3], off
	v_cmpx_gt_i32_e64 s2, v4
	s_cbranch_execz .LBB0_3
; %bb.2:
	global_load_b32 v8, v[2:3], off offset:512
.LBB0_3:
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v7, 0x100, v1
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v7
	s_cbranch_execz .LBB0_5
; %bb.4:
	global_load_b32 v5, v[2:3], off offset:1024
.LBB0_5:
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v9, 0x180, v1
	v_mov_b32_e32 v10, 0x7f800000
	v_mov_b32_e32 v12, 0x7f800000
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_gt_i32_e64 s2, v9
	s_cbranch_execz .LBB0_7
; %bb.6:
	global_load_b32 v12, v[2:3], off offset:1536
.LBB0_7:
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v11, 0x200, v1
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v11
	s_cbranch_execz .LBB0_9
; %bb.8:
	global_load_b32 v10, v[2:3], off offset:2048
.LBB0_9:
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v13, 0x280, v1
	v_mov_b32_e32 v14, 0x7f800000
	v_mov_b32_e32 v16, 0x7f800000
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_gt_i32_e64 s2, v13
	s_cbranch_execz .LBB0_11
; %bb.10:
	global_load_b32 v16, v[2:3], off offset:2560
.LBB0_11:
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v15, 0x300, v1
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v15
	s_cbranch_execz .LBB0_13
; %bb.12:
	global_load_b32 v14, v[2:3], off offset:3072
.LBB0_13:
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v17, 0x380, v1
	v_mov_b32_e32 v18, 0x7f800000
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s2, v17
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_15
; %bb.14:
	global_load_b32 v18, v[2:3], off offset:3584
.LBB0_15:
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_cmp_neq_f32_e32 vcc_lo, 0, v8
	v_cmp_neq_f32_e64 s2, 0, v5
	v_cndmask_b32_e32 v2, 0x7f800000, v8, vcc_lo
	v_cmp_neq_f32_e32 vcc_lo, 0, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, 0x7f800000, v5, s2
	v_cmp_neq_f32_e64 s2, 0, v12
	v_cndmask_b32_e32 v3, 0x7f800000, v6, vcc_lo
	v_cmp_lt_f32_e32 vcc_lo, v2, v3
	v_dual_cndmask_b32 v1, v1, v4 :: v_dual_cndmask_b32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v3, 0x7f800000, v12, s2
	v_cmp_neq_f32_e64 s2, 0, v10
	v_cmp_lt_f32_e32 vcc_lo, v5, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, 0x7f800000, v10, s2
	v_cmp_neq_f32_e64 s2, 0, v16
	v_dual_cndmask_b32 v1, v1, v7 :: v_dual_cndmask_b32 v2, v2, v5
	v_cmp_lt_f32_e32 vcc_lo, v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v2, v2, v3
	v_cndmask_b32_e64 v3, 0x7f800000, v16, s2
	v_cmp_neq_f32_e64 s2, 0, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_lt_f32_e32 vcc_lo, v4, v2
	v_dual_cndmask_b32 v1, v1, v11 :: v_dual_cndmask_b32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v4, 0x7f800000, v14, s2
	v_cmp_neq_f32_e64 s2, 0, v18
	v_cmp_lt_f32_e32 vcc_lo, v3, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v1, v1, v13 :: v_dual_cndmask_b32 v2, v2, v3
	v_cndmask_b32_e64 v3, 0x7f800000, v18, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_f32_e32 vcc_lo, v4, v2
	v_dual_cndmask_b32 v1, v1, v15 :: v_dual_cndmask_b32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e32 vcc_lo, v3, v2
	v_cndmask_b32_e32 v1, v1, v17, vcc_lo
	v_cndmask_b32_e32 v7, v2, v3, vcc_lo
.LBB0_16:                               ; %Flow272
	s_or_b32 exec_lo, exec_lo, s3
	v_lshlrev_b32_e32 v6, 2, v0
	v_cmp_gt_u32_e32 vcc_lo, 0x200, v0
	ds_store_2addr_stride64_b32 v6, v1, v7 offset1:2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_load_b32 s2, s[0:1], 0x34
	v_add_nc_u32_e32 v8, 0x200, v6
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmpk_gt_u32 s2, 0x3ff
	s_cselect_b32 s3, -1, 0
	s_and_b32 s4, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s4
	s_cbranch_execz .LBB0_20
; %bb.17:
	ds_load_2addr_stride64_b32 v[2:3], v8 offset1:8
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_f32_e32 v3, v2
	s_cbranch_execz .LBB0_19
; %bb.18:
	ds_load_b32 v1, v6 offset:2048
	v_mov_b32_e32 v7, v3
	ds_store_b32 v8, v3
	s_waitcnt lgkmcnt(1)
	ds_store_b32 v6, v1
.LBB0_19:                               ; %Flow271
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_20:
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_gt_u32_e32 vcc_lo, 0x100, v0
	s_cmpk_gt_u32 s2, 0x1ff
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s3, -1, 0
	s_barrier
	s_and_b32 s4, vcc_lo, s3
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s4
	s_cbranch_execz .LBB0_24
; %bb.21:
	ds_load_2addr_stride64_b32 v[2:3], v8 offset1:4
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_f32_e32 v3, v2
	s_cbranch_execz .LBB0_23
; %bb.22:
	ds_load_b32 v1, v6 offset:1024
	v_mov_b32_e32 v7, v3
	ds_store_b32 v8, v3
	s_waitcnt lgkmcnt(1)
	ds_store_b32 v6, v1
.LBB0_23:                               ; %Flow270
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_24:
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_gt_u32_e32 vcc_lo, 0x80, v0
	s_cmpk_gt_u32 s2, 0xff
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s3, -1, 0
	s_barrier
	s_and_b32 s4, vcc_lo, s3
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s4
	s_cbranch_execz .LBB0_28
; %bb.25:
	ds_load_2addr_stride64_b32 v[2:3], v8 offset1:2
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_f32_e32 v3, v2
	s_cbranch_execz .LBB0_27
; %bb.26:
	ds_store_b32 v8, v3
	ds_load_b32 v1, v6 offset:512
	v_mov_b32_e32 v7, v3
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v6, v1
.LBB0_27:                               ; %Flow269
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_28:
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_gt_u32_e32 vcc_lo, 64, v0
	s_cmpk_gt_u32 s2, 0x7f
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s2, -1, 0
	s_barrier
	s_and_b32 s3, vcc_lo, s2
	buffer_gl0_inv
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB0_32
; %bb.29:
	ds_load_2addr_stride64_b32 v[2:3], v8 offset1:1
	s_mov_b32 s3, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_f32_e32 v3, v2
	s_cbranch_execz .LBB0_31
; %bb.30:
	ds_load_b32 v1, v6 offset:256
	v_mov_b32_e32 v7, v3
	ds_store_b32 v8, v3
	s_waitcnt lgkmcnt(1)
	ds_store_b32 v6, v1
.LBB0_31:                               ; %Flow268
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_32:
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB0_46
; %bb.33:
	v_or_b32_e32 v9, 32, v0
	s_mov_b64 s[2:3], src_shared_base
	v_cmp_ne_u32_e64 s2, -1, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v2, v9, 2, 0x200
	v_cndmask_b32_e64 v3, 0, s3, s2
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, -1, v2
	v_cndmask_b32_e32 v4, 0, v2, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	v_cndmask_b32_e64 v2, 0, v8, s2
	s_mov_b32 s2, exec_lo
	flat_load_b32 v10, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v11, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_f32_e32 v10, v11
	s_cbranch_execz .LBB0_35
; %bb.34:
	flat_load_b32 v7, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v1, 2, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	v_cndmask_b32_e32 v4, 0, v1, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[2:3], v7 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e32 v4, 0, v6, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_35:
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v4, 64, v8
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	flat_load_b32 v9, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v10, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_f32_e32 v9, v10
	s_cbranch_execz .LBB0_37
; %bb.36:
	flat_load_b32 v7, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 64, v6
	s_mov_b64 s[10:11], src_shared_base
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	v_cndmask_b32_e32 v4, 0, v1, vcc_lo
	v_cndmask_b32_e64 v5, 0, s11, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[2:3], v7 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v5, 0, s11, vcc_lo
	v_cndmask_b32_e32 v4, 0, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_37:
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v4, 32, v8
	s_mov_b64 s[2:3], src_shared_base
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	flat_load_b32 v9, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v10, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_f32_e32 v9, v10
	s_cbranch_execz .LBB0_39
; %bb.38:
	flat_load_b32 v7, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 32, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	v_cndmask_b32_e32 v4, 0, v1, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[2:3], v7 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	v_cndmask_b32_e32 v4, 0, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_39:
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v4, 16, v8
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	flat_load_b32 v9, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v10, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_f32_e32 v9, v10
	s_cbranch_execz .LBB0_41
; %bb.40:
	flat_load_b32 v7, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 16, v6
	s_mov_b64 s[10:11], src_shared_base
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	v_cndmask_b32_e32 v4, 0, v1, vcc_lo
	v_cndmask_b32_e64 v5, 0, s11, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[2:3], v7 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v5, 0, s11, vcc_lo
	v_cndmask_b32_e32 v4, 0, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_41:
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v4, 8, v8
	s_mov_b64 s[2:3], src_shared_base
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	flat_load_b32 v9, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v10, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_f32_e32 v9, v10
	s_cbranch_execz .LBB0_43
; %bb.42:
	flat_load_b32 v7, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 8, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	v_cndmask_b32_e32 v4, 0, v1, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[2:3], v7 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	v_cndmask_b32_e32 v4, 0, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[4:5], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_43:
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v4, 4, v8
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_cndmask_b32_e64 v5, 0, s3, vcc_lo
	flat_load_b32 v8, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v9, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_lt_f32_e32 v8, v9
	s_cbranch_execz .LBB0_45
; %bb.44:
	flat_load_b32 v7, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, 4, v6
	s_mov_b64 s[10:11], src_shared_base
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	v_cndmask_b32_e32 v4, 0, v1, vcc_lo
	v_cndmask_b32_e64 v5, 0, s11, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[2:3], v7 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v3, 0, s11, vcc_lo
	v_cndmask_b32_e32 v2, 0, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[2:3], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_45:                               ; %Flow266
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_46:                               ; %Flow267
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_50
; %bb.47:
	s_load_b128 s[0:3], s[0:1], 0x18
	s_ashr_i32 s9, s8, 31
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[4:5], s[8:9], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s4
	s_addc_u32 s1, s1, s5
	s_cmp_eq_u64 s[6:7], 0
	global_store_b32 v0, v7, s[0:1]
	s_cbranch_scc1 .LBB0_49
; %bb.48:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
.LBB0_49:
	s_add_u32 s0, s2, s4
	s_addc_u32 s1, s3, s5
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB0_50:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6getMinPfPiiS_S0_
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6getMinPfPiiS_S0_, .Lfunc_end0-_Z6getMinPfPiiS_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2376
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6updatePfiiiii        ; -- Begin function _Z6updatePfiiiii
	.globl	_Z6updatePfiiiii
	.p2align	8
	.type	_Z6updatePfiiiii,@function
_Z6updatePfiiiii:                       ; @_Z6updatePfiiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s4, v1
	v_cmp_ne_u32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_6
; %bb.1:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x18
	s_load_b64 s[0:1], s[0:1], 0x0
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr0
	v_cmpx_ne_u32_e64 s6, v1
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB1_3
; %bb.2:
	v_mad_u64_u32 v[2:3], null, s6, s4, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_i32_e32 v7, s3
	v_cvt_f32_i32_e32 v8, s7
	v_mul_lo_u32 v12, v1, s4
	s_add_i32 s3, s3, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v9, s3
	v_mad_u64_u32 v[4:5], null, s5, s4, v[1:2]
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	s_clause 0x1
	global_load_b32 v0, v[2:3], off
	global_load_b32 v6, v[4:5], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v7, v0, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v6, v8
	v_div_scale_f32 v6, null, v9, v9, v7
	v_div_scale_f32 v10, vcc_lo, v7, v9, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v8, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v0, -v6, v8, 1.0
	v_fmac_f32_e32 v8, v0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v11, v10, v8
	v_fma_f32 v0, -v6, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v11, v0, v8
	v_add_nc_u32_e32 v0, s5, v12
	v_fma_f32 v6, -v6, v11, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_div_fmas_f32 v6, v6, v8, v11
	v_mov_b32_e32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_div_fixup_f32 v9, v6, v9, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v1, vcc_lo
	v_add_nc_u32_e32 v0, s6, v12
	s_clause 0x2
	global_store_b32 v[4:5], v9, off
	global_store_b32 v[2:3], v8, off
	global_store_b32 v[6:7], v9, off
.LBB1_3:                                ; %Flow
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB1_5
; %bb.4:
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_i32 s8, s3, s6
	s_mul_i32 s3, s6, s4
	s_ashr_i32 s9, s8, 31
	s_lshl_b64 s[8:9], s[8:9], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s6, s0, s8
	s_addc_u32 s7, s1, s9
	s_add_i32 s3, s3, s5
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s3
	global_store_b32 v1, v1, s[6:7]
.LBB1_5:                                ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s2
	v_ashrrev_i32_e32 v1, 31, v0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB1_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6updatePfiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z6updatePfiiiii, .Lfunc_end1-_Z6updatePfiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 556
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6getMinPfPiiS_S0_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6getMinPfPiiS_S0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6updatePfiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6updatePfiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
