#pragma once
#include <cuda.h>
#include <stdio.h>

// conjugate gradient solver. by SKH.

#define GPU_SOLVER_MAX_ITER 3000
#define GPU_SOLVER_EPS 0.01
#define BLOCK_SIZE 512


__device__ float dot(float* a, float *b, int n)
{
	float ret = 0;
	for(int i=0;i<n;i++)
	{
		ret += a[i] * b[i];
	}
	return ret;
}

__global__ void gpuCGSolve(float* A, float* x, float* b,
							float* d, float* r, float* q,
							int n)
{

	int id = blockIdx.x *BLOCK_SIZE + threadIdx.x;
	
	if(id < n)
	{
		int i = 0;
		float alpha, beta, deltaOld, delta0, deltaNew;
		float _b = b[id];

		r[id] = _b - dot(&A[id * n], x, n);
		d[id] = r[id];
	
		__syncthreads();

		deltaNew = dot(r,r,n);
		delta0 = deltaNew;

		while(i<GPU_SOLVER_MAX_ITER && deltaNew > (GPU_SOLVER_EPS * GPU_SOLVER_EPS) * delta0)
		{
			q[id] = dot(&A[id * n],d,n);

			__syncthreads();
		
			alpha = (deltaNew)/dot(d,q,n);
			x[id] += alpha * d[id];

			__syncthreads();

			if(i%50)
			{
				r[id] = _b - dot(&A[id * n], x,n);
			}
			else
			{
				r[id] -= alpha * q[id];
			}

			deltaOld = deltaNew;
			deltaNew = dot(r,r,n);
			beta = deltaNew/deltaOld;

			d[id] = r[id] + beta * d[id];

			i++;

			__syncthreads();

		}
	}
}

void CGSolverGPU(float* A, float* x, float* b, int n)
{
	float *gpu_A, *gpu_x, *gpu_b,
			*gpu_d, *gpu_r, *gpu_q;

	int ARR_SIZE = sizeof(float) * n;

	//performance testing/////////////////////////
	cudaEvent_t start, stop;
	cudaEventCreate(&start);
	cudaEventCreate(&stop);
	cudaEventRecord(start,0);
	//end///////////////////////////////////////////

	cudaMalloc(&gpu_A, sizeof(float) * n * n);

	cudaMemcpy(gpu_A, A, sizeof(float) * n * n, cudaMemcpyHostToDevice);


	cudaMalloc(&gpu_x, ARR_SIZE);
	cudaMalloc(&gpu_b, ARR_SIZE);
	cudaMemcpy(gpu_x, x, ARR_SIZE, cudaMemcpyHostToDevice);
	cudaMemcpy(gpu_b, b, ARR_SIZE, cudaMemcpyHostToDevice);

	cudaMalloc(&gpu_d, ARR_SIZE);
	cudaMalloc(&gpu_r, ARR_SIZE);
	cudaMalloc(&gpu_q, ARR_SIZE);

	int no_blocks = (n + BLOCK_SIZE - 1)/BLOCK_SIZE;

	gpuCGSolve <<<no_blocks, BLOCK_SIZE>>> (gpu_A, gpu_x, gpu_b, gpu_d, gpu_r, gpu_q, n);

	cudaMemcpy(x, gpu_x, ARR_SIZE, cudaMemcpyDeviceToHost);

	cudaFree(gpu_A);
	cudaFree(gpu_x);
	cudaFree(gpu_b);
	cudaFree(gpu_d);
	cudaFree(gpu_r);

	//performance testing///////////////////////
	cudaEventRecord(stop, 0);
	cudaEventSynchronize(stop);

	float timing;
	cudaEventElapsedTime( &timing, start, stop );

	printf("Time taken %.4f ms\n",timing);

	cudaEventDestroy(start);
	cudaEventDestroy(stop);
	//end//////////////////////////////////////////
}

	.file	"tmpxft_0029ebd9_00000000-6_CudaCGKernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z3dotPfS_i
	.type	_Z3dotPfS_i, @function
_Z3dotPfS_i:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z3dotPfS_i, .-_Z3dotPfS_i
	.globl	_Z41__device_stub__Z10gpuCGSolvePfS_S_S_S_S_iPfS_S_S_S_S_i
	.type	_Z41__device_stub__Z10gpuCGSolvePfS_S_S_S_S_iPfS_S_S_S_S_i, @function
_Z41__device_stub__Z10gpuCGSolvePfS_S_S_S_S_iPfS_S_S_S_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movq	%rsp, %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z10gpuCGSolvePfS_S_S_S_S_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L4:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z41__device_stub__Z10gpuCGSolvePfS_S_S_S_S_iPfS_S_S_S_S_i, .-_Z41__device_stub__Z10gpuCGSolvePfS_S_S_S_S_iPfS_S_S_S_S_i
	.globl	_Z10gpuCGSolvePfS_S_S_S_S_i
	.type	_Z10gpuCGSolvePfS_S_S_S_S_i, @function
_Z10gpuCGSolvePfS_S_S_S_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z10gpuCGSolvePfS_S_S_S_S_iPfS_S_S_S_S_i
	.cfi_endproc
.LFE2054:
	.size	_Z10gpuCGSolvePfS_S_S_S_S_i, .-_Z10gpuCGSolvePfS_S_S_S_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Time taken %.4f ms\n"
	.text
	.globl	_Z11CGSolverGPUPfS_S_i
	.type	_Z11CGSolverGPUPfS_S_i, @function
_Z11CGSolverGPUPfS_S_i:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movslq	%ecx, %rbx
	movq	%rbx, %rbp
	imulq	%rbx, %rbx
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	48(%rsp), %rdi
	salq	$2, %rbx
	call	cudaEventCreate@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	%rbx, %rsi
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	movq	%rbx, %rdx
	movq	(%rsp), %rdi
	movq	%r14, %rsi
	leal	0(,%rbp,4), %ebx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movslq	%ebx, %rbx
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movl	$512, %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	leal	511(%rbp), %eax
	movl	$8388609, %ecx
	movl	$1, 84(%rsp)
	cltd
	salq	$9, %rcx
	idivl	%esi
	movq	%rcx, 76(%rsp)
	movq	%rcx, %rdx
	movl	$1, %ecx
	movl	%eax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 68(%rsp)
	movq	64(%rsp), %rdi
	movl	72(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	%rax
	.cfi_def_cfa_offset 152
	pushq	%rbp
	.cfi_def_cfa_offset 160
	movq	56(%rsp), %r9
	movq	48(%rsp), %r8
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z41__device_stub__Z10gpuCGSolvePfS_S_S_S_S_iPfS_S_S_S_S_i
	popq	%rdx
	.cfi_def_cfa_offset 152
	popq	%rcx
	.cfi_def_cfa_offset 144
.L11:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	76(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	76(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	48(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	56(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$96, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z11CGSolverGPUPfS_S_i, .-_Z11CGSolverGPUPfS_S_i
	.section	.rodata.str1.1
.LC1:
	.string	"_Z10gpuCGSolvePfS_S_S_S_S_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10gpuCGSolvePfS_S_S_S_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#pragma once
#include <hip/hip_runtime.h>
#include <stdio.h>

// conjugate gradient solver. by SKH.

#define GPU_SOLVER_MAX_ITER 3000
#define GPU_SOLVER_EPS 0.01
#define BLOCK_SIZE 512


__device__ float dot(float* a, float *b, int n)
{
	float ret = 0;
	for(int i=0;i<n;i++)
	{
		ret += a[i] * b[i];
	}
	return ret;
}

__global__ void gpuCGSolve(float* A, float* x, float* b,
							float* d, float* r, float* q,
							int n)
{

	int id = blockIdx.x *BLOCK_SIZE + threadIdx.x;
	
	if(id < n)
	{
		int i = 0;
		float alpha, beta, deltaOld, delta0, deltaNew;
		float _b = b[id];

		r[id] = _b - dot(&A[id * n], x, n);
		d[id] = r[id];
	
		__syncthreads();

		deltaNew = dot(r,r,n);
		delta0 = deltaNew;

		while(i<GPU_SOLVER_MAX_ITER && deltaNew > (GPU_SOLVER_EPS * GPU_SOLVER_EPS) * delta0)
		{
			q[id] = dot(&A[id * n],d,n);

			__syncthreads();
		
			alpha = (deltaNew)/dot(d,q,n);
			x[id] += alpha * d[id];

			__syncthreads();

			if(i%50)
			{
				r[id] = _b - dot(&A[id * n], x,n);
			}
			else
			{
				r[id] -= alpha * q[id];
			}

			deltaOld = deltaNew;
			deltaNew = dot(r,r,n);
			beta = deltaNew/deltaOld;

			d[id] = r[id] + beta * d[id];

			i++;

			__syncthreads();

		}
	}
}

void CGSolverGPU(float* A, float* x, float* b, int n)
{
	float *gpu_A, *gpu_x, *gpu_b,
			*gpu_d, *gpu_r, *gpu_q;

	int ARR_SIZE = sizeof(float) * n;

	//performance testing/////////////////////////
	hipEvent_t start, stop;
	hipEventCreate(&start);
	hipEventCreate(&stop);
	hipEventRecord(start,0);
	//end///////////////////////////////////////////

	hipMalloc(&gpu_A, sizeof(float) * n * n);

	hipMemcpy(gpu_A, A, sizeof(float) * n * n, hipMemcpyHostToDevice);


	hipMalloc(&gpu_x, ARR_SIZE);
	hipMalloc(&gpu_b, ARR_SIZE);
	hipMemcpy(gpu_x, x, ARR_SIZE, hipMemcpyHostToDevice);
	hipMemcpy(gpu_b, b, ARR_SIZE, hipMemcpyHostToDevice);

	hipMalloc(&gpu_d, ARR_SIZE);
	hipMalloc(&gpu_r, ARR_SIZE);
	hipMalloc(&gpu_q, ARR_SIZE);

	int no_blocks = (n + BLOCK_SIZE - 1)/BLOCK_SIZE;

	gpuCGSolve <<<no_blocks, BLOCK_SIZE>>> (gpu_A, gpu_x, gpu_b, gpu_d, gpu_r, gpu_q, n);

	hipMemcpy(x, gpu_x, ARR_SIZE, hipMemcpyDeviceToHost);

	hipFree(gpu_A);
	hipFree(gpu_x);
	hipFree(gpu_b);
	hipFree(gpu_d);
	hipFree(gpu_r);

	//performance testing///////////////////////
	hipEventRecord(stop, 0);
	hipEventSynchronize(stop);

	float timing;
	hipEventElapsedTime( &timing, start, stop );

	printf("Time taken %.4f ms\n",timing);

	hipEventDestroy(start);
	hipEventDestroy(stop);
	//end//////////////////////////////////////////
}

	.text
	.file	"CudaCGKernel.hip"
	.globl	_Z25__device_stub__gpuCGSolvePfS_S_S_S_S_i # -- Begin function _Z25__device_stub__gpuCGSolvePfS_S_S_S_S_i
	.type	_Z25__device_stub__gpuCGSolvePfS_S_S_S_S_i,@function
_Z25__device_stub__gpuCGSolvePfS_S_S_S_S_i: # @_Z25__device_stub__gpuCGSolvePfS_S_S_S_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10gpuCGSolvePfS_S_S_S_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__gpuCGSolvePfS_S_S_S_S_i, .Lfunc_end0-_Z25__device_stub__gpuCGSolvePfS_S_S_S_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z11CGSolverGPUPfS_S_i          # -- Begin function _Z11CGSolverGPUPfS_S_i
	.type	_Z11CGSolverGPUPfS_S_i,@function
_Z11CGSolverGPUPfS_S_i:                 # @_Z11CGSolverGPUPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %r12
	movq	%rsi, %rbx
	movq	%rdi, %r15
	movl	%ecx, 28(%rsp)                  # 4-byte Spill
	movslq	%ecx, %r14
	leaq	32(%rsp), %r13
	movq	%r13, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r13), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r14, %r13
	imulq	%r14, %r13
	shlq	$2, %r13
	leaq	64(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	%r15, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r14, %r15
	shlq	$34, %r15
	sarq	$32, %r15
	leaq	16(%rsp), %r13
	movq	%r13, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	56(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	%rbx, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	72(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leal	511(%r14), %eax
	addl	$1022, %r14d                    # imm = 0x3FE
	testl	%eax, %eax
	cmovnsl	%eax, %r14d
	sarl	$9, %r14d
	btsq	$32, %r14
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	64(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rcx
	movq	40(%rsp), %r8
	movq	72(%rsp), %r9
	movl	28(%rsp), %eax                  # 4-byte Reload
	movl	%eax, (%rsp)
	callq	_Z25__device_stub__gpuCGSolvePfS_S_S_S_S_i
.LBB1_2:
	movq	16(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	84(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movq	32(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z11CGSolverGPUPfS_S_i, .Lfunc_end1-_Z11CGSolverGPUPfS_S_i
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10gpuCGSolvePfS_S_S_S_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10gpuCGSolvePfS_S_S_S_S_i,@object # @_Z10gpuCGSolvePfS_S_S_S_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z10gpuCGSolvePfS_S_S_S_S_i
	.p2align	3, 0x0
_Z10gpuCGSolvePfS_S_S_S_S_i:
	.quad	_Z25__device_stub__gpuCGSolvePfS_S_S_S_S_i
	.size	_Z10gpuCGSolvePfS_S_S_S_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Time taken %.4f ms\n"
	.size	.L.str, 20

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10gpuCGSolvePfS_S_S_S_S_i"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__gpuCGSolvePfS_S_S_S_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10gpuCGSolvePfS_S_S_S_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10gpuCGSolvePfS_S_S_S_S_i ; -- Begin function _Z10gpuCGSolvePfS_S_S_S_S_i
	.globl	_Z10gpuCGSolvePfS_S_S_S_S_i
	.p2align	8
	.type	_Z10gpuCGSolvePfS_S_S_S_S_i,@function
_Z10gpuCGSolvePfS_S_S_S_S_i:            ; @_Z10gpuCGSolvePfS_S_S_S_S_i
; %bb.0:
	s_load_b32 s12, s[0:1], 0x30
	v_lshl_add_u32 v0, s15, 9, v0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v0
	s_cbranch_execz .LBB0_29
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_load_b128 s[0:3], s[0:1], 0x20
	v_mov_b32_e32 v4, 0
	s_cmp_gt_i32 s12, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[10:11], 2, v[0:1]
	v_mul_lo_u32 v0, v0, s12
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s8, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v11, vcc_lo
	s_cselect_b32 s8, -1, 0
	s_cmp_lt_i32 s12, 1
	global_load_b32 v14, v[1:2], off
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.i.preheader
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_mov_b64 s[4:5], s[6:7]
	s_mov_b32 s9, s12
.LBB0_3:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v5, v[2:3], off
	s_load_b32 s13, s[4:5], 0x0
	v_add_co_u32 v2, vcc_lo, v2, 4
	s_add_i32 s9, s9, -1
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s9, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v4, s13, v5
	s_cbranch_scc1 .LBB0_3
.LBB0_4:                                ; %_Z3dotPfS_i.exit
	v_add_co_u32 v2, vcc_lo, s0, v10
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v11, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v6, v14, v4
	v_add_co_u32 v4, vcc_lo, s10, v10
	v_cndmask_b32_e64 v15, 0, 1, s8
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v11, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s8
	global_store_b32 v[2:3], v6, off
	global_store_b32 v[4:5], v6, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_7
; %bb.5:                                ; %.lr.ph.i76.preheader
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v16, 0
	s_mov_b64 s[4:5], s[0:1]
	s_mov_b32 s8, s12
.LBB0_6:                                ; %.lr.ph.i76
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v7, v6, s[4:5]
	s_add_i32 s8, s8, -1
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s8, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v16, v7, v7
	s_cbranch_scc1 .LBB0_6
	s_branch .LBB0_8
.LBB0_7:
	v_mov_b32_e32 v16, 0
.LBB0_8:                                ; %_Z3dotPfS_i.exit80
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[6:7], v16
	s_mov_b32 s4, 0xeb1c432d
	s_mov_b32 s5, 0x3f1a36e2
	v_add_co_u32 v8, vcc_lo, s2, v10
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v11, vcc_lo
	v_add_co_u32 v10, vcc_lo, s6, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v11, vcc_lo
	v_mov_b32_e32 v17, 0
	s_mov_b32 s13, 0
	v_mul_f64 v[6:7], v[6:7], s[4:5]
.LBB0_9:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_12 Depth 2
                                        ;     Child Loop BB0_15 Depth 2
                                        ;     Child Loop BB0_19 Depth 2
                                        ;     Child Loop BB0_26 Depth 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[12:13], v16
	s_mov_b32 s4, -1
	v_cmp_nlt_f64_e32 vcc_lo, v[6:7], v[12:13]
                                        ; implicit-def: $vgpr13
	s_cbranch_vccnz .LBB0_28
; %bb.10:                               ;   in Loop: Header=BB0_9 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 1, v15
	v_mov_b32_e32 v18, 0
	s_cbranch_vccnz .LBB0_13
; %bb.11:                               ; %.lr.ph.i82.preheader
                                        ;   in Loop: Header=BB0_9 Depth=1
	v_dual_mov_b32 v13, v1 :: v_dual_mov_b32 v12, v0
	s_mov_b64 s[4:5], s[10:11]
	s_mov_b32 s8, s12
.LBB0_12:                               ; %.lr.ph.i82
                                        ;   Parent Loop BB0_9 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v19, v[12:13], off
	global_load_b32 v20, v17, s[4:5]
	v_add_co_u32 v12, vcc_lo, v12, 4
	s_add_i32 s8, s8, -1
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s8, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v18, v19, v20
	s_cbranch_scc1 .LBB0_12
.LBB0_13:                               ; %_Z3dotPfS_i.exit86
                                        ;   in Loop: Header=BB0_9 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 1, v15
	v_mov_b32_e32 v12, 0
	global_store_b32 v[8:9], v18, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_16
; %bb.14:                               ; %.lr.ph.i88.preheader
                                        ;   in Loop: Header=BB0_9 Depth=1
	s_mov_b64 s[4:5], s[2:3]
	s_mov_b64 s[8:9], s[10:11]
	s_mov_b32 s14, s12
.LBB0_15:                               ; %.lr.ph.i88
                                        ;   Parent Loop BB0_9 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_clause 0x1
	global_load_b32 v13, v17, s[8:9]
	global_load_b32 v18, v17, s[4:5]
	s_add_i32 s14, s14, -1
	s_add_u32 s8, s8, 4
	s_addc_u32 s9, s9, 0
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s14, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v12, v13, v18
	s_cbranch_scc1 .LBB0_15
.LBB0_16:                               ; %_Z3dotPfS_i.exit92
                                        ;   in Loop: Header=BB0_9 Depth=1
	global_load_b32 v13, v[4:5], off
	global_load_b32 v19, v[10:11], off
	v_div_scale_f32 v18, null, v12, v12, v16
	v_div_scale_f32 v22, vcc_lo, v16, v12, v16
	s_mul_i32 s4, s13, 0xc28f5c29
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v20, v18
	s_waitcnt_depctr 0xfff
	v_fma_f32 v21, -v18, v20, 1.0
	v_fmac_f32_e32 v20, v21, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v21, v22, v20
	v_fma_f32 v23, -v18, v21, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v21, v23, v20
	v_fma_f32 v18, -v18, v21, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v18, v18, v20, v21
	v_alignbit_b32 v20, s4, s4, 1
	v_div_fixup_f32 v18, v18, v12, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, 0x51eb852, v20
	s_and_b32 vcc_lo, exec_lo, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v19, v18, v13
	global_store_b32 v[10:11], v19, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_21
; %bb.17:                               ;   in Loop: Header=BB0_9 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 1, v15
	v_mov_b32_e32 v19, 0
	s_cbranch_vccnz .LBB0_20
; %bb.18:                               ; %.lr.ph.i94.preheader
                                        ;   in Loop: Header=BB0_9 Depth=1
	v_dual_mov_b32 v13, v1 :: v_dual_mov_b32 v12, v0
	s_mov_b64 s[4:5], s[6:7]
	s_mov_b32 s8, s12
.LBB0_19:                               ; %.lr.ph.i94
                                        ;   Parent Loop BB0_9 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v20, v[12:13], off
	global_load_b32 v21, v17, s[4:5]
	v_add_co_u32 v12, vcc_lo, v12, 4
	s_add_i32 s8, s8, -1
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s8, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v19, v20, v21
	s_cbranch_scc1 .LBB0_19
.LBB0_20:                               ; %_Z3dotPfS_i.exit98
                                        ;   in Loop: Header=BB0_9 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_f32_e32 v12, v14, v19
	s_mov_b32 s4, 0
	s_branch .LBB0_22
.LBB0_21:                               ;   in Loop: Header=BB0_9 Depth=1
	s_mov_b32 s4, -1
                                        ; implicit-def: $vgpr12
.LBB0_22:                               ; %Flow193
                                        ;   in Loop: Header=BB0_9 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccz .LBB0_24
; %bb.23:                               ;   in Loop: Header=BB0_9 Depth=1
	global_load_b32 v12, v[8:9], off
	global_load_b32 v13, v[2:3], off
	s_waitcnt vmcnt(0)
	v_fma_f32 v12, -v18, v12, v13
.LBB0_24:                               ;   in Loop: Header=BB0_9 Depth=1
	v_cmp_ne_u32_e32 vcc_lo, 1, v15
	v_mov_b32_e32 v13, 0
	global_store_b32 v[2:3], v12, off
	s_cbranch_vccnz .LBB0_27
; %bb.25:                               ; %.lr.ph.i100.preheader
                                        ;   in Loop: Header=BB0_9 Depth=1
	s_mov_b64 s[4:5], s[0:1]
	s_mov_b32 s8, s12
.LBB0_26:                               ; %.lr.ph.i100
                                        ;   Parent Loop BB0_9 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v18, v17, s[4:5]
	s_add_i32 s8, s8, -1
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s8, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v13, v18, v18
	s_cbranch_scc1 .LBB0_26
.LBB0_27:                               ; %_Z3dotPfS_i.exit104
                                        ;   in Loop: Header=BB0_9 Depth=1
	global_load_b32 v18, v[4:5], off
	v_div_scale_f32 v19, null, v16, v16, v13
	v_div_scale_f32 v22, vcc_lo, v13, v16, v13
	s_add_i32 s13, s13, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v20, v19
	s_cmpk_eq_i32 s13, 0xbb8
	s_cselect_b32 s4, -1, 0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v21, -v19, v20, 1.0
	v_fmac_f32_e32 v20, v21, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v21, v22, v20
	v_fma_f32 v23, -v19, v21, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v21, v23, v20
	v_fma_f32 v19, -v19, v21, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v19, v19, v20, v21
	v_div_fixup_f32 v16, v19, v16, v13
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v12, v16, v18
	global_store_b32 v[4:5], v12, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB0_28:                               ; %Flow198
                                        ;   in Loop: Header=BB0_9 Depth=1
	v_mov_b32_e32 v16, v13
	s_and_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccz .LBB0_9
.LBB0_29:                               ; %.critedge
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10gpuCGSolvePfS_S_S_S_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 52
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10gpuCGSolvePfS_S_S_S_S_i, .Lfunc_end0-_Z10gpuCGSolvePfS_S_S_S_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1192
; NumSgprs: 18
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 52
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10gpuCGSolvePfS_S_S_S_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10gpuCGSolvePfS_S_S_S_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     24
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
