#include <stdio.h>
#include <cuda_runtime.h>

#define CHECK(call) {                                                        \
    const cudaError_t error = call;                                          \
    if (error != cudaSuccess) {                                              \
        printf("Error: %s:%d, ", __FILE__, __LINE__);                        \
        printf("code: %d, reason: %s\n", error, cudaGetErrorString(error));  \
        exit(1);                                                             \
    }                                                                        \
}                                                                            \

#define BDIMX 32
#define BDIMY 16
#define PADDING 2 // with 1-padding, there will still be 2-way conflict (analyze yourself~)

void printData(const char *msg, int *data, const int size);

__global__ void writeRowReadRow(int *out);
__global__ void writeColReadCol(int *out);
__global__ void writeColReadColT(int *out);
__global__ void writeRowReadCol(int *out);
__global__ void writeColReadRow(int *out);

__global__ void writeRowReadRowDynamic(int *out);
__global__ void writeColReadColDynamic(int *out);

__global__ void writeColReadColPad(int *out);
__global__ void writeColReadColDynamicPad(int *out);

int main(int argc, char **argv) {
    // set up device
    int dev = 0;
    cudaDeviceProp deviceProp; 
    CHECK(cudaGetDeviceProperties(&deviceProp, dev)); 
    printf("Using Device %d: %s\n", dev, deviceProp.name); 
    CHECK(cudaSetDevice(dev));

    cudaSharedMemConfig pConfig;
    CHECK(cudaDeviceGetSharedMemConfig(&pConfig));
    printf("Shared memory bank width: %s\n", pConfig == 1 ? "4-Byte" : "8-Byte");

    // allocate memory
    size_t nBytes = BDIMX * BDIMX * sizeof(int);
    int *d_out;
    CHECK(cudaMalloc((int**)&d_out, nBytes));
    int *h_out  = (int*)malloc(nBytes);

    dim3 block(BDIMX, BDIMY);
    dim3 grid(1, 1);
    bool ifprint = 0; // print result or not
    if (argc > 1) ifprint = atoi(argv[1]);

    CHECK(cudaMemset(d_out, 0, nBytes));
    memset(h_out, 0, nBytes);
    writeRowReadRow<<<grid, block>>>(d_out);
    CHECK(cudaMemcpy(h_out, d_out, nBytes, cudaMemcpyDeviceToHost));
    if (ifprint) printData("write row read row:\n", h_out, BDIMX * BDIMY);
    CHECK(cudaGetLastError());

    CHECK(cudaMemset(d_out, 0, nBytes));
    memset(h_out, 0, nBytes);
    writeColReadCol<<<grid, block>>>(d_out);
    CHECK(cudaMemcpy(h_out, d_out, nBytes, cudaMemcpyDeviceToHost));
    if (ifprint) printData("write col read col:\n", h_out, BDIMX * BDIMY);
    CHECK(cudaGetLastError());

    CHECK(cudaMemset(d_out, 0, nBytes));
    memset(h_out, 0, nBytes);
    writeColReadColT<<<grid, block>>>(d_out);
    CHECK(cudaMemcpy(h_out, d_out, nBytes, cudaMemcpyDeviceToHost));
    if (ifprint) printData("write col read col; transpose:\n", h_out, BDIMX * BDIMY);
    CHECK(cudaGetLastError());

    CHECK(cudaMemset(d_out, 0, nBytes));
    memset(h_out, 0, nBytes);
    writeRowReadCol<<<grid, block>>>(d_out);
    CHECK(cudaMemcpy(h_out, d_out, nBytes, cudaMemcpyDeviceToHost));
    if (ifprint) printData("write row read col:\n", h_out, BDIMX * BDIMY);
    CHECK(cudaGetLastError());

    CHECK(cudaMemset(d_out, 0, nBytes));
    memset(h_out, 0, nBytes);
    writeColReadRow<<<grid, block>>>(d_out);
    CHECK(cudaMemcpy(h_out, d_out, nBytes, cudaMemcpyDeviceToHost));
    if (ifprint) printData("write col read row:\n", h_out, BDIMX * BDIMY);
    CHECK(cudaGetLastError());

    CHECK(cudaMemset(d_out, 0, nBytes));
    memset(h_out, 0, nBytes);
    writeRowReadRowDynamic<<<grid, block, nBytes>>>(d_out);
    CHECK(cudaMemcpy(h_out, d_out, nBytes, cudaMemcpyDeviceToHost));
    if (ifprint) printData("write row read row; dynamic:\n", h_out, BDIMX * BDIMY);
    CHECK(cudaGetLastError());

    CHECK(cudaMemset(d_out, 0, nBytes));
    memset(h_out, 0, nBytes);
    writeColReadColDynamic<<<grid, block, nBytes>>>(d_out);
    CHECK(cudaMemcpy(h_out, d_out, nBytes, cudaMemcpyDeviceToHost));
    if (ifprint) printData("write col read col; dynamic:\n", h_out, BDIMX * BDIMY);
    CHECK(cudaGetLastError());

    CHECK(cudaMemset(d_out, 0, nBytes));
    memset(h_out, 0, nBytes);
    writeColReadColPad<<<grid, block, nBytes>>>(d_out);
    CHECK(cudaMemcpy(h_out, d_out, nBytes, cudaMemcpyDeviceToHost));
    if (ifprint) printData("write col read col; padding:\n", h_out, BDIMX * BDIMY);
    CHECK(cudaGetLastError());

    CHECK(cudaMemset(d_out, 0, nBytes));
    memset(h_out, 0, nBytes);
    writeColReadColDynamicPad<<<grid, block, nBytes + PADDING*BDIMY*sizeof(int)>>>(d_out);
    CHECK(cudaMemcpy(h_out, d_out, nBytes, cudaMemcpyDeviceToHost));
    if (ifprint) printData("write col read col; dynamic + padding:\n", h_out, BDIMX * BDIMY);
    CHECK(cudaGetLastError());

    CHECK(cudaFree(d_out));
    CHECK(cudaDeviceReset());
    return 0;
}

/**********CUDA kernels**********/

__global__ void writeRowReadRow(int *out) {
    // static shared memory
    __shared__ int tile[BDIMY][BDIMX];

    // mapping from thread index to global memory index
    // assuming only one block
    int idx = threadIdx.y * blockDim.x + threadIdx.x;

    // shared memory store operation
    tile[threadIdx.y][threadIdx.x] = idx;

    // wait for all threads to complete
    __syncthreads();

    // shared memory load operation
    // global memory store operation
    out[idx] = tile[threadIdx.y][threadIdx.x] ;
}

__global__ void writeColReadCol(int *out) {
    // static shared memory
    __shared__ int tile[BDIMY][BDIMX];

    // mapping from thread index to global memory index
    // assuming only one block
    int idx = threadIdx.y * blockDim.x + threadIdx.x;

    // shared memory store operation
    int irow = idx % BDIMY;
    int icol = idx / BDIMY;
    tile[irow][icol] = idx;

    // wait for all threads to complete
    __syncthreads();

    // shared memory load operation
    // global memory store operation
    out[idx] = tile[irow][icol];
}

__global__ void writeColReadColT(int *out) {
    // static shared memory; transposed
    __shared__ int tile[BDIMX][BDIMY];

    // mapping from thread index to global memory index
    // assuming only one block
    int idx = threadIdx.y * blockDim.x + threadIdx.x;

    // shared memory store operation
    tile[threadIdx.x][threadIdx.y] = idx;

    // wait for all threads to complete
    __syncthreads();

    // shared memory load operation
    // global memory store operation
    out[idx] = tile[threadIdx.x][threadIdx.y];
}

__global__ void writeRowReadCol(int *out) {
    // static shared memory
    __shared__ int tile[BDIMY][BDIMX];

    // mapping from thread index to global memory index
    // assuming only one block
    int idx = threadIdx.y * blockDim.x + threadIdx.x;

    // shared memory store operation
    tile[threadIdx.y][threadIdx.x] = idx;

    // wait for all threads to complete
    __syncthreads();

    // shared memory load operation
    // global memory store operation
    int irow = idx % BDIMY;
    int icol = idx / BDIMY;
    out[idx] = tile[irow][icol];
}

__global__ void writeColReadRow(int *out) {
    // static shared memory
    __shared__ int tile[BDIMY][BDIMX];

    // mapping from thread index to global memory index
    // assuming only one block
    int idx = threadIdx.y * blockDim.x + threadIdx.x;

    // shared memory store operation
    int irow = idx % BDIMY;
    int icol = idx / BDIMY;
    tile[irow][icol] = idx;

    // wait for all threads to complete
    __syncthreads();

    // shared memory load operation
    // global memory store operation
    out[idx] = tile[threadIdx.y][threadIdx.x];
}

__global__ void writeRowReadRowDynamic(int *out) {
    // dynamic shared memory
    extern __shared__ int tile[];

    // mapping from thread index to global memory index
    // assuming only one block
    int idx = threadIdx.y * blockDim.x + threadIdx.x;

    // shared memory store operation
    tile[idx] = idx;

    // wait for all threads to complete
    __syncthreads();

    // shared memory load operation
    // global memory store operation
    out[idx] = tile[idx];
}

__global__ void writeColReadColDynamic(int *out) {
    // dynamic shared memory
    extern __shared__ int tile[];

    // mapping from thread index to global memory index
    // assuming only one block
    int idx = threadIdx.y * blockDim.x + threadIdx.x;

    // shared memory store operation
    int irow = idx % BDIMY;
    int icol = idx / BDIMY;
    int colIdx = irow * BDIMX + icol; // col-based index
    tile[colIdx] = idx;

    // wait for all threads to complete
    __syncthreads();

    // shared memory load operation
    // global memory store operation
    out[idx] = tile[colIdx];
}

__global__ void writeColReadColPad(int *out) {
    // static shared memory with memory padding
    __shared__ int tile[BDIMY][BDIMX + PADDING];

    // mapping from thread index to global memory index
    // assuming only one block
    int idx = threadIdx.y * blockDim.x + threadIdx.x;

    // shared memory store operation
    int irow = idx % BDIMY;
    int icol = idx / BDIMY;
    tile[irow][icol] = idx;

    // wait for all threads to complete
    __syncthreads();

    // shared memory load operation
    // global memory store operation
    out[idx] = tile[irow][icol];
}

__global__ void writeColReadColDynamicPad(int *out) {
    // dynamic shared memory
    extern __shared__ int tile[];

    // mapping from thread index to global memory index
    // assuming only one block
    int idx = threadIdx.y * blockDim.x + threadIdx.x;

    // shared memory store operation
    int irow = idx % BDIMY;
    int icol = idx / BDIMY;
    int colIdx = irow * (BDIMX + PADDING) + icol; // col-based index
    tile[colIdx] = idx;

    // wait for all threads to complete
    __syncthreads();

    // shared memory load operation
    // global memory store operation
    out[idx] = tile[colIdx];
}

/**********host functions**********/

void printData(const char *msg, int *data, const int size) {
    printf("%s: ", msg);

    for (int i = 0; i < size; i++) {
        printf("%d ", data[i]);
        fflush(stdout);
    }

    printf("\n\n");
    return;
}
	.file	"tmpxft_0022a9ad_00000000-6_sharedMemRect.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%s: "
.LC1:
	.string	"%d "
.LC2:
	.string	"\n\n"
	.text
	.globl	_Z9printDataPKcPii
	.type	_Z9printDataPKcPii, @function
_Z9printDataPKcPii:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xorl	%eax, %eax
	leaq	.LC1(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	leaq	.LC0(%rip), %rsi
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%edx, %ebp
	movq	%rdi, %rdx
	movl	$2, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 48
	call	__printf_chk@PLT
.L3:
	cmpl	%ebx, %ebp
	jle	.L7
	movl	(%r12,%rbx,4), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	movq	stdout(%rip), %rdi
	call	fflush@PLT
	jmp	.L3
.L7:
	popq	%rdx
	.cfi_def_cfa_offset 40
	leaq	.LC2(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z9printDataPKcPii, .-_Z9printDataPKcPii
	.globl	_Z35__device_stub__Z15writeRowReadRowPiPi
	.type	_Z35__device_stub__Z15writeRowReadRowPiPi, @function
_Z35__device_stub__Z15writeRowReadRowPiPi:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z15writeRowReadRowPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L8:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z35__device_stub__Z15writeRowReadRowPiPi, .-_Z35__device_stub__Z15writeRowReadRowPiPi
	.globl	_Z15writeRowReadRowPi
	.type	_Z15writeRowReadRowPi, @function
_Z15writeRowReadRowPi:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z15writeRowReadRowPiPi
	.cfi_endproc
.LFE2054:
	.size	_Z15writeRowReadRowPi, .-_Z15writeRowReadRowPi
	.globl	_Z35__device_stub__Z15writeColReadColPiPi
	.type	_Z35__device_stub__Z15writeColReadColPiPi, @function
_Z35__device_stub__Z15writeColReadColPiPi:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z15writeColReadColPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L13:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z35__device_stub__Z15writeColReadColPiPi, .-_Z35__device_stub__Z15writeColReadColPiPi
	.globl	_Z15writeColReadColPi
	.type	_Z15writeColReadColPi, @function
_Z15writeColReadColPi:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z15writeColReadColPiPi
	.cfi_endproc
.LFE2056:
	.size	_Z15writeColReadColPi, .-_Z15writeColReadColPi
	.globl	_Z36__device_stub__Z16writeColReadColTPiPi
	.type	_Z36__device_stub__Z16writeColReadColTPiPi, @function
_Z36__device_stub__Z16writeColReadColTPiPi:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z16writeColReadColTPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L18:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z36__device_stub__Z16writeColReadColTPiPi, .-_Z36__device_stub__Z16writeColReadColTPiPi
	.globl	_Z16writeColReadColTPi
	.type	_Z16writeColReadColTPi, @function
_Z16writeColReadColTPi:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z16writeColReadColTPiPi
	.cfi_endproc
.LFE2058:
	.size	_Z16writeColReadColTPi, .-_Z16writeColReadColTPi
	.globl	_Z35__device_stub__Z15writeRowReadColPiPi
	.type	_Z35__device_stub__Z15writeRowReadColPiPi, @function
_Z35__device_stub__Z15writeRowReadColPiPi:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z15writeRowReadColPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L23:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z35__device_stub__Z15writeRowReadColPiPi, .-_Z35__device_stub__Z15writeRowReadColPiPi
	.globl	_Z15writeRowReadColPi
	.type	_Z15writeRowReadColPi, @function
_Z15writeRowReadColPi:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z15writeRowReadColPiPi
	.cfi_endproc
.LFE2060:
	.size	_Z15writeRowReadColPi, .-_Z15writeRowReadColPi
	.globl	_Z35__device_stub__Z15writeColReadRowPiPi
	.type	_Z35__device_stub__Z15writeColReadRowPiPi, @function
_Z35__device_stub__Z15writeColReadRowPiPi:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z15writeColReadRowPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L28:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z35__device_stub__Z15writeColReadRowPiPi, .-_Z35__device_stub__Z15writeColReadRowPiPi
	.globl	_Z15writeColReadRowPi
	.type	_Z15writeColReadRowPi, @function
_Z15writeColReadRowPi:
.LFB2062:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z15writeColReadRowPiPi
	.cfi_endproc
.LFE2062:
	.size	_Z15writeColReadRowPi, .-_Z15writeColReadRowPi
	.globl	_Z42__device_stub__Z22writeRowReadRowDynamicPiPi
	.type	_Z42__device_stub__Z22writeRowReadRowDynamicPiPi, @function
_Z42__device_stub__Z22writeRowReadRowDynamicPiPi:
.LFB2063:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z22writeRowReadRowDynamicPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L33:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2063:
	.size	_Z42__device_stub__Z22writeRowReadRowDynamicPiPi, .-_Z42__device_stub__Z22writeRowReadRowDynamicPiPi
	.globl	_Z22writeRowReadRowDynamicPi
	.type	_Z22writeRowReadRowDynamicPi, @function
_Z22writeRowReadRowDynamicPi:
.LFB2064:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z22writeRowReadRowDynamicPiPi
	.cfi_endproc
.LFE2064:
	.size	_Z22writeRowReadRowDynamicPi, .-_Z22writeRowReadRowDynamicPi
	.globl	_Z42__device_stub__Z22writeColReadColDynamicPiPi
	.type	_Z42__device_stub__Z22writeColReadColDynamicPiPi, @function
_Z42__device_stub__Z22writeColReadColDynamicPiPi:
.LFB2065:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z22writeColReadColDynamicPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L38:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L40
	call	__stack_chk_fail@PLT
.L40:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2065:
	.size	_Z42__device_stub__Z22writeColReadColDynamicPiPi, .-_Z42__device_stub__Z22writeColReadColDynamicPiPi
	.globl	_Z22writeColReadColDynamicPi
	.type	_Z22writeColReadColDynamicPi, @function
_Z22writeColReadColDynamicPi:
.LFB2066:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z22writeColReadColDynamicPiPi
	.cfi_endproc
.LFE2066:
	.size	_Z22writeColReadColDynamicPi, .-_Z22writeColReadColDynamicPi
	.globl	_Z38__device_stub__Z18writeColReadColPadPiPi
	.type	_Z38__device_stub__Z18writeColReadColPadPiPi, @function
_Z38__device_stub__Z18writeColReadColPadPiPi:
.LFB2067:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z18writeColReadColPadPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L43:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L45
	call	__stack_chk_fail@PLT
.L45:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2067:
	.size	_Z38__device_stub__Z18writeColReadColPadPiPi, .-_Z38__device_stub__Z18writeColReadColPadPiPi
	.globl	_Z18writeColReadColPadPi
	.type	_Z18writeColReadColPadPi, @function
_Z18writeColReadColPadPi:
.LFB2068:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z18writeColReadColPadPiPi
	.cfi_endproc
.LFE2068:
	.size	_Z18writeColReadColPadPi, .-_Z18writeColReadColPadPi
	.globl	_Z45__device_stub__Z25writeColReadColDynamicPadPiPi
	.type	_Z45__device_stub__Z25writeColReadColDynamicPadPiPi, @function
_Z45__device_stub__Z25writeColReadColDynamicPadPiPi:
.LFB2069:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z25writeColReadColDynamicPadPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L48:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2069:
	.size	_Z45__device_stub__Z25writeColReadColDynamicPadPiPi, .-_Z45__device_stub__Z25writeColReadColDynamicPadPiPi
	.globl	_Z25writeColReadColDynamicPadPi
	.type	_Z25writeColReadColDynamicPadPi, @function
_Z25writeColReadColDynamicPadPi:
.LFB2070:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z25writeColReadColDynamicPadPiPi
	.cfi_endproc
.LFE2070:
	.size	_Z25writeColReadColDynamicPadPi, .-_Z25writeColReadColDynamicPadPi
	.section	.rodata.str1.1
.LC3:
	.string	"4-Byte"
.LC4:
	.string	"8-Byte"
.LC5:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/SaoYan/Learning_CUDA/master/Ch5/sharedMemRect.cu"
.LC6:
	.string	"Error: %s:%d, "
.LC7:
	.string	"code: %d, reason: %s\n"
.LC8:
	.string	"Using Device %d: %s\n"
.LC9:
	.string	"Shared memory bank width: %s\n"
.LC10:
	.string	"write row read row:\n"
.LC11:
	.string	"write col read col:\n"
.LC12:
	.string	"write col read col; transpose:\n"
.LC13:
	.string	"write row read col:\n"
.LC14:
	.string	"write col read row:\n"
.LC15:
	.string	"write row read row; dynamic:\n"
.LC16:
	.string	"write col read col; dynamic:\n"
.LC17:
	.string	"write col read col; padding:\n"
.LC18:
	.string	"write col read col; dynamic + padding:\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%edi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	xorl	%esi, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$1096, %rsp
	.cfi_def_cfa_offset 1136
	movq	%fs:40, %rax
	movq	%rax, 1080(%rsp)
	xorl	%eax, %eax
	leaq	48(%rsp), %rbp
	movq	%rbp, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	testl	%eax, %eax
	je	.L54
	movl	%eax, %ebx
	movl	$35, %ecx
	jmp	.L138
.L54:
	movq	%rbp, %rcx
	xorl	%edx, %edx
	leaq	.LC8(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L55
	movl	$37, %ecx
.L138:
	leaq	.LC5(%rip), %rdx
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	movl	%ebx, %edx
	movq	%rax, %rcx
.L139:
	movl	$2, %edi
	leaq	.LC7(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L55:
	leaq	12(%rsp), %rdi
	call	cudaDeviceGetSharedMemConfig@PLT
	movl	$40, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L138
	cmpl	$1, 12(%rsp)
	leaq	.LC3(%rip), %rax
	leaq	.LC4(%rip), %rdx
	movl	$2, %edi
	cmove	%rax, %rdx
	leaq	.LC9(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	16(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	movl	$46, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L138
	movl	$4096, %edi
	xorl	%ebp, %ebp
	call	malloc@PLT
	movl	$1, 32(%rsp)
	movq	%rax, %rbx
	movl	$2147483649, %eax
	movl	$1, 44(%rsp)
	salq	$5, %rax
	decl	%r13d
	movq	%rax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 36(%rsp)
	jle	.L59
	movq	8(%r12), %rdi
	call	atoi@PLT
	testl	%eax, %eax
	setne	%bpl
.L59:
	movq	16(%rsp), %rdi
	movl	$4096, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$54, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	movl	$1024, %ecx
	movq	%rbx, %rdi
	movq	24(%rsp), %rdx
	xorl	%r9d, %r9d
	rep stosl
	movl	44(%rsp), %esi
	movl	32(%rsp), %ecx
	xorl	%r8d, %r8d
	movq	36(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L61
	movq	16(%rsp), %rdi
	call	_Z35__device_stub__Z15writeRowReadRowPiPi
.L61:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$4096, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	$57, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	testb	%bpl, %bpl
	je	.L63
	movl	$512, %edx
	movq	%rbx, %rsi
	leaq	.LC10(%rip), %rdi
	call	_Z9printDataPKcPii
.L63:
	call	cudaGetLastError@PLT
	movl	$59, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	movq	16(%rsp), %rdi
	movl	$4096, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$61, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	movl	$1024, %ecx
	movq	%rbx, %rdi
	movq	24(%rsp), %rdx
	xorl	%r9d, %r9d
	rep stosl
	movl	44(%rsp), %esi
	movl	32(%rsp), %ecx
	xorl	%r8d, %r8d
	movq	36(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L66
	movq	16(%rsp), %rdi
	call	_Z35__device_stub__Z15writeColReadColPiPi
.L66:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$4096, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	$64, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	testb	%bpl, %bpl
	je	.L68
	movl	$512, %edx
	movq	%rbx, %rsi
	leaq	.LC11(%rip), %rdi
	call	_Z9printDataPKcPii
.L68:
	call	cudaGetLastError@PLT
	movl	$66, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	movq	16(%rsp), %rdi
	movl	$4096, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$68, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	movl	$1024, %ecx
	movq	%rbx, %rdi
	movq	24(%rsp), %rdx
	xorl	%r9d, %r9d
	rep stosl
	movl	44(%rsp), %esi
	movl	32(%rsp), %ecx
	xorl	%r8d, %r8d
	movq	36(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L71
	movq	16(%rsp), %rdi
	call	_Z36__device_stub__Z16writeColReadColTPiPi
.L71:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$4096, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	$71, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	testb	%bpl, %bpl
	je	.L73
	movl	$512, %edx
	movq	%rbx, %rsi
	leaq	.LC12(%rip), %rdi
	call	_Z9printDataPKcPii
.L73:
	call	cudaGetLastError@PLT
	movl	$73, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	movq	16(%rsp), %rdi
	movl	$4096, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$75, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	movl	$1024, %ecx
	movq	%rbx, %rdi
	movq	24(%rsp), %rdx
	xorl	%r9d, %r9d
	rep stosl
	movl	44(%rsp), %esi
	movl	32(%rsp), %ecx
	xorl	%r8d, %r8d
	movq	36(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L76
	movq	16(%rsp), %rdi
	call	_Z35__device_stub__Z15writeRowReadColPiPi
.L76:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$4096, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	$78, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	testb	%bpl, %bpl
	je	.L78
	movl	$512, %edx
	movq	%rbx, %rsi
	leaq	.LC13(%rip), %rdi
	call	_Z9printDataPKcPii
.L78:
	call	cudaGetLastError@PLT
	movl	$80, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	movq	16(%rsp), %rdi
	movl	$4096, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$82, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	movl	$1024, %ecx
	movq	%rbx, %rdi
	movq	24(%rsp), %rdx
	xorl	%r9d, %r9d
	rep stosl
	movl	44(%rsp), %esi
	movl	32(%rsp), %ecx
	xorl	%r8d, %r8d
	movq	36(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L81
	movq	16(%rsp), %rdi
	call	_Z35__device_stub__Z15writeColReadRowPiPi
.L81:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$4096, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	$85, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	testb	%bpl, %bpl
	je	.L83
	movl	$512, %edx
	movq	%rbx, %rsi
	leaq	.LC14(%rip), %rdi
	call	_Z9printDataPKcPii
.L83:
	call	cudaGetLastError@PLT
	movl	$87, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	movq	16(%rsp), %rdi
	movl	$4096, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$89, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	movl	$1024, %ecx
	movq	%rbx, %rdi
	movq	24(%rsp), %rdx
	xorl	%r9d, %r9d
	rep stosl
	movl	44(%rsp), %esi
	movl	32(%rsp), %ecx
	movl	$4096, %r8d
	movq	36(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L86
	movq	16(%rsp), %rdi
	call	_Z42__device_stub__Z22writeRowReadRowDynamicPiPi
.L86:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$4096, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	$92, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	testb	%bpl, %bpl
	je	.L88
	movl	$512, %edx
	movq	%rbx, %rsi
	leaq	.LC15(%rip), %rdi
	call	_Z9printDataPKcPii
.L88:
	call	cudaGetLastError@PLT
	movl	$94, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	movq	16(%rsp), %rdi
	movl	$4096, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$96, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	movl	$1024, %ecx
	movq	%rbx, %rdi
	movq	24(%rsp), %rdx
	xorl	%r9d, %r9d
	rep stosl
	movl	44(%rsp), %esi
	movl	32(%rsp), %ecx
	movl	$4096, %r8d
	movq	36(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L91
	movq	16(%rsp), %rdi
	call	_Z42__device_stub__Z22writeColReadColDynamicPiPi
.L91:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$4096, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	$99, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	testb	%bpl, %bpl
	je	.L93
	movl	$512, %edx
	movq	%rbx, %rsi
	leaq	.LC16(%rip), %rdi
	call	_Z9printDataPKcPii
.L93:
	call	cudaGetLastError@PLT
	movl	$101, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	movq	16(%rsp), %rdi
	movl	$4096, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$103, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	movl	$1024, %ecx
	movq	%rbx, %rdi
	movq	24(%rsp), %rdx
	xorl	%r9d, %r9d
	rep stosl
	movl	44(%rsp), %esi
	movl	32(%rsp), %ecx
	movl	$4096, %r8d
	movq	36(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L96
	movq	16(%rsp), %rdi
	call	_Z38__device_stub__Z18writeColReadColPadPiPi
.L96:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$4096, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	$106, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	testb	%bpl, %bpl
	je	.L98
	movl	$512, %edx
	movq	%rbx, %rsi
	leaq	.LC17(%rip), %rdi
	call	_Z9printDataPKcPii
.L98:
	call	cudaGetLastError@PLT
	movl	$108, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	movq	16(%rsp), %rdi
	movl	$4096, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$110, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L140
	movl	$1024, %ecx
	movq	%rbx, %rdi
	movq	24(%rsp), %rdx
	xorl	%r9d, %r9d
	rep stosl
	movl	44(%rsp), %esi
	movl	32(%rsp), %ecx
	movl	$4224, %r8d
	movq	36(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L101
	movq	16(%rsp), %rdi
	call	_Z45__device_stub__Z25writeColReadColDynamicPadPiPi
.L101:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$4096, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L102
	movl	$113, %ecx
.L140:
	leaq	.LC5(%rip), %rdx
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%r12d, %edi
	call	cudaGetErrorString@PLT
	movl	%r12d, %edx
	movq	%rax, %rcx
	jmp	.L139
.L102:
	testb	%bpl, %bpl
	je	.L103
	movl	$512, %edx
	movq	%rbx, %rsi
	leaq	.LC18(%rip), %rdi
	call	_Z9printDataPKcPii
.L103:
	call	cudaGetLastError@PLT
	movl	$115, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L138
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movl	$117, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L138
	call	cudaDeviceReset@PLT
	movl	$118, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L138
	movq	1080(%rsp), %rax
	subq	%fs:40, %rax
	je	.L107
	call	__stack_chk_fail@PLT
.L107:
	addq	$1096, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC19:
	.string	"_Z25writeColReadColDynamicPadPi"
.LC20:
	.string	"_Z18writeColReadColPadPi"
.LC21:
	.string	"_Z22writeColReadColDynamicPi"
.LC22:
	.string	"_Z22writeRowReadRowDynamicPi"
.LC23:
	.string	"_Z15writeColReadRowPi"
.LC24:
	.string	"_Z15writeRowReadColPi"
.LC25:
	.string	"_Z16writeColReadColTPi"
.LC26:
	.string	"_Z15writeColReadColPi"
.LC27:
	.string	"_Z15writeRowReadRowPi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2072:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z25writeColReadColDynamicPadPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z18writeColReadColPadPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC21(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z22writeColReadColDynamicPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC22(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z22writeRowReadRowDynamicPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC23(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z15writeColReadRowPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC24(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z15writeRowReadColPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC25(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16writeColReadColTPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC26(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z15writeColReadColPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC27(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z15writeRowReadRowPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2072:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>

#define CHECK(call) {                                                        \
    const hipError_t error = call;                                          \
    if (error != hipSuccess) {                                              \
        printf("Error: %s:%d, ", __FILE__, __LINE__);                        \
        printf("code: %d, reason: %s\n", error, hipGetErrorString(error));  \
        exit(1);                                                             \
    }                                                                        \
}                                                                            \

#define BDIMX 32
#define BDIMY 16
#define PADDING 2 // with 1-padding, there will still be 2-way conflict (analyze yourself~)

void printData(const char *msg, int *data, const int size);

__global__ void writeRowReadRow(int *out);
__global__ void writeColReadCol(int *out);
__global__ void writeColReadColT(int *out);
__global__ void writeRowReadCol(int *out);
__global__ void writeColReadRow(int *out);

__global__ void writeRowReadRowDynamic(int *out);
__global__ void writeColReadColDynamic(int *out);

__global__ void writeColReadColPad(int *out);
__global__ void writeColReadColDynamicPad(int *out);

int main(int argc, char **argv) {
    // set up device
    int dev = 0;
    hipDeviceProp_t deviceProp; 
    CHECK(hipGetDeviceProperties(&deviceProp, dev)); 
    printf("Using Device %d: %s\n", dev, deviceProp.name); 
    CHECK(hipSetDevice(dev));

    hipSharedMemConfig pConfig;
    CHECK(hipDeviceGetSharedMemConfig(&pConfig));
    printf("Shared memory bank width: %s\n", pConfig == 1 ? "4-Byte" : "8-Byte");

    // allocate memory
    size_t nBytes = BDIMX * BDIMX * sizeof(int);
    int *d_out;
    CHECK(hipMalloc((int**)&d_out, nBytes));
    int *h_out  = (int*)malloc(nBytes);

    dim3 block(BDIMX, BDIMY);
    dim3 grid(1, 1);
    bool ifprint = 0; // print result or not
    if (argc > 1) ifprint = atoi(argv[1]);

    CHECK(hipMemset(d_out, 0, nBytes));
    memset(h_out, 0, nBytes);
    writeRowReadRow<<<grid, block>>>(d_out);
    CHECK(hipMemcpy(h_out, d_out, nBytes, hipMemcpyDeviceToHost));
    if (ifprint) printData("write row read row:\n", h_out, BDIMX * BDIMY);
    CHECK(hipGetLastError());

    CHECK(hipMemset(d_out, 0, nBytes));
    memset(h_out, 0, nBytes);
    writeColReadCol<<<grid, block>>>(d_out);
    CHECK(hipMemcpy(h_out, d_out, nBytes, hipMemcpyDeviceToHost));
    if (ifprint) printData("write col read col:\n", h_out, BDIMX * BDIMY);
    CHECK(hipGetLastError());

    CHECK(hipMemset(d_out, 0, nBytes));
    memset(h_out, 0, nBytes);
    writeColReadColT<<<grid, block>>>(d_out);
    CHECK(hipMemcpy(h_out, d_out, nBytes, hipMemcpyDeviceToHost));
    if (ifprint) printData("write col read col; transpose:\n", h_out, BDIMX * BDIMY);
    CHECK(hipGetLastError());

    CHECK(hipMemset(d_out, 0, nBytes));
    memset(h_out, 0, nBytes);
    writeRowReadCol<<<grid, block>>>(d_out);
    CHECK(hipMemcpy(h_out, d_out, nBytes, hipMemcpyDeviceToHost));
    if (ifprint) printData("write row read col:\n", h_out, BDIMX * BDIMY);
    CHECK(hipGetLastError());

    CHECK(hipMemset(d_out, 0, nBytes));
    memset(h_out, 0, nBytes);
    writeColReadRow<<<grid, block>>>(d_out);
    CHECK(hipMemcpy(h_out, d_out, nBytes, hipMemcpyDeviceToHost));
    if (ifprint) printData("write col read row:\n", h_out, BDIMX * BDIMY);
    CHECK(hipGetLastError());

    CHECK(hipMemset(d_out, 0, nBytes));
    memset(h_out, 0, nBytes);
    writeRowReadRowDynamic<<<grid, block, nBytes>>>(d_out);
    CHECK(hipMemcpy(h_out, d_out, nBytes, hipMemcpyDeviceToHost));
    if (ifprint) printData("write row read row; dynamic:\n", h_out, BDIMX * BDIMY);
    CHECK(hipGetLastError());

    CHECK(hipMemset(d_out, 0, nBytes));
    memset(h_out, 0, nBytes);
    writeColReadColDynamic<<<grid, block, nBytes>>>(d_out);
    CHECK(hipMemcpy(h_out, d_out, nBytes, hipMemcpyDeviceToHost));
    if (ifprint) printData("write col read col; dynamic:\n", h_out, BDIMX * BDIMY);
    CHECK(hipGetLastError());

    CHECK(hipMemset(d_out, 0, nBytes));
    memset(h_out, 0, nBytes);
    writeColReadColPad<<<grid, block, nBytes>>>(d_out);
    CHECK(hipMemcpy(h_out, d_out, nBytes, hipMemcpyDeviceToHost));
    if (ifprint) printData("write col read col; padding:\n", h_out, BDIMX * BDIMY);
    CHECK(hipGetLastError());

    CHECK(hipMemset(d_out, 0, nBytes));
    memset(h_out, 0, nBytes);
    writeColReadColDynamicPad<<<grid, block, nBytes + PADDING*BDIMY*sizeof(int)>>>(d_out);
    CHECK(hipMemcpy(h_out, d_out, nBytes, hipMemcpyDeviceToHost));
    if (ifprint) printData("write col read col; dynamic + padding:\n", h_out, BDIMX * BDIMY);
    CHECK(hipGetLastError());

    CHECK(hipFree(d_out));
    CHECK(hipDeviceReset());
    return 0;
}

/**********CUDA kernels**********/

__global__ void writeRowReadRow(int *out) {
    // static shared memory
    __shared__ int tile[BDIMY][BDIMX];

    // mapping from thread index to global memory index
    // assuming only one block
    int idx = threadIdx.y * blockDim.x + threadIdx.x;

    // shared memory store operation
    tile[threadIdx.y][threadIdx.x] = idx;

    // wait for all threads to complete
    __syncthreads();

    // shared memory load operation
    // global memory store operation
    out[idx] = tile[threadIdx.y][threadIdx.x] ;
}

__global__ void writeColReadCol(int *out) {
    // static shared memory
    __shared__ int tile[BDIMY][BDIMX];

    // mapping from thread index to global memory index
    // assuming only one block
    int idx = threadIdx.y * blockDim.x + threadIdx.x;

    // shared memory store operation
    int irow = idx % BDIMY;
    int icol = idx / BDIMY;
    tile[irow][icol] = idx;

    // wait for all threads to complete
    __syncthreads();

    // shared memory load operation
    // global memory store operation
    out[idx] = tile[irow][icol];
}

__global__ void writeColReadColT(int *out) {
    // static shared memory; transposed
    __shared__ int tile[BDIMX][BDIMY];

    // mapping from thread index to global memory index
    // assuming only one block
    int idx = threadIdx.y * blockDim.x + threadIdx.x;

    // shared memory store operation
    tile[threadIdx.x][threadIdx.y] = idx;

    // wait for all threads to complete
    __syncthreads();

    // shared memory load operation
    // global memory store operation
    out[idx] = tile[threadIdx.x][threadIdx.y];
}

__global__ void writeRowReadCol(int *out) {
    // static shared memory
    __shared__ int tile[BDIMY][BDIMX];

    // mapping from thread index to global memory index
    // assuming only one block
    int idx = threadIdx.y * blockDim.x + threadIdx.x;

    // shared memory store operation
    tile[threadIdx.y][threadIdx.x] = idx;

    // wait for all threads to complete
    __syncthreads();

    // shared memory load operation
    // global memory store operation
    int irow = idx % BDIMY;
    int icol = idx / BDIMY;
    out[idx] = tile[irow][icol];
}

__global__ void writeColReadRow(int *out) {
    // static shared memory
    __shared__ int tile[BDIMY][BDIMX];

    // mapping from thread index to global memory index
    // assuming only one block
    int idx = threadIdx.y * blockDim.x + threadIdx.x;

    // shared memory store operation
    int irow = idx % BDIMY;
    int icol = idx / BDIMY;
    tile[irow][icol] = idx;

    // wait for all threads to complete
    __syncthreads();

    // shared memory load operation
    // global memory store operation
    out[idx] = tile[threadIdx.y][threadIdx.x];
}

__global__ void writeRowReadRowDynamic(int *out) {
    // dynamic shared memory
    extern __shared__ int tile[];

    // mapping from thread index to global memory index
    // assuming only one block
    int idx = threadIdx.y * blockDim.x + threadIdx.x;

    // shared memory store operation
    tile[idx] = idx;

    // wait for all threads to complete
    __syncthreads();

    // shared memory load operation
    // global memory store operation
    out[idx] = tile[idx];
}

__global__ void writeColReadColDynamic(int *out) {
    // dynamic shared memory
    extern __shared__ int tile[];

    // mapping from thread index to global memory index
    // assuming only one block
    int idx = threadIdx.y * blockDim.x + threadIdx.x;

    // shared memory store operation
    int irow = idx % BDIMY;
    int icol = idx / BDIMY;
    int colIdx = irow * BDIMX + icol; // col-based index
    tile[colIdx] = idx;

    // wait for all threads to complete
    __syncthreads();

    // shared memory load operation
    // global memory store operation
    out[idx] = tile[colIdx];
}

__global__ void writeColReadColPad(int *out) {
    // static shared memory with memory padding
    __shared__ int tile[BDIMY][BDIMX + PADDING];

    // mapping from thread index to global memory index
    // assuming only one block
    int idx = threadIdx.y * blockDim.x + threadIdx.x;

    // shared memory store operation
    int irow = idx % BDIMY;
    int icol = idx / BDIMY;
    tile[irow][icol] = idx;

    // wait for all threads to complete
    __syncthreads();

    // shared memory load operation
    // global memory store operation
    out[idx] = tile[irow][icol];
}

__global__ void writeColReadColDynamicPad(int *out) {
    // dynamic shared memory
    extern __shared__ int tile[];

    // mapping from thread index to global memory index
    // assuming only one block
    int idx = threadIdx.y * blockDim.x + threadIdx.x;

    // shared memory store operation
    int irow = idx % BDIMY;
    int icol = idx / BDIMY;
    int colIdx = irow * (BDIMX + PADDING) + icol; // col-based index
    tile[colIdx] = idx;

    // wait for all threads to complete
    __syncthreads();

    // shared memory load operation
    // global memory store operation
    out[idx] = tile[colIdx];
}

/**********host functions**********/

void printData(const char *msg, int *data, const int size) {
    printf("%s: ", msg);

    for (int i = 0; i < size; i++) {
        printf("%d ", data[i]);
        fflush(stdout);
    }

    printf("\n\n");
    return;
}
	.text
	.file	"sharedMemRect.hip"
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$1488, %rsp                     # imm = 0x5D0
	.cfi_def_cfa_offset 1536
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movl	%edi, %ebp
	leaq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	jne	.LBB0_1
# %bb.4:
	leaq	16(%rsp), %rdx
	movl	$.L.str.3, %edi
	xorl	%esi, %esi
	xorl	%eax, %eax
	callq	printf
	xorl	%edi, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	jne	.LBB0_5
# %bb.6:
	leaq	12(%rsp), %rdi
	callq	hipDeviceGetSharedMemConfig
	testl	%eax, %eax
	jne	.LBB0_7
# %bb.8:
	cmpl	$1, 12(%rsp)
	movl	$.L.str.5, %eax
	movl	$.L.str.6, %esi
	cmoveq	%rax, %rsi
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%rsp, %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB0_9
# %bb.10:
	movl	$4096, %edi                     # imm = 0x1000
	callq	malloc
	movq	%rax, %rbx
	cmpl	$2, %ebp
	jl	.LBB0_11
# %bb.12:
	movq	8(%r14), %rdi
	callq	atoi
	testl	%eax, %eax
	setne	%r12b
	jmp	.LBB0_13
.LBB0_11:
	xorl	%r12d, %r12d
.LBB0_13:
	movq	(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB0_14
# %bb.16:
	movabsq	$68719476768, %r14              # imm = 0x1000000020
	movabsq	$4294967297, %r15               # imm = 0x100000001
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_18
# %bb.17:
	movq	(%rsp), %rdi
	callq	_Z30__device_stub__writeRowReadRowPi
.LBB0_18:
	movq	(%rsp), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_19
# %bb.20:
	testb	%r12b, %r12b
	je	.LBB0_22
# %bb.21:
	movl	$.L.str.7, %edi
	movq	%rbx, %rsi
	movl	$512, %edx                      # imm = 0x200
	callq	_Z9printDataPKcPii
.LBB0_22:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_23
# %bb.24:
	movq	(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB0_25
# %bb.26:
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_28
# %bb.27:
	movq	(%rsp), %rdi
	callq	_Z30__device_stub__writeColReadColPi
.LBB0_28:
	movq	(%rsp), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_29
# %bb.30:
	testb	%r12b, %r12b
	je	.LBB0_32
# %bb.31:
	movl	$.L.str.8, %edi
	movq	%rbx, %rsi
	movl	$512, %edx                      # imm = 0x200
	callq	_Z9printDataPKcPii
.LBB0_32:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_33
# %bb.34:
	movq	(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB0_35
# %bb.36:
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_38
# %bb.37:
	movq	(%rsp), %rdi
	callq	_Z31__device_stub__writeColReadColTPi
.LBB0_38:
	movq	(%rsp), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_39
# %bb.40:
	testb	%r12b, %r12b
	je	.LBB0_42
# %bb.41:
	movl	$.L.str.9, %edi
	movq	%rbx, %rsi
	movl	$512, %edx                      # imm = 0x200
	callq	_Z9printDataPKcPii
.LBB0_42:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_43
# %bb.44:
	movq	(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB0_45
# %bb.46:
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_48
# %bb.47:
	movq	(%rsp), %rdi
	callq	_Z30__device_stub__writeRowReadColPi
.LBB0_48:
	movq	(%rsp), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_49
# %bb.50:
	testb	%r12b, %r12b
	je	.LBB0_52
# %bb.51:
	movl	$.L.str.10, %edi
	movq	%rbx, %rsi
	movl	$512, %edx                      # imm = 0x200
	callq	_Z9printDataPKcPii
.LBB0_52:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_53
# %bb.54:
	movq	(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB0_55
# %bb.56:
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_58
# %bb.57:
	movq	(%rsp), %rdi
	callq	_Z30__device_stub__writeColReadRowPi
.LBB0_58:
	movq	(%rsp), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_59
# %bb.60:
	testb	%r12b, %r12b
	je	.LBB0_62
# %bb.61:
	movl	$.L.str.11, %edi
	movq	%rbx, %rsi
	movl	$512, %edx                      # imm = 0x200
	callq	_Z9printDataPKcPii
.LBB0_62:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_63
# %bb.64:
	movq	(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB0_65
# %bb.66:
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$4096, %r8d                     # imm = 0x1000
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_68
# %bb.67:
	movq	(%rsp), %rdi
	callq	_Z37__device_stub__writeRowReadRowDynamicPi
.LBB0_68:
	movq	(%rsp), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_69
# %bb.70:
	testb	%r12b, %r12b
	je	.LBB0_72
# %bb.71:
	movl	$.L.str.12, %edi
	movq	%rbx, %rsi
	movl	$512, %edx                      # imm = 0x200
	callq	_Z9printDataPKcPii
.LBB0_72:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_73
# %bb.74:
	movq	(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB0_75
# %bb.76:
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$4096, %r8d                     # imm = 0x1000
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_78
# %bb.77:
	movq	(%rsp), %rdi
	callq	_Z37__device_stub__writeColReadColDynamicPi
.LBB0_78:
	movq	(%rsp), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_79
# %bb.80:
	testb	%r12b, %r12b
	je	.LBB0_82
# %bb.81:
	movl	$.L.str.13, %edi
	movq	%rbx, %rsi
	movl	$512, %edx                      # imm = 0x200
	callq	_Z9printDataPKcPii
.LBB0_82:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_83
# %bb.84:
	movq	(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB0_85
# %bb.86:
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$4096, %r8d                     # imm = 0x1000
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_88
# %bb.87:
	movq	(%rsp), %rdi
	callq	_Z33__device_stub__writeColReadColPadPi
.LBB0_88:
	movq	(%rsp), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_89
# %bb.90:
	testb	%r12b, %r12b
	je	.LBB0_92
# %bb.91:
	movl	$.L.str.14, %edi
	movq	%rbx, %rsi
	movl	$512, %edx                      # imm = 0x200
	callq	_Z9printDataPKcPii
.LBB0_92:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_93
# %bb.94:
	movq	(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB0_95
# %bb.96:
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$4224, %r8d                     # imm = 0x1080
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_98
# %bb.97:
	movq	(%rsp), %rdi
	callq	_Z40__device_stub__writeColReadColDynamicPadPi
.LBB0_98:
	movq	(%rsp), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB0_99
# %bb.100:
	testb	%r12b, %r12b
	je	.LBB0_102
# %bb.101:
	movl	$.L.str.15, %edi
	movq	%rbx, %rsi
	movl	$512, %edx                      # imm = 0x200
	callq	_Z9printDataPKcPii
.LBB0_102:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_103
# %bb.104:
	movq	(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB0_105
# %bb.106:
	callq	hipDeviceReset
	testl	%eax, %eax
	jne	.LBB0_107
# %bb.108:
	xorl	%eax, %eax
	addq	$1488, %rsp                     # imm = 0x5D0
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB0_1:
	.cfi_def_cfa_offset 1536
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$35, %edx
	jmp	.LBB0_2
.LBB0_5:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$37, %edx
	jmp	.LBB0_2
.LBB0_7:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$40, %edx
	jmp	.LBB0_2
.LBB0_9:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$46, %edx
	jmp	.LBB0_2
.LBB0_14:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$54, %edx
	jmp	.LBB0_15
.LBB0_19:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$57, %edx
	jmp	.LBB0_15
.LBB0_23:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$59, %edx
	jmp	.LBB0_15
.LBB0_25:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$61, %edx
	jmp	.LBB0_15
.LBB0_29:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$64, %edx
	jmp	.LBB0_15
.LBB0_33:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$66, %edx
	jmp	.LBB0_15
.LBB0_35:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$68, %edx
	jmp	.LBB0_15
.LBB0_39:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$71, %edx
	jmp	.LBB0_15
.LBB0_43:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$73, %edx
	jmp	.LBB0_15
.LBB0_45:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$75, %edx
	jmp	.LBB0_15
.LBB0_49:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$78, %edx
	jmp	.LBB0_15
.LBB0_53:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$80, %edx
	jmp	.LBB0_15
.LBB0_55:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$82, %edx
	jmp	.LBB0_15
.LBB0_59:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$85, %edx
	jmp	.LBB0_15
.LBB0_63:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$87, %edx
	jmp	.LBB0_15
.LBB0_65:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$89, %edx
	jmp	.LBB0_15
.LBB0_69:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$92, %edx
	jmp	.LBB0_15
.LBB0_73:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$94, %edx
	jmp	.LBB0_15
.LBB0_75:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$96, %edx
	jmp	.LBB0_15
.LBB0_79:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$99, %edx
	jmp	.LBB0_15
.LBB0_83:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$101, %edx
	jmp	.LBB0_15
.LBB0_85:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$103, %edx
	jmp	.LBB0_15
.LBB0_89:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$106, %edx
	jmp	.LBB0_15
.LBB0_93:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$108, %edx
	jmp	.LBB0_15
.LBB0_95:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$110, %edx
	jmp	.LBB0_15
.LBB0_99:
	movl	%eax, %ebp
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$113, %edx
.LBB0_15:
	xorl	%eax, %eax
	callq	printf
	movl	%ebp, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movl	%ebp, %esi
	jmp	.LBB0_3
.LBB0_103:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$115, %edx
	jmp	.LBB0_2
.LBB0_105:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$117, %edx
	jmp	.LBB0_2
.LBB0_107:
	movl	%eax, %ebx
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$118, %edx
.LBB0_2:
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movl	%ebx, %esi
.LBB0_3:
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__writeRowReadRowPi # -- Begin function _Z30__device_stub__writeRowReadRowPi
	.type	_Z30__device_stub__writeRowReadRowPi,@function
_Z30__device_stub__writeRowReadRowPi:   # @_Z30__device_stub__writeRowReadRowPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15writeRowReadRowPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z30__device_stub__writeRowReadRowPi, .Lfunc_end1-_Z30__device_stub__writeRowReadRowPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z9printDataPKcPii              # -- Begin function _Z9printDataPKcPii
	.type	_Z9printDataPKcPii,@function
_Z9printDataPKcPii:                     # @_Z9printDataPKcPii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movq	%rsi, %rbx
	movq	%rdi, %rsi
	movl	$.L.str.16, %edi
	xorl	%eax, %eax
	callq	printf
	testl	%ebp, %ebp
	jle	.LBB2_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebp, %r14d
	xorl	%r15d, %r15d
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str.17, %edi
	xorl	%eax, %eax
	callq	printf
	movq	stdout(%rip), %rdi
	callq	fflush
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB2_2
.LBB2_3:                                # %._crit_edge
	movl	$.Lstr, %edi
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end2:
	.size	_Z9printDataPKcPii, .Lfunc_end2-_Z9printDataPKcPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__writeColReadColPi # -- Begin function _Z30__device_stub__writeColReadColPi
	.type	_Z30__device_stub__writeColReadColPi,@function
_Z30__device_stub__writeColReadColPi:   # @_Z30__device_stub__writeColReadColPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15writeColReadColPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z30__device_stub__writeColReadColPi, .Lfunc_end3-_Z30__device_stub__writeColReadColPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__writeColReadColTPi # -- Begin function _Z31__device_stub__writeColReadColTPi
	.type	_Z31__device_stub__writeColReadColTPi,@function
_Z31__device_stub__writeColReadColTPi:  # @_Z31__device_stub__writeColReadColTPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16writeColReadColTPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z31__device_stub__writeColReadColTPi, .Lfunc_end4-_Z31__device_stub__writeColReadColTPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__writeRowReadColPi # -- Begin function _Z30__device_stub__writeRowReadColPi
	.type	_Z30__device_stub__writeRowReadColPi,@function
_Z30__device_stub__writeRowReadColPi:   # @_Z30__device_stub__writeRowReadColPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15writeRowReadColPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z30__device_stub__writeRowReadColPi, .Lfunc_end5-_Z30__device_stub__writeRowReadColPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__writeColReadRowPi # -- Begin function _Z30__device_stub__writeColReadRowPi
	.type	_Z30__device_stub__writeColReadRowPi,@function
_Z30__device_stub__writeColReadRowPi:   # @_Z30__device_stub__writeColReadRowPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15writeColReadRowPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z30__device_stub__writeColReadRowPi, .Lfunc_end6-_Z30__device_stub__writeColReadRowPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z37__device_stub__writeRowReadRowDynamicPi # -- Begin function _Z37__device_stub__writeRowReadRowDynamicPi
	.type	_Z37__device_stub__writeRowReadRowDynamicPi,@function
_Z37__device_stub__writeRowReadRowDynamicPi: # @_Z37__device_stub__writeRowReadRowDynamicPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z22writeRowReadRowDynamicPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z37__device_stub__writeRowReadRowDynamicPi, .Lfunc_end7-_Z37__device_stub__writeRowReadRowDynamicPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z37__device_stub__writeColReadColDynamicPi # -- Begin function _Z37__device_stub__writeColReadColDynamicPi
	.type	_Z37__device_stub__writeColReadColDynamicPi,@function
_Z37__device_stub__writeColReadColDynamicPi: # @_Z37__device_stub__writeColReadColDynamicPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z22writeColReadColDynamicPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z37__device_stub__writeColReadColDynamicPi, .Lfunc_end8-_Z37__device_stub__writeColReadColDynamicPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__writeColReadColPadPi # -- Begin function _Z33__device_stub__writeColReadColPadPi
	.type	_Z33__device_stub__writeColReadColPadPi,@function
_Z33__device_stub__writeColReadColPadPi: # @_Z33__device_stub__writeColReadColPadPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18writeColReadColPadPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z33__device_stub__writeColReadColPadPi, .Lfunc_end9-_Z33__device_stub__writeColReadColPadPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z40__device_stub__writeColReadColDynamicPadPi # -- Begin function _Z40__device_stub__writeColReadColDynamicPadPi
	.type	_Z40__device_stub__writeColReadColDynamicPadPi,@function
_Z40__device_stub__writeColReadColDynamicPadPi: # @_Z40__device_stub__writeColReadColDynamicPadPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z25writeColReadColDynamicPadPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z40__device_stub__writeColReadColDynamicPadPi, .Lfunc_end10-_Z40__device_stub__writeColReadColDynamicPadPi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB11_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB11_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15writeRowReadRowPi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15writeColReadColPi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16writeColReadColTPi, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15writeRowReadColPi, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15writeColReadRowPi, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z22writeRowReadRowDynamicPi, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z22writeColReadColDynamicPi, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18writeColReadColPadPi, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z25writeColReadColDynamicPadPi, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end11:
	.size	__hip_module_ctor, .Lfunc_end11-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB12_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB12_2:
	retq
.Lfunc_end12:
	.size	__hip_module_dtor, .Lfunc_end12-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error: %s:%d, "
	.size	.L.str, 15

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/SaoYan/Learning_CUDA/master/Ch5/sharedMemRect.hip"
	.size	.L.str.1, 112

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"code: %d, reason: %s\n"
	.size	.L.str.2, 22

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Using Device %d: %s\n"
	.size	.L.str.3, 21

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Shared memory bank width: %s\n"
	.size	.L.str.4, 30

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"4-Byte"
	.size	.L.str.5, 7

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"8-Byte"
	.size	.L.str.6, 7

	.type	_Z15writeRowReadRowPi,@object   # @_Z15writeRowReadRowPi
	.section	.rodata,"a",@progbits
	.globl	_Z15writeRowReadRowPi
	.p2align	3, 0x0
_Z15writeRowReadRowPi:
	.quad	_Z30__device_stub__writeRowReadRowPi
	.size	_Z15writeRowReadRowPi, 8

	.type	.L.str.7,@object                # @.str.7
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.7:
	.asciz	"write row read row:\n"
	.size	.L.str.7, 21

	.type	_Z15writeColReadColPi,@object   # @_Z15writeColReadColPi
	.section	.rodata,"a",@progbits
	.globl	_Z15writeColReadColPi
	.p2align	3, 0x0
_Z15writeColReadColPi:
	.quad	_Z30__device_stub__writeColReadColPi
	.size	_Z15writeColReadColPi, 8

	.type	.L.str.8,@object                # @.str.8
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.8:
	.asciz	"write col read col:\n"
	.size	.L.str.8, 21

	.type	_Z16writeColReadColTPi,@object  # @_Z16writeColReadColTPi
	.section	.rodata,"a",@progbits
	.globl	_Z16writeColReadColTPi
	.p2align	3, 0x0
_Z16writeColReadColTPi:
	.quad	_Z31__device_stub__writeColReadColTPi
	.size	_Z16writeColReadColTPi, 8

	.type	.L.str.9,@object                # @.str.9
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.9:
	.asciz	"write col read col; transpose:\n"
	.size	.L.str.9, 32

	.type	_Z15writeRowReadColPi,@object   # @_Z15writeRowReadColPi
	.section	.rodata,"a",@progbits
	.globl	_Z15writeRowReadColPi
	.p2align	3, 0x0
_Z15writeRowReadColPi:
	.quad	_Z30__device_stub__writeRowReadColPi
	.size	_Z15writeRowReadColPi, 8

	.type	.L.str.10,@object               # @.str.10
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.10:
	.asciz	"write row read col:\n"
	.size	.L.str.10, 21

	.type	_Z15writeColReadRowPi,@object   # @_Z15writeColReadRowPi
	.section	.rodata,"a",@progbits
	.globl	_Z15writeColReadRowPi
	.p2align	3, 0x0
_Z15writeColReadRowPi:
	.quad	_Z30__device_stub__writeColReadRowPi
	.size	_Z15writeColReadRowPi, 8

	.type	.L.str.11,@object               # @.str.11
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.11:
	.asciz	"write col read row:\n"
	.size	.L.str.11, 21

	.type	_Z22writeRowReadRowDynamicPi,@object # @_Z22writeRowReadRowDynamicPi
	.section	.rodata,"a",@progbits
	.globl	_Z22writeRowReadRowDynamicPi
	.p2align	3, 0x0
_Z22writeRowReadRowDynamicPi:
	.quad	_Z37__device_stub__writeRowReadRowDynamicPi
	.size	_Z22writeRowReadRowDynamicPi, 8

	.type	.L.str.12,@object               # @.str.12
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.12:
	.asciz	"write row read row; dynamic:\n"
	.size	.L.str.12, 30

	.type	_Z22writeColReadColDynamicPi,@object # @_Z22writeColReadColDynamicPi
	.section	.rodata,"a",@progbits
	.globl	_Z22writeColReadColDynamicPi
	.p2align	3, 0x0
_Z22writeColReadColDynamicPi:
	.quad	_Z37__device_stub__writeColReadColDynamicPi
	.size	_Z22writeColReadColDynamicPi, 8

	.type	.L.str.13,@object               # @.str.13
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.13:
	.asciz	"write col read col; dynamic:\n"
	.size	.L.str.13, 30

	.type	_Z18writeColReadColPadPi,@object # @_Z18writeColReadColPadPi
	.section	.rodata,"a",@progbits
	.globl	_Z18writeColReadColPadPi
	.p2align	3, 0x0
_Z18writeColReadColPadPi:
	.quad	_Z33__device_stub__writeColReadColPadPi
	.size	_Z18writeColReadColPadPi, 8

	.type	.L.str.14,@object               # @.str.14
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.14:
	.asciz	"write col read col; padding:\n"
	.size	.L.str.14, 30

	.type	_Z25writeColReadColDynamicPadPi,@object # @_Z25writeColReadColDynamicPadPi
	.section	.rodata,"a",@progbits
	.globl	_Z25writeColReadColDynamicPadPi
	.p2align	3, 0x0
_Z25writeColReadColDynamicPadPi:
	.quad	_Z40__device_stub__writeColReadColDynamicPadPi
	.size	_Z25writeColReadColDynamicPadPi, 8

	.type	.L.str.15,@object               # @.str.15
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.15:
	.asciz	"write col read col; dynamic + padding:\n"
	.size	.L.str.15, 40

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"%s: "
	.size	.L.str.16, 5

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"%d "
	.size	.L.str.17, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15writeRowReadRowPi"
	.size	.L__unnamed_1, 22

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15writeColReadColPi"
	.size	.L__unnamed_2, 22

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z16writeColReadColTPi"
	.size	.L__unnamed_3, 23

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z15writeRowReadColPi"
	.size	.L__unnamed_4, 22

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z15writeColReadRowPi"
	.size	.L__unnamed_5, 22

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z22writeRowReadRowDynamicPi"
	.size	.L__unnamed_6, 29

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z22writeColReadColDynamicPi"
	.size	.L__unnamed_7, 29

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z18writeColReadColPadPi"
	.size	.L__unnamed_8, 25

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"_Z25writeColReadColDynamicPadPi"
	.size	.L__unnamed_9, 32

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\n"
	.size	.Lstr, 2

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__writeRowReadRowPi
	.addrsig_sym _Z30__device_stub__writeColReadColPi
	.addrsig_sym _Z31__device_stub__writeColReadColTPi
	.addrsig_sym _Z30__device_stub__writeRowReadColPi
	.addrsig_sym _Z30__device_stub__writeColReadRowPi
	.addrsig_sym _Z37__device_stub__writeRowReadRowDynamicPi
	.addrsig_sym _Z37__device_stub__writeColReadColDynamicPi
	.addrsig_sym _Z33__device_stub__writeColReadColPadPi
	.addrsig_sym _Z40__device_stub__writeColReadColDynamicPadPi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15writeRowReadRowPi
	.addrsig_sym _Z15writeColReadColPi
	.addrsig_sym _Z16writeColReadColTPi
	.addrsig_sym _Z15writeRowReadColPi
	.addrsig_sym _Z15writeColReadRowPi
	.addrsig_sym _Z22writeRowReadRowDynamicPi
	.addrsig_sym _Z22writeColReadColDynamicPi
	.addrsig_sym _Z18writeColReadColPadPi
	.addrsig_sym _Z25writeColReadColDynamicPadPi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15writeRowReadRowPi   ; -- Begin function _Z15writeRowReadRowPi
	.globl	_Z15writeRowReadRowPi
	.p2align	8
	.type	_Z15writeRowReadRowPi,@function
_Z15writeRowReadRowPi:                  ; @_Z15writeRowReadRowPi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x14
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_load_b64 s[0:1], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 2, v1
	v_lshl_add_u32 v2, v0, 7, v2
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u32_u24 v0, v0, s2, v1
	ds_store_b32 v2, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v1, v2
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15writeRowReadRowPi
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 3
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15writeRowReadRowPi, .Lfunc_end0-_Z15writeRowReadRowPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 132
; NumSgprs: 3
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 3
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z15writeColReadColPi   ; -- Begin function _Z15writeColReadColPi
	.globl	_Z15writeColReadColPi
	.p2align	8
	.type	_Z15writeColReadColPi,@function
_Z15writeColReadColPi:                  ; @_Z15writeColReadColPi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x14
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u32_u24 v0, v0, s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v1, 2, v0
	v_and_b32_e32 v2, 15, v0
	v_and_b32_e32 v1, 0x1fffffc, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v1, v2, 7, v1
	ds_store_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v1, v1
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15writeColReadColPi
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 3
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15writeColReadColPi, .Lfunc_end1-_Z15writeColReadColPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 3
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 3
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z16writeColReadColTPi  ; -- Begin function _Z16writeColReadColTPi
	.globl	_Z16writeColReadColTPi
	.p2align	8
	.type	_Z16writeColReadColTPi,@function
_Z16writeColReadColTPi:                 ; @_Z16writeColReadColTPi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x14
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_load_b64 s[0:1], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 2, v1
	v_lshl_add_u32 v2, v0, 6, v2
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u32_u24 v0, v1, s2, v0
	ds_store_b32 v2, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v1, v2
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16writeColReadColTPi
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 3
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z16writeColReadColTPi, .Lfunc_end2-_Z16writeColReadColTPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 132
; NumSgprs: 3
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 3
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z15writeRowReadColPi   ; -- Begin function _Z15writeRowReadColPi
	.globl	_Z15writeRowReadColPi
	.p2align	8
	.type	_Z15writeRowReadColPi,@function
_Z15writeRowReadColPi:                  ; @_Z15writeRowReadColPi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x14
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u32_u24 v2, v0, s2, v1
	v_lshlrev_b32_e32 v1, 2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v3, 2, v2
	v_and_b32_e32 v4, 15, v2
	v_lshl_add_u32 v0, v0, 7, v1
	s_delay_alu instid0(VALU_DEP_3)
	v_and_b32_e32 v3, 0x1fffffc, v3
	ds_store_b32 v0, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	v_lshl_add_u32 v1, v4, 7, v3
	buffer_gl0_inv
	ds_load_b32 v0, v1
	v_lshlrev_b32_e32 v1, 2, v2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v1, v0, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15writeRowReadColPi
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 3
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z15writeRowReadColPi, .Lfunc_end3-_Z15writeRowReadColPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 160
; NumSgprs: 3
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 3
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z15writeColReadRowPi   ; -- Begin function _Z15writeColReadRowPi
	.globl	_Z15writeColReadRowPi
	.p2align	8
	.type	_Z15writeColReadRowPi,@function
_Z15writeColReadRowPi:                  ; @_Z15writeColReadRowPi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x14
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u32_u24 v2, v0, s2, v1
	v_lshlrev_b32_e32 v1, 2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v3, 2, v2
	v_and_b32_e32 v4, 15, v2
	v_lshl_add_u32 v0, v0, 7, v1
	v_lshlrev_b32_e32 v1, 2, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, 0x1fffffc, v3
	v_lshl_add_u32 v3, v4, 7, v3
	ds_store_b32 v3, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v0, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v1, v0, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15writeColReadRowPi
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 3
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z15writeColReadRowPi, .Lfunc_end4-_Z15writeColReadRowPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 160
; NumSgprs: 3
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 3
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z22writeRowReadRowDynamicPi ; -- Begin function _Z22writeRowReadRowDynamicPi
	.globl	_Z22writeRowReadRowDynamicPi
	.p2align	8
	.type	_Z22writeRowReadRowDynamicPi,@function
_Z22writeRowReadRowDynamicPi:           ; @_Z22writeRowReadRowDynamicPi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x14
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u32_u24 v0, v0, s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 2, v0
	v_add_nc_u32_e32 v2, 0, v1
	ds_store_b32 v2, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v0, v2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v1, v0, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z22writeRowReadRowDynamicPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 3
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z22writeRowReadRowDynamicPi, .Lfunc_end5-_Z22writeRowReadRowDynamicPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 124
; NumSgprs: 3
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 3
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z22writeColReadColDynamicPi ; -- Begin function _Z22writeColReadColDynamicPi
	.globl	_Z22writeColReadColDynamicPi
	.p2align	8
	.type	_Z22writeColReadColDynamicPi,@function
_Z22writeColReadColDynamicPi:           ; @_Z22writeColReadColDynamicPi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x14
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u32_u24 v0, v0, s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v1, 5, v0
	v_lshrrev_b32_e32 v2, 4, v0
	v_and_b32_e32 v1, 0x1e0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v1, v2
	v_lshl_add_u32 v1, v1, 2, 0
	ds_store_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v1, v1
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z22writeColReadColDynamicPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 3
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z22writeColReadColDynamicPi, .Lfunc_end6-_Z22writeColReadColDynamicPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 3
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 3
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z18writeColReadColPadPi ; -- Begin function _Z18writeColReadColPadPi
	.globl	_Z18writeColReadColPadPi
	.p2align	8
	.type	_Z18writeColReadColPadPi,@function
_Z18writeColReadColPadPi:               ; @_Z18writeColReadColPadPi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x14
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u32_u24 v0, v0, s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v1, 2, v0
	v_and_b32_e32 v2, 15, v0
	v_and_b32_e32 v1, 0x1fffffc, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u32_u24 v1, 0x88, v2, v1
	ds_store_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v1, v1
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18writeColReadColPadPi
		.amdhsa_group_segment_fixed_size 2176
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 3
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	_Z18writeColReadColPadPi, .Lfunc_end7-_Z18writeColReadColPadPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 3
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2176 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 3
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z25writeColReadColDynamicPadPi ; -- Begin function _Z25writeColReadColDynamicPadPi
	.globl	_Z25writeColReadColDynamicPadPi
	.p2align	8
	.type	_Z25writeColReadColDynamicPadPi,@function
_Z25writeColReadColDynamicPadPi:        ; @_Z25writeColReadColDynamicPadPi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x14
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u32_u24 v0, v0, s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, 15, v0
	v_lshrrev_b32_e32 v2, 4, v0
	v_mad_u32_u24 v1, v1, 34, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 2, 0
	ds_store_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v1, v1
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z25writeColReadColDynamicPadPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 3
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end8:
	.size	_Z25writeColReadColDynamicPadPi, .Lfunc_end8-_Z25writeColReadColDynamicPadPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 3
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 3
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15writeRowReadRowPi
    .private_segment_fixed_size: 0
    .sgpr_count:     3
    .sgpr_spill_count: 0
    .symbol:         _Z15writeRowReadRowPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15writeColReadColPi
    .private_segment_fixed_size: 0
    .sgpr_count:     3
    .sgpr_spill_count: 0
    .symbol:         _Z15writeColReadColPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
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amdhsa.version:
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...

	.end_amdgpu_metadata
