// #CSCS CUDA Training 
//
// #Example 3.1 - transpose matrix
//
// #Author: Ugo Varetto
//
// #Goal: compute the transpose of a matrix and time operation using
//        GPU's on-board performance counters through streams; print the result in ms (10^-3 s)    
//
// #Rationale: shows how to time GPU computation
//
// #Solution: straightworwad, simply compute the thread id associated with the element
//            and copy the transposed data into the output matrix; wrap kernel calls with event
//            recording and print time information         
//
// #Code: typical flow + timing: 
//        1) compute launch grid configuration
//        2) allocate data on host(cpu) and device(gpu)
//        3) initialize data directly on the GPU
//        4) create events
//        5) record start time
//        6) launch kernel
//        7) synchronize events to guarantee that kernel execution is finished
//        8) record stop time
//        9) read data back 
//        10) print timing information as stop - start time 
//        11) delete events 
//        12) free memory      
//        The code uses the default stream 0; streams are used to sychronize operations
//        to guarantee that all operations in the same stream are executed sequentially.
//                
// #Compilation: nvcc -arch=sm_13 3_1_transpose-timing.cu -o transpose-timing 
//
// #Execution: ./transpose-timing
//
// #Note: kernel invocations ( foo<<<...>>>(...) ) are *always* asynchronous and a call to 
//        cudaThreadSynchronize() is required to wait for the end of kernel execution from
//        a host thread; in case of synchronous copy operations like cudaMemcpy(...,cudaDeviceToHost)
//        kernel execution is guaranteed to be terminated before data are copied
//
// #Note: the code is C++ also because the default compilation mode for CUDA is C++, all functions
//        are named with C++ convention and the syntax is checked by default against C++ grammar rules 
//
// #Note: -arch=sm_13 allows the code to run on every card with hw architecture GT200 (gtx 2xx) or better
//
// #Note: -arch=sm_13 is the lowest architecture version that supports double precision
//
// #Note: the example can be extended to read configuration data and matrix size from the command line

//#include <cuda_runtime.h> // automatically added by nvcc
#include <vector>
#include <iostream>

typedef float real_t;

__global__ void transpose( const real_t* in, real_t *out, int num_rows, int num_columns ) {
    const int col = blockIdx.x * blockDim.x + threadIdx.x;
    const int row = blockIdx.y * blockDim.y + threadIdx.y;
    const int input_index = row * num_columns + col;
    const int output_index = col * num_rows + row; 
    out[ output_index ] = in[ input_index ];
}

__global__ void init_matrix( real_t* in ) {
    const int c = threadIdx.x + blockDim.x * blockIdx.x;
    const int r = threadIdx.y + blockDim.y * blockIdx.y;
    const int idx = c + gridDim.x * blockDim.x * r; 
    in[ idx ] = (real_t) idx; 
}

void print_matrix( const real_t* m, int r, int c, int stride ) {
    for( int i = 0; i != r; ++i ) {
        for( int j = 0; j != c; ++j ) std::cout << m[ i * stride + j ] << ' ';
        std::cout << '\n';
    }
    std::cout << std::endl;        
}

//------------------------------------------------------------------------------
int main(int argc, char** argv ) {
    
    const dim3 BLOCKS( 512, 512 );
    const dim3 THREADS_PER_BLOCK( 16, 16 ); 
    const int ROWS = 512 * 16; // 8192
    const int COLUMNS =  512 * 16; // 8192
    const size_t SIZE = ROWS * COLUMNS * sizeof( real_t );
    
    // device storage
    real_t* dev_in = 0;
    real_t* dev_out = 0;
    cudaMalloc( &dev_in,  SIZE );
    cudaMalloc( &dev_out, SIZE );
    
    // host storage
    std::vector< real_t > outmatrix( ROWS * COLUMNS );

    // initialize matrix with kernel; much faster than using
    // for loops on the cpu
    init_matrix<<<dim3( COLUMNS, ROWS ), 1>>>( dev_in );
    cudaMemcpy( &outmatrix[ 0 ], dev_in, SIZE, cudaMemcpyDeviceToHost );

    // print upper 4x4 left corner of input matrix
    std::cout << "INPUT MATRIX - " << ROWS << " rows, " << COLUMNS << " columns" << std::endl;
    print_matrix( &outmatrix[ 0 ], 4, 4, COLUMNS );
    
    // create events for timing execution
    cudaEvent_t start = cudaEvent_t();
    cudaEvent_t stop  = cudaEvent_t();
    cudaEventCreate( &start );
    cudaEventCreate( &stop  );
    
    // record time into start event 
    cudaEventRecord( start, 0 ); // 0 is the default stream id
    // execute kernel
    transpose<<<BLOCKS, THREADS_PER_BLOCK>>>( dev_in, dev_out, ROWS, COLUMNS );
    
    // issue request to record time into stop event
    cudaEventRecord( stop, 0 );
    // synchronize stop event to wait for end of kernel execution on stream 0
    cudaEventSynchronize( stop );
    // compute elapsed time (done by CUDA run-time) 
    float elapsed = 0.f;
    cudaEventElapsedTime( &elapsed, start, stop );
    
    std::cout << "Elapsed time (ms): " << elapsed << std::endl;

    // copy output data from device(gpu) to host(cpu)
    cudaMemcpy( &outmatrix[ 0 ], dev_out, SIZE, cudaMemcpyDeviceToHost );
    
    // print upper 4x4 corner of transposed matrix
    std::cout << "\nOUTPUT MATRIX - " << COLUMNS << " rows, " << ROWS << " columns" << std::endl;
    print_matrix( &outmatrix[ 0 ], 4, 4, ROWS );

    // free memory
    cudaFree( dev_in );
    cudaFree( dev_out );

    // release events
    cudaEventDestroy( start );
    cudaEventDestroy( stop  );


    return 0;
}

	.file	"tmpxft_003a9eab_00000000-6_003_1_transpose-timing.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4002:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4002:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.isra.0, @function
_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.isra.0:
.LFB4734:
	.cfi_startproc
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	(%rdi), %rax
	movb	%sil, 12(%rsp)
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rdi,%rax)
	je	.L3
	leaq	12(%rsp), %rsi
	movl	$1, %edx
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	jmp	.L2
.L3:
	movsbl	12(%rsp), %esi
	call	_ZNSo3putEc@PLT
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4734:
	.size	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.isra.0, .-_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.isra.0
	.globl	_Z12print_matrixPKfiii
	.type	_Z12print_matrixPKfiii, @function
_Z12print_matrixPKfiii:
.LFB3998:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%esi, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%ecx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	%edx, 4(%rsp)
.L8:
	cmpq	%r15, %r13
	je	.L10
	movl	4(%rsp), %eax
	movslq	%r12d, %rcx
	leaq	(%rbx,%rcx,4), %rdx
	addq	%rcx, %rax
	leaq	(%rbx,%rax,4), %rbp
.L11:
	cmpq	%rbp, %rdx
	je	.L13
	leaq	_ZSt4cout(%rip), %rdi
	movq	%rdx, 8(%rsp)
	cvtss2sd	(%rdx), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movl	$32, %esi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.isra.0
	movq	8(%rsp), %rdx
	addq	$4, %rdx
	jmp	.L11
.L13:
	movl	$10, %esi
	leaq	_ZSt4cout(%rip), %rdi
	incq	%r13
	addl	%r14d, %r12d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.isra.0
	jmp	.L8
.L10:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	leaq	_ZSt4cout(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	.cfi_endproc
.LFE3998:
	.size	_Z12print_matrixPKfiii, .-_Z12print_matrixPKfiii
	.globl	_Z33__device_stub__Z9transposePKfPfiiPKfPfii
	.type	_Z33__device_stub__Z9transposePKfPfiiPKfPfii, @function
_Z33__device_stub__Z9transposePKfPfiiPKfPfii:
.LFB4024:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9transposePKfPfii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L14:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4024:
	.size	_Z33__device_stub__Z9transposePKfPfiiPKfPfii, .-_Z33__device_stub__Z9transposePKfPfiiPKfPfii
	.globl	_Z9transposePKfPfii
	.type	_Z9transposePKfPfii, @function
_Z9transposePKfPfii:
.LFB4025:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z9transposePKfPfiiPKfPfii
	.cfi_endproc
.LFE4025:
	.size	_Z9transposePKfPfii, .-_Z9transposePKfPfii
	.globl	_Z31__device_stub__Z11init_matrixPfPf
	.type	_Z31__device_stub__Z11init_matrixPfPf, @function
_Z31__device_stub__Z11init_matrixPfPf:
.LFB4026:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z11init_matrixPf(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L19:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4026:
	.size	_Z31__device_stub__Z11init_matrixPfPf, .-_Z31__device_stub__Z11init_matrixPfPf
	.globl	_Z11init_matrixPf
	.type	_Z11init_matrixPf, @function
_Z11init_matrixPf:
.LFB4027:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z11init_matrixPfPf
	.cfi_endproc
.LFE4027:
	.size	_Z11init_matrixPf, .-_Z11init_matrixPf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z11init_matrixPf"
.LC1:
	.string	"_Z9transposePKfPfii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4029:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11init_matrixPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9transposePKfPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4029:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt6vectorIfSaIfEED2Ev,"axG",@progbits,_ZNSt6vectorIfSaIfEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIfSaIfEED2Ev
	.type	_ZNSt6vectorIfSaIfEED2Ev, @function
_ZNSt6vectorIfSaIfEED2Ev:
.LFB4344:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L26
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L26:
	ret
	.cfi_endproc
.LFE4344:
	.size	_ZNSt6vectorIfSaIfEED2Ev, .-_ZNSt6vectorIfSaIfEED2Ev
	.weak	_ZNSt6vectorIfSaIfEED1Ev
	.set	_ZNSt6vectorIfSaIfEED1Ev,_ZNSt6vectorIfSaIfEED2Ev
	.section	.rodata.str1.1
.LC3:
	.string	"INPUT MATRIX - "
.LC4:
	.string	" rows, "
.LC5:
	.string	" columns"
.LC6:
	.string	"Elapsed time (ms): "
.LC7:
	.string	"\nOUTPUT MATRIX - "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3999:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3999
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xorl	%edx, %edx
	movl	$268435456, %esi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$120, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	movabsq	$2199023256064, %rax
	leaq	8(%rsp), %rdi
	movq	%rdx, 8(%rsp)
	movq	%rdx, 16(%rsp)
	movl	$1, 32(%rsp)
	movl	$1, 44(%rsp)
	movq	%rax, 24(%rsp)
	movabsq	$68719476752, %rax
	movq	%rax, 36(%rsp)
.LEHB0:
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$268435456, %esi
	call	cudaMalloc@PLT
	movl	$268435456, %edi
	call	_Znwm@PLT
.LEHE0:
	leaq	268435456(%rax), %rdx
	movq	%rax, 80(%rsp)
	movq	%rax, %rbx
	movq	%rdx, 96(%rsp)
	movl	$0x00000000, (%rax)
	xorl	%eax, %eax
.L29:
	addq	$4, %rax
	cmpq	$268435456, %rax
	je	.L39
	movl	$0x00000000, (%rbx,%rax)
	jmp	.L29
.L39:
	movq	%rdx, 88(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdx
	movl	$1, %esi
	movabsq	$35184372097024, %rdi
	movl	$1, 72(%rsp)
	movq	%rdx, 64(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
.LEHB1:
	call	__cudaPushCallConfiguration@PLT
	movq	8(%rsp), %rdi
	testl	%eax, %eax
	jne	.L31
	call	_Z31__device_stub__Z11init_matrixPfPf
.L31:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$268435456, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	leaq	_ZSt4cout(%rip), %r13
	leaq	.LC3(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	$8192, %esi
	call	_ZNSolsEi@PLT
	leaq	.LC4(%rip), %r12
	movq	%rax, %rdi
	movq	%r12, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	$8192, %esi
	call	_ZNSolsEi@PLT
	leaq	.LC5(%rip), %rbp
	movq	%rax, %rdi
	movq	%rbp, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$8192, %ecx
	movl	$4, %edx
	movl	$4, %esi
	movq	%rbx, %rdi
	call	_Z12print_matrixPKfiii
	xorl	%eax, %eax
	leaq	48(%rsp), %rdi
	movq	%rax, 48(%rsp)
	movq	%rax, 64(%rsp)
	call	cudaEventCreate@PLT
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$8192, %ecx
	movl	$8192, %edx
	call	_Z33__device_stub__Z9transposePKfPfiiPKfPfii
.L32:
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	64(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	64(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	4(%rsp), %rdi
	movl	$0x00000000, 4(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	.LC6(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	cvtss2sd	4(%rsp), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$268435456, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC7(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	$8192, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	movq	%r12, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	$8192, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	movq	%rbp, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$8192, %ecx
	movl	$4, %edx
	movl	$4, %esi
	movq	%rbx, %rdi
	call	_Z12print_matrixPKfiii
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	64(%rsp), %rdi
	call	cudaEventDestroy@PLT
.LEHE1:
	leaq	80(%rsp), %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	jmp	.L37
.L36:
	endbr64
	movq	%rax, %rbx
.L33:
	leaq	80(%rsp), %rdi
	call	_ZNSt6vectorIfSaIfEED1Ev
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L37
	movq	%rbx, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L37:
	call	__stack_chk_fail@PLT
.L35:
	addq	$120, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3999:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3999:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3999-.LLSDACSB3999
.LLSDACSB3999:
	.uleb128 .LEHB0-.LFB3999
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3999
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L36-.LFB3999
	.uleb128 0
	.uleb128 .LEHB2-.LFB3999
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE3999:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// #CSCS CUDA Training 
//
// #Example 3.1 - transpose matrix
//
// #Author: Ugo Varetto
//
// #Goal: compute the transpose of a matrix and time operation using
//        GPU's on-board performance counters through streams; print the result in ms (10^-3 s)    
//
// #Rationale: shows how to time GPU computation
//
// #Solution: straightworwad, simply compute the thread id associated with the element
//            and copy the transposed data into the output matrix; wrap kernel calls with event
//            recording and print time information         
//
// #Code: typical flow + timing: 
//        1) compute launch grid configuration
//        2) allocate data on host(cpu) and device(gpu)
//        3) initialize data directly on the GPU
//        4) create events
//        5) record start time
//        6) launch kernel
//        7) synchronize events to guarantee that kernel execution is finished
//        8) record stop time
//        9) read data back 
//        10) print timing information as stop - start time 
//        11) delete events 
//        12) free memory      
//        The code uses the default stream 0; streams are used to sychronize operations
//        to guarantee that all operations in the same stream are executed sequentially.
//                
// #Compilation: nvcc -arch=sm_13 3_1_transpose-timing.cu -o transpose-timing 
//
// #Execution: ./transpose-timing
//
// #Note: kernel invocations ( foo<<<...>>>(...) ) are *always* asynchronous and a call to 
//        cudaThreadSynchronize() is required to wait for the end of kernel execution from
//        a host thread; in case of synchronous copy operations like cudaMemcpy(...,cudaDeviceToHost)
//        kernel execution is guaranteed to be terminated before data are copied
//
// #Note: the code is C++ also because the default compilation mode for CUDA is C++, all functions
//        are named with C++ convention and the syntax is checked by default against C++ grammar rules 
//
// #Note: -arch=sm_13 allows the code to run on every card with hw architecture GT200 (gtx 2xx) or better
//
// #Note: -arch=sm_13 is the lowest architecture version that supports double precision
//
// #Note: the example can be extended to read configuration data and matrix size from the command line

//#include <cuda_runtime.h> // automatically added by nvcc

#include <hip/hip_runtime.h>
#include <vector>
#include <iostream>

typedef float real_t;

__global__ void transpose( const real_t* in, real_t *out, int num_rows, int num_columns ) {
    const int col = blockIdx.x * blockDim.x + threadIdx.x;
    const int row = blockIdx.y * blockDim.y + threadIdx.y;
    const int input_index = row * num_columns + col;
    const int output_index = col * num_rows + row; 
    out[ output_index ] = in[ input_index ];
}

__global__ void init_matrix( real_t* in ) {
    const int c = threadIdx.x + blockDim.x * blockIdx.x;
    const int r = threadIdx.y + blockDim.y * blockIdx.y;
    const int idx = c + gridDim.x * blockDim.x * r; 
    in[ idx ] = (real_t) idx; 
}

void print_matrix( const real_t* m, int r, int c, int stride ) {
    for( int i = 0; i != r; ++i ) {
        for( int j = 0; j != c; ++j ) std::cout << m[ i * stride + j ] << ' ';
        std::cout << '\n';
    }
    std::cout << std::endl;        
}

//------------------------------------------------------------------------------
int main(int argc, char** argv ) {
    
    const dim3 BLOCKS( 512, 512 );
    const dim3 THREADS_PER_BLOCK( 16, 16 ); 
    const int ROWS = 512 * 16; // 8192
    const int COLUMNS =  512 * 16; // 8192
    const size_t SIZE = ROWS * COLUMNS * sizeof( real_t );
    
    // device storage
    real_t* dev_in = 0;
    real_t* dev_out = 0;
    hipMalloc( &dev_in,  SIZE );
    hipMalloc( &dev_out, SIZE );
    
    // host storage
    std::vector< real_t > outmatrix( ROWS * COLUMNS );

    // initialize matrix with kernel; much faster than using
    // for loops on the cpu
    init_matrix<<<dim3( COLUMNS, ROWS ), 1>>>( dev_in );
    hipMemcpy( &outmatrix[ 0 ], dev_in, SIZE, hipMemcpyDeviceToHost );

    // print upper 4x4 left corner of input matrix
    std::cout << "INPUT MATRIX - " << ROWS << " rows, " << COLUMNS << " columns" << std::endl;
    print_matrix( &outmatrix[ 0 ], 4, 4, COLUMNS );
    
    // create events for timing execution
    hipEvent_t start = hipEvent_t();
    hipEvent_t stop  = hipEvent_t();
    hipEventCreate( &start );
    hipEventCreate( &stop  );
    
    // record time into start event 
    hipEventRecord( start, 0 ); // 0 is the default stream id
    // execute kernel
    transpose<<<BLOCKS, THREADS_PER_BLOCK>>>( dev_in, dev_out, ROWS, COLUMNS );
    
    // issue request to record time into stop event
    hipEventRecord( stop, 0 );
    // synchronize stop event to wait for end of kernel execution on stream 0
    hipEventSynchronize( stop );
    // compute elapsed time (done by CUDA run-time) 
    float elapsed = 0.f;
    hipEventElapsedTime( &elapsed, start, stop );
    
    std::cout << "Elapsed time (ms): " << elapsed << std::endl;

    // copy output data from device(gpu) to host(cpu)
    hipMemcpy( &outmatrix[ 0 ], dev_out, SIZE, hipMemcpyDeviceToHost );
    
    // print upper 4x4 corner of transposed matrix
    std::cout << "\nOUTPUT MATRIX - " << COLUMNS << " rows, " << ROWS << " columns" << std::endl;
    print_matrix( &outmatrix[ 0 ], 4, 4, ROWS );

    // free memory
    hipFree( dev_in );
    hipFree( dev_out );

    // release events
    hipEventDestroy( start );
    hipEventDestroy( stop  );


    return 0;
}

	.text
	.file	"003_1_transpose-timing.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z24__device_stub__transposePKfPfii # -- Begin function _Z24__device_stub__transposePKfPfii
	.type	_Z24__device_stub__transposePKfPfii,@function
_Z24__device_stub__transposePKfPfii:    # @_Z24__device_stub__transposePKfPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9transposePKfPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__transposePKfPfii, .Lfunc_end0-_Z24__device_stub__transposePKfPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__init_matrixPf # -- Begin function _Z26__device_stub__init_matrixPf
	.type	_Z26__device_stub__init_matrixPf,@function
_Z26__device_stub__init_matrixPf:       # @_Z26__device_stub__init_matrixPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11init_matrixPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z26__device_stub__init_matrixPf, .Lfunc_end1-_Z26__device_stub__init_matrixPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z12print_matrixPKfiii          # -- Begin function _Z12print_matrixPKfiii
	.type	_Z12print_matrixPKfiii,@function
_Z12print_matrixPKfiii:                 # @_Z12print_matrixPKfiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, 12(%rsp)                  # 4-byte Spill
	testl	%esi, %esi
	je	.LBB2_10
# %bb.1:                                # %.preheader.lr.ph
	movq	%rdi, %r14
	movslq	%ecx, %r13
	movl	%esi, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	12(%rsp), %r15d                 # 4-byte Reload
	shlq	$2, %r13
	xorl	%ebx, %ebx
	leaq	11(%rsp), %r12
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	cmpl	$0, 12(%rsp)                    # 4-byte Folded Reload
	je	.LBB2_6
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	xorl	%ebp, %ebp
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%rbp,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movb	$32, 11(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB2_11
# %bb.5:                                #   in Loop: Header=BB2_4 Depth=2
	movl	$1, %edx
	movq	%rax, %rdi
	movq	%r12, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_12
.LBB2_11:                               #   in Loop: Header=BB2_4 Depth=2
	movq	%rax, %rdi
	movl	$32, %esi
	callq	_ZNSo3putEc
.LBB2_12:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit13
                                        #   in Loop: Header=BB2_4 Depth=2
	incq	%rbp
	cmpq	%rbp, %r15
	jne	.LBB2_4
.LBB2_6:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movb	$10, 10(%rsp)
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	cmpq	$0, _ZSt4cout+16(%rax)
	je	.LBB2_8
# %bb.7:                                #   in Loop: Header=BB2_2 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$1, %edx
	leaq	10(%rsp), %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_9
.LBB2_8:                                #   in Loop: Header=BB2_2 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$10, %esi
	callq	_ZNSo3putEc
.LBB2_9:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%rbx
	addq	%r13, %r14
	cmpq	16(%rsp), %rbx                  # 8-byte Folded Reload
	jne	.LBB2_2
.LBB2_10:                               # %._crit_edge18
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z12print_matrixPKfiii, .Lfunc_end2-_Z12print_matrixPKfiii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$40, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	movq	%rax, (%rdi)
	leaq	24(%rsp), %rbx
	movq	%rax, (%rbx)
	movl	$268435456, %esi                # imm = 0x10000000
	callq	hipMalloc
	movl	$268435456, %esi                # imm = 0x10000000
	movq	%rbx, %rdi
	callq	hipMalloc
	movl	$268435456, %edi                # imm = 0x10000000
	callq	_Znwm
	movq	%rax, %rbx
	movl	$268435456, %edx                # imm = 0x10000000
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.Ltmp0:
	movabsq	$35184372097024, %rdi           # imm = 0x200000002000
	movabsq	$4294967297, %rdx               # imm = 0x100000001
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp1:
# %bb.1:
	testl	%eax, %eax
	jne	.LBB3_3
# %bb.2:
	movq	8(%rsp), %rdi
.Ltmp2:
	callq	_Z26__device_stub__init_matrixPf
.Ltmp3:
.LBB3_3:
	movq	8(%rsp), %rsi
.Ltmp4:
	movl	$268435456, %edx                # imm = 0x10000000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp5:
# %bb.4:
.Ltmp6:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$15, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp7:
# %bb.5:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
.Ltmp8:
	movl	$_ZSt4cout, %edi
	movl	$8192, %esi                     # imm = 0x2000
	callq	_ZNSolsEi
.Ltmp9:
# %bb.6:
.Ltmp10:
	movq	%rax, %r14
	movl	$.L.str.1, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp11:
# %bb.7:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit19
.Ltmp12:
	movq	%r14, %rdi
	movl	$8192, %esi                     # imm = 0x2000
	callq	_ZNSolsEi
.Ltmp13:
# %bb.8:
.Ltmp14:
	movq	%rax, %r14
	movl	$.L.str.2, %esi
	movl	$8, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp15:
# %bb.9:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit20
	movq	(%r14), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
.Ltmp16:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp17:
# %bb.10:                               # %.noexc
.Ltmp18:
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
.Ltmp19:
# %bb.11:                               # %.noexc29
.Ltmp20:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp21:
# %bb.12:                               # %_ZNSolsEPFRSoS_E.exit
.Ltmp22:
	movq	%rbx, %rdi
	movl	$4, %esi
	movl	$4, %edx
	movl	$8192, %ecx                     # imm = 0x2000
	callq	_Z12print_matrixPKfiii
.Ltmp23:
# %bb.13:
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	movq	%rax, (%rdi)
	movq	%rax, (%rsp)
.Ltmp25:
	callq	hipEventCreate
.Ltmp26:
# %bb.14:
.Ltmp27:
	movq	%rsp, %rdi
	callq	hipEventCreate
.Ltmp28:
# %bb.15:
	movq	16(%rsp), %rdi
.Ltmp29:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp30:
# %bb.16:
.Ltmp31:
	movabsq	$2199023256064, %rdi            # imm = 0x20000000200
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp32:
# %bb.17:
	testl	%eax, %eax
	jne	.LBB3_19
# %bb.18:
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
.Ltmp33:
	movl	$8192, %edx                     # imm = 0x2000
	movl	$8192, %ecx                     # imm = 0x2000
	callq	_Z24__device_stub__transposePKfPfii
.Ltmp34:
.LBB3_19:
	movq	(%rsp), %rdi
.Ltmp35:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp36:
# %bb.20:
	movq	(%rsp), %rdi
.Ltmp37:
	callq	hipEventSynchronize
.Ltmp38:
# %bb.21:
	leaq	36(%rsp), %rdi
	movl	$0, (%rdi)
	movq	16(%rsp), %rsi
	movq	(%rsp), %rdx
.Ltmp40:
	callq	hipEventElapsedTime
.Ltmp41:
# %bb.22:
.Ltmp42:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp43:
# %bb.23:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit21
	cvtss2sd	36(%rsp), %xmm0
.Ltmp44:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp45:
# %bb.24:                               # %_ZNSolsEf.exit
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
.Ltmp46:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp47:
# %bb.25:                               # %.noexc31
.Ltmp48:
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
.Ltmp49:
# %bb.26:                               # %.noexc32
.Ltmp50:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp51:
# %bb.27:                               # %_ZNSolsEPFRSoS_E.exit22
	movq	24(%rsp), %rsi
.Ltmp52:
	movl	$268435456, %edx                # imm = 0x10000000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp53:
# %bb.28:
.Ltmp54:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp55:
# %bb.29:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit23
.Ltmp56:
	movl	$_ZSt4cout, %edi
	movl	$8192, %esi                     # imm = 0x2000
	callq	_ZNSolsEi
.Ltmp57:
# %bb.30:
.Ltmp58:
	movq	%rax, %r14
	movl	$.L.str.1, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp59:
# %bb.31:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit24
.Ltmp60:
	movq	%r14, %rdi
	movl	$8192, %esi                     # imm = 0x2000
	callq	_ZNSolsEi
.Ltmp61:
# %bb.32:
.Ltmp62:
	movq	%rax, %r14
	movl	$.L.str.2, %esi
	movl	$8, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp63:
# %bb.33:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit25
	movq	(%r14), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
.Ltmp64:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp65:
# %bb.34:                               # %.noexc35
.Ltmp66:
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
.Ltmp67:
# %bb.35:                               # %.noexc36
.Ltmp68:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp69:
# %bb.36:                               # %_ZNSolsEPFRSoS_E.exit26
.Ltmp70:
	movq	%rbx, %rdi
	movl	$4, %esi
	movl	$4, %edx
	movl	$8192, %ecx                     # imm = 0x2000
	callq	_Z12print_matrixPKfiii
.Ltmp71:
# %bb.37:
	movq	8(%rsp), %rdi
.Ltmp72:
	callq	hipFree
.Ltmp73:
# %bb.38:
	movq	24(%rsp), %rdi
.Ltmp74:
	callq	hipFree
.Ltmp75:
# %bb.39:
	movq	16(%rsp), %rdi
.Ltmp76:
	callq	hipEventDestroy
.Ltmp77:
# %bb.40:
	movq	(%rsp), %rdi
.Ltmp78:
	callq	hipEventDestroy
.Ltmp79:
# %bb.41:                               # %_ZNSt6vectorIfSaIfEED2Ev.exit
	movq	%rbx, %rdi
	callq	_ZdlPv
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB3_45:
	.cfi_def_cfa_offset 64
.Ltmp39:
	jmp	.LBB3_43
.LBB3_44:
.Ltmp24:
	jmp	.LBB3_43
.LBB3_42:
.Ltmp80:
.LBB3_43:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_ZdlPv
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table3:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp23-.Ltmp0                 #   Call between .Ltmp0 and .Ltmp23
	.uleb128 .Ltmp24-.Lfunc_begin0          #     jumps to .Ltmp24
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp25-.Lfunc_begin0          # >> Call Site 3 <<
	.uleb128 .Ltmp38-.Ltmp25                #   Call between .Ltmp25 and .Ltmp38
	.uleb128 .Ltmp39-.Lfunc_begin0          #     jumps to .Ltmp39
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp40-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp79-.Ltmp40                #   Call between .Ltmp40 and .Ltmp79
	.uleb128 .Ltmp80-.Lfunc_begin0          #     jumps to .Ltmp80
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp79-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Lfunc_end3-.Ltmp79            #   Call between .Ltmp79 and .Lfunc_end3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9transposePKfPfii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11init_matrixPf, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9transposePKfPfii,@object     # @_Z9transposePKfPfii
	.section	.rodata,"a",@progbits
	.globl	_Z9transposePKfPfii
	.p2align	3, 0x0
_Z9transposePKfPfii:
	.quad	_Z24__device_stub__transposePKfPfii
	.size	_Z9transposePKfPfii, 8

	.type	_Z11init_matrixPf,@object       # @_Z11init_matrixPf
	.globl	_Z11init_matrixPf
	.p2align	3, 0x0
_Z11init_matrixPf:
	.quad	_Z26__device_stub__init_matrixPf
	.size	_Z11init_matrixPf, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"INPUT MATRIX - "
	.size	.L.str, 16

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" rows, "
	.size	.L.str.1, 8

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" columns"
	.size	.L.str.2, 9

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Elapsed time (ms): "
	.size	.L.str.3, 20

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\nOUTPUT MATRIX - "
	.size	.L.str.4, 18

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9transposePKfPfii"
	.size	.L__unnamed_1, 20

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z11init_matrixPf"
	.size	.L__unnamed_2, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__transposePKfPfii
	.addrsig_sym _Z26__device_stub__init_matrixPf
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z9transposePKfPfii
	.addrsig_sym _Z11init_matrixPf
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9transposePKfPfii     ; -- Begin function _Z9transposePKfPfii
	.globl	_Z9transposePKfPfii
	.p2align	8
	.type	_Z9transposePKfPfii,@function
_Z9transposePKfPfii:                    ; @_Z9transposePKfPfii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[3:4], null, s15, s3, v[0:1]
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mad_u64_u32 v[0:1], null, v3, s5, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v4, v[0:1], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, v2, s4, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9transposePKfPfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9transposePKfPfii, .Lfunc_end0-_Z9transposePKfPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 196
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z11init_matrixPf       ; -- Begin function _Z11init_matrixPf
	.globl	_Z11init_matrixPf
	.p2align	8
	.type	_Z11init_matrixPf,@function
_Z11init_matrixPf:                      ; @_Z11init_matrixPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x14
	s_load_b32 s3, s[0:1], 0x8
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v2, s3, s[14:15]
	v_mad_u64_u32 v[1:2], null, v3, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_cvt_f32_i32_e32 v4, v1
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v3, vcc_lo
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11init_matrixPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z11init_matrixPf, .Lfunc_end1-_Z11init_matrixPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 144
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9transposePKfPfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9transposePKfPfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11init_matrixPf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11init_matrixPf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
