
#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <time.h>

#define TILE_WIDTH 16

void matmulCPU(float *a, float *b, float *r, int n);
__global__ void matmulGPU(float *a, float *b, float *r, int n);
__global__ void MatrixMulKernel(float* Md, float* Nd, float* Pd, int Width);

int main(int argc, char* argv[]){

	if (argc < 2) {
		puts("Usage: matmul [N]");
		return 0;
	}

	int N = atoi(argv[1]);
	printf("N: %d\n", N);

	//Total size
	size_t sz = sizeof(float) * N * N;

	//Struct for time measure
	struct timeval start, end, timer;

	//Memory allocation for cpu(host)
	float *h_a = (float*)malloc(sz);
	float *h_b = (float*)malloc(sz);
	float *h_r = (float*)malloc(sz);

	srand(time(NULL));
	for(int i=0; i<N*N; i++) {
		h_a[i] = (float)(rand()%100);
		h_b[i] = (float)(rand()%100);
		h_r[i] = 0;
	}

	//Memory alocation for gpu(device)
	float *d_a, *d_b, *d_r;
	cudaMalloc((void **) &d_a, sz);
	cudaMalloc((void **) &d_b, sz);
	cudaMalloc((void **) &d_r, sz);

	float *h_result_global = (float*)malloc(sz);

	gettimeofday(&start, NULL);
	matmulCPU(h_a, h_b, h_r, N);
	gettimeofday(&end, NULL);
	timersub(&end, &start, &timer);
	printf("CPU elapsed time: %lf\n", (timer.tv_usec / 1000.0 + timer.tv_sec * 1000.0));

	int threads_width = 16;
	int grid_width = N % threads_width ? N / threads_width + 1 : N / threads_width;
	dim3 dim_threads(threads_width, threads_width);
	dim3 dim_grid(grid_width, grid_width);

	gettimeofday(&start, NULL);

	cudaMemcpy(d_a, h_a, sz, cudaMemcpyHostToDevice);
	cudaMemcpy(d_b, h_b, sz, cudaMemcpyHostToDevice);

	MatrixMulKernel<<<dim_grid, dim_threads>>>(d_a, d_b, d_r, N);

	cudaDeviceSynchronize();

	cudaMemcpy(h_result_global, d_r, sz, cudaMemcpyDeviceToHost);
	gettimeofday(&end, NULL);

	timersub(&end, &start, &timer);

	printf("GPU elapsed time: %lf\n", (timer.tv_usec / 1000.0 + timer.tv_sec * 1000.0));

	for (int i = 0; i<N*N; i++){
		if(h_r[i] != h_result_global[i]){
			printf("Failed at %d, h_result_global, %f, %f\n", i, h_r[i], h_result_global[i]);
			break;
		}
	}

	cudaFree(d_a);
	cudaFree(d_b);
	cudaFree(d_r);

	free(h_result_global);
	free(h_a);
	free(h_b);
	free(h_r);

	return 0;

}

void matmulCPU(float *a, float *b, float *r, int n){
	int i=0,j=0,x=0;
	for(i=0;i<n;i++){
		for(j=0;j<n;j++){
			float sum = 0.0f;
			for(x=0;x<n;x++){
				sum+=a[j*n + x] * b[x * n + i];
			}
			r[j*n + i] = sum;
		}
	}
}

__global__ void matmulGPU(float *a, float *b, float *r, int n){
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;

	if(x>=n || y>=n)
		return;

	float sum = 0;
	for(int i=0;i<n;i++)
		sum+=(a[y*n +i] * b[i*n+x]);

	r[y*n+x] = sum;
}

__global__ void MatrixMulKernel(float*Md, float* Nd, float* Pd, int Width){
	__shared__ float Mds[TILE_WIDTH][TILE_WIDTH];
	__shared__ float Nds[TILE_WIDTH][TILE_WIDTH];

	int bx = blockIdx.x;
	int by = blockIdx.y;

	int tx = threadIdx.x;
	int ty = threadIdx.y;

	int Row = by * TILE_WIDTH + ty;
	int Col = bx * TILE_WIDTH + tx;

	if(Row >= Width || Col >= Width)
		return;

	float Pvalue;
	if(tx == 0 || ty == 0)
		Pvalue = 0;

	int num_tile = Width % TILE_WIDTH == 0 ? Width / TILE_WIDTH : Width / TILE_WIDTH + 1;

	for(int m=0;m<num_tile;++m){
		Mds[ty][tx] = Md[Row * Width + (tx + m * TILE_WIDTH)];
		Nds[ty][tx] = Nd[Col + (m * TILE_WIDTH + ty) * Width];
		__syncthreads();
		
		int var_tile_width = m == (num_tile - 1) ? Width % TILE_WIDTH : TILE_WIDTH;
		for(int k=0; k<var_tile_width;++k){
			Pvalue+=Mds[ty][k]*Nds[k][tx];
		}
		__syncthreads();
	}
	Pd[Row*Width+Col] = Pvalue;
}


	.file	"tmpxft_002129cc_00000000-6_05_matrixMultiplication_shared.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9matmulCPUPfS_S_i
	.type	_Z9matmulCPUPfS_S_i, @function
_Z9matmulCPUPfS_S_i:
.LFB2028:
	.cfi_startproc
	endbr64
	movq	%rdx, %r11
	xorl	%r8d, %r8d
	movslq	%ecx, %rdx
	movq	%rdi, %r9
	movq	%rsi, %r10
	salq	$2, %rdx
	xorl	%eax, %eax
	cmpl	%ecx, %r8d
	jl	.L11
	ret
.L11:
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
.L7:
	xorl	%esi, %esi
	xorl	%ebp, %ebp
	leaq	(%r11,%rax), %r13
.L6:
	leaq	(%r10,%rax), %rbx
	xorps	%xmm0, %xmm0
	leaq	(%r9,%rsi), %r12
	xorl	%edi, %edi
.L4:
	movss	(%r12,%rdi,4), %xmm1
	mulss	(%rbx), %xmm1
	incq	%rdi
	addq	%rdx, %rbx
	addss	%xmm1, %xmm0
	cmpl	%edi, %ecx
	jg	.L4
	incl	%ebp
	movss	%xmm0, 0(%r13,%rsi)
	addq	%rdx, %rsi
	cmpl	%ebp, %ecx
	jne	.L6
	incl	%r8d
	addq	$4, %rax
	cmpl	%ecx, %r8d
	jl	.L7
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z9matmulCPUPfS_S_i, .-_Z9matmulCPUPfS_S_i
	.globl	_Z33__device_stub__Z9matmulGPUPfS_S_iPfS_S_i
	.type	_Z33__device_stub__Z9matmulGPUPfS_S_iPfS_S_i, @function
_Z33__device_stub__Z9matmulGPUPfS_S_iPfS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9matmulGPUPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L13:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z33__device_stub__Z9matmulGPUPfS_S_iPfS_S_i, .-_Z33__device_stub__Z9matmulGPUPfS_S_iPfS_S_i
	.globl	_Z9matmulGPUPfS_S_i
	.type	_Z9matmulGPUPfS_S_i, @function
_Z9matmulGPUPfS_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z9matmulGPUPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2054:
	.size	_Z9matmulGPUPfS_S_i, .-_Z9matmulGPUPfS_S_i
	.globl	_Z40__device_stub__Z15MatrixMulKernelPfS_S_iPfS_S_i
	.type	_Z40__device_stub__Z15MatrixMulKernelPfS_S_iPfS_S_i, @function
_Z40__device_stub__Z15MatrixMulKernelPfS_S_iPfS_S_i:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15MatrixMulKernelPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L18:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z40__device_stub__Z15MatrixMulKernelPfS_S_iPfS_S_i, .-_Z40__device_stub__Z15MatrixMulKernelPfS_S_iPfS_S_i
	.globl	_Z15MatrixMulKernelPfS_S_i
	.type	_Z15MatrixMulKernelPfS_S_i, @function
_Z15MatrixMulKernelPfS_S_i:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z15MatrixMulKernelPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2056:
	.size	_Z15MatrixMulKernelPfS_S_i, .-_Z15MatrixMulKernelPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Usage: matmul [N]"
.LC2:
	.string	"N: %d\n"
.LC4:
	.string	"CPU elapsed time: %lf\n"
.LC5:
	.string	"GPU elapsed time: %lf\n"
.LC6:
	.string	"Failed at %d, h_result_global, %f, %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	decl	%edi
	jg	.L24
	leaq	.LC1(%rip), %rdi
	call	puts@PLT
	jmp	.L25
.L24:
	movq	8(%rsi), %rdi
	xorl	%r12d, %r12d
	movl	$100, %r14d
	call	atoi@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movl	%eax, %edx
	movl	%eax, %ebx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movslq	%ebx, %rax
	movl	%ebx, %r15d
	imulq	%rax, %rax
	imull	%ebx, %r15d
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	xorl	%edi, %edi
	movq	%rax, %rbp
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L26:
	cmpl	%r12d, %r15d
	jle	.L42
	call	rand@PLT
	cltd
	idivl	%r14d
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, 0(%r13,%r12,4)
	call	rand@PLT
	movl	$0x00000000, 0(%rbp,%r12,4)
	cltd
	idivl	%r14d
	movq	16(%rsp), %rax
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%rax,%r12,4)
	incq	%r12
	jmp	.L26
.L42:
	movq	8(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	call	malloc@PLT
	xorl	%esi, %esi
	movq	%rax, %r14
	leaq	88(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, %r12
	call	gettimeofday@PLT
	movq	16(%rsp), %rsi
	movq	%rbp, %rdx
	movl	%ebx, %ecx
	movq	%r13, %rdi
	call	_Z9matmulCPUPfS_S_i
	leaq	104(%rsp), %rax
	xorl	%esi, %esi
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	gettimeofday@PLT
	movq	104(%rsp), %rdx
	movq	112(%rsp), %rax
	subq	88(%rsp), %rdx
	subq	96(%rsp), %rax
	jns	.L28
	decq	%rdx
	addq	$1000000, %rax
.L28:
	cvtsi2sdq	%rdx, %xmm1
	mulsd	.LC3(%rip), %xmm1
	movl	$2, %edi
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC3(%rip), %xmm0
	leaq	.LC4(%rip), %rsi
	movb	$1, %al
	addsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movl	%ebx, %eax
	movl	$16, %ecx
	movq	%r12, %rdi
	cltd
	movl	$1, 72(%rsp)
	idivl	%ecx
	movl	$1, 84(%rsp)
	movabsq	$68719476752, %rcx
	movl	%ebx, %edx
	andl	$15, %edx
	movq	%rcx, 64(%rsp)
	cmpl	$1, %edx
	sbbl	$-1, %eax
	xorl	%esi, %esi
	movl	%eax, 76(%rsp)
	movl	%eax, 80(%rsp)
	call	gettimeofday@PLT
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	48(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	72(%rsp), %ecx
	movl	84(%rsp), %esi
	xorl	%r9d, %r9d
	movq	64(%rsp), %rdx
	movq	76(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	%ebx, %ecx
	movq	40(%rsp), %rdi
	call	_Z40__device_stub__Z15MatrixMulKernelPfS_S_iPfS_S_i
.L30:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	%r14, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	movq	104(%rsp), %rdx
	movq	112(%rsp), %rax
	subq	88(%rsp), %rdx
	subq	96(%rsp), %rax
	jns	.L31
	decq	%rdx
	addq	$1000000, %rax
.L31:
	cvtsi2sdq	%rdx, %xmm1
	mulsd	.LC3(%rip), %xmm1
	movl	$2, %edi
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC3(%rip), %xmm0
	leaq	.LC5(%rip), %rsi
	movb	$1, %al
	addsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	xorl	%edx, %edx
.L32:
	cmpl	%edx, %r15d
	jle	.L34
	leaq	1(%rdx), %rax
	movss	0(%rbp,%rdx,4), %xmm0
	movss	-4(%r14,%rax,4), %xmm1
	ucomiss	%xmm1, %xmm0
	jp	.L38
	je	.L37
.L38:
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	leaq	.LC6(%rip), %rsi
	call	__printf_chk@PLT
	jmp	.L34
.L37:
	movq	%rax, %rdx
	jmp	.L32
.L34:
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
.L25:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z15MatrixMulKernelPfS_S_i"
.LC8:
	.string	"_Z9matmulGPUPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15MatrixMulKernelPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9matmulGPUPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	0
	.long	1083129856
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:



#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <time.h>

#define TILE_WIDTH 16

void matmulCPU(float *a, float *b, float *r, int n);
__global__ void matmulGPU(float *a, float *b, float *r, int n);
__global__ void MatrixMulKernel(float* Md, float* Nd, float* Pd, int Width);

int main(int argc, char* argv[]){

	if (argc < 2) {
		puts("Usage: matmul [N]");
		return 0;
	}

	int N = atoi(argv[1]);
	printf("N: %d\n", N);

	//Total size
	size_t sz = sizeof(float) * N * N;

	//Struct for time measure
	struct timeval start, end, timer;

	//Memory allocation for cpu(host)
	float *h_a = (float*)malloc(sz);
	float *h_b = (float*)malloc(sz);
	float *h_r = (float*)malloc(sz);

	srand(time(NULL));
	for(int i=0; i<N*N; i++) {
		h_a[i] = (float)(rand()%100);
		h_b[i] = (float)(rand()%100);
		h_r[i] = 0;
	}

	//Memory alocation for gpu(device)
	float *d_a, *d_b, *d_r;
	hipMalloc((void **) &d_a, sz);
	hipMalloc((void **) &d_b, sz);
	hipMalloc((void **) &d_r, sz);

	float *h_result_global = (float*)malloc(sz);

	gettimeofday(&start, NULL);
	matmulCPU(h_a, h_b, h_r, N);
	gettimeofday(&end, NULL);
	timersub(&end, &start, &timer);
	printf("CPU elapsed time: %lf\n", (timer.tv_usec / 1000.0 + timer.tv_sec * 1000.0));

	int threads_width = 16;
	int grid_width = N % threads_width ? N / threads_width + 1 : N / threads_width;
	dim3 dim_threads(threads_width, threads_width);
	dim3 dim_grid(grid_width, grid_width);

	gettimeofday(&start, NULL);

	hipMemcpy(d_a, h_a, sz, hipMemcpyHostToDevice);
	hipMemcpy(d_b, h_b, sz, hipMemcpyHostToDevice);

	MatrixMulKernel<<<dim_grid, dim_threads>>>(d_a, d_b, d_r, N);

	hipDeviceSynchronize();

	hipMemcpy(h_result_global, d_r, sz, hipMemcpyDeviceToHost);
	gettimeofday(&end, NULL);

	timersub(&end, &start, &timer);

	printf("GPU elapsed time: %lf\n", (timer.tv_usec / 1000.0 + timer.tv_sec * 1000.0));

	for (int i = 0; i<N*N; i++){
		if(h_r[i] != h_result_global[i]){
			printf("Failed at %d, h_result_global, %f, %f\n", i, h_r[i], h_result_global[i]);
			break;
		}
	}

	hipFree(d_a);
	hipFree(d_b);
	hipFree(d_r);

	free(h_result_global);
	free(h_a);
	free(h_b);
	free(h_r);

	return 0;

}

void matmulCPU(float *a, float *b, float *r, int n){
	int i=0,j=0,x=0;
	for(i=0;i<n;i++){
		for(j=0;j<n;j++){
			float sum = 0.0f;
			for(x=0;x<n;x++){
				sum+=a[j*n + x] * b[x * n + i];
			}
			r[j*n + i] = sum;
		}
	}
}

__global__ void matmulGPU(float *a, float *b, float *r, int n){
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;

	if(x>=n || y>=n)
		return;

	float sum = 0;
	for(int i=0;i<n;i++)
		sum+=(a[y*n +i] * b[i*n+x]);

	r[y*n+x] = sum;
}

__global__ void MatrixMulKernel(float*Md, float* Nd, float* Pd, int Width){
	__shared__ float Mds[TILE_WIDTH][TILE_WIDTH];
	__shared__ float Nds[TILE_WIDTH][TILE_WIDTH];

	int bx = blockIdx.x;
	int by = blockIdx.y;

	int tx = threadIdx.x;
	int ty = threadIdx.y;

	int Row = by * TILE_WIDTH + ty;
	int Col = bx * TILE_WIDTH + tx;

	if(Row >= Width || Col >= Width)
		return;

	float Pvalue;
	if(tx == 0 || ty == 0)
		Pvalue = 0;

	int num_tile = Width % TILE_WIDTH == 0 ? Width / TILE_WIDTH : Width / TILE_WIDTH + 1;

	for(int m=0;m<num_tile;++m){
		Mds[ty][tx] = Md[Row * Width + (tx + m * TILE_WIDTH)];
		Nds[ty][tx] = Nd[Col + (m * TILE_WIDTH + ty) * Width];
		__syncthreads();
		
		int var_tile_width = m == (num_tile - 1) ? Width % TILE_WIDTH : TILE_WIDTH;
		for(int k=0; k<var_tile_width;++k){
			Pvalue+=Mds[ty][k]*Nds[k][tx];
		}
		__syncthreads();
	}
	Pd[Row*Width+Col] = Pvalue;
}


	.text
	.file	"05_matrixMultiplication_shared.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI0_0:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$1, %edi
	jg	.LBB0_2
# %bb.1:
	movl	$.L.str, %edi
	callq	puts
	jmp	.LBB0_23
.LBB0_2:
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r12d
	movl	$.L.str.1, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
	movslq	%r12d, %r15
	imulq	%r15, %r15
	shlq	$2, %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%r15, 8(%rsp)                   # 8-byte Spill
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r15
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movl	%r12d, %eax
	imull	%eax, %eax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	testl	%r12d, %r12d
	je	.LBB0_5
# %bb.3:                                # %.lr.ph.preheader
	movq	40(%rsp), %rbp                  # 8-byte Reload
	cmpl	$1, %ebp
                                        # kill: def $ebp killed $ebp killed $rbp def $rbp
	adcl	$0, %ebp
	xorl	%r13d, %r13d
.LBB0_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbx,%r13,4)
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r14,%r13,4)
	movl	$0, (%r15,%r13,4)
	incq	%r13
	cmpq	%r13, %rbp
	jne	.LBB0_4
.LBB0_5:                                # %._crit_edge
	leaq	32(%rsp), %rdi
	movq	8(%rsp), %r13                   # 8-byte Reload
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	leaq	48(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	testl	%r12d, %r12d
	jle	.LBB0_12
# %bb.6:                                # %.preheader26.lr.ph.i
	movl	%r12d, %eax
	leaq	(,%rax,4), %rcx
	xorl	%edx, %edx
	movq	%r14, %rsi
.LBB0_7:                                # %.preheader.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_8 Depth 2
                                        #       Child Loop BB0_9 Depth 3
	leaq	(%r15,%rdx,4), %rdi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
.LBB0_8:                                # %.preheader.i
                                        #   Parent Loop BB0_7 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_9 Depth 3
	movl	%r8d, %r10d
	leaq	(%rbx,%r10,4), %r11
	movq	%r9, %r10
	imulq	%rax, %r10
	xorps	%xmm0, %xmm0
	movq	%rsi, %r13
	xorl	%ebp, %ebp
.LBB0_9:                                #   Parent Loop BB0_7 Depth=1
                                        #     Parent Loop BB0_8 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r11,%rbp), %xmm1              # xmm1 = mem[0],zero,zero,zero
	mulss	(%r13), %xmm1
	addss	%xmm1, %xmm0
	addq	$4, %rbp
	addq	%rcx, %r13
	cmpq	%rbp, %rcx
	jne	.LBB0_9
# %bb.10:                               # %._crit_edge.i
                                        #   in Loop: Header=BB0_8 Depth=2
	movss	%xmm0, (%rdi,%r10,4)
	incq	%r9
	addl	%r12d, %r8d
	cmpq	%rax, %r9
	jne	.LBB0_8
# %bb.11:                               # %._crit_edge30.i
                                        #   in Loop: Header=BB0_7 Depth=1
	incq	%rdx
	addq	$4, %rsi
	cmpq	%rax, %rdx
	jne	.LBB0_7
.LBB0_12:                               # %_Z9matmulCPUPfS_S_i.exit
	leaq	72(%rsp), %rbp
	movq	%rbp, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%rbp), %rax
	movq	8(%rbp), %rcx
	subq	48(%rsp), %rax
	subq	56(%rsp), %rcx
	leaq	1000000(%rcx), %rdx
	movq	%rcx, %rsi
	sarq	$63, %rsi
	addq	%rax, %rsi
	testq	%rcx, %rcx
	cmovnsq	%rcx, %rdx
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rdx, %xmm1
	movsd	.LCPI0_0(%rip), %xmm2           # xmm2 = mem[0],zero
	divsd	%xmm2, %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rsi, %xmm0
	mulsd	%xmm2, %xmm0
	addsd	%xmm1, %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	testb	$15, %r12b
	je	.LBB0_14
# %bb.13:
	leal	15(%r12), %eax
	testl	%r12d, %r12d
	cmovnsl	%r12d, %eax
	sarl	$4, %eax
	incl	%eax
	jmp	.LBB0_15
.LBB0_14:
	movl	%r12d, %eax
	sarl	$4, %eax
.LBB0_15:
	movq	8(%rsp), %r13                   # 8-byte Reload
	movl	%eax, %eax
	movq	%rax, %rbp
	shlq	$32, %rbp
	orq	%rax, %rbp
	leaq	48(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	32(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%rbp, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_17
# %bb.16:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	%r12d, %ecx
	callq	_Z30__device_stub__MatrixMulKernelPfS_S_i
.LBB0_17:
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rsi
	movq	64(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rdi
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	72(%rsp), %r13
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r13), %rax
	movq	8(%r13), %rcx
	subq	48(%rsp), %rax
	subq	56(%rsp), %rcx
	leaq	1000000(%rcx), %rdx
	movq	%rcx, %rsi
	sarq	$63, %rsi
	addq	%rax, %rsi
	testq	%rcx, %rcx
	cmovnsq	%rcx, %rdx
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rdx, %xmm1
	movsd	.LCPI0_0(%rip), %xmm2           # xmm2 = mem[0],zero
	divsd	%xmm2, %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rsi, %xmm0
	mulsd	%xmm2, %xmm0
	addsd	%xmm1, %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	testl	%r12d, %r12d
	movq	40(%rsp), %rax                  # 8-byte Reload
	je	.LBB0_22
# %bb.18:                               # %.lr.ph95.preheader
	cmpl	$1, %eax
	adcl	$0, %eax
	xorl	%esi, %esi
.LBB0_19:                               # %.lr.ph95
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r15,%rsi,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	(%rbp,%rsi,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm0
	jne	.LBB0_20
	jp	.LBB0_20
# %bb.21:                               #   in Loop: Header=BB0_19 Depth=1
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB0_19
	jmp	.LBB0_22
.LBB0_20:
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	movl	$.L.str.4, %edi
                                        # kill: def $esi killed $esi killed $rsi
	movb	$2, %al
	callq	printf
.LBB0_22:                               # %.loopexit
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbp, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
.LBB0_23:
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z9matmulCPUPfS_S_i             # -- Begin function _Z9matmulCPUPfS_S_i
	.type	_Z9matmulCPUPfS_S_i,@function
_Z9matmulCPUPfS_S_i:                    # @_Z9matmulCPUPfS_S_i
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB1_8
# %bb.1:                                # %.preheader26.lr.ph
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%ecx, %eax
	leaq	(,%rax,4), %r8
	xorl	%r9d, %r9d
.LBB1_2:                                # %.preheader.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
                                        #       Child Loop BB1_4 Depth 3
	leaq	(%rdx,%r9,4), %r10
	xorl	%r11d, %r11d
	xorl	%ebx, %ebx
.LBB1_3:                                # %.preheader
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_4 Depth 3
	movl	%r11d, %r14d
	leaq	(%rdi,%r14,4), %r15
	movq	%rbx, %r14
	imulq	%rax, %r14
	xorps	%xmm0, %xmm0
	movq	%rsi, %r12
	xorl	%r13d, %r13d
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r15,%r13,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%r12), %xmm1
	addss	%xmm1, %xmm0
	incq	%r13
	addq	%r8, %r12
	cmpq	%r13, %rax
	jne	.LBB1_4
# %bb.5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_3 Depth=2
	movss	%xmm0, (%r10,%r14,4)
	incq	%rbx
	addl	%ecx, %r11d
	cmpq	%rax, %rbx
	jne	.LBB1_3
# %bb.6:                                # %._crit_edge30
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r9
	addq	$4, %rsi
	cmpq	%rax, %r9
	jne	.LBB1_2
# %bb.7:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
.LBB1_8:                                # %._crit_edge32
	retq
.Lfunc_end1:
	.size	_Z9matmulCPUPfS_S_i, .Lfunc_end1-_Z9matmulCPUPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__MatrixMulKernelPfS_S_i # -- Begin function _Z30__device_stub__MatrixMulKernelPfS_S_i
	.type	_Z30__device_stub__MatrixMulKernelPfS_S_i,@function
_Z30__device_stub__MatrixMulKernelPfS_S_i: # @_Z30__device_stub__MatrixMulKernelPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15MatrixMulKernelPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z30__device_stub__MatrixMulKernelPfS_S_i, .Lfunc_end2-_Z30__device_stub__MatrixMulKernelPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__matmulGPUPfS_S_i # -- Begin function _Z24__device_stub__matmulGPUPfS_S_i
	.type	_Z24__device_stub__matmulGPUPfS_S_i,@function
_Z24__device_stub__matmulGPUPfS_S_i:    # @_Z24__device_stub__matmulGPUPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9matmulGPUPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z24__device_stub__matmulGPUPfS_S_i, .Lfunc_end3-_Z24__device_stub__matmulGPUPfS_S_i
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9matmulGPUPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15MatrixMulKernelPfS_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Usage: matmul [N]"
	.size	.L.str, 18

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"N: %d\n"
	.size	.L.str.1, 7

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"CPU elapsed time: %lf\n"
	.size	.L.str.2, 23

	.type	_Z15MatrixMulKernelPfS_S_i,@object # @_Z15MatrixMulKernelPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z15MatrixMulKernelPfS_S_i
	.p2align	3, 0x0
_Z15MatrixMulKernelPfS_S_i:
	.quad	_Z30__device_stub__MatrixMulKernelPfS_S_i
	.size	_Z15MatrixMulKernelPfS_S_i, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"GPU elapsed time: %lf\n"
	.size	.L.str.3, 23

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed at %d, h_result_global, %f, %f\n"
	.size	.L.str.4, 39

	.type	_Z9matmulGPUPfS_S_i,@object     # @_Z9matmulGPUPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z9matmulGPUPfS_S_i
	.p2align	3, 0x0
_Z9matmulGPUPfS_S_i:
	.quad	_Z24__device_stub__matmulGPUPfS_S_i
	.size	_Z9matmulGPUPfS_S_i, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z9matmulGPUPfS_S_i"
	.size	.L__unnamed_1, 20

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15MatrixMulKernelPfS_S_i"
	.size	.L__unnamed_2, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__MatrixMulKernelPfS_S_i
	.addrsig_sym _Z24__device_stub__matmulGPUPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15MatrixMulKernelPfS_S_i
	.addrsig_sym _Z9matmulGPUPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9matmulGPUPfS_S_i     ; -- Begin function _Z9matmulGPUPfS_S_i
	.globl	_Z9matmulGPUPfS_S_i
	.p2align	8
	.type	_Z9matmulGPUPfS_S_i,@function
_Z9matmulGPUPfS_S_i:                    ; @_Z9matmulGPUPfS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e64 s2, v2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_lo_u32 v1, v1, s2
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, v0
	s_mov_b32 s3, s2
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s3, 0
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_add_nc_u32_e32 v4, s2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b32 v5, v[2:3], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v5, v7
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v6, 0
.LBB0_5:                                ; %Flow47
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9matmulGPUPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9matmulGPUPfS_S_i, .Lfunc_end0-_Z9matmulGPUPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 336
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z15MatrixMulKernelPfS_S_i ; -- Begin function _Z15MatrixMulKernelPfS_S_i
	.globl	_Z15MatrixMulKernelPfS_S_i
	.p2align	8
	.type	_Z15MatrixMulKernelPfS_S_i,@function
_Z15MatrixMulKernelPfS_S_i:             ; @_Z15MatrixMulKernelPfS_S_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v2, s15, 4, v1
	v_lshl_add_u32 v0, s14, 4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_max_i32_e32 v4, v2, v0
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s2, v4
	s_cbranch_execz .LBB1_8
; %bb.1:
	s_ashr_i32 s3, s2, 31
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_lshr_b32 s3, s3, 28
	v_mul_lo_u32 v2, v2, s2
	s_add_i32 s8, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s8, -16
	s_ashr_i32 s8, s8, 4
	s_sub_i32 s3, s2, s3
	s_cmp_lg_u32 s3, 0
	s_cselect_b32 s9, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_cmp_lg_u32 s9, 0
	s_mov_b32 s9, 0
	s_addc_u32 s8, s8, 0
	s_cmp_lt_i32 s8, 1
	s_cbranch_scc1 .LBB1_6
; %bb.2:                                ; %.lr.ph62
	v_lshlrev_b32_e32 v7, 2, v3
	v_lshlrev_b32_e32 v4, 6, v1
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v6, v2, v3
	s_add_i32 s10, s8, -1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v5, 0x400, v7
	v_add_nc_u32_e32 v7, v4, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v8, v5, v4
.LBB1_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_4 Depth 2
	s_lshl_b32 s11, s9, 4
	s_cmp_eq_u32 s9, s10
	v_add_nc_u32_e32 v10, s11, v1
	v_add_nc_u32_e32 v9, s11, v6
	s_cselect_b32 s11, s3, 16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_lt_i32 s11, 1
	v_mad_u64_u32 v[11:12], null, v10, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v12, 31, v11
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v9, vcc_lo, s4, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
	global_load_b32 v13, v[9:10], off
	global_load_b32 v11, v[11:12], off
	v_dual_mov_b32 v10, v4 :: v_dual_mov_b32 v9, v5
	s_waitcnt vmcnt(1)
	ds_store_b32 v7, v13
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_5
.LBB1_4:                                ; %.lr.ph
                                        ;   Parent Loop BB1_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_b32 v11, v10
	ds_load_b32 v12, v9
	v_add_nc_u32_e32 v10, 4, v10
	v_add_nc_u32_e32 v9, 64, v9
	s_add_i32 s11, s11, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s11, 0
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v3, v11, v12
	s_cbranch_scc0 .LBB1_4
.LBB1_5:                                ; %._crit_edge
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_add_i32 s9, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s9, s8
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_3
	s_branch .LBB1_7
.LBB1_6:
	v_mov_b32_e32 v3, 0
.LBB1_7:                                ; %Flow83
	v_add_nc_u32_e32 v0, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v3, off
.LBB1_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15MatrixMulKernelPfS_S_i
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15MatrixMulKernelPfS_S_i, .Lfunc_end1-_Z15MatrixMulKernelPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 520
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9matmulGPUPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9matmulGPUPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15MatrixMulKernelPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15MatrixMulKernelPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
