//Universidad del Valle de Guatemala
//Proyecto 4 - Calculo de Pi con Wallis y Nilakantha
//Programacion de Microprocesadores
//Integrantes:
//Bryann Alfaro 19372
//Diego Arredondo 19422
//Donaldo Garcia 19683
//Raul Jimenez 19017
//Diego Alvarez 19498

#include <stdio.h>
#include <cuda_runtime.h>

__global__ void serieWallis(float *convergencia, int *vectorN, int limite)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    float operacion;
    float operacion2;
 
    if((i-1)<=limite){
        operacion = (2.0f*(vectorN[i-1]))/((2.0f*(vectorN[i-1]))-1.0f);
        operacion2 = (2.0f*(i))/((2.0f*(i))+1.0f);
        convergencia[i]=operacion*operacion2;
    }
}

__global__ void nila(double *vector_2, double *vector_suma, int n)
{
    #include <math.h>
    // identificador de hilo
    int myID = threadIdx.x;
    int myid2 = (threadIdx.x +1)*2.f;
    if((threadIdx.x +1)%2 == 0)
    {
        vector_2[myID] = (4.f/(myid2*(myid2+1.f)*(myid2+2.f)))*-1.f;
    }else{
        vector_2[myID] = 4.f/(myid2*(myid2+1.f)*(myid2+2.f));  
    }
    
    // escritura de resultados
    vector_suma[myID] = vector_2[myID];
}

int main(void){

    //Inicializacion de Streams
    cudaStream_t stream1, stream2;
    cudaStreamCreate(&stream1);
    cudaStreamCreate(&stream2);

    int valorN =1000;

    //Stream 1
    float result=1.0f;
    size_t sizef = 10*valorN* sizeof(float);
    size_t sizei = 10*valorN* sizeof(int);

    //Stream 2
    double *hst_vector2, *hst_resultado;
    double *dev_vector2, *dev_resultado;

    //Reserva en el host Stream 1
    int *host_vectorN= (int *)malloc(sizei);
    float *host_vectorValor= (float *)malloc(sizef);

    //Reserva en el device Stream 1
    int *d_vectorN = NULL;
    cudaMalloc((void **)&d_vectorN,sizei);
    float *d_vectorValor = NULL;
    cudaMalloc((void **)&d_vectorValor, sizef);

    //Reserva en el host Stream 2
    hst_vector2 = (double*)malloc(valorN * sizeof(double));
    hst_resultado = (double*)malloc(valorN * sizeof(double));

    //Reserva en el device Stream 2
    cudaMalloc((void**)&dev_vector2, valorN * sizeof(double));
    cudaMalloc((void**)&dev_resultado, valorN * sizeof(double));

    //Llenado con los valores de N
    for(int i = 1; i <= valorN; i++)
     {
          host_vectorN[i-1]=i;
          hst_vector2[i] = 0;
     }


    //Creacion de Evento para tomar el tiempo
    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);

    //Bloques e hilos para la ejecucion de los kernels
    int threadsPerBlock = 1000;
    int blocksPerGrid = (valorN + threadsPerBlock - 1) / threadsPerBlock;


    //Stream 1
    cudaMemcpyAsync(d_vectorN, host_vectorN,sizei, cudaMemcpyHostToDevice, stream1);
    cudaMemcpyAsync(d_vectorValor, host_vectorValor, sizef, cudaMemcpyHostToDevice, stream1);

    cudaEventRecord(start);
    serieWallis<<<blocksPerGrid+1,threadsPerBlock, 0, stream1>>>(d_vectorValor, d_vectorN, valorN);
    cudaEventRecord(stop);

    cudaMemcpyAsync(host_vectorValor, d_vectorValor, sizef, cudaMemcpyDeviceToHost, stream1);

    cudaEventSynchronize(stop);
    float milliseconds = 0;
    cudaEventElapsedTime(&milliseconds, start, stop);


    //Stream 2
    cudaMemcpyAsync(dev_vector2, hst_vector2, valorN * sizeof(double), cudaMemcpyHostToDevice, stream2);
    cudaMemcpyAsync(hst_resultado, dev_resultado, valorN * sizeof(double), cudaMemcpyHostToDevice, stream2);
    cudaEventRecord(start);
    nila <<< blocksPerGrid+1,threadsPerBlock, 0, stream2 >>>(dev_vector2, dev_resultado, valorN);
    cudaEventRecord(stop);
    cudaMemcpyAsync(hst_resultado, dev_resultado, valorN * sizeof(double), cudaMemcpyDeviceToHost, stream2);

    cudaEventSynchronize(stop);
    float milliseconds2 = 0;
    cudaEventElapsedTime(&milliseconds2, start, stop);

    //Sincronizar Streams
    cudaStreamSynchronize(stream1);
    cudaStreamSynchronize(stream2);


    //Impresion de Datos del Stream 1

    printf("--------Stream 1--------\n");

    printf("Milisegundos: %.5f\n",milliseconds);
    printf("Segundos: %.5f\n",milliseconds/1000);

    for(int j=1;j<=valorN;j++){
        
        result*=(host_vectorValor[j]);

     }

    printf("\nPi con la serie de Wallis:  %.16f\n\n",result*2);


    //Impresion de Datos del Stream 2

    printf("--------Stream 2--------\n");
     
    printf("Milisegundos: %.5f\n",milliseconds2);
    printf("Segundos: %.5f\n",milliseconds2/1000);

    double suma = 0;
    for (int i = 0; i < valorN; i++)
    {
        suma += hst_resultado[i]*1.f;
    }
    printf("\nPi con la serie de Nilakantha: %.16f ", suma+3.f);
    printf("\n");

    //Salida

    //Destruccion de Streams
    cudaStreamDestroy(stream1);
    cudaStreamDestroy(stream2);

    //Liberacion de host
    free(host_vectorN);
    free(host_vectorValor);
    
    //Liberacion de Device
    cudaFree(d_vectorN);
    cudaFree(d_vectorValor);
}
	.file	"tmpxft_00340e05_00000000-6_Proyecto.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z34__device_stub__Z11serieWallisPfPiiPfPii
	.type	_Z34__device_stub__Z11serieWallisPfPiiPfPii, @function
_Z34__device_stub__Z11serieWallisPfPiiPfPii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z11serieWallisPfPii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z34__device_stub__Z11serieWallisPfPiiPfPii, .-_Z34__device_stub__Z11serieWallisPfPiiPfPii
	.globl	_Z11serieWallisPfPii
	.type	_Z11serieWallisPfPii, @function
_Z11serieWallisPfPii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z11serieWallisPfPiiPfPii
	.cfi_endproc
.LFE2053:
	.size	_Z11serieWallisPfPii, .-_Z11serieWallisPfPii
	.globl	_Z26__device_stub__Z4nilaPdS_iPdS_i
	.type	_Z26__device_stub__Z4nilaPdS_iPdS_i, @function
_Z26__device_stub__Z4nilaPdS_iPdS_i:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z4nilaPdS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L8:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z26__device_stub__Z4nilaPdS_iPdS_i, .-_Z26__device_stub__Z4nilaPdS_iPdS_i
	.globl	_Z4nilaPdS_i
	.type	_Z4nilaPdS_i, @function
_Z4nilaPdS_i:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z4nilaPdS_iPdS_i
	.cfi_endproc
.LFE2055:
	.size	_Z4nilaPdS_i, .-_Z4nilaPdS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"--------Stream 1--------\n"
.LC4:
	.string	"Milisegundos: %.5f\n"
.LC6:
	.string	"Segundos: %.5f\n"
.LC7:
	.string	"\nPi con la serie de Wallis:  %.16f\n\n"
.LC8:
	.string	"--------Stream 2--------\n"
.LC10:
	.string	"\nPi con la serie de Nilakantha: %.16f "
.LC11:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	call	cudaStreamCreate@PLT
	leaq	24(%rsp), %rdi
	call	cudaStreamCreate@PLT
	movl	$40000, %edi
	call	malloc@PLT
	movl	$40000, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	leaq	48(%rsp), %rdi
	movl	$40000, %esi
	movq	%rax, %rbx
	xorl	%eax, %eax
	movq	%rax, 48(%rsp)
	call	cudaMalloc@PLT
	xorl	%edx, %edx
	movl	$40000, %esi
	leaq	56(%rsp), %rdi
	movq	%rdx, 56(%rsp)
	call	cudaMalloc@PLT
	movl	$8000, %edi
	call	malloc@PLT
	movl	$8000, %edi
	movq	%rax, %r13
	call	malloc@PLT
	leaq	32(%rsp), %rdi
	movl	$8000, %esi
	movq	%rax, %r12
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$8000, %esi
	call	cudaMalloc@PLT
	movl	$1, %eax
.L14:
	movl	%eax, -4(%rbp,%rax,4)
	incq	%rax
	cmpq	$1001, %rax
	jne	.L14
	leaq	8(%r13), %rdx
	xorl	%eax, %eax
	movl	$2000, %ecx
	movq	%rdx, %rdi
	rep stosl
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	16(%rsp), %r8
	movq	48(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$40000, %edx
	call	cudaMemcpyAsync@PLT
	movq	16(%rsp), %r8
	movq	56(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$40000, %edx
	call	cudaMemcpyAsync@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$536871037, %edx
	movl	$2147483649, %edi
	xorl	%r8d, %r8d
	movq	16(%rsp), %r9
	salq	$3, %rdx
	addq	%rdi, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 92(%rsp)
	movl	$1, 100(%rsp)
	movq	%rdi, 80(%rsp)
	movl	$1, 88(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	48(%rsp), %rsi
	movq	56(%rsp), %rdi
	movl	$1000, %edx
	call	_Z34__device_stub__Z11serieWallisPfPiiPfPii
.L15:
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	16(%rsp), %r8
	movq	56(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	movl	$40000, %edx
	call	cudaMemcpyAsync@PLT
	movq	72(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	leaq	12(%rsp), %rdi
	movl	$0x00000000, 12(%rsp)
	call	cudaEventElapsedTime@PLT
	movq	24(%rsp), %r8
	movq	32(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	movl	$8000, %edx
	call	cudaMemcpyAsync@PLT
	movq	24(%rsp), %r8
	movq	40(%rsp), %rsi
	movq	%r12, %rdi
	movl	$1, %ecx
	movl	$8000, %edx
	call	cudaMemcpyAsync@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$536871037, %edx
	movl	$2147483649, %edi
	xorl	%r8d, %r8d
	movq	24(%rsp), %r9
	salq	$3, %rdx
	addq	%rdi, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 92(%rsp)
	movl	$1, 100(%rsp)
	movq	%rdi, 80(%rsp)
	movl	$1, 88(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$1000, %edx
	call	_Z26__device_stub__Z4nilaPdS_iPdS_i
.L16:
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	leaq	.LC4(%rip), %r14
	leaq	.LC6(%rip), %r13
	call	cudaEventRecord@PLT
	movq	24(%rsp), %r8
	movq	40(%rsp), %rsi
	movq	%r12, %rdi
	movl	$2, %ecx
	movl	$8000, %edx
	call	cudaMemcpyAsync@PLT
	movq	72(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	leaq	92(%rsp), %rdi
	movl	$0x00000000, 92(%rsp)
	call	cudaEventElapsedTime@PLT
	movq	16(%rsp), %rdi
	call	cudaStreamSynchronize@PLT
	movq	24(%rsp), %rdi
	call	cudaStreamSynchronize@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r14, %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	12(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	%r13, %rsi
	movb	$1, %al
	movl	$2, %edi
	movss	12(%rsp), %xmm0
	divss	.LC5(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movss	.LC0(%rip), %xmm0
	movl	$1, %eax
.L17:
	mulss	(%rbx,%rax,4), %xmm0
	incq	%rax
	cmpq	$1001, %rax
	jne	.L17
	addss	%xmm0, %xmm0
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC8(%rip), %rsi
	call	__printf_chk@PLT
	movq	%r14, %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	92(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	%r13, %rsi
	movb	$1, %al
	movl	$2, %edi
	movss	92(%rsp), %xmm0
	divss	.LC5(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
.L18:
	addsd	(%r12,%rax,8), %xmm0
	incq	%rax
	cmpq	$1000, %rax
	jne	.L18
	addsd	.LC9(%rip), %xmm0
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movq	24(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$112, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z4nilaPdS_i"
.LC13:
	.string	"_Z11serieWallisPfPii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z4nilaPdS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11serieWallisPfPii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.align 4
.LC5:
	.long	1148846080
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC9:
	.long	0
	.long	1074266112
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//Universidad del Valle de Guatemala
//Proyecto 4 - Calculo de Pi con Wallis y Nilakantha
//Programacion de Microprocesadores
//Integrantes:
//Bryann Alfaro 19372
//Diego Arredondo 19422
//Donaldo Garcia 19683
//Raul Jimenez 19017
//Diego Alvarez 19498

#include <stdio.h>
#include <hip/hip_runtime.h>

__global__ void serieWallis(float *convergencia, int *vectorN, int limite)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    float operacion;
    float operacion2;
 
    if((i-1)<=limite){
        operacion = (2.0f*(vectorN[i-1]))/((2.0f*(vectorN[i-1]))-1.0f);
        operacion2 = (2.0f*(i))/((2.0f*(i))+1.0f);
        convergencia[i]=operacion*operacion2;
    }
}

__global__ void nila(double *vector_2, double *vector_suma, int n)
{
    #include <math.h>
    // identificador de hilo
    int myID = threadIdx.x;
    int myid2 = (threadIdx.x +1)*2.f;
    if((threadIdx.x +1)%2 == 0)
    {
        vector_2[myID] = (4.f/(myid2*(myid2+1.f)*(myid2+2.f)))*-1.f;
    }else{
        vector_2[myID] = 4.f/(myid2*(myid2+1.f)*(myid2+2.f));  
    }
    
    // escritura de resultados
    vector_suma[myID] = vector_2[myID];
}

int main(void){

    //Inicializacion de Streams
    hipStream_t stream1, stream2;
    hipStreamCreate(&stream1);
    hipStreamCreate(&stream2);

    int valorN =1000;

    //Stream 1
    float result=1.0f;
    size_t sizef = 10*valorN* sizeof(float);
    size_t sizei = 10*valorN* sizeof(int);

    //Stream 2
    double *hst_vector2, *hst_resultado;
    double *dev_vector2, *dev_resultado;

    //Reserva en el host Stream 1
    int *host_vectorN= (int *)malloc(sizei);
    float *host_vectorValor= (float *)malloc(sizef);

    //Reserva en el device Stream 1
    int *d_vectorN = NULL;
    hipMalloc((void **)&d_vectorN,sizei);
    float *d_vectorValor = NULL;
    hipMalloc((void **)&d_vectorValor, sizef);

    //Reserva en el host Stream 2
    hst_vector2 = (double*)malloc(valorN * sizeof(double));
    hst_resultado = (double*)malloc(valorN * sizeof(double));

    //Reserva en el device Stream 2
    hipMalloc((void**)&dev_vector2, valorN * sizeof(double));
    hipMalloc((void**)&dev_resultado, valorN * sizeof(double));

    //Llenado con los valores de N
    for(int i = 1; i <= valorN; i++)
     {
          host_vectorN[i-1]=i;
          hst_vector2[i] = 0;
     }


    //Creacion de Evento para tomar el tiempo
    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);

    //Bloques e hilos para la ejecucion de los kernels
    int threadsPerBlock = 1000;
    int blocksPerGrid = (valorN + threadsPerBlock - 1) / threadsPerBlock;


    //Stream 1
    hipMemcpyAsync(d_vectorN, host_vectorN,sizei, hipMemcpyHostToDevice, stream1);
    hipMemcpyAsync(d_vectorValor, host_vectorValor, sizef, hipMemcpyHostToDevice, stream1);

    hipEventRecord(start);
    serieWallis<<<blocksPerGrid+1,threadsPerBlock, 0, stream1>>>(d_vectorValor, d_vectorN, valorN);
    hipEventRecord(stop);

    hipMemcpyAsync(host_vectorValor, d_vectorValor, sizef, hipMemcpyDeviceToHost, stream1);

    hipEventSynchronize(stop);
    float milliseconds = 0;
    hipEventElapsedTime(&milliseconds, start, stop);


    //Stream 2
    hipMemcpyAsync(dev_vector2, hst_vector2, valorN * sizeof(double), hipMemcpyHostToDevice, stream2);
    hipMemcpyAsync(hst_resultado, dev_resultado, valorN * sizeof(double), hipMemcpyHostToDevice, stream2);
    hipEventRecord(start);
    nila <<< blocksPerGrid+1,threadsPerBlock, 0, stream2 >>>(dev_vector2, dev_resultado, valorN);
    hipEventRecord(stop);
    hipMemcpyAsync(hst_resultado, dev_resultado, valorN * sizeof(double), hipMemcpyDeviceToHost, stream2);

    hipEventSynchronize(stop);
    float milliseconds2 = 0;
    hipEventElapsedTime(&milliseconds2, start, stop);

    //Sincronizar Streams
    hipStreamSynchronize(stream1);
    hipStreamSynchronize(stream2);


    //Impresion de Datos del Stream 1

    printf("--------Stream 1--------\n");

    printf("Milisegundos: %.5f\n",milliseconds);
    printf("Segundos: %.5f\n",milliseconds/1000);

    for(int j=1;j<=valorN;j++){
        
        result*=(host_vectorValor[j]);

     }

    printf("\nPi con la serie de Wallis:  %.16f\n\n",result*2);


    //Impresion de Datos del Stream 2

    printf("--------Stream 2--------\n");
     
    printf("Milisegundos: %.5f\n",milliseconds2);
    printf("Segundos: %.5f\n",milliseconds2/1000);

    double suma = 0;
    for (int i = 0; i < valorN; i++)
    {
        suma += hst_resultado[i]*1.f;
    }
    printf("\nPi con la serie de Nilakantha: %.16f ", suma+3.f);
    printf("\n");

    //Salida

    //Destruccion de Streams
    hipStreamDestroy(stream1);
    hipStreamDestroy(stream2);

    //Liberacion de host
    free(host_vectorN);
    free(host_vectorValor);
    
    //Liberacion de Device
    hipFree(d_vectorN);
    hipFree(d_vectorValor);
}
	.text
	.file	"Proyecto.hip"
	.globl	_Z26__device_stub__serieWallisPfPii # -- Begin function _Z26__device_stub__serieWallisPfPii
	.type	_Z26__device_stub__serieWallisPfPii,@function
_Z26__device_stub__serieWallisPfPii:    # @_Z26__device_stub__serieWallisPfPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11serieWallisPfPii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__serieWallisPfPii, .Lfunc_end0-_Z26__device_stub__serieWallisPfPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__nilaPdS_i    # -- Begin function _Z19__device_stub__nilaPdS_i
	.type	_Z19__device_stub__nilaPdS_i,@function
_Z19__device_stub__nilaPdS_i:           # @_Z19__device_stub__nilaPdS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4nilaPdS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z19__device_stub__nilaPdS_i, .Lfunc_end1-_Z19__device_stub__nilaPdS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x447a0000                      # float 1000
.LCPI2_1:
	.long	0x3f800000                      # float 1
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_2:
	.quad	0x4008000000000000              # double 3
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	16(%rsp), %rdi
	callq	hipStreamCreate
	leaq	8(%rsp), %rdi
	callq	hipStreamCreate
	movl	$40000, %edi                    # imm = 0x9C40
	callq	malloc
	movq	%rax, %rbx
	movl	$40000, %edi                    # imm = 0x9C40
	callq	malloc
	movq	%rax, %r14
	xorl	%r13d, %r13d
	leaq	48(%rsp), %rdi
	movq	%r13, (%rdi)
	movl	$40000, %esi                    # imm = 0x9C40
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	%r13, (%rdi)
	movl	$40000, %esi                    # imm = 0x9C40
	callq	hipMalloc
	movl	$1, %edi
	movl	$8000, %esi                     # imm = 0x1F40
	callq	calloc@PLT
	movq	%rax, %r12
	movl	$8000, %edi                     # imm = 0x1F40
	callq	malloc
	movq	%rax, %r15
	leaq	64(%rsp), %rdi
	movl	$8000, %esi                     # imm = 0x1F40
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	movl	$8000, %esi                     # imm = 0x1F40
	callq	hipMalloc
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	leaq	1(%r13), %rax
	movl	%eax, (%rbx,%r13,4)
	movq	%rax, %r13
	cmpq	$1000, %rax                     # imm = 0x3E8
	jne	.LBB2_1
# %bb.2:
	movabsq	$4294967298, %r13               # imm = 0x100000002
	leaq	40(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	48(%rsp), %rdi
	movq	16(%rsp), %r8
	movl	$40000, %edx                    # imm = 0x9C40
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	32(%rsp), %rdi
	movq	16(%rsp), %r8
	movl	$40000, %edx                    # imm = 0x9C40
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %r9
	leaq	998(%r13), %rbp
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	32(%rsp), %rdi
	movq	48(%rsp), %rsi
	movl	$1000, %edx                     # imm = 0x3E8
	callq	_Z26__device_stub__serieWallisPfPii
.LBB2_4:
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	32(%rsp), %rsi
	movq	16(%rsp), %r8
	movl	$40000, %edx                    # imm = 0x9C40
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	28(%rsp), %rdi
	movl	$0, (%rdi)
	movq	40(%rsp), %rsi
	movq	(%rsp), %rdx
	callq	hipEventElapsedTime
	movq	64(%rsp), %rdi
	movq	8(%rsp), %r8
	movl	$8000, %edx                     # imm = 0x1F40
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	56(%rsp), %rsi
	movq	8(%rsp), %r8
	movl	$8000, %edx                     # imm = 0x1F40
	movq	%r15, %rdi
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %r9
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	64(%rsp), %rdi
	movq	56(%rsp), %rsi
	movl	$1000, %edx                     # imm = 0x3E8
	callq	_Z19__device_stub__nilaPdS_i
.LBB2_6:
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	56(%rsp), %rsi
	movq	8(%rsp), %r8
	movl	$8000, %edx                     # imm = 0x1F40
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	24(%rsp), %rdi
	movl	$0, (%rdi)
	movq	40(%rsp), %rsi
	movq	(%rsp), %rdx
	callq	hipEventElapsedTime
	movq	16(%rsp), %rdi
	callq	hipStreamSynchronize
	movq	8(%rsp), %rdi
	callq	hipStreamSynchronize
	movl	$.Lstr, %edi
	callq	puts@PLT
	cvtss2sd	28(%rsp), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movss	28(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI2_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movss	.LCPI2_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$1, %eax
.LBB2_7:                                # =>This Inner Loop Header: Depth=1
	mulss	(%r14,%rax,4), %xmm0
	incq	%rax
	cmpq	$1001, %rax                     # imm = 0x3E9
	jne	.LBB2_7
# %bb.8:
	addss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorps	%xmm0, %xmm0
	cvtss2sd	24(%rsp), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movss	24(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI2_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	xorl	%eax, %eax
.LBB2_9:                                # =>This Inner Loop Header: Depth=1
	addsd	(%r15,%rax,8), %xmm0
	incq	%rax
	cmpq	$1000, %rax                     # imm = 0x3E8
	jne	.LBB2_9
# %bb.10:
	addsd	.LCPI2_2(%rip), %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	movq	16(%rsp), %rdi
	callq	hipStreamDestroy
	movq	8(%rsp), %rdi
	callq	hipStreamDestroy
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11serieWallisPfPii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4nilaPdS_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11serieWallisPfPii,@object    # @_Z11serieWallisPfPii
	.section	.rodata,"a",@progbits
	.globl	_Z11serieWallisPfPii
	.p2align	3, 0x0
_Z11serieWallisPfPii:
	.quad	_Z26__device_stub__serieWallisPfPii
	.size	_Z11serieWallisPfPii, 8

	.type	_Z4nilaPdS_i,@object            # @_Z4nilaPdS_i
	.globl	_Z4nilaPdS_i
	.p2align	3, 0x0
_Z4nilaPdS_i:
	.quad	_Z19__device_stub__nilaPdS_i
	.size	_Z4nilaPdS_i, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Milisegundos: %.5f\n"
	.size	.L.str.1, 20

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Segundos: %.5f\n"
	.size	.L.str.2, 16

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\nPi con la serie de Wallis:  %.16f\n\n"
	.size	.L.str.3, 37

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"\nPi con la serie de Nilakantha: %.16f "
	.size	.L.str.5, 39

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11serieWallisPfPii"
	.size	.L__unnamed_1, 21

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z4nilaPdS_i"
	.size	.L__unnamed_2, 13

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"--------Stream 1--------"
	.size	.Lstr, 25

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"--------Stream 2--------"
	.size	.Lstr.1, 25

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__serieWallisPfPii
	.addrsig_sym _Z19__device_stub__nilaPdS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11serieWallisPfPii
	.addrsig_sym _Z4nilaPdS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11serieWallisPfPii    ; -- Begin function _Z11serieWallisPfPii
	.globl	_Z11serieWallisPfPii
	.p2align	8
	.type	_Z11serieWallisPfPii,@function
_Z11serieWallisPfPii:                   ; @_Z11serieWallisPfPii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_add_nc_u32_e32 v0, -1, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ge_i32_e64 s3, v0
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_cvt_f32_i32_e32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v0, v[4:5], off offset:-4
	v_add_f32_e32 v5, v1, v1
	v_fma_f32 v1, v1, 2.0, 1.0
	v_div_scale_f32 v7, null, v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v9, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v7, v9, 1.0
	v_fmac_f32_e32 v9, v11, v9
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v0, v0
	v_fma_f32 v0, v0, 2.0, -1.0
	v_div_scale_f32 v6, null, v0, v0, v4
	v_div_scale_f32 v12, vcc_lo, v4, v0, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v8, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v10, -v6, v8, 1.0
	v_fmac_f32_e32 v8, v10, v8
	v_div_scale_f32 v10, s0, v5, v1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v11, v12, v8
	v_fma_f32 v14, -v6, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v14, v8
	v_fma_f32 v6, -v6, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v6, v6, v8, v11
	s_mov_b32 vcc_lo, s0
	v_div_fixup_f32 v0, v6, v0, v4
	v_mul_f32_e32 v13, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v15, -v7, v13, v10
	v_fmac_f32_e32 v13, v15, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, -v7, v13, v10
	v_div_fmas_f32 v7, v7, v9, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v1, v7, v1, v5
	v_mul_f32_e32 v4, v1, v0
	v_add_co_u32 v0, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v3, vcc_lo
	global_store_b32 v[0:1], v4, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11serieWallisPfPii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11serieWallisPfPii, .Lfunc_end0-_Z11serieWallisPfPii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 384
; NumSgprs: 18
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z4nilaPdS_i            ; -- Begin function _Z4nilaPdS_i
	.globl	_Z4nilaPdS_i
	.p2align	8
	.type	_Z4nilaPdS_i,@function
_Z4nilaPdS_i:                           ; @_Z4nilaPdS_i
; %bb.0:
	v_add_nc_u32_e32 v1, 1, v0
	v_and_b32_e32 v3, 1, v0
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 3, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, v1
	v_add_f32_e32 v1, v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v1, v1
	v_cvt_f32_i32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v2, 1.0, v1
	v_add_f32_e32 v4, 2.0, v1
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	v_mul_f32_e32 v1, v2, v1
	v_cndmask_b32_e64 v2, -4.0, 4.0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v1, v4, v1
	v_div_scale_f32 v3, null, v1, v1, v2
	v_div_scale_f32 v6, vcc_lo, v2, v1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v3, v4, 1.0
	v_fmac_f32_e32 v4, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v5, v6, v4
	v_fma_f32 v7, -v3, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v7, v4
	v_fma_f32 v3, -v3, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v3, v3, v4, v5
	v_div_fixup_f32 v1, v3, v1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[1:2], v1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_store_b64 v0, v[1:2], s[0:1]
	global_store_b64 v0, v[1:2], s[2:3]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4nilaPdS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 4
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z4nilaPdS_i, .Lfunc_end1-_Z4nilaPdS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 216
; NumSgprs: 6
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 6
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11serieWallisPfPii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11serieWallisPfPii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4nilaPdS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     6
    .sgpr_spill_count: 0
    .symbol:         _Z4nilaPdS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
