// NOTE: h_ prefix means "host"   (CPU)
//       d_ prefix means "device" (GPU)
#include <iostream>
#include <fstream>
#include <cuda.h>
using namespace std;

// GPU code
__global__ void soft_to_hard(double* soft, int* hard) {
  int ix = (blockDim.x * blockIdx.x) + threadIdx.x;

  hard[ix] = (soft[ix] > 0);  // XXX: Is this faster than an 'if'?
}


// CPU code
int main(int argc, char* argv[]) {
  if (argc != 2) {
    cout << "Wrong number of arguments. Expected 1, got " << (argc-1)
         << endl;
    return 1;
  }

  // Read values from input file
  ifstream file(argv[1]);
  int softCount;
  file >> softCount;

  double* h_soft = new double[softCount];

  for (int i = 0; i < softCount; ++i) {
    file >> h_soft[i];
  }

  file.close();

  // Copy values to device memory
  double* d_soft;
  cudaMalloc((void**)&d_soft, softCount*sizeof(double));
  cudaMemcpy(d_soft, h_soft, softCount*sizeof(double), cudaMemcpyHostToDevice);

  int* d_hard;
  cudaMalloc((void**)&d_hard, softCount*sizeof(int));

  // Set up the computational grid
  int threadsPerBlock = 2;
  int blocksPerGrid   = (softCount + threadsPerBlock - 1) / threadsPerBlock;

  // Launch kernel
  soft_to_hard<<<blocksPerGrid, threadsPerBlock>>>(d_soft, d_hard);

  // Copy results to host memory
  int* h_hard = new int[softCount];
  cudaMemcpy(h_hard, d_hard, softCount*sizeof(int), cudaMemcpyDeviceToHost);

  // Print results
  for (int i = 0; i < softCount; ++i) {
    cout << h_hard[i] << ' ';
  }
  cout << endl;

  cudaFree(d_soft);
  cudaFree(d_hard);
  delete[] h_soft;
  delete[] h_hard;

  return 0;
}


	.file	"tmpxft_0031206f_00000000-6_soft_to_hard.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3769:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3769:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z34__device_stub__Z12soft_to_hardPdPiPdPi
	.type	_Z34__device_stub__Z12soft_to_hardPdPiPdPi, @function
_Z34__device_stub__Z12soft_to_hardPdPiPdPi:
.LFB3791:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12soft_to_hardPdPi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3791:
	.size	_Z34__device_stub__Z12soft_to_hardPdPiPdPi, .-_Z34__device_stub__Z12soft_to_hardPdPiPdPi
	.globl	_Z12soft_to_hardPdPi
	.type	_Z12soft_to_hardPdPi, @function
_Z12soft_to_hardPdPi:
.LFB3792:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z12soft_to_hardPdPiPdPi
	.cfi_endproc
.LFE3792:
	.size	_Z12soft_to_hardPdPi, .-_Z12soft_to_hardPdPi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z12soft_to_hardPdPi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3794:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12soft_to_hardPdPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3794:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC1:
	.string	"Wrong number of arguments. Expected 1, got "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3766:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3766
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$576, %rsp
	.cfi_def_cfa_offset 624
	movq	%fs:40, %rax
	movq	%rax, 568(%rsp)
	xorl	%eax, %eax
	cmpl	$2, %edi
	je	.L11
	movl	%edi, %ebx
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
.LEHB0:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leal	-1(%rbx), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$1, %eax
	jmp	.L10
.L11:
	movq	8(%rsi), %rsi
	leaq	48(%rsp), %rbx
	movl	$8, %edx
	movq	%rbx, %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE0:
	leaq	4(%rsp), %rsi
	movq	%rbx, %rdi
.LEHB1:
	call	_ZNSirsERi@PLT
	movabsq	$1152921504606846975, %rax
	movslq	4(%rsp), %rdi
	cmpq	%rdi, %rax
	jb	.L13
	salq	$3, %rdi
	call	_Znam@PLT
	movq	%rax, %r12
	movq	%rax, %r13
	xorl	%ebp, %ebp
	jmp	.L14
.L13:
	movq	568(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L36
	call	__cxa_throw_bad_array_new_length@PLT
.L16:
	movq	%r13, %rsi
	movq	%rbx, %rdi
	call	_ZNSi10_M_extractIdEERSiRT_@PLT
	incl	%ebp
	addq	$8, %r13
.L14:
	cmpl	%ebp, 4(%rsp)
	jg	.L16
	movq	%rbx, %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv@PLT
	movslq	4(%rsp), %rsi
	leaq	8(%rsp), %rdi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movslq	4(%rsp), %rdx
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	salq	$3, %rdx
	call	cudaMemcpy@PLT
	movslq	4(%rsp), %rsi
	leaq	16(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	4(%rsp), %eax
	movl	$2, %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, 44(%rsp)
	incl	%eax
	cltd
	idivl	%ecx
	movl	$2147483649, %edx
	movl	$1, %ecx
	addq	%rdx, %rdx
	movq	%rdx, 36(%rsp)
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movl	32(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L17
.L20:
	movabsq	$2305843009213693950, %rax
	movslq	4(%rsp), %rdi
	cmpq	%rdi, %rax
	jnb	.L18
	jmp	.L37
.L17:
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z34__device_stub__Z12soft_to_hardPdPiPdPi
	jmp	.L20
.L18:
	salq	$2, %rdi
	call	_Znam@PLT
	movslq	4(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbp
	movl	$2, %ecx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	xorl	%r13d, %r13d
	leaq	_ZSt4cout(%rip), %r14
	jmp	.L23
.L37:
	movq	568(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L36
	call	__cxa_throw_bad_array_new_length@PLT
.L26:
	movl	0(%rbp,%r13,4), %esi
	movq	%r14, %rdi
	call	_ZNSolsEi@PLT
	movb	$32, 36(%rsp)
	movq	%rax, %rdi
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rdi,%rax)
	je	.L24
	leaq	36(%rsp), %rsi
	movl	$1, %edx
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
.L25:
	incq	%r13
.L23:
	cmpl	%r13d, 4(%rsp)
	jg	.L26
	jmp	.L38
.L24:
	movl	$32, %esi
	call	_ZNSo3putEc@PLT
	jmp	.L25
.L38:
	movq	%r14, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
.LEHE1:
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	xorl	%eax, %eax
	jmp	.L10
.L31:
	endbr64
	movq	%rax, %rbp
.L27:
	movq	%rbx, %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	568(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L36
	movq	%rbp, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L10:
	movq	568(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L29
.L36:
	call	__stack_chk_fail@PLT
.L29:
	addq	$576, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3766:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3766:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3766-.LLSDACSB3766
.LLSDACSB3766:
	.uleb128 .LEHB0-.LFB3766
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3766
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L31-.LFB3766
	.uleb128 0
	.uleb128 .LEHB2-.LFB3766
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE3766:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// NOTE: h_ prefix means "host"   (CPU)
//       d_ prefix means "device" (GPU)
#include <iostream>
#include <fstream>
#include <hip/hip_runtime.h>
using namespace std;

// GPU code
__global__ void soft_to_hard(double* soft, int* hard) {
  int ix = (blockDim.x * blockIdx.x) + threadIdx.x;

  hard[ix] = (soft[ix] > 0);  // XXX: Is this faster than an 'if'?
}


// CPU code
int main(int argc, char* argv[]) {
  if (argc != 2) {
    cout << "Wrong number of arguments. Expected 1, got " << (argc-1)
         << endl;
    return 1;
  }

  // Read values from input file
  ifstream file(argv[1]);
  int softCount;
  file >> softCount;

  double* h_soft = new double[softCount];

  for (int i = 0; i < softCount; ++i) {
    file >> h_soft[i];
  }

  file.close();

  // Copy values to device memory
  double* d_soft;
  hipMalloc((void**)&d_soft, softCount*sizeof(double));
  hipMemcpy(d_soft, h_soft, softCount*sizeof(double), hipMemcpyHostToDevice);

  int* d_hard;
  hipMalloc((void**)&d_hard, softCount*sizeof(int));

  // Set up the computational grid
  int threadsPerBlock = 2;
  int blocksPerGrid   = (softCount + threadsPerBlock - 1) / threadsPerBlock;

  // Launch kernel
  soft_to_hard<<<blocksPerGrid, threadsPerBlock>>>(d_soft, d_hard);

  // Copy results to host memory
  int* h_hard = new int[softCount];
  hipMemcpy(h_hard, d_hard, softCount*sizeof(int), hipMemcpyDeviceToHost);

  // Print results
  for (int i = 0; i < softCount; ++i) {
    cout << h_hard[i] << ' ';
  }
  cout << endl;

  hipFree(d_soft);
  hipFree(d_hard);
  delete[] h_soft;
  delete[] h_hard;

  return 0;
}


	.text
	.file	"soft_to_hard.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z27__device_stub__soft_to_hardPdPi # -- Begin function _Z27__device_stub__soft_to_hardPdPi
	.type	_Z27__device_stub__soft_to_hardPdPi,@function
_Z27__device_stub__soft_to_hardPdPi:    # @_Z27__device_stub__soft_to_hardPdPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12soft_to_hardPdPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__soft_to_hardPdPi, .Lfunc_end0-_Z27__device_stub__soft_to_hardPdPi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$552, %rsp                      # imm = 0x228
	.cfi_def_cfa_offset 592
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	cmpl	$2, %edi
	jne	.LBB1_1
# %bb.3:
	movq	8(%rsi), %rsi
	leaq	32(%rsp), %rbx
	movq	%rbx, %rdi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
.Ltmp0:
	leaq	8(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZNSirsERi
.Ltmp1:
# %bb.4:
	movslq	8(%rsp), %r14
	leaq	(,%r14,8), %rax
	testq	%r14, %r14
	movq	$-1, %rdi
	cmovnsq	%rax, %rdi
.Ltmp3:
	callq	_Znam
.Ltmp4:
# %bb.5:                                # %.preheader48
	movq	%rax, %rbx
	testl	%r14d, %r14d
	jle	.LBB1_9
# %bb.6:                                # %.lr.ph.preheader
	xorl	%r12d, %r12d
	leaq	32(%rsp), %r14
	movq	%rbx, %r15
.LBB1_7:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
.Ltmp5:
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_ZNSi10_M_extractIdEERSiRT_
.Ltmp6:
# %bb.8:                                # %_ZNSirsERd.exit
                                        #   in Loop: Header=BB1_7 Depth=1
	incq	%r12
	movslq	8(%rsp), %rax
	addq	$8, %r15
	cmpq	%rax, %r12
	jl	.LBB1_7
.LBB1_9:                                # %._crit_edge
.Ltmp8:
	leaq	32(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv
.Ltmp9:
# %bb.10:
	movslq	8(%rsp), %rsi
	shlq	$3, %rsi
.Ltmp11:
	leaq	24(%rsp), %rdi
	callq	hipMalloc
.Ltmp12:
# %bb.11:
	movq	24(%rsp), %rdi
	movslq	8(%rsp), %rdx
	shlq	$3, %rdx
.Ltmp13:
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp14:
# %bb.12:
	movslq	8(%rsp), %rsi
	shlq	$2, %rsi
.Ltmp16:
	leaq	16(%rsp), %rdi
	callq	hipMalloc
.Ltmp17:
# %bb.13:
	movl	8(%rsp), %eax
	movl	%eax, %ecx
	incl	%ecx
	shrl	$31, %ecx
	leal	(%rax,%rcx), %edi
	incl	%edi
	sarl	%edi
	btsq	$32, %rdi
.Ltmp19:
	movabsq	$4294967298, %rdx               # imm = 0x100000002
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp20:
# %bb.14:
	testl	%eax, %eax
	jne	.LBB1_16
# %bb.15:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
.Ltmp21:
	callq	_Z27__device_stub__soft_to_hardPdPi
.Ltmp22:
.LBB1_16:
	movslq	8(%rsp), %rax
	leaq	(,%rax,4), %r15
	testq	%rax, %rax
	movq	$-1, %rdi
	cmovnsq	%r15, %rdi
.Ltmp24:
	callq	_Znam
.Ltmp25:
# %bb.17:
	movq	%rax, %r14
	movq	16(%rsp), %rsi
.Ltmp26:
	movq	%rax, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp27:
# %bb.18:                               # %.preheader
	cmpl	$0, 8(%rsp)
	jle	.LBB1_28
# %bb.19:                               # %.lr.ph51.preheader
	xorl	%r12d, %r12d
	leaq	15(%rsp), %r15
.LBB1_20:                               # %.lr.ph51
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r14,%r12,4), %esi
.Ltmp28:
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
.Ltmp29:
# %bb.21:                               #   in Loop: Header=BB1_20 Depth=1
	movb	$32, 15(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB1_35
# %bb.22:                               #   in Loop: Header=BB1_20 Depth=1
.Ltmp30:
	movl	$1, %edx
	movq	%rax, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp31:
	jmp	.LBB1_36
.LBB1_35:                               #   in Loop: Header=BB1_20 Depth=1
.Ltmp32:
	movq	%rax, %rdi
	movl	$32, %esi
	callq	_ZNSo3putEc
.Ltmp33:
.LBB1_36:                               #   in Loop: Header=BB1_20 Depth=1
	incq	%r12
	movslq	8(%rsp), %rax
	cmpq	%rax, %r12
	jl	.LBB1_20
.LBB1_28:                               # %._crit_edge52
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %edi
	addq	-24(%rax), %rdi
.Ltmp35:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp36:
# %bb.29:                               # %.noexc42
.Ltmp37:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp38:
# %bb.30:                               # %.noexc43
.Ltmp39:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp40:
# %bb.31:                               # %_ZNSolsEPFRSoS_E.exit
	movq	24(%rsp), %rdi
.Ltmp41:
	callq	hipFree
.Ltmp42:
# %bb.32:
	movq	16(%rsp), %rdi
.Ltmp43:
	callq	hipFree
.Ltmp44:
# %bb.33:
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	leaq	32(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	xorl	%eax, %eax
	jmp	.LBB1_2
.LBB1_1:
	movl	%edi, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$43, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	decl	%ebx
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$1, %eax
.LBB1_2:
	addq	$552, %rsp                      # imm = 0x228
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB1_38:
	.cfi_def_cfa_offset 592
.Ltmp18:
	jmp	.LBB1_39
.LBB1_23:
.Ltmp2:
	jmp	.LBB1_39
.LBB1_27:
.Ltmp23:
	jmp	.LBB1_39
.LBB1_26:
.Ltmp15:
	jmp	.LBB1_39
.LBB1_24:
.Ltmp10:
	jmp	.LBB1_39
.LBB1_34:
.Ltmp45:
	jmp	.LBB1_39
.LBB1_25:
.Ltmp7:
	jmp	.LBB1_39
.LBB1_37:
.Ltmp34:
.LBB1_39:
	movq	%rax, %rbx
	leaq	32(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp10-.Lfunc_begin0          #     jumps to .Ltmp10
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp5-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp6-.Ltmp5                  #   Call between .Ltmp5 and .Ltmp6
	.uleb128 .Ltmp7-.Lfunc_begin0           #     jumps to .Ltmp7
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp8-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp9-.Ltmp8                  #   Call between .Ltmp8 and .Ltmp9
	.uleb128 .Ltmp10-.Lfunc_begin0          #     jumps to .Ltmp10
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp11-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp14-.Ltmp11                #   Call between .Ltmp11 and .Ltmp14
	.uleb128 .Ltmp15-.Lfunc_begin0          #     jumps to .Ltmp15
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp16-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp17-.Ltmp16                #   Call between .Ltmp16 and .Ltmp17
	.uleb128 .Ltmp18-.Lfunc_begin0          #     jumps to .Ltmp18
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp19-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp22-.Ltmp19                #   Call between .Ltmp19 and .Ltmp22
	.uleb128 .Ltmp23-.Lfunc_begin0          #     jumps to .Ltmp23
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp24-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp27-.Ltmp24                #   Call between .Ltmp24 and .Ltmp27
	.uleb128 .Ltmp45-.Lfunc_begin0          #     jumps to .Ltmp45
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp28-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp33-.Ltmp28                #   Call between .Ltmp28 and .Ltmp33
	.uleb128 .Ltmp34-.Lfunc_begin0          #     jumps to .Ltmp34
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp35-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Ltmp44-.Ltmp35                #   Call between .Ltmp35 and .Ltmp44
	.uleb128 .Ltmp45-.Lfunc_begin0          #     jumps to .Ltmp45
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp44-.Lfunc_begin0          # >> Call Site 12 <<
	.uleb128 .Lfunc_end1-.Ltmp44            #   Call between .Ltmp44 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12soft_to_hardPdPi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12soft_to_hardPdPi,@object    # @_Z12soft_to_hardPdPi
	.section	.rodata,"a",@progbits
	.globl	_Z12soft_to_hardPdPi
	.p2align	3, 0x0
_Z12soft_to_hardPdPi:
	.quad	_Z27__device_stub__soft_to_hardPdPi
	.size	_Z12soft_to_hardPdPi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Wrong number of arguments. Expected 1, got "
	.size	.L.str, 44

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12soft_to_hardPdPi"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__soft_to_hardPdPi
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z12soft_to_hardPdPi
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12soft_to_hardPdPi    ; -- Begin function _Z12soft_to_hardPdPi
	.globl	_Z12soft_to_hardPdPi
	.p2align	8
	.type	_Z12soft_to_hardPdPi,@function
_Z12soft_to_hardPdPi:                   ; @_Z12soft_to_hardPdPi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, 0, v[3:4]
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12soft_to_hardPdPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12soft_to_hardPdPi, .Lfunc_end0-_Z12soft_to_hardPdPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 140
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12soft_to_hardPdPi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12soft_to_hardPdPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
