#include <iostream>
#include <chrono>
#include <cassert>
#include <cmath>
#include <cstdlib>
#include <vector>
#include <algorithm>

#define BLOCKSIZE 256
#define LOG_BLOCKSIZE 8
#define BANKSIZE 32
#define LOG_BANKSIZE 5
// memory addresses 0, BANKSIZE, 2 * BANKSIZE belong to the same bank.
// at certain points of upsweep and downsweep of scan(), we would work on each BANKSIZE-th address,
// resulting in memory conflicts. We add an offset so that address 0 belongs to bank 0,
// address BANKSIZE belongs to bank 1 etc.
// We define an OFFSET macro, and use it whenever we use shared memory.
#define OFFSET(n) ((n) >> LOG_BANKSIZE)
#define MAXOFFSET ((BLOCKSIZE) >> LOG_BANKSIZE)

// MUST BE ASSOCIATIVE
__device__ inline int f(int a, int b){
    return a + b;
}

/**
 * This build on top of parallel_reversed.cu. In that version of the prefix-scan algorithm,
 * only one bank was used for strides >= banksize. This variant fixes this issue, by adding an
 * offset to each shared memory access. If address #i is referenced, then #(i+i/BANKSIZE) will be
 * used instead. So address 0 belongs to bank 0, address 32 belongs to bank 1, etc.
**/
__global__ void scan(const int n, int *x, int *out){
    // Also, padding needs to be added to scan_v, so that the offset doesn't
    // result in out-of-bounds memory accesses.
    __shared__ int scan_v[2 * BLOCKSIZE + 2 * MAXOFFSET];
    int tid = threadIdx.x;
    int i = blockIdx.x * 2 * blockDim.x + threadIdx.x * 2;

    scan_v[2 * tid + OFFSET(2 * tid)] = x[i];
    scan_v[((2 * tid) ^ 1) + OFFSET((2 * tid) ^ 1)] = x[i ^ 1];

    scan_v[((2 * tid) ^ 1) + OFFSET((2 * tid) ^ 1)] = f(
        scan_v[((2 * tid) ^ 1) + OFFSET((2 * tid) ^ 1)],
        scan_v[2 * tid + OFFSET(2 * tid)]
    );
    __syncthreads();

    for(int j = LOG_BLOCKSIZE - 2; j >= 0; j--){
        if(tid < (1 << j)){
            int j_complement = LOG_BLOCKSIZE - j;
            int curr_tid = (tid << j_complement) | ((1 << j_complement) - 1);
            int oth = curr_tid - (1 << (j_complement - 1));
            scan_v[curr_tid + OFFSET(curr_tid)] = f(
                scan_v[curr_tid + OFFSET(curr_tid)],
                scan_v[oth + OFFSET(oth)]
            );
        }
        __syncthreads();
    }

    for(int j = 0; j < LOG_BLOCKSIZE; j++){
        if(tid < (1 << j)){
            int j_complement = (LOG_BLOCKSIZE - 1) - j;
            int curr_tid = ((tid + 1) << (j_complement + 1)) | ((1 << j_complement) - 1);
            int oth = curr_tid - (1 << j_complement);
            scan_v[curr_tid + OFFSET(curr_tid)] = f(
                scan_v[curr_tid + OFFSET(curr_tid)],
                scan_v[oth + OFFSET(oth)]
            );
        }
        __syncthreads();
    }

    x[i] = scan_v[2 * tid + OFFSET(2 * tid)];
    x[i ^ 1] = scan_v[((2 * tid) ^ 1) + OFFSET((2 * tid) ^ 1)];
    if(tid == blockDim.x - 1){
        out[blockIdx.x] = scan_v[((2 * tid) ^ 1) + OFFSET((2 * tid) ^ 1)];
    }
}

__global__ void propagate(const int n, int *in, int *out){
    int bid = blockIdx.x + 1;
    int i = bid * blockDim.x + threadIdx.x;

    out[i] = f(out[i], in[bid - 1]);
}

std::vector<int> get_levels(const int n, int block_size){
    std::vector<int> res;

    int x = n;
    while(x > 1){
        res.push_back(x);
        x = (x + block_size - 1) / block_size;
    }

    res.push_back(1);

    return res;
}

int main(){
    const int n = (1 << 28);
    const int block_size = BLOCKSIZE;
    assert(n % block_size == 0);

    std::vector<int> levels = get_levels(n, block_size);

    for(int i : levels){
        std::cout << i << ' ';
    }
    std::cout << std::endl;

    int *x = (int *) malloc(n * sizeof(int));
    assert(x != NULL);

    for(int i = 0; i < n; i++){
        x[i] = 1;
    }

    int *d_arrays[levels.size()];
    for(int i = 0; i < levels.size(); i++){
        cudaMalloc(&d_arrays[i], levels[i] * sizeof(int));
        assert(d_arrays[i] != NULL);
    }

    cudaMemcpy(d_arrays[0], x, levels[0] * sizeof(int), cudaMemcpyHostToDevice);

    for(int i = 1; i < levels.size(); i++){
        int block_count = levels[i];
        scan<<<block_count, block_size / 2>>>(levels[i - 1], d_arrays[i - 1], d_arrays[i]);
    }

    for(int i = levels.size() - 2; i >= 1; i--){
        int block_count = levels[i];
        propagate<<<block_count - 1, block_size>>>(levels[i - 1], d_arrays[i], d_arrays[i - 1]);
    }

    int *result = (int *) malloc(n * sizeof(int));
    cudaMemcpy(result, d_arrays[0], n * sizeof(int), cudaMemcpyDeviceToHost);

    for(int i = 0; i < n; i++){
        if(result[i] != i + 1){
            std::cerr << i << ' ' << i + 1 << ' ' << result[i] << '\n';
            return -1;
        }
    }

    std::cout << "memory usage: " << n * sizeof(int) << " bytes" << std::endl;
}
	.file	"tmpxft_0035a7c8_00000000-6_parallel_banks.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4372:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4372:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0, @function
_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0:
.LFB5170:
	.cfi_startproc
	testq	%rdi, %rdi
	je	.L3
	movabsq	$2305843009213693951, %rax
	cmpq	%rdi, %rax
	jnb	.L4
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$4611686018427387903, %rax
	cmpq	%rdi, %rax
	jnb	.L5
	call	_ZSt28__throw_bad_array_new_lengthv@PLT
.L5:
	call	_ZSt17__throw_bad_allocv@PLT
.L4:
	.cfi_def_cfa_offset 8
	salq	$2, %rdi
	jmp	_Znwm@PLT
.L3:
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE5170:
	.size	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0, .-_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0
	.globl	_Z26__device_stub__Z4scaniPiS_iPiS_
	.type	_Z26__device_stub__Z4scaniPiS_iPiS_, @function
_Z26__device_stub__Z4scaniPiS_iPiS_:
.LFB4394:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z4scaniPiS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L10:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4394:
	.size	_Z26__device_stub__Z4scaniPiS_iPiS_, .-_Z26__device_stub__Z4scaniPiS_iPiS_
	.globl	_Z4scaniPiS_
	.type	_Z4scaniPiS_, @function
_Z4scaniPiS_:
.LFB4395:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z4scaniPiS_iPiS_
	.cfi_endproc
.LFE4395:
	.size	_Z4scaniPiS_, .-_Z4scaniPiS_
	.globl	_Z31__device_stub__Z9propagateiPiS_iPiS_
	.type	_Z31__device_stub__Z9propagateiPiS_iPiS_, @function
_Z31__device_stub__Z9propagateiPiS_iPiS_:
.LFB4396:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9propagateiPiS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L15:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4396:
	.size	_Z31__device_stub__Z9propagateiPiS_iPiS_, .-_Z31__device_stub__Z9propagateiPiS_iPiS_
	.globl	_Z9propagateiPiS_
	.type	_Z9propagateiPiS_, @function
_Z9propagateiPiS_:
.LFB4397:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z9propagateiPiS_iPiS_
	.cfi_endproc
.LFE4397:
	.size	_Z9propagateiPiS_, .-_Z9propagateiPiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z9propagateiPiS_"
.LC1:
	.string	"_Z4scaniPiS_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4399:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9propagateiPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z4scaniPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4399:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt6vectorIiSaIiEED2Ev,"axG",@progbits,_ZNSt6vectorIiSaIiEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEED2Ev
	.type	_ZNSt6vectorIiSaIiEED2Ev, @function
_ZNSt6vectorIiSaIiEED2Ev:
.LFB4737:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L22
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L22:
	ret
	.cfi_endproc
.LFE4737:
	.size	_ZNSt6vectorIiSaIiEED2Ev, .-_ZNSt6vectorIiSaIiEED2Ev
	.weak	_ZNSt6vectorIiSaIiEED1Ev
	.set	_ZNSt6vectorIiSaIiEED1Ev,_ZNSt6vectorIiSaIiEED2Ev
	.section	.text._ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,comdat
	.align 2
	.weak	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.type	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc, @function
_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc:
.LFB5040:
	.cfi_startproc
	endbr64
	movq	%rdi, %rax
	movq	%rdx, %rdi
	movq	8(%rax), %rcx
	subq	(%rax), %rcx
	movabsq	$2305843009213693951, %rax
	sarq	$2, %rcx
	movq	%rax, %rdx
	subq	%rcx, %rdx
	cmpq	%rsi, %rdx
	jnb	.L25
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_ZSt20__throw_length_errorPKc@PLT
.L25:
	.cfi_def_cfa_offset 8
	cmpq	%rcx, %rsi
	cmovb	%rcx, %rsi
	addq	%rsi, %rcx
	jc	.L24
	movabsq	$2305843009213693951, %rax
	cmpq	%rax, %rcx
	cmovbe	%rcx, %rax
.L24:
	ret
	.cfi_endproc
.LFE5040:
	.size	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc, .-_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.section	.rodata.str1.1
.LC2:
	.string	"vector::_M_realloc_insert"
	.text
	.globl	_Z10get_levelsii
	.type	_Z10get_levelsii, @function
_Z10get_levelsii:
.LFB4352:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4352
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%eax, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%rax, (%rdi)
	movl	%edx, 20(%rsp)
	movq	%rax, 8(%rdi)
	movq	%rax, 16(%rdi)
.L34:
	movq	8(%rbx), %rbp
	movq	16(%rbx), %rax
	cmpl	$1, %r12d
	jle	.L55
	cmpq	%rbp, %rax
	je	.L35
	movl	%r12d, 0(%rbp)
	addq	$4, %rbp
	movq	%rbp, 8(%rbx)
	jmp	.L36
.L35:
	leaq	.LC2(%rip), %rdx
	movl	$1, %esi
	movq	%rbx, %rdi
.LEHB0:
	call	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	movq	%rax, 8(%rsp)
	movq	(%rbx), %r14
	movq	%rbp, %r15
	movq	8(%rbx), %rax
	movq	8(%rsp), %rdi
	subq	%r14, %r15
	movq	%rax, 24(%rsp)
	call	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0
	movl	%r12d, (%rax,%r15)
	movq	%rax, %r13
	testq	%r15, %r15
	jle	.L37
	movq	%r15, %rdx
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	memmove@PLT
.L37:
	leaq	4(%r13,%r15), %rcx
	movq	24(%rsp), %r15
	subq	%rbp, %r15
	testq	%r15, %r15
	jle	.L38
	movq	%rcx, %rdi
	movq	%r15, %rdx
	movq	%rbp, %rsi
	call	memmove@PLT
	movq	%rax, %rcx
.L38:
	addq	%rcx, %r15
	testq	%r14, %r14
	je	.L39
	movq	16(%rbx), %rsi
	movq	%r14, %rdi
	subq	%r14, %rsi
	call	_ZdlPvm@PLT
.L39:
	movq	8(%rsp), %rax
	movq	%r13, (%rbx)
	movq	%r15, 8(%rbx)
	leaq	0(%r13,%rax,4), %rax
	movq	%rax, 16(%rbx)
.L36:
	movl	20(%rsp), %eax
	leal	-1(%r12,%rax), %eax
	cltd
	idivl	20(%rsp)
	movl	%eax, %r12d
	jmp	.L34
.L55:
	cmpq	%rbp, %rax
	je	.L41
	movl	$1, 0(%rbp)
	addq	$4, %rbp
	movq	%rbp, 8(%rbx)
	jmp	.L33
.L41:
	leaq	.LC2(%rip), %rdx
	movl	$1, %esi
	movq	%rbx, %rdi
	call	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	movq	%rax, %r14
	movq	(%rbx), %r13
	movq	8(%rbx), %rax
	movq	%rbp, %r15
	movq	%r14, %rdi
	movq	%rax, 8(%rsp)
	subq	%r13, %r15
	call	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0
.LEHE0:
	movl	$1, (%rax,%r15)
	movq	%rax, %r12
	testq	%r15, %r15
	jle	.L43
	movq	%r15, %rdx
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	memmove@PLT
.L43:
	leaq	4(%r12,%r15), %rcx
	movq	8(%rsp), %r15
	subq	%rbp, %r15
	testq	%r15, %r15
	jle	.L44
	movq	%rcx, %rdi
	movq	%r15, %rdx
	movq	%rbp, %rsi
	call	memmove@PLT
	movq	%rax, %rcx
.L44:
	addq	%rcx, %r15
	testq	%r13, %r13
	je	.L45
	movq	16(%rbx), %rsi
	movq	%r13, %rdi
	subq	%r13, %rsi
	call	_ZdlPvm@PLT
.L45:
	leaq	(%r12,%r14,4), %rax
	movq	%r12, (%rbx)
	movq	%r15, 8(%rbx)
	movq	%rax, 16(%rbx)
	jmp	.L33
.L47:
	endbr64
	movq	%rax, %rbp
.L46:
	movq	%rbx, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	%rbp, %rdi
.LEHB1:
	call	_Unwind_Resume@PLT
.LEHE1:
.L33:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4352:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4352:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4352-.LLSDACSB4352
.LLSDACSB4352:
	.uleb128 .LEHB0-.LFB4352
	.uleb128 .LEHE0-.LEHB0
	.uleb128 .L47-.LFB4352
	.uleb128 0
	.uleb128 .LEHB1-.LFB4352
	.uleb128 .LEHE1-.LEHB1
	.uleb128 0
	.uleb128 0
.LLSDACSE4352:
	.text
	.size	_Z10get_levelsii, .-_Z10get_levelsii
	.section	.rodata.str1.1
.LC3:
	.string	"memory usage: "
.LC4:
	.string	" bytes"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4369:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4369
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$256, %edx
	movl	$268435456, %esi
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	leaq	-80(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -120(%rbp)
.LEHB2:
	call	_Z10get_levelsii
.LEHE2:
	movq	-80(%rbp), %r12
	movq	-72(%rbp), %r13
	movq	%r12, %rbx
.L57:
	cmpq	%rbx, %r13
	je	.L91
	movl	(%rbx), %esi
	leaq	_ZSt4cout(%rip), %rdi
.LEHB3:
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	movl	$32, %esi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	addq	$4, %rbx
	jmp	.L57
.L91:
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$1073741824, %edi
	call	malloc@PLT
	movq	%rax, -128(%rbp)
	xorl	%eax, %eax
.L59:
	movq	-128(%rbp), %rcx
	movl	$1, (%rcx,%rax,4)
	incq	%rax
	cmpq	$268435456, %rax
	jne	.L59
	subq	%r12, %rbx
	movq	%rsp, %rcx
	sarq	$2, %rbx
	leaq	15(,%rbx,8), %rdx
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L60:
	cmpq	%rcx, %rsp
	je	.L61
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L60
.L61:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L62
	orq	$0, -8(%rsp,%rax)
.L62:
	leaq	7(%rsp), %r13
	xorl	%r14d, %r14d
	movq	%r13, %r15
	andq	$-8, %r13
	shrq	$3, %r15
.L63:
	cmpq	%r14, %rbx
	je	.L92
	movslq	(%r12,%r14,4), %rsi
	leaq	0(%r13,%r14,8), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	incq	%r14
	jmp	.L63
.L92:
	movslq	(%r12), %rdx
	movq	-128(%rbp), %rsi
	movl	$1, %ecx
	movq	0(,%r15,8), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %r14d
.L65:
	cmpq	%rbx, %r14
	jnb	.L93
	movl	(%r12,%r14,4), %eax
	movl	$33554433, %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$7, %rcx
	movl	$1, -84(%rbp)
	movl	%eax, -104(%rbp)
	movq	%rcx, %rdx
	movabsq	$4294967297, %rax
	movq	%rax, -100(%rbp)
	movq	-104(%rbp), %rdi
	movl	-96(%rbp), %esi
	movq	%rcx, -92(%rbp)
	movl	$1, %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L66
	movq	0(%r13,%r14,8), %rdx
	movq	-8(%r13,%r14,8), %rsi
	movl	-4(%r12,%r14,4), %edi
	call	_Z26__device_stub__Z4scaniPiS_iPiS_
.L66:
	incq	%r14
	jmp	.L65
.L93:
	leal	-2(%rbx), %r14d
	subl	$3, %ebx
	movslq	%r14d, %r14
	movslq	%ebx, %rbx
.L68:
	testl	%r14d, %r14d
	jle	.L94
	movl	$16777217, %eax
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rax
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, -84(%rbp)
	movq	%rax, -92(%rbp)
	movl	(%r12,%r14,4), %eax
	decl	%eax
	movl	%eax, -104(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -100(%rbp)
	movq	-104(%rbp), %rdi
	movl	-96(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L69
	movq	0(%r13,%rbx,8), %rdx
	movq	0(%r13,%r14,8), %rsi
	movl	-4(%r12,%r14,4), %edi
	call	_Z31__device_stub__Z9propagateiPiS_iPiS_
.L69:
	decq	%r14
	decq	%rbx
	jmp	.L68
.L94:
	movl	$1073741824, %edi
	call	malloc@PLT
	movl	$2, %ecx
	movl	$1073741824, %edx
	movq	0(,%r15,8), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
	call	cudaMemcpy@PLT
	xorl	%r12d, %r12d
.L74:
	movq	%rbx, %r13
	movl	%r12d, %esi
	leaq	4(%rbx), %rbx
	incl	%r12d
	cmpl	%r12d, 0(%r13)
	je	.L72
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	movl	$32, %esi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movq	%rax, %rdi
	movl	%r12d, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	movl	$32, %esi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movl	0(%r13), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	movl	$10, %esi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	orl	$-1, %ebx
	jmp	.L73
.L72:
	cmpl	$268435456, %r12d
	jne	.L74
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	$1073741824, %esi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rax, %rdi
	leaq	.LC4(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.LEHE3:
	xorl	%ebx, %ebx
.L73:
	movq	-120(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L77
	jmp	.L89
.L80:
	endbr64
	movq	%rax, %rbx
.L75:
	movq	-120(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L89
	movq	%rbx, %rdi
.LEHB4:
	call	_Unwind_Resume@PLT
.LEHE4:
.L89:
	call	__stack_chk_fail@PLT
.L77:
	leaq	-40(%rbp), %rsp
	movl	%ebx, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4369:
	.section	.gcc_except_table
.LLSDA4369:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4369-.LLSDACSB4369
.LLSDACSB4369:
	.uleb128 .LEHB2-.LFB4369
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB3-.LFB4369
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L80-.LFB4369
	.uleb128 0
	.uleb128 .LEHB4-.LFB4369
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
.LLSDACSE4369:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <chrono>
#include <cassert>
#include <cmath>
#include <cstdlib>
#include <vector>
#include <algorithm>

#define BLOCKSIZE 256
#define LOG_BLOCKSIZE 8
#define BANKSIZE 32
#define LOG_BANKSIZE 5
// memory addresses 0, BANKSIZE, 2 * BANKSIZE belong to the same bank.
// at certain points of upsweep and downsweep of scan(), we would work on each BANKSIZE-th address,
// resulting in memory conflicts. We add an offset so that address 0 belongs to bank 0,
// address BANKSIZE belongs to bank 1 etc.
// We define an OFFSET macro, and use it whenever we use shared memory.
#define OFFSET(n) ((n) >> LOG_BANKSIZE)
#define MAXOFFSET ((BLOCKSIZE) >> LOG_BANKSIZE)

// MUST BE ASSOCIATIVE
__device__ inline int f(int a, int b){
    return a + b;
}

/**
 * This build on top of parallel_reversed.cu. In that version of the prefix-scan algorithm,
 * only one bank was used for strides >= banksize. This variant fixes this issue, by adding an
 * offset to each shared memory access. If address #i is referenced, then #(i+i/BANKSIZE) will be
 * used instead. So address 0 belongs to bank 0, address 32 belongs to bank 1, etc.
**/
__global__ void scan(const int n, int *x, int *out){
    // Also, padding needs to be added to scan_v, so that the offset doesn't
    // result in out-of-bounds memory accesses.
    __shared__ int scan_v[2 * BLOCKSIZE + 2 * MAXOFFSET];
    int tid = threadIdx.x;
    int i = blockIdx.x * 2 * blockDim.x + threadIdx.x * 2;

    scan_v[2 * tid + OFFSET(2 * tid)] = x[i];
    scan_v[((2 * tid) ^ 1) + OFFSET((2 * tid) ^ 1)] = x[i ^ 1];

    scan_v[((2 * tid) ^ 1) + OFFSET((2 * tid) ^ 1)] = f(
        scan_v[((2 * tid) ^ 1) + OFFSET((2 * tid) ^ 1)],
        scan_v[2 * tid + OFFSET(2 * tid)]
    );
    __syncthreads();

    for(int j = LOG_BLOCKSIZE - 2; j >= 0; j--){
        if(tid < (1 << j)){
            int j_complement = LOG_BLOCKSIZE - j;
            int curr_tid = (tid << j_complement) | ((1 << j_complement) - 1);
            int oth = curr_tid - (1 << (j_complement - 1));
            scan_v[curr_tid + OFFSET(curr_tid)] = f(
                scan_v[curr_tid + OFFSET(curr_tid)],
                scan_v[oth + OFFSET(oth)]
            );
        }
        __syncthreads();
    }

    for(int j = 0; j < LOG_BLOCKSIZE; j++){
        if(tid < (1 << j)){
            int j_complement = (LOG_BLOCKSIZE - 1) - j;
            int curr_tid = ((tid + 1) << (j_complement + 1)) | ((1 << j_complement) - 1);
            int oth = curr_tid - (1 << j_complement);
            scan_v[curr_tid + OFFSET(curr_tid)] = f(
                scan_v[curr_tid + OFFSET(curr_tid)],
                scan_v[oth + OFFSET(oth)]
            );
        }
        __syncthreads();
    }

    x[i] = scan_v[2 * tid + OFFSET(2 * tid)];
    x[i ^ 1] = scan_v[((2 * tid) ^ 1) + OFFSET((2 * tid) ^ 1)];
    if(tid == blockDim.x - 1){
        out[blockIdx.x] = scan_v[((2 * tid) ^ 1) + OFFSET((2 * tid) ^ 1)];
    }
}

__global__ void propagate(const int n, int *in, int *out){
    int bid = blockIdx.x + 1;
    int i = bid * blockDim.x + threadIdx.x;

    out[i] = f(out[i], in[bid - 1]);
}

std::vector<int> get_levels(const int n, int block_size){
    std::vector<int> res;

    int x = n;
    while(x > 1){
        res.push_back(x);
        x = (x + block_size - 1) / block_size;
    }

    res.push_back(1);

    return res;
}

int main(){
    const int n = (1 << 28);
    const int block_size = BLOCKSIZE;
    assert(n % block_size == 0);

    std::vector<int> levels = get_levels(n, block_size);

    for(int i : levels){
        std::cout << i << ' ';
    }
    std::cout << std::endl;

    int *x = (int *) malloc(n * sizeof(int));
    assert(x != NULL);

    for(int i = 0; i < n; i++){
        x[i] = 1;
    }

    int *d_arrays[levels.size()];
    for(int i = 0; i < levels.size(); i++){
        hipMalloc(&d_arrays[i], levels[i] * sizeof(int));
        assert(d_arrays[i] != NULL);
    }

    hipMemcpy(d_arrays[0], x, levels[0] * sizeof(int), hipMemcpyHostToDevice);

    for(int i = 1; i < levels.size(); i++){
        int block_count = levels[i];
        scan<<<block_count, block_size / 2>>>(levels[i - 1], d_arrays[i - 1], d_arrays[i]);
    }

    for(int i = levels.size() - 2; i >= 1; i--){
        int block_count = levels[i];
        propagate<<<block_count - 1, block_size>>>(levels[i - 1], d_arrays[i], d_arrays[i - 1]);
    }

    int *result = (int *) malloc(n * sizeof(int));
    hipMemcpy(result, d_arrays[0], n * sizeof(int), hipMemcpyDeviceToHost);

    for(int i = 0; i < n; i++){
        if(result[i] != i + 1){
            std::cerr << i << ' ' << i + 1 << ' ' << result[i] << '\n';
            return -1;
        }
    }

    std::cout << "memory usage: " << n * sizeof(int) << " bytes" << std::endl;
}
	.text
	.file	"parallel_banks.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z19__device_stub__scaniPiS_    # -- Begin function _Z19__device_stub__scaniPiS_
	.type	_Z19__device_stub__scaniPiS_,@function
_Z19__device_stub__scaniPiS_:           # @_Z19__device_stub__scaniPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4scaniPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z19__device_stub__scaniPiS_, .Lfunc_end0-_Z19__device_stub__scaniPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__propagateiPiS_ # -- Begin function _Z24__device_stub__propagateiPiS_
	.type	_Z24__device_stub__propagateiPiS_,@function
_Z24__device_stub__propagateiPiS_:      # @_Z24__device_stub__propagateiPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9propagateiPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__propagateiPiS_, .Lfunc_end1-_Z24__device_stub__propagateiPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z10get_levelsii                # -- Begin function _Z10get_levelsii
	.type	_Z10get_levelsii,@function
_Z10get_levelsii:                       # @_Z10get_levelsii
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
	movl	%esi, (%rsp)
	cmpl	$1, %esi
	jle	.LBB2_1
# %bb.3:                                # %.lr.ph
	movl	%edx, %r14d
	movl	%esi, %eax
	leal	-1(%r14), %ebp
	movq	%rsp, %r15
.LBB2_4:                                # =>This Inner Loop Header: Depth=1
	movq	8(%rbx), %rsi
	cmpq	16(%rbx), %rsi
	je	.LBB2_6
# %bb.5:                                #   in Loop: Header=BB2_4 Depth=1
	movl	%eax, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 8(%rbx)
	jmp	.LBB2_7
.LBB2_6:                                #   in Loop: Header=BB2_4 Depth=1
.Ltmp0:
	movq	%rbx, %rdi
	movq	%r15, %rdx
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp1:
.LBB2_7:                                # %_ZNSt6vectorIiSaIiEE9push_backERKi.exit
                                        #   in Loop: Header=BB2_4 Depth=1
	movl	(%rsp), %eax
	addl	%ebp, %eax
	cltd
	idivl	%r14d
	movl	%eax, (%rsp)
	cmpl	$1, %eax
	jg	.LBB2_4
# %bb.8:                                # %._crit_edge
	movq	8(%rbx), %rax
	movq	16(%rbx), %rsi
	movl	$1, 4(%rsp)
	cmpq	%rsi, %rax
	je	.LBB2_2
# %bb.9:
	movl	$1, (%rax)
	addq	$4, %rax
	movq	%rax, 8(%rbx)
	jmp	.LBB2_10
.LBB2_1:                                # %._crit_edge.thread
	movl	$1, 4(%rsp)
	xorl	%esi, %esi
.LBB2_2:
.Ltmp3:
	leaq	4(%rsp), %rdx
	movq	%rbx, %rdi
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp4:
.LBB2_10:                               # %_ZNSt6vectorIiSaIiEE9push_backEOi.exit
	movq	%rbx, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_11:
	.cfi_def_cfa_offset 48
.Ltmp5:
	jmp	.LBB2_12
.LBB2_15:
.Ltmp2:
.LBB2_12:
	movq	%rax, %r14
	movq	(%rbx), %rdi
	testq	%rdi, %rdi
	je	.LBB2_14
# %bb.13:
	callq	_ZdlPv
.LBB2_14:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end2:
	.size	_Z10get_levelsii, .Lfunc_end2-_Z10get_levelsii
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table2:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 1 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp4-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Lfunc_end2-.Ltmp4             #   Call between .Ltmp4 and .Lfunc_end2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$40, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	leaq	-72(%rbp), %rbx
	movq	%rbx, %rdi
	movl	$268435456, %esi                # imm = 0x10000000
	movl	$256, %edx                      # imm = 0x100
	callq	_Z10get_levelsii
	movq	(%rbx), %r14
	movq	8(%rbx), %r15
	cmpq	%r15, %r14
	je	.LBB3_5
# %bb.1:
	leaq	-41(%rbp), %rbx
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r14), %esi
.Ltmp6:
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
.Ltmp7:
# %bb.3:                                #   in Loop: Header=BB3_2 Depth=1
	movb	$32, -41(%rbp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB3_34
# %bb.4:                                #   in Loop: Header=BB3_2 Depth=1
.Ltmp8:
	movl	$1, %edx
	movq	%rax, %rdi
	movq	%rbx, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp9:
	jmp	.LBB3_35
.LBB3_34:                               #   in Loop: Header=BB3_2 Depth=1
.Ltmp10:
	movq	%rax, %rdi
	movl	$32, %esi
	callq	_ZNSo3putEc
.Ltmp11:
.LBB3_35:                               #   in Loop: Header=BB3_2 Depth=1
	addq	$4, %r14
	cmpq	%r15, %r14
	jne	.LBB3_2
.LBB3_5:                                # %._crit_edge
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %edi
	addq	-24(%rax), %rdi
.Ltmp13:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp14:
# %bb.6:                                # %.noexc92
.Ltmp15:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp16:
# %bb.7:                                # %.noexc93
.Ltmp17:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp18:
# %bb.8:                                # %_ZNSolsEPFRSoS_E.exit
	movl	$1073741824, %edi               # imm = 0x40000000
	callq	malloc
	movq	%rax, %rbx
	xorl	%eax, %eax
.LBB3_9:                                # =>This Inner Loop Header: Depth=1
	movl	$1, (%rbx,%rax,4)
	incq	%rax
	cmpq	$268435456, %rax                # imm = 0x10000000
	jne	.LBB3_9
# %bb.10:
	movq	%rsp, %r12
	movq	-64(%rbp), %rax
	subq	-72(%rbp), %rax
	movq	%rsp, %r15
	leaq	15(,%rax,2), %rax
	andq	$-16, %rax
	subq	%rax, %r15
	movq	%r15, %rsp
	xorl	%r13d, %r13d
	movq	-72(%rbp), %rax
	movq	%r15, %r14
.LBB3_11:                               # %.lr.ph128
                                        # =>This Inner Loop Header: Depth=1
	movslq	(%rax,%r13,4), %rsi
	shlq	$2, %rsi
.Ltmp20:
	movq	%r14, %rdi
	callq	hipMalloc
.Ltmp21:
# %bb.12:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit
                                        #   in Loop: Header=BB3_11 Depth=1
	incq	%r13
	movq	-72(%rbp), %rax
	movq	-64(%rbp), %rcx
	subq	%rax, %rcx
	sarq	$2, %rcx
	addq	$8, %r14
	cmpq	%r13, %rcx
	ja	.LBB3_11
# %bb.13:                               # %._crit_edge129.loopexit
	movq	(%r15), %rdi
	movslq	(%rax), %rdx
	shlq	$2, %rdx
.Ltmp23:
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp24:
# %bb.14:                               # %.preheader116
	movabsq	$4294967296, %r14               # imm = 0x100000000
	movq	-72(%rbp), %rax
	movq	-64(%rbp), %rcx
	subq	%rax, %rcx
	sarq	$2, %rcx
	cmpq	$2, %rcx
	jb	.LBB3_20
# %bb.15:                               # %.lr.ph131.preheader
	movl	$1, %r13d
	movabsq	$4294967424, %rbx               # imm = 0x100000080
.LBB3_16:                               # %.lr.ph131
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rax,%r13,4), %edi
	orq	%r14, %rdi
.Ltmp26:
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp27:
# %bb.17:                               #   in Loop: Header=BB3_16 Depth=1
	testl	%eax, %eax
	jne	.LBB3_19
# %bb.18:                               #   in Loop: Header=BB3_16 Depth=1
	movq	-72(%rbp), %rax
	movl	-4(%rax,%r13,4), %edi
	movq	-8(%r15,%r13,8), %rsi
	movq	(%r15,%r13,8), %rdx
.Ltmp28:
	callq	_Z19__device_stub__scaniPiS_
.Ltmp29:
.LBB3_19:                               #   in Loop: Header=BB3_16 Depth=1
	incq	%r13
	movq	-72(%rbp), %rax
	movq	-64(%rbp), %rcx
	subq	%rax, %rcx
	sarq	$2, %rcx
	cmpq	%r13, %rcx
	ja	.LBB3_16
.LBB3_20:                               # %._crit_edge132
	addl	$-2, %ecx
	testl	%ecx, %ecx
	jle	.LBB3_26
# %bb.21:                               # %.lr.ph136.preheader
	movl	%ecx, %r13d
	incq	%r13
	movabsq	$4294967552, %rbx               # imm = 0x100000100
.LBB3_22:                               # %.lr.ph136
                                        # =>This Inner Loop Header: Depth=1
	movq	-72(%rbp), %rax
	movl	-4(%rax,%r13,4), %edi
	decl	%edi
	orq	%r14, %rdi
.Ltmp31:
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp32:
# %bb.23:                               #   in Loop: Header=BB3_22 Depth=1
	testl	%eax, %eax
	jne	.LBB3_25
# %bb.24:                               #   in Loop: Header=BB3_22 Depth=1
	movq	-72(%rbp), %rax
	movl	-8(%rax,%r13,4), %edi
	movq	-16(%r15,%r13,8), %rdx
	movq	-8(%r15,%r13,8), %rsi
.Ltmp33:
	callq	_Z24__device_stub__propagateiPiS_
.Ltmp34:
.LBB3_25:                               # %._crit_edge158
                                        #   in Loop: Header=BB3_22 Depth=1
	decq	%r13
	cmpq	$1, %r13
	jg	.LBB3_22
.LBB3_26:                               # %._crit_edge137
	movl	$1073741824, %edi               # imm = 0x40000000
	callq	malloc
	movq	%rax, %rbx
	movq	(%r15), %rsi
.Ltmp36:
	movl	$1073741824, %edx               # imm = 0x40000000
	movq	%rax, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp37:
# %bb.27:                               # %.preheader.preheader
	xorl	%r14d, %r14d
.LBB3_28:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	cmpq	$268435456, %r14                # imm = 0x10000000
	je	.LBB3_54
# %bb.29:                               #   in Loop: Header=BB3_28 Depth=1
	movl	(%rbx,%r14,4), %eax
	incq	%r14
	cmpq	%rax, %r14
	je	.LBB3_28
# %bb.30:
	leal	-1(%r14), %esi
.Ltmp38:
	movl	$_ZSt4cerr, %edi
	callq	_ZNSolsEi
.Ltmp39:
# %bb.31:
	movq	%rax, %r15
	movb	$32, -41(%rbp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%r15,%rax)
	je	.LBB3_42
# %bb.32:
.Ltmp40:
	leaq	-41(%rbp), %rsi
	movl	$1, %edx
	movq	%r15, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp41:
# %bb.33:
	movq	%rax, %r15
	jmp	.LBB3_43
.LBB3_54:
.Ltmp57:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp58:
# %bb.55:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
.Ltmp59:
	movl	$_ZSt4cout, %edi
	movl	$1073741824, %esi               # imm = 0x40000000
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp60:
# %bb.56:                               # %_ZNSolsEm.exit
.Ltmp61:
	movq	%rax, %rbx
	movl	$.L.str.1, %esi
	movl	$6, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp62:
# %bb.57:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit87
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp63:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp64:
# %bb.58:                               # %.noexc95
.Ltmp65:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp66:
# %bb.59:                               # %.noexc96
	xorl	%ebx, %ebx
.Ltmp67:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp68:
	jmp	.LBB3_60
.LBB3_42:
.Ltmp42:
	movq	%r15, %rdi
	movl	$32, %esi
	callq	_ZNSo3putEc
.Ltmp43:
.LBB3_43:
.Ltmp44:
	movq	%r15, %rdi
	movl	%r14d, %esi
	callq	_ZNSolsEi
.Ltmp45:
# %bb.44:
	movq	%rax, %r15
	movb	$32, -41(%rbp)
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%r15,%rax)
	je	.LBB3_47
# %bb.45:
.Ltmp46:
	leaq	-41(%rbp), %rsi
	movl	$1, %edx
	movq	%r15, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp47:
# %bb.46:
	movq	%rax, %r15
	jmp	.LBB3_48
.LBB3_47:
.Ltmp48:
	movq	%r15, %rdi
	movl	$32, %esi
	callq	_ZNSo3putEc
.Ltmp49:
.LBB3_48:
	movl	-4(%rbx,%r14,4), %esi
.Ltmp50:
	movq	%r15, %rdi
	callq	_ZNSolsEi
.Ltmp51:
# %bb.49:
	movb	$10, -41(%rbp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB3_52
# %bb.50:
.Ltmp52:
	leaq	-41(%rbp), %rsi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp53:
	jmp	.LBB3_53
.LBB3_52:
.Ltmp54:
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNSo3putEc
.Ltmp55:
.LBB3_53:
	movl	$-1, %ebx
.LBB3_60:                               # %_ZNSolsEPFRSoS_E.exit89
	movq	%r12, %rsp
	movq	-72(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB3_62
# %bb.61:
	callq	_ZdlPv
.LBB3_62:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit
	movl	%ebx, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.LBB3_38:
	.cfi_def_cfa %rbp, 16
.Ltmp25:
	jmp	.LBB3_64
.LBB3_51:
.Ltmp56:
	jmp	.LBB3_64
.LBB3_36:
.Ltmp19:
	jmp	.LBB3_64
.LBB3_41:
.Ltmp69:
	jmp	.LBB3_64
.LBB3_39:
.Ltmp30:
	jmp	.LBB3_64
.LBB3_40:
.Ltmp35:
	jmp	.LBB3_64
.LBB3_37:
.Ltmp22:
	jmp	.LBB3_64
.LBB3_63:
.Ltmp12:
.LBB3_64:
	movq	%rax, %rbx
	movq	-72(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB3_66
# %bb.65:
	callq	_ZdlPv
.LBB3_66:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit91
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table3:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp6-.Lfunc_begin1           #   Call between .Lfunc_begin1 and .Ltmp6
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin1           # >> Call Site 2 <<
	.uleb128 .Ltmp11-.Ltmp6                 #   Call between .Ltmp6 and .Ltmp11
	.uleb128 .Ltmp12-.Lfunc_begin1          #     jumps to .Ltmp12
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp13-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Ltmp18-.Ltmp13                #   Call between .Ltmp13 and .Ltmp18
	.uleb128 .Ltmp19-.Lfunc_begin1          #     jumps to .Ltmp19
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp20-.Lfunc_begin1          # >> Call Site 4 <<
	.uleb128 .Ltmp21-.Ltmp20                #   Call between .Ltmp20 and .Ltmp21
	.uleb128 .Ltmp22-.Lfunc_begin1          #     jumps to .Ltmp22
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp23-.Lfunc_begin1          # >> Call Site 5 <<
	.uleb128 .Ltmp24-.Ltmp23                #   Call between .Ltmp23 and .Ltmp24
	.uleb128 .Ltmp25-.Lfunc_begin1          #     jumps to .Ltmp25
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp26-.Lfunc_begin1          # >> Call Site 6 <<
	.uleb128 .Ltmp29-.Ltmp26                #   Call between .Ltmp26 and .Ltmp29
	.uleb128 .Ltmp30-.Lfunc_begin1          #     jumps to .Ltmp30
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp31-.Lfunc_begin1          # >> Call Site 7 <<
	.uleb128 .Ltmp34-.Ltmp31                #   Call between .Ltmp31 and .Ltmp34
	.uleb128 .Ltmp35-.Lfunc_begin1          #     jumps to .Ltmp35
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp36-.Lfunc_begin1          # >> Call Site 8 <<
	.uleb128 .Ltmp37-.Ltmp36                #   Call between .Ltmp36 and .Ltmp37
	.uleb128 .Ltmp69-.Lfunc_begin1          #     jumps to .Ltmp69
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp38-.Lfunc_begin1          # >> Call Site 9 <<
	.uleb128 .Ltmp41-.Ltmp38                #   Call between .Ltmp38 and .Ltmp41
	.uleb128 .Ltmp56-.Lfunc_begin1          #     jumps to .Ltmp56
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp57-.Lfunc_begin1          # >> Call Site 10 <<
	.uleb128 .Ltmp68-.Ltmp57                #   Call between .Ltmp57 and .Ltmp68
	.uleb128 .Ltmp69-.Lfunc_begin1          #     jumps to .Ltmp69
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp42-.Lfunc_begin1          # >> Call Site 11 <<
	.uleb128 .Ltmp55-.Ltmp42                #   Call between .Ltmp42 and .Ltmp55
	.uleb128 .Ltmp56-.Lfunc_begin1          #     jumps to .Ltmp56
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp55-.Lfunc_begin1          # >> Call Site 12 <<
	.uleb128 .Lfunc_end3-.Ltmp55            #   Call between .Ltmp55 and .Lfunc_end3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,"axG",@progbits,_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,comdat
	.weak	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_ # -- Begin function _ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,@function
_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_: # @_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.2, %edx
	callq	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %r14
	sarq	$2, %r14
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB4_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIiE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB4_3
.LBB4_1:
	xorl	%ebp, %ebp
.LBB4_3:                                # %_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movl	(%rax), %eax
	movl	%eax, (%rbp,%r14,4)
	testq	%r12, %r12
	jle	.LBB4_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB4_5:                                # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit
	addq	%rbp, %r12
	addq	$4, %r12
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB4_7
# %bb.6:
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB4_7:                                # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit16
	testq	%r13, %r13
	je	.LBB4_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB4_9:                                # %_ZNSt12_Vector_baseIiSaIiEE13_M_deallocateEPim.exit
	addq	%r15, %r12
	movq	%rbp, (%rbx)
	movq	%r12, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,4), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_, .Lfunc_end4-_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,@function
_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc: # @_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$2305843009213693951, %rcx      # imm = 0x1FFFFFFFFFFFFFFF
	movq	8(%rdi), %r8
	subq	(%rdi), %r8
	sarq	$2, %r8
	movq	%rcx, %rax
	subq	%r8, %rax
	cmpq	%rsi, %rax
	jb	.LBB5_2
# %bb.1:
	cmpq	%rsi, %r8
	cmovaq	%r8, %rsi
	leaq	(%rsi,%r8), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%r8, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB5_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end5:
	.size	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc, .Lfunc_end5-_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorIiE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIiE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorIiE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIiE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorIiE8allocateEmPKv,@function
_ZNSt15__new_allocatorIiE8allocateEmPKv: # @_ZNSt15__new_allocatorIiE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$61, %rax
	jne	.LBB6_1
# %bb.3:
	shlq	$2, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB6_1:
	.cfi_def_cfa_offset 16
	shrq	$62, %rsi
	je	.LBB6_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB6_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end6:
	.size	_ZNSt15__new_allocatorIiE8allocateEmPKv, .Lfunc_end6-_ZNSt15__new_allocatorIiE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,"axG",@progbits,_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,comdat
	.weak	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_ # -- Begin function _ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,@function
_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_: # @_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.2, %edx
	callq	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %r14
	sarq	$2, %r14
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB7_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIiE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB7_3
.LBB7_1:
	xorl	%ebp, %ebp
.LBB7_3:                                # %_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movl	(%rax), %eax
	movl	%eax, (%rbp,%r14,4)
	testq	%r12, %r12
	jle	.LBB7_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB7_5:                                # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit
	addq	%rbp, %r12
	addq	$4, %r12
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB7_7
# %bb.6:
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB7_7:                                # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit16
	testq	%r13, %r13
	je	.LBB7_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB7_9:                                # %_ZNSt12_Vector_baseIiSaIiEE13_M_deallocateEPim.exit
	addq	%r15, %r12
	movq	%rbp, (%rbx)
	movq	%r12, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,4), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_, .Lfunc_end7-_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4scaniPiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9propagateiPiS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z4scaniPiS_,@object            # @_Z4scaniPiS_
	.section	.rodata,"a",@progbits
	.globl	_Z4scaniPiS_
	.p2align	3, 0x0
_Z4scaniPiS_:
	.quad	_Z19__device_stub__scaniPiS_
	.size	_Z4scaniPiS_, 8

	.type	_Z9propagateiPiS_,@object       # @_Z9propagateiPiS_
	.globl	_Z9propagateiPiS_
	.p2align	3, 0x0
_Z9propagateiPiS_:
	.quad	_Z24__device_stub__propagateiPiS_
	.size	_Z9propagateiPiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"memory usage: "
	.size	.L.str, 15

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" bytes"
	.size	.L.str.1, 7

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"vector::_M_realloc_insert"
	.size	.L.str.2, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z4scaniPiS_"
	.size	.L__unnamed_1, 13

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9propagateiPiS_"
	.size	.L__unnamed_2, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__scaniPiS_
	.addrsig_sym _Z24__device_stub__propagateiPiS_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z4scaniPiS_
	.addrsig_sym _Z9propagateiPiS_
	.addrsig_sym _ZSt4cout
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4scaniPiS_            ; -- Begin function _Z4scaniPiS_
	.globl	_Z4scaniPiS_
	.p2align	8
	.type	_Z4scaniPiS_,@function
_Z4scaniPiS_:                           ; @_Z4scaniPiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x24
	s_load_b128 s[0:3], s[0:1], 0x8
	v_lshlrev_b32_e32 v3, 1, v0
	v_lshrrev_b32_e32 v6, 4, v0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s6, s15, s5
	v_lshl_add_u32 v1, s6, 1, v3
	v_add_lshl_u32 v3, v3, v6, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_mov_b32 s0, 2
	s_mov_b32 s1, 6
	global_load_b64 v[4:5], v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, v5, v4
	ds_store_2addr_b32 v3, v4, v5 offset1:1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_lshl_b32 s6, 1, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s6, v0
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	s_lshl_b32 s7, -1, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_not_b32 s7, s7
	v_lshl_or_b32 v4, v0, s0, s7
	s_add_i32 s7, s0, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_lshl_add_u32 v5, -1, s7, v4
	v_ashrrev_i32_e32 v6, 5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v7, 5, v5
	v_add_lshl_u32 v4, v6, v4, 2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_lshl_u32 v5, v7, v5, 2
	ds_load_b32 v6, v4
	ds_load_b32 v5, v5
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v5, v5, v6
	ds_store_b32 v4, v5
.LBB0_3:                                ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s0, s0, 1
	s_add_i32 s1, s1, -1
	s_cmp_eq_u32 s0, 9
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_1
; %bb.4:                                ; %.preheader
	v_add_nc_u32_e32 v4, 1, v0
	s_mov_b32 s0, 0
	s_mov_b32 s1, 8
.LBB0_5:                                ; =>This Inner Loop Header: Depth=1
	v_lshrrev_b32_e32 v5, s0, v0
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v5
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	s_xor_b32 s7, s0, 7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_bfm_b32 s8, s7, 0
	s_lshl_b32 s7, 1, s7
	v_lshl_or_b32 v5, v4, s1, s8
	v_subrev_nc_u32_e32 v6, s7, v5
	v_ashrrev_i32_e32 v7, 5, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 5, v6
	v_add_lshl_u32 v5, v7, v5, 2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_lshl_u32 v6, v8, v6, 2
	ds_load_b32 v7, v5
	ds_load_b32 v6, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v6, v7
	ds_store_b32 v5, v6
.LBB0_7:                                ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s1, s1, -1
	s_add_i32 s0, s0, 1
	s_cmp_eq_u32 s1, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_5
; %bb.8:
	ds_load_2addr_b32 v[3:4], v3 offset1:1
	s_add_i32 s5, s5, -1
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	global_store_b64 v[1:2], v[3:4], off
	v_cmpx_eq_u32_e64 s5, v0
	s_cbranch_execz .LBB0_10
; %bb.9:
	s_mov_b32 s5, 0
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	global_store_b32 v0, v4, s[0:1]
.LBB0_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4scaniPiS_
		.amdhsa_group_segment_fixed_size 2112
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4scaniPiS_, .Lfunc_end0-_Z4scaniPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 548
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2112 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9propagateiPiS_       ; -- Begin function _Z9propagateiPiS_
	.globl	_Z9propagateiPiS_
	.p2align	8
	.type	_Z9propagateiPiS_,@function
_Z9propagateiPiS_:                      ; @_Z9propagateiPiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x24
	s_load_b128 s[0:3], s[0:1], 0x8
	s_add_i32 s6, s15, 1
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s6, s5, v[0:1]
	s_ashr_i32 s5, s15, 31
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_lshl_b64 s[2:3], s[4:5], 2
	s_add_u32 s0, s0, s2
	global_load_b32 v2, v[0:1], off
	s_addc_u32 s1, s1, s3
	s_load_b32 s0, s[0:1], 0x0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v2, s0, v2
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9propagateiPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9propagateiPiS_, .Lfunc_end1-_Z9propagateiPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 144
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2112
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4scaniPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4scaniPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9propagateiPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9propagateiPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
