#include <fstream>
#include <string>
#include <chrono>
#include <string>
#include <iostream>
#include <iomanip>



//For GPU Access
int* grid = nullptr;
int* gridGPU = nullptr;
int* tempGPU = nullptr;
int width = 0;
int height = 0;


//Error checking for cuda calls
void checkError(cudaError_t e)
{
   if (e != cudaSuccess)
   {
      std::cerr << "CUDA error: " << int(e) << " : " << cudaGetErrorString(e) << '\n';
      abort();
   }
}

//Changes the mod operator to work like python
__host__
int modFixH(int x, int dimension) {
    if (x < 0) {
        return dimension + (x % dimension);
    } else {
        return x % dimension;
    }
}



//Changes the mod operator to work like python
__device__
int modFix(int x, int dimension) {
    if (x < 0) {
        return dimension + (x % dimension);
    } else {
        return x % dimension;
    }
}

/**
* Given the state of a cell the GoL rules apply:
* - Any live call with fewer than 2 neighbors dies = underpopulation
* - Any live cell with two or three live neighbors lives on to the next gen
* - Any live cell with more than 3 live neighbors dies = overpopulation
* - Any dead cell with exactly 3 live neighbors becomes living = reproduction
* 
* After these rules have been checked, the grid is then updated.
*
* @gridGPU: Representation of the grid that lives on the GPU memory.
* @tempGPU: Representation of the grid that lives on the GPU memory that is used for inbetween states.
* @width: The width of the grid.
* @height: The height of the grid.
*/
__global__
void evolve(int* gridGPU, int* tempGPU, int width, int height) {
    //Defineing alive and dead
    int deadValue = 0;
    int aliveValue = 1;
    
    //Gpu loop set up
    int index = blockIdx.x*blockDim.x + threadIdx.x;
    int index2 = blockIdx.y*blockDim.y + threadIdx.y;

    int stride = blockDim.x*gridDim.x;
    int stride2 = blockDim.y*gridDim.y;

    //Gpu iteration of the cells universe
    for (int a=index; a < width; a += stride){
        for(int b=index2; b < height; b += stride2) {

            //Checks for alive neighbors
            int aliveCells = 0;
            for (int k=-1; k <= 1; k++) {
                for (int l=-1; l <= 1; l++) {
                    if (!(k == 0 && l == 0)) {
                        int neigh = gridGPU[(modFix(k + a,width) * width) + modFix(l + b,height)];
                        if ((neigh == aliveValue)) {
                            aliveCells++;
                        }   
                    }
                }
            }

            //Modifies the grid depending on surrounding
            if (aliveCells < 2 || aliveCells > 3) {
                tempGPU[(modFix(a, width)*width)+modFix(b, height)] = deadValue;
                
            } else if (aliveCells == 3) {
                tempGPU[(modFix(a, width)*width)+modFix(b, height)] = aliveValue;
            } 
        }
    }
}

/**
 * Sets up the grid so that every cell of the environment starts off
 * as being dead.
 * 
 * @grid: The grid that the game of life will be played on.
 * @width: The width of the environment.
 * @height: The height of the environment.
 */
void intialGrid(int* grid, int width, int height){
    for (int i = 0; i < width; ++i) {
        for (int j = 0; j < height; ++j) {
            grid[j*width + i] = 0;   
        }
    }
}

// void debugGrid(int* grid, int width, int height) {
//     for (int i = 0; i < width; ++i) {
//         for (int j = 0; j < height; ++j) {
//             std::cout<<grid[j*width + i]<<" ";   
//         }
//         std::cout<<std::endl;
//     }
//     std::cout<<std::endl;
// }

//Runs Program
int main(int argc, char const *argv[]) {
    int generations;
    std::string visOut = "NoVis";
    const std::string visStatus = "NoVis";
    

    if (argc == 6) {
        //argv[1] is the file you want to insert
        width = atoi(argv[2]); //argv[2]
        height = atoi(argv[3]); //argv[3]
        generations = atoi(argv[4]); //argv[4]
        visOut = argv[5];
    } else {
        //argv[1] is the file you want to insert
        width = 256; //argv[2]
        height = 256; //argv[3]
        generations = 50; //argv[4]
        
    }


    //Initalize the grid for the game
    grid = new int[width*height];
    intialGrid(grid, width, height);

    //Add pattern to the grid
    std::ifstream file(argv[1]);
    std::string line;
    int centering = 0;
    bool centered = false;
    int i = 0;
    while(getline(file, line)) {
        if(centered == false){
            centering += line.size();
            centered = true;
        }
        for (uint j=0; j<line.length(); j++) {
            if (line[j] == 'O') {
                grid[(((i+(width/2)) - (centering/2)) * width) + (j+(height/2) - (centering/2))] = 1;
            }
        }
        i++;
    }
    file.close();
    std::ofstream outFile;

    if (visStatus.compare(visOut)) { //For visualizing and verification
        outFile.open("game_of_life_save.txt");
    }

    
    //Allocate GPU memory for calculations
    checkError(cudaMalloc(&gridGPU, width*height*sizeof(int)));
    checkError(cudaMalloc(&tempGPU, width*height*sizeof(int)));

    //Copy intial array to GPU memory locations
    checkError(cudaMemcpy(gridGPU, grid, width*height*sizeof(int), cudaMemcpyHostToDevice));
    checkError(cudaMemcpy(tempGPU, grid, width*height*sizeof(int), cudaMemcpyHostToDevice));

    // assign a 2D distribution of CUDA "threads" within each CUDA "block"
    int Threads = 256;
    int Blocks = (width+Threads-1)/Threads;

    for (int i = 0; i < generations; i++) {
        //plays gol
        evolve<<<Blocks, Threads>>>(gridGPU, tempGPU, width, height);
        
        //Sync host and device
        cudaDeviceSynchronize();

        // copy from GPU to CPU
        checkError(cudaMemcpy(grid, tempGPU, width*height*sizeof(int), cudaMemcpyDeviceToHost));
        checkError(cudaMemcpy(gridGPU, grid, width*height*sizeof(int), cudaMemcpyHostToDevice));

        if (visStatus.compare(visOut)) { //For visualizing and verification
            for (int i=0; i < width; i++) {
                for (int j=0; j < height; j++) {
                    outFile << grid[(modFixH(i, width)*width)+modFixH(j, height)];
                }
                outFile << std::endl;
            }
            outFile << std::endl;
        }   
    }

    if (visStatus.compare(visOut)) {
       outFile.close(); 
    }

    cudaFree(gridGPU);
    cudaFree(tempGPU);
    free(grid);
    
    return 0;
}
	.file	"tmpxft_0037c83f_00000000-6_main.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4112:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4112:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error: "
.LC1:
	.string	" : "
	.text
	.globl	_Z10checkError9cudaError
	.type	_Z10checkError9cudaError, @function
_Z10checkError9cudaError:
.LFB4104:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	testl	%edi, %edi
	je	.L2
	movl	%edi, %ebx
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movb	$10, 7(%rsp)
	movq	%rax, %rdi
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rdi,%rax)
	je	.L4
	leaq	7(%rsp), %rsi
	movl	$1, %edx
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	jmp	.L5
.L4:
	movl	$10, %esi
	call	_ZNSo3putEc@PLT
.L5:
	call	abort@PLT
.L2:
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4104:
	.size	_Z10checkError9cudaError, .-_Z10checkError9cudaError
	.globl	_Z7modFixHii
	.type	_Z7modFixHii, @function
_Z7modFixHii:
.LFB4105:
	.cfi_startproc
	endbr64
	movl	%edi, %eax
	cltd
	idivl	%esi
	testl	%edi, %edi
	jns	.L9
	addl	%esi, %edx
.L9:
	movl	%edx, %eax
	ret
	.cfi_endproc
.LFE4105:
	.size	_Z7modFixHii, .-_Z7modFixHii
	.globl	_Z6modFixii
	.type	_Z6modFixii, @function
_Z6modFixii:
.LFB4106:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4106:
	.size	_Z6modFixii, .-_Z6modFixii
	.globl	_Z10intialGridPiii
	.type	_Z10intialGridPiii, @function
_Z10intialGridPiii:
.LFB4107:
	.cfi_startproc
	endbr64
	movslq	%esi, %rcx
	xorl	%eax, %eax
	salq	$2, %rcx
.L14:
	cmpl	%esi, %eax
	jge	.L18
	movq	%rdi, %r9
	xorl	%r8d, %r8d
.L16:
	cmpl	%edx, %r8d
	jge	.L19
	xorl	%r10d, %r10d
	incl	%r8d
	movl	%r10d, (%r9)
	addq	%rcx, %r9
	jmp	.L16
.L19:
	incl	%eax
	addq	$4, %rdi
	jmp	.L14
.L18:
	ret
	.cfi_endproc
.LFE4107:
	.size	_Z10intialGridPiii, .-_Z10intialGridPiii
	.globl	_Z29__device_stub__Z6evolvePiS_iiPiS_ii
	.type	_Z29__device_stub__Z6evolvePiS_iiPiS_ii, @function
_Z29__device_stub__Z6evolvePiS_iiPiS_ii:
.LFB4134:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6evolvePiS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L20:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4134:
	.size	_Z29__device_stub__Z6evolvePiS_iiPiS_ii, .-_Z29__device_stub__Z6evolvePiS_iiPiS_ii
	.globl	_Z6evolvePiS_ii
	.type	_Z6evolvePiS_ii, @function
_Z6evolvePiS_ii:
.LFB4135:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z6evolvePiS_iiPiS_ii
	.cfi_endproc
.LFE4135:
	.size	_Z6evolvePiS_ii, .-_Z6evolvePiS_ii
	.section	.rodata.str1.1
.LC2:
	.string	"_Z6evolvePiS_ii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4137:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6evolvePiS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4137:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.str1.1,"aMS",@progbits,1
.LC3:
	.string	"basic_string: construction from null is not valid"
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC5IS3_EEPKcRKS3_,comdat
	.align 2
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, @function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_:
.LFB4484:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	jne	.L28
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L33
	leaq	.LC3(%rip), %rdi
	call	_ZSt19__throw_logic_errorPKc@PLT
.L28:
	movq	%rdi, %rbx
	movq	%rsi, %rdi
	movq	%rsi, %rbp
	call	strlen@PLT
	movq	%rax, (%rsp)
	leaq	0(%rbp,%rax), %r12
	cmpq	$15, %rax
	jbe	.L30
	movq	%rsp, %rsi
	xorl	%edx, %edx
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@PLT
	movq	%rax, (%rbx)
	movq	(%rsp), %rax
	movq	%rax, 16(%rbx)
.L30:
	movq	(%rbx), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	(%rsp), %rax
	movq	(%rbx), %rdx
	movq	%rax, 8(%rbx)
	movb	$0, (%rdx,%rax)
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
.L33:
	call	__stack_chk_fail@PLT
.L31:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4484:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
	.set	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.section	.rodata.str1.1
.LC4:
	.string	"NoVis"
.LC5:
	.string	"game_of_life_save.txt"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4108:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4108
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	.LC4(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	movq	%r12, %rsi
	subq	$1224, %rsp
	.cfi_def_cfa_offset 1280
	movq	%fs:40, %rax
	movq	%rax, 1208(%rsp)
	xorl	%eax, %eax
	leaq	68(%rsp), %r13
	leaq	80(%rsp), %rax
	movq	%rax, %rdi
	movq	%r13, %rdx
	movq	%rax, 16(%rsp)
.LEHB0:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE0:
	leaq	112(%rsp), %rax
	movq	%r13, %rdx
	movq	%r12, %rsi
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
.LEHB1:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE1:
	cmpl	$6, %ebp
	jne	.L35
	movq	16(%rbx), %rdi
	call	atoi@PLT
	movq	24(%rbx), %rdi
	movl	%eax, width(%rip)
	call	atoi@PLT
	movq	32(%rbx), %rdi
	movl	%eax, height(%rip)
	call	atoi@PLT
	movq	40(%rbx), %rbp
	movl	%eax, %r15d
	movq	%rbp, %rdi
	call	strlen@PLT
	movq	88(%rsp), %rdx
	movq	%rbp, %rcx
	xorl	%esi, %esi
	movq	16(%rsp), %rdi
	movq	%rax, %r8
.LEHB2:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm@PLT
	jmp	.L36
.L35:
	movl	$256, width(%rip)
	movl	$50, %r15d
	movl	$256, height(%rip)
.L36:
	movabsq	$2305843009213693950, %rax
	movl	width(%rip), %edi
	imull	height(%rip), %edi
	movslq	%edi, %rdi
	cmpq	%rdi, %rax
	jb	.L37
	salq	$2, %rdi
	call	_Znam@PLT
	movl	height(%rip), %edx
	movl	width(%rip), %esi
	movq	%rax, %rdi
	movq	%rax, grid(%rip)
	call	_Z10intialGridPiii
	movq	8(%rbx), %rsi
	movl	$8, %edx
	leaq	688(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 32(%rsp)
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
	leaq	160(%rsp), %rax
	xorl	%ebp, %ebp
	xorl	%r12d, %r12d
	xorl	%ebx, %ebx
	movq	%rax, 144(%rsp)
	xorl	%eax, %eax
	movq	%rax, 152(%rsp)
	leaq	144(%rsp), %rax
	movb	$0, 160(%rsp)
	movq	%rax, 40(%rsp)
	jmp	.L40
.L37:
	movq	1208(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L74
	call	__cxa_throw_bad_array_new_length@PLT
.LEHE2:
.L78:
	movq	(%rax), %rdx
	movq	-24(%rdx), %rdx
	testb	$5, 32(%rax,%rdx)
	jne	.L77
	movq	152(%rsp), %r9
	testb	%r12b, %r12b
	jne	.L41
	addl	%r9d, %ebx
.L41:
	movl	%ebx, %eax
	movl	$2, %ecx
	movq	grid(%rip), %r10
	xorl	%esi, %esi
	cltd
	movq	144(%rsp), %r11
	movl	$2, %r8d
	idivl	%ecx
	movl	%eax, %edi
	negl	%edi
.L42:
	movl	%esi, %eax
	cmpq	%r9, %rax
	jb	.L44
	incl	%ebp
	movb	$1, %r12b
.L40:
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
.LEHB3:
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE@PLT
	jmp	.L78
.L44:
	cmpb	$79, (%r11,%rax)
	jne	.L43
	movl	width(%rip), %r12d
	movl	%r12d, %eax
	cltd
	idivl	%r8d
	leal	(%rax,%rbp), %ecx
	movl	height(%rip), %eax
	addl	%edi, %ecx
	cltd
	imull	%r12d, %ecx
	idivl	%r8d
	addl	%edi, %eax
	addl	%eax, %ecx
	leal	(%rcx,%rsi), %eax
	movl	$1, (%r10,%rax,4)
.L43:
	incl	%esi
	jmp	.L42
.L77:
	movq	32(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv@PLT
	leaq	176(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE3:
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_@PLT
	testl	%eax, %eax
	jne	.L46
.L48:
	movl	width(%rip), %esi
	imull	height(%rip), %esi
	leaq	gridGPU(%rip), %rdi
	movslq	%esi, %rsi
	salq	$2, %rsi
.LEHB4:
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_Z10checkError9cudaError
	jmp	.L79
.L46:
	movq	8(%rsp), %rdi
	movl	$16, %edx
	leaq	.LC5(%rip), %rsi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	jmp	.L48
.L79:
	movl	width(%rip), %esi
	imull	height(%rip), %esi
	leaq	tempGPU(%rip), %rdi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_Z10checkError9cudaError
	movl	width(%rip), %edx
	imull	height(%rip), %edx
	movl	$1, %ecx
	movq	grid(%rip), %rsi
	movq	gridGPU(%rip), %rdi
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z10checkError9cudaError
	movl	width(%rip), %edx
	imull	height(%rip), %edx
	movl	$1, %ecx
	movq	grid(%rip), %rsi
	movq	tempGPU(%rip), %rdi
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z10checkError9cudaError
	movl	width(%rip), %eax
	movl	$256, %ecx
	movl	$16777217, %ebx
	xorl	%r14d, %r14d
	salq	$8, %rbx
	addl	$255, %eax
	cltd
	idivl	%ecx
	movl	%eax, %ebp
.L49:
	cmpl	%r14d, %r15d
	jle	.L80
	movl	%ebp, 56(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movabsq	$4294967297, %rax
	movl	$1, %ecx
	movq	%rbx, 68(%rsp)
	movq	%rax, 60(%rsp)
	movq	56(%rsp), %rdi
	movl	64(%rsp), %esi
	movl	$1, 76(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L50
	movl	height(%rip), %ecx
	movl	width(%rip), %edx
	movq	tempGPU(%rip), %rsi
	movq	gridGPU(%rip), %rdi
	call	_Z29__device_stub__Z6evolvePiS_iiPiS_ii
.L50:
	call	cudaDeviceSynchronize@PLT
	movl	width(%rip), %edx
	imull	height(%rip), %edx
	movl	$2, %ecx
	movq	tempGPU(%rip), %rsi
	movq	grid(%rip), %rdi
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z10checkError9cudaError
	movl	width(%rip), %edx
	imull	height(%rip), %edx
	movl	$1, %ecx
	movq	grid(%rip), %rsi
	movq	gridGPU(%rip), %rdi
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z10checkError9cudaError
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_@PLT
	testl	%eax, %eax
	je	.L52
	xorl	%r12d, %r12d
.L51:
	cmpl	%r12d, width(%rip)
	jle	.L81
	xorl	%r13d, %r13d
.L54:
	movl	height(%rip), %esi
	cmpl	%r13d, %esi
	jle	.L82
	movl	width(%rip), %ecx
	movl	%r12d, %eax
	movq	8(%rsp), %rdi
	cltd
	idivl	%ecx
	movl	%r13d, %eax
	imull	%edx, %ecx
	cltd
	idivl	%esi
	movq	grid(%rip), %rax
	addl	%edx, %ecx
	movslq	%ecx, %rcx
	movl	(%rax,%rcx,4), %esi
	call	_ZNSolsEi@PLT
	incl	%r13d
	jmp	.L54
.L82:
	movq	8(%rsp), %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	incl	%r12d
	jmp	.L51
.L81:
	movq	8(%rsp), %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L52:
	incl	%r14d
	jmp	.L49
.L80:
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_@PLT
	testl	%eax, %eax
	je	.L56
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
.L56:
	movq	gridGPU(%rip), %rdi
	call	cudaFree@PLT
	movq	tempGPU(%rip), %rdi
	call	cudaFree@PLT
.LEHE4:
	movq	grid(%rip), %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	40(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	32(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	24(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	16(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	1208(%rsp), %rax
	subq	%fs:40, %rax
	je	.L62
	jmp	.L74
.L68:
	endbr64
	movq	%rax, %rbp
.L57:
	movq	8(%rsp), %rdi
	movq	%rbp, %rbx
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	jmp	.L58
.L67:
	endbr64
	movq	%rax, %rbx
.L58:
	movq	40(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	32(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	jmp	.L59
.L66:
	endbr64
	movq	%rax, %rbx
.L59:
	movq	24(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L60
.L65:
	endbr64
	movq	%rax, %rbx
.L60:
	movq	16(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	1208(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L74
	movq	%rbx, %rdi
.LEHB5:
	call	_Unwind_Resume@PLT
.LEHE5:
.L74:
	call	__stack_chk_fail@PLT
.L62:
	addq	$1224, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4108:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4108:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4108-.LLSDACSB4108
.LLSDACSB4108:
	.uleb128 .LEHB0-.LFB4108
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4108
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L65-.LFB4108
	.uleb128 0
	.uleb128 .LEHB2-.LFB4108
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L66-.LFB4108
	.uleb128 0
	.uleb128 .LEHB3-.LFB4108
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L67-.LFB4108
	.uleb128 0
	.uleb128 .LEHB4-.LFB4108
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L68-.LFB4108
	.uleb128 0
	.uleb128 .LEHB5-.LFB4108
	.uleb128 .LEHE5-.LEHB5
	.uleb128 0
	.uleb128 0
.LLSDACSE4108:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	height
	.bss
	.align 4
	.type	height, @object
	.size	height, 4
height:
	.zero	4
	.globl	width
	.align 4
	.type	width, @object
	.size	width, 4
width:
	.zero	4
	.globl	tempGPU
	.align 8
	.type	tempGPU, @object
	.size	tempGPU, 8
tempGPU:
	.zero	8
	.globl	gridGPU
	.align 8
	.type	gridGPU, @object
	.size	gridGPU, 8
gridGPU:
	.zero	8
	.globl	grid
	.align 8
	.type	grid, @object
	.size	grid, 8
grid:
	.zero	8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <fstream>
#include <string>
#include <chrono>
#include <string>
#include <iostream>
#include <iomanip>



//For GPU Access
int* grid = nullptr;
int* gridGPU = nullptr;
int* tempGPU = nullptr;
int width = 0;
int height = 0;


//Error checking for cuda calls
void checkError(hipError_t e)
{
   if (e != hipSuccess)
   {
      std::cerr << "CUDA error: " << int(e) << " : " << hipGetErrorString(e) << '\n';
      abort();
   }
}

//Changes the mod operator to work like python
__host__
int modFixH(int x, int dimension) {
    if (x < 0) {
        return dimension + (x % dimension);
    } else {
        return x % dimension;
    }
}



//Changes the mod operator to work like python
__device__
int modFix(int x, int dimension) {
    if (x < 0) {
        return dimension + (x % dimension);
    } else {
        return x % dimension;
    }
}

/**
* Given the state of a cell the GoL rules apply:
* - Any live call with fewer than 2 neighbors dies = underpopulation
* - Any live cell with two or three live neighbors lives on to the next gen
* - Any live cell with more than 3 live neighbors dies = overpopulation
* - Any dead cell with exactly 3 live neighbors becomes living = reproduction
* 
* After these rules have been checked, the grid is then updated.
*
* @gridGPU: Representation of the grid that lives on the GPU memory.
* @tempGPU: Representation of the grid that lives on the GPU memory that is used for inbetween states.
* @width: The width of the grid.
* @height: The height of the grid.
*/
__global__
void evolve(int* gridGPU, int* tempGPU, int width, int height) {
    //Defineing alive and dead
    int deadValue = 0;
    int aliveValue = 1;
    
    //Gpu loop set up
    int index = blockIdx.x*blockDim.x + threadIdx.x;
    int index2 = blockIdx.y*blockDim.y + threadIdx.y;

    int stride = blockDim.x*gridDim.x;
    int stride2 = blockDim.y*gridDim.y;

    //Gpu iteration of the cells universe
    for (int a=index; a < width; a += stride){
        for(int b=index2; b < height; b += stride2) {

            //Checks for alive neighbors
            int aliveCells = 0;
            for (int k=-1; k <= 1; k++) {
                for (int l=-1; l <= 1; l++) {
                    if (!(k == 0 && l == 0)) {
                        int neigh = gridGPU[(modFix(k + a,width) * width) + modFix(l + b,height)];
                        if ((neigh == aliveValue)) {
                            aliveCells++;
                        }   
                    }
                }
            }

            //Modifies the grid depending on surrounding
            if (aliveCells < 2 || aliveCells > 3) {
                tempGPU[(modFix(a, width)*width)+modFix(b, height)] = deadValue;
                
            } else if (aliveCells == 3) {
                tempGPU[(modFix(a, width)*width)+modFix(b, height)] = aliveValue;
            } 
        }
    }
}

/**
 * Sets up the grid so that every cell of the environment starts off
 * as being dead.
 * 
 * @grid: The grid that the game of life will be played on.
 * @width: The width of the environment.
 * @height: The height of the environment.
 */
void intialGrid(int* grid, int width, int height){
    for (int i = 0; i < width; ++i) {
        for (int j = 0; j < height; ++j) {
            grid[j*width + i] = 0;   
        }
    }
}

// void debugGrid(int* grid, int width, int height) {
//     for (int i = 0; i < width; ++i) {
//         for (int j = 0; j < height; ++j) {
//             std::cout<<grid[j*width + i]<<" ";   
//         }
//         std::cout<<std::endl;
//     }
//     std::cout<<std::endl;
// }

//Runs Program
int main(int argc, char const *argv[]) {
    int generations;
    std::string visOut = "NoVis";
    const std::string visStatus = "NoVis";
    

    if (argc == 6) {
        //argv[1] is the file you want to insert
        width = atoi(argv[2]); //argv[2]
        height = atoi(argv[3]); //argv[3]
        generations = atoi(argv[4]); //argv[4]
        visOut = argv[5];
    } else {
        //argv[1] is the file you want to insert
        width = 256; //argv[2]
        height = 256; //argv[3]
        generations = 50; //argv[4]
        
    }


    //Initalize the grid for the game
    grid = new int[width*height];
    intialGrid(grid, width, height);

    //Add pattern to the grid
    std::ifstream file(argv[1]);
    std::string line;
    int centering = 0;
    bool centered = false;
    int i = 0;
    while(getline(file, line)) {
        if(centered == false){
            centering += line.size();
            centered = true;
        }
        for (uint j=0; j<line.length(); j++) {
            if (line[j] == 'O') {
                grid[(((i+(width/2)) - (centering/2)) * width) + (j+(height/2) - (centering/2))] = 1;
            }
        }
        i++;
    }
    file.close();
    std::ofstream outFile;

    if (visStatus.compare(visOut)) { //For visualizing and verification
        outFile.open("game_of_life_save.txt");
    }

    
    //Allocate GPU memory for calculations
    checkError(hipMalloc(&gridGPU, width*height*sizeof(int)));
    checkError(hipMalloc(&tempGPU, width*height*sizeof(int)));

    //Copy intial array to GPU memory locations
    checkError(hipMemcpy(gridGPU, grid, width*height*sizeof(int), hipMemcpyHostToDevice));
    checkError(hipMemcpy(tempGPU, grid, width*height*sizeof(int), hipMemcpyHostToDevice));

    // assign a 2D distribution of CUDA "threads" within each CUDA "block"
    int Threads = 256;
    int Blocks = (width+Threads-1)/Threads;

    for (int i = 0; i < generations; i++) {
        //plays gol
        evolve<<<Blocks, Threads>>>(gridGPU, tempGPU, width, height);
        
        //Sync host and device
        hipDeviceSynchronize();

        // copy from GPU to CPU
        checkError(hipMemcpy(grid, tempGPU, width*height*sizeof(int), hipMemcpyDeviceToHost));
        checkError(hipMemcpy(gridGPU, grid, width*height*sizeof(int), hipMemcpyHostToDevice));

        if (visStatus.compare(visOut)) { //For visualizing and verification
            for (int i=0; i < width; i++) {
                for (int j=0; j < height; j++) {
                    outFile << grid[(modFixH(i, width)*width)+modFixH(j, height)];
                }
                outFile << std::endl;
            }
            outFile << std::endl;
        }   
    }

    if (visStatus.compare(visOut)) {
       outFile.close(); 
    }

    hipFree(gridGPU);
    hipFree(tempGPU);
    free(grid);
    
    return 0;
}
	.text
	.file	"main.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z10checkError10hipError_t      # -- Begin function _Z10checkError10hipError_t
	.type	_Z10checkError10hipError_t,@function
_Z10checkError10hipError_t:             # @_Z10checkError10hipError_t
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB0_2
# %bb.1:
	retq
.LBB0_2:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%edi, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
	callq	abort
.Lfunc_end0:
	.size	_Z10checkError10hipError_t, .Lfunc_end0-_Z10checkError10hipError_t
	.cfi_endproc
                                        # -- End function
	.globl	_Z7modFixHii                    # -- Begin function _Z7modFixHii
	.type	_Z7modFixHii,@function
_Z7modFixHii:                           # @_Z7modFixHii
	.cfi_startproc
# %bb.0:
                                        # kill: def $edi killed $edi def $rdi
	movl	%edi, %eax
	cltd
	idivl	%esi
                                        # kill: def $edx killed $edx def $rdx
	sarl	$31, %edi
	andl	%esi, %edi
	leal	(%rdi,%rdx), %eax
	retq
.Lfunc_end1:
	.size	_Z7modFixHii, .Lfunc_end1-_Z7modFixHii
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__evolvePiS_ii # -- Begin function _Z21__device_stub__evolvePiS_ii
	.type	_Z21__device_stub__evolvePiS_ii,@function
_Z21__device_stub__evolvePiS_ii:        # @_Z21__device_stub__evolvePiS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6evolvePiS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z21__device_stub__evolvePiS_ii, .Lfunc_end2-_Z21__device_stub__evolvePiS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z10intialGridPiii              # -- Begin function _Z10intialGridPiii
	.type	_Z10intialGridPiii,@function
_Z10intialGridPiii:                     # @_Z10intialGridPiii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB3_4
# %bb.1:                                # %.preheader.lr.ph
	movl	%esi, %eax
	movl	%edx, %ecx
	leaq	(,%rax,4), %rsi
	xorl	%r8d, %r8d
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_5 Depth 2
	movq	%rcx, %r9
	movq	%rdi, %r10
	testl	%edx, %edx
	jle	.LBB3_3
.LBB3_5:                                # %.lr.ph
                                        #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$0, (%r10)
	addq	%rsi, %r10
	decq	%r9
	jne	.LBB3_5
.LBB3_3:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	incq	%r8
	addq	$4, %rdi
	cmpq	%rax, %r8
	jne	.LBB3_2
.LBB3_4:                                # %._crit_edge13
	retq
.Lfunc_end3:
	.size	_Z10intialGridPiii, .Lfunc_end3-_Z10intialGridPiii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1144, %rsp                     # imm = 0x478
	.cfi_def_cfa_offset 1200
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movl	%edi, %ebx
	leaq	64(%rsp), %r15
	movq	%r15, -16(%r15)
	leaq	48(%rsp), %rdi
	movl	$.L.str.2, %esi
	movl	$.L.str.2+5, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	leaq	32(%rsp), %rax
	movq	%rax, -16(%rax)
.Ltmp0:
	leaq	16(%rsp), %rdi
	movl	$.L.str.2, %esi
	movl	$.L.str.2+5, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
.Ltmp1:
# %bb.1:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit67
	cmpl	$6, %ebx
	jne	.LBB4_7
# %bb.2:
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, width(%rip)
	movq	24(%r14), %rdi
	callq	atoi
	movl	%eax, height(%rip)
	movq	32(%r14), %rdi
	callq	atoi
	movl	%eax, 12(%rsp)                  # 4-byte Spill
	movq	40(%r14), %r15
	leaq	48(%rsp), %r12
	movq	8(%r12), %r13
	movq	%r15, %rdi
	callq	strlen
.Ltmp3:
	movq	%r12, %rdi
	xorl	%esi, %esi
	movq	%r13, %rdx
	movq	%r15, %rcx
	movq	%rax, %r8
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm
.Ltmp4:
# %bb.3:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc.exitthread-pre-split
	movl	width(%rip), %ebp
	movl	height(%rip), %ebx
	jmp	.LBB4_8
.LBB4_7:
	movl	$256, %ebx                      # imm = 0x100
	movl	%ebx, width(%rip)
	movl	%ebx, height(%rip)
	movl	$50, 12(%rsp)                   # 4-byte Folded Spill
	movl	$256, %ebp                      # imm = 0x100
.LBB4_8:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc.exit
	movl	%ebp, %eax
	imull	%ebx, %eax
	cltq
	leaq	(,%rax,4), %rcx
	testl	%eax, %eax
	movq	$-1, %rdi
	cmovnsq	%rcx, %rdi
.Ltmp5:
	callq	_Znam
.Ltmp6:
# %bb.9:
	movq	%rax, grid(%rip)
	testl	%ebp, %ebp
	jle	.LBB4_13
# %bb.10:                               # %.preheader.lr.ph.i
	movl	%ebp, %ecx
	movl	%ebx, %edx
	leaq	(,%rcx,4), %rsi
	xorl	%edi, %edi
.LBB4_11:                               # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_96 Depth 2
	movq	%rax, %r8
	movq	%rdx, %r9
	testl	%ebx, %ebx
	jle	.LBB4_12
.LBB4_96:                               # %.lr.ph.i
                                        #   Parent Loop BB4_11 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$0, (%r8)
	addq	%rsi, %r8
	decq	%r9
	jne	.LBB4_96
.LBB4_12:                               # %._crit_edge.i
                                        #   in Loop: Header=BB4_11 Depth=1
	incq	%rdi
	addq	$4, %rax
	cmpq	%rcx, %rdi
	jne	.LBB4_11
.LBB4_13:                               # %_Z10intialGridPiii.exit
	movq	8(%r14), %rsi
.Ltmp8:
	leaq	624(%rsp), %r14
	movq	%r14, %rdi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
.Ltmp9:
# %bb.14:
	leaq	96(%rsp), %rax
	movq	%rax, -16(%rax)
	movq	$0, -8(%rax)
	movb	$0, (%rax)
	xorl	%ebx, %ebx
	leaq	80(%rsp), %r15
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
.LBB4_15:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_20 Depth 2
	movq	624(%rsp), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
.Ltmp11:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp12:
# %bb.16:                               # %.noexc
                                        #   in Loop: Header=BB4_15 Depth=1
.Ltmp13:
	movsbl	%al, %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp14:
# %bb.17:                               #   in Loop: Header=BB4_15 Depth=1
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	testb	$5, 32(%rax,%rcx)
	jne	.LBB4_28
# %bb.18:                               #   in Loop: Header=BB4_15 Depth=1
	testb	$1, %r12b
	movq	88(%rsp), %rax
	movzbl	%r12b, %r12d
	movl	$1, %ecx
	cmovel	%ecx, %r12d
	movl	$0, %ecx
	cmovel	%eax, %ecx
	addl	%ecx, %r13d
	testq	%rax, %rax
	je	.LBB4_23
# %bb.19:                               # %.lr.ph
                                        #   in Loop: Header=BB4_15 Depth=1
	movq	80(%rsp), %rcx
	movq	grid(%rip), %rdx
	movl	%r13d, %esi
	shrl	$31, %esi
	addl	%r13d, %esi
	sarl	%esi
	movl	%ebx, %edi
	subl	%esi, %edi
	negl	%esi
	xorl	%r8d, %r8d
.LBB4_20:                               #   Parent Loop BB4_15 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpb	$79, (%rcx,%r8)
	jne	.LBB4_22
# %bb.21:                               #   in Loop: Header=BB4_20 Depth=2
	movl	width(%rip), %r9d
	movl	%r9d, %r10d
	shrl	$31, %r10d
	addl	%r9d, %r10d
	sarl	%r10d
	addl	%edi, %r10d
	movl	height(%rip), %ebp
	movl	%ebp, %r11d
	shrl	$31, %r11d
	addl	%ebp, %r11d
	sarl	%r11d
	imull	%r9d, %r10d
	addl	%r11d, %r10d
	addl	%esi, %r10d
	addl	%r8d, %r10d
	movl	$1, (%rdx,%r10,4)
.LBB4_22:                               #   in Loop: Header=BB4_20 Depth=2
	incq	%r8
	movl	%r8d, %r9d
	cmpq	%r9, %rax
	ja	.LBB4_20
.LBB4_23:                               # %._crit_edge
                                        #   in Loop: Header=BB4_15 Depth=1
	incl	%ebx
	jmp	.LBB4_15
.LBB4_28:
.Ltmp16:
	leaq	624(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv
.Ltmp17:
# %bb.29:
.Ltmp19:
	leaq	112(%rsp), %r14
	movq	%r14, %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
.Ltmp20:
# %bb.30:
	movq	24(%rsp), %rax
	movq	56(%rsp), %rdx
	movq	%rax, %rbx
	subq	%rdx, %rbx
	cmovbq	%rax, %rdx
	testq	%rdx, %rdx
	je	.LBB4_32
# %bb.31:                               # %_ZNSt11char_traitsIcE7compareEPKcS2_m.exit.i
	movq	48(%rsp), %rsi
	movq	16(%rsp), %rdi
	callq	bcmp@PLT
	testl	%eax, %eax
	jne	.LBB4_33
.LBB4_32:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_.exit
	cmpq	$-2147483647, %rbx              # imm = 0x80000001
	movq	$-2147483648, %rax              # imm = 0x80000000
	cmovgeq	%rbx, %rax
	movl	$2147483647, %ecx               # imm = 0x7FFFFFFF
	cmpq	%rcx, %rax
	cmovgeq	%rcx, %rax
	testl	%eax, %eax
	je	.LBB4_34
.LBB4_33:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_.exit.thread
.Ltmp22:
	leaq	112(%rsp), %rdi
	movl	$.L.str.3, %esi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp23:
.LBB4_34:
	movslq	width(%rip), %rax
	movslq	height(%rip), %rsi
	imulq	%rax, %rsi
	shlq	$2, %rsi
.Ltmp24:
	movl	$gridGPU, %edi
	callq	hipMalloc
.Ltmp25:
# %bb.35:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit
.Ltmp26:
	movl	%eax, %edi
	callq	_Z10checkError10hipError_t
.Ltmp27:
# %bb.36:
	movslq	width(%rip), %rax
	movslq	height(%rip), %rsi
	imulq	%rax, %rsi
	shlq	$2, %rsi
.Ltmp28:
	movl	$tempGPU, %edi
	callq	hipMalloc
.Ltmp29:
# %bb.37:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit72
.Ltmp30:
	movl	%eax, %edi
	callq	_Z10checkError10hipError_t
.Ltmp31:
# %bb.38:
	movq	gridGPU(%rip), %rdi
	movq	grid(%rip), %rsi
	movslq	width(%rip), %rax
	movslq	height(%rip), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
.Ltmp32:
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp33:
# %bb.39:
.Ltmp34:
	movl	%eax, %edi
	callq	_Z10checkError10hipError_t
.Ltmp35:
# %bb.40:
	movq	tempGPU(%rip), %rdi
	movq	grid(%rip), %rsi
	movslq	width(%rip), %rax
	movslq	height(%rip), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
.Ltmp36:
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp37:
# %bb.41:
.Ltmp38:
	movl	%eax, %edi
	callq	_Z10checkError10hipError_t
.Ltmp39:
# %bb.42:
	cmpl	$0, 12(%rsp)                    # 4-byte Folded Reload
	jle	.LBB4_69
# %bb.43:                               # %.lr.ph138
	movl	width(%rip), %r15d
	leal	255(%r15), %eax
	addl	$510, %r15d                     # imm = 0x1FE
	testl	%eax, %eax
	cmovnsl	%eax, %r15d
	sarl	$8, %r15d
	btsq	$32, %r15
	xorl	%ebx, %ebx
	movl	$2147483647, %r12d              # imm = 0x7FFFFFFF
.LBB4_44:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_57 Depth 2
                                        #       Child Loop BB4_59 Depth 3
.Ltmp41:
	movq	%r15, %rdi
	movl	$1, %esi
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp42:
# %bb.45:                               #   in Loop: Header=BB4_44 Depth=1
	testl	%eax, %eax
	jne	.LBB4_47
# %bb.46:                               #   in Loop: Header=BB4_44 Depth=1
	movq	gridGPU(%rip), %rdi
	movq	tempGPU(%rip), %rsi
	movl	width(%rip), %edx
	movl	height(%rip), %ecx
.Ltmp43:
	callq	_Z21__device_stub__evolvePiS_ii
.Ltmp44:
.LBB4_47:                               #   in Loop: Header=BB4_44 Depth=1
.Ltmp45:
	callq	hipDeviceSynchronize
.Ltmp46:
# %bb.48:                               #   in Loop: Header=BB4_44 Depth=1
	movq	grid(%rip), %rdi
	movq	tempGPU(%rip), %rsi
	movslq	width(%rip), %rax
	movslq	height(%rip), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
.Ltmp47:
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp48:
# %bb.49:                               #   in Loop: Header=BB4_44 Depth=1
.Ltmp49:
	movl	%eax, %edi
	callq	_Z10checkError10hipError_t
.Ltmp50:
# %bb.50:                               #   in Loop: Header=BB4_44 Depth=1
	movq	gridGPU(%rip), %rdi
	movq	grid(%rip), %rsi
	movslq	width(%rip), %rax
	movslq	height(%rip), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
.Ltmp51:
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp52:
# %bb.51:                               #   in Loop: Header=BB4_44 Depth=1
.Ltmp53:
	movl	%eax, %edi
	callq	_Z10checkError10hipError_t
.Ltmp54:
# %bb.52:                               #   in Loop: Header=BB4_44 Depth=1
	movq	24(%rsp), %rax
	movq	56(%rsp), %rdx
	movq	%rax, %r13
	subq	%rdx, %r13
	cmovbq	%rax, %rdx
	testq	%rdx, %rdx
	je	.LBB4_54
# %bb.53:                               # %_ZNSt11char_traitsIcE7compareEPKcS2_m.exit.i83
                                        #   in Loop: Header=BB4_44 Depth=1
	movq	48(%rsp), %rsi
	movq	16(%rsp), %rdi
	callq	bcmp@PLT
	testl	%eax, %eax
	jne	.LBB4_55
.LBB4_54:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_.exit90
                                        #   in Loop: Header=BB4_44 Depth=1
	cmpq	$-2147483647, %r13              # imm = 0x80000001
	movq	$-2147483648, %rax              # imm = 0x80000000
	cmovlq	%rax, %r13
	cmpq	%r12, %r13
	cmovgeq	%r12, %r13
	testl	%r13d, %r13d
	je	.LBB4_68
.LBB4_55:                               # %.preheader129
                                        #   in Loop: Header=BB4_44 Depth=1
	cmpl	$0, width(%rip)
	jle	.LBB4_65
# %bb.56:                               # %.preheader.preheader
                                        #   in Loop: Header=BB4_44 Depth=1
	xorl	%ebp, %ebp
.LBB4_57:                               # %.preheader
                                        #   Parent Loop BB4_44 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB4_59 Depth 3
	movl	height(%rip), %esi
	testl	%esi, %esi
	jle	.LBB4_61
# %bb.58:                               # %.lr.ph132.preheader
                                        #   in Loop: Header=BB4_57 Depth=2
	xorl	%r13d, %r13d
.LBB4_59:                               # %.lr.ph132
                                        #   Parent Loop BB4_44 Depth=1
                                        #     Parent Loop BB4_57 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	grid(%rip), %rdi
	movl	width(%rip), %r8d
	movl	%ebp, %eax
	cltd
	idivl	%r8d
	movl	%edx, %ecx
	imull	%r8d, %ecx
	movl	%r13d, %eax
	cltd
	idivl	%esi
	addl	%ecx, %edx
	movslq	%edx, %rax
	movl	(%rdi,%rax,4), %esi
.Ltmp55:
	movq	%r14, %rdi
	callq	_ZNSolsEi
.Ltmp56:
# %bb.60:                               #   in Loop: Header=BB4_59 Depth=3
	incl	%r13d
	movl	height(%rip), %esi
	cmpl	%esi, %r13d
	jl	.LBB4_59
.LBB4_61:                               # %._crit_edge133
                                        #   in Loop: Header=BB4_57 Depth=2
	movq	112(%rsp), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
.Ltmp58:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp59:
# %bb.62:                               # %.noexc114
                                        #   in Loop: Header=BB4_57 Depth=2
.Ltmp60:
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
.Ltmp61:
# %bb.63:                               # %.noexc115
                                        #   in Loop: Header=BB4_57 Depth=2
.Ltmp62:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp63:
# %bb.64:                               # %_ZNSolsEPFRSoS_E.exit93
                                        #   in Loop: Header=BB4_57 Depth=2
	incl	%ebp
	cmpl	width(%rip), %ebp
	jl	.LBB4_57
.LBB4_65:                               # %._crit_edge135
                                        #   in Loop: Header=BB4_44 Depth=1
	movq	112(%rsp), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
.Ltmp65:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp66:
# %bb.66:                               # %.noexc111
                                        #   in Loop: Header=BB4_44 Depth=1
.Ltmp67:
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
.Ltmp68:
# %bb.67:                               # %.noexc112
                                        #   in Loop: Header=BB4_44 Depth=1
.Ltmp69:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp70:
.LBB4_68:                               # %_ZNSolsEPFRSoS_E.exit
                                        #   in Loop: Header=BB4_44 Depth=1
	incl	%ebx
	cmpl	12(%rsp), %ebx                  # 4-byte Folded Reload
	jne	.LBB4_44
.LBB4_69:                               # %._crit_edge139
	movq	24(%rsp), %rax
	movq	56(%rsp), %rdx
	movq	%rax, %rbx
	subq	%rdx, %rbx
	cmovbq	%rax, %rdx
	testq	%rdx, %rdx
	je	.LBB4_71
# %bb.70:                               # %_ZNSt11char_traitsIcE7compareEPKcS2_m.exit.i74
	movq	48(%rsp), %rsi
	movq	16(%rsp), %rdi
	callq	bcmp@PLT
	testl	%eax, %eax
	jne	.LBB4_72
.LBB4_71:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_.exit81
	cmpq	$-2147483647, %rbx              # imm = 0x80000001
	movq	$-2147483648, %rax              # imm = 0x80000000
	cmovgeq	%rbx, %rax
	movl	$2147483647, %ecx               # imm = 0x7FFFFFFF
	cmpq	%rcx, %rax
	cmovgeq	%rcx, %rax
	testl	%eax, %eax
	je	.LBB4_73
.LBB4_72:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_.exit81.thread
.Ltmp72:
	leaq	112(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp73:
.LBB4_73:
	movq	gridGPU(%rip), %rdi
.Ltmp74:
	callq	hipFree
.Ltmp75:
# %bb.74:
	movq	tempGPU(%rip), %rdi
.Ltmp76:
	callq	hipFree
.Ltmp77:
# %bb.75:
	movq	grid(%rip), %rdi
	callq	free
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
	leaq	120(%rsp), %rdi
	movq	%rax, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rcx
	movq	-24(%rax), %rax
	movq	%rcx, 112(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	360(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	movq	80(%rsp), %rdi
	leaq	96(%rsp), %rax
	cmpq	%rax, %rdi
	leaq	64(%rsp), %rbx
	leaq	32(%rsp), %r14
	je	.LBB4_77
# %bb.76:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB4_77:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	leaq	624(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	movq	16(%rsp), %rdi
	cmpq	%r14, %rdi
	je	.LBB4_79
# %bb.78:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i96
	callq	_ZdlPv
.LBB4_79:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit98
	movq	48(%rsp), %rdi
	cmpq	%rbx, %rdi
	je	.LBB4_81
# %bb.80:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i99
	callq	_ZdlPv
.LBB4_81:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit101
	xorl	%eax, %eax
	addq	$1144, %rsp                     # imm = 0x478
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_98:
	.cfi_def_cfa_offset 1200
.Ltmp21:
	movq	%rax, %rbx
	jmp	.LBB4_87
.LBB4_27:                               # %.loopexit.split-lp
.Ltmp18:
	jmp	.LBB4_26
.LBB4_24:
.Ltmp10:
	jmp	.LBB4_6
.LBB4_4:
.Ltmp2:
	movq	%rax, %rbx
	jmp	.LBB4_93
.LBB4_5:
.Ltmp7:
.LBB4_6:
	movq	%rax, %rbx
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r14
	jmp	.LBB4_91
.LBB4_84:
.Ltmp78:
	jmp	.LBB4_86
.LBB4_85:
.Ltmp40:
	jmp	.LBB4_86
.LBB4_25:                               # %.loopexit
.Ltmp15:
.LBB4_26:
	movq	%rax, %rbx
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r14
	leaq	96(%rsp), %rax
	jmp	.LBB4_88
.LBB4_82:
.Ltmp71:
	jmp	.LBB4_86
.LBB4_83:
.Ltmp64:
	jmp	.LBB4_86
.LBB4_97:
.Ltmp57:
.LBB4_86:
	movq	%rax, %rbx
	leaq	112(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
.LBB4_87:
	leaq	32(%rsp), %r14
	leaq	96(%rsp), %rax
	leaq	64(%rsp), %r15
.LBB4_88:
	movq	80(%rsp), %rdi
	cmpq	%rax, %rdi
	je	.LBB4_90
# %bb.89:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i102
	callq	_ZdlPv
.LBB4_90:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit104
	leaq	624(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
.LBB4_91:
	movq	16(%rsp), %rdi
	cmpq	%r14, %rdi
	je	.LBB4_93
# %bb.92:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i105
	callq	_ZdlPv
.LBB4_93:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit107
	movq	48(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB4_95
# %bb.94:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i108
	callq	_ZdlPv
.LBB4_95:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit110
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table4:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp6-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp6
	.uleb128 .Ltmp7-.Lfunc_begin0           #     jumps to .Ltmp7
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp8-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp9-.Ltmp8                  #   Call between .Ltmp8 and .Ltmp9
	.uleb128 .Ltmp10-.Lfunc_begin0          #     jumps to .Ltmp10
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp11-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp14-.Ltmp11                #   Call between .Ltmp11 and .Ltmp14
	.uleb128 .Ltmp15-.Lfunc_begin0          #     jumps to .Ltmp15
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp16-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp17-.Ltmp16                #   Call between .Ltmp16 and .Ltmp17
	.uleb128 .Ltmp18-.Lfunc_begin0          #     jumps to .Ltmp18
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp19-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp20-.Ltmp19                #   Call between .Ltmp19 and .Ltmp20
	.uleb128 .Ltmp21-.Lfunc_begin0          #     jumps to .Ltmp21
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp22-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp39-.Ltmp22                #   Call between .Ltmp22 and .Ltmp39
	.uleb128 .Ltmp40-.Lfunc_begin0          #     jumps to .Ltmp40
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp41-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp54-.Ltmp41                #   Call between .Ltmp41 and .Ltmp54
	.uleb128 .Ltmp71-.Lfunc_begin0          #     jumps to .Ltmp71
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp55-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp56-.Ltmp55                #   Call between .Ltmp55 and .Ltmp56
	.uleb128 .Ltmp57-.Lfunc_begin0          #     jumps to .Ltmp57
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp58-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Ltmp63-.Ltmp58                #   Call between .Ltmp58 and .Ltmp63
	.uleb128 .Ltmp64-.Lfunc_begin0          #     jumps to .Ltmp64
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp65-.Lfunc_begin0          # >> Call Site 12 <<
	.uleb128 .Ltmp70-.Ltmp65                #   Call between .Ltmp65 and .Ltmp70
	.uleb128 .Ltmp71-.Lfunc_begin0          #     jumps to .Ltmp71
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp72-.Lfunc_begin0          # >> Call Site 13 <<
	.uleb128 .Ltmp77-.Ltmp72                #   Call between .Ltmp72 and .Ltmp77
	.uleb128 .Ltmp78-.Lfunc_begin0          #     jumps to .Ltmp78
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp77-.Lfunc_begin0          # >> Call Site 14 <<
	.uleb128 .Lfunc_end4-.Ltmp77            #   Call between .Ltmp77 and .Lfunc_end4
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB5_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB5_3
.LBB5_1:                                # %._crit_edge
	movq	(%rbx), %rax
.LBB5_3:
	testq	%r14, %r14
	je	.LBB5_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB5_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB5_7
.LBB5_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB5_7:                                # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end5-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6evolvePiS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	grid,@object                    # @grid
	.bss
	.globl	grid
	.p2align	3, 0x0
grid:
	.quad	0
	.size	grid, 8

	.type	gridGPU,@object                 # @gridGPU
	.globl	gridGPU
	.p2align	3, 0x0
gridGPU:
	.quad	0
	.size	gridGPU, 8

	.type	tempGPU,@object                 # @tempGPU
	.globl	tempGPU
	.p2align	3, 0x0
tempGPU:
	.quad	0
	.size	tempGPU, 8

	.type	width,@object                   # @width
	.globl	width
	.p2align	2, 0x0
width:
	.long	0                               # 0x0
	.size	width, 4

	.type	height,@object                  # @height
	.globl	height
	.p2align	2, 0x0
height:
	.long	0                               # 0x0
	.size	height, 4

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" : "
	.size	.L.str.1, 4

	.type	_Z6evolvePiS_ii,@object         # @_Z6evolvePiS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z6evolvePiS_ii
	.p2align	3, 0x0
_Z6evolvePiS_ii:
	.quad	_Z21__device_stub__evolvePiS_ii
	.size	_Z6evolvePiS_ii, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"NoVis"
	.size	.L.str.2, 6

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"game_of_life_save.txt"
	.size	.L.str.3, 22

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6evolvePiS_ii"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__evolvePiS_ii
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym gridGPU
	.addrsig_sym tempGPU
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _Z6evolvePiS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6evolvePiS_ii         ; -- Begin function _Z6evolvePiS_ii
	.globl	_Z6evolvePiS_ii
	.p2align	8
	.type	_Z6evolvePiS_ii,@function
_Z6evolvePiS_ii:                        ; @_Z6evolvePiS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s12, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s8, s0, 24
	s_addc_u32 s9, s1, 0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s13, s12, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s13, v[3:4]
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB0_16
; %bb.1:                                ; %.preheader65.lr.ph
	s_ashr_i32 s4, s2, 31
	s_ashr_i32 s5, s3, 31
	s_add_i32 s6, s2, s4
	s_add_i32 s7, s3, s5
	s_xor_b32 s10, s6, s4
	s_xor_b32 s11, s7, s5
	v_cvt_f32_u32_e32 v2, s10
	v_cvt_f32_u32_e32 v3, s11
	s_load_b128 s[4:7], s[0:1], 0x0
	s_sub_i32 s0, 0, s10
	s_sub_i32 s1, 0, s11
	v_rcp_iflag_f32_e32 v2, v2
	v_rcp_iflag_f32_e32 v3, v3
	s_load_b64 s[8:9], s[8:9], 0x0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v2, 0x4f7ffffe, v2 :: v_dual_mul_f32 v3, 0x4f7ffffe, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v4, v2
	v_cvt_u32_f32_e32 v5, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v6, s0, v4
	v_mul_lo_u32 v7, s1, v5
	s_lshr_b32 s0, s12, 16
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s8, s13
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	s_mul_i32 s8, s9, s0
	s_mov_b32 s9, 0
	v_mul_hi_u32 v0, v4, v6
	v_mul_hi_u32 v3, v5, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	v_add_nc_u32_e32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_nc_u32_e32 v3, v5, v3
.LBB0_2:                                ; %.preheader65
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_5 Depth 3
                                        ;         Child Loop BB0_6 Depth 4
	s_and_saveexec_b32 s12, vcc_lo
	s_cbranch_execz .LBB0_15
; %bb.3:                                ; %.preheader64.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_ashrrev_i32_e32 v4, 31, v1
	s_mov_b32 s13, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v1, v4
	v_xor_b32_e32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v6, v5, v0
	v_mul_lo_u32 v6, v6, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v5, v6
	v_subrev_nc_u32_e32 v6, s10, v5
	v_cmp_le_u32_e64 s0, s10, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v5, v6, s0
	v_subrev_nc_u32_e32 v6, s10, v5
	v_cmp_le_u32_e64 s0, s10, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, v5, v6, s0
	v_and_b32_e32 v6, s2, v4
	v_xor_b32_e32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v5, v4
	v_dual_mov_b32 v5, v2 :: v_dual_add_nc_u32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v4, v4, s2
.LBB0_4:                                ; %.preheader64
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_5 Depth 3
                                        ;         Child Loop BB0_6 Depth 4
	v_mov_b32_e32 v6, 0
	s_mov_b32 s14, -1
.LBB0_5:                                ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_6 Depth 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v7, s14, v1
	s_mov_b32 s15, -1
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v7, v7, v8
	v_xor_b32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v9, v7, v0
	v_mul_lo_u32 v9, v9, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v7, v7, v9
	v_subrev_nc_u32_e32 v9, s10, v7
	v_cmp_le_u32_e64 s0, s10, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v7, v7, v9, s0
	v_subrev_nc_u32_e32 v9, s10, v7
	v_cmp_le_u32_e64 s0, s10, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v7, v9, s0
	v_and_b32_e32 v9, s2, v8
	v_xor_b32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v7, v7, v8
	v_add_nc_u32_e32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v7, v7, s2
.LBB0_6:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_5 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_or_b32 s0, s15, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 0
	s_cbranch_scc1 .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=4
	v_add_nc_u32_e32 v8, s15, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	v_add_nc_u32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v8, v8, v9
	v_mul_hi_u32 v10, v8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v10, v10, s11
	v_sub_nc_u32_e32 v8, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v10, s11, v8
	v_cmp_le_u32_e64 s0, s11, v8
	v_cndmask_b32_e64 v8, v8, v10, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v10, s11, v8
	v_cmp_le_u32_e64 s0, s11, v8
	v_cndmask_b32_e64 v8, v8, v10, s0
	v_and_b32_e32 v10, s3, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v8, v8, v9
	v_sub_nc_u32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v8, v8, v10, v7
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v8, s0, s4, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s0, s5, v9, s0
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s0, 1, v8
	v_add_co_ci_u32_e64 v6, s0, 0, v6, s0
.LBB0_8:                                ;   in Loop: Header=BB0_6 Depth=4
	s_add_i32 s15, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s15, 2
	s_cbranch_scc0 .LBB0_6
; %bb.9:                                ;   in Loop: Header=BB0_5 Depth=3
	s_add_i32 s14, s14, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s14, 2
	s_cbranch_scc0 .LBB0_5
; %bb.10:                               ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v7, -4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e64 s15, -2, v7
	v_cmp_lt_u32_e64 s0, -3, v7
	v_mov_b32_e32 v7, 0
	s_and_saveexec_b32 s14, s0
; %bb.11:                               ;   in Loop: Header=BB0_4 Depth=2
	v_cmp_eq_u32_e64 s0, 3, v6
	v_mov_b32_e32 v7, 1
	s_and_not1_b32 s15, s15, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s15, s15, s0
; %bb.12:                               ; %Flow
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s14
	s_and_saveexec_b32 s14, s15
	s_cbranch_execz .LBB0_14
; %bb.13:                               ; %.sink.split
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, v5, v6
	v_xor_b32_e32 v8, v8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v9, v8, v3
	v_mul_lo_u32 v9, v9, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v8, v8, v9
	v_subrev_nc_u32_e32 v9, s11, v8
	v_cmp_le_u32_e64 s0, s11, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v8, v8, v9, s0
	v_subrev_nc_u32_e32 v9, s11, v8
	v_cmp_le_u32_e64 s0, s11, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v8, v8, v9, s0
	v_and_b32_e32 v9, s3, v6
	v_xor_b32_e32 v8, v8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v6, v8, v6
	v_add3_u32 v8, v6, v9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s0, s6, v8
	v_add_co_ci_u32_e64 v9, s0, s7, v9, s0
	global_store_b32 v[8:9], v7, off
.LBB0_14:                               ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s14
	v_add_nc_u32_e32 v5, s8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s3, v5
	s_or_b32 s13, s0, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_4
.LBB0_15:                               ; %Flow96
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	v_add_nc_u32_e32 v1, s1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s2, v1
	s_or_b32 s9, s0, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_2
.LBB0_16:                               ; %._crit_edge72
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6evolvePiS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6evolvePiS_ii, .Lfunc_end0-_Z6evolvePiS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1096
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6evolvePiS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6evolvePiS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
