/* Performance testing for assignment operator '+='
Comparison between '+=' and '='
Two kernels should be executed separately or else the kernels will influence each other
Kernel that executed later was faster regardless of operator
Result :	 assignment operator '=' is faster than '+='
			100 ms vs 94 ms for 256*100000  nodes
This result will be beneficial to optimize Peridynamics kernel

*/
#include <cmath>	//for calculating power & NaN
#include<iostream>
#include<cstdio>
#include <vector>
#include <cstdlib>
#include <fstream> // for writing to file
#include <math.h>       //exp, pi
#include <chrono>	//for time measurement
#include <fstream>
#include <ctime>

using namespace std;
using namespace std::chrono;

//Use assignment operator '+='
__global__ void add_01 (float *array_a,
	 float *array_b,
	 float *array_c ){
	
	size_t i= threadIdx.x+ blockDim.x*threadIdx.y+blockDim.x*blockDim.y*blockIdx.x;
	
	array_c[i] += (array_a[i]+array_b[i])*sqrt(array_a[i])*sqrt(array_b[i]);
}

//Use assignment operator '='
__global__ void add_02 (float *array_a,
	 float *array_b,
	 float *array_c ){
	
	size_t i= threadIdx.x+ blockDim.x*threadIdx.y+blockDim.x*blockDim.y*blockIdx.x;
	
	array_c[i] = (array_a[i]+array_b[i])*sqrt(array_a[i])*sqrt(array_b[i]);
	
}


int main(int argc, char **argv){
	cout<<"Start of program assignment operator test"<<endl;
	const size_t node = 256*100000;
	
	//Differentiate a,b to 01 & 02 to avoid kernel reusing the value
	float *array_a_01= (float*) calloc (node, sizeof(float));
	float *array_b_01= (float*) calloc (node, sizeof(float));
	float *array_a_02= (float*) calloc (node, sizeof(float));
	float *array_b_02= (float*) calloc (node, sizeof(float));
	float *array_c_01= (float*) calloc (node, sizeof(float));
	float *array_c_02= (float*) calloc (node, sizeof(float));

	cout<<"No of nodes = "<<node<<endl;
	
	//Initialization
	for (size_t i = 0; i < node; ++i) {
			array_a_01[i]= 2.30*i; // dummy value
			array_b_01[i]= 1.45*i; // dummy value
			
			array_a_02 [i] = array_a_01 [i];
			array_b_02 [i] = array_b_01 [i];
	}
	
	//###########################################################################
	/*
	int blockSize;      // The launch configurator returned block size 
    int minGridSize;    // The minimum grid size needed to achieve the maximum occupancy for a full device launch 
    int gridSize;       // The actual grid size needed, based on input size 
	
	cudaOccupancyMaxPotentialBlockSize(&minGridSize, &blockSize, cal_dilatation, 0, node); 
	gridSize = (node + blockSize - 1) / blockSize; 
	
	printf("\t Blocksize= %i\n", blockSize);
	printf("\t minGridSize= %i \n",minGridSize);
	printf("\t gridSize= %i \n",gridSize);*/
	
	
	// Create memory buffers on the device for each vector 
	
	float* buffer_array_a_01, * buffer_array_b_01;
	float* buffer_array_a_02, * buffer_array_b_02;
	float * buffer_array_c_01, * buffer_array_c_02;
	
	cudaMalloc(&buffer_array_a_01, node*sizeof(float));
	cudaMalloc(&buffer_array_a_02, node*sizeof(float));
	cudaMalloc(&buffer_array_b_01, node*sizeof(float));
	cudaMalloc(&buffer_array_b_02, node*sizeof(float));
	cudaMalloc(&buffer_array_c_01, node*sizeof(float));
	cudaMalloc(&buffer_array_c_02, node*sizeof(float));
	
	cudaMemcpy(buffer_array_a_01, array_a_01, node*sizeof(float), cudaMemcpyHostToDevice);
	cudaMemcpy(buffer_array_a_02, array_a_02, node*sizeof(float), cudaMemcpyHostToDevice);
	cudaMemcpy(buffer_array_b_01, array_b_01, node*sizeof(float), cudaMemcpyHostToDevice);
	cudaMemcpy(buffer_array_b_02, array_b_02, node*sizeof(float), cudaMemcpyHostToDevice);
	
	dim3 gridDim(node/256,1,1);         // 512 x 1 x 1
	dim3 blockDim(256, 1, 1); // 1024 x 1024 x 1
	
	
	printf("Using manual gridDim %i, ", gridDim.x);
	printf("blockDim %i, ", blockDim.x);
	printf("= %i;", (gridDim.x*blockDim.x));
	printf("\t Gap = %zi \n", (gridDim.x*blockDim.x)-node);
	
	
	/*printf("Using optimized blockSize %i, ", blockSize);
	printf("gridSize %i, ", gridSize);
	printf("= %i;", (gridSize*blockSize));
	printf("\t Gap = %zi \n", (gridSize*blockSize)-node);*/
	
	//Comment out one of the 2 kernels below---------------------------	
	
/*
	system_clock::time_point start_01 = system_clock::now();
	add_01<<< gridDim , blockDim>>>(buffer_array_a_01, buffer_array_b_01, buffer_array_c_01);
	cudaMemcpy(array_c_01, buffer_array_c_01, node *sizeof(float), cudaMemcpyDeviceToHost);
	cudaDeviceSynchronize();
	system_clock::time_point stop_01 = system_clock::now();
	
	std::chrono::duration<float, std::milli> duration_01 = stop_01 - start_01;
	cout << "Assignment operator '+=' time  = "<<duration_01.count()<<" millisecond"<<endl;
	*/
	//------------------------------------------------------------
	

	system_clock::time_point start_02 = system_clock::now();
	add_02<<< gridDim , blockDim>>>(buffer_array_a_02, buffer_array_b_02, buffer_array_c_02);
	cudaMemcpy(array_c_02, buffer_array_c_02, node *sizeof(float), cudaMemcpyDeviceToHost);
	cudaDeviceSynchronize();
	system_clock::time_point stop_02 = system_clock::now();
	
	std::chrono::duration<float, std::milli> duration_02 = stop_02 - start_02;
	cout << "Assignment operator '=' time  = "<<duration_02.count()<<" millisecond"<<endl;
	
	
	
   //##########################################################
	
	//Checking
	
	
	printf("\t array_c_01 - array_c_02 : \n");
	for (size_t i = 0; i < 5; ++i) {
		printf("\t\t %f", array_c_01[i]);	
		printf(" - %f \n",  array_c_02[i]);	
	}
	
	
	cudaFree(buffer_array_a_01); cudaFree(buffer_array_a_02);
	cudaFree(buffer_array_b_01); cudaFree(buffer_array_b_02); 
	cudaFree(buffer_array_c_01); 
	cudaFree(buffer_array_c_02); 
	
	free(array_a_01);	free(array_a_02);
	free (array_b_01);	free(array_b_02);	
	free (array_c_01);  free (array_c_02);
	
	printf("End of program!\n\n");
	
	
}
	.file	"tmpxft_00301f72_00000000-6_assignment_operator_test.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4235:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4235:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z29__device_stub__Z6add_01PfS_S_PfS_S_
	.type	_Z29__device_stub__Z6add_01PfS_S_PfS_S_, @function
_Z29__device_stub__Z6add_01PfS_S_PfS_S_:
.LFB4257:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6add_01PfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4257:
	.size	_Z29__device_stub__Z6add_01PfS_S_PfS_S_, .-_Z29__device_stub__Z6add_01PfS_S_PfS_S_
	.globl	_Z6add_01PfS_S_
	.type	_Z6add_01PfS_S_, @function
_Z6add_01PfS_S_:
.LFB4258:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z6add_01PfS_S_PfS_S_
	.cfi_endproc
.LFE4258:
	.size	_Z6add_01PfS_S_, .-_Z6add_01PfS_S_
	.globl	_Z29__device_stub__Z6add_02PfS_S_PfS_S_
	.type	_Z29__device_stub__Z6add_02PfS_S_PfS_S_, @function
_Z29__device_stub__Z6add_02PfS_S_PfS_S_:
.LFB4259:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6add_02PfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L8:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4259:
	.size	_Z29__device_stub__Z6add_02PfS_S_PfS_S_, .-_Z29__device_stub__Z6add_02PfS_S_PfS_S_
	.globl	_Z6add_02PfS_S_
	.type	_Z6add_02PfS_S_, @function
_Z6add_02PfS_S_:
.LFB4260:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z6add_02PfS_S_PfS_S_
	.cfi_endproc
.LFE4260:
	.size	_Z6add_02PfS_S_, .-_Z6add_02PfS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Start of program assignment operator test"
.LC1:
	.string	"No of nodes = "
.LC4:
	.string	"Using manual gridDim %i, "
.LC5:
	.string	"blockDim %i, "
.LC6:
	.string	"= %i;"
.LC7:
	.string	"\t Gap = %zi \n"
.LC9:
	.string	"Assignment operator '=' time  = "
.LC10:
	.string	" millisecond"
.LC11:
	.string	"\t array_c_01 - array_c_02 : \n"
.LC12:
	.string	"\t\t %f"
.LC13:
	.string	" - %f \n"
.LC14:
	.string	"End of program!\n\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB4228:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$4, %esi
	movl	$25600000, %edi
	call	calloc@PLT
	movl	$4, %esi
	movl	$25600000, %edi
	movq	%rax, %r13
	call	calloc@PLT
	movl	$4, %esi
	movl	$25600000, %edi
	movq	%rax, %rbp
	call	calloc@PLT
	movl	$4, %esi
	movl	$25600000, %edi
	movq	%rax, %r12
	call	calloc@PLT
	movl	$4, %esi
	movl	$25600000, %edi
	movq	%rax, %rbx
	call	calloc@PLT
	movl	$4, %esi
	movl	$25600000, %edi
	movq	%rax, %r14
	call	calloc@PLT
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movq	%rax, (%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$25600000, %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movsd	.LC2(%rip), %xmm3
	movsd	.LC3(%rip), %xmm2
	xorl	%eax, %eax
.L14:
	cvtsi2sdq	%rax, %xmm0
	movaps	%xmm0, %xmm1
	mulsd	%xmm3, %xmm1
	mulsd	%xmm2, %xmm0
	cvtsd2ss	%xmm1, %xmm1
	movss	%xmm1, 0(%r13,%rax,4)
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm1, (%r12,%rax,4)
	movss	%xmm0, 0(%rbp,%rax,4)
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	cmpq	$25600000, %rax
	jne	.L14
	leaq	16(%rsp), %rdi
	movl	$102400000, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$102400000, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$102400000, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$102400000, %esi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$102400000, %esi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$102400000, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$102400000, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$102400000, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$102400000, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$102400000, %edx
	call	cudaMemcpy@PLT
	movl	$100000, %edx
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$256, %edx
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$25600000, %edx
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	xorl	%edx, %edx
	leaq	.LC7(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$134220853, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movq	%rax, %r15
	salq	$5, %rdi
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	56(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z29__device_stub__Z6add_02PfS_S_PfS_S_
.L15:
	movq	56(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$2, %ecx
	movl	$102400000, %edx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	.LC9(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	subq	%r15, %rax
	xorl	%r15d, %r15d
	cvtsi2ssq	%rax, %xmm0
	divss	.LC8(%rip), %xmm0
	movss	%xmm0, 12(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	12(%rsp), %xmm0
	movq	%rax, %rdi
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC10(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L16:
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%r14,%r15,4), %xmm0
	call	__printf_chk@PLT
	movq	(%rsp), %rax
	movl	$2, %edi
	leaq	.LC13(%rip), %rsi
	cvtss2sd	(%rax,%r15,4), %xmm0
	movb	$1, %al
	incq	%r15
	call	__printf_chk@PLT
	cmpq	$5, %r15
	jne	.L16
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	(%rsp), %rdi
	call	free@PLT
	xorl	%eax, %eax
	movl	$2, %edi
	leaq	.LC14(%rip), %rsi
	call	__printf_chk@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4228:
	.size	main, .-main
	.section	.rodata.str1.1
.LC15:
	.string	"_Z6add_02PfS_S_"
.LC16:
	.string	"_Z6add_01PfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4262:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z6add_02PfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6add_01PfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4262:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	1717986918
	.long	1073899110
	.align 8
.LC3:
	.long	858993459
	.long	1073165107
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC8:
	.long	1232348160
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/* Performance testing for assignment operator '+='
Comparison between '+=' and '='
Two kernels should be executed separately or else the kernels will influence each other
Kernel that executed later was faster regardless of operator
Result :	 assignment operator '=' is faster than '+='
			100 ms vs 94 ms for 256*100000  nodes
This result will be beneficial to optimize Peridynamics kernel

*/

#include <hip/hip_runtime.h>
#include <cmath>	//for calculating power & NaN
#include<iostream>
#include<cstdio>
#include <vector>
#include <cstdlib>
#include <fstream> // for writing to file
#include <math.h>       //exp, pi
#include <chrono>	//for time measurement
#include <fstream>
#include <ctime>

using namespace std;
using namespace std::chrono;

//Use assignment operator '+='
__global__ void add_01 (float *array_a,
	 float *array_b,
	 float *array_c ){
	
	size_t i= threadIdx.x+ blockDim.x*threadIdx.y+blockDim.x*blockDim.y*blockIdx.x;
	
	array_c[i] += (array_a[i]+array_b[i])*sqrt(array_a[i])*sqrt(array_b[i]);
}

//Use assignment operator '='
__global__ void add_02 (float *array_a,
	 float *array_b,
	 float *array_c ){
	
	size_t i= threadIdx.x+ blockDim.x*threadIdx.y+blockDim.x*blockDim.y*blockIdx.x;
	
	array_c[i] = (array_a[i]+array_b[i])*sqrt(array_a[i])*sqrt(array_b[i]);
	
}


int main(int argc, char **argv){
	cout<<"Start of program assignment operator test"<<endl;
	const size_t node = 256*100000;
	
	//Differentiate a,b to 01 & 02 to avoid kernel reusing the value
	float *array_a_01= (float*) calloc (node, sizeof(float));
	float *array_b_01= (float*) calloc (node, sizeof(float));
	float *array_a_02= (float*) calloc (node, sizeof(float));
	float *array_b_02= (float*) calloc (node, sizeof(float));
	float *array_c_01= (float*) calloc (node, sizeof(float));
	float *array_c_02= (float*) calloc (node, sizeof(float));

	cout<<"No of nodes = "<<node<<endl;
	
	//Initialization
	for (size_t i = 0; i < node; ++i) {
			array_a_01[i]= 2.30*i; // dummy value
			array_b_01[i]= 1.45*i; // dummy value
			
			array_a_02 [i] = array_a_01 [i];
			array_b_02 [i] = array_b_01 [i];
	}
	
	//###########################################################################
	/*
	int blockSize;      // The launch configurator returned block size 
    int minGridSize;    // The minimum grid size needed to achieve the maximum occupancy for a full device launch 
    int gridSize;       // The actual grid size needed, based on input size 
	
	cudaOccupancyMaxPotentialBlockSize(&minGridSize, &blockSize, cal_dilatation, 0, node); 
	gridSize = (node + blockSize - 1) / blockSize; 
	
	printf("\t Blocksize= %i\n", blockSize);
	printf("\t minGridSize= %i \n",minGridSize);
	printf("\t gridSize= %i \n",gridSize);*/
	
	
	// Create memory buffers on the device for each vector 
	
	float* buffer_array_a_01, * buffer_array_b_01;
	float* buffer_array_a_02, * buffer_array_b_02;
	float * buffer_array_c_01, * buffer_array_c_02;
	
	hipMalloc(&buffer_array_a_01, node*sizeof(float));
	hipMalloc(&buffer_array_a_02, node*sizeof(float));
	hipMalloc(&buffer_array_b_01, node*sizeof(float));
	hipMalloc(&buffer_array_b_02, node*sizeof(float));
	hipMalloc(&buffer_array_c_01, node*sizeof(float));
	hipMalloc(&buffer_array_c_02, node*sizeof(float));
	
	hipMemcpy(buffer_array_a_01, array_a_01, node*sizeof(float), hipMemcpyHostToDevice);
	hipMemcpy(buffer_array_a_02, array_a_02, node*sizeof(float), hipMemcpyHostToDevice);
	hipMemcpy(buffer_array_b_01, array_b_01, node*sizeof(float), hipMemcpyHostToDevice);
	hipMemcpy(buffer_array_b_02, array_b_02, node*sizeof(float), hipMemcpyHostToDevice);
	
	dim3 gridDim(node/256,1,1);         // 512 x 1 x 1
	dim3 blockDim(256, 1, 1); // 1024 x 1024 x 1
	
	
	printf("Using manual gridDim %i, ", gridDim.x);
	printf("blockDim %i, ", blockDim.x);
	printf("= %i;", (gridDim.x*blockDim.x));
	printf("\t Gap = %zi \n", (gridDim.x*blockDim.x)-node);
	
	
	/*printf("Using optimized blockSize %i, ", blockSize);
	printf("gridSize %i, ", gridSize);
	printf("= %i;", (gridSize*blockSize));
	printf("\t Gap = %zi \n", (gridSize*blockSize)-node);*/
	
	//Comment out one of the 2 kernels below---------------------------	
	
/*
	system_clock::time_point start_01 = system_clock::now();
	add_01<<< gridDim , blockDim>>>(buffer_array_a_01, buffer_array_b_01, buffer_array_c_01);
	cudaMemcpy(array_c_01, buffer_array_c_01, node *sizeof(float), cudaMemcpyDeviceToHost);
	cudaDeviceSynchronize();
	system_clock::time_point stop_01 = system_clock::now();
	
	std::chrono::duration<float, std::milli> duration_01 = stop_01 - start_01;
	cout << "Assignment operator '+=' time  = "<<duration_01.count()<<" millisecond"<<endl;
	*/
	//------------------------------------------------------------
	

	system_clock::time_point start_02 = system_clock::now();
	add_02<<< gridDim , blockDim>>>(buffer_array_a_02, buffer_array_b_02, buffer_array_c_02);
	hipMemcpy(array_c_02, buffer_array_c_02, node *sizeof(float), hipMemcpyDeviceToHost);
	hipDeviceSynchronize();
	system_clock::time_point stop_02 = system_clock::now();
	
	std::chrono::duration<float, std::milli> duration_02 = stop_02 - start_02;
	cout << "Assignment operator '=' time  = "<<duration_02.count()<<" millisecond"<<endl;
	
	
	
   //##########################################################
	
	//Checking
	
	
	printf("\t array_c_01 - array_c_02 : \n");
	for (size_t i = 0; i < 5; ++i) {
		printf("\t\t %f", array_c_01[i]);	
		printf(" - %f \n",  array_c_02[i]);	
	}
	
	
	hipFree(buffer_array_a_01); hipFree(buffer_array_a_02);
	hipFree(buffer_array_b_01); hipFree(buffer_array_b_02); 
	hipFree(buffer_array_c_01); 
	hipFree(buffer_array_c_02); 
	
	free(array_a_01);	free(array_a_02);
	free (array_b_01);	free(array_b_02);	
	free (array_c_01);  free (array_c_02);
	
	printf("End of program!\n\n");
	
	
}
	.text
	.file	"assignment_operator_test.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__add_01PfS_S_ # -- Begin function _Z21__device_stub__add_01PfS_S_
	.type	_Z21__device_stub__add_01PfS_S_,@function
_Z21__device_stub__add_01PfS_S_:        # @_Z21__device_stub__add_01PfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6add_01PfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__add_01PfS_S_, .Lfunc_end0-_Z21__device_stub__add_01PfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__add_02PfS_S_ # -- Begin function _Z21__device_stub__add_02PfS_S_
	.type	_Z21__device_stub__add_02PfS_S_,@function
_Z21__device_stub__add_02PfS_S_:        # @_Z21__device_stub__add_02PfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6add_02PfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z21__device_stub__add_02PfS_S_, .Lfunc_end1-_Z21__device_stub__add_02PfS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI2_1:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_2:
	.quad	0x4002666666666666              # double 2.2999999999999998
.LCPI2_3:
	.quad	0x3ff7333333333333              # double 1.45
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI2_4:
	.long	0x49742400                      # float 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$41, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$25600000, %edi                 # imm = 0x186A000
	movl	$4, %esi
	callq	calloc
	movq	%rax, %r14
	movl	$25600000, %edi                 # imm = 0x186A000
	movl	$4, %esi
	callq	calloc
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movl	$25600000, %edi                 # imm = 0x186A000
	movl	$4, %esi
	callq	calloc
	movq	%rax, %r12
	movl	$25600000, %edi                 # imm = 0x186A000
	movl	$4, %esi
	callq	calloc
	movq	%rax, %r15
	movl	$25600000, %edi                 # imm = 0x186A000
	movl	$4, %esi
	callq	calloc
	movq	%rax, %r13
	movl	$25600000, %edi                 # imm = 0x186A000
	movl	$4, %esi
	callq	calloc
	movq	%rax, %rbp
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$25600000, %esi                 # imm = 0x186A000
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	movq	40(%rsp), %rbx                  # 8-byte Reload
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	movdqa	.LCPI2_0(%rip), %xmm0           # xmm0 = [1127219200,1160773632,0,0]
	movapd	.LCPI2_1(%rip), %xmm1           # xmm1 = [4.503599627370496E+15,1.9342813113834067E+25]
	movsd	.LCPI2_2(%rip), %xmm2           # xmm2 = mem[0],zero
	movsd	.LCPI2_3(%rip), %xmm3           # xmm3 = mem[0],zero
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movq	%rax, %xmm4
	punpckldq	%xmm0, %xmm4            # xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1]
	subpd	%xmm1, %xmm4
	movapd	%xmm4, %xmm5
	unpckhpd	%xmm4, %xmm5                    # xmm5 = xmm5[1],xmm4[1]
	addsd	%xmm4, %xmm5
	movapd	%xmm5, %xmm4
	mulsd	%xmm2, %xmm4
	cvtsd2ss	%xmm4, %xmm4
	movss	%xmm4, (%r14,%rax,4)
	mulsd	%xmm3, %xmm5
	cvtsd2ss	%xmm5, %xmm5
	movss	%xmm5, (%rbx,%rax,4)
	movss	%xmm4, (%r12,%rax,4)
	movss	%xmm5, (%r15,%rax,4)
	incq	%rax
	cmpq	$25600000, %rax                 # imm = 0x186A000
	jne	.LBB2_1
# %bb.2:
	leaq	56(%rsp), %rdi
	movl	$102400000, %esi                # imm = 0x61A8000
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$102400000, %esi                # imm = 0x61A8000
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movl	$102400000, %esi                # imm = 0x61A8000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$102400000, %esi                # imm = 0x61A8000
	callq	hipMalloc
	leaq	64(%rsp), %rdi
	movl	$102400000, %esi                # imm = 0x61A8000
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$102400000, %esi                # imm = 0x61A8000
	callq	hipMalloc
	leaq	56(%rsp), %rax
	movq	(%rax), %rdi
	movl	$102400000, %edx                # imm = 0x61A8000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %rax
	movq	(%rax), %rdi
	movl	$102400000, %edx                # imm = 0x61A8000
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %rax
	movq	(%rax), %rdi
	movl	$102400000, %edx                # imm = 0x61A8000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movl	$102400000, %edx                # imm = 0x61A8000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.2, %edi
	movl	$100000, %esi                   # imm = 0x186A0
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.3, %edi
	movl	$256, %esi                      # imm = 0x100
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.4, %edi
	movl	$25600000, %esi                 # imm = 0x186A000
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.5, %edi
	xorl	%esi, %esi
	xorl	%eax, %eax
	callq	printf
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %rbx
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	leaq	99744(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z21__device_stub__add_02PfS_S_
.LBB2_4:
	movq	8(%rsp), %rsi
	movl	$102400000, %edx                # imm = 0x61A8000
	movq	%rbp, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	%rbx, %rax
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI2_4(%rip), %xmm0
	movss	%xmm0, 36(%rsp)                 # 4-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	36(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.7, %esi
	movl	$12, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
.LBB2_5:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13,%rbx,4), %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbp,%rbx,4), %xmm0
	movl	$.L.str.10, %edi
	movb	$1, %al
	callq	printf
	incq	%rbx
	cmpq	$5, %rbx
	jne	.LBB2_5
# %bb.6:
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%r14, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	40(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	%rbp, %rdi
	callq	free
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6add_01PfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6add_02PfS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6add_01PfS_S_,@object         # @_Z6add_01PfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z6add_01PfS_S_
	.p2align	3, 0x0
_Z6add_01PfS_S_:
	.quad	_Z21__device_stub__add_01PfS_S_
	.size	_Z6add_01PfS_S_, 8

	.type	_Z6add_02PfS_S_,@object         # @_Z6add_02PfS_S_
	.globl	_Z6add_02PfS_S_
	.p2align	3, 0x0
_Z6add_02PfS_S_:
	.quad	_Z21__device_stub__add_02PfS_S_
	.size	_Z6add_02PfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Start of program assignment operator test"
	.size	.L.str, 42

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"No of nodes = "
	.size	.L.str.1, 15

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Using manual gridDim %i, "
	.size	.L.str.2, 26

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"blockDim %i, "
	.size	.L.str.3, 14

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"= %i;"
	.size	.L.str.4, 6

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"\t Gap = %zi \n"
	.size	.L.str.5, 14

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Assignment operator '=' time  = "
	.size	.L.str.6, 33

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	" millisecond"
	.size	.L.str.7, 13

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"\t\t %f"
	.size	.L.str.9, 6

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	" - %f \n"
	.size	.L.str.10, 8

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6add_01PfS_S_"
	.size	.L__unnamed_1, 16

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z6add_02PfS_S_"
	.size	.L__unnamed_2, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\t array_c_01 - array_c_02 : "
	.size	.Lstr, 29

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"End of program!\n"
	.size	.Lstr.1, 17

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__add_01PfS_S_
	.addrsig_sym _Z21__device_stub__add_02PfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6add_01PfS_S_
	.addrsig_sym _Z6add_02PfS_S_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6add_01PfS_S_         ; -- Begin function _Z6add_01PfS_S_
	.globl	_Z6add_01PfS_S_
	.p2align	8
	.type	_Z6add_01PfS_S_,@function
_Z6add_01PfS_S_:                        ; @_Z6add_01PfS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v2, s2, v[0:1]
	v_mov_b32_e32 v4, 0
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v4, v[2:3], off
	v_add_co_u32 v2, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v5, 0x4f800000, v4
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v4
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v6, 0x4f800000, v2 :: v_dual_cndmask_b32 v5, v4, v5
	v_cmp_gt_f32_e64 s0, 0xf800000, v2
	v_sqrt_f32_e32 v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v2, v6, s0
	v_add_f32_e32 v2, v4, v2
	v_sqrt_f32_e32 v8, v6
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v9, -1, v7
	v_add_nc_u32_e32 v10, 1, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v11, -v9, v7, v5
	v_fma_f32 v14, -v10, v7, v5
	v_add_nc_u32_e32 v13, 1, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_f32_e64 s1, 0, v11
	v_fma_f32 v11, -v13, v8, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v7, v7, v9, s1
	v_cmp_lt_f32_e64 s1, 0, v14
	v_cndmask_b32_e64 v7, v7, v10, s1
	v_add_nc_u32_e32 v12, -1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v12, v8, v6
	v_cmp_ge_f32_e64 s1, 0, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v9, 0x37800000, v7
	v_cndmask_b32_e64 v8, v8, v12, s1
	v_cmp_lt_f32_e64 s1, 0, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v7, v9, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v5, 0x260
	v_cndmask_b32_e64 v8, v8, v13, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, v7, v5, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v6, 0x260
	v_dual_mul_f32 v9, 0x37800000, v8 :: v_dual_mul_f32 v2, v4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v8, v9, s0
	v_cndmask_b32_e32 v4, v5, v6, vcc_lo
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v3, v4, v2
	global_store_b32 v[0:1], v3, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6add_01PfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6add_01PfS_S_, .Lfunc_end0-_Z6add_01PfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 476
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z6add_02PfS_S_         ; -- Begin function _Z6add_02PfS_S_
	.globl	_Z6add_02PfS_S_
	.p2align	8
	.type	_Z6add_02PfS_S_,@function
_Z6add_02PfS_S_:                        ; @_Z6add_02PfS_S_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_bfe_u32 v1, v0, 10, 10
	s_load_b128 s[4:7], s[0:1], 0x0
	v_and_b32_e32 v0, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v2, s2, v[0:1]
	v_mov_b32_e32 v4, 0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(1)
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v5, 0x4f800000, v3
	v_cmp_gt_f32_e64 s0, 0xf800000, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v3, v5, s0
	v_sqrt_f32_e32 v7, v5
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v4, 0x4f800000, v2 :: v_dual_add_nc_u32 v9, -1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v4, v2, v4, vcc_lo
	v_add_nc_u32_e32 v12, 1, v7
	v_add_f32_e32 v2, v2, v3
	v_fma_f32 v13, -v9, v7, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v6, v4
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v8, -1, v6
	v_add_nc_u32_e32 v10, 1, v6
	v_fma_f32 v11, -v8, v6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v14, -v10, v6, v4
	v_cmp_ge_f32_e64 s1, 0, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v6, v8, s1
	v_cmp_ge_f32_e64 s1, 0, v13
	v_fma_f32 v8, -v12, v7, v5
	v_cndmask_b32_e64 v7, v7, v9, s1
	v_cmp_lt_f32_e64 s1, 0, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v6, v6, v10, s1
	v_cmp_lt_f32_e64 s1, 0, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v8, 0x37800000, v6
	v_cndmask_b32_e64 v7, v7, v12, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v6, v6, v8 :: v_dual_mul_f32 v9, 0x37800000, v7
	v_cmp_class_f32_e64 vcc_lo, v4, 0x260
	v_cndmask_b32_e64 v3, v7, v9, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, v6, v4, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v5, 0x260
	v_dual_mul_f32 v2, v4, v2 :: v_dual_cndmask_b32 v3, v3, v5
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_f32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6add_02PfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z6add_02PfS_S_, .Lfunc_end1-_Z6add_02PfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 464
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6add_01PfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6add_01PfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6add_02PfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6add_02PfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
