#include <iostream>
#include <math.h>
#include <stdlib.h>
#include <assert.h>

// Kernel function to add the elements of two arrays
__global__
void add(int n, float *x, float *y)
{
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;
  for (int i = index; i < n; i += stride)
    y[i] = x[i] + y[i];
}

typedef struct {
  int width;
  int height;
  float * elements;
} Matrix;


Matrix initMatrix(int height, int width) {
  Matrix A;
  A.width = width;
  A.height = height;
  A.elements = (float*)malloc(width * height * sizeof(float));
  return A;
}

void setRandom(Matrix A) {
  for (int i = 0; i < A.height; i++)
    for (int j = 0; j < A.width; j++)
      A.elements[i*A.width + j] = (float)(rand() % 3);
}

void printMatrix(Matrix A){
  for (int i = 0; i < A.height; i++)
    for(int j = 0; j < A.width; j++) {
	  if ( j == 0 ) printf("\n");
	  printf(" %f ", A.elements[i*A.width + j]);
	}
  printf("\n");
}

float cell(Matrix A, int row, int column) {
	return A.elements[row * A.width + column];
}

Matrix allocateMatrixToDevice(Matrix A) {
	Matrix d_A;
	d_A.width = A.width;
	d_A.height = A.height;
	size_t size = A.width * A.height * sizeof(float);
	cudaError_t err = cudaMalloc(&d_A.elements, size);
	printf("CUDA malloc Matrix : %s\n", cudaGetErrorString(err));
	err = cudaMemcpy(d_A.elements, A.elements, size, cudaMemcpyHostToDevice);
	printf("Copy Matrix to device: %s\n",cudaGetErrorString(err));
	return d_A;
}

__global__ void MatMulKernel(Matrix A, Matrix B, Matrix C) {
  
  float Cvalue = 0.0;
  
  /* calculate value for C(row, column) */
  int row = blockIdx.y * blockDim.y + threadIdx.y;
  int col = blockIdx.x * blockDim.x + threadIdx.x;
  
  /* not all threads in grid need return a value, as C may not fit exactly the grid */
  if (row > A.height || col > B.width) return;
  
  /* we are using Row Major representation for the matrix */
  for (int e = 0; e < A.width; ++e) {
	int a = row * A.width + e; /* row major, so just add e to index*/
	int b = e * B.width + col; /* row major, so multiply index by e */
    Cvalue += (A.elements[a] * B.elements[b]);
  }
  C.elements[row * C.width + col] = Cvalue;
}

void matmul(Matrix A, Matrix B, Matrix C) {

    /* copy the matrices to the GPU */
	Matrix d_A = allocateMatrixToDevice(A);
	Matrix d_B = allocateMatrixToDevice(B);
	Matrix d_C = allocateMatrixToDevice(C);
	
	/* specify 2 dimensional blocks of 16 x 16 = 256 threads per block */
	dim3 dimBlock(16,16);
	
	/* calculate how many blocks we need to perform the calculation */
	/* the grid is based on the size of the product matrix */
	/* ie: A(2,3) * B(3,4) = C(2,4) */
	/* A(height,width) * B(height,width) = C(A height, B width) */
	dim3 dimGrid(
	            ( (B.width + dimBlock.x - 1 ) / dimBlock.x),
				( (A.height + dimBlock.y -1 ) / dimBlock.y)
				);
	
	/* launch a grid and run the kernel function*/
	MatMulKernel<<<dimGrid, dimBlock>>>(d_A,d_B,d_C);
	
	/* wait for all threads to finish */
	cudaError_t err = cudaThreadSynchronize();
	
	err = cudaMemcpy(C.elements, d_C.elements, C.height * C.width * sizeof(float), cudaMemcpyDeviceToHost);
	cudaFree(d_A.elements);
	cudaFree(d_B.elements);
}



int main(void)
{
  Matrix A = initMatrix(4,4);
  Matrix B = initMatrix(4,4);
  Matrix C = initMatrix(4,4);
  
  setRandom(A);
  setRandom(B);
  
  printMatrix(A);
  printMatrix(B);
  
  matmul(A,B,C);
  printMatrix(C);

  float c_0_0 = cell(A,0,0) * cell(B,0,0) + cell(A,0,1) * cell(B,1,0) + cell(A,0,2) * cell(B,2,0) + cell(A,0,3) * cell(B,3,0);
  printf("%f\n", c_0_0);
  assert(c_0_0 == cell(C,0,0));
  
}

	.file	"tmpxft_002f0b26_00000000-6_matmul.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3644:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3644:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10initMatrixii
	.type	_Z10initMatrixii, @function
_Z10initMatrixii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%edi, %ebp
	movl	%esi, %edi
	imull	%ebp, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%esi, %ebx
	salq	$32, %rbp
	pushq	%rax
	.cfi_def_cfa_offset 32
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	movq	%rax, %rdx
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	orq	%rbp, %rax
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z10initMatrixii, .-_Z10initMatrixii
	.globl	_Z9setRandom6Matrix
	.type	_Z9setRandom6Matrix, @function
_Z9setRandom6Matrix:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%edi, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	sarq	$32, %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	%rdi, (%rsp)
.L5:
	movl	(%rsp), %eax
	cmpl	%eax, %r14d
	jge	.L4
	movslq	%r13d, %rbx
	xorl	%r12d, %r12d
	salq	$2, %rbx
.L8:
	cmpl	%ebp, %r12d
	jge	.L11
	movq	%rsi, 8(%rsp)
	incl	%r12d
	addq	$4, %rbx
	call	rand@PLT
	movl	$3, %ecx
	movq	8(%rsp), %rsi
	cltd
	idivl	%ecx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, -4(%rbx,%rsi)
	jmp	.L8
.L11:
	incl	%r14d
	addl	%r15d, %r13d
	jmp	.L5
.L4:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z9setRandom6Matrix, .-_Z9setRandom6Matrix
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\n"
.LC1:
	.string	" %f "
	.text
	.globl	_Z11printMatrix6Matrix
	.type	_Z11printMatrix6Matrix, @function
_Z11printMatrix6Matrix:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%edi, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	%edi, 4(%rsp)
	sarq	$32, %rdi
	movq	%rdi, 8(%rsp)
.L13:
	movl	8(%rsp), %eax
	cmpl	%eax, %r13d
	jge	.L16
	movslq	%r12d, %rbx
	xorl	%ebp, %ebp
	salq	$2, %rbx
.L17:
	movl	4(%rsp), %eax
	cmpl	%eax, %ebp
	jge	.L19
	testl	%ebp, %ebp
	jne	.L14
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L14:
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	incl	%ebp
	cvtss2sd	(%rbx,%r14), %xmm0
	call	__printf_chk@PLT
	addq	$4, %rbx
	jmp	.L17
.L19:
	incl	%r13d
	addl	%r15d, %r12d
	jmp	.L13
.L16:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE3637:
	.size	_Z11printMatrix6Matrix, .-_Z11printMatrix6Matrix
	.globl	_Z4cell6Matrixii
	.type	_Z4cell6Matrixii, @function
_Z4cell6Matrixii:
.LFB3638:
	.cfi_startproc
	endbr64
	imull	%edi, %edx
	addl	%ecx, %edx
	movslq	%edx, %rdx
	movss	(%rsi,%rdx,4), %xmm0
	ret
	.cfi_endproc
.LFE3638:
	.size	_Z4cell6Matrixii, .-_Z4cell6Matrixii
	.section	.rodata.str1.1
.LC2:
	.string	"CUDA malloc Matrix : %s\n"
.LC3:
	.string	"Copy Matrix to device: %s\n"
	.text
	.globl	_Z22allocateMatrixToDevice6Matrix
	.type	_Z22allocateMatrixToDevice6Matrix, @function
_Z22allocateMatrixToDevice6Matrix:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$40, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	movq	%rdi, %rax
	movl	%edi, 8(%rsp)
	sarq	$32, %rax
	imull	%eax, %edi
	movl	%eax, 12(%rsp)
	movslq	%edi, %rbx
	leaq	16(%rsp), %rdi
	salq	$2, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rax
	movq	16(%rsp), %rdx
	movq	24(%rsp), %rcx
	subq	%fs:40, %rcx
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$40, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3639:
	.size	_Z22allocateMatrixToDevice6Matrix, .-_Z22allocateMatrixToDevice6Matrix
	.globl	_Z25__device_stub__Z3addiPfS_iPfS_
	.type	_Z25__device_stub__Z3addiPfS_iPfS_, @function
_Z25__device_stub__Z3addiPfS_iPfS_:
.LFB3666:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z3addiPfS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L24:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3666:
	.size	_Z25__device_stub__Z3addiPfS_iPfS_, .-_Z25__device_stub__Z3addiPfS_iPfS_
	.globl	_Z3addiPfS_
	.type	_Z3addiPfS_, @function
_Z3addiPfS_:
.LFB3667:
	.cfi_startproc
	endbr64
	jmp	_Z25__device_stub__Z3addiPfS_iPfS_
	.cfi_endproc
.LFE3667:
	.size	_Z3addiPfS_, .-_Z3addiPfS_
	.globl	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_
	.type	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_, @function
_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_:
.LFB3668:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rdi, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 72(%rsp)
	leaq	16(%rsp), %rdi
	leaq	28(%rsp), %rsi
	movq	%rdx, 80(%rsp)
	movq	%rsp, %rdx
	movq	%rax, 16(%rsp)
	movl	$1, 24(%rsp)
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	8(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z12MatMulKernel6MatrixS_S_(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 128
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L29:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3668:
	.size	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_, .-_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_
	.globl	_Z12MatMulKernel6MatrixS_S_
	.type	_Z12MatMulKernel6MatrixS_S_, @function
_Z12MatMulKernel6MatrixS_S_:
.LFB3669:
	.cfi_startproc
	endbr64
	subq	$56, %rsp
	.cfi_def_cfa_offset 64
	movq	%rdi, 32(%rsp)
	leaq	32(%rsp), %rdi
	movq	%rsi, 40(%rsp)
	leaq	16(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	movq	%rsp, %rdx
	movq	%rcx, 24(%rsp)
	movq	%r8, (%rsp)
	movq	%r9, 8(%rsp)
	call	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_
	addq	$56, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3669:
	.size	_Z12MatMulKernel6MatrixS_S_, .-_Z12MatMulKernel6MatrixS_S_
	.globl	_Z6matmul6MatrixS_S_
	.type	_Z6matmul6MatrixS_S_, @function
_Z6matmul6MatrixS_S_:
.LFB3640:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r8, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	sarq	$32, %rbx
	addl	$15, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	shrl	$4, %ebx
	movq	%r9, 8(%rsp)
	movq	%rdx, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	_Z22allocateMatrixToDevice6Matrix
	movq	(%rsp), %rdi
	movq	%r12, %rsi
	movq	%rax, 24(%rsp)
	movq	%rdx, %r13
	call	_Z22allocateMatrixToDevice6Matrix
	movq	8(%rsp), %rsi
	movq	%rbp, %rdi
	movq	%rax, 16(%rsp)
	movq	%rdx, %r12
	call	_Z22allocateMatrixToDevice6Matrix
	movl	%ebx, 48(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, %r15
	movl	(%rsp), %eax
	movq	%rdx, %r14
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	addl	$15, %eax
	shrl	$4, %eax
	movl	%eax, 44(%rsp)
	movq	44(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	movq	16(%rsp), %r10
	movq	24(%rsp), %r11
	testl	%eax, %eax
	jne	.L36
	leaq	88(%rsp), %rdx
	leaq	72(%rsp), %rsi
	movq	%r11, 56(%rsp)
	leaq	56(%rsp), %rdi
	movq	%r13, 64(%rsp)
	movq	%r10, 72(%rsp)
	movq	%r12, 80(%rsp)
	movq	%r15, 88(%rsp)
	movq	%r14, 96(%rsp)
	call	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_
.L36:
	call	cudaThreadSynchronize@PLT
	movq	%rbp, %rdx
	movq	8(%rsp), %rdi
	movq	%r14, %rsi
	sarq	$32, %rdx
	movl	$2, %ecx
	imull	%ebp, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	%r13, %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	movq	%r12, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE3640:
	.size	_Z6matmul6MatrixS_S_, .-_Z6matmul6MatrixS_S_
	.section	.rodata.str1.1
.LC4:
	.string	"%f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3641:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$4, %esi
	movl	$4, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	pushq	%rax
	.cfi_def_cfa_offset 64
	call	_Z10initMatrixii
	movl	$4, %esi
	movl	$4, %edi
	movq	%rdx, %rbx
	movq	%rax, %r13
	call	_Z10initMatrixii
	movl	$4, %esi
	movl	$4, %edi
	movq	%rdx, %r12
	movq	%rax, %rbp
	call	_Z10initMatrixii
	movq	%r13, %rdi
	movq	%rbx, %rsi
	movq	%rax, %r15
	movq	%rdx, %r14
	call	_Z9setRandom6Matrix
	movq	%rbp, %rdi
	movq	%r12, %rsi
	call	_Z9setRandom6Matrix
	movq	%r13, %rdi
	movq	%rbx, %rsi
	call	_Z11printMatrix6Matrix
	movq	%rbp, %rdi
	movq	%r12, %rsi
	call	_Z11printMatrix6Matrix
	movq	%r15, %r8
	movq	%r14, %r9
	movq	%rbp, %rdx
	movq	%r12, %rcx
	movq	%r13, %rdi
	movq	%rbx, %rsi
	movslq	%ebp, %rbp
	call	_Z6matmul6MatrixS_S_
	movq	%r15, %rdi
	movq	%r14, %rsi
	call	_Z11printMatrix6Matrix
	movss	(%r12), %xmm0
	mulss	(%rbx), %xmm0
	leaq	0(,%rbp,4), %rax
	leaq	(%r12,%rax), %rdx
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	movss	(%rdx), %xmm1
	mulss	4(%rbx), %xmm1
	addq	%rdx, %rax
	addss	%xmm1, %xmm0
	movss	(%rax), %xmm1
	mulss	8(%rbx), %xmm1
	addss	%xmm1, %xmm0
	movss	(%rax,%rbp,4), %xmm1
	mulss	12(%rbx), %xmm1
	movb	$1, %al
	addss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	popq	%rdx
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3641:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z12MatMulKernel6MatrixS_S_"
.LC6:
	.string	"_Z3addiPfS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3671:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12MatMulKernel6MatrixS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z3addiPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3671:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <math.h>
#include <stdlib.h>
#include <assert.h>

// Kernel function to add the elements of two arrays
__global__
void add(int n, float *x, float *y)
{
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;
  for (int i = index; i < n; i += stride)
    y[i] = x[i] + y[i];
}

typedef struct {
  int width;
  int height;
  float * elements;
} Matrix;


Matrix initMatrix(int height, int width) {
  Matrix A;
  A.width = width;
  A.height = height;
  A.elements = (float*)malloc(width * height * sizeof(float));
  return A;
}

void setRandom(Matrix A) {
  for (int i = 0; i < A.height; i++)
    for (int j = 0; j < A.width; j++)
      A.elements[i*A.width + j] = (float)(rand() % 3);
}

void printMatrix(Matrix A){
  for (int i = 0; i < A.height; i++)
    for(int j = 0; j < A.width; j++) {
	  if ( j == 0 ) printf("\n");
	  printf(" %f ", A.elements[i*A.width + j]);
	}
  printf("\n");
}

float cell(Matrix A, int row, int column) {
	return A.elements[row * A.width + column];
}

Matrix allocateMatrixToDevice(Matrix A) {
	Matrix d_A;
	d_A.width = A.width;
	d_A.height = A.height;
	size_t size = A.width * A.height * sizeof(float);
	hipError_t err = hipMalloc(&d_A.elements, size);
	printf("CUDA malloc Matrix : %s\n", hipGetErrorString(err));
	err = hipMemcpy(d_A.elements, A.elements, size, hipMemcpyHostToDevice);
	printf("Copy Matrix to device: %s\n",hipGetErrorString(err));
	return d_A;
}

__global__ void MatMulKernel(Matrix A, Matrix B, Matrix C) {
  
  float Cvalue = 0.0;
  
  /* calculate value for C(row, column) */
  int row = blockIdx.y * blockDim.y + threadIdx.y;
  int col = blockIdx.x * blockDim.x + threadIdx.x;
  
  /* not all threads in grid need return a value, as C may not fit exactly the grid */
  if (row > A.height || col > B.width) return;
  
  /* we are using Row Major representation for the matrix */
  for (int e = 0; e < A.width; ++e) {
	int a = row * A.width + e; /* row major, so just add e to index*/
	int b = e * B.width + col; /* row major, so multiply index by e */
    Cvalue += (A.elements[a] * B.elements[b]);
  }
  C.elements[row * C.width + col] = Cvalue;
}

void matmul(Matrix A, Matrix B, Matrix C) {

    /* copy the matrices to the GPU */
	Matrix d_A = allocateMatrixToDevice(A);
	Matrix d_B = allocateMatrixToDevice(B);
	Matrix d_C = allocateMatrixToDevice(C);
	
	/* specify 2 dimensional blocks of 16 x 16 = 256 threads per block */
	dim3 dimBlock(16,16);
	
	/* calculate how many blocks we need to perform the calculation */
	/* the grid is based on the size of the product matrix */
	/* ie: A(2,3) * B(3,4) = C(2,4) */
	/* A(height,width) * B(height,width) = C(A height, B width) */
	dim3 dimGrid(
	            ( (B.width + dimBlock.x - 1 ) / dimBlock.x),
				( (A.height + dimBlock.y -1 ) / dimBlock.y)
				);
	
	/* launch a grid and run the kernel function*/
	MatMulKernel<<<dimGrid, dimBlock>>>(d_A,d_B,d_C);
	
	/* wait for all threads to finish */
	hipError_t err = hipDeviceSynchronize();
	
	err = hipMemcpy(C.elements, d_C.elements, C.height * C.width * sizeof(float), hipMemcpyDeviceToHost);
	hipFree(d_A.elements);
	hipFree(d_B.elements);
}



int main(void)
{
  Matrix A = initMatrix(4,4);
  Matrix B = initMatrix(4,4);
  Matrix C = initMatrix(4,4);
  
  setRandom(A);
  setRandom(B);
  
  printMatrix(A);
  printMatrix(B);
  
  matmul(A,B,C);
  printMatrix(C);

  float c_0_0 = cell(A,0,0) * cell(B,0,0) + cell(A,0,1) * cell(B,1,0) + cell(A,0,2) * cell(B,2,0) + cell(A,0,3) * cell(B,3,0);
  printf("%f\n", c_0_0);
  assert(c_0_0 == cell(C,0,0));
  
}

	.text
	.file	"matmul.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z18__device_stub__addiPfS_     # -- Begin function _Z18__device_stub__addiPfS_
	.type	_Z18__device_stub__addiPfS_,@function
_Z18__device_stub__addiPfS_:            # @_Z18__device_stub__addiPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3addiPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z18__device_stub__addiPfS_, .Lfunc_end0-_Z18__device_stub__addiPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z10initMatrixii                # -- Begin function _Z10initMatrixii
	.type	_Z10initMatrixii,@function
_Z10initMatrixii:                       # @_Z10initMatrixii
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%esi, %ebx
	movl	%edi, %r14d
	movl	%esi, %eax
	imull	%edi, %eax
	movslq	%eax, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, %rdx
	shlq	$32, %r14
	movl	%ebx, %eax
	orq	%r14, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z10initMatrixii, .Lfunc_end1-_Z10initMatrixii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9setRandom6Matrix             # -- Begin function _Z9setRandom6Matrix
	.type	_Z9setRandom6Matrix,@function
_Z9setRandom6Matrix:                    # @_Z9setRandom6Matrix
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	movq	%rdi, %rax
	shrq	$32, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	testl	%eax, %eax
	jle	.LBB2_6
# %bb.1:                                # %.preheader.lr.ph
	movq	%rdi, %r14
	movl	%r14d, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	testl	%r14d, %r14d
	jle	.LBB2_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbx
	xorl	%r15d, %r15d
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1431655766, %rax, %rcx         # imm = 0x55555556
	movq	%rcx, %rdx
	shrq	$63, %rdx
	shrq	$32, %rcx
	addl	%edx, %ecx
	leal	(%rcx,%rcx,2), %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB2_4
.LBB2_5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%rbp
	addl	%r14d, %r13d
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB2_2
.LBB2_6:                                # %._crit_edge10
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z9setRandom6Matrix, .Lfunc_end2-_Z9setRandom6Matrix
	.cfi_endproc
                                        # -- End function
	.globl	_Z11printMatrix6Matrix          # -- Begin function _Z11printMatrix6Matrix
	.type	_Z11printMatrix6Matrix,@function
_Z11printMatrix6Matrix:                 # @_Z11printMatrix6Matrix
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	movq	%rdi, %rax
	shrq	$32, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	testl	%eax, %eax
	jle	.LBB3_8
# %bb.1:                                # %.preheader.lr.ph
	movq	%rdi, %r14
	movl	%r14d, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	testl	%r14d, %r14d
	jle	.LBB3_7
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbx
	xorl	%r15d, %r15d
.LBB3_4:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	testq	%r15, %r15
	jne	.LBB3_6
# %bb.5:                                #   in Loop: Header=BB3_4 Depth=2
	movl	$10, %edi
	callq	putchar@PLT
.LBB3_6:                                #   in Loop: Header=BB3_4 Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r15,4), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB3_4
.LBB3_7:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	incq	%rbp
	addl	%r14d, %r13d
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB3_2
.LBB3_8:                                # %._crit_edge12
	movl	$10, %edi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end3:
	.size	_Z11printMatrix6Matrix, .Lfunc_end3-_Z11printMatrix6Matrix
	.cfi_endproc
                                        # -- End function
	.globl	_Z4cell6Matrixii                # -- Begin function _Z4cell6Matrixii
	.type	_Z4cell6Matrixii,@function
_Z4cell6Matrixii:                       # @_Z4cell6Matrixii
	.cfi_startproc
# %bb.0:
	imull	%edx, %edi
	addl	%ecx, %edi
	movslq	%edi, %rax
	movss	(%rsi,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	retq
.Lfunc_end4:
	.size	_Z4cell6Matrixii, .Lfunc_end4-_Z4cell6Matrixii
	.cfi_endproc
                                        # -- End function
	.globl	_Z22allocateMatrixToDevice6Matrix # -- Begin function _Z22allocateMatrixToDevice6Matrix
	.type	_Z22allocateMatrixToDevice6Matrix,@function
_Z22allocateMatrixToDevice6Matrix:      # @_Z22allocateMatrixToDevice6Matrix
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r14
	leaq	8(%rsp), %rbx
	movq	%rdi, -8(%rbx)
	movq	%rdi, %rax
	shrq	$32, %rax
	imull	%edi, %eax
	movslq	%eax, %r15
	shlq	$2, %r15
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movq	(%rbx), %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movq	-8(%rbx), %rax
	movq	(%rbx), %rdx
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z22allocateMatrixToDevice6Matrix, .Lfunc_end5-_Z22allocateMatrixToDevice6Matrix
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__MatMulKernel6MatrixS_S_ # -- Begin function _Z27__device_stub__MatMulKernel6MatrixS_S_
	.type	_Z27__device_stub__MatMulKernel6MatrixS_S_,@function
_Z27__device_stub__MatMulKernel6MatrixS_S_: # @_Z27__device_stub__MatMulKernel6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsi, 8(%rax)
	leaq	64(%rsp), %rsi
	movq	%rdx, (%rsi)
	movq	%rcx, 8(%rsi)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	movq	%r9, 8(%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rsi, 8(%rbx)
	movq	%rcx, 16(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12MatMulKernel6MatrixS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z27__device_stub__MatMulKernel6MatrixS_S_, .Lfunc_end6-_Z27__device_stub__MatMulKernel6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z6matmul6MatrixS_S_            # -- Begin function _Z6matmul6MatrixS_S_
	.type	_Z6matmul6MatrixS_S_,@function
_Z6matmul6MatrixS_S_:                   # @_Z6matmul6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %r13
	movq	%r8, %r15
	movq	%rcx, %r12
	movq	%rdx, %rbp
	movq	%rdi, %r14
	callq	_Z22allocateMatrixToDevice6Matrix
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	%rdx, %rbx
	movq	%rbp, %rdi
	movq	%r12, %rsi
	callq	_Z22allocateMatrixToDevice6Matrix
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	%rdx, %r12
	movq	%r15, %rdi
	movq	%r13, 32(%rsp)                  # 8-byte Spill
	movq	%r13, %rsi
	callq	_Z22allocateMatrixToDevice6Matrix
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	%rdx, %r13
	addl	$15, %ebp
	shrl	$4, %ebp
	shrq	$4, %r14
	movl	$4026531840, %eax               # imm = 0xF0000000
	addq	%r14, %rax
	movabsq	$1152921500311879680, %rdi      # imm = 0xFFFFFFF00000000
	andq	%rax, %rdi
	orq	%rbp, %rdi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_2
# %bb.1:
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	%rbx, %rsi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movq	%r12, %rcx
	movq	8(%rsp), %r8                    # 8-byte Reload
	movq	%r13, %r9
	callq	_Z27__device_stub__MatMulKernel6MatrixS_S_
.LBB7_2:
	movq	%r15, %r14
	shrq	$32, %r14
	callq	hipDeviceSynchronize
	imull	%r15d, %r14d
	movslq	%r14d, %rdx
	shlq	$2, %rdx
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r13, %rsi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	callq	hipFree
	movq	%r12, %rdi
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end7:
	.size	_Z6matmul6MatrixS_S_, .Lfunc_end7-_Z6matmul6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$64, %edi
	callq	malloc
	movq	%rax, %rbx
	movl	$64, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$64, %edi
	callq	malloc
	movq	%rax, %r15
	movabsq	$17179869188, %r12              # imm = 0x400000004
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	_Z9setRandom6Matrix
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_Z9setRandom6Matrix
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	_Z11printMatrix6Matrix
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	_Z11printMatrix6Matrix
	movq	%r12, %rdi
	movq	%rbx, %rsi
	movq	%r12, %rdx
	movq	%r14, %rcx
	movq	%r12, %r8
	movq	%r15, %r9
	callq	_Z6matmul6MatrixS_S_
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	_Z11printMatrix6Matrix
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	4(%rbx), %xmm1                  # xmm1 = mem[0],zero,zero,zero
	mulss	(%r14), %xmm0
	mulss	16(%r14), %xmm1
	addss	%xmm0, %xmm1
	movss	8(%rbx), %xmm0                  # xmm0 = mem[0],zero,zero,zero
	mulss	32(%r14), %xmm0
	addss	%xmm1, %xmm0
	movss	12(%rbx), %xmm1                 # xmm1 = mem[0],zero,zero,zero
	mulss	48(%r14), %xmm1
	addss	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	main, .Lfunc_end8-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3addiPfS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12MatMulKernel6MatrixS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z3addiPfS_,@object             # @_Z3addiPfS_
	.section	.rodata,"a",@progbits
	.globl	_Z3addiPfS_
	.p2align	3, 0x0
_Z3addiPfS_:
	.quad	_Z18__device_stub__addiPfS_
	.size	_Z3addiPfS_, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	" %f "
	.size	.L.str.1, 5

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"CUDA malloc Matrix : %s\n"
	.size	.L.str.2, 25

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Copy Matrix to device: %s\n"
	.size	.L.str.3, 27

	.type	_Z12MatMulKernel6MatrixS_S_,@object # @_Z12MatMulKernel6MatrixS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z12MatMulKernel6MatrixS_S_
	.p2align	3, 0x0
_Z12MatMulKernel6MatrixS_S_:
	.quad	_Z27__device_stub__MatMulKernel6MatrixS_S_
	.size	_Z12MatMulKernel6MatrixS_S_, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"%f\n"
	.size	.L.str.4, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3addiPfS_"
	.size	.L__unnamed_1, 12

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z12MatMulKernel6MatrixS_S_"
	.size	.L__unnamed_2, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__addiPfS_
	.addrsig_sym _Z27__device_stub__MatMulKernel6MatrixS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3addiPfS_
	.addrsig_sym _Z12MatMulKernel6MatrixS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3addiPfS_             ; -- Begin function _Z3addiPfS_
	.globl	_Z3addiPfS_
	.p2align	8
	.type	_Z3addiPfS_,@function
_Z3addiPfS_:                            ; @_Z3addiPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b32 s10, s[0:1], 0x0
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s10, v1
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s2, s[2:3], 0x0
	s_load_b128 s[4:7], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s8
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[8:9], s[2:3], 2
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s8
	global_load_b32 v0, v[4:5], off
	global_load_b32 v4, v[6:7], off
	v_add_nc_u32_e32 v1, s2, v1
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e64 s0, s10, v1
	global_store_b32 v[6:7], v0, off
	s_or_b32 s1, s0, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow22
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3addiPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3addiPfS_, .Lfunc_end0-_Z3addiPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 236
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12MatMulKernel6MatrixS_S_ ; -- Begin function _Z12MatMulKernel6MatrixS_S_
	.globl	_Z12MatMulKernel6MatrixS_S_
	.p2align	8
	.type	_Z12MatMulKernel6MatrixS_S_,@function
_Z12MatMulKernel6MatrixS_S_:            ; @_Z12MatMulKernel6MatrixS_S_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b64 s[4:5], s[0:1], 0x0
	s_load_b32 s8, s[0:1], 0x10
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s6, s0, 16
	s_addc_u32 s7, s1, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_i32_e32 vcc_lo, s5, v0
	v_cmp_ge_i32_e64 s2, s8, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_6
; %bb.1:                                ; %.preheader
	s_load_b64 s[2:3], s[0:1], 0x28
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB1_4
; %bb.2:                                ; %.lr.ph
	s_clause 0x1
	s_load_b64 s[10:11], s[0:1], 0x8
	s_load_b64 s[6:7], s[6:7], 0x8
	v_mul_lo_u32 v2, v0, s4
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s4, s4, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s4, 0
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_add_nc_u32_e32 v4, s8, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b32 v5, v[2:3], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v5, v7
	s_cbranch_scc0 .LBB1_3
	s_branch .LBB1_5
.LBB1_4:
	v_mov_b32_e32 v6, 0
.LBB1_5:                                ; %Flow37
	s_load_b32 s0, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[2:3], null, v0, s0, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB1_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12MatMulKernel6MatrixS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z12MatMulKernel6MatrixS_S_, .Lfunc_end1-_Z12MatMulKernel6MatrixS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 368
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3addiPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3addiPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           16
        .value_kind:     by_value
      - .offset:         16
        .size:           16
        .value_kind:     by_value
      - .offset:         32
        .size:           16
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12MatMulKernel6MatrixS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12MatMulKernel6MatrixS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
