
#include <cuda_runtime.h>
#include "device_launch_parameters.h"

#include <stdio.h>
#include <stdlib.h>
#include <time.h> 

cudaError_t addWithCuda(int* c, const int* a, const int* b, unsigned int size);


int getSPcores(cudaDeviceProp devProp)
{
	int cores = 0;
	int mp = devProp.multiProcessorCount;
	switch (devProp.major) {
	case 2: // Fermi
		if (devProp.minor == 1) cores = mp * 48;
		else cores = mp * 32;
		break;
	case 3: // Kepler
		cores = mp * 192;
		break;
	case 5: // Maxwell
		cores = mp * 128;
		break;
	case 6: // Pascal
		if ((devProp.minor == 1) || (devProp.minor == 2)) cores = mp * 128;
		else if (devProp.minor == 0) cores = mp * 64;
		else printf("Unknown device type\n");
		break;
	case 7: // Volta and Turing
		if ((devProp.minor == 0) || (devProp.minor == 5)) cores = mp * 64;
		else printf("Unknown device type\n");
		break;
	case 8: // Ampere
		if (devProp.minor == 0) cores = mp * 64;
		else printf("Unknown device type\n");
		break;
	default:
		printf("Unknown device type\n");
		break;
	}
	printf("Hay %i nucleos\n", cores);
	return cores;
}
__global__ void addKernel(int* a, int* b)
{
	int i = threadIdx.x;
	a[i] += b[i];
}

__global__ void invertirArray(int* dest, int* org, unsigned int n) {
	for (int i = n - 1; i >= 0; i--) {
		dest[(n - 1) - i] = org[i];
	}
}

int main()
{
	int deviceID = 0, ncores, nvec;
	int* hst_matriz = NULL;
	int* dev_matriz = NULL;
	int* dev_matriz_inver = NULL;
	int deviceCount;

	cudaGetDeviceCount(&deviceCount);
	cudaDeviceProp props;
	cudaGetDeviceProperties(&props, deviceID);

	ncores = getSPcores(props);

	printf("Numero de valores del vector(max %i): ", ncores);
	scanf("%i", &nvec);

	hst_matriz = (int*)malloc(nvec * sizeof(int));
	cudaMallocManaged((void**)&dev_matriz, nvec * sizeof(int));
	cudaMallocManaged((void**)&dev_matriz_inver, nvec * sizeof(int));

	// Generacion del array
	srand(time(NULL));
	for (int i = 0; i < nvec; i++) {
		hst_matriz[i] = rand() % 10;
	}

	int* arr = (int*)malloc(nvec * sizeof(int));

	cudaMemcpy((void**)dev_matriz, hst_matriz, nvec * sizeof(int), cudaMemcpyHostToDevice);
	invertirArray <<<1,1>>> (dev_matriz_inver, dev_matriz, nvec);
	addKernel <<<1,nvec>>> (dev_matriz, dev_matriz_inver);
	cudaMemcpy((void**)hst_matriz,dev_matriz,nvec*sizeof(int),cudaMemcpyDeviceToHost);

	printf("Resultado final:");
	for (int i = 0; i < nvec;i++) {
		printf("[%i]",hst_matriz[i]);
	}
	
}


	.file	"tmpxft_0025f72c_00000000-6_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Unknown device type\n"
.LC1:
	.string	"Hay %i nucleos\n"
	.text
	.globl	_Z10getSPcores14cudaDeviceProp
	.type	_Z10getSPcores14cudaDeviceProp, @function
_Z10getSPcores14cudaDeviceProp:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	376(%rsp), %edi
	movl	380(%rsp), %eax
	leal	-2(%rdi), %edx
	movd	404(%rsp), %xmm0
	cmpl	$6, %edx
	ja	.L14
	leaq	.L5(%rip), %rsi
	movd	%xmm0, %ecx
	movslq	(%rsi,%rdx,4), %rdx
	addq	%rsi, %rdx
	notrack jmp	*%rdx
	.section	.rodata
	.align 4
	.align 4
.L5:
	.long	.L10-.L5
	.long	.L9-.L5
	.long	.L14-.L5
	.long	.L25-.L5
	.long	.L7-.L5
	.long	.L6-.L5
	.long	.L13-.L5
	.text
.L10:
	pslld	$5, %xmm0
	decl	%eax
	movd	%xmm0, %ebx
	jne	.L12
	imull	$48, %ecx, %ebx
	jmp	.L12
.L9:
	imull	$192, %ecx, %ebx
	jmp	.L12
.L7:
	leal	-1(%rax), %edx
	cmpl	$1, %edx
	ja	.L13
.L25:
	pslld	$7, %xmm0
	jmp	.L22
.L6:
	cmpl	$5, %eax
	je	.L23
.L13:
	testl	%eax, %eax
	jne	.L14
.L23:
	pslld	$6, %xmm0
.L22:
	movd	%xmm0, %ebx
	jmp	.L12
.L14:
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
.L12:
	movl	%ebx, %edx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z10getSPcores14cudaDeviceProp, .-_Z10getSPcores14cudaDeviceProp
	.globl	_Z30__device_stub__Z9addKernelPiS_PiS_
	.type	_Z30__device_stub__Z9addKernelPiS_PiS_, @function
_Z30__device_stub__Z9addKernelPiS_PiS_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9addKernelPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L28:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z30__device_stub__Z9addKernelPiS_PiS_, .-_Z30__device_stub__Z9addKernelPiS_PiS_
	.globl	_Z9addKernelPiS_
	.type	_Z9addKernelPiS_, @function
_Z9addKernelPiS_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z9addKernelPiS_PiS_
	.cfi_endproc
.LFE2054:
	.size	_Z9addKernelPiS_, .-_Z9addKernelPiS_
	.globl	_Z36__device_stub__Z13invertirArrayPiS_jPiS_j
	.type	_Z36__device_stub__Z13invertirArrayPiS_jPiS_j, @function
_Z36__device_stub__Z13invertirArrayPiS_jPiS_j:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z13invertirArrayPiS_j(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L33:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z36__device_stub__Z13invertirArrayPiS_jPiS_j, .-_Z36__device_stub__Z13invertirArrayPiS_jPiS_j
	.globl	_Z13invertirArrayPiS_j
	.type	_Z13invertirArrayPiS_j, @function
_Z13invertirArrayPiS_j:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z13invertirArrayPiS_jPiS_j
	.cfi_endproc
.LFE2056:
	.size	_Z13invertirArrayPiS_j, .-_Z13invertirArrayPiS_j
	.section	.rodata.str1.1
.LC2:
	.string	"Numero de valores del vector(max %i): "
.LC3:
	.string	"%i"
.LC4:
	.string	"Resultado final:"
.LC5:
	.string	"[%i]"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$10, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$1088, %rsp
	.cfi_def_cfa_offset 1120
	movq	%fs:40, %rax
	movq	%rax, 1080(%rsp)
	xorl	%eax, %eax
	leaq	48(%rsp), %rbx
	xorl	%eax, %eax
	leaq	4(%rsp), %rdi
	movq	%rax, 8(%rsp)
	movq	%rax, 16(%rsp)
	call	cudaGetDeviceCount@PLT
	movq	%rbx, %rdi
	xorl	%esi, %esi
	call	cudaGetDeviceProperties_v2@PLT
	subq	$1040, %rsp
	.cfi_def_cfa_offset 2160
	movq	%rbx, %rsi
	movl	$258, %ecx
	movq	%rsp, %rdi
	rep movsl
	call	_Z10getSPcores14cudaDeviceProp
	addq	$1040, %rsp
	.cfi_def_cfa_offset 1120
	movl	$2, %edi
	leaq	.LC2(%rip), %rsi
	movl	%eax, %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rsp, %rsi
	leaq	.LC3(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movslq	(%rsp), %rbp
	salq	$2, %rbp
	movq	%rbp, %rdi
	call	malloc@PLT
	movq	%rbp, %rsi
	leaq	8(%rsp), %rdi
	xorl	%ebp, %ebp
	movl	$1, %edx
	movq	%rax, %rbx
	call	cudaMallocManaged@PLT
	movslq	(%rsp), %rsi
	movl	$1, %edx
	leaq	16(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMallocManaged@PLT
	xorl	%edi, %edi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L39:
	movslq	(%rsp), %rdx
	cmpl	%ebp, %edx
	jle	.L47
	call	rand@PLT
	cltd
	idivl	%r12d
	movl	%edx, (%rbx,%rbp,4)
	incq	%rbp
	jmp	.L39
.L47:
	movq	8(%rsp), %rdi
	salq	$2, %rdx
	movl	$1, %ecx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movl	$1, 44(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 36(%rsp)
	movq	%rdi, 24(%rsp)
	movl	$1, 32(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	movl	(%rsp), %edx
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z36__device_stub__Z13invertirArrayPiS_jPiS_j
.L41:
	movl	(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 32(%rsp)
	movq	%rdi, 40(%rsp)
	movl	44(%rsp), %ecx
	movl	%eax, 36(%rsp)
	movq	36(%rsp), %rdx
	movq	%rdi, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z30__device_stub__Z9addKernelPiS_PiS_
.L42:
	movslq	(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	xorl	%ebp, %ebp
	movq	%rbx, %rdi
	leaq	.LC5(%rip), %r12
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L43:
	cmpl	%ebp, (%rsp)
	jle	.L48
	movl	(%rbx,%rbp,4), %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbp
	call	__printf_chk@PLT
	jmp	.L43
.L48:
	movq	1080(%rsp), %rax
	subq	%fs:40, %rax
	je	.L45
	call	__stack_chk_fail@PLT
.L45:
	addq	$1088, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z13invertirArrayPiS_j"
.LC7:
	.string	"_Z9addKernelPiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13invertirArrayPiS_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9addKernelPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>


#include <stdio.h>
#include <stdlib.h>
#include <time.h> 

hipError_t addWithCuda(int* c, const int* a, const int* b, unsigned int size);


int getSPcores(hipDeviceProp_t devProp)
{
	int cores = 0;
	int mp = devProp.multiProcessorCount;
	switch (devProp.major) {
	case 2: // Fermi
		if (devProp.minor == 1) cores = mp * 48;
		else cores = mp * 32;
		break;
	case 3: // Kepler
		cores = mp * 192;
		break;
	case 5: // Maxwell
		cores = mp * 128;
		break;
	case 6: // Pascal
		if ((devProp.minor == 1) || (devProp.minor == 2)) cores = mp * 128;
		else if (devProp.minor == 0) cores = mp * 64;
		else printf("Unknown device type\n");
		break;
	case 7: // Volta and Turing
		if ((devProp.minor == 0) || (devProp.minor == 5)) cores = mp * 64;
		else printf("Unknown device type\n");
		break;
	case 8: // Ampere
		if (devProp.minor == 0) cores = mp * 64;
		else printf("Unknown device type\n");
		break;
	default:
		printf("Unknown device type\n");
		break;
	}
	printf("Hay %i nucleos\n", cores);
	return cores;
}
__global__ void addKernel(int* a, int* b)
{
	int i = threadIdx.x;
	a[i] += b[i];
}

__global__ void invertirArray(int* dest, int* org, unsigned int n) {
	for (int i = n - 1; i >= 0; i--) {
		dest[(n - 1) - i] = org[i];
	}
}

int main()
{
	int deviceID = 0, ncores, nvec;
	int* hst_matriz = NULL;
	int* dev_matriz = NULL;
	int* dev_matriz_inver = NULL;
	int deviceCount;

	hipGetDeviceCount(&deviceCount);
	hipDeviceProp_t props;
	hipGetDeviceProperties(&props, deviceID);

	ncores = getSPcores(props);

	printf("Numero de valores del vector(max %i): ", ncores);
	scanf("%i", &nvec);

	hst_matriz = (int*)malloc(nvec * sizeof(int));
	hipMallocManaged((void**)&dev_matriz, nvec * sizeof(int));
	hipMallocManaged((void**)&dev_matriz_inver, nvec * sizeof(int));

	// Generacion del array
	srand(time(NULL));
	for (int i = 0; i < nvec; i++) {
		hst_matriz[i] = rand() % 10;
	}

	int* arr = (int*)malloc(nvec * sizeof(int));

	hipMemcpy((void**)dev_matriz, hst_matriz, nvec * sizeof(int), hipMemcpyHostToDevice);
	invertirArray <<<1,1>>> (dev_matriz_inver, dev_matriz, nvec);
	addKernel <<<1,nvec>>> (dev_matriz, dev_matriz_inver);
	hipMemcpy((void**)hst_matriz,dev_matriz,nvec*sizeof(int),hipMemcpyDeviceToHost);

	printf("Resultado final:");
	for (int i = 0; i < nvec;i++) {
		printf("[%i]",hst_matriz[i]);
	}
	
}


	.text
	.file	"kernel.hip"
	.globl	_Z10getSPcores20hipDeviceProp_tR0600 # -- Begin function _Z10getSPcores20hipDeviceProp_tR0600
	.type	_Z10getSPcores20hipDeviceProp_tR0600,@function
_Z10getSPcores20hipDeviceProp_tR0600:   # @_Z10getSPcores20hipDeviceProp_tR0600
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	376(%rsp), %eax
	addl	$-2, %eax
	cmpl	$6, %eax
	ja	.LBB0_14
# %bb.1:
	leaq	16(%rsp), %rcx
	movl	388(%rcx), %ebx
	jmpq	*.LJTI0_0(,%rax,8)
.LBB0_2:
	cmpl	$1, 364(%rcx)
	jne	.LBB0_12
# %bb.3:
	shll	$4, %ebx
	jmp	.LBB0_4
.LBB0_5:
	cmpl	$0, 364(%rcx)
	jne	.LBB0_14
	jmp	.LBB0_11
.LBB0_6:
	shll	$6, %ebx
.LBB0_4:
	leal	(%rbx,%rbx,2), %ebx
	jmp	.LBB0_15
.LBB0_7:
	movl	364(%rcx), %eax
	leal	-1(%rax), %ecx
	cmpl	$1, %ecx
	ja	.LBB0_13
.LBB0_8:
	shll	$7, %ebx
	jmp	.LBB0_15
.LBB0_9:
	movl	364(%rcx), %eax
	cmpl	$5, %eax
	je	.LBB0_11
# %bb.10:
	testl	%eax, %eax
	jne	.LBB0_14
.LBB0_11:
	shll	$6, %ebx
	jmp	.LBB0_15
.LBB0_12:
	shll	$5, %ebx
	jmp	.LBB0_15
.LBB0_13:
	testl	%eax, %eax
	je	.LBB0_11
.LBB0_14:
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
.LBB0_15:
	movl	$.L.str.1, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z10getSPcores20hipDeviceProp_tR0600, .Lfunc_end0-_Z10getSPcores20hipDeviceProp_tR0600
	.cfi_endproc
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
.LJTI0_0:
	.quad	.LBB0_2
	.quad	.LBB0_6
	.quad	.LBB0_14
	.quad	.LBB0_8
	.quad	.LBB0_7
	.quad	.LBB0_9
	.quad	.LBB0_5
                                        # -- End function
	.text
	.globl	_Z24__device_stub__addKernelPiS_ # -- Begin function _Z24__device_stub__addKernelPiS_
	.type	_Z24__device_stub__addKernelPiS_,@function
_Z24__device_stub__addKernelPiS_:       # @_Z24__device_stub__addKernelPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9addKernelPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__addKernelPiS_, .Lfunc_end1-_Z24__device_stub__addKernelPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__invertirArrayPiS_j # -- Begin function _Z28__device_stub__invertirArrayPiS_j
	.type	_Z28__device_stub__invertirArrayPiS_j,@function
_Z28__device_stub__invertirArrayPiS_j:  # @_Z28__device_stub__invertirArrayPiS_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13invertirArrayPiS_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z28__device_stub__invertirArrayPiS_j, .Lfunc_end2-_Z28__device_stub__invertirArrayPiS_j
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$2976, %rsp                     # imm = 0xBA0
	.cfi_def_cfa_offset 3024
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	xorl	%eax, %eax
	leaq	1480(%rsp), %r15
	movq	%rax, (%r15)
	leaq	1488(%rsp), %r14
	movq	%rax, (%r14)
	leaq	1500(%rsp), %rdi
	callq	hipGetDeviceCount
	leaq	1504(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	movl	$184, %ecx
	movq	%rsp, %rdi
	movq	%rbx, %rsi
	rep;movsq (%rsi), %es:(%rdi)
	callq	_Z10getSPcores20hipDeviceProp_tR0600
	movl	$.L.str.2, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
	leaq	1476(%rsp), %r12
	movl	$.L.str.3, %edi
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	(%r12), %r13
	shlq	$2, %r13
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%r15, %rdi
	movq	%r13, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	movslq	(%r12), %rsi
	shlq	$2, %rsi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movslq	(%r12), %rdx
	testq	%rdx, %rdx
	jle	.LBB3_3
# %bb.1:                                # %.lr.ph.preheader
	xorl	%r14d, %r14d
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r14,4)
	incq	%r14
	movslq	1476(%rsp), %rdx
	cmpq	%rdx, %r14
	jl	.LBB3_2
.LBB3_3:                                # %._crit_edge
	movabsq	$4294967297, %r14               # imm = 0x100000001
	shlq	$2, %rdx
	movq	1480(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_5
# %bb.4:
	movq	1488(%rsp), %rdi
	movq	1480(%rsp), %rsi
	movl	1476(%rsp), %edx
	callq	_Z28__device_stub__invertirArrayPiS_j
.LBB3_5:
	movl	1476(%rsp), %eax
	leaq	(%r14,%rax), %rdx
	decq	%rdx
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_7
# %bb.6:
	movq	1480(%rsp), %rdi
	movq	1488(%rsp), %rsi
	callq	_Z24__device_stub__addKernelPiS_
.LBB3_7:
	movq	1480(%rsp), %rsi
	movslq	1476(%rsp), %rdx
	shlq	$2, %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, 1476(%rsp)
	jle	.LBB3_10
# %bb.8:                                # %.lr.ph33.preheader
	xorl	%r14d, %r14d
.LBB3_9:                                # %.lr.ph33
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r14,4), %esi
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	movslq	1476(%rsp), %rax
	cmpq	%rax, %r14
	jl	.LBB3_9
.LBB3_10:                               # %._crit_edge34
	xorl	%eax, %eax
	addq	$2976, %rsp                     # imm = 0xBA0
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9addKernelPiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13invertirArrayPiS_j, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Hay %i nucleos\n"
	.size	.L.str.1, 16

	.type	_Z9addKernelPiS_,@object        # @_Z9addKernelPiS_
	.section	.rodata,"a",@progbits
	.globl	_Z9addKernelPiS_
	.p2align	3, 0x0
_Z9addKernelPiS_:
	.quad	_Z24__device_stub__addKernelPiS_
	.size	_Z9addKernelPiS_, 8

	.type	_Z13invertirArrayPiS_j,@object  # @_Z13invertirArrayPiS_j
	.globl	_Z13invertirArrayPiS_j
	.p2align	3, 0x0
_Z13invertirArrayPiS_j:
	.quad	_Z28__device_stub__invertirArrayPiS_j
	.size	_Z13invertirArrayPiS_j, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"Numero de valores del vector(max %i): "
	.size	.L.str.2, 39

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%i"
	.size	.L.str.3, 3

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Resultado final:"
	.size	.L.str.4, 17

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"[%i]"
	.size	.L.str.5, 5

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9addKernelPiS_"
	.size	.L__unnamed_1, 17

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13invertirArrayPiS_j"
	.size	.L__unnamed_2, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr.3,@object                 # @str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr.3:
	.asciz	"Unknown device type"
	.size	.Lstr.3, 20

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__addKernelPiS_
	.addrsig_sym _Z28__device_stub__invertirArrayPiS_j
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9addKernelPiS_
	.addrsig_sym _Z13invertirArrayPiS_j
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9addKernelPiS_        ; -- Begin function _Z9addKernelPiS_
	.globl	_Z9addKernelPiS_
	.p2align	8
	.type	_Z9addKernelPiS_,@function
_Z9addKernelPiS_:                       ; @_Z9addKernelPiS_
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v0, s[2:3]
	global_load_b32 v2, v0, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9addKernelPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 4
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9addKernelPiS_, .Lfunc_end0-_Z9addKernelPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 64
; NumSgprs: 4
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 4
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13invertirArrayPiS_j  ; -- Begin function _Z13invertirArrayPiS_j
	.globl	_Z13invertirArrayPiS_j
	.p2align	8
	.type	_Z13invertirArrayPiS_j,@function
_Z13invertirArrayPiS_j:                 ; @_Z13invertirArrayPiS_j
; %bb.0:
	s_load_b32 s6, s[0:1], 0x10
	s_mov_b32 s5, 0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s4, s6, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s4, 0
	s_cbranch_scc1 .LBB1_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b128 s[0:3], s[0:1], 0x0
	s_lshl_b64 s[4:5], s[4:5], 2
	v_mov_b32_e32 v0, 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s2, s4
	s_addc_u32 s3, s3, s5
.LBB1_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v1, v0, s[2:3]
	s_add_i32 s6, s6, -1
	s_add_u32 s2, s2, -4
	s_addc_u32 s3, s3, -1
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[0:1]
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc0 .LBB1_2
.LBB1_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13invertirArrayPiS_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 7
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13invertirArrayPiS_j, .Lfunc_end1-_Z13invertirArrayPiS_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 120
; NumSgprs: 7
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 7
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9addKernelPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     4
    .sgpr_spill_count: 0
    .symbol:         _Z9addKernelPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13invertirArrayPiS_j
    .private_segment_fixed_size: 0
    .sgpr_count:     7
    .sgpr_spill_count: 0
    .symbol:         _Z13invertirArrayPiS_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
