#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
#include <assert.h>
#include <math.h>

//Reading array A from input file inp.txt
typedef struct {
    int *array;
    size_t used;
    size_t size;
} Array;

void initArray(Array *a, size_t initialSize) {
    a->array = (int*) malloc(initialSize * sizeof(int));
    a->used = 0;
    a->size = initialSize;
}

void insertArray(Array *a, int element) {
    if (a->used == a->size) {
        a->size += 1;
        a->array =(int*) realloc(a->array, a->size * sizeof(int));
    }
    a->array[a->used++] = element;
}

Array initArrayA(){
    FILE *fp;
    char str[50000];
    Array a;
    initArray(&a, 1);

    /* opening file for reading */
    fp = fopen("inp.txt" , "r");
    if(fp == NULL) {
        printf("%s","error");
        return a;
    }
    while( fgets (str, 50000, fp)!=NULL ) {
        /* writing content to stdout */
//        printf("%s\n", str);
        char* token;
        char* rest = str;

        while ((token = strtok_r(rest, " , ", &rest)))
            insertArray(&a, atoi(token));
    }
    fclose(fp);
    return a;
}

//Asserts for GPU errors
#define gpuErrorCheck(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
   if (code != cudaSuccess) 
   {
      printf("GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}


__global__ void global_count_range_bins_kernel(int * d_out, int * d_in, int size)
{
 
    int myId = threadIdx.x + blockDim.x * blockIdx.x;
 
    // stride is the total number of threads in the grid
    // Using stride increases the performance and benefits with scalability & thread reusage
    int stride = blockDim.x * gridDim.x;
    
    // do counts in global mem
    for (; myId < size; myId += stride)
    {
        atomicAdd(&(d_out[d_in[myId]/100]), 1);
        __syncthreads();        // make sure all adds at one stage are done!
    }

}

__global__ void shmem_count_range_bins_kernel(int * d_out, int * d_in, int size)
{
    extern __shared__ int sdata[];

    int myId = threadIdx.x + blockDim.x * blockIdx.x;
    int tid  = threadIdx.x;
 
    // load shared mem from global mem
    sdata[tid] = 0;
    __syncthreads();  
 
    // stride is the total number of threads in the grid
    // Using stride increases the performance and benefits with scalability & thread reusage
    int stride = blockDim.x * gridDim.x;
    
    // do counts in shared mem
    for (; myId < size; myId += stride)
    {
        atomicAdd(&(sdata[d_in[myId]/100]), 1);
        __syncthreads();               // make sure all adds at one stage are done!
    }
 
    // assumes that threads per block size is atleast 10
        atomicAdd(&d_out[tid], sdata[tid]);
}

//kernel to perform parallel prefix sum
//assumes only 1 block (1 block can be utilized since we have only 10 elements)
__global__ void prefixsum(int *d_out, int * d_in, int size)
{
  extern __shared__ int sh_mem[];
  
  int tid = threadIdx.x;
  int myId = blockIdx.x * blockDim.x + threadIdx.x;
 
  sh_mem[tid] = d_in[myId];
  
  __syncthreads();
 
  if (myId < size)
  {
      for (int d = 1; d < blockDim.x; d *=2)
      {
        if (tid >= d) {
          sh_mem[tid] += sh_mem[tid - d];
        }
        __syncthreads();
      }
  }
  d_out[myId] = sh_mem[tid];
}


//Function to call corresponding kernel based on memory usage
void count_bins(int * d_out, int * d_in,
    int size, bool usesSharedMemory)
    {
    const int maxThreadsPerBlock = 512;
    int threads = maxThreadsPerBlock;

    // handles non power of 2 inputs
    int blocks = ceil(float(size) / float(maxThreadsPerBlock));

    if (usesSharedMemory)
    {
        //fprintf(q2a, "shared kernel in count \n");
        shmem_count_range_bins_kernel<<<blocks, threads, threads * sizeof(int)>>>
            (d_out, d_in, size);
    }
    else
    {
        //fprintf(q2a, "global kernel in count \n");
        global_count_range_bins_kernel<<<blocks, threads>>>(d_out, d_in, size);
        gpuErrorCheck( cudaPeekAtLastError() );
        gpuErrorCheck( cudaDeviceSynchronize() );
    }

}


int main(int argc, char **argv)
{
    FILE *q2a;
    FILE *q2b;
    FILE *q2c;
    q2a = fopen("q2a.txt", "w");
    q2b = fopen("q2b.txt", "w");
    q2c = fopen("q2c.txt", "w");

    int deviceCount;
    cudaGetDeviceCount(&deviceCount);
    if (deviceCount == 0) {
        fprintf(q2a, "error: no devices supporting CUDA.\n");
        exit(EXIT_FAILURE);
    }
    int dev = 0;
    cudaSetDevice(dev);

    cudaDeviceProp devProps;
    if (cudaGetDeviceProperties(&devProps, dev) == 0)
    {
        fprintf(q2a, "Using device %d:\n", dev);
        fprintf(q2a, "%s; global mem: %dB; compute v%d.%d; clock: %d kHz\n",
        devProps.name, (int)devProps.totalGlobalMem,
               (int)devProps.major, (int)devProps.minor,
               (int)devProps.clockRate);
    }


    // generate the input array on the host
    Array A = initArrayA();
    int * h_in = A.array;
    const int ARRAY_SIZE = A.size;
    const int ARRAY_BYTES = A.size * sizeof(int);
    
    fprintf(q2a, "Array size is %d\n", ARRAY_SIZE);


    // declare GPU memory pointers
    int * d_in, * d_out, * s_in, * s_out, *prefix_out, *prefix_in;;

    // allocate GPU memory
    cudaMalloc((void **) &d_in, ARRAY_BYTES);
    cudaMalloc((void **) &s_in, ARRAY_BYTES);
    cudaMalloc((void **) &d_out, 10*sizeof(int));
    cudaMalloc((void **) &s_out, 10*sizeof(int));

    // allocate memory for prefix sum, it has only 10 buckets
    cudaMalloc((void **) &prefix_out, 10*sizeof(int));
    cudaMalloc((void **) &prefix_in, 10*sizeof(int));

    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);
    float elapsedTime;

    //Problem 2a - Using Global Memory to get counts
    fprintf(q2a,"Using Global Memory to get counts\n");    

    //fprintf(q2a, "Running global count\n");
    // transfer the input array to the GPU
    cudaMemcpy(d_in, h_in, ARRAY_BYTES, cudaMemcpyHostToDevice);

    cudaEventRecord(start, 0);
    count_bins(d_out, d_in, ARRAY_SIZE, false);
    cudaEventRecord(stop, 0);
    cudaEventSynchronize(stop);
    
    cudaEventElapsedTime(&elapsedTime, start, stop);
    fprintf(q2a, "Using Global memory - average time elapsed: %f\n", elapsedTime);

    // copy back the counts from GPU
    int b[10];
    cudaMemcpy(&b, d_out, 10*sizeof(int), cudaMemcpyDeviceToHost);

    for(int i = 0; i < 10; i++) {
      fprintf(q2a, "Global Memory counts returned by device B[%d]: %d\n", i, b[i]);
    }

    //Problem 2b - Using Shared Memory to get counts
    // transfer the input array to the GPU
    cudaMemcpy(s_in, h_in, ARRAY_BYTES, cudaMemcpyHostToDevice);

    fprintf(q2b, "Array size is %d\n", ARRAY_SIZE);
    fprintf(q2b,"Using Shared Memory to get counts\n");    

    //fprintf(q2b, "Running shared count\n");
    cudaEventRecord(start, 0);
    count_bins(s_out, s_in, ARRAY_SIZE, false);
    cudaEventRecord(stop, 0);
    cudaEventSynchronize(stop);
    
    cudaEventElapsedTime(&elapsedTime, start, stop);
    fprintf(q2b, "Using Shared memory - average time elapsed: %f\n", elapsedTime);

    // copy back the counts from GPU
    int s[10];
    cudaMemcpy(&s, s_out, 10*sizeof(int), cudaMemcpyDeviceToHost);

    for(int i = 0; i < 10; i++) {
      fprintf(q2b, "Shared Memory counts returned by device B[%d]: %d\n", i, s[i]);
    }
    
    // Problem 2c - Using Parallel Prefix SUM to calculate C
    fprintf(q2c, "Array size is %d\n", ARRAY_SIZE);

    // transfer the input scan array to the GPU
    cudaMemcpy(prefix_in, b, 10 * sizeof(int), cudaMemcpyHostToDevice);
 
    fprintf(q2c, "Running Parallel Prefix Sum\n");
    cudaEventRecord(start, 0);
    prefixsum<<<1, 10, 10 * sizeof(int)>>>(prefix_out, prefix_in, 10);
    cudaEventRecord(stop, 0);
    cudaEventSynchronize(stop);
    
    cudaEventElapsedTime(&elapsedTime, start, stop);
    fprintf(q2c, "Using Parallel Prefix Sum - average time elapsed: %f\n", elapsedTime);

    gpuErrorCheck( cudaPeekAtLastError() );
    gpuErrorCheck( cudaDeviceSynchronize() );
 
    // copy back the counts from GPU
    int c[10];
    cudaMemcpy(&c, prefix_out, 10*sizeof(int), cudaMemcpyDeviceToHost);

    for(int i = 0; i < 10; i++) {
      fprintf(q2c, "Parallel Prefix sum returned by device: %d\n", c[i]);
    }

    // free GPU memory allocation
    cudaFree(d_in);
    cudaFree(d_out);
    cudaFree(prefix_out);
    cudaFree(prefix_in);
    cudaFree(s_in);
    cudaFree(s_out);

    return 0;
}


// Reference: https://developer.nvidia.com/blog/gpu-pro-tip-fast-histograms-using-shared-atomics-maxwell


	.file	"tmpxft_002ffdfc_00000000-6_q2.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2035:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9initArrayP5Arraym
	.type	_Z9initArrayP5Arraym, @function
_Z9initArrayP5Arraym:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	leaq	0(,%rsi,4), %rdi
	pushq	%rax
	.cfi_def_cfa_offset 32
	call	malloc@PLT
	xorl	%edx, %edx
	movq	%rbp, 16(%rbx)
	movq	%rax, (%rbx)
	movq	%rdx, 8(%rbx)
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z9initArrayP5Arraym, .-_Z9initArrayP5Arraym
	.globl	_Z11insertArrayP5Arrayi
	.type	_Z11insertArrayP5Arrayi, @function
_Z11insertArrayP5Arrayi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 32
	movq	16(%rdi), %rsi
	cmpq	%rsi, 8(%rdi)
	jne	.L5
	incq	%rsi
	movq	(%rdi), %rdi
	movq	%rsi, 16(%rbx)
	salq	$2, %rsi
	call	realloc@PLT
	movq	%rax, (%rbx)
.L5:
	movq	8(%rbx), %rax
	movq	(%rbx), %rdx
	leaq	1(%rax), %rcx
	movq	%rcx, 8(%rbx)
	movl	%ebp, (%rdx,%rax,4)
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z11insertArrayP5Arrayi, .-_Z11insertArrayP5Arrayi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"r"
.LC1:
	.string	"inp.txt"
.LC2:
	.string	"error"
.LC3:
	.string	"%s"
.LC4:
	.string	" , "
	.text
	.globl	_Z10initArrayAv
	.type	_Z10initArrayAv, @function
_Z10initArrayAv:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	leaq	-49152(%rsp), %r11
	.cfi_def_cfa 11, 49192
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$872, %rsp
	.cfi_def_cfa_offset 50064
	movl	$1, %esi
	leaq	.LC4(%rip), %r12
	movq	%fs:40, %rax
	movq	%rax, 50008(%rsp)
	xorl	%eax, %eax
	movq	%rdi, %rbx
	call	_Z9initArrayP5Arraym
	leaq	.LC0(%rip), %rsi
	leaq	.LC1(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %rbp
	testq	%rax, %rax
	jne	.L9
	leaq	.LC2(%rip), %rdx
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L8
.L9:
	leaq	8(%rsp), %r13
	movq	%rbp, %rcx
	movl	$50000, %edx
	movl	$50000, %esi
	movq	%r13, %rdi
	call	__fgets_chk@PLT
	testq	%rax, %rax
	je	.L18
	movq	%r13, (%rsp)
.L11:
	movq	(%rsp), %rdi
	movq	%rsp, %rdx
	movq	%r12, %rsi
	call	strtok_r@PLT
	movq	%rax, %rdi
	testq	%rax, %rax
	je	.L9
	call	atoi@PLT
	movq	%rbx, %rdi
	movl	%eax, %esi
	call	_Z11insertArrayP5Arrayi
	jmp	.L11
.L18:
	movq	%rbp, %rdi
	call	fclose@PLT
.L8:
	movq	50008(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$50024, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z10initArrayAv, .-_Z10initArrayAv
	.section	.rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC5:
	.string	"GPUassert: %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
	.weak	_Z9gpuAssert9cudaErrorPKcib
	.type	_Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB2030:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L25
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%edi, %ebx
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r8d
	movq	%r12, %rcx
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	testb	%bpl, %bpl
	je	.L19
	movl	%ebx, %edi
	call	exit@PLT
.L19:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
.L25:
	.cfi_restore 3
	.cfi_restore 6
	.cfi_restore 12
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
	.text
	.globl	_Z53__device_stub__Z30global_count_range_bins_kernelPiS_iPiS_i
	.type	_Z53__device_stub__Z30global_count_range_bins_kernelPiS_iPiS_i, @function
_Z53__device_stub__Z30global_count_range_bins_kernelPiS_iPiS_i:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z30global_count_range_bins_kernelPiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L28:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z53__device_stub__Z30global_count_range_bins_kernelPiS_iPiS_i, .-_Z53__device_stub__Z30global_count_range_bins_kernelPiS_iPiS_i
	.globl	_Z30global_count_range_bins_kernelPiS_i
	.type	_Z30global_count_range_bins_kernelPiS_i, @function
_Z30global_count_range_bins_kernelPiS_i:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__Z30global_count_range_bins_kernelPiS_iPiS_i
	.cfi_endproc
.LFE2058:
	.size	_Z30global_count_range_bins_kernelPiS_i, .-_Z30global_count_range_bins_kernelPiS_i
	.globl	_Z52__device_stub__Z29shmem_count_range_bins_kernelPiS_iPiS_i
	.type	_Z52__device_stub__Z29shmem_count_range_bins_kernelPiS_iPiS_i, @function
_Z52__device_stub__Z29shmem_count_range_bins_kernelPiS_iPiS_i:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z29shmem_count_range_bins_kernelPiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L33:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z52__device_stub__Z29shmem_count_range_bins_kernelPiS_iPiS_i, .-_Z52__device_stub__Z29shmem_count_range_bins_kernelPiS_iPiS_i
	.globl	_Z29shmem_count_range_bins_kernelPiS_i
	.type	_Z29shmem_count_range_bins_kernelPiS_i, @function
_Z29shmem_count_range_bins_kernelPiS_i:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z29shmem_count_range_bins_kernelPiS_iPiS_i
	.cfi_endproc
.LFE2060:
	.size	_Z29shmem_count_range_bins_kernelPiS_i, .-_Z29shmem_count_range_bins_kernelPiS_i
	.section	.rodata.str1.1
.LC7:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/manjaripokala/ParallelAlgorithms_Su20/master/hw3/q2.cu"
	.text
	.globl	_Z10count_binsPiS_ib
	.type	_Z10count_binsPiS_ib, @function
_Z10count_binsPiS_ib:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	cvtsi2ssl	%edx, %xmm0
	movl	%ecx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%edx, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	mulss	.LC6(%rip), %xmm0
	call	ceilf@PLT
	testb	%r13b, %r13b
	movabsq	$4294967808, %rdx
	movl	$1, 28(%rsp)
	cvttss2sil	%xmm0, %eax
	movq	%rdx, 20(%rsp)
	movl	$0, %r9d
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	je	.L39
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	movl	$2048, %r8d
	movl	$1, %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	movl	%ebx, %edx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z52__device_stub__Z29shmem_count_range_bins_kernelPiS_iPiS_i
.L39:
	.cfi_restore_state
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	xorl	%r8d, %r8d
	movl	$1, %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	movl	%ebx, %edx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	_Z53__device_stub__Z30global_count_range_bins_kernelPiS_iPiS_i
.L42:
	call	cudaPeekAtLastError@PLT
	movl	$1, %ecx
	movl	$156, %edx
	leaq	.LC7(%rip), %rbx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	movq	%rbx, %rsi
	movl	$1, %ecx
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	%eax, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	movl	$157, %edx
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z9gpuAssert9cudaErrorPKcib
.L38:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z10count_binsPiS_ib, .-_Z10count_binsPiS_ib
	.globl	_Z31__device_stub__Z9prefixsumPiS_iPiS_i
	.type	_Z31__device_stub__Z9prefixsumPiS_iPiS_i, @function
_Z31__device_stub__Z9prefixsumPiS_iPiS_i:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9prefixsumPiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L44:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L46
	call	__stack_chk_fail@PLT
.L46:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z31__device_stub__Z9prefixsumPiS_iPiS_i, .-_Z31__device_stub__Z9prefixsumPiS_iPiS_i
	.globl	_Z9prefixsumPiS_i
	.type	_Z9prefixsumPiS_i, @function
_Z9prefixsumPiS_i:
.LFB2062:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z9prefixsumPiS_iPiS_i
	.cfi_endproc
.LFE2062:
	.size	_Z9prefixsumPiS_i, .-_Z9prefixsumPiS_i
	.section	.rodata.str1.1
.LC8:
	.string	"w"
.LC9:
	.string	"q2a.txt"
.LC10:
	.string	"q2b.txt"
.LC11:
	.string	"q2c.txt"
.LC12:
	.string	"error: no devices supporting CUDA.\n"
.LC13:
	.string	"Using device %d:\n"
.LC14:
	.string	"%s; global mem: %dB; compute v%d.%d; clock: %d kHz\n"
.LC15:
	.string	"Array size is %d\n"
.LC16:
	.string	"Using Global Memory to get counts\n"
.LC17:
	.string	"Using Global memory - average time elapsed: %f\n"
.LC18:
	.string	"Global Memory counts returned by device B[%d]: %d\n"
.LC19:
	.string	"Using Shared Memory to get counts\n"
.LC20:
	.string	"Using Shared memory - average time elapsed: %f\n"
.LC21:
	.string	"Shared Memory counts returned by device B[%d]: %d\n"
.LC22:
	.string	"Running Parallel Prefix Sum\n"
.LC23:
	.string	"Using Parallel Prefix Sum - average time elapsed: %f\n"
.LC24:
	.string	"Parallel Prefix sum returned by device: %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC9(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	.LC8(%rip), %rbx
	movq	%rbx, %rsi
	subq	$1320, %rsp
	.cfi_def_cfa_offset 1376
	movq	%fs:40, %rax
	movq	%rax, 1304(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	movq	%rbx, %rsi
	leaq	.LC10(%rip), %rdi
	movq	%rax, (%rsp)
	call	fopen@PLT
	movq	%rbx, %rsi
	leaq	.LC11(%rip), %rdi
	movq	%rax, %r12
	call	fopen@PLT
	leaq	32(%rsp), %rdi
	movq	%rax, 8(%rsp)
	call	cudaGetDeviceCount@PLT
	cmpl	$0, 32(%rsp)
	jne	.L50
	movq	(%rsp), %rdi
	leaq	.LC12(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L50:
	xorl	%edi, %edi
	leaq	272(%rsp), %rbx
	call	cudaSetDevice@PLT
	xorl	%esi, %esi
	movq	%rbx, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	testl	%eax, %eax
	jne	.L51
	movq	(%rsp), %rdi
	xorl	%ecx, %ecx
	movl	$2, %esi
	leaq	.LC13(%rip), %rdx
	call	__fprintf_chk@PLT
	movl	620(%rsp), %eax
	movq	%rbx, %rcx
	leaq	.LC14(%rip), %rdx
	movl	$2, %esi
	pushq	%rax
	.cfi_def_cfa_offset 1384
	movl	644(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 1392
	movl	648(%rsp), %r9d
	xorl	%eax, %eax
	movl	576(%rsp), %r8d
	movq	16(%rsp), %rdi
	call	__fprintf_chk@PLT
	popq	%rax
	.cfi_def_cfa_offset 1384
	popq	%rdx
	.cfi_def_cfa_offset 1376
.L51:
	leaq	128(%rsp), %rdi
	xorl	%ebp, %ebp
	leaq	.LC18(%rip), %r15
	call	_Z10initArrayAv
	movq	(%rsp), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	movq	144(%rsp), %rbx
	leaq	.LC15(%rip), %rdx
	movq	128(%rsp), %r14
	movl	%ebx, %ecx
	movl	%ebx, %r13d
	sall	$2, %ebx
	call	__fprintf_chk@PLT
	movslq	%ebx, %rbx
	leaq	40(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$40, %esi
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movl	$40, %esi
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movl	$40, %esi
	call	cudaMalloc@PLT
	movl	$40, %esi
	leaq	80(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	88(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	96(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	(%rsp), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC16(%rip), %rdx
	call	__fprintf_chk@PLT
	movq	40(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rsi
	xorl	%ecx, %ecx
	movl	%r13d, %edx
	movq	48(%rsp), %rdi
	call	_Z10count_binsPiS_ib
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	96(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	leaq	36(%rsp), %rax
	movq	96(%rsp), %rdx
	movq	88(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	cudaEventElapsedTime@PLT
	movq	(%rsp), %rdi
	movl	$2, %esi
	movb	$1, %al
	leaq	.LC17(%rip), %rdx
	cvtss2sd	36(%rsp), %xmm0
	call	__fprintf_chk@PLT
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	leaq	152(%rsp), %rax
	movl	$40, %edx
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	cudaMemcpy@PLT
.L52:
	movl	152(%rsp,%rbp,4), %r8d
	movq	(%rsp), %rdi
	movl	%ebp, %ecx
	xorl	%eax, %eax
	movq	%r15, %rdx
	movl	$2, %esi
	incq	%rbp
	call	__fprintf_chk@PLT
	cmpq	$10, %rbp
	jne	.L52
	movq	56(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	leaq	192(%rsp), %rbx
	xorl	%r14d, %r14d
	leaq	.LC21(%rip), %rbp
	call	cudaMemcpy@PLT
	movl	%r13d, %ecx
	movl	$2, %esi
	movq	%r12, %rdi
	leaq	.LC15(%rip), %rdx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$2, %esi
	movq	%r12, %rdi
	xorl	%eax, %eax
	leaq	.LC19(%rip), %rdx
	call	__fprintf_chk@PLT
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rsi
	xorl	%ecx, %ecx
	movl	%r13d, %edx
	movq	64(%rsp), %rdi
	call	_Z10count_binsPiS_ib
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	96(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	96(%rsp), %rdx
	movq	88(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movl	$2, %esi
	movq	%r12, %rdi
	movb	$1, %al
	leaq	.LC20(%rip), %rdx
	cvtss2sd	36(%rsp), %xmm0
	call	__fprintf_chk@PLT
	movq	64(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$40, %edx
	call	cudaMemcpy@PLT
.L53:
	movl	(%rbx,%r14,4), %r8d
	movl	%r14d, %ecx
	movq	%rbp, %rdx
	movl	$2, %esi
	movq	%r12, %rdi
	xorl	%eax, %eax
	incq	%r14
	call	__fprintf_chk@PLT
	cmpq	$10, %r14
	jne	.L53
	movq	8(%rsp), %rdi
	movl	%r13d, %ecx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC15(%rip), %rdx
	call	__fprintf_chk@PLT
	movq	24(%rsp), %rsi
	movq	80(%rsp), %rdi
	movl	$1, %ecx
	movl	$40, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	leaq	.LC22(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$2147483653, %edx
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rdi
	addq	%rdx, %rdx
	movl	$40, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 116(%rsp)
	movl	$1, 124(%rsp)
	movq	%rdi, 104(%rsp)
	movl	$1, 112(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	movq	80(%rsp), %rsi
	movq	72(%rsp), %rdi
	movl	$10, %edx
	call	_Z31__device_stub__Z9prefixsumPiS_iPiS_i
.L54:
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	leaq	.LC7(%rip), %rbx
	leaq	232(%rsp), %rbp
	leaq	.LC24(%rip), %r12
	call	cudaEventRecord@PLT
	movq	96(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	96(%rsp), %rdx
	movq	88(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	8(%rsp), %rdi
	leaq	.LC23(%rip), %rdx
	movb	$1, %al
	movl	$2, %esi
	cvtss2sd	36(%rsp), %xmm0
	call	__fprintf_chk@PLT
	call	cudaPeekAtLastError@PLT
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$281, %edx
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movq	%rbx, %rsi
	movl	$1, %ecx
	xorl	%ebx, %ebx
	movl	%eax, %edi
	movl	$282, %edx
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$40, %edx
	call	cudaMemcpy@PLT
.L55:
	movl	0(%rbp,%rbx,4), %ecx
	movq	8(%rsp), %rdi
	movq	%r12, %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	incq	%rbx
	call	__fprintf_chk@PLT
	cmpq	$10, %rbx
	jne	.L55
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	1304(%rsp), %rax
	subq	%fs:40, %rax
	je	.L56
	call	__stack_chk_fail@PLT
.L56:
	addq	$1320, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	main, .-main
	.section	.rodata.str1.1
.LC25:
	.string	"_Z9prefixsumPiS_i"
.LC26:
	.string	"_Z29shmem_count_range_bins_kernelPiS_i"
.LC27:
	.string	"_Z30global_count_range_bins_kernelPiS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2064:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC25(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9prefixsumPiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC26(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z29shmem_count_range_bins_kernelPiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC27(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z30global_count_range_bins_kernelPiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2064:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC6:
	.long	989855744
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <assert.h>
#include <math.h>

//Reading array A from input file inp.txt
typedef struct {
    int *array;
    size_t used;
    size_t size;
} Array;

void initArray(Array *a, size_t initialSize) {
    a->array = (int*) malloc(initialSize * sizeof(int));
    a->used = 0;
    a->size = initialSize;
}

void insertArray(Array *a, int element) {
    if (a->used == a->size) {
        a->size += 1;
        a->array =(int*) realloc(a->array, a->size * sizeof(int));
    }
    a->array[a->used++] = element;
}

Array initArrayA(){
    FILE *fp;
    char str[50000];
    Array a;
    initArray(&a, 1);

    /* opening file for reading */
    fp = fopen("inp.txt" , "r");
    if(fp == NULL) {
        printf("%s","error");
        return a;
    }
    while( fgets (str, 50000, fp)!=NULL ) {
        /* writing content to stdout */
//        printf("%s\n", str);
        char* token;
        char* rest = str;

        while ((token = strtok_r(rest, " , ", &rest)))
            insertArray(&a, atoi(token));
    }
    fclose(fp);
    return a;
}

//Asserts for GPU errors
#define gpuErrorCheck(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
   if (code != hipSuccess) 
   {
      printf("GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}


__global__ void global_count_range_bins_kernel(int * d_out, int * d_in, int size)
{
 
    int myId = threadIdx.x + blockDim.x * blockIdx.x;
 
    // stride is the total number of threads in the grid
    // Using stride increases the performance and benefits with scalability & thread reusage
    int stride = blockDim.x * gridDim.x;
    
    // do counts in global mem
    for (; myId < size; myId += stride)
    {
        atomicAdd(&(d_out[d_in[myId]/100]), 1);
        __syncthreads();        // make sure all adds at one stage are done!
    }

}

__global__ void shmem_count_range_bins_kernel(int * d_out, int * d_in, int size)
{
    extern __shared__ int sdata[];

    int myId = threadIdx.x + blockDim.x * blockIdx.x;
    int tid  = threadIdx.x;
 
    // load shared mem from global mem
    sdata[tid] = 0;
    __syncthreads();  
 
    // stride is the total number of threads in the grid
    // Using stride increases the performance and benefits with scalability & thread reusage
    int stride = blockDim.x * gridDim.x;
    
    // do counts in shared mem
    for (; myId < size; myId += stride)
    {
        atomicAdd(&(sdata[d_in[myId]/100]), 1);
        __syncthreads();               // make sure all adds at one stage are done!
    }
 
    // assumes that threads per block size is atleast 10
        atomicAdd(&d_out[tid], sdata[tid]);
}

//kernel to perform parallel prefix sum
//assumes only 1 block (1 block can be utilized since we have only 10 elements)
__global__ void prefixsum(int *d_out, int * d_in, int size)
{
  extern __shared__ int sh_mem[];
  
  int tid = threadIdx.x;
  int myId = blockIdx.x * blockDim.x + threadIdx.x;
 
  sh_mem[tid] = d_in[myId];
  
  __syncthreads();
 
  if (myId < size)
  {
      for (int d = 1; d < blockDim.x; d *=2)
      {
        if (tid >= d) {
          sh_mem[tid] += sh_mem[tid - d];
        }
        __syncthreads();
      }
  }
  d_out[myId] = sh_mem[tid];
}


//Function to call corresponding kernel based on memory usage
void count_bins(int * d_out, int * d_in,
    int size, bool usesSharedMemory)
    {
    const int maxThreadsPerBlock = 512;
    int threads = maxThreadsPerBlock;

    // handles non power of 2 inputs
    int blocks = ceil(float(size) / float(maxThreadsPerBlock));

    if (usesSharedMemory)
    {
        //fprintf(q2a, "shared kernel in count \n");
        shmem_count_range_bins_kernel<<<blocks, threads, threads * sizeof(int)>>>
            (d_out, d_in, size);
    }
    else
    {
        //fprintf(q2a, "global kernel in count \n");
        global_count_range_bins_kernel<<<blocks, threads>>>(d_out, d_in, size);
        gpuErrorCheck( hipPeekAtLastError() );
        gpuErrorCheck( hipDeviceSynchronize() );
    }

}


int main(int argc, char **argv)
{
    FILE *q2a;
    FILE *q2b;
    FILE *q2c;
    q2a = fopen("q2a.txt", "w");
    q2b = fopen("q2b.txt", "w");
    q2c = fopen("q2c.txt", "w");

    int deviceCount;
    hipGetDeviceCount(&deviceCount);
    if (deviceCount == 0) {
        fprintf(q2a, "error: no devices supporting CUDA.\n");
        exit(EXIT_FAILURE);
    }
    int dev = 0;
    hipSetDevice(dev);

    hipDeviceProp_t devProps;
    if (hipGetDeviceProperties(&devProps, dev) == 0)
    {
        fprintf(q2a, "Using device %d:\n", dev);
        fprintf(q2a, "%s; global mem: %dB; compute v%d.%d; clock: %d kHz\n",
        devProps.name, (int)devProps.totalGlobalMem,
               (int)devProps.major, (int)devProps.minor,
               (int)devProps.clockRate);
    }


    // generate the input array on the host
    Array A = initArrayA();
    int * h_in = A.array;
    const int ARRAY_SIZE = A.size;
    const int ARRAY_BYTES = A.size * sizeof(int);
    
    fprintf(q2a, "Array size is %d\n", ARRAY_SIZE);


    // declare GPU memory pointers
    int * d_in, * d_out, * s_in, * s_out, *prefix_out, *prefix_in;;

    // allocate GPU memory
    hipMalloc((void **) &d_in, ARRAY_BYTES);
    hipMalloc((void **) &s_in, ARRAY_BYTES);
    hipMalloc((void **) &d_out, 10*sizeof(int));
    hipMalloc((void **) &s_out, 10*sizeof(int));

    // allocate memory for prefix sum, it has only 10 buckets
    hipMalloc((void **) &prefix_out, 10*sizeof(int));
    hipMalloc((void **) &prefix_in, 10*sizeof(int));

    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);
    float elapsedTime;

    //Problem 2a - Using Global Memory to get counts
    fprintf(q2a,"Using Global Memory to get counts\n");    

    //fprintf(q2a, "Running global count\n");
    // transfer the input array to the GPU
    hipMemcpy(d_in, h_in, ARRAY_BYTES, hipMemcpyHostToDevice);

    hipEventRecord(start, 0);
    count_bins(d_out, d_in, ARRAY_SIZE, false);
    hipEventRecord(stop, 0);
    hipEventSynchronize(stop);
    
    hipEventElapsedTime(&elapsedTime, start, stop);
    fprintf(q2a, "Using Global memory - average time elapsed: %f\n", elapsedTime);

    // copy back the counts from GPU
    int b[10];
    hipMemcpy(&b, d_out, 10*sizeof(int), hipMemcpyDeviceToHost);

    for(int i = 0; i < 10; i++) {
      fprintf(q2a, "Global Memory counts returned by device B[%d]: %d\n", i, b[i]);
    }

    //Problem 2b - Using Shared Memory to get counts
    // transfer the input array to the GPU
    hipMemcpy(s_in, h_in, ARRAY_BYTES, hipMemcpyHostToDevice);

    fprintf(q2b, "Array size is %d\n", ARRAY_SIZE);
    fprintf(q2b,"Using Shared Memory to get counts\n");    

    //fprintf(q2b, "Running shared count\n");
    hipEventRecord(start, 0);
    count_bins(s_out, s_in, ARRAY_SIZE, false);
    hipEventRecord(stop, 0);
    hipEventSynchronize(stop);
    
    hipEventElapsedTime(&elapsedTime, start, stop);
    fprintf(q2b, "Using Shared memory - average time elapsed: %f\n", elapsedTime);

    // copy back the counts from GPU
    int s[10];
    hipMemcpy(&s, s_out, 10*sizeof(int), hipMemcpyDeviceToHost);

    for(int i = 0; i < 10; i++) {
      fprintf(q2b, "Shared Memory counts returned by device B[%d]: %d\n", i, s[i]);
    }
    
    // Problem 2c - Using Parallel Prefix SUM to calculate C
    fprintf(q2c, "Array size is %d\n", ARRAY_SIZE);

    // transfer the input scan array to the GPU
    hipMemcpy(prefix_in, b, 10 * sizeof(int), hipMemcpyHostToDevice);
 
    fprintf(q2c, "Running Parallel Prefix Sum\n");
    hipEventRecord(start, 0);
    prefixsum<<<1, 10, 10 * sizeof(int)>>>(prefix_out, prefix_in, 10);
    hipEventRecord(stop, 0);
    hipEventSynchronize(stop);
    
    hipEventElapsedTime(&elapsedTime, start, stop);
    fprintf(q2c, "Using Parallel Prefix Sum - average time elapsed: %f\n", elapsedTime);

    gpuErrorCheck( hipPeekAtLastError() );
    gpuErrorCheck( hipDeviceSynchronize() );
 
    // copy back the counts from GPU
    int c[10];
    hipMemcpy(&c, prefix_out, 10*sizeof(int), hipMemcpyDeviceToHost);

    for(int i = 0; i < 10; i++) {
      fprintf(q2c, "Parallel Prefix sum returned by device: %d\n", c[i]);
    }

    // free GPU memory allocation
    hipFree(d_in);
    hipFree(d_out);
    hipFree(prefix_out);
    hipFree(prefix_in);
    hipFree(s_in);
    hipFree(s_out);

    return 0;
}


// Reference: https://developer.nvidia.com/blog/gpu-pro-tip-fast-histograms-using-shared-atomics-maxwell


	.text
	.file	"q2.hip"
	.globl	_Z9initArrayP5Arraym            # -- Begin function _Z9initArrayP5Arraym
	.type	_Z9initArrayP5Arraym,@function
_Z9initArrayP5Arraym:                   # @_Z9initArrayP5Arraym
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	leaq	(,%rsi,4), %rdi
	callq	malloc
	movq	%rax, (%r14)
	movq	$0, 8(%r14)
	movq	%rbx, 16(%r14)
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z9initArrayP5Arraym, .Lfunc_end0-_Z9initArrayP5Arraym
	.cfi_endproc
                                        # -- End function
	.globl	_Z11insertArrayP5Arrayi         # -- Begin function _Z11insertArrayP5Arrayi
	.type	_Z11insertArrayP5Arrayi,@function
_Z11insertArrayP5Arrayi:                # @_Z11insertArrayP5Arrayi
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%esi, %ebx
	movq	%rdi, %r14
	movq	(%rdi), %rax
	movq	8(%rdi), %rcx
	cmpq	16(%rdi), %rcx
	jne	.LBB1_2
# %bb.1:
	leaq	1(%rcx), %rdx
	movq	%rdx, 16(%r14)
	leaq	4(,%rcx,4), %rsi
	movq	%rax, %rdi
	callq	realloc
	movq	%rax, (%r14)
	movq	8(%r14), %rcx
.LBB1_2:
	leaq	1(%rcx), %rdx
	movq	%rdx, 8(%r14)
	movl	%ebx, (%rax,%rcx,4)
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z11insertArrayP5Arrayi, .Lfunc_end1-_Z11insertArrayP5Arrayi
	.cfi_endproc
                                        # -- End function
	.globl	_Z10initArrayAv                 # -- Begin function _Z10initArrayAv
	.type	_Z10initArrayAv,@function
_Z10initArrayAv:                        # @_Z10initArrayAv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$50024, %rsp                    # imm = 0xC368
	.cfi_def_cfa_offset 50064
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	$4, %edi
	callq	malloc
	movq	%rax, (%rbx)
	movq	$0, 8(%rbx)
	movq	$1, 16(%rbx)
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB2_9
# %bb.1:                                # %.preheader
	movq	%rax, %r14
	leaq	16(%rsp), %r15
	movq	%r15, %rdi
	movl	$50000, %esi                    # imm = 0xC350
	movq	%rax, %rdx
	callq	fgets
	testq	%rax, %rax
	je	.LBB2_7
# %bb.2:
	leaq	8(%rsp), %r12
.LBB2_3:                                # %.lr.ph7
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_5 Depth 2
	movq	%r15, 8(%rsp)
	movl	$.L.str.4, %esi
	movq	%r15, %rdi
.LBB2_5:                                # %.lr.ph
                                        #   Parent Loop BB2_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%r12, %rdx
	callq	strtok_r
	testq	%rax, %rax
	je	.LBB2_6
# %bb.4:                                # %.lr.ph
                                        #   in Loop: Header=BB2_5 Depth=2
	movq	%rax, %rdi
	callq	atoi
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_Z11insertArrayP5Arrayi
	movq	8(%rsp), %rdi
	movl	$.L.str.4, %esi
	jmp	.LBB2_5
.LBB2_6:                                # %._crit_edge
                                        #   in Loop: Header=BB2_3 Depth=1
	movq	%r15, %rdi
	movl	$50000, %esi                    # imm = 0xC350
	movq	%r14, %rdx
	callq	fgets
	testq	%rax, %rax
	jne	.LBB2_3
.LBB2_7:                                # %._crit_edge8
	movq	%r14, %rdi
	callq	fclose
	jmp	.LBB2_8
.LBB2_9:
	movl	$.L.str.2, %edi
	movl	$.L.str.3, %esi
	xorl	%eax, %eax
	callq	printf
.LBB2_8:                                # %._crit_edge8
	movq	%rbx, %rax
	addq	$50024, %rsp                    # imm = 0xC368
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z10initArrayAv, .Lfunc_end2-_Z10initArrayAv
	.cfi_endproc
                                        # -- End function
	.globl	_Z45__device_stub__global_count_range_bins_kernelPiS_i # -- Begin function _Z45__device_stub__global_count_range_bins_kernelPiS_i
	.type	_Z45__device_stub__global_count_range_bins_kernelPiS_i,@function
_Z45__device_stub__global_count_range_bins_kernelPiS_i: # @_Z45__device_stub__global_count_range_bins_kernelPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z30global_count_range_bins_kernelPiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z45__device_stub__global_count_range_bins_kernelPiS_i, .Lfunc_end3-_Z45__device_stub__global_count_range_bins_kernelPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z44__device_stub__shmem_count_range_bins_kernelPiS_i # -- Begin function _Z44__device_stub__shmem_count_range_bins_kernelPiS_i
	.type	_Z44__device_stub__shmem_count_range_bins_kernelPiS_i,@function
_Z44__device_stub__shmem_count_range_bins_kernelPiS_i: # @_Z44__device_stub__shmem_count_range_bins_kernelPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z29shmem_count_range_bins_kernelPiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z44__device_stub__shmem_count_range_bins_kernelPiS_i, .Lfunc_end4-_Z44__device_stub__shmem_count_range_bins_kernelPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__prefixsumPiS_i # -- Begin function _Z24__device_stub__prefixsumPiS_i
	.type	_Z24__device_stub__prefixsumPiS_i,@function
_Z24__device_stub__prefixsumPiS_i:      # @_Z24__device_stub__prefixsumPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9prefixsumPiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z24__device_stub__prefixsumPiS_i, .Lfunc_end5-_Z24__device_stub__prefixsumPiS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z10count_binsPiS_ib
.LCPI6_0:
	.long	0x3b000000                      # float 0.001953125
	.text
	.globl	_Z10count_binsPiS_ib
	.type	_Z10count_binsPiS_ib,@function
_Z10count_binsPiS_ib:                   # @_Z10count_binsPiS_ib
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movl	%edx, %ebx
	movq	%rsi, %r14
	cvtsi2ss	%edx, %xmm0
	movq	%rdi, %r15
	movabsq	$4294967808, %r12               # imm = 0x100000200
	mulss	.LCPI6_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %eax
	leaq	(%rax,%r12), %rdi
	addq	$-512, %rdi                     # imm = 0xFE00
	testl	%ebp, %ebp
	je	.LBB6_3
# %bb.1:
	movl	$2048, %r8d                     # imm = 0x800
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_10
# %bb.2:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z44__device_stub__shmem_count_range_bins_kernelPiS_i # TAILCALL
.LBB6_3:
	.cfi_def_cfa_offset 48
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_5
# %bb.4:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebx, %edx
	callq	_Z45__device_stub__global_count_range_bins_kernelPiS_i
.LBB6_5:
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB6_6
# %bb.8:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB6_9
.LBB6_10:                               # %_Z9gpuAssert10hipError_tPKcib.exit20
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB6_6:
	.cfi_def_cfa_offset 48
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.23, %edi
	movl	$.L.str.5, %edx
	movq	%rax, %rsi
	movl	$156, %ecx
	jmp	.LBB6_7
.LBB6_9:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.23, %edi
	movl	$.L.str.5, %edx
	movq	%rax, %rsi
	movl	$157, %ecx
.LBB6_7:
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %edi
	callq	exit
.Lfunc_end6:
	.size	_Z10count_binsPiS_ib, .Lfunc_end6-_Z10count_binsPiS_ib
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1752, %rsp                     # imm = 0x6D8
	.cfi_def_cfa_offset 1808
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.L.str.6, %edi
	movl	$.L.str.7, %esi
	callq	fopen
	movq	%rax, %r12
	movl	$.L.str.8, %edi
	movl	$.L.str.7, %esi
	callq	fopen
	movq	%rax, %r14
	movl	$.L.str.9, %edi
	movl	$.L.str.7, %esi
	callq	fopen
	movq	%rax, %rbx
	leaq	108(%rsp), %r15
	movq	%r15, %rdi
	callq	hipGetDeviceCount
	cmpl	$0, (%r15)
	je	.LBB7_17
# %bb.1:
	xorl	%edi, %edi
	callq	hipSetDevice
	leaq	280(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	jne	.LBB7_3
# %bb.2:
	movl	$.L.str.11, %esi
	movq	%r12, %rdi
	xorl	%edx, %edx
	xorl	%eax, %eax
	callq	fprintf
	leaq	280(%rsp), %rdx
	movl	360(%rdx), %r8d
	movl	364(%rdx), %r9d
	movl	288(%rdx), %ecx
	movl	348(%rdx), %eax
	movl	%eax, (%rsp)
	movl	$.L.str.12, %esi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	fprintf
.LBB7_3:
	leaq	256(%rsp), %r15
	movq	%r15, %rdi
	callq	_Z10initArrayAv
	movq	(%r15), %rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movl	16(%r15), %r13d
	leal	(,%r13,4), %ebp
	movl	$.L.str.13, %esi
	movq	%r12, %rdi
	movl	%r13d, %edx
	xorl	%eax, %eax
	callq	fprintf
	movslq	%ebp, %r15
	leaq	96(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	64(%rsp), %rdi
	movl	$40, %esi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movl	$40, %esi
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movl	$40, %esi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movl	$40, %esi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movl	$.L.str.14, %edi
	movl	$34, %esi
	movl	$1, %edx
	movq	%r12, %rcx
	callq	fwrite@PLT
	movq	(%rbp), %rdi
	movq	72(%rsp), %rsi                  # 8-byte Reload
	movq	%r15, 80(%rsp)                  # 8-byte Spill
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	64(%rsp), %rax
	movq	(%rax), %rdi
	movq	(%rbp), %rsi
	movq	%r13, 88(%rsp)                  # 8-byte Spill
	movl	%r13d, %edx
	xorl	%ecx, %ecx
	callq	_Z10count_binsPiS_ib
	leaq	8(%rsp), %r15
	movq	(%r15), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r15), %rdi
	callq	hipEventSynchronize
	leaq	16(%rsp), %rax
	movq	(%rax), %rsi
	movq	(%r15), %rdx
	leaq	28(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%r15), %xmm0
	movl	$.L.str.15, %esi
	movq	%r12, %rdi
	movb	$1, %al
	callq	fprintf
	leaq	64(%rsp), %rax
	movq	(%rax), %rsi
	leaq	112(%rsp), %rdi
	movl	$40, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%r15d, %r15d
.LBB7_4:                                # =>This Inner Loop Header: Depth=1
	movl	112(%rsp,%r15,4), %ecx
	movl	$.L.str.16, %esi
	movq	%r12, %rdi
	movl	%r15d, %edx
	xorl	%eax, %eax
	callq	fprintf
	incq	%r15
	cmpq	$10, %r15
	jne	.LBB7_4
# %bb.5:
	movq	56(%rsp), %rdi
	movq	72(%rsp), %rsi                  # 8-byte Reload
	movq	80(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.13, %esi
	movq	%r14, %rdi
	movq	88(%rsp), %r12                  # 8-byte Reload
	movl	%r12d, %edx
	xorl	%eax, %eax
	callq	fprintf
	movl	$.L.str.17, %edi
	movl	$34, %esi
	movl	$1, %edx
	movq	%r14, %rcx
	callq	fwrite@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	48(%rsp), %rdi
	movq	56(%rsp), %rsi
	movl	%r12d, %edx
	xorl	%ecx, %ecx
	callq	_Z10count_binsPiS_ib
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	28(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15), %xmm0
	movl	$.L.str.18, %esi
	movq	%r14, %rdi
	movb	$1, %al
	callq	fprintf
	movq	48(%rsp), %rsi
	leaq	208(%rsp), %rdi
	movl	$40, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%r15d, %r15d
.LBB7_6:                                # =>This Inner Loop Header: Depth=1
	movl	208(%rsp,%r15,4), %ecx
	movl	$.L.str.19, %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	xorl	%eax, %eax
	callq	fprintf
	incq	%r15
	cmpq	$10, %r15
	jne	.LBB7_6
# %bb.7:
	movl	$.L.str.13, %esi
	movq	%rbx, %rdi
	movl	%r12d, %edx
	xorl	%eax, %eax
	callq	fprintf
	movq	32(%rsp), %rdi
	leaq	112(%rsp), %rsi
	movl	$40, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.20, %edi
	movl	$28, %esi
	movl	$1, %edx
	movq	%rbx, %rcx
	callq	fwrite@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	9(%rdi), %rdx
	movl	$40, %r8d
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_9
# %bb.8:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movl	$10, %edx
	callq	_Z24__device_stub__prefixsumPiS_i
.LBB7_9:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	28(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str.21, %esi
	movq	%rbx, %rdi
	movb	$1, %al
	callq	fprintf
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB7_10
# %bb.12:                               # %_Z9gpuAssert10hipError_tPKcib.exit
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB7_13
# %bb.14:                               # %_Z9gpuAssert10hipError_tPKcib.exit44
	movq	40(%rsp), %rsi
	leaq	160(%rsp), %rdi
	movl	$40, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%r14d, %r14d
.LBB7_15:                               # =>This Inner Loop Header: Depth=1
	movl	160(%rsp,%r14,4), %edx
	movl	$.L.str.22, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	fprintf
	incq	%r14
	cmpq	$10, %r14
	jne	.LBB7_15
# %bb.16:
	movq	96(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$1752, %rsp                     # imm = 0x6D8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB7_17:
	.cfi_def_cfa_offset 1808
	movl	$.L.str.10, %edi
	movl	$35, %esi
	movl	$1, %edx
	movq	%r12, %rcx
	callq	fwrite@PLT
	movl	$1, %edi
	callq	exit
.LBB7_10:
	movl	%eax, %ebp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.23, %edi
	movl	$.L.str.5, %edx
	movq	%rax, %rsi
	movl	$281, %ecx                      # imm = 0x119
	jmp	.LBB7_11
.LBB7_13:
	movl	%eax, %ebp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.23, %edi
	movl	$.L.str.5, %edx
	movq	%rax, %rsi
	movl	$282, %ecx                      # imm = 0x11A
.LBB7_11:
	xorl	%eax, %eax
	callq	printf
	movl	%ebp, %edi
	callq	exit
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z30global_count_range_bins_kernelPiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z29shmem_count_range_bins_kernelPiS_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9prefixsumPiS_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"inp.txt"
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"r"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%s"
	.size	.L.str.2, 3

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"error"
	.size	.L.str.3, 6

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	" , "
	.size	.L.str.4, 4

	.type	_Z30global_count_range_bins_kernelPiS_i,@object # @_Z30global_count_range_bins_kernelPiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z30global_count_range_bins_kernelPiS_i
	.p2align	3, 0x0
_Z30global_count_range_bins_kernelPiS_i:
	.quad	_Z45__device_stub__global_count_range_bins_kernelPiS_i
	.size	_Z30global_count_range_bins_kernelPiS_i, 8

	.type	_Z29shmem_count_range_bins_kernelPiS_i,@object # @_Z29shmem_count_range_bins_kernelPiS_i
	.globl	_Z29shmem_count_range_bins_kernelPiS_i
	.p2align	3, 0x0
_Z29shmem_count_range_bins_kernelPiS_i:
	.quad	_Z44__device_stub__shmem_count_range_bins_kernelPiS_i
	.size	_Z29shmem_count_range_bins_kernelPiS_i, 8

	.type	_Z9prefixsumPiS_i,@object       # @_Z9prefixsumPiS_i
	.globl	_Z9prefixsumPiS_i
	.p2align	3, 0x0
_Z9prefixsumPiS_i:
	.quad	_Z24__device_stub__prefixsumPiS_i
	.size	_Z9prefixsumPiS_i, 8

	.type	.L.str.5,@object                # @.str.5
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.5:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/manjaripokala/ParallelAlgorithms_Su20/master/hw3/q2.hip"
	.size	.L.str.5, 118

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"q2a.txt"
	.size	.L.str.6, 8

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"w"
	.size	.L.str.7, 2

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"q2b.txt"
	.size	.L.str.8, 8

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"q2c.txt"
	.size	.L.str.9, 8

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"error: no devices supporting CUDA.\n"
	.size	.L.str.10, 36

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Using device %d:\n"
	.size	.L.str.11, 18

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"%s; global mem: %dB; compute v%d.%d; clock: %d kHz\n"
	.size	.L.str.12, 52

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"Array size is %d\n"
	.size	.L.str.13, 18

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Using Global Memory to get counts\n"
	.size	.L.str.14, 35

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Using Global memory - average time elapsed: %f\n"
	.size	.L.str.15, 48

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"Global Memory counts returned by device B[%d]: %d\n"
	.size	.L.str.16, 51

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"Using Shared Memory to get counts\n"
	.size	.L.str.17, 35

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"Using Shared memory - average time elapsed: %f\n"
	.size	.L.str.18, 48

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"Shared Memory counts returned by device B[%d]: %d\n"
	.size	.L.str.19, 51

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"Running Parallel Prefix Sum\n"
	.size	.L.str.20, 29

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"Using Parallel Prefix Sum - average time elapsed: %f\n"
	.size	.L.str.21, 54

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"Parallel Prefix sum returned by device: %d\n"
	.size	.L.str.22, 44

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"GPUassert: %s %s %d\n"
	.size	.L.str.23, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z30global_count_range_bins_kernelPiS_i"
	.size	.L__unnamed_1, 40

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z29shmem_count_range_bins_kernelPiS_i"
	.size	.L__unnamed_2, 39

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z9prefixsumPiS_i"
	.size	.L__unnamed_3, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z45__device_stub__global_count_range_bins_kernelPiS_i
	.addrsig_sym _Z44__device_stub__shmem_count_range_bins_kernelPiS_i
	.addrsig_sym _Z24__device_stub__prefixsumPiS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z30global_count_range_bins_kernelPiS_i
	.addrsig_sym _Z29shmem_count_range_bins_kernelPiS_i
	.addrsig_sym _Z9prefixsumPiS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z30global_count_range_bins_kernelPiS_i ; -- Begin function _Z30global_count_range_bins_kernelPiS_i
	.globl	_Z30global_count_range_bins_kernelPiS_i
	.p2align	8
	.type	_Z30global_count_range_bins_kernelPiS_i,@function
_Z30global_count_range_bins_kernelPiS_i: ; @_Z30global_count_range_bins_kernelPiS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b32 s8, s[0:1], 0x10
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s2, s[2:3], 0x0
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v0, 1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s9
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_ashr_i32 s3, s2, 31
	s_lshl_b64 s[6:7], s[2:3], 2
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v4, v[2:3], off
	v_add_nc_u32_e32 v1, s2, v1
	v_add_co_u32 v2, s0, v2, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
	s_waitcnt vmcnt(0)
	v_mul_hi_i32 v4, 0x51eb851f, v4
	v_lshrrev_b32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v4, 5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v4, v5
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s8, v1
	global_atomic_add_u32 v[4:5], v0, off
	s_waitcnt_vscnt null, 0x0
	s_or_b32 s1, vcc_lo, s1
	s_barrier
	buffer_gl0_inv
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z30global_count_range_bins_kernelPiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z30global_count_range_bins_kernelPiS_i, .Lfunc_end0-_Z30global_count_range_bins_kernelPiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z29shmem_count_range_bins_kernelPiS_i ; -- Begin function _Z29shmem_count_range_bins_kernelPiS_i
	.globl	_Z29shmem_count_range_bins_kernelPiS_i
	.p2align	8
	.type	_Z29shmem_count_range_bins_kernelPiS_i,@function
_Z29shmem_count_range_bins_kernelPiS_i: ; @_Z29shmem_count_range_bins_kernelPiS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s8, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_add_u32 s0, s0, 24
	s_addc_u32 s1, s1, 0
	v_lshl_add_u32 v4, v0, 2, 0
	s_mov_b32 s9, 0
	s_mov_b32 s10, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	ds_store_b32 v4, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB1_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s0, s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v5, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s0, s2
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[6:7], s[2:3], 2
.LBB1_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v6, v[2:3], off
	v_add_nc_u32_e32 v1, s2, v1
	v_add_co_u32 v2, s0, v2, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
	v_cmp_le_i32_e32 vcc_lo, s8, v1
	s_or_b32 s9, vcc_lo, s9
	s_waitcnt vmcnt(0)
	v_mul_hi_i32 v6, 0x51eb851f, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v7, 31, v6
	v_ashrrev_i32_e32 v6, 5, v6
	v_add_nc_u32_e32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v6, v6, 2, 0
	ds_add_u32 v6, v5
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB1_2
.LBB1_3:                                ; %Flow20
	s_or_b32 exec_lo, exec_lo, s10
	ds_load_b32 v1, v4
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	global_atomic_add_u32 v0, v1, s[4:5]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z29shmem_count_range_bins_kernelPiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z29shmem_count_range_bins_kernelPiS_i, .Lfunc_end1-_Z29shmem_count_range_bins_kernelPiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 336
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9prefixsumPiS_i       ; -- Begin function _Z9prefixsumPiS_i
	.globl	_Z9prefixsumPiS_i
	.p2align	8
	.type	_Z9prefixsumPiS_i,@function
_Z9prefixsumPiS_i:                      ; @_Z9prefixsumPiS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x10
	v_lshl_add_u32 v3, v0, 2, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s15, s2, v[0:1]
	s_cmp_gt_u32 s2, 1
	s_cselect_b32 s1, -1, 0
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[4:5]
	v_add_co_u32 v5, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, s0, v4
	s_mov_b32 s0, 1
	global_load_b32 v5, v[5:6], off
	s_and_b32 s3, vcc_lo, s1
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v5
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, s3
	s_cbranch_execz .LBB2_4
.LBB2_1:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s3, exec_lo
	v_cmpx_le_u32_e64 s0, v0
	s_cbranch_execz .LBB2_3
; %bb.2:                                ;   in Loop: Header=BB2_1 Depth=1
	v_subrev_nc_u32_e32 v4, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v4, v4, 2, 0
	ds_load_b32 v4, v4
	ds_load_b32 v5, v3
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v4, v5, v4
	ds_store_b32 v3, v4
.LBB2_3:                                ;   in Loop: Header=BB2_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_lshl_b32 s0, s0, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_u32 s0, s2
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB2_1
.LBB2_4:                                ; %Flow25
	s_or_b32 exec_lo, exec_lo, s1
	ds_load_b32 v3, v3
	v_add_co_u32 v0, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v2, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v3, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9prefixsumPiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z9prefixsumPiS_i, .Lfunc_end2-_Z9prefixsumPiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 300
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym sdata
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z30global_count_range_bins_kernelPiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z30global_count_range_bins_kernelPiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z29shmem_count_range_bins_kernelPiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z29shmem_count_range_bins_kernelPiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9prefixsumPiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9prefixsumPiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
