/*#include "device_atomic_functions.h"
__global__
void inner_product1_GPU(double kk, double *a, double *b, int N, int N_ln)
{
    kk = 0.0;
    __shared__ double temp[128];
    const int i = blockIdx.x*blockDim.x + threadIdx.x;
   
    //for ( i = 0; i < N_ln*N_ln; i++)
    if (i < N_ln*N_ln)
    temp[threadIdx.x] = a[i] * b[i];

    __syncthreads();
    //parallel reduction
    //for (int j = threadIdx.x; j < N_ln*N_ln ; j += blockDim.x)

    return;
}

__global__
void inner_product2_GPU(double kk, double *a, double *b, int N, int N_ln)
{
    kk = 0.0;
    __shared__ double temp[128];
    const int i = blockIdx.x*blockDim.x + threadIdx.x;
    const int j = blockIdx.y*blockDim.y + threadIdx.y;

    //for ( i = 0; i < N_ln; i++)
    //for ( j = 0; j < N_ln; j++)
    if (i < N_ln && j < N_ln)
    kk += a[N * (i + 1) + (j + 1)] * b[N_ln * i + j] 
   
    return;
}
*/
__global__
void laplacian_GPU(double *La, double *x, double dx, double dy, int N, int N_ln)
{
    const int i = blockIdx.x*blockDim.x + threadIdx.x;
    const int j = blockIdx.y*blockDim.y + threadIdx.y;

    if (i < N_ln && j < N_ln)  
    La[N_ln * i + j] = (x[N * i + (j + 1)] + x[N * (i + 2) + (j + 1)] + x[N * (i + 1) + j] +
                        x[N * (i + 1) + (j + 2)] - 4.0 * x[N * (i + 1) + (j + 1)]) / (dx * dy);
  
    return;
}

__global__
void YPEAX_GPU(double *y, double *x, double a, int N) // Y += a*X
{
    const int i = blockIdx.x*blockDim.x + threadIdx.x;
    //for ( i = 0; i < N * N; i++)
    if (i< N*N)
    y[i] += a * x[i];

    return;
}

__global__
void YEAYPX_GPU(double *y, double *x, double a, int N, int N_ln) // Y = a*Y + X
{
    const int i = blockIdx.x*blockDim.x + threadIdx.x;
    const int j = blockIdx.y*blockDim.y + threadIdx.y;    
    //for ( i = 0; i < N_ln; i++)
    //for ( j = 0; j < N_ln; j++)
    if (i < N_ln && j < N_ln)
    y[N * (i + 1) + (j + 1)] = a * y[N * (i + 1) + (j + 1)] + x[N_ln * i + j];

    return;
}

double inner_product(double *a, double *b, int type, int N, int N_ln)
{
    double kk = 0.0;
    int i, j;

    if (type == 0)
    { // for N_ln^2 * N_ln^2
        for ( i = 0; i < N_ln * N_ln; i++)
        {
            kk += a[i] * b[i];
        }
    }
    else
    { // for N^2 * N_ln^2
        for ( i = 0; i < N_ln; i++)
        {
            for ( j = 0; j < N_ln; j++)
            {
                kk += a[N * (i + 1) + (j + 1)] * b[N_ln * i + j];
            }
        }
    }
    return kk;
}

void laplacian(double *La, double *x, double dx, double dy, int N, int N_ln)
{
    int i, j;

    for ( i = 0; i < N_ln; i++)
    {
        for ( j = 0; j < N_ln; j++)
        {
            La[N_ln * i + j] = (x[N * i + (j + 1)] + x[N * (i + 2) + (j + 1)] + x[N * (i + 1) + j] +
                                x[N * (i + 1) + (j + 2)] - 4.0 * x[N * (i + 1) + (j + 1)]) /
                               (dx * dy);
        }
    }
    return;
}

void YEAYPX(double *y, double *x, double a, int N, int N_ln) // Y = a*Y + X
{
 //   const int i = blockIdx.x*blockDim.x + threadIdx.x;
   // const int j = blockIdx.y*blockDim.y + threadIdx.y;
    int i,j;
    for ( i = 0; i < N_ln; i++)
    for ( j = 0; j < N_ln; j++)
    {
        y[N * (i + 1) + (j + 1)] = a * y[N * (i + 1) + (j + 1)] + x[N_ln * i + j];
    }
    return;
}

	.file	"tmpxft_00363a61_00000000-6_operator.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2013:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2013:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z13inner_productPdS_iii
	.type	_Z13inner_productPdS_iii, @function
_Z13inner_productPdS_iii:
.LFB2008:
	.cfi_startproc
	endbr64
	movq	%rdi, %rax
	testl	%edx, %edx
	je	.L3
	movslq	%ecx, %rcx
	movslq	%r8d, %r9
	movq	%rsi, %rdx
	xorl	%edi, %edi
	salq	$3, %rcx
	salq	$3, %r9
	xorps	%xmm0, %xmm0
	addq	%rcx, %rax
	jmp	.L4
.L3:
	imull	%r8d, %r8d
	xorl	%edx, %edx
	xorps	%xmm0, %xmm0
.L5:
	cmpl	%edx, %r8d
	jle	.L11
	movsd	(%rax,%rdx,8), %xmm1
	mulsd	(%rsi,%rdx,8), %xmm1
	incq	%rdx
	addsd	%xmm1, %xmm0
	jmp	.L5
.L11:
	ret
.L8:
	movsd	8(%rax,%rsi,8), %xmm1
	mulsd	(%rdx,%rsi,8), %xmm1
	incq	%rsi
	addsd	%xmm1, %xmm0
	cmpl	%esi, %r8d
	jg	.L8
	addq	%rcx, %rax
	addq	%r9, %rdx
.L4:
	cmpl	%r8d, %edi
	jge	.L2
	incl	%edi
	xorl	%esi, %esi
	jmp	.L8
.L2:
	ret
	.cfi_endproc
.LFE2008:
	.size	_Z13inner_productPdS_iii, .-_Z13inner_productPdS_iii
	.globl	_Z9laplacianPdS_ddii
	.type	_Z9laplacianPdS_ddii, @function
_Z9laplacianPdS_ddii:
.LFB2009:
	.cfi_startproc
	endbr64
	movslq	%edx, %rax
	movslq	%ecx, %r10
	xorl	%r9d, %r9d
	movsd	.LC1(%rip), %xmm3
	salq	$3, %rax
	salq	$3, %r10
	cmpl	%ecx, %r9d
	jl	.L19
	ret
.L19:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
.L15:
	movaps	%xmm0, %xmm4
	leaq	(%rax,%rsi), %r11
	incl	%r9d
	xorl	%edx, %edx
	mulsd	%xmm1, %xmm4
	leaq	(%r11,%rax), %rbx
	movq	%r11, %r8
.L14:
	movsd	8(%r8), %xmm5
	movsd	8(%rsi,%rdx,8), %xmm2
	addq	$8, %r8
	addsd	8(%rbx,%rdx,8), %xmm2
	addsd	-8(%r8), %xmm2
	mulsd	%xmm3, %xmm5
	addsd	8(%r8), %xmm2
	subsd	%xmm5, %xmm2
	divsd	%xmm4, %xmm2
	movsd	%xmm2, (%rdi,%rdx,8)
	incq	%rdx
	cmpl	%edx, %ecx
	jg	.L14
	addq	%r10, %rdi
	movq	%r11, %rsi
	cmpl	%ecx, %r9d
	jl	.L15
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2009:
	.size	_Z9laplacianPdS_ddii, .-_Z9laplacianPdS_ddii
	.globl	_Z6YEAYPXPdS_dii
	.type	_Z6YEAYPXPdS_dii, @function
_Z6YEAYPXPdS_dii:
.LFB2010:
	.cfi_startproc
	endbr64
	movslq	%edx, %rdx
	movslq	%ecx, %r10
	xorl	%r9d, %r9d
	salq	$3, %rdx
	movq	%r10, %rax
	salq	$3, %r10
	addq	%rdx, %rdi
.L21:
	cmpl	%eax, %r9d
	jge	.L25
	incl	%r9d
	movq	%rdi, %r8
	xorl	%ecx, %ecx
.L22:
	movsd	8(%r8), %xmm1
	addq	$8, %r8
	mulsd	%xmm0, %xmm1
	addsd	(%rsi,%rcx,8), %xmm1
	incq	%rcx
	movsd	%xmm1, (%r8)
	cmpl	%ecx, %eax
	jg	.L22
	addq	%rdx, %rdi
	addq	%r10, %rsi
	jmp	.L21
.L25:
	ret
	.cfi_endproc
.LFE2010:
	.size	_Z6YEAYPXPdS_dii, .-_Z6YEAYPXPdS_dii
	.globl	_Z39__device_stub__Z13laplacian_GPUPdS_ddiiPdS_ddii
	.type	_Z39__device_stub__Z13laplacian_GPUPdS_ddiiPdS_ddii, @function
_Z39__device_stub__Z13laplacian_GPUPdS_ddiiPdS_ddii:
.LFB2035:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	64(%rsp), %rcx
	movsd	%xmm0, 24(%rsp)
	movsd	%xmm1, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z13laplacian_GPUPdS_ddii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L26:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	_Z39__device_stub__Z13laplacian_GPUPdS_ddiiPdS_ddii, .-_Z39__device_stub__Z13laplacian_GPUPdS_ddiiPdS_ddii
	.globl	_Z13laplacian_GPUPdS_ddii
	.type	_Z13laplacian_GPUPdS_ddii, @function
_Z13laplacian_GPUPdS_ddii:
.LFB2036:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z13laplacian_GPUPdS_ddiiPdS_ddii
	.cfi_endproc
.LFE2036:
	.size	_Z13laplacian_GPUPdS_ddii, .-_Z13laplacian_GPUPdS_ddii
	.globl	_Z32__device_stub__Z9YPEAX_GPUPdS_diPdS_di
	.type	_Z32__device_stub__Z9YPEAX_GPUPdS_diPdS_di, @function
_Z32__device_stub__Z9YPEAX_GPUPdS_diPdS_di:
.LFB2037:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	40(%rsp), %rdx
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9YPEAX_GPUPdS_di(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L31:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2037:
	.size	_Z32__device_stub__Z9YPEAX_GPUPdS_diPdS_di, .-_Z32__device_stub__Z9YPEAX_GPUPdS_diPdS_di
	.globl	_Z9YPEAX_GPUPdS_di
	.type	_Z9YPEAX_GPUPdS_di, @function
_Z9YPEAX_GPUPdS_di:
.LFB2038:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z9YPEAX_GPUPdS_diPdS_di
	.cfi_endproc
.LFE2038:
	.size	_Z9YPEAX_GPUPdS_di, .-_Z9YPEAX_GPUPdS_di
	.globl	_Z35__device_stub__Z10YEAYPX_GPUPdS_diiPdS_dii
	.type	_Z35__device_stub__Z10YEAYPX_GPUPdS_diiPdS_dii, @function
_Z35__device_stub__Z10YEAYPX_GPUPdS_diiPdS_dii:
.LFB2039:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, (%rsp)
	leaq	40(%rsp), %rcx
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10YEAYPX_GPUPdS_dii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L36:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2039:
	.size	_Z35__device_stub__Z10YEAYPX_GPUPdS_diiPdS_dii, .-_Z35__device_stub__Z10YEAYPX_GPUPdS_diiPdS_dii
	.globl	_Z10YEAYPX_GPUPdS_dii
	.type	_Z10YEAYPX_GPUPdS_dii, @function
_Z10YEAYPX_GPUPdS_dii:
.LFB2040:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10YEAYPX_GPUPdS_diiPdS_dii
	.cfi_endproc
.LFE2040:
	.size	_Z10YEAYPX_GPUPdS_dii, .-_Z10YEAYPX_GPUPdS_dii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"_Z10YEAYPX_GPUPdS_dii"
.LC3:
	.string	"_Z9YPEAX_GPUPdS_di"
.LC4:
	.string	"_Z13laplacian_GPUPdS_ddii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2042:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10YEAYPX_GPUPdS_dii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9YPEAX_GPUPdS_di(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13laplacian_GPUPdS_ddii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2042:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	0
	.long	1074790400
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
/*#include "device_atomic_functions.h"
__global__
void inner_product1_GPU(double kk, double *a, double *b, int N, int N_ln)
{
    kk = 0.0;
    __shared__ double temp[128];
    const int i = blockIdx.x*blockDim.x + threadIdx.x;
   
    //for ( i = 0; i < N_ln*N_ln; i++)
    if (i < N_ln*N_ln)
    temp[threadIdx.x] = a[i] * b[i];

    __syncthreads();
    //parallel reduction
    //for (int j = threadIdx.x; j < N_ln*N_ln ; j += blockDim.x)

    return;
}

__global__
void inner_product2_GPU(double kk, double *a, double *b, int N, int N_ln)
{
    kk = 0.0;
    __shared__ double temp[128];
    const int i = blockIdx.x*blockDim.x + threadIdx.x;
    const int j = blockIdx.y*blockDim.y + threadIdx.y;

    //for ( i = 0; i < N_ln; i++)
    //for ( j = 0; j < N_ln; j++)
    if (i < N_ln && j < N_ln)
    kk += a[N * (i + 1) + (j + 1)] * b[N_ln * i + j] 
   
    return;
}
*/
__global__
void laplacian_GPU(double *La, double *x, double dx, double dy, int N, int N_ln)
{
    const int i = blockIdx.x*blockDim.x + threadIdx.x;
    const int j = blockIdx.y*blockDim.y + threadIdx.y;

    if (i < N_ln && j < N_ln)  
    La[N_ln * i + j] = (x[N * i + (j + 1)] + x[N * (i + 2) + (j + 1)] + x[N * (i + 1) + j] +
                        x[N * (i + 1) + (j + 2)] - 4.0 * x[N * (i + 1) + (j + 1)]) / (dx * dy);
  
    return;
}

__global__
void YPEAX_GPU(double *y, double *x, double a, int N) // Y += a*X
{
    const int i = blockIdx.x*blockDim.x + threadIdx.x;
    //for ( i = 0; i < N * N; i++)
    if (i< N*N)
    y[i] += a * x[i];

    return;
}

__global__
void YEAYPX_GPU(double *y, double *x, double a, int N, int N_ln) // Y = a*Y + X
{
    const int i = blockIdx.x*blockDim.x + threadIdx.x;
    const int j = blockIdx.y*blockDim.y + threadIdx.y;    
    //for ( i = 0; i < N_ln; i++)
    //for ( j = 0; j < N_ln; j++)
    if (i < N_ln && j < N_ln)
    y[N * (i + 1) + (j + 1)] = a * y[N * (i + 1) + (j + 1)] + x[N_ln * i + j];

    return;
}

double inner_product(double *a, double *b, int type, int N, int N_ln)
{
    double kk = 0.0;
    int i, j;

    if (type == 0)
    { // for N_ln^2 * N_ln^2
        for ( i = 0; i < N_ln * N_ln; i++)
        {
            kk += a[i] * b[i];
        }
    }
    else
    { // for N^2 * N_ln^2
        for ( i = 0; i < N_ln; i++)
        {
            for ( j = 0; j < N_ln; j++)
            {
                kk += a[N * (i + 1) + (j + 1)] * b[N_ln * i + j];
            }
        }
    }
    return kk;
}

void laplacian(double *La, double *x, double dx, double dy, int N, int N_ln)
{
    int i, j;

    for ( i = 0; i < N_ln; i++)
    {
        for ( j = 0; j < N_ln; j++)
        {
            La[N_ln * i + j] = (x[N * i + (j + 1)] + x[N * (i + 2) + (j + 1)] + x[N * (i + 1) + j] +
                                x[N * (i + 1) + (j + 2)] - 4.0 * x[N * (i + 1) + (j + 1)]) /
                               (dx * dy);
        }
    }
    return;
}

void YEAYPX(double *y, double *x, double a, int N, int N_ln) // Y = a*Y + X
{
 //   const int i = blockIdx.x*blockDim.x + threadIdx.x;
   // const int j = blockIdx.y*blockDim.y + threadIdx.y;
    int i,j;
    for ( i = 0; i < N_ln; i++)
    for ( j = 0; j < N_ln; j++)
    {
        y[N * (i + 1) + (j + 1)] = a * y[N * (i + 1) + (j + 1)] + x[N_ln * i + j];
    }
    return;
}

	.text
	.file	"operator.hip"
	.globl	_Z28__device_stub__laplacian_GPUPdS_ddii # -- Begin function _Z28__device_stub__laplacian_GPUPdS_ddii
	.type	_Z28__device_stub__laplacian_GPUPdS_ddii,@function
_Z28__device_stub__laplacian_GPUPdS_ddii: # @_Z28__device_stub__laplacian_GPUPdS_ddii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	32(%rsp), %r8
	movsd	%xmm1, (%r8)
	leaq	12(%rsp), %r9
	movl	%edx, (%r9)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%r8, 24(%rbx)
	movq	%r9, 32(%rbx)
	movq	%rdx, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13laplacian_GPUPdS_ddii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__laplacian_GPUPdS_ddii, .Lfunc_end0-_Z28__device_stub__laplacian_GPUPdS_ddii
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__YPEAX_GPUPdS_di # -- Begin function _Z24__device_stub__YPEAX_GPUPdS_di
	.type	_Z24__device_stub__YPEAX_GPUPdS_di,@function
_Z24__device_stub__YPEAX_GPUPdS_di:     # @_Z24__device_stub__YPEAX_GPUPdS_di
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	4(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9YPEAX_GPUPdS_di, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__YPEAX_GPUPdS_di, .Lfunc_end1-_Z24__device_stub__YPEAX_GPUPdS_di
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__YEAYPX_GPUPdS_dii # -- Begin function _Z25__device_stub__YEAYPX_GPUPdS_dii
	.type	_Z25__device_stub__YEAYPX_GPUPdS_dii,@function
_Z25__device_stub__YEAYPX_GPUPdS_dii:   # @_Z25__device_stub__YEAYPX_GPUPdS_dii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movsd	%xmm0, (%rsi)
	leaq	4(%rsp), %r8
	movl	%edx, (%r8)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%r8, 24(%rbx)
	movq	%rdx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10YEAYPX_GPUPdS_dii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25__device_stub__YEAYPX_GPUPdS_dii, .Lfunc_end2-_Z25__device_stub__YEAYPX_GPUPdS_dii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13inner_productPdS_iii        # -- Begin function _Z13inner_productPdS_iii
	.type	_Z13inner_productPdS_iii,@function
_Z13inner_productPdS_iii:               # @_Z13inner_productPdS_iii
	.cfi_startproc
# %bb.0:
                                        # kill: def $r8d killed $r8d def $r8
	testl	%edx, %edx
	je	.LBB3_3
# %bb.1:                                # %.preheader30
	testl	%r8d, %r8d
	jle	.LBB3_2
# %bb.7:                                # %.preheader29.lr.ph
	movslq	%ecx, %rax
	movl	%r8d, %ecx
	leaq	(,%rcx,8), %rdx
	leaq	(%rdi,%rax,8), %rdi
	addq	$8, %rdi
	shlq	$3, %rax
	xorpd	%xmm0, %xmm0
	xorl	%r8d, %r8d
.LBB3_8:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_9 Depth 2
	incq	%r8
	xorl	%r9d, %r9d
.LBB3_9:                                #   Parent Loop BB3_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%rdi,%r9,8), %xmm1             # xmm1 = mem[0],zero
	mulsd	(%rsi,%r9,8), %xmm1
	leaq	1(%r9), %r10
	addsd	%xmm1, %xmm0
	movq	%r10, %r9
	cmpq	%r10, %rcx
	jne	.LBB3_9
# %bb.10:                               # %._crit_edge
                                        #   in Loop: Header=BB3_8 Depth=1
	addq	%rdx, %rsi
	addq	%rax, %rdi
	cmpq	%rcx, %r8
	jne	.LBB3_8
	jmp	.LBB3_6
.LBB3_3:                                # %.preheader
	testl	%r8d, %r8d
	je	.LBB3_2
# %bb.4:                                # %.lr.ph39.preheader
	imull	%r8d, %r8d
	cmpl	$1, %r8d
	adcl	$0, %r8d
	xorpd	%xmm0, %xmm0
	xorl	%eax, %eax
.LBB3_5:                                # %.lr.ph39
                                        # =>This Inner Loop Header: Depth=1
	movsd	(%rdi,%rax,8), %xmm1            # xmm1 = mem[0],zero
	mulsd	(%rsi,%rax,8), %xmm1
	addsd	%xmm1, %xmm0
	incq	%rax
	cmpq	%rax, %r8
	jne	.LBB3_5
.LBB3_6:                                # %.loopexit
	retq
.LBB3_2:
	xorps	%xmm0, %xmm0
	retq
.Lfunc_end3:
	.size	_Z13inner_productPdS_iii, .Lfunc_end3-_Z13inner_productPdS_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z9laplacianPdS_ddii
.LCPI4_0:
	.quad	0xc010000000000000              # double -4
	.text
	.globl	_Z9laplacianPdS_ddii
	.type	_Z9laplacianPdS_ddii,@function
_Z9laplacianPdS_ddii:                   # @_Z9laplacianPdS_ddii
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB4_6
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	mulsd	%xmm1, %xmm0
	movslq	%edx, %r11
	movl	%ecx, %eax
	leaq	(,%rax,8), %rcx
	leaq	(,%r11,8), %rdx
	leaq	(%rsi,%r11,8), %r8
	addq	$8, %r8
	movq	%r11, %r9
	shlq	$32, %r9
	movabsq	$8589934592, %r10               # imm = 0x200000000
	addq	%r9, %r10
	shlq	$4, %r11
	addq	%rsi, %r11
	addq	$8, %r11
	leaq	8(%rsi), %rbx
	xorl	%r14d, %r14d
	movsd	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero
	movabsq	$4294967296, %r15               # imm = 0x100000000
.LBB4_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_3 Depth 2
	incq	%r14
	movq	%r10, %r12
	xorl	%r13d, %r13d
.LBB4_3:                                #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%rbx,%r13), %xmm2              # xmm2 = mem[0],zero
	addsd	(%r11,%r13), %xmm2
	addsd	-8(%r8,%r13), %xmm2
	movq	%r12, %rbp
	sarq	$29, %rbp
	addsd	(%rsi,%rbp), %xmm2
	movsd	(%r8,%r13), %xmm3               # xmm3 = mem[0],zero
	mulsd	%xmm1, %xmm3
	addsd	%xmm2, %xmm3
	divsd	%xmm0, %xmm3
	movsd	%xmm3, (%rdi,%r13)
	addq	$8, %r13
	addq	%r15, %r12
	cmpq	%r13, %rcx
	jne	.LBB4_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	addq	%rcx, %rdi
	addq	%rdx, %r8
	addq	%r9, %r10
	addq	%rdx, %r11
	addq	%rdx, %rbx
	cmpq	%rax, %r14
	jne	.LBB4_2
# %bb.5:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB4_6:                                # %._crit_edge35
	retq
.Lfunc_end4:
	.size	_Z9laplacianPdS_ddii, .Lfunc_end4-_Z9laplacianPdS_ddii
	.cfi_endproc
                                        # -- End function
	.globl	_Z6YEAYPXPdS_dii                # -- Begin function _Z6YEAYPXPdS_dii
	.type	_Z6YEAYPXPdS_dii,@function
_Z6YEAYPXPdS_dii:                       # @_Z6YEAYPXPdS_dii
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB5_5
# %bb.1:                                # %.preheader.lr.ph
	movslq	%edx, %rax
	movl	%ecx, %ecx
	leaq	(,%rcx,8), %rdx
	leaq	(%rdi,%rax,8), %rdi
	addq	$8, %rdi
	shlq	$3, %rax
	xorl	%r8d, %r8d
.LBB5_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_3 Depth 2
	incq	%r8
	xorl	%r9d, %r9d
.LBB5_3:                                #   Parent Loop BB5_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%rdi,%r9,8), %xmm1             # xmm1 = mem[0],zero
	mulsd	%xmm0, %xmm1
	addsd	(%rsi,%r9,8), %xmm1
	movsd	%xmm1, (%rdi,%r9,8)
	leaq	1(%r9), %r10
	movq	%r10, %r9
	cmpq	%r10, %rcx
	jne	.LBB5_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB5_2 Depth=1
	addq	%rdx, %rsi
	addq	%rax, %rdi
	cmpq	%rcx, %r8
	jne	.LBB5_2
.LBB5_5:                                # %._crit_edge22
	retq
.Lfunc_end5:
	.size	_Z6YEAYPXPdS_dii, .Lfunc_end5-_Z6YEAYPXPdS_dii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13laplacian_GPUPdS_ddii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9YPEAX_GPUPdS_di, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10YEAYPX_GPUPdS_dii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13laplacian_GPUPdS_ddii,@object # @_Z13laplacian_GPUPdS_ddii
	.section	.rodata,"a",@progbits
	.globl	_Z13laplacian_GPUPdS_ddii
	.p2align	3, 0x0
_Z13laplacian_GPUPdS_ddii:
	.quad	_Z28__device_stub__laplacian_GPUPdS_ddii
	.size	_Z13laplacian_GPUPdS_ddii, 8

	.type	_Z9YPEAX_GPUPdS_di,@object      # @_Z9YPEAX_GPUPdS_di
	.globl	_Z9YPEAX_GPUPdS_di
	.p2align	3, 0x0
_Z9YPEAX_GPUPdS_di:
	.quad	_Z24__device_stub__YPEAX_GPUPdS_di
	.size	_Z9YPEAX_GPUPdS_di, 8

	.type	_Z10YEAYPX_GPUPdS_dii,@object   # @_Z10YEAYPX_GPUPdS_dii
	.globl	_Z10YEAYPX_GPUPdS_dii
	.p2align	3, 0x0
_Z10YEAYPX_GPUPdS_dii:
	.quad	_Z25__device_stub__YEAYPX_GPUPdS_dii
	.size	_Z10YEAYPX_GPUPdS_dii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z13laplacian_GPUPdS_ddii"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9YPEAX_GPUPdS_di"
	.size	.L__unnamed_2, 19

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z10YEAYPX_GPUPdS_dii"
	.size	.L__unnamed_3, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__laplacian_GPUPdS_ddii
	.addrsig_sym _Z24__device_stub__YPEAX_GPUPdS_di
	.addrsig_sym _Z25__device_stub__YEAYPX_GPUPdS_dii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13laplacian_GPUPdS_ddii
	.addrsig_sym _Z9YPEAX_GPUPdS_di
	.addrsig_sym _Z10YEAYPX_GPUPdS_dii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13laplacian_GPUPdS_ddii ; -- Begin function _Z13laplacian_GPUPdS_ddii
	.globl	_Z13laplacian_GPUPdS_ddii
	.p2align	8
	.type	_Z13laplacian_GPUPdS_ddii,@function
_Z13laplacian_GPUPdS_ddii:              ; @_Z13laplacian_GPUPdS_ddii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[8:9], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e64 s9, v2
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_mul_lo_u32 v2, v0, s8
	s_load_b256 s[0:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v5, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshl_add_u32 v10, s8, 1, v2
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_co_u32 v2, vcc_lo, v1, v2
	v_ashrrev_i32_e32 v6, 31, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, v5, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, v10, v1
	v_add_co_ci_u32_e32 v5, vcc_lo, v6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	s_clause 0x1
	global_load_b64 v[6:7], v[2:3], off offset:8
	global_load_b64 v[8:9], v[4:5], off offset:8
	v_subrev_nc_u32_e32 v2, s8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v2, v1
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_add_co_u32 v10, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s3, v3, vcc_lo
	s_clause 0x1
	global_load_b128 v[2:5], v[10:11], off
	global_load_b64 v[10:11], v[10:11], off offset:16
	s_waitcnt vmcnt(2)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[6:7], v[2:3]
	v_mul_f64 v[6:7], s[4:5], s[6:7]
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[4:5], -4.0, v[2:3]
	v_div_scale_f64 v[4:5], null, v[6:7], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[8:9], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[4:5], v[8:9], 1.0
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], -v[4:5], v[8:9], 1.0
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_div_scale_f64 v[10:11], vcc_lo, v[2:3], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[10:11], v[8:9]
	v_fma_f64 v[4:5], -v[4:5], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[4:5], v[4:5], v[8:9], v[12:13]
	v_div_fixup_f64 v[2:3], v[4:5], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, s9, v[1:2]
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[4:5]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13laplacian_GPUPdS_ddii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13laplacian_GPUPdS_ddii, .Lfunc_end0-_Z13laplacian_GPUPdS_ddii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 532
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z9YPEAX_GPUPdS_di      ; -- Begin function _Z9YPEAX_GPUPdS_di
	.globl	_Z9YPEAX_GPUPdS_di
	.p2align	8
	.type	_Z9YPEAX_GPUPdS_di,@function
_Z9YPEAX_GPUPdS_di:                     ; @_Z9YPEAX_GPUPdS_di
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_mul_i32 s3, s3, s3
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[0:1], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[2:3], v[2:3], s[0:1], v[4:5]
	global_store_b64 v[0:1], v[2:3], off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9YPEAX_GPUPdS_di
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9YPEAX_GPUPdS_di, .Lfunc_end1-_Z9YPEAX_GPUPdS_di
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 176
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10YEAYPX_GPUPdS_dii   ; -- Begin function _Z10YEAYPX_GPUPdS_dii
	.globl	_Z10YEAYPX_GPUPdS_dii
	.p2align	8
	.type	_Z10YEAYPX_GPUPdS_dii,@function
_Z10YEAYPX_GPUPdS_dii:                  ; @_Z10YEAYPX_GPUPdS_dii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s4, 16
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s5, v[3:4]
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e64 s3, v2
	s_cbranch_execz .LBB2_2
; %bb.1:
	v_mad_u64_u32 v[2:3], null, s2, v0, s[2:3]
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v5, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v6, 31, v2
	v_mad_u64_u32 v[3:4], null, v0, s3, v[1:2]
	v_add_co_u32 v0, vcc_lo, v1, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 3, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	global_load_b64 v[4:5], v[0:1], off offset:8
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[2:3], v[4:5], s[0:1], v[2:3]
	global_store_b64 v[0:1], v[2:3], off offset:8
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10YEAYPX_GPUPdS_dii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z10YEAYPX_GPUPdS_dii, .Lfunc_end2-_Z10YEAYPX_GPUPdS_dii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 264
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13laplacian_GPUPdS_ddii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13laplacian_GPUPdS_ddii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9YPEAX_GPUPdS_di
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9YPEAX_GPUPdS_di.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10YEAYPX_GPUPdS_dii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10YEAYPX_GPUPdS_dii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
