#include<iostream>
#include<math.h>
#include<stdint.h>
#include<stdlib.h>
#define N 16
#define M 16

__device__
void convolve(uint8_t input[N][M], 
			  int* numer, 
			  int* denom, 
			  int* kernel, 
			  int i, 
			  int j)
{
	int tx = threadIdx.x;
	int ty = threadIdx.y;
	
	int kpos = tx + ty * 5;
	
	int x = i + tx - 2;
	int y = j + ty - 2;
	
	
	if (x>=0 && y>=0 && x<N && y<M)	
	{
		int weightedVal = kernel[kpos] * int(input[x][y]);
		int kVal = kernel[kpos];
		
		atomicAdd(numer, weightedVal);
		atomicAdd(denom, kVal);
	}
}

__global__
void gauss(uint8_t input[N][M], uint8_t output[N][M], int* kernel)
{
	int j = blockIdx.y;
	int i = blockIdx.x;
	
	__shared__ int numer;
	__shared__ int denom;
	
	numer = 0;
	denom = 0;
	
	__syncthreads();
	
	convolve(input, &numer, &denom, kernel, i, j);
	
	if(threadIdx.x==0 && threadIdx.y==0)
	{
		output[i][j] = uint8_t((numer) / (denom));
	}
}

void print(uint8_t image[N][M])
{
	for (int i=0; i<N; i++)
	{
		for (int j=0; j<M; j++)
		{
			std::cout<< int(image[i][j]) << ",\t";
		}
		std::cout<< "\n";
	}
}


int main()
{
	srand(NULL);
	
	uint8_t *image, *blur;
	cudaMallocManaged(&image, N*M*sizeof(uint8_t));
	cudaMallocManaged(&blur, N*M*sizeof(uint8_t));
	
	for (int i = 0; i<N; i++)
		for (int j = 0; j<M; j++)
			reinterpret_cast<uint8_t (*)[M]>(image)[i][j] = rand()% 256;
	
	int* kernel;
	cudaMallocManaged(&kernel, sizeof(int) * 25);
	
	int dummy[25] = { 1, 4, 7, 4, 1,
			  4,16,26,16, 4,
			  7,26,41,26, 7,
			  4,16,26,16, 4,
			  1, 4, 7, 4, 1 };
					  
	for (int i=0; i<25; i++)
		kernel[i] = dummy[i];
		
	dim3 blockSize(5, 5);
	dim3 gridSize(N, M);
	
	print(reinterpret_cast<uint8_t (*)[M]>(image));
	
	gauss<<<gridSize, blockSize>>>(reinterpret_cast<uint8_t (*)[M]>(image), 
					reinterpret_cast<uint8_t (*)[M]>(blur), 
					kernel);
	
	cudaDeviceSynchronize();
	
	std::cout<<"\n";
	print(reinterpret_cast<uint8_t (*)[M]>(blur));
	
	cudaFree(image);
	cudaFree(blur);
	cudaFree(kernel);
	
	return 0;
}

	.file	"tmpxft_0020cae3_00000000-6_3_fully_parallel.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3640:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3640:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8convolvePA16_hPiS1_S1_ii
	.type	_Z8convolvePA16_hPiS1_S1_ii, @function
_Z8convolvePA16_hPiS1_S1_ii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z8convolvePA16_hPiS1_S1_ii, .-_Z8convolvePA16_hPiS1_S1_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	",\t"
.LC2:
	.string	"\n"
	.text
	.globl	_Z5printPA16_h
	.type	_Z5printPA16_h, @function
_Z5printPA16_h:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	256(%rdi), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	leaq	_ZSt4cout(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L5:
	xorl	%ebp, %ebp
.L6:
	movzbl	(%rbx,%rbp), %esi
	movq	%r12, %rdi
	incq	%rbp
	call	_ZNSolsEi@PLT
	movl	$2, %edx
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	cmpq	$16, %rbp
	jne	.L6
	movl	$1, %edx
	leaq	.LC2(%rip), %rsi
	movq	%r12, %rdi
	addq	$16, %rbx
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	cmpq	%rbx, %r13
	jne	.L5
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z5printPA16_h, .-_Z5printPA16_h
	.globl	_Z33__device_stub__Z5gaussPA16_hS0_PiPA16_hS0_Pi
	.type	_Z33__device_stub__Z5gaussPA16_hS0_PiPA16_hS0_Pi, @function
_Z33__device_stub__Z5gaussPA16_hS0_PiPA16_hS0_Pi:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z5gaussPA16_hS0_Pi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L11:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z33__device_stub__Z5gaussPA16_hS0_PiPA16_hS0_Pi, .-_Z33__device_stub__Z5gaussPA16_hS0_PiPA16_hS0_Pi
	.globl	_Z5gaussPA16_hS0_Pi
	.type	_Z5gaussPA16_hS0_Pi, @function
_Z5gaussPA16_hS0_Pi:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z5gaussPA16_hS0_PiPA16_hS0_Pi
	.cfi_endproc
.LFE3663:
	.size	_Z5gaussPA16_hS0_Pi, .-_Z5gaussPA16_hS0_Pi
	.section	.rodata
	.align 32
.LC0:
	.long	1
	.long	4
	.long	7
	.long	4
	.long	1
	.long	4
	.long	16
	.long	26
	.long	16
	.long	4
	.long	7
	.long	26
	.long	41
	.long	26
	.long	7
	.long	4
	.long	16
	.long	26
	.long	16
	.long	4
	.long	1
	.long	4
	.long	7
	.long	4
	.long	1
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%edi, %edi
	movl	$256, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$160, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	call	srand@PLT
	movq	%rsp, %rdi
	movl	$1, %edx
	movl	$256, %esi
	call	cudaMallocManaged@PLT
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	movl	$256, %esi
	call	cudaMallocManaged@PLT
.L17:
	xorl	%ebx, %ebx
.L18:
	call	rand@PLT
	movq	(%rsp), %rsi
	movslq	%ebx, %rcx
	incl	%ebx
	cltd
	idivl	%r12d
	addq	%rbp, %rsi
	movb	%dl, (%rsi,%rcx)
	cmpl	$16, %ebx
	jne	.L18
	addq	$16, %rbp
	cmpq	$256, %rbp
	jne	.L17
	movl	$1, %edx
	leaq	16(%rsp), %rdi
	movl	$100, %esi
	call	cudaMallocManaged@PLT
	leaq	52(%rsp), %rdi
	leaq	.LC0(%rip), %rsi
	movl	$25, %ecx
	rep movsl
	movq	16(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movl	$25, %ecx
	movabsq	$21474836485, %rax
	movl	$1, 36(%rsp)
	rep movsl
	movq	(%rsp), %rdi
	movq	%rax, 28(%rsp)
	movabsq	$68719476752, %rax
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	call	_Z5printPA16_h
	movl	36(%rsp), %ecx
	movl	48(%rsp), %esi
	xorl	%r9d, %r9d
	movq	28(%rsp), %rdx
	movq	40(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z33__device_stub__Z5gaussPA16_hS0_PiPA16_hS0_Pi
.L20:
	call	cudaDeviceSynchronize@PLT
	movl	$1, %edx
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	movq	8(%rsp), %rdi
	call	_Z5printPA16_h
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$160, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z5gaussPA16_hS0_Pi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3665:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z5gaussPA16_hS0_Pi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3665:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<iostream>
#include<math.h>
#include<stdint.h>
#include<stdlib.h>
#define N 16
#define M 16

__device__
void convolve(uint8_t input[N][M], 
			  int* numer, 
			  int* denom, 
			  int* kernel, 
			  int i, 
			  int j)
{
	int tx = threadIdx.x;
	int ty = threadIdx.y;
	
	int kpos = tx + ty * 5;
	
	int x = i + tx - 2;
	int y = j + ty - 2;
	
	
	if (x>=0 && y>=0 && x<N && y<M)	
	{
		int weightedVal = kernel[kpos] * int(input[x][y]);
		int kVal = kernel[kpos];
		
		atomicAdd(numer, weightedVal);
		atomicAdd(denom, kVal);
	}
}

__global__
void gauss(uint8_t input[N][M], uint8_t output[N][M], int* kernel)
{
	int j = blockIdx.y;
	int i = blockIdx.x;
	
	__shared__ int numer;
	__shared__ int denom;
	
	numer = 0;
	denom = 0;
	
	__syncthreads();
	
	convolve(input, &numer, &denom, kernel, i, j);
	
	if(threadIdx.x==0 && threadIdx.y==0)
	{
		output[i][j] = uint8_t((numer) / (denom));
	}
}

void print(uint8_t image[N][M])
{
	for (int i=0; i<N; i++)
	{
		for (int j=0; j<M; j++)
		{
			std::cout<< int(image[i][j]) << ",\t";
		}
		std::cout<< "\n";
	}
}


int main()
{
	srand(NULL);
	
	uint8_t *image, *blur;
	hipMallocManaged(&image, N*M*sizeof(uint8_t));
	hipMallocManaged(&blur, N*M*sizeof(uint8_t));
	
	for (int i = 0; i<N; i++)
		for (int j = 0; j<M; j++)
			reinterpret_cast<uint8_t (*)[M]>(image)[i][j] = rand()% 256;
	
	int* kernel;
	hipMallocManaged(&kernel, sizeof(int) * 25);
	
	int dummy[25] = { 1, 4, 7, 4, 1,
			  4,16,26,16, 4,
			  7,26,41,26, 7,
			  4,16,26,16, 4,
			  1, 4, 7, 4, 1 };
					  
	for (int i=0; i<25; i++)
		kernel[i] = dummy[i];
		
	dim3 blockSize(5, 5);
	dim3 gridSize(N, M);
	
	print(reinterpret_cast<uint8_t (*)[M]>(image));
	
	gauss<<<gridSize, blockSize>>>(reinterpret_cast<uint8_t (*)[M]>(image), 
					reinterpret_cast<uint8_t (*)[M]>(blur), 
					kernel);
	
	hipDeviceSynchronize();
	
	std::cout<<"\n";
	print(reinterpret_cast<uint8_t (*)[M]>(blur));
	
	hipFree(image);
	hipFree(blur);
	hipFree(kernel);
	
	return 0;
}

	.text
	.file	"3_fully_parallel.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z20__device_stub__gaussPA16_hS0_Pi # -- Begin function _Z20__device_stub__gaussPA16_hS0_Pi
	.type	_Z20__device_stub__gaussPA16_hS0_Pi,@function
_Z20__device_stub__gaussPA16_hS0_Pi:    # @_Z20__device_stub__gaussPA16_hS0_Pi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5gaussPA16_hS0_Pi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z20__device_stub__gaussPA16_hS0_Pi, .Lfunc_end0-_Z20__device_stub__gaussPA16_hS0_Pi
	.cfi_endproc
                                        # -- End function
	.globl	_Z5printPA16_h                  # -- Begin function _Z5printPA16_h
	.type	_Z5printPA16_h,@function
_Z5printPA16_h:                         # @_Z5printPA16_h
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
.LBB1_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	xorl	%r15d, %r15d
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movzbl	(%rbx,%r15), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r15
	cmpq	$16, %r15
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r14
	addq	$16, %rbx
	cmpq	$16, %r14
	jne	.LBB1_1
# %bb.4:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z5printPA16_h, .Lfunc_end1-_Z5printPA16_h
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	xorl	%ebx, %ebx
	xorl	%edi, %edi
	callq	srand
	leaq	8(%rsp), %rdi
	movl	$256, %esi                      # imm = 0x100
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %rdi
	movl	$256, %esi                      # imm = 0x100
	movl	$1, %edx
	callq	hipMallocManaged
	xorl	%r14d, %r14d
.LBB2_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	xorl	%r15d, %r15d
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movq	8(%rsp), %rcx
	addq	%rbx, %rcx
	movb	%al, (%r15,%rcx)
	incq	%r15
	cmpq	$16, %r15
	jne	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%r14
	addq	$16, %rbx
	cmpq	$16, %r14
	jne	.LBB2_1
# %bb.4:
	leaq	24(%rsp), %rbx
	movl	$100, %esi
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	xorl	%eax, %eax
	movq	(%rbx), %rcx
.LBB2_5:                                # =>This Inner Loop Header: Depth=1
	movl	.L__const.main.dummy(%rax), %edx
	movl	%edx, (%rcx,%rax)
	addq	$4, %rax
	cmpq	$100, %rax
	jne	.LBB2_5
# %bb.6:
	movq	8(%rsp), %rdi
	callq	_Z5printPA16_h
	movabsq	$68719476752, %rdi              # imm = 0x1000000010
	movabsq	$21474836485, %rdx              # imm = 0x500000005
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.7:
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdx
	callq	_Z20__device_stub__gaussPA16_hS0_Pi
.LBB2_8:
	callq	hipDeviceSynchronize
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rdi
	callq	_Z5printPA16_h
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5gaussPA16_hS0_Pi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z5gaussPA16_hS0_Pi,@object     # @_Z5gaussPA16_hS0_Pi
	.section	.rodata,"a",@progbits
	.globl	_Z5gaussPA16_hS0_Pi
	.p2align	3, 0x0
_Z5gaussPA16_hS0_Pi:
	.quad	_Z20__device_stub__gaussPA16_hS0_Pi
	.size	_Z5gaussPA16_hS0_Pi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	",\t"
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\n"
	.size	.L.str.1, 2

	.type	.L__const.main.dummy,@object    # @__const.main.dummy
	.section	.rodata,"a",@progbits
	.p2align	4, 0x0
.L__const.main.dummy:
	.long	1                               # 0x1
	.long	4                               # 0x4
	.long	7                               # 0x7
	.long	4                               # 0x4
	.long	1                               # 0x1
	.long	4                               # 0x4
	.long	16                              # 0x10
	.long	26                              # 0x1a
	.long	16                              # 0x10
	.long	4                               # 0x4
	.long	7                               # 0x7
	.long	26                              # 0x1a
	.long	41                              # 0x29
	.long	26                              # 0x1a
	.long	7                               # 0x7
	.long	4                               # 0x4
	.long	16                              # 0x10
	.long	26                              # 0x1a
	.long	16                              # 0x10
	.long	4                               # 0x4
	.long	1                               # 0x1
	.long	4                               # 0x4
	.long	7                               # 0x7
	.long	4                               # 0x4
	.long	1                               # 0x1
	.size	.L__const.main.dummy, 100

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z5gaussPA16_hS0_Pi"
	.size	.L__unnamed_1, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z20__device_stub__gaussPA16_hS0_Pi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z5gaussPA16_hS0_Pi
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z5gaussPA16_hS0_Pi     ; -- Begin function _Z5gaussPA16_hS0_Pi
	.globl	_Z5gaussPA16_hS0_Pi
	.p2align	8
	.type	_Z5gaussPA16_hS0_Pi,@function
_Z5gaussPA16_hS0_Pi:                    ; @_Z5gaussPA16_hS0_Pi
; %bb.0:
	s_mov_b32 s2, s15
	v_mov_b32_e32 v2, 0
	v_and_b32_e32 v4, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	s_mov_b32 s3, 0
	v_add_nc_u32_e32 v5, s2, v0
	v_mov_b32_e32 v3, v2
	v_add_nc_u32_e32 v1, s14, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s0, 18, v5
	v_cmp_lt_i32_e64 s1, 1, v5
	v_add_nc_u32_e32 v6, -2, v1
	ds_store_b64 v2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmp_gt_u32_e32 vcc_lo, 16, v6
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_9
; %bb.1:
	v_lshlrev_b64 v[1:2], 4, v[1:2]
	v_add_nc_u32_e32 v3, -2, v5
	v_mul_u32_u24_e32 v5, 5, v0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_lshl_u32 v5, v5, v4, 2
	v_add_co_u32 v2, vcc_lo, v1, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v6, vcc_lo
	global_load_b32 v1, v5, s[8:9]
	global_load_u8 v2, v[2:3], off offset:-32
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v2, v1, v2
.LBB0_2:                                ; %ComputeLoop
                                        ; =>This Inner Loop Header: Depth=1
	s_ctz_i32_b32 s4, s1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_readlane_b32 s5, v2, s4
	s_lshl_b32 s4, 1, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_not1_b32 s1, s1, s4
	s_add_i32 s3, s3, s5
	s_cmp_lg_u32 s1, 0
	s_cbranch_scc1 .LBB0_2
; %bb.3:                                ; %ComputeEnd
	v_mbcnt_lo_u32_b32 v2, exec_lo, 0
	s_mov_b32 s1, 0
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB0_5
; %bb.4:
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, s3
	ds_add_u32 v2, v3 offset:4
.LBB0_5:
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s3, exec_lo
.LBB0_6:                                ; %ComputeLoop9
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ctz_i32_b32 s4, s3
	v_readlane_b32 s5, v1, s4
	s_lshl_b32 s4, 1, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_not1_b32 s3, s3, s4
	s_add_i32 s1, s1, s5
	s_cmp_lg_u32 s3, 0
	s_cbranch_scc1 .LBB0_6
; %bb.7:                                ; %ComputeEnd10
	v_mbcnt_lo_u32_b32 v1, exec_lo, 0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v1
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB0_9
; %bb.8:
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, s1
	ds_add_u32 v1, v2
.LBB0_9:                                ; %Flow22
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v0, v4, v0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_11
; %bb.10:
	v_mov_b32_e32 v2, 0
	ds_load_b64 v[0:1], v2
	s_waitcnt lgkmcnt(0)
	v_readfirstlane_b32 s0, v0
	v_readfirstlane_b32 s3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_ashr_i32 s1, s0, 31
	s_ashr_i32 s8, s3, 31
	s_add_i32 s0, s0, s1
	s_add_i32 s3, s3, s8
	s_xor_b32 s0, s0, s1
	s_xor_b32 s3, s3, s8
	v_cvt_f32_u32_e32 v0, s0
	s_sub_i32 s5, 0, s0
	s_xor_b32 s8, s8, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s4, v0
	s_mul_i32 s5, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s5, s4, s5
	s_add_i32 s4, s4, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s4, s3, s4
	s_mul_i32 s5, s4, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s1, s3, s5
	s_add_i32 s3, s4, 1
	s_sub_i32 s5, s1, s0
	s_cmp_ge_u32 s1, s0
	s_cselect_b32 s3, s3, s4
	s_cselect_b32 s1, s5, s1
	s_add_i32 s4, s3, 1
	s_cmp_ge_u32 s1, s0
	s_cselect_b32 s0, s4, s3
	s_ashr_i32 s15, s14, 31
	s_xor_b32 s3, s0, s8
	s_lshl_b64 s[0:1], s[14:15], 4
	s_sub_i32 s3, s3, s8
	s_ashr_i32 s4, s2, 31
	s_add_u32 s0, s6, s0
	v_mov_b32_e32 v0, s3
	s_addc_u32 s1, s7, s1
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s4
	global_store_b8 v2, v0, s[0:1]
.LBB0_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5gaussPA16_hS0_Pi
		.amdhsa_group_segment_fixed_size 8
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z5gaussPA16_hS0_Pi, .Lfunc_end0-_Z5gaussPA16_hS0_Pi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 656
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 8
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5gaussPA16_hS0_Pi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z5gaussPA16_hS0_Pi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
