/*Heat Conduction Computation Exercise From nvidia.qwiklab.com Optimized Version!!!
https://medium.com/@lucidlearning314/general-heat-conduction-equation-cartesian-coordinates-9be71b546b76
*/

#include <stdio.h>
#include <math.h>
#include <assert.h>
#include <iostream>

#define I2D(num, c, r) ((r)*(num)+(c))

inline cudaError_t checkCuda(cudaError_t result)
{
  if (result != cudaSuccess) {
    fprintf(stderr, "CUDA Runtime Error: %s\n", cudaGetErrorString(result));
    assert(result == cudaSuccess);
  }
  return result;
}

__global__
void step_kernel_mod(int ni, int nj, float fact, float* temp_in, float* temp_out)
{
  int i00, im10, ip10, i0m1, i0p1;
  float d2tdx2, d2tdy2;
  int idy = threadIdx.x + blockIdx.x * blockDim.x;
  int idx = threadIdx.y + blockIdx.y * blockDim.y;
  
  if (idy > 0 && idx > 0 && idy < nj-1 && idx < ni-1) {
    // find indices into linear memory
    // for central point and neighbours
    i00 = I2D(ni, idx, idy);
    im10 = I2D(ni, idx-1, idy);
    ip10 = I2D(ni, idx+1, idy);
    i0m1 = I2D(ni, idx, idy-1);
    i0p1 = I2D(ni, idx, idy+1);

    // evaluate derivatives
    d2tdx2 = temp_in[im10]-2*temp_in[i00]+temp_in[ip10];
    d2tdy2 = temp_in[i0m1]-2*temp_in[i00]+temp_in[i0p1];

    // update temperatures
    temp_out[i00] = temp_in[i00]+fact*(d2tdx2 + d2tdy2);
  }  
}

void initRandom(float *temp1_ref, float *temp2_ref, float *temp1, float *temp2, int ni, int nj){
  for( int i = 0; i < ni*nj; ++i) {
    temp1_ref[i] = temp2_ref[i] = temp1[i] = temp2[i] = (float)rand()/(float)(RAND_MAX/100.0f);
  }
}

void step_kernel_ref(int ni, int nj, float fact, float* temp_in, float* temp_out)
{
  int i00, im10, ip10, i0m1, i0p1;
  float d2tdx2, d2tdy2;


  // loop over all points in domain (except boundary)
  for ( int j=1; j < nj-1; j++ ) {
    for ( int i=1; i < ni-1; i++ ) {
      // find indices into linear memory
      // for central point and neighbours
      i00 = I2D(ni, i, j);
      im10 = I2D(ni, i-1, j);
      ip10 = I2D(ni, i+1, j);
      i0m1 = I2D(ni, i, j-1);
      i0p1 = I2D(ni, i, j+1);

      // evaluate derivatives
      d2tdx2 = temp_in[im10]-2*temp_in[i00]+temp_in[ip10];
      d2tdy2 = temp_in[i0m1]-2*temp_in[i00]+temp_in[i0p1];

      // update temperatures
      temp_out[i00] = temp_in[i00]+fact*(d2tdx2 + d2tdy2);
    }
  }
}

int main()
{
  int istep;
  int nstep = 200; // number of time steps
  int deviceId;
  int numberOfSMs;

  // Specify our 2D dimensions
  const int ni = 200;
  const int nj = 100;
  float tfac = 8.418e-5; // thermal diffusivity of silver

  float *temp1_ref, *temp2_ref, *temp1, *temp2, *temp_tmp;

  const int size = ni * nj * sizeof(float);
    
  cudaGetDevice(&deviceId);
  cudaDeviceGetAttribute(&numberOfSMs, cudaDevAttrMultiProcessorCount, deviceId);
  
  //CPU-GPU Memory Allocations
  checkCuda(cudaMallocManaged(&temp1_ref, size));
  checkCuda(cudaMallocManaged(&temp2_ref, size));
  checkCuda(cudaMallocManaged(&temp1, size));
  checkCuda(cudaMallocManaged(&temp2, size));
  
  //Avoid From CPU Page Faults
  cudaMemPrefetchAsync(temp1_ref, size, cudaCpuDeviceId);
  cudaMemPrefetchAsync(temp2_ref, size, cudaCpuDeviceId);
  cudaMemPrefetchAsync(temp1, size, cudaCpuDeviceId);
  cudaMemPrefetchAsync(temp2, size, cudaCpuDeviceId);
    
  initRandom(temp1_ref, temp2_ref, temp1, temp2, ni, nj);
 
  //CPU Computation
  for (istep=0; istep < nstep; istep++) {
    step_kernel_ref(ni, nj, tfac, temp1_ref, temp2_ref);

    // swap the temperature pointers
    temp_tmp = temp1_ref;
    temp1_ref = temp2_ref;
    temp2_ref= temp_tmp;
  }
  
  //Avoid From GPU Page Faults
  cudaMemPrefetchAsync(temp1_ref, size, deviceId);
  cudaMemPrefetchAsync(temp2_ref, size, deviceId);
  cudaMemPrefetchAsync(temp1, size, deviceId);
  cudaMemPrefetchAsync(temp2, size, deviceId);   
    
  int thread_size = 32;
  int scale = ni / nj;
  dim3 threads_per_block(thread_size, (int)(thread_size / scale), 1);
  dim3 number_of_blocks ((nj / threads_per_block.x) + 1, (ni / threads_per_block.y) + 1, 1);
    
  //GPU Computation
  for (int i=0; i < nstep; i++) {
      
      step_kernel_mod<<<number_of_blocks, threads_per_block>>>(ni, nj, tfac, temp1, temp2);
      //Check Errors and Synchronize 
      checkCuda(cudaGetLastError());
      checkCuda(cudaDeviceSynchronize());
      
      //Swap the temperature pointers
      temp_tmp = temp1;
      temp1 = temp2;
      temp2= temp_tmp;
  }

  float maxError = 0;
    
  // Output should always be stored in the temp1 and temp1_ref at this point
  for( int i = 0; i < ni*nj; ++i ) {
    if (abs(temp1[i]-temp1_ref[i]) > maxError) { maxError = abs(temp1[i]-temp1_ref[i]); }
  }

  // Check and see if our maxError is greater than an error bound
  if (maxError > 0.0005f)
    printf("Problem! The Max Error of %.5f is NOT within acceptable bounds.\n", maxError);
  else
    printf("The Max Error of %.5f is within acceptable bounds.\n", maxError);

  checkCuda(cudaFree( temp1_ref ));
  checkCuda(cudaFree( temp2_ref ));
  checkCuda(cudaFree( temp1 ));
  checkCuda(cudaFree( temp2 ));

  return 0;
}

	.file	"tmpxft_00326766_00000000-6_heat_conduct.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3641:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3641:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA Runtime Error: %s\n"
	.text
	.type	_Z9checkCuda9cudaError.isra.0, @function
_Z9checkCuda9cudaError.isra.0:
.LFB4287:
	.cfi_startproc
	testl	%edi, %edi
	je	.L2
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	popq	%r8
	.cfi_def_cfa_offset 8
	movq	%rax, %rcx
	leaq	.LC0(%rip), %rdx
	xorl	%eax, %eax
	jmp	__fprintf_chk@PLT
.L2:
	ret
	.cfi_endproc
.LFE4287:
	.size	_Z9checkCuda9cudaError.isra.0, .-_Z9checkCuda9cudaError.isra.0
	.globl	_Z10initRandomPfS_S_S_ii
	.type	_Z10initRandomPfS_S_S_ii, @function
_Z10initRandomPfS_S_S_ii:
.LFB3636:
	.cfi_startproc
	endbr64
	imull	%r9d, %r8d
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rcx, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r8d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	pushq	%r10
	.cfi_def_cfa_offset 64
.L9:
	cmpl	%ebx, %ebp
	jle	.L12
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	divss	.LC1(%rip), %xmm0
	movss	%xmm0, (%r15,%rbx,4)
	movss	%xmm0, (%r14,%rbx,4)
	movss	%xmm0, 0(%r13,%rbx,4)
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L9
.L12:
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z10initRandomPfS_S_S_ii, .-_Z10initRandomPfS_S_S_ii
	.globl	_Z15step_kernel_refiifPfS_
	.type	_Z15step_kernel_refiifPfS_, @function
_Z15step_kernel_refiifPfS_:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	%esi, %r11d
	movq	%rcx, %r10
	movl	%edi, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%r8d, %r8d
	movl	$1, %r9d
	decl	%r11d
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	leal	-1(%rdi), %r12d
.L14:
	cmpl	%r9d, %r11d
	jle	.L13
	movslq	%esi, %rax
	movslq	%r8d, %rcx
	addl	%edi, %esi
	leaq	(%rdx,%rcx,4), %rbp
	movslq	%esi, %rcx
	salq	$2, %rax
	leaq	(%rdx,%rcx,4), %rbx
	xorl	%ecx, %ecx
.L17:
	incq	%rcx
	addq	$4, %rax
	cmpl	%ecx, %r12d
	jle	.L19
	movss	(%rdx,%rax), %xmm3
	movss	-4(%rdx,%rax), %xmm1
	movss	0(%rbp,%rcx,4), %xmm2
	movaps	%xmm3, %xmm4
	addss	%xmm3, %xmm4
	subss	%xmm4, %xmm1
	subss	%xmm4, %xmm2
	addss	4(%rdx,%rax), %xmm1
	addss	(%rbx,%rcx,4), %xmm2
	addss	%xmm2, %xmm1
	mulss	%xmm0, %xmm1
	addss	%xmm3, %xmm1
	movss	%xmm1, (%r10,%rax)
	jmp	.L17
.L19:
	incl	%r9d
	addl	%edi, %r8d
	jmp	.L14
.L13:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z15step_kernel_refiifPfS_, .-_Z15step_kernel_refiifPfS_
	.globl	_Z40__device_stub__Z15step_kernel_modiifPfS_iifPfS_
	.type	_Z40__device_stub__Z15step_kernel_modiifPfS_iifPfS_, @function
_Z40__device_stub__Z15step_kernel_modiifPfS_iifPfS_:
.LFB3663:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	40(%rsp), %rcx
	movss	%xmm0, 20(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15step_kernel_modiifPfS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L20:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z40__device_stub__Z15step_kernel_modiifPfS_iifPfS_, .-_Z40__device_stub__Z15step_kernel_modiifPfS_iifPfS_
	.globl	_Z15step_kernel_modiifPfS_
	.type	_Z15step_kernel_modiifPfS_, @function
_Z15step_kernel_modiifPfS_:
.LFB3664:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z15step_kernel_modiifPfS_iifPfS_
	.cfi_endproc
.LFE3664:
	.size	_Z15step_kernel_modiifPfS_, .-_Z15step_kernel_modiifPfS_
	.section	.rodata.str1.1
.LC6:
	.string	"Problem! The Max Error of %.5f is NOT within acceptable bounds.\n"
.LC7:
	.string	"The Max Error of %.5f is within acceptable bounds.\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$200, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$88, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaGetDevice@PLT
	movl	8(%rsp), %edx
	leaq	12(%rsp), %rdi
	movl	$16, %esi
	call	cudaDeviceGetAttribute@PLT
	movl	$1, %edx
	movl	$80000, %esi
	leaq	16(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movl	$1, %edx
	movl	$80000, %esi
	leaq	24(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movl	$1, %edx
	movl	$80000, %esi
	leaq	32(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movl	$1, %edx
	movl	$80000, %esi
	leaq	40(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	16(%rsp), %rdi
	xorl	%ecx, %ecx
	orl	$-1, %edx
	movl	$80000, %esi
	call	cudaMemPrefetchAsync@PLT
	movq	24(%rsp), %rdi
	xorl	%ecx, %ecx
	orl	$-1, %edx
	movl	$80000, %esi
	call	cudaMemPrefetchAsync@PLT
	movq	32(%rsp), %rdi
	xorl	%ecx, %ecx
	orl	$-1, %edx
	movl	$80000, %esi
	call	cudaMemPrefetchAsync@PLT
	movq	40(%rsp), %rdi
	xorl	%ecx, %ecx
	orl	$-1, %edx
	movl	$80000, %esi
	call	cudaMemPrefetchAsync@PLT
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movl	$100, %r9d
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$200, %r8d
	call	_Z10initRandomPfS_S_S_ii
.L26:
	movq	24(%rsp), %rbx
	movq	16(%rsp), %rdx
	movl	$100, %esi
	movl	$200, %edi
	movss	.LC3(%rip), %xmm0
	movq	%rbx, %rcx
	call	_Z15step_kernel_refiifPfS_
	movq	%rbx, 16(%rsp)
	movq	%rdx, 24(%rsp)
	decl	%ebp
	jne	.L26
	movl	8(%rsp), %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	movl	$80000, %esi
	movl	$2147483649, %ebp
	movl	$200, %ebx
	call	cudaMemPrefetchAsync@PLT
	movl	8(%rsp), %edx
	movq	24(%rsp), %rdi
	xorl	%ecx, %ecx
	movl	$80000, %esi
	salq	$5, %rbp
	call	cudaMemPrefetchAsync@PLT
	movl	8(%rsp), %edx
	movq	32(%rsp), %rdi
	xorl	%ecx, %ecx
	movl	$80000, %esi
	call	cudaMemPrefetchAsync@PLT
	movl	8(%rsp), %edx
	movq	40(%rsp), %rdi
	xorl	%ecx, %ecx
	movl	$80000, %esi
	call	cudaMemPrefetchAsync@PLT
	movl	$1, 56(%rsp)
	movabsq	$55834574852, %rax
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
.L28:
	movl	56(%rsp), %ecx
	movq	60(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	68(%rsp), %esi
	movq	%rbp, %rdx
	movq	%rbp, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movl	$100, %esi
	movl	$200, %edi
	movss	.LC3(%rip), %xmm0
	call	_Z40__device_stub__Z15step_kernel_modiifPfS_iifPfS_
.L27:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	32(%rsp), %rax
	movq	40(%rsp), %rdx
	movq	%rax, 40(%rsp)
	movq	%rdx, 32(%rsp)
	decl	%ebx
	jne	.L28
	movq	16(%rsp), %rcx
	xorl	%eax, %eax
	xorps	%xmm1, %xmm1
	movss	.LC4(%rip), %xmm2
.L30:
	movss	(%rdx,%rax), %xmm0
	subss	(%rcx,%rax), %xmm0
	addq	$4, %rax
	andps	%xmm2, %xmm0
	maxss	%xmm1, %xmm0
	movaps	%xmm0, %xmm1
	cmpq	$80000, %rax
	jne	.L30
	comiss	.LC5(%rip), %xmm1
	leaq	.LC6(%rip), %rsi
	cvtss2sd	%xmm0, %xmm0
	ja	.L42
	leaq	.LC7(%rip), %rsi
.L42:
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$88, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z15step_kernel_modiifPfS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3666:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15step_kernel_modiifPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3666:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1269028618
	.align 4
.LC3:
	.long	951093707
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC4:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst4
	.align 4
.LC5:
	.long	973279855
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*Heat Conduction Computation Exercise From nvidia.qwiklab.com Optimized Version!!!
https://medium.com/@lucidlearning314/general-heat-conduction-equation-cartesian-coordinates-9be71b546b76
*/


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>
#include <assert.h>
#include <iostream>

#define I2D(num, c, r) ((r)*(num)+(c))

inline hipError_t checkCuda(hipError_t result)
{
  if (result != hipSuccess) {
    fprintf(stderr, "CUDA Runtime Error: %s\n", hipGetErrorString(result));
    assert(result == hipSuccess);
  }
  return result;
}

__global__
void step_kernel_mod(int ni, int nj, float fact, float* temp_in, float* temp_out)
{
  int i00, im10, ip10, i0m1, i0p1;
  float d2tdx2, d2tdy2;
  int idy = threadIdx.x + blockIdx.x * blockDim.x;
  int idx = threadIdx.y + blockIdx.y * blockDim.y;
  
  if (idy > 0 && idx > 0 && idy < nj-1 && idx < ni-1) {
    // find indices into linear memory
    // for central point and neighbours
    i00 = I2D(ni, idx, idy);
    im10 = I2D(ni, idx-1, idy);
    ip10 = I2D(ni, idx+1, idy);
    i0m1 = I2D(ni, idx, idy-1);
    i0p1 = I2D(ni, idx, idy+1);

    // evaluate derivatives
    d2tdx2 = temp_in[im10]-2*temp_in[i00]+temp_in[ip10];
    d2tdy2 = temp_in[i0m1]-2*temp_in[i00]+temp_in[i0p1];

    // update temperatures
    temp_out[i00] = temp_in[i00]+fact*(d2tdx2 + d2tdy2);
  }  
}

void initRandom(float *temp1_ref, float *temp2_ref, float *temp1, float *temp2, int ni, int nj){
  for( int i = 0; i < ni*nj; ++i) {
    temp1_ref[i] = temp2_ref[i] = temp1[i] = temp2[i] = (float)rand()/(float)(RAND_MAX/100.0f);
  }
}

void step_kernel_ref(int ni, int nj, float fact, float* temp_in, float* temp_out)
{
  int i00, im10, ip10, i0m1, i0p1;
  float d2tdx2, d2tdy2;


  // loop over all points in domain (except boundary)
  for ( int j=1; j < nj-1; j++ ) {
    for ( int i=1; i < ni-1; i++ ) {
      // find indices into linear memory
      // for central point and neighbours
      i00 = I2D(ni, i, j);
      im10 = I2D(ni, i-1, j);
      ip10 = I2D(ni, i+1, j);
      i0m1 = I2D(ni, i, j-1);
      i0p1 = I2D(ni, i, j+1);

      // evaluate derivatives
      d2tdx2 = temp_in[im10]-2*temp_in[i00]+temp_in[ip10];
      d2tdy2 = temp_in[i0m1]-2*temp_in[i00]+temp_in[i0p1];

      // update temperatures
      temp_out[i00] = temp_in[i00]+fact*(d2tdx2 + d2tdy2);
    }
  }
}

int main()
{
  int istep;
  int nstep = 200; // number of time steps
  int deviceId;
  int numberOfSMs;

  // Specify our 2D dimensions
  const int ni = 200;
  const int nj = 100;
  float tfac = 8.418e-5; // thermal diffusivity of silver

  float *temp1_ref, *temp2_ref, *temp1, *temp2, *temp_tmp;

  const int size = ni * nj * sizeof(float);
    
  hipGetDevice(&deviceId);
  hipDeviceGetAttribute(&numberOfSMs, hipDeviceAttributeMultiprocessorCount, deviceId);
  
  //CPU-GPU Memory Allocations
  checkCuda(hipMallocManaged(&temp1_ref, size));
  checkCuda(hipMallocManaged(&temp2_ref, size));
  checkCuda(hipMallocManaged(&temp1, size));
  checkCuda(hipMallocManaged(&temp2, size));
  
  //Avoid From CPU Page Faults
  hipMemPrefetchAsync(temp1_ref, size, hipCpuDeviceId);
  hipMemPrefetchAsync(temp2_ref, size, hipCpuDeviceId);
  hipMemPrefetchAsync(temp1, size, hipCpuDeviceId);
  hipMemPrefetchAsync(temp2, size, hipCpuDeviceId);
    
  initRandom(temp1_ref, temp2_ref, temp1, temp2, ni, nj);
 
  //CPU Computation
  for (istep=0; istep < nstep; istep++) {
    step_kernel_ref(ni, nj, tfac, temp1_ref, temp2_ref);

    // swap the temperature pointers
    temp_tmp = temp1_ref;
    temp1_ref = temp2_ref;
    temp2_ref= temp_tmp;
  }
  
  //Avoid From GPU Page Faults
  hipMemPrefetchAsync(temp1_ref, size, deviceId);
  hipMemPrefetchAsync(temp2_ref, size, deviceId);
  hipMemPrefetchAsync(temp1, size, deviceId);
  hipMemPrefetchAsync(temp2, size, deviceId);   
    
  int thread_size = 32;
  int scale = ni / nj;
  dim3 threads_per_block(thread_size, (int)(thread_size / scale), 1);
  dim3 number_of_blocks ((nj / threads_per_block.x) + 1, (ni / threads_per_block.y) + 1, 1);
    
  //GPU Computation
  for (int i=0; i < nstep; i++) {
      
      step_kernel_mod<<<number_of_blocks, threads_per_block>>>(ni, nj, tfac, temp1, temp2);
      //Check Errors and Synchronize 
      checkCuda(hipGetLastError());
      checkCuda(hipDeviceSynchronize());
      
      //Swap the temperature pointers
      temp_tmp = temp1;
      temp1 = temp2;
      temp2= temp_tmp;
  }

  float maxError = 0;
    
  // Output should always be stored in the temp1 and temp1_ref at this point
  for( int i = 0; i < ni*nj; ++i ) {
    if (abs(temp1[i]-temp1_ref[i]) > maxError) { maxError = abs(temp1[i]-temp1_ref[i]); }
  }

  // Check and see if our maxError is greater than an error bound
  if (maxError > 0.0005f)
    printf("Problem! The Max Error of %.5f is NOT within acceptable bounds.\n", maxError);
  else
    printf("The Max Error of %.5f is within acceptable bounds.\n", maxError);

  checkCuda(hipFree( temp1_ref ));
  checkCuda(hipFree( temp2_ref ));
  checkCuda(hipFree( temp1 ));
  checkCuda(hipFree( temp2 ));

  return 0;
}

	.text
	.file	"heat_conduct.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z30__device_stub__step_kernel_modiifPfS_ # -- Begin function _Z30__device_stub__step_kernel_modiifPfS_
	.type	_Z30__device_stub__step_kernel_modiifPfS_,@function
_Z30__device_stub__step_kernel_modiifPfS_: # @_Z30__device_stub__step_kernel_modiifPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	4(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	40(%rsp), %r8
	movq	%rdx, (%r8)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%r8, 24(%rbx)
	movq	%rdx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15step_kernel_modiifPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__step_kernel_modiifPfS_, .Lfunc_end0-_Z30__device_stub__step_kernel_modiifPfS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z10initRandomPfS_S_S_ii
.LCPI1_0:
	.long	0x4ba3d70a                      # float 21474836
	.text
	.globl	_Z10initRandomPfS_S_S_ii
	.type	_Z10initRandomPfS_S_S_ii,@function
_Z10initRandomPfS_S_S_ii:               # @_Z10initRandomPfS_S_S_ii
	.cfi_startproc
# %bb.0:
	imull	%r9d, %r8d
	testl	%r8d, %r8d
	jle	.LBB1_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %r12
	movl	%r8d, %r13d
	xorl	%ebp, %ebp
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	divss	.LCPI1_0(%rip), %xmm0
	movss	%xmm0, (%rbx,%rbp,4)
	movss	%xmm0, (%r14,%rbp,4)
	movss	%xmm0, (%r15,%rbp,4)
	movss	%xmm0, (%r12,%rbp,4)
	incq	%rbp
	cmpq	%rbp, %r13
	jne	.LBB1_2
# %bb.3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB1_4:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z10initRandomPfS_S_S_ii, .Lfunc_end1-_Z10initRandomPfS_S_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z15step_kernel_refiifPfS_      # -- Begin function _Z15step_kernel_refiifPfS_
	.type	_Z15step_kernel_refiifPfS_,@function
_Z15step_kernel_refiifPfS_:             # @_Z15step_kernel_refiifPfS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, -24(%rsp)                 # 8-byte Spill
                                        # kill: def $esi killed $esi def $rsi
                                        # kill: def $edi killed $edi def $rdi
	cmpl	$3, %esi
	jl	.LBB2_5
# %bb.1:                                # %.preheader.lr.ph
	decl	%esi
	leal	-1(%rdi), %ecx
	movslq	%edi, %rax
	leaq	4(%rdx), %r8
	leaq	(,%rax,4), %r9
	shlq	$32, %rax
	movq	%rax, -8(%rsp)                  # 8-byte Spill
	addq	$4, -24(%rsp)                   # 8-byte Folded Spill
	leaq	8(%rdx), %rax
	movq	%rax, -16(%rsp)                 # 8-byte Spill
	leaq	-4(,%rcx,4), %r11
	movl	$1, %ebx
	movabsq	$4294967296, %r14               # imm = 0x100000000
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_7 Depth 2
	cmpl	$2, %edi
	jle	.LBB2_3
# %bb.6:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	leaq	-1(%rbx), %r12
	leaq	1(%rbx), %r15
	movq	%r9, %r13
	imulq	%r15, %r13
	addq	%r8, %r13
	imulq	%r9, %r12
	addq	%r8, %r12
	movq	-8(%rsp), %rax                  # 8-byte Reload
	imulq	%rbx, %rax
	imulq	%r9, %rbx
	movq	-24(%rsp), %rcx                 # 8-byte Reload
	leaq	(%rcx,%rbx), %r10
	addq	-16(%rsp), %rbx                 # 8-byte Folded Reload
	xorl	%ecx, %ecx
.LBB2_7:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%rax, %rbp
	sarq	$30, %rbp
	movss	(%rdx,%rbp), %xmm1              # xmm1 = mem[0],zero,zero,zero
	movss	-4(%rbx,%rcx), %xmm2            # xmm2 = mem[0],zero,zero,zero
	movaps	%xmm2, %xmm3
	addss	%xmm2, %xmm3
	subss	%xmm3, %xmm1
	addss	(%rbx,%rcx), %xmm1
	movss	(%r12,%rcx), %xmm4              # xmm4 = mem[0],zero,zero,zero
	subss	%xmm3, %xmm4
	addss	(%r13,%rcx), %xmm4
	addss	%xmm1, %xmm4
	mulss	%xmm0, %xmm4
	addss	%xmm2, %xmm4
	movss	%xmm4, (%r10,%rcx)
	addq	$4, %rcx
	addq	%r14, %rax
	cmpq	%rcx, %r11
	jne	.LBB2_7
# %bb.8:                                #   in Loop: Header=BB2_2 Depth=1
	movq	%r15, %rbx
	jmp	.LBB2_4
.LBB2_3:                                # %.preheader.._crit_edge_crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%rbx
	movq	%rbx, %r15
.LBB2_4:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	cmpq	%rsi, %r15
	jne	.LBB2_2
.LBB2_5:                                # %._crit_edge42
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z15step_kernel_refiifPfS_, .Lfunc_end2-_Z15step_kernel_refiifPfS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	0x4ba3d70a                      # float 21474836
.LCPI3_1:
	.long	0x38b089cb                      # float 8.41799992E-5
.LCPI3_3:
	.long	0x3a03126f                      # float 5.00000024E-4
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI3_2:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	12(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDevice
	movl	(%rbx), %edx
	leaq	52(%rsp), %rdi
	movl	$63, %esi
	callq	hipDeviceGetAttribute
	leaq	40(%rsp), %rdi
	movl	$80000, %esi                    # imm = 0x13880
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	jne	.LBB3_1
.LBB3_2:                                # %_Z9checkCuda10hipError_t.exit
	leaq	32(%rsp), %rdi
	movl	$80000, %esi                    # imm = 0x13880
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	jne	.LBB3_3
.LBB3_4:                                # %_Z9checkCuda10hipError_t.exit32
	leaq	24(%rsp), %rdi
	movl	$80000, %esi                    # imm = 0x13880
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	jne	.LBB3_5
.LBB3_6:                                # %_Z9checkCuda10hipError_t.exit34
	leaq	16(%rsp), %rdi
	movl	$80000, %esi                    # imm = 0x13880
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	jne	.LBB3_7
.LBB3_8:                                # %_Z9checkCuda10hipError_t.exit36
	movq	40(%rsp), %rdi
	xorl	%ebx, %ebx
	movl	$80000, %esi                    # imm = 0x13880
	movl	$-1, %edx
	xorl	%ecx, %ecx
	callq	hipMemPrefetchAsync
	movq	32(%rsp), %rdi
	movl	$80000, %esi                    # imm = 0x13880
	movl	$-1, %edx
	xorl	%ecx, %ecx
	callq	hipMemPrefetchAsync
	movq	24(%rsp), %rdi
	movl	$80000, %esi                    # imm = 0x13880
	movl	$-1, %edx
	xorl	%ecx, %ecx
	callq	hipMemPrefetchAsync
	movq	16(%rsp), %rdi
	movl	$80000, %esi                    # imm = 0x13880
	movl	$-1, %edx
	xorl	%ecx, %ecx
	callq	hipMemPrefetchAsync
	movq	40(%rsp), %r14
	movq	32(%rsp), %r15
	movq	24(%rsp), %r12
	movq	16(%rsp), %r13
.LBB3_9:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	divss	.LCPI3_0(%rip), %xmm0
	movss	%xmm0, (%r13,%rbx,4)
	movss	%xmm0, (%r12,%rbx,4)
	movss	%xmm0, (%r15,%rbx,4)
	movss	%xmm0, (%r14,%rbx,4)
	incq	%rbx
	cmpq	$20000, %rbx                    # imm = 0x4E20
	jne	.LBB3_9
# %bb.10:                               # %_Z10initRandomPfS_S_S_ii.exit.preheader
	movq	40(%rsp), %rdx
	movl	$200, %ebx
	movq	32(%rsp), %rcx
.LBB3_11:                               # %_Z10initRandomPfS_S_S_ii.exit
                                        # =>This Inner Loop Header: Depth=1
	movl	$200, %edi
	movl	$100, %esi
	movss	.LCPI3_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z15step_kernel_refiifPfS_
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movq	%rdx, 40(%rsp)
	movq	%rcx, 32(%rsp)
	decl	%ebx
	jne	.LBB3_11
# %bb.12:
	movl	12(%rsp), %eax
	movl	$80000, %esi                    # imm = 0x13880
	movq	%rdx, %rdi
	movl	%eax, %edx
	xorl	%ecx, %ecx
	callq	hipMemPrefetchAsync
	movq	32(%rsp), %rdi
	movl	12(%rsp), %edx
	movl	$80000, %esi                    # imm = 0x13880
	xorl	%ecx, %ecx
	callq	hipMemPrefetchAsync
	movq	24(%rsp), %rdi
	movl	12(%rsp), %edx
	movl	$80000, %esi                    # imm = 0x13880
	xorl	%ecx, %ecx
	callq	hipMemPrefetchAsync
	movq	16(%rsp), %rdi
	movl	12(%rsp), %edx
	movl	$80000, %esi                    # imm = 0x13880
	xorl	%ecx, %ecx
	callq	hipMemPrefetchAsync
	movl	$200, %ebp
	movabsq	$55834574852, %rbx              # imm = 0xD00000004
	movabsq	$68719476768, %r14              # imm = 0x1000000020
.LBB3_13:                               # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_15
# %bb.14:                               #   in Loop: Header=BB3_13 Depth=1
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rcx
	movl	$200, %edi
	movl	$100, %esi
	movss	.LCPI3_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z30__device_stub__step_kernel_modiifPfS_
.LBB3_15:                               #   in Loop: Header=BB3_13 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB3_16
.LBB3_17:                               # %_Z9checkCuda10hipError_t.exit38
                                        #   in Loop: Header=BB3_13 Depth=1
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB3_18
.LBB3_19:                               # %_Z9checkCuda10hipError_t.exit40
                                        #   in Loop: Header=BB3_13 Depth=1
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rax
	movq	%rax, 24(%rsp)
	movq	%rcx, 16(%rsp)
	decl	%ebp
	jne	.LBB3_13
	jmp	.LBB3_20
.LBB3_16:                               #   in Loop: Header=BB3_13 Depth=1
	movq	stderr(%rip), %r15
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%r15, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB3_17
.LBB3_18:                               #   in Loop: Header=BB3_13 Depth=1
	movq	stderr(%rip), %r15
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%r15, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB3_19
.LBB3_20:                               # %.preheader
	xorps	%xmm0, %xmm0
	movq	40(%rsp), %rcx
	xorl	%edx, %edx
	movaps	.LCPI3_2(%rip), %xmm1           # xmm1 = [NaN,NaN,NaN,NaN]
.LBB3_21:                               # =>This Inner Loop Header: Depth=1
	movaps	%xmm0, %xmm2
	movss	(%rax,%rdx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	subss	(%rcx,%rdx,4), %xmm0
	andps	%xmm1, %xmm0
	maxss	%xmm2, %xmm0
	incq	%rdx
	cmpq	$20000, %rdx                    # imm = 0x4E20
	jne	.LBB3_21
# %bb.22:
	ucomiss	.LCPI3_3(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %eax
	movl	$.L.str.1, %edi
	cmovaq	%rax, %rdi
	movb	$1, %al
	callq	printf
	movq	40(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB3_23
.LBB3_24:                               # %_Z9checkCuda10hipError_t.exit42
	movq	32(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB3_25
.LBB3_26:                               # %_Z9checkCuda10hipError_t.exit44
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB3_27
.LBB3_28:                               # %_Z9checkCuda10hipError_t.exit46
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB3_29
.LBB3_30:                               # %_Z9checkCuda10hipError_t.exit48
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_1:
	.cfi_def_cfa_offset 112
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB3_2
.LBB3_3:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB3_4
.LBB3_5:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB3_6
.LBB3_7:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB3_8
.LBB3_23:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB3_24
.LBB3_25:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB3_26
.LBB3_27:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB3_28
.LBB3_29:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB3_30
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15step_kernel_modiifPfS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15step_kernel_modiifPfS_,@object # @_Z15step_kernel_modiifPfS_
	.section	.rodata,"a",@progbits
	.globl	_Z15step_kernel_modiifPfS_
	.p2align	3, 0x0
_Z15step_kernel_modiifPfS_:
	.quad	_Z30__device_stub__step_kernel_modiifPfS_
	.size	_Z15step_kernel_modiifPfS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Problem! The Max Error of %.5f is NOT within acceptable bounds.\n"
	.size	.L.str, 65

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"The Max Error of %.5f is within acceptable bounds.\n"
	.size	.L.str.1, 52

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"CUDA Runtime Error: %s\n"
	.size	.L.str.2, 24

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15step_kernel_modiifPfS_"
	.size	.L__unnamed_1, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__step_kernel_modiifPfS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15step_kernel_modiifPfS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15step_kernel_modiifPfS_ ; -- Begin function _Z15step_kernel_modiifPfS_
	.globl	_Z15step_kernel_modiifPfS_
	.p2align	8
	.type	_Z15step_kernel_modiifPfS_,@function
_Z15step_kernel_modiifPfS_:             ; @_Z15step_kernel_modiifPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x0
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[0:1], null, s15, s3, v[4:5]
	s_add_i32 s2, s5, -1
	s_add_i32 s3, s4, -1
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_i32_e32 v1, v2, v0
	v_cmp_gt_i32_e64 s2, s3, v0
	v_cmp_lt_i32_e64 s3, 0, v1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_mul_lo_u32 v1, v2, s4
	s_load_b128 s[0:3], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v2, s4, v1
	v_add_nc_u32_e32 v1, v1, v0
	v_add_nc_u32_e32 v3, v2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshl_add_u32 v0, s4, 1, v3
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v6, vcc_lo
	v_add_co_u32 v9, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v1, vcc_lo
	s_clause 0x2
	global_load_b96 v[0:2], v[7:8], off offset:-4
	global_load_b32 v7, v[9:10], off
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(2)
	v_fma_f32 v0, -2.0, v1, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v7, -2.0, v1 :: v_dual_add_f32 v0, v2, v0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v7, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v0, v0, v2
	v_add_co_u32 v2, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v6, vcc_lo
	v_fmac_f32_e32 v1, s6, v0
	global_store_b32 v[2:3], v1, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15step_kernel_modiifPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15step_kernel_modiifPfS_, .Lfunc_end0-_Z15step_kernel_modiifPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 380
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15step_kernel_modiifPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15step_kernel_modiifPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
