///-------------------------------------------------------------------------------------------------
// file:	pfxsum.cu
//
// summary:	simple cuda prefix sum
///-------------------------------------------------------------------------------------------------

#define PFXSUM_BLOCK_SIZE  256

__device__ int nextpowerof2(int n) {
int k;
	if (n > 1) 
	{
	  float f = (float) n;
	  unsigned int const t = 1U << ((*(unsigned int *)&f >> 23) - 0x7f);
	  k = t << (t < n);
	}
	else k = 1;
	return k;
}

extern "C" __global__ void 
pfxsum( 
    int * pin,
    int * pout,
	int N
    ) 
{
	__shared__ int g_shared[PFXSUM_BLOCK_SIZE];
	unsigned int t;
	int idx	= threadIdx.x;
    int d, e;
    int offset = 1;
	int nbIdx = idx*2;
	int nbIdx1 = 2*idx+1;
	g_shared[nbIdx] = nbIdx < N ? pin[nbIdx] : 0;
	g_shared[nbIdx1] = nbIdx1 < N ? pin[nbIdx1] : 0;
	float f = (float) N;
	t = 1U << ((*(unsigned int *)&f >> 23) - 0x7f);
	int nUpper = t << (t < N);
	for(d = nUpper >> 1; d > 0; d >>= 1) {
        __syncthreads();
        if(idx < d) {
            int ai = offset*(2*idx+1)-1;
            int bi = offset*(2*idx+2)-1;
            g_shared[bi] += g_shared[ai];
        }
        offset *= 2;
    }
    if(idx == 0) {
        g_shared[nUpper-1] = 0;
    }
    for(e=1; e<nUpper; e*=2) {
        offset >>= 1;
        __syncthreads();
        if(idx < e) {
            int ai = offset*(2*idx+1)-1;   
            int bi = offset*(2*idx+2)-1;  
			int t = g_shared[ai];   
			g_shared[ai] = g_shared[bi];   
			g_shared[bi] += t; 
        }
    }
    __syncthreads();
    if(2*idx<N) pout[2*idx] = g_shared[2*idx];
    if(2*idx+1<N) pout[2*idx+1] = g_shared[2*idx+1];
	__syncthreads();
}

template<typename T,                // type of input (assumed integral)
         int nBlockSize>            // shared memory block size 
__device__ void 	
tpfxsum( 
	T * pin,
	T * pout,
	int N
	) 
{
	__shared__ int g_shared[nBlockSize];
	int idx	= threadIdx.x;
	T d, e;
	int offset = 1;
	g_shared[idx*2] = pin[2*idx];
	g_shared[2*idx+1] = pin[2*idx+1];
	for(d = N >> 1; d > 0; d >>= 1) {
		__syncthreads();
		if(idx < d) {
			T ai = offset*(2*idx+1)-1;
			T bi = offset*(2*idx+2)-1;
			g_shared[bi] += g_shared[ai];
		}
		offset *= 2;
	}
	if(idx == 0) {
		g_shared[N-1] = 0;
	}
	for(e=1; e<N; e*=2) {
		offset >>= 1;
		__syncthreads();
		if(idx < e) {
			int ai = offset*(2*idx+1)-1;   
			int bi = offset*(2*idx+2)-1;  
			int t = g_shared[ai];   
			g_shared[ai] = g_shared[bi];   
			g_shared[bi] += t; 
		}
	}
	__syncthreads();
	pout[2*idx] = g_shared[2*idx];
	pout[2*idx+1] = g_shared[2*idx+1];
	__syncthreads();
}

extern "C" __global__ void 
cpfxsum( 
    int * pin,
    int * pout,
	int N
    ) 
{
	tpfxsum<int, PFXSUM_BLOCK_SIZE>(pin,
									pout,
									N);
}
	.file	"tmpxft_0025484e_00000000-6_pfxsum.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2012:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2012:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z12nextpowerof2i
	.type	_Z12nextpowerof2i, @function
_Z12nextpowerof2i:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2008:
	.size	_Z12nextpowerof2i, .-_Z12nextpowerof2i
	.globl	_Z28__device_stub__Z6pfxsumPiS_iPiS_i
	.type	_Z28__device_stub__Z6pfxsumPiS_iPiS_i, @function
_Z28__device_stub__Z6pfxsumPiS_iPiS_i:
.LFB2034:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	pfxsum(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L4:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z28__device_stub__Z6pfxsumPiS_iPiS_i, .-_Z28__device_stub__Z6pfxsumPiS_iPiS_i
	.globl	pfxsum
	.type	pfxsum, @function
pfxsum:
.LFB2035:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z6pfxsumPiS_iPiS_i
	.cfi_endproc
.LFE2035:
	.size	pfxsum, .-pfxsum
	.globl	_Z29__device_stub__Z7cpfxsumPiS_iPiS_i
	.type	_Z29__device_stub__Z7cpfxsumPiS_iPiS_i, @function
_Z29__device_stub__Z7cpfxsumPiS_iPiS_i:
.LFB2036:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	cpfxsum(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L10:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	_Z29__device_stub__Z7cpfxsumPiS_iPiS_i, .-_Z29__device_stub__Z7cpfxsumPiS_iPiS_i
	.globl	cpfxsum
	.type	cpfxsum, @function
cpfxsum:
.LFB2037:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z7cpfxsumPiS_iPiS_i
	.cfi_endproc
.LFE2037:
	.size	cpfxsum, .-cpfxsum
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"cpfxsum"
.LC1:
	.string	"pfxsum"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2039:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	cpfxsum(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	pfxsum(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2039:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
///-------------------------------------------------------------------------------------------------
// file:	pfxsum.cu
//
// summary:	simple cuda prefix sum
///-------------------------------------------------------------------------------------------------

#define PFXSUM_BLOCK_SIZE  256

__device__ int nextpowerof2(int n) {
int k;
	if (n > 1) 
	{
	  float f = (float) n;
	  unsigned int const t = 1U << ((*(unsigned int *)&f >> 23) - 0x7f);
	  k = t << (t < n);
	}
	else k = 1;
	return k;
}

extern "C" __global__ void 
pfxsum( 
    int * pin,
    int * pout,
	int N
    ) 
{
	__shared__ int g_shared[PFXSUM_BLOCK_SIZE];
	unsigned int t;
	int idx	= threadIdx.x;
    int d, e;
    int offset = 1;
	int nbIdx = idx*2;
	int nbIdx1 = 2*idx+1;
	g_shared[nbIdx] = nbIdx < N ? pin[nbIdx] : 0;
	g_shared[nbIdx1] = nbIdx1 < N ? pin[nbIdx1] : 0;
	float f = (float) N;
	t = 1U << ((*(unsigned int *)&f >> 23) - 0x7f);
	int nUpper = t << (t < N);
	for(d = nUpper >> 1; d > 0; d >>= 1) {
        __syncthreads();
        if(idx < d) {
            int ai = offset*(2*idx+1)-1;
            int bi = offset*(2*idx+2)-1;
            g_shared[bi] += g_shared[ai];
        }
        offset *= 2;
    }
    if(idx == 0) {
        g_shared[nUpper-1] = 0;
    }
    for(e=1; e<nUpper; e*=2) {
        offset >>= 1;
        __syncthreads();
        if(idx < e) {
            int ai = offset*(2*idx+1)-1;   
            int bi = offset*(2*idx+2)-1;  
			int t = g_shared[ai];   
			g_shared[ai] = g_shared[bi];   
			g_shared[bi] += t; 
        }
    }
    __syncthreads();
    if(2*idx<N) pout[2*idx] = g_shared[2*idx];
    if(2*idx+1<N) pout[2*idx+1] = g_shared[2*idx+1];
	__syncthreads();
}

template<typename T,                // type of input (assumed integral)
         int nBlockSize>            // shared memory block size 
__device__ void 	
tpfxsum( 
	T * pin,
	T * pout,
	int N
	) 
{
	__shared__ int g_shared[nBlockSize];
	int idx	= threadIdx.x;
	T d, e;
	int offset = 1;
	g_shared[idx*2] = pin[2*idx];
	g_shared[2*idx+1] = pin[2*idx+1];
	for(d = N >> 1; d > 0; d >>= 1) {
		__syncthreads();
		if(idx < d) {
			T ai = offset*(2*idx+1)-1;
			T bi = offset*(2*idx+2)-1;
			g_shared[bi] += g_shared[ai];
		}
		offset *= 2;
	}
	if(idx == 0) {
		g_shared[N-1] = 0;
	}
	for(e=1; e<N; e*=2) {
		offset >>= 1;
		__syncthreads();
		if(idx < e) {
			int ai = offset*(2*idx+1)-1;   
			int bi = offset*(2*idx+2)-1;  
			int t = g_shared[ai];   
			g_shared[ai] = g_shared[bi];   
			g_shared[bi] += t; 
		}
	}
	__syncthreads();
	pout[2*idx] = g_shared[2*idx];
	pout[2*idx+1] = g_shared[2*idx+1];
	__syncthreads();
}

extern "C" __global__ void 
cpfxsum( 
    int * pin,
    int * pout,
	int N
    ) 
{
	tpfxsum<int, PFXSUM_BLOCK_SIZE>(pin,
									pout,
									N);
}
	.text
	.file	"pfxsum.hip"
	.globl	__device_stub__pfxsum           # -- Begin function __device_stub__pfxsum
	.type	__device_stub__pfxsum,@function
__device_stub__pfxsum:                  # @__device_stub__pfxsum
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$pfxsum, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	__device_stub__pfxsum, .Lfunc_end0-__device_stub__pfxsum
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__cpfxsum          # -- Begin function __device_stub__cpfxsum
	.type	__device_stub__cpfxsum,@function
__device_stub__cpfxsum:                 # @__device_stub__cpfxsum
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$cpfxsum, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	__device_stub__cpfxsum, .Lfunc_end1-__device_stub__cpfxsum
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$pfxsum, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$cpfxsum, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	pfxsum,@object                  # @pfxsum
	.section	.rodata,"a",@progbits
	.globl	pfxsum
	.p2align	3, 0x0
pfxsum:
	.quad	__device_stub__pfxsum
	.size	pfxsum, 8

	.type	cpfxsum,@object                 # @cpfxsum
	.globl	cpfxsum
	.p2align	3, 0x0
cpfxsum:
	.quad	__device_stub__cpfxsum
	.size	cpfxsum, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"pfxsum"
	.size	.L__unnamed_1, 7

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"cpfxsum"
	.size	.L__unnamed_2, 8

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __device_stub__pfxsum
	.addrsig_sym __device_stub__cpfxsum
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym pfxsum
	.addrsig_sym cpfxsum
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	pfxsum                  ; -- Begin function pfxsum
	.globl	pfxsum
	.p2align	8
	.type	pfxsum,@function
pfxsum:                                 ; @pfxsum
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	v_dual_mov_b32 v3, 0 :: v_dual_lshlrev_b32 v2, 1, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v4, 0 :: v_dual_lshlrev_b32 v1, 2, v2
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	global_load_b32 v4, v1, s[4:5]
.LBB0_2:                                ; %._crit_edge69
	s_or_b32 exec_lo, exec_lo, s0
	v_or_b32_e32 v2, 1, v2
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v4
	v_cmp_gt_i32_e64 s0, s2, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_4
; %bb.3:
	global_load_b32 v3, v1, s[4:5] offset:4
.LBB0_4:                                ; %._crit_edge68
	s_or_b32 exec_lo, exec_lo, s1
	v_cvt_f32_i32_e32 v4, s2
	s_mov_b32 s3, 1
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v3 offset:4
	v_readfirstlane_b32 s1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s1, s1, 23
	s_addk_i32 s1, 0xff81
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s1, 1, s1
	s_cmp_lt_u32 s1, s2
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, 0, 1, s2
	v_readfirstlane_b32 s2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s2, s1, s2
	s_ashr_i32 s4, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB0_9
.LBB0_5:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_i32_e64 s4, v0
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	v_mul_lo_u32 v3, s3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v3, v3, 2, -4
	v_lshl_add_u32 v4, s3, 2, v3
	ds_load_b32 v3, v3
	ds_load_b32 v5, v4
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v3, v5, v3
	ds_store_b32 v4, v3
.LBB0_7:                                ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_lshl_b32 s3, s3, 1
	s_lshr_b32 s1, s4, 1
	s_cmp_gt_u32 s4, 1
	s_cbranch_scc0 .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_5 Depth=1
	s_mov_b32 s4, s1
	s_branch .LBB0_5
.LBB0_9:                                ; %._crit_edge
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_11
; %bb.10:
	s_lshl_b32 s1, s2, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s1, s1, -4
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v4, s1
	ds_store_b32 v4, v3
.LBB0_11:
	s_or_b32 exec_lo, exec_lo, s4
	s_cmp_lt_i32 s2, 2
	s_cbranch_scc1 .LBB0_16
; %bb.12:                               ; %.lr.ph66
	s_mov_b32 s4, 1
.LBB0_13:                               ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s3, s3, 1
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s4, v0
	s_cbranch_execz .LBB0_15
; %bb.14:                               ;   in Loop: Header=BB0_13 Depth=1
	v_mul_lo_u32 v3, s3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v3, v3, 2, -4
	v_lshl_add_u32 v4, s3, 2, v3
	ds_load_b32 v5, v3
	ds_load_b32 v6, v4
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v5, v6, v5
	ds_store_b32 v3, v6
	ds_store_b32 v4, v5
.LBB0_15:                               ;   in Loop: Header=BB0_13 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_lshl_b32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s4, s2
	s_cbranch_scc1 .LBB0_13
.LBB0_16:                               ; %._crit_edge67
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB0_18
; %bb.17:
	ds_load_b32 v0, v1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v1, v0, s[6:7]
.LBB0_18:
	s_or_b32 exec_lo, exec_lo, s1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_20
; %bb.19:
	ds_load_b32 v0, v1 offset:4
	s_waitcnt lgkmcnt(0)
	global_store_b32 v1, v0, s[6:7] offset:4
.LBB0_20:
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel pfxsum
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 8
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	pfxsum, .Lfunc_end0-pfxsum
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 608
; NumSgprs: 10
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 10
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	cpfxsum                 ; -- Begin function cpfxsum
	.globl	cpfxsum
	.p2align	8
	.type	cpfxsum,@function
cpfxsum:                                ; @cpfxsum
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshlrev_b32_e32 v1, 3, v0
	s_load_b32 s0, s[0:1], 0x10
	v_lshlrev_b32_e32 v2, 1, v0
	s_mov_b32 s1, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_or_b32_e32 v3, 1, v2
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[4:5], v1, s[4:5]
	s_ashr_i32 s2, s0, 1
	s_cmp_lt_i32 s2, 1
	s_waitcnt vmcnt(0)
	ds_store_b64 v1, v[4:5]
	s_cbranch_scc1 .LBB1_5
.LBB1_1:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s3, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_i32_e64 s2, v0
	s_cbranch_execz .LBB1_3
; %bb.2:                                ;   in Loop: Header=BB1_1 Depth=1
	v_mul_lo_u32 v4, s1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v4, v4, 2, -4
	v_lshl_add_u32 v5, s1, 2, v4
	ds_load_b32 v4, v4
	ds_load_b32 v6, v5
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v4, v6, v4
	ds_store_b32 v5, v4
.LBB1_3:                                ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_lshl_b32 s1, s1, 1
	s_lshr_b32 s3, s2, 1
	s_cmp_gt_u32 s2, 1
	s_cbranch_scc0 .LBB1_5
; %bb.4:                                ;   in Loop: Header=BB1_1 Depth=1
	s_mov_b32 s2, s3
	s_branch .LBB1_1
.LBB1_5:                                ; %._crit_edge.i
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_7
; %bb.6:
	s_lshl_b32 s3, s0, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s3, -4
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, s3
	ds_store_b32 v5, v4
.LBB1_7:
	s_or_b32 exec_lo, exec_lo, s2
	s_cmp_lt_i32 s0, 2
	s_cbranch_scc1 .LBB1_12
; %bb.8:                                ; %.lr.ph47.i
	s_mov_b32 s2, 1
.LBB1_9:                                ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s1, s1, 1
	s_mov_b32 s3, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s2, v0
	s_cbranch_execz .LBB1_11
; %bb.10:                               ;   in Loop: Header=BB1_9 Depth=1
	v_mul_lo_u32 v4, s1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v4, v4, 2, -4
	v_lshl_add_u32 v5, s1, 2, v4
	ds_load_b32 v6, v4
	ds_load_b32 v7, v5
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v7, v6
	ds_store_b32 v4, v7
	ds_store_b32 v5, v6
.LBB1_11:                               ;   in Loop: Header=BB1_9 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_lshl_b32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s2, s0
	s_cbranch_scc1 .LBB1_9
.LBB1_12:                               ; %_Z7tpfxsumIiLi256EEvPT_S1_i.exit
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b64 v[0:1], v1
	v_lshlrev_b32_e32 v2, 2, v2
	s_waitcnt lgkmcnt(0)
	global_store_b64 v2, v[0:1], s[6:7]
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel cpfxsum
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	cpfxsum, .Lfunc_end1-cpfxsum
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 432
; NumSgprs: 8
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           pfxsum
    .private_segment_fixed_size: 0
    .sgpr_count:     10
    .sgpr_spill_count: 0
    .symbol:         pfxsum.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           cpfxsum
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         cpfxsum.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
