#include <stdio.h>
#include <stdlib.h>
#include <stddef.h>
#include <time.h>

#define N 1000

////////////////////////////Each thread 1 row 1 column
__global__ void kernel_1t1e(float A[N][N], float B[N][N], float C[N][N], int size) {
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    int j = blockIdx.y * blockDim.y + threadIdx.y;
    if (i < size && j < size){
        A[i][j] = B[i][j] + C[i][j];
    }
}
///////////////////////////Each thread 1 row
__global__ void kernel_1t1r(float A[N][N], float B[N][N], float C[N][N], int size) {
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    if (i < size){
	for (int j = 0; j < size; j++){
        A[i][j] = B[i][j] + C[i][j];
	}
    }
}
///////////////////////////Each thread 1 column
__global__ void kernel_1t1c(float A[N][N], float B[N][N], float C[N][N], int size) {
    int j = blockIdx.y * blockDim.y + threadIdx.y;
    if (j < size){
        for (int i = 0; i < size; i++){
        A[i][j] = B[i][j] + C[i][j];
        }
    }
}

int main(void){
  int nDevices;
  int i, j;
  float A[N][N], B[N][N], C[N][N], (*A_d)[N], (*B_d)[N], (*C_d)[N];

//Print device properties
  cudaGetDeviceCount(&nDevices);
  for (int i = 0; i < nDevices; i++) {
    cudaDeviceProp prop;
    cudaGetDeviceProperties(&prop, i);
    printf("Device Number: %d\n", i);
    printf("  Device name: %s\n", prop.name);
    printf("  MaxThreadPerBlock: %d\n",
           prop.maxThreadsPerBlock);
    printf("  MaxThreadsDim0: %d\n",
           prop.maxThreadsDim[0]);
    printf("  MaxThreadsDim1: %d\n",
           prop.maxThreadsDim[1]);
    printf("  MaxThreadsDim2: %d\n",
           prop.maxThreadsDim[2]);
    printf("  MaxGridSize: %d\n",
           prop.maxGridSize[1]);
    printf("  Warp Size: %d\n",
           prop.warpSize);
  }
//Populate First Matrix
   srand(1);
   for (i = 0; i < N; i++){
      for (j = 0; j < N; j++) {
         B[i][j] = ((float)rand()/(float)(RAND_MAX)) * 100;
//         printf("%f  ", B[i][j]);
      }
      printf("\n");
   }
   printf("\n");
//Populate Second Matrix
   for (i = 0; i < N; i++){
      for (j = 0; j < N; j++) {
         C[i][j] = ((float)rand()/(float)(RAND_MAX)) * 100;
//	 printf("%f  ", C[i][j]);
      }
     printf("\n");
   }
   printf("\n");
   printf("===============================");
   printf("\n");

//Allocate memory in the device
   
   cudaMalloc((void**) &A_d, (N*N)*sizeof(float));
   cudaMalloc((void**) &B_d, (N*N)*sizeof(float));
   cudaMalloc((void**) &C_d, (N*N)*sizeof(float));

//Mem copy from host to device
   cudaMemcpy(A_d, A, (N*N)*sizeof(float), cudaMemcpyHostToDevice);
   cudaMemcpy(B_d, B, (N*N)*sizeof(float), cudaMemcpyHostToDevice);
   cudaMemcpy(C_d, C, (N*N)*sizeof(float), cudaMemcpyHostToDevice);

   dim3 threadsPerBlock(N, N);
   dim3 numBlocks(N / threadsPerBlock.x, N / threadsPerBlock.y);

   cudaEvent_t start, stop;
   float elapsed = 0;

//ThreadAll

//Run
   cudaEventCreate(&start);
   cudaEventCreate(&stop);
   cudaEventRecord(start, 0);
   kernel_1t1e<<<numBlocks,threadsPerBlock>>>(A_d, B_d, C_d, N);
   cudaEventRecord(stop, 0);

   cudaEventSynchronize(stop);
   cudaEventElapsedTime(&elapsed, start, stop);
   cudaEventDestroy(start);
   cudaEventDestroy(stop);
   printf("GPU Run TIme threadsall %.2f ms \n", elapsed);

////////////////////////////////////Thread Row
/*
   cudaEventCreate(&start);
   cudaEventCreate(&stop);
   cudaEventRecord(start, 0);
   kernel_1t1r<<<numBlocks,threadsPerBlock>>>(A_d, B_d, C_d, N);
   cudaEventRecord(stop, 0);

   cudaEventSynchronize(stop);
   cudaEventElapsedTime(&elapsed, start, stop);
   cudaEventDestroy(start);
   cudaEventDestroy(stop);
   printf("GPU Run TIme threadsrow %.2f ms \n", elapsed);

////////////////////////////////////Thread Column

   cudaEventCreate(&start);
   cudaEventCreate(&stop);
   cudaEventRecord(start, 0);
   kernel_1t1c<<<numBlocks,threadsPerBlock>>>(A_d, B_d, C_d, N);
   cudaEventRecord(stop, 0);

   cudaEventSynchronize(stop);
   cudaEventElapsedTime(&elapsed, start, stop);
   cudaEventDestroy(start);
   cudaEventDestroy(stop);
   printf("GPU Run TIme threadscol %.2f ms \n", elapsed);
*/
//Mem Copy
   cudaMemcpy(A, A_d, (N*N)*sizeof(float), cudaMemcpyDeviceToHost);

/////////////////////////////////////Print matrix A

   for (i = 0; i < N; i++){
      for (j = 0; j < N; j++) {
         printf("%f  ", A[i][j]);
      }
      printf("\n");
   }
   printf("\n");
	
/////////////////////////////////////Free up memory
   cudaFree(A_d); 
   cudaFree(B_d); 
   cudaFree(C_d);
}

	.file	"tmpxft_00255feb_00000000-6_exer1.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z44__device_stub__Z11kernel_1t1ePA1000_fS0_S0_iPA1000_fS0_S0_i
	.type	_Z44__device_stub__Z11kernel_1t1ePA1000_fS0_S0_iPA1000_fS0_S0_i, @function
_Z44__device_stub__Z11kernel_1t1ePA1000_fS0_S0_iPA1000_fS0_S0_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11kernel_1t1ePA1000_fS0_S0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z44__device_stub__Z11kernel_1t1ePA1000_fS0_S0_iPA1000_fS0_S0_i, .-_Z44__device_stub__Z11kernel_1t1ePA1000_fS0_S0_iPA1000_fS0_S0_i
	.globl	_Z11kernel_1t1ePA1000_fS0_S0_i
	.type	_Z11kernel_1t1ePA1000_fS0_S0_i, @function
_Z11kernel_1t1ePA1000_fS0_S0_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z11kernel_1t1ePA1000_fS0_S0_iPA1000_fS0_S0_i
	.cfi_endproc
.LFE2053:
	.size	_Z11kernel_1t1ePA1000_fS0_S0_i, .-_Z11kernel_1t1ePA1000_fS0_S0_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Device Number: %d\n"
.LC1:
	.string	"  Device name: %s\n"
.LC2:
	.string	"  MaxThreadPerBlock: %d\n"
.LC3:
	.string	"  MaxThreadsDim0: %d\n"
.LC4:
	.string	"  MaxThreadsDim1: %d\n"
.LC5:
	.string	"  MaxThreadsDim2: %d\n"
.LC6:
	.string	"  MaxGridSize: %d\n"
.LC7:
	.string	"  Warp Size: %d\n"
.LC10:
	.string	"\n"
.LC11:
	.string	"==============================="
.LC13:
	.string	"GPU Run TIme threadsall %.2f ms \n"
.LC14:
	.string	"%f  "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	-11997184(%rsp), %r11
	.cfi_def_cfa 11, 11997240
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$2904, %rsp
	.cfi_def_cfa_offset 12000144
	xorl	%ebx, %ebx
	leaq	.LC0(%rip), %rbp
	movq	%fs:40, %rax
	movq	%rax, 12000072(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaGetDeviceCount@PLT
.L9:
	cmpl	%ebx, (%rsp)
	leaq	8000072(%rsp), %r12
	jle	.L26
	movl	%ebx, %esi
	movq	%r12, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movl	%ebx, %edx
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%ebx
	call	__printf_chk@PLT
	movq	%r12, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC1(%rip), %rsi
	call	__printf_chk@PLT
	movl	8000392(%rsp), %edx
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	8000396(%rsp), %edx
	leaq	.LC3(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	8000400(%rsp), %edx
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	8000404(%rsp), %edx
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	8000412(%rsp), %edx
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	8000380(%rsp), %edx
	leaq	.LC7(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L9
.L26:
	movl	$1, %edi
	leaq	4000072(%rsp), %rbx
	call	srand@PLT
	movq	%rbx, %r13
.L11:
	xorl	%ebp, %ebp
.L12:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC8(%rip), %xmm0
	mulss	.LC9(%rip), %xmm0
	movss	%xmm0, (%rbx,%rbp,4)
	incq	%rbp
	cmpq	$1000, %rbp
	jne	.L12
	leaq	.LC10(%rip), %rbp
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$4000, %rbx
	movq	%rbp, %rsi
	call	__printf_chk@PLT
	cmpq	%r12, %rbx
	jne	.L11
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%r12, %rbx
	call	__printf_chk@PLT
	leaq	12000072(%rsp), %r14
.L14:
	xorl	%r15d, %r15d
.L15:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC8(%rip), %xmm0
	mulss	.LC9(%rip), %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	$1000, %r15
	jne	.L15
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$4000, %rbx
	call	__printf_chk@PLT
	cmpq	%r14, %rbx
	jne	.L14
	movq	%rbp, %rsi
	movl	$2, %edi
	leaq	72(%rsp), %rbx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	8(%rsp), %rdi
	movl	$4000000, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$4000000, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$4000000, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$4000000, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$4000000, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$4000000, %edx
	call	cudaMemcpy@PLT
	leaq	32(%rsp), %rdi
	movabsq	$4294967297, %rax
	movl	$1, 68(%rsp)
	movq	%rax, 60(%rsp)
	movl	$0x00000000, 4(%rsp)
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	60(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	68(%rsp), %esi
	movl	$1, %ecx
	movabsq	$4294967297000, %rdx
	movl	$1, 56(%rsp)
	movq	%rdx, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1000, %ecx
	movq	8(%rsp), %rdi
	call	_Z44__device_stub__Z11kernel_1t1ePA1000_fS0_S0_iPA1000_fS0_S0_i
.L17:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	leaq	.LC14(%rip), %r14
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	4(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	32(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	40(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	4(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$4000000, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
.L18:
	xorl	%r12d, %r12d
.L19:
	cvtss2sd	(%rbx,%r12,4), %xmm0
	movq	%r14, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%r12
	cmpq	$1000, %r12
	jne	.L19
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$4000, %rbx
	call	__printf_chk@PLT
	cmpq	%rbx, %r13
	jne	.L18
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	12000072(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$12000088, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.text
	.globl	_Z44__device_stub__Z11kernel_1t1rPA1000_fS0_S0_iPA1000_fS0_S0_i
	.type	_Z44__device_stub__Z11kernel_1t1rPA1000_fS0_S0_iPA1000_fS0_S0_i, @function
_Z44__device_stub__Z11kernel_1t1rPA1000_fS0_S0_iPA1000_fS0_S0_i:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11kernel_1t1rPA1000_fS0_S0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L27:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z44__device_stub__Z11kernel_1t1rPA1000_fS0_S0_iPA1000_fS0_S0_i, .-_Z44__device_stub__Z11kernel_1t1rPA1000_fS0_S0_iPA1000_fS0_S0_i
	.globl	_Z11kernel_1t1rPA1000_fS0_S0_i
	.type	_Z11kernel_1t1rPA1000_fS0_S0_i, @function
_Z11kernel_1t1rPA1000_fS0_S0_i:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z11kernel_1t1rPA1000_fS0_S0_iPA1000_fS0_S0_i
	.cfi_endproc
.LFE2055:
	.size	_Z11kernel_1t1rPA1000_fS0_S0_i, .-_Z11kernel_1t1rPA1000_fS0_S0_i
	.globl	_Z44__device_stub__Z11kernel_1t1cPA1000_fS0_S0_iPA1000_fS0_S0_i
	.type	_Z44__device_stub__Z11kernel_1t1cPA1000_fS0_S0_iPA1000_fS0_S0_i, @function
_Z44__device_stub__Z11kernel_1t1cPA1000_fS0_S0_iPA1000_fS0_S0_i:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11kernel_1t1cPA1000_fS0_S0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L32:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z44__device_stub__Z11kernel_1t1cPA1000_fS0_S0_iPA1000_fS0_S0_i, .-_Z44__device_stub__Z11kernel_1t1cPA1000_fS0_S0_iPA1000_fS0_S0_i
	.globl	_Z11kernel_1t1cPA1000_fS0_S0_i
	.type	_Z11kernel_1t1cPA1000_fS0_S0_i, @function
_Z11kernel_1t1cPA1000_fS0_S0_i:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z11kernel_1t1cPA1000_fS0_S0_iPA1000_fS0_S0_i
	.cfi_endproc
.LFE2057:
	.size	_Z11kernel_1t1cPA1000_fS0_S0_i, .-_Z11kernel_1t1cPA1000_fS0_S0_i
	.section	.rodata.str1.1
.LC15:
	.string	"_Z11kernel_1t1cPA1000_fS0_S0_i"
.LC16:
	.string	"_Z11kernel_1t1rPA1000_fS0_S0_i"
.LC17:
	.string	"_Z11kernel_1t1ePA1000_fS0_S0_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11kernel_1t1cPA1000_fS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11kernel_1t1rPA1000_fS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11kernel_1t1ePA1000_fS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC8:
	.long	805306368
	.align 4
.LC9:
	.long	1120403456
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <stddef.h>
#include <time.h>

#define N 1000

////////////////////////////Each thread 1 row 1 column
__global__ void kernel_1t1e(float A[N][N], float B[N][N], float C[N][N], int size) {
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    int j = blockIdx.y * blockDim.y + threadIdx.y;
    if (i < size && j < size){
        A[i][j] = B[i][j] + C[i][j];
    }
}
///////////////////////////Each thread 1 row
__global__ void kernel_1t1r(float A[N][N], float B[N][N], float C[N][N], int size) {
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    if (i < size){
	for (int j = 0; j < size; j++){
        A[i][j] = B[i][j] + C[i][j];
	}
    }
}
///////////////////////////Each thread 1 column
__global__ void kernel_1t1c(float A[N][N], float B[N][N], float C[N][N], int size) {
    int j = blockIdx.y * blockDim.y + threadIdx.y;
    if (j < size){
        for (int i = 0; i < size; i++){
        A[i][j] = B[i][j] + C[i][j];
        }
    }
}

int main(void){
  int nDevices;
  int i, j;
  float A[N][N], B[N][N], C[N][N], (*A_d)[N], (*B_d)[N], (*C_d)[N];

//Print device properties
  hipGetDeviceCount(&nDevices);
  for (int i = 0; i < nDevices; i++) {
    hipDeviceProp_t prop;
    hipGetDeviceProperties(&prop, i);
    printf("Device Number: %d\n", i);
    printf("  Device name: %s\n", prop.name);
    printf("  MaxThreadPerBlock: %d\n",
           prop.maxThreadsPerBlock);
    printf("  MaxThreadsDim0: %d\n",
           prop.maxThreadsDim[0]);
    printf("  MaxThreadsDim1: %d\n",
           prop.maxThreadsDim[1]);
    printf("  MaxThreadsDim2: %d\n",
           prop.maxThreadsDim[2]);
    printf("  MaxGridSize: %d\n",
           prop.maxGridSize[1]);
    printf("  Warp Size: %d\n",
           prop.warpSize);
  }
//Populate First Matrix
   srand(1);
   for (i = 0; i < N; i++){
      for (j = 0; j < N; j++) {
         B[i][j] = ((float)rand()/(float)(RAND_MAX)) * 100;
//         printf("%f  ", B[i][j]);
      }
      printf("\n");
   }
   printf("\n");
//Populate Second Matrix
   for (i = 0; i < N; i++){
      for (j = 0; j < N; j++) {
         C[i][j] = ((float)rand()/(float)(RAND_MAX)) * 100;
//	 printf("%f  ", C[i][j]);
      }
     printf("\n");
   }
   printf("\n");
   printf("===============================");
   printf("\n");

//Allocate memory in the device
   
   hipMalloc((void**) &A_d, (N*N)*sizeof(float));
   hipMalloc((void**) &B_d, (N*N)*sizeof(float));
   hipMalloc((void**) &C_d, (N*N)*sizeof(float));

//Mem copy from host to device
   hipMemcpy(A_d, A, (N*N)*sizeof(float), hipMemcpyHostToDevice);
   hipMemcpy(B_d, B, (N*N)*sizeof(float), hipMemcpyHostToDevice);
   hipMemcpy(C_d, C, (N*N)*sizeof(float), hipMemcpyHostToDevice);

   dim3 threadsPerBlock(N, N);
   dim3 numBlocks(N / threadsPerBlock.x, N / threadsPerBlock.y);

   hipEvent_t start, stop;
   float elapsed = 0;

//ThreadAll

//Run
   hipEventCreate(&start);
   hipEventCreate(&stop);
   hipEventRecord(start, 0);
   kernel_1t1e<<<numBlocks,threadsPerBlock>>>(A_d, B_d, C_d, N);
   hipEventRecord(stop, 0);

   hipEventSynchronize(stop);
   hipEventElapsedTime(&elapsed, start, stop);
   hipEventDestroy(start);
   hipEventDestroy(stop);
   printf("GPU Run TIme threadsall %.2f ms \n", elapsed);

////////////////////////////////////Thread Row
/*
   cudaEventCreate(&start);
   cudaEventCreate(&stop);
   cudaEventRecord(start, 0);
   kernel_1t1r<<<numBlocks,threadsPerBlock>>>(A_d, B_d, C_d, N);
   cudaEventRecord(stop, 0);

   cudaEventSynchronize(stop);
   cudaEventElapsedTime(&elapsed, start, stop);
   cudaEventDestroy(start);
   cudaEventDestroy(stop);
   printf("GPU Run TIme threadsrow %.2f ms \n", elapsed);

////////////////////////////////////Thread Column

   cudaEventCreate(&start);
   cudaEventCreate(&stop);
   cudaEventRecord(start, 0);
   kernel_1t1c<<<numBlocks,threadsPerBlock>>>(A_d, B_d, C_d, N);
   cudaEventRecord(stop, 0);

   cudaEventSynchronize(stop);
   cudaEventElapsedTime(&elapsed, start, stop);
   cudaEventDestroy(start);
   cudaEventDestroy(stop);
   printf("GPU Run TIme threadscol %.2f ms \n", elapsed);
*/
//Mem Copy
   hipMemcpy(A, A_d, (N*N)*sizeof(float), hipMemcpyDeviceToHost);

/////////////////////////////////////Print matrix A

   for (i = 0; i < N; i++){
      for (j = 0; j < N; j++) {
         printf("%f  ", A[i][j]);
      }
      printf("\n");
   }
   printf("\n");
	
/////////////////////////////////////Free up memory
   hipFree(A_d); 
   hipFree(B_d); 
   hipFree(C_d);
}

	.text
	.file	"exer1.hip"
	.globl	_Z26__device_stub__kernel_1t1ePA1000_fS0_S0_i # -- Begin function _Z26__device_stub__kernel_1t1ePA1000_fS0_S0_i
	.type	_Z26__device_stub__kernel_1t1ePA1000_fS0_S0_i,@function
_Z26__device_stub__kernel_1t1ePA1000_fS0_S0_i: # @_Z26__device_stub__kernel_1t1ePA1000_fS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_1t1ePA1000_fS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__kernel_1t1ePA1000_fS0_S0_i, .Lfunc_end0-_Z26__device_stub__kernel_1t1ePA1000_fS0_S0_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__kernel_1t1rPA1000_fS0_S0_i # -- Begin function _Z26__device_stub__kernel_1t1rPA1000_fS0_S0_i
	.type	_Z26__device_stub__kernel_1t1rPA1000_fS0_S0_i,@function
_Z26__device_stub__kernel_1t1rPA1000_fS0_S0_i: # @_Z26__device_stub__kernel_1t1rPA1000_fS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_1t1rPA1000_fS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z26__device_stub__kernel_1t1rPA1000_fS0_S0_i, .Lfunc_end1-_Z26__device_stub__kernel_1t1rPA1000_fS0_S0_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__kernel_1t1cPA1000_fS0_S0_i # -- Begin function _Z26__device_stub__kernel_1t1cPA1000_fS0_S0_i
	.type	_Z26__device_stub__kernel_1t1cPA1000_fS0_S0_i,@function
_Z26__device_stub__kernel_1t1cPA1000_fS0_S0_i: # @_Z26__device_stub__kernel_1t1cPA1000_fS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_1t1cPA1000_fS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z26__device_stub__kernel_1t1cPA1000_fS0_S0_i, .Lfunc_end2-_Z26__device_stub__kernel_1t1cPA1000_fS0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI3_1:
	.long	0x42c80000                      # float 100
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$12000056, %rsp                 # imm = 0xB71B38
	.cfi_def_cfa_offset 12000096
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	20(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	cmpl	$0, (%rbx)
	jle	.LBB3_3
# %bb.1:                                # %.lr.ph
	leaq	48(%rsp), %rbx
	xorl	%ebp, %ebp
.LBB3_2:                                # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	%ebp, %esi
	callq	hipGetDevicePropertiesR0600
	movl	$.L.str, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	368(%rsp), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movl	372(%rsp), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movl	376(%rsp), %esi
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	movl	380(%rsp), %esi
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	callq	printf
	movl	388(%rsp), %esi
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
	movl	356(%rsp), %esi
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
	incl	%ebp
	cmpl	20(%rsp), %ebp
	jl	.LBB3_2
.LBB3_3:                                # %._crit_edge
	movl	$1, %edi
	callq	srand
	leaq	8000048(%rsp), %rbx
	xorl	%r14d, %r14d
.LBB3_4:                                # %.preheader42
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_5 Depth 2
	xorl	%r15d, %r15d
.LBB3_5:                                #   Parent Loop BB3_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI3_0(%rip), %xmm0
	mulss	.LCPI3_1(%rip), %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	$1000, %r15                     # imm = 0x3E8
	jne	.LBB3_5
# %bb.6:                                #   in Loop: Header=BB3_4 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$4000, %rbx                     # imm = 0xFA0
	cmpq	$1000, %r14                     # imm = 0x3E8
	jne	.LBB3_4
# %bb.7:
	movl	$10, %edi
	callq	putchar@PLT
	leaq	4000048(%rsp), %rbx
	xorl	%r14d, %r14d
.LBB3_8:                                # %.preheader41
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_9 Depth 2
	xorl	%r15d, %r15d
.LBB3_9:                                #   Parent Loop BB3_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI3_0(%rip), %xmm0
	mulss	.LCPI3_1(%rip), %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	$1000, %r15                     # imm = 0x3E8
	jne	.LBB3_9
# %bb.10:                               #   in Loop: Header=BB3_8 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$4000, %rbx                     # imm = 0xFA0
	cmpq	$1000, %r14                     # imm = 0x3E8
	jne	.LBB3_8
# %bb.11:
	movl	$10, %edi
	callq	putchar@PLT
	movl	$.L.str.9, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	leaq	8(%rsp), %rbx
	movl	$4000000, %esi                  # imm = 0x3D0900
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	40(%rsp), %r14
	movl	$4000000, %esi                  # imm = 0x3D0900
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	32(%rsp), %r15
	movl	$4000000, %esi                  # imm = 0x3D0900
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	leaq	48(%rsp), %rbx
	movl	$4000000, %edx                  # imm = 0x3D0900
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	leaq	8000048(%rsp), %rsi
	movl	$4000000, %edx                  # imm = 0x3D0900
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	leaq	4000048(%rsp), %rsi
	movl	$4000000, %edx                  # imm = 0x3D0900
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$0, 16(%rsp)
	leaq	24(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$4294967297000, %rdx            # imm = 0x3E8000003E8
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_13
# %bb.12:
	movq	8(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdx
	movl	$1000, %ecx                     # imm = 0x3E8
	callq	_Z26__device_stub__kernel_1t1ePA1000_fS0_S0_i
.LBB3_13:
	movq	(%rsp), %rdi
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	24(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	16(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	movq	24(%rsp), %rdi
	callq	hipEventDestroy
	movq	(%rsp), %rdi
	callq	hipEventDestroy
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str.10, %edi
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rsi
	movl	$4000000, %edx                  # imm = 0x3D0900
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.LBB3_14:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_15 Depth 2
	xorl	%r14d, %r14d
.LBB3_15:                               #   Parent Loop BB3_14 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r14,4), %xmm0
	movl	$.L.str.11, %edi
	movb	$1, %al
	callq	printf
	incq	%r14
	cmpq	$1000, %r14                     # imm = 0x3E8
	jne	.LBB3_15
# %bb.16:                               #   in Loop: Header=BB3_14 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r15
	addq	$4000, %rbx                     # imm = 0xFA0
	cmpq	$1000, %r15                     # imm = 0x3E8
	jne	.LBB3_14
# %bb.17:
	movl	$10, %edi
	callq	putchar@PLT
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$12000056, %rsp                 # imm = 0xB71B38
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_1t1ePA1000_fS0_S0_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_1t1rPA1000_fS0_S0_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_1t1cPA1000_fS0_S0_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11kernel_1t1ePA1000_fS0_S0_i,@object # @_Z11kernel_1t1ePA1000_fS0_S0_i
	.section	.rodata,"a",@progbits
	.globl	_Z11kernel_1t1ePA1000_fS0_S0_i
	.p2align	3, 0x0
_Z11kernel_1t1ePA1000_fS0_S0_i:
	.quad	_Z26__device_stub__kernel_1t1ePA1000_fS0_S0_i
	.size	_Z11kernel_1t1ePA1000_fS0_S0_i, 8

	.type	_Z11kernel_1t1rPA1000_fS0_S0_i,@object # @_Z11kernel_1t1rPA1000_fS0_S0_i
	.globl	_Z11kernel_1t1rPA1000_fS0_S0_i
	.p2align	3, 0x0
_Z11kernel_1t1rPA1000_fS0_S0_i:
	.quad	_Z26__device_stub__kernel_1t1rPA1000_fS0_S0_i
	.size	_Z11kernel_1t1rPA1000_fS0_S0_i, 8

	.type	_Z11kernel_1t1cPA1000_fS0_S0_i,@object # @_Z11kernel_1t1cPA1000_fS0_S0_i
	.globl	_Z11kernel_1t1cPA1000_fS0_S0_i
	.p2align	3, 0x0
_Z11kernel_1t1cPA1000_fS0_S0_i:
	.quad	_Z26__device_stub__kernel_1t1cPA1000_fS0_S0_i
	.size	_Z11kernel_1t1cPA1000_fS0_S0_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Device Number: %d\n"
	.size	.L.str, 19

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"  Device name: %s\n"
	.size	.L.str.1, 19

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"  MaxThreadPerBlock: %d\n"
	.size	.L.str.2, 25

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"  MaxThreadsDim0: %d\n"
	.size	.L.str.3, 22

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"  MaxThreadsDim1: %d\n"
	.size	.L.str.4, 22

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"  MaxThreadsDim2: %d\n"
	.size	.L.str.5, 22

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"  MaxGridSize: %d\n"
	.size	.L.str.6, 19

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"  Warp Size: %d\n"
	.size	.L.str.7, 17

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"==============================="
	.size	.L.str.9, 32

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"GPU Run TIme threadsall %.2f ms \n"
	.size	.L.str.10, 34

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"%f  "
	.size	.L.str.11, 5

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11kernel_1t1ePA1000_fS0_S0_i"
	.size	.L__unnamed_1, 31

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z11kernel_1t1rPA1000_fS0_S0_i"
	.size	.L__unnamed_2, 31

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z11kernel_1t1cPA1000_fS0_S0_i"
	.size	.L__unnamed_3, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__kernel_1t1ePA1000_fS0_S0_i
	.addrsig_sym _Z26__device_stub__kernel_1t1rPA1000_fS0_S0_i
	.addrsig_sym _Z26__device_stub__kernel_1t1cPA1000_fS0_S0_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11kernel_1t1ePA1000_fS0_S0_i
	.addrsig_sym _Z11kernel_1t1rPA1000_fS0_S0_i
	.addrsig_sym _Z11kernel_1t1cPA1000_fS0_S0_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11kernel_1t1ePA1000_fS0_S0_i ; -- Begin function _Z11kernel_1t1ePA1000_fS0_S0_i
	.globl	_Z11kernel_1t1ePA1000_fS0_S0_i
	.p2align	8
	.type	_Z11kernel_1t1ePA1000_fS0_S0_i,@function
_Z11kernel_1t1ePA1000_fS0_S0_i:         ; @_Z11kernel_1t1ePA1000_fS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[0:1], null, s15, s4, v[4:5]
	s_mov_b32 s2, exec_lo
	v_max_i32_e32 v1, v2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mad_i64_i32 v[3:4], null, 0xfa0, v2, 0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, v2, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v6, vcc_lo, v6, v1, vcc_lo
	v_add_co_u32 v7, vcc_lo, v7, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, v8, v1, vcc_lo
	global_load_b32 v2, v[5:6], off
	global_load_b32 v5, v[7:8], off
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, v3, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v4, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v5
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_1t1ePA1000_fS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11kernel_1t1ePA1000_fS0_S0_i, .Lfunc_end0-_Z11kernel_1t1ePA1000_fS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z11kernel_1t1rPA1000_fS0_S0_i ; -- Begin function _Z11kernel_1t1rPA1000_fS0_S0_i
	.globl	_Z11kernel_1t1rPA1000_fS0_S0_i
	.p2align	8
	.type	_Z11kernel_1t1rPA1000_fS0_S0_i,@function
_Z11kernel_1t1rPA1000_fS0_S0_i:         ; @_Z11kernel_1t1rPA1000_fS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	s_mov_b32 s3, exec_lo
	v_max_i32_e32 v0, 0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v0
	s_cbranch_execz .LBB1_3
; %bb.1:                                ; %.lr.ph
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mad_i64_i32 v[4:5], null, 0xfa0, v1, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v5, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v6, v[0:1], off
	global_load_b32 v7, v[2:3], off
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s2, 0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v6, v6, v7
	global_store_b32 v[4:5], v6, off
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_cbranch_scc1 .LBB1_2
.LBB1_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_1t1rPA1000_fS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z11kernel_1t1rPA1000_fS0_S0_i, .Lfunc_end1-_Z11kernel_1t1rPA1000_fS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 240
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11kernel_1t1cPA1000_fS0_S0_i ; -- Begin function _Z11kernel_1t1cPA1000_fS0_S0_i
	.globl	_Z11kernel_1t1cPA1000_fS0_S0_i
	.p2align	8
	.type	_Z11kernel_1t1cPA1000_fS0_S0_i,@function
_Z11kernel_1t1cPA1000_fS0_S0_i:         ; @_Z11kernel_1t1cPA1000_fS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	v_bfe_u32 v2, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s3, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v1, 0, v0
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB2_3
; %bb.1:                                ; %.lr.ph
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v5, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
.LBB2_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v6, v[0:1], off
	global_load_b32 v7, v[2:3], off
	v_add_co_u32 v0, vcc_lo, 0xfa0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, 0xfa0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s2, 0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v6, v6, v7
	global_store_b32 v[4:5], v6, off
	v_add_co_u32 v4, vcc_lo, 0xfa0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_cbranch_scc1 .LBB2_2
.LBB2_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_1t1cPA1000_fS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z11kernel_1t1cPA1000_fS0_S0_i, .Lfunc_end2-_Z11kernel_1t1cPA1000_fS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 260
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11kernel_1t1ePA1000_fS0_S0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11kernel_1t1ePA1000_fS0_S0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11kernel_1t1rPA1000_fS0_S0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11kernel_1t1rPA1000_fS0_S0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11kernel_1t1cPA1000_fS0_S0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11kernel_1t1cPA1000_fS0_S0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
