#include <cuda_runtime.h>
#include <stdio.h>


/* Naive kernel for transposing a rectangular host array. */

const int TILE_DIM = 32;

#define CHECK(call)                                                            \
{                                                                              \
    const cudaError_t error = call;                                            \
    if (error != cudaSuccess)                                                  \
    {                                                                          \
        fprintf(stderr, "Error: %s:%d, ", __FILE__, __LINE__);                 \
        fprintf(stderr, "code: %d, reason: %s\n", error,                       \
                cudaGetErrorString(error));                                    \
        exit(1);                                                               \
    }                                                                          \
}


void initialData(float *in,  const int size)
{  // initialise matrix
    for (int i = 0; i < size; i++)
   	 {   in[i] = (float)(rand() & 0xFF) / 10.0f;    }
    return;
}

void printData(float *in,  const int size)
{  // print matrix
    for (int i = 0; i < size; i++)
   	 {   printf("%3.0f ", in[i]);     }
    printf("\n");
    return;
}

void checkResult(float *hostRef, float *gpuRef, int rows, int cols)
{  // check that transposed matrix is correct
    double epsilon = 1.0E-8;
    bool match = 1;

    for (int i = 0; i < rows; i++)
    {
        for (int j = 0; j < cols; j++)
        {
            int index = i*cols + j;
            if (abs(hostRef[index] - gpuRef[index]) > epsilon) {
                match = 0;
                printf("different on (%d, %d) (offset=%d) element in transposed matrix: host %f gpu %f\n", i, j,  index, hostRef[index], gpuRef[index]);
                break;
            }
        }
        if (!match) break;
    }

    if (!match)  printf("Arrays do not match.\n\n");
}

void transposeHost(float *out, float *in, const int nrows, const int ncols)
{  // transpose using CPU
    for (int iy = 0; iy < ncols; ++iy)
    {
     for (int ix = 0; ix < nrows; ++ix)
    	 {   out[ix * ncols + iy] = in[iy * nrows + ix];     }
    }
}

__global__ void justcopy(float *out, float *in, const int nrows, const int ncols)
{  // routine to copy data from one matrix to another -- no transposition done
    // get matrix coordinate (ix,iy)
     unsigned int ix = blockIdx.x * blockDim.x + threadIdx.x;
     unsigned int iy = blockIdx.y * blockDim.y + threadIdx.y;

    // copy data as is with boundary test
    if (ix < nrows && iy < ncols)
  	  { out[ix * ncols + iy] = in[ix * ncols + iy];  }
}

__global__ void naivetranspose(float *out, float *in, const int nrows, const int ncols)
{  // naive routine to transpose a matrix -- no optimisations considered
    // get matrix coordinate (ix,iy)
     unsigned int ix = blockIdx.x * blockDim.x + threadIdx.x;
     unsigned int iy = blockIdx.y * blockDim.y + threadIdx.y;

    // transpose with boundary test
    if (ix < nrows && iy < ncols)
  	  { out[ix * ncols + iy] = in[iy * nrows + ix]; }
}

__global__ void lessnaivetranspose(float *out, float *in, const int nrows, const int ncols)
{
  unsigned int x = blockIdx.x * blockDim.x + threadIdx.x;
  unsigned int y = blockIdx.y * blockDim.x + threadIdx.y;
  unsigned int width = gridDim.x * blockDim.x;

  for (int j=0; j<blockDim.x; j+=blockDim.y) {
    out[x*width + (y+j)] = in[(y+j)*width + x];
  }
}

__global__ void opttranspose(float *out, float *in, const int nrows, const int ncols)
{
  __shared__ float tile[TILE_DIM][TILE_DIM];

  int x = blockIdx.x * blockDim.x + threadIdx.x;
  int y = blockIdx.y * blockDim.x + threadIdx.y;
  int width = gridDim.x * blockDim.x;

  for (int j = 0; j < blockDim.x; j += blockDim.y)
     tile[threadIdx.y+j][threadIdx.x] = in[(y+j)*width + x];

  __syncthreads();

  x = blockIdx.y * blockDim.x + threadIdx.x;  // transpose block offset
  y = blockIdx.x * blockDim.x + threadIdx.y;

  for (int j = 0; j < blockDim.x; j += blockDim.y)
     out[(y+j)*width + x] = tile[threadIdx.x][threadIdx.y + j];
}

int main(int argc, char **argv)
{
    // set up device
    int dev = 0;
    cudaDeviceProp deviceProp;
    CHECK(cudaGetDeviceProperties(&deviceProp, dev));
    printf("%s starting transpose at ", argv[0]);
    printf("device %d: %s ", dev, deviceProp.name);
    CHECK(cudaSetDevice(dev));

    // initialise CUDA timing
    float milli;
    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);

    bool iprint = 0;

    // set up array size 1024
    int nrows = 1 << 10;
    int ncols = 1 << 10;

    int blockx = 16;
    int blocky = 16;

    // interpret command line arguments if present
    if (argc > 1) iprint = atoi(argv[1]);

    if (argc > 2) blockx  = atoi(argv[2]);

    if (argc > 3) blocky  = atoi(argv[3]);

    if (argc > 4) nrows  = atoi(argv[4]);

    if (argc > 5) ncols  = atoi(argv[5]);

    printf(" with matrix nrows %d ncols %d\n", nrows, ncols);
    size_t ncells = nrows * ncols;
    size_t nBytes = ncells * sizeof(float);

    // execution configuration
    dim3 block (blockx, blocky);
    dim3 grid  ((nrows + block.x - 1) / block.x, (ncols + block.y - 1) / block.y);
    dim3 grid_opt (nrows/block.x, ncols/block.x);

    // allocate host memory
    float *h_A = (float *)malloc(nBytes);
    float *hostRef = (float *)malloc(nBytes);
    float *gpuRef  = (float *)malloc(nBytes);

    //  initialize host array
    initialData(h_A, nrows * ncols);

    //  transpose at host side
    transposeHost(hostRef, h_A, nrows, ncols);

    // allocate device memory
    float *d_A, *d_C;
    CHECK(cudaMalloc((float**)&d_A, nBytes));
    CHECK(cudaMalloc((float**)&d_C, nBytes));

    // copy data from host to device
    CHECK(cudaMemcpy(d_A, h_A, nBytes, cudaMemcpyHostToDevice));

    // execute justcopy kernel
    CHECK(cudaMemset(d_C, 0, nBytes));
    memset(gpuRef, 0, nBytes);

    cudaEventRecord(start); // start timing
    justcopy<<<grid, block>>>(d_C, d_A, nrows, ncols);
    CHECK(cudaDeviceSynchronize());
    cudaEventRecord(stop);
    cudaEventSynchronize(stop);
    cudaEventElapsedTime(&milli, start, stop);  // stop timing actual kernel execution

    CHECK(cudaMemcpy(gpuRef, d_C, nBytes, cudaMemcpyDeviceToHost));

    if(iprint) printData(gpuRef, nrows * ncols);

    float ibnd = 2 * ncells * sizeof(float) /  	(1024.0 * 1024.0 * 1024.0) / (milli/1000);  // convert bytes and millisec to GB/sec
    // ibnd = 2 * ncells * sizeof(float) / 1e9 / milli/1000;
    printf("justcopy kernel elapsed %f msec <<< grid (%d,%d) block (%d,%d)>>> effective bandwidth %f GB/s\n", milli, grid.x, grid.y, block.x, block.y, ibnd);

    // execute naive transpose kernel
    CHECK(cudaMemset(d_C, 0, nBytes));
    memset(gpuRef, 0, nBytes);

    cudaEventRecord(start); // start timing
    // naivetranspose<<<grid, block>>>(d_C, d_A, nrows, ncols);
    // lessnaivetranspose<<<grid_opt, block>>>(d_C, d_A, nrows, ncols);
    opttranspose<<<grid_opt, block>>>(d_C, d_A, nrows, ncols);
    CHECK(cudaDeviceSynchronize());
    cudaEventRecord(stop);
    cudaEventSynchronize(stop);
    cudaEventElapsedTime(&milli, start, stop);  // stop timing actual kernel execution

    CHECK(cudaMemcpy(gpuRef, d_C, nBytes, cudaMemcpyDeviceToHost));

    if(iprint) printData(gpuRef, ncells);

    ibnd = 2 * ncells * sizeof(float) / (1024.0 * 1024.0 * 1024.0) / (milli/1000);
    printf("optimised transpose elapsed %f msec <<< grid (%d,%d) block (%d,%d)>>> effective bandwidth %f GB/s\n", milli, grid_opt.x, grid_opt.y, block.x, block.y, ibnd);
    checkResult(hostRef, gpuRef, ncols, nrows);

    // free host and device memory
    CHECK(cudaFree(d_A));
    CHECK(cudaFree(d_C));
    free(h_A);
    free(hostRef);
    free(gpuRef);

    // reset device
    CHECK(cudaDeviceReset());
    return EXIT_SUCCESS;
}

	.file	"tmpxft_00306d9b_00000000-6_junetranspose-opt.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z11initialDataPfi
	.type	_Z11initialDataPfi, @function
_Z11initialDataPfi:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
.L3:
	cmpl	%ebx, %ebp
	jle	.L7
	call	rand@PLT
	movzbl	%al, %eax
	cvtsi2ssl	%eax, %xmm0
	divss	.LC0(%rip), %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L3
.L7:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z11initialDataPfi, .-_Z11initialDataPfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"%3.0f "
.LC2:
	.string	"\n"
	.text
	.globl	_Z9printDataPfi
	.type	_Z9printDataPfi, @function
_Z9printDataPfi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC1(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 48
.L9:
	cmpl	%ebx, %ebp
	jle	.L12
	movq	%r13, %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%r12,%rbx,4), %xmm0
	call	__printf_chk@PLT
	incq	%rbx
	jmp	.L9
.L12:
	popq	%rdx
	.cfi_def_cfa_offset 40
	leaq	.LC2(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z9printDataPfi, .-_Z9printDataPfi
	.section	.rodata.str1.1
.LC5:
	.string	"different on (%d, %d) (offset=%d) element in transposed matrix: host %f gpu %f\n"
.LC6:
	.string	"Arrays do not match.\n\n"
	.text
	.globl	_Z11checkResultPfS_ii
	.type	_Z11checkResultPfS_ii, @function
_Z11checkResultPfS_ii:
.LFB2029:
	.cfi_startproc
	endbr64
	movsd	.LC4(%rip), %xmm4
	movq	%rdi, %r8
	movq	%rsi, %r9
	movl	%edx, %r10d
	movl	%ecx, %edi
	xorl	%esi, %esi
	movss	.LC3(%rip), %xmm3
	xorl	%edx, %edx
.L14:
	cmpl	%r10d, %edx
	jge	.L13
	movslq	%esi, %rax
	xorl	%ecx, %ecx
	salq	$2, %rax
.L19:
	cmpl	%edi, %ecx
	jge	.L25
	movss	(%r8,%rax), %xmm0
	movss	(%r9,%rax), %xmm1
	addq	$4, %rax
	movaps	%xmm0, %xmm2
	subss	%xmm1, %xmm2
	andps	%xmm3, %xmm2
	cvtss2sd	%xmm2, %xmm2
	comisd	%xmm4, %xmm2
	jbe	.L21
	pushq	%rax
	.cfi_def_cfa_offset 16
	leal	(%rcx,%rsi), %r8d
	movl	$2, %edi
	movb	$2, %al
	leaq	.LC5(%rip), %rsi
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	movl	$2, %edi
	jmp	__printf_chk@PLT
.L21:
	incl	%ecx
	jmp	.L19
.L25:
	incl	%edx
	addl	%edi, %esi
	jmp	.L14
.L13:
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z11checkResultPfS_ii, .-_Z11checkResultPfS_ii
	.globl	_Z13transposeHostPfS_ii
	.type	_Z13transposeHostPfS_ii, @function
_Z13transposeHostPfS_ii:
.LFB2030:
	.cfi_startproc
	endbr64
	movslq	%ecx, %r11
	xorl	%r10d, %r10d
	movq	%rsi, %r8
	xorl	%r9d, %r9d
	salq	$2, %r11
	cmpl	%ecx, %r10d
	jl	.L35
	ret
.L35:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
.L33:
	movslq	%r9d, %rax
	movq	%rdi, %rsi
	leaq	(%r8,%rax,4), %rbx
	xorl	%eax, %eax
.L30:
	cmpl	%eax, %edx
	jle	.L36
	movss	(%rbx,%rax,4), %xmm0
	incq	%rax
	movss	%xmm0, (%rsi)
	addq	%r11, %rsi
	jmp	.L30
.L36:
	incl	%r10d
	addq	$4, %rdi
	addl	%edx, %r9d
	cmpl	%ecx, %r10d
	jl	.L33
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z13transposeHostPfS_ii, .-_Z13transposeHostPfS_ii
	.globl	_Z31__device_stub__Z8justcopyPfS_iiPfS_ii
	.type	_Z31__device_stub__Z8justcopyPfS_iiPfS_ii, @function
_Z31__device_stub__Z8justcopyPfS_iiPfS_ii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8justcopyPfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L37:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z31__device_stub__Z8justcopyPfS_iiPfS_ii, .-_Z31__device_stub__Z8justcopyPfS_iiPfS_ii
	.globl	_Z8justcopyPfS_ii
	.type	_Z8justcopyPfS_ii, @function
_Z8justcopyPfS_ii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z8justcopyPfS_iiPfS_ii
	.cfi_endproc
.LFE2057:
	.size	_Z8justcopyPfS_ii, .-_Z8justcopyPfS_ii
	.globl	_Z38__device_stub__Z14naivetransposePfS_iiPfS_ii
	.type	_Z38__device_stub__Z14naivetransposePfS_iiPfS_ii, @function
_Z38__device_stub__Z14naivetransposePfS_iiPfS_ii:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14naivetransposePfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L42:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z38__device_stub__Z14naivetransposePfS_iiPfS_ii, .-_Z38__device_stub__Z14naivetransposePfS_iiPfS_ii
	.globl	_Z14naivetransposePfS_ii
	.type	_Z14naivetransposePfS_ii, @function
_Z14naivetransposePfS_ii:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z14naivetransposePfS_iiPfS_ii
	.cfi_endproc
.LFE2059:
	.size	_Z14naivetransposePfS_ii, .-_Z14naivetransposePfS_ii
	.globl	_Z42__device_stub__Z18lessnaivetransposePfS_iiPfS_ii
	.type	_Z42__device_stub__Z18lessnaivetransposePfS_iiPfS_ii, @function
_Z42__device_stub__Z18lessnaivetransposePfS_iiPfS_ii:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L47
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z18lessnaivetransposePfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L47:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L49
	call	__stack_chk_fail@PLT
.L49:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z42__device_stub__Z18lessnaivetransposePfS_iiPfS_ii, .-_Z42__device_stub__Z18lessnaivetransposePfS_iiPfS_ii
	.globl	_Z18lessnaivetransposePfS_ii
	.type	_Z18lessnaivetransposePfS_ii, @function
_Z18lessnaivetransposePfS_ii:
.LFB2061:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z18lessnaivetransposePfS_iiPfS_ii
	.cfi_endproc
.LFE2061:
	.size	_Z18lessnaivetransposePfS_ii, .-_Z18lessnaivetransposePfS_ii
	.globl	_Z36__device_stub__Z12opttransposePfS_iiPfS_ii
	.type	_Z36__device_stub__Z12opttransposePfS_iiPfS_ii, @function
_Z36__device_stub__Z12opttransposePfS_iiPfS_ii:
.LFB2062:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L52
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12opttransposePfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L52:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L54
	call	__stack_chk_fail@PLT
.L54:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2062:
	.size	_Z36__device_stub__Z12opttransposePfS_iiPfS_ii, .-_Z36__device_stub__Z12opttransposePfS_iiPfS_ii
	.globl	_Z12opttransposePfS_ii
	.type	_Z12opttransposePfS_ii, @function
_Z12opttransposePfS_ii:
.LFB2063:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z12opttransposePfS_iiPfS_ii
	.cfi_endproc
.LFE2063:
	.size	_Z12opttransposePfS_ii, .-_Z12opttransposePfS_ii
	.section	.rodata.str1.1
.LC7:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/RhodesCS2016/gpgpu/master/glinklater/exam/junetranspose-opt.cu"
.LC8:
	.string	"Error: %s:%d, "
.LC9:
	.string	"code: %d, reason: %s\n"
.LC10:
	.string	"%s starting transpose at "
.LC11:
	.string	"device %d: %s "
.LC12:
	.string	" with matrix nrows %d ncols %d\n"
.LC15:
	.string	"justcopy kernel elapsed %f msec <<< grid (%d,%d) block (%d,%d)>>> effective bandwidth %f GB/s\n"
.LC16:
	.string	"optimised transpose elapsed %f msec <<< grid (%d,%d) block (%d,%d)>>> effective bandwidth %f GB/s\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%edi, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	xorl	%esi, %esi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1192, %rsp
	.cfi_def_cfa_offset 1248
	movq	%fs:40, %rax
	movq	%rax, 1176(%rsp)
	xorl	%eax, %eax
	leaq	144(%rsp), %rbp
	movq	%rbp, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	testl	%eax, %eax
	je	.L58
	movl	%eax, %ebx
	movl	$126, %r8d
	jmp	.L93
.L58:
	movq	(%r14), %rdx
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbp, %rcx
	xorl	%edx, %edx
	movl	$2, %edi
	leaq	.LC11(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L59
	movl	$129, %r8d
.L93:
	movq	stderr(%rip), %rdi
	leaq	.LC7(%rip), %rcx
	leaq	.LC8(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	movl	%ebx, %ecx
	movq	%rax, %r8
.L94:
	movq	stderr(%rip), %rdi
	leaq	.LC9(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L59:
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	80(%rsp), %rdi
	call	cudaEventCreate@PLT
	cmpl	$1, %r15d
	jle	.L80
	movq	8(%r14), %rdi
	call	atoi@PLT
	testl	%eax, %eax
	setne	39(%rsp)
	cmpl	$2, %r15d
	je	.L81
	movq	16(%r14), %rdi
	call	atoi@PLT
	movl	%eax, %r12d
	cmpl	$3, %r15d
	je	.L82
	movq	24(%r14), %rdi
	call	atoi@PLT
	movl	%eax, %r13d
	cmpl	$4, %r15d
	je	.L83
	movq	32(%r14), %rdi
	movl	$1024, %ebx
	call	atoi@PLT
	movl	%eax, %ebp
	cmpl	$5, %r15d
	je	.L60
	movq	40(%r14), %rdi
	call	atoi@PLT
	movl	%eax, %ebx
	jmp	.L60
.L80:
	movb	$0, 39(%rsp)
	movl	$16, %r13d
	movl	$16, %r12d
	movl	$1024, %ebp
	jmp	.L92
.L81:
	movl	$16, %r13d
	movl	$16, %r12d
	jmp	.L83
.L82:
	movl	$16, %r13d
.L83:
	movl	$1024, %ebp
.L92:
	movl	$1024, %ebx
.L60:
	movl	%ebx, %ecx
	leaq	.LC12(%rip), %rsi
	movl	%ebp, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %eax
	xorl	%edx, %edx
	movl	$1, 116(%rsp)
	movl	$1, 128(%rsp)
	imull	%ebp, %eax
	movl	$1, 140(%rsp)
	movslq	%eax, %r15
	movl	%eax, 32(%rsp)
	leaq	0(,%r15,4), %rax
	movq	%rax, 8(%rsp)
	leal	-1(%rbx,%r13), %eax
	movq	8(%rsp), %rdi
	divl	%r13d
	xorl	%edx, %edx
	movl	%eax, 48(%rsp)
	leal	-1(%rbp,%r12), %eax
	divl	%r12d
	xorl	%edx, %edx
	movl	%eax, 52(%rsp)
	movl	%ebx, %eax
	divl	%r12d
	xorl	%edx, %edx
	movl	%eax, 56(%rsp)
	movl	%ebp, %eax
	divl	%r12d
	movl	%eax, 60(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 40(%rsp)
	call	malloc@PLT
	movl	32(%rsp), %esi
	movq	24(%rsp), %rdi
	movq	%rax, 16(%rsp)
	call	_Z11initialDataPfi
	movq	24(%rsp), %rsi
	movl	%ebx, %ecx
	movl	%ebp, %edx
	movq	40(%rsp), %rdi
	call	_Z13transposeHostPfS_ii
	movq	8(%rsp), %rsi
	leaq	88(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$179, %r8d
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	.L95
	movq	8(%rsp), %rsi
	leaq	96(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$180, %r8d
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	.L95
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	88(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$183, %r8d
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	.L95
	movq	8(%rsp), %rdx
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$186, %r8d
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	.L95
	movq	8(%rsp), %rcx
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rcx, %rdx
	call	__memset_chk@PLT
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	52(%rsp), %eax
	movl	116(%rsp), %ecx
	xorl	%r9d, %r9d
	movl	%r12d, 108(%rsp)
	movl	128(%rsp), %esi
	xorl	%r8d, %r8d
	movl	%eax, 120(%rsp)
	movl	48(%rsp), %eax
	movl	%r13d, 112(%rsp)
	movq	108(%rsp), %rdx
	movl	%eax, 124(%rsp)
	movq	120(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L65
	movq	88(%rsp), %rsi
	movq	96(%rsp), %rdi
	movl	%ebx, %ecx
	movl	%ebp, %edx
	call	_Z31__device_stub__Z8justcopyPfS_iiPfS_ii
.L65:
	call	cudaDeviceSynchronize@PLT
	movl	$191, %r8d
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	.L95
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	80(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	80(%rsp), %rdx
	movq	72(%rsp), %rsi
	leaq	68(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	8(%rsp), %rdx
	movq	96(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$196, %r8d
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	.L95
	cmpb	$0, 39(%rsp)
	je	.L68
	movl	32(%rsp), %esi
	movq	16(%rsp), %rdi
	call	_Z9printDataPfi
.L68:
	salq	$3, %r15
	js	.L69
	cvtsi2sdq	%r15, %xmm0
	jmp	.L70
.L69:
	shrq	%r15
	cvtsi2sdq	%r15, %xmm0
	addsd	%xmm0, %xmm0
.L70:
	mulsd	.LC13(%rip), %xmm0
	movl	%r12d, %r8d
	movl	%r13d, %r9d
	movb	$2, %al
	movl	48(%rsp), %ecx
	movl	52(%rsp), %edx
	movl	$2, %edi
	leaq	.LC15(%rip), %rsi
	movq	%xmm0, %r15
	movss	68(%rsp), %xmm0
	movq	%r15, %xmm1
	movaps	%xmm0, %xmm2
	divss	.LC14(%rip), %xmm2
	cvtss2sd	%xmm2, %xmm2
	cvtss2sd	%xmm0, %xmm0
	divsd	%xmm2, %xmm1
	cvtsd2ss	%xmm1, %xmm1
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
	xorl	%esi, %esi
	movq	8(%rsp), %rdx
	movq	96(%rsp), %rdi
	call	cudaMemset@PLT
	movl	$205, %r8d
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	.L95
	movq	8(%rsp), %rcx
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rcx, %rdx
	call	__memset_chk@PLT
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	60(%rsp), %eax
	movl	116(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	108(%rsp), %rdx
	movl	140(%rsp), %esi
	xorl	%r8d, %r8d
	movl	%eax, 132(%rsp)
	movl	56(%rsp), %eax
	movl	%eax, 136(%rsp)
	movq	132(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L72
	movq	88(%rsp), %rsi
	movq	96(%rsp), %rdi
	movl	%ebx, %ecx
	movl	%ebp, %edx
	call	_Z36__device_stub__Z12opttransposePfS_iiPfS_ii
.L72:
	call	cudaDeviceSynchronize@PLT
	movl	$212, %r8d
	movl	%eax, %r14d
	testl	%eax, %eax
	jne	.L95
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	80(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	80(%rsp), %rdx
	movq	72(%rsp), %rsi
	leaq	68(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	8(%rsp), %rdx
	movq	96(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %r14d
	testl	%eax, %eax
	je	.L74
	movl	$217, %r8d
.L95:
	movq	stderr(%rip), %rdi
	leaq	.LC7(%rip), %rcx
	leaq	.LC8(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	%r14d, %edi
	call	cudaGetErrorString@PLT
	movl	%r14d, %ecx
	movq	%rax, %r8
	jmp	.L94
.L74:
	cmpb	$0, 39(%rsp)
	je	.L75
	movl	32(%rsp), %esi
	movq	16(%rsp), %rdi
	call	_Z9printDataPfi
.L75:
	movss	68(%rsp), %xmm0
	movq	%r15, %xmm1
	movl	%r12d, %r8d
	movb	$2, %al
	movl	56(%rsp), %ecx
	movl	60(%rsp), %edx
	movl	%r13d, %r9d
	movl	$2, %edi
	movaps	%xmm0, %xmm2
	divss	.LC14(%rip), %xmm2
	cvtss2sd	%xmm2, %xmm2
	cvtss2sd	%xmm0, %xmm0
	divsd	%xmm2, %xmm1
	leaq	.LC16(%rip), %rsi
	cvtsd2ss	%xmm1, %xmm1
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
	movl	%ebx, %edx
	movq	16(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	%ebp, %ecx
	call	_Z11checkResultPfS_ii
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movl	$226, %r8d
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L93
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movl	$227, %r8d
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L93
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	call	cudaDeviceReset@PLT
	movl	$233, %r8d
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L93
	movq	1176(%rsp), %rax
	subq	%fs:40, %rax
	je	.L79
	call	__stack_chk_fail@PLT
.L79:
	addq	$1192, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC17:
	.string	"_Z12opttransposePfS_ii"
.LC18:
	.string	"_Z18lessnaivetransposePfS_ii"
.LC19:
	.string	"_Z14naivetransposePfS_ii"
.LC20:
	.string	"_Z8justcopyPfS_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2065:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12opttransposePfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z18lessnaivetransposePfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC19(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14naivetransposePfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8justcopyPfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2065:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1092616192
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC3:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	-500134854
	.long	1044740494
	.align 8
.LC13:
	.long	0
	.long	1041235968
	.section	.rodata.cst4
	.align 4
.LC14:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>


/* Naive kernel for transposing a rectangular host array. */

const int TILE_DIM = 32;

#define CHECK(call)                                                            \
{                                                                              \
    const hipError_t error = call;                                            \
    if (error != hipSuccess)                                                  \
    {                                                                          \
        fprintf(stderr, "Error: %s:%d, ", __FILE__, __LINE__);                 \
        fprintf(stderr, "code: %d, reason: %s\n", error,                       \
                hipGetErrorString(error));                                    \
        exit(1);                                                               \
    }                                                                          \
}


void initialData(float *in,  const int size)
{  // initialise matrix
    for (int i = 0; i < size; i++)
   	 {   in[i] = (float)(rand() & 0xFF) / 10.0f;    }
    return;
}

void printData(float *in,  const int size)
{  // print matrix
    for (int i = 0; i < size; i++)
   	 {   printf("%3.0f ", in[i]);     }
    printf("\n");
    return;
}

void checkResult(float *hostRef, float *gpuRef, int rows, int cols)
{  // check that transposed matrix is correct
    double epsilon = 1.0E-8;
    bool match = 1;

    for (int i = 0; i < rows; i++)
    {
        for (int j = 0; j < cols; j++)
        {
            int index = i*cols + j;
            if (abs(hostRef[index] - gpuRef[index]) > epsilon) {
                match = 0;
                printf("different on (%d, %d) (offset=%d) element in transposed matrix: host %f gpu %f\n", i, j,  index, hostRef[index], gpuRef[index]);
                break;
            }
        }
        if (!match) break;
    }

    if (!match)  printf("Arrays do not match.\n\n");
}

void transposeHost(float *out, float *in, const int nrows, const int ncols)
{  // transpose using CPU
    for (int iy = 0; iy < ncols; ++iy)
    {
     for (int ix = 0; ix < nrows; ++ix)
    	 {   out[ix * ncols + iy] = in[iy * nrows + ix];     }
    }
}

__global__ void justcopy(float *out, float *in, const int nrows, const int ncols)
{  // routine to copy data from one matrix to another -- no transposition done
    // get matrix coordinate (ix,iy)
     unsigned int ix = blockIdx.x * blockDim.x + threadIdx.x;
     unsigned int iy = blockIdx.y * blockDim.y + threadIdx.y;

    // copy data as is with boundary test
    if (ix < nrows && iy < ncols)
  	  { out[ix * ncols + iy] = in[ix * ncols + iy];  }
}

__global__ void naivetranspose(float *out, float *in, const int nrows, const int ncols)
{  // naive routine to transpose a matrix -- no optimisations considered
    // get matrix coordinate (ix,iy)
     unsigned int ix = blockIdx.x * blockDim.x + threadIdx.x;
     unsigned int iy = blockIdx.y * blockDim.y + threadIdx.y;

    // transpose with boundary test
    if (ix < nrows && iy < ncols)
  	  { out[ix * ncols + iy] = in[iy * nrows + ix]; }
}

__global__ void lessnaivetranspose(float *out, float *in, const int nrows, const int ncols)
{
  unsigned int x = blockIdx.x * blockDim.x + threadIdx.x;
  unsigned int y = blockIdx.y * blockDim.x + threadIdx.y;
  unsigned int width = gridDim.x * blockDim.x;

  for (int j=0; j<blockDim.x; j+=blockDim.y) {
    out[x*width + (y+j)] = in[(y+j)*width + x];
  }
}

__global__ void opttranspose(float *out, float *in, const int nrows, const int ncols)
{
  __shared__ float tile[TILE_DIM][TILE_DIM];

  int x = blockIdx.x * blockDim.x + threadIdx.x;
  int y = blockIdx.y * blockDim.x + threadIdx.y;
  int width = gridDim.x * blockDim.x;

  for (int j = 0; j < blockDim.x; j += blockDim.y)
     tile[threadIdx.y+j][threadIdx.x] = in[(y+j)*width + x];

  __syncthreads();

  x = blockIdx.y * blockDim.x + threadIdx.x;  // transpose block offset
  y = blockIdx.x * blockDim.x + threadIdx.y;

  for (int j = 0; j < blockDim.x; j += blockDim.y)
     out[(y+j)*width + x] = tile[threadIdx.x][threadIdx.y + j];
}

int main(int argc, char **argv)
{
    // set up device
    int dev = 0;
    hipDeviceProp_t deviceProp;
    CHECK(hipGetDeviceProperties(&deviceProp, dev));
    printf("%s starting transpose at ", argv[0]);
    printf("device %d: %s ", dev, deviceProp.name);
    CHECK(hipSetDevice(dev));

    // initialise CUDA timing
    float milli;
    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);

    bool iprint = 0;

    // set up array size 1024
    int nrows = 1 << 10;
    int ncols = 1 << 10;

    int blockx = 16;
    int blocky = 16;

    // interpret command line arguments if present
    if (argc > 1) iprint = atoi(argv[1]);

    if (argc > 2) blockx  = atoi(argv[2]);

    if (argc > 3) blocky  = atoi(argv[3]);

    if (argc > 4) nrows  = atoi(argv[4]);

    if (argc > 5) ncols  = atoi(argv[5]);

    printf(" with matrix nrows %d ncols %d\n", nrows, ncols);
    size_t ncells = nrows * ncols;
    size_t nBytes = ncells * sizeof(float);

    // execution configuration
    dim3 block (blockx, blocky);
    dim3 grid  ((nrows + block.x - 1) / block.x, (ncols + block.y - 1) / block.y);
    dim3 grid_opt (nrows/block.x, ncols/block.x);

    // allocate host memory
    float *h_A = (float *)malloc(nBytes);
    float *hostRef = (float *)malloc(nBytes);
    float *gpuRef  = (float *)malloc(nBytes);

    //  initialize host array
    initialData(h_A, nrows * ncols);

    //  transpose at host side
    transposeHost(hostRef, h_A, nrows, ncols);

    // allocate device memory
    float *d_A, *d_C;
    CHECK(hipMalloc((float**)&d_A, nBytes));
    CHECK(hipMalloc((float**)&d_C, nBytes));

    // copy data from host to device
    CHECK(hipMemcpy(d_A, h_A, nBytes, hipMemcpyHostToDevice));

    // execute justcopy kernel
    CHECK(hipMemset(d_C, 0, nBytes));
    memset(gpuRef, 0, nBytes);

    hipEventRecord(start); // start timing
    justcopy<<<grid, block>>>(d_C, d_A, nrows, ncols);
    CHECK(hipDeviceSynchronize());
    hipEventRecord(stop);
    hipEventSynchronize(stop);
    hipEventElapsedTime(&milli, start, stop);  // stop timing actual kernel execution

    CHECK(hipMemcpy(gpuRef, d_C, nBytes, hipMemcpyDeviceToHost));

    if(iprint) printData(gpuRef, nrows * ncols);

    float ibnd = 2 * ncells * sizeof(float) /  	(1024.0 * 1024.0 * 1024.0) / (milli/1000);  // convert bytes and millisec to GB/sec
    // ibnd = 2 * ncells * sizeof(float) / 1e9 / milli/1000;
    printf("justcopy kernel elapsed %f msec <<< grid (%d,%d) block (%d,%d)>>> effective bandwidth %f GB/s\n", milli, grid.x, grid.y, block.x, block.y, ibnd);

    // execute naive transpose kernel
    CHECK(hipMemset(d_C, 0, nBytes));
    memset(gpuRef, 0, nBytes);

    hipEventRecord(start); // start timing
    // naivetranspose<<<grid, block>>>(d_C, d_A, nrows, ncols);
    // lessnaivetranspose<<<grid_opt, block>>>(d_C, d_A, nrows, ncols);
    opttranspose<<<grid_opt, block>>>(d_C, d_A, nrows, ncols);
    CHECK(hipDeviceSynchronize());
    hipEventRecord(stop);
    hipEventSynchronize(stop);
    hipEventElapsedTime(&milli, start, stop);  // stop timing actual kernel execution

    CHECK(hipMemcpy(gpuRef, d_C, nBytes, hipMemcpyDeviceToHost));

    if(iprint) printData(gpuRef, ncells);

    ibnd = 2 * ncells * sizeof(float) / (1024.0 * 1024.0 * 1024.0) / (milli/1000);
    printf("optimised transpose elapsed %f msec <<< grid (%d,%d) block (%d,%d)>>> effective bandwidth %f GB/s\n", milli, grid_opt.x, grid_opt.y, block.x, block.y, ibnd);
    checkResult(hostRef, gpuRef, ncols, nrows);

    // free host and device memory
    CHECK(hipFree(d_A));
    CHECK(hipFree(d_C));
    free(h_A);
    free(hostRef);
    free(gpuRef);

    // reset device
    CHECK(hipDeviceReset());
    return EXIT_SUCCESS;
}

	.text
	.file	"junetranspose-opt.hip"
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z11initialDataPfi
.LCPI0_0:
	.long	0x41200000                      # float 10
	.text
	.globl	_Z11initialDataPfi
	.type	_Z11initialDataPfi,@function
_Z11initialDataPfi:                     # @_Z11initialDataPfi
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB0_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	movzbl	%al, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	divss	.LCPI0_0(%rip), %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB0_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB0_4:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z11initialDataPfi, .Lfunc_end0-_Z11initialDataPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z9printDataPfi                 # -- Begin function _Z9printDataPfi
	.type	_Z9printDataPfi,@function
_Z9printDataPfi:                        # @_Z9printDataPfi
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB1_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r15,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB1_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB1_4:                                # %._crit_edge
	movl	$10, %edi
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end1:
	.size	_Z9printDataPfi, .Lfunc_end1-_Z9printDataPfi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z11checkResultPfS_ii
.LCPI2_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_1:
	.quad	0x3e45798ee2308c3a              # double 1.0E-8
	.text
	.globl	_Z11checkResultPfS_ii
	.type	_Z11checkResultPfS_ii,@function
_Z11checkResultPfS_ii:                  # @_Z11checkResultPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	testl	%edx, %edx
	jle	.LBB2_7
# %bb.1:                                # %.preheader.lr.ph
	movl	%edx, %r8d
	movl	%ecx, %r9d
	movl	%ecx, %r10d
	negl	%r10d
	xorl	%ebx, %ebx
	movaps	.LCPI2_0(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movsd	.LCPI2_1(%rip), %xmm1           # xmm1 = mem[0],zero
	xorl	%r11d, %r11d
	xorl	%eax, %eax
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	testl	%ecx, %ecx
	jle	.LBB2_6
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%ebx, %edx
	leaq	(%rsi,%rdx,4), %r14
	leaq	(%rdi,%rdx,4), %r15
	xorl	%edx, %edx
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r15,%rdx,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	movss	(%r14,%rdx,4), %xmm3            # xmm3 = mem[0],zero,zero,zero
	movaps	%xmm2, %xmm4
	subss	%xmm3, %xmm4
	andps	%xmm0, %xmm4
	cvtss2sd	%xmm4, %xmm4
	ucomisd	%xmm1, %xmm4
	ja	.LBB2_8
# %bb.5:                                #   in Loop: Header=BB2_4 Depth=2
	incq	%rdx
	cmpq	%rdx, %r9
	jne	.LBB2_4
.LBB2_6:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%rax
	addq	%r10, %r11
	addl	%ecx, %ebx
	cmpq	%r8, %rax
	jne	.LBB2_2
.LBB2_7:                                # %.loopexit
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB2_8:                                # %.thread33
	.cfi_def_cfa_offset 32
	movl	%edx, %ecx
	subl	%r11d, %ecx
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	%xmm3, %xmm1
	movl	$.L.str.2, %edi
	movl	%eax, %esi
                                        # kill: def $edx killed $edx killed $rdx
	movb	$2, %al
	callq	printf
	movl	$.Lstr, %edi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end2:
	.size	_Z11checkResultPfS_ii, .Lfunc_end2-_Z11checkResultPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13transposeHostPfS_ii         # -- Begin function _Z13transposeHostPfS_ii
	.type	_Z13transposeHostPfS_ii,@function
_Z13transposeHostPfS_ii:                # @_Z13transposeHostPfS_ii
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB3_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%ecx, %eax
	movl	%edx, %ecx
	leaq	(,%rax,4), %r8
	xorl	%r9d, %r9d
	xorl	%r10d, %r10d
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	testl	%edx, %edx
	jle	.LBB3_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	%r9d, %r11d
	leaq	(%rsi,%r11,4), %r11
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
.LBB3_4:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r11,%r14,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rbx)
	incq	%r14
	addq	%r8, %rbx
	cmpq	%r14, %rcx
	jne	.LBB3_4
.LBB3_5:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	incq	%r10
	addl	%edx, %r9d
	addq	$4, %rdi
	cmpq	%rax, %r10
	jne	.LBB3_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
.LBB3_7:                                # %._crit_edge18
	retq
.Lfunc_end3:
	.size	_Z13transposeHostPfS_ii, .Lfunc_end3-_Z13transposeHostPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__justcopyPfS_ii # -- Begin function _Z23__device_stub__justcopyPfS_ii
	.type	_Z23__device_stub__justcopyPfS_ii,@function
_Z23__device_stub__justcopyPfS_ii:      # @_Z23__device_stub__justcopyPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8justcopyPfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z23__device_stub__justcopyPfS_ii, .Lfunc_end4-_Z23__device_stub__justcopyPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__naivetransposePfS_ii # -- Begin function _Z29__device_stub__naivetransposePfS_ii
	.type	_Z29__device_stub__naivetransposePfS_ii,@function
_Z29__device_stub__naivetransposePfS_ii: # @_Z29__device_stub__naivetransposePfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14naivetransposePfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z29__device_stub__naivetransposePfS_ii, .Lfunc_end5-_Z29__device_stub__naivetransposePfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__lessnaivetransposePfS_ii # -- Begin function _Z33__device_stub__lessnaivetransposePfS_ii
	.type	_Z33__device_stub__lessnaivetransposePfS_ii,@function
_Z33__device_stub__lessnaivetransposePfS_ii: # @_Z33__device_stub__lessnaivetransposePfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18lessnaivetransposePfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z33__device_stub__lessnaivetransposePfS_ii, .Lfunc_end6-_Z33__device_stub__lessnaivetransposePfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__opttransposePfS_ii # -- Begin function _Z27__device_stub__opttransposePfS_ii
	.type	_Z27__device_stub__opttransposePfS_ii,@function
_Z27__device_stub__opttransposePfS_ii:  # @_Z27__device_stub__opttransposePfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12opttransposePfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z27__device_stub__opttransposePfS_ii, .Lfunc_end7-_Z27__device_stub__opttransposePfS_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI8_0:
	.long	0x41200000                      # float 10
.LCPI8_4:
	.long	0x447a0000                      # float 1000
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI8_1:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI8_2:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI8_3:
	.quad	0x3e10000000000000              # double 9.3132257461547852E-10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1624, %rsp                     # imm = 0x658
	.cfi_def_cfa_offset 1680
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %ebp
	leaq	152(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	jne	.LBB8_1
# %bb.4:
	movq	(%rbx), %rsi
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	152(%rsp), %rdx
	movl	$.L.str.8, %edi
	xorl	%esi, %esi
	xorl	%eax, %eax
	callq	printf
	xorl	%edi, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	jne	.LBB8_5
# %bb.6:
	leaq	64(%rsp), %rdi
	callq	hipEventCreate
	leaq	32(%rsp), %rdi
	callq	hipEventCreate
	movl	$16, %eax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movl	$1024, %r15d                    # imm = 0x400
	cmpl	$2, %ebp
	jl	.LBB8_7
# %bb.8:
	movq	8(%rbx), %rdi
	callq	atoi
	testl	%eax, %eax
	setne	%al
	movl	%eax, 24(%rsp)                  # 4-byte Spill
	cmpl	$2, %ebp
	je	.LBB8_9
# %bb.10:
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %r13d
	cmpl	$4, %ebp
	jb	.LBB8_11
# %bb.12:
	movq	24(%rbx), %rdi
	callq	atoi
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	cmpl	$4, %ebp
	jne	.LBB8_13
.LBB8_11:
	movl	$1024, %r12d                    # imm = 0x400
	jmp	.LBB8_15
.LBB8_7:
	movl	$0, 24(%rsp)                    # 4-byte Folded Spill
.LBB8_9:
	movl	$1024, %r12d                    # imm = 0x400
	movl	$16, %r13d
.LBB8_15:                               # %.thread200
	movl	$.L.str.9, %edi
	movl	%r12d, %esi
	movl	%r15d, %edx
	xorl	%eax, %eax
	callq	printf
	movl	%r15d, %eax
	imull	%r12d, %eax
	movl	%eax, 20(%rsp)                  # 4-byte Spill
	movslq	%eax, %rbp
	leaq	(,%rbp,4), %r14
	leal	(%r12,%r13), %eax
	decl	%eax
	xorl	%edx, %edx
	divl	%r13d
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, 120(%rsp)                 # 8-byte Spill
	movq	40(%rsp), %rcx                  # 8-byte Reload
	leal	(%rcx,%r15), %eax
	decl	%eax
	xorl	%edx, %edx
	divl	%ecx
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, 112(%rsp)                 # 8-byte Spill
	movl	%r12d, %eax
	xorl	%edx, %edx
	divl	%r13d
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, 104(%rsp)                 # 8-byte Spill
	movq	%r15, 72(%rsp)                  # 8-byte Spill
	movl	%r15d, %eax
	xorl	%edx, %edx
	movq	%r13, 80(%rsp)                  # 8-byte Spill
	divl	%r13d
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %r13
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	testl	%ebp, %ebp
	jle	.LBB8_18
# %bb.16:                               # %.lr.ph.preheader.i
	movl	20(%rsp), %ebx                  # 4-byte Reload
	xorl	%r15d, %r15d
.LBB8_17:                               # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	movzbl	%al, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	divss	.LCPI8_0(%rip), %xmm0
	movss	%xmm0, (%r13,%r15,4)
	incq	%r15
	cmpq	%r15, %rbx
	jne	.LBB8_17
.LBB8_18:                               # %_Z11initialDataPfi.exit
	movq	72(%rsp), %rax                  # 8-byte Reload
	testl	%eax, %eax
	jle	.LBB8_24
# %bb.19:                               # %.preheader.lr.ph.i
	movl	%eax, %eax
	movl	%r12d, %ecx
	leaq	(,%rax,4), %rdx
	xorl	%esi, %esi
	movq	88(%rsp), %rdi                  # 8-byte Reload
	xorl	%r8d, %r8d
.LBB8_20:                               # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_22 Depth 2
	testl	%r12d, %r12d
	jle	.LBB8_23
# %bb.21:                               # %.lr.ph.i160
                                        #   in Loop: Header=BB8_20 Depth=1
	movl	%esi, %r9d
	leaq	(,%r9,4), %r9
	addq	%r13, %r9
	movq	%rdi, %r10
	xorl	%r11d, %r11d
.LBB8_22:                               #   Parent Loop BB8_20 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r9,%r11,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r10)
	incq	%r11
	addq	%rdx, %r10
	cmpq	%r11, %rcx
	jne	.LBB8_22
.LBB8_23:                               # %._crit_edge.i
                                        #   in Loop: Header=BB8_20 Depth=1
	incq	%r8
	addq	$4, %rdi
	addl	%r12d, %esi
	cmpq	%rax, %r8
	jne	.LBB8_20
.LBB8_24:                               # %_Z13transposeHostPfS_ii.exit
	leaq	56(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB8_25
# %bb.27:
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB8_28
# %bb.29:
	movq	56(%rsp), %rdi
	movq	%r13, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB8_30
# %bb.31:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB8_32
# %bb.33:
	movl	80(%rsp), %eax                  # 4-byte Reload
	movq	40(%rsp), %rbx                  # 8-byte Reload
	shlq	$32, %rbx
	orq	%rax, %rbx
	movq	112(%rsp), %r15                 # 8-byte Reload
	shlq	$32, %r15
	addq	120(%rsp), %r15                 # 8-byte Folded Reload
	movq	48(%rsp), %rdi                  # 8-byte Reload
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	memset@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_35
# %bb.34:
	movq	8(%rsp), %rdi
	movq	56(%rsp), %rsi
	movl	%r12d, %edx
	movq	72(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z23__device_stub__justcopyPfS_ii
.LBB8_35:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB8_36
# %bb.38:
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	32(%rsp), %rdi
	callq	hipEventSynchronize
	movq	64(%rsp), %rsi
	movq	32(%rsp), %rdx
	leaq	28(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	8(%rsp), %rsi
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB8_39
# %bb.40:
	cmpb	$0, 24(%rsp)                    # 1-byte Folded Reload
	je	.LBB8_42
# %bb.41:
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movl	20(%rsp), %esi                  # 4-byte Reload
	callq	_Z9printDataPfi
.LBB8_42:
	shlq	$3, %rbp
	movq	%rbp, %xmm0
	punpckldq	.LCPI8_1(%rip), %xmm0   # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
	subpd	.LCPI8_2(%rip), %xmm0
	movapd	%xmm0, %xmm2
	unpckhpd	%xmm0, %xmm2                    # xmm2 = xmm2[1],xmm0[1]
	addsd	%xmm0, %xmm2
	mulsd	.LCPI8_3(%rip), %xmm2
	movss	28(%rsp), %xmm1                 # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	divss	.LCPI8_4(%rip), %xmm1
	cvtss2sd	%xmm1, %xmm1
	movapd	%xmm2, 128(%rsp)                # 16-byte Spill
	divsd	%xmm1, %xmm2
	xorps	%xmm1, %xmm1
	cvtsd2ss	%xmm2, %xmm1
	cvtss2sd	%xmm1, %xmm1
	movl	$.L.str.10, %edi
	movq	120(%rsp), %rsi                 # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movq	112(%rsp), %rdx                 # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	movq	80(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movq	40(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	movb	$2, %al
	callq	printf
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB8_43
# %bb.44:
	movq	96(%rsp), %r15                  # 8-byte Reload
	shlq	$32, %r15
	addq	104(%rsp), %r15                 # 8-byte Folded Reload
	movq	48(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rdi
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	memset@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	72(%rsp), %r15                  # 8-byte Reload
	jne	.LBB8_46
# %bb.45:
	movq	8(%rsp), %rdi
	movq	56(%rsp), %rsi
	movl	%r12d, %edx
	movl	%r15d, %ecx
	callq	_Z27__device_stub__opttransposePfS_ii
.LBB8_46:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB8_47
# %bb.48:
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	32(%rsp), %rdi
	callq	hipEventSynchronize
	movq	64(%rsp), %rsi
	movq	32(%rsp), %rdx
	leaq	28(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	8(%rsp), %rsi
	movq	%rbp, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB8_49
# %bb.50:
	cmpb	$0, 24(%rsp)                    # 1-byte Folded Reload
	movq	88(%rsp), %r14                  # 8-byte Reload
	je	.LBB8_52
# %bb.51:
	movq	%rbp, %rdi
	movl	20(%rsp), %esi                  # 4-byte Reload
	callq	_Z9printDataPfi
.LBB8_52:
	movss	28(%rsp), %xmm1                 # xmm1 = mem[0],zero,zero,zero
	cvtss2sd	%xmm1, %xmm0
	divss	.LCPI8_4(%rip), %xmm1
	cvtss2sd	%xmm1, %xmm1
	movapd	128(%rsp), %xmm2                # 16-byte Reload
	divsd	%xmm1, %xmm2
	xorps	%xmm1, %xmm1
	cvtsd2ss	%xmm2, %xmm1
	cvtss2sd	%xmm1, %xmm1
	movl	$.L.str.11, %edi
	movq	104(%rsp), %rsi                 # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movq	96(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	movq	80(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movq	40(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	movb	$2, %al
	callq	printf
	movq	%r14, %rdi
	movq	%rbp, %rsi
	movl	%r15d, %edx
	movl	%r12d, %ecx
	callq	_Z11checkResultPfS_ii
	movq	56(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB8_53
# %bb.54:
	movq	8(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB8_55
# %bb.56:
	movq	%r13, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%rbp, %rdi
	callq	free
	callq	hipDeviceReset
	testl	%eax, %eax
	jne	.LBB8_57
# %bb.58:
	xorl	%eax, %eax
	addq	$1624, %rsp                     # imm = 0x658
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB8_13:
	.cfi_def_cfa_offset 1680
	movq	32(%rbx), %rdi
	callq	atoi
	movl	%eax, %r12d
	cmpl	$6, %ebp
	jb	.LBB8_15
# %bb.14:
	movq	40(%rbx), %rdi
	callq	atoi
	movl	%eax, %r15d
	jmp	.LBB8_15
.LBB8_1:
	movl	%eax, %r14d
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$126, %ecx
	jmp	.LBB8_2
.LBB8_5:
	movl	%eax, %r14d
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$129, %ecx
.LBB8_2:
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %rbx
	movl	%r14d, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movq	%rbx, %rdi
	movl	%r14d, %edx
	jmp	.LBB8_3
.LBB8_25:
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$179, %ecx
	jmp	.LBB8_26
.LBB8_28:
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$180, %ecx
	jmp	.LBB8_26
.LBB8_30:
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$183, %ecx
	jmp	.LBB8_26
.LBB8_32:
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$186, %ecx
	jmp	.LBB8_26
.LBB8_36:
	movl	%eax, %r15d
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$191, %ecx
	jmp	.LBB8_37
.LBB8_39:
	movl	%eax, %r15d
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$196, %ecx
	jmp	.LBB8_37
.LBB8_43:
	movl	%eax, %r15d
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$205, %ecx
.LBB8_37:
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %rbx
	movl	%r15d, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movq	%rbx, %rdi
	movl	%r15d, %edx
	jmp	.LBB8_3
.LBB8_47:
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$212, %ecx
	jmp	.LBB8_26
.LBB8_49:
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$217, %ecx
	jmp	.LBB8_26
.LBB8_53:
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$226, %ecx
	jmp	.LBB8_26
.LBB8_55:
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$227, %ecx
	jmp	.LBB8_26
.LBB8_57:
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str.4, %esi
	movl	$.L.str.5, %edx
	movl	$233, %ecx
.LBB8_26:
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movq	%r14, %rdi
	movl	%ebx, %edx
.LBB8_3:
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end8:
	.size	main, .Lfunc_end8-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8justcopyPfS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14naivetransposePfS_ii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18lessnaivetransposePfS_ii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12opttransposePfS_ii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%3.0f "
	.size	.L.str, 7

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"different on (%d, %d) (offset=%d) element in transposed matrix: host %f gpu %f\n"
	.size	.L.str.2, 80

	.type	_Z8justcopyPfS_ii,@object       # @_Z8justcopyPfS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z8justcopyPfS_ii
	.p2align	3, 0x0
_Z8justcopyPfS_ii:
	.quad	_Z23__device_stub__justcopyPfS_ii
	.size	_Z8justcopyPfS_ii, 8

	.type	_Z14naivetransposePfS_ii,@object # @_Z14naivetransposePfS_ii
	.globl	_Z14naivetransposePfS_ii
	.p2align	3, 0x0
_Z14naivetransposePfS_ii:
	.quad	_Z29__device_stub__naivetransposePfS_ii
	.size	_Z14naivetransposePfS_ii, 8

	.type	_Z18lessnaivetransposePfS_ii,@object # @_Z18lessnaivetransposePfS_ii
	.globl	_Z18lessnaivetransposePfS_ii
	.p2align	3, 0x0
_Z18lessnaivetransposePfS_ii:
	.quad	_Z33__device_stub__lessnaivetransposePfS_ii
	.size	_Z18lessnaivetransposePfS_ii, 8

	.type	_Z12opttransposePfS_ii,@object  # @_Z12opttransposePfS_ii
	.globl	_Z12opttransposePfS_ii
	.p2align	3, 0x0
_Z12opttransposePfS_ii:
	.quad	_Z27__device_stub__opttransposePfS_ii
	.size	_Z12opttransposePfS_ii, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"Error: %s:%d, "
	.size	.L.str.4, 15

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/RhodesCS2016/gpgpu/master/glinklater/exam/junetranspose-opt.hip"
	.size	.L.str.5, 126

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"code: %d, reason: %s\n"
	.size	.L.str.6, 22

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"%s starting transpose at "
	.size	.L.str.7, 26

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"device %d: %s "
	.size	.L.str.8, 15

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	" with matrix nrows %d ncols %d\n"
	.size	.L.str.9, 32

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"justcopy kernel elapsed %f msec <<< grid (%d,%d) block (%d,%d)>>> effective bandwidth %f GB/s\n"
	.size	.L.str.10, 95

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"optimised transpose elapsed %f msec <<< grid (%d,%d) block (%d,%d)>>> effective bandwidth %f GB/s\n"
	.size	.L.str.11, 99

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8justcopyPfS_ii"
	.size	.L__unnamed_1, 18

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z14naivetransposePfS_ii"
	.size	.L__unnamed_2, 25

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z18lessnaivetransposePfS_ii"
	.size	.L__unnamed_3, 29

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z12opttransposePfS_ii"
	.size	.L__unnamed_4, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Arrays do not match.\n"
	.size	.Lstr, 22

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__justcopyPfS_ii
	.addrsig_sym _Z29__device_stub__naivetransposePfS_ii
	.addrsig_sym _Z33__device_stub__lessnaivetransposePfS_ii
	.addrsig_sym _Z27__device_stub__opttransposePfS_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8justcopyPfS_ii
	.addrsig_sym _Z14naivetransposePfS_ii
	.addrsig_sym _Z18lessnaivetransposePfS_ii
	.addrsig_sym _Z12opttransposePfS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8justcopyPfS_ii       ; -- Begin function _Z8justcopyPfS_ii
	.globl	_Z8justcopyPfS_ii
	.p2align	8
	.type	_Z8justcopyPfS_ii,@function
_Z8justcopyPfS_ii:                      ; @_Z8justcopyPfS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s4, 16
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s5, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, s2, v0
	v_cmp_gt_u32_e64 s2, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v0, s3, v[1:2]
	v_mov_b32_e32 v3, 0
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8justcopyPfS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8justcopyPfS_ii, .Lfunc_end0-_Z8justcopyPfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 200
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z14naivetransposePfS_ii ; -- Begin function _Z14naivetransposePfS_ii
	.globl	_Z14naivetransposePfS_ii
	.p2align	8
	.type	_Z14naivetransposePfS_ii,@function
_Z14naivetransposePfS_ii:               ; @_Z14naivetransposePfS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e32 vcc_lo, s4, v0
	v_cmp_gt_u32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v2, v[4:5], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[4:5], null, v0, s5, v[1:2]
	v_mov_b32_e32 v5, v3
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14naivetransposePfS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z14naivetransposePfS_ii, .Lfunc_end1-_Z14naivetransposePfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 224
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z18lessnaivetransposePfS_ii ; -- Begin function _Z18lessnaivetransposePfS_ii
	.globl	_Z18lessnaivetransposePfS_ii
	.p2align	8
	.type	_Z18lessnaivetransposePfS_ii,@function
_Z18lessnaivetransposePfS_ii:           ; @_Z18lessnaivetransposePfS_ii
; %bb.0:
	s_load_b32 s5, s[0:1], 0x24
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_mov_b32 s6, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB2_3
; %bb.1:                                ; %.lr.ph
	s_clause 0x1
	s_load_b32 s7, s[2:3], 0x0
	s_load_b32 s8, s[2:3], 0xc
	v_and_b32_e32 v3, 0x3ff, v0
	v_bfe_u32 v2, v0, 10, 10
	s_mov_b32 s4, s15
	s_load_b128 s[0:3], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s14, s5, v[3:4]
	v_mad_u64_u32 v[4:5], null, s4, s5, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[5:6], null, s7, v0, s[4:5]
	v_mad_u64_u32 v[6:7], null, s7, v4, s[14:15]
	s_lshr_b32 s4, s8, 16
	s_mul_i32 s7, s7, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_mul_i32 s7, s7, s4
	v_mad_u64_u32 v[0:1], null, v5, s5, v[2:3]
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, v6, s5, v[3:4]
	v_mov_b32_e32 v2, 0
.LBB2_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_nc_u32_e32 v1, s7, v1
	v_add_co_u32 v3, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	global_load_b32 v5, v[3:4], off
	v_dual_mov_b32 v4, v2 :: v_dual_add_nc_u32 v3, s6, v0
	s_add_i32 s6, s6, s4
	s_cmp_ge_u32 s6, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[3:4], v5, off
	s_cbranch_scc0 .LBB2_2
.LBB2_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18lessnaivetransposePfS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z18lessnaivetransposePfS_ii, .Lfunc_end2-_Z18lessnaivetransposePfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 288
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z12opttransposePfS_ii  ; -- Begin function _Z12opttransposePfS_ii
	.globl	_Z12opttransposePfS_ii
	.p2align	8
	.type	_Z12opttransposePfS_ii,@function
_Z12opttransposePfS_ii:                 ; @_Z12opttransposePfS_ii
; %bb.0:
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x24
	s_load_b32 s8, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_add_u32 s0, s0, 24
	s_addc_u32 s1, s1, 0
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_mov_b32 s2, s15
	s_mov_b32 s10, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, 0
	s_mul_i32 s9, s8, s3
	s_cselect_b32 s11, -1, 0
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB3_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s12, s[0:1], 0xc
	v_mad_u64_u32 v[2:3], null, s2, s3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[4:5], null, s8, v2, s[14:15]
	v_lshlrev_b32_e32 v5, 2, v1
	v_mad_u64_u32 v[2:3], null, v4, s3, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshl_add_u32 v4, v0, 7, v5
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s12, s12, 16
	s_lshl_b32 s13, s12, 7
	s_mul_i32 s15, s9, s12
.LBB3_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v3, 31, v2
	s_add_i32 s10, s10, s12
	s_cmp_ge_u32 s10, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[2:3]
	v_add_nc_u32_e32 v2, s15, v2
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	global_load_b32 v3, v[5:6], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v3
	v_add_nc_u32_e32 v4, s13, v4
	s_cbranch_scc0 .LBB3_2
.LBB3_3:                                ; %._crit_edge
	s_and_not1_b32 vcc_lo, exec_lo, s11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB3_6
; %bb.4:                                ; %.lr.ph29
	s_load_b32 s0, s[0:1], 0xc
	v_mad_u64_u32 v[2:3], null, s14, s3, v[0:1]
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshl_add_u32 v0, v1, 7, v0
	v_mad_u64_u32 v[4:5], null, s8, v2, s[2:3]
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, v4, s3, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s0, 16
	s_mul_i32 s9, s9, s0
	s_lshl_b32 s1, s0, 2
.LBB3_5:                                ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v1, v0
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_nc_u32_e32 v0, s1, v0
	s_add_i32 s2, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_ge_u32 s2, s3
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	v_add_nc_u32_e32 v2, s9, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v1, off
	s_cbranch_scc0 .LBB3_5
.LBB3_6:                                ; %._crit_edge30
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12opttransposePfS_ii
		.amdhsa_group_segment_fixed_size 4096
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z12opttransposePfS_ii, .Lfunc_end3-_Z12opttransposePfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 420
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4096 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
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...

	.end_amdgpu_metadata
