#include <cuda.h>

#include <vector>
#include <cstdio>
#include <cstdlib>

__global__ void kernel(int* x, int* y, int m, int n) {
  size_t tidx = threadIdx.x + blockIdx.x*blockDim.x;
  size_t tidy = threadIdx.y + blockIdx.y*blockDim.y;

  if (tidx < m && tidy < n) {
    x[tidx*n + tidy] += y[tidx*n + tidy];
  }
}

int main(int argc, char** argv) {

  size_t m = 1000;
  size_t n = 1000;

  std::vector<int> x(m*n, 1);
  std::vector<int> y(m*n, 1);

  int* d_x;
  cudaMalloc(&d_x, sizeof(int)*m*n);

  int* d_y;
  cudaMalloc(&d_y, sizeof(int)*m*n);

  cudaMemcpy(d_x, x.data(), sizeof(int)*m*n, cudaMemcpyHostToDevice);
  cudaMemcpy(d_y, y.data(), sizeof(int)*m*n, cudaMemcpyHostToDevice);

  cudaDeviceSynchronize();

  size_t block_size = 16;

  // ceil(grid_size / block_size)
  dim3 grid((m + block_size - 1) / block_size,
            (n + block_size - 1) / block_size);
  dim3 block(block_size, block_size);

  kernel<<<grid, block>>>(d_x, d_y, m, n);

  cudaMemcpy(x.data(), d_x, sizeof(int)*m*n, cudaMemcpyDeviceToHost);

  cudaDeviceSynchronize();

  bool all_twos = true;
  for (size_t i = 0; i < x.size(); i++) {
    if (x[i] != 2) {
      printf("Breaking with %lu == %d\n", i, x[i]);
      all_twos = false;
      break;
    }
  }

  if (all_twos) {
    printf("OK!\n");
  } else {
    printf("FAILED.\n");
  }

  cudaFree(d_x);
  cudaFree(d_y);

  return 0;
}

	.file	"tmpxft_003b5e2c_00000000-6_add_2d.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2899:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2899:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z29__device_stub__Z6kernelPiS_iiPiS_ii
	.type	_Z29__device_stub__Z6kernelPiS_iiPiS_ii, @function
_Z29__device_stub__Z6kernelPiS_iiPiS_ii:
.LFB2921:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6kernelPiS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2921:
	.size	_Z29__device_stub__Z6kernelPiS_iiPiS_ii, .-_Z29__device_stub__Z6kernelPiS_iiPiS_ii
	.globl	_Z6kernelPiS_ii
	.type	_Z6kernelPiS_ii, @function
_Z6kernelPiS_ii:
.LFB2922:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z6kernelPiS_iiPiS_ii
	.cfi_endproc
.LFE2922:
	.size	_Z6kernelPiS_ii, .-_Z6kernelPiS_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z6kernelPiS_ii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2924:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6kernelPiS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2924:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt6vectorIiSaIiEED2Ev,"axG",@progbits,_ZNSt6vectorIiSaIiEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEED2Ev
	.type	_ZNSt6vectorIiSaIiEED2Ev, @function
_ZNSt6vectorIiSaIiEED2Ev:
.LFB2982:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L10
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L10:
	ret
	.cfi_endproc
.LFE2982:
	.size	_ZNSt6vectorIiSaIiEED2Ev, .-_ZNSt6vectorIiSaIiEED2Ev
	.weak	_ZNSt6vectorIiSaIiEED1Ev
	.set	_ZNSt6vectorIiSaIiEED1Ev,_ZNSt6vectorIiSaIiEED2Ev
	.section	.rodata.str1.1
.LC1:
	.string	"Breaking with %lu == %d\n"
.LC2:
	.string	"FAILED.\n"
.LC3:
	.string	"OK!\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB2896:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA2896
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$4000000, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$104, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
.LEHB0:
	call	_Znwm@PLT
.LEHE0:
	leaq	4000000(%rax), %rdx
	movq	%rax, 40(%rsp)
	movq	%rax, %rbx
	xorl	%eax, %eax
	movq	%rdx, 56(%rsp)
.L13:
	movl	$1, (%rbx,%rax)
	addq	$4, %rax
	cmpq	$4000000, %rax
	jne	.L13
	xorl	%eax, %eax
	movl	$4000000, %edi
	movq	%rdx, 48(%rsp)
	movq	%rax, 72(%rsp)
	movq	%rax, 80(%rsp)
.LEHB1:
	call	_Znwm@PLT
.LEHE1:
	leaq	4000000(%rax), %rdx
	movq	%rax, 64(%rsp)
	movq	%rax, %rbp
	xorl	%eax, %eax
	movq	%rdx, 80(%rsp)
.L14:
	movl	$1, 0(%rbp,%rax)
	addq	$4, %rax
	cmpq	$4000000, %rax
	jne	.L14
	movq	%rsp, %rdi
	movl	$4000000, %esi
	movq	%rdx, 72(%rsp)
.LEHB2:
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$4000000, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movl	$4000000, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$4000000, %edx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$68719476752, %rdx
	movabsq	$270582939711, %rdi
	call	__cudaPushCallConfiguration@PLT
	movq	(%rsp), %rdi
	testl	%eax, %eax
	jne	.L15
	movq	8(%rsp), %rsi
	movl	$1000, %ecx
	movl	$1000, %edx
	call	_Z29__device_stub__Z6kernelPiS_iiPiS_ii
.L15:
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movl	$4000000, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	xorl	%edx, %edx
.L18:
	movl	(%rbx,%rdx,4), %ecx
	cmpl	$2, %ecx
	je	.L16
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC2(%rip), %rsi
	jmp	.L31
.L16:
	incq	%rdx
	cmpq	$1000000, %rdx
	jne	.L18
	leaq	.LC3(%rip), %rsi
.L31:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
.LEHE2:
	leaq	64(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	40(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	jmp	.L28
.L24:
	endbr64
	movq	%rax, %rbx
.L19:
	leaq	64(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L20
.L23:
	endbr64
	movq	%rax, %rbx
.L20:
	leaq	40(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L28
	movq	%rbx, %rdi
.LEHB3:
	call	_Unwind_Resume@PLT
.LEHE3:
.L28:
	call	__stack_chk_fail@PLT
.L22:
	addq	$104, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2896:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA2896:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE2896-.LLSDACSB2896
.LLSDACSB2896:
	.uleb128 .LEHB0-.LFB2896
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB2896
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L23-.LFB2896
	.uleb128 0
	.uleb128 .LEHB2-.LFB2896
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L24-.LFB2896
	.uleb128 0
	.uleb128 .LEHB3-.LFB2896
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
.LLSDACSE2896:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>

#include <vector>
#include <cstdio>
#include <cstdlib>

__global__ void kernel(int* x, int* y, int m, int n) {
  size_t tidx = threadIdx.x + blockIdx.x*blockDim.x;
  size_t tidy = threadIdx.y + blockIdx.y*blockDim.y;

  if (tidx < m && tidy < n) {
    x[tidx*n + tidy] += y[tidx*n + tidy];
  }
}

int main(int argc, char** argv) {

  size_t m = 1000;
  size_t n = 1000;

  std::vector<int> x(m*n, 1);
  std::vector<int> y(m*n, 1);

  int* d_x;
  hipMalloc(&d_x, sizeof(int)*m*n);

  int* d_y;
  hipMalloc(&d_y, sizeof(int)*m*n);

  hipMemcpy(d_x, x.data(), sizeof(int)*m*n, hipMemcpyHostToDevice);
  hipMemcpy(d_y, y.data(), sizeof(int)*m*n, hipMemcpyHostToDevice);

  hipDeviceSynchronize();

  size_t block_size = 16;

  // ceil(grid_size / block_size)
  dim3 grid((m + block_size - 1) / block_size,
            (n + block_size - 1) / block_size);
  dim3 block(block_size, block_size);

  kernel<<<grid, block>>>(d_x, d_y, m, n);

  hipMemcpy(x.data(), d_x, sizeof(int)*m*n, hipMemcpyDeviceToHost);

  hipDeviceSynchronize();

  bool all_twos = true;
  for (size_t i = 0; i < x.size(); i++) {
    if (x[i] != 2) {
      printf("Breaking with %lu == %d\n", i, x[i]);
      all_twos = false;
      break;
    }
  }

  if (all_twos) {
    printf("OK!\n");
  } else {
    printf("FAILED.\n");
  }

  hipFree(d_x);
  hipFree(d_y);

  return 0;
}

	.text
	.file	"add_2d.hip"
	.globl	_Z21__device_stub__kernelPiS_ii # -- Begin function _Z21__device_stub__kernelPiS_ii
	.type	_Z21__device_stub__kernelPiS_ii,@function
_Z21__device_stub__kernelPiS_ii:        # @_Z21__device_stub__kernelPiS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelPiS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__kernelPiS_ii, .Lfunc_end0-_Z21__device_stub__kernelPiS_ii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:                                # %.noexc
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	_Znwm
	movq	%rax, %rbx
	xorl	%eax, %eax
.LBB1_1:                                # %.lr.ph.i.i.i.i.i.i.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movl	$1, (%rbx,%rax)
	addq	$4, %rax
	cmpq	$4000000, %rax                  # imm = 0x3D0900
	jne	.LBB1_1
# %bb.2:                                # %_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_.exit
.Ltmp0:
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	_Znwm
.Ltmp1:
# %bb.3:                                # %.lr.ph.i.i.i.i.i.i.i.i.i53.preheader
	movq	%rax, %r14
	xorl	%eax, %eax
.LBB1_4:                                # %.lr.ph.i.i.i.i.i.i.i.i.i53
                                        # =>This Inner Loop Header: Depth=1
	movl	$1, (%r14,%rax)
	addq	$4, %rax
	cmpq	$4000000, %rax                  # imm = 0x3D0900
	jne	.LBB1_4
# %bb.5:                                # %_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_.exit57
.Ltmp3:
	movq	%rsp, %rdi
	movl	$4000000, %esi                  # imm = 0x3D0900
	callq	hipMalloc
.Ltmp4:
# %bb.6:                                # %_ZL9hipMallocIiE10hipError_tPPT_m.exit
.Ltmp6:
	leaq	8(%rsp), %rdi
	movl	$4000000, %esi                  # imm = 0x3D0900
	callq	hipMalloc
.Ltmp7:
# %bb.7:                                # %_ZL9hipMallocIiE10hipError_tPPT_m.exit60
	movq	(%rsp), %rdi
.Ltmp8:
	movl	$4000000, %edx                  # imm = 0x3D0900
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp9:
# %bb.8:
	movq	8(%rsp), %rdi
.Ltmp10:
	movl	$4000000, %edx                  # imm = 0x3D0900
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp11:
# %bb.9:
.Ltmp12:
	callq	hipDeviceSynchronize
.Ltmp13:
# %bb.10:
.Ltmp15:
	movabsq	$270582939711, %rdi             # imm = 0x3F0000003F
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp16:
# %bb.11:
	testl	%eax, %eax
	jne	.LBB1_13
# %bb.12:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
.Ltmp17:
	movl	$1000, %edx                     # imm = 0x3E8
	movl	$1000, %ecx                     # imm = 0x3E8
	callq	_Z21__device_stub__kernelPiS_ii
.Ltmp18:
.LBB1_13:
	movq	(%rsp), %rsi
.Ltmp19:
	movl	$4000000, %edx                  # imm = 0x3D0900
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp20:
# %bb.14:
.Ltmp21:
	callq	hipDeviceSynchronize
.Ltmp22:
# %bb.15:                               # %.preheader.preheader
	xorl	%esi, %esi
.LBB1_16:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%rsi,4), %edx
	cmpl	$2, %edx
	jne	.LBB1_23
# %bb.17:                               #   in Loop: Header=BB1_16 Depth=1
	incq	%rsi
	cmpq	$1000000, %rsi                  # imm = 0xF4240
	jne	.LBB1_16
# %bb.18:
	movl	$.Lstr.1, %edi
	jmp	.LBB1_24
.LBB1_23:
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr, %edi
.LBB1_24:                               # %.critedge
	callq	puts@PLT
	movq	(%rsp), %rdi
.Ltmp24:
	callq	hipFree
.Ltmp25:
# %bb.25:
	movq	8(%rsp), %rdi
.Ltmp26:
	callq	hipFree
.Ltmp27:
# %bb.26:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit62
	movq	%r14, %rdi
	callq	_ZdlPv
	movq	%rbx, %rdi
	callq	_ZdlPv
	xorl	%eax, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB1_20:
	.cfi_def_cfa_offset 48
.Ltmp5:
	jmp	.LBB1_28
.LBB1_19:
.Ltmp2:
	movq	%rax, %r15
	jmp	.LBB1_29
.LBB1_22:
.Ltmp28:
	jmp	.LBB1_28
.LBB1_21:
.Ltmp23:
	jmp	.LBB1_28
.LBB1_27:
.Ltmp14:
.LBB1_28:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit64
	movq	%rax, %r15
	movq	%r14, %rdi
	callq	_ZdlPv
.LBB1_29:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit66
	movq	%rbx, %rdi
	callq	_ZdlPv
	movq	%r15, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp13-.Ltmp6                 #   Call between .Ltmp6 and .Ltmp13
	.uleb128 .Ltmp14-.Lfunc_begin0          #     jumps to .Ltmp14
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp15-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp22-.Ltmp15                #   Call between .Ltmp15 and .Ltmp22
	.uleb128 .Ltmp23-.Lfunc_begin0          #     jumps to .Ltmp23
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp24-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp27-.Ltmp24                #   Call between .Ltmp24 and .Ltmp27
	.uleb128 .Ltmp28-.Lfunc_begin0          #     jumps to .Ltmp28
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp27-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Lfunc_end1-.Ltmp27            #   Call between .Ltmp27 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelPiS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6kernelPiS_ii,@object         # @_Z6kernelPiS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z6kernelPiS_ii
	.p2align	3, 0x0
_Z6kernelPiS_ii:
	.quad	_Z21__device_stub__kernelPiS_ii
	.size	_Z6kernelPiS_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Breaking with %lu == %d\n"
	.size	.L.str, 25

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6kernelPiS_ii"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"FAILED."
	.size	.Lstr, 8

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"OK!"
	.size	.Lstr.1, 4

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__kernelPiS_ii
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z6kernelPiS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6kernelPiS_ii         ; -- Begin function _Z6kernelPiS_ii
	.globl	_Z6kernelPiS_ii
	.p2align	8
	.type	_Z6kernelPiS_ii,@function
_Z6kernelPiS_ii:                        ; @_Z6kernelPiS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s4, 0xffff
	s_lshr_b32 s4, s4, 16
	v_mad_u64_u32 v[0:1], null, s14, s5, v[2:3]
	v_mov_b32_e32 v1, 0
	v_mad_u64_u32 v[2:3], null, s15, s4, v[4:5]
	s_ashr_i32 s7, s2, 31
	s_mov_b32 s6, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v1
	s_ashr_i32 s5, s3, 31
	s_mov_b32 s4, s3
	v_cmp_gt_u64_e32 vcc_lo, s[6:7], v[0:1]
	v_cmp_gt_u64_e64 s2, s[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_mad_u64_u32 v[4:5], null, v0, s4, v[2:3]
	s_load_b128 s[0:3], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v1, v5
	v_mad_u64_u32 v[2:3], null, v0, s5, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v5, v2
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelPiS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6kernelPiS_ii, .Lfunc_end0-_Z6kernelPiS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 248
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelPiS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelPiS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
