#include <iostream>
#include <iomanip>
#include <chrono>
#include <thread>

using namespace std;

constexpr int BLOCK_DIM = 16;

// determines if this node (pixel) is inside the circle
// result is stored in a [16*16] array
// thread 0 then computes the number of "in" nodes (value from 0 to 16*16)
__global__ void flagKernel(unsigned *block_counts) {
	bool __shared__ ins[BLOCK_DIM*BLOCK_DIM];
	// compute our coordinate in the global grid
	unsigned i = blockIdx.x*blockDim.x + threadIdx.x; // my i
	unsigned j = blockIdx.y*blockDim.y + threadIdx.y; // my j
	unsigned Ni = gridDim.x*blockDim.x;   // total number of nodes in x
	unsigned Nj = gridDim.y*blockDim.y;   // total number of nodex in y

	//get 1D index from i,j, u=j*ni+i
	unsigned u = threadIdx.y*blockDim.x + threadIdx.x;

	float x = i/(float)Ni;     // compute x in [0,1)
	float y = j/(float)Nj;     // y in [0,1)
	if (x*x+y*y<=1) ins[u] = true;  // check if in the circle
	else ins[u] = false;

	// wait for all threads in the block to finish
	__syncthreads();

	// let the first thread in the block add up "ins"
	if (u==0) {
		unsigned count = 0;
		for (int i=0;i<blockDim.x*blockDim.y;i++)
		  if (ins[u]) count++;

		// flattened index for the block, u=j*ni+i
		int block_u = blockIdx.y*gridDim.x+blockIdx.x;

		// store the sum in global memory
		block_counts[block_u] = count;
	}
}

// this kernel adds up block-level sums to the global sum
// this could be further optimized by splitting up the sum over threads
__global__ void addKernel(dim3 numBlocks, unsigned *block_counts, unsigned long *glob_count) {
	// compute total number of blocks
	unsigned N = numBlocks.x*numBlocks.y;
	unsigned long sum = 0;
	for (int i=0;i<N;i++)
		sum+=block_counts[i];

	// store result in global memory
	*glob_count = sum;
}


int main() {
  // grab starting time
  auto time_start = chrono::high_resolution_clock::now();

  // figure out how many samples I should process
  size_t N = BLOCK_DIM*1000;    // grid size

  // figure out our grid size
  dim3 threadsPerBlock(BLOCK_DIM, BLOCK_DIM);
  dim3 numBlocks(N / threadsPerBlock.x, N / threadsPerBlock.y);

  // allocate memory on the GPU
  unsigned *block_counts;
  cudaMalloc((void**)&block_counts, numBlocks.x*numBlocks.y*sizeof(unsigned));

  unsigned long *N_in_gpu;  // GPU variable to hold the total N_in
  unsigned long N_in;		// CPU variable to hold this data
  cudaMalloc((void**)&N_in_gpu, sizeof(N_in));

  // launch the kernel to flag nodes, each block has BLOCK_DIM*BLOCK_DIM threads
  flagKernel<<<numBlocks, threadsPerBlock>>>(block_counts);

  // launch kernel to add up per-block "in" counts
  addKernel<<<1, 1>>>(numBlocks, block_counts, N_in_gpu);

  // transfer N_in from the GPU to the CPU
  cudaMemcpy(&N_in, N_in_gpu, sizeof(N_in), cudaMemcpyDeviceToHost);

  auto time_now = chrono::high_resolution_clock::now();
  chrono::duration<double> time_delta = time_now-time_start;

  // compute pi and show the result on rank 0 (root) using the global data
  size_t N_tot = N*N;
  double pi = 4*N_in/(double)N_tot;
  cout<<"Using a "<<N<<"x"<<N<<" grid ("<<N_tot<<" samples), pi is "<<pi
	  <<" in "<<setprecision(3)<<time_delta.count()<<" seconds"<<endl;

  // be a good neighbor and free memory
  cudaFree(block_counts);
  cudaFree(N_in_gpu);

  return 0;
}


	.file	"tmpxft_002cb83c_00000000-6_pi-cuda.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4132:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4132:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z30__device_stub__Z10flagKernelPjPj
	.type	_Z30__device_stub__Z10flagKernelPjPj, @function
_Z30__device_stub__Z10flagKernelPjPj:
.LFB4154:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z10flagKernelPj(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L2:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4154:
	.size	_Z30__device_stub__Z10flagKernelPjPj, .-_Z30__device_stub__Z10flagKernelPjPj
	.globl	_Z10flagKernelPj
	.type	_Z10flagKernelPj, @function
_Z10flagKernelPj:
.LFB4155:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z10flagKernelPjPj
	.cfi_endproc
.LFE4155:
	.size	_Z10flagKernelPj, .-_Z10flagKernelPj
	.globl	_Z35__device_stub__Z9addKernel4dim3PjPmR4dim3PjPm
	.type	_Z35__device_stub__Z9addKernel4dim3PjPmR4dim3PjPm, @function
_Z35__device_stub__Z9addKernel4dim3PjPmR4dim3PjPm:
.LFB4156:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rsi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	44(%rsp), %rsi
	movq	%rdx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 80(%rsp)
	leaq	32(%rsp), %rdi
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movl	$1, 40(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9addKernel4dim3PjPm(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L8:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4156:
	.size	_Z35__device_stub__Z9addKernel4dim3PjPmR4dim3PjPm, .-_Z35__device_stub__Z9addKernel4dim3PjPmR4dim3PjPm
	.globl	_Z9addKernel4dim3PjPm
	.type	_Z9addKernel4dim3PjPm, @function
_Z9addKernel4dim3PjPm:
.LFB4157:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%esi, %eax
	movq	%rdx, %rsi
	movq	%rcx, %rdx
	movq	%rdi, (%rsp)
	movq	%rsp, %rdi
	movl	%eax, 8(%rsp)
	call	_Z35__device_stub__Z9addKernel4dim3PjPmR4dim3PjPm
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4157:
	.size	_Z9addKernel4dim3PjPm, .-_Z9addKernel4dim3PjPm
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Using a "
.LC3:
	.string	"x"
.LC4:
	.string	" grid ("
.LC5:
	.string	" samples), pi is "
.LC6:
	.string	" in "
.LC7:
	.string	" seconds"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB4125:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$120, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	24(%rsp), %rdi
	movl	$4000000, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$8, %esi
	call	cudaMalloc@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297000, %rdi
	movl	$1, %esi
	movabsq	$68719476752, %rdx
	movl	$1, 60(%rsp)
	movq	%rdi, 52(%rsp)
	movq	%rdx, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	24(%rsp), %rdi
	call	_Z30__device_stub__Z10flagKernelPjPj
.L15:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 84(%rsp)
	leaq	88(%rsp), %rbp
	movq	%rdi, %rdx
	movq	%rdi, 76(%rsp)
	movq	%rdi, 64(%rsp)
	movl	$1, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	%rbp, %rdi
	movabsq	$4294967297000, %rax
	movq	%rax, 88(%rsp)
	movl	$1, 96(%rsp)
	call	_Z35__device_stub__Z9addKernel4dim3PjPmR4dim3PjPm
.L16:
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movl	$8, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	subq	%rbx, %rax
	cvtsi2sdq	%rax, %xmm0
	movq	88(%rsp), %rax
	divsd	.LC0(%rip), %xmm0
	movq	%xmm0, %rbx
	salq	$2, %rax
	js	.L17
	cvtsi2sdq	%rax, %xmm0
	jmp	.L18
.L17:
	shrq	%rax
	cvtsi2sdq	%rax, %xmm0
	addsd	%xmm0, %xmm0
.L18:
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	divsd	.LC1(%rip), %xmm0
	movsd	%xmm0, 8(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$16000, %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$16000, %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$256000000, %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	8(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %xmm0
	movq	%rax, %rdi
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	movq	$3, 8(%rdi,%rax)
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$120, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4125:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z9addKernel4dim3PjPm"
.LC9:
	.string	"_Z10flagKernelPj"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4159:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9addKernel4dim3PjPm(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10flagKernelPj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4159:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1104006501
	.align 8
.LC1:
	.long	0
	.long	1101956224
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <iomanip>
#include <chrono>
#include <thread>

using namespace std;

constexpr int BLOCK_DIM = 16;

// determines if this node (pixel) is inside the circle
// result is stored in a [16*16] array
// thread 0 then computes the number of "in" nodes (value from 0 to 16*16)
__global__ void flagKernel(unsigned *block_counts) {
	bool __shared__ ins[BLOCK_DIM*BLOCK_DIM];
	// compute our coordinate in the global grid
	unsigned i = blockIdx.x*blockDim.x + threadIdx.x; // my i
	unsigned j = blockIdx.y*blockDim.y + threadIdx.y; // my j
	unsigned Ni = gridDim.x*blockDim.x;   // total number of nodes in x
	unsigned Nj = gridDim.y*blockDim.y;   // total number of nodex in y

	//get 1D index from i,j, u=j*ni+i
	unsigned u = threadIdx.y*blockDim.x + threadIdx.x;

	float x = i/(float)Ni;     // compute x in [0,1)
	float y = j/(float)Nj;     // y in [0,1)
	if (x*x+y*y<=1) ins[u] = true;  // check if in the circle
	else ins[u] = false;

	// wait for all threads in the block to finish
	__syncthreads();

	// let the first thread in the block add up "ins"
	if (u==0) {
		unsigned count = 0;
		for (int i=0;i<blockDim.x*blockDim.y;i++)
		  if (ins[u]) count++;

		// flattened index for the block, u=j*ni+i
		int block_u = blockIdx.y*gridDim.x+blockIdx.x;

		// store the sum in global memory
		block_counts[block_u] = count;
	}
}

// this kernel adds up block-level sums to the global sum
// this could be further optimized by splitting up the sum over threads
__global__ void addKernel(dim3 numBlocks, unsigned *block_counts, unsigned long *glob_count) {
	// compute total number of blocks
	unsigned N = numBlocks.x*numBlocks.y;
	unsigned long sum = 0;
	for (int i=0;i<N;i++)
		sum+=block_counts[i];

	// store result in global memory
	*glob_count = sum;
}


int main() {
  // grab starting time
  auto time_start = chrono::high_resolution_clock::now();

  // figure out how many samples I should process
  size_t N = BLOCK_DIM*1000;    // grid size

  // figure out our grid size
  dim3 threadsPerBlock(BLOCK_DIM, BLOCK_DIM);
  dim3 numBlocks(N / threadsPerBlock.x, N / threadsPerBlock.y);

  // allocate memory on the GPU
  unsigned *block_counts;
  hipMalloc((void**)&block_counts, numBlocks.x*numBlocks.y*sizeof(unsigned));

  unsigned long *N_in_gpu;  // GPU variable to hold the total N_in
  unsigned long N_in;		// CPU variable to hold this data
  hipMalloc((void**)&N_in_gpu, sizeof(N_in));

  // launch the kernel to flag nodes, each block has BLOCK_DIM*BLOCK_DIM threads
  flagKernel<<<numBlocks, threadsPerBlock>>>(block_counts);

  // launch kernel to add up per-block "in" counts
  addKernel<<<1, 1>>>(numBlocks, block_counts, N_in_gpu);

  // transfer N_in from the GPU to the CPU
  hipMemcpy(&N_in, N_in_gpu, sizeof(N_in), hipMemcpyDeviceToHost);

  auto time_now = chrono::high_resolution_clock::now();
  chrono::duration<double> time_delta = time_now-time_start;

  // compute pi and show the result on rank 0 (root) using the global data
  size_t N_tot = N*N;
  double pi = 4*N_in/(double)N_tot;
  cout<<"Using a "<<N<<"x"<<N<<" grid ("<<N_tot<<" samples), pi is "<<pi
	  <<" in "<<setprecision(3)<<time_delta.count()<<" seconds"<<endl;

  // be a good neighbor and free memory
  hipFree(block_counts);
  hipFree(N_in_gpu);

  return 0;
}


	.text
	.file	"pi-cuda.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z25__device_stub__flagKernelPj # -- Begin function _Z25__device_stub__flagKernelPj
	.type	_Z25__device_stub__flagKernelPj,@function
_Z25__device_stub__flagKernelPj:        # @_Z25__device_stub__flagKernelPj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10flagKernelPj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__flagKernelPj, .Lfunc_end0-_Z25__device_stub__flagKernelPj
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__addKernel4dim3PjPm # -- Begin function _Z24__device_stub__addKernel4dim3PjPm
	.type	_Z24__device_stub__addKernel4dim3PjPm,@function
_Z24__device_stub__addKernel4dim3PjPm:  # @_Z24__device_stub__addKernel4dim3PjPm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	64(%rsp), %rax
	movq	%rdi, (%rax)
	movl	%esi, 8(%rax)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rsi, 8(%rbx)
	movq	%rdx, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9addKernel4dim3PjPm, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__addKernel4dim3PjPm, .Lfunc_end1-_Z24__device_stub__addKernel4dim3PjPm
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI2_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI2_3:
	.quad	0x41ae848000000000              # double 2.56E+8
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI2_1:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI2_2:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$56, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movabsq	$4294967297000, %r14            # imm = 0x3E8000003E8
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %rbx
	leaq	16(%rsp), %rdi
	movl	$4000000, %esi                  # imm = 0x3D0900
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$8, %esi
	callq	hipMalloc
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	16(%rsp), %rdi
	callq	_Z25__device_stub__flagKernelPj
.LBB2_2:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	movq	%r14, %rdi
	movl	$1, %esi
	callq	_Z24__device_stub__addKernel4dim3PjPm
.LBB2_4:
	movq	8(%rsp), %rsi
	leaq	48(%rsp), %r14
	movl	$8, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	%rbx, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movq	(%r14), %rax
	shlq	$2, %rax
	movq	%rax, %xmm0
	punpckldq	.LCPI2_1(%rip), %xmm0   # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
	subpd	.LCPI2_2(%rip), %xmm0
	movapd	%xmm0, %xmm1
	unpckhpd	%xmm0, %xmm1                    # xmm1 = xmm1[1],xmm0[1]
	addsd	%xmm0, %xmm1
	divsd	.LCPI2_3(%rip), %xmm1
	movapd	%xmm1, 32(%rsp)                 # 16-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$8, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$16000, %esi                    # imm = 0x3E80
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$16000, %esi                    # imm = 0x3E80
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.2, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$256000000, %esi                # imm = 0xF424000
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.3, %esi
	movl	$17, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movaps	32(%rsp), %xmm0                 # 16-byte Reload
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.4, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	movq	$3, 8(%rbx,%rax)
	movq	%rbx, %rdi
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.5, %esi
	movl	$8, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10flagKernelPj, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9addKernel4dim3PjPm, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10flagKernelPj,@object        # @_Z10flagKernelPj
	.section	.rodata,"a",@progbits
	.globl	_Z10flagKernelPj
	.p2align	3, 0x0
_Z10flagKernelPj:
	.quad	_Z25__device_stub__flagKernelPj
	.size	_Z10flagKernelPj, 8

	.type	_Z9addKernel4dim3PjPm,@object   # @_Z9addKernel4dim3PjPm
	.globl	_Z9addKernel4dim3PjPm
	.p2align	3, 0x0
_Z9addKernel4dim3PjPm:
	.quad	_Z24__device_stub__addKernel4dim3PjPm
	.size	_Z9addKernel4dim3PjPm, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Using a "
	.size	.L.str, 9

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"x"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" grid ("
	.size	.L.str.2, 8

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" samples), pi is "
	.size	.L.str.3, 18

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	" in "
	.size	.L.str.4, 5

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	" seconds"
	.size	.L.str.5, 9

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10flagKernelPj"
	.size	.L__unnamed_1, 17

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9addKernel4dim3PjPm"
	.size	.L__unnamed_2, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__flagKernelPj
	.addrsig_sym _Z24__device_stub__addKernel4dim3PjPm
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10flagKernelPj
	.addrsig_sym _Z9addKernel4dim3PjPm
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10flagKernelPj        ; -- Begin function _Z10flagKernelPj
	.globl	_Z10flagKernelPj
	.p2align	8
	.type	_Z10flagKernelPj,@function
_Z10flagKernelPj:                       ; @_Z10flagKernelPj
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x14
	s_load_b64 s[4:5], s[0:1], 0x8
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s6, s2, 0xffff
	s_lshr_b32 s3, s2, 16
	v_mad_u64_u32 v[2:3], null, s14, s6, v[1:2]
	v_mad_u64_u32 v[3:4], null, s15, s3, v[0:1]
	s_mul_i32 s2, s4, s6
	s_mul_i32 s5, s5, s3
	v_cvt_f32_u32_e32 v4, s2
	v_cvt_f32_u32_e32 v5, s5
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cvt_f32_u32_e32 v2, v2
	v_mad_u32_u24 v0, v0, s6, v1
	v_cvt_f32_u32_e32 v3, v3
	v_div_scale_f32 v6, null, v4, v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_scale_f32 v7, null, v5, v5, v3
	v_div_scale_f32 v12, vcc_lo, v2, v4, v2
	v_rcp_f32_e32 v8, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v9, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v10, -v6, v8, 1.0
	v_fma_f32 v11, -v7, v9, 1.0
	v_dual_fmac_f32 v8, v10, v8 :: v_dual_fmac_f32 v9, v11, v9
	v_div_scale_f32 v10, s2, v3, v5, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v11, v12, v8
	v_mul_f32_e32 v13, v10, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v14, -v6, v11, v12
	v_fma_f32 v15, -v7, v13, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v11, v14, v8
	v_fmac_f32_e32 v13, v15, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v6, -v6, v11, v12
	v_fma_f32 v7, -v7, v13, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v6, v6, v8, v11
	s_mov_b32 vcc_lo, s2
	s_mov_b32 s2, exec_lo
	v_div_fmas_f32 v7, v7, v9, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v2, v6, v4, v2
	v_div_fixup_f32 v3, v7, v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v3, v3, v3
	v_fmac_f32_e32 v3, v2, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ge_f32_e32 vcc_lo, 1.0, v3
	v_cndmask_b32_e64 v1, 0, 1, vcc_lo
	ds_store_b8 v0, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_4
; %bb.1:                                ; %.preheader
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
	s_mul_i32 s3, s3, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB0_3
; %bb.2:                                ; %.lr.ph
	v_mov_b32_e32 v1, 0
	ds_load_u8 v1, v1
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v1, s3, v1
.LBB0_3:                                ; %._crit_edge
	s_load_b64 s[0:1], s[0:1], 0x0
	s_mul_i32 s2, s4, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, s14
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[2:3], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	global_store_b32 v0, v1, s[0:1]
.LBB0_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10flagKernelPj
		.amdhsa_group_segment_fixed_size 256
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10flagKernelPj, .Lfunc_end0-_Z10flagKernelPj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 464
; NumSgprs: 18
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 256 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z9addKernel4dim3PjPm   ; -- Begin function _Z9addKernel4dim3PjPm
	.globl	_Z9addKernel4dim3PjPm
	.p2align	8
	.type	_Z9addKernel4dim3PjPm,@function
_Z9addKernel4dim3PjPm:                  ; @_Z9addKernel4dim3PjPm
; %bb.0:
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x0
	s_load_b128 s[0:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s6, s5, s4
	s_mov_b64 s[4:5], 0
.LBB1_1:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB1_3
; %bb.2:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_load_b32 s7, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s4, s4, s7
	s_addc_u32 s5, s5, 0
	s_add_i32 s6, s6, -1
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_branch .LBB1_1
.LBB1_3:                                ; %Flow20
	v_mov_b32_e32 v0, s4
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s5
	global_store_b64 v2, v[0:1], s[2:3]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9addKernel4dim3PjPm
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9addKernel4dim3PjPm, .Lfunc_end1-_Z9addKernel4dim3PjPm
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 108
; NumSgprs: 8
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 256
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10flagKernelPj
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10flagKernelPj.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           12
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9addKernel4dim3PjPm
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z9addKernel4dim3PjPm.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
