#include <algorithm>
#include <cstring>
#include <iostream>
#include <memory>
#include <utility>

constexpr auto block_size = 16;

bool almost_equal(float a, float b) {
  return a - b < 0.00001f || b - a < 0.00001f;
}

class Matrix;

void swap(Matrix &left, Matrix &right) noexcept;

struct Matrix {
  size_t row;
  size_t col;
  std::unique_ptr<float[]> elements;
  float *gpu_elements;
  float get(int row, int col) const {
    return *(elements.get() + row * this->col + col);
  }
  void set(int row, int col, float value) {
    *(elements.get() + row * this->col + col) = value;
  }
  ~Matrix() {
    if (gpu_elements)
      cudaFree(gpu_elements);
  }

  Matrix(size_t row, size_t col) : row(row), col(col) {
    elements = std::unique_ptr<float[]>(new float[row * col]);
  }

  Matrix(const Matrix &other)
      : row(other.row), col(other.col),
        elements(new float[other.row * other.col]), gpu_elements(nullptr) {
    std::memcpy(elements.get(), other.elements.get(),
                row * col * sizeof(float));
  }

  Matrix &operator=(const Matrix &other) {
    using std::swap;
    if (this == &other) {
      return *this;
    }
    Matrix mat(other);
    swap(*this, mat);
    return *this;
  }

  void swap(Matrix &other) noexcept {
    using std::swap;
    swap(row, other.row);
    swap(col, other.col);
    swap(elements, other.elements);
  }
};

void swap(Matrix &left, Matrix &right) noexcept { left.swap(right); }

void print_matrix(const Matrix &mat) {
  for (int i = 0; i < mat.row; ++i) {
    for (int j = 0; j < mat.col; ++j) {
      std::cout << mat.get(i, j) << ", ";
    }
    std::cout << std::endl;
  }
}

struct GPUMatrix {
  size_t row;
  size_t col;
  size_t pitch;
  float *elements;
  __device__ float get(int row_idx, int col_idx) const {
    float *row = reinterpret_cast<float *>(reinterpret_cast<char *>(elements) +
                                           row_idx * pitch);
    return row[col_idx];
  }
  __device__ void set(int row_idx, int col_idx, float value) {
    float *row = reinterpret_cast<float *>(reinterpret_cast<char *>(elements) +
                                           row_idx * pitch);
    row[col_idx] = value;
  }
};

GPUMatrix load_to_gpu(Matrix &matrix) {
  size_t pitch;
  cudaMallocPitch(&matrix.gpu_elements, &pitch, matrix.col * sizeof(float),
                  matrix.row);
  cudaMemcpy2D(matrix.gpu_elements, pitch, matrix.elements.get(),
               matrix.col * sizeof(float), matrix.col * sizeof(float),
               matrix.row, cudaMemcpyHostToDevice);
  return GPUMatrix{matrix.row, matrix.col, pitch, matrix.gpu_elements};
}

Matrix copy_to_host(GPUMatrix matrix) {
  Matrix new_matrix(matrix.row, matrix.col);
  cudaError_t err =
      cudaMemcpy2D(new_matrix.elements.get(), matrix.col * sizeof(float),
                   matrix.elements, matrix.pitch, matrix.col * sizeof(float),
                   matrix.row, cudaMemcpyDeviceToHost);
  std::cout << "cudaMemcpy2D done: " << cudaGetErrorString(err) << std::endl;
  return new_matrix;
}

__global__ void matrix_mul_strait(GPUMatrix mat0, GPUMatrix mat1,
                                  GPUMatrix result) {
  int row = blockDim.x * blockIdx.x + threadIdx.x;
  int col = blockDim.y * blockIdx.y + threadIdx.y;
  // target index: [row][col]

  float element = 0;
  for (int i = 0; i < mat0.col; ++i) {
    element += mat0.get(row, i) * mat1.get(i, col);
  }
  // printf("(%d, %d): %d\n", row, col, int(element));
  result.set(row, col, element);
}

__global__ void matrix_mul_shared(GPUMatrix mat0, GPUMatrix mat1,
                                  GPUMatrix result) {
  const int row_min = blockDim.x * blockIdx.x;

  const int col_min = blockDim.y * blockIdx.y;

  const int target_row = blockDim.x * blockIdx.x + threadIdx.x;
  const int target_col = blockDim.y * blockIdx.y + threadIdx.y;
  // assign matrix values in range
  // row: [row_min, row_max), col: [col_min, col_max)

  // iterate mat0.col / blockDim.x times.
  float c_value = 0.0f;
  for (int iter = 0, base = 0; iter < int(mat0.col / blockDim.y); ++iter, base += block_size) {
    __shared__ float mat0_submatrix[block_size][block_size];
    __shared__ float mat1_submatrix[block_size][block_size];

    mat0_submatrix[threadIdx.x][threadIdx.y] = mat0.get(
        row_min + threadIdx.x, base + threadIdx.y);
    mat1_submatrix[threadIdx.x][threadIdx.y] = mat1.get(
        base + threadIdx.x, col_min + threadIdx.y);

    __syncthreads();

    for (int i = 0; i < block_size; ++i) {
      c_value +=
          mat0_submatrix[threadIdx.x][i] * mat1_submatrix[i][threadIdx.y];
    }

    __syncthreads();
  }

  result.set(target_row, target_col, c_value);
}

int main() {
  Matrix host_matrix_A(64, 128);
  for (int i = 0; i < host_matrix_A.row; ++i) {
    for (int j = 0; j < host_matrix_A.col; ++j) {
      host_matrix_A.set(i, j, 1.0);
    }
  }
  Matrix host_matrix_B(128, 64);
  for (int i = 0; i < host_matrix_B.row; ++i) {
    for (int j = 0; j < host_matrix_B.col; ++j) {
      host_matrix_B.set(i, j, 1.0);
    }
  }

  Matrix host_matrix_C(64, 64);
  for (int i = 0; i < host_matrix_C.row; ++i) {
    for (int j = 0; j < host_matrix_C.col; ++j) {
      host_matrix_C.set(i, j, 0.0);
    }
  }

  GPUMatrix gpu_matrix_A = load_to_gpu(host_matrix_A);
  GPUMatrix gpu_matrix_B = load_to_gpu(host_matrix_B);
  GPUMatrix gpu_matrix_C = load_to_gpu(host_matrix_C);

  dim3 block_dim(16, 16);
  dim3 grid_dim(64 / 16, 64 / 16);
  matrix_mul_shared<<<grid_dim, block_dim>>>(gpu_matrix_A, gpu_matrix_B,
                                             gpu_matrix_C);

  host_matrix_C = copy_to_host(gpu_matrix_C);

  print_matrix(host_matrix_C);

  return 0;
}
	.file	"tmpxft_002c5e24_00000000-6_chap3-matmul.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4544:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4544:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z12almost_equalff
	.type	_Z12almost_equalff, @function
_Z12almost_equalff:
.LFB4509:
	.cfi_startproc
	endbr64
	movaps	%xmm0, %xmm3
	movss	.LC0(%rip), %xmm2
	movb	$1, %al
	subss	%xmm1, %xmm3
	comiss	%xmm3, %xmm2
	ja	.L2
	subss	%xmm0, %xmm1
	comiss	%xmm1, %xmm2
	seta	%al
.L2:
	ret
	.cfi_endproc
.LFE4509:
	.size	_Z12almost_equalff, .-_Z12almost_equalff
	.globl	_Z4swapR6MatrixS0_
	.type	_Z4swapR6MatrixS0_, @function
_Z4swapR6MatrixS0_:
.LFB4535:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movq	%rdx, (%rdi)
	movq	8(%rsi), %rdx
	movq	%rax, (%rsi)
	movq	8(%rdi), %rax
	movq	%rdx, 8(%rdi)
	movq	16(%rsi), %rdx
	movq	%rax, 8(%rsi)
	movq	16(%rdi), %rax
	movq	%rdx, 16(%rdi)
	movq	%rax, 16(%rsi)
	ret
	.cfi_endproc
.LFE4535:
	.size	_Z4swapR6MatrixS0_, .-_Z4swapR6MatrixS0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	", "
	.text
	.globl	_Z12print_matrixRK6Matrix
	.type	_Z12print_matrixRK6Matrix, @function
_Z12print_matrixRK6Matrix:
.LFB4536:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	leaq	_ZSt4cout(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L8:
	cmpq	(%rbx), %rbp
	jnb	.L13
	xorl	%r13d, %r13d
.L10:
	movq	8(%rbx), %rax
	cmpq	%rax, %r13
	jnb	.L14
	imulq	%rbp, %rax
	movq	16(%rbx), %rdx
	movq	%r12, %rdi
	addq	%r13, %rax
	incq	%r13
	cvtss2sd	(%rdx,%rax,4), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L10
.L14:
	movq	%r12, %rdi
	incq	%rbp
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	jmp	.L8
.L13:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4536:
	.size	_Z12print_matrixRK6Matrix, .-_Z12print_matrixRK6Matrix
	.globl	_Z11load_to_gpuR6Matrix
	.type	_Z11load_to_gpuR6Matrix, @function
_Z11load_to_gpuR6Matrix:
.LFB4539:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rsi, %rbx
	leaq	24(%rbx), %rdi
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movq	(%rbx), %rcx
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	movq	8(%rsi), %rax
	movq	%rsp, %rsi
	leaq	0(,%rax,4), %rdx
	call	cudaMallocPitch@PLT
	movq	8(%rbx), %rax
	movq	16(%rbx), %rdx
	movq	24(%rbx), %rdi
	leaq	0(,%rax,4), %rcx
	pushq	%rax
	.cfi_def_cfa_offset 56
	movq	(%rbx), %r9
	pushq	$1
	.cfi_def_cfa_offset 64
	movq	16(%rsp), %rsi
	movq	%rcx, %r8
	call	cudaMemcpy2D@PLT
	movq	(%rbx), %rax
	movq	%rax, 0(%rbp)
	movq	8(%rbx), %rax
	movq	%rax, 8(%rbp)
	movq	16(%rsp), %rax
	movq	%rax, 16(%rbp)
	movq	24(%rbx), %rax
	movq	%rax, 24(%rbp)
	popq	%rdx
	.cfi_def_cfa_offset 56
	popq	%rcx
	.cfi_def_cfa_offset 48
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	movq	%rbp, %rax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4539:
	.size	_Z11load_to_gpuR6Matrix, .-_Z11load_to_gpuR6Matrix
	.globl	_Z49__device_stub__Z17matrix_mul_strait9GPUMatrixS_S_R9GPUMatrixS0_S0_
	.type	_Z49__device_stub__Z17matrix_mul_strait9GPUMatrixS_S_R9GPUMatrixS0_S0_, @function
_Z49__device_stub__Z17matrix_mul_strait9GPUMatrixS_S_R9GPUMatrixS0_S0_:
.LFB4566:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rdi, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 72(%rsp)
	leaq	16(%rsp), %rdi
	leaq	28(%rsp), %rsi
	movq	%rdx, 80(%rsp)
	movq	%rsp, %rdx
	movq	%rax, 16(%rsp)
	movl	$1, 24(%rsp)
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	8(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z17matrix_mul_strait9GPUMatrixS_S_(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 128
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L18:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4566:
	.size	_Z49__device_stub__Z17matrix_mul_strait9GPUMatrixS_S_R9GPUMatrixS0_S0_, .-_Z49__device_stub__Z17matrix_mul_strait9GPUMatrixS_S_R9GPUMatrixS0_S0_
	.globl	_Z17matrix_mul_strait9GPUMatrixS_S_
	.type	_Z17matrix_mul_strait9GPUMatrixS_S_, @function
_Z17matrix_mul_strait9GPUMatrixS_S_:
.LFB4567:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	80(%rsp), %rdx
	leaq	48(%rsp), %rsi
	leaq	16(%rsp), %rdi
	call	_Z49__device_stub__Z17matrix_mul_strait9GPUMatrixS_S_R9GPUMatrixS0_S0_
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4567:
	.size	_Z17matrix_mul_strait9GPUMatrixS_S_, .-_Z17matrix_mul_strait9GPUMatrixS_S_
	.globl	_Z49__device_stub__Z17matrix_mul_shared9GPUMatrixS_S_R9GPUMatrixS0_S0_
	.type	_Z49__device_stub__Z17matrix_mul_shared9GPUMatrixS_S_R9GPUMatrixS0_S0_, @function
_Z49__device_stub__Z17matrix_mul_shared9GPUMatrixS_S_R9GPUMatrixS0_S0_:
.LFB4568:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rdi, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 72(%rsp)
	leaq	16(%rsp), %rdi
	leaq	28(%rsp), %rsi
	movq	%rdx, 80(%rsp)
	movq	%rsp, %rdx
	movq	%rax, 16(%rsp)
	movl	$1, 24(%rsp)
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	8(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z17matrix_mul_shared9GPUMatrixS_S_(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 128
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L24:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4568:
	.size	_Z49__device_stub__Z17matrix_mul_shared9GPUMatrixS_S_R9GPUMatrixS0_S0_, .-_Z49__device_stub__Z17matrix_mul_shared9GPUMatrixS_S_R9GPUMatrixS0_S0_
	.globl	_Z17matrix_mul_shared9GPUMatrixS_S_
	.type	_Z17matrix_mul_shared9GPUMatrixS_S_, @function
_Z17matrix_mul_shared9GPUMatrixS_S_:
.LFB4569:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	80(%rsp), %rdx
	leaq	48(%rsp), %rsi
	leaq	16(%rsp), %rdi
	call	_Z49__device_stub__Z17matrix_mul_shared9GPUMatrixS_S_R9GPUMatrixS0_S0_
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4569:
	.size	_Z17matrix_mul_shared9GPUMatrixS_S_, .-_Z17matrix_mul_shared9GPUMatrixS_S_
	.section	.rodata.str1.1
.LC2:
	.string	"_Z17matrix_mul_shared9GPUMatrixS_S_"
.LC3:
	.string	"_Z17matrix_mul_strait9GPUMatrixS_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4571:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z17matrix_mul_shared9GPUMatrixS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17matrix_mul_strait9GPUMatrixS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4571:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt10unique_ptrIA_fSt14default_deleteIS0_EED2Ev,"axG",@progbits,_ZNSt10unique_ptrIA_fSt14default_deleteIS0_EED5Ev,comdat
	.align 2
	.weak	_ZNSt10unique_ptrIA_fSt14default_deleteIS0_EED2Ev
	.type	_ZNSt10unique_ptrIA_fSt14default_deleteIS0_EED2Ev, @function
_ZNSt10unique_ptrIA_fSt14default_deleteIS0_EED2Ev:
.LFB4878:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rdi
	testq	%rdi, %rdi
	je	.L32
	jmp	_ZdaPv@PLT
.L32:
	ret
	.cfi_endproc
.LFE4878:
	.size	_ZNSt10unique_ptrIA_fSt14default_deleteIS0_EED2Ev, .-_ZNSt10unique_ptrIA_fSt14default_deleteIS0_EED2Ev
	.weak	_ZNSt10unique_ptrIA_fSt14default_deleteIS0_EED1Ev
	.set	_ZNSt10unique_ptrIA_fSt14default_deleteIS0_EED1Ev,_ZNSt10unique_ptrIA_fSt14default_deleteIS0_EED2Ev
	.section	.text._ZN6MatrixC2Emm,"axG",@progbits,_ZN6MatrixC5Emm,comdat
	.align 2
	.weak	_ZN6MatrixC2Emm
	.type	_ZN6MatrixC2Emm, @function
_ZN6MatrixC2Emm:
.LFB4526:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4526
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xorl	%ecx, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movq	%rsi, (%rdi)
	imulq	%rdx, %rsi
	movabsq	$2305843009213693950, %rax
	movq	%rdx, 8(%rdi)
	movq	%rcx, 16(%rdi)
	cmpq	%rsi, %rax
	jb	.L35
	leaq	0(,%rsi,4), %rdi
.LEHB0:
	call	_Znam@PLT
	movq	16(%rbx), %rdi
	xorl	%edx, %edx
	movq	%rax, 16(%rbx)
	movq	%rdx, (%rsp)
	testq	%rdi, %rdi
	je	.L38
	call	_ZdaPv@PLT
	jmp	.L38
.L35:
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L47
	call	__cxa_throw_bad_array_new_length@PLT
.LEHE0:
.L38:
	movq	%rsp, %rdi
	call	_ZNSt10unique_ptrIA_fSt14default_deleteIS0_EED1Ev
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L41
	jmp	.L47
.L42:
	endbr64
	movq	%rax, %rbp
.L39:
	leaq	16(%rbx), %rdi
	call	_ZNSt10unique_ptrIA_fSt14default_deleteIS0_EED1Ev
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L47
	movq	%rbp, %rdi
.LEHB1:
	call	_Unwind_Resume@PLT
.LEHE1:
.L47:
	call	__stack_chk_fail@PLT
.L41:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4526:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table._ZN6MatrixC2Emm,"aG",@progbits,_ZN6MatrixC5Emm,comdat
.LLSDA4526:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4526-.LLSDACSB4526
.LLSDACSB4526:
	.uleb128 .LEHB0-.LFB4526
	.uleb128 .LEHE0-.LEHB0
	.uleb128 .L42-.LFB4526
	.uleb128 0
	.uleb128 .LEHB1-.LFB4526
	.uleb128 .LEHE1-.LEHB1
	.uleb128 0
	.uleb128 0
.LLSDACSE4526:
	.section	.text._ZN6MatrixC2Emm,"axG",@progbits,_ZN6MatrixC5Emm,comdat
	.size	_ZN6MatrixC2Emm, .-_ZN6MatrixC2Emm
	.weak	_ZN6MatrixC1Emm
	.set	_ZN6MatrixC1Emm,_ZN6MatrixC2Emm
	.section	.text._ZN6MatrixD2Ev,"axG",@progbits,_ZN6MatrixD5Ev,comdat
	.align 2
	.weak	_ZN6MatrixD2Ev
	.type	_ZN6MatrixD2Ev, @function
_ZN6MatrixD2Ev:
.LFB4521:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4521
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	movq	24(%rdi), %rdi
	testq	%rdi, %rdi
	je	.L51
	call	cudaFree@PLT
.L51:
	leaq	16(%rbx), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSt10unique_ptrIA_fSt14default_deleteIS0_EED1Ev
	.cfi_endproc
.LFE4521:
	.section	.gcc_except_table._ZN6MatrixD2Ev,"aG",@progbits,_ZN6MatrixD5Ev,comdat
.LLSDA4521:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4521-.LLSDACSB4521
.LLSDACSB4521:
.LLSDACSE4521:
	.section	.text._ZN6MatrixD2Ev,"axG",@progbits,_ZN6MatrixD5Ev,comdat
	.size	_ZN6MatrixD2Ev, .-_ZN6MatrixD2Ev
	.weak	_ZN6MatrixD1Ev
	.set	_ZN6MatrixD1Ev,_ZN6MatrixD2Ev
	.section	.rodata.str1.1
.LC4:
	.string	"cudaMemcpy2D done: "
	.text
	.globl	_Z12copy_to_host9GPUMatrix
	.type	_Z12copy_to_host9GPUMatrix, @function
_Z12copy_to_host9GPUMatrix:
.LFB4540:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4540
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	.cfi_offset 14, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	subq	$24, %rsp
	movq	16(%rbp), %r9
	movq	24(%rbp), %r12
	movq	%r9, %rsi
	movq	%r12, %rdx
	movq	%r9, -40(%rbp)
.LEHB2:
	call	_ZN6MatrixC1Emm
.LEHE2:
	movq	16(%rbx), %rdi
	leaq	0(,%r12,4), %rsi
	pushq	%rcx
	movq	-40(%rbp), %r9
	movq	%rsi, %r8
	movq	32(%rbp), %rcx
	movq	40(%rbp), %rdx
	pushq	$2
.LEHB3:
	.cfi_escape 0x2e,0x10
	call	cudaMemcpy2D@PLT
	movl	%eax, %r12d
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	popq	%rax
	popq	%rdx
	.cfi_escape 0x2e,0
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %edi
	movq	%rax, %r14
	call	cudaGetErrorString@PLT
	movq	%rax, %rsi
	movq	%r14, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.LEHE3:
	leaq	-24(%rbp), %rsp
	movq	%rbx, %rax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%rbp
	.cfi_remember_state
	.cfi_def_cfa 7, 8
	ret
.L58:
	.cfi_restore_state
	endbr64
	movq	%rax, %r14
.L57:
	movq	%rbx, %rdi
	call	_ZN6MatrixD1Ev
	movq	%r14, %rdi
.LEHB4:
	call	_Unwind_Resume@PLT
.LEHE4:
	.cfi_endproc
.LFE4540:
	.section	.gcc_except_table,"a",@progbits
.LLSDA4540:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4540-.LLSDACSB4540
.LLSDACSB4540:
	.uleb128 .LEHB2-.LFB4540
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB3-.LFB4540
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L58-.LFB4540
	.uleb128 0
	.uleb128 .LEHB4-.LFB4540
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
.LLSDACSE4540:
	.text
	.size	_Z12copy_to_host9GPUMatrix, .-_Z12copy_to_host9GPUMatrix
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4541:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4541
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$128, %edx
	movl	$64, %esi
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$376, %rsp
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	leaq	-376(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -408(%rbp)
.LEHB5:
	call	_ZN6MatrixC1Emm
.LEHE5:
	movq	-368(%rbp), %rsi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	movq	-360(%rbp), %r8
	movl	-376(%rbp), %r9d
	movss	.LC5(%rip), %xmm0
.L62:
	cmpl	%r9d, %ecx
	je	.L64
	leaq	(%r8,%rdx,4), %rdi
	xorl	%eax, %eax
.L65:
	cmpq	%rax, %rsi
	je	.L92
	movss	%xmm0, (%rdi,%rax,4)
	incq	%rax
	jmp	.L65
.L92:
	incl	%ecx
	addq	%rsi, %rdx
	jmp	.L62
.L64:
	leaq	-344(%rbp), %r12
	movl	$64, %edx
	movl	$128, %esi
	movq	%r12, %rdi
.LEHB6:
	call	_ZN6MatrixC1Emm
.LEHE6:
	movq	-336(%rbp), %rsi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	movq	-328(%rbp), %r8
	movl	-344(%rbp), %r9d
	movss	.LC5(%rip), %xmm0
.L66:
	cmpl	%r9d, %ecx
	je	.L68
	leaq	(%r8,%rdx,4), %rdi
	xorl	%eax, %eax
.L69:
	cmpq	%rax, %rsi
	je	.L93
	movss	%xmm0, (%rdi,%rax,4)
	incq	%rax
	jmp	.L69
.L93:
	incl	%ecx
	addq	%rsi, %rdx
	jmp	.L66
.L68:
	leaq	-312(%rbp), %rbx
	movl	$64, %edx
	movl	$64, %esi
	movq	%rbx, %rdi
.LEHB7:
	call	_ZN6MatrixC1Emm
.LEHE7:
	movq	-304(%rbp), %rsi
	movq	-296(%rbp), %r8
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	movl	-312(%rbp), %r9d
.L70:
	cmpl	%r9d, %ecx
	je	.L72
	leaq	(%r8,%rdx,4), %rdi
	xorl	%eax, %eax
.L73:
	cmpq	%rax, %rsi
	je	.L94
	movl	$0x00000000, (%rdi,%rax,4)
	incq	%rax
	jmp	.L73
.L94:
	incl	%ecx
	addq	%rsi, %rdx
	jmp	.L70
.L72:
	movq	-408(%rbp), %rsi
	leaq	-280(%rbp), %rdi
.LEHB8:
	call	_Z11load_to_gpuR6Matrix
	leaq	-248(%rbp), %rdi
	movq	%r12, %rsi
	call	_Z11load_to_gpuR6Matrix
	leaq	-216(%rbp), %rdi
	movq	%rbx, %rsi
	call	_Z11load_to_gpuR6Matrix
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$68719476752, %rdx
	movabsq	$17179869188, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	leaq	-120(%rbp), %r13
	jne	.L74
	movups	-280(%rbp), %xmm1
	movups	-264(%rbp), %xmm2
	leaq	-152(%rbp), %rsi
	leaq	-184(%rbp), %rdi
	movups	-248(%rbp), %xmm3
	movups	-232(%rbp), %xmm4
	movq	%r13, %rdx
	movups	-216(%rbp), %xmm5
	movups	-200(%rbp), %xmm6
	movups	%xmm1, -184(%rbp)
	movups	%xmm2, -168(%rbp)
	movups	%xmm3, -152(%rbp)
	movups	%xmm4, -136(%rbp)
	movups	%xmm5, -120(%rbp)
	movups	%xmm6, -104(%rbp)
	call	_Z49__device_stub__Z17matrix_mul_shared9GPUMatrixS_S_R9GPUMatrixS0_S0_
.L74:
	movups	-216(%rbp), %xmm7
	subq	$32, %rsp
	movq	%r13, %rdi
	movups	%xmm7, (%rsp)
	movups	-200(%rbp), %xmm1
	movups	%xmm1, 16(%rsp)
	.cfi_escape 0x2e,0x20
	call	_Z12copy_to_host9GPUMatrix
.LEHE8:
	movq	-120(%rbp), %r15
	movq	-112(%rbp), %r14
	addq	$32, %rsp
	movabsq	$2305843009213693950, %rdx
	movq	%r15, %rax
	movq	%r15, -88(%rbp)
	imulq	%r14, %rax
	movq	%r14, -80(%rbp)
	cmpq	%rax, %rdx
	jb	.L75
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, -416(%rbp)
.LEHB9:
	.cfi_escape 0x2e,0
	call	_Znam@PLT
.LEHE9:
	movq	-416(%rbp), %rcx
	movq	-104(%rbp), %rsi
	movq	%rax, %rdi
	xorl	%eax, %eax
	movq	%rax, -64(%rbp)
	movq	%rcx, %rdx
	call	__memcpy_chk@PLT
	movq	%rax, %rdi
	movq	-312(%rbp), %rax
	movq	%r15, -312(%rbp)
	movq	%rax, -88(%rbp)
	movq	-304(%rbp), %rax
	movq	%r14, -304(%rbp)
	movq	%rax, -80(%rbp)
	movq	-296(%rbp), %rax
	movq	%rdi, -296(%rbp)
	leaq	-88(%rbp), %rdi
	movq	%rax, -72(%rbp)
	call	_ZN6MatrixD1Ev
	movq	%r13, %rdi
	call	_ZN6MatrixD1Ev
	movq	%rbx, %rdi
.LEHB10:
	call	_Z12print_matrixRK6Matrix
.LEHE10:
	jmp	.L95
.L75:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L89
.LEHB11:
	call	__cxa_throw_bad_array_new_length@PLT
.LEHE11:
.L95:
	movq	%rbx, %rdi
	call	_ZN6MatrixD1Ev
	movq	%r12, %rdi
	call	_ZN6MatrixD1Ev
	movq	-408(%rbp), %rdi
	call	_ZN6MatrixD1Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L83
	jmp	.L89
.L87:
	endbr64
	movq	%rax, %r14
.L78:
	movq	%r13, %rdi
	call	_ZN6MatrixD1Ev
	jmp	.L79
.L86:
	endbr64
	movq	%rax, %r14
.L79:
	movq	%rbx, %rdi
	movq	%r14, %rbx
	call	_ZN6MatrixD1Ev
	jmp	.L80
.L85:
	endbr64
	movq	%rax, %rbx
.L80:
	movq	%r12, %rdi
	call	_ZN6MatrixD1Ev
	jmp	.L81
.L84:
	endbr64
	movq	%rax, %rbx
.L81:
	movq	-408(%rbp), %rdi
	call	_ZN6MatrixD1Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L89
	movq	%rbx, %rdi
.LEHB12:
	call	_Unwind_Resume@PLT
.LEHE12:
.L89:
	call	__stack_chk_fail@PLT
.L83:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4541:
	.section	.gcc_except_table
.LLSDA4541:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4541-.LLSDACSB4541
.LLSDACSB4541:
	.uleb128 .LEHB5-.LFB4541
	.uleb128 .LEHE5-.LEHB5
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB6-.LFB4541
	.uleb128 .LEHE6-.LEHB6
	.uleb128 .L84-.LFB4541
	.uleb128 0
	.uleb128 .LEHB7-.LFB4541
	.uleb128 .LEHE7-.LEHB7
	.uleb128 .L85-.LFB4541
	.uleb128 0
	.uleb128 .LEHB8-.LFB4541
	.uleb128 .LEHE8-.LEHB8
	.uleb128 .L86-.LFB4541
	.uleb128 0
	.uleb128 .LEHB9-.LFB4541
	.uleb128 .LEHE9-.LEHB9
	.uleb128 .L87-.LFB4541
	.uleb128 0
	.uleb128 .LEHB10-.LFB4541
	.uleb128 .LEHE10-.LEHB10
	.uleb128 .L86-.LFB4541
	.uleb128 0
	.uleb128 .LEHB11-.LFB4541
	.uleb128 .LEHE11-.LEHB11
	.uleb128 .L87-.LFB4541
	.uleb128 0
	.uleb128 .LEHB12-.LFB4541
	.uleb128 .LEHE12-.LEHB12
	.uleb128 0
	.uleb128 0
.LLSDACSE4541:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	925353388
	.align 4
.LC5:
	.long	1065353216
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <algorithm>
#include <cstring>
#include <iostream>
#include <memory>
#include <utility>

constexpr auto block_size = 16;

bool almost_equal(float a, float b) {
  return a - b < 0.00001f || b - a < 0.00001f;
}

class Matrix;

void swap(Matrix &left, Matrix &right) noexcept;

struct Matrix {
  size_t row;
  size_t col;
  std::unique_ptr<float[]> elements;
  float *gpu_elements;
  float get(int row, int col) const {
    return *(elements.get() + row * this->col + col);
  }
  void set(int row, int col, float value) {
    *(elements.get() + row * this->col + col) = value;
  }
  ~Matrix() {
    if (gpu_elements)
      hipFree(gpu_elements);
  }

  Matrix(size_t row, size_t col) : row(row), col(col) {
    elements = std::unique_ptr<float[]>(new float[row * col]);
  }

  Matrix(const Matrix &other)
      : row(other.row), col(other.col),
        elements(new float[other.row * other.col]), gpu_elements(nullptr) {
    std::memcpy(elements.get(), other.elements.get(),
                row * col * sizeof(float));
  }

  Matrix &operator=(const Matrix &other) {
    using std::swap;
    if (this == &other) {
      return *this;
    }
    Matrix mat(other);
    swap(*this, mat);
    return *this;
  }

  void swap(Matrix &other) noexcept {
    using std::swap;
    swap(row, other.row);
    swap(col, other.col);
    swap(elements, other.elements);
  }
};

void swap(Matrix &left, Matrix &right) noexcept { left.swap(right); }

void print_matrix(const Matrix &mat) {
  for (int i = 0; i < mat.row; ++i) {
    for (int j = 0; j < mat.col; ++j) {
      std::cout << mat.get(i, j) << ", ";
    }
    std::cout << std::endl;
  }
}

struct GPUMatrix {
  size_t row;
  size_t col;
  size_t pitch;
  float *elements;
  __device__ float get(int row_idx, int col_idx) const {
    float *row = reinterpret_cast<float *>(reinterpret_cast<char *>(elements) +
                                           row_idx * pitch);
    return row[col_idx];
  }
  __device__ void set(int row_idx, int col_idx, float value) {
    float *row = reinterpret_cast<float *>(reinterpret_cast<char *>(elements) +
                                           row_idx * pitch);
    row[col_idx] = value;
  }
};

GPUMatrix load_to_gpu(Matrix &matrix) {
  size_t pitch;
  hipMallocPitch(&matrix.gpu_elements, &pitch, matrix.col * sizeof(float),
                  matrix.row);
  hipMemcpy2D(matrix.gpu_elements, pitch, matrix.elements.get(),
               matrix.col * sizeof(float), matrix.col * sizeof(float),
               matrix.row, hipMemcpyHostToDevice);
  return GPUMatrix{matrix.row, matrix.col, pitch, matrix.gpu_elements};
}

Matrix copy_to_host(GPUMatrix matrix) {
  Matrix new_matrix(matrix.row, matrix.col);
  hipError_t err =
      hipMemcpy2D(new_matrix.elements.get(), matrix.col * sizeof(float),
                   matrix.elements, matrix.pitch, matrix.col * sizeof(float),
                   matrix.row, hipMemcpyDeviceToHost);
  std::cout << "hipMemcpy2D done: " << hipGetErrorString(err) << std::endl;
  return new_matrix;
}

__global__ void matrix_mul_strait(GPUMatrix mat0, GPUMatrix mat1,
                                  GPUMatrix result) {
  int row = blockDim.x * blockIdx.x + threadIdx.x;
  int col = blockDim.y * blockIdx.y + threadIdx.y;
  // target index: [row][col]

  float element = 0;
  for (int i = 0; i < mat0.col; ++i) {
    element += mat0.get(row, i) * mat1.get(i, col);
  }
  // printf("(%d, %d): %d\n", row, col, int(element));
  result.set(row, col, element);
}

__global__ void matrix_mul_shared(GPUMatrix mat0, GPUMatrix mat1,
                                  GPUMatrix result) {
  const int row_min = blockDim.x * blockIdx.x;

  const int col_min = blockDim.y * blockIdx.y;

  const int target_row = blockDim.x * blockIdx.x + threadIdx.x;
  const int target_col = blockDim.y * blockIdx.y + threadIdx.y;
  // assign matrix values in range
  // row: [row_min, row_max), col: [col_min, col_max)

  // iterate mat0.col / blockDim.x times.
  float c_value = 0.0f;
  for (int iter = 0, base = 0; iter < int(mat0.col / blockDim.y); ++iter, base += block_size) {
    __shared__ float mat0_submatrix[block_size][block_size];
    __shared__ float mat1_submatrix[block_size][block_size];

    mat0_submatrix[threadIdx.x][threadIdx.y] = mat0.get(
        row_min + threadIdx.x, base + threadIdx.y);
    mat1_submatrix[threadIdx.x][threadIdx.y] = mat1.get(
        base + threadIdx.x, col_min + threadIdx.y);

    __syncthreads();

    for (int i = 0; i < block_size; ++i) {
      c_value +=
          mat0_submatrix[threadIdx.x][i] * mat1_submatrix[i][threadIdx.y];
    }

    __syncthreads();
  }

  result.set(target_row, target_col, c_value);
}

int main() {
  Matrix host_matrix_A(64, 128);
  for (int i = 0; i < host_matrix_A.row; ++i) {
    for (int j = 0; j < host_matrix_A.col; ++j) {
      host_matrix_A.set(i, j, 1.0);
    }
  }
  Matrix host_matrix_B(128, 64);
  for (int i = 0; i < host_matrix_B.row; ++i) {
    for (int j = 0; j < host_matrix_B.col; ++j) {
      host_matrix_B.set(i, j, 1.0);
    }
  }

  Matrix host_matrix_C(64, 64);
  for (int i = 0; i < host_matrix_C.row; ++i) {
    for (int j = 0; j < host_matrix_C.col; ++j) {
      host_matrix_C.set(i, j, 0.0);
    }
  }

  GPUMatrix gpu_matrix_A = load_to_gpu(host_matrix_A);
  GPUMatrix gpu_matrix_B = load_to_gpu(host_matrix_B);
  GPUMatrix gpu_matrix_C = load_to_gpu(host_matrix_C);

  dim3 block_dim(16, 16);
  dim3 grid_dim(64 / 16, 64 / 16);
  matrix_mul_shared<<<grid_dim, block_dim>>>(gpu_matrix_A, gpu_matrix_B,
                                             gpu_matrix_C);

  host_matrix_C = copy_to_host(gpu_matrix_C);

  print_matrix(host_matrix_C);

  return 0;
}
	.text
	.file	"chap3-matmul.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z12almost_equalff
.LCPI0_0:
	.long	0x3727c5ac                      # float 9.99999974E-6
	.text
	.globl	_Z12almost_equalff
	.type	_Z12almost_equalff,@function
_Z12almost_equalff:                     # @_Z12almost_equalff
	.cfi_startproc
# %bb.0:
	movaps	%xmm0, %xmm2
	subss	%xmm1, %xmm2
	subss	%xmm0, %xmm1
	movss	.LCPI0_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	cmpltps	%xmm0, %xmm1
	cmpltps	%xmm0, %xmm2
	orps	%xmm1, %xmm2
	movd	%xmm2, %eax
	andb	$1, %al
                                        # kill: def $al killed $al killed $eax
	retq
.Lfunc_end0:
	.size	_Z12almost_equalff, .Lfunc_end0-_Z12almost_equalff
	.cfi_endproc
                                        # -- End function
	.globl	_Z4swapR6MatrixS0_              # -- Begin function _Z4swapR6MatrixS0_
	.type	_Z4swapR6MatrixS0_,@function
_Z4swapR6MatrixS0_:                     # @_Z4swapR6MatrixS0_
	.cfi_startproc
# %bb.0:
	movq	(%rdi), %rax
	movq	(%rsi), %rcx
	movq	%rcx, (%rdi)
	movq	%rax, (%rsi)
	movq	8(%rdi), %rax
	movq	8(%rsi), %rcx
	movq	%rcx, 8(%rdi)
	movq	%rax, 8(%rsi)
	movq	16(%rdi), %rax
	movq	16(%rsi), %rcx
	movq	%rcx, 16(%rdi)
	movq	%rax, 16(%rsi)
	retq
.Lfunc_end1:
	.size	_Z4swapR6MatrixS0_, .Lfunc_end1-_Z4swapR6MatrixS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z12print_matrixRK6Matrix       # -- Begin function _Z12print_matrixRK6Matrix
	.type	_Z12print_matrixRK6Matrix,@function
_Z12print_matrixRK6Matrix:              # @_Z12print_matrixRK6Matrix
	.cfi_startproc
# %bb.0:
	cmpq	$0, (%rdi)
	je	.LBB2_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
	movl	$_ZSt4cout, %r15d
	xorl	%r12d, %r12d
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	movq	8(%rbx), %rax
	testq	%rax, %rax
	je	.LBB2_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_2 Depth=1
	xorl	%r13d, %r13d
.LBB2_4:                                # %.lr.ph
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imulq	%r14, %rax
	addq	16(%rbx), %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%r13,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r13
	movq	8(%rbx), %rax
	cmpq	%r13, %rax
	ja	.LBB2_4
.LBB2_5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r12
	addq	$4, %r14
	cmpq	%r12, (%rbx)
	ja	.LBB2_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
.LBB2_7:                                # %._crit_edge11
	retq
.Lfunc_end2:
	.size	_Z12print_matrixRK6Matrix, .Lfunc_end2-_Z12print_matrixRK6Matrix
	.cfi_endproc
                                        # -- End function
	.globl	_Z11load_to_gpuR6Matrix         # -- Begin function _Z11load_to_gpuR6Matrix
	.type	_Z11load_to_gpuR6Matrix,@function
_Z11load_to_gpuR6Matrix:                # @_Z11load_to_gpuR6Matrix
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r14
	movq	%rdi, %rbx
	leaq	24(%rsi), %rdi
	movq	(%rsi), %rcx
	movq	8(%rsi), %rdx
	shlq	$2, %rdx
	leaq	8(%rsp), %r15
	movq	%r15, %rsi
	callq	hipMallocPitch
	movq	24(%r14), %rdi
	movq	(%r15), %rsi
	movq	16(%r14), %rdx
	movq	(%r14), %r9
	movq	8(%r14), %rcx
	shlq	$2, %rcx
	movl	$1, (%rsp)
	movq	%rcx, %r8
	callq	hipMemcpy2D
	movq	(%r14), %rax
	movq	%rax, (%rbx)
	movq	8(%r14), %rax
	movq	%rax, 8(%rbx)
	movq	(%r15), %rax
	movq	%rax, 16(%rbx)
	movq	24(%r14), %rax
	movq	%rax, 24(%rbx)
	movq	%rbx, %rax
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z11load_to_gpuR6Matrix, .Lfunc_end3-_Z11load_to_gpuR6Matrix
	.cfi_endproc
                                        # -- End function
	.globl	_Z12copy_to_host9GPUMatrix      # -- Begin function _Z12copy_to_host9GPUMatrix
	.type	_Z12copy_to_host9GPUMatrix,@function
_Z12copy_to_host9GPUMatrix:             # @_Z12copy_to_host9GPUMatrix
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	movq	48(%rsp), %r14
	movq	56(%rsp), %r15
	movq	%r14, (%rdi)
	movq	%r15, 8(%rdi)
	movq	%r15, %rax
	imulq	%r14, %rax
	movq	%rax, %rcx
	shrq	$62, %rcx
	shlq	$2, %rax
	xorl	%edi, %edi
	negq	%rcx
	sbbq	%rdi, %rdi
	orq	%rax, %rdi
.Ltmp0:
	callq	_Znam
.Ltmp1:
# %bb.1:                                # %_ZN6MatrixC2Emm.exit
	leaq	48(%rsp), %rdx
	movq	%rax, 16(%rbx)
	shlq	$2, %r15
	movq	16(%rdx), %rcx
	movq	24(%rdx), %rdx
.Ltmp3:
	movl	$2, (%rsp)
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r15, %r8
	movq	%r14, %r9
	callq	hipMemcpy2D
.Ltmp4:
# %bb.2:
.Ltmp5:
	movl	%eax, %ebp
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$18, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp6:
# %bb.3:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
.Ltmp7:
	movl	%ebp, %edi
	callq	hipGetErrorString
.Ltmp8:
# %bb.4:
	movq	%rax, %r14
	testq	%rax, %rax
	je	.LBB4_5
# %bb.8:
	movq	%r14, %rdi
	callq	strlen
.Ltmp9:
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp10:
	jmp	.LBB4_9
.LBB4_5:
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cout(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
.Ltmp11:
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.Ltmp12:
.LBB4_9:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit4
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %edi
	addq	-24(%rax), %rdi
.Ltmp13:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp14:
# %bb.10:                               # %.noexc6
.Ltmp15:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp16:
# %bb.11:                               # %.noexc7
.Ltmp17:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp18:
# %bb.12:                               # %_ZNSolsEPFRSoS_E.exit
	movq	%rbx, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_6:                                # %_ZNSt10unique_ptrIA_fSt14default_deleteIS0_EED2Ev.exit8.i
	.cfi_def_cfa_offset 48
.Ltmp2:
	movq	%rax, %r14
	movq	$0, 16(%rbx)
	jmp	.LBB4_7
.LBB4_13:
.Ltmp19:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_ZN6MatrixD2Ev
.LBB4_7:                                # %common.resume
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end4:
	.size	_Z12copy_to_host9GPUMatrix, .Lfunc_end4-_Z12copy_to_host9GPUMatrix
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table4:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 1 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp18-.Ltmp3                 #   Call between .Ltmp3 and .Ltmp18
	.uleb128 .Ltmp19-.Lfunc_begin0          #     jumps to .Ltmp19
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp18-.Lfunc_begin0          # >> Call Site 3 <<
	.uleb128 .Lfunc_end4-.Ltmp18            #   Call between .Ltmp18 and .Lfunc_end4
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6MatrixD2Ev,"axG",@progbits,_ZN6MatrixD2Ev,comdat
	.weak	_ZN6MatrixD2Ev                  # -- Begin function _ZN6MatrixD2Ev
	.p2align	1, 0x90
	.type	_ZN6MatrixD2Ev,@function
_ZN6MatrixD2Ev:                         # @_ZN6MatrixD2Ev
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	24(%rdi), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
.Ltmp20:
	callq	hipFree
.Ltmp21:
.LBB5_2:
	movq	16(%rbx), %rdi
	testq	%rdi, %rdi
	je	.LBB5_4
# %bb.3:                                # %_ZNKSt14default_deleteIA_fEclIfEENSt9enable_ifIXsr14is_convertibleIPA_T_PS0_EE5valueEvE4typeEPS4_.exit.i
	callq	_ZdaPv
.LBB5_4:                                # %_ZNSt10unique_ptrIA_fSt14default_deleteIS0_EED2Ev.exit
	movq	$0, 16(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB5_5:
	.cfi_def_cfa_offset 16
.Ltmp22:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end5:
	.size	_ZN6MatrixD2Ev, .Lfunc_end5-_ZN6MatrixD2Ev
	.cfi_endproc
	.section	.gcc_except_table._ZN6MatrixD2Ev,"aG",@progbits,_ZN6MatrixD2Ev,comdat
	.p2align	2, 0x0
GCC_except_table5:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Ltmp20-.Lfunc_begin1          # >> Call Site 1 <<
	.uleb128 .Ltmp21-.Ltmp20                #   Call between .Ltmp20 and .Ltmp21
	.uleb128 .Ltmp22-.Lfunc_begin1          #     jumps to .Ltmp22
	.byte	1                               #   On action: 1
.Lcst_end1:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	_Z32__device_stub__matrix_mul_strait9GPUMatrixS_S_ # -- Begin function _Z32__device_stub__matrix_mul_strait9GPUMatrixS_S_
	.type	_Z32__device_stub__matrix_mul_strait9GPUMatrixS_S_,@function
_Z32__device_stub__matrix_mul_strait9GPUMatrixS_S_: # @_Z32__device_stub__matrix_mul_strait9GPUMatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	128(%rsp), %rax
	leaq	48(%rsp), %rbx
	movq	%rax, (%rbx)
	leaq	160(%rsp), %rax
	movq	%rax, 8(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 16(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17matrix_mul_strait9GPUMatrixS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z32__device_stub__matrix_mul_strait9GPUMatrixS_S_, .Lfunc_end6-_Z32__device_stub__matrix_mul_strait9GPUMatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__matrix_mul_shared9GPUMatrixS_S_ # -- Begin function _Z32__device_stub__matrix_mul_shared9GPUMatrixS_S_
	.type	_Z32__device_stub__matrix_mul_shared9GPUMatrixS_S_,@function
_Z32__device_stub__matrix_mul_shared9GPUMatrixS_S_: # @_Z32__device_stub__matrix_mul_shared9GPUMatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	128(%rsp), %rax
	leaq	48(%rsp), %rbx
	movq	%rax, (%rbx)
	leaq	160(%rsp), %rax
	movq	%rax, 8(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 16(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17matrix_mul_shared9GPUMatrixS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z32__device_stub__matrix_mul_shared9GPUMatrixS_S_, .Lfunc_end7-_Z32__device_stub__matrix_mul_shared9GPUMatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin2:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception2
# %bb.0:                                # %_ZN6MatrixC2Emm.exit
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$400, %rsp                      # imm = 0x190
	.cfi_def_cfa_offset 416
	.cfi_offset %rbx, -16
	movq	$64, 144(%rsp)
	movq	$128, 152(%rsp)
	movl	$32768, %edi                    # imm = 0x8000
	callq	_Znam
	movq	%rax, 160(%rsp)
	xorl	%ecx, %ecx
.LBB8_1:                                # %.preheader57
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_2 Depth 2
	xorl	%edx, %edx
.LBB8_2:                                #   Parent Loop BB8_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1065353216, (%rax,%rdx,4)      # imm = 0x3F800000
	incq	%rdx
	cmpq	$128, %rdx
	jne	.LBB8_2
# %bb.3:                                #   in Loop: Header=BB8_1 Depth=1
	incq	%rcx
	addq	$512, %rax                      # imm = 0x200
	cmpq	$64, %rcx
	jne	.LBB8_1
# %bb.4:
	movq	$128, 112(%rsp)
	movq	$64, 120(%rsp)
.Ltmp23:
	movl	$32768, %edi                    # imm = 0x8000
	callq	_Znam
.Ltmp24:
# %bb.5:                                # %_ZN6MatrixC2Emm.exit48
	movq	%rax, 128(%rsp)
	xorl	%ecx, %ecx
.LBB8_6:                                # %.preheader56
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_7 Depth 2
	xorl	%edx, %edx
.LBB8_7:                                #   Parent Loop BB8_6 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1065353216, (%rax,%rdx,4)      # imm = 0x3F800000
	incq	%rdx
	cmpq	$64, %rdx
	jne	.LBB8_7
# %bb.8:                                #   in Loop: Header=BB8_6 Depth=1
	incq	%rcx
	addq	$256, %rax                      # imm = 0x100
	cmpq	$128, %rcx
	jne	.LBB8_6
# %bb.9:
	movl	$64, %eax
	movq	%rax, 32(%rsp)
	movq	%rax, 40(%rsp)
.Ltmp26:
	movl	$16384, %edi                    # imm = 0x4000
	callq	_Znam
.Ltmp27:
# %bb.10:                               # %_ZN6MatrixC2Emm.exit52
	movq	%rax, 48(%rsp)
	movl	$16384, %edx                    # imm = 0x4000
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.Ltmp29:
	leaq	304(%rsp), %rdi
	leaq	144(%rsp), %rsi
	callq	_Z11load_to_gpuR6Matrix
.Ltmp30:
# %bb.11:
.Ltmp32:
	leaq	272(%rsp), %rdi
	leaq	112(%rsp), %rsi
	callq	_Z11load_to_gpuR6Matrix
.Ltmp33:
# %bb.12:
.Ltmp35:
	leaq	240(%rsp), %rdi
	leaq	32(%rsp), %rsi
	callq	_Z11load_to_gpuR6Matrix
.Ltmp36:
# %bb.13:
.Ltmp38:
	movabsq	$17179869188, %rdi              # imm = 0x400000004
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp39:
# %bb.14:
	testl	%eax, %eax
	jne	.LBB8_17
# %bb.15:
	movups	304(%rsp), %xmm0
	movups	320(%rsp), %xmm1
	leaq	336(%rsp), %rax
	movaps	%xmm1, 16(%rax)
	movaps	%xmm0, (%rax)
	movups	272(%rsp), %xmm0
	movups	288(%rsp), %xmm1
	leaq	368(%rsp), %rcx
	movaps	%xmm1, 16(%rcx)
	movaps	%xmm0, (%rcx)
	movups	240(%rsp), %xmm0
	movups	256(%rsp), %xmm1
	leaq	208(%rsp), %rdx
	movaps	%xmm1, 16(%rdx)
	movaps	%xmm0, (%rdx)
	movq	%rax, 176(%rsp)
	movq	%rcx, 184(%rsp)
	movq	%rdx, 192(%rsp)
.Ltmp40:
	leaq	96(%rsp), %rdi
	leaq	80(%rsp), %rsi
	leaq	72(%rsp), %rdx
	leaq	64(%rsp), %rcx
	callq	__hipPopCallConfiguration
.Ltmp41:
# %bb.16:                               # %.noexc
	movq	72(%rsp), %rax
	movq	64(%rsp), %rdi
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	movq	80(%rsp), %rcx
	movl	88(%rsp), %r8d
.Ltmp42:
	movq	%rdi, 8(%rsp)
	movq	%rax, (%rsp)
	leaq	176(%rsp), %r9
	movl	$_Z17matrix_mul_shared9GPUMatrixS_S_, %edi
	callq	hipLaunchKernel
.Ltmp43:
.LBB8_17:
.Ltmp44:
	movups	240(%rsp), %xmm0
	movups	256(%rsp), %xmm1
	movups	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	leaq	208(%rsp), %rdi
	callq	_Z12copy_to_host9GPUMatrix
.Ltmp45:
# %bb.18:
.Ltmp47:
	leaq	32(%rsp), %rdi
	leaq	208(%rsp), %rsi
	callq	_ZN6MatrixaSERKS_
.Ltmp48:
# %bb.19:
	leaq	208(%rsp), %rdi
	callq	_ZN6MatrixD2Ev
.Ltmp50:
	leaq	32(%rsp), %rdi
	callq	_Z12print_matrixRK6Matrix
.Ltmp51:
# %bb.20:
	leaq	32(%rsp), %rdi
	callq	_ZN6MatrixD2Ev
	leaq	112(%rsp), %rdi
	callq	_ZN6MatrixD2Ev
	leaq	144(%rsp), %rdi
	callq	_ZN6MatrixD2Ev
	xorl	%eax, %eax
	addq	$400, %rsp                      # imm = 0x190
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB8_21:
	.cfi_def_cfa_offset 416
.Ltmp49:
	movq	%rax, %rbx
	leaq	208(%rsp), %rdi
	callq	_ZN6MatrixD2Ev
	jmp	.LBB8_30
.LBB8_22:
.Ltmp46:
	jmp	.LBB8_29
.LBB8_23:
.Ltmp37:
	jmp	.LBB8_29
.LBB8_24:
.Ltmp34:
	jmp	.LBB8_29
.LBB8_25:
.Ltmp31:
	jmp	.LBB8_29
.LBB8_26:                               # %_ZNSt10unique_ptrIA_fSt14default_deleteIS0_EED2Ev.exit8.i49
.Ltmp28:
	movq	%rax, %rbx
	jmp	.LBB8_31
.LBB8_27:                               # %_ZNSt10unique_ptrIA_fSt14default_deleteIS0_EED2Ev.exit8.i47
.Ltmp25:
	movq	%rax, %rbx
	jmp	.LBB8_32
.LBB8_28:
.Ltmp52:
.LBB8_29:
	movq	%rax, %rbx
.LBB8_30:
	leaq	32(%rsp), %rdi
	callq	_ZN6MatrixD2Ev
.LBB8_31:                               # %.body50
	leaq	112(%rsp), %rdi
	callq	_ZN6MatrixD2Ev
.LBB8_32:                               # %.body
	leaq	144(%rsp), %rdi
	callq	_ZN6MatrixD2Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end8:
	.size	main, .Lfunc_end8-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table8:
.Lexception2:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end2-.Lcst_begin2
.Lcst_begin2:
	.uleb128 .Lfunc_begin2-.Lfunc_begin2    # >> Call Site 1 <<
	.uleb128 .Ltmp23-.Lfunc_begin2          #   Call between .Lfunc_begin2 and .Ltmp23
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp23-.Lfunc_begin2          # >> Call Site 2 <<
	.uleb128 .Ltmp24-.Ltmp23                #   Call between .Ltmp23 and .Ltmp24
	.uleb128 .Ltmp25-.Lfunc_begin2          #     jumps to .Ltmp25
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp26-.Lfunc_begin2          # >> Call Site 3 <<
	.uleb128 .Ltmp27-.Ltmp26                #   Call between .Ltmp26 and .Ltmp27
	.uleb128 .Ltmp28-.Lfunc_begin2          #     jumps to .Ltmp28
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp27-.Lfunc_begin2          # >> Call Site 4 <<
	.uleb128 .Ltmp29-.Ltmp27                #   Call between .Ltmp27 and .Ltmp29
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp29-.Lfunc_begin2          # >> Call Site 5 <<
	.uleb128 .Ltmp30-.Ltmp29                #   Call between .Ltmp29 and .Ltmp30
	.uleb128 .Ltmp31-.Lfunc_begin2          #     jumps to .Ltmp31
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp32-.Lfunc_begin2          # >> Call Site 6 <<
	.uleb128 .Ltmp33-.Ltmp32                #   Call between .Ltmp32 and .Ltmp33
	.uleb128 .Ltmp34-.Lfunc_begin2          #     jumps to .Ltmp34
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp35-.Lfunc_begin2          # >> Call Site 7 <<
	.uleb128 .Ltmp36-.Ltmp35                #   Call between .Ltmp35 and .Ltmp36
	.uleb128 .Ltmp37-.Lfunc_begin2          #     jumps to .Ltmp37
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp38-.Lfunc_begin2          # >> Call Site 8 <<
	.uleb128 .Ltmp43-.Ltmp38                #   Call between .Ltmp38 and .Ltmp43
	.uleb128 .Ltmp52-.Lfunc_begin2          #     jumps to .Ltmp52
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp44-.Lfunc_begin2          # >> Call Site 9 <<
	.uleb128 .Ltmp45-.Ltmp44                #   Call between .Ltmp44 and .Ltmp45
	.uleb128 .Ltmp46-.Lfunc_begin2          #     jumps to .Ltmp46
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp47-.Lfunc_begin2          # >> Call Site 10 <<
	.uleb128 .Ltmp48-.Ltmp47                #   Call between .Ltmp47 and .Ltmp48
	.uleb128 .Ltmp49-.Lfunc_begin2          #     jumps to .Ltmp49
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp50-.Lfunc_begin2          # >> Call Site 11 <<
	.uleb128 .Ltmp51-.Ltmp50                #   Call between .Ltmp50 and .Ltmp51
	.uleb128 .Ltmp52-.Lfunc_begin2          #     jumps to .Ltmp52
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp51-.Lfunc_begin2          # >> Call Site 12 <<
	.uleb128 .Lfunc_end8-.Ltmp51            #   Call between .Ltmp51 and .Lfunc_end8
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end2:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6MatrixaSERKS_,"axG",@progbits,_ZN6MatrixaSERKS_,comdat
	.weak	_ZN6MatrixaSERKS_               # -- Begin function _ZN6MatrixaSERKS_
	.p2align	1, 0x90
	.type	_ZN6MatrixaSERKS_,@function
_ZN6MatrixaSERKS_:                      # @_ZN6MatrixaSERKS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	cmpq	%rsi, %rdi
	je	.LBB9_2
# %bb.1:
	movq	%rsi, %r14
	movq	(%rsi), %rbp
	movq	8(%rsi), %r15
	movq	%r15, (%rsp)                    # 8-byte Spill
	imulq	%rbp, %r15
	movq	%r15, %rax
	shrq	$62, %rax
	shlq	$2, %r15
	xorl	%edi, %edi
	negq	%rax
	sbbq	%rdi, %rdi
	orq	%r15, %rdi
	callq	_Znam
	movq	%rax, %r12
	leaq	8(%rsp), %r13
	movq	$0, 24(%r13)
	movq	16(%r14), %rsi
	movq	%rax, %rdi
	movq	%r15, %rdx
	callq	memcpy@PLT
	movq	(%rbx), %rax
	movq	%rbp, (%rbx)
	movq	%rax, (%r13)
	movq	8(%rbx), %rax
	movq	(%rsp), %rcx                    # 8-byte Reload
	movq	%rcx, 8(%rbx)
	movq	%rax, 8(%r13)
	movq	16(%rbx), %rax
	movq	%r12, 16(%rbx)
	movq	%rax, 16(%r13)
	movq	%r13, %rdi
	callq	_ZN6MatrixD2Ev
.LBB9_2:
	movq	%rbx, %rax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_ZN6MatrixaSERKS_, .Lfunc_end9-_ZN6MatrixaSERKS_
	.cfi_endproc
                                        # -- End function
	.section	.text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat
	.hidden	__clang_call_terminate          # -- Begin function __clang_call_terminate
	.weak	__clang_call_terminate
	.type	__clang_call_terminate,@function
__clang_call_terminate:                 # @__clang_call_terminate
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__cxa_begin_catch
	callq	_ZSt9terminatev
.Lfunc_end10:
	.size	__clang_call_terminate, .Lfunc_end10-__clang_call_terminate
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB11_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB11_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17matrix_mul_strait9GPUMatrixS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17matrix_mul_shared9GPUMatrixS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end11:
	.size	__hip_module_ctor, .Lfunc_end11-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB12_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB12_2:
	retq
.Lfunc_end12:
	.size	__hip_module_dtor, .Lfunc_end12-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	", "
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"hipMemcpy2D done: "
	.size	.L.str.1, 19

	.type	_Z17matrix_mul_strait9GPUMatrixS_S_,@object # @_Z17matrix_mul_strait9GPUMatrixS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z17matrix_mul_strait9GPUMatrixS_S_
	.p2align	3, 0x0
_Z17matrix_mul_strait9GPUMatrixS_S_:
	.quad	_Z32__device_stub__matrix_mul_strait9GPUMatrixS_S_
	.size	_Z17matrix_mul_strait9GPUMatrixS_S_, 8

	.type	_Z17matrix_mul_shared9GPUMatrixS_S_,@object # @_Z17matrix_mul_shared9GPUMatrixS_S_
	.globl	_Z17matrix_mul_shared9GPUMatrixS_S_
	.p2align	3, 0x0
_Z17matrix_mul_shared9GPUMatrixS_S_:
	.quad	_Z32__device_stub__matrix_mul_shared9GPUMatrixS_S_
	.size	_Z17matrix_mul_shared9GPUMatrixS_S_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z17matrix_mul_strait9GPUMatrixS_S_"
	.size	.L__unnamed_1, 36

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z17matrix_mul_shared9GPUMatrixS_S_"
	.size	.L__unnamed_2, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _Z32__device_stub__matrix_mul_strait9GPUMatrixS_S_
	.addrsig_sym _Z32__device_stub__matrix_mul_shared9GPUMatrixS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z17matrix_mul_strait9GPUMatrixS_S_
	.addrsig_sym _Z17matrix_mul_shared9GPUMatrixS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17matrix_mul_strait9GPUMatrixS_S_ ; -- Begin function _Z17matrix_mul_strait9GPUMatrixS_S_
	.globl	_Z17matrix_mul_strait9GPUMatrixS_S_
	.p2align	8
	.type	_Z17matrix_mul_strait9GPUMatrixS_S_,@function
_Z17matrix_mul_strait9GPUMatrixS_S_:    ; @_Z17matrix_mul_strait9GPUMatrixS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x6c
	s_load_b64 s[2:3], s[0:1], 0x8
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_mov_b64 s[8:9], 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s4, 16
	s_and_b32 s4, s4, 0xffff
	s_cmp_lg_u64 s[2:3], 0
	v_mad_u64_u32 v[2:3], null, s14, s4, v[1:2]
	v_mad_u64_u32 v[0:1], null, s15, s5, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v7, 31, v2
	v_ashrrev_i32_e32 v1, 31, v0
	s_cbranch_scc0 .LBB0_4
; %bb.1:                                ; %.lr.ph
	s_clause 0x1
	s_load_b128 s[12:15], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x30
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v8, s13, v2
	v_mul_lo_u32 v9, s12, v7
	v_mad_u64_u32 v[3:4], null, s12, v2, s[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	v_add3_u32 v4, v8, v4, v9
	v_mov_b32_e32 v8, 0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v9, v[3:4], off
	global_load_b32 v10, v[5:6], off
	s_add_u32 s8, s8, 1
	v_add_co_u32 v3, vcc_lo, v3, 4
	s_addc_u32 s9, s9, 0
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	v_cmp_le_u64_e64 s6, s[2:3], s[8:9]
	v_add_co_u32 v5, vcc_lo, v5, s4
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	s_and_b32 vcc_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v8, v9, v10
	s_cbranch_vccz .LBB0_2
; %bb.3:                                ; %Flow
	s_mov_b32 s4, 0
	s_branch .LBB0_5
.LBB0_4:
	s_mov_b32 s4, -1
                                        ; implicit-def: $vgpr8
.LBB0_5:                                ; %Flow33
	s_load_b128 s[0:3], s[0:1], 0x50
	s_and_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccz .LBB0_7
; %bb.6:                                ; %.._crit_edge_crit_edge
	v_mov_b32_e32 v8, 0
.LBB0_7:                                ; %._crit_edge
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v5, s0, v7
	v_mul_lo_u32 v6, s1, v2
	v_mad_u64_u32 v[3:4], null, s0, v2, s[2:3]
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v2, v6, v4, v5
	v_add_co_u32 v0, vcc_lo, v3, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v2, v1, vcc_lo
	global_store_b32 v[0:1], v8, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17matrix_mul_strait9GPUMatrixS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 352
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17matrix_mul_strait9GPUMatrixS_S_, .Lfunc_end0-_Z17matrix_mul_strait9GPUMatrixS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 368
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z17matrix_mul_shared9GPUMatrixS_S_ ; -- Begin function _Z17matrix_mul_shared9GPUMatrixS_S_
	.globl	_Z17matrix_mul_shared9GPUMatrixS_S_
	.p2align	8
	.type	_Z17matrix_mul_shared9GPUMatrixS_S_,@function
_Z17matrix_mul_shared9GPUMatrixS_S_:    ; @_Z17matrix_mul_shared9GPUMatrixS_S_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x6c
	v_and_b32_e32 v7, 0x3ff, v0
	v_bfe_u32 v8, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s6, s2, 0xffff
	v_cvt_f32_u32_e32 v1, s4
	s_mul_i32 s14, s14, s6
	s_mul_i32 s15, s15, s4
	s_sub_u32 s7, 0, s4
	s_subb_u32 s8, 0, 0
	v_dual_fmamk_f32 v1, 0, 0x4f800000, v1 :: v_dual_add_nc_u32 v6, s14, v7
	v_add_nc_u32_e32 v0, s15, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v1, v1
	v_ashrrev_i32_e32 v9, 31, v6
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x5f7ffffc, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, 0x2f800000, v1
	v_trunc_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmamk_f32 v1, v2, 0xcf800000, v1
	v_cvt_u32_f32_e32 v2, v2
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s3, v2
	v_readfirstlane_b32 s5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mul_i32 s2, s7, s3
	s_mul_hi_u32 s9, s7, s5
	s_mul_i32 s10, s8, s5
	s_add_i32 s2, s9, s2
	s_mul_i32 s11, s7, s5
	s_add_i32 s2, s2, s10
	s_mul_hi_u32 s9, s5, s11
	s_mul_hi_u32 s12, s3, s11
	s_mul_i32 s10, s3, s11
	s_mul_hi_u32 s11, s5, s2
	s_mul_i32 s5, s5, s2
	s_mul_hi_u32 s13, s3, s2
	s_add_u32 s5, s9, s5
	s_addc_u32 s9, 0, s11
	s_add_u32 s5, s5, s10
	s_mul_i32 s2, s3, s2
	s_addc_u32 s5, s9, s12
	s_addc_u32 s9, s13, 0
	s_add_u32 s2, s5, s2
	s_addc_u32 s5, 0, s9
	v_add_co_u32 v1, s2, v1, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s2, 0
	s_addc_u32 s5, s3, s5
	v_readfirstlane_b32 s9, v1
	s_mul_i32 s10, s7, s5
	s_load_b64 s[2:3], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_1)
	s_mul_hi_u32 s11, s7, s9
	s_mul_i32 s8, s8, s9
	s_add_i32 s10, s11, s10
	s_mul_i32 s7, s7, s9
	s_add_i32 s10, s10, s8
	s_mul_hi_u32 s11, s5, s7
	s_mul_i32 s12, s5, s7
	s_mul_hi_u32 s7, s9, s7
	s_mul_hi_u32 s13, s9, s10
	s_mul_i32 s9, s9, s10
	s_mul_hi_u32 s8, s5, s10
	s_add_u32 s7, s7, s9
	s_addc_u32 s9, 0, s13
	s_add_u32 s7, s7, s12
	s_mul_i32 s10, s5, s10
	s_addc_u32 s7, s9, s11
	s_addc_u32 s8, s8, 0
	s_add_u32 s7, s7, s10
	s_addc_u32 s8, 0, s8
	v_add_co_u32 v1, s7, v1, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s7, 0
	s_addc_u32 s5, s5, s8
	v_readfirstlane_b32 s7, v1
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s9, s2, s5
	s_mul_hi_u32 s8, s2, s5
	s_mul_hi_u32 s10, s3, s5
	s_mul_i32 s5, s3, s5
	s_mul_hi_u32 s11, s2, s7
	s_mul_hi_u32 s12, s3, s7
	s_mul_i32 s7, s3, s7
	s_add_u32 s9, s11, s9
	s_addc_u32 s8, 0, s8
	s_add_u32 s7, s9, s7
	s_addc_u32 s7, s8, s12
	s_addc_u32 s8, s10, 0
	s_add_u32 s5, s7, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s7, s4, s5
	s_mul_hi_u32 s9, s4, s5
	v_sub_co_u32 v1, s2, s2, s7
	s_addc_u32 s7, 0, s8
	s_add_u32 s8, s5, 1
	s_mul_i32 s7, s4, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_sub_co_u32 v2, s10, v1, s4
	s_add_u32 s11, s5, 2
	s_add_i32 s9, s9, s7
	s_cmp_lg_u32 s2, 0
	v_readfirstlane_b32 s2, v2
	s_subb_u32 s3, s3, s9
	s_cmp_lg_u32 s10, 0
	s_subb_u32 s7, s3, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_ge_u32 s2, s4
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s7, 0
	v_readfirstlane_b32 s7, v1
	s_cselect_b32 s2, s2, -1
	v_ashrrev_i32_e32 v1, 31, v0
	s_cmp_lg_u32 s2, 0
	s_cselect_b32 s2, s11, s8
	s_cmp_ge_u32 s7, s4
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s3, 0
	s_cselect_b32 s3, s4, -1
	s_mov_b32 s4, -1
	s_cmp_lg_u32 s3, 0
	s_cselect_b32 s2, s2, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_i32 s2, 0
	s_cbranch_scc1 .LBB1_2
; %bb.1:                                ; %.._crit_edge_crit_edge
	s_mov_b32 s3, 0
	s_mov_b32 s4, 0
	s_branch .LBB1_3
.LBB1_2:
                                        ; implicit-def: $sgpr3
.LBB1_3:                                ; %Flow51
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB1_8
; %bb.4:                                ; %.lr.ph
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x30
	v_lshlrev_b32_e32 v10, 2, v8
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	v_lshlrev_b32_e32 v11, 6, v7
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v12, 0x400, v10
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v13, v11, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v14, v12, v11
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v15, s8, v9
	v_mad_u64_u32 v[2:3], null, s8, v6, s[10:11]
	v_mul_lo_u32 v16, s9, v6
	v_add_co_u32 v4, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	s_mov_b32 s6, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_add3_u32 v3, v16, v3, v15
.LBB1_5:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_6 Depth 2
	v_add_nc_u32_e32 v15, s3, v8
	v_add_nc_u32_e32 v19, s3, v7
	s_mov_b32 s7, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v16, 31, v15
	v_ashrrev_i32_e32 v20, 31, v19
	v_mul_lo_u32 v21, s5, v19
	v_mad_u64_u32 v[17:18], null, s4, v19, v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[15:16], 2, v[15:16]
	v_mul_lo_u32 v19, s4, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v15, vcc_lo, v2, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, v3, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add3_u32 v18, v21, v18, v19
	global_load_b32 v16, v[15:16], off
	global_load_b32 v17, v[17:18], off
	v_mov_b32_e32 v15, v12
	s_waitcnt vmcnt(1)
	ds_store_b32 v13, v16
	s_waitcnt vmcnt(0)
	ds_store_b32 v14, v17
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_6:                                ;   Parent Loop BB1_5 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v16, s7, v11
	s_add_i32 s7, s7, 4
	ds_load_b32 v17, v15
	ds_load_b32 v16, v16
	v_add_nc_u32_e32 v15, 64, v15
	s_cmp_eq_u32 s7, 64
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v10, v16, v17
	s_cbranch_scc0 .LBB1_6
; %bb.7:                                ;   in Loop: Header=BB1_5 Depth=1
	s_add_i32 s6, s6, 1
	s_add_i32 s3, s3, 16
	s_cmp_ge_i32 s6, s2
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_5
	s_branch .LBB1_9
.LBB1_8:
	v_mov_b32_e32 v10, s3
.LBB1_9:                                ; %Flow52
	s_load_b128 s[0:3], s[0:1], 0x50
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v4, s0, v9
	v_mul_lo_u32 v5, s1, v6
	v_mad_u64_u32 v[2:3], null, s0, v6, s[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v3, v5, v3, v4
	v_add_co_u32 v0, vcc_lo, v2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v3, v1, vcc_lo
	global_store_b32 v[0:1], v10, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17matrix_mul_shared9GPUMatrixS_S_
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 352
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z17matrix_mul_shared9GPUMatrixS_S_, .Lfunc_end1-_Z17matrix_mul_shared9GPUMatrixS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1040
; NumSgprs: 18
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           32
        .value_kind:     by_value
      - .offset:         32
        .size:           32
        .value_kind:     by_value
      - .offset:         64
        .size:           32
        .value_kind:     by_value
      - .offset:         96
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         100
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         104
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         108
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         110
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         112
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         114
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         116
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         118
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         152
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         160
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 352
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17matrix_mul_strait9GPUMatrixS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17matrix_mul_strait9GPUMatrixS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           32
        .value_kind:     by_value
      - .offset:         32
        .size:           32
        .value_kind:     by_value
      - .offset:         64
        .size:           32
        .value_kind:     by_value
      - .offset:         96
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         100
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         104
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         108
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         110
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         112
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         114
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         116
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         118
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         152
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         160
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 352
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17matrix_mul_shared9GPUMatrixS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17matrix_mul_shared9GPUMatrixS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     22
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
