#include <iostream>
#include <math.h>
#include <random>
#include <fstream>

__device__ float square(float x) {
    return x*x;
}

struct Tree_Info {
    int n;
    double corner[3];
    double size; // assume cube
};

// Just build the tree in serial
// DOES NOT WORK
void buildtree(int n, float *r, float *h, float *coldens, int *tree_children, Tree_Info *tree_info) {
    // find max/min size
    int ii,kk;
    float *r_i;

    for ( kk=0 ; kk<3 ; kk++) tree_info->corner[kk] = r[kk];
    tree_info->size = 0.;

    for ( ii=1 ; ii<n ; ii++ ) {
        r_i = &(r[ii*3]);
        
        for ( kk=0 ; kk<3 ; kk++ ) {
            if ( r_i[kk]<tree_info->corner[kk] ) {
                tree_info->size+=tree_info->corner[kk]-r_i[kk];
                tree_info->corner[kk]-=r_i[kk];
            }
            if ( r_i[kk]>tree_info->corner[kk] ) {
                tree_info->size+=r_i[kk]-tree_info->corner[kk];
            }
        }
    }
    
    std::cout << "Corner, size: " << tree_info->corner[0] << " " << tree_info->corner[1] << " " << tree_info->corner[2] << " " << tree_info->size << std::endl;
}

// CUDA Kernel function function to calc number of collisions per particle
__global__ void calcray(int n, float *r, float *h, float *coldens, Tree_Info *tree_info) {
  int index = blockIdx.x * blockDim.x + threadIdx.x;
//   int stride = blockDim.x * gridDim.x;
  
  int i,j,k;

  float crossp;
  
  float norm2,h2,dot;
  float *r_i,*r_j;
  float dr[3];

  i = index;
  coldens[i] = 0.;

  r_i = &(r[i*3]);
  norm2 = 0.;
  for (k=0 ; k<3 ; k++) norm2+=square(r_i[k]);

  for (j=0 ; j<n ; j++) {
    r_j = &(r[j*3]);
    // check if particle is in-between origin and target
    dot = 0.;
    for (k=0 ; k<3 ; k++) dot+=r_i[k]*r_j[k];

    if ( dot>0. && dot<norm2 ) {
        // check if ray intersects particle
        for (k=0 ; k<3 ; k++) dr[k] = r_i[k] - r_j[k];

        crossp = square( r_j[1]*dr[2]-r_j[2]*dr[1]);
        crossp+= square(-r_j[0]*dr[2]+r_j[2]*dr[0]);
        crossp+= square( r_j[0]*dr[1]-r_j[1]*dr[0]);
  
        h2 = square(h[j]);

        if ( crossp<=h2*norm2 ) {
          coldens[index]+=1.;
        }
    }
  }
}

int main(void) {
//   int N = 690286; // for comparison with tree code
  int N = 10000; // for quick tests

  float *r,*h,*coldens;
  float *d_coldens;
  
  int *tree_children;
  
  struct Tree_Info *tree_info;
  
  int tree_memory_factor = 8;

  cudaMallocManaged(&r, N*sizeof(float)*3);
  cudaMallocManaged(&h, N*sizeof(float));
  cudaMalloc(&d_coldens, N*sizeof(float));

  cudaMallocManaged(&tree_children, N*sizeof(int)*tree_memory_factor);
  cudaMallocManaged(&tree_info, sizeof(tree_info));

  coldens = new float[N];
  
  std::default_random_engine generator;
  std::uniform_real_distribution<float> locDistribution(-1.0,1.0);
//   std::uniform_real_distribution<float> hDistribution(0.005,0.02);
  std::uniform_real_distribution<float> hDistribution(0.05,0.1);

  
  // initialize x and y arrays on the host
  for (int i = 0; i < N; i++) {
    r[i*3] = locDistribution(generator);
    r[i*3+1] = locDistribution(generator);
    r[i*3+2] = locDistribution(generator);
    h[i] = hDistribution(generator);
  }

  int blockSize = 256;
  int numBlocks = (N + blockSize - 1) / blockSize;
  buildtree(N,r,h,d_coldens,tree_children,tree_info);

  calcray<<<numBlocks, blockSize>>>(N,r,h,d_coldens,tree_info);
  cudaMemcpy(coldens, d_coldens, N*sizeof(float), cudaMemcpyDeviceToHost);
// 
  std::cout << "coldens0  " << coldens[0] << std::endl;
  
  // Free memory
  cudaFree(r);
  cudaFree(h);
  cudaFree(coldens);
  
  cudaFree(d_coldens);
  cudaFree(tree_children);
  cudaFree(tree_info);

  return 0;
}

	.file	"tmpxft_0020b1f2_00000000-6_ray_tree.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4855:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4855:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z6squaref
	.type	_Z6squaref, @function
_Z6squaref:
.LFB4850:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4850:
	.size	_Z6squaref, .-_Z6squaref
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Corner, size: "
.LC2:
	.string	" "
	.text
	.globl	_Z9buildtreeiPfS_S_PiP9Tree_Info
	.type	_Z9buildtreeiPfS_S_PiP9Tree_Info, @function
_Z9buildtreeiPfS_S_PiP9Tree_Info:
.LFB4851:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%edi, %ecx
	movl	$3, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%r9, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 32
	cvtss2sd	(%rsi), %xmm0
	movq	%rsi, %rdx
	movsd	%xmm0, 8(%r9)
	cvtss2sd	4(%rsi), %xmm0
	movsd	%xmm0, 16(%r9)
	cvtss2sd	8(%rsi), %xmm0
	movl	$1, %esi
	movq	$0x000000000, 32(%r9)
	movsd	%xmm0, 24(%r9)
.L5:
	cmpl	%ecx, %esi
	jge	.L17
	leaq	(%rdx,%rdi,4), %r8
	movl	$1, %eax
.L10:
	movsd	(%rbx,%rax,8), %xmm1
	cvtss2sd	-4(%r8,%rax,4), %xmm0
	comisd	%xmm0, %xmm1
	jbe	.L6
	subsd	%xmm0, %xmm1
	movsd	32(%rbx), %xmm2
	addsd	%xmm1, %xmm2
	movsd	%xmm2, 32(%rbx)
	movsd	%xmm1, (%rbx,%rax,8)
.L6:
	movsd	(%rbx,%rax,8), %xmm1
	comisd	%xmm1, %xmm0
	jbe	.L8
	subsd	%xmm1, %xmm0
	addsd	32(%rbx), %xmm0
	movsd	%xmm0, 32(%rbx)
.L8:
	incq	%rax
	cmpq	$4, %rax
	jne	.L10
	incl	%esi
	addq	$3, %rdi
	jmp	.L5
.L17:
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	8(%rbx), %xmm0
	leaq	.LC2(%rip), %rbp
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	16(%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	24(%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	32(%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	.cfi_endproc
.LFE4851:
	.size	_Z9buildtreeiPfS_S_PiP9Tree_Info, .-_Z9buildtreeiPfS_S_PiP9Tree_Info
	.globl	_Z42__device_stub__Z7calcrayiPfS_S_P9Tree_InfoiPfS_S_P9Tree_Info
	.type	_Z42__device_stub__Z7calcrayiPfS_S_P9Tree_InfoiPfS_S_P9Tree_Info, @function
_Z42__device_stub__Z7calcrayiPfS_S_P9Tree_InfoiPfS_S_P9Tree_Info:
.LFB4877:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movl	%edi, 44(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z7calcrayiPfS_S_P9Tree_Info(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L18:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4877:
	.size	_Z42__device_stub__Z7calcrayiPfS_S_P9Tree_InfoiPfS_S_P9Tree_Info, .-_Z42__device_stub__Z7calcrayiPfS_S_P9Tree_InfoiPfS_S_P9Tree_Info
	.globl	_Z7calcrayiPfS_S_P9Tree_Info
	.type	_Z7calcrayiPfS_S_P9Tree_Info, @function
_Z7calcrayiPfS_S_P9Tree_Info:
.LFB4878:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z7calcrayiPfS_S_P9Tree_InfoiPfS_S_P9Tree_Info
	.cfi_endproc
.LFE4878:
	.size	_Z7calcrayiPfS_S_P9Tree_Info, .-_Z7calcrayiPfS_S_P9Tree_Info
	.section	.rodata.str1.1
.LC3:
	.string	"_Z7calcrayiPfS_S_P9Tree_Info"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4880:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7calcrayiPfS_S_P9Tree_Info(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4880:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt25uniform_real_distributionIfEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEfRT_,"axG",@progbits,_ZNSt25uniform_real_distributionIfEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEfRT_,comdat
	.align 2
	.weak	_ZNSt25uniform_real_distributionIfEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEfRT_
	.type	_ZNSt25uniform_real_distributionIfEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEfRT_, @function
_ZNSt25uniform_real_distributionIfEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEfRT_:
.LFB5226:
	.cfi_startproc
	endbr64
	movl	$2147483647, %ecx
	xorl	%edx, %edx
	movss	(%rdi), %xmm2
	movss	4(%rdi), %xmm0
	imulq	$16807, (%rsi), %rax
	divq	%rcx
	movq	%rdx, (%rsi)
	decq	%rdx
	js	.L26
	cvtsi2ssq	%rdx, %xmm1
	jmp	.L27
.L26:
	movq	%rdx, %rax
	andl	$1, %edx
	shrq	%rax
	orq	%rdx, %rax
	cvtsi2ssq	%rax, %xmm1
	addss	%xmm1, %xmm1
.L27:
	xorps	%xmm3, %xmm3
	addss	%xmm3, %xmm1
	mulss	.LC6(%rip), %xmm1
	comiss	.LC7(%rip), %xmm1
	jb	.L28
	movss	.LC4(%rip), %xmm1
.L28:
	subss	%xmm2, %xmm0
	mulss	%xmm1, %xmm0
	addss	%xmm2, %xmm0
	ret
	.cfi_endproc
.LFE5226:
	.size	_ZNSt25uniform_real_distributionIfEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEfRT_, .-_ZNSt25uniform_real_distributionIfEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEfRT_
	.section	.rodata.str1.1
.LC8:
	.string	"coldens0  "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4852:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$1, %edx
	movl	$120000, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movl	$1, %edx
	leaq	24(%rsp), %rdi
	movl	$40000, %esi
	call	cudaMallocManaged@PLT
	leaq	32(%rsp), %rdi
	movl	$40000, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	movl	$320000, %esi
	call	cudaMallocManaged@PLT
	leaq	48(%rsp), %rdi
	movl	$1, %edx
	movl	$8, %esi
	call	cudaMallocManaged@PLT
	movl	$40000, %edi
	call	_Znam@PLT
	movq	$1, 56(%rsp)
	movq	%rax, %rbp
	movabsq	$4575657224621260800, %rax
	movq	%rax, 64(%rsp)
	movabsq	$4453159313431383245, %rax
	movq	%rax, 72(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 8(%rsp)
.L31:
	movq	16(%rsp), %r12
	leaq	64(%rsp), %r15
	movq	8(%rsp), %rsi
	movq	%r15, %rdi
	call	_ZNSt25uniform_real_distributionIfEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEfRT_
	leaq	(%r12,%rbx), %r13
	movq	8(%rsp), %rsi
	movq	%r15, %rdi
	movss	%xmm0, 0(%r13)
	leaq	4(%r12,%rbx), %r13
	call	_ZNSt25uniform_real_distributionIfEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEfRT_
	movq	8(%rsp), %rsi
	movq	%r15, %rdi
	movss	%xmm0, 0(%r13)
	leaq	8(%r12,%rbx), %r13
	addq	$12, %rbx
	call	_ZNSt25uniform_real_distributionIfEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEfRT_
	movq	24(%rsp), %r15
	movq	8(%rsp), %rsi
	leaq	72(%rsp), %rdi
	movss	%xmm0, 0(%r13)
	call	_ZNSt25uniform_real_distributionIfEclISt26linear_congruential_engineImLm16807ELm0ELm2147483647EEEEfRT_
	leaq	(%r15,%r14), %r13
	addq	$4, %r14
	movss	%xmm0, 0(%r13)
	cmpq	$120000, %rbx
	jne	.L31
	movq	48(%rsp), %r9
	movq	40(%rsp), %r8
	movq	%r15, %rdx
	movq	%r12, %rsi
	movq	32(%rsp), %rcx
	movl	$10000, %edi
	call	_Z9buildtreeiPfS_S_PiP9Tree_Info
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$536870917, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$3, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movq	48(%rsp), %r8
	movq	32(%rsp), %rcx
	movl	$10000, %edi
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	call	_Z42__device_stub__Z7calcrayiPfS_S_P9Tree_InfoiPfS_S_P9Tree_Info
.L32:
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movl	$40000, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC8(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	0(%rbp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4852:
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC4:
	.long	1065353215
	.align 4
.LC6:
	.long	805306368
	.align 4
.LC7:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <math.h>
#include <random>
#include <fstream>

__device__ float square(float x) {
    return x*x;
}

struct Tree_Info {
    int n;
    double corner[3];
    double size; // assume cube
};

// Just build the tree in serial
// DOES NOT WORK
void buildtree(int n, float *r, float *h, float *coldens, int *tree_children, Tree_Info *tree_info) {
    // find max/min size
    int ii,kk;
    float *r_i;

    for ( kk=0 ; kk<3 ; kk++) tree_info->corner[kk] = r[kk];
    tree_info->size = 0.;

    for ( ii=1 ; ii<n ; ii++ ) {
        r_i = &(r[ii*3]);
        
        for ( kk=0 ; kk<3 ; kk++ ) {
            if ( r_i[kk]<tree_info->corner[kk] ) {
                tree_info->size+=tree_info->corner[kk]-r_i[kk];
                tree_info->corner[kk]-=r_i[kk];
            }
            if ( r_i[kk]>tree_info->corner[kk] ) {
                tree_info->size+=r_i[kk]-tree_info->corner[kk];
            }
        }
    }
    
    std::cout << "Corner, size: " << tree_info->corner[0] << " " << tree_info->corner[1] << " " << tree_info->corner[2] << " " << tree_info->size << std::endl;
}

// CUDA Kernel function function to calc number of collisions per particle
__global__ void calcray(int n, float *r, float *h, float *coldens, Tree_Info *tree_info) {
  int index = blockIdx.x * blockDim.x + threadIdx.x;
//   int stride = blockDim.x * gridDim.x;
  
  int i,j,k;

  float crossp;
  
  float norm2,h2,dot;
  float *r_i,*r_j;
  float dr[3];

  i = index;
  coldens[i] = 0.;

  r_i = &(r[i*3]);
  norm2 = 0.;
  for (k=0 ; k<3 ; k++) norm2+=square(r_i[k]);

  for (j=0 ; j<n ; j++) {
    r_j = &(r[j*3]);
    // check if particle is in-between origin and target
    dot = 0.;
    for (k=0 ; k<3 ; k++) dot+=r_i[k]*r_j[k];

    if ( dot>0. && dot<norm2 ) {
        // check if ray intersects particle
        for (k=0 ; k<3 ; k++) dr[k] = r_i[k] - r_j[k];

        crossp = square( r_j[1]*dr[2]-r_j[2]*dr[1]);
        crossp+= square(-r_j[0]*dr[2]+r_j[2]*dr[0]);
        crossp+= square( r_j[0]*dr[1]-r_j[1]*dr[0]);
  
        h2 = square(h[j]);

        if ( crossp<=h2*norm2 ) {
          coldens[index]+=1.;
        }
    }
  }
}

int main(void) {
//   int N = 690286; // for comparison with tree code
  int N = 10000; // for quick tests

  float *r,*h,*coldens;
  float *d_coldens;
  
  int *tree_children;
  
  struct Tree_Info *tree_info;
  
  int tree_memory_factor = 8;

  hipMallocManaged(&r, N*sizeof(float)*3);
  hipMallocManaged(&h, N*sizeof(float));
  hipMalloc(&d_coldens, N*sizeof(float));

  hipMallocManaged(&tree_children, N*sizeof(int)*tree_memory_factor);
  hipMallocManaged(&tree_info, sizeof(tree_info));

  coldens = new float[N];
  
  std::default_random_engine generator;
  std::uniform_real_distribution<float> locDistribution(-1.0,1.0);
//   std::uniform_real_distribution<float> hDistribution(0.005,0.02);
  std::uniform_real_distribution<float> hDistribution(0.05,0.1);

  
  // initialize x and y arrays on the host
  for (int i = 0; i < N; i++) {
    r[i*3] = locDistribution(generator);
    r[i*3+1] = locDistribution(generator);
    r[i*3+2] = locDistribution(generator);
    h[i] = hDistribution(generator);
  }

  int blockSize = 256;
  int numBlocks = (N + blockSize - 1) / blockSize;
  buildtree(N,r,h,d_coldens,tree_children,tree_info);

  calcray<<<numBlocks, blockSize>>>(N,r,h,d_coldens,tree_info);
  hipMemcpy(coldens, d_coldens, N*sizeof(float), hipMemcpyDeviceToHost);
// 
  std::cout << "coldens0  " << coldens[0] << std::endl;
  
  // Free memory
  hipFree(r);
  hipFree(h);
  hipFree(coldens);
  
  hipFree(d_coldens);
  hipFree(tree_children);
  hipFree(tree_info);

  return 0;
}

	.text
	.file	"ray_tree.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z9buildtreeiPfS_S_PiP9Tree_Info # -- Begin function _Z9buildtreeiPfS_S_PiP9Tree_Info
	.type	_Z9buildtreeiPfS_S_PiP9Tree_Info,@function
_Z9buildtreeiPfS_S_PiP9Tree_Info:       # @_Z9buildtreeiPfS_S_PiP9Tree_Info
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%r9, %rbx
	xorl	%eax, %eax
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rsi,%rax,4), %xmm0
	movsd	%xmm0, 8(%rbx,%rax,8)
	incq	%rax
	cmpq	$3, %rax
	jne	.LBB0_1
# %bb.2:
	movq	$0, 32(%rbx)
	cmpl	$2, %edi
	jl	.LBB0_11
# %bb.3:                                # %.lr.ph.preheader
	movl	%edi, %eax
	addq	$12, %rsi
	movl	$1, %ecx
.LBB0_4:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_5 Depth 2
	xorl	%edx, %edx
.LBB0_5:                                #   Parent Loop BB0_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rsi,%rdx,4), %xmm0
	movsd	8(%rbx,%rdx,8), %xmm1           # xmm1 = mem[0],zero
	ucomisd	%xmm0, %xmm1
	jbe	.LBB0_7
# %bb.6:                                #   in Loop: Header=BB0_5 Depth=2
	subsd	%xmm0, %xmm1
	addsd	32(%rbx), %xmm1
	movsd	%xmm1, 32(%rbx)
	movsd	8(%rbx,%rdx,8), %xmm1           # xmm1 = mem[0],zero
	subsd	%xmm0, %xmm1
	movsd	%xmm1, 8(%rbx,%rdx,8)
.LBB0_7:                                #   in Loop: Header=BB0_5 Depth=2
	ucomisd	%xmm1, %xmm0
	jbe	.LBB0_9
# %bb.8:                                #   in Loop: Header=BB0_5 Depth=2
	subsd	%xmm1, %xmm0
	addsd	32(%rbx), %xmm0
	movsd	%xmm0, 32(%rbx)
.LBB0_9:                                #   in Loop: Header=BB0_5 Depth=2
	incq	%rdx
	cmpq	$3, %rdx
	jne	.LBB0_5
# %bb.10:                               #   in Loop: Header=BB0_4 Depth=1
	incq	%rcx
	addq	$12, %rsi
	cmpq	%rax, %rcx
	jne	.LBB0_4
.LBB0_11:                               # %._crit_edge
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	8(%rbx), %xmm0                  # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rbx), %xmm0                 # xmm0 = mem[0],zero
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	24(%rbx), %xmm0                 # xmm0 = mem[0],zero
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	32(%rbx), %xmm0                 # xmm0 = mem[0],zero
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_ZNSo5flushEv                   # TAILCALL
.Lfunc_end0:
	.size	_Z9buildtreeiPfS_S_PiP9Tree_Info, .Lfunc_end0-_Z9buildtreeiPfS_S_PiP9Tree_Info
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__calcrayiPfS_S_P9Tree_Info # -- Begin function _Z22__device_stub__calcrayiPfS_S_P9Tree_Info
	.type	_Z22__device_stub__calcrayiPfS_S_P9Tree_Info,@function
_Z22__device_stub__calcrayiPfS_S_P9Tree_Info: # @_Z22__device_stub__calcrayiPfS_S_P9Tree_Info
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7calcrayiPfS_S_P9Tree_Info, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z22__device_stub__calcrayiPfS_S_P9Tree_Info, .Lfunc_end1-_Z22__device_stub__calcrayiPfS_S_P9Tree_Info
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0xbf800000                      # float -1
.LCPI2_1:
	.long	0x3d4ccccd                      # float 0.0500000007
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	8(%rsp), %rdi
	movl	$120000, %esi                   # imm = 0x1D4C0
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	32(%rsp), %rdi
	movl	$40000, %esi                    # imm = 0x9C40
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	24(%rsp), %rdi
	movl	$40000, %esi                    # imm = 0x9C40
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movl	$320000, %esi                   # imm = 0x4E200
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %rdi
	movl	$8, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	$40000, %edi                    # imm = 0x9C40
	callq	_Znam
	movq	%rax, %rbx
	leaq	48(%rsp), %r14
	movq	$1, (%r14)
	xorl	%r15d, %r15d
	xorl	%r12d, %r12d
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	callq	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	addss	%xmm0, %xmm0
	movss	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	addss	%xmm1, %xmm0
	movq	8(%rsp), %rax
	movss	%xmm0, (%rax,%r15)
	movq	%r14, %rdi
	callq	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	addss	%xmm0, %xmm0
	addss	.LCPI2_0(%rip), %xmm0
	movq	8(%rsp), %rax
	movss	%xmm0, 4(%rax,%r15)
	movq	%r14, %rdi
	callq	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	addss	%xmm0, %xmm0
	addss	.LCPI2_0(%rip), %xmm0
	movq	8(%rsp), %rax
	movss	%xmm0, 8(%rax,%r15)
	movq	%r14, %rdi
	callq	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	movss	.LCPI2_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	addss	%xmm1, %xmm0
	movq	32(%rsp), %rax
	movss	%xmm0, (%rax,%r12,4)
	incq	%r12
	addq	$12, %r15
	cmpq	$10000, %r12                    # imm = 0x2710
	jne	.LBB2_1
# %bb.2:
	movq	8(%rsp), %rsi
	movq	16(%rsp), %r9
	movl	$10000, %edi                    # imm = 0x2710
	callq	_Z9buildtreeiPfS_S_PiP9Tree_Info
	movabsq	$4294967336, %rdi               # imm = 0x100000028
	leaq	216(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rcx
	movq	16(%rsp), %r8
	movl	$10000, %edi                    # imm = 0x2710
	callq	_Z22__device_stub__calcrayiPfS_S_P9Tree_Info
.LBB2_4:
	movq	24(%rsp), %rsi
	movl	$40000, %edx                    # imm = 0x9C40
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
.LCPI3_0:
	.quad	0x41dfffffff800000              # double 2147483646
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI3_1:
	.long	0x40000000                      # float 2
.LCPI3_2:
	.long	0x5f000000                      # float 9.22337203E+18
.LCPI3_3:
	.long	0x3f800000                      # float 1
	.section	.text._ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_,"axG",@progbits,_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_,comdat
	.weak	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	.type	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_,@function
_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_: # @_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$64, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	fldl	.LCPI3_0(%rip)
	fstpt	(%rsp)
	callq	logl
	fstpt	52(%rsp)                        # 10-byte Folded Spill
	flds	.LCPI3_1(%rip)
	fstpt	(%rsp)
	callq	logl
	fldt	52(%rsp)                        # 10-byte Folded Reload
	fdivp	%st, %st(1)
	flds	.LCPI3_2(%rip)
	xorl	%ecx, %ecx
	fxch	%st(1)
	fucomi	%st(1), %st
	fldz
	fcmovnb	%st(2), %st
	fstp	%st(2)
	fsubp	%st, %st(1)
	setae	%cl
	fnstcw	28(%rsp)
	movzwl	28(%rsp), %eax
	orl	$3072, %eax                     # imm = 0xC00
	movw	%ax, 30(%rsp)
	fldcw	30(%rsp)
	fistpll	40(%rsp)
	fldcw	28(%rsp)
	shlq	$63, %rcx
	xorq	40(%rsp), %rcx
	leaq	23(%rcx), %rax
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %rcx
	cmpq	$1, %rax
	adcq	$0, %rcx
	movq	(%rbx), %rsi
	xorps	%xmm0, %xmm0
	movss	.LCPI3_3(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movabsq	$8589934597, %rdi               # imm = 0x200000005
.LBB3_1:                                # %select.unfold
                                        # =>This Inner Loop Header: Depth=1
	imulq	$16807, %rsi, %rsi              # imm = 0x41A7
	movq	%rsi, %rax
	mulq	%rdi
	movq	%rsi, %rax
	subq	%rdx, %rax
	shrq	%rax
	addq	%rdx, %rax
	shrq	$30, %rax
	movq	%rax, %rdx
	shlq	$31, %rdx
	subq	%rdx, %rax
	leaq	(%rsi,%rax), %rdx
	decq	%rdx
	testq	%rdx, %rdx
	js	.LBB3_2
# %bb.3:                                # %select.unfold
                                        #   in Loop: Header=BB3_1 Depth=1
	xorps	%xmm2, %xmm2
	cvtsi2ss	%rdx, %xmm2
	jmp	.LBB3_4
.LBB3_2:                                #   in Loop: Header=BB3_1 Depth=1
	movq	%rdx, %r8
	shrq	%r8
	andl	$1, %edx
	orq	%r8, %rdx
	xorps	%xmm2, %xmm2
	cvtsi2ss	%rdx, %xmm2
	addss	%xmm2, %xmm2
.LBB3_4:                                # %select.unfold
                                        #   in Loop: Header=BB3_1 Depth=1
	addq	%rax, %rsi
	mulss	%xmm1, %xmm2
	movss	%xmm1, 36(%rsp)
	flds	36(%rsp)
	fmull	.LCPI3_0(%rip)
	addss	%xmm2, %xmm0
	fstps	32(%rsp)
	movss	32(%rsp), %xmm1                 # xmm1 = mem[0],zero,zero,zero
	decq	%rcx
	jne	.LBB3_1
# %bb.5:
	movq	%rsi, (%rbx)
	divss	%xmm1, %xmm0
	ucomiss	.LCPI3_3(%rip), %xmm0
	jae	.LBB3_7
# %bb.6:
	addq	$64, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB3_7:
	.cfi_def_cfa_offset 80
	movss	.LCPI3_3(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	xorps	%xmm1, %xmm1
	addq	$64, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	nextafterf                      # TAILCALL
.Lfunc_end3:
	.size	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_, .Lfunc_end3-_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7calcrayiPfS_S_P9Tree_Info, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Corner, size: "
	.size	.L.str, 15

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" "
	.size	.L.str.1, 2

	.type	_Z7calcrayiPfS_S_P9Tree_Info,@object # @_Z7calcrayiPfS_S_P9Tree_Info
	.section	.rodata,"a",@progbits
	.globl	_Z7calcrayiPfS_S_P9Tree_Info
	.p2align	3, 0x0
_Z7calcrayiPfS_S_P9Tree_Info:
	.quad	_Z22__device_stub__calcrayiPfS_S_P9Tree_Info
	.size	_Z7calcrayiPfS_S_P9Tree_Info, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"coldens0  "
	.size	.L.str.2, 11

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7calcrayiPfS_S_P9Tree_Info"
	.size	.L__unnamed_1, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__calcrayiPfS_S_P9Tree_Info
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z7calcrayiPfS_S_P9Tree_Info
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7calcrayiPfS_S_P9Tree_Info ; -- Begin function _Z7calcrayiPfS_S_P9Tree_Info
	.globl	_Z7calcrayiPfS_S_P9Tree_Info
	.p2align	8
	.type	_Z7calcrayiPfS_S_P9Tree_Info,@function
_Z7calcrayiPfS_S_P9Tree_Info:           ; @_Z7calcrayiPfS_S_P9Tree_Info
; %bb.0:                                ; %.preheader55
	s_clause 0x2
	s_load_b32 s4, s[0:1], 0x34
	s_load_b64 s[2:3], s[0:1], 0x18
	s_load_b32 s16, s[0:1], 0x0
	v_mov_b32_e32 v7, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_cmp_lt_i32 s16, 1
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	global_store_b32 v[3:4], v7, off
	s_cbranch_scc1 .LBB0_11
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b128 s[4:7], s[0:1], 0x8
	v_lshl_add_u32 v0, v1, 1, v1
	s_mov_b32 s3, 0
	v_mov_b32_e32 v9, 0
	s_mov_b32 s10, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v1, vcc_lo
	s_mov_b64 s[8:9], s[4:5]
	global_load_b96 v[0:2], v[5:6], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v8, v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v0, v0
	v_fmac_f32_e32 v8, v2, v2
                                        ; implicit-def: $vgpr0_vgpr1_vgpr2
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;     Child Loop BB0_6 Depth 2
	v_mov_b32_e32 v10, 0
	s_mov_b64 s[0:1], 0
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v11, vcc_lo, v5, s0
	v_add_co_ci_u32_e32 v12, vcc_lo, s1, v6, vcc_lo
	s_add_u32 s12, s8, s0
	s_addc_u32 s13, s9, s1
	global_load_b32 v13, v7, s[12:13]
	global_load_b32 v11, v[11:12], off
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s0, 12
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v10, v11, v13
	s_cbranch_scc1 .LBB0_3
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e32 vcc_lo, 0, v10
	v_cmp_lt_f32_e64 s0, v10, v8
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s17, s0
	s_cbranch_execz .LBB0_10
; %bb.5:                                ; %.preheader.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b64 s[12:13], 0
	s_mov_b64 s[14:15], 0
.LBB0_6:                                ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v10, vcc_lo, v5, s14
	v_add_co_ci_u32_e32 v11, vcc_lo, s15, v6, vcc_lo
	s_add_u32 s0, s8, s14
	s_addc_u32 s1, s9, s15
	global_load_b32 v12, v7, s[0:1]
	global_load_b32 v10, v[10:11], off
	s_cmp_eq_u32 s12, 2
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s12, 1
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s12, 0
	s_cselect_b32 s1, -1, 0
	s_add_u32 s14, s14, 4
	s_addc_u32 s15, s15, 0
	s_add_u32 s12, s12, 1
	s_addc_u32 s13, s13, 0
	s_cmp_lg_u32 s14, 12
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v10, vcc_lo
	v_cndmask_b32_e64 v1, v1, v10, s0
	v_cndmask_b32_e64 v0, v0, v10, s1
	s_cbranch_scc1 .LBB0_6
; %bb.7:                                ;   in Loop: Header=BB0_2 Depth=1
	s_mul_i32 s2, s10, 3
	s_mov_b32 s11, s3
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	global_load_b96 v[10:12], v7, s[0:1]
	s_lshl_b64 s[0:1], s[10:11], 2
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	global_load_b32 v13, v7, s[0:1]
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(1)
	v_dual_mul_f32 v14, v2, v10 :: v_dual_mul_f32 v15, v1, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v12, v0, v12, -v14
	v_mul_f32_e32 v14, v0, v11
	v_fma_f32 v11, v2, v11, -v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, v12, v12
	s_waitcnt vmcnt(0)
	v_dual_fmac_f32 v12, v11, v11 :: v_dual_mul_f32 v11, v13, v13
	v_fma_f32 v10, v1, v10, -v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v12, v10, v10
	v_mul_f32_e32 v10, v8, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_le_f32_e32 v12, v10
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_f32_e32 v9, 1.0, v9
	global_store_b32 v[3:4], v9, off
.LBB0_9:                                ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_10:                               ; %Flow93
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s17
	s_add_i32 s10, s10, 1
	s_add_u32 s8, s8, 12
	s_addc_u32 s9, s9, 0
	s_cmp_lg_u32 s10, s16
	s_cbranch_scc1 .LBB0_2
.LBB0_11:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7calcrayiPfS_S_P9Tree_Info
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7calcrayiPfS_S_P9Tree_Info, .Lfunc_end0-_Z7calcrayiPfS_S_P9Tree_Info
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 628
; NumSgprs: 20
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7calcrayiPfS_S_P9Tree_Info
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z7calcrayiPfS_S_P9Tree_Info.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
