#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>

#define MAXITER 1000000
#define TOLERANCE 0.000000001
#define NORM (N*N)


__global__ void diff_eq (float *A, int it, float *diff, int N) {
	int j;
	int i = (blockIdx.y * blockDim.y + threadIdx.y);
	float old;

	if((it%2) != (i%2)){
   		j = 2*(blockIdx.x * blockDim.x + threadIdx.x);		
   	}else{
   		j = 2*(blockIdx.x * blockDim.x + threadIdx.x) + 1;
   	}

	if((j >= N) || (i >= N)){
		return;
	}
	
	old = *(A + (N+2)*(i+1) + (j+1));

	*(A + (N+2)*(i+1) + (j+1)) =  0.2*(old) 
								+ 0.2*(*(A + (N+2)*(i+2) + (j+1)))
   								+ 0.2*(*(A + (N+2)*(i) + (j+1))) 
								+ 0.2*(*(A + (N+2)*(i+1) + (j+2))) 
								+ 0.2*(*(A + (N+2)*(i+1) + (j)));
	
	atomicAdd(diff, fabs(*(A + (N+2)*(i+1) + (j+1)) - old));

	return;
}

int main(void){
	float *A, *diff, gpuTime;
	int i, j, N, it;
	cudaEvent_t start, end;

	printf ("Dimensione della matrice escluse le condizioni al contorno (la matrice completa sarà qundi (N+2)*(N+2)): ");
  	scanf("%d", &N);

	cudaMallocManaged (&A, sizeof(float) * (N+2) * (N+2));
	cudaMallocManaged (&diff, sizeof(float));
	cudaDeviceSynchronize ();


	for(i = 1; i < (N+1); i++){
    	for(j = 1; j < (N+1); j++){
       		*(A + (N+2)*i + j) = 0;
   		}
 	}

 	for(i = 0; i < (N+2); i++){
    	*(A + (N+2)*i + 0) = i + 1;
   		*(A + (N+2)*i + (N+1)) = i + 1;
 	}

  	for(j = 0; j < (N+2); j++){
      	*(A + (N+2)*0 + j) = 1;
      	*(A + (N+2)*(N+1) + j) = N + 2;
  	}

	dim3 blocksPerGrid   ((int)(N/32 + 1), (int)(N/32 + 1), 1);
	dim3 threadsPerBlock (16, 32, 1);
	cudaEventCreate (&start);
  	cudaEventCreate (&end);
 	cudaEventRecord (start);
	do{
		it++;
    	*diff = 0;
 		diff_eq <<< blocksPerGrid, threadsPerBlock>>> (A, it, diff, N);
		cudaDeviceSynchronize();
		it++;
		diff_eq <<< blocksPerGrid, threadsPerBlock>>> (A, it, diff, N);
		cudaDeviceSynchronize();
	}while (((*diff / NORM) > TOLERANCE) && ((it / 2) < MAXITER));
 	cudaEventRecord (end);
 	cudaDeviceSynchronize ();

  	cudaEventElapsedTime (&gpuTime, start, end);

  	if(N <= 19){
		for(i = 0; i < (N+2); i++){
			for(j = 0; j < (N+2); j++){
				printf("%6.3f ",*(A + (N+2)*i + j));
			}
			printf("\n");
		}
  	}

	printf("\nIterazioni = %d\n", (int)(it / 2));
	printf ("Tempo impiegato: %.2f ms\n", gpuTime);
	
	cudaFree(A);
    cudaFree(diff);

	return 0;
}

	.file	"tmpxft_00227530_00000000-6_eq_cuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z30__device_stub__Z7diff_eqPfiS_iPfiS_i
	.type	_Z30__device_stub__Z7diff_eqPfiS_iPfiS_i, @function
_Z30__device_stub__Z7diff_eqPfiS_iPfiS_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 16(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7diff_eqPfiS_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z30__device_stub__Z7diff_eqPfiS_iPfiS_i, .-_Z30__device_stub__Z7diff_eqPfiS_iPfiS_i
	.globl	_Z7diff_eqPfiS_i
	.type	_Z7diff_eqPfiS_i, @function
_Z7diff_eqPfiS_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z7diff_eqPfiS_iPfiS_i
	.cfi_endproc
.LFE2053:
	.size	_Z7diff_eqPfiS_i, .-_Z7diff_eqPfiS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Dimensione della matrice escluse le condizioni al contorno (la matrice completa sar\303\240 qundi (N+2)*(N+2)): "
.LC1:
	.string	"%d"
.LC5:
	.string	"\nIterazioni = %d\n"
.LC6:
	.string	"Tempo impiegato: %.2f ms\n"
.LC7:
	.string	"%6.3f "
.LC8:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	12(%rsp), %rsi
	leaq	.LC1(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	12(%rsp), %eax
	leaq	16(%rsp), %rdi
	movl	$1, %edx
	leal	2(%rax), %esi
	movslq	%esi, %rsi
	imulq	%rsi, %rsi
	salq	$2, %rsi
	call	cudaMallocManaged@PLT
	movl	$1, %edx
	movl	$4, %esi
	leaq	24(%rsp), %rdi
	call	cudaMallocManaged@PLT
	call	cudaDeviceSynchronize@PLT
	movslq	12(%rsp), %r11
	movq	16(%rsp), %rdx
	movl	$1, %r10d
	leal	-1(%r11), %eax
	leaq	8(,%r11,4), %r9
	movq	%r11, %rsi
	leaq	4(,%rax,4), %rbp
	leaq	4(%rdx,%r9), %r8
	xorl	%eax, %eax
.L9:
	cmpl	%r10d, %esi
	jl	.L33
	movq	%r8, %rdi
	movq	%rbp, %rcx
	incl	%r10d
	addq	%r9, %r8
	rep stosb
	jmp	.L9
.L33:
	movq	%rdx, %rcx
	xorl	%eax, %eax
	leal	1(%rsi), %edi
.L11:
	cmpl	%eax, %edi
	jl	.L34
	incl	%eax
	cvtsi2ssl	%eax, %xmm0
	movss	%xmm0, (%rcx)
	movss	%xmm0, 4(%rcx,%r11,4)
	addq	%r9, %rcx
	jmp	.L11
.L34:
	leal	2(%rsi), %ecx
	movl	%edi, %eax
	movss	.LC2(%rip), %xmm0
	imull	%ecx, %eax
	cltq
	leaq	(%rdx,%rax,4), %r8
	xorl	%eax, %eax
.L13:
	cmpl	%eax, %edi
	jl	.L35
	cvtsi2ssl	%ecx, %xmm1
	movss	%xmm0, (%rdx,%rax,4)
	movss	%xmm1, (%r8,%rax,4)
	incq	%rax
	jmp	.L13
.L35:
	movl	%esi, %eax
	movl	$32, %ecx
	leaq	32(%rsp), %rdi
	xorl	%ebp, %ebp
	cltd
	movl	$1, 56(%rsp)
	idivl	%ecx
	movl	$1, 68(%rsp)
	movl	%eax, %esi
	movabsq	$137438953488, %rax
	incl	%esi
	movq	%rax, 60(%rsp)
	movl	%esi, 48(%rsp)
	movl	%esi, 52(%rsp)
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
.L17:
	movq	24(%rsp), %rax
	movl	68(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	movl	$0x00000000, (%rax)
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movl	12(%rsp), %ecx
	movq	24(%rsp), %rdx
	leal	1(%rbp,%rbx), %esi
	movq	16(%rsp), %rdi
	call	_Z30__device_stub__Z7diff_eqPfiS_iPfiS_i
.L15:
	call	cudaDeviceSynchronize@PLT
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r8d, %r8d
	addl	$2, %ebx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movl	12(%rsp), %ecx
	movq	24(%rsp), %rdx
	movl	%ebx, %esi
	movq	16(%rsp), %rdi
	call	_Z30__device_stub__Z7diff_eqPfiS_iPfiS_i
.L16:
	call	cudaDeviceSynchronize@PLT
	movl	12(%rsp), %eax
	addl	$2, %ebp
	imull	%eax, %eax
	cvtsi2ssl	%eax, %xmm1
	movq	24(%rsp), %rax
	movss	(%rax), %xmm0
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	comisd	.LC4(%rip), %xmm0
	jbe	.L26
	cmpl	$1999999, %ebx
	jle	.L17
.L26:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	call	cudaDeviceSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	8(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	cmpl	$19, 12(%rsp)
	jle	.L24
.L22:
	movl	%ebx, %eax
	movl	$2, %ecx
	movl	$2, %edi
	cltd
	leaq	.LC5(%rip), %rsi
	idivl	%ecx
	movl	%eax, %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	8(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L24:
	xorl	%r12d, %r12d
	leaq	.LC7(%rip), %rbp
.L19:
	movl	12(%rsp), %eax
	incl	%eax
	cmpl	%r12d, %eax
	jl	.L22
	xorl	%r13d, %r13d
.L21:
	movl	12(%rsp), %ecx
	leal	1(%rcx), %eax
	cmpl	%r13d, %eax
	jl	.L36
	addl	$2, %ecx
	movq	16(%rsp), %rax
	movq	%rbp, %rsi
	movl	$2, %edi
	imull	%r12d, %ecx
	movslq	%ecx, %rcx
	addq	%r13, %rcx
	incq	%r13
	cvtss2sd	(%rax,%rcx,4), %xmm0
	movb	$1, %al
	call	__printf_chk@PLT
	jmp	.L21
.L36:
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%r12d
	call	__printf_chk@PLT
	jmp	.L19
.L23:
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z7diff_eqPfiS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7diff_eqPfiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1065353216
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	-400107883
	.long	1041313291
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>

#define MAXITER 1000000
#define TOLERANCE 0.000000001
#define NORM (N*N)


__global__ void diff_eq (float *A, int it, float *diff, int N) {
	int j;
	int i = (blockIdx.y * blockDim.y + threadIdx.y);
	float old;

	if((it%2) != (i%2)){
   		j = 2*(blockIdx.x * blockDim.x + threadIdx.x);		
   	}else{
   		j = 2*(blockIdx.x * blockDim.x + threadIdx.x) + 1;
   	}

	if((j >= N) || (i >= N)){
		return;
	}
	
	old = *(A + (N+2)*(i+1) + (j+1));

	*(A + (N+2)*(i+1) + (j+1)) =  0.2*(old) 
								+ 0.2*(*(A + (N+2)*(i+2) + (j+1)))
   								+ 0.2*(*(A + (N+2)*(i) + (j+1))) 
								+ 0.2*(*(A + (N+2)*(i+1) + (j+2))) 
								+ 0.2*(*(A + (N+2)*(i+1) + (j)));
	
	atomicAdd(diff, fabs(*(A + (N+2)*(i+1) + (j+1)) - old));

	return;
}

int main(void){
	float *A, *diff, gpuTime;
	int i, j, N, it;
	hipEvent_t start, end;

	printf ("Dimensione della matrice escluse le condizioni al contorno (la matrice completa sarà qundi (N+2)*(N+2)): ");
  	scanf("%d", &N);

	hipMallocManaged (&A, sizeof(float) * (N+2) * (N+2));
	hipMallocManaged (&diff, sizeof(float));
	hipDeviceSynchronize ();


	for(i = 1; i < (N+1); i++){
    	for(j = 1; j < (N+1); j++){
       		*(A + (N+2)*i + j) = 0;
   		}
 	}

 	for(i = 0; i < (N+2); i++){
    	*(A + (N+2)*i + 0) = i + 1;
   		*(A + (N+2)*i + (N+1)) = i + 1;
 	}

  	for(j = 0; j < (N+2); j++){
      	*(A + (N+2)*0 + j) = 1;
      	*(A + (N+2)*(N+1) + j) = N + 2;
  	}

	dim3 blocksPerGrid   ((int)(N/32 + 1), (int)(N/32 + 1), 1);
	dim3 threadsPerBlock (16, 32, 1);
	hipEventCreate (&start);
  	hipEventCreate (&end);
 	hipEventRecord (start);
	do{
		it++;
    	*diff = 0;
 		diff_eq <<< blocksPerGrid, threadsPerBlock>>> (A, it, diff, N);
		hipDeviceSynchronize();
		it++;
		diff_eq <<< blocksPerGrid, threadsPerBlock>>> (A, it, diff, N);
		hipDeviceSynchronize();
	}while (((*diff / NORM) > TOLERANCE) && ((it / 2) < MAXITER));
 	hipEventRecord (end);
 	hipDeviceSynchronize ();

  	hipEventElapsedTime (&gpuTime, start, end);

  	if(N <= 19){
		for(i = 0; i < (N+2); i++){
			for(j = 0; j < (N+2); j++){
				printf("%6.3f ",*(A + (N+2)*i + j));
			}
			printf("\n");
		}
  	}

	printf("\nIterazioni = %d\n", (int)(it / 2));
	printf ("Tempo impiegato: %.2f ms\n", gpuTime);
	
	hipFree(A);
    hipFree(diff);

	return 0;
}

	.text
	.file	"eq_cuda.hip"
	.globl	_Z22__device_stub__diff_eqPfiS_i # -- Begin function _Z22__device_stub__diff_eqPfiS_i
	.type	_Z22__device_stub__diff_eqPfiS_i,@function
_Z22__device_stub__diff_eqPfiS_i:       # @_Z22__device_stub__diff_eqPfiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7diff_eqPfiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__diff_eqPfiS_i, .Lfunc_end0-_Z22__device_stub__diff_eqPfiS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x3e112e0be826d695              # double 1.0000000000000001E-9
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	4(%rsp), %rbx
	movl	$.L.str.1, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	(%rbx), %rsi
	addq	$2, %rsi
	imulq	%rsi, %rsi
	shlq	$2, %rsi
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %rdi
	movl	$4, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	callq	hipDeviceSynchronize
	movslq	(%rbx), %r15
	movl	%r15d, %r13d
	testq	%r15, %r15
	jle	.LBB1_1
# %bb.21:                               # %.preheader60.lr.ph
	movq	8(%rsp), %r12
	leal	2(%r13), %r14d
	addq	$4, %r12
	leaq	(,%r13,4), %rbx
	movq	%r13, 40(%rsp)                  # 8-byte Spill
	movl	%r14d, %ebp
.LBB1_22:                               # %._crit_edge
                                        # =>This Inner Loop Header: Depth=1
	movl	%ebp, %eax
	leaq	(%r12,%rax,4), %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	memset@PLT
	addl	%r14d, %ebp
	decq	%r13
	jne	.LBB1_22
# %bb.23:
	movq	40(%rsp), %r13                  # 8-byte Reload
	jmp	.LBB1_2
.LBB1_1:                                # %..preheader59_crit_edge
	leal	2(%r13), %r14d
.LBB1_2:                                # %.preheader59
	cmpl	$-1, %r13d
	jl	.LBB1_8
# %bb.3:                                # %.lr.ph68
	movq	8(%rsp), %rax
	movslq	%r14d, %rcx
	cmpl	$2, %ecx
	movl	$1, %edx
	cmovgel	%r14d, %edx
	shlq	$2, %rcx
	xorl	%esi, %esi
.LBB1_4:                                # =>This Inner Loop Header: Depth=1
	incq	%rsi
	xorps	%xmm0, %xmm0
	cvtsi2ss	%esi, %xmm0
	movss	%xmm0, (%rax)
	movss	%xmm0, 4(%rax,%r15,4)
	addq	%rcx, %rax
	cmpq	%rsi, %rdx
	jne	.LBB1_4
# %bb.5:                                # %.preheader58
	cmpl	$-1, %r15d
	jl	.LBB1_8
# %bb.6:                                # %.lr.ph71
	movq	8(%rsp), %rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r14d, %xmm0
	leal	1(%r15), %ecx
	imull	%r14d, %ecx
	movslq	%ecx, %rcx
	leaq	(%rax,%rcx,4), %rcx
	cmpl	$2, %r14d
	movl	$1, %edx
	cmovgel	%r14d, %edx
	xorl	%esi, %esi
.LBB1_7:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rax,%rsi,4)      # imm = 0x3F800000
	movss	%xmm0, (%rcx,%rsi,4)
	incq	%rsi
	cmpq	%rsi, %rdx
	jne	.LBB1_7
.LBB1_8:                                # %._crit_edge72
	movabsq	$137438953488, %r14             # imm = 0x2000000010
	leal	31(%r15), %eax
	testl	%r15d, %r15d
	cmovnsl	%r15d, %eax
	sarl	$5, %eax
	incl	%eax
	movq	%rax, %r15
	shlq	$32, %r15
	orq	%rax, %r15
	leaq	48(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	leaq	32(%rsp), %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rax
                                        # implicit-def: $r12d
.LBB1_9:                                # =>This Inner Loop Header: Depth=1
	movl	$0, (%rax)
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_11
# %bb.10:                               #   in Loop: Header=BB1_9 Depth=1
	leal	1(%r12), %esi
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rdx
	movl	4(%rsp), %ecx
	callq	_Z22__device_stub__diff_eqPfiS_i
.LBB1_11:                               #   in Loop: Header=BB1_9 Depth=1
	callq	hipDeviceSynchronize
	leal	2(%r12), %ebx
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_13
# %bb.12:                               #   in Loop: Header=BB1_9 Depth=1
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rdx
	movl	4(%rsp), %ecx
	movl	%ebx, %esi
	callq	_Z22__device_stub__diff_eqPfiS_i
.LBB1_13:                               #   in Loop: Header=BB1_9 Depth=1
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rax
	movss	(%rax), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movl	4(%rsp), %ecx
	imull	%ecx, %ecx
	xorps	%xmm1, %xmm1
	cvtsi2ss	%ecx, %xmm1
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	ucomisd	.LCPI1_0(%rip), %xmm0
	jbe	.LBB1_15
# %bb.14:                               #   in Loop: Header=BB1_9 Depth=1
	cmpl	$1999998, %r12d                 # imm = 0x1E847E
	movl	%ebx, %r12d
	jl	.LBB1_9
.LBB1_15:                               # %.critedge
	movq	32(%rsp), %rdi
	xorl	%r14d, %r14d
	xorl	%esi, %esi
	callq	hipEventRecord
	callq	hipDeviceSynchronize
	movq	48(%rsp), %rsi
	movq	32(%rsp), %rdx
	leaq	28(%rsp), %rdi
	callq	hipEventElapsedTime
	movl	4(%rsp), %eax
	leal	1(%rax), %ecx
	cmpl	$20, %ecx
	ja	.LBB1_20
.LBB1_16:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_18 Depth 2
	cmpl	$-1, %eax
	jl	.LBB1_19
# %bb.17:                               # %.lr.ph74.preheader
                                        #   in Loop: Header=BB1_16 Depth=1
	addl	$2, %eax
	xorl	%r15d, %r15d
.LBB1_18:                               # %.lr.ph74
                                        #   Parent Loop BB1_16 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	%r14d, %eax
	cltq
	shlq	$2, %rax
	addq	8(%rsp), %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%r15,4), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	movslq	4(%rsp), %rax
	addq	$2, %rax
	cmpq	%rax, %r15
	jl	.LBB1_18
.LBB1_19:                               # %._crit_edge75
                                        #   in Loop: Header=BB1_16 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	leal	1(%r14), %ecx
	movl	4(%rsp), %eax
	cmpl	%eax, %r14d
	movl	%ecx, %r14d
	jle	.LBB1_16
.LBB1_20:                               # %.loopexit
	movl	%ebx, %esi
	shrl	$31, %esi
	addl	%ebx, %esi
	sarl	%esi
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	28(%rsp), %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7diff_eqPfiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7diff_eqPfiS_i,@object        # @_Z7diff_eqPfiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z7diff_eqPfiS_i
	.p2align	3, 0x0
_Z7diff_eqPfiS_i:
	.quad	_Z22__device_stub__diff_eqPfiS_i
	.size	_Z7diff_eqPfiS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Dimensione della matrice escluse le condizioni al contorno (la matrice completa sar\303\240 qundi (N+2)*(N+2)): "
	.size	.L.str, 107

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%6.3f "
	.size	.L.str.2, 7

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\nIterazioni = %d\n"
	.size	.L.str.4, 18

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Tempo impiegato: %.2f ms\n"
	.size	.L.str.5, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7diff_eqPfiS_i"
	.size	.L__unnamed_1, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__diff_eqPfiS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7diff_eqPfiS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7diff_eqPfiS_i        ; -- Begin function _Z7diff_eqPfiS_i
	.globl	_Z7diff_eqPfiS_i
	.p2align	8
	.type	_Z7diff_eqPfiS_i,@function
_Z7diff_eqPfiS_i:                       ; @_Z7diff_eqPfiS_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x2c
	v_bfe_u32 v3, v0, 10, 10
	s_load_b32 s4, s[0:1], 0x8
	v_and_b32_e32 v0, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_load_b32 s3, s[0:1], 0x18
	s_lshr_b32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s5, s4, s5
	s_and_b32 s5, s5, -2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 31, v1
	v_add_nc_u32_e32 v2, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, -2, v2
	v_sub_nc_u32_e32 v4, v1, v2
	v_mad_u64_u32 v[2:3], null, s14, s2, v[0:1]
	s_sub_i32 s2, s4, s5
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, s2, v4
	s_mov_b32 s2, exec_lo
	v_cndmask_b32_e64 v0, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_or_b32 v0, v2, 1, v0
	v_max_i32_e32 v2, v1, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s3, v2
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_add_i32 s3, s3, 2
	s_load_b64 s[4:5], s[0:1], 0x0
	v_mul_lo_u32 v3, v1, s3
	v_ashrrev_i32_e32 v1, 31, v0
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_nc_u32_e32 v4, s3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, s3, v4
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v6, vcc_lo
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_co_u32 v0, vcc_lo, v0, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v8, vcc_lo
	global_load_b32 v9, v[0:1], off offset:4
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, v0, v7
	v_add_co_ci_u32_e32 v6, vcc_lo, v1, v8, vcc_lo
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b96 v[0:2], v[5:6], off
	v_add_co_u32 v3, vcc_lo, v3, v7
	v_add_co_ci_u32_e32 v4, vcc_lo, v4, v8, vcc_lo
	s_mov_b32 s4, 0x9999999a
	s_mov_b32 s5, 0x3fc99999
	global_load_b32 v10, v[3:4], off offset:4
	s_waitcnt vmcnt(2)
	v_cvt_f64_f32_e32 v[3:4], v9
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[7:8], v1
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[9:10], v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[3:4], v[3:4], s[4:5]
	v_fma_f64 v[3:4], v[7:8], s[4:5], v[3:4]
	v_cvt_f64_f32_e32 v[7:8], v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[9:10], s[4:5], v[3:4]
	v_fma_f64 v[2:3], v[7:8], s[4:5], v[2:3]
	v_cvt_f64_f32_e32 v[7:8], v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[7:8], s[4:5], v[2:3]
	v_cvt_f32_f64_e32 v3, v[2:3]
	v_bfrev_b32_e32 v2, 1
	s_delay_alu instid0(VALU_DEP_2)
	v_sub_f32_e32 v0, v3, v1
	global_store_b32 v[5:6], v3, off offset:4
	v_and_b32_e32 v0, 0x7fffffff, v0
.LBB0_2:                                ; %ComputeLoop
                                        ; =>This Inner Loop Header: Depth=1
	s_ctz_i32_b32 s3, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_readlane_b32 s4, v0, s3
	s_lshl_b32 s3, 1, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s2, s2, s3
	s_cmp_lg_u32 s2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v2, s4, v2
	s_cbranch_scc1 .LBB0_2
; %bb.3:                                ; %ComputeEnd
	v_mbcnt_lo_u32_b32 v0, exec_lo, 0
	s_mov_b32 s2, 0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB0_6
; %bb.4:
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mov_b32_e32 v3, 0
	s_waitcnt lgkmcnt(0)
	global_load_b32 v1, v3, s[0:1]
.LBB0_5:                                ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v1, v2
	global_atomic_cmpswap_b32 v0, v3, v[0:1], s[0:1] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v1
	v_mov_b32_e32 v1, v0
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_5
.LBB0_6:                                ; %Flow54
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7diff_eqPfiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7diff_eqPfiS_i, .Lfunc_end0-_Z7diff_eqPfiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 668
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7diff_eqPfiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7diff_eqPfiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
