/**
 * Programma che simula il comportamento del gpdt per 
 * la risoluzione di un kernel di una serie di
 * valori di dimensione variabile utilizzando la 
 * tecnologia cuda.
 * compilare con:
 * nvcc -o simil_gpdt_si_cuda simil_gpdt_si_cuda.cu
 * lanciare con:
 * ./simil_gpdt_si_cuda [numero vettori] [numero componenti] [numero di righe da calcolare] [tipo di kernel] [grado(int)/sigma(float)]
 **/

#include <iostream>
#include <ctime>
#include <cstdlib>
#include <cstdio>
#include <math.h>
#include <cuda.h>
using namespace std;

/**
 * Funzione che riempie i vettori con numeri
 * casuali compresi tra 0 e 99.
 **/ 
void riempi_vettori(float *vettori, int Nr_vet_elem, int Nr_vet_comp)
{
	for (int i = 0; i < Nr_vet_elem; i++)
		for(int j = 0; j < Nr_vet_comp; j++)
			vettori[i * Nr_vet_comp + j] = i * 2 + j; //j % 4; //
}

/**
 * Funzione che crea dei vettori contenente i valori significativi su cui 
 * calcolare la norma 2 al quadrato.
 **/
void crea_vettori_termini_noti(int *vettori, int Nr_vet_elem, int Nr_vet_comp)
{
	for (int i = 0; i < Nr_vet_elem; i++)
		for(int j = 0; j < Nr_vet_comp; j++)
			vettori[i * Nr_vet_comp + j] = (j+1)*3;
}

/**
 * Funzione che crea un vettore contenente il numero di valori significative.
 **/
void crea_vettori_posizioni(int *vettore, int Nr_vet_elem, int numero_val)
{
	for (int i = 0; i < Nr_vet_elem; i++)
		vettore[i] = numero_val;
}

/**
 * kernel per il calcolo delle norme al quadrato dei vettori.
 **/
__global__ void Kernel_norme(float *Vd, float *Nd, int *Vp, int *Vnp, int N, int C, int nr_max_val)
{
	long int x = threadIdx.x + blockIdx.x * blockDim.x;
	
	int pos;
	
	if(x < N)
	{
		float norma = 0;
		
		int Nr_val = Vnp[x];
		
		for(int i = 0; i < Nr_val; i++)
		{
			pos = Vp[x * nr_max_val + i];
			norma = norma + (Vd[x * C + pos] * Vd[x * C + pos]);
		}
		
		Nd[x] = norma;
	}
	
} 

/**
 * Kernel per il calcolo del del guassiano, basato sul metodo utilizzato nel gpdt, 
 * modificato per l'utilizzo con la tecnologia CUDA.
 **/
__global__ void Kernel_gaus(float *Vd, float *Ris, float *Nd, int N, int C, int dim_indici, int *ind, float sigma, int *Vp, int *Vnp, int nr_max_val)
{
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;

	int j;
	int pos;
	int tmp_ind;
	float gaus;
	
	for ( ; x < N ; x+=blockDim.x * gridDim.x)
	{
	    for( ; y < dim_indici; y+=blockDim.y * gridDim.y)
	    {
		      tmp_ind = ind[y];
		    
		      gaus = 0.0;
		      
		      int Nr_val = Vnp[x];
		      
		      for(j = 0; j < Nr_val; j++)
		      {
			      pos = Vp[x * nr_max_val + j];
			      gaus = gaus + (Vd[x * C + pos] * Vd[tmp_ind * C + pos]);
		      }
		      
		      gaus = - 2.0*gaus +Nd[x] + Nd[tmp_ind];
		      gaus = (exp(-gaus*sigma));

		      //Ris[x * dim_indici + y] = gaus;
		      Ris[y * N + x] = gaus;
	    }
	}
}

/**
 * Kernel per il calcolo del kernel lineare 
 * modificato per l'utilizzo con la tecnologia CUDA.
 **/
__global__ void Kernel_lineare(float *Vd, float *Ris, int N, int C, int dim_indici, int *ind, int *Vp, int *Vnp, int nr_max_val)
{
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;

	int j;
	int pos;
	int tmp_ind;
	float lin;
	
	for ( ; x < N ; x+=blockDim.x * gridDim.x)
	{
	    for( ; y < dim_indici; y+=blockDim.y * gridDim.y)
	    {
		      tmp_ind = ind[y];
		    
		      lin = 0.0;
		      
		      int Nr_val = Vnp[x];
		      
		      for(j = 0; j < Nr_val; j++)
		      {
			      pos = Vp[x * nr_max_val + j];
			      lin =  lin + (Vd[x * C + pos] * Vd[tmp_ind * C + pos]);
		      }

		      //Ris[x * dim_indici + y] = lin;
		      Ris[y * N + x ] = lin;
	    }
	}
}


/**
 * Kernel per il calcolo del kernel lineare 
 * modificato per l'utilizzo con la tecnologia CUDA.
 **/
__global__ void Kernel_polimoniale(float *Vd, float *Ris, int N, int C, int dim_indici, int *ind, int *Vp, int *Vnp, int nr_max_val, int s)
{
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;

	int j;
	int pos;
	int tmp_ind;
	float pol;
	float tmp;
	
	for ( ; x < N ; x+=blockDim.x * gridDim.x)
	{
	    for( ; y < dim_indici; y+=blockDim.y * gridDim.y)
	    {
		      tmp_ind = ind[y];
			  
			  tmp = 1.0;
			  
		      pol = 0.0;
		      
		      int Nr_val = Vnp[x];
		      
		      for(j = 0; j < Nr_val; j++)
		      {
			      pos = Vp[x * nr_max_val + j];
			      pol = pol + (Vd[x * C + pos] * Vd[tmp_ind * C + pos]);
		      }
		      
		      pol = pol + 1;
		      
		      for(j = 0; j < s; j++)
		      {
				tmp = tmp * pol;
			  }

		      //Ris[x * dim_indici + y] = tmp;
		      Ris[y * N + x ] = tmp;
	    }
	}
}



int main(int argc, char** argv)

{	
	/**
	 * Variabile contenente la percentuale dei valori significativi 
	 * all'interno dei vettori.
	 **/
	float perc_val_noti= 1.0 - 0.82;
	
	/**
	 * Matrice contenente i vettori da cui calcolare la differeza 
	 * per calcolarne le norme.
	 * Il numero di vettori e la dimensione degli stessi viene definita
	 * dall'utente.
	 **/
	float *vettori;
	
	/**
	 * Matrice contenente le posizioni all'interno del vettore contenente
	 * le posizioni dei valori significativi.
	 **/
	 int *vettore_posizioni;
	
	/**
	 * Vettore contenente il numero di valori non nulli nel vettore.
	 **/
	int *vett_numero_posizioni;
	
	/**
	 * vettore contenente le norme 2 al quadreato dei vettori.
	 **/
	float *vett_norme;
	
	/**
	 * Matrice contenente i risultati.
	 **/
	float *risultati;
	
	/**
	 * 
	 **/
	int *indici; 
	
	/**
	 * Tempo impiegato per il calcolo
	 **/
	float elapsedTime;
	cudaEvent_t start, stop;
	
	//nr di vettori e di elementi.
	int Nr_vet_elem = atoi(argv[1]);
	int Nr_vet_comp = atoi(argv[2]);
	
	//Numero di righe da calcolare.
	int Nr_righe = atoi(argv[3]);
	
	/**
	 * Numero per la selezione del kernel.
	 * 1 = kernel lineare.
	 * 2 = kernel polimoniale.
	 * 3 = kernel gaussiano.
	 **/
	int sel_kernel = atoi(argv[4]);
	
	/**
	 * Sigma della funzione gaussiana.
	 **/
	//float sigma = atoi(argv[5]);
	//sigma = (1.0/(2.0*sigma*sigma));
	
	//Copia per il device.
	float *Vd;
	int *Vp;
	int *Vnp;
	float *Nd;
	float *Ris;
	int *ind;
	
	//Variabili per il controllo della memoria disponibile.
	size_t free_byte;
	size_t total_byte;
	
	/**
	 * Variabile contenente il numero dei valori significativi.
	 **/
	int numero_val_significativi = Nr_vet_comp * perc_val_noti;
	
	//Spazio necessario per l'allocazione dei vettori.
	int tot_vett_size = Nr_vet_elem * Nr_vet_comp * sizeof(float);
	//Spazio necessario per l'allocazione della Matrice dei risultati.
	int norme_size = Nr_vet_elem * sizeof(float);
	//Spazio necessario per l'allocazione della Matrice delle posizioni.
	int vett_pos_size = Nr_vet_elem * numero_val_significativi * sizeof(int);
	//Spazio necessario per l'allocazione del vettore con il numero dei valori significativi.
	int vett_nrpos_size = Nr_vet_elem * sizeof(int);
	//Spazio necessario per l'allocazione di una colonna.
	int col_size = Nr_vet_elem * sizeof(float);
	
	
	
	//Allocazione.
	vettori = (float*)malloc(tot_vett_size);
	vett_norme = (float*)malloc(norme_size);
	vettore_posizioni = (int*)malloc(vett_pos_size);
	vett_numero_posizioni = (int*)malloc(vett_nrpos_size);
	
	
	
	//Allocazione nel device.
	cudaMalloc((void **)&Vd, tot_vett_size);
	cudaMalloc((void **)&Nd, norme_size);
	cudaMalloc((void **)&Vp, vett_pos_size);
	cudaMalloc((void **)&Vnp, vett_nrpos_size);
	
	srand(time(0));
	
	//Riempimento dei vettori.
	riempi_vettori(vettori, Nr_vet_elem, Nr_vet_comp);
	//Riempimento dei vettori delle posizioni.
	crea_vettori_termini_noti(vettore_posizioni, Nr_vet_elem, numero_val_significativi);
	//Riempimento del vettore contenente il numero dei valori significativi.
	crea_vettori_posizioni(vett_numero_posizioni, Nr_vet_elem, numero_val_significativi);
		
	//trasferimento dei vettori nel device.
	cudaMemcpy(Vd, vettori, tot_vett_size, cudaMemcpyHostToDevice);
	//trasferimento dei vettori delle posizioni nel device.
	cudaMemcpy(Vp, vettore_posizioni, vett_pos_size, cudaMemcpyHostToDevice);
	//trasferimento del vettore conentente il numero di valori all'interno di ogni singolo vettore.
	cudaMemcpy(Vnp, vett_numero_posizioni, vett_nrpos_size, cudaMemcpyHostToDevice);
	
	cudaMemGetInfo( &free_byte, &total_byte );
	
	int col_ospitabili_mem = (free_byte*0.7)/col_size;
	
	int contatore = 0;
	
	/**
	 * Valori impostati per ottimizzare il funzionamento del device.
	 * Questi valori sono basati sull'utilizzo di una Nvidia 230m.
	 **/
	int dimXX =4;
	int dimYY =128;
	
	/**
	 * Numero di colonne ospitabili calcolabili dal kernel contemporaneamente.
	 * Purtroppo a causa del fatto che il kernel CUDA fallisca in automatico
	 * se impiega più di 5 secondi per il calcolo, è necessario inserire un 
	 * limitatore per il calcolo.
	 * Questo valore è basato sull'utilizzo di una Nvidia 230m.
	 **/
	 
	
	int col_ospitabili = 200;
	
	if (col_ospitabili > Nr_righe)
	{
		col_ospitabili = Nr_righe;
	} 
	
	if (col_ospitabili > col_ospitabili_mem)
	{
		col_ospitabili = col_ospitabili_mem;
	}
	
	int numero_cicli = Nr_righe/col_ospitabili;
	cout<<"Numero cicli necessari: "<<numero_cicli<<endl;
	
	int risultati_size = Nr_righe * Nr_vet_elem * sizeof(float);
	int indici_size = col_ospitabili * sizeof(int);
	
	int risultati_part_size = col_ospitabili * Nr_vet_elem * sizeof(float);
	
	risultati = (float*)malloc(risultati_size);
	indici = (int*)malloc(indici_size);
	
	int numSMs;
	cudaDeviceGetAttribute(&numSMs, cudaDevAttrMultiProcessorCount, 0);
	
	cudaMalloc((void **)&Ris, risultati_part_size);
	cudaMalloc((void **)&ind, indici_size);
	
	dim3 blockGridRows;
	
	blockGridRows.x=Nr_vet_elem/dimXX + (Nr_vet_elem%dimXX== 0?0:1);;
	blockGridRows.y=col_ospitabili/dimYY + (col_ospitabili%dimYY== 0?0:1);
	
	dim3 threadBlockRows;
	threadBlockRows.x=dimXX;
	threadBlockRows.y=dimYY;
	
	cout<<"Memoria allocata, griglie definite:"<<endl;
	cout<<"blockGridRows.x: "<<blockGridRows.x<<endl;
	cout<<"blockGridRows.y: "<<blockGridRows.y<<endl;
	cout<<"threadBlockRows.x: "<<threadBlockRows.x<<endl;
	cout<<"threadBlockRows.y: "<<threadBlockRows.y<<endl;
	
	int cicle_dim = col_ospitabili * Nr_vet_elem * sizeof(float);
	
	dim3 blockGridRowsn(Nr_vet_elem, 1);
	
	int resto;
	
	cudaEventCreate(&start);
	cudaEventRecord(start,0);
	
	switch(sel_kernel){
			case(1):{
				//cout<<"Kernel Lineare\n";
							
				for(int i = 0; i < numero_cicli; i++)
				{
					for (int kk = 0; kk < col_ospitabili; kk++)
					{
						indici[kk] = contatore + kk;
					}
					
					cudaMemcpy(ind, indici, indici_size, cudaMemcpyHostToDevice);
					
					//__global__ void Kernel_lineare(float *Vd, float *Ris, int N, int C, int dim_indici, int *ind, int *Vp, int *Vnp, int nr_max_val)
					Kernel_lineare<<< blockGridRows, threadBlockRows>>>(Vd, Ris, Nr_vet_elem, Nr_vet_comp, col_ospitabili, ind, Vp, Vnp, numero_val_significativi);
					
					cudaMemcpy(risultati+(i*col_ospitabili*Nr_vet_elem), Ris, cicle_dim, cudaMemcpyDeviceToHost);
					
					contatore = contatore + col_ospitabili;
				}
				
				resto = Nr_righe - contatore;
				
				if (resto > 0)
				{
					for (int kk = 0; kk < resto; kk++)
					{
						indici[kk] = contatore + kk;
					}
					
					cudaMemcpy(ind, indici, indici_size, cudaMemcpyHostToDevice);
					
					Kernel_lineare<<< blockGridRows, threadBlockRows>>>(Vd, Ris, Nr_vet_elem, Nr_vet_comp, resto, ind, Vp, Vnp, numero_val_significativi);
					
					cudaMemcpy(risultati+(numero_cicli)*(col_ospitabili*Nr_vet_elem), Ris, resto * Nr_vet_elem * sizeof(float), cudaMemcpyDeviceToHost);
					
				}
				
				break;
			}
			
			case(2):{
				//cout<<"Kernel Polimoniale\n";
				/**
				 * Grado del kernel.
				 **/
				int grado = atoi(argv[5]);
				
				for(int i = 0; i < numero_cicli; i++)
				{
					for (int kk = 0; kk < col_ospitabili; kk++)
					{
						indici[kk] = contatore + kk;
					}
					
					cudaMemcpy(ind, indici, indici_size, cudaMemcpyHostToDevice);
					
					//__global__ void Kernel_polimoniale(float *Vd, float *Ris, int N, int C, int dim_indici, int *ind, int *Vp, int *Vnp, int nr_max_val, int s)
					Kernel_polimoniale<<< blockGridRows, threadBlockRows>>>(Vd, Ris, Nr_vet_elem, Nr_vet_comp, col_ospitabili, ind, Vp, Vnp, numero_val_significativi,grado);
					
					cudaMemcpy(risultati+(i*col_ospitabili*Nr_vet_elem), Ris, cicle_dim, cudaMemcpyDeviceToHost);
					
					contatore = contatore + col_ospitabili;
				}
				
				resto = Nr_righe - contatore;
				
				if (resto > 0)
				{
					for (int kk = 0; kk < resto; kk++)
					{
						indici[kk] = contatore + kk;
					}
					
					cudaMemcpy(ind, indici, indici_size, cudaMemcpyHostToDevice);
					
					Kernel_polimoniale<<< blockGridRows, threadBlockRows>>>(Vd, Ris, Nr_vet_elem, Nr_vet_comp, resto, ind, Vp, Vnp, numero_val_significativi,grado);
					
					cudaMemcpy(risultati+(numero_cicli)*(col_ospitabili*Nr_vet_elem), Ris, resto * Nr_vet_elem * sizeof(float), cudaMemcpyDeviceToHost);
					
				}
				
				break;
			}
			
			case(3):{
				//cout<<"Kernel gaussiano\n";
				
				/**
				* Sigma della funzione gaussiana.
				**/
				float sigma = atof(argv[5]);
				sigma = (1.0/(2.0*sigma*sigma));
				
				//calcolo norme.
				Kernel_norme<<< blockGridRowsn, 256 >>>(Vd, Nd, Vp, Vnp, Nr_vet_elem, Nr_vet_comp, numero_val_significativi);
				
				//calcolo kernel
				for(int i = 0; i < numero_cicli; i++)
				{
					for (int kk = 0; kk < col_ospitabili; kk++)
					{
						indici[kk] = contatore + kk;
					}
					
					cudaMemcpy(ind, indici, indici_size, cudaMemcpyHostToDevice);
					
					//Kernel_gaus(float *Vd, float *Ris, float *Nd, int N, int C, int dim_indici, int *ind, float sigma, float *Vp, float *Vnp)
					Kernel_gaus<<< blockGridRows, threadBlockRows>>>(Vd, Ris, Nd, Nr_vet_elem, Nr_vet_comp, col_ospitabili, ind, sigma, Vp, Vnp, numero_val_significativi);
					
					cudaMemcpy(risultati+(i*col_ospitabili*Nr_vet_elem), Ris, cicle_dim, cudaMemcpyDeviceToHost);
					
					contatore = contatore + col_ospitabili;
				}
				
				resto = Nr_righe - contatore;
				
				if (resto > 0)
				{
					for (int kk = 0; kk < resto; kk++)
					{
						indici[kk] = contatore + kk;
					}
					
					cudaMemcpy(ind, indici, indici_size, cudaMemcpyHostToDevice);
					
					Kernel_gaus<<< blockGridRows, threadBlockRows>>>(Vd, Ris, Nd, Nr_vet_elem, Nr_vet_comp, resto, ind, sigma, Vp, Vnp, numero_val_significativi);

					
					cudaMemcpy(risultati+(numero_cicli)*(col_ospitabili*Nr_vet_elem), Ris, resto * Nr_vet_elem * sizeof(float), cudaMemcpyDeviceToHost);
					
				}
				
				break;
			}
			
			default:
			{
			cout<<"Scelta non valida.\n";
			cout<<"4° argomento non esistente.\n";
			cout<<"1 = kernel lineare\t2 = kernel polimoniale\t 3 = kernel gaussiano\n";
			break;
			}
			
			
			
	}
	
	cudaEventCreate(&stop);
	cudaEventRecord(stop,0);
	cudaEventSynchronize(stop);
	
	cudaEventElapsedTime(&elapsedTime, start,stop);
	cout<<"Tempo totale:\t"<<elapsedTime/1000<<" secondi\n";
	
	/*for (int i = 0; i <  Nr_vet_elem*Nr_righe; i++)
	{
	  cout<<risultati[i]<<endl;
	}*/
	
	free(vettori);
	free(vett_norme);
	free(vettore_posizioni);
	free(vett_numero_posizioni);
	free(indici);
	free(risultati);
	
	cudaFree(Vd);
	cudaFree(Vp);
	cudaFree(Vnp);
	cudaFree(Nd);
	cudaFree(ind);
	cudaFree(Ris);
	
	return 0;
}

	.file	"tmpxft_00398c91_00000000-6_simil_gpdt_si_cuda.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3641:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3641:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4303:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4303:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z14riempi_vettoriPfii
	.type	_Z14riempi_vettoriPfii, @function
_Z14riempi_vettoriPfii:
.LFB3635:
	.cfi_startproc
	endbr64
	xorl	%r8d, %r8d
	xorl	%ecx, %ecx
.L4:
	cmpl	%esi, %ecx
	jge	.L3
	movslq	%r8d, %rax
	leal	(%rcx,%rcx), %r10d
	leaq	(%rdi,%rax,4), %r9
	xorl	%eax, %eax
.L7:
	cmpl	%eax, %edx
	jle	.L9
	leal	(%r10,%rax), %r11d
	cvtsi2ssl	%r11d, %xmm0
	movss	%xmm0, (%r9,%rax,4)
	incq	%rax
	jmp	.L7
.L9:
	incl	%ecx
	addl	%edx, %r8d
	jmp	.L4
.L3:
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z14riempi_vettoriPfii, .-_Z14riempi_vettoriPfii
	.globl	_Z25crea_vettori_termini_notiPiii
	.type	_Z25crea_vettori_termini_notiPiii, @function
_Z25crea_vettori_termini_notiPiii:
.LFB3636:
	.cfi_startproc
	endbr64
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
.L11:
	cmpl	%esi, %r9d
	jge	.L10
	movslq	%r8d, %rax
	leaq	(%rdi,%rax,4), %rcx
	xorl	%eax, %eax
.L14:
	cmpl	%edx, %eax
	jge	.L15
	incl	%eax
	addq	$4, %rcx
	leal	(%rax,%rax,2), %r10d
	movl	%r10d, -4(%rcx)
	jmp	.L14
.L15:
	incl	%r9d
	addl	%edx, %r8d
	jmp	.L11
.L10:
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z25crea_vettori_termini_notiPiii, .-_Z25crea_vettori_termini_notiPiii
	.globl	_Z22crea_vettori_posizioniPiii
	.type	_Z22crea_vettori_posizioniPiii, @function
_Z22crea_vettori_posizioniPiii:
.LFB3637:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L17:
	cmpl	%eax, %esi
	jle	.L19
	movl	%edx, (%rdi,%rax,4)
	incq	%rax
	jmp	.L17
.L19:
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z22crea_vettori_posizioniPiii, .-_Z22crea_vettori_posizioniPiii
	.globl	_Z42__device_stub__Z12Kernel_normePfS_PiS0_iiiPfS_PiS0_iii
	.type	_Z42__device_stub__Z12Kernel_normePfS_PiS0_iiiPfS_PiS0_iii, @function
_Z42__device_stub__Z12Kernel_normePfS_PiS0_iiiPfS_PiS0_iii:
.LFB3663:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z12Kernel_normePfS_PiS0_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L20:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z42__device_stub__Z12Kernel_normePfS_PiS0_iiiPfS_PiS0_iii, .-_Z42__device_stub__Z12Kernel_normePfS_PiS0_iiiPfS_PiS0_iii
	.globl	_Z12Kernel_normePfS_PiS0_iii
	.type	_Z12Kernel_normePfS_PiS0_iii, @function
_Z12Kernel_normePfS_PiS0_iii:
.LFB3664:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z12Kernel_normePfS_PiS0_iiiPfS_PiS0_iii
	.cfi_endproc
.LFE3664:
	.size	_Z12Kernel_normePfS_PiS0_iii, .-_Z12Kernel_normePfS_PiS0_iii
	.globl	_Z48__device_stub__Z11Kernel_gausPfS_S_iiiPifS0_S0_iPfS_S_iiiPifS0_S0_i
	.type	_Z48__device_stub__Z11Kernel_gausPfS_S_iiiPifS0_S0_iPfS_S_iiiPifS0_S0_i, @function
_Z48__device_stub__Z11Kernel_gausPfS_S_iiiPifS0_S0_iPfS_S_iiiPifS0_S0_i:
.LFB3665:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	240(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movq	248(%rsp), %rax
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rax, 8(%rsp)
	movq	256(%rsp), %rax
	movl	%ecx, 36(%rsp)
	leaq	72(%rsp), %rcx
	movl	%r8d, 32(%rsp)
	movl	%r9d, 28(%rsp)
	movq	%rax, (%rsp)
	movss	%xmm0, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 192(%rsp)
	movq	%rsp, %rax
	movq	%rax, 200(%rsp)
	leaq	264(%rsp), %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	72(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z11Kernel_gausPfS_S_iiiPifS0_S0_i(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 256
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L25:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3665:
	.size	_Z48__device_stub__Z11Kernel_gausPfS_S_iiiPifS0_S0_iPfS_S_iiiPifS0_S0_i, .-_Z48__device_stub__Z11Kernel_gausPfS_S_iiiPifS0_S0_iPfS_S_iiiPifS0_S0_i
	.globl	_Z11Kernel_gausPfS_S_iiiPifS0_S0_i
	.type	_Z11Kernel_gausPfS_S_iiiPifS0_S0_i, @function
_Z11Kernel_gausPfS_S_iiiPifS0_S0_i:
.LFB3666:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z11Kernel_gausPfS_S_iiiPifS0_S0_iPfS_S_iiiPifS0_S0_i
	.cfi_endproc
.LFE3666:
	.size	_Z11Kernel_gausPfS_S_iiiPifS0_S0_i, .-_Z11Kernel_gausPfS_S_iiiPifS0_S0_i
	.globl	_Z48__device_stub__Z14Kernel_linearePfS_iiiPiS0_S0_iPfS_iiiPiS0_S0_i
	.type	_Z48__device_stub__Z14Kernel_linearePfS_iiiPiS0_S0_iPfS_iiiPiS0_S0_i, @function
_Z48__device_stub__Z14Kernel_linearePfS_iiiPiS0_S0_iPfS_iiiPiS0_S0_i:
.LFB3667:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	224(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movq	232(%rsp), %rax
	movl	%edx, 44(%rsp)
	leaq	64(%rsp), %rdx
	movl	%ecx, 40(%rsp)
	leaq	72(%rsp), %rcx
	movl	%r8d, 36(%rsp)
	movq	%r9, 24(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	44(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	72(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z14Kernel_linearePfS_iiiPiS0_S0_i(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 240
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L30:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3667:
	.size	_Z48__device_stub__Z14Kernel_linearePfS_iiiPiS0_S0_iPfS_iiiPiS0_S0_i, .-_Z48__device_stub__Z14Kernel_linearePfS_iiiPiS0_S0_iPfS_iiiPiS0_S0_i
	.globl	_Z14Kernel_linearePfS_iiiPiS0_S0_i
	.type	_Z14Kernel_linearePfS_iiiPiS0_S0_i, @function
_Z14Kernel_linearePfS_iiiPiS0_S0_i:
.LFB3668:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z14Kernel_linearePfS_iiiPiS0_S0_iPfS_iiiPiS0_S0_i
	.cfi_endproc
.LFE3668:
	.size	_Z14Kernel_linearePfS_iiiPiS0_S0_i, .-_Z14Kernel_linearePfS_iiiPiS0_S0_i
	.globl	_Z53__device_stub__Z18Kernel_polimonialePfS_iiiPiS0_S0_iiPfS_iiiPiS0_S0_ii
	.type	_Z53__device_stub__Z18Kernel_polimonialePfS_iiiPiS0_S0_iiPfS_iiiPiS0_S0_ii, @function
_Z53__device_stub__Z18Kernel_polimonialePfS_iiiPiS0_S0_iiPfS_iiiPiS0_S0_ii:
.LFB3669:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	240(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movq	248(%rsp), %rax
	movl	%edx, 44(%rsp)
	leaq	72(%rsp), %rdx
	movl	%ecx, 40(%rsp)
	leaq	80(%rsp), %rcx
	movl	%r8d, 36(%rsp)
	movq	%r9, 24(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	44(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	264(%rsp), %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	pushq	80(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 256
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L35:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3669:
	.size	_Z53__device_stub__Z18Kernel_polimonialePfS_iiiPiS0_S0_iiPfS_iiiPiS0_S0_ii, .-_Z53__device_stub__Z18Kernel_polimonialePfS_iiiPiS0_S0_iiPfS_iiiPiS0_S0_ii
	.globl	_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii
	.type	_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii, @function
_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii:
.LFB3670:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__Z18Kernel_polimonialePfS_iiiPiS0_S0_iiPfS_iiiPiS0_S0_ii
	.cfi_endproc
.LFE3670:
	.size	_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii, .-_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Numero cicli necessari: "
.LC3:
	.string	"Memoria allocata, griglie definite:"
.LC4:
	.string	"blockGridRows.x: "
.LC5:
	.string	"blockGridRows.y: "
.LC6:
	.string	"threadBlockRows.x: "
.LC7:
	.string	"threadBlockRows.y: "
.LC9:
	.string	"Scelta non valida.\n"
.LC10:
	.string	"4\302\260 argomento non esistente.\n"
.LC11:
	.string	"1 = kernel lineare\t2 = kernel polimoniale\t 3 = kernel gaussiano\n"
.LC12:
	.string	"Tempo totale:\t"
.LC14:
	.string	" secondi\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$264, %rsp
	.cfi_def_cfa_offset 320
	movq	8(%rsi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 248(%rsp)
	xorl	%eax, %eax
	call	atoi@PLT
	movq	16(%r13), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	movq	24(%r13), %rdi
	movl	%ebx, %ebp
	leal	0(,%rbx,4), %r14d
	movl	%eax, 20(%rsp)
	call	atoi@PLT
	movq	32(%r13), %rdi
	movl	%eax, 48(%rsp)
	call	atoi@PLT
	cvtsi2ssl	20(%rsp), %xmm0
	movl	20(%rsp), %r12d
	mulss	.LC0(%rip), %xmm0
	movl	%eax, 72(%rsp)
	imull	%ebx, %r12d
	sall	$2, %r12d
	cvttss2sil	%xmm0, %r15d
	movslq	%r12d, %r12
	movq	%r12, %rdi
	call	malloc@PLT
	movq	%rax, 80(%rsp)
	imull	%r15d, %ebp
	sall	$2, %ebp
	movslq	%ebp, %rbp
	movq	%rbp, %rdi
	call	malloc@PLT
	movslq	%r14d, %rdi
	movq	%rax, 88(%rsp)
	call	malloc@PLT
	leaq	128(%rsp), %rdi
	movq	%r12, %rsi
	movq	%rax, 96(%rsp)
	call	cudaMalloc@PLT
	leaq	152(%rsp), %rdi
	movslq	%r14d, %rsi
	call	cudaMalloc@PLT
	leaq	136(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movslq	%r14d, %rsi
	leaq	144(%rsp), %rdi
	call	cudaMalloc@PLT
	xorl	%edi, %edi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	movl	20(%rsp), %edx
	movq	80(%rsp), %rdi
	movl	%ebx, %esi
	call	_Z14riempi_vettoriPfii
	movq	88(%rsp), %rdi
	movl	%r15d, %edx
	call	_Z25crea_vettori_termini_notiPiii
	movq	96(%rsp), %rdi
	movl	$1, %ecx
	call	_Z22crea_vettori_posizioniPiii
	movq	80(%rsp), %rsi
	movq	128(%rsp), %rdi
	movq	%r12, %rdx
	call	cudaMemcpy@PLT
	movq	88(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbp, %rdx
	movq	136(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	96(%rsp), %rsi
	movl	$1, %ecx
	movslq	%r14d, %rdx
	movq	144(%rsp), %rdi
	call	cudaMemcpy@PLT
	leaq	184(%rsp), %rsi
	leaq	176(%rsp), %rdi
	call	cudaMemGetInfo@PLT
	movq	176(%rsp), %rax
	testq	%rax, %rax
	js	.L41
	cvtsi2sdq	%rax, %xmm0
	jmp	.L42
.L41:
	movq	%rax, %rdx
	andl	$1, %eax
	shrq	%rdx
	orq	%rax, %rdx
	cvtsi2sdq	%rdx, %xmm0
	addsd	%xmm0, %xmm0
.L42:
	mulsd	.LC1(%rip), %xmm0
	cvtsi2sdl	%r14d, %xmm1
	movl	$200, %eax
	cmpl	%eax, 48(%rsp)
	cmovle	48(%rsp), %eax
	leaq	_ZSt4cout(%rip), %r12
	leaq	.LC2(%rip), %rsi
	movq	%r12, %rdi
	divsd	%xmm1, %xmm0
	cvttsd2sil	%xmm0, %ebp
	cmpl	%eax, %ebp
	cmovg	%eax, %ebp
	movl	48(%rsp), %eax
	cltd
	idivl	%ebp
	movl	%eax, %r14d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r14d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	48(%rsp), %edi
	movl	%ebx, %eax
	imull	%ebp, %eax
	imull	%ebx, %edi
	movl	%eax, 52(%rsp)
	cltq
	sall	$2, %edi
	movq	%rax, 64(%rsp)
	movslq	%edi, %rdi
	call	malloc@PLT
	movq	%rax, 40(%rsp)
	leal	0(,%rbp,4), %eax
	cltq
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	xorl	%edx, %edx
	leaq	116(%rsp), %rdi
	movl	$16, %esi
	movq	%rax, 8(%rsp)
	call	cudaDeviceGetAttribute@PLT
	movl	52(%rsp), %eax
	leaq	160(%rsp), %rdi
	sall	$2, %eax
	cltq
	movq	%rax, %rsi
	movq	%rax, 56(%rsp)
	call	cudaMalloc@PLT
	movq	24(%rsp), %rsi
	leaq	168(%rsp), %rdi
	call	cudaMalloc@PLT
	xorl	%esi, %esi
	movl	%ebx, %eax
	testb	$3, %bl
	setne	%sil
	cltd
	movl	$4, %ecx
	movq	%r12, %rdi
	idivl	%ecx
	movl	$1, 204(%rsp)
	movl	$1, 216(%rsp)
	movl	$128, %ecx
	addl	%esi, %eax
	xorl	%esi, %esi
	testl	$127, %ebp
	movl	%eax, 32(%rsp)
	movl	%ebp, %eax
	setne	%sil
	cltd
	idivl	%ecx
	addl	%esi, %eax
	leaq	.LC3(%rip), %rsi
	movl	%eax, 36(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC4(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	32(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC5(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	36(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC6(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$4, %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC7(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$128, %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	120(%rsp), %rdi
	movabsq	$4294967297, %rax
	movl	%ebx, 220(%rsp)
	movq	%rax, 224(%rsp)
	call	cudaEventCreate@PLT
	movq	120(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	cmpl	$2, 72(%rsp)
	je	.L43
	cmpl	$3, 72(%rsp)
	je	.L44
	cmpl	$1, 72(%rsp)
	jne	.L45
	movq	64(%rsp), %rax
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
	salq	$2, %rax
	movq	%rax, 72(%rsp)
	movq	40(%rsp), %rax
	movq	%rax, 64(%rsp)
.L46:
	cmpl	%r14d, %r12d
	jge	.L79
	xorl	%eax, %eax
.L49:
	cmpl	%eax, %ebp
	jle	.L80
	movq	8(%rsp), %rcx
	leal	0(%r13,%rax), %edx
	movl	%edx, (%rcx,%rax,4)
	incq	%rax
	jmp	.L49
.L80:
	movq	24(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	168(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	32(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	216(%rsp), %ecx
	movl	204(%rsp), %esi
	movabsq	$549755813892, %rdx
	movl	%eax, 196(%rsp)
	movl	36(%rsp), %eax
	movl	%eax, 200(%rsp)
	movq	196(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	pushq	%r8
	.cfi_def_cfa_offset 328
	movl	%ebx, %edx
	movl	%ebp, %r8d
	pushq	%r15
	.cfi_def_cfa_offset 336
	pushq	160(%rsp)
	.cfi_def_cfa_offset 344
	pushq	160(%rsp)
	.cfi_def_cfa_offset 352
	movq	200(%rsp), %r9
	movl	52(%rsp), %ecx
	movq	192(%rsp), %rsi
	movq	160(%rsp), %rdi
	call	_Z48__device_stub__Z14Kernel_linearePfS_iiiPiS0_S0_iPfS_iiiPiS0_S0_i
	addq	$32, %rsp
	.cfi_def_cfa_offset 320
.L48:
	movq	56(%rsp), %rdx
	movq	64(%rsp), %rdi
	addl	%ebp, %r13d
	incl	%r12d
	movq	160(%rsp), %rsi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rcx
	addq	%rcx, 64(%rsp)
	jmp	.L46
.L79:
	xorl	%eax, %eax
	testl	%r14d, %r14d
	cmovns	%r14d, %eax
	xorl	%edx, %edx
	imull	%ebp, %eax
	movl	48(%rsp), %ebp
	subl	%eax, %ebp
	testl	%ebp, %ebp
	jle	.L51
.L50:
	movq	8(%rsp), %rsi
	leal	(%rax,%rdx), %ecx
	movl	%ecx, (%rsi,%rdx,4)
	incq	%rdx
	cmpl	%edx, %ebp
	jg	.L50
	movq	24(%rsp), %rdx
	movq	168(%rsp), %rdi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	32(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	216(%rsp), %ecx
	movl	204(%rsp), %esi
	movabsq	$549755813892, %rdx
	movl	%eax, 196(%rsp)
	movl	36(%rsp), %eax
	movl	%eax, 200(%rsp)
	movq	196(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L59
	pushq	%rdi
	.cfi_remember_state
	.cfi_def_cfa_offset 328
	movl	%ebp, %r8d
	movl	%ebx, %edx
	pushq	%r15
	.cfi_def_cfa_offset 336
	pushq	160(%rsp)
	.cfi_def_cfa_offset 344
	pushq	160(%rsp)
	.cfi_def_cfa_offset 352
	movq	200(%rsp), %r9
	movl	52(%rsp), %ecx
	movq	192(%rsp), %rsi
	movq	160(%rsp), %rdi
	call	_Z48__device_stub__Z14Kernel_linearePfS_iiiPiS0_S0_iPfS_iiiPiS0_S0_i
	jmp	.L78
.L43:
	.cfi_restore_state
	movq	40(%r13), %rdi
	xorl	%r13d, %r13d
	call	atoi@PLT
	xorl	%esi, %esi
	movl	%eax, %r12d
	movq	64(%rsp), %rax
	movl	%esi, 64(%rsp)
	salq	$2, %rax
	movq	%rax, 104(%rsp)
	movq	40(%rsp), %rax
	movq	%rax, 72(%rsp)
.L53:
	cmpl	%r14d, 64(%rsp)
	jge	.L81
	xorl	%eax, %eax
.L56:
	cmpl	%eax, %ebp
	jle	.L82
	movq	8(%rsp), %rcx
	leal	0(%r13,%rax), %edx
	movl	%edx, (%rcx,%rax,4)
	incq	%rax
	jmp	.L56
.L82:
	movq	24(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	168(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	32(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	216(%rsp), %ecx
	movl	204(%rsp), %esi
	movabsq	$549755813892, %rdx
	movl	%eax, 196(%rsp)
	movl	36(%rsp), %eax
	movl	%eax, 200(%rsp)
	movq	196(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L55
	pushq	%r12
	.cfi_def_cfa_offset 328
	movl	%ebp, %r8d
	movl	%ebx, %edx
	pushq	%r15
	.cfi_def_cfa_offset 336
	pushq	160(%rsp)
	.cfi_def_cfa_offset 344
	pushq	160(%rsp)
	.cfi_def_cfa_offset 352
	movq	200(%rsp), %r9
	movl	52(%rsp), %ecx
	movq	192(%rsp), %rsi
	movq	160(%rsp), %rdi
	call	_Z53__device_stub__Z18Kernel_polimonialePfS_iiiPiS0_S0_iiPfS_iiiPiS0_S0_ii
	addq	$32, %rsp
	.cfi_def_cfa_offset 320
.L55:
	movq	56(%rsp), %rdx
	movq	160(%rsp), %rsi
	movl	$2, %ecx
	addl	%ebp, %r13d
	movq	72(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	104(%rsp), %rcx
	incl	64(%rsp)
	addq	%rcx, 72(%rsp)
	jmp	.L53
.L81:
	xorl	%eax, %eax
	testl	%r14d, %r14d
	cmovns	%r14d, %eax
	imull	%ebp, %eax
	movl	48(%rsp), %ebp
	subl	%eax, %ebp
	testl	%ebp, %ebp
	jle	.L51
	xorl	%edx, %edx
.L58:
	movq	8(%rsp), %rsi
	leal	(%rax,%rdx), %ecx
	movl	%ecx, (%rsi,%rdx,4)
	incq	%rdx
	cmpl	%edx, %ebp
	jg	.L58
	movq	24(%rsp), %rdx
	movq	168(%rsp), %rdi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	32(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	216(%rsp), %ecx
	movl	204(%rsp), %esi
	movabsq	$549755813892, %rdx
	movl	%eax, 196(%rsp)
	movl	36(%rsp), %eax
	movl	%eax, 200(%rsp)
	movq	196(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L59
	pushq	%r12
	.cfi_def_cfa_offset 328
	movl	%ebp, %r8d
	movl	%ebx, %edx
	pushq	%r15
	.cfi_def_cfa_offset 336
	pushq	160(%rsp)
	.cfi_def_cfa_offset 344
	pushq	160(%rsp)
	.cfi_def_cfa_offset 352
	movq	200(%rsp), %r9
	movl	52(%rsp), %ecx
	movq	192(%rsp), %rsi
	movq	160(%rsp), %rdi
	call	_Z53__device_stub__Z18Kernel_polimonialePfS_iiiPiS0_S0_iiPfS_iiiPiS0_S0_ii
.L78:
	addq	$32, %rsp
	.cfi_def_cfa_offset 320
.L59:
	imull	%ebx, %ebp
	movslq	%ebp, %rdx
	jmp	.L77
.L44:
	movq	40(%r13), %rdi
	call	atof@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvtsd2ss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movaps	%xmm0, %xmm1
	salq	$8, %rdx
	addsd	%xmm0, %xmm1
	movq	220(%rsp), %rdi
	movl	228(%rsp), %esi
	movl	$1, %ecx
	movq	%rdx, 232(%rsp)
	movl	$1, 240(%rsp)
	mulsd	%xmm0, %xmm1
	movsd	.LC8(%rip), %xmm0
	divsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm2
	movss	%xmm2, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L60
	pushq	%rax
	.cfi_def_cfa_offset 328
	movl	%ebx, %r8d
	pushq	%r15
	.cfi_def_cfa_offset 336
	movl	36(%rsp), %r9d
	movq	160(%rsp), %rcx
	movq	152(%rsp), %rdx
	movq	168(%rsp), %rsi
	movq	144(%rsp), %rdi
	call	_Z42__device_stub__Z12Kernel_normePfS_PiS0_iiiPfS_PiS0_iii
	popq	%rdx
	.cfi_def_cfa_offset 328
	popq	%rcx
	.cfi_def_cfa_offset 320
.L60:
	movq	64(%rsp), %rax
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
	salq	$2, %rax
	movq	%rax, 104(%rsp)
	movq	40(%rsp), %rax
	movq	%rax, 64(%rsp)
.L61:
	cmpl	%r14d, %r12d
	jge	.L83
	xorl	%eax, %eax
.L64:
	cmpl	%eax, %ebp
	jle	.L84
	movq	8(%rsp), %rcx
	leal	0(%r13,%rax), %edx
	movl	%edx, (%rcx,%rax,4)
	incq	%rax
	jmp	.L64
.L84:
	movq	24(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	168(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	32(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	216(%rsp), %ecx
	movl	204(%rsp), %esi
	movabsq	$549755813892, %rdx
	movl	%eax, 196(%rsp)
	movl	36(%rsp), %eax
	movl	%eax, 200(%rsp)
	movq	196(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L63
	pushq	%r15
	.cfi_def_cfa_offset 328
	movl	%ebp, %r9d
	movl	%ebx, %ecx
	pushq	152(%rsp)
	.cfi_def_cfa_offset 336
	pushq	152(%rsp)
	.cfi_def_cfa_offset 344
	pushq	192(%rsp)
	.cfi_def_cfa_offset 352
	movss	104(%rsp), %xmm0
	movl	52(%rsp), %r8d
	movq	184(%rsp), %rdx
	movq	192(%rsp), %rsi
	movq	160(%rsp), %rdi
	call	_Z48__device_stub__Z11Kernel_gausPfS_S_iiiPifS0_S0_iPfS_S_iiiPifS0_S0_i
	addq	$32, %rsp
	.cfi_def_cfa_offset 320
.L63:
	movq	56(%rsp), %rdx
	movq	64(%rsp), %rdi
	addl	%ebp, %r13d
	incl	%r12d
	movq	160(%rsp), %rsi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	104(%rsp), %rcx
	addq	%rcx, 64(%rsp)
	jmp	.L61
.L83:
	xorl	%eax, %eax
	testl	%r14d, %r14d
	cmovns	%r14d, %eax
	imull	%ebp, %eax
	movl	48(%rsp), %ebp
	subl	%eax, %ebp
	testl	%ebp, %ebp
	jle	.L51
	xorl	%edx, %edx
.L65:
	movq	8(%rsp), %rsi
	leal	(%rax,%rdx), %ecx
	movl	%ecx, (%rsi,%rdx,4)
	incq	%rdx
	cmpl	%edx, %ebp
	jg	.L65
	movq	24(%rsp), %rdx
	movq	168(%rsp), %rdi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	32(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	216(%rsp), %ecx
	movl	204(%rsp), %esi
	movabsq	$549755813892, %rdx
	movl	%eax, 196(%rsp)
	movl	36(%rsp), %eax
	movl	%eax, 200(%rsp)
	movq	196(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L66
	pushq	%r15
	.cfi_def_cfa_offset 328
	movl	%ebp, %r9d
	movl	%ebx, %ecx
	pushq	152(%rsp)
	.cfi_def_cfa_offset 336
	pushq	152(%rsp)
	.cfi_def_cfa_offset 344
	pushq	192(%rsp)
	.cfi_def_cfa_offset 352
	movss	104(%rsp), %xmm0
	movl	52(%rsp), %r8d
	movq	184(%rsp), %rdx
	movq	192(%rsp), %rsi
	movq	160(%rsp), %rdi
	call	_Z48__device_stub__Z11Kernel_gausPfS_S_iiiPifS0_S0_iPfS_S_iiiPifS0_S0_i
	addq	$32, %rsp
	.cfi_def_cfa_offset 320
.L66:
	imull	%ebp, %ebx
	movslq	%ebx, %rdx
.L77:
	movl	52(%rsp), %eax
	movq	40(%rsp), %rbx
	salq	$2, %rdx
	movl	$2, %ecx
	movq	160(%rsp), %rsi
	imull	%r14d, %eax
	cltq
	leaq	(%rbx,%rax,4), %rdi
	call	cudaMemcpy@PLT
	jmp	.L51
.L45:
	leaq	.LC9(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC10(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC11(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L51:
	leaq	232(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	232(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	232(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	120(%rsp), %rsi
	leaq	112(%rsp), %rdi
	movq	232(%rsp), %rdx
	call	cudaEventElapsedTime@PLT
	leaq	.LC12(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	112(%rsp), %xmm0
	divss	.LC13(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	80(%rsp), %rdi
	call	free@PLT
	movq	88(%rsp), %rdi
	call	free@PLT
	movq	96(%rsp), %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	free@PLT
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movq	144(%rsp), %rdi
	call	cudaFree@PLT
	movq	152(%rsp), %rdi
	call	cudaFree@PLT
	movq	168(%rsp), %rdi
	call	cudaFree@PLT
	movq	160(%rsp), %rdi
	call	cudaFree@PLT
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	je	.L67
	call	__stack_chk_fail@PLT
.L67:
	addq	$264, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	main, .-main
	.section	.rodata.str1.1
.LC15:
	.string	"_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii"
.LC16:
	.string	"_Z14Kernel_linearePfS_iiiPiS0_S0_i"
.LC17:
	.string	"_Z11Kernel_gausPfS_S_iiiPifS0_S0_i"
.LC18:
	.string	"_Z12Kernel_normePfS_PiS0_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3672:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14Kernel_linearePfS_iiiPiS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11Kernel_gausPfS_S_iiiPifS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12Kernel_normePfS_PiS0_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3672:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1043878380
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	1717986918
	.long	1072064102
	.align 8
.LC8:
	.long	0
	.long	1072693248
	.section	.rodata.cst4
	.align 4
.LC13:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
 * Programma che simula il comportamento del gpdt per 
 * la risoluzione di un kernel di una serie di
 * valori di dimensione variabile utilizzando la 
 * tecnologia cuda.
 * compilare con:
 * nvcc -o simil_gpdt_si_cuda simil_gpdt_si_cuda.cu
 * lanciare con:
 * ./simil_gpdt_si_cuda [numero vettori] [numero componenti] [numero di righe da calcolare] [tipo di kernel] [grado(int)/sigma(float)]
 **/

#include <iostream>
#include <ctime>
#include <cstdlib>
#include <cstdio>
#include <math.h>
#include <hip/hip_runtime.h>
using namespace std;

/**
 * Funzione che riempie i vettori con numeri
 * casuali compresi tra 0 e 99.
 **/ 
void riempi_vettori(float *vettori, int Nr_vet_elem, int Nr_vet_comp)
{
	for (int i = 0; i < Nr_vet_elem; i++)
		for(int j = 0; j < Nr_vet_comp; j++)
			vettori[i * Nr_vet_comp + j] = i * 2 + j; //j % 4; //
}

/**
 * Funzione che crea dei vettori contenente i valori significativi su cui 
 * calcolare la norma 2 al quadrato.
 **/
void crea_vettori_termini_noti(int *vettori, int Nr_vet_elem, int Nr_vet_comp)
{
	for (int i = 0; i < Nr_vet_elem; i++)
		for(int j = 0; j < Nr_vet_comp; j++)
			vettori[i * Nr_vet_comp + j] = (j+1)*3;
}

/**
 * Funzione che crea un vettore contenente il numero di valori significative.
 **/
void crea_vettori_posizioni(int *vettore, int Nr_vet_elem, int numero_val)
{
	for (int i = 0; i < Nr_vet_elem; i++)
		vettore[i] = numero_val;
}

/**
 * kernel per il calcolo delle norme al quadrato dei vettori.
 **/
__global__ void Kernel_norme(float *Vd, float *Nd, int *Vp, int *Vnp, int N, int C, int nr_max_val)
{
	long int x = threadIdx.x + blockIdx.x * blockDim.x;
	
	int pos;
	
	if(x < N)
	{
		float norma = 0;
		
		int Nr_val = Vnp[x];
		
		for(int i = 0; i < Nr_val; i++)
		{
			pos = Vp[x * nr_max_val + i];
			norma = norma + (Vd[x * C + pos] * Vd[x * C + pos]);
		}
		
		Nd[x] = norma;
	}
	
} 

/**
 * Kernel per il calcolo del del guassiano, basato sul metodo utilizzato nel gpdt, 
 * modificato per l'utilizzo con la tecnologia CUDA.
 **/
__global__ void Kernel_gaus(float *Vd, float *Ris, float *Nd, int N, int C, int dim_indici, int *ind, float sigma, int *Vp, int *Vnp, int nr_max_val)
{
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;

	int j;
	int pos;
	int tmp_ind;
	float gaus;
	
	for ( ; x < N ; x+=blockDim.x * gridDim.x)
	{
	    for( ; y < dim_indici; y+=blockDim.y * gridDim.y)
	    {
		      tmp_ind = ind[y];
		    
		      gaus = 0.0;
		      
		      int Nr_val = Vnp[x];
		      
		      for(j = 0; j < Nr_val; j++)
		      {
			      pos = Vp[x * nr_max_val + j];
			      gaus = gaus + (Vd[x * C + pos] * Vd[tmp_ind * C + pos]);
		      }
		      
		      gaus = - 2.0*gaus +Nd[x] + Nd[tmp_ind];
		      gaus = (exp(-gaus*sigma));

		      //Ris[x * dim_indici + y] = gaus;
		      Ris[y * N + x] = gaus;
	    }
	}
}

/**
 * Kernel per il calcolo del kernel lineare 
 * modificato per l'utilizzo con la tecnologia CUDA.
 **/
__global__ void Kernel_lineare(float *Vd, float *Ris, int N, int C, int dim_indici, int *ind, int *Vp, int *Vnp, int nr_max_val)
{
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;

	int j;
	int pos;
	int tmp_ind;
	float lin;
	
	for ( ; x < N ; x+=blockDim.x * gridDim.x)
	{
	    for( ; y < dim_indici; y+=blockDim.y * gridDim.y)
	    {
		      tmp_ind = ind[y];
		    
		      lin = 0.0;
		      
		      int Nr_val = Vnp[x];
		      
		      for(j = 0; j < Nr_val; j++)
		      {
			      pos = Vp[x * nr_max_val + j];
			      lin =  lin + (Vd[x * C + pos] * Vd[tmp_ind * C + pos]);
		      }

		      //Ris[x * dim_indici + y] = lin;
		      Ris[y * N + x ] = lin;
	    }
	}
}


/**
 * Kernel per il calcolo del kernel lineare 
 * modificato per l'utilizzo con la tecnologia CUDA.
 **/
__global__ void Kernel_polimoniale(float *Vd, float *Ris, int N, int C, int dim_indici, int *ind, int *Vp, int *Vnp, int nr_max_val, int s)
{
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;

	int j;
	int pos;
	int tmp_ind;
	float pol;
	float tmp;
	
	for ( ; x < N ; x+=blockDim.x * gridDim.x)
	{
	    for( ; y < dim_indici; y+=blockDim.y * gridDim.y)
	    {
		      tmp_ind = ind[y];
			  
			  tmp = 1.0;
			  
		      pol = 0.0;
		      
		      int Nr_val = Vnp[x];
		      
		      for(j = 0; j < Nr_val; j++)
		      {
			      pos = Vp[x * nr_max_val + j];
			      pol = pol + (Vd[x * C + pos] * Vd[tmp_ind * C + pos]);
		      }
		      
		      pol = pol + 1;
		      
		      for(j = 0; j < s; j++)
		      {
				tmp = tmp * pol;
			  }

		      //Ris[x * dim_indici + y] = tmp;
		      Ris[y * N + x ] = tmp;
	    }
	}
}



int main(int argc, char** argv)

{	
	/**
	 * Variabile contenente la percentuale dei valori significativi 
	 * all'interno dei vettori.
	 **/
	float perc_val_noti= 1.0 - 0.82;
	
	/**
	 * Matrice contenente i vettori da cui calcolare la differeza 
	 * per calcolarne le norme.
	 * Il numero di vettori e la dimensione degli stessi viene definita
	 * dall'utente.
	 **/
	float *vettori;
	
	/**
	 * Matrice contenente le posizioni all'interno del vettore contenente
	 * le posizioni dei valori significativi.
	 **/
	 int *vettore_posizioni;
	
	/**
	 * Vettore contenente il numero di valori non nulli nel vettore.
	 **/
	int *vett_numero_posizioni;
	
	/**
	 * vettore contenente le norme 2 al quadreato dei vettori.
	 **/
	float *vett_norme;
	
	/**
	 * Matrice contenente i risultati.
	 **/
	float *risultati;
	
	/**
	 * 
	 **/
	int *indici; 
	
	/**
	 * Tempo impiegato per il calcolo
	 **/
	float elapsedTime;
	hipEvent_t start, stop;
	
	//nr di vettori e di elementi.
	int Nr_vet_elem = atoi(argv[1]);
	int Nr_vet_comp = atoi(argv[2]);
	
	//Numero di righe da calcolare.
	int Nr_righe = atoi(argv[3]);
	
	/**
	 * Numero per la selezione del kernel.
	 * 1 = kernel lineare.
	 * 2 = kernel polimoniale.
	 * 3 = kernel gaussiano.
	 **/
	int sel_kernel = atoi(argv[4]);
	
	/**
	 * Sigma della funzione gaussiana.
	 **/
	//float sigma = atoi(argv[5]);
	//sigma = (1.0/(2.0*sigma*sigma));
	
	//Copia per il device.
	float *Vd;
	int *Vp;
	int *Vnp;
	float *Nd;
	float *Ris;
	int *ind;
	
	//Variabili per il controllo della memoria disponibile.
	size_t free_byte;
	size_t total_byte;
	
	/**
	 * Variabile contenente il numero dei valori significativi.
	 **/
	int numero_val_significativi = Nr_vet_comp * perc_val_noti;
	
	//Spazio necessario per l'allocazione dei vettori.
	int tot_vett_size = Nr_vet_elem * Nr_vet_comp * sizeof(float);
	//Spazio necessario per l'allocazione della Matrice dei risultati.
	int norme_size = Nr_vet_elem * sizeof(float);
	//Spazio necessario per l'allocazione della Matrice delle posizioni.
	int vett_pos_size = Nr_vet_elem * numero_val_significativi * sizeof(int);
	//Spazio necessario per l'allocazione del vettore con il numero dei valori significativi.
	int vett_nrpos_size = Nr_vet_elem * sizeof(int);
	//Spazio necessario per l'allocazione di una colonna.
	int col_size = Nr_vet_elem * sizeof(float);
	
	
	
	//Allocazione.
	vettori = (float*)malloc(tot_vett_size);
	vett_norme = (float*)malloc(norme_size);
	vettore_posizioni = (int*)malloc(vett_pos_size);
	vett_numero_posizioni = (int*)malloc(vett_nrpos_size);
	
	
	
	//Allocazione nel device.
	hipMalloc((void **)&Vd, tot_vett_size);
	hipMalloc((void **)&Nd, norme_size);
	hipMalloc((void **)&Vp, vett_pos_size);
	hipMalloc((void **)&Vnp, vett_nrpos_size);
	
	srand(time(0));
	
	//Riempimento dei vettori.
	riempi_vettori(vettori, Nr_vet_elem, Nr_vet_comp);
	//Riempimento dei vettori delle posizioni.
	crea_vettori_termini_noti(vettore_posizioni, Nr_vet_elem, numero_val_significativi);
	//Riempimento del vettore contenente il numero dei valori significativi.
	crea_vettori_posizioni(vett_numero_posizioni, Nr_vet_elem, numero_val_significativi);
		
	//trasferimento dei vettori nel device.
	hipMemcpy(Vd, vettori, tot_vett_size, hipMemcpyHostToDevice);
	//trasferimento dei vettori delle posizioni nel device.
	hipMemcpy(Vp, vettore_posizioni, vett_pos_size, hipMemcpyHostToDevice);
	//trasferimento del vettore conentente il numero di valori all'interno di ogni singolo vettore.
	hipMemcpy(Vnp, vett_numero_posizioni, vett_nrpos_size, hipMemcpyHostToDevice);
	
	hipMemGetInfo( &free_byte, &total_byte );
	
	int col_ospitabili_mem = (free_byte*0.7)/col_size;
	
	int contatore = 0;
	
	/**
	 * Valori impostati per ottimizzare il funzionamento del device.
	 * Questi valori sono basati sull'utilizzo di una Nvidia 230m.
	 **/
	int dimXX =4;
	int dimYY =128;
	
	/**
	 * Numero di colonne ospitabili calcolabili dal kernel contemporaneamente.
	 * Purtroppo a causa del fatto che il kernel CUDA fallisca in automatico
	 * se impiega più di 5 secondi per il calcolo, è necessario inserire un 
	 * limitatore per il calcolo.
	 * Questo valore è basato sull'utilizzo di una Nvidia 230m.
	 **/
	 
	
	int col_ospitabili = 200;
	
	if (col_ospitabili > Nr_righe)
	{
		col_ospitabili = Nr_righe;
	} 
	
	if (col_ospitabili > col_ospitabili_mem)
	{
		col_ospitabili = col_ospitabili_mem;
	}
	
	int numero_cicli = Nr_righe/col_ospitabili;
	cout<<"Numero cicli necessari: "<<numero_cicli<<endl;
	
	int risultati_size = Nr_righe * Nr_vet_elem * sizeof(float);
	int indici_size = col_ospitabili * sizeof(int);
	
	int risultati_part_size = col_ospitabili * Nr_vet_elem * sizeof(float);
	
	risultati = (float*)malloc(risultati_size);
	indici = (int*)malloc(indici_size);
	
	int numSMs;
	hipDeviceGetAttribute(&numSMs, hipDeviceAttributeMultiprocessorCount, 0);
	
	hipMalloc((void **)&Ris, risultati_part_size);
	hipMalloc((void **)&ind, indici_size);
	
	dim3 blockGridRows;
	
	blockGridRows.x=Nr_vet_elem/dimXX + (Nr_vet_elem%dimXX== 0?0:1);;
	blockGridRows.y=col_ospitabili/dimYY + (col_ospitabili%dimYY== 0?0:1);
	
	dim3 threadBlockRows;
	threadBlockRows.x=dimXX;
	threadBlockRows.y=dimYY;
	
	cout<<"Memoria allocata, griglie definite:"<<endl;
	cout<<"blockGridRows.x: "<<blockGridRows.x<<endl;
	cout<<"blockGridRows.y: "<<blockGridRows.y<<endl;
	cout<<"threadBlockRows.x: "<<threadBlockRows.x<<endl;
	cout<<"threadBlockRows.y: "<<threadBlockRows.y<<endl;
	
	int cicle_dim = col_ospitabili * Nr_vet_elem * sizeof(float);
	
	dim3 blockGridRowsn(Nr_vet_elem, 1);
	
	int resto;
	
	hipEventCreate(&start);
	hipEventRecord(start,0);
	
	switch(sel_kernel){
			case(1):{
				//cout<<"Kernel Lineare\n";
							
				for(int i = 0; i < numero_cicli; i++)
				{
					for (int kk = 0; kk < col_ospitabili; kk++)
					{
						indici[kk] = contatore + kk;
					}
					
					hipMemcpy(ind, indici, indici_size, hipMemcpyHostToDevice);
					
					//__global__ void Kernel_lineare(float *Vd, float *Ris, int N, int C, int dim_indici, int *ind, int *Vp, int *Vnp, int nr_max_val)
					Kernel_lineare<<< blockGridRows, threadBlockRows>>>(Vd, Ris, Nr_vet_elem, Nr_vet_comp, col_ospitabili, ind, Vp, Vnp, numero_val_significativi);
					
					hipMemcpy(risultati+(i*col_ospitabili*Nr_vet_elem), Ris, cicle_dim, hipMemcpyDeviceToHost);
					
					contatore = contatore + col_ospitabili;
				}
				
				resto = Nr_righe - contatore;
				
				if (resto > 0)
				{
					for (int kk = 0; kk < resto; kk++)
					{
						indici[kk] = contatore + kk;
					}
					
					hipMemcpy(ind, indici, indici_size, hipMemcpyHostToDevice);
					
					Kernel_lineare<<< blockGridRows, threadBlockRows>>>(Vd, Ris, Nr_vet_elem, Nr_vet_comp, resto, ind, Vp, Vnp, numero_val_significativi);
					
					hipMemcpy(risultati+(numero_cicli)*(col_ospitabili*Nr_vet_elem), Ris, resto * Nr_vet_elem * sizeof(float), hipMemcpyDeviceToHost);
					
				}
				
				break;
			}
			
			case(2):{
				//cout<<"Kernel Polimoniale\n";
				/**
				 * Grado del kernel.
				 **/
				int grado = atoi(argv[5]);
				
				for(int i = 0; i < numero_cicli; i++)
				{
					for (int kk = 0; kk < col_ospitabili; kk++)
					{
						indici[kk] = contatore + kk;
					}
					
					hipMemcpy(ind, indici, indici_size, hipMemcpyHostToDevice);
					
					//__global__ void Kernel_polimoniale(float *Vd, float *Ris, int N, int C, int dim_indici, int *ind, int *Vp, int *Vnp, int nr_max_val, int s)
					Kernel_polimoniale<<< blockGridRows, threadBlockRows>>>(Vd, Ris, Nr_vet_elem, Nr_vet_comp, col_ospitabili, ind, Vp, Vnp, numero_val_significativi,grado);
					
					hipMemcpy(risultati+(i*col_ospitabili*Nr_vet_elem), Ris, cicle_dim, hipMemcpyDeviceToHost);
					
					contatore = contatore + col_ospitabili;
				}
				
				resto = Nr_righe - contatore;
				
				if (resto > 0)
				{
					for (int kk = 0; kk < resto; kk++)
					{
						indici[kk] = contatore + kk;
					}
					
					hipMemcpy(ind, indici, indici_size, hipMemcpyHostToDevice);
					
					Kernel_polimoniale<<< blockGridRows, threadBlockRows>>>(Vd, Ris, Nr_vet_elem, Nr_vet_comp, resto, ind, Vp, Vnp, numero_val_significativi,grado);
					
					hipMemcpy(risultati+(numero_cicli)*(col_ospitabili*Nr_vet_elem), Ris, resto * Nr_vet_elem * sizeof(float), hipMemcpyDeviceToHost);
					
				}
				
				break;
			}
			
			case(3):{
				//cout<<"Kernel gaussiano\n";
				
				/**
				* Sigma della funzione gaussiana.
				**/
				float sigma = atof(argv[5]);
				sigma = (1.0/(2.0*sigma*sigma));
				
				//calcolo norme.
				Kernel_norme<<< blockGridRowsn, 256 >>>(Vd, Nd, Vp, Vnp, Nr_vet_elem, Nr_vet_comp, numero_val_significativi);
				
				//calcolo kernel
				for(int i = 0; i < numero_cicli; i++)
				{
					for (int kk = 0; kk < col_ospitabili; kk++)
					{
						indici[kk] = contatore + kk;
					}
					
					hipMemcpy(ind, indici, indici_size, hipMemcpyHostToDevice);
					
					//Kernel_gaus(float *Vd, float *Ris, float *Nd, int N, int C, int dim_indici, int *ind, float sigma, float *Vp, float *Vnp)
					Kernel_gaus<<< blockGridRows, threadBlockRows>>>(Vd, Ris, Nd, Nr_vet_elem, Nr_vet_comp, col_ospitabili, ind, sigma, Vp, Vnp, numero_val_significativi);
					
					hipMemcpy(risultati+(i*col_ospitabili*Nr_vet_elem), Ris, cicle_dim, hipMemcpyDeviceToHost);
					
					contatore = contatore + col_ospitabili;
				}
				
				resto = Nr_righe - contatore;
				
				if (resto > 0)
				{
					for (int kk = 0; kk < resto; kk++)
					{
						indici[kk] = contatore + kk;
					}
					
					hipMemcpy(ind, indici, indici_size, hipMemcpyHostToDevice);
					
					Kernel_gaus<<< blockGridRows, threadBlockRows>>>(Vd, Ris, Nd, Nr_vet_elem, Nr_vet_comp, resto, ind, sigma, Vp, Vnp, numero_val_significativi);

					
					hipMemcpy(risultati+(numero_cicli)*(col_ospitabili*Nr_vet_elem), Ris, resto * Nr_vet_elem * sizeof(float), hipMemcpyDeviceToHost);
					
				}
				
				break;
			}
			
			default:
			{
			cout<<"Scelta non valida.\n";
			cout<<"4° argomento non esistente.\n";
			cout<<"1 = kernel lineare\t2 = kernel polimoniale\t 3 = kernel gaussiano\n";
			break;
			}
			
			
			
	}
	
	hipEventCreate(&stop);
	hipEventRecord(stop,0);
	hipEventSynchronize(stop);
	
	hipEventElapsedTime(&elapsedTime, start,stop);
	cout<<"Tempo totale:\t"<<elapsedTime/1000<<" secondi\n";
	
	/*for (int i = 0; i <  Nr_vet_elem*Nr_righe; i++)
	{
	  cout<<risultati[i]<<endl;
	}*/
	
	free(vettori);
	free(vett_norme);
	free(vettore_posizioni);
	free(vett_numero_posizioni);
	free(indici);
	free(risultati);
	
	hipFree(Vd);
	hipFree(Vp);
	hipFree(Vnp);
	hipFree(Nd);
	hipFree(ind);
	hipFree(Ris);
	
	return 0;
}

	.text
	.file	"simil_gpdt_si_cuda.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z14riempi_vettoriPfii          # -- Begin function _Z14riempi_vettoriPfii
	.type	_Z14riempi_vettoriPfii,@function
_Z14riempi_vettoriPfii:                 # @_Z14riempi_vettoriPfii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB0_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%esi, %eax
	movl	%edx, %ecx
	xorl	%esi, %esi
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
.LBB0_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
	testl	%edx, %edx
	jle	.LBB0_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB0_2 Depth=1
	movl	%r8d, %r10d
	leaq	(%rdi,%r10,4), %r10
	xorl	%r11d, %r11d
.LBB0_4:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rsi,%r11), %ebx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebx, %xmm0
	movss	%xmm0, (%r10,%r11,4)
	incq	%r11
	cmpq	%r11, %rcx
	jne	.LBB0_4
.LBB0_5:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%r9
	addl	%edx, %r8d
	addq	$2, %rsi
	cmpq	%rax, %r9
	jne	.LBB0_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
.LBB0_7:                                # %._crit_edge15
	retq
.Lfunc_end0:
	.size	_Z14riempi_vettoriPfii, .Lfunc_end0-_Z14riempi_vettoriPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25crea_vettori_termini_notiPiii # -- Begin function _Z25crea_vettori_termini_notiPiii
	.type	_Z25crea_vettori_termini_notiPiii,@function
_Z25crea_vettori_termini_notiPiii:      # @_Z25crea_vettori_termini_notiPiii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB1_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%esi, %eax
	movl	%edx, %ecx
	xorl	%esi, %esi
	xorl	%r8d, %r8d
.LBB1_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	testl	%edx, %edx
	jle	.LBB1_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	%esi, %r9d
	leaq	(%rdi,%r9,4), %r9
	movl	$3, %r10d
	xorl	%r11d, %r11d
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%r10d, (%r9,%r11,4)
	incq	%r11
	addl	$3, %r10d
	cmpq	%r11, %rcx
	jne	.LBB1_4
.LBB1_5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r8
	addl	%edx, %esi
	cmpq	%rax, %r8
	jne	.LBB1_2
.LBB1_6:                                # %._crit_edge14
	retq
.Lfunc_end1:
	.size	_Z25crea_vettori_termini_notiPiii, .Lfunc_end1-_Z25crea_vettori_termini_notiPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z22crea_vettori_posizioniPiii  # -- Begin function _Z22crea_vettori_posizioniPiii
	.type	_Z22crea_vettori_posizioniPiii,@function
_Z22crea_vettori_posizioniPiii:         # @_Z22crea_vettori_posizioniPiii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB2_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%esi, %eax
	xorl	%ecx, %ecx
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%edx, (%rdi,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB2_2
.LBB2_3:                                # %._crit_edge
	retq
.Lfunc_end2:
	.size	_Z22crea_vettori_posizioniPiii, .Lfunc_end2-_Z22crea_vettori_posizioniPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__Kernel_normePfS_PiS0_iii # -- Begin function _Z27__device_stub__Kernel_normePfS_PiS0_iii
	.type	_Z27__device_stub__Kernel_normePfS_PiS0_iii,@function
_Z27__device_stub__Kernel_normePfS_PiS0_iii: # @_Z27__device_stub__Kernel_normePfS_PiS0_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12Kernel_normePfS_PiS0_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z27__device_stub__Kernel_normePfS_PiS0_iii, .Lfunc_end3-_Z27__device_stub__Kernel_normePfS_PiS0_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__Kernel_gausPfS_S_iiiPifS0_S0_i # -- Begin function _Z26__device_stub__Kernel_gausPfS_S_iiiPifS0_S0_i
	.type	_Z26__device_stub__Kernel_gausPfS_S_iiiPifS0_S0_i,@function
_Z26__device_stub__Kernel_gausPfS_S_iiiPifS0_S0_i: # @_Z26__device_stub__Kernel_gausPfS_S_iiiPifS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	8(%rsp), %r9
	movss	%xmm0, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	movq	%r9, 56(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11Kernel_gausPfS_S_iiiPifS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z26__device_stub__Kernel_gausPfS_S_iiiPifS0_S0_i, .Lfunc_end4-_Z26__device_stub__Kernel_gausPfS_S_iiiPifS0_S0_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__Kernel_linearePfS_iiiPiS0_S0_i # -- Begin function _Z29__device_stub__Kernel_linearePfS_iiiPiS0_S0_i
	.type	_Z29__device_stub__Kernel_linearePfS_iiiPiS0_S0_i,@function
_Z29__device_stub__Kernel_linearePfS_iiiPiS0_S0_i: # @_Z29__device_stub__Kernel_linearePfS_iiiPiS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	20(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	16(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14Kernel_linearePfS_iiiPiS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z29__device_stub__Kernel_linearePfS_iiiPiS0_S0_i, .Lfunc_end5-_Z29__device_stub__Kernel_linearePfS_iiiPiS0_S0_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__Kernel_polimonialePfS_iiiPiS0_S0_ii # -- Begin function _Z33__device_stub__Kernel_polimonialePfS_iiiPiS0_S0_ii
	.type	_Z33__device_stub__Kernel_polimonialePfS_iiiPiS0_S0_ii,@function
_Z33__device_stub__Kernel_polimonialePfS_iiiPiS0_S0_ii: # @_Z33__device_stub__Kernel_polimonialePfS_iiiPiS0_S0_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	20(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	16(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z33__device_stub__Kernel_polimonialePfS_iiiPiS0_S0_ii, .Lfunc_end6-_Z33__device_stub__Kernel_polimonialePfS_iiiPiS0_S0_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI7_0:
	.long	0x3e3851ec                      # float 0.180000007
.LCPI7_5:
	.long	0x447a0000                      # float 1000
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI7_1:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI7_2:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI7_3:
	.quad	0x3fe6666666666666              # double 0.69999999999999996
.LCPI7_4:
	.quad	0x3ff0000000000000              # double 1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$216, %rsp
	.cfi_def_cfa_offset 272
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r14d
	movq	%r14, 8(%rsp)                   # 8-byte Spill
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %r13d
	movq	24(%rbx), %rdi
	callq	atoi
	movl	%eax, 4(%rsp)                   # 4-byte Spill
	movq	%rbx, 72(%rsp)                  # 8-byte Spill
	movq	32(%rbx), %rdi
	callq	atoi
	cvtsi2ss	%r13d, %xmm0
	movl	%eax, 32(%rsp)                  # 4-byte Spill
	mulss	.LCPI7_0(%rip), %xmm0
	cvttss2si	%xmm0, %r15d
	leal	(,%r14,4), %ebx
	movl	%ebx, %eax
	imull	%r13d, %eax
	movl	%ebx, %ebp
	imull	%r15d, %ebp
	movslq	%eax, %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, 160(%rsp)                 # 8-byte Spill
	movslq	%ebx, %rbx
	movslq	%ebp, %rbp
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, 152(%rsp)                 # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r12
	leaq	64(%rsp), %rdi
	movq	%r14, 40(%rsp)                  # 8-byte Spill
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	136(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	movq	%rbp, 80(%rsp)                  # 8-byte Spill
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	xorl	%ebp, %ebp
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movq	160(%rsp), %rsi                 # 8-byte Reload
	movq	152(%rsp), %r14                 # 8-byte Reload
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	jle	.LBB7_13
# %bb.1:                                # %.preheader.lr.ph.i
	movl	8(%rsp), %eax                   # 4-byte Reload
	movl	%r13d, %ecx
	xorl	%edx, %edx
	xorl	%r10d, %r10d
.LBB7_2:                                # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_4 Depth 2
	testl	%r13d, %r13d
	jle	.LBB7_5
# %bb.3:                                # %.lr.ph.i
                                        #   in Loop: Header=BB7_2 Depth=1
	movl	%ebp, %edi
	leaq	(%rsi,%rdi,4), %rdi
	xorl	%r8d, %r8d
.LBB7_4:                                #   Parent Loop BB7_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rdx,%r8), %r9d
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r9d, %xmm0
	movss	%xmm0, (%rdi,%r8,4)
	incq	%r8
	cmpq	%r8, %rcx
	jne	.LBB7_4
.LBB7_5:                                # %._crit_edge.i
                                        #   in Loop: Header=BB7_2 Depth=1
	incq	%r10
	addl	%r13d, %ebp
	addq	$2, %rdx
	cmpq	%rax, %r10
	jne	.LBB7_2
# %bb.6:                                # %.preheader.lr.ph.i298
	movl	%r15d, %ecx
	xorl	%edx, %edx
	xorl	%r10d, %r10d
.LBB7_7:                                # %.preheader.i300
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_9 Depth 2
	testl	%r15d, %r15d
	jle	.LBB7_10
# %bb.8:                                # %.lr.ph.i302
                                        #   in Loop: Header=BB7_7 Depth=1
	movl	%edx, %edi
	leaq	(%r14,%rdi,4), %rdi
	movl	$3, %r8d
	xorl	%r9d, %r9d
.LBB7_9:                                #   Parent Loop BB7_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%r8d, (%rdi,%r9,4)
	incq	%r9
	addl	$3, %r8d
	cmpq	%r9, %rcx
	jne	.LBB7_9
.LBB7_10:                               # %._crit_edge.i301
                                        #   in Loop: Header=BB7_7 Depth=1
	incq	%r10
	addl	%r15d, %edx
	cmpq	%rax, %r10
	jne	.LBB7_7
# %bb.11:                               # %.lr.ph.i310.preheader
	xorl	%ecx, %ecx
.LBB7_12:                               # %.lr.ph.i310
                                        # =>This Inner Loop Header: Depth=1
	movl	%r15d, (%r12,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB7_12
.LBB7_13:                               # %_Z22crea_vettori_posizioniPiii.exit
	movl	%r13d, 96(%rsp)                 # 4-byte Spill
	movq	64(%rsp), %rdi
	movq	40(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	56(%rsp), %rdi
	movq	%r14, %rsi
	movq	80(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	48(%rsp), %rdi
	movq	%r12, 168(%rsp)                 # 8-byte Spill
	movq	%r12, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	200(%rsp), %r14
	leaq	192(%rsp), %rsi
	movq	%r14, %rdi
	callq	hipMemGetInfo
	movsd	(%r14), %xmm0                   # xmm0 = mem[0],zero
	unpcklps	.LCPI7_1(%rip), %xmm0           # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
	subpd	.LCPI7_2(%rip), %xmm0
	movapd	%xmm0, %xmm1
	unpckhpd	%xmm0, %xmm1                    # xmm1 = xmm1[1],xmm0[1]
	addsd	%xmm0, %xmm1
	mulsd	.LCPI7_3(%rip), %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ebx, %xmm0
	divsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %eax
	movl	4(%rsp), %ebp                   # 4-byte Reload
	cmpl	%eax, %ebp
	movl	%eax, 92(%rsp)                  # 4-byte Spill
	cmovll	%ebp, %eax
	movl	$200, %r13d
	cmpl	%r13d, %eax
	movl	%eax, 100(%rsp)                 # 4-byte Spill
	cmovll	%eax, %r13d
	movl	%ebp, %eax
	cltd
	idivl	%r13d
	movl	%eax, %r14d
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$24, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r14d, (%rsp)                   # 4-byte Spill
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	imull	%ebp, %ebx
	leal	(,%r13,4), %ebp
	movl	%r13d, %eax
	movq	8(%rsp), %r12                   # 8-byte Reload
	imull	%r12d, %eax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	leal	(,%rax,4), %r14d
	movslq	%ebx, %rdi
	callq	malloc
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movslq	%ebp, %rbp
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %rbx
	leaq	184(%rsp), %rdi
	movl	$63, %esi
	xorl	%edx, %edx
	callq	hipDeviceGetAttribute
	movslq	%r14d, %rsi
	leaq	24(%rsp), %rdi
	movq	%rsi, 144(%rsp)                 # 8-byte Spill
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%rbp, 120(%rsp)                 # 8-byte Spill
	movq	%rbp, %rsi
	callq	hipMalloc
	leal	3(%r12), %ebp
	testl	%r12d, %r12d
	cmovnsl	%r12d, %ebp
	sarl	$2, %ebp
	movl	%r12d, %eax
	andl	$3, %eax
	cmpl	$1, %eax
	sbbl	$-1, %ebp
	leal	127(%r13), %r12d
	testl	%r13d, %r13d
	cmovnsl	%r13d, %r12d
	sarl	$7, %r12d
	movq	%r13, 104(%rsp)                 # 8-byte Spill
	movl	%r13d, %eax
	andl	$127, %eax
	cmpl	$1, %eax
	sbbl	$-1, %r12d
	movq	%r12, %rax
	shlq	$32, %rax
	orq	%rbp, %rax
	movq	%rax, 112(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%rbp, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %rbp
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbp, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbp, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$4, %esi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$128, %esi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	leaq	176(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	32(%rsp), %eax                  # 4-byte Reload
	cmpl	$3, %eax
	je	.LBB7_49
# %bb.14:                               # %_Z22crea_vettori_posizioniPiii.exit
	cmpl	$2, %eax
	je	.LBB7_34
# %bb.15:                               # %_Z22crea_vettori_posizioniPiii.exit
	cmpl	$1, %eax
	movl	4(%rsp), %ebp                   # 4-byte Reload
	movl	(%rsp), %ecx                    # 4-byte Reload
	movl	96(%rsp), %r13d                 # 4-byte Reload
	jne	.LBB7_66
# %bb.16:                               # %.preheader353
	testl	%ecx, %ecx
	jle	.LBB7_17
# %bb.18:                               # %.preheader352.lr.ph
	movl	92(%rsp), %edx                  # 4-byte Reload
	cmpl	%edx, %ebp
	cmovll	%ebp, %edx
	movl	$200, %eax
	cmpl	%eax, %edx
	cmovgel	%eax, %edx
	movslq	%edx, %rax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	%ecx, %eax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movl	104(%rsp), %r14d                # 4-byte Reload
	xorl	%ebp, %ebp
	xorl	%r12d, %r12d
.LBB7_19:                               # %.preheader352
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_21 Depth 2
	cmpl	$0, 100(%rsp)                   # 4-byte Folded Reload
	jle	.LBB7_22
# %bb.20:                               # %.lr.ph372.preheader
                                        #   in Loop: Header=BB7_19 Depth=1
	xorl	%eax, %eax
.LBB7_21:                               # %.lr.ph372
                                        #   Parent Loop BB7_19 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%r12,%rax), %ecx
	movl	%ecx, (%rbx,%rax,4)
	incq	%rax
	cmpq	%rax, %r14
	jne	.LBB7_21
.LBB7_22:                               # %._crit_edge373
                                        #   in Loop: Header=BB7_19 Depth=1
	movq	16(%rsp), %rdi
	movq	%rbx, %rsi
	movq	120(%rsp), %rdx                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	112(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movabsq	$549755813892, %rdx             # imm = 0x8000000004
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_24
# %bb.23:                               #   in Loop: Header=BB7_19 Depth=1
	movq	64(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %r9
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	16(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	movl	%r13d, %ecx
	movq	112(%rsp), %r8                  # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z29__device_stub__Kernel_linearePfS_iiiPiS0_S0_i
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB7_24:                               #   in Loop: Header=BB7_19 Depth=1
	movq	80(%rsp), %rax                  # 8-byte Reload
                                        # kill: def $eax killed $eax killed $rax
	imull	%ebp, %eax
	cltq
	movq	40(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdi
	movq	24(%rsp), %rsi
	movq	144(%rsp), %rdx                 # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	addq	32(%rsp), %r12                  # 8-byte Folded Reload
	incq	%rbp
	cmpq	72(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB7_19
# %bb.25:                               # %._crit_edge376.loopexit
	movl	4(%rsp), %ebp                   # 4-byte Reload
	jmp	.LBB7_26
.LBB7_34:
	movq	72(%rsp), %rax                  # 8-byte Reload
	movq	40(%rax), %rdi
	callq	atoi
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, 128(%rsp)                 # 8-byte Spill
	movl	(%rsp), %ecx                    # 4-byte Reload
	testl	%ecx, %ecx
	movl	4(%rsp), %ebp                   # 4-byte Reload
	movl	96(%rsp), %r13d                 # 4-byte Reload
	jle	.LBB7_35
# %bb.36:                               # %.preheader355.lr.ph
	movl	92(%rsp), %edx                  # 4-byte Reload
	cmpl	%edx, %ebp
	cmovll	%ebp, %edx
	movl	$200, %eax
	cmpl	%eax, %edx
	cmovgel	%eax, %edx
	movslq	%edx, %rax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	%ecx, %eax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movl	104(%rsp), %ebp                 # 4-byte Reload
	xorl	%r14d, %r14d
	xorl	%r12d, %r12d
.LBB7_37:                               # %.preheader355
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_39 Depth 2
	cmpl	$0, 100(%rsp)                   # 4-byte Folded Reload
	jle	.LBB7_40
# %bb.38:                               # %.lr.ph364.preheader
                                        #   in Loop: Header=BB7_37 Depth=1
	xorl	%eax, %eax
.LBB7_39:                               # %.lr.ph364
                                        #   Parent Loop BB7_37 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%r12,%rax), %ecx
	movl	%ecx, (%rbx,%rax,4)
	incq	%rax
	cmpq	%rax, %rbp
	jne	.LBB7_39
.LBB7_40:                               # %._crit_edge365
                                        #   in Loop: Header=BB7_37 Depth=1
	movq	16(%rsp), %rdi
	movq	%rbx, %rsi
	movq	120(%rsp), %rdx                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	112(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movabsq	$549755813892, %rdx             # imm = 0x8000000004
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_42
# %bb.41:                               #   in Loop: Header=BB7_37 Depth=1
	movq	64(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %r9
	movq	8(%rsp), %rdx                   # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	movl	%r13d, %ecx
	movq	104(%rsp), %r8                  # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	pushq	128(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z33__device_stub__Kernel_polimonialePfS_iiiPiS0_S0_ii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB7_42:                               #   in Loop: Header=BB7_37 Depth=1
	movq	80(%rsp), %rax                  # 8-byte Reload
                                        # kill: def $eax killed $eax killed $rax
	imull	%r14d, %eax
	cltq
	movq	40(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdi
	movq	24(%rsp), %rsi
	movq	144(%rsp), %rdx                 # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	addq	32(%rsp), %r12                  # 8-byte Folded Reload
	incq	%r14
	cmpq	72(%rsp), %r14                  # 8-byte Folded Reload
	jne	.LBB7_37
# %bb.43:                               # %._crit_edge368.loopexit
	movl	4(%rsp), %ebp                   # 4-byte Reload
	jmp	.LBB7_44
.LBB7_49:
	movl	8(%rsp), %r12d                  # 4-byte Reload
	btsq	$32, %r12
	movq	72(%rsp), %rax                  # 8-byte Reload
	movq	40(%rax), %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movaps	%xmm0, %xmm1
	addsd	%xmm0, %xmm1
	mulsd	%xmm0, %xmm1
	movsd	.LCPI7_4(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movsd	%xmm0, 32(%rsp)                 # 8-byte Spill
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	xorl	%ebp, %ebp
	movq	%r12, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movl	96(%rsp), %r13d                 # 4-byte Reload
	jne	.LBB7_51
# %bb.50:
	movq	64(%rsp), %rdi
	movq	136(%rsp), %rsi
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rcx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	16(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	movl	%r13d, %r9d
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	callq	_Z27__device_stub__Kernel_normePfS_PiS0_iii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB7_51:
	xorps	%xmm0, %xmm0
	cvtsd2ss	32(%rsp), %xmm0                 # 8-byte Folded Reload
	movss	%xmm0, 128(%rsp)                # 4-byte Spill
	cmpl	$0, (%rsp)                      # 4-byte Folded Reload
	movl	4(%rsp), %r14d                  # 4-byte Reload
	jle	.LBB7_60
# %bb.52:                               # %.preheader357.lr.ph
	movl	92(%rsp), %ecx                  # 4-byte Reload
	cmpl	%ecx, %r14d
	cmovll	%r14d, %ecx
	movl	$200, %eax
	cmpl	%eax, %ecx
	cmovgel	%eax, %ecx
	movslq	%ecx, %rax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	(%rsp), %eax                    # 4-byte Reload
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movl	104(%rsp), %r12d                # 4-byte Reload
	xorl	%r14d, %r14d
	xorl	%ebp, %ebp
.LBB7_53:                               # %.preheader357
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_55 Depth 2
	cmpl	$0, 100(%rsp)                   # 4-byte Folded Reload
	jle	.LBB7_56
# %bb.54:                               # %.lr.ph.preheader
                                        #   in Loop: Header=BB7_53 Depth=1
	xorl	%eax, %eax
.LBB7_55:                               # %.lr.ph
                                        #   Parent Loop BB7_53 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rax,%rbp), %ecx
	movl	%ecx, (%rbx,%rax,4)
	incq	%rax
	cmpq	%rax, %r12
	jne	.LBB7_55
.LBB7_56:                               # %._crit_edge
                                        #   in Loop: Header=BB7_53 Depth=1
	movq	16(%rsp), %rdi
	movq	%rbx, %rsi
	movq	120(%rsp), %rdx                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	112(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movabsq	$549755813892, %rdx             # imm = 0x8000000004
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_58
# %bb.57:                               #   in Loop: Header=BB7_53 Depth=1
	movq	64(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	136(%rsp), %rdx
	movq	8(%rsp), %rcx                   # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	%r13d, %r8d
	movq	104(%rsp), %r9                  # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	movss	128(%rsp), %xmm0                # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__Kernel_gausPfS_S_iiiPifS0_S0_i
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB7_58:                               #   in Loop: Header=BB7_53 Depth=1
	movq	80(%rsp), %rax                  # 8-byte Reload
                                        # kill: def $eax killed $eax killed $rax
	imull	%r14d, %eax
	cltq
	movq	40(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdi
	movq	24(%rsp), %rsi
	movq	144(%rsp), %rdx                 # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	addq	32(%rsp), %rbp                  # 8-byte Folded Reload
	incq	%r14
	cmpq	72(%rsp), %r14                  # 8-byte Folded Reload
	jne	.LBB7_53
# %bb.59:                               # %._crit_edge361.loopexit
	movl	4(%rsp), %r14d                  # 4-byte Reload
.LBB7_60:                               # %._crit_edge361
	subl	%ebp, %r14d
	jle	.LBB7_67
# %bb.61:                               # %.preheader356.preheader
	movl	%r14d, %eax
	movl	%ebp, %ecx
	xorl	%edx, %edx
.LBB7_62:                               # %.preheader356
                                        # =>This Inner Loop Header: Depth=1
	leal	(%rcx,%rdx), %esi
	movl	%esi, (%rbx,%rdx,4)
	incq	%rdx
	cmpq	%rdx, %rax
	jne	.LBB7_62
# %bb.63:
	movq	16(%rsp), %rdi
	movq	%rbx, %rsi
	movq	120(%rsp), %rdx                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	112(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movabsq	$549755813892, %rdx             # imm = 0x8000000004
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_65
# %bb.64:
	movq	64(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	136(%rsp), %rdx
	movq	8(%rsp), %rcx                   # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	%r13d, %r8d
	movl	%r14d, %r9d
	movss	128(%rsp), %xmm0                # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__Kernel_gausPfS_S_iiiPifS0_S0_i
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB7_65:
	movq	80(%rsp), %rax                  # 8-byte Reload
	imull	(%rsp), %eax                    # 4-byte Folded Reload
	cltq
	movq	40(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdi
	movq	24(%rsp), %rsi
	imull	8(%rsp), %r14d                  # 4-byte Folded Reload
	movslq	%r14d, %rdx
	jmp	.LBB7_33
.LBB7_66:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$29, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$64, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB7_67
.LBB7_35:
	xorl	%r12d, %r12d
.LBB7_44:                               # %._crit_edge368
	subl	%r12d, %ebp
	jle	.LBB7_67
# %bb.45:                               # %.preheader354.preheader
	movl	%ebp, %eax
	movl	%r12d, %ecx
	xorl	%edx, %edx
	movl	(%rsp), %r14d                   # 4-byte Reload
.LBB7_46:                               # %.preheader354
                                        # =>This Inner Loop Header: Depth=1
	leal	(%rcx,%rdx), %esi
	movl	%esi, (%rbx,%rdx,4)
	incq	%rdx
	cmpq	%rdx, %rax
	jne	.LBB7_46
# %bb.47:
	movq	16(%rsp), %rdi
	movq	%rbx, %rsi
	movq	120(%rsp), %rdx                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	112(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movabsq	$549755813892, %rdx             # imm = 0x8000000004
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_32
# %bb.48:
	movq	64(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %r9
	movq	8(%rsp), %rdx                   # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	movl	%r13d, %ecx
	movl	%ebp, %r8d
	pushq	128(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z33__device_stub__Kernel_polimonialePfS_iiiPiS0_S0_ii
	jmp	.LBB7_31
.LBB7_17:
	.cfi_def_cfa_offset 272
	xorl	%r12d, %r12d
.LBB7_26:                               # %._crit_edge376
	subl	%r12d, %ebp
	jle	.LBB7_67
# %bb.27:                               # %.preheader.preheader
	movl	%ebp, %eax
	movl	%r12d, %ecx
	xorl	%edx, %edx
	movl	(%rsp), %r14d                   # 4-byte Reload
.LBB7_28:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	leal	(%rcx,%rdx), %esi
	movl	%esi, (%rbx,%rdx,4)
	incq	%rdx
	cmpq	%rdx, %rax
	jne	.LBB7_28
# %bb.29:
	movq	16(%rsp), %rdi
	movq	%rbx, %rsi
	movq	120(%rsp), %rdx                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	112(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movabsq	$549755813892, %rdx             # imm = 0x8000000004
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_32
# %bb.30:
	movq	64(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %r9
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	16(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	movl	%r13d, %ecx
	movl	%ebp, %r8d
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z29__device_stub__Kernel_linearePfS_iiiPiS0_S0_i
.LBB7_31:
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB7_32:
	movq	80(%rsp), %rax                  # 8-byte Reload
	imull	%r14d, %eax
	cltq
	movq	40(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rdi
	movq	24(%rsp), %rsi
	imull	8(%rsp), %ebp                   # 4-byte Folded Reload
	movslq	%ebp, %rdx
.LBB7_33:
	shlq	$2, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.LBB7_67:
	leaq	208(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r14), %rdi
	callq	hipEventSynchronize
	movq	176(%rsp), %rsi
	movq	(%r14), %rdx
	leaq	188(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	(%r14), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI7_5(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.10, %esi
	movl	$9, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	160(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movq	152(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movq	168(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movq	%rbx, %rdi
	callq	free
	movq	40(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	136(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$216, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12Kernel_normePfS_PiS0_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11Kernel_gausPfS_S_iiiPifS0_S0_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14Kernel_linearePfS_iiiPiS0_S0_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12Kernel_normePfS_PiS0_iii,@object # @_Z12Kernel_normePfS_PiS0_iii
	.section	.rodata,"a",@progbits
	.globl	_Z12Kernel_normePfS_PiS0_iii
	.p2align	3, 0x0
_Z12Kernel_normePfS_PiS0_iii:
	.quad	_Z27__device_stub__Kernel_normePfS_PiS0_iii
	.size	_Z12Kernel_normePfS_PiS0_iii, 8

	.type	_Z11Kernel_gausPfS_S_iiiPifS0_S0_i,@object # @_Z11Kernel_gausPfS_S_iiiPifS0_S0_i
	.globl	_Z11Kernel_gausPfS_S_iiiPifS0_S0_i
	.p2align	3, 0x0
_Z11Kernel_gausPfS_S_iiiPifS0_S0_i:
	.quad	_Z26__device_stub__Kernel_gausPfS_S_iiiPifS0_S0_i
	.size	_Z11Kernel_gausPfS_S_iiiPifS0_S0_i, 8

	.type	_Z14Kernel_linearePfS_iiiPiS0_S0_i,@object # @_Z14Kernel_linearePfS_iiiPiS0_S0_i
	.globl	_Z14Kernel_linearePfS_iiiPiS0_S0_i
	.p2align	3, 0x0
_Z14Kernel_linearePfS_iiiPiS0_S0_i:
	.quad	_Z29__device_stub__Kernel_linearePfS_iiiPiS0_S0_i
	.size	_Z14Kernel_linearePfS_iiiPiS0_S0_i, 8

	.type	_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii,@object # @_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii
	.globl	_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii
	.p2align	3, 0x0
_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii:
	.quad	_Z33__device_stub__Kernel_polimonialePfS_iiiPiS0_S0_ii
	.size	_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Numero cicli necessari: "
	.size	.L.str, 25

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Memoria allocata, griglie definite:"
	.size	.L.str.1, 36

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"blockGridRows.x: "
	.size	.L.str.2, 18

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"blockGridRows.y: "
	.size	.L.str.3, 18

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"threadBlockRows.x: "
	.size	.L.str.4, 20

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"threadBlockRows.y: "
	.size	.L.str.5, 20

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Scelta non valida.\n"
	.size	.L.str.6, 20

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"4\302\260 argomento non esistente.\n"
	.size	.L.str.7, 30

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"1 = kernel lineare\t2 = kernel polimoniale\t 3 = kernel gaussiano\n"
	.size	.L.str.8, 65

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Tempo totale:\t"
	.size	.L.str.9, 15

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	" secondi\n"
	.size	.L.str.10, 10

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12Kernel_normePfS_PiS0_iii"
	.size	.L__unnamed_1, 29

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z11Kernel_gausPfS_S_iiiPifS0_S0_i"
	.size	.L__unnamed_2, 35

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z14Kernel_linearePfS_iiiPiS0_S0_i"
	.size	.L__unnamed_3, 35

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii"
	.size	.L__unnamed_4, 40

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__Kernel_normePfS_PiS0_iii
	.addrsig_sym _Z26__device_stub__Kernel_gausPfS_S_iiiPifS0_S0_i
	.addrsig_sym _Z29__device_stub__Kernel_linearePfS_iiiPiS0_S0_i
	.addrsig_sym _Z33__device_stub__Kernel_polimonialePfS_iiiPiS0_S0_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12Kernel_normePfS_PiS0_iii
	.addrsig_sym _Z11Kernel_gausPfS_S_iiiPifS0_S0_i
	.addrsig_sym _Z14Kernel_linearePfS_iiiPiS0_S0_i
	.addrsig_sym _Z18Kernel_polimonialePfS_iiiPiS0_S0_ii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12Kernel_normePfS_PiS0_iii ; -- Begin function _Z12Kernel_normePfS_PiS0_iii
	.globl	_Z12Kernel_normePfS_PiS0_iii
	.p2align	8
	.type	_Z12Kernel_normePfS_PiS0_iii,@function
_Z12Kernel_normePfS_PiS0_iii:           ; @_Z12Kernel_normePfS_PiS0_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[8:11], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_ashr_i32 s3, s8, 31
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	s_mov_b32 s2, s8
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[1:2]
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
	s_mov_b32 s7, 0
	s_mov_b32 s6, exec_lo
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v5
	s_cbranch_execz .LBB0_5
; %bb.2:                                ; %.lr.ph
	v_mad_u64_u32 v[6:7], null, v1, s10, 0
	v_mad_u64_u32 v[8:9], null, v1, s9, 0
	s_ashr_i32 s8, s10, 31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v0, v7
	v_mov_b32_e32 v2, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u64_u32 v[9:10], null, v1, s8, v[0:1]
	s_ashr_i32 s8, s9, 31
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[10:11], null, v1, s8, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v7, v9
	v_mov_b32_e32 v9, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[6:7]
	v_lshlrev_b64 v[6:7], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v8, v[0:1], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v8, vcc_lo, v6, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v7, v9, vcc_lo
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_dual_fmac_f32 v2, v8, v8 :: v_dual_add_nc_u32 v5, -1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, 0, v5
	s_or_b32 s7, s0, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_3
; %bb.4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_5:                                ; %Flow51
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_add_co_u32 v0, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v4, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12Kernel_normePfS_PiS0_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12Kernel_normePfS_PiS0_iii, .Lfunc_end0-_Z12Kernel_normePfS_PiS0_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 408
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11Kernel_gausPfS_S_iiiPifS0_S0_i ; -- Begin function _Z11Kernel_gausPfS_S_iiiPifS0_S0_i
	.globl	_Z11Kernel_gausPfS_S_iiiPifS0_S0_i
	.p2align	8
	.type	_Z11Kernel_gausPfS_S_iiiPifS0_S0_i,@function
_Z11Kernel_gausPfS_S_iiiPifS0_S0_i:     ; @_Z11Kernel_gausPfS_S_iiiPifS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x5c
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s2, s0, 0x50
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s7, exec_lo
	s_and_b32 s20, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s20, v[3:4]
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB1_11
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b32 s14, s[2:3], 0xc
	s_load_b32 s21, s[0:1], 0x48
	s_load_b64 s[22:23], s[2:3], 0x0
	s_clause 0x4
	s_load_b128 s[8:11], s[0:1], 0x38
	s_load_b128 s[16:19], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b64 s[12:13], s[0:1], 0x28
	s_load_b32 s7, s[0:1], 0x30
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s14, 16
	v_mul_lo_u32 v5, s21, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, s15, s0, v[0:1]
	s_mul_i32 s14, s22, s20
	s_mul_i32 s15, s23, s0
	s_mul_i32 s20, s14, s21
	s_mov_b32 s21, 0
.LBB1_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_4 Depth 2
                                        ;       Child Loop BB1_6 Depth 3
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s6, v3
	s_cbranch_execz .LBB1_10
; %bb.3:                                ; %.lr.ph54
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s23, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[8:9], 2, v[1:2]
	v_mul_lo_u32 v2, v1, s5
	v_add_co_u32 v6, vcc_lo, s10, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v9, vcc_lo
	v_add_co_u32 v8, s0, s2, v8
	v_add_co_ci_u32_e64 v9, s0, s3, v9, s0
	global_load_b32 v0, v[6:7], off
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	v_add_co_u32 v6, vcc_lo, s8, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, 0, v0
.LBB1_4:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_6 Depth 3
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[10:11], 2, v[3:4]
	v_mov_b32_e32 v4, 0
	v_add_co_u32 v10, s0, s12, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s0, s13, v11, s0
	global_load_b32 v10, v[10:11], off
	s_and_saveexec_b32 s24, vcc_lo
	s_cbranch_execz .LBB1_8
; %bb.5:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v13, v10, s5
	v_mov_b32_e32 v12, v7
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v11, v6
	v_mov_b32_e32 v14, v0
	s_mov_b32 s25, 0
.LBB1_6:                                ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v16, v[11:12], off
	v_add_nc_u32_e32 v14, -1, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s1, 0, v14
	s_or_b32 s25, s1, s25
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v15, v16, v2
	v_add_nc_u32_e32 v17, v16, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v16, 31, v15
	v_ashrrev_i32_e32 v18, 31, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[15:16], 2, v[15:16]
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v15, s0, s16, v15
	v_add_co_ci_u32_e64 v16, s0, s17, v16, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s0, s16, v17
	v_add_co_ci_u32_e64 v18, s0, s17, v18, s0
	v_add_co_u32 v11, s0, v11, 4
	s_clause 0x1
	global_load_b32 v15, v[15:16], off
	global_load_b32 v16, v[17:18], off
	v_add_co_ci_u32_e64 v12, s0, 0, v12, s0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v4, v15, v16
	s_and_not1_b32 exec_lo, exec_lo, s25
	s_cbranch_execnz .LBB1_6
; %bb.7:                                ; %Flow
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s25
.LBB1_8:                                ; %Flow99
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s24
	global_load_b32 v12, v[8:9], off
	s_waitcnt vmcnt(1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s0, s2, v10
	v_add_co_ci_u32_e64 v11, s0, s3, v11, s0
	global_load_b32 v14, v[10:11], off
	v_cvt_f64_f32_e32 v[10:11], v4
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[12:13], v12
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[14:15], v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[10:11], -2.0, v[12:13]
	v_add_f64 v[10:11], v[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e64 v4, -v[10:11]
	v_mul_f32_e32 v4, s7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, 0x3fb8aa3b, v4
	v_fma_f32 v11, 0x3fb8aa3b, v4, -v10
	v_rndne_f32_e32 v12, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v11, 0x32a5705f, v4
	v_sub_f32_e32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v10, v11
	v_exp_f32_e32 v13, v10
	v_mad_u64_u32 v[10:11], null, v3, s4, v[1:2]
	v_add_nc_u32_e32 v3, s15, v3
	v_cvt_i32_f32_e32 v11, v12
	v_cmp_ngt_f32_e64 s0, 0xc2ce8ed0, v4
	v_cmp_nlt_f32_e64 s1, 0x42b17218, v4
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v12, v13, v11
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v12, 0, v12, s0
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	v_cmp_le_i32_e64 s0, s6, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v4, 0x7f800000, v12, s1
	v_add_co_u32 v10, s1, s18, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v11, s1, s19, v11, s1
	s_or_b32 s23, s0, s23
	global_store_b32 v[10:11], v4, off
	s_and_not1_b32 exec_lo, exec_lo, s23
	s_cbranch_execnz .LBB1_4
; %bb.9:                                ; %Flow100
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s23
.LBB1_10:                               ; %Flow101
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s22
	v_add_nc_u32_e32 v1, s14, v1
	v_add_nc_u32_e32 v5, s20, v5
	v_cmp_le_i32_e32 vcc_lo, s4, v1
	s_or_b32 s21, vcc_lo, s21
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s21
	s_cbranch_execnz .LBB1_2
.LBB1_11:                               ; %._crit_edge59
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11Kernel_gausPfS_S_iiiPifS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 26
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z11Kernel_gausPfS_S_iiiPifS0_S0_i, .Lfunc_end1-_Z11Kernel_gausPfS_S_iiiPifS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 948
; NumSgprs: 28
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 28
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z14Kernel_linearePfS_iiiPiS0_S0_i ; -- Begin function _Z14Kernel_linearePfS_iiiPiS0_S0_i
	.globl	_Z14Kernel_linearePfS_iiiPiS0_S0_i
	.p2align	8
	.type	_Z14Kernel_linearePfS_iiiPiS0_S0_i,@function
_Z14Kernel_linearePfS_iiiPiS0_S0_i:     ; @_Z14Kernel_linearePfS_iiiPiS0_S0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x4c
	s_load_b128 s[4:7], s[0:1], 0x10
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s2, s0, 64
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s8, 0xffff
	s_mov_b32 s8, exec_lo
	v_mad_u64_u32 v[1:2], null, s14, s7, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB2_11
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b32 s14, s[2:3], 0xc
	s_load_b32 s20, s[0:1], 0x38
	s_load_b64 s[12:13], s[2:3], 0x0
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x30
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b128 s[16:19], s[0:1], 0x20
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s14, 16
	v_mul_lo_u32 v5, s20, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, s15, s0, v[0:1]
	s_mul_i32 s7, s12, s7
	s_mul_i32 s12, s13, s0
	s_mul_i32 s13, s7, s20
	s_mov_b32 s14, 0
.LBB2_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_4 Depth 2
                                        ;       Child Loop BB2_6 Depth 3
	s_mov_b32 s15, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s6, v3
	s_cbranch_execz .LBB2_10
; %bb.3:                                ; %.lr.ph46
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s20, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_mul_lo_u32 v2, v1, s5
	v_add_co_u32 v6, vcc_lo, s2, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	global_load_b32 v0, v[6:7], off
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s18, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s19, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, 0, v0
.LBB2_4:                                ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_6 Depth 3
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s21, vcc_lo
	s_cbranch_execz .LBB2_8
; %bb.5:                                ; %.lr.ph
                                        ;   in Loop: Header=BB2_4 Depth=2
	v_ashrrev_i32_e32 v4, 31, v3
	s_mov_b32 s22, 0
	v_mov_b32_e32 v11, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[3:4]
	v_add_co_u32 v8, s0, s16, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s0, s17, v9, s0
	global_load_b32 v4, v[8:9], off
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v10, v4, s5
	v_mov_b32_e32 v4, 0
.LBB2_6:                                ;   Parent Loop BB2_2 Depth=1
                                        ;     Parent Loop BB2_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v13, v[8:9], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v12, v13, v2
	v_add_nc_u32_e32 v14, v13, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v13, 31, v12
	v_ashrrev_i32_e32 v15, 31, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_lshlrev_b64 v[14:15], 2, v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v12, s0, s8, v12
	v_add_co_ci_u32_e64 v13, s0, s9, v13, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v14, s0, s8, v14
	v_add_co_ci_u32_e64 v15, s0, s9, v15, s0
	v_add_co_u32 v8, s0, v8, 4
	s_clause 0x1
	global_load_b32 v12, v[12:13], off
	global_load_b32 v13, v[14:15], off
	v_add_nc_u32_e32 v11, -1, v11
	v_add_co_ci_u32_e64 v9, s0, 0, v9, s0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v4, v12, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s1, 0, v11
	s_or_b32 s22, s1, s22
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s22
	s_cbranch_execnz .LBB2_6
; %bb.7:                                ; %Flow
                                        ;   in Loop: Header=BB2_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s22
.LBB2_8:                                ; %Flow87
                                        ;   in Loop: Header=BB2_4 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s21
	v_mad_u64_u32 v[8:9], null, v3, s4, v[1:2]
	v_add_nc_u32_e32 v3, s12, v3
	v_cmp_le_i32_e64 s0, s6, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v9, 31, v8
	s_or_b32 s20, s0, s20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v8, s1, s10, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s1, s11, v9, s1
	global_store_b32 v[8:9], v4, off
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB2_4
; %bb.9:                                ; %Flow88
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s20
.LBB2_10:                               ; %Flow89
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s15
	v_add_nc_u32_e32 v1, s7, v1
	v_add_nc_u32_e32 v5, s13, v5
	v_cmp_le_i32_e32 vcc_lo, s4, v1
	s_or_b32 s14, vcc_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB2_2
.LBB2_11:                               ; %._crit_edge51
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14Kernel_linearePfS_iiiPiS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 23
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z14Kernel_linearePfS_iiiPiS0_S0_i, .Lfunc_end2-_Z14Kernel_linearePfS_iiiPiS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 688
; NumSgprs: 25
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 25
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii ; -- Begin function _Z18Kernel_polimonialePfS_iiiPiS0_S0_ii
	.globl	_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii
	.p2align	8
	.type	_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii,@function
_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii: ; @_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x4c
	s_load_b128 s[16:19], s[0:1], 0x10
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s2, s0, 64
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s14, s12, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s16, v1
	s_cbranch_execz .LBB3_15
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b32 s13, s[2:3], 0xc
	s_load_b256 s[4:11], s[0:1], 0x20
	s_load_b64 s[24:25], s[2:3], 0x0
	s_load_b128 s[20:23], s[0:1], 0x0
	v_bfe_u32 v0, v0, 10, 10
	s_mov_b32 s2, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s13, 16
	v_mul_lo_u32 v5, s10, v1
	v_mad_u64_u32 v[3:4], null, s15, s0, v[0:1]
	s_cmp_gt_i32 s11, 0
	s_mul_i32 s12, s24, s12
	s_cselect_b32 s3, -1, 0
	s_mul_i32 s13, s25, s0
	s_mul_i32 s10, s12, s10
.LBB3_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_4 Depth 2
                                        ;       Child Loop BB3_6 Depth 3
                                        ;       Child Loop BB3_10 Depth 3
	s_mov_b32 s14, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s18, v3
	s_cbranch_execz .LBB3_14
; %bb.3:                                ; %.lr.ph60
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s15, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_mul_lo_u32 v2, v1, s17
	v_add_co_u32 v6, vcc_lo, s8, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
	global_load_b32 v0, v[6:7], off
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e64 s0, 0, v0
.LBB3_4:                                ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_6 Depth 3
                                        ;       Child Loop BB3_10 Depth 3
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s19, s0
	s_cbranch_execz .LBB3_8
; %bb.5:                                ; %.lr.ph
                                        ;   in Loop: Header=BB3_4 Depth=2
	v_ashrrev_i32_e32 v4, 31, v3
	s_mov_b32 s24, 0
	v_mov_b32_e32 v11, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[3:4]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v4, v[8:9], off
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v10, v4, s17
	v_mov_b32_e32 v4, 0
.LBB3_6:                                ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v13, v[8:9], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v12, v13, v2
	v_add_nc_u32_e32 v14, v13, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v13, 31, v12
	v_ashrrev_i32_e32 v15, 31, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_lshlrev_b64 v[14:15], 2, v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v12, vcc_lo, s20, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s21, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v14, vcc_lo, s20, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s21, v15, vcc_lo
	v_add_co_u32 v8, vcc_lo, v8, 4
	s_clause 0x1
	global_load_b32 v12, v[12:13], off
	global_load_b32 v13, v[14:15], off
	v_add_nc_u32_e32 v11, -1, v11
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v4, v12, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s1, 0, v11
	s_or_b32 s24, s1, s24
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s24
	s_cbranch_execnz .LBB3_6
; %bb.7:                                ; %Flow115
                                        ;   in Loop: Header=BB3_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s24
.LBB3_8:                                ; %Flow116
                                        ;   in Loop: Header=BB3_4 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s19
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB3_11
; %bb.9:                                ; %.lr.ph56.preheader
                                        ;   in Loop: Header=BB3_4 Depth=2
	v_add_f32_e32 v8, 1.0, v4
	v_mov_b32_e32 v4, 1.0
	s_mov_b32 s1, s11
.LBB3_10:                               ; %.lr.ph56
                                        ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_f32_e32 v4, v8, v4
	s_add_i32 s1, s1, -1
	s_cmp_lg_u32 s1, 0
	s_cbranch_scc1 .LBB3_10
	s_branch .LBB3_12
.LBB3_11:                               ;   in Loop: Header=BB3_4 Depth=2
	v_mov_b32_e32 v4, 1.0
.LBB3_12:                               ; %._crit_edge57
                                        ;   in Loop: Header=BB3_4 Depth=2
	v_mad_u64_u32 v[8:9], null, v3, s16, v[1:2]
	v_add_nc_u32_e32 v3, s13, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_i32_e32 vcc_lo, s18, v3
	v_ashrrev_i32_e32 v9, 31, v8
	s_or_b32 s15, vcc_lo, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v8, s1, s22, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s1, s23, v9, s1
	global_store_b32 v[8:9], v4, off
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB3_4
; %bb.13:                               ; %Flow117
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s15
.LBB3_14:                               ; %Flow118
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s14
	v_add_nc_u32_e32 v1, s12, v1
	v_add_nc_u32_e32 v5, s10, v5
	v_cmp_le_i32_e32 vcc_lo, s16, v1
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB3_2
.LBB3_15:                               ; %._crit_edge65
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18Kernel_polimonialePfS_iiiPiS0_S0_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 26
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii, .Lfunc_end3-_Z18Kernel_polimonialePfS_iiiPiS0_S0_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 708
; NumSgprs: 28
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 28
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12Kernel_normePfS_PiS0_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12Kernel_normePfS_PiS0_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .offset:         72
        .size:           4
        .value_kind:     by_value
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         84
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         88
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         92
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         94
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         96
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         98
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         100
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         102
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         144
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 336
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11Kernel_gausPfS_S_iiiPifS0_S0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     28
    .sgpr_spill_count: 0
    .symbol:         _Z11Kernel_gausPfS_S_iiiPifS0_S0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14Kernel_linearePfS_iiiPiS0_S0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     25
    .sgpr_spill_count: 0
    .symbol:         _Z14Kernel_linearePfS_iiiPiS0_S0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           4
        .value_kind:     by_value
      - .offset:         60
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18Kernel_polimonialePfS_iiiPiS0_S0_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     28
    .sgpr_spill_count: 0
    .symbol:         _Z18Kernel_polimonialePfS_iiiPiS0_S0_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
