#include <iostream>
#include <cstdlib>
#include <math.h>
#include <stdio.h>
#include <assert.h>
#include <fstream>
#include <time.h>

__global__ void image_convolution_kernel(float *input, float *out, float *kernelConv,
                                         int img_width, const int img_height,
                                         const int kernel_width, const int kernel_height )
{

    int x = threadIdx.x + blockIdx.x * blockDim.x;
    int y = threadIdx.y + blockIdx.y * blockDim.y;
    if ((x < img_width) && (y < img_height)){  
        float sum = 0;
        for ( int j = 0; j < kernel_height; j++ )
        {
            for ( int i = 0; i < kernel_width; i++ )
            {
                int dX = x + i - kernel_width / 2;
                int dY = y + j - kernel_height / 2;

                if ( dX < 0 )
                    dX = 0;

                if ( dX >= img_width )
                    dX = img_width - 1;

                if ( dY < 0 )
                    dY = 0;

                if ( dY >= img_height )
                    dY = img_height - 1;


                const int idMat = j * kernel_width + i;
                const int idPixel = dY * img_width + dX;
                sum += (float)input[idPixel] * kernelConv[idMat];
            }
        }

        const int idOut = y * img_width + x;
        out[idOut] = abs(sum);
    }

}


void MC(float * input,float* output, int img_height, int img_width, const int r, float & gpu_elapsed_time_ms)
{

    // initialize kernel here
    int kernel_height = r;
    int kernel_width = r;

    float *kernel;
    kernel = new float[r*r];

    for (int i = 0; i < r*r; i++){
        kernel[i] = rand() % 10 + 1;
    }


    float * mask = new float[kernel_height*kernel_width];
    for (int i = 0; i < kernel_height*kernel_width; i++)
    {
        mask[i] = kernel[i];
    }

    float * d_input, * d_output, * d_kernel;
    cudaMalloc(&d_input, img_width*img_height*sizeof(float));
    cudaMalloc(&d_output, img_width*img_height*sizeof(float));
    cudaMalloc(&d_kernel, kernel_height*kernel_width*sizeof(float));

    cudaMemcpy(d_input, input, img_width*img_height*sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_kernel, mask, kernel_height*kernel_width*sizeof(float), cudaMemcpyHostToDevice);
    dim3 blocksize(16,16);
    dim3 gridsize;
    gridsize.x=(img_width+blocksize.x-1)/blocksize.x;
    gridsize.y=(img_height+blocksize.y-1)/blocksize.y;




    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);


    cudaEventRecord(start, 0);

    image_convolution_kernel<<<gridsize,blocksize>>>(d_input,d_output,d_kernel,img_width,img_height,kernel_width,kernel_height);
    cudaMemcpy(output, d_output, img_width*img_height*sizeof(float), cudaMemcpyDeviceToHost);


    cudaEventRecord(stop, 0);
    cudaEventSynchronize(stop);

    cudaEventElapsedTime(&gpu_elapsed_time_ms, start, stop);
}

int main(){
    // open the output file
    std::ofstream ofile;
    // customize output filename
    ofile.open("matrix_conv_gpu_500_points_Quadro.csv");
    // number of instances of data generated
    int NUM = 500;


    for (int iterator = 0; iterator < NUM; iterator++) {

        if (iterator % 10 == 0) std::cout << "iter: " << iterator << std::endl;

        float *in, *out;
        int m = rand() % 1024 + 10;
        int n = rand() % 1024 + 10;
        int is = n * m;

        int r = (rand() % 3 + 1) * 2 + 1;

        in = new float[is];
        out = new float[is];

        // density
        int power;
        double d;

        power = rand() % int((log2(double(m * n)) + 1));
        d = 1 / pow(2, power);
        
        // initialize matrix A
        // if A is a sparse matrix 
        if (d <= 0.5) {
            int count_a = m * n * d;
            for (int it = 0; it < count_a; it++) {
                int i = rand() % m;
                int j = rand() % n;

                in[i * n + j] = rand() % 1024 + 1;
            }
        // if A is a dense matrix    
        } else {
            for (int i = 0; i < m * n; i++) {
                in[i] = rand() % 1024 + 1;
            }
        }


        float time;
        // perform kernel operation 
        MC(in, out, n, m, r, time);
        int c = (m-r+1)*(n-r+1)*r*r;
        ofile << time / 1000;
        ofile << "," << m << "," << n << "," << r << "," << d << "," << c << ",\n";

    }

    ofile.close();
    return 0;
}
	.file	"tmpxft_00376338_00000000-6_MC_G_global.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3770:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3770:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z52__device_stub__Z24image_convolution_kernelPfS_S_iiiiPfS_S_iiii
	.type	_Z52__device_stub__Z24image_convolution_kernelPfS_S_iiiiPfS_S_iiii, @function
_Z52__device_stub__Z24image_convolution_kernelPfS_S_iiiiPfS_S_iiii:
.LFB3792:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z24image_convolution_kernelPfS_S_iiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3792:
	.size	_Z52__device_stub__Z24image_convolution_kernelPfS_S_iiiiPfS_S_iiii, .-_Z52__device_stub__Z24image_convolution_kernelPfS_S_iiiiPfS_S_iiii
	.globl	_Z24image_convolution_kernelPfS_S_iiii
	.type	_Z24image_convolution_kernelPfS_S_iiii, @function
_Z24image_convolution_kernelPfS_S_iiii:
.LFB3793:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z24image_convolution_kernelPfS_S_iiiiPfS_S_iiii
	.cfi_endproc
.LFE3793:
	.size	_Z24image_convolution_kernelPfS_S_iiii, .-_Z24image_convolution_kernelPfS_S_iiii
	.globl	_Z2MCPfS_iiiRf
	.type	_Z2MCPfS_iiiRf, @function
_Z2MCPfS_iiiRf:
.LFB3766:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%r8d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	imull	%r8d, %r14d
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r8d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%r14d, %rbx
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 16(%rsp)
	movq	%rsi, 24(%rsp)
	movq	%r9, 32(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	0(,%rbx,4), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	_Znam@PLT
	movq	%rax, %rbx
	movq	%rax, %rsi
	movq	8(%rsp), %rax
	leaq	(%rax,%rbx), %r15
.L9:
	cmpq	%r15, %rsi
	je	.L16
	movq	%rsi, 40(%rsp)
	call	rand@PLT
	movl	$10, %ecx
	movq	40(%rsp), %rsi
	cltd
	idivl	%ecx
	addq	$4, %rsi
	incl	%edx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, -4(%rsi)
	jmp	.L9
.L16:
	movq	8(%rsp), %rdi
	call	_Znam@PLT
	movq	%rax, %r15
	xorl	%eax, %eax
.L11:
	cmpl	%eax, %r14d
	jle	.L17
	movss	(%rbx,%rax,4), %xmm0
	movss	%xmm0, (%r15,%rax,4)
	incq	%rax
	jmp	.L11
.L17:
	movl	%r12d, %eax
	leaq	56(%rsp), %rdi
	imull	%r13d, %eax
	cltq
	leaq	0(,%rax,4), %r14
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rsi
	movq	56(%rsp), %rdi
	movq	%r14, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	72(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leal	15(%r12), %eax
	leaq	80(%rsp), %rdi
	movl	$1, 116(%rsp)
	shrl	$4, %eax
	movl	%eax, 108(%rsp)
	leal	15(%r13), %eax
	shrl	$4, %eax
	movl	%eax, 112(%rsp)
	call	cudaEventCreate@PLT
	leaq	88(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	108(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	116(%rsp), %esi
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	%rax
	.cfi_def_cfa_offset 200
	movl	%r12d, %ecx
	movl	%ebp, %r9d
	movl	%r13d, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 208
	movq	88(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	72(%rsp), %rdi
	call	_Z52__device_stub__Z24image_convolution_kernelPfS_S_iiiiPfS_S_iiii
	popq	%rdx
	.cfi_def_cfa_offset 200
	popq	%rcx
	.cfi_def_cfa_offset 192
.L13:
	movq	64(%rsp), %rsi
	movq	24(%rsp), %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	88(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	88(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3766:
	.size	_Z2MCPfS_iiiRf, .-_Z2MCPfS_iiiRf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z24image_convolution_kernelPfS_S_iiii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3795:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z24image_convolution_kernelPfS_S_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3795:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC1:
	.string	"matrix_conv_gpu_500_points_Quadro.csv"
.LC2:
	.string	"iter: "
.LC7:
	.string	","
.LC8:
	.string	",\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3767:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3767
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$584, %rsp
	.cfi_def_cfa_offset 640
	movq	%fs:40, %rax
	movq	%rax, 568(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
.LEHB0:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE0:
	movq	8(%rsp), %rdi
	movl	$16, %edx
	leaq	.LC1(%rip), %rsi
.LEHB1:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	xorl	%r12d, %r12d
.L34:
	movl	%r12d, %eax
	movl	$10, %ecx
	cltd
	idivl	%ecx
	testl	%edx, %edx
	je	.L21
.L24:
	call	rand@PLT
	movl	$1024, %r13d
	cltd
	idivl	%r13d
	leal	10(%rdx), %ebp
	call	rand@PLT
	movl	%ebp, %r15d
	cltd
	idivl	%r13d
	leal	10(%rdx), %ebx
	call	rand@PLT
	movl	$3, %ecx
	imull	%ebx, %r15d
	cltd
	idivl	%ecx
	movslq	%r15d, %rax
	leal	3(%rdx,%rdx), %r13d
	movabsq	$2305843009213693950, %rdx
	cmpq	%rax, %rdx
	jnb	.L22
	jmp	.L49
.L21:
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%r12d, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	jmp	.L24
.L22:
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	_Znam@PLT
	movq	16(%rsp), %rdi
	movq	%rax, %r14
	call	_Znam@PLT
	jmp	.L50
.L49:
	movq	568(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L46
	call	__cxa_throw_bad_array_new_length@PLT
.L50:
	movq	%rax, 24(%rsp)
	call	rand@PLT
	cvtsi2sdl	%r15d, %xmm2
	movl	%eax, 16(%rsp)
	movaps	%xmm2, %xmm0
	movsd	%xmm2, 32(%rsp)
	call	log2@PLT
	addsd	.LC3(%rip), %xmm0
	movl	16(%rsp), %eax
	cltd
	cvttsd2sil	%xmm0, %ecx
	movsd	.LC4(%rip), %xmm0
	idivl	%ecx
	cvtsi2sdl	%edx, %xmm1
	call	pow@PLT
	movsd	.LC3(%rip), %xmm3
	divsd	%xmm0, %xmm3
	movsd	.LC5(%rip), %xmm0
	comisd	%xmm3, %xmm0
	movsd	%xmm3, 16(%rsp)
	jb	.L44
	movsd	32(%rsp), %xmm2
	xorl	%esi, %esi
	mulsd	%xmm3, %xmm2
	cvttsd2sil	%xmm2, %r15d
.L29:
	cmpl	%r15d, %esi
	jge	.L33
	movl	%esi, 44(%rsp)
	call	rand@PLT
	cltd
	idivl	%ebp
	movl	%edx, 32(%rsp)
	call	rand@PLT
	cltd
	idivl	%ebx
	movl	%edx, 40(%rsp)
	call	rand@PLT
	movl	32(%rsp), %ecx
	movl	40(%rsp), %esi
	cltd
	imull	%ebx, %ecx
	addl	%esi, %ecx
	movl	$1024, %esi
	idivl	%esi
	movl	44(%rsp), %esi
	movslq	%ecx, %rcx
	incl	%esi
	incl	%edx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%r14,%rcx,4)
	jmp	.L29
.L33:
	movq	24(%rsp), %rsi
	leaq	52(%rsp), %r9
	movl	%r13d, %r8d
	movl	%ebp, %ecx
	movl	%ebx, %edx
	movq	%r14, %rdi
	call	_Z2MCPfS_iiiRf
	jmp	.L51
.L44:
	xorl	%ecx, %ecx
.L27:
	cmpl	%ecx, %r15d
	jle	.L33
	movq	%rcx, 32(%rsp)
	call	rand@PLT
	movl	$1024, %ecx
	cltd
	idivl	%ecx
	movq	32(%rsp), %rcx
	incl	%edx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%r14,%rcx,4)
	incq	%rcx
	jmp	.L27
.L51:
	movl	%ebp, %r14d
	movl	%ebx, %eax
	movq	8(%rsp), %rdi
	movss	52(%rsp), %xmm0
	subl	%r13d, %r14d
	subl	%r13d, %eax
	divss	.LC6(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	incl	%r14d
	incl	%eax
	imull	%eax, %r14d
	imull	%r13d, %r14d
	imull	%r13d, %r14d
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC7(%rip), %r15
	movq	8(%rsp), %rdi
	movq	%r15, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%ebp, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	movq	%r15, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%ebx, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	movq	%r15, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%r13d, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	movq	%r15, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	16(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	movq	%r15, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%r14d, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	leaq	.LC8(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	incl	%r12d
	cmpl	$500, %r12d
	jne	.L34
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
.LEHE1:
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	568(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	jmp	.L46
.L39:
	endbr64
	movq	%rax, %rbx
.L35:
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	568(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L46
	movq	%rbx, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L46:
	call	__stack_chk_fail@PLT
.L37:
	addq	$584, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3767:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3767:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3767-.LLSDACSB3767
.LLSDACSB3767:
	.uleb128 .LEHB0-.LFB3767
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3767
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L39-.LFB3767
	.uleb128 0
	.uleb128 .LEHB2-.LFB3767
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE3767:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	0
	.long	1072693248
	.align 8
.LC4:
	.long	0
	.long	1073741824
	.align 8
.LC5:
	.long	0
	.long	1071644672
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC6:
	.long	1148846080
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <cstdlib>
#include <math.h>
#include <stdio.h>
#include <assert.h>
#include <fstream>
#include <time.h>

__global__ void image_convolution_kernel(float *input, float *out, float *kernelConv,
                                         int img_width, const int img_height,
                                         const int kernel_width, const int kernel_height )
{

    int x = threadIdx.x + blockIdx.x * blockDim.x;
    int y = threadIdx.y + blockIdx.y * blockDim.y;
    if ((x < img_width) && (y < img_height)){  
        float sum = 0;
        for ( int j = 0; j < kernel_height; j++ )
        {
            for ( int i = 0; i < kernel_width; i++ )
            {
                int dX = x + i - kernel_width / 2;
                int dY = y + j - kernel_height / 2;

                if ( dX < 0 )
                    dX = 0;

                if ( dX >= img_width )
                    dX = img_width - 1;

                if ( dY < 0 )
                    dY = 0;

                if ( dY >= img_height )
                    dY = img_height - 1;


                const int idMat = j * kernel_width + i;
                const int idPixel = dY * img_width + dX;
                sum += (float)input[idPixel] * kernelConv[idMat];
            }
        }

        const int idOut = y * img_width + x;
        out[idOut] = abs(sum);
    }

}


void MC(float * input,float* output, int img_height, int img_width, const int r, float & gpu_elapsed_time_ms)
{

    // initialize kernel here
    int kernel_height = r;
    int kernel_width = r;

    float *kernel;
    kernel = new float[r*r];

    for (int i = 0; i < r*r; i++){
        kernel[i] = rand() % 10 + 1;
    }


    float * mask = new float[kernel_height*kernel_width];
    for (int i = 0; i < kernel_height*kernel_width; i++)
    {
        mask[i] = kernel[i];
    }

    float * d_input, * d_output, * d_kernel;
    hipMalloc(&d_input, img_width*img_height*sizeof(float));
    hipMalloc(&d_output, img_width*img_height*sizeof(float));
    hipMalloc(&d_kernel, kernel_height*kernel_width*sizeof(float));

    hipMemcpy(d_input, input, img_width*img_height*sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_kernel, mask, kernel_height*kernel_width*sizeof(float), hipMemcpyHostToDevice);
    dim3 blocksize(16,16);
    dim3 gridsize;
    gridsize.x=(img_width+blocksize.x-1)/blocksize.x;
    gridsize.y=(img_height+blocksize.y-1)/blocksize.y;




    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);


    hipEventRecord(start, 0);

    image_convolution_kernel<<<gridsize,blocksize>>>(d_input,d_output,d_kernel,img_width,img_height,kernel_width,kernel_height);
    hipMemcpy(output, d_output, img_width*img_height*sizeof(float), hipMemcpyDeviceToHost);


    hipEventRecord(stop, 0);
    hipEventSynchronize(stop);

    hipEventElapsedTime(&gpu_elapsed_time_ms, start, stop);
}

int main(){
    // open the output file
    std::ofstream ofile;
    // customize output filename
    ofile.open("matrix_conv_gpu_500_points_Quadro.csv");
    // number of instances of data generated
    int NUM = 500;


    for (int iterator = 0; iterator < NUM; iterator++) {

        if (iterator % 10 == 0) std::cout << "iter: " << iterator << std::endl;

        float *in, *out;
        int m = rand() % 1024 + 10;
        int n = rand() % 1024 + 10;
        int is = n * m;

        int r = (rand() % 3 + 1) * 2 + 1;

        in = new float[is];
        out = new float[is];

        // density
        int power;
        double d;

        power = rand() % int((log2(double(m * n)) + 1));
        d = 1 / pow(2, power);
        
        // initialize matrix A
        // if A is a sparse matrix 
        if (d <= 0.5) {
            int count_a = m * n * d;
            for (int it = 0; it < count_a; it++) {
                int i = rand() % m;
                int j = rand() % n;

                in[i * n + j] = rand() % 1024 + 1;
            }
        // if A is a dense matrix    
        } else {
            for (int i = 0; i < m * n; i++) {
                in[i] = rand() % 1024 + 1;
            }
        }


        float time;
        // perform kernel operation 
        MC(in, out, n, m, r, time);
        int c = (m-r+1)*(n-r+1)*r*r;
        ofile << time / 1000;
        ofile << "," << m << "," << n << "," << r << "," << d << "," << c << ",\n";

    }

    ofile.close();
    return 0;
}
	.text
	.file	"MC_G_global.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z39__device_stub__image_convolution_kernelPfS_S_iiii # -- Begin function _Z39__device_stub__image_convolution_kernelPfS_S_iiii
	.type	_Z39__device_stub__image_convolution_kernelPfS_S_iiii,@function
_Z39__device_stub__image_convolution_kernelPfS_S_iiii: # @_Z39__device_stub__image_convolution_kernelPfS_S_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24image_convolution_kernelPfS_S_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z39__device_stub__image_convolution_kernelPfS_S_iiii, .Lfunc_end0-_Z39__device_stub__image_convolution_kernelPfS_S_iiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z2MCPfS_iiiRf                  # -- Begin function _Z2MCPfS_iiiRf
	.type	_Z2MCPfS_iiiRf,@function
_Z2MCPfS_iiiRf:                         # @_Z2MCPfS_iiiRf
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 72(%rsp)                   # 8-byte Spill
	movl	%r8d, %ebp
                                        # kill: def $ecx killed $ecx def $rcx
	movq	%rcx, 56(%rsp)                  # 8-byte Spill
                                        # kill: def $edx killed $edx def $rdx
	movq	%rdx, 48(%rsp)                  # 8-byte Spill
	movq	%rsi, 64(%rsp)                  # 8-byte Spill
	movq	%rdi, 40(%rsp)                  # 8-byte Spill
	movl	%r8d, %r14d
	imull	%r14d, %r14d
	leaq	(,%r14,4), %r13
	movq	%r13, %rdi
	callq	_Znam
	testl	%ebp, %ebp
	movl	%ebp, 20(%rsp)                  # 4-byte Spill
	je	.LBB1_1
# %bb.7:                                # %.lr.ph.preheader
	movq	%rax, %rbx
	cmpl	$2, %r14d
	movl	$1, %r15d
	cmovael	%r14d, %r15d
	xorl	%r12d, %r12d
.LBB1_8:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbx,%r12,4)
	incq	%r12
	cmpq	%r12, %r15
	jne	.LBB1_8
# %bb.2:                                # %._crit_edge
	movq	%r13, %r15
	movq	%r13, %rdi
	callq	_Znam
	testl	%ebp, %ebp
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	je	.LBB1_4
# %bb.3:                                # %.lr.ph61.preheader
	cmpq	$1, %r14
	adcq	$0, %r14
	shlq	$2, %r14
	movq	%rax, %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
	jmp	.LBB1_4
.LBB1_1:                                # %._crit_edge.thread
	movq	%r13, %rdi
	callq	_Znam
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	%r13, %r15
.LBB1_4:                                # %._crit_edge62
	movq	56(%rsp), %r12                  # 8-byte Reload
	movl	%r12d, %eax
	movq	48(%rsp), %r13                  # 8-byte Reload
	imull	%r13d, %eax
	movslq	%eax, %r14
	shlq	$2, %r14
	leaq	96(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	88(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leal	15(%r12), %eax
	shrl	$4, %eax
	leal	15(%r13), %ebx
	shrl	$4, %ebx
	shlq	$32, %rbx
	orq	%rax, %rbx
	leaq	80(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r15), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:
	movq	96(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	88(%rsp), %rdx
	movl	20(%rsp), %r9d                  # 4-byte Reload
	movl	%r9d, (%rsp)
	movl	%r12d, %ecx
	movl	%r13d, %r8d
	callq	_Z39__device_stub__image_convolution_kernelPfS_S_iiii
.LBB1_6:
	movq	32(%rsp), %rsi
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	80(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	72(%rsp), %rdi                  # 8-byte Reload
	callq	hipEventElapsedTime
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z2MCPfS_iiiRf, .Lfunc_end1-_Z2MCPfS_iiiRf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI2_0:
	.quad	0x3ff0000000000000              # double 1
.LCPI2_1:
	.quad	0x3fe0000000000000              # double 0.5
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI2_2:
	.long	0x447a0000                      # float 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$584, %rsp                      # imm = 0x248
	.cfi_def_cfa_offset 640
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	72(%rsp), %rbx
	movq	%rbx, %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
.Ltmp0:
	movl	$.L.str, %esi
	movq	%rbx, %rdi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp1:
# %bb.1:                                # %.preheader72.preheader
	xorl	%r13d, %r13d
.LBB2_2:                                # %.preheader72
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_16 Depth 2
                                        #     Child Loop BB2_13 Depth 2
	imull	$-13107, %r13d, %eax            # imm = 0xCCCD
	rorw	%ax
	movzwl	%ax, %eax
	cmpl	$6553, %eax                     # imm = 0x1999
	ja	.LBB2_8
# %bb.3:                                #   in Loop: Header=BB2_2 Depth=1
.Ltmp3:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp4:
# %bb.4:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
                                        #   in Loop: Header=BB2_2 Depth=1
.Ltmp5:
	movl	$_ZSt4cout, %edi
	movl	%r13d, %esi
	callq	_ZNSolsEi
.Ltmp6:
# %bb.5:                                #   in Loop: Header=BB2_2 Depth=1
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp7:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp8:
# %bb.6:                                # %.noexc
                                        #   in Loop: Header=BB2_2 Depth=1
.Ltmp9:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp10:
# %bb.7:                                # %.noexc69
                                        #   in Loop: Header=BB2_2 Depth=1
.Ltmp11:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp12:
.LBB2_8:                                # %_ZNSolsEPFRSoS_E.exit
                                        #   in Loop: Header=BB2_2 Depth=1
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	movl	$1023, %ebx                     # imm = 0x3FF
	leal	(%rax,%rbx), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	movl	$-1024, %ebp                    # imm = 0xFC00
	andl	%ebp, %ecx
	movl	%ecx, 12(%rsp)                  # 4-byte Spill
                                        # kill: def $ecx killed $ecx def $rcx
	negl	%ecx
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	leal	(%rax,%rcx), %r14d
	addl	$10, %r14d
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	(%rax,%rbx), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	%ebp, %ecx
	movl	%ecx, 8(%rsp)                   # 4-byte Spill
                                        # kill: def $ecx killed $ecx def $rcx
	negl	%ecx
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	leal	(%rax,%rcx), %ebp
	addl	$10, %ebp
	movl	%ebp, %r12d
	imull	%r14d, %r12d
	callq	rand
	movl	%eax, 16(%rsp)                  # 4-byte Spill
	movslq	%r12d, %rax
	leaq	(,%rax,4), %rbx
	testl	%eax, %eax
	movq	$-1, %rax
	cmovsq	%rax, %rbx
.Ltmp14:
	movq	%rbx, %rdi
	callq	_Znam
.Ltmp15:
# %bb.9:                                #   in Loop: Header=BB2_2 Depth=1
.Ltmp16:
	movq	%rax, %r15
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, 64(%rsp)                  # 8-byte Spill
.Ltmp17:
# %bb.10:                               #   in Loop: Header=BB2_2 Depth=1
	movq	%r13, 56(%rsp)                  # 8-byte Spill
	callq	rand
	movl	%eax, %ebx
	cvtsi2sd	%r12d, %xmm0
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	callq	log2
	movsd	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero
	addsd	%xmm1, %xmm0
	cvttsd2si	%xmm0, %ecx
	movl	%ebx, %eax
	cltd
	idivl	%ecx
	movl	%edx, %edi
	movapd	%xmm1, %xmm0
	callq	ldexp@PLT
	movsd	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	movsd	.LCPI2_1(%rip), %xmm0           # xmm0 = mem[0],zero
	ucomisd	%xmm1, %xmm0
	movsd	%xmm1, 32(%rsp)                 # 8-byte Spill
	jae	.LBB2_15
# %bb.11:                               # %.preheader
                                        #   in Loop: Header=BB2_2 Depth=1
	testl	%r12d, %r12d
	jle	.LBB2_17
# %bb.12:                               # %.lr.ph75.preheader
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%r12d, %ebx
	xorl	%r12d, %r12d
.LBB2_13:                               # %.lr.ph75
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	1023(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-1024, %ecx                    # imm = 0xFC00
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpq	%r12, %rbx
	jne	.LBB2_13
	jmp	.LBB2_17
.LBB2_15:                               #   in Loop: Header=BB2_2 Depth=1
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	%xmm1, %xmm0
	cvttsd2si	%xmm0, %r13d
	testl	%r13d, %r13d
	jle	.LBB2_17
.LBB2_16:                               # %.lr.ph
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltd
	idivl	%r14d
	movl	%edx, %ebx
	callq	rand
	cltd
	idivl	%ebp
	movl	%edx, %r12d
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	1023(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-1024, %ecx                    # imm = 0xFC00
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	imull	%ebp, %ebx
	addl	%r12d, %ebx
	movslq	%ebx, %rax
	movss	%xmm0, (%r15,%rax,4)
	decl	%r13d
	jne	.LBB2_16
.LBB2_17:                               # %.loopexit
                                        #   in Loop: Header=BB2_2 Depth=1
.Ltmp19:
	movslq	16(%rsp), %r12                  # 4-byte Folded Reload
	imulq	$1431655766, %r12, %rax         # imm = 0x55555556
	movq	%rax, %rcx
	shrq	$63, %rcx
	shrq	$32, %rax
	addl	%ecx, %eax
	leal	(%rax,%rax,2), %eax
	subl	%eax, %r12d
	leal	3(,%r12,2), %ebx
	movq	%r15, %rdi
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movl	%ebp, %edx
	movl	%r14d, %ecx
	movl	%ebx, %r8d
	leaq	20(%rsp), %r9
	callq	_Z2MCPfS_iiiRf
.Ltmp20:
# %bb.18:                               #   in Loop: Header=BB2_2 Depth=1
	movss	20(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI2_2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
.Ltmp22:
	leaq	72(%rsp), %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp23:
	movq	56(%rsp), %r13                  # 8-byte Reload
# %bb.19:                               # %_ZNSolsEf.exit
                                        #   in Loop: Header=BB2_2 Depth=1
.Ltmp24:
	movl	$.L.str.2, %esi
	movl	$1, %edx
	leaq	72(%rsp), %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp25:
# %bb.20:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit63
                                        #   in Loop: Header=BB2_2 Depth=1
.Ltmp26:
	leaq	72(%rsp), %rdi
	movl	%r14d, %esi
	callq	_ZNSolsEi
.Ltmp27:
# %bb.21:                               #   in Loop: Header=BB2_2 Depth=1
.Ltmp28:
	movq	%rax, %r14
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp29:
# %bb.22:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit64
                                        #   in Loop: Header=BB2_2 Depth=1
.Ltmp30:
	movq	%r14, %rdi
	movl	%ebp, %esi
	callq	_ZNSolsEi
.Ltmp31:
# %bb.23:                               #   in Loop: Header=BB2_2 Depth=1
.Ltmp32:
	movq	%rax, %r14
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp33:
# %bb.24:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit65
                                        #   in Loop: Header=BB2_2 Depth=1
.Ltmp34:
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_ZNSolsEi
.Ltmp35:
# %bb.25:                               #   in Loop: Header=BB2_2 Depth=1
.Ltmp36:
	movq	%rax, %r14
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp37:
# %bb.26:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit66
                                        #   in Loop: Header=BB2_2 Depth=1
.Ltmp38:
	movq	%r14, %rdi
	movsd	32(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp39:
# %bb.27:                               # %_ZNSolsEd.exit
                                        #   in Loop: Header=BB2_2 Depth=1
.Ltmp40:
	movq	%rax, %r14
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp41:
# %bb.28:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit67
                                        #   in Loop: Header=BB2_2 Depth=1
.Ltmp42:
	movq	48(%rsp), %rax                  # 8-byte Reload
	subl	12(%rsp), %eax                  # 4-byte Folded Reload
	movq	40(%rsp), %rcx                  # 8-byte Reload
	subl	8(%rsp), %ecx                   # 4-byte Folded Reload
	addl	%r12d, %r12d
	subl	%r12d, %eax
	addl	$8, %eax
	subl	%r12d, %ecx
	addl	$8, %ecx
	imull	%eax, %ecx
	imull	%ebx, %ebx
	imull	%ecx, %ebx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_ZNSolsEi
.Ltmp43:
# %bb.29:                               #   in Loop: Header=BB2_2 Depth=1
.Ltmp44:
	movl	$.L.str.3, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp45:
# %bb.30:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit68
                                        #   in Loop: Header=BB2_2 Depth=1
	incl	%r13d
	cmpl	$500, %r13d                     # imm = 0x1F4
	jne	.LBB2_2
# %bb.31:
.Ltmp47:
	leaq	72(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp48:
# %bb.32:
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
	leaq	80(%rsp), %rdi
	movq	%rax, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rcx
	movq	-24(%rax), %rax
	movq	%rcx, 72(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	320(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	xorl	%eax, %eax
	addq	$584, %rsp                      # imm = 0x248
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_35:
	.cfi_def_cfa_offset 640
.Ltmp49:
	jmp	.LBB2_36
.LBB2_37:
.Ltmp2:
	jmp	.LBB2_36
.LBB2_33:
.Ltmp21:
	jmp	.LBB2_36
.LBB2_38:
.Ltmp13:
	jmp	.LBB2_36
.LBB2_14:
.Ltmp18:
	jmp	.LBB2_36
.LBB2_34:
.Ltmp46:
.LBB2_36:
	movq	%rax, %rbx
	leaq	72(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table2:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp12-.Ltmp3                 #   Call between .Ltmp3 and .Ltmp12
	.uleb128 .Ltmp13-.Lfunc_begin0          #     jumps to .Ltmp13
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp14-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp17-.Ltmp14                #   Call between .Ltmp14 and .Ltmp17
	.uleb128 .Ltmp18-.Lfunc_begin0          #     jumps to .Ltmp18
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp17-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp19-.Ltmp17                #   Call between .Ltmp17 and .Ltmp19
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp19-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp20-.Ltmp19                #   Call between .Ltmp19 and .Ltmp20
	.uleb128 .Ltmp21-.Lfunc_begin0          #     jumps to .Ltmp21
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp22-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp45-.Ltmp22                #   Call between .Ltmp22 and .Ltmp45
	.uleb128 .Ltmp46-.Lfunc_begin0          #     jumps to .Ltmp46
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp47-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp48-.Ltmp47                #   Call between .Ltmp47 and .Ltmp48
	.uleb128 .Ltmp49-.Lfunc_begin0          #     jumps to .Ltmp49
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp48-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Lfunc_end2-.Ltmp48            #   Call between .Ltmp48 and .Lfunc_end2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24image_convolution_kernelPfS_S_iiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z24image_convolution_kernelPfS_S_iiii,@object # @_Z24image_convolution_kernelPfS_S_iiii
	.section	.rodata,"a",@progbits
	.globl	_Z24image_convolution_kernelPfS_S_iiii
	.p2align	3, 0x0
_Z24image_convolution_kernelPfS_S_iiii:
	.quad	_Z39__device_stub__image_convolution_kernelPfS_S_iiii
	.size	_Z24image_convolution_kernelPfS_S_iiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"matrix_conv_gpu_500_points_Quadro.csv"
	.size	.L.str, 38

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"iter: "
	.size	.L.str.1, 7

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	","
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	",\n"
	.size	.L.str.3, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z24image_convolution_kernelPfS_S_iiii"
	.size	.L__unnamed_1, 39

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z39__device_stub__image_convolution_kernelPfS_S_iiii
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z24image_convolution_kernelPfS_S_iiii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z24image_convolution_kernelPfS_S_iiii ; -- Begin function _Z24image_convolution_kernelPfS_S_iiii
	.globl	_Z24image_convolution_kernelPfS_S_iiii
	.p2align	8
	.type	_Z24image_convolution_kernelPfS_S_iiii,@function
_Z24image_convolution_kernelPfS_S_iiii: ; @_Z24image_convolution_kernelPfS_S_iiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_bfe_u32 v3, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_lshr_b32 s2, s2, 16
	s_mul_i32 s12, s14, s3
	v_mad_u64_u32 v[0:1], null, s15, s2, v[3:4]
	v_add_nc_u32_e32 v1, s12, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s4, v1
	v_cmp_gt_i32_e64 s2, s5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_9
; %bb.1:                                ; %.preheader57
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s7, 1
	s_cbranch_scc1 .LBB0_7
; %bb.2:                                ; %.preheader.lr.ph
	s_cmp_gt_i32 s6, 0
	s_mov_b32 s3, 0
	s_cselect_b32 s14, -1, 0
	s_lshr_b32 s2, s6, 31
	s_lshr_b32 s13, s7, 1
	s_add_i32 s2, s6, s2
	v_subrev_nc_u32_e32 v3, s13, v0
	s_ashr_i32 s2, s2, 1
	s_add_i32 s15, s4, -1
	s_sub_i32 s2, s12, s2
	s_add_i32 s16, s5, -1
	v_add_nc_u32_e32 v4, s2, v2
	v_mov_b32_e32 v2, 0
	s_mov_b32 s2, s3
	s_mov_b32 s17, s3
.LBB0_3:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB0_6
; %bb.4:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_dual_mov_b32 v6, v4 :: v_dual_add_nc_u32 v5, s17, v3
	s_lshl_b64 s[12:13], s[2:3], 2
	s_mov_b32 s18, s6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s12, s0, s12
	v_max_i32_e32 v5, 0, v5
	s_addc_u32 s13, s1, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s5, v5
	v_cndmask_b32_e32 v5, s16, v5, vcc_lo
	v_mul_lo_u32 v5, v5, s4
.LBB0_5:                                ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_max_i32_e32 v7, 0, v6
	s_load_b32 s19, s[12:13], 0x0
	s_add_i32 s18, s18, -1
	s_add_u32 s12, s12, 4
	s_addc_u32 s13, s13, 0
	v_cmp_gt_i32_e32 vcc_lo, s4, v7
	s_cmp_eq_u32 s18, 0
	v_dual_cndmask_b32 v7, s15, v7 :: v_dual_add_nc_u32 v6, 1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v7, v7, v5
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v7, vcc_lo, s8, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v2, s19, v7
	s_cbranch_scc0 .LBB0_5
.LBB0_6:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_add_i32 s17, s17, 1
	s_add_i32 s2, s2, s6
	s_cmp_eq_u32 s17, s7
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_8
.LBB0_7:
	v_mov_b32_e32 v2, 0
.LBB0_8:                                ; %._crit_edge62
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, v0, s4, v[1:2]
	v_and_b32_e32 v2, 0x7fffffff, v2
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24image_convolution_kernelPfS_S_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z24image_convolution_kernelPfS_S_iiii, .Lfunc_end0-_Z24image_convolution_kernelPfS_S_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 448
; NumSgprs: 22
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z24image_convolution_kernelPfS_S_iiii
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z24image_convolution_kernelPfS_S_iiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
