#include <stdio.h>
#include <sys/time.h>

#define SAMPLE_TEST_LEN 2048
#define SCALER 4096
#define LUT_SIZE 1024

__device__
short lut_sigmoid[LUT_SIZE] = {
    2048,2056,2064,2072,2080,2088,2096,2104,
    2112,2120,2128,2136,2144,2152,2160,2168,
    2176,2184,2192,2200,2208,2216,2224,2232,
    2239,2247,2255,2263,2271,2279,2287,2295,
    2303,2311,2318,2326,2334,2342,2350,2358,
    2365,2373,2381,2389,2397,2404,2412,2420,
    2428,2435,2443,2451,2458,2466,2474,2481,
    2489,2497,2504,2512,2519,2527,2535,2542,
    2550,2557,2565,2572,2580,2587,2594,2602,
    2609,2617,2624,2631,2639,2646,2653,2661,
    2668,2675,2682,2690,2697,2704,2711,2718,
    2726,2733,2740,2747,2754,2761,2768,2775,
    2782,2789,2796,2803,2810,2817,2823,2830,
    2837,2844,2851,2857,2864,2871,2878,2884,
    2891,2898,2904,2911,2917,2924,2930,2937,
    2943,2950,2956,2963,2969,2975,2982,2988,
    2994,3001,3007,3013,3019,3026,3032,3038,
    3044,3050,3056,3062,3068,3074,3080,3086,
    3092,3098,3104,3110,3116,3121,3127,3133,
    3139,3144,3150,3156,3161,3167,3173,3178,
    3184,3189,3195,3200,3206,3211,3217,3222,
    3227,3233,3238,3243,3249,3254,3259,3264,
    3269,3275,3280,3285,3290,3295,3300,3305,
    3310,3315,3320,3325,3330,3334,3339,3344,
    3349,3354,3358,3363,3368,3372,3377,3382,
    3386,3391,3395,3400,3404,3409,3413,3418,
    3422,3427,3431,3435,3440,3444,3448,3452,
    3457,3461,3465,3469,3473,3477,3481,3486,
    3490,3494,3498,3502,3506,3510,3513,3517,
    3521,3525,3529,3533,3536,3540,3544,3548,
    3551,3555,3559,3562,3566,3570,3573,3577,
    3580,3584,3587,3591,3594,3598,3601,3604,
    3608,3611,3614,3618,3621,3624,3628,3631,
    3634,3637,3640,3644,3647,3650,3653,3656,
    3659,3662,3665,3668,3671,3674,3677,3680,
    3683,3686,3689,3691,3694,3697,3700,3703,
    3705,3708,3711,3714,3716,3719,3722,3724,
    3727,3730,3732,3735,3737,3740,3742,3745,
    3747,3750,3752,3755,3757,3760,3762,3764,
    3767,3769,3772,3774,3776,3778,3781,3783,
    3785,3788,3790,3792,3794,3796,3798,3801,
    3803,3805,3807,3809,3811,3813,3815,3817,
    3819,3821,3823,3825,3827,3829,3831,3833,
    3835,3837,3839,3841,3843,3844,3846,3848,
    3850,3852,3853,3855,3857,3859,3861,3862,
    3864,3866,3867,3869,3871,3872,3874,3876,
    3877,3879,3880,3882,3884,3885,3887,3888,
    3890,3891,3893,3894,3896,3897,3899,3900,
    3902,3903,3905,3906,3907,3909,3910,3912,
    3913,3914,3916,3917,3918,3920,3921,3922,
    3924,3925,3926,3927,3929,3930,3931,3932,
    3934,3935,3936,3937,3938,3940,3941,3942,
    3943,3944,3945,3947,3948,3949,3950,3951,
    3952,3953,3954,3955,3956,3957,3958,3959,
    3960,3961,3963,3964,3965,3966,3966,3967,
    3968,3969,3970,3971,3972,3973,3974,3975,
    3976,3977,3978,3979,3980,3980,3981,3982,
    3983,3984,3985,3986,3986,3987,3988,3989,
    3990,3990,3991,3992,3993,3994,3994,3995,
    3996,3997,3997,3998,3999,4000,4000,4001,
    4002,4003,4003,4004,4005,4005,4006,4007,
    4007,4008,4009,4009,4010,4011,4011,4012,
    4013,4013,4014,4015,4015,4016,4016,4017,
    4018,4018,4019,4019,4020,4021,4021,4022,
    4022,4023,4023,4024,4025,4025,4026,4026,
    4027,4027,4028,4028,4029,4029,4030,4030,
    4031,4031,4032,4032,4033,4033,4034,4034,
    4035,4035,4036,4036,4037,4037,4038,4038,
    4038,4039,4039,4040,4040,4041,4041,4041,
    4042,4042,4043,4043,4043,4044,4044,4045,
    4045,4045,4046,4046,4047,4047,4047,4048,
    4048,4048,4049,4049,4050,4050,4050,4051,
    4051,4051,4052,4052,4052,4053,4053,4053,
    4054,4054,4054,4055,4055,4055,4056,4056,
    4056,4057,4057,4057,4057,4058,4058,4058,
    4059,4059,4059,4059,4060,4060,4060,4061,
    4061,4061,4061,4062,4062,4062,4062,4063,
    4063,4063,4063,4064,4064,4064,4064,4065,
    4065,4065,4065,4066,4066,4066,4066,4067,
    4067,4067,4067,4068,4068,4068,4068,4068,
    4069,4069,4069,4069,4069,4070,4070,4070,
    4070,4070,4071,4071,4071,4071,4071,4072,
    4072,4072,4072,4072,4073,4073,4073,4073,
    4073,4073,4074,4074,4074,4074,4074,4074,
    4075,4075,4075,4075,4075,4075,4076,4076,
    4076,4076,4076,4076,4077,4077,4077,4077,
    4077,4077,4077,4078,4078,4078,4078,4078,
    4078,4078,4079,4079,4079,4079,4079,4079,
    4079,4079,4080,4080,4080,4080,4080,4080,
    4080,4080,4081,4081,4081,4081,4081,4081,
    4081,4081,4082,4082,4082,4082,4082,4082,
    4082,4082,4082,4082,4083,4083,4083,4083,
    4083,4083,4083,4083,4083,4084,4084,4084,
    4084,4084,4084,4084,4084,4084,4084,4084,
    4085,4085,4085,4085,4085,4085,4085,4085,
    4085,4085,4085,4085,4086,4086,4086,4086,
    4086,4086,4086,4086,4086,4086,4086,4086,
    4086,4087,4087,4087,4087,4087,4087,4087,
    4087,4087,4087,4087,4087,4087,4087,4088,
    4088,4088,4088,4088,4088,4088,4088,4088,
    4088,4088,4088,4088,4088,4088,4088,4089,
    4089,4089,4089,4089,4089,4089,4089,4089,
    4089,4089,4089,4089,4089,4089,4089,4089,
    4089,4090,4090,4090,4090,4090,4090,4090,
    4090,4090,4090,4090,4090,4090,4090,4090,
    4090,4090,4090,4090,4090,4090,4090,4091,
    4091,4091,4091,4091,4091,4091,4091,4091,
    4091,4091,4091,4091,4091,4091,4091,4091,
    4091,4091,4091,4091,4091,4091,4091,4091,
    4091,4092,4092,4092,4092,4092,4092,4092,
    4092,4092,4092,4092,4092,4092,4092,4092,
    4092,4092,4092,4092,4092,4092,4092,4092,
    4092,4092,4092,4092,4092,4092,4092,4092,
    4092,4093,4093,4093,4093,4093,4093,4093,
    4093,4093,4093,4093,4093,4093,4093,4093,
    4093,4093,4093,4093,4093,4093,4093,4093,
    4093,4093,4093,4093,4093,4093,4093,4093,
    4093,4093,4093,4093,4093,4093,4093,4093,
    4093,4093,4093,4093,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4095,4095,4095,
    4095,4095,4095,4095,4095,4095,4095,4095};

__device__
short lut_tanh[LUT_SIZE] = {
    0,32,64,96,128,160,192,224,
    256,288,319,351,383,415,446,478,
    509,541,572,604,635,666,697,728,
    759,790,821,851,882,912,943,973,
    1003,1033,1063,1093,1123,1152,1181,1211,
    1240,1269,1298,1326,1355,1383,1412,1440,
    1468,1496,1523,1551,1578,1605,1632,1659,
    1686,1712,1739,1765,1791,1817,1842,1868,
    1893,1918,1943,1968,1992,2016,2041,2064,
    2088,2112,2135,2158,2181,2204,2227,2249,
    2272,2294,2316,2337,2359,2380,2401,2422,
    2443,2463,2484,2504,2524,2543,2563,2582,
    2602,2621,2639,2658,2676,2695,2713,2731,
    2748,2766,2783,2800,2817,2834,2851,2867,
    2883,2899,2915,2931,2946,2962,2977,2992,
    3007,3021,3036,3050,3064,3078,3092,3106,
    3119,3133,3146,3159,3172,3185,3197,3210,
    3222,3234,3246,3258,3270,3281,3293,3304,
    3315,3326,3337,3347,3358,3368,3379,3389,
    3399,3409,3419,3428,3438,3447,3456,3466,
    3475,3483,3492,3501,3510,3518,3526,3535,
    3543,3551,3559,3566,3574,3582,3589,3596,
    3604,3611,3618,3625,3632,3639,3645,3652,
    3659,3665,3671,3678,3684,3690,3696,3702,
    3707,3713,3719,3724,3730,3735,3741,3746,
    3751,3756,3761,3766,3771,3776,3781,3786,
    3790,3795,3799,3804,3808,3812,3817,3821,
    3825,3829,3833,3837,3841,3845,3848,3852,
    3856,3859,3863,3867,3870,3873,3877,3880,
    3883,3887,3890,3893,3896,3899,3902,3905,
    3908,3911,3913,3916,3919,3922,3924,3927,
    3929,3932,3934,3937,3939,3942,3944,3946,
    3949,3951,3953,3955,3957,3960,3962,3964,
    3966,3968,3970,3972,3973,3975,3977,3979,
    3981,3983,3984,3986,3988,3989,3991,3993,
    3994,3996,3997,3999,4000,4002,4003,4005,
    4006,4007,4009,4010,4011,4013,4014,4015,
    4016,4018,4019,4020,4021,4022,4024,4025,
    4026,4027,4028,4029,4030,4031,4032,4033,
    4034,4035,4036,4037,4038,4039,4039,4040,
    4041,4042,4043,4044,4044,4045,4046,4047,
    4048,4048,4049,4050,4050,4051,4052,4053,
    4053,4054,4055,4055,4056,4056,4057,4058,
    4058,4059,4059,4060,4061,4061,4062,4062,
    4063,4063,4064,4064,4065,4065,4066,4066,
    4067,4067,4067,4068,4068,4069,4069,4070,
    4070,4070,4071,4071,4072,4072,4072,4073,
    4073,4073,4074,4074,4074,4075,4075,4075,
    4076,4076,4076,4077,4077,4077,4078,4078,
    4078,4078,4079,4079,4079,4079,4080,4080,
    4080,4080,4081,4081,4081,4081,4082,4082,
    4082,4082,4082,4083,4083,4083,4083,4084,
    4084,4084,4084,4084,4084,4085,4085,4085,
    4085,4085,4085,4086,4086,4086,4086,4086,
    4086,4087,4087,4087,4087,4087,4087,4087,
    4088,4088,4088,4088,4088,4088,4088,4088,
    4089,4089,4089,4089,4089,4089,4089,4089,
    4089,4090,4090,4090,4090,4090,4090,4090,
    4090,4090,4090,4090,4091,4091,4091,4091,
    4091,4091,4091,4091,4091,4091,4091,4091,
    4091,4092,4092,4092,4092,4092,4092,4092,
    4092,4092,4092,4092,4092,4092,4092,4092,
    4092,4093,4093,4093,4093,4093,4093,4093,
    4093,4093,4093,4093,4093,4093,4093,4093,
    4093,4093,4093,4093,4093,4093,4093,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4095,
    4095,4095,4095,4095,4095,4095,4095,4095,
    4095,4095,4095,4095,4095,4095,4095,4095,
    4095,4095,4095,4095,4095,4095,4095,4095,
    4095,4095,4095,4095,4095,4095,4095,4095,
    4095,4095,4095,4095,4095,4095,4095,4095,
    4095,4095,4095,4095,4095,4095,4095,4095,
    4095,4095,4095,4095,4095,4095,4095,4095,
    4095,4095,4095,4095,4095,4095,4095,4095,
    4095,4095,4095,4095,4095,4095,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096};

__device__
void lstm_n5_o1(int input[SAMPLE_TEST_LEN], short output[SAMPLE_TEST_LEN])
{
    int i, j, t;

    float inW[4][5] = {
        -0.00902497, 0.0130347, -0.305604, 0.0103134, -0.00143173,
        -0.00892103, -0.00877193, -0.0158959, -0.00261989, 0.00238156,
        -1.17159, -1.05888, -0.0252563, 1.32337, 0.896013,
        0.112793, 0.107382, 0.459561, 0.112837, -0.0858938};

    float intW[4][5][5] = {
        {{0.01465, 0.017885, 0.00462623, -0.00366126, 0.00414583},
        {0.00709106, 0.00612325, 0.00509018, 0.00629193, -0.00820282},
        {0.0594903, 0.0594652, 0.0879106, -0.202968, 0.146663},
        {0.0173266, -0.00258213, -0.00156304, -0.0161799, 0.0206139},
        {0.00378391, 0.0190192, 0.0140174, 0.0183843, -0.00042357}},
        {{-0.007224, -2.52633e-05, -0.00375626, 0.0171819, -0.0146835},
        {0.0095475, 0.0111485, 0.00723207, -0.00279432, -0.00130744},
        {-0.00358937, -0.0211212, -0.0445563, -0.0203464, 0.0123881},
        {-0.00648264, -0.00841806, 0.00112013, 0.00435087, -0.0138258},
        {0.00533612, -0.00909088, 0.00789575, 0.00117046, 0.00834566}},
        {{0.74772, 0.635634, 0.730541, -1.11435, 0.814002},
        {0.623608, 0.53032, 0.652992, -1.01461, 0.768323},
        {0.120079, 0.113368, 0.0824013, -0.000308211, -0.0182162},
        {-1.28265, -1.18123, -0.480213, 0.984297, -0.576107},
        {-1.00799, -0.944089, -0.355751, 0.536079, -0.27723}},
        {{0.0134795, 0.0447042, 0.015088, 0.0920375, -0.0777375},
        {0.0384587, 0.0330071, 0.0205698, 0.0858556, -0.0671409},
        {-0.63912, -0.570696, -0.0891825, 0.706698, -0.5},
        {0.0172945, 0.0240723, 0.00149645, 0.0341813, -0.0418003},
        {-0.0122831, -0.0280598, -0.00341253, -0.0265756, 0.0246845}}
    };

    float intB[4][5] = {
        0.016, 0.0139732, -0.183891, 0.0139634, 0.00864378,
        5.00094, 5.00059, 4.97023, 5.0002, 5.00032,
        0.0676543, -0.0445895, 0.248995, -0.978814, -1.0258,
        0.204404, 0.190113, -0.156202, 0.219446, -0.179526};

    float outW[5] = {-0.4272, -0.33769, 0.167592, 0.50495, -0.502329};

    float outB = -0.0394433;

    short inWF[4][5] = {0};
    short intWF[4][5][5] = {0};
    short intBF[4][5] = {0};
    short outWF[5] = {0};
    short outBF = 0;

    for (i = 0; i < 4; ++i) {
        for (j = 0; j < 5; ++j) {
            inWF[i][j] = (short) (inW[i][j] * SCALER);
        }
    }

    for (i = 0; i < 4; ++i) {
        for (j = 0; j < 5; ++j) {
            for (t = 0; t < 5; ++t) {
                intWF[i][j][t] = (short) (intW[i][j][t] * SCALER);
            }
        }
    }

    for (i = 0; i < 4; ++i) {
        for (j = 0; j < 5; ++j) {
            intBF[i][j] = (short) (intB[i][j] * SCALER);
        }
    }

    for (i = 0; i < 5; ++i) {
        outWF[i] = (short) (outW[i] * SCALER);
    }

    outBF = (short) (outB * SCALER);

    short h_stateF[5] = {0};
    short c_stateF[5] = {0};
    short i_stateF[5] = {0};
    short f_stateF[5] = {0};
    short o_stateF[5] = {0};
    short g_stateF[5] = {0};

    short sampleinput_16b;

    for (t = 0; t < SAMPLE_TEST_LEN; ++t) {

        sampleinput_16b = (short) (input[t] + 120000) * 256 / 1875;

        for (j = 0; j < 5; ++j) {
            i_stateF[j] = (inWF[0][j] * sampleinput_16b) >> 15;
            for (i = 0; i < 5; ++i)
                i_stateF[j] += ((h_stateF[i] * intWF[0][j][i]) >> 12);
            i_stateF[j] += intBF[0][j];
            i_stateF[j] = i_stateF[j] >> 5;
            if (i_stateF[j] >= LUT_SIZE)
                i_stateF[j] = 4095;
            else if (i_stateF[j] >= 0)
                i_stateF[j] = lut_sigmoid[i_stateF[j]];
            else if (i_stateF[j] > -LUT_SIZE)
                i_stateF[j] = 4096 - lut_sigmoid[-i_stateF[j]];
            else
                i_stateF[j] = 1;
        }

        for (j = 0; j < 5; ++j) {
            f_stateF[j] = (inWF[1][j] * sampleinput_16b) >> 15;
            for (i = 0; i < 5; ++i)
                f_stateF[j] += ((h_stateF[i] * intWF[1][j][i]) >> 12);
            f_stateF[j] += intBF[1][j];
            f_stateF[j] = f_stateF[j] >> 5;
            if (f_stateF[j] >= LUT_SIZE)
                f_stateF[j] = 4095;
            else if (f_stateF[j] >= 0)
                f_stateF[j] = lut_sigmoid[f_stateF[j]];
            else if (f_stateF[j] > -LUT_SIZE)
                f_stateF[j] = 4096 - lut_sigmoid[-f_stateF[j]];
            else
                f_stateF[j] = 1;
        }

        for (j = 0; j < 5; ++j) {
            o_stateF[j] = (inWF[2][j] * sampleinput_16b) >> 15;
            for (i = 0; i < 5; ++i)
                o_stateF[j] += ((h_stateF[i] * intWF[2][j][i]) >> 12);
            o_stateF[j] += intBF[2][j];
            o_stateF[j] = o_stateF[j] >> 5;
            if (o_stateF[j] >= LUT_SIZE)
                o_stateF[j] = 4095;
            else if (o_stateF[j] >= 0)
                o_stateF[j] = lut_sigmoid[o_stateF[j]];
            else if (o_stateF[j] > -LUT_SIZE)
                o_stateF[j] = 4096 - lut_sigmoid[-o_stateF[j]];
            else
                o_stateF[j] = 1;
        }

        for (j = 0; j < 5; ++j) {
            g_stateF[j] = (inWF[3][j] * sampleinput_16b) >> 15;
            for (i = 0; i < 5; ++i)
                g_stateF[j] += ((h_stateF[i] * intWF[3][j][i]) >> 12);
            g_stateF[j] += intBF[3][j];
            g_stateF[j] = g_stateF[j] >> 5;
            if (g_stateF[j] >= LUT_SIZE)
                g_stateF[j] = 4096;
            else if (g_stateF[j] >= 0)
                g_stateF[j] = lut_tanh[g_stateF[j]];
            else if (g_stateF[j] > -LUT_SIZE)
                g_stateF[j] = -lut_tanh[-g_stateF[j]];
            else
                g_stateF[j] = -4096;
        }

        for (j = 0; j < 5; ++j) {
            c_stateF[j] = (((c_stateF[j] * f_stateF[j]) >> 8) + ((g_stateF[j] * i_stateF[j]) >> 12)) >> 4;
            h_stateF[j] = c_stateF[j] >> 1;
            if (h_stateF[j] >= LUT_SIZE)
                h_stateF[j] = 4096;
            else if (h_stateF[j] >= 0)
                h_stateF[j] = lut_tanh[h_stateF[j]];
            else if (h_stateF[j] > -LUT_SIZE)
                h_stateF[j] = -lut_tanh[-h_stateF[j]];
            else
                h_stateF[j] = -4096;
            h_stateF[j] = (h_stateF[j] * o_stateF[j]) >> 12;
        }

        output[t] = outBF;
        for (j = 0; j < 5; ++j)
            output[t] += ((h_stateF[j] * outWF[j]) >> 12);
    }
}

__device__
void lstm_n5_o2(int input[SAMPLE_TEST_LEN], short output[SAMPLE_TEST_LEN])
{
    int i, j, t;

    float inW[4][5] = {
        -0.133907, 0.0967799, -0.0249856, -0.0482016, 0.000138663,
        -0.0025821, -0.0107074, -0.0135626, -0.0265616, -0.00990482,
        0.0279149, 0.29944, 0.00367669, -0.0406378, -0.122106,
        0.305937, -1.54966, 0.108542, -0.086096, -0.278674};

    float intW[4][5][5] = {
        {{0.0465599, -0.0784586, 0.0703757, -0.0961503, 0.103885},
        {0.137839, 0.0785531, 0.172321, 0.00198996, 0.115174},
        {0.0896546, -0.00207286, 0.0280649, 0.0300854, 0.0549556},
        {0.0952124, 0.011873, 0.0253059, -0.00619738, 0.10025},
        {-0.0796523, -0.0310471, 0.0336561, -0.0999846, -0.00944991}},
        {{-0.00558139, -0.0249531, -0.0196812, -0.0283953, -0.00538974},
        {0.0124158, 0.00739093, 0.00918819, -0.00951965, 0.00634635},
        {-0.008908, 0.0113348, -0.00387874, 0.00339979, -0.000628876},
        {-0.00832763, 0.0040069, 0.00346749, -0.0256792, 0.00539768},
        {0.00337389, -0.0148225, -0.0283464, 0.00277652, 0.000571859}},
        {{-0.00736941, 0.0578041, 0.141176, 0.00565979, -0.079775},
        {-0.140356, 0.0521767, 0.0813636, -0.0342324, -0.0847605},
        {0.0534741, 0.0335436, 0.0464466, 0.0670157, 0.0266309},
        {0.0142565, -0.0397183, -0.0116136, -0.0507669, 0.0575363},
        {-0.0518841, 0.0358612, 0.0333015, -0.119254, 0.0368938}},
        {{-0.40111, 1.17447, 0.172804, 0.197255, 0.0786499},
        {-0.307048, -0.923395, -0.362905, 0.194527, -0.438387},
        {-0.671133, 0.728081, -0.520196, 0.0108215, -0.139992},
        {-0.600645, 0.151967, 0.0101909, -0.235608, -0.367466},
        {0.262652, 0.84919, -0.131239, 0.0756875, -0.261777}}
    };

    float intB[4][5] = {
        -0.0421559, 0.246112, 0.0348797, -0.0619016, 0.0988568,
        4.98184, 4.97131, 4.98673, 4.97446, 4.96925,
        0.255813, 0.527195, 0.120779, -0.0979445, 0.02733,
        0.0091722, 0.551458, -0.0521645, 0.0113755, 0.2287};

    float outW[5] = {-0.592906, 0.576557, -0.38704, 0.0146919, -0.35076};

    float outB = -0.0191289;

    short inWF[4][5] = {0};
    short intWF[4][5][5] = {0};
    short intBF[4][5] = {0};
    short outWF[5] = {0};
    short outBF = 0;

    for (i = 0; i < 4; ++i) {
        for (j = 0; j < 5; ++j) {
            inWF[i][j] = (short) (inW[i][j] * SCALER);
        }
    }

    for (i = 0; i < 4; ++i) {
        for (j = 0; j < 5; ++j) {
            for (t = 0; t < 5; ++t) {
                intWF[i][j][t] = (short) (intW[i][j][t] * SCALER);
            }
        }
    }

    for (i = 0; i < 4; ++i) {
        for (j = 0; j < 5; ++j) {
            intBF[i][j] = (short) (intB[i][j] * SCALER);
        }
    }

    for (i = 0; i < 5; ++i) {
        outWF[i] = (short) (outW[i] * SCALER);
    }

    outBF = (short) (outB * SCALER);

    short h_stateF[5] = {0};
    short c_stateF[5] = {0};
    short i_stateF[5] = {0};
    short f_stateF[5] = {0};
    short o_stateF[5] = {0};
    short g_stateF[5] = {0};

    short sampleinput_16b;

    for (t = 0; t < SAMPLE_TEST_LEN; ++t) {

        sampleinput_16b = (short) (input[t] + 120000) * 256 / 1875;

        for (j = 0; j < 5; ++j) {
            i_stateF[j] = (inWF[0][j] * sampleinput_16b) >> 15;
            for (i = 0; i < 5; ++i)
                i_stateF[j] += ((h_stateF[i] * intWF[0][j][i]) >> 12);
            i_stateF[j] += intBF[0][j];
            i_stateF[j] = i_stateF[j] >> 5;
            if (i_stateF[j] >= LUT_SIZE)
                i_stateF[j] = 4095;
            else if (i_stateF[j] >= 0)
                i_stateF[j] = lut_sigmoid[i_stateF[j]];
            else if (i_stateF[j] > -LUT_SIZE)
                i_stateF[j] = 4096 - lut_sigmoid[-i_stateF[j]];
            else
                i_stateF[j] = 1;
        }

        for (j = 0; j < 5; ++j) {
            f_stateF[j] = (inWF[1][j] * sampleinput_16b) >> 15;
            for (i = 0; i < 5; ++i)
                f_stateF[j] += ((h_stateF[i] * intWF[1][j][i]) >> 12);
            f_stateF[j] += intBF[1][j];
            f_stateF[j] = f_stateF[j] >> 5;
            if (f_stateF[j] >= LUT_SIZE)
                f_stateF[j] = 4095;
            else if (f_stateF[j] >= 0)
                f_stateF[j] = lut_sigmoid[f_stateF[j]];
            else if (f_stateF[j] > -LUT_SIZE)
                f_stateF[j] = 4096 - lut_sigmoid[-f_stateF[j]];
            else
                f_stateF[j] = 1;
        }

        for (j = 0; j < 5; ++j) {
            o_stateF[j] = (inWF[2][j] * sampleinput_16b) >> 15;
            for (i = 0; i < 5; ++i)
                o_stateF[j] += ((h_stateF[i] * intWF[2][j][i]) >> 12);
            o_stateF[j] += intBF[2][j];
            o_stateF[j] = o_stateF[j] >> 5;
            if (o_stateF[j] >= LUT_SIZE)
                o_stateF[j] = 4095;
            else if (o_stateF[j] >= 0)
                o_stateF[j] = lut_sigmoid[o_stateF[j]];
            else if (o_stateF[j] > -LUT_SIZE)
                o_stateF[j] = 4096 - lut_sigmoid[-o_stateF[j]];
            else
                o_stateF[j] = 1;
        }

        for (j = 0; j < 5; ++j) {
            g_stateF[j] = (inWF[3][j] * sampleinput_16b) >> 15;
            for (i = 0; i < 5; ++i)
                g_stateF[j] += ((h_stateF[i] * intWF[3][j][i]) >> 12);
            g_stateF[j] += intBF[3][j];
            g_stateF[j] = g_stateF[j] >> 5;
            if (g_stateF[j] >= LUT_SIZE)
                g_stateF[j] = 4096;
            else if (g_stateF[j] >= 0)
                g_stateF[j] = lut_tanh[g_stateF[j]];
            else if (g_stateF[j] > -LUT_SIZE)
                g_stateF[j] = -lut_tanh[-g_stateF[j]];
            else
                g_stateF[j] = -4096;
        }

        for (j = 0; j < 5; ++j) {
            c_stateF[j] = (((c_stateF[j] * f_stateF[j]) >> 8) + ((g_stateF[j] * i_stateF[j]) >> 12)) >> 4;
            h_stateF[j] = c_stateF[j] >> 1;
            if (h_stateF[j] >= LUT_SIZE)
                h_stateF[j] = 4096;
            else if (h_stateF[j] >= 0)
                h_stateF[j] = lut_tanh[h_stateF[j]];
            else if (h_stateF[j] > -LUT_SIZE)
                h_stateF[j] = -lut_tanh[-h_stateF[j]];
            else
                h_stateF[j] = -4096;
            h_stateF[j] = (h_stateF[j] * o_stateF[j]) >> 12;
        }

        output[t] = outBF;
        for (j = 0; j < 5; ++j)
            output[t] += ((h_stateF[j] * outWF[j]) >> 12);
    }
}

__global__
void lstm_task(int n, int *x, short *y1, short *y2)
{
    int idx = blockIdx.x*blockDim.x + threadIdx.x;
    //if (i < n) y[i] = a*x[i] + y[i];

    int i;
    int sampleinput[SAMPLE_TEST_LEN];
    short test_out1[SAMPLE_TEST_LEN];
    short test_out2[SAMPLE_TEST_LEN];

    if (idx < n)
    {
        for (i = 0; i < SAMPLE_TEST_LEN; ++i)
        {
            sampleinput[i] = x[idx * SAMPLE_TEST_LEN + i];
        }
        lstm_n5_o1(sampleinput, test_out1);
        lstm_n5_o2(sampleinput, test_out2);
        for (i = 0; i < SAMPLE_TEST_LEN; ++i)
        {
            y1[idx * SAMPLE_TEST_LEN + i] = test_out1[i];
            y2[idx * SAMPLE_TEST_LEN + i] = test_out2[i];
        }
    }
}

int main(void)
{
    int N = 1<<19;
    int *x, *d_x;
    short *y1, *y2, *d_y1, *d_y2;
    FILE *ifp, *ofp;

    struct timeval t1, t2, tr;

    int i, j;

    int sampleinput[SAMPLE_TEST_LEN];
    short test_out1[SAMPLE_TEST_LEN];
    short test_out2[SAMPLE_TEST_LEN];

    // Read in sample input from "converted-lstm-in.txt" file
    if (!(ifp = fopen("converted-lstm-in.txt", "r"))) {
        printf("File converted-lstm-in.txt cannot be opened for read.\n");
        return -1;
    }

    for (i = 0; i < SAMPLE_TEST_LEN; ++i) {
        fscanf(ifp, "%d", &sampleinput[i]);
    }
    fclose(ifp);

    // Open output.txt for output data write back.
    if (!(ofp = fopen("output.txt", "w"))) {
        printf("File output.txt cannot be opened for write.\n");
        return -1;
    }

    x = (int*)malloc(N * SAMPLE_TEST_LEN * sizeof(int));
    y1 = (short*)malloc(N * SAMPLE_TEST_LEN * sizeof(short));
    y2 = (short*)malloc(N * SAMPLE_TEST_LEN * sizeof(short));

    cudaMalloc(&d_x, N * SAMPLE_TEST_LEN * sizeof(int)); 
    cudaMalloc(&d_y1, N * SAMPLE_TEST_LEN * sizeof(short));
    cudaMalloc(&d_y2, N * SAMPLE_TEST_LEN * sizeof(short));

    for (i = 0; i < N; i++) {
        for (j = 0; j < SAMPLE_TEST_LEN; ++j) {
            x[i * SAMPLE_TEST_LEN + j] = sampleinput[j];
        }
    }
    
    for (int k = 9; k < 10; ++k)
    {
        gettimeofday(&t1, NULL);

        for (j = 0; j < k; ++j)
        {
            cudaMemcpy(d_x, x, N * SAMPLE_TEST_LEN * sizeof(int), cudaMemcpyHostToDevice);
            cudaMemcpy(d_y1, y1, N * SAMPLE_TEST_LEN * sizeof(short), cudaMemcpyHostToDevice);
            cudaMemcpy(d_y2, y2, N * SAMPLE_TEST_LEN * sizeof(short), cudaMemcpyHostToDevice);
            // Perform SAXPY on 1M elements
            lstm_task<<<(N+63)/64, 64>>>(N, d_x, d_y1, d_y2);
            cudaMemcpy(y1, d_y1, N * SAMPLE_TEST_LEN * sizeof(short), cudaMemcpyDeviceToHost);
            cudaMemcpy(y2, d_y2, N * SAMPLE_TEST_LEN * sizeof(short), cudaMemcpyDeviceToHost);
        }

        gettimeofday(&t2, NULL);
        timersub(&t1, &t2, &tr);
        printf("Round %d Excute time: %.2f sec\n", k, -tr.tv_sec-(double)tr.tv_usec/1000000.0);
    }

    for (i = 0; i < SAMPLE_TEST_LEN; ++i) {
        test_out1[i] = y1[10000 * SAMPLE_TEST_LEN + i];
        test_out2[i] = y2[10000 * SAMPLE_TEST_LEN + i];
    }

    for (i = 0; i < SAMPLE_TEST_LEN; ++i)
        fprintf(ofp, "%d,%d\n", test_out1[i], test_out2[i]);

    fclose(ofp);
    cudaFree(d_x);
    cudaFree(d_y1);
    cudaFree(d_y2);
    free(x);
    free(y1);
    free(y2);
}


	.file	"tmpxft_00270a9a_00000000-6_example.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10lstm_n5_o1PiPs
	.type	_Z10lstm_n5_o1PiPs, @function
_Z10lstm_n5_o1PiPs:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z10lstm_n5_o1PiPs, .-_Z10lstm_n5_o1PiPs
	.globl	_Z10lstm_n5_o2PiPs
	.type	_Z10lstm_n5_o2PiPs, @function
_Z10lstm_n5_o2PiPs:
.LFB2176:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z10lstm_n5_o1PiPs
	.cfi_endproc
.LFE2176:
	.size	_Z10lstm_n5_o2PiPs, .-_Z10lstm_n5_o2PiPs
	.globl	_Z34__device_stub__Z9lstm_taskiPiPsS0_iPiPsS0_
	.type	_Z34__device_stub__Z9lstm_taskiPiPsS0_iPiPsS0_, @function
_Z34__device_stub__Z9lstm_taskiPiPsS0_iPiPsS0_:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9lstm_taskiPiPsS0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L6:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z34__device_stub__Z9lstm_taskiPiPsS0_iPiPsS0_, .-_Z34__device_stub__Z9lstm_taskiPiPsS0_iPiPsS0_
	.globl	_Z9lstm_taskiPiPsS0_
	.type	_Z9lstm_taskiPiPsS0_, @function
_Z9lstm_taskiPiPsS0_:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z9lstm_taskiPiPsS0_iPiPsS0_
	.cfi_endproc
.LFE2055:
	.size	_Z9lstm_taskiPiPsS0_, .-_Z9lstm_taskiPiPsS0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"r"
.LC1:
	.string	"converted-lstm-in.txt"
.LC2:
	.string	"File converted-lstm-in.txt cannot be opened for read.\n"
.LC3:
	.string	"%d"
.LC4:
	.string	"w"
.LC5:
	.string	"output.txt"
.LC6:
	.string	"File output.txt cannot be opened for write.\n"
.LC8:
	.string	"Round %d Excute time: %.2f sec\n"
.LC9:
	.string	"%d,%d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	-16384(%rsp), %r11
	.cfi_def_cfa 11, 16440
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$104, %rsp
	.cfi_def_cfa_offset 16544
	leaq	.LC0(%rip), %rsi
	leaq	.LC1(%rip), %rdi
	movq	%fs:40, %rax
	movq	%rax, 16472(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	leaq	.LC2(%rip), %rsi
	testq	%rax, %rax
	je	.L31
	leaq	8280(%rsp), %rbp
	movq	%rax, %rbx
	leaq	16472(%rsp), %r12
	movq	%rbp, 8(%rsp)
	leaq	.LC3(%rip), %r13
.L15:
	movq	%rbp, %rdx
	movq	%r13, %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	addq	$4, %rbp
	cmpq	%r12, %rbp
	jne	.L15
	movq	%rbx, %rdi
	call	fclose@PLT
	leaq	.LC4(%rip), %rsi
	leaq	.LC5(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %r13
	testq	%rax, %rax
	jne	.L16
	leaq	.LC6(%rip), %rsi
.L31:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	orl	$-1, %eax
	jmp	.L12
.L16:
	movabsq	$4294967296, %r14
	movl	$2147483648, %r15d
	movq	%r14, %rdi
	call	malloc@PLT
	movq	%r15, %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movq	%r15, %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%r14, %rsi
	leaq	16(%rsp), %rdi
	addq	%r12, %r14
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	movq	%r12, %rax
.L18:
	movq	%rax, %rdi
	addq	$8192, %rax
	movq	8(%rsp), %rsi
	movl	$2048, %ecx
	rep movsl
	cmpq	%rax, %r14
	jne	.L18
	leaq	56(%rsp), %rdi
	xorl	%esi, %esi
	movl	$9, %r15d
	movl	$2147483648, %r14d
	call	gettimeofday@PLT
.L21:
	movq	16(%rsp), %rdi
	movl	$1, %edx
	movl	$1, %ecx
	movq	%r12, %rsi
	salq	$32, %rdx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movq	%r14, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movq	%r14, %rdx
	movq	%rbx, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$67108865, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$524289, %edi
	salq	$6, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$13, %rdi
	movq	%rdx, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	32(%rsp), %rcx
	movq	24(%rsp), %rdx
	movl	$524288, %edi
	movq	16(%rsp), %rsi
	call	_Z34__device_stub__Z9lstm_taskiPiPsS0_iPiPsS0_
.L20:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%r14, %rdx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rsi
	movq	%r14, %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	decl	%r15d
	jne	.L21
	leaq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	movq	56(%rsp), %rax
	movq	64(%rsp), %rdx
	subq	72(%rsp), %rax
	subq	80(%rsp), %rdx
	jns	.L22
	decq	%rax
	addq	$1000000, %rdx
.L22:
	negq	%rax
	cvtsi2sdq	%rdx, %xmm1
	movl	$2, %edi
	xorl	%r14d, %r14d
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC7(%rip), %xmm1
	leaq	.LC8(%rip), %rsi
	movl	$9, %edx
	movb	$1, %al
	leaq	4184(%rsp), %r15
	subsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	leaq	88(%rsp), %rdi
	movl	$1024, %ecx
	leaq	40960000(%rbp), %rsi
	rep movsl
	leaq	4184(%rsp), %rdi
	leaq	40960000(%rbx), %rsi
	movl	$1024, %ecx
	leaq	88(%rsp), %r10
	rep movsl
.L23:
	movswl	(%r10,%r14), %ecx
	movswl	(%r15,%r14), %r8d
	xorl	%eax, %eax
	movq	%r13, %rdi
	leaq	.LC9(%rip), %rdx
	movl	$2, %esi
	addq	$2, %r14
	movq	%r10, 8(%rsp)
	call	__fprintf_chk@PLT
	cmpq	$4096, %r14
	movq	8(%rsp), %r10
	jne	.L23
	movq	%r13, %rdi
	call	fclose@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	xorl	%eax, %eax
.L12:
	movq	16472(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$16488, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z9lstm_taskiPiPsS0_"
.LC11:
	.string	"lut_sigmoid"
.LC12:
	.string	"lut_tanh"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9lstm_taskiPiPsS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	movl	$2048, %r9d
	leaq	_ZL11lut_sigmoid(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2048, %r9d
	leaq	_ZL8lut_tanh(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL8lut_tanh
	.comm	_ZL8lut_tanh,2048,32
	.local	_ZL11lut_sigmoid
	.comm	_ZL11lut_sigmoid,2048,32
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC7:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <sys/time.h>

#define SAMPLE_TEST_LEN 2048
#define SCALER 4096
#define LUT_SIZE 1024

__device__
short lut_sigmoid[LUT_SIZE] = {
    2048,2056,2064,2072,2080,2088,2096,2104,
    2112,2120,2128,2136,2144,2152,2160,2168,
    2176,2184,2192,2200,2208,2216,2224,2232,
    2239,2247,2255,2263,2271,2279,2287,2295,
    2303,2311,2318,2326,2334,2342,2350,2358,
    2365,2373,2381,2389,2397,2404,2412,2420,
    2428,2435,2443,2451,2458,2466,2474,2481,
    2489,2497,2504,2512,2519,2527,2535,2542,
    2550,2557,2565,2572,2580,2587,2594,2602,
    2609,2617,2624,2631,2639,2646,2653,2661,
    2668,2675,2682,2690,2697,2704,2711,2718,
    2726,2733,2740,2747,2754,2761,2768,2775,
    2782,2789,2796,2803,2810,2817,2823,2830,
    2837,2844,2851,2857,2864,2871,2878,2884,
    2891,2898,2904,2911,2917,2924,2930,2937,
    2943,2950,2956,2963,2969,2975,2982,2988,
    2994,3001,3007,3013,3019,3026,3032,3038,
    3044,3050,3056,3062,3068,3074,3080,3086,
    3092,3098,3104,3110,3116,3121,3127,3133,
    3139,3144,3150,3156,3161,3167,3173,3178,
    3184,3189,3195,3200,3206,3211,3217,3222,
    3227,3233,3238,3243,3249,3254,3259,3264,
    3269,3275,3280,3285,3290,3295,3300,3305,
    3310,3315,3320,3325,3330,3334,3339,3344,
    3349,3354,3358,3363,3368,3372,3377,3382,
    3386,3391,3395,3400,3404,3409,3413,3418,
    3422,3427,3431,3435,3440,3444,3448,3452,
    3457,3461,3465,3469,3473,3477,3481,3486,
    3490,3494,3498,3502,3506,3510,3513,3517,
    3521,3525,3529,3533,3536,3540,3544,3548,
    3551,3555,3559,3562,3566,3570,3573,3577,
    3580,3584,3587,3591,3594,3598,3601,3604,
    3608,3611,3614,3618,3621,3624,3628,3631,
    3634,3637,3640,3644,3647,3650,3653,3656,
    3659,3662,3665,3668,3671,3674,3677,3680,
    3683,3686,3689,3691,3694,3697,3700,3703,
    3705,3708,3711,3714,3716,3719,3722,3724,
    3727,3730,3732,3735,3737,3740,3742,3745,
    3747,3750,3752,3755,3757,3760,3762,3764,
    3767,3769,3772,3774,3776,3778,3781,3783,
    3785,3788,3790,3792,3794,3796,3798,3801,
    3803,3805,3807,3809,3811,3813,3815,3817,
    3819,3821,3823,3825,3827,3829,3831,3833,
    3835,3837,3839,3841,3843,3844,3846,3848,
    3850,3852,3853,3855,3857,3859,3861,3862,
    3864,3866,3867,3869,3871,3872,3874,3876,
    3877,3879,3880,3882,3884,3885,3887,3888,
    3890,3891,3893,3894,3896,3897,3899,3900,
    3902,3903,3905,3906,3907,3909,3910,3912,
    3913,3914,3916,3917,3918,3920,3921,3922,
    3924,3925,3926,3927,3929,3930,3931,3932,
    3934,3935,3936,3937,3938,3940,3941,3942,
    3943,3944,3945,3947,3948,3949,3950,3951,
    3952,3953,3954,3955,3956,3957,3958,3959,
    3960,3961,3963,3964,3965,3966,3966,3967,
    3968,3969,3970,3971,3972,3973,3974,3975,
    3976,3977,3978,3979,3980,3980,3981,3982,
    3983,3984,3985,3986,3986,3987,3988,3989,
    3990,3990,3991,3992,3993,3994,3994,3995,
    3996,3997,3997,3998,3999,4000,4000,4001,
    4002,4003,4003,4004,4005,4005,4006,4007,
    4007,4008,4009,4009,4010,4011,4011,4012,
    4013,4013,4014,4015,4015,4016,4016,4017,
    4018,4018,4019,4019,4020,4021,4021,4022,
    4022,4023,4023,4024,4025,4025,4026,4026,
    4027,4027,4028,4028,4029,4029,4030,4030,
    4031,4031,4032,4032,4033,4033,4034,4034,
    4035,4035,4036,4036,4037,4037,4038,4038,
    4038,4039,4039,4040,4040,4041,4041,4041,
    4042,4042,4043,4043,4043,4044,4044,4045,
    4045,4045,4046,4046,4047,4047,4047,4048,
    4048,4048,4049,4049,4050,4050,4050,4051,
    4051,4051,4052,4052,4052,4053,4053,4053,
    4054,4054,4054,4055,4055,4055,4056,4056,
    4056,4057,4057,4057,4057,4058,4058,4058,
    4059,4059,4059,4059,4060,4060,4060,4061,
    4061,4061,4061,4062,4062,4062,4062,4063,
    4063,4063,4063,4064,4064,4064,4064,4065,
    4065,4065,4065,4066,4066,4066,4066,4067,
    4067,4067,4067,4068,4068,4068,4068,4068,
    4069,4069,4069,4069,4069,4070,4070,4070,
    4070,4070,4071,4071,4071,4071,4071,4072,
    4072,4072,4072,4072,4073,4073,4073,4073,
    4073,4073,4074,4074,4074,4074,4074,4074,
    4075,4075,4075,4075,4075,4075,4076,4076,
    4076,4076,4076,4076,4077,4077,4077,4077,
    4077,4077,4077,4078,4078,4078,4078,4078,
    4078,4078,4079,4079,4079,4079,4079,4079,
    4079,4079,4080,4080,4080,4080,4080,4080,
    4080,4080,4081,4081,4081,4081,4081,4081,
    4081,4081,4082,4082,4082,4082,4082,4082,
    4082,4082,4082,4082,4083,4083,4083,4083,
    4083,4083,4083,4083,4083,4084,4084,4084,
    4084,4084,4084,4084,4084,4084,4084,4084,
    4085,4085,4085,4085,4085,4085,4085,4085,
    4085,4085,4085,4085,4086,4086,4086,4086,
    4086,4086,4086,4086,4086,4086,4086,4086,
    4086,4087,4087,4087,4087,4087,4087,4087,
    4087,4087,4087,4087,4087,4087,4087,4088,
    4088,4088,4088,4088,4088,4088,4088,4088,
    4088,4088,4088,4088,4088,4088,4088,4089,
    4089,4089,4089,4089,4089,4089,4089,4089,
    4089,4089,4089,4089,4089,4089,4089,4089,
    4089,4090,4090,4090,4090,4090,4090,4090,
    4090,4090,4090,4090,4090,4090,4090,4090,
    4090,4090,4090,4090,4090,4090,4090,4091,
    4091,4091,4091,4091,4091,4091,4091,4091,
    4091,4091,4091,4091,4091,4091,4091,4091,
    4091,4091,4091,4091,4091,4091,4091,4091,
    4091,4092,4092,4092,4092,4092,4092,4092,
    4092,4092,4092,4092,4092,4092,4092,4092,
    4092,4092,4092,4092,4092,4092,4092,4092,
    4092,4092,4092,4092,4092,4092,4092,4092,
    4092,4093,4093,4093,4093,4093,4093,4093,
    4093,4093,4093,4093,4093,4093,4093,4093,
    4093,4093,4093,4093,4093,4093,4093,4093,
    4093,4093,4093,4093,4093,4093,4093,4093,
    4093,4093,4093,4093,4093,4093,4093,4093,
    4093,4093,4093,4093,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4095,4095,4095,
    4095,4095,4095,4095,4095,4095,4095,4095};

__device__
short lut_tanh[LUT_SIZE] = {
    0,32,64,96,128,160,192,224,
    256,288,319,351,383,415,446,478,
    509,541,572,604,635,666,697,728,
    759,790,821,851,882,912,943,973,
    1003,1033,1063,1093,1123,1152,1181,1211,
    1240,1269,1298,1326,1355,1383,1412,1440,
    1468,1496,1523,1551,1578,1605,1632,1659,
    1686,1712,1739,1765,1791,1817,1842,1868,
    1893,1918,1943,1968,1992,2016,2041,2064,
    2088,2112,2135,2158,2181,2204,2227,2249,
    2272,2294,2316,2337,2359,2380,2401,2422,
    2443,2463,2484,2504,2524,2543,2563,2582,
    2602,2621,2639,2658,2676,2695,2713,2731,
    2748,2766,2783,2800,2817,2834,2851,2867,
    2883,2899,2915,2931,2946,2962,2977,2992,
    3007,3021,3036,3050,3064,3078,3092,3106,
    3119,3133,3146,3159,3172,3185,3197,3210,
    3222,3234,3246,3258,3270,3281,3293,3304,
    3315,3326,3337,3347,3358,3368,3379,3389,
    3399,3409,3419,3428,3438,3447,3456,3466,
    3475,3483,3492,3501,3510,3518,3526,3535,
    3543,3551,3559,3566,3574,3582,3589,3596,
    3604,3611,3618,3625,3632,3639,3645,3652,
    3659,3665,3671,3678,3684,3690,3696,3702,
    3707,3713,3719,3724,3730,3735,3741,3746,
    3751,3756,3761,3766,3771,3776,3781,3786,
    3790,3795,3799,3804,3808,3812,3817,3821,
    3825,3829,3833,3837,3841,3845,3848,3852,
    3856,3859,3863,3867,3870,3873,3877,3880,
    3883,3887,3890,3893,3896,3899,3902,3905,
    3908,3911,3913,3916,3919,3922,3924,3927,
    3929,3932,3934,3937,3939,3942,3944,3946,
    3949,3951,3953,3955,3957,3960,3962,3964,
    3966,3968,3970,3972,3973,3975,3977,3979,
    3981,3983,3984,3986,3988,3989,3991,3993,
    3994,3996,3997,3999,4000,4002,4003,4005,
    4006,4007,4009,4010,4011,4013,4014,4015,
    4016,4018,4019,4020,4021,4022,4024,4025,
    4026,4027,4028,4029,4030,4031,4032,4033,
    4034,4035,4036,4037,4038,4039,4039,4040,
    4041,4042,4043,4044,4044,4045,4046,4047,
    4048,4048,4049,4050,4050,4051,4052,4053,
    4053,4054,4055,4055,4056,4056,4057,4058,
    4058,4059,4059,4060,4061,4061,4062,4062,
    4063,4063,4064,4064,4065,4065,4066,4066,
    4067,4067,4067,4068,4068,4069,4069,4070,
    4070,4070,4071,4071,4072,4072,4072,4073,
    4073,4073,4074,4074,4074,4075,4075,4075,
    4076,4076,4076,4077,4077,4077,4078,4078,
    4078,4078,4079,4079,4079,4079,4080,4080,
    4080,4080,4081,4081,4081,4081,4082,4082,
    4082,4082,4082,4083,4083,4083,4083,4084,
    4084,4084,4084,4084,4084,4085,4085,4085,
    4085,4085,4085,4086,4086,4086,4086,4086,
    4086,4087,4087,4087,4087,4087,4087,4087,
    4088,4088,4088,4088,4088,4088,4088,4088,
    4089,4089,4089,4089,4089,4089,4089,4089,
    4089,4090,4090,4090,4090,4090,4090,4090,
    4090,4090,4090,4090,4091,4091,4091,4091,
    4091,4091,4091,4091,4091,4091,4091,4091,
    4091,4092,4092,4092,4092,4092,4092,4092,
    4092,4092,4092,4092,4092,4092,4092,4092,
    4092,4093,4093,4093,4093,4093,4093,4093,
    4093,4093,4093,4093,4093,4093,4093,4093,
    4093,4093,4093,4093,4093,4093,4093,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4094,
    4094,4094,4094,4094,4094,4094,4094,4095,
    4095,4095,4095,4095,4095,4095,4095,4095,
    4095,4095,4095,4095,4095,4095,4095,4095,
    4095,4095,4095,4095,4095,4095,4095,4095,
    4095,4095,4095,4095,4095,4095,4095,4095,
    4095,4095,4095,4095,4095,4095,4095,4095,
    4095,4095,4095,4095,4095,4095,4095,4095,
    4095,4095,4095,4095,4095,4095,4095,4095,
    4095,4095,4095,4095,4095,4095,4095,4095,
    4095,4095,4095,4095,4095,4095,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096,
    4096,4096,4096,4096,4096,4096,4096,4096};

__device__
void lstm_n5_o1(int input[SAMPLE_TEST_LEN], short output[SAMPLE_TEST_LEN])
{
    int i, j, t;

    float inW[4][5] = {
        -0.00902497, 0.0130347, -0.305604, 0.0103134, -0.00143173,
        -0.00892103, -0.00877193, -0.0158959, -0.00261989, 0.00238156,
        -1.17159, -1.05888, -0.0252563, 1.32337, 0.896013,
        0.112793, 0.107382, 0.459561, 0.112837, -0.0858938};

    float intW[4][5][5] = {
        {{0.01465, 0.017885, 0.00462623, -0.00366126, 0.00414583},
        {0.00709106, 0.00612325, 0.00509018, 0.00629193, -0.00820282},
        {0.0594903, 0.0594652, 0.0879106, -0.202968, 0.146663},
        {0.0173266, -0.00258213, -0.00156304, -0.0161799, 0.0206139},
        {0.00378391, 0.0190192, 0.0140174, 0.0183843, -0.00042357}},
        {{-0.007224, -2.52633e-05, -0.00375626, 0.0171819, -0.0146835},
        {0.0095475, 0.0111485, 0.00723207, -0.00279432, -0.00130744},
        {-0.00358937, -0.0211212, -0.0445563, -0.0203464, 0.0123881},
        {-0.00648264, -0.00841806, 0.00112013, 0.00435087, -0.0138258},
        {0.00533612, -0.00909088, 0.00789575, 0.00117046, 0.00834566}},
        {{0.74772, 0.635634, 0.730541, -1.11435, 0.814002},
        {0.623608, 0.53032, 0.652992, -1.01461, 0.768323},
        {0.120079, 0.113368, 0.0824013, -0.000308211, -0.0182162},
        {-1.28265, -1.18123, -0.480213, 0.984297, -0.576107},
        {-1.00799, -0.944089, -0.355751, 0.536079, -0.27723}},
        {{0.0134795, 0.0447042, 0.015088, 0.0920375, -0.0777375},
        {0.0384587, 0.0330071, 0.0205698, 0.0858556, -0.0671409},
        {-0.63912, -0.570696, -0.0891825, 0.706698, -0.5},
        {0.0172945, 0.0240723, 0.00149645, 0.0341813, -0.0418003},
        {-0.0122831, -0.0280598, -0.00341253, -0.0265756, 0.0246845}}
    };

    float intB[4][5] = {
        0.016, 0.0139732, -0.183891, 0.0139634, 0.00864378,
        5.00094, 5.00059, 4.97023, 5.0002, 5.00032,
        0.0676543, -0.0445895, 0.248995, -0.978814, -1.0258,
        0.204404, 0.190113, -0.156202, 0.219446, -0.179526};

    float outW[5] = {-0.4272, -0.33769, 0.167592, 0.50495, -0.502329};

    float outB = -0.0394433;

    short inWF[4][5] = {0};
    short intWF[4][5][5] = {0};
    short intBF[4][5] = {0};
    short outWF[5] = {0};
    short outBF = 0;

    for (i = 0; i < 4; ++i) {
        for (j = 0; j < 5; ++j) {
            inWF[i][j] = (short) (inW[i][j] * SCALER);
        }
    }

    for (i = 0; i < 4; ++i) {
        for (j = 0; j < 5; ++j) {
            for (t = 0; t < 5; ++t) {
                intWF[i][j][t] = (short) (intW[i][j][t] * SCALER);
            }
        }
    }

    for (i = 0; i < 4; ++i) {
        for (j = 0; j < 5; ++j) {
            intBF[i][j] = (short) (intB[i][j] * SCALER);
        }
    }

    for (i = 0; i < 5; ++i) {
        outWF[i] = (short) (outW[i] * SCALER);
    }

    outBF = (short) (outB * SCALER);

    short h_stateF[5] = {0};
    short c_stateF[5] = {0};
    short i_stateF[5] = {0};
    short f_stateF[5] = {0};
    short o_stateF[5] = {0};
    short g_stateF[5] = {0};

    short sampleinput_16b;

    for (t = 0; t < SAMPLE_TEST_LEN; ++t) {

        sampleinput_16b = (short) (input[t] + 120000) * 256 / 1875;

        for (j = 0; j < 5; ++j) {
            i_stateF[j] = (inWF[0][j] * sampleinput_16b) >> 15;
            for (i = 0; i < 5; ++i)
                i_stateF[j] += ((h_stateF[i] * intWF[0][j][i]) >> 12);
            i_stateF[j] += intBF[0][j];
            i_stateF[j] = i_stateF[j] >> 5;
            if (i_stateF[j] >= LUT_SIZE)
                i_stateF[j] = 4095;
            else if (i_stateF[j] >= 0)
                i_stateF[j] = lut_sigmoid[i_stateF[j]];
            else if (i_stateF[j] > -LUT_SIZE)
                i_stateF[j] = 4096 - lut_sigmoid[-i_stateF[j]];
            else
                i_stateF[j] = 1;
        }

        for (j = 0; j < 5; ++j) {
            f_stateF[j] = (inWF[1][j] * sampleinput_16b) >> 15;
            for (i = 0; i < 5; ++i)
                f_stateF[j] += ((h_stateF[i] * intWF[1][j][i]) >> 12);
            f_stateF[j] += intBF[1][j];
            f_stateF[j] = f_stateF[j] >> 5;
            if (f_stateF[j] >= LUT_SIZE)
                f_stateF[j] = 4095;
            else if (f_stateF[j] >= 0)
                f_stateF[j] = lut_sigmoid[f_stateF[j]];
            else if (f_stateF[j] > -LUT_SIZE)
                f_stateF[j] = 4096 - lut_sigmoid[-f_stateF[j]];
            else
                f_stateF[j] = 1;
        }

        for (j = 0; j < 5; ++j) {
            o_stateF[j] = (inWF[2][j] * sampleinput_16b) >> 15;
            for (i = 0; i < 5; ++i)
                o_stateF[j] += ((h_stateF[i] * intWF[2][j][i]) >> 12);
            o_stateF[j] += intBF[2][j];
            o_stateF[j] = o_stateF[j] >> 5;
            if (o_stateF[j] >= LUT_SIZE)
                o_stateF[j] = 4095;
            else if (o_stateF[j] >= 0)
                o_stateF[j] = lut_sigmoid[o_stateF[j]];
            else if (o_stateF[j] > -LUT_SIZE)
                o_stateF[j] = 4096 - lut_sigmoid[-o_stateF[j]];
            else
                o_stateF[j] = 1;
        }

        for (j = 0; j < 5; ++j) {
            g_stateF[j] = (inWF[3][j] * sampleinput_16b) >> 15;
            for (i = 0; i < 5; ++i)
                g_stateF[j] += ((h_stateF[i] * intWF[3][j][i]) >> 12);
            g_stateF[j] += intBF[3][j];
            g_stateF[j] = g_stateF[j] >> 5;
            if (g_stateF[j] >= LUT_SIZE)
                g_stateF[j] = 4096;
            else if (g_stateF[j] >= 0)
                g_stateF[j] = lut_tanh[g_stateF[j]];
            else if (g_stateF[j] > -LUT_SIZE)
                g_stateF[j] = -lut_tanh[-g_stateF[j]];
            else
                g_stateF[j] = -4096;
        }

        for (j = 0; j < 5; ++j) {
            c_stateF[j] = (((c_stateF[j] * f_stateF[j]) >> 8) + ((g_stateF[j] * i_stateF[j]) >> 12)) >> 4;
            h_stateF[j] = c_stateF[j] >> 1;
            if (h_stateF[j] >= LUT_SIZE)
                h_stateF[j] = 4096;
            else if (h_stateF[j] >= 0)
                h_stateF[j] = lut_tanh[h_stateF[j]];
            else if (h_stateF[j] > -LUT_SIZE)
                h_stateF[j] = -lut_tanh[-h_stateF[j]];
            else
                h_stateF[j] = -4096;
            h_stateF[j] = (h_stateF[j] * o_stateF[j]) >> 12;
        }

        output[t] = outBF;
        for (j = 0; j < 5; ++j)
            output[t] += ((h_stateF[j] * outWF[j]) >> 12);
    }
}

__device__
void lstm_n5_o2(int input[SAMPLE_TEST_LEN], short output[SAMPLE_TEST_LEN])
{
    int i, j, t;

    float inW[4][5] = {
        -0.133907, 0.0967799, -0.0249856, -0.0482016, 0.000138663,
        -0.0025821, -0.0107074, -0.0135626, -0.0265616, -0.00990482,
        0.0279149, 0.29944, 0.00367669, -0.0406378, -0.122106,
        0.305937, -1.54966, 0.108542, -0.086096, -0.278674};

    float intW[4][5][5] = {
        {{0.0465599, -0.0784586, 0.0703757, -0.0961503, 0.103885},
        {0.137839, 0.0785531, 0.172321, 0.00198996, 0.115174},
        {0.0896546, -0.00207286, 0.0280649, 0.0300854, 0.0549556},
        {0.0952124, 0.011873, 0.0253059, -0.00619738, 0.10025},
        {-0.0796523, -0.0310471, 0.0336561, -0.0999846, -0.00944991}},
        {{-0.00558139, -0.0249531, -0.0196812, -0.0283953, -0.00538974},
        {0.0124158, 0.00739093, 0.00918819, -0.00951965, 0.00634635},
        {-0.008908, 0.0113348, -0.00387874, 0.00339979, -0.000628876},
        {-0.00832763, 0.0040069, 0.00346749, -0.0256792, 0.00539768},
        {0.00337389, -0.0148225, -0.0283464, 0.00277652, 0.000571859}},
        {{-0.00736941, 0.0578041, 0.141176, 0.00565979, -0.079775},
        {-0.140356, 0.0521767, 0.0813636, -0.0342324, -0.0847605},
        {0.0534741, 0.0335436, 0.0464466, 0.0670157, 0.0266309},
        {0.0142565, -0.0397183, -0.0116136, -0.0507669, 0.0575363},
        {-0.0518841, 0.0358612, 0.0333015, -0.119254, 0.0368938}},
        {{-0.40111, 1.17447, 0.172804, 0.197255, 0.0786499},
        {-0.307048, -0.923395, -0.362905, 0.194527, -0.438387},
        {-0.671133, 0.728081, -0.520196, 0.0108215, -0.139992},
        {-0.600645, 0.151967, 0.0101909, -0.235608, -0.367466},
        {0.262652, 0.84919, -0.131239, 0.0756875, -0.261777}}
    };

    float intB[4][5] = {
        -0.0421559, 0.246112, 0.0348797, -0.0619016, 0.0988568,
        4.98184, 4.97131, 4.98673, 4.97446, 4.96925,
        0.255813, 0.527195, 0.120779, -0.0979445, 0.02733,
        0.0091722, 0.551458, -0.0521645, 0.0113755, 0.2287};

    float outW[5] = {-0.592906, 0.576557, -0.38704, 0.0146919, -0.35076};

    float outB = -0.0191289;

    short inWF[4][5] = {0};
    short intWF[4][5][5] = {0};
    short intBF[4][5] = {0};
    short outWF[5] = {0};
    short outBF = 0;

    for (i = 0; i < 4; ++i) {
        for (j = 0; j < 5; ++j) {
            inWF[i][j] = (short) (inW[i][j] * SCALER);
        }
    }

    for (i = 0; i < 4; ++i) {
        for (j = 0; j < 5; ++j) {
            for (t = 0; t < 5; ++t) {
                intWF[i][j][t] = (short) (intW[i][j][t] * SCALER);
            }
        }
    }

    for (i = 0; i < 4; ++i) {
        for (j = 0; j < 5; ++j) {
            intBF[i][j] = (short) (intB[i][j] * SCALER);
        }
    }

    for (i = 0; i < 5; ++i) {
        outWF[i] = (short) (outW[i] * SCALER);
    }

    outBF = (short) (outB * SCALER);

    short h_stateF[5] = {0};
    short c_stateF[5] = {0};
    short i_stateF[5] = {0};
    short f_stateF[5] = {0};
    short o_stateF[5] = {0};
    short g_stateF[5] = {0};

    short sampleinput_16b;

    for (t = 0; t < SAMPLE_TEST_LEN; ++t) {

        sampleinput_16b = (short) (input[t] + 120000) * 256 / 1875;

        for (j = 0; j < 5; ++j) {
            i_stateF[j] = (inWF[0][j] * sampleinput_16b) >> 15;
            for (i = 0; i < 5; ++i)
                i_stateF[j] += ((h_stateF[i] * intWF[0][j][i]) >> 12);
            i_stateF[j] += intBF[0][j];
            i_stateF[j] = i_stateF[j] >> 5;
            if (i_stateF[j] >= LUT_SIZE)
                i_stateF[j] = 4095;
            else if (i_stateF[j] >= 0)
                i_stateF[j] = lut_sigmoid[i_stateF[j]];
            else if (i_stateF[j] > -LUT_SIZE)
                i_stateF[j] = 4096 - lut_sigmoid[-i_stateF[j]];
            else
                i_stateF[j] = 1;
        }

        for (j = 0; j < 5; ++j) {
            f_stateF[j] = (inWF[1][j] * sampleinput_16b) >> 15;
            for (i = 0; i < 5; ++i)
                f_stateF[j] += ((h_stateF[i] * intWF[1][j][i]) >> 12);
            f_stateF[j] += intBF[1][j];
            f_stateF[j] = f_stateF[j] >> 5;
            if (f_stateF[j] >= LUT_SIZE)
                f_stateF[j] = 4095;
            else if (f_stateF[j] >= 0)
                f_stateF[j] = lut_sigmoid[f_stateF[j]];
            else if (f_stateF[j] > -LUT_SIZE)
                f_stateF[j] = 4096 - lut_sigmoid[-f_stateF[j]];
            else
                f_stateF[j] = 1;
        }

        for (j = 0; j < 5; ++j) {
            o_stateF[j] = (inWF[2][j] * sampleinput_16b) >> 15;
            for (i = 0; i < 5; ++i)
                o_stateF[j] += ((h_stateF[i] * intWF[2][j][i]) >> 12);
            o_stateF[j] += intBF[2][j];
            o_stateF[j] = o_stateF[j] >> 5;
            if (o_stateF[j] >= LUT_SIZE)
                o_stateF[j] = 4095;
            else if (o_stateF[j] >= 0)
                o_stateF[j] = lut_sigmoid[o_stateF[j]];
            else if (o_stateF[j] > -LUT_SIZE)
                o_stateF[j] = 4096 - lut_sigmoid[-o_stateF[j]];
            else
                o_stateF[j] = 1;
        }

        for (j = 0; j < 5; ++j) {
            g_stateF[j] = (inWF[3][j] * sampleinput_16b) >> 15;
            for (i = 0; i < 5; ++i)
                g_stateF[j] += ((h_stateF[i] * intWF[3][j][i]) >> 12);
            g_stateF[j] += intBF[3][j];
            g_stateF[j] = g_stateF[j] >> 5;
            if (g_stateF[j] >= LUT_SIZE)
                g_stateF[j] = 4096;
            else if (g_stateF[j] >= 0)
                g_stateF[j] = lut_tanh[g_stateF[j]];
            else if (g_stateF[j] > -LUT_SIZE)
                g_stateF[j] = -lut_tanh[-g_stateF[j]];
            else
                g_stateF[j] = -4096;
        }

        for (j = 0; j < 5; ++j) {
            c_stateF[j] = (((c_stateF[j] * f_stateF[j]) >> 8) + ((g_stateF[j] * i_stateF[j]) >> 12)) >> 4;
            h_stateF[j] = c_stateF[j] >> 1;
            if (h_stateF[j] >= LUT_SIZE)
                h_stateF[j] = 4096;
            else if (h_stateF[j] >= 0)
                h_stateF[j] = lut_tanh[h_stateF[j]];
            else if (h_stateF[j] > -LUT_SIZE)
                h_stateF[j] = -lut_tanh[-h_stateF[j]];
            else
                h_stateF[j] = -4096;
            h_stateF[j] = (h_stateF[j] * o_stateF[j]) >> 12;
        }

        output[t] = outBF;
        for (j = 0; j < 5; ++j)
            output[t] += ((h_stateF[j] * outWF[j]) >> 12);
    }
}

__global__
void lstm_task(int n, int *x, short *y1, short *y2)
{
    int idx = blockIdx.x*blockDim.x + threadIdx.x;
    //if (i < n) y[i] = a*x[i] + y[i];

    int i;
    int sampleinput[SAMPLE_TEST_LEN];
    short test_out1[SAMPLE_TEST_LEN];
    short test_out2[SAMPLE_TEST_LEN];

    if (idx < n)
    {
        for (i = 0; i < SAMPLE_TEST_LEN; ++i)
        {
            sampleinput[i] = x[idx * SAMPLE_TEST_LEN + i];
        }
        lstm_n5_o1(sampleinput, test_out1);
        lstm_n5_o2(sampleinput, test_out2);
        for (i = 0; i < SAMPLE_TEST_LEN; ++i)
        {
            y1[idx * SAMPLE_TEST_LEN + i] = test_out1[i];
            y2[idx * SAMPLE_TEST_LEN + i] = test_out2[i];
        }
    }
}

int main(void)
{
    int N = 1<<19;
    int *x, *d_x;
    short *y1, *y2, *d_y1, *d_y2;
    FILE *ifp, *ofp;

    struct timeval t1, t2, tr;

    int i, j;

    int sampleinput[SAMPLE_TEST_LEN];
    short test_out1[SAMPLE_TEST_LEN];
    short test_out2[SAMPLE_TEST_LEN];

    // Read in sample input from "converted-lstm-in.txt" file
    if (!(ifp = fopen("converted-lstm-in.txt", "r"))) {
        printf("File converted-lstm-in.txt cannot be opened for read.\n");
        return -1;
    }

    for (i = 0; i < SAMPLE_TEST_LEN; ++i) {
        fscanf(ifp, "%d", &sampleinput[i]);
    }
    fclose(ifp);

    // Open output.txt for output data write back.
    if (!(ofp = fopen("output.txt", "w"))) {
        printf("File output.txt cannot be opened for write.\n");
        return -1;
    }

    x = (int*)malloc(N * SAMPLE_TEST_LEN * sizeof(int));
    y1 = (short*)malloc(N * SAMPLE_TEST_LEN * sizeof(short));
    y2 = (short*)malloc(N * SAMPLE_TEST_LEN * sizeof(short));

    hipMalloc(&d_x, N * SAMPLE_TEST_LEN * sizeof(int)); 
    hipMalloc(&d_y1, N * SAMPLE_TEST_LEN * sizeof(short));
    hipMalloc(&d_y2, N * SAMPLE_TEST_LEN * sizeof(short));

    for (i = 0; i < N; i++) {
        for (j = 0; j < SAMPLE_TEST_LEN; ++j) {
            x[i * SAMPLE_TEST_LEN + j] = sampleinput[j];
        }
    }
    
    for (int k = 9; k < 10; ++k)
    {
        gettimeofday(&t1, NULL);

        for (j = 0; j < k; ++j)
        {
            hipMemcpy(d_x, x, N * SAMPLE_TEST_LEN * sizeof(int), hipMemcpyHostToDevice);
            hipMemcpy(d_y1, y1, N * SAMPLE_TEST_LEN * sizeof(short), hipMemcpyHostToDevice);
            hipMemcpy(d_y2, y2, N * SAMPLE_TEST_LEN * sizeof(short), hipMemcpyHostToDevice);
            // Perform SAXPY on 1M elements
            lstm_task<<<(N+63)/64, 64>>>(N, d_x, d_y1, d_y2);
            hipMemcpy(y1, d_y1, N * SAMPLE_TEST_LEN * sizeof(short), hipMemcpyDeviceToHost);
            hipMemcpy(y2, d_y2, N * SAMPLE_TEST_LEN * sizeof(short), hipMemcpyDeviceToHost);
        }

        gettimeofday(&t2, NULL);
        timersub(&t1, &t2, &tr);
        printf("Round %d Excute time: %.2f sec\n", k, -tr.tv_sec-(double)tr.tv_usec/1000000.0);
    }

    for (i = 0; i < SAMPLE_TEST_LEN; ++i) {
        test_out1[i] = y1[10000 * SAMPLE_TEST_LEN + i];
        test_out2[i] = y2[10000 * SAMPLE_TEST_LEN + i];
    }

    for (i = 0; i < SAMPLE_TEST_LEN; ++i)
        fprintf(ofp, "%d,%d\n", test_out1[i], test_out2[i]);

    fclose(ofp);
    hipFree(d_x);
    hipFree(d_y1);
    hipFree(d_y2);
    free(x);
    free(y1);
    free(y2);
}


	.text
	.file	"example.hip"
	.globl	_Z24__device_stub__lstm_taskiPiPsS0_ # -- Begin function _Z24__device_stub__lstm_taskiPiPsS0_
	.type	_Z24__device_stub__lstm_taskiPiPsS0_,@function
_Z24__device_stub__lstm_taskiPiPsS0_:   # @_Z24__device_stub__lstm_taskiPiPsS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9lstm_taskiPiPsS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__lstm_taskiPiPsS0_, .Lfunc_end0-_Z24__device_stub__lstm_taskiPiPsS0_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0xc12e848000000000              # double -1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$16456, %rsp                    # imm = 0x4048
	.cfi_def_cfa_offset 16512
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB1_5
# %bb.1:                                # %.preheader77.preheader
	movq	%rax, %rbx
	xorl	%r14d, %r14d
.LBB1_2:                                # %.preheader77
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%rsp,%r14), %rdx
	addq	$8256, %rdx                     # imm = 0x2040
	movl	$.L.str.3, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	addq	$4, %r14
	cmpq	$8192, %r14                     # imm = 0x2000
	jne	.LBB1_2
# %bb.3:
	movq	%rbx, %rdi
	callq	fclose
	movl	$.L.str.4, %edi
	movl	$.L.str.5, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB1_4
# %bb.7:
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movabsq	$4294967296, %rbx               # imm = 0x100000000
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %rbp
	movl	$2147483648, %edi               # imm = 0x80000000
	callq	malloc
	movq	%rax, %r14
	movl	$2147483648, %edi               # imm = 0x80000000
	callq	malloc
	movq	%rax, %r15
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$2147483648, %esi               # imm = 0x80000000
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$2147483648, %esi               # imm = 0x80000000
	callq	hipMalloc
	movl	$524288, %ebx                   # imm = 0x80000
	leaq	8256(%rsp), %r13
	movq	%rbp, %r12
.LBB1_8:                                # %.preheader76
                                        # =>This Inner Loop Header: Depth=1
	movl	$8192, %edx                     # imm = 0x2000
	movq	%rbp, %rdi
	movq	%r13, %rsi
	callq	memcpy@PLT
	addq	$8192, %rbp                     # imm = 0x2000
	decq	%rbx
	jne	.LBB1_8
# %bb.9:
	leaq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movl	$9, %ebx
	movabsq	$4294967296, %rax               # imm = 0x100000000
	leaq	64(%rax), %rbp
	leaq	8192(%rax), %r13
.LBB1_10:                               # =>This Inner Loop Header: Depth=1
	movq	16(%rsp), %rdi
	movq	%r12, %rsi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movl	$2147483648, %edx               # imm = 0x80000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	movl	$2147483648, %edx               # imm = 0x80000000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.11:                               #   in Loop: Header=BB1_10 Depth=1
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	(%rsp), %rcx
	movl	$524288, %edi                   # imm = 0x80000
	callq	_Z24__device_stub__lstm_taskiPiPsS0_
.LBB1_12:                               #   in Loop: Header=BB1_10 Depth=1
	movq	8(%rsp), %rsi
	movl	$2147483648, %edx               # imm = 0x80000000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rsi
	movl	$2147483648, %edx               # imm = 0x80000000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	decl	%ebx
	jne	.LBB1_10
# %bb.13:                               # %.critedge
	leaq	48(%rsp), %r13
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r13), %rax
	subq	32(%rsp), %rax
	movq	40(%rsp), %rcx
	subq	8(%r13), %rcx
	leaq	1000000(%rcx), %rdx
	movq	%rcx, %rsi
	shrq	$63, %rsi
	addq	%rax, %rsi
	testq	%rcx, %rcx
	cmovnsq	%rcx, %rdx
	cvtsi2sd	%rsi, %xmm1
	cvtsi2sd	%rdx, %xmm0
	divsd	.LCPI1_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	movl	$.L.str.7, %edi
	movl	$9, %esi
	movb	$1, %al
	callq	printf
	movl	$40960000, %ebx                 # imm = 0x2710000
	movq	%r14, %rsi
	addq	%rbx, %rsi
	leaq	4160(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	callq	memcpy@PLT
	movq	%r15, %rsi
	addq	%rbx, %rsi
	leaq	64(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	callq	memcpy@PLT
	xorl	%ebx, %ebx
	movq	24(%rsp), %r13                  # 8-byte Reload
.LBB1_14:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movswl	4160(%rsp,%rbx,2), %edx
	movswl	64(%rsp,%rbx,2), %ecx
	movl	$.L.str.8, %esi
	movq	%r13, %rdi
	xorl	%eax, %eax
	callq	fprintf
	incq	%rbx
	cmpq	$2048, %rbx                     # imm = 0x800
	jne	.LBB1_14
# %bb.15:
	movq	%r13, %rdi
	callq	fclose
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%r12, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	jmp	.LBB1_16
.LBB1_5:
	movl	$.Lstr, %edi
	jmp	.LBB1_6
.LBB1_4:
	movl	$.Lstr.1, %edi
.LBB1_6:
	callq	puts@PLT
	movl	$-1, %eax
.LBB1_16:
	addq	$16456, %rsp                    # imm = 0x4048
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	subq	$32, %rsp
	.cfi_adjust_cfa_offset 32
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9lstm_taskiPiPsS0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$lut_sigmoid, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movl	$2048, %r9d                     # imm = 0x800
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$lut_tanh, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$2048, %r9d                     # imm = 0x800
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$__hip_module_dtor, %edi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	lut_sigmoid,@object             # @lut_sigmoid
	.local	lut_sigmoid
	.comm	lut_sigmoid,2048,16
	.type	lut_tanh,@object                # @lut_tanh
	.local	lut_tanh
	.comm	lut_tanh,2048,16
	.type	_Z9lstm_taskiPiPsS0_,@object    # @_Z9lstm_taskiPiPsS0_
	.section	.rodata,"a",@progbits
	.globl	_Z9lstm_taskiPiPsS0_
	.p2align	3, 0x0
_Z9lstm_taskiPiPsS0_:
	.quad	_Z24__device_stub__lstm_taskiPiPsS0_
	.size	_Z9lstm_taskiPiPsS0_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"converted-lstm-in.txt"
	.size	.L.str, 22

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"r"
	.size	.L.str.1, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%d"
	.size	.L.str.3, 3

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"output.txt"
	.size	.L.str.4, 11

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"w"
	.size	.L.str.5, 2

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Round %d Excute time: %.2f sec\n"
	.size	.L.str.7, 32

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"%d,%d\n"
	.size	.L.str.8, 7

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9lstm_taskiPiPsS0_"
	.size	.L__unnamed_1, 21

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"lut_sigmoid"
	.size	.L__unnamed_2, 12

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"lut_tanh"
	.size	.L__unnamed_3, 9

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"File converted-lstm-in.txt cannot be opened for read."
	.size	.Lstr, 54

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"File output.txt cannot be opened for write."
	.size	.Lstr.1, 44

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__lstm_taskiPiPsS0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym lut_sigmoid
	.addrsig_sym lut_tanh
	.addrsig_sym _Z9lstm_taskiPiPsS0_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9lstm_taskiPiPsS0_    ; -- Begin function _Z9lstm_taskiPiPsS0_
	.globl	_Z9lstm_taskiPiPsS0_
	.p2align	8
	.type	_Z9lstm_taskiPiPsS0_,@function
_Z9lstm_taskiPiPsS0_:                   ; @_Z9lstm_taskiPiPsS0_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[2:3], 0x2c
	s_load_b32 s5, s[2:3], 0x0
	v_and_b32_e32 v25, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[25:26]
	s_movk_i32 s4, 0x3110
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_i32 s14, s4, 0xc0
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB0_145
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[2:3], 0x8
	s_load_b64 s[12:13], s[2:3], 0x18
	v_lshlrev_b32_e32 v23, 11, v1
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v24, 31, v23
	v_lshlrev_b64 v[1:2], 2, v[23:24]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v3, v[1:2], off
	v_add_co_u32 v1, vcc_lo, v1, 4
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_add_i32 s3, s2, 0x110
	s_add_i32 s2, s2, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s2, 0x2000
	s_waitcnt vmcnt(0)
	scratch_store_b32 off, v3, s3
	s_cbranch_scc1 .LBB0_2
; %bb.3:
	s_mov_b32 s8, 0
	v_mov_b32_e32 v1, 16
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v3, s9
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, s9
	v_dual_mov_b32 v4, s10 :: v_dual_mov_b32 v5, s11
	scratch_store_b64 off, v[6:7], off offset:48
	scratch_store_b64 off, v[6:7], s14
	s_clause 0x1
	scratch_store_b128 off, v[2:5], off offset:32
	scratch_store_b128 off, v[2:5], off offset:16
	s_clause 0x9
	scratch_store_b128 off, v[2:5], s14 offset:-16
	scratch_store_b128 off, v[2:5], s14 offset:-32
	scratch_store_b128 off, v[2:5], s14 offset:-48
	scratch_store_b128 off, v[2:5], s14 offset:-64
	scratch_store_b128 off, v[2:5], s14 offset:-80
	scratch_store_b128 off, v[2:5], s14 offset:-96
	scratch_store_b128 off, v[2:5], s14 offset:-112
	scratch_store_b128 off, v[2:5], s14 offset:-128
	scratch_store_b128 off, v[2:5], s14 offset:-144
	scratch_store_b128 off, v[2:5], s14 offset:-160
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __const._Z10lstm_n5_o1PiPs.inW@rel32@lo+4
	s_addc_u32 s3, s3, __const._Z10lstm_n5_o1PiPs.inW@rel32@hi+12
	s_clause 0x1
	scratch_store_b128 off, v[2:5], s14 offset:-176
	scratch_store_b128 off, v[2:5], s14 offset:-192
	s_clause 0x2
	scratch_store_b64 off, v[6:7], off offset:256
	scratch_store_b128 off, v[2:5], off offset:240
	scratch_store_b128 off, v[2:5], off offset:224
.LBB0_4:                                ; %.preheader237.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
	v_mov_b32_e32 v2, v1
	s_mov_b64 s[4:5], 0
.LBB0_5:                                ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s10, s2, s4
	s_addc_u32 s11, s3, s5
	s_add_u32 s4, s4, 4
	s_load_b32 s9, s[10:11], 0x0
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 20
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v3, 0x45800000, s9
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f32_e32 v3, v3
	scratch_store_b16 v2, v3, off
	v_add_nc_u32_e32 v2, 2, v2
	s_cbranch_scc1 .LBB0_5
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	s_add_i32 s8, s8, 1
	v_add_nc_u32_e32 v1, 10, v1
	s_add_u32 s2, s2, 20
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s8, 4
	s_cbranch_scc1 .LBB0_4
; %bb.7:                                ; %.preheader235.i.preheader
	s_movk_i32 s10, 0x3110
	s_mov_b32 s11, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __const._Z10lstm_n5_o1PiPs.intW@rel32@lo+4
	s_addc_u32 s3, s3, __const._Z10lstm_n5_o1PiPs.intW@rel32@hi+12
.LBB0_8:                                ; %.preheader235.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_9 Depth 2
                                        ;       Child Loop BB0_10 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b64 s[4:5], s[2:3]
	s_mov_b32 s14, s10
	s_mov_b32 s15, 0
.LBB0_9:                                ; %.preheader234.i
                                        ;   Parent Loop BB0_8 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_10 Depth 3
	s_mov_b64 s[8:9], 0
	s_mov_b32 s16, s14
.LBB0_10:                               ;   Parent Loop BB0_8 Depth=1
                                        ;     Parent Loop BB0_9 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_u32 s18, s4, s8
	s_addc_u32 s19, s5, s9
	s_add_u32 s8, s8, 4
	s_load_b32 s17, s[18:19], 0x0
	s_addc_u32 s9, s9, 0
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v1, 0x45800000, s17
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f32_e32 v1, v1
	scratch_store_b16 off, v1, s16
	s_add_i32 s16, s16, 2
	s_cmp_lg_u32 s8, 20
	s_cbranch_scc1 .LBB0_10
; %bb.11:                               ;   in Loop: Header=BB0_9 Depth=2
	s_add_i32 s15, s15, 1
	s_add_i32 s14, s14, 10
	s_add_u32 s4, s4, 20
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s15, 5
	s_cbranch_scc1 .LBB0_9
; %bb.12:                               ;   in Loop: Header=BB0_8 Depth=1
	s_add_i32 s11, s11, 1
	s_add_i32 s10, s10, 50
	s_add_u32 s2, s2, 0x64
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s11, 4
	s_cbranch_scc1 .LBB0_8
; %bb.13:                               ; %.preheader232.i.preheader
	v_mov_b32_e32 v1, 0xe0
	s_mov_b32 s8, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __const._Z10lstm_n5_o1PiPs.intB@rel32@lo+4
	s_addc_u32 s3, s3, __const._Z10lstm_n5_o1PiPs.intB@rel32@hi+12
.LBB0_14:                               ; %.preheader232.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_15 Depth 2
	v_mov_b32_e32 v2, v1
	s_mov_b64 s[4:5], 0
.LBB0_15:                               ;   Parent Loop BB0_14 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s10, s2, s4
	s_addc_u32 s11, s3, s5
	s_add_u32 s4, s4, 4
	s_load_b32 s9, s[10:11], 0x0
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 20
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v3, 0x45800000, s9
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f32_e32 v3, v3
	scratch_store_b16 v2, v3, off
	v_add_nc_u32_e32 v2, 2, v2
	s_cbranch_scc1 .LBB0_15
; %bb.16:                               ;   in Loop: Header=BB0_14 Depth=1
	s_add_i32 s8, s8, 1
	v_add_nc_u32_e32 v1, 10, v1
	s_add_u32 s2, s2, 20
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s8, 4
	s_cbranch_scc1 .LBB0_14
; %bb.17:                               ; %.preheader231.i.preheader
	v_dual_mov_b32 v31, 0 :: v_dual_mov_b32 v32, 0
	v_mov_b32_e32 v1, 0xbeace5b4
	v_mov_b32_e32 v33, 0
	s_mov_b64 s[8:9], 0
.LBB0_18:                               ; %.preheader231.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s8, 1
	v_lshrrev_b32_e32 v3, 16, v33
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s8, 2
	v_cndmask_b32_e32 v2, 0xbedab9f5, v1, vcc_lo
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s8, 3
	v_lshrrev_b32_e32 v4, 16, v32
	s_cselect_b32 s3, -1, 0
	v_cndmask_b32_e64 v2, v2, 0x3e2b9d3d, s2
	s_cmp_eq_u32 s8, 4
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v2, v2, 0x3f014467, s3
	s_cselect_b32 s5, -1, 0
	s_add_u32 s8, s8, 1
	s_addc_u32 s9, s9, 0
	s_cmp_lg_u32 s8, 5
	v_cndmask_b32_e64 v2, v2, 0xbf0098a2, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, 0x45800000, v2
	v_cvt_i32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v5, v32, v2, s5
	v_cndmask_b32_e64 v6, v33, v2, s2
	v_cndmask_b32_e64 v3, v3, v2, s3
	v_cndmask_b32_e32 v4, v4, v2, vcc_lo
	v_cndmask_b32_e64 v31, v31, v2, s4
	v_and_b32_e32 v5, 0xffff, v5
	v_and_b32_e32 v6, 0xffff, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_or_b32 v32, v4, 16, v5
	v_lshl_or_b32 v33, v3, 16, v6
	s_cbranch_scc1 .LBB0_18
; %bb.19:                               ; %.preheader230.i.preheader
	s_mov_b32 s8, 0
	s_movk_i32 s2, 0x64
	s_mov_b32 s10, s8
	s_mov_b32 s9, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, s9
	v_dual_mov_b32 v7, s10 :: v_dual_mov_b32 v8, s11
	v_add_nc_u32_e64 v37, 0x3110, s2
	v_mov_b32_e32 v1, v5
	s_movk_i32 s2, 0x96
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v3, v7 :: v_dual_mov_b32 v16, v8
	v_dual_mov_b32 v19, v8 :: v_dual_mov_b32 v16, v5
	v_dual_mov_b32 v13, v5 :: v_dual_mov_b32 v12, v8
	v_dual_mov_b32 v17, v6 :: v_dual_mov_b32 v22, v8
	v_or_b32_e64 v34, 16, 10
	v_add_nc_u32_e64 v35, 0x3110, 50
	v_or_b32_e64 v28, 0xe0, 10
	v_add_nc_u32_e64 v36, 16, 20
	v_add_nc_u32_e64 v29, 0xe0, 20
	v_add_nc_u32_e64 v38, 16, 30
	v_add_nc_u32_e64 v39, 0x3110, s2
	v_add_nc_u32_e64 v30, 0xe0, 30
	v_dual_mov_b32 v27, 0 :: v_dual_mov_b32 v2, v6
	v_dual_mov_b32 v15, v7 :: v_dual_mov_b32 v14, v6
	v_dual_mov_b32 v11, v7 :: v_dual_mov_b32 v10, v6
	v_dual_mov_b32 v9, v5 :: v_dual_mov_b32 v18, v7
	v_dual_mov_b32 v21, v7 :: v_dual_mov_b32 v20, v6
	v_dual_mov_b32 v19, v5 :: v_dual_mov_b32 v4, v8
	s_getpc_b64 s[14:15]
	s_add_u32 s14, s14, lut_tanh@rel32@lo+4
	s_addc_u32 s15, s15, lut_tanh@rel32@hi+12
.LBB0_20:                               ; %.preheader230.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_21 Depth 2
                                        ;       Child Loop BB0_22 Depth 3
                                        ;     Child Loop BB0_31 Depth 2
                                        ;       Child Loop BB0_32 Depth 3
                                        ;     Child Loop BB0_41 Depth 2
                                        ;       Child Loop BB0_42 Depth 3
                                        ;     Child Loop BB0_51 Depth 2
                                        ;       Child Loop BB0_52 Depth 3
                                        ;     Child Loop BB0_61 Depth 2
                                        ;     Child Loop BB0_71 Depth 2
	s_lshl_b32 s2, s8, 2
	v_mov_b32_e32 v22, 0x3110
	s_addk_i32 s2, 0x110
	s_mov_b32 s9, 0
	scratch_load_b32 v4, off, s2
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v4, v4, 16, 0xd4c00000
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 8, v4
	v_mul_hi_i32 v4, 0x45e7b273, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v8, 31, v4
	v_ashrrev_i32_e32 v12, 9, v4
	v_lshrrev_b32_e32 v4, 16, v5
	v_add_nc_u32_e32 v8, v12, v8
	v_lshrrev_b32_e32 v12, 16, v6
.LBB0_21:                               ;   Parent Loop BB0_20 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_22 Depth 3
	s_lshl_b32 s2, s9, 1
	s_delay_alu instid0(VALU_DEP_2)
	v_lshrrev_b32_e32 v40, 16, v14
	s_add_i32 s2, s2, 16
	s_cmp_eq_u32 s9, 3
	scratch_load_i16 v26, off, s2
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 2
	v_lshrrev_b32_e32 v41, 16, v13
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s9, 1
	s_mov_b64 s[10:11], 0
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s9, 0
	s_waitcnt vmcnt(0)
	v_mul_i32_i24_e32 v26, v8, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v26, 15, v26
	v_cndmask_b32_e32 v40, v40, v26, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e64 v14, v14, v26, s2
	v_cndmask_b32_e64 v41, v41, v26, s3
	v_cndmask_b32_e32 v42, v13, v26, vcc_lo
	s_cmp_eq_u32 s9, 4
	s_cselect_b32 vcc_lo, -1, 0
	v_dual_cndmask_b32 v13, v15, v26 :: v_dual_mov_b32 v26, v22
	v_perm_b32 v15, v40, v14, 0x5040100
	v_perm_b32 v14, v41, v42, 0x5040100
.LBB0_22:                               ;   Parent Loop BB0_20 Depth=1
                                        ;     Parent Loop BB0_21 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	scratch_load_i16 v40, v26, off
	s_cmp_eq_u32 s10, 1
	v_lshrrev_b32_e32 v42, 16, v15
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s10, 2
	v_cndmask_b32_e32 v43, v5, v4, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s10, 3
	v_lshrrev_b32_e32 v41, 16, v14
	v_add_nc_u32_e32 v26, 2, v26
	v_cndmask_b32_e32 v43, v43, v6, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s10, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v43, v43, v12, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 1
	s_cselect_b32 s2, -1, 0
	v_cndmask_b32_e32 v43, v43, v7, vcc_lo
	v_cndmask_b32_e64 v44, v14, v41, s2
	s_cmp_eq_u32 s9, 2
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfe_i32 v43, v43, 0, 16
	v_cndmask_b32_e64 v44, v44, v15, s3
	s_cmp_eq_u32 s9, 3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v44, v44, v42, vcc_lo
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s9, 0
	s_cselect_b32 s5, -1, 0
	s_add_u32 s10, s10, 1
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s10, 5
	s_waitcnt vmcnt(0)
	v_mul_i32_i24_e32 v40, v40, v43
	v_cndmask_b32_e64 v43, v44, v13, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v40, 12, v40
	v_add_nc_u16 v40, v43, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v15, v15, v40, s3
	v_cndmask_b32_e32 v42, v42, v40, vcc_lo
	v_cndmask_b32_e64 v14, v14, v40, s5
	v_cndmask_b32_e64 v41, v41, v40, s2
	v_cndmask_b32_e64 v13, v13, v40, s4
	v_perm_b32 v15, v42, v15, 0x5040100
	s_delay_alu instid0(VALU_DEP_3)
	v_perm_b32 v14, v41, v14, 0x5040100
	s_cbranch_scc1 .LBB0_22
; %bb.23:                               ;   in Loop: Header=BB0_21 Depth=2
	s_lshl_b32 s2, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_addk_i32 s2, 0xe0
	scratch_load_u16 v26, off, s2
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u16 v26, v26, v40
                                        ; implicit-def: $vgpr40
	v_ashrrev_i16 v26, 5, v26
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i16_e32 0, v26
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB0_27
; %bb.24:                               ;   in Loop: Header=BB0_21 Depth=2
	v_mov_b32_e32 v40, 1
	s_mov_b32 s3, exec_lo
	v_cmpx_lt_u16_e32 0xfc00, v26
	s_cbranch_execz .LBB0_26
; %bb.25:                               ;   in Loop: Header=BB0_21 Depth=2
	v_sub_nc_u16 v40, 0, v26
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, lut_sigmoid@rel32@lo+4
	s_addc_u32 s5, s5, lut_sigmoid@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v40, 0xffff, v40
	v_lshlrev_b32_e32 v40, 1, v40
	global_load_u16 v40, v40, s[4:5]
	s_waitcnt vmcnt(0)
	v_sub_nc_u16 v40, 0x1000, v40
.LBB0_26:                               ; %Flow543
                                        ;   in Loop: Header=BB0_21 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_27:                               ; %Flow544
                                        ;   in Loop: Header=BB0_21 Depth=2
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB0_29
; %bb.28:                               ;   in Loop: Header=BB0_21 Depth=2
	v_and_b32_e32 v40, 0xffff, v26
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, lut_sigmoid@rel32@lo+4
	s_addc_u32 s5, s5, lut_sigmoid@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v40, 1, v40
	global_load_u16 v40, v40, s[4:5]
.LBB0_29:                               ;   in Loop: Header=BB0_21 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_cmp_eq_u32 s9, 1
	v_lshrrev_b32_e32 v41, 16, v14
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 3
	v_lshrrev_b32_e32 v42, 16, v15
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s9, 4
	v_cndmask_b32_e32 v41, v41, v26, vcc_lo
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s9, 0
	v_cndmask_b32_e64 v42, v42, v26, s2
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s9, 2
	v_cndmask_b32_e64 v14, v14, v26, s4
	s_cselect_b32 s5, -1, 0
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v42, v42, v40, s2
	v_cndmask_b32_e64 v15, v15, v26, s5
	v_dual_cndmask_b32 v41, v41, v40 :: v_dual_add_nc_u32 v22, 10, v22
	v_cndmask_b32_e64 v43, v14, v40, s4
	v_cndmask_b32_e64 v26, v13, v26, s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v15, v15, v40, s5
	s_add_i32 s9, s9, 1
	v_perm_b32 v13, v41, v43, 0x5040100
	s_cmp_lg_u32 s9, 5
	s_delay_alu instid0(VALU_DEP_2)
	v_perm_b32 v14, v42, v15, 0x5040100
	v_cndmask_b32_e64 v15, v26, v40, s3
	s_cbranch_scc1 .LBB0_21
; %bb.30:                               ; %.preheader229.i.preheader
                                        ;   in Loop: Header=BB0_20 Depth=1
	v_mov_b32_e32 v22, v35
	s_mov_b32 s9, 0
.LBB0_31:                               ; %.preheader229.i
                                        ;   Parent Loop BB0_20 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_32 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s2, s9, 1
	s_cmp_eq_u32 s9, 3
	v_add_nc_u32_e32 v26, s2, v34
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 2
	v_lshrrev_b32_e32 v40, 16, v10
	s_cselect_b32 s2, -1, 0
	scratch_load_i16 v26, v26, off
	s_cmp_eq_u32 s9, 1
	v_lshrrev_b32_e32 v41, 16, v9
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s9, 0
	s_mov_b64 s[10:11], 0
	s_waitcnt vmcnt(0)
	v_mul_i32_i24_e32 v26, v8, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v26, 15, v26
	v_cndmask_b32_e32 v40, v40, v26, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e64 v10, v10, v26, s2
	v_cndmask_b32_e64 v41, v41, v26, s3
	v_cndmask_b32_e32 v42, v9, v26, vcc_lo
	s_cmp_eq_u32 s9, 4
	s_cselect_b32 vcc_lo, -1, 0
	v_dual_cndmask_b32 v9, v11, v26 :: v_dual_mov_b32 v26, v22
	v_perm_b32 v11, v40, v10, 0x5040100
	v_perm_b32 v10, v41, v42, 0x5040100
.LBB0_32:                               ;   Parent Loop BB0_20 Depth=1
                                        ;     Parent Loop BB0_31 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	scratch_load_i16 v40, v26, off
	s_cmp_eq_u32 s10, 1
	v_lshrrev_b32_e32 v42, 16, v11
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s10, 2
	v_cndmask_b32_e32 v43, v5, v4, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s10, 3
	v_lshrrev_b32_e32 v41, 16, v10
	v_add_nc_u32_e32 v26, 2, v26
	v_cndmask_b32_e32 v43, v43, v6, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s10, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v43, v43, v12, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 1
	s_cselect_b32 s2, -1, 0
	v_cndmask_b32_e32 v43, v43, v7, vcc_lo
	v_cndmask_b32_e64 v44, v10, v41, s2
	s_cmp_eq_u32 s9, 2
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfe_i32 v43, v43, 0, 16
	v_cndmask_b32_e64 v44, v44, v11, s3
	s_cmp_eq_u32 s9, 3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v44, v44, v42, vcc_lo
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s9, 0
	s_cselect_b32 s5, -1, 0
	s_add_u32 s10, s10, 1
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s10, 5
	s_waitcnt vmcnt(0)
	v_mul_i32_i24_e32 v40, v40, v43
	v_cndmask_b32_e64 v43, v44, v9, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v40, 12, v40
	v_add_nc_u16 v40, v43, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v11, v11, v40, s3
	v_cndmask_b32_e32 v42, v42, v40, vcc_lo
	v_cndmask_b32_e64 v10, v10, v40, s5
	v_cndmask_b32_e64 v41, v41, v40, s2
	v_cndmask_b32_e64 v9, v9, v40, s4
	v_perm_b32 v11, v42, v11, 0x5040100
	s_delay_alu instid0(VALU_DEP_3)
	v_perm_b32 v10, v41, v10, 0x5040100
	s_cbranch_scc1 .LBB0_32
; %bb.33:                               ;   in Loop: Header=BB0_31 Depth=2
	s_lshl_b32 s2, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v26, s2, v28
	s_mov_b32 s2, exec_lo
	scratch_load_u16 v26, v26, off
	s_waitcnt vmcnt(0)
	v_add_nc_u16 v26, v26, v40
                                        ; implicit-def: $vgpr40
	v_ashrrev_i16 v26, 5, v26
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i16_e32 0, v26
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB0_37
; %bb.34:                               ;   in Loop: Header=BB0_31 Depth=2
	v_mov_b32_e32 v40, 1
	s_mov_b32 s3, exec_lo
	v_cmpx_lt_u16_e32 0xfc00, v26
	s_cbranch_execz .LBB0_36
; %bb.35:                               ;   in Loop: Header=BB0_31 Depth=2
	v_sub_nc_u16 v40, 0, v26
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, lut_sigmoid@rel32@lo+4
	s_addc_u32 s5, s5, lut_sigmoid@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v40, 0xffff, v40
	v_lshlrev_b32_e32 v40, 1, v40
	global_load_u16 v40, v40, s[4:5]
	s_waitcnt vmcnt(0)
	v_sub_nc_u16 v40, 0x1000, v40
.LBB0_36:                               ; %Flow541
                                        ;   in Loop: Header=BB0_31 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_37:                               ; %Flow542
                                        ;   in Loop: Header=BB0_31 Depth=2
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB0_39
; %bb.38:                               ;   in Loop: Header=BB0_31 Depth=2
	v_and_b32_e32 v40, 0xffff, v26
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, lut_sigmoid@rel32@lo+4
	s_addc_u32 s5, s5, lut_sigmoid@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v40, 1, v40
	global_load_u16 v40, v40, s[4:5]
.LBB0_39:                               ;   in Loop: Header=BB0_31 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_cmp_eq_u32 s9, 1
	v_lshrrev_b32_e32 v41, 16, v10
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 3
	v_lshrrev_b32_e32 v42, 16, v11
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s9, 4
	v_cndmask_b32_e32 v41, v41, v26, vcc_lo
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s9, 0
	v_cndmask_b32_e64 v42, v42, v26, s2
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s9, 2
	v_cndmask_b32_e64 v10, v10, v26, s4
	s_cselect_b32 s5, -1, 0
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v42, v42, v40, s2
	v_cndmask_b32_e64 v11, v11, v26, s5
	v_dual_cndmask_b32 v41, v41, v40 :: v_dual_add_nc_u32 v22, 10, v22
	v_cndmask_b32_e64 v43, v10, v40, s4
	v_cndmask_b32_e64 v26, v9, v26, s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v11, v11, v40, s5
	s_add_i32 s9, s9, 1
	v_perm_b32 v9, v41, v43, 0x5040100
	s_cmp_lg_u32 s9, 5
	s_delay_alu instid0(VALU_DEP_2)
	v_perm_b32 v10, v42, v11, 0x5040100
	v_cndmask_b32_e64 v11, v26, v40, s3
	s_cbranch_scc1 .LBB0_31
; %bb.40:                               ; %.preheader228.i.preheader
                                        ;   in Loop: Header=BB0_20 Depth=1
	v_mov_b32_e32 v22, v37
	s_mov_b32 s9, 0
.LBB0_41:                               ; %.preheader228.i
                                        ;   Parent Loop BB0_20 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_42 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s2, s9, 1
	s_cmp_eq_u32 s9, 3
	v_add_nc_u32_e32 v26, s2, v36
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 2
	v_lshrrev_b32_e32 v40, 16, v17
	s_cselect_b32 s2, -1, 0
	scratch_load_i16 v26, v26, off
	s_cmp_eq_u32 s9, 1
	v_lshrrev_b32_e32 v41, 16, v16
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s9, 0
	s_mov_b64 s[10:11], 0
	s_waitcnt vmcnt(0)
	v_mul_i32_i24_e32 v26, v8, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v26, 15, v26
	v_cndmask_b32_e32 v40, v40, v26, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e64 v17, v17, v26, s2
	v_cndmask_b32_e64 v41, v41, v26, s3
	v_cndmask_b32_e32 v42, v16, v26, vcc_lo
	s_cmp_eq_u32 s9, 4
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e32 v16, v18, v26, vcc_lo
	v_perm_b32 v18, v40, v17, 0x5040100
	v_perm_b32 v17, v41, v42, 0x5040100
	v_mov_b32_e32 v26, v22
.LBB0_42:                               ;   Parent Loop BB0_20 Depth=1
                                        ;     Parent Loop BB0_41 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	scratch_load_i16 v40, v26, off
	s_cmp_eq_u32 s10, 1
	v_lshrrev_b32_e32 v42, 16, v18
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s10, 2
	v_cndmask_b32_e32 v43, v5, v4, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s10, 3
	v_lshrrev_b32_e32 v41, 16, v17
	v_add_nc_u32_e32 v26, 2, v26
	v_cndmask_b32_e32 v43, v43, v6, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s10, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v43, v43, v12, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 1
	s_cselect_b32 s2, -1, 0
	v_cndmask_b32_e32 v43, v43, v7, vcc_lo
	v_cndmask_b32_e64 v44, v17, v41, s2
	s_cmp_eq_u32 s9, 2
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfe_i32 v43, v43, 0, 16
	v_cndmask_b32_e64 v44, v44, v18, s3
	s_cmp_eq_u32 s9, 3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v44, v44, v42, vcc_lo
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s9, 0
	s_cselect_b32 s5, -1, 0
	s_add_u32 s10, s10, 1
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s10, 5
	s_waitcnt vmcnt(0)
	v_mul_i32_i24_e32 v40, v40, v43
	v_cndmask_b32_e64 v43, v44, v16, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v40, 12, v40
	v_add_nc_u16 v40, v43, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v18, v18, v40, s3
	v_cndmask_b32_e32 v42, v42, v40, vcc_lo
	v_cndmask_b32_e64 v17, v17, v40, s5
	v_cndmask_b32_e64 v41, v41, v40, s2
	v_cndmask_b32_e64 v16, v16, v40, s4
	v_perm_b32 v18, v42, v18, 0x5040100
	s_delay_alu instid0(VALU_DEP_3)
	v_perm_b32 v17, v41, v17, 0x5040100
	s_cbranch_scc1 .LBB0_42
; %bb.43:                               ;   in Loop: Header=BB0_41 Depth=2
	s_lshl_b32 s2, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v26, s2, v29
	s_mov_b32 s2, exec_lo
	scratch_load_u16 v26, v26, off
	s_waitcnt vmcnt(0)
	v_add_nc_u16 v26, v26, v40
                                        ; implicit-def: $vgpr40
	v_ashrrev_i16 v26, 5, v26
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i16_e32 0, v26
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB0_47
; %bb.44:                               ;   in Loop: Header=BB0_41 Depth=2
	v_mov_b32_e32 v40, 1
	s_mov_b32 s3, exec_lo
	v_cmpx_lt_u16_e32 0xfc00, v26
	s_cbranch_execz .LBB0_46
; %bb.45:                               ;   in Loop: Header=BB0_41 Depth=2
	v_sub_nc_u16 v40, 0, v26
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, lut_sigmoid@rel32@lo+4
	s_addc_u32 s5, s5, lut_sigmoid@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v40, 0xffff, v40
	v_lshlrev_b32_e32 v40, 1, v40
	global_load_u16 v40, v40, s[4:5]
	s_waitcnt vmcnt(0)
	v_sub_nc_u16 v40, 0x1000, v40
.LBB0_46:                               ; %Flow539
                                        ;   in Loop: Header=BB0_41 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_47:                               ; %Flow540
                                        ;   in Loop: Header=BB0_41 Depth=2
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB0_49
; %bb.48:                               ;   in Loop: Header=BB0_41 Depth=2
	v_and_b32_e32 v40, 0xffff, v26
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, lut_sigmoid@rel32@lo+4
	s_addc_u32 s5, s5, lut_sigmoid@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v40, 1, v40
	global_load_u16 v40, v40, s[4:5]
.LBB0_49:                               ;   in Loop: Header=BB0_41 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_cmp_eq_u32 s9, 1
	v_lshrrev_b32_e32 v41, 16, v17
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 3
	v_lshrrev_b32_e32 v42, 16, v18
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s9, 4
	v_cndmask_b32_e32 v41, v41, v26, vcc_lo
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s9, 0
	v_cndmask_b32_e64 v42, v42, v26, s2
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s9, 2
	v_cndmask_b32_e64 v17, v17, v26, s4
	s_cselect_b32 s5, -1, 0
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v42, v42, v40, s2
	v_cndmask_b32_e64 v18, v18, v26, s5
	v_dual_cndmask_b32 v41, v41, v40 :: v_dual_add_nc_u32 v22, 10, v22
	v_cndmask_b32_e64 v43, v17, v40, s4
	v_cndmask_b32_e64 v26, v16, v26, s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v18, v18, v40, s5
	s_add_i32 s9, s9, 1
	v_perm_b32 v16, v41, v43, 0x5040100
	s_cmp_lg_u32 s9, 5
	s_delay_alu instid0(VALU_DEP_2)
	v_perm_b32 v17, v42, v18, 0x5040100
	v_cndmask_b32_e64 v18, v26, v40, s3
	s_cbranch_scc1 .LBB0_41
; %bb.50:                               ; %.preheader227.i.preheader
                                        ;   in Loop: Header=BB0_20 Depth=1
	v_mov_b32_e32 v22, v39
	s_mov_b32 s9, 0
.LBB0_51:                               ; %.preheader227.i
                                        ;   Parent Loop BB0_20 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_52 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s2, s9, 1
	s_cmp_eq_u32 s9, 3
	v_add_nc_u32_e32 v26, s2, v38
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 2
	v_lshrrev_b32_e32 v40, 16, v20
	s_cselect_b32 s2, -1, 0
	scratch_load_i16 v26, v26, off
	s_cmp_eq_u32 s9, 1
	v_lshrrev_b32_e32 v41, 16, v19
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s9, 0
	s_mov_b64 s[10:11], 0
	s_waitcnt vmcnt(0)
	v_mul_i32_i24_e32 v26, v8, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v26, 15, v26
	v_cndmask_b32_e32 v40, v40, v26, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e64 v20, v20, v26, s2
	v_cndmask_b32_e64 v41, v41, v26, s3
	v_cndmask_b32_e32 v42, v19, v26, vcc_lo
	s_cmp_eq_u32 s9, 4
	s_cselect_b32 vcc_lo, -1, 0
	v_dual_cndmask_b32 v19, v21, v26 :: v_dual_mov_b32 v26, v22
	v_perm_b32 v21, v40, v20, 0x5040100
	v_perm_b32 v20, v41, v42, 0x5040100
.LBB0_52:                               ;   Parent Loop BB0_20 Depth=1
                                        ;     Parent Loop BB0_51 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	scratch_load_i16 v40, v26, off
	s_cmp_eq_u32 s10, 1
	v_lshrrev_b32_e32 v42, 16, v21
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s10, 2
	v_cndmask_b32_e32 v43, v5, v4, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s10, 3
	v_lshrrev_b32_e32 v41, 16, v20
	v_add_nc_u32_e32 v26, 2, v26
	v_cndmask_b32_e32 v43, v43, v6, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s10, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v43, v43, v12, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 1
	s_cselect_b32 s2, -1, 0
	v_cndmask_b32_e32 v43, v43, v7, vcc_lo
	v_cndmask_b32_e64 v44, v20, v41, s2
	s_cmp_eq_u32 s9, 2
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfe_i32 v43, v43, 0, 16
	v_cndmask_b32_e64 v44, v44, v21, s3
	s_cmp_eq_u32 s9, 3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v44, v44, v42, vcc_lo
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s9, 0
	s_cselect_b32 s5, -1, 0
	s_add_u32 s10, s10, 1
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s10, 5
	s_waitcnt vmcnt(0)
	v_mul_i32_i24_e32 v40, v40, v43
	v_cndmask_b32_e64 v43, v44, v19, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v40, 12, v40
	v_add_nc_u16 v40, v43, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v21, v21, v40, s3
	v_cndmask_b32_e32 v42, v42, v40, vcc_lo
	v_cndmask_b32_e64 v20, v20, v40, s5
	v_cndmask_b32_e64 v41, v41, v40, s2
	v_cndmask_b32_e64 v19, v19, v40, s4
	v_perm_b32 v21, v42, v21, 0x5040100
	s_delay_alu instid0(VALU_DEP_3)
	v_perm_b32 v20, v41, v20, 0x5040100
	s_cbranch_scc1 .LBB0_52
; %bb.53:                               ;   in Loop: Header=BB0_51 Depth=2
	s_lshl_b32 s2, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v26, s2, v30
	s_mov_b32 s2, exec_lo
	scratch_load_u16 v26, v26, off
	s_waitcnt vmcnt(0)
	v_add_nc_u16 v26, v26, v40
                                        ; implicit-def: $vgpr40
	v_ashrrev_i16 v26, 5, v26
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i16_e32 0, v26
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB0_57
; %bb.54:                               ;   in Loop: Header=BB0_51 Depth=2
	v_mov_b32_e32 v40, 0xfffff000
	s_mov_b32 s3, exec_lo
	v_cmpx_lt_u16_e32 0xfc00, v26
	s_cbranch_execz .LBB0_56
; %bb.55:                               ;   in Loop: Header=BB0_51 Depth=2
	v_sub_nc_u16 v40, 0, v26
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, lut_tanh@rel32@lo+4
	s_addc_u32 s5, s5, lut_tanh@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v40, 0xffff, v40
	v_lshlrev_b32_e32 v40, 1, v40
	global_load_u16 v40, v40, s[4:5]
	s_waitcnt vmcnt(0)
	v_sub_nc_u16 v40, 0, v40
.LBB0_56:                               ; %Flow537
                                        ;   in Loop: Header=BB0_51 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_57:                               ; %Flow538
                                        ;   in Loop: Header=BB0_51 Depth=2
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB0_59
; %bb.58:                               ;   in Loop: Header=BB0_51 Depth=2
	v_and_b32_e32 v40, 0xffff, v26
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, lut_tanh@rel32@lo+4
	s_addc_u32 s5, s5, lut_tanh@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v40, 1, v40
	global_load_u16 v40, v40, s[4:5]
.LBB0_59:                               ;   in Loop: Header=BB0_51 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	s_cmp_eq_u32 s9, 1
	v_lshrrev_b32_e32 v41, 16, v20
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 3
	v_lshrrev_b32_e32 v42, 16, v21
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s9, 4
	v_cndmask_b32_e32 v41, v41, v26, vcc_lo
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s9, 0
	v_cndmask_b32_e64 v42, v42, v26, s2
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s9, 2
	v_cndmask_b32_e64 v20, v20, v26, s4
	s_cselect_b32 s5, -1, 0
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v42, v42, v40, s2
	v_cndmask_b32_e64 v21, v21, v26, s5
	v_dual_cndmask_b32 v41, v41, v40 :: v_dual_add_nc_u32 v22, 10, v22
	v_cndmask_b32_e64 v43, v20, v40, s4
	v_cndmask_b32_e64 v26, v19, v26, s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v21, v21, v40, s5
	s_add_i32 s9, s9, 1
	v_perm_b32 v19, v41, v43, 0x5040100
	s_cmp_lg_u32 s9, 5
	s_delay_alu instid0(VALU_DEP_2)
	v_perm_b32 v20, v42, v21, 0x5040100
	v_cndmask_b32_e64 v21, v26, v40, s3
	s_cbranch_scc1 .LBB0_51
; %bb.60:                               ; %.preheader.i.preheader
                                        ;   in Loop: Header=BB0_20 Depth=1
	s_mov_b64 s[10:11], 0
.LBB0_61:                               ; %.preheader.i
                                        ;   Parent Loop BB0_20 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_lshrrev_b32_e32 v4, 16, v1
	v_lshrrev_b32_e32 v8, 16, v9
	v_lshrrev_b32_e32 v12, 16, v19
	v_lshrrev_b32_e32 v26, 16, v13
	s_cmp_eq_u32 s10, 1
	v_lshrrev_b32_e32 v41, 16, v10
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s10, 2
	v_cndmask_b32_e32 v22, v1, v4, vcc_lo
	v_cndmask_b32_e32 v40, v9, v8, vcc_lo
	v_cndmask_b32_e32 v12, v19, v12, vcc_lo
	v_cndmask_b32_e32 v26, v13, v26, vcc_lo
	s_cselect_b32 s2, -1, 0
	v_lshrrev_b32_e32 v8, 16, v2
	v_cndmask_b32_e64 v22, v22, v2, s2
	v_cndmask_b32_e64 v40, v40, v10, s2
	v_cndmask_b32_e64 v12, v12, v20, s2
	v_lshrrev_b32_e32 v42, 16, v20
	v_cndmask_b32_e64 v26, v26, v14, s2
	v_lshrrev_b32_e32 v43, 16, v14
	s_cmp_eq_u32 s10, 3
	s_mov_b32 s2, exec_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s10, 4
	v_cndmask_b32_e32 v22, v22, v8, vcc_lo
	v_cndmask_b32_e32 v40, v40, v41, vcc_lo
	v_cndmask_b32_e32 v12, v12, v42, vcc_lo
	v_cndmask_b32_e32 v26, v26, v43, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e32 v22, v22, v3, vcc_lo
	v_cndmask_b32_e32 v40, v40, v11, vcc_lo
	v_cndmask_b32_e32 v12, v12, v21, vcc_lo
	v_cndmask_b32_e32 v26, v26, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_bfe_i32 v22, v22, 0, 16
	v_bfe_i32 v40, v40, 0, 16
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_bfe_i32 v12, v12, 0, 16
	v_bfe_i32 v26, v26, 0, 16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_i32_i24_e32 v22, v22, v40
	v_mul_i32_i24_e32 v12, v12, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v22, 8, v22
	v_lshrrev_b32_e32 v12, 12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v22, v22, v12
	v_mov_b32_e32 v12, 0x1000
	v_bfe_i32 v26, v22, 5, 15
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 0x400, v26
	s_cbranch_execz .LBB0_69
; %bb.62:                               ;   in Loop: Header=BB0_61 Depth=2
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $vgpr12
	v_cmpx_gt_i32_e32 0, v26
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB0_66
; %bb.63:                               ;   in Loop: Header=BB0_61 Depth=2
	v_mov_b32_e32 v12, 0xfffff000
	s_mov_b32 s4, exec_lo
	v_cmpx_lt_u32_e32 0xfffffc00, v26
	s_cbranch_execz .LBB0_65
; %bb.64:                               ;   in Loop: Header=BB0_61 Depth=2
	v_sub_nc_u32_e32 v40, 0, v26
	v_mov_b32_e32 v41, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[40:41], 1, v[40:41]
	v_add_co_u32 v40, vcc_lo, v40, s14
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v41, vcc_lo, s15, v41, vcc_lo
	global_load_u16 v12, v[40:41], off
	s_waitcnt vmcnt(0)
	v_sub_nc_u16 v12, 0, v12
.LBB0_65:                               ; %Flow534
                                        ;   in Loop: Header=BB0_61 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_66:                               ; %Flow535
                                        ;   in Loop: Header=BB0_61 Depth=2
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB0_68
; %bb.67:                               ;   in Loop: Header=BB0_61 Depth=2
	v_lshlrev_b64 v[40:41], 1, v[26:27]
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, lut_tanh@rel32@lo+4
	s_addc_u32 s5, s5, lut_tanh@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v40, vcc_lo, v40, s4
	v_add_co_ci_u32_e32 v41, vcc_lo, s5, v41, vcc_lo
	global_load_u16 v12, v[40:41], off
.LBB0_68:                               ; %Flow536
                                        ;   in Loop: Header=BB0_61 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_69:                               ;   in Loop: Header=BB0_61 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_cmp_eq_u32 s10, 3
	v_lshrrev_b32_e32 v40, 16, v16
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s10, 2
	v_lshrrev_b32_e32 v41, 16, v17
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s10, 1
	v_lshrrev_b32_e32 v22, 4, v22
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s10, 0
	v_cndmask_b32_e64 v40, v16, v40, s3
	s_cselect_b32 s4, -1, 0
	s_cmp_eq_u32 s10, 4
	s_waitcnt vmcnt(0)
	v_bfe_i32 v42, v12, 0, 16
	s_cselect_b32 s5, -1, 0
	v_cndmask_b32_e64 v40, v40, v17, s2
	v_lshrrev_b32_e32 v43, 16, v5
	v_cndmask_b32_e64 v4, v4, v22, s3
	v_cndmask_b32_e64 v2, v2, v22, s2
	v_cndmask_b32_e32 v8, v8, v22, vcc_lo
	v_cndmask_b32_e32 v40, v40, v41, vcc_lo
	v_lshrrev_b32_e32 v41, 16, v6
	v_cndmask_b32_e64 v3, v3, v22, s5
	v_cndmask_b32_e64 v6, v6, v26, s2
	v_cndmask_b32_e64 v1, v1, v22, s4
	v_cndmask_b32_e64 v5, v5, v26, s4
	v_cndmask_b32_e32 v41, v41, v26, vcc_lo
	v_cndmask_b32_e64 v40, v40, v18, s5
	v_cndmask_b32_e64 v6, v6, v12, s2
	v_cndmask_b32_e64 v7, v7, v26, s5
	v_cndmask_b32_e64 v5, v5, v12, s4
	v_perm_b32 v2, v8, v2, 0x5040100
	v_bfe_i32 v40, v40, 0, 16
	v_perm_b32 v1, v4, v1, 0x5040100
	v_cndmask_b32_e64 v7, v7, v12, s5
	s_add_u32 s10, s10, 1
	s_addc_u32 s11, s11, 0
	v_mul_i32_i24_e32 v22, v42, v40
	v_cndmask_b32_e64 v40, v43, v26, s3
	v_cndmask_b32_e32 v26, v41, v12, vcc_lo
	s_cmp_lg_u32 s10, 5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v22, 12, v22
	v_cndmask_b32_e64 v40, v40, v12, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v6, v6, v22, s2
	v_cndmask_b32_e32 v12, v26, v22, vcc_lo
	v_cndmask_b32_e64 v5, v5, v22, s4
	v_cndmask_b32_e64 v26, v40, v22, s3
	v_cndmask_b32_e64 v7, v7, v22, s5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_perm_b32 v6, v12, v6, 0x5040100
	v_perm_b32 v5, v26, v5, 0x5040100
	s_cbranch_scc1 .LBB0_61
; %bb.70:                               ; %.preheader240.preheader
                                        ;   in Loop: Header=BB0_20 Depth=1
	v_mov_b32_e32 v4, 0xffffff5f
	s_mov_b64 s[2:3], 0
.LBB0_71:                               ; %.preheader240
                                        ;   Parent Loop BB0_20 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_2)
	v_lshrrev_b32_e32 v8, 16, v5
	v_lshrrev_b32_e32 v12, 16, v32
	s_cmp_eq_u32 s2, 1
	v_lshrrev_b32_e32 v22, 16, v6
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s2, 2
	v_cndmask_b32_e32 v8, v5, v8, vcc_lo
	v_cndmask_b32_e32 v12, v32, v12, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_lshrrev_b32_e32 v26, 16, v33
	s_cmp_eq_u32 s2, 3
	v_cndmask_b32_e32 v8, v8, v6, vcc_lo
	v_cndmask_b32_e32 v12, v12, v33, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s2, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v8, v8, v22, vcc_lo
	v_cndmask_b32_e32 v12, v12, v26, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	v_cndmask_b32_e32 v8, v8, v7, vcc_lo
	v_cndmask_b32_e32 v12, v12, v31, vcc_lo
	s_cmp_lg_u32 s2, 5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfe_i32 v8, v8, 0, 16
	v_bfe_i32 v12, v12, 0, 16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_i32_i24_e32 v8, v8, v12
	v_lshrrev_b32_e32 v8, 12, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u16 v4, v4, v8
	s_cbranch_scc1 .LBB0_71
; %bb.72:                               ;   in Loop: Header=BB0_20 Depth=1
	s_lshl_b32 s2, s8, 1
	s_add_i32 s8, s8, 1
	s_addk_i32 s2, 0x2110
	s_cmpk_lg_i32 s8, 0x800
	scratch_store_b16 off, v4, s2
	s_cbranch_scc1 .LBB0_20
; %bb.73:                               ; %_Z10lstm_n5_o1PiPs.exit
	s_load_b64 s[8:9], s[0:1], 0x4
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, __const._Z10lstm_n5_o2PiPs.inW@rel32@lo+4
	s_addc_u32 s5, s5, __const._Z10lstm_n5_o2PiPs.inW@rel32@hi+12
	v_bfe_u32 v9, v0, 10, 10
	v_bfe_u32 v0, v0, 20, 10
	s_mov_b32 s0, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_mov_b32 s3, s0
	s_mov_b32 s1, s0
	v_mul_u32_u24_e32 v12, 40, v0
	s_mov_b32 s2, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v4, s3 :: v_dual_mov_b32 v3, s2
	v_dual_mov_b32 v6, s1 :: v_dual_mov_b32 v5, s0
	v_dual_mov_b32 v8, s3 :: v_dual_mov_b32 v7, s2
	v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
	s_clause 0x1
	scratch_store_b128 off, v[1:4], off offset:192
	scratch_store_b128 off, v[1:4], off offset:176
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v10, v25, s9
	s_lshr_b32 s8, s8, 16
	v_mul_u32_u24_e32 v13, s9, v9
	s_mul_i32 s10, s8, s9
	s_clause 0x1
	scratch_store_b128 off, v[1:4], off offset:160
	scratch_store_b128 off, v[1:4], off offset:144
	v_mul_lo_u32 v11, s10, v25
	v_mul_lo_u32 v14, v10, s8
	v_dual_mov_b32 v10, s1 :: v_dual_mov_b32 v9, s0
	s_clause 0x6
	scratch_store_b128 off, v[1:4], off offset:128
	scratch_store_b128 off, v[1:4], off offset:112
	scratch_store_b128 off, v[1:4], off offset:96
	scratch_store_b128 off, v[1:4], off offset:80
	scratch_store_b128 off, v[1:4], off offset:64
	scratch_store_b128 off, v[1:4], off offset:48
	scratch_store_b64 off, v[9:10], off offset:208
	v_add3_u32 v0, v11, v13, v0
	v_mul_lo_u32 v11, v13, 40
	v_mul_lo_u32 v13, v14, 40
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_lo_u32 v25, v0, 40
	ds_store_2addr_b64 v25, v[5:6], v[7:8] offset0:3 offset1:4
	ds_store_b128 v25, v[1:4] offset:16
	ds_store_b128 v25, v[1:4]
	v_add3_u32 v0, v13, v11, v12
	s_clause 0x4
	scratch_store_b128 off, v[1:4], off offset:32
	scratch_store_b128 off, v[1:4], off offset:16
	scratch_store_b64 off, v[9:10], off offset:256
	scratch_store_b128 off, v[1:4], off offset:240
	scratch_store_b128 off, v[1:4], off offset:224
.LBB0_74:                               ; %.preheader237.i21
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_75 Depth 2
	s_mov_b64 s[2:3], s[4:5]
	s_mov_b32 s1, 0
.LBB0_75:                               ;   Parent Loop BB0_74 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_load_b32 s8, s[2:3], 0x0
	v_add_nc_u32_e32 v2, s1, v0
	s_add_i32 s1, s1, 2
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s1, 10
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v1, 0x45800000, s8
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f32_e32 v1, v1
	ds_store_b16 v2, v1
	s_cbranch_scc1 .LBB0_75
; %bb.76:                               ;   in Loop: Header=BB0_74 Depth=1
	s_add_i32 s0, s0, 1
	v_add_nc_u32_e32 v0, 10, v0
	s_add_u32 s4, s4, 20
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s0, 4
	s_cbranch_scc1 .LBB0_74
; %bb.77:                               ; %.preheader235.i26.preheader
	s_mov_b32 s8, 16
	s_mov_b32 s9, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __const._Z10lstm_n5_o2PiPs.intW@rel32@lo+4
	s_addc_u32 s1, s1, __const._Z10lstm_n5_o2PiPs.intW@rel32@hi+12
.LBB0_78:                               ; %.preheader235.i26
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_79 Depth 2
                                        ;       Child Loop BB0_80 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b64 s[2:3], s[0:1]
	s_mov_b32 s10, s8
	s_mov_b32 s11, 0
.LBB0_79:                               ; %.preheader234.i28
                                        ;   Parent Loop BB0_78 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_80 Depth 3
	s_mov_b64 s[4:5], 0
	s_mov_b32 s14, s10
.LBB0_80:                               ;   Parent Loop BB0_78 Depth=1
                                        ;     Parent Loop BB0_79 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_u32 s16, s2, s4
	s_addc_u32 s17, s3, s5
	s_add_u32 s4, s4, 4
	s_load_b32 s15, s[16:17], 0x0
	s_addc_u32 s5, s5, 0
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v0, 0x45800000, s15
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f32_e32 v0, v0
	scratch_store_b16 off, v0, s14
	s_add_i32 s14, s14, 2
	s_cmp_lg_u32 s4, 20
	s_cbranch_scc1 .LBB0_80
; %bb.81:                               ;   in Loop: Header=BB0_79 Depth=2
	s_add_i32 s11, s11, 1
	s_add_i32 s10, s10, 10
	s_add_u32 s2, s2, 20
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s11, 5
	s_cbranch_scc1 .LBB0_79
; %bb.82:                               ;   in Loop: Header=BB0_78 Depth=1
	s_add_i32 s9, s9, 1
	s_add_i32 s8, s8, 50
	s_add_u32 s0, s0, 0x64
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s9, 4
	s_cbranch_scc1 .LBB0_78
; %bb.83:                               ; %.preheader232.i34.preheader
	v_mov_b32_e32 v0, 0xe0
	s_mov_b32 s4, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __const._Z10lstm_n5_o2PiPs.intB@rel32@lo+4
	s_addc_u32 s1, s1, __const._Z10lstm_n5_o2PiPs.intB@rel32@hi+12
.LBB0_84:                               ; %.preheader232.i34
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_85 Depth 2
	v_mov_b32_e32 v1, v0
	s_mov_b64 s[2:3], 0
.LBB0_85:                               ;   Parent Loop BB0_84 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s8, s0, s2
	s_addc_u32 s9, s1, s3
	s_add_u32 s2, s2, 4
	s_load_b32 s5, s[8:9], 0x0
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s2, 20
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v2, 0x45800000, s5
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f32_e32 v2, v2
	scratch_store_b16 v1, v2, off
	v_add_nc_u32_e32 v1, 2, v1
	s_cbranch_scc1 .LBB0_85
; %bb.86:                               ;   in Loop: Header=BB0_84 Depth=1
	s_add_i32 s4, s4, 1
	v_add_nc_u32_e32 v0, 10, v0
	s_add_u32 s0, s0, 20
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s4, 4
	s_cbranch_scc1 .LBB0_84
; %bb.87:                               ; %.preheader231.i39.preheader
	v_dual_mov_b32 v26, 0 :: v_dual_mov_b32 v27, 0
	v_dual_mov_b32 v0, 0x3f13993d :: v_dual_mov_b32 v31, 0
	s_mov_b64 s[4:5], 0
.LBB0_88:                               ; %.preheader231.i39
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s4, 1
	v_lshrrev_b32_e32 v2, 16, v31
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 2
	v_cndmask_b32_e32 v1, 0xbf17c8b0, v0, vcc_lo
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 3
	v_lshrrev_b32_e32 v3, 16, v27
	s_cselect_b32 s1, -1, 0
	v_cndmask_b32_e64 v1, v1, 0xbec62a1b, s0
	s_cmp_eq_u32 s4, 4
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s4, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v1, v1, 0x3c70b64c, s1
	s_cselect_b32 s3, -1, 0
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 5
	v_cndmask_b32_e64 v1, v1, 0xbeb396d1, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v1, 0x45800000, v1
	v_cvt_i32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v27, v1, s3
	v_cndmask_b32_e64 v5, v31, v1, s0
	v_cndmask_b32_e64 v2, v2, v1, s1
	v_cndmask_b32_e32 v3, v3, v1, vcc_lo
	v_cndmask_b32_e64 v26, v26, v1, s2
	v_and_b32_e32 v4, 0xffff, v4
	v_and_b32_e32 v5, 0xffff, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_or_b32 v27, v3, 16, v4
	v_lshl_or_b32 v31, v2, 16, v5
	s_cbranch_scc1 .LBB0_88
; %bb.89:                               ; %.preheader230.i43.preheader
	s_mov_b32 s8, 0
	s_movk_i32 s0, 0x64
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_mov_b32_e32 v4, s8
	v_dual_mov_b32 v7, s11 :: v_dual_add_nc_u32 v34, 20, v25
	v_dual_mov_b32 v5, s9 :: v_dual_add_nc_u32 v32, 10, v25
	v_mov_b32_e32 v6, s10
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v15, v7
	v_add_nc_u32_e64 v35, s0, 16
	s_movk_i32 s0, 0x96
	v_mov_b32_e32 v18, v7
	v_dual_mov_b32 v14, v6 :: v_dual_mov_b32 v11, v7
	v_dual_mov_b32 v16, v5 :: v_dual_mov_b32 v21, v7
	v_add_nc_u32_e64 v33, 16, 50
	v_dual_mov_b32 v1, v5 :: v_dual_add_nc_u32 v36, 30, v25
	v_add_nc_u32_e64 v37, s0, 16
	v_dual_mov_b32 v22, 0 :: v_dual_mov_b32 v3, v7
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v13, v5
	v_dual_mov_b32 v12, v4 :: v_dual_mov_b32 v9, v5
	v_dual_mov_b32 v10, v6 :: v_dual_mov_b32 v15, v4
	v_dual_mov_b32 v8, v4 :: v_dual_mov_b32 v17, v6
	v_dual_mov_b32 v20, v6 :: v_dual_mov_b32 v19, v5
	v_mov_b32_e32 v18, v4
.LBB0_90:                               ; %.preheader230.i43
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_91 Depth 2
                                        ;       Child Loop BB0_92 Depth 3
                                        ;     Child Loop BB0_101 Depth 2
                                        ;       Child Loop BB0_102 Depth 3
                                        ;     Child Loop BB0_111 Depth 2
                                        ;       Child Loop BB0_112 Depth 3
                                        ;     Child Loop BB0_121 Depth 2
                                        ;       Child Loop BB0_122 Depth 3
                                        ;     Child Loop BB0_131 Depth 2
                                        ;     Child Loop BB0_141 Depth 2
	s_lshl_b32 s0, s8, 2
	v_mov_b32_e32 v21, 16
	s_addk_i32 s0, 0x110
	s_mov_b32 s9, 0
	scratch_load_b32 v3, off, s0
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v3, v3, 16, 0xd4c00000
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 8, v3
	v_mul_hi_i32 v3, 0x45e7b273, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v7, 31, v3
	v_ashrrev_i32_e32 v11, 9, v3
	v_lshrrev_b32_e32 v3, 16, v4
	v_add_nc_u32_e32 v7, v11, v7
	v_lshrrev_b32_e32 v11, 16, v5
.LBB0_91:                               ;   Parent Loop BB0_90 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_92 Depth 3
	v_lshl_add_u32 v38, s9, 1, v25
	s_cmp_eq_u32 s9, 2
	v_lshrrev_b32_e32 v39, 16, v13
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 3
	ds_load_i16 v38, v38
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s9, 0
	v_lshrrev_b32_e32 v40, 16, v12
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s9, 1
	s_mov_b64 s[4:5], 0
	s_waitcnt lgkmcnt(0)
	v_mul_i32_i24_e32 v38, v7, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v38, 15, v38
	v_cndmask_b32_e32 v13, v13, v38, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e64 v39, v39, v38, s0
	v_cndmask_b32_e64 v41, v12, v38, s1
	v_cndmask_b32_e32 v40, v40, v38, vcc_lo
	s_cmp_eq_u32 s9, 4
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e32 v12, v14, v38, vcc_lo
	v_perm_b32 v14, v39, v13, 0x5040100
	v_perm_b32 v13, v40, v41, 0x5040100
	v_mov_b32_e32 v38, v21
.LBB0_92:                               ;   Parent Loop BB0_90 Depth=1
                                        ;     Parent Loop BB0_91 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	scratch_load_i16 v39, v38, off
	s_cmp_eq_u32 s4, 1
	v_lshrrev_b32_e32 v41, 16, v14
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 2
	v_cndmask_b32_e32 v42, v4, v3, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 3
	v_lshrrev_b32_e32 v40, 16, v13
	v_add_nc_u32_e32 v38, 2, v38
	v_cndmask_b32_e32 v42, v42, v5, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v42, v42, v11, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 1
	s_cselect_b32 s0, -1, 0
	v_cndmask_b32_e32 v42, v42, v6, vcc_lo
	v_cndmask_b32_e64 v43, v13, v40, s0
	s_cmp_eq_u32 s9, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfe_i32 v42, v42, 0, 16
	v_cndmask_b32_e64 v43, v43, v14, s1
	s_cmp_eq_u32 s9, 3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v43, v43, v41, vcc_lo
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s9, 0
	s_cselect_b32 s3, -1, 0
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 5
	s_waitcnt vmcnt(0)
	v_mul_i32_i24_e32 v39, v39, v42
	v_cndmask_b32_e64 v42, v43, v12, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v39, 12, v39
	v_add_nc_u16 v39, v42, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v41, v41, v39, vcc_lo
	v_cndmask_b32_e64 v14, v14, v39, s1
	v_cndmask_b32_e64 v13, v13, v39, s3
	v_cndmask_b32_e64 v40, v40, v39, s0
	v_cndmask_b32_e64 v12, v12, v39, s2
	v_perm_b32 v14, v41, v14, 0x5040100
	s_delay_alu instid0(VALU_DEP_3)
	v_perm_b32 v13, v40, v13, 0x5040100
	s_cbranch_scc1 .LBB0_92
; %bb.93:                               ;   in Loop: Header=BB0_91 Depth=2
	s_lshl_b32 s0, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_addk_i32 s0, 0xe0
	scratch_load_u16 v38, off, s0
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u16 v38, v38, v39
                                        ; implicit-def: $vgpr39
	v_ashrrev_i16 v38, 5, v38
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i16_e32 0, v38
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_97
; %bb.94:                               ;   in Loop: Header=BB0_91 Depth=2
	v_mov_b32_e32 v39, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_lt_u16_e32 0xfc00, v38
	s_cbranch_execz .LBB0_96
; %bb.95:                               ;   in Loop: Header=BB0_91 Depth=2
	v_sub_nc_u16 v39, 0, v38
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, lut_sigmoid@rel32@lo+4
	s_addc_u32 s3, s3, lut_sigmoid@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v39, 0xffff, v39
	v_lshlrev_b32_e32 v39, 1, v39
	global_load_u16 v39, v39, s[2:3]
	s_waitcnt vmcnt(0)
	v_sub_nc_u16 v39, 0x1000, v39
.LBB0_96:                               ; %Flow532
                                        ;   in Loop: Header=BB0_91 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_97:                               ; %Flow533
                                        ;   in Loop: Header=BB0_91 Depth=2
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB0_99
; %bb.98:                               ;   in Loop: Header=BB0_91 Depth=2
	v_and_b32_e32 v39, 0xffff, v38
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, lut_sigmoid@rel32@lo+4
	s_addc_u32 s3, s3, lut_sigmoid@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v39, 1, v39
	global_load_u16 v39, v39, s[2:3]
.LBB0_99:                               ;   in Loop: Header=BB0_91 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_cmp_eq_u32 s9, 1
	v_lshrrev_b32_e32 v40, 16, v13
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 3
	v_lshrrev_b32_e32 v41, 16, v14
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s9, 4
	v_dual_cndmask_b32 v40, v40, v38 :: v_dual_add_nc_u32 v21, 10, v21
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s9, 0
	v_cndmask_b32_e64 v41, v41, v38, s0
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s9, 2
	v_cndmask_b32_e64 v13, v13, v38, s2
	s_cselect_b32 s3, -1, 0
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v41, v41, v39, s0
	v_cndmask_b32_e64 v14, v14, v38, s3
	v_cndmask_b32_e32 v40, v40, v39, vcc_lo
	v_cndmask_b32_e64 v42, v13, v39, s2
	v_cndmask_b32_e64 v38, v12, v38, s1
	s_add_i32 s9, s9, 1
	v_cndmask_b32_e64 v14, v14, v39, s3
	s_cmp_lg_u32 s9, 5
	v_perm_b32 v12, v40, v42, 0x5040100
	s_delay_alu instid0(VALU_DEP_2)
	v_perm_b32 v13, v41, v14, 0x5040100
	v_cndmask_b32_e64 v14, v38, v39, s1
	s_cbranch_scc1 .LBB0_91
; %bb.100:                              ; %.preheader229.i59.preheader
                                        ;   in Loop: Header=BB0_90 Depth=1
	v_mov_b32_e32 v21, v33
	s_mov_b32 s9, 0
.LBB0_101:                              ; %.preheader229.i59
                                        ;   Parent Loop BB0_90 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_102 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_lshl_add_u32 v38, s9, 1, v32
	s_cmp_eq_u32 s9, 2
	v_lshrrev_b32_e32 v39, 16, v9
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 3
	ds_load_i16 v38, v38
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s9, 0
	v_lshrrev_b32_e32 v40, 16, v8
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s9, 1
	s_mov_b64 s[4:5], 0
	s_waitcnt lgkmcnt(0)
	v_mul_i32_i24_e32 v38, v7, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v38, 15, v38
	v_cndmask_b32_e32 v9, v9, v38, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e64 v39, v39, v38, s0
	v_cndmask_b32_e64 v41, v8, v38, s1
	v_cndmask_b32_e32 v40, v40, v38, vcc_lo
	s_cmp_eq_u32 s9, 4
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e32 v8, v10, v38, vcc_lo
	v_perm_b32 v10, v39, v9, 0x5040100
	v_perm_b32 v9, v40, v41, 0x5040100
	v_mov_b32_e32 v38, v21
.LBB0_102:                              ;   Parent Loop BB0_90 Depth=1
                                        ;     Parent Loop BB0_101 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	scratch_load_i16 v39, v38, off
	s_cmp_eq_u32 s4, 1
	v_lshrrev_b32_e32 v41, 16, v10
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 2
	v_cndmask_b32_e32 v42, v4, v3, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 3
	v_lshrrev_b32_e32 v40, 16, v9
	v_add_nc_u32_e32 v38, 2, v38
	v_cndmask_b32_e32 v42, v42, v5, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v42, v42, v11, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 1
	s_cselect_b32 s0, -1, 0
	v_cndmask_b32_e32 v42, v42, v6, vcc_lo
	v_cndmask_b32_e64 v43, v9, v40, s0
	s_cmp_eq_u32 s9, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfe_i32 v42, v42, 0, 16
	v_cndmask_b32_e64 v43, v43, v10, s1
	s_cmp_eq_u32 s9, 3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v43, v43, v41, vcc_lo
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s9, 0
	s_cselect_b32 s3, -1, 0
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 5
	s_waitcnt vmcnt(0)
	v_mul_i32_i24_e32 v39, v39, v42
	v_cndmask_b32_e64 v42, v43, v8, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v39, 12, v39
	v_add_nc_u16 v39, v42, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v41, v41, v39, vcc_lo
	v_cndmask_b32_e64 v10, v10, v39, s1
	v_cndmask_b32_e64 v9, v9, v39, s3
	v_cndmask_b32_e64 v40, v40, v39, s0
	v_cndmask_b32_e64 v8, v8, v39, s2
	v_perm_b32 v10, v41, v10, 0x5040100
	s_delay_alu instid0(VALU_DEP_3)
	v_perm_b32 v9, v40, v9, 0x5040100
	s_cbranch_scc1 .LBB0_102
; %bb.103:                              ;   in Loop: Header=BB0_101 Depth=2
	s_lshl_b32 s0, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v38, s0, v28
	s_mov_b32 s0, exec_lo
	scratch_load_u16 v38, v38, off
	s_waitcnt vmcnt(0)
	v_add_nc_u16 v38, v38, v39
                                        ; implicit-def: $vgpr39
	v_ashrrev_i16 v38, 5, v38
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i16_e32 0, v38
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_107
; %bb.104:                              ;   in Loop: Header=BB0_101 Depth=2
	v_mov_b32_e32 v39, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_lt_u16_e32 0xfc00, v38
	s_cbranch_execz .LBB0_106
; %bb.105:                              ;   in Loop: Header=BB0_101 Depth=2
	v_sub_nc_u16 v39, 0, v38
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, lut_sigmoid@rel32@lo+4
	s_addc_u32 s3, s3, lut_sigmoid@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v39, 0xffff, v39
	v_lshlrev_b32_e32 v39, 1, v39
	global_load_u16 v39, v39, s[2:3]
	s_waitcnt vmcnt(0)
	v_sub_nc_u16 v39, 0x1000, v39
.LBB0_106:                              ; %Flow530
                                        ;   in Loop: Header=BB0_101 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_107:                              ; %Flow531
                                        ;   in Loop: Header=BB0_101 Depth=2
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB0_109
; %bb.108:                              ;   in Loop: Header=BB0_101 Depth=2
	v_and_b32_e32 v39, 0xffff, v38
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, lut_sigmoid@rel32@lo+4
	s_addc_u32 s3, s3, lut_sigmoid@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v39, 1, v39
	global_load_u16 v39, v39, s[2:3]
.LBB0_109:                              ;   in Loop: Header=BB0_101 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_cmp_eq_u32 s9, 1
	v_lshrrev_b32_e32 v40, 16, v9
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 3
	v_lshrrev_b32_e32 v41, 16, v10
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s9, 4
	v_dual_cndmask_b32 v40, v40, v38 :: v_dual_add_nc_u32 v21, 10, v21
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s9, 0
	v_cndmask_b32_e64 v41, v41, v38, s0
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s9, 2
	v_cndmask_b32_e64 v9, v9, v38, s2
	s_cselect_b32 s3, -1, 0
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v41, v41, v39, s0
	v_cndmask_b32_e64 v10, v10, v38, s3
	v_cndmask_b32_e32 v40, v40, v39, vcc_lo
	v_cndmask_b32_e64 v42, v9, v39, s2
	v_cndmask_b32_e64 v38, v8, v38, s1
	s_add_i32 s9, s9, 1
	v_cndmask_b32_e64 v10, v10, v39, s3
	s_cmp_lg_u32 s9, 5
	v_perm_b32 v8, v40, v42, 0x5040100
	s_delay_alu instid0(VALU_DEP_2)
	v_perm_b32 v9, v41, v10, 0x5040100
	v_cndmask_b32_e64 v10, v38, v39, s1
	s_cbranch_scc1 .LBB0_101
; %bb.110:                              ; %.preheader228.i67.preheader
                                        ;   in Loop: Header=BB0_90 Depth=1
	v_mov_b32_e32 v21, v35
	s_mov_b32 s9, 0
.LBB0_111:                              ; %.preheader228.i67
                                        ;   Parent Loop BB0_90 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_112 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_lshl_add_u32 v38, s9, 1, v34
	s_cmp_eq_u32 s9, 2
	v_lshrrev_b32_e32 v39, 16, v16
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 3
	ds_load_i16 v38, v38
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s9, 0
	v_lshrrev_b32_e32 v40, 16, v15
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s9, 1
	s_mov_b64 s[4:5], 0
	s_waitcnt lgkmcnt(0)
	v_mul_i32_i24_e32 v38, v7, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v38, 15, v38
	v_cndmask_b32_e32 v16, v16, v38, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e64 v39, v39, v38, s0
	v_cndmask_b32_e64 v41, v15, v38, s1
	v_cndmask_b32_e32 v40, v40, v38, vcc_lo
	s_cmp_eq_u32 s9, 4
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e32 v15, v17, v38, vcc_lo
	v_perm_b32 v17, v39, v16, 0x5040100
	v_perm_b32 v16, v40, v41, 0x5040100
	v_mov_b32_e32 v38, v21
.LBB0_112:                              ;   Parent Loop BB0_90 Depth=1
                                        ;     Parent Loop BB0_111 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	scratch_load_i16 v39, v38, off
	s_cmp_eq_u32 s4, 1
	v_lshrrev_b32_e32 v41, 16, v17
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 2
	v_cndmask_b32_e32 v42, v4, v3, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 3
	v_lshrrev_b32_e32 v40, 16, v16
	v_add_nc_u32_e32 v38, 2, v38
	v_cndmask_b32_e32 v42, v42, v5, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v42, v42, v11, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 1
	s_cselect_b32 s0, -1, 0
	v_cndmask_b32_e32 v42, v42, v6, vcc_lo
	v_cndmask_b32_e64 v43, v16, v40, s0
	s_cmp_eq_u32 s9, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfe_i32 v42, v42, 0, 16
	v_cndmask_b32_e64 v43, v43, v17, s1
	s_cmp_eq_u32 s9, 3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v43, v43, v41, vcc_lo
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s9, 0
	s_cselect_b32 s3, -1, 0
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 5
	s_waitcnt vmcnt(0)
	v_mul_i32_i24_e32 v39, v39, v42
	v_cndmask_b32_e64 v42, v43, v15, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v39, 12, v39
	v_add_nc_u16 v39, v42, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v41, v41, v39, vcc_lo
	v_cndmask_b32_e64 v17, v17, v39, s1
	v_cndmask_b32_e64 v16, v16, v39, s3
	v_cndmask_b32_e64 v40, v40, v39, s0
	v_cndmask_b32_e64 v15, v15, v39, s2
	v_perm_b32 v17, v41, v17, 0x5040100
	s_delay_alu instid0(VALU_DEP_3)
	v_perm_b32 v16, v40, v16, 0x5040100
	s_cbranch_scc1 .LBB0_112
; %bb.113:                              ;   in Loop: Header=BB0_111 Depth=2
	s_lshl_b32 s0, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v38, s0, v29
	s_mov_b32 s0, exec_lo
	scratch_load_u16 v38, v38, off
	s_waitcnt vmcnt(0)
	v_add_nc_u16 v38, v38, v39
                                        ; implicit-def: $vgpr39
	v_ashrrev_i16 v38, 5, v38
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i16_e32 0, v38
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_117
; %bb.114:                              ;   in Loop: Header=BB0_111 Depth=2
	v_mov_b32_e32 v39, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_lt_u16_e32 0xfc00, v38
	s_cbranch_execz .LBB0_116
; %bb.115:                              ;   in Loop: Header=BB0_111 Depth=2
	v_sub_nc_u16 v39, 0, v38
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, lut_sigmoid@rel32@lo+4
	s_addc_u32 s3, s3, lut_sigmoid@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v39, 0xffff, v39
	v_lshlrev_b32_e32 v39, 1, v39
	global_load_u16 v39, v39, s[2:3]
	s_waitcnt vmcnt(0)
	v_sub_nc_u16 v39, 0x1000, v39
.LBB0_116:                              ; %Flow528
                                        ;   in Loop: Header=BB0_111 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_117:                              ; %Flow529
                                        ;   in Loop: Header=BB0_111 Depth=2
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB0_119
; %bb.118:                              ;   in Loop: Header=BB0_111 Depth=2
	v_and_b32_e32 v39, 0xffff, v38
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, lut_sigmoid@rel32@lo+4
	s_addc_u32 s3, s3, lut_sigmoid@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v39, 1, v39
	global_load_u16 v39, v39, s[2:3]
.LBB0_119:                              ;   in Loop: Header=BB0_111 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_cmp_eq_u32 s9, 1
	v_lshrrev_b32_e32 v40, 16, v16
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 3
	v_lshrrev_b32_e32 v41, 16, v17
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s9, 4
	v_dual_cndmask_b32 v40, v40, v38 :: v_dual_add_nc_u32 v21, 10, v21
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s9, 0
	v_cndmask_b32_e64 v41, v41, v38, s0
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s9, 2
	v_cndmask_b32_e64 v16, v16, v38, s2
	s_cselect_b32 s3, -1, 0
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v41, v41, v39, s0
	v_cndmask_b32_e64 v17, v17, v38, s3
	v_cndmask_b32_e32 v40, v40, v39, vcc_lo
	v_cndmask_b32_e64 v42, v16, v39, s2
	v_cndmask_b32_e64 v38, v15, v38, s1
	s_add_i32 s9, s9, 1
	v_cndmask_b32_e64 v17, v17, v39, s3
	s_cmp_lg_u32 s9, 5
	v_perm_b32 v15, v40, v42, 0x5040100
	s_delay_alu instid0(VALU_DEP_2)
	v_perm_b32 v16, v41, v17, 0x5040100
	v_cndmask_b32_e64 v17, v38, v39, s1
	s_cbranch_scc1 .LBB0_111
; %bb.120:                              ; %.preheader227.i75.preheader
                                        ;   in Loop: Header=BB0_90 Depth=1
	v_mov_b32_e32 v21, v37
	s_mov_b32 s9, 0
.LBB0_121:                              ; %.preheader227.i75
                                        ;   Parent Loop BB0_90 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_122 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_lshl_add_u32 v38, s9, 1, v36
	s_cmp_eq_u32 s9, 2
	v_lshrrev_b32_e32 v39, 16, v19
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 3
	ds_load_i16 v38, v38
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s9, 0
	v_lshrrev_b32_e32 v40, 16, v18
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s9, 1
	s_mov_b64 s[4:5], 0
	s_waitcnt lgkmcnt(0)
	v_mul_i32_i24_e32 v38, v7, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v38, 15, v38
	v_cndmask_b32_e32 v19, v19, v38, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e64 v39, v39, v38, s0
	v_cndmask_b32_e64 v41, v18, v38, s1
	v_cndmask_b32_e32 v40, v40, v38, vcc_lo
	s_cmp_eq_u32 s9, 4
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e32 v18, v20, v38, vcc_lo
	v_mov_b32_e32 v38, v21
	v_perm_b32 v20, v39, v19, 0x5040100
	v_perm_b32 v19, v40, v41, 0x5040100
.LBB0_122:                              ;   Parent Loop BB0_90 Depth=1
                                        ;     Parent Loop BB0_121 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	scratch_load_i16 v39, v38, off
	s_cmp_eq_u32 s4, 1
	v_lshrrev_b32_e32 v41, 16, v20
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 2
	v_cndmask_b32_e32 v42, v4, v3, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 3
	v_lshrrev_b32_e32 v40, 16, v19
	v_add_nc_u32_e32 v38, 2, v38
	v_cndmask_b32_e32 v42, v42, v5, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v42, v42, v11, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 1
	s_cselect_b32 s0, -1, 0
	v_cndmask_b32_e32 v42, v42, v6, vcc_lo
	v_cndmask_b32_e64 v43, v19, v40, s0
	s_cmp_eq_u32 s9, 2
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfe_i32 v42, v42, 0, 16
	v_cndmask_b32_e64 v43, v43, v20, s1
	s_cmp_eq_u32 s9, 3
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v43, v43, v41, vcc_lo
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s9, 0
	s_cselect_b32 s3, -1, 0
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 5
	s_waitcnt vmcnt(0)
	v_mul_i32_i24_e32 v39, v39, v42
	v_cndmask_b32_e64 v42, v43, v18, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v39, 12, v39
	v_add_nc_u16 v39, v42, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v41, v41, v39, vcc_lo
	v_cndmask_b32_e64 v20, v20, v39, s1
	v_cndmask_b32_e64 v19, v19, v39, s3
	v_cndmask_b32_e64 v40, v40, v39, s0
	v_cndmask_b32_e64 v18, v18, v39, s2
	v_perm_b32 v20, v41, v20, 0x5040100
	s_delay_alu instid0(VALU_DEP_3)
	v_perm_b32 v19, v40, v19, 0x5040100
	s_cbranch_scc1 .LBB0_122
; %bb.123:                              ;   in Loop: Header=BB0_121 Depth=2
	s_lshl_b32 s0, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v38, s0, v30
	s_mov_b32 s0, exec_lo
	scratch_load_u16 v38, v38, off
	s_waitcnt vmcnt(0)
	v_add_nc_u16 v38, v38, v39
                                        ; implicit-def: $vgpr39
	v_ashrrev_i16 v38, 5, v38
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i16_e32 0, v38
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_127
; %bb.124:                              ;   in Loop: Header=BB0_121 Depth=2
	v_mov_b32_e32 v39, 0xfffff000
	s_mov_b32 s1, exec_lo
	v_cmpx_lt_u16_e32 0xfc00, v38
	s_cbranch_execz .LBB0_126
; %bb.125:                              ;   in Loop: Header=BB0_121 Depth=2
	v_sub_nc_u16 v39, 0, v38
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, lut_tanh@rel32@lo+4
	s_addc_u32 s3, s3, lut_tanh@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v39, 0xffff, v39
	v_lshlrev_b32_e32 v39, 1, v39
	global_load_u16 v39, v39, s[2:3]
	s_waitcnt vmcnt(0)
	v_sub_nc_u16 v39, 0, v39
.LBB0_126:                              ; %Flow526
                                        ;   in Loop: Header=BB0_121 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_127:                              ; %Flow527
                                        ;   in Loop: Header=BB0_121 Depth=2
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB0_129
; %bb.128:                              ;   in Loop: Header=BB0_121 Depth=2
	v_and_b32_e32 v39, 0xffff, v38
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, lut_tanh@rel32@lo+4
	s_addc_u32 s3, s3, lut_tanh@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v39, 1, v39
	global_load_u16 v39, v39, s[2:3]
.LBB0_129:                              ;   in Loop: Header=BB0_121 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_cmp_eq_u32 s9, 1
	v_lshrrev_b32_e32 v40, 16, v19
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s9, 3
	v_lshrrev_b32_e32 v41, 16, v20
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s9, 4
	v_dual_cndmask_b32 v40, v40, v38 :: v_dual_add_nc_u32 v21, 10, v21
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s9, 0
	v_cndmask_b32_e64 v41, v41, v38, s0
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s9, 2
	v_cndmask_b32_e64 v19, v19, v38, s2
	s_cselect_b32 s3, -1, 0
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v41, v41, v39, s0
	v_cndmask_b32_e64 v20, v20, v38, s3
	v_cndmask_b32_e32 v40, v40, v39, vcc_lo
	v_cndmask_b32_e64 v42, v19, v39, s2
	v_cndmask_b32_e64 v38, v18, v38, s1
	s_add_i32 s9, s9, 1
	v_cndmask_b32_e64 v20, v20, v39, s3
	s_cmp_lg_u32 s9, 5
	v_perm_b32 v18, v40, v42, 0x5040100
	s_delay_alu instid0(VALU_DEP_2)
	v_perm_b32 v19, v41, v20, 0x5040100
	v_cndmask_b32_e64 v20, v38, v39, s1
	s_cbranch_scc1 .LBB0_121
; %bb.130:                              ; %.preheader.i83.preheader
                                        ;   in Loop: Header=BB0_90 Depth=1
	s_mov_b64 s[4:5], 0
.LBB0_131:                              ; %.preheader.i83
                                        ;   Parent Loop BB0_90 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_lshrrev_b32_e32 v11, 16, v18
	v_lshrrev_b32_e32 v38, 16, v12
	s_cmp_eq_u32 s4, 1
	v_lshrrev_b32_e32 v3, 16, v0
	s_cselect_b32 vcc_lo, -1, 0
	v_lshrrev_b32_e32 v7, 16, v8
	v_dual_cndmask_b32 v11, v18, v11 :: v_dual_cndmask_b32 v38, v12, v38
	s_cmp_eq_u32 s4, 2
	v_lshrrev_b32_e32 v42, 16, v13
	s_cselect_b32 s0, -1, 0
	v_cndmask_b32_e32 v39, v8, v7, vcc_lo
	v_cndmask_b32_e64 v38, v38, v13, s0
	v_cndmask_b32_e32 v21, v0, v3, vcc_lo
	s_cmp_eq_u32 s4, 3
	v_lshrrev_b32_e32 v7, 16, v1
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e64 v39, v39, v9, s0
	v_cndmask_b32_e32 v38, v38, v42, vcc_lo
	v_cndmask_b32_e64 v21, v21, v1, s0
	v_lshrrev_b32_e32 v40, 16, v9
	v_cndmask_b32_e64 v11, v11, v19, s0
	v_lshrrev_b32_e32 v41, 16, v19
	s_cmp_eq_u32 s4, 4
	v_cndmask_b32_e32 v21, v21, v7, vcc_lo
	v_cndmask_b32_e32 v39, v39, v40, vcc_lo
	s_mov_b32 s0, exec_lo
	v_cndmask_b32_e32 v11, v11, v41, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_cndmask_b32_e32 v21, v21, v2, vcc_lo
	v_cndmask_b32_e32 v39, v39, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v11, v11, v20 :: v_dual_cndmask_b32 v38, v38, v14
	v_bfe_i32 v21, v21, 0, 16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfe_i32 v39, v39, 0, 16
	v_bfe_i32 v11, v11, 0, 16
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfe_i32 v38, v38, 0, 16
	v_mul_i32_i24_e32 v21, v21, v39
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_i32_i24_e32 v11, v11, v38
	v_lshrrev_b32_e32 v21, 8, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v11, 12, v11
	v_dual_mov_b32 v11, 0x1000 :: v_dual_add_nc_u32 v38, v21, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfe_i32 v21, v38, 5, 15
	v_cmpx_gt_i32_e32 0x400, v21
	s_cbranch_execz .LBB0_139
; %bb.132:                              ;   in Loop: Header=BB0_131 Depth=2
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr11
	v_cmpx_gt_i32_e32 0, v21
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_136
; %bb.133:                              ;   in Loop: Header=BB0_131 Depth=2
	v_mov_b32_e32 v11, 0xfffff000
	s_mov_b32 s2, exec_lo
	v_cmpx_lt_u32_e32 0xfffffc00, v21
	s_cbranch_execz .LBB0_135
; %bb.134:                              ;   in Loop: Header=BB0_131 Depth=2
	v_sub_nc_u32_e32 v39, 0, v21
	v_mov_b32_e32 v40, v22
	s_getpc_b64 s[10:11]
	s_add_u32 s10, s10, lut_tanh@rel32@lo+4
	s_addc_u32 s11, s11, lut_tanh@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[39:40], 1, v[39:40]
	v_add_co_u32 v39, vcc_lo, v39, s10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v40, vcc_lo, s11, v40, vcc_lo
	global_load_u16 v11, v[39:40], off
	s_waitcnt vmcnt(0)
	v_sub_nc_u16 v11, 0, v11
.LBB0_135:                              ; %Flow523
                                        ;   in Loop: Header=BB0_131 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_136:                              ; %Flow524
                                        ;   in Loop: Header=BB0_131 Depth=2
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB0_138
; %bb.137:                              ;   in Loop: Header=BB0_131 Depth=2
	v_lshlrev_b64 v[39:40], 1, v[21:22]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, lut_tanh@rel32@lo+4
	s_addc_u32 s3, s3, lut_tanh@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v39, vcc_lo, v39, s2
	v_add_co_ci_u32_e32 v40, vcc_lo, s3, v40, vcc_lo
	global_load_u16 v11, v[39:40], off
.LBB0_138:                              ; %Flow525
                                        ;   in Loop: Header=BB0_131 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_139:                              ;   in Loop: Header=BB0_131 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	s_cmp_eq_u32 s4, 3
	v_lshrrev_b32_e32 v39, 16, v15
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s4, 2
	v_lshrrev_b32_e32 v40, 16, v16
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s4, 1
	v_lshrrev_b32_e32 v38, 4, v38
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s4, 0
	v_cndmask_b32_e64 v39, v15, v39, s1
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s4, 4
	s_waitcnt vmcnt(0)
	v_bfe_i32 v41, v11, 0, 16
	s_cselect_b32 s3, -1, 0
	v_cndmask_b32_e64 v39, v39, v16, s0
	v_lshrrev_b32_e32 v42, 16, v4
	v_cndmask_b32_e64 v3, v3, v38, s1
	v_cndmask_b32_e64 v1, v1, v38, s0
	v_cndmask_b32_e64 v2, v2, v38, s3
	v_cndmask_b32_e32 v39, v39, v40, vcc_lo
	v_lshrrev_b32_e32 v40, 16, v5
	v_cndmask_b32_e32 v7, v7, v38, vcc_lo
	v_cndmask_b32_e64 v5, v5, v21, s0
	v_cndmask_b32_e64 v0, v0, v38, s2
	v_cndmask_b32_e64 v39, v39, v17, s3
	v_cndmask_b32_e32 v40, v40, v21, vcc_lo
	v_cndmask_b32_e64 v4, v4, v21, s2
	v_cndmask_b32_e64 v5, v5, v11, s0
	v_cndmask_b32_e64 v6, v6, v21, s3
	v_bfe_i32 v39, v39, 0, 16
	v_perm_b32 v1, v7, v1, 0x5040100
	v_cndmask_b32_e64 v4, v4, v11, s2
	v_perm_b32 v0, v3, v0, 0x5040100
	v_cndmask_b32_e64 v6, v6, v11, s3
	v_mul_i32_i24_e32 v38, v41, v39
	v_cndmask_b32_e64 v39, v42, v21, s1
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 5
	v_lshrrev_b32_e32 v21, 12, v38
	v_cndmask_b32_e32 v38, v40, v11, vcc_lo
	v_cndmask_b32_e64 v39, v39, v11, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v5, v5, v21, s0
	v_cndmask_b32_e32 v11, v38, v21, vcc_lo
	v_cndmask_b32_e64 v4, v4, v21, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v38, v39, v21, s1
	v_cndmask_b32_e64 v6, v6, v21, s3
	v_perm_b32 v5, v11, v5, 0x5040100
	s_delay_alu instid0(VALU_DEP_3)
	v_perm_b32 v4, v38, v4, 0x5040100
	s_cbranch_scc1 .LBB0_131
; %bb.140:                              ; %.preheader224.preheader
                                        ;   in Loop: Header=BB0_90 Depth=1
	v_mov_b32_e32 v3, 0xffffffb2
	s_mov_b64 s[0:1], 0
.LBB0_141:                              ; %.preheader224
                                        ;   Parent Loop BB0_90 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_2)
	v_lshrrev_b32_e32 v7, 16, v4
	v_lshrrev_b32_e32 v11, 16, v27
	s_cmp_eq_u32 s0, 1
	v_lshrrev_b32_e32 v21, 16, v5
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 2
	v_cndmask_b32_e32 v7, v4, v7, vcc_lo
	v_cndmask_b32_e32 v11, v27, v11, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	v_lshrrev_b32_e32 v38, 16, v31
	s_cmp_eq_u32 s0, 3
	v_cndmask_b32_e32 v7, v7, v5, vcc_lo
	v_cndmask_b32_e32 v11, v11, v31, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_cmp_eq_u32 s0, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v7, v7, v21, vcc_lo
	v_cndmask_b32_e32 v11, v11, v38, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	v_cndmask_b32_e32 v7, v7, v6, vcc_lo
	v_cndmask_b32_e32 v11, v11, v26, vcc_lo
	s_cmp_lg_u32 s0, 5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfe_i32 v7, v7, 0, 16
	v_bfe_i32 v11, v11, 0, 16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_i32_i24_e32 v7, v7, v11
	v_lshrrev_b32_e32 v7, 12, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u16 v3, v3, v7
	s_cbranch_scc1 .LBB0_141
; %bb.142:                              ;   in Loop: Header=BB0_90 Depth=1
	s_lshl_b32 s0, s8, 1
	s_add_i32 s8, s8, 1
	s_addk_i32 s0, 0x3110
	s_cmpk_lg_i32 s8, 0x800
	scratch_store_b16 off, v3, s0
	s_cbranch_scc1 .LBB0_90
; %bb.143:                              ; %_Z10lstm_n5_o2PiPs.exit
	v_lshlrev_b64 v[2:3], 1, v[23:24]
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s12, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
.LBB0_144:                              ; =>This Inner Loop Header: Depth=1
	s_add_i32 s1, s0, 0x2110
	s_add_i32 s2, s0, 0x3110
	scratch_load_u16 v4, off, s1
	scratch_load_u16 v5, off, s2
	s_add_i32 s0, s0, 2
	s_waitcnt vmcnt(1)
	global_store_b16 v[0:1], v4, off
	s_waitcnt vmcnt(0)
	global_store_b16 v[2:3], v5, off
	v_add_co_u32 v0, vcc_lo, v0, 2
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, 2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_cmpk_lg_i32 s0, 0x1000
	s_cbranch_scc1 .LBB0_144
.LBB0_145:                              ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9lstm_taskiPiPsS0_
		.amdhsa_group_segment_fixed_size 40960
		.amdhsa_private_segment_fixed_size 16656
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 1
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 45
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9lstm_taskiPiPsS0_, .Lfunc_end0-_Z9lstm_taskiPiPsS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 11048
; NumSgprs: 22
; NumVgprs: 45
; ScratchSize: 16656
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 40960 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 45
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	lut_sigmoid             ; @lut_sigmoid
	.type	lut_sigmoid,@object
	.data
	.globl	lut_sigmoid
	.p2align	4, 0x0
lut_sigmoid:
	.short	2048                            ; 0x800
	.short	2056                            ; 0x808
	.short	2064                            ; 0x810
	.short	2072                            ; 0x818
	.short	2080                            ; 0x820
	.short	2088                            ; 0x828
	.short	2096                            ; 0x830
	.short	2104                            ; 0x838
	.short	2112                            ; 0x840
	.short	2120                            ; 0x848
	.short	2128                            ; 0x850
	.short	2136                            ; 0x858
	.short	2144                            ; 0x860
	.short	2152                            ; 0x868
	.short	2160                            ; 0x870
	.short	2168                            ; 0x878
	.short	2176                            ; 0x880
	.short	2184                            ; 0x888
	.short	2192                            ; 0x890
	.short	2200                            ; 0x898
	.short	2208                            ; 0x8a0
	.short	2216                            ; 0x8a8
	.short	2224                            ; 0x8b0
	.short	2232                            ; 0x8b8
	.short	2239                            ; 0x8bf
	.short	2247                            ; 0x8c7
	.short	2255                            ; 0x8cf
	.short	2263                            ; 0x8d7
	.short	2271                            ; 0x8df
	.short	2279                            ; 0x8e7
	.short	2287                            ; 0x8ef
	.short	2295                            ; 0x8f7
	.short	2303                            ; 0x8ff
	.short	2311                            ; 0x907
	.short	2318                            ; 0x90e
	.short	2326                            ; 0x916
	.short	2334                            ; 0x91e
	.short	2342                            ; 0x926
	.short	2350                            ; 0x92e
	.short	2358                            ; 0x936
	.short	2365                            ; 0x93d
	.short	2373                            ; 0x945
	.short	2381                            ; 0x94d
	.short	2389                            ; 0x955
	.short	2397                            ; 0x95d
	.short	2404                            ; 0x964
	.short	2412                            ; 0x96c
	.short	2420                            ; 0x974
	.short	2428                            ; 0x97c
	.short	2435                            ; 0x983
	.short	2443                            ; 0x98b
	.short	2451                            ; 0x993
	.short	2458                            ; 0x99a
	.short	2466                            ; 0x9a2
	.short	2474                            ; 0x9aa
	.short	2481                            ; 0x9b1
	.short	2489                            ; 0x9b9
	.short	2497                            ; 0x9c1
	.short	2504                            ; 0x9c8
	.short	2512                            ; 0x9d0
	.short	2519                            ; 0x9d7
	.short	2527                            ; 0x9df
	.short	2535                            ; 0x9e7
	.short	2542                            ; 0x9ee
	.short	2550                            ; 0x9f6
	.short	2557                            ; 0x9fd
	.short	2565                            ; 0xa05
	.short	2572                            ; 0xa0c
	.short	2580                            ; 0xa14
	.short	2587                            ; 0xa1b
	.short	2594                            ; 0xa22
	.short	2602                            ; 0xa2a
	.short	2609                            ; 0xa31
	.short	2617                            ; 0xa39
	.short	2624                            ; 0xa40
	.short	2631                            ; 0xa47
	.short	2639                            ; 0xa4f
	.short	2646                            ; 0xa56
	.short	2653                            ; 0xa5d
	.short	2661                            ; 0xa65
	.short	2668                            ; 0xa6c
	.short	2675                            ; 0xa73
	.short	2682                            ; 0xa7a
	.short	2690                            ; 0xa82
	.short	2697                            ; 0xa89
	.short	2704                            ; 0xa90
	.short	2711                            ; 0xa97
	.short	2718                            ; 0xa9e
	.short	2726                            ; 0xaa6
	.short	2733                            ; 0xaad
	.short	2740                            ; 0xab4
	.short	2747                            ; 0xabb
	.short	2754                            ; 0xac2
	.short	2761                            ; 0xac9
	.short	2768                            ; 0xad0
	.short	2775                            ; 0xad7
	.short	2782                            ; 0xade
	.short	2789                            ; 0xae5
	.short	2796                            ; 0xaec
	.short	2803                            ; 0xaf3
	.short	2810                            ; 0xafa
	.short	2817                            ; 0xb01
	.short	2823                            ; 0xb07
	.short	2830                            ; 0xb0e
	.short	2837                            ; 0xb15
	.short	2844                            ; 0xb1c
	.short	2851                            ; 0xb23
	.short	2857                            ; 0xb29
	.short	2864                            ; 0xb30
	.short	2871                            ; 0xb37
	.short	2878                            ; 0xb3e
	.short	2884                            ; 0xb44
	.short	2891                            ; 0xb4b
	.short	2898                            ; 0xb52
	.short	2904                            ; 0xb58
	.short	2911                            ; 0xb5f
	.short	2917                            ; 0xb65
	.short	2924                            ; 0xb6c
	.short	2930                            ; 0xb72
	.short	2937                            ; 0xb79
	.short	2943                            ; 0xb7f
	.short	2950                            ; 0xb86
	.short	2956                            ; 0xb8c
	.short	2963                            ; 0xb93
	.short	2969                            ; 0xb99
	.short	2975                            ; 0xb9f
	.short	2982                            ; 0xba6
	.short	2988                            ; 0xbac
	.short	2994                            ; 0xbb2
	.short	3001                            ; 0xbb9
	.short	3007                            ; 0xbbf
	.short	3013                            ; 0xbc5
	.short	3019                            ; 0xbcb
	.short	3026                            ; 0xbd2
	.short	3032                            ; 0xbd8
	.short	3038                            ; 0xbde
	.short	3044                            ; 0xbe4
	.short	3050                            ; 0xbea
	.short	3056                            ; 0xbf0
	.short	3062                            ; 0xbf6
	.short	3068                            ; 0xbfc
	.short	3074                            ; 0xc02
	.short	3080                            ; 0xc08
	.short	3086                            ; 0xc0e
	.short	3092                            ; 0xc14
	.short	3098                            ; 0xc1a
	.short	3104                            ; 0xc20
	.short	3110                            ; 0xc26
	.short	3116                            ; 0xc2c
	.short	3121                            ; 0xc31
	.short	3127                            ; 0xc37
	.short	3133                            ; 0xc3d
	.short	3139                            ; 0xc43
	.short	3144                            ; 0xc48
	.short	3150                            ; 0xc4e
	.short	3156                            ; 0xc54
	.short	3161                            ; 0xc59
	.short	3167                            ; 0xc5f
	.short	3173                            ; 0xc65
	.short	3178                            ; 0xc6a
	.short	3184                            ; 0xc70
	.short	3189                            ; 0xc75
	.short	3195                            ; 0xc7b
	.short	3200                            ; 0xc80
	.short	3206                            ; 0xc86
	.short	3211                            ; 0xc8b
	.short	3217                            ; 0xc91
	.short	3222                            ; 0xc96
	.short	3227                            ; 0xc9b
	.short	3233                            ; 0xca1
	.short	3238                            ; 0xca6
	.short	3243                            ; 0xcab
	.short	3249                            ; 0xcb1
	.short	3254                            ; 0xcb6
	.short	3259                            ; 0xcbb
	.short	3264                            ; 0xcc0
	.short	3269                            ; 0xcc5
	.short	3275                            ; 0xccb
	.short	3280                            ; 0xcd0
	.short	3285                            ; 0xcd5
	.short	3290                            ; 0xcda
	.short	3295                            ; 0xcdf
	.short	3300                            ; 0xce4
	.short	3305                            ; 0xce9
	.short	3310                            ; 0xcee
	.short	3315                            ; 0xcf3
	.short	3320                            ; 0xcf8
	.short	3325                            ; 0xcfd
	.short	3330                            ; 0xd02
	.short	3334                            ; 0xd06
	.short	3339                            ; 0xd0b
	.short	3344                            ; 0xd10
	.short	3349                            ; 0xd15
	.short	3354                            ; 0xd1a
	.short	3358                            ; 0xd1e
	.short	3363                            ; 0xd23
	.short	3368                            ; 0xd28
	.short	3372                            ; 0xd2c
	.short	3377                            ; 0xd31
	.short	3382                            ; 0xd36
	.short	3386                            ; 0xd3a
	.short	3391                            ; 0xd3f
	.short	3395                            ; 0xd43
	.short	3400                            ; 0xd48
	.short	3404                            ; 0xd4c
	.short	3409                            ; 0xd51
	.short	3413                            ; 0xd55
	.short	3418                            ; 0xd5a
	.short	3422                            ; 0xd5e
	.short	3427                            ; 0xd63
	.short	3431                            ; 0xd67
	.short	3435                            ; 0xd6b
	.short	3440                            ; 0xd70
	.short	3444                            ; 0xd74
	.short	3448                            ; 0xd78
	.short	3452                            ; 0xd7c
	.short	3457                            ; 0xd81
	.short	3461                            ; 0xd85
	.short	3465                            ; 0xd89
	.short	3469                            ; 0xd8d
	.short	3473                            ; 0xd91
	.short	3477                            ; 0xd95
	.short	3481                            ; 0xd99
	.short	3486                            ; 0xd9e
	.short	3490                            ; 0xda2
	.short	3494                            ; 0xda6
	.short	3498                            ; 0xdaa
	.short	3502                            ; 0xdae
	.short	3506                            ; 0xdb2
	.short	3510                            ; 0xdb6
	.short	3513                            ; 0xdb9
	.short	3517                            ; 0xdbd
	.short	3521                            ; 0xdc1
	.short	3525                            ; 0xdc5
	.short	3529                            ; 0xdc9
	.short	3533                            ; 0xdcd
	.short	3536                            ; 0xdd0
	.short	3540                            ; 0xdd4
	.short	3544                            ; 0xdd8
	.short	3548                            ; 0xddc
	.short	3551                            ; 0xddf
	.short	3555                            ; 0xde3
	.short	3559                            ; 0xde7
	.short	3562                            ; 0xdea
	.short	3566                            ; 0xdee
	.short	3570                            ; 0xdf2
	.short	3573                            ; 0xdf5
	.short	3577                            ; 0xdf9
	.short	3580                            ; 0xdfc
	.short	3584                            ; 0xe00
	.short	3587                            ; 0xe03
	.short	3591                            ; 0xe07
	.short	3594                            ; 0xe0a
	.short	3598                            ; 0xe0e
	.short	3601                            ; 0xe11
	.short	3604                            ; 0xe14
	.short	3608                            ; 0xe18
	.short	3611                            ; 0xe1b
	.short	3614                            ; 0xe1e
	.short	3618                            ; 0xe22
	.short	3621                            ; 0xe25
	.short	3624                            ; 0xe28
	.short	3628                            ; 0xe2c
	.short	3631                            ; 0xe2f
	.short	3634                            ; 0xe32
	.short	3637                            ; 0xe35
	.short	3640                            ; 0xe38
	.short	3644                            ; 0xe3c
	.short	3647                            ; 0xe3f
	.short	3650                            ; 0xe42
	.short	3653                            ; 0xe45
	.short	3656                            ; 0xe48
	.short	3659                            ; 0xe4b
	.short	3662                            ; 0xe4e
	.short	3665                            ; 0xe51
	.short	3668                            ; 0xe54
	.short	3671                            ; 0xe57
	.short	3674                            ; 0xe5a
	.short	3677                            ; 0xe5d
	.short	3680                            ; 0xe60
	.short	3683                            ; 0xe63
	.short	3686                            ; 0xe66
	.short	3689                            ; 0xe69
	.short	3691                            ; 0xe6b
	.short	3694                            ; 0xe6e
	.short	3697                            ; 0xe71
	.short	3700                            ; 0xe74
	.short	3703                            ; 0xe77
	.short	3705                            ; 0xe79
	.short	3708                            ; 0xe7c
	.short	3711                            ; 0xe7f
	.short	3714                            ; 0xe82
	.short	3716                            ; 0xe84
	.short	3719                            ; 0xe87
	.short	3722                            ; 0xe8a
	.short	3724                            ; 0xe8c
	.short	3727                            ; 0xe8f
	.short	3730                            ; 0xe92
	.short	3732                            ; 0xe94
	.short	3735                            ; 0xe97
	.short	3737                            ; 0xe99
	.short	3740                            ; 0xe9c
	.short	3742                            ; 0xe9e
	.short	3745                            ; 0xea1
	.short	3747                            ; 0xea3
	.short	3750                            ; 0xea6
	.short	3752                            ; 0xea8
	.short	3755                            ; 0xeab
	.short	3757                            ; 0xead
	.short	3760                            ; 0xeb0
	.short	3762                            ; 0xeb2
	.short	3764                            ; 0xeb4
	.short	3767                            ; 0xeb7
	.short	3769                            ; 0xeb9
	.short	3772                            ; 0xebc
	.short	3774                            ; 0xebe
	.short	3776                            ; 0xec0
	.short	3778                            ; 0xec2
	.short	3781                            ; 0xec5
	.short	3783                            ; 0xec7
	.short	3785                            ; 0xec9
	.short	3788                            ; 0xecc
	.short	3790                            ; 0xece
	.short	3792                            ; 0xed0
	.short	3794                            ; 0xed2
	.short	3796                            ; 0xed4
	.short	3798                            ; 0xed6
	.short	3801                            ; 0xed9
	.short	3803                            ; 0xedb
	.short	3805                            ; 0xedd
	.short	3807                            ; 0xedf
	.short	3809                            ; 0xee1
	.short	3811                            ; 0xee3
	.short	3813                            ; 0xee5
	.short	3815                            ; 0xee7
	.short	3817                            ; 0xee9
	.short	3819                            ; 0xeeb
	.short	3821                            ; 0xeed
	.short	3823                            ; 0xeef
	.short	3825                            ; 0xef1
	.short	3827                            ; 0xef3
	.short	3829                            ; 0xef5
	.short	3831                            ; 0xef7
	.short	3833                            ; 0xef9
	.short	3835                            ; 0xefb
	.short	3837                            ; 0xefd
	.short	3839                            ; 0xeff
	.short	3841                            ; 0xf01
	.short	3843                            ; 0xf03
	.short	3844                            ; 0xf04
	.short	3846                            ; 0xf06
	.short	3848                            ; 0xf08
	.short	3850                            ; 0xf0a
	.short	3852                            ; 0xf0c
	.short	3853                            ; 0xf0d
	.short	3855                            ; 0xf0f
	.short	3857                            ; 0xf11
	.short	3859                            ; 0xf13
	.short	3861                            ; 0xf15
	.short	3862                            ; 0xf16
	.short	3864                            ; 0xf18
	.short	3866                            ; 0xf1a
	.short	3867                            ; 0xf1b
	.short	3869                            ; 0xf1d
	.short	3871                            ; 0xf1f
	.short	3872                            ; 0xf20
	.short	3874                            ; 0xf22
	.short	3876                            ; 0xf24
	.short	3877                            ; 0xf25
	.short	3879                            ; 0xf27
	.short	3880                            ; 0xf28
	.short	3882                            ; 0xf2a
	.short	3884                            ; 0xf2c
	.short	3885                            ; 0xf2d
	.short	3887                            ; 0xf2f
	.short	3888                            ; 0xf30
	.short	3890                            ; 0xf32
	.short	3891                            ; 0xf33
	.short	3893                            ; 0xf35
	.short	3894                            ; 0xf36
	.short	3896                            ; 0xf38
	.short	3897                            ; 0xf39
	.short	3899                            ; 0xf3b
	.short	3900                            ; 0xf3c
	.short	3902                            ; 0xf3e
	.short	3903                            ; 0xf3f
	.short	3905                            ; 0xf41
	.short	3906                            ; 0xf42
	.short	3907                            ; 0xf43
	.short	3909                            ; 0xf45
	.short	3910                            ; 0xf46
	.short	3912                            ; 0xf48
	.short	3913                            ; 0xf49
	.short	3914                            ; 0xf4a
	.short	3916                            ; 0xf4c
	.short	3917                            ; 0xf4d
	.short	3918                            ; 0xf4e
	.short	3920                            ; 0xf50
	.short	3921                            ; 0xf51
	.short	3922                            ; 0xf52
	.short	3924                            ; 0xf54
	.short	3925                            ; 0xf55
	.short	3926                            ; 0xf56
	.short	3927                            ; 0xf57
	.short	3929                            ; 0xf59
	.short	3930                            ; 0xf5a
	.short	3931                            ; 0xf5b
	.short	3932                            ; 0xf5c
	.short	3934                            ; 0xf5e
	.short	3935                            ; 0xf5f
	.short	3936                            ; 0xf60
	.short	3937                            ; 0xf61
	.short	3938                            ; 0xf62
	.short	3940                            ; 0xf64
	.short	3941                            ; 0xf65
	.short	3942                            ; 0xf66
	.short	3943                            ; 0xf67
	.short	3944                            ; 0xf68
	.short	3945                            ; 0xf69
	.short	3947                            ; 0xf6b
	.short	3948                            ; 0xf6c
	.short	3949                            ; 0xf6d
	.short	3950                            ; 0xf6e
	.short	3951                            ; 0xf6f
	.short	3952                            ; 0xf70
	.short	3953                            ; 0xf71
	.short	3954                            ; 0xf72
	.short	3955                            ; 0xf73
	.short	3956                            ; 0xf74
	.short	3957                            ; 0xf75
	.short	3958                            ; 0xf76
	.short	3959                            ; 0xf77
	.short	3960                            ; 0xf78
	.short	3961                            ; 0xf79
	.short	3963                            ; 0xf7b
	.short	3964                            ; 0xf7c
	.short	3965                            ; 0xf7d
	.short	3966                            ; 0xf7e
	.short	3966                            ; 0xf7e
	.short	3967                            ; 0xf7f
	.short	3968                            ; 0xf80
	.short	3969                            ; 0xf81
	.short	3970                            ; 0xf82
	.short	3971                            ; 0xf83
	.short	3972                            ; 0xf84
	.short	3973                            ; 0xf85
	.short	3974                            ; 0xf86
	.short	3975                            ; 0xf87
	.short	3976                            ; 0xf88
	.short	3977                            ; 0xf89
	.short	3978                            ; 0xf8a
	.short	3979                            ; 0xf8b
	.short	3980                            ; 0xf8c
	.short	3980                            ; 0xf8c
	.short	3981                            ; 0xf8d
	.short	3982                            ; 0xf8e
	.short	3983                            ; 0xf8f
	.short	3984                            ; 0xf90
	.short	3985                            ; 0xf91
	.short	3986                            ; 0xf92
	.short	3986                            ; 0xf92
	.short	3987                            ; 0xf93
	.short	3988                            ; 0xf94
	.short	3989                            ; 0xf95
	.short	3990                            ; 0xf96
	.short	3990                            ; 0xf96
	.short	3991                            ; 0xf97
	.short	3992                            ; 0xf98
	.short	3993                            ; 0xf99
	.short	3994                            ; 0xf9a
	.short	3994                            ; 0xf9a
	.short	3995                            ; 0xf9b
	.short	3996                            ; 0xf9c
	.short	3997                            ; 0xf9d
	.short	3997                            ; 0xf9d
	.short	3998                            ; 0xf9e
	.short	3999                            ; 0xf9f
	.short	4000                            ; 0xfa0
	.short	4000                            ; 0xfa0
	.short	4001                            ; 0xfa1
	.short	4002                            ; 0xfa2
	.short	4003                            ; 0xfa3
	.short	4003                            ; 0xfa3
	.short	4004                            ; 0xfa4
	.short	4005                            ; 0xfa5
	.short	4005                            ; 0xfa5
	.short	4006                            ; 0xfa6
	.short	4007                            ; 0xfa7
	.short	4007                            ; 0xfa7
	.short	4008                            ; 0xfa8
	.short	4009                            ; 0xfa9
	.short	4009                            ; 0xfa9
	.short	4010                            ; 0xfaa
	.short	4011                            ; 0xfab
	.short	4011                            ; 0xfab
	.short	4012                            ; 0xfac
	.short	4013                            ; 0xfad
	.short	4013                            ; 0xfad
	.short	4014                            ; 0xfae
	.short	4015                            ; 0xfaf
	.short	4015                            ; 0xfaf
	.short	4016                            ; 0xfb0
	.short	4016                            ; 0xfb0
	.short	4017                            ; 0xfb1
	.short	4018                            ; 0xfb2
	.short	4018                            ; 0xfb2
	.short	4019                            ; 0xfb3
	.short	4019                            ; 0xfb3
	.short	4020                            ; 0xfb4
	.short	4021                            ; 0xfb5
	.short	4021                            ; 0xfb5
	.short	4022                            ; 0xfb6
	.short	4022                            ; 0xfb6
	.short	4023                            ; 0xfb7
	.short	4023                            ; 0xfb7
	.short	4024                            ; 0xfb8
	.short	4025                            ; 0xfb9
	.short	4025                            ; 0xfb9
	.short	4026                            ; 0xfba
	.short	4026                            ; 0xfba
	.short	4027                            ; 0xfbb
	.short	4027                            ; 0xfbb
	.short	4028                            ; 0xfbc
	.short	4028                            ; 0xfbc
	.short	4029                            ; 0xfbd
	.short	4029                            ; 0xfbd
	.short	4030                            ; 0xfbe
	.short	4030                            ; 0xfbe
	.short	4031                            ; 0xfbf
	.short	4031                            ; 0xfbf
	.short	4032                            ; 0xfc0
	.short	4032                            ; 0xfc0
	.short	4033                            ; 0xfc1
	.short	4033                            ; 0xfc1
	.short	4034                            ; 0xfc2
	.short	4034                            ; 0xfc2
	.short	4035                            ; 0xfc3
	.short	4035                            ; 0xfc3
	.short	4036                            ; 0xfc4
	.short	4036                            ; 0xfc4
	.short	4037                            ; 0xfc5
	.short	4037                            ; 0xfc5
	.short	4038                            ; 0xfc6
	.short	4038                            ; 0xfc6
	.short	4038                            ; 0xfc6
	.short	4039                            ; 0xfc7
	.short	4039                            ; 0xfc7
	.short	4040                            ; 0xfc8
	.short	4040                            ; 0xfc8
	.short	4041                            ; 0xfc9
	.short	4041                            ; 0xfc9
	.short	4041                            ; 0xfc9
	.short	4042                            ; 0xfca
	.short	4042                            ; 0xfca
	.short	4043                            ; 0xfcb
	.short	4043                            ; 0xfcb
	.short	4043                            ; 0xfcb
	.short	4044                            ; 0xfcc
	.short	4044                            ; 0xfcc
	.short	4045                            ; 0xfcd
	.short	4045                            ; 0xfcd
	.short	4045                            ; 0xfcd
	.short	4046                            ; 0xfce
	.short	4046                            ; 0xfce
	.short	4047                            ; 0xfcf
	.short	4047                            ; 0xfcf
	.short	4047                            ; 0xfcf
	.short	4048                            ; 0xfd0
	.short	4048                            ; 0xfd0
	.short	4048                            ; 0xfd0
	.short	4049                            ; 0xfd1
	.short	4049                            ; 0xfd1
	.short	4050                            ; 0xfd2
	.short	4050                            ; 0xfd2
	.short	4050                            ; 0xfd2
	.short	4051                            ; 0xfd3
	.short	4051                            ; 0xfd3
	.short	4051                            ; 0xfd3
	.short	4052                            ; 0xfd4
	.short	4052                            ; 0xfd4
	.short	4052                            ; 0xfd4
	.short	4053                            ; 0xfd5
	.short	4053                            ; 0xfd5
	.short	4053                            ; 0xfd5
	.short	4054                            ; 0xfd6
	.short	4054                            ; 0xfd6
	.short	4054                            ; 0xfd6
	.short	4055                            ; 0xfd7
	.short	4055                            ; 0xfd7
	.short	4055                            ; 0xfd7
	.short	4056                            ; 0xfd8
	.short	4056                            ; 0xfd8
	.short	4056                            ; 0xfd8
	.short	4057                            ; 0xfd9
	.short	4057                            ; 0xfd9
	.short	4057                            ; 0xfd9
	.short	4057                            ; 0xfd9
	.short	4058                            ; 0xfda
	.short	4058                            ; 0xfda
	.short	4058                            ; 0xfda
	.short	4059                            ; 0xfdb
	.short	4059                            ; 0xfdb
	.short	4059                            ; 0xfdb
	.short	4059                            ; 0xfdb
	.short	4060                            ; 0xfdc
	.short	4060                            ; 0xfdc
	.short	4060                            ; 0xfdc
	.short	4061                            ; 0xfdd
	.short	4061                            ; 0xfdd
	.short	4061                            ; 0xfdd
	.short	4061                            ; 0xfdd
	.short	4062                            ; 0xfde
	.short	4062                            ; 0xfde
	.short	4062                            ; 0xfde
	.short	4062                            ; 0xfde
	.short	4063                            ; 0xfdf
	.short	4063                            ; 0xfdf
	.short	4063                            ; 0xfdf
	.short	4063                            ; 0xfdf
	.short	4064                            ; 0xfe0
	.short	4064                            ; 0xfe0
	.short	4064                            ; 0xfe0
	.short	4064                            ; 0xfe0
	.short	4065                            ; 0xfe1
	.short	4065                            ; 0xfe1
	.short	4065                            ; 0xfe1
	.short	4065                            ; 0xfe1
	.short	4066                            ; 0xfe2
	.short	4066                            ; 0xfe2
	.short	4066                            ; 0xfe2
	.short	4066                            ; 0xfe2
	.short	4067                            ; 0xfe3
	.short	4067                            ; 0xfe3
	.short	4067                            ; 0xfe3
	.short	4067                            ; 0xfe3
	.short	4068                            ; 0xfe4
	.short	4068                            ; 0xfe4
	.short	4068                            ; 0xfe4
	.short	4068                            ; 0xfe4
	.short	4068                            ; 0xfe4
	.short	4069                            ; 0xfe5
	.short	4069                            ; 0xfe5
	.short	4069                            ; 0xfe5
	.short	4069                            ; 0xfe5
	.short	4069                            ; 0xfe5
	.short	4070                            ; 0xfe6
	.short	4070                            ; 0xfe6
	.short	4070                            ; 0xfe6
	.short	4070                            ; 0xfe6
	.short	4070                            ; 0xfe6
	.short	4071                            ; 0xfe7
	.short	4071                            ; 0xfe7
	.short	4071                            ; 0xfe7
	.short	4071                            ; 0xfe7
	.short	4071                            ; 0xfe7
	.short	4072                            ; 0xfe8
	.short	4072                            ; 0xfe8
	.short	4072                            ; 0xfe8
	.short	4072                            ; 0xfe8
	.short	4072                            ; 0xfe8
	.short	4073                            ; 0xfe9
	.short	4073                            ; 0xfe9
	.short	4073                            ; 0xfe9
	.short	4073                            ; 0xfe9
	.short	4073                            ; 0xfe9
	.short	4073                            ; 0xfe9
	.short	4074                            ; 0xfea
	.short	4074                            ; 0xfea
	.short	4074                            ; 0xfea
	.short	4074                            ; 0xfea
	.short	4074                            ; 0xfea
	.short	4074                            ; 0xfea
	.short	4075                            ; 0xfeb
	.short	4075                            ; 0xfeb
	.short	4075                            ; 0xfeb
	.short	4075                            ; 0xfeb
	.short	4075                            ; 0xfeb
	.short	4075                            ; 0xfeb
	.short	4076                            ; 0xfec
	.short	4076                            ; 0xfec
	.short	4076                            ; 0xfec
	.short	4076                            ; 0xfec
	.short	4076                            ; 0xfec
	.short	4076                            ; 0xfec
	.short	4077                            ; 0xfed
	.short	4077                            ; 0xfed
	.short	4077                            ; 0xfed
	.short	4077                            ; 0xfed
	.short	4077                            ; 0xfed
	.short	4077                            ; 0xfed
	.short	4077                            ; 0xfed
	.short	4078                            ; 0xfee
	.short	4078                            ; 0xfee
	.short	4078                            ; 0xfee
	.short	4078                            ; 0xfee
	.short	4078                            ; 0xfee
	.short	4078                            ; 0xfee
	.short	4078                            ; 0xfee
	.short	4079                            ; 0xfef
	.short	4079                            ; 0xfef
	.short	4079                            ; 0xfef
	.short	4079                            ; 0xfef
	.short	4079                            ; 0xfef
	.short	4079                            ; 0xfef
	.short	4079                            ; 0xfef
	.short	4079                            ; 0xfef
	.short	4080                            ; 0xff0
	.short	4080                            ; 0xff0
	.short	4080                            ; 0xff0
	.short	4080                            ; 0xff0
	.short	4080                            ; 0xff0
	.short	4080                            ; 0xff0
	.short	4080                            ; 0xff0
	.short	4080                            ; 0xff0
	.short	4081                            ; 0xff1
	.short	4081                            ; 0xff1
	.short	4081                            ; 0xff1
	.short	4081                            ; 0xff1
	.short	4081                            ; 0xff1
	.short	4081                            ; 0xff1
	.short	4081                            ; 0xff1
	.short	4081                            ; 0xff1
	.short	4082                            ; 0xff2
	.short	4082                            ; 0xff2
	.short	4082                            ; 0xff2
	.short	4082                            ; 0xff2
	.short	4082                            ; 0xff2
	.short	4082                            ; 0xff2
	.short	4082                            ; 0xff2
	.short	4082                            ; 0xff2
	.short	4082                            ; 0xff2
	.short	4082                            ; 0xff2
	.short	4083                            ; 0xff3
	.short	4083                            ; 0xff3
	.short	4083                            ; 0xff3
	.short	4083                            ; 0xff3
	.short	4083                            ; 0xff3
	.short	4083                            ; 0xff3
	.short	4083                            ; 0xff3
	.short	4083                            ; 0xff3
	.short	4083                            ; 0xff3
	.short	4084                            ; 0xff4
	.short	4084                            ; 0xff4
	.short	4084                            ; 0xff4
	.short	4084                            ; 0xff4
	.short	4084                            ; 0xff4
	.short	4084                            ; 0xff4
	.short	4084                            ; 0xff4
	.short	4084                            ; 0xff4
	.short	4084                            ; 0xff4
	.short	4084                            ; 0xff4
	.short	4084                            ; 0xff4
	.short	4085                            ; 0xff5
	.short	4085                            ; 0xff5
	.short	4085                            ; 0xff5
	.short	4085                            ; 0xff5
	.short	4085                            ; 0xff5
	.short	4085                            ; 0xff5
	.short	4085                            ; 0xff5
	.short	4085                            ; 0xff5
	.short	4085                            ; 0xff5
	.short	4085                            ; 0xff5
	.short	4085                            ; 0xff5
	.short	4085                            ; 0xff5
	.short	4086                            ; 0xff6
	.short	4086                            ; 0xff6
	.short	4086                            ; 0xff6
	.short	4086                            ; 0xff6
	.short	4086                            ; 0xff6
	.short	4086                            ; 0xff6
	.short	4086                            ; 0xff6
	.short	4086                            ; 0xff6
	.short	4086                            ; 0xff6
	.short	4086                            ; 0xff6
	.short	4086                            ; 0xff6
	.short	4086                            ; 0xff6
	.short	4086                            ; 0xff6
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.size	lut_sigmoid, 2048

	.protected	lut_tanh                ; @lut_tanh
	.type	lut_tanh,@object
	.globl	lut_tanh
	.p2align	4, 0x0
lut_tanh:
	.short	0                               ; 0x0
	.short	32                              ; 0x20
	.short	64                              ; 0x40
	.short	96                              ; 0x60
	.short	128                             ; 0x80
	.short	160                             ; 0xa0
	.short	192                             ; 0xc0
	.short	224                             ; 0xe0
	.short	256                             ; 0x100
	.short	288                             ; 0x120
	.short	319                             ; 0x13f
	.short	351                             ; 0x15f
	.short	383                             ; 0x17f
	.short	415                             ; 0x19f
	.short	446                             ; 0x1be
	.short	478                             ; 0x1de
	.short	509                             ; 0x1fd
	.short	541                             ; 0x21d
	.short	572                             ; 0x23c
	.short	604                             ; 0x25c
	.short	635                             ; 0x27b
	.short	666                             ; 0x29a
	.short	697                             ; 0x2b9
	.short	728                             ; 0x2d8
	.short	759                             ; 0x2f7
	.short	790                             ; 0x316
	.short	821                             ; 0x335
	.short	851                             ; 0x353
	.short	882                             ; 0x372
	.short	912                             ; 0x390
	.short	943                             ; 0x3af
	.short	973                             ; 0x3cd
	.short	1003                            ; 0x3eb
	.short	1033                            ; 0x409
	.short	1063                            ; 0x427
	.short	1093                            ; 0x445
	.short	1123                            ; 0x463
	.short	1152                            ; 0x480
	.short	1181                            ; 0x49d
	.short	1211                            ; 0x4bb
	.short	1240                            ; 0x4d8
	.short	1269                            ; 0x4f5
	.short	1298                            ; 0x512
	.short	1326                            ; 0x52e
	.short	1355                            ; 0x54b
	.short	1383                            ; 0x567
	.short	1412                            ; 0x584
	.short	1440                            ; 0x5a0
	.short	1468                            ; 0x5bc
	.short	1496                            ; 0x5d8
	.short	1523                            ; 0x5f3
	.short	1551                            ; 0x60f
	.short	1578                            ; 0x62a
	.short	1605                            ; 0x645
	.short	1632                            ; 0x660
	.short	1659                            ; 0x67b
	.short	1686                            ; 0x696
	.short	1712                            ; 0x6b0
	.short	1739                            ; 0x6cb
	.short	1765                            ; 0x6e5
	.short	1791                            ; 0x6ff
	.short	1817                            ; 0x719
	.short	1842                            ; 0x732
	.short	1868                            ; 0x74c
	.short	1893                            ; 0x765
	.short	1918                            ; 0x77e
	.short	1943                            ; 0x797
	.short	1968                            ; 0x7b0
	.short	1992                            ; 0x7c8
	.short	2016                            ; 0x7e0
	.short	2041                            ; 0x7f9
	.short	2064                            ; 0x810
	.short	2088                            ; 0x828
	.short	2112                            ; 0x840
	.short	2135                            ; 0x857
	.short	2158                            ; 0x86e
	.short	2181                            ; 0x885
	.short	2204                            ; 0x89c
	.short	2227                            ; 0x8b3
	.short	2249                            ; 0x8c9
	.short	2272                            ; 0x8e0
	.short	2294                            ; 0x8f6
	.short	2316                            ; 0x90c
	.short	2337                            ; 0x921
	.short	2359                            ; 0x937
	.short	2380                            ; 0x94c
	.short	2401                            ; 0x961
	.short	2422                            ; 0x976
	.short	2443                            ; 0x98b
	.short	2463                            ; 0x99f
	.short	2484                            ; 0x9b4
	.short	2504                            ; 0x9c8
	.short	2524                            ; 0x9dc
	.short	2543                            ; 0x9ef
	.short	2563                            ; 0xa03
	.short	2582                            ; 0xa16
	.short	2602                            ; 0xa2a
	.short	2621                            ; 0xa3d
	.short	2639                            ; 0xa4f
	.short	2658                            ; 0xa62
	.short	2676                            ; 0xa74
	.short	2695                            ; 0xa87
	.short	2713                            ; 0xa99
	.short	2731                            ; 0xaab
	.short	2748                            ; 0xabc
	.short	2766                            ; 0xace
	.short	2783                            ; 0xadf
	.short	2800                            ; 0xaf0
	.short	2817                            ; 0xb01
	.short	2834                            ; 0xb12
	.short	2851                            ; 0xb23
	.short	2867                            ; 0xb33
	.short	2883                            ; 0xb43
	.short	2899                            ; 0xb53
	.short	2915                            ; 0xb63
	.short	2931                            ; 0xb73
	.short	2946                            ; 0xb82
	.short	2962                            ; 0xb92
	.short	2977                            ; 0xba1
	.short	2992                            ; 0xbb0
	.short	3007                            ; 0xbbf
	.short	3021                            ; 0xbcd
	.short	3036                            ; 0xbdc
	.short	3050                            ; 0xbea
	.short	3064                            ; 0xbf8
	.short	3078                            ; 0xc06
	.short	3092                            ; 0xc14
	.short	3106                            ; 0xc22
	.short	3119                            ; 0xc2f
	.short	3133                            ; 0xc3d
	.short	3146                            ; 0xc4a
	.short	3159                            ; 0xc57
	.short	3172                            ; 0xc64
	.short	3185                            ; 0xc71
	.short	3197                            ; 0xc7d
	.short	3210                            ; 0xc8a
	.short	3222                            ; 0xc96
	.short	3234                            ; 0xca2
	.short	3246                            ; 0xcae
	.short	3258                            ; 0xcba
	.short	3270                            ; 0xcc6
	.short	3281                            ; 0xcd1
	.short	3293                            ; 0xcdd
	.short	3304                            ; 0xce8
	.short	3315                            ; 0xcf3
	.short	3326                            ; 0xcfe
	.short	3337                            ; 0xd09
	.short	3347                            ; 0xd13
	.short	3358                            ; 0xd1e
	.short	3368                            ; 0xd28
	.short	3379                            ; 0xd33
	.short	3389                            ; 0xd3d
	.short	3399                            ; 0xd47
	.short	3409                            ; 0xd51
	.short	3419                            ; 0xd5b
	.short	3428                            ; 0xd64
	.short	3438                            ; 0xd6e
	.short	3447                            ; 0xd77
	.short	3456                            ; 0xd80
	.short	3466                            ; 0xd8a
	.short	3475                            ; 0xd93
	.short	3483                            ; 0xd9b
	.short	3492                            ; 0xda4
	.short	3501                            ; 0xdad
	.short	3510                            ; 0xdb6
	.short	3518                            ; 0xdbe
	.short	3526                            ; 0xdc6
	.short	3535                            ; 0xdcf
	.short	3543                            ; 0xdd7
	.short	3551                            ; 0xddf
	.short	3559                            ; 0xde7
	.short	3566                            ; 0xdee
	.short	3574                            ; 0xdf6
	.short	3582                            ; 0xdfe
	.short	3589                            ; 0xe05
	.short	3596                            ; 0xe0c
	.short	3604                            ; 0xe14
	.short	3611                            ; 0xe1b
	.short	3618                            ; 0xe22
	.short	3625                            ; 0xe29
	.short	3632                            ; 0xe30
	.short	3639                            ; 0xe37
	.short	3645                            ; 0xe3d
	.short	3652                            ; 0xe44
	.short	3659                            ; 0xe4b
	.short	3665                            ; 0xe51
	.short	3671                            ; 0xe57
	.short	3678                            ; 0xe5e
	.short	3684                            ; 0xe64
	.short	3690                            ; 0xe6a
	.short	3696                            ; 0xe70
	.short	3702                            ; 0xe76
	.short	3707                            ; 0xe7b
	.short	3713                            ; 0xe81
	.short	3719                            ; 0xe87
	.short	3724                            ; 0xe8c
	.short	3730                            ; 0xe92
	.short	3735                            ; 0xe97
	.short	3741                            ; 0xe9d
	.short	3746                            ; 0xea2
	.short	3751                            ; 0xea7
	.short	3756                            ; 0xeac
	.short	3761                            ; 0xeb1
	.short	3766                            ; 0xeb6
	.short	3771                            ; 0xebb
	.short	3776                            ; 0xec0
	.short	3781                            ; 0xec5
	.short	3786                            ; 0xeca
	.short	3790                            ; 0xece
	.short	3795                            ; 0xed3
	.short	3799                            ; 0xed7
	.short	3804                            ; 0xedc
	.short	3808                            ; 0xee0
	.short	3812                            ; 0xee4
	.short	3817                            ; 0xee9
	.short	3821                            ; 0xeed
	.short	3825                            ; 0xef1
	.short	3829                            ; 0xef5
	.short	3833                            ; 0xef9
	.short	3837                            ; 0xefd
	.short	3841                            ; 0xf01
	.short	3845                            ; 0xf05
	.short	3848                            ; 0xf08
	.short	3852                            ; 0xf0c
	.short	3856                            ; 0xf10
	.short	3859                            ; 0xf13
	.short	3863                            ; 0xf17
	.short	3867                            ; 0xf1b
	.short	3870                            ; 0xf1e
	.short	3873                            ; 0xf21
	.short	3877                            ; 0xf25
	.short	3880                            ; 0xf28
	.short	3883                            ; 0xf2b
	.short	3887                            ; 0xf2f
	.short	3890                            ; 0xf32
	.short	3893                            ; 0xf35
	.short	3896                            ; 0xf38
	.short	3899                            ; 0xf3b
	.short	3902                            ; 0xf3e
	.short	3905                            ; 0xf41
	.short	3908                            ; 0xf44
	.short	3911                            ; 0xf47
	.short	3913                            ; 0xf49
	.short	3916                            ; 0xf4c
	.short	3919                            ; 0xf4f
	.short	3922                            ; 0xf52
	.short	3924                            ; 0xf54
	.short	3927                            ; 0xf57
	.short	3929                            ; 0xf59
	.short	3932                            ; 0xf5c
	.short	3934                            ; 0xf5e
	.short	3937                            ; 0xf61
	.short	3939                            ; 0xf63
	.short	3942                            ; 0xf66
	.short	3944                            ; 0xf68
	.short	3946                            ; 0xf6a
	.short	3949                            ; 0xf6d
	.short	3951                            ; 0xf6f
	.short	3953                            ; 0xf71
	.short	3955                            ; 0xf73
	.short	3957                            ; 0xf75
	.short	3960                            ; 0xf78
	.short	3962                            ; 0xf7a
	.short	3964                            ; 0xf7c
	.short	3966                            ; 0xf7e
	.short	3968                            ; 0xf80
	.short	3970                            ; 0xf82
	.short	3972                            ; 0xf84
	.short	3973                            ; 0xf85
	.short	3975                            ; 0xf87
	.short	3977                            ; 0xf89
	.short	3979                            ; 0xf8b
	.short	3981                            ; 0xf8d
	.short	3983                            ; 0xf8f
	.short	3984                            ; 0xf90
	.short	3986                            ; 0xf92
	.short	3988                            ; 0xf94
	.short	3989                            ; 0xf95
	.short	3991                            ; 0xf97
	.short	3993                            ; 0xf99
	.short	3994                            ; 0xf9a
	.short	3996                            ; 0xf9c
	.short	3997                            ; 0xf9d
	.short	3999                            ; 0xf9f
	.short	4000                            ; 0xfa0
	.short	4002                            ; 0xfa2
	.short	4003                            ; 0xfa3
	.short	4005                            ; 0xfa5
	.short	4006                            ; 0xfa6
	.short	4007                            ; 0xfa7
	.short	4009                            ; 0xfa9
	.short	4010                            ; 0xfaa
	.short	4011                            ; 0xfab
	.short	4013                            ; 0xfad
	.short	4014                            ; 0xfae
	.short	4015                            ; 0xfaf
	.short	4016                            ; 0xfb0
	.short	4018                            ; 0xfb2
	.short	4019                            ; 0xfb3
	.short	4020                            ; 0xfb4
	.short	4021                            ; 0xfb5
	.short	4022                            ; 0xfb6
	.short	4024                            ; 0xfb8
	.short	4025                            ; 0xfb9
	.short	4026                            ; 0xfba
	.short	4027                            ; 0xfbb
	.short	4028                            ; 0xfbc
	.short	4029                            ; 0xfbd
	.short	4030                            ; 0xfbe
	.short	4031                            ; 0xfbf
	.short	4032                            ; 0xfc0
	.short	4033                            ; 0xfc1
	.short	4034                            ; 0xfc2
	.short	4035                            ; 0xfc3
	.short	4036                            ; 0xfc4
	.short	4037                            ; 0xfc5
	.short	4038                            ; 0xfc6
	.short	4039                            ; 0xfc7
	.short	4039                            ; 0xfc7
	.short	4040                            ; 0xfc8
	.short	4041                            ; 0xfc9
	.short	4042                            ; 0xfca
	.short	4043                            ; 0xfcb
	.short	4044                            ; 0xfcc
	.short	4044                            ; 0xfcc
	.short	4045                            ; 0xfcd
	.short	4046                            ; 0xfce
	.short	4047                            ; 0xfcf
	.short	4048                            ; 0xfd0
	.short	4048                            ; 0xfd0
	.short	4049                            ; 0xfd1
	.short	4050                            ; 0xfd2
	.short	4050                            ; 0xfd2
	.short	4051                            ; 0xfd3
	.short	4052                            ; 0xfd4
	.short	4053                            ; 0xfd5
	.short	4053                            ; 0xfd5
	.short	4054                            ; 0xfd6
	.short	4055                            ; 0xfd7
	.short	4055                            ; 0xfd7
	.short	4056                            ; 0xfd8
	.short	4056                            ; 0xfd8
	.short	4057                            ; 0xfd9
	.short	4058                            ; 0xfda
	.short	4058                            ; 0xfda
	.short	4059                            ; 0xfdb
	.short	4059                            ; 0xfdb
	.short	4060                            ; 0xfdc
	.short	4061                            ; 0xfdd
	.short	4061                            ; 0xfdd
	.short	4062                            ; 0xfde
	.short	4062                            ; 0xfde
	.short	4063                            ; 0xfdf
	.short	4063                            ; 0xfdf
	.short	4064                            ; 0xfe0
	.short	4064                            ; 0xfe0
	.short	4065                            ; 0xfe1
	.short	4065                            ; 0xfe1
	.short	4066                            ; 0xfe2
	.short	4066                            ; 0xfe2
	.short	4067                            ; 0xfe3
	.short	4067                            ; 0xfe3
	.short	4067                            ; 0xfe3
	.short	4068                            ; 0xfe4
	.short	4068                            ; 0xfe4
	.short	4069                            ; 0xfe5
	.short	4069                            ; 0xfe5
	.short	4070                            ; 0xfe6
	.short	4070                            ; 0xfe6
	.short	4070                            ; 0xfe6
	.short	4071                            ; 0xfe7
	.short	4071                            ; 0xfe7
	.short	4072                            ; 0xfe8
	.short	4072                            ; 0xfe8
	.short	4072                            ; 0xfe8
	.short	4073                            ; 0xfe9
	.short	4073                            ; 0xfe9
	.short	4073                            ; 0xfe9
	.short	4074                            ; 0xfea
	.short	4074                            ; 0xfea
	.short	4074                            ; 0xfea
	.short	4075                            ; 0xfeb
	.short	4075                            ; 0xfeb
	.short	4075                            ; 0xfeb
	.short	4076                            ; 0xfec
	.short	4076                            ; 0xfec
	.short	4076                            ; 0xfec
	.short	4077                            ; 0xfed
	.short	4077                            ; 0xfed
	.short	4077                            ; 0xfed
	.short	4078                            ; 0xfee
	.short	4078                            ; 0xfee
	.short	4078                            ; 0xfee
	.short	4078                            ; 0xfee
	.short	4079                            ; 0xfef
	.short	4079                            ; 0xfef
	.short	4079                            ; 0xfef
	.short	4079                            ; 0xfef
	.short	4080                            ; 0xff0
	.short	4080                            ; 0xff0
	.short	4080                            ; 0xff0
	.short	4080                            ; 0xff0
	.short	4081                            ; 0xff1
	.short	4081                            ; 0xff1
	.short	4081                            ; 0xff1
	.short	4081                            ; 0xff1
	.short	4082                            ; 0xff2
	.short	4082                            ; 0xff2
	.short	4082                            ; 0xff2
	.short	4082                            ; 0xff2
	.short	4082                            ; 0xff2
	.short	4083                            ; 0xff3
	.short	4083                            ; 0xff3
	.short	4083                            ; 0xff3
	.short	4083                            ; 0xff3
	.short	4084                            ; 0xff4
	.short	4084                            ; 0xff4
	.short	4084                            ; 0xff4
	.short	4084                            ; 0xff4
	.short	4084                            ; 0xff4
	.short	4084                            ; 0xff4
	.short	4085                            ; 0xff5
	.short	4085                            ; 0xff5
	.short	4085                            ; 0xff5
	.short	4085                            ; 0xff5
	.short	4085                            ; 0xff5
	.short	4085                            ; 0xff5
	.short	4086                            ; 0xff6
	.short	4086                            ; 0xff6
	.short	4086                            ; 0xff6
	.short	4086                            ; 0xff6
	.short	4086                            ; 0xff6
	.short	4086                            ; 0xff6
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4087                            ; 0xff7
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4088                            ; 0xff8
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4089                            ; 0xff9
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4090                            ; 0xffa
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4091                            ; 0xffb
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4092                            ; 0xffc
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4093                            ; 0xffd
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4094                            ; 0xffe
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4095                            ; 0xfff
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.short	4096                            ; 0x1000
	.size	lut_tanh, 2048

	.type	__const._Z10lstm_n5_o1PiPs.inW,@object ; @__const._Z10lstm_n5_o1PiPs.inW
	.section	.rodata,"a",@progbits
	.p2align	4, 0x0
__const._Z10lstm_n5_o1PiPs.inW:
	.long	0xbc13dd78                      ; float -0.00902497023
	.long	0x3c558f7f                      ; float 0.0130347004
	.long	0xbe9c7821                      ; float -0.305604011
	.long	0x3c28f989                      ; float 0.0103134001
	.long	0xbabba8e3                      ; float -0.00143172999
	.long	0xbc122983                      ; float -0.00892102998
	.long	0xbc0fb824                      ; float -0.00877192988
	.long	0xbc82381e                      ; float -0.0158958994
	.long	0xbb2bb276                      ; float -0.00261989003
	.long	0x3b1c13f2                      ; float 0.00238155993
	.long	0xbf95f6a9                      ; float -1.17158997
	.long	0xbf878961                      ; float -1.05887997
	.long	0xbccee64d                      ; float -0.0252563003
	.long	0x3fa96430                      ; float 1.32336998
	.long	0x3f65611c                      ; float 0.896013021
	.long	0x3de70004                      ; float 0.112792999
	.long	0x3ddbeb18                      ; float 0.107381999
	.long	0x3eeb4b94                      ; float 0.45956099
	.long	0x3de71716                      ; float 0.112837002
	.long	0xbdafe917                      ; float -0.0858938023
	.size	__const._Z10lstm_n5_o1PiPs.inW, 80

	.type	__const._Z10lstm_n5_o1PiPs.intW,@object ; @__const._Z10lstm_n5_o1PiPs.intW
	.p2align	4, 0x0
__const._Z10lstm_n5_o1PiPs.intW:
	.long	0x3c70068e                      ; float 0.0146500003
	.long	0x3c928390                      ; float 0.0178849995
	.long	0x3b9797a1                      ; float 0.00462622987
	.long	0xbb6ff1c0                      ; float -0.00366126001
	.long	0x3b87d9be                      ; float 0.00414582994
	.long	0x3be85c1f                      ; float 0.00709105982
	.long	0x3bc8a58b                      ; float 0.00612324988
	.long	0x3ba6cb86                      ; float 0.00509017985
	.long	0x3bce2c89                      ; float 0.0062919301
	.long	0xbc06651f                      ; float -0.00820282008
	.long	0x3d73ac1a                      ; float 0.0594903007
	.long	0x3d7391c8                      ; float 0.0594651997
	.long	0x3db40a79                      ; float 0.0879106
	.long	0xbe4fd6d8                      ; float -0.202968001
	.long	0x3e162ed3                      ; float 0.146662995
	.long	0x3c8df084                      ; float 0.0173266008
	.long	0xbb2938f4                      ; float -0.00258213002
	.long	0xbaccdeeb                      ; float -0.00156303996
	.long	0xbc848bb6                      ; float -0.0161799006
	.long	0x3ca8de7b                      ; float 0.0206138995
	.long	0x3b77fb7a                      ; float 0.00378391007
	.long	0x3c9bce27                      ; float 0.0190191995
	.long	0x3c65a93d                      ; float 0.0140174003
	.long	0x3c969aac                      ; float 0.0183843002
	.long	0xb9de129a                      ; float -4.23569989E-4
	.long	0xbbecb74e                      ; float -0.00722400006
	.long	0xb7d3ec86                      ; float -2.52632999E-5
	.long	0xbb762b96                      ; float -0.00375626003
	.long	0x3c8cc10e                      ; float 0.0171818994
	.long	0xbc709310                      ; float -0.0146834999
	.long	0x3c1c6d1e                      ; float 0.00954749993
	.long	0x3c36a833                      ; float 0.0111485003
	.long	0x3becfb00                      ; float 0.00723206996
	.long	0xbb3720e9                      ; float -0.00279432
	.long	0xbaab5e68                      ; float -0.00130743999
	.long	0xbb6b3ba3                      ; float -0.00358937006
	.long	0xbcad065e                      ; float -0.0211212002
	.long	0xbd3680ab                      ; float -0.0445563011
	.long	0xbca6ad7e                      ; float -0.0203463994
	.long	0x3c4af775                      ; float 0.0123880999
	.long	0xbbd46c53                      ; float -0.00648263982
	.long	0xbc09ebe7                      ; float -0.00841805991
	.long	0x3a92d153                      ; float 0.00112012995
	.long	0x3b8e91be                      ; float 0.00435086992
	.long	0xbc62859c                      ; float -0.0138258003
	.long	0x3baeda9e                      ; float 0.00533611979
	.long	0xbc14f1ea                      ; float -0.00909087993
	.long	0x3c015d2d                      ; float 0.00789574999
	.long	0x3a996a1f                      ; float 0.00117046002
	.long	0x3c08bc3c                      ; float 0.00834565982
	.long	0x3f3f6a94                      ; float 0.747720003
	.long	0x3f22b8e9                      ; float 0.635634005
	.long	0x3f3b04bc                      ; float 0.730540991
	.long	0xbf8ea305                      ; float -1.11434996
	.long	0x3f50626f                      ; float 0.814001977
	.long	0x3f1fa4c6                      ; float 0.623607993
	.long	0x3f07c30d                      ; float 0.530319989
	.long	0x3f272a7c                      ; float 0.65299201
	.long	0xbf81debe                      ; float -1.01461005
	.long	0x3f44b0d1                      ; float 0.768323004
	.long	0x3df5ebfb                      ; float 0.120079003
	.long	0x3de82d7b                      ; float 0.113367997
	.long	0x3da8c203                      ; float 0.0824012979
	.long	0xb9a19761                      ; float -3.08210991E-4
	.long	0xbc953a24                      ; float -0.0182162002
	.long	0xbfa42de0                      ; float -1.28264999
	.long	0xbf97328b                      ; float -1.18122995
	.long	0xbef5de7a                      ; float -0.480212986
	.long	0x3f7bfae3                      ; float 0.984296977
	.long	0xbf137bc0                      ; float -0.576107025
	.long	0xbf8105d1                      ; float -1.00799
	.long	0xbf71afd1                      ; float -0.944088995
	.long	0xbeb624ff                      ; float -0.355751008
	.long	0x3f093c79                      ; float 0.53607899
	.long	0xbe8df117                      ; float -0.277229995
	.long	0x3c5cd91f                      ; float 0.0134795001
	.long	0x3d371bc0                      ; float 0.0447041988
	.long	0x3c7733a9                      ; float 0.0150880003
	.long	0x3dbc7e28                      ; float 0.0920374989
	.long	0xbd9f34d7                      ; float -0.0777375027
	.long	0x3d1d86df                      ; float 0.0384587012
	.long	0x3d073274                      ; float 0.0330071002
	.long	0x3ca881ff                      ; float 0.0205697995
	.long	0x3dafd510                      ; float 0.0858556032
	.long	0xbd89812b                      ; float -0.0671408996
	.long	0xbf239d5e                      ; float -0.639119983
	.long	0xbf121922                      ; float -0.570695996
	.long	0xbdb6a551                      ; float -0.0891825035
	.long	0x3f34ea29                      ; float 0.706698
	.long	0xbf000000                      ; float -0.5
	.long	0x3c8dad32                      ; float 0.0172945
	.long	0x3cc53346                      ; float 0.0240723006
	.long	0x3ac42488                      ; float 0.00149645004
	.long	0x3d0c01b1                      ; float 0.0341813006
	.long	0xbd2b36cb                      ; float -0.0418003015
	.long	0xbc493f0e                      ; float -0.0122830998
	.long	0xbce5ddaa                      ; float -0.0280597992
	.long	0xbb5fa4c1                      ; float -0.00341253006
	.long	0xbcd9b513                      ; float -0.0265756007
	.long	0x3cca3726                      ; float 0.0246844999
	.size	__const._Z10lstm_n5_o1PiPs.intW, 400

	.type	__const._Z10lstm_n5_o1PiPs.intB,@object ; @__const._Z10lstm_n5_o1PiPs.intB
	.p2align	4, 0x0
__const._Z10lstm_n5_o1PiPs.intB:
	.long	0x3c83126f                      ; float 0.0160000008
	.long	0x3c64efd9                      ; float 0.0139731998
	.long	0xbe3c4dec                      ; float -0.183890998
	.long	0x3c64c6bf                      ; float 0.0139634004
	.long	0x3c0d9ea4                      ; float 0.0086437799
	.long	0x40a007b3                      ; float 5.00093985
	.long	0x40a004d5                      ; float 5.00058985
	.long	0x409f0c20                      ; float 4.9702301
	.long	0x40a001a3                      ; float 5.00019979
	.long	0x40a0029f                      ; float 5.00031996
	.long	0x3d8a8e56                      ; float 0.0676542968
	.long	0xbd36a37b                      ; float -0.0445895009
	.long	0x3e7ef88c                      ; float 0.248995006
	.long	0xbf7a938e                      ; float -0.978814005
	.long	0xbf834d6a                      ; float -1.02579999
	.long	0x3e514f48                      ; float 0.204403996
	.long	0x3e42acfb                      ; float 0.190112993
	.long	0xbe1ff36b                      ; float -0.156202003
	.long	0x3e60b674                      ; float 0.219446003
	.long	0xbe37d5aa                      ; float -0.179526001
	.size	__const._Z10lstm_n5_o1PiPs.intB, 80

	.type	__const._Z10lstm_n5_o2PiPs.inW,@object ; @__const._Z10lstm_n5_o2PiPs.inW
	.p2align	4, 0x0
__const._Z10lstm_n5_o2PiPs.inW:
	.long	0xbe091eeb                      ; float -0.133907005
	.long	0x3dc6348a                      ; float 0.0967798978
	.long	0xbcccae9a                      ; float -0.0249856003
	.long	0xbd456f0a                      ; float -0.0482015982
	.long	0x39116611                      ; float 1.38663003E-4
	.long	0xbb293873                      ; float -0.00258209999
	.long	0xbc2f6e17                      ; float -0.0107073998
	.long	0xbc5e35ab                      ; float -0.0135626001
	.long	0xbcd997b6                      ; float -0.0265615992
	.long	0xbc2247d3                      ; float -0.00990481954
	.long	0x3ce4adca                      ; float 0.0279149003
	.long	0x3e995033                      ; float 0.299439996
	.long	0x3b70f49f                      ; float 0.00367668993
	.long	0xbd2673d2                      ; float -0.0406377986
	.long	0xbdfa12b6                      ; float -0.122106001
	.long	0x3e9ca3c6                      ; float 0.305936992
	.long	0xbfc65b42                      ; float -1.54965997
	.long	0x3dde4b45                      ; float 0.108542003
	.long	0xbdb0531a                      ; float -0.0860960037
	.long	0xbe8eae5c                      ; float -0.278674006
	.size	__const._Z10lstm_n5_o2PiPs.inW, 80

	.type	__const._Z10lstm_n5_o2PiPs.intW,@object ; @__const._Z10lstm_n5_o2PiPs.intW
	.p2align	4, 0x0
__const._Z10lstm_n5_o2PiPs.intW:
	.long	0x3d3eb598                      ; float 0.0465599
	.long	0xbda0aee7                      ; float -0.0784585997
	.long	0x3d902123                      ; float 0.0703757033
	.long	0xbdc4ea73                      ; float -0.0961503013
	.long	0x3dd4c1a9                      ; float 0.103885002
	.long	0x3e0d25ab                      ; float 0.137839004
	.long	0x3da0e073                      ; float 0.0785531029
	.long	0x3e3074eb                      ; float 0.172321007
	.long	0x3b0269fd                      ; float 0.00198995997
	.long	0x3debe059                      ; float 0.115174003
	.long	0x3db79cd5                      ; float 0.0896546021
	.long	0xbb07d8d2                      ; float -0.00207286002
	.long	0x3ce5e85c                      ; float 0.0280648991
	.long	0x3cf675a8                      ; float 0.0300853997
	.long	0x3d611920                      ; float 0.0549556017
	.long	0x3dc2feb8                      ; float 0.0952123999
	.long	0x3c4286f9                      ; float 0.0118730003
	.long	0x3ccf4e52                      ; float 0.0253059007
	.long	0xbbcb1364                      ; float -0.0061973799
	.long	0x3dcd4fdf                      ; float 0.100249998
	.long	0xbda320bf                      ; float -0.0796523019
	.long	0xbcfe567d                      ; float -0.0310471002
	.long	0x3d09dafb                      ; float 0.0336561017
	.long	0xbdccc4ba                      ; float -0.0999846011
	.long	0xbc1ad3cc                      ; float -0.00944991037
	.long	0xbbb6e418                      ; float -0.00558139011
	.long	0xbccc6a72                      ; float -0.0249531008
	.long	0xbca13a78                      ; float -0.0196812004
	.long	0xbce89d43                      ; float -0.0283953007
	.long	0xbbb09c6b                      ; float -0.00538974022
	.long	0x3c4b6ba4                      ; float 0.0124158002
	.long	0x3bf22f9d                      ; float 0.00739092985
	.long	0x3c168a10                      ; float 0.0091881901
	.long	0xbc1bf84e                      ; float -0.00951964966
	.long	0x3bcff50b                      ; float 0.00634635007
	.long	0xbc11f2dc                      ; float -0.00890799984
	.long	0x3c39b599                      ; float 0.0113348002
	.long	0xbb7e3275                      ; float -0.0038787399
	.long	0x3b5ecf03                      ; float 0.00339979003
	.long	0xba24db27                      ; float -6.28875976E-4
	.long	0xbc08709d                      ; float -0.00832763035
	.long	0x3b834c50                      ; float 0.00400689989
	.long	0x3b633ed4                      ; float 0.00346748997
	.long	0xbcd25d30                      ; float -0.0256792009
	.long	0x3bb0df06                      ; float 0.00539768022
	.long	0x3b5d1c7b                      ; float 0.00337388995
	.long	0xbc72da12                      ; float -0.0148224998
	.long	0xbce836b6                      ; float -0.0283464007
	.long	0x3b35f647                      ; float 0.00277652009
	.long	0x3a15e8cf                      ; float 5.71859011E-4
	.long	0xbbf17b17                      ; float -0.00736940978
	.long	0x3d6cc3fe                      ; float 0.0578041002
	.long	0x3e109071                      ; float 0.141176
	.long	0x3bb975c2                      ; float 0.00565978978
	.long	0xbda36113                      ; float -0.0797749981
	.long	0xbe0fb97c                      ; float -0.140356004
	.long	0x3d55b73c                      ; float 0.052176699
	.long	0x3da6a1f6                      ; float 0.0813636035
	.long	0xbd0c3746                      ; float -0.0342324004
	.long	0xbdad96ea                      ; float -0.084760502
	.long	0x3d5b07a8                      ; float 0.0534740984
	.long	0x3d096504                      ; float 0.0335436016
	.long	0x3d3e3eca                      ; float 0.0464465991
	.long	0x3d893f87                      ; float 0.0670157
	.long	0x3cda290c                      ; float 0.0266309008
	.long	0x3c699418                      ; float 0.0142564997
	.long	0xbd22afa8                      ; float -0.0397183001
	.long	0xbc3e46f8                      ; float -0.0116136
	.long	0xbd4ff0f4                      ; float -0.0507669002
	.long	0x3d6bab2f                      ; float 0.0575363003
	.long	0xbd54846c                      ; float -0.0518840998
	.long	0x3d12e332                      ; float 0.0358612016
	.long	0x3d086727                      ; float 0.0333014987
	.long	0xbdf43b71                      ; float -0.119254
	.long	0x3d171df4                      ; float 0.0368937999
	.long	0xbecd5e4a                      ; float -0.401109993
	.long	0x3f965508                      ; float 1.17446995
	.long	0x3e30f388                      ; float 0.172803998
	.long	0x3e49fd37                      ; float 0.197255
	.long	0x3da11333                      ; float 0.0786499008
	.long	0xbe9d3565                      ; float -0.307047993
	.long	0xbf6c639d                      ; float -0.923394978
	.long	0xbeb9ceaf                      ; float -0.362904996
	.long	0x3e473216                      ; float 0.194527
	.long	0xbee07443                      ; float -0.438387007
	.long	0xbf2bcf5f                      ; float -0.671132981
	.long	0x3f3a6384                      ; float 0.728080988
	.long	0xbf052b91                      ; float -0.520196021
	.long	0x3c314ca9                      ; float 0.0108214999
	.long	0xbe0f5a10                      ; float -0.139991999
	.long	0xbf19c3df                      ; float -0.600645006
	.long	0x3e1b9d3d                      ; float 0.151967004
	.long	0x3c26f7bc                      ; float 0.0101909004
	.long	0xbe714339                      ; float -0.235607997
	.long	0xbebc2481                      ; float -0.367466003
	.long	0x3e867a53                      ; float 0.26265201
	.long	0x3f596484                      ; float 0.849189997
	.long	0xbe066384                      ; float -0.131238997
	.long	0x3d9b020c                      ; float 0.0756874978
	.long	0xbe8607a3                      ; float -0.261777014
	.size	__const._Z10lstm_n5_o2PiPs.intW, 400

	.type	__const._Z10lstm_n5_o2PiPs.intB,@object ; @__const._Z10lstm_n5_o2PiPs.intB
	.p2align	4, 0x0
__const._Z10lstm_n5_o2PiPs.intB:
	.long	0xbd2cabaa                      ; float -0.0421558991
	.long	0x3e7c04c9                      ; float 0.246112004
	.long	0x3d0ede04                      ; float 0.0348796993
	.long	0xbd7d8c88                      ; float -0.0619015991
	.long	0x3dca756f                      ; float 0.0988567993
	.long	0x409f6b3c                      ; float 4.98184013
	.long	0x409f14f9                      ; float 4.97131014
	.long	0x409f934b                      ; float 4.9867301
	.long	0x409f2ec7                      ; float 4.97446012
	.long	0x409f0419                      ; float 4.9692502
	.long	0x3e82f9ec                      ; float 0.255813003
	.long	0x3f06f640                      ; float 0.527194977
	.long	0x3df75afb                      ; float 0.120779
	.long	0xbdc89720                      ; float -0.097944498
	.long	0x3cdfe32a                      ; float 0.02733
	.long	0x3c1646ff                      ; float 0.00917220023
	.long	0x3f0d2c5a                      ; float 0.551458001
	.long	0xbd55aa71                      ; float -0.0521644987
	.long	0x3c3a604e                      ; float 0.0113754999
	.long	0x3e6a3055                      ; float 0.228699997
	.size	__const._Z10lstm_n5_o2PiPs.intB, 80

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym lut_sigmoid
	.addrsig_sym lut_tanh
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 40960
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9lstm_taskiPiPsS0_
    .private_segment_fixed_size: 16656
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z9lstm_taskiPiPsS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     45
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
