#include <stdio.h>
#include <stdlib.h>
#include <float.h>
#include <limits.h>

#pragma once
#define BLOCK_SIZE 32
#define BLOCK_SIZE_DIM1 1024

// Matrices are stored in row-major order:
// M(row, col) = *(M.elements + row * M.width + col)
typedef struct {
  int width;
  int height;
	double* elements;
} Matrix;

//function to print a matrix
void printMatrix(Matrix A) {
	printf("\n");
	for (int i=0; i<A.height; i++) {
		for (int j=0; j<A.width; j++) {
			printf("%.4f ", A.elements[i*A.width+j]); 
		}
		printf("\n");
	}
	printf("\n");
}

// function to save matrix in an ascii file */
void saveMatrix(Matrix A, char *filename) {
	FILE *fp;
	fp = fopen(filename, "w");
	for (int i=0; i<A.height; i++) {
		for (int j=0; j<A.width; j++) {
			fprintf(fp, "%.4f ", A.elements[i*A.width+j]); 
		}
		fprintf(fp, "\n");
	}
	fclose(fp);
}


/*** matlib functions listed in alphabetical order *****/


/************************ G ************************/
// matrix getCol kernel
__global__
void getColKernel(Matrix d_In, Matrix d_Out, int num) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_In.height || col >= d_In.width) return;
	if(col == num) 
		d_Out.elements[row] = d_In.elements[row*d_In.width+col];
}

void getCol(Matrix In, Matrix Out, int num) {
	//printf("getCol()\n");
	// load In to device memory
	Matrix d_In;
	d_In.width = In.width;
	d_In.height = In.height;
	size_t size = In.width * In.height * sizeof(double);
	cudaError_t err = cudaMalloc(&d_In.elements, size);
	//printf("CUDA malloc In: %s\n", cudaGetErrorString(err));	
	cudaMemcpy(d_In.elements, In.elements, size, cudaMemcpyHostToDevice);	
	//printf("Copy input matrix to device: %s\n", cudaGetErrorString(err));
	
	// allocate Out in device memory
	Matrix d_Out;
  d_Out.width = Out.width; d_Out.height = Out.height;
  size = Out.width * Out.height * sizeof(double);
  err = cudaMalloc(&d_Out.elements, size);
  //printf("CUDA malloc Out: %s\n", cudaGetErrorString(err));	

	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (In.width + dimBlock.x - 1)/dimBlock.x, (In.height + dimBlock.y - 1)/dimBlock.y );
	getColKernel<<<dimGrid, dimBlock>>>(d_In, d_Out, num);
	err = cudaThreadSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read Out from device memory
	err = cudaMemcpy(Out.elements, d_Out.elements, size, cudaMemcpyDeviceToHost);
	//printf("Copy output matrix off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	cudaFree(d_In.elements);
	cudaFree(d_Out.elements);
}

// matrix getRow kernel
__global__
void getRowKernel(Matrix d_In, Matrix d_Out, int num) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_In.height || col >= d_In.width) return;
	if(row == num) 
		d_Out.elements[col] = d_In.elements[row*d_In.width+col];
}

/************************ I ************************/

// check if a square matrix is symmetric
__global__
void isSymmetricKernel(Matrix d_A, int *d_result) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_A.height || col >= d_A.width) return;
	if(d_A.elements[row*d_A.width+col] != d_A.elements[row + col*d_A.width])
		*(d_result) = 0;
}

int isSymmetric(Matrix A) {
	//printf("isSymmetric()\n");
	// load A to device memory
	Matrix d_A;
	d_A.width = A.width;
	d_A.height = A.height;
	size_t size = A.width * A.height * sizeof(double);
	cudaError_t err = cudaMalloc(&d_A.elements, size);
	//printf("CUDA malloc A: %s\n", cudaGetErrorString(err));	
	cudaMemcpy(d_A.elements, A.elements, size, cudaMemcpyHostToDevice);
	//printf("Copy A to device: %s\n", cudaGetErrorString(err));

	// load result to device memory
	int result = 1;
	int *d_result;
	err = cudaMalloc(&d_result, sizeof(int));
	//printf("CUDA malloc d_result: %s\n", cudaGetErrorString(err));	
	cudaMemcpy(d_result, &result, sizeof(int), cudaMemcpyHostToDevice);	
	//printf("Copy result to device: %s\n", cudaGetErrorString(err));

	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (A.width + dimBlock.x - 1)/dimBlock.x, (A.height + dimBlock.y - 1)/dimBlock.y );
	isSymmetricKernel<<<dimGrid, dimBlock>>>(d_A, d_result);
	err = cudaThreadSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	//read result from fdevice memory
	err = cudaMemcpy(&result, d_result, sizeof(int), cudaMemcpyDeviceToHost);
	//printf("Copy result off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	cudaFree(d_A.elements);
	cudaFree(d_result);

	return result;
}

/************************ M ************************/

// matAdd kernel
__global__
void matAddKernel(Matrix d_A, Matrix d_B, Matrix d_C) {
	int col = blockIdx.y * blockDim.y + threadIdx.y;
	int row = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_A.height || col >= d_A.width) return;
	d_C.elements[row*d_C.width + col] = d_A.elements[row*d_A.width + col] + d_B.elements[row*d_B.width + col];
}

// matrix matDiv kernel called by matDiv()
__global__
void matDivKernel(Matrix d_A, Matrix d_B, Matrix d_Out) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	int idx = row*d_A.width+col;
	if(row > d_A.height || col > d_A.width) return;
	d_Out.elements[idx] = d_A.elements[idx] / d_B.elements[idx];
}

void matDiv(Matrix A, Matrix B, Matrix Out) {
	//printf("matDiv()\n");
	if (A.width != B.width || A.height != B.height) {
		printf("Input matrices must have the same dimension!\n");
		return;
	}
	// load A to device memory
	Matrix d_A;
	d_A.width = A.width;
	d_A.height = A.height;
	size_t size = A.width * A.height * sizeof(double);
	cudaError_t err = cudaMalloc(&d_A.elements, size);
	//printf("CUDA malloc A: %s\n", cudaGetErrorString(err));	
	cudaMemcpy(d_A.elements, A.elements, size, cudaMemcpyHostToDevice);	
	//printf("Copy input matrix A to device: %s\n", cudaGetErrorString(err));
	
	// load B to device memory
	Matrix d_B;
	d_B.width = B.width;
	d_B.height = B.height;
	err = cudaMalloc(&d_B.elements, size);
	//printf("CUDA malloc B: %s\n", cudaGetErrorString(err));	
	cudaMemcpy(d_B.elements, B.elements, size, cudaMemcpyHostToDevice);	
	//printf("Copy input matrix B to device: %s\n", cudaGetErrorString(err));
	
	// allocate Out in device memory
	Matrix d_Out;
  d_Out.width = Out.width; d_Out.height = Out.height;
  size = Out.width * Out.height * sizeof(double);
  cudaMalloc(&d_Out.elements, size);

	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (A.width + dimBlock.x - 1)/dimBlock.x, (A.height + dimBlock.y - 1)/dimBlock.y );
	matDivKernel<<<dimGrid, dimBlock>>>(d_A, d_B, d_Out);
	err = cudaThreadSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read Out from device memory
	err = cudaMemcpy(Out.elements, d_Out.elements, size, cudaMemcpyDeviceToHost);
	//printf("Copy output matrix off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	cudaFree(d_A.elements);
	cudaFree(d_B.elements);
	cudaFree(d_Out.elements);

}

// matrix matPlusScaler kernel called by matPlusScaler()
__global__
void matPlusScalerKernel(Matrix d_In, double scaler, Matrix d_Out) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_In.height || col >= d_In.width) return;
	int idx = row * d_In.width +  col;
	d_Out.elements[idx] = d_In.elements[idx] + scaler;
}

void matPlusScaler(Matrix In, double scaler, Matrix Out) {
	//printf("matPlusScaler()\n");
	// load In to device memory
	Matrix d_In;
	d_In.width = In.width;
	d_In.height = In.height;
	size_t size = In.width * In.height * sizeof(double);
	cudaError_t err = cudaMalloc(&d_In.elements, size);
	//printf("CUDA malloc In: %s\n", cudaGetErrorString(err));	
	cudaMemcpy(d_In.elements, In.elements, size, cudaMemcpyHostToDevice);	
	//printf("Copy input matrix to device: %s\n", cudaGetErrorString(err));
	
	// allocate Out in device memory
	Matrix d_Out;
  d_Out.width = Out.width; d_Out.height = Out.height;
  size = Out.width * Out.height * sizeof(double);
  cudaMalloc(&d_Out.elements, size);

	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (In.width + dimBlock.x - 1)/dimBlock.x, (In.height + dimBlock.y - 1)/dimBlock.y );
	matPlusScalerKernel<<<dimGrid, dimBlock>>>(d_In, scaler, d_Out);
	err = cudaThreadSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read Out from device memory
	err = cudaMemcpy(Out.elements, d_Out.elements, size, cudaMemcpyDeviceToHost);
	//printf("Copy output matrix off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	cudaFree(d_In.elements);
	cudaFree(d_Out.elements);

}

// matSub kernel
__global__
void matSubKernel(Matrix d_A, Matrix d_B, Matrix d_C) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_A.height || col >= d_A.width) return;
	d_C.elements[row*d_A.width + col] = d_A.elements[row*d_A.width + col] - d_B.elements[row*d_A.width + col];
}

void matSub(Matrix A, Matrix B, Matrix C){
	//printf("matSub()\n");
	// load A, B to device memory
	Matrix d_A;
	Matrix d_B;
	d_A.width = A.width;
	d_B.width = B.width;
	d_A.height = A.height;
	d_B.height = B.height;
	size_t size = A.width * A.height * sizeof(double);

	cudaError_t err = cudaMalloc(&d_A.elements, size);
	//printf("CUDA malloc A: %s\n", cudaGetErrorString(err));
	cudaMemcpy(d_A.elements, A.elements, size, cudaMemcpyHostToDevice);
	//printf("Copy A to device: %s\n", cudaGetErrorString(err));

	err = cudaMalloc(&d_B.elements, size);
	//printf("CUDA malloc B: %s\n", cudaGetErrorString(err));
	cudaMemcpy(d_B.elements, B.elements, size, cudaMemcpyHostToDevice);
	//printf("Copy B to device: %s\n", cudaGetErrorString(err));
	
	// allocate C to device memory
	Matrix d_C;
	d_C.width = C.width;
	d_C.height = C.height;
	err = cudaMalloc(&d_C.elements, size);
	//printf("CUDA malloc C: %s\n", cudaGetErrorString(err));

	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (A.width + dimBlock.x - 1)/dimBlock.x, (A.height + dimBlock.y - 1)/dimBlock.y );
	matSubKernel<<<dimGrid, dimBlock>>>(d_A, d_B, d_C);
	err = cudaThreadSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read C from device memory
	err = cudaMemcpy(C.elements, d_C.elements, size, cudaMemcpyDeviceToHost);
	//printf("Copy C off of device: %s\n", cudaGetErrorString(err));

// free device memory
	cudaFree(d_A.elements);
	cudaFree(d_B.elements);
	cudaFree(d_C.elements);
}

// matrix matTimesScaler kernel called by matTimesScaler()
__global__
void matTimesScalerKernel(Matrix d_In, double scaler, Matrix d_Out) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_In.height || col >= d_In.width) return;
	int idx = row * d_In.width +  col;
	d_Out.elements[idx] = d_In.elements[idx] * scaler;
}

void matTimesScaler(Matrix In, double scaler, Matrix Out) {
	//printf("matTimesScaler()\n");
	// load In to device memory
	Matrix d_In;
	d_In.width = In.width;
	d_In.height = In.height;
	size_t size = In.width * In.height * sizeof(double);
	cudaError_t err = cudaMalloc(&d_In.elements, size);
	//printf("CUDA malloc In: %s\n", cudaGetErrorString(err));	
	cudaMemcpy(d_In.elements, In.elements, size, cudaMemcpyHostToDevice);	
	//printf("Copy input matrix to device: %s\n", cudaGetErrorString(err));
	
	// allocate Out in device memory
	Matrix d_Out;
  d_Out.width = Out.width; d_Out.height = Out.height;
  size = Out.width * Out.height * sizeof(double);
  cudaMalloc(&d_Out.elements, size);

	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (In.width + dimBlock.x - 1)/dimBlock.x, (In.height + dimBlock.y - 1)/dimBlock.y );
	matTimesScalerKernel<<<dimGrid, dimBlock>>>(d_In, scaler, d_Out);
	err = cudaThreadSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read Out from device memory
	err = cudaMemcpy(Out.elements, d_Out.elements, size, cudaMemcpyDeviceToHost);
	//printf("Copy output matrix off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	cudaFree(d_In.elements);
	cudaFree(d_Out.elements);
}

// need a better parallelized version
__global__
void maxOfMatrixRow(Matrix d_A, Matrix d_col) {
	int row = blockIdx.x * blockDim.x + threadIdx.x;
	double max = d_A.elements[row*d_A.width];
	for (int col=0; col<d_A.width; col++) {
		max = (d_A.elements[row*d_A.width+col] > max)? d_A.elements[row*d_A.width+col] : max;
	}
	d_col.elements[row] = max;
}

/************************ O ************************/
// matrix ones kernel called by ones()
__global__
void onesKernel(Matrix d_A) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row > d_A.height || col > d_A.width) return;
	d_A.elements[row*d_A.width+col] = 1;
}

void ones(Matrix A) {
	// load A to device memory
	Matrix d_A;
	d_A.width = A.width;
	d_A.height = A.height;
	size_t size = A.width * A.height * sizeof(double);
	cudaError_t err = cudaMalloc(&d_A.elements, size);
	//printf("CUDA malloc A: %s\n", cudaGetErrorString(err));	
	cudaMemcpy(d_A.elements, A.elements, size, cudaMemcpyHostToDevice);	
	//printf("Copy A to device: %s\n", cudaGetErrorString(err));
	
	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (A.width + dimBlock.x - 1)/dimBlock.x, (A.height + dimBlock.y - 1)/dimBlock.y );
	onesKernel<<<dimGrid, dimBlock>>>(d_A);
	err = cudaThreadSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read A from device memory
	err = cudaMemcpy(A.elements, d_A.elements, size, cudaMemcpyDeviceToHost);
	//printf("Copy C off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	cudaFree(d_A.elements);
}


/************************ R ************************/

//create an m-by-n tiling of a given matrix
__global__
void repmatKernel(Matrix d_A, int m, int n, Matrix d_B) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_A.height || col >= d_A.width) return;
	for(int i=0; i < m; i++) {
		for(int j=0; j < n; j++) {
			d_B.elements[(row + i*d_A.height)*d_B.width + (col + j*d_A.width)] = d_A.elements[row*d_A.width + col];
		}
	}
}

// matrix reshape kernel called by reshape()
__global__
void reshapeKernel(Matrix d_In, Matrix d_Out) {
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	if(y >= d_In.height || x >= d_In.width) return;
	int c = x * d_In.height + y;
	d_Out.elements[(c%d_Out.height)*d_Out.width+(c/d_Out.height)] = d_In.elements[(c%d_In.height)*d_In.width+(c/d_In.height)];

}

void reshape(Matrix In, Matrix Out) {
	//printf("reshape()\n");
	// load In to device memory
	Matrix d_In;
	d_In.width = In.width;
	d_In.height = In.height;
	size_t size = In.width * In.height * sizeof(double);
	cudaError_t err = cudaMalloc(&d_In.elements, size);
	//printf("CUDA malloc In: %s\n", cudaGetErrorString(err));	
	cudaMemcpy(d_In.elements, In.elements, size, cudaMemcpyHostToDevice);	
	//printf("Copy input matrix to device: %s\n", cudaGetErrorString(err));
	
	// allocate Out in device memory
	Matrix d_Out;
	d_Out.width = Out.width; d_Out.height = Out.height;
	size = Out.width * Out.height * sizeof(double);
	cudaMalloc(&d_Out.elements, size);

	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (In.width + dimBlock.x - 1)/dimBlock.x, (In.height + dimBlock.y - 1)/dimBlock.y );
	reshapeKernel<<<dimGrid, dimBlock>>>(d_In, d_Out);
	err = cudaThreadSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read Out from device memory
	err = cudaMemcpy(Out.elements, d_Out.elements, size, cudaMemcpyDeviceToHost);
	//printf("Copy output matrix off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	cudaFree(d_In.elements);
	cudaFree(d_Out.elements);
}

/************************ S ************************/
__global__
void sumOfMatrixColKernel(Matrix d_A, Matrix d_row) {
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(col >= d_A.width) return;
	for (int row=0; row<d_A.height; row++) {
		d_row.elements[col] += d_A.elements[row*d_A.width+col];
	}
}

void sumOfMatrixCol(Matrix In, Matrix Out) {
	// load In to device memory
	Matrix d_In;
	d_In.width = In.width;
	d_In.height = In.height;
	size_t size = In.width * In.height * sizeof(double);
	cudaError_t err = cudaMalloc(&d_In.elements, size);
	//printf("CUDA malloc In: %s\n", cudaGetErrorString(err));	
	cudaMemcpy(d_In.elements, In.elements, size, cudaMemcpyHostToDevice);	
	//printf("Copy input matrix to device: %s\n", cudaGetErrorString(err));
	
	// allocate Out in device memory
	Matrix d_Out;
	d_Out.width = Out.width; d_Out.height = Out.height;
	size = Out.width * Out.height * sizeof(double);
	cudaMalloc(&d_Out.elements, size);

	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE_DIM1);
	dim3 dimGrid( (In.width + dimBlock.x - 1)/dimBlock.x );
	sumOfMatrixColKernel<<<dimGrid, dimBlock>>>(d_In, d_Out);
	err = cudaThreadSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read Out from device memory
	err = cudaMemcpy(Out.elements, d_Out.elements, size, cudaMemcpyDeviceToHost);
	//printf("Copy output matrix off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	cudaFree(d_In.elements);
	cudaFree(d_Out.elements);
}

/************************ T ************************/

//matrix transpose kernel
__global__
void transposeKernel(Matrix d_A, Matrix d_B){
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_A.height || col >= d_A.width) return;
	d_B.elements[col*d_B.width+row] = d_A.elements[row*d_A.width+col];
}

void transpose(Matrix In, Matrix Out) {
	//printf("transpose()\n");
	// load In to device memory
	Matrix d_In;
	d_In.width = In.width;
	d_In.height = In.height;
	size_t size = In.width * In.height * sizeof(double);

	cudaError_t err = cudaMalloc(&d_In.elements, size);
	//printf("CUDA malloc In: %s\n", cudaGetErrorString(err));
	cudaMemcpy(d_In.elements, In.elements, size, cudaMemcpyHostToDevice);
	//printf("Copy In to device: %s\n", cudaGetErrorString(err));

	// allocate Out on device memory
	Matrix d_Out;
	d_Out.width = Out.width;
	d_Out.height = Out.height;
	size = d_Out.width * d_Out.height * sizeof(double);
	err = cudaMalloc(&d_Out.elements, size);
	//printf("CUDA malloc d_Out: %s\n", cudaGetErrorString(err));

	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (In.width + dimBlock.x - 1)/dimBlock.x, (In.height + dimBlock.y - 1)/dimBlock.y );
	transposeKernel<<<dimGrid, dimBlock>>>(d_In, d_Out);
	err = cudaThreadSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read Out from device memory
	err = cudaMemcpy(Out.elements, d_Out.elements, size, cudaMemcpyDeviceToHost);
	//printf("Copy d_Out off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	cudaFree(d_In.elements);
	cudaFree(d_Out.elements);
}

/************************ Z ************************/

// matrix zeros kernel called by zeros()
__global__
void zerosKernel(Matrix d_A) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_A.height || col >= d_A.width) return;
	d_A.elements[row*d_A.width+col] = 0;
}

void zeros(Matrix A) {
	// load A to device memory
	Matrix d_A;
	d_A.width = A.width;
	d_A.height = A.height;
	size_t size = A.width * A.height * sizeof(double);
	cudaError_t err = cudaMalloc(&d_A.elements, size);
	//printf("CUDA malloc A: %s\n", cudaGetErrorString(err));	
	cudaMemcpy(d_A.elements, A.elements, size, cudaMemcpyHostToDevice);	
	//printf("Copy A to device: %s\n", cudaGetErrorString(err));
	
	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (A.width + dimBlock.x - 1)/dimBlock.x, (A.height + dimBlock.y - 1)/dimBlock.y );
	zerosKernel<<<dimGrid, dimBlock>>>(d_A);
	err = cudaThreadSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read A from device memory
	err = cudaMemcpy(A.elements, d_A.elements, size, cudaMemcpyDeviceToHost);
	//printf("Copy A off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	cudaFree(d_A.elements);
}


	.file	"tmpxft_0035a347_00000000-6_matlib.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2042:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2042:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, @function
_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0:
.LFB2214:
	.cfi_startproc
	jmp	cudaLaunchKernel@PLT
	.cfi_endproc
.LFE2214:
	.size	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, .-_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\n"
.LC1:
	.string	"%.4f "
	.text
	.globl	_Z11printMatrix6Matrix
	.type	_Z11printMatrix6Matrix, @function
_Z11printMatrix6Matrix:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%eax, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	leaq	.LC0(%rip), %rsi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	movl	$2, %edi
	movl	%ebx, %r15d
	sarq	$32, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	call	__printf_chk@PLT
.L4:
	cmpl	%ebx, %r12d
	jge	.L6
	movslq	%ebp, %rdx
	xorl	%ecx, %ecx
	salq	$3, %rdx
.L7:
	cmpl	%r14d, %ecx
	jge	.L10
	movsd	(%rdx,%r13), %xmm0
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movl	%ecx, 12(%rsp)
	movq	%rdx, (%rsp)
	call	__printf_chk@PLT
	movl	12(%rsp), %ecx
	movq	(%rsp), %rdx
	incl	%ecx
	addq	$8, %rdx
	jmp	.L7
.L10:
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	incl	%r12d
	addl	%r15d, %ebp
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L4
.L6:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z11printMatrix6Matrix, .-_Z11printMatrix6Matrix
	.section	.rodata.str1.1
.LC2:
	.string	"w"
	.text
	.globl	_Z10saveMatrix6MatrixPc
	.type	_Z10saveMatrix6MatrixPc, @function
_Z10saveMatrix6MatrixPc:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	leaq	.LC2(%rip), %rsi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	movq	%rdx, %rdi
	movl	%ebx, %r14d
	movl	%ebx, %r15d
	sarq	$32, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	call	fopen@PLT
	movq	%rax, 8(%rsp)
.L12:
	cmpl	%ebx, %r12d
	jge	.L14
	movslq	%ebp, %rcx
	xorl	%r8d, %r8d
	salq	$3, %rcx
.L15:
	cmpl	%r14d, %r8d
	jge	.L17
	movsd	(%rcx,%r13), %xmm0
	movq	8(%rsp), %rdi
	leaq	.LC1(%rip), %rdx
	movb	$1, %al
	movl	$2, %esi
	movl	%r8d, 28(%rsp)
	movq	%rcx, 16(%rsp)
	call	__fprintf_chk@PLT
	movl	28(%rsp), %r8d
	movq	16(%rsp), %rcx
	incl	%r8d
	addq	$8, %rcx
	jmp	.L15
.L17:
	movq	8(%rsp), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	incl	%r12d
	leaq	.LC0(%rip), %rdx
	addl	%r15d, %ebp
	call	__fprintf_chk@PLT
	jmp	.L12
.L14:
	movq	8(%rsp), %rdi
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	fclose@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z10saveMatrix6MatrixPc, .-_Z10saveMatrix6MatrixPc
	.globl	_Z40__device_stub__Z12getColKernel6MatrixS_iR6MatrixS0_i
	.type	_Z40__device_stub__Z12getColKernel6MatrixS_iR6MatrixS0_i, @function
_Z40__device_stub__Z12getColKernel6MatrixS_iR6MatrixS0_i:
.LFB2064:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdi, 64(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rsi, 72(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	32(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z12getColKernel6MatrixS_i(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 128
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	80(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L18:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2064:
	.size	_Z40__device_stub__Z12getColKernel6MatrixS_iR6MatrixS0_i, .-_Z40__device_stub__Z12getColKernel6MatrixS_iR6MatrixS0_i
	.globl	_Z12getColKernel6MatrixS_i
	.type	_Z12getColKernel6MatrixS_i, @function
_Z12getColKernel6MatrixS_i:
.LFB2065:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 16(%rsp)
	leaq	16(%rsp), %rdi
	movq	%rsi, 24(%rsp)
	movq	%rsp, %rsi
	movq	%rdx, (%rsp)
	movl	%r8d, %edx
	movq	%rcx, 8(%rsp)
	call	_Z40__device_stub__Z12getColKernel6MatrixS_iR6MatrixS0_i
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2065:
	.size	_Z12getColKernel6MatrixS_i, .-_Z12getColKernel6MatrixS_i
	.globl	_Z6getCol6MatrixS_i
	.type	_Z6getCol6MatrixS_i, @function
_Z6getCol6MatrixS_i:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	sarq	$32, %r14
	movl	%r8d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	movl	%edi, %edx
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	imull	%r14d, %edx
	movq	%rdi, %rbx
	sarq	$32, %rbp
	addl	$31, %ebx
	shrl	$5, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movslq	%edx, %rdx
	movq	%rcx, (%rsp)
	salq	$3, %rdx
	movq	%rdx, %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	movl	%edi, 40(%rsp)
	leaq	48(%rsp), %rdi
	movl	%r14d, 44(%rsp)
	addl	$31, %r14d
	movq	%rdx, 8(%rsp)
	shrl	$5, %r14d
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebp, 60(%rsp)
	imull	%r12d, %ebp
	leaq	64(%rsp), %rdi
	movl	%r12d, 56(%rsp)
	movslq	%ebp, %rbp
	salq	$3, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movl	%ebx, 28(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r14d, 32(%rsp)
	movq	28(%rsp), %rdi
	movl	$1, %ecx
	movabsq	$137438953504, %rdx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movups	40(%rsp), %xmm0
	movups	56(%rsp), %xmm1
	leaq	88(%rsp), %rsi
	movl	%r13d, %edx
	leaq	72(%rsp), %rdi
	movups	%xmm0, 72(%rsp)
	movups	%xmm1, 88(%rsp)
	call	_Z40__device_stub__Z12getColKernel6MatrixS_iR6MatrixS0_i
.L25:
	call	cudaThreadSynchronize@PLT
	movq	64(%rsp), %rsi
	movq	(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z6getCol6MatrixS_i, .-_Z6getCol6MatrixS_i
	.globl	_Z40__device_stub__Z12getRowKernel6MatrixS_iR6MatrixS0_i
	.type	_Z40__device_stub__Z12getRowKernel6MatrixS_iR6MatrixS0_i, @function
_Z40__device_stub__Z12getRowKernel6MatrixS_iR6MatrixS0_i:
.LFB2066:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdi, 64(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rsi, 72(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	32(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z12getRowKernel6MatrixS_i(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 128
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	80(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L28:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2066:
	.size	_Z40__device_stub__Z12getRowKernel6MatrixS_iR6MatrixS0_i, .-_Z40__device_stub__Z12getRowKernel6MatrixS_iR6MatrixS0_i
	.globl	_Z12getRowKernel6MatrixS_i
	.type	_Z12getRowKernel6MatrixS_i, @function
_Z12getRowKernel6MatrixS_i:
.LFB2067:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 16(%rsp)
	leaq	16(%rsp), %rdi
	movq	%rsi, 24(%rsp)
	movq	%rsp, %rsi
	movq	%rdx, (%rsp)
	movl	%r8d, %edx
	movq	%rcx, 8(%rsp)
	call	_Z40__device_stub__Z12getRowKernel6MatrixS_iR6MatrixS0_i
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2067:
	.size	_Z12getRowKernel6MatrixS_i, .-_Z12getRowKernel6MatrixS_i
	.globl	_Z44__device_stub__Z17isSymmetricKernel6MatrixPiR6MatrixPi
	.type	_Z44__device_stub__Z17isSymmetricKernel6MatrixPiR6MatrixPi, @function
_Z44__device_stub__Z17isSymmetricKernel6MatrixPiR6MatrixPi:
.LFB2068:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%rsi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	32(%rsp), %rdi
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movl	$1, 40(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	pushq	24(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z17isSymmetricKernel6MatrixPi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 112
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L34:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2068:
	.size	_Z44__device_stub__Z17isSymmetricKernel6MatrixPiR6MatrixPi, .-_Z44__device_stub__Z17isSymmetricKernel6MatrixPiR6MatrixPi
	.globl	_Z17isSymmetricKernel6MatrixPi
	.type	_Z17isSymmetricKernel6MatrixPi, @function
_Z17isSymmetricKernel6MatrixPi:
.LFB2069:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, (%rsp)
	movq	%rsp, %rdi
	movq	%rsi, 8(%rsp)
	movq	%rdx, %rsi
	call	_Z44__device_stub__Z17isSymmetricKernel6MatrixPiR6MatrixPi
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2069:
	.size	_Z17isSymmetricKernel6MatrixPi, .-_Z17isSymmetricKernel6MatrixPi
	.globl	_Z11isSymmetric6Matrix
	.type	_Z11isSymmetric6Matrix, @function
_Z11isSymmetric6Matrix:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%edi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	sarq	$32, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	imull	%ebp, %r12d
	addl	$31, %ebx
	shrl	$5, %ebx
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	movslq	%r12d, %r12
	movl	%edi, 40(%rsp)
	leaq	48(%rsp), %rdi
	salq	$3, %r12
	movl	%ebp, 44(%rsp)
	addl	$31, %ebp
	movq	%r12, %rsi
	shrl	$5, %ebp
	call	cudaMalloc@PLT
	movq	48(%rsp), %rdi
	movq	%r12, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	leaq	4(%rsp), %r12
	call	cudaMemcpy@PLT
	leaq	8(%rsp), %rdi
	movl	$4, %esi
	movl	$1, 4(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	%ebx, 28(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%ebp, 32(%rsp)
	movq	28(%rsp), %rdi
	movl	$1, %ecx
	movabsq	$137438953504, %rdx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	movups	40(%rsp), %xmm0
	movq	8(%rsp), %rsi
	leaq	56(%rsp), %rdi
	movups	%xmm0, 56(%rsp)
	call	_Z44__device_stub__Z17isSymmetricKernel6MatrixPiR6MatrixPi
.L41:
	call	cudaThreadSynchronize@PLT
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movl	4(%rsp), %eax
	movq	72(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z11isSymmetric6Matrix, .-_Z11isSymmetric6Matrix
	.globl	_Z41__device_stub__Z12matAddKernel6MatrixS_S_R6MatrixS0_S0_
	.type	_Z41__device_stub__Z12matAddKernel6MatrixS_S_R6MatrixS0_S0_, @function
_Z41__device_stub__Z12matAddKernel6MatrixS_S_R6MatrixS0_S0_:
.LFB2070:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rcx
	movq	%rdi, 48(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 56(%rsp)
	leaq	24(%rsp), %rdi
	leaq	36(%rsp), %rsi
	movq	%rdx, 64(%rsp)
	leaq	8(%rsp), %rdx
	movq	%rax, 24(%rsp)
	movl	$1, 32(%rsp)
	movq	%rax, 36(%rsp)
	movl	$1, 44(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	pushq	16(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z12matAddKernel6MatrixS_S_(%rip), %rdi
	pushq	16(%rsp)
	.cfi_def_cfa_offset 112
	movq	52(%rsp), %rcx
	movl	60(%rsp), %r8d
	movq	40(%rsp), %rsi
	movl	48(%rsp), %edx
	leaq	64(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L44:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L46
	call	__stack_chk_fail@PLT
.L46:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2070:
	.size	_Z41__device_stub__Z12matAddKernel6MatrixS_S_R6MatrixS0_S0_, .-_Z41__device_stub__Z12matAddKernel6MatrixS_S_R6MatrixS0_S0_
	.globl	_Z12matAddKernel6MatrixS_S_
	.type	_Z12matAddKernel6MatrixS_S_, @function
_Z12matAddKernel6MatrixS_S_:
.LFB2071:
	.cfi_startproc
	endbr64
	subq	$56, %rsp
	.cfi_def_cfa_offset 64
	movq	%rdi, 32(%rsp)
	leaq	32(%rsp), %rdi
	movq	%rsi, 40(%rsp)
	leaq	16(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	movq	%rsp, %rdx
	movq	%rcx, 24(%rsp)
	movq	%r8, (%rsp)
	movq	%r9, 8(%rsp)
	call	_Z41__device_stub__Z12matAddKernel6MatrixS_S_R6MatrixS0_S0_
	addq	$56, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2071:
	.size	_Z12matAddKernel6MatrixS_S_, .-_Z12matAddKernel6MatrixS_S_
	.globl	_Z41__device_stub__Z12matDivKernel6MatrixS_S_R6MatrixS0_S0_
	.type	_Z41__device_stub__Z12matDivKernel6MatrixS_S_R6MatrixS0_S0_, @function
_Z41__device_stub__Z12matDivKernel6MatrixS_S_R6MatrixS0_S0_:
.LFB2072:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rcx
	movq	%rdi, 48(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 56(%rsp)
	leaq	24(%rsp), %rdi
	leaq	36(%rsp), %rsi
	movq	%rdx, 64(%rsp)
	leaq	8(%rsp), %rdx
	movq	%rax, 24(%rsp)
	movl	$1, 32(%rsp)
	movq	%rax, 36(%rsp)
	movl	$1, 44(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L50
	pushq	16(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z12matDivKernel6MatrixS_S_(%rip), %rdi
	pushq	16(%rsp)
	.cfi_def_cfa_offset 112
	movq	52(%rsp), %rcx
	movl	60(%rsp), %r8d
	movq	40(%rsp), %rsi
	movl	48(%rsp), %edx
	leaq	64(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L50:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L52
	call	__stack_chk_fail@PLT
.L52:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2072:
	.size	_Z41__device_stub__Z12matDivKernel6MatrixS_S_R6MatrixS0_S0_, .-_Z41__device_stub__Z12matDivKernel6MatrixS_S_R6MatrixS0_S0_
	.globl	_Z12matDivKernel6MatrixS_S_
	.type	_Z12matDivKernel6MatrixS_S_, @function
_Z12matDivKernel6MatrixS_S_:
.LFB2073:
	.cfi_startproc
	endbr64
	subq	$56, %rsp
	.cfi_def_cfa_offset 64
	movq	%rdi, 32(%rsp)
	leaq	32(%rsp), %rdi
	movq	%rsi, 40(%rsp)
	leaq	16(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	movq	%rsp, %rdx
	movq	%rcx, 24(%rsp)
	movq	%r8, (%rsp)
	movq	%r9, 8(%rsp)
	call	_Z41__device_stub__Z12matDivKernel6MatrixS_S_R6MatrixS0_S0_
	addq	$56, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2073:
	.size	_Z12matDivKernel6MatrixS_S_, .-_Z12matDivKernel6MatrixS_S_
	.section	.rodata.str1.1
.LC3:
	.string	"Input matrices must have the same dimension!\n"
	.text
	.globl	_Z6matDiv6MatrixS_S_
	.type	_Z6matDiv6MatrixS_S_, @function
_Z6matDiv6MatrixS_S_:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	movq	%r8, %r9
	sarq	$32, %r14
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	sarq	$32, %r9
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	cmpq	%rdx, %rdi
	je	.L57
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L62
	addq	$152, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
.L57:
	.cfi_restore_state
	movl	%edi, %r12d
	movq	%rdi, %rbx
	movq	%rsi, %rbp
	movl	%edi, 40(%rsp)
	imull	%r14d, %r12d
	leaq	48(%rsp), %rdi
	movq	%r9, (%rsp)
	movq	%rcx, %r15
	movq	%r8, 8(%rsp)
	movl	%r14d, 44(%rsp)
	addl	$31, %r14d
	movslq	%r12d, %r12
	shrl	$5, %r14d
	salq	$3, %r12
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movq	48(%rsp), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	64(%rsp), %rdi
	movq	%r12, %rsi
	movq	%rbx, 56(%rsp)
	call	cudaMalloc@PLT
	movq	64(%rsp), %rdi
	movq	%r12, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	addl	$31, %ebx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %r8
	movq	(%rsp), %r9
	shrl	$5, %ebx
	leaq	80(%rsp), %rdi
	movl	%r9d, 76(%rsp)
	imull	%r8d, %r9d
	movl	%r8d, 72(%rsp)
	movslq	%r9d, %rbp
	salq	$3, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movl	%ebx, 28(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r14d, 32(%rsp)
	movq	28(%rsp), %rdi
	movl	$1, %ecx
	movabsq	$137438953504, %rdx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L59
	movups	40(%rsp), %xmm0
	movups	56(%rsp), %xmm1
	leaq	120(%rsp), %rdx
	leaq	104(%rsp), %rsi
	movups	72(%rsp), %xmm2
	leaq	88(%rsp), %rdi
	movups	%xmm0, 88(%rsp)
	movups	%xmm1, 104(%rsp)
	movups	%xmm2, 120(%rsp)
	call	_Z41__device_stub__Z12matDivKernel6MatrixS_S_R6MatrixS0_S0_
.L59:
	call	cudaThreadSynchronize@PLT
	movq	80(%rsp), %rsi
	movq	%rbp, %rdx
	movq	%r13, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L60
.L62:
	call	__stack_chk_fail@PLT
.L60:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z6matDiv6MatrixS_S_, .-_Z6matDiv6MatrixS_S_
	.globl	_Z47__device_stub__Z19matPlusScalerKernel6MatrixdS_R6MatrixdS0_
	.type	_Z47__device_stub__Z19matPlusScalerKernel6MatrixdS_R6MatrixdS0_, @function
_Z47__device_stub__Z19matPlusScalerKernel6MatrixdS_R6MatrixdS0_:
.LFB2074:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movsd	%xmm0, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 64(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 80(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L63
	pushq	32(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z19matPlusScalerKernel6MatrixdS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 128
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	80(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L63:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L65
	call	__stack_chk_fail@PLT
.L65:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2074:
	.size	_Z47__device_stub__Z19matPlusScalerKernel6MatrixdS_R6MatrixdS0_, .-_Z47__device_stub__Z19matPlusScalerKernel6MatrixdS_R6MatrixdS0_
	.globl	_Z19matPlusScalerKernel6MatrixdS_
	.type	_Z19matPlusScalerKernel6MatrixdS_, @function
_Z19matPlusScalerKernel6MatrixdS_:
.LFB2075:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 16(%rsp)
	leaq	16(%rsp), %rdi
	movq	%rsi, 24(%rsp)
	movq	%rsp, %rsi
	movq	%rdx, (%rsp)
	movq	%rcx, 8(%rsp)
	call	_Z47__device_stub__Z19matPlusScalerKernel6MatrixdS_R6MatrixdS0_
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2075:
	.size	_Z19matPlusScalerKernel6MatrixdS_, .-_Z19matPlusScalerKernel6MatrixdS_
	.globl	_Z13matPlusScaler6MatrixdS_
	.type	_Z13matPlusScaler6MatrixdS_, @function
_Z13matPlusScaler6MatrixdS_:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	sarq	$32, %r13
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	imull	%r13d, %r14d
	movq	%rdx, %rbp
	sarq	$32, %r12
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	addl	$31, %ebx
	movslq	%r14d, %r14
	shrl	$5, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	salq	$3, %r14
	movq	%rcx, (%rsp)
	movq	%r14, %rsi
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	movl	%edi, 40(%rsp)
	leaq	48(%rsp), %rdi
	movl	%r13d, 44(%rsp)
	call	cudaMalloc@PLT
	movq	48(%rsp), %rdi
	movq	%r14, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebp, 56(%rsp)
	imull	%r12d, %ebp
	leaq	64(%rsp), %rdi
	movl	%r12d, 60(%rsp)
	movslq	%ebp, %rbp
	salq	$3, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leal	31(%r13), %eax
	movl	%ebx, 28(%rsp)
	xorl	%r9d, %r9d
	shrl	$5, %eax
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$137438953504, %rdx
	movl	%eax, 32(%rsp)
	movq	28(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L70
	movups	40(%rsp), %xmm1
	movups	56(%rsp), %xmm2
	leaq	88(%rsp), %rsi
	leaq	72(%rsp), %rdi
	movups	%xmm1, 72(%rsp)
	movups	%xmm2, 88(%rsp)
	call	_Z47__device_stub__Z19matPlusScalerKernel6MatrixdS_R6MatrixdS0_
.L70:
	call	cudaThreadSynchronize@PLT
	movq	64(%rsp), %rsi
	movq	(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L71
	call	__stack_chk_fail@PLT
.L71:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z13matPlusScaler6MatrixdS_, .-_Z13matPlusScaler6MatrixdS_
	.globl	_Z41__device_stub__Z12matSubKernel6MatrixS_S_R6MatrixS0_S0_
	.type	_Z41__device_stub__Z12matSubKernel6MatrixS_S_R6MatrixS0_S0_, @function
_Z41__device_stub__Z12matSubKernel6MatrixS_S_R6MatrixS0_S0_:
.LFB2076:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rcx
	movq	%rdi, 48(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 56(%rsp)
	leaq	24(%rsp), %rdi
	leaq	36(%rsp), %rsi
	movq	%rdx, 64(%rsp)
	leaq	8(%rsp), %rdx
	movq	%rax, 24(%rsp)
	movl	$1, 32(%rsp)
	movq	%rax, 36(%rsp)
	movl	$1, 44(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L73
	pushq	16(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z12matSubKernel6MatrixS_S_(%rip), %rdi
	pushq	16(%rsp)
	.cfi_def_cfa_offset 112
	movq	52(%rsp), %rcx
	movl	60(%rsp), %r8d
	movq	40(%rsp), %rsi
	movl	48(%rsp), %edx
	leaq	64(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L73:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L75
	call	__stack_chk_fail@PLT
.L75:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2076:
	.size	_Z41__device_stub__Z12matSubKernel6MatrixS_S_R6MatrixS0_S0_, .-_Z41__device_stub__Z12matSubKernel6MatrixS_S_R6MatrixS0_S0_
	.globl	_Z12matSubKernel6MatrixS_S_
	.type	_Z12matSubKernel6MatrixS_S_, @function
_Z12matSubKernel6MatrixS_S_:
.LFB2077:
	.cfi_startproc
	endbr64
	subq	$56, %rsp
	.cfi_def_cfa_offset 64
	movq	%rdi, 32(%rsp)
	leaq	32(%rsp), %rdi
	movq	%rsi, 40(%rsp)
	leaq	16(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	movq	%rsp, %rdx
	movq	%rcx, 24(%rsp)
	movq	%r8, (%rsp)
	movq	%r9, 8(%rsp)
	call	_Z41__device_stub__Z12matSubKernel6MatrixS_S_R6MatrixS0_S0_
	addq	$56, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2077:
	.size	_Z12matSubKernel6MatrixS_S_, .-_Z12matSubKernel6MatrixS_S_
	.globl	_Z6matSub6MatrixS_S_
	.type	_Z6matSub6MatrixS_S_, @function
_Z6matSub6MatrixS_S_:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rcx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	sarq	$32, %r12
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edi, %ebx
	addl	$31, %ebp
	imull	%r12d, %ebx
	shrl	$5, %ebp
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movq	%r8, 8(%rsp)
	movslq	%ebx, %rbx
	salq	$3, %rbx
	movq	%rbx, %rsi
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	movl	%edi, 40(%rsp)
	leaq	48(%rsp), %rdi
	movl	%r12d, 44(%rsp)
	addl	$31, %r12d
	movq	%rdx, 56(%rsp)
	shrl	$5, %r12d
	call	cudaMalloc@PLT
	movq	48(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	64(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	64(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %r8
	leaq	80(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%r8, 72(%rsp)
	call	cudaMalloc@PLT
	movl	%ebp, 28(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r12d, 32(%rsp)
	movq	28(%rsp), %rdi
	movl	$1, %ecx
	movabsq	$137438953504, %rdx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L80
	movups	40(%rsp), %xmm0
	movups	56(%rsp), %xmm1
	leaq	120(%rsp), %rdx
	leaq	104(%rsp), %rsi
	movups	72(%rsp), %xmm2
	leaq	88(%rsp), %rdi
	movups	%xmm0, 88(%rsp)
	movups	%xmm1, 104(%rsp)
	movups	%xmm2, 120(%rsp)
	call	_Z41__device_stub__Z12matSubKernel6MatrixS_S_R6MatrixS0_S0_
.L80:
	call	cudaThreadSynchronize@PLT
	movq	80(%rsp), %rsi
	movq	%rbx, %rdx
	movq	%r13, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L81
	call	__stack_chk_fail@PLT
.L81:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z6matSub6MatrixS_S_, .-_Z6matSub6MatrixS_S_
	.globl	_Z48__device_stub__Z20matTimesScalerKernel6MatrixdS_R6MatrixdS0_
	.type	_Z48__device_stub__Z20matTimesScalerKernel6MatrixdS_R6MatrixdS0_, @function
_Z48__device_stub__Z20matTimesScalerKernel6MatrixdS_R6MatrixdS0_:
.LFB2078:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movsd	%xmm0, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 64(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 80(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L83
	pushq	32(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z20matTimesScalerKernel6MatrixdS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 128
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	80(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L83:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L85
	call	__stack_chk_fail@PLT
.L85:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2078:
	.size	_Z48__device_stub__Z20matTimesScalerKernel6MatrixdS_R6MatrixdS0_, .-_Z48__device_stub__Z20matTimesScalerKernel6MatrixdS_R6MatrixdS0_
	.globl	_Z20matTimesScalerKernel6MatrixdS_
	.type	_Z20matTimesScalerKernel6MatrixdS_, @function
_Z20matTimesScalerKernel6MatrixdS_:
.LFB2079:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 16(%rsp)
	leaq	16(%rsp), %rdi
	movq	%rsi, 24(%rsp)
	movq	%rsp, %rsi
	movq	%rdx, (%rsp)
	movq	%rcx, 8(%rsp)
	call	_Z48__device_stub__Z20matTimesScalerKernel6MatrixdS_R6MatrixdS0_
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2079:
	.size	_Z20matTimesScalerKernel6MatrixdS_, .-_Z20matTimesScalerKernel6MatrixdS_
	.globl	_Z14matTimesScaler6MatrixdS_
	.type	_Z14matTimesScaler6MatrixdS_, @function
_Z14matTimesScaler6MatrixdS_:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	sarq	$32, %r13
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	imull	%r13d, %r14d
	movq	%rdx, %rbp
	sarq	$32, %r12
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	addl	$31, %ebx
	movslq	%r14d, %r14
	shrl	$5, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	salq	$3, %r14
	movq	%rcx, (%rsp)
	movq	%r14, %rsi
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	movl	%edi, 40(%rsp)
	leaq	48(%rsp), %rdi
	movl	%r13d, 44(%rsp)
	call	cudaMalloc@PLT
	movq	48(%rsp), %rdi
	movq	%r14, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebp, 56(%rsp)
	imull	%r12d, %ebp
	leaq	64(%rsp), %rdi
	movl	%r12d, 60(%rsp)
	movslq	%ebp, %rbp
	salq	$3, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leal	31(%r13), %eax
	movl	%ebx, 28(%rsp)
	xorl	%r9d, %r9d
	shrl	$5, %eax
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$137438953504, %rdx
	movl	%eax, 32(%rsp)
	movq	28(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	movsd	8(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L90
	movups	40(%rsp), %xmm1
	movups	56(%rsp), %xmm2
	leaq	88(%rsp), %rsi
	leaq	72(%rsp), %rdi
	movups	%xmm1, 72(%rsp)
	movups	%xmm2, 88(%rsp)
	call	_Z48__device_stub__Z20matTimesScalerKernel6MatrixdS_R6MatrixdS0_
.L90:
	call	cudaThreadSynchronize@PLT
	movq	64(%rsp), %rsi
	movq	(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L91
	call	__stack_chk_fail@PLT
.L91:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z14matTimesScaler6MatrixdS_, .-_Z14matTimesScaler6MatrixdS_
	.globl	_Z41__device_stub__Z14maxOfMatrixRow6MatrixS_R6MatrixS0_
	.type	_Z41__device_stub__Z14maxOfMatrixRow6MatrixS_R6MatrixS0_, @function
_Z41__device_stub__Z14maxOfMatrixRow6MatrixS_R6MatrixS0_:
.LFB2080:
	.cfi_startproc
	endbr64
	subq	$72, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rdi, 40(%rsp)
	movq	%rsp, %rdx
	movabsq	$4294967297, %rax
	movq	%rsi, 48(%rsp)
	leaq	16(%rsp), %rdi
	leaq	28(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movl	$1, 24(%rsp)
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L93
	pushq	8(%rsp)
	.cfi_def_cfa_offset 88
	leaq	_Z14maxOfMatrixRow6MatrixS_(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 96
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	56(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 88
	popq	%rdx
	.cfi_def_cfa_offset 80
.L93:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L95
	call	__stack_chk_fail@PLT
.L95:
	addq	$72, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2080:
	.size	_Z41__device_stub__Z14maxOfMatrixRow6MatrixS_R6MatrixS0_, .-_Z41__device_stub__Z14maxOfMatrixRow6MatrixS_R6MatrixS0_
	.globl	_Z14maxOfMatrixRow6MatrixS_
	.type	_Z14maxOfMatrixRow6MatrixS_, @function
_Z14maxOfMatrixRow6MatrixS_:
.LFB2081:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 16(%rsp)
	leaq	16(%rsp), %rdi
	movq	%rsi, 24(%rsp)
	movq	%rsp, %rsi
	movq	%rdx, (%rsp)
	movq	%rcx, 8(%rsp)
	call	_Z41__device_stub__Z14maxOfMatrixRow6MatrixS_R6MatrixS0_
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2081:
	.size	_Z14maxOfMatrixRow6MatrixS_, .-_Z14maxOfMatrixRow6MatrixS_
	.globl	_Z35__device_stub__Z10onesKernel6MatrixR6Matrix
	.type	_Z35__device_stub__Z10onesKernel6MatrixR6Matrix, @function
_Z35__device_stub__Z10onesKernel6MatrixR6Matrix:
.LFB2082:
	.cfi_startproc
	endbr64
	subq	$72, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rcx
	movq	%rdi, 48(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rdx
	leaq	36(%rsp), %rsi
	movq	%rax, 24(%rsp)
	leaq	24(%rsp), %rdi
	movl	$1, 32(%rsp)
	movq	%rax, 36(%rsp)
	movl	$1, 44(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L99
	pushq	16(%rsp)
	.cfi_def_cfa_offset 88
	leaq	_Z10onesKernel6Matrix(%rip), %rdi
	pushq	16(%rsp)
	.cfi_def_cfa_offset 96
	movq	52(%rsp), %rcx
	movl	60(%rsp), %r8d
	movq	40(%rsp), %rsi
	movl	48(%rsp), %edx
	leaq	64(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 88
	popq	%rdx
	.cfi_def_cfa_offset 80
.L99:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L101
	call	__stack_chk_fail@PLT
.L101:
	addq	$72, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2082:
	.size	_Z35__device_stub__Z10onesKernel6MatrixR6Matrix, .-_Z35__device_stub__Z10onesKernel6MatrixR6Matrix
	.globl	_Z10onesKernel6Matrix
	.type	_Z10onesKernel6Matrix, @function
_Z10onesKernel6Matrix:
.LFB2083:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, (%rsp)
	movq	%rsp, %rdi
	movq	%rsi, 8(%rsp)
	call	_Z35__device_stub__Z10onesKernel6MatrixR6Matrix
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2083:
	.size	_Z10onesKernel6Matrix, .-_Z10onesKernel6Matrix
	.globl	_Z4ones6Matrix
	.type	_Z4ones6Matrix, @function
_Z4ones6Matrix:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	sarq	$32, %r12
	movl	%edi, %ebp
	imull	%r12d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	addl	$31, %ebx
	shrl	$5, %ebx
	movslq	%ebp, %rbp
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	salq	$3, %rbp
	movl	%edi, 24(%rsp)
	leaq	32(%rsp), %rdi
	movq	%rbp, %rsi
	movl	%r12d, 28(%rsp)
	addl	$31, %r12d
	call	cudaMalloc@PLT
	movq	32(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	shrl	$5, %r12d
	call	cudaMemcpy@PLT
	movl	%ebx, 12(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r12d, 16(%rsp)
	movq	12(%rsp), %rdi
	movl	$1, %ecx
	movabsq	$137438953504, %rdx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L106
	movups	24(%rsp), %xmm0
	leaq	40(%rsp), %rdi
	movups	%xmm0, 40(%rsp)
	call	_Z35__device_stub__Z10onesKernel6MatrixR6Matrix
.L106:
	call	cudaThreadSynchronize@PLT
	movq	32(%rsp), %rsi
	movq	%r13, %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L107
	call	__stack_chk_fail@PLT
.L107:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	_Z4ones6Matrix, .-_Z4ones6Matrix
	.globl	_Z41__device_stub__Z12repmatKernel6MatrixiiS_R6MatrixiiS0_
	.type	_Z41__device_stub__Z12repmatKernel6MatrixiiS_R6MatrixiiS0_, @function
_Z41__device_stub__Z12repmatKernel6MatrixiiS_R6MatrixiiS0_:
.LFB2084:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movl	%esi, 12(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, 8(%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	32(%rsp), %rdi
	movq	%rax, 64(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	movq	%rcx, 80(%rsp)
	leaq	24(%rsp), %rcx
	movq	%rax, 32(%rsp)
	movl	$1, 40(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L109
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z12repmatKernel6MatrixiiS_(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L109:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L111
	call	__stack_chk_fail@PLT
.L111:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2084:
	.size	_Z41__device_stub__Z12repmatKernel6MatrixiiS_R6MatrixiiS0_, .-_Z41__device_stub__Z12repmatKernel6MatrixiiS_R6MatrixiiS0_
	.globl	_Z12repmatKernel6MatrixiiS_
	.type	_Z12repmatKernel6MatrixiiS_, @function
_Z12repmatKernel6MatrixiiS_:
.LFB2085:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 16(%rsp)
	leaq	16(%rsp), %rdi
	movq	%rsi, 24(%rsp)
	movl	%edx, %esi
	movl	%ecx, %edx
	movq	%rsp, %rcx
	movq	%r8, (%rsp)
	movq	%r9, 8(%rsp)
	call	_Z41__device_stub__Z12repmatKernel6MatrixiiS_R6MatrixiiS0_
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2085:
	.size	_Z12repmatKernel6MatrixiiS_, .-_Z12repmatKernel6MatrixiiS_
	.globl	_Z40__device_stub__Z13reshapeKernel6MatrixS_R6MatrixS0_
	.type	_Z40__device_stub__Z13reshapeKernel6MatrixS_R6MatrixS0_, @function
_Z40__device_stub__Z13reshapeKernel6MatrixS_R6MatrixS0_:
.LFB2086:
	.cfi_startproc
	endbr64
	subq	$72, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rdi, 40(%rsp)
	movq	%rsp, %rdx
	movabsq	$4294967297, %rax
	movq	%rsi, 48(%rsp)
	leaq	16(%rsp), %rdi
	leaq	28(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movl	$1, 24(%rsp)
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L115
	pushq	8(%rsp)
	.cfi_def_cfa_offset 88
	leaq	_Z13reshapeKernel6MatrixS_(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 96
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	56(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 88
	popq	%rdx
	.cfi_def_cfa_offset 80
.L115:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L117
	call	__stack_chk_fail@PLT
.L117:
	addq	$72, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2086:
	.size	_Z40__device_stub__Z13reshapeKernel6MatrixS_R6MatrixS0_, .-_Z40__device_stub__Z13reshapeKernel6MatrixS_R6MatrixS0_
	.globl	_Z13reshapeKernel6MatrixS_
	.type	_Z13reshapeKernel6MatrixS_, @function
_Z13reshapeKernel6MatrixS_:
.LFB2087:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 16(%rsp)
	leaq	16(%rsp), %rdi
	movq	%rsi, 24(%rsp)
	movq	%rsp, %rsi
	movq	%rdx, (%rsp)
	movq	%rcx, 8(%rsp)
	call	_Z40__device_stub__Z13reshapeKernel6MatrixS_R6MatrixS0_
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2087:
	.size	_Z13reshapeKernel6MatrixS_, .-_Z13reshapeKernel6MatrixS_
	.globl	_Z7reshape6MatrixS_
	.type	_Z7reshape6MatrixS_, @function
_Z7reshape6MatrixS_:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	sarq	$32, %r13
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	imull	%r13d, %r14d
	movq	%rdx, %rbp
	sarq	$32, %r12
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	addl	$31, %ebx
	movslq	%r14d, %r14
	shrl	$5, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	salq	$3, %r14
	movq	%rcx, 8(%rsp)
	movq	%r14, %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	movl	%edi, 40(%rsp)
	leaq	48(%rsp), %rdi
	movl	%r13d, 44(%rsp)
	call	cudaMalloc@PLT
	movq	48(%rsp), %rdi
	movq	%r14, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebp, 56(%rsp)
	imull	%r12d, %ebp
	leaq	64(%rsp), %rdi
	movl	%r12d, 60(%rsp)
	movslq	%ebp, %rbp
	salq	$3, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leal	31(%r13), %eax
	movl	%ebx, 28(%rsp)
	xorl	%r9d, %r9d
	shrl	$5, %eax
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$137438953504, %rdx
	movl	%eax, 32(%rsp)
	movq	28(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L122
	movups	40(%rsp), %xmm0
	movups	56(%rsp), %xmm1
	leaq	88(%rsp), %rsi
	leaq	72(%rsp), %rdi
	movups	%xmm0, 72(%rsp)
	movups	%xmm1, 88(%rsp)
	call	_Z40__device_stub__Z13reshapeKernel6MatrixS_R6MatrixS0_
.L122:
	call	cudaThreadSynchronize@PLT
	movq	64(%rsp), %rsi
	movq	8(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L123
	call	__stack_chk_fail@PLT
.L123:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	_Z7reshape6MatrixS_, .-_Z7reshape6MatrixS_
	.globl	_Z47__device_stub__Z20sumOfMatrixColKernel6MatrixS_R6MatrixS0_
	.type	_Z47__device_stub__Z20sumOfMatrixColKernel6MatrixS_R6MatrixS0_, @function
_Z47__device_stub__Z20sumOfMatrixColKernel6MatrixS_R6MatrixS0_:
.LFB2088:
	.cfi_startproc
	endbr64
	subq	$72, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rdi, 40(%rsp)
	movq	%rsp, %rdx
	movabsq	$4294967297, %rax
	movq	%rsi, 48(%rsp)
	leaq	16(%rsp), %rdi
	leaq	28(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movl	$1, 24(%rsp)
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L125
	pushq	8(%rsp)
	.cfi_def_cfa_offset 88
	leaq	_Z20sumOfMatrixColKernel6MatrixS_(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 96
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	56(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 88
	popq	%rdx
	.cfi_def_cfa_offset 80
.L125:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L127
	call	__stack_chk_fail@PLT
.L127:
	addq	$72, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2088:
	.size	_Z47__device_stub__Z20sumOfMatrixColKernel6MatrixS_R6MatrixS0_, .-_Z47__device_stub__Z20sumOfMatrixColKernel6MatrixS_R6MatrixS0_
	.globl	_Z20sumOfMatrixColKernel6MatrixS_
	.type	_Z20sumOfMatrixColKernel6MatrixS_, @function
_Z20sumOfMatrixColKernel6MatrixS_:
.LFB2089:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 16(%rsp)
	leaq	16(%rsp), %rdi
	movq	%rsi, 24(%rsp)
	movq	%rsp, %rsi
	movq	%rdx, (%rsp)
	movq	%rcx, 8(%rsp)
	call	_Z47__device_stub__Z20sumOfMatrixColKernel6MatrixS_R6MatrixS0_
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2089:
	.size	_Z20sumOfMatrixColKernel6MatrixS_, .-_Z20sumOfMatrixColKernel6MatrixS_
	.globl	_Z14sumOfMatrixCol6MatrixS_
	.type	_Z14sumOfMatrixCol6MatrixS_, @function
_Z14sumOfMatrixCol6MatrixS_:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdx, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	sarq	$32, %r15
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	sarq	$32, %rbp
	movq	%rdx, %rbx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	movl	%ebp, 28(%rsp)
	imull	%edi, %ebp
	movl	%edi, 24(%rsp)
	leaq	32(%rsp), %rdi
	movslq	%ebp, %rbp
	salq	$3, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movq	32(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebx, 40(%rsp)
	imull	%r15d, %ebx
	leaq	48(%rsp), %rdi
	movl	%r15d, 44(%rsp)
	movslq	%ebx, %rbx
	salq	$3, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	leal	1023(%r14), %eax
	salq	$10, %rdx
	movl	$1, %ecx
	shrl	$10, %eax
	movl	%eax, 12(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 16(%rsp)
	movq	12(%rsp), %rdi
	movl	20(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L132
	movups	24(%rsp), %xmm0
	movups	40(%rsp), %xmm1
	leaq	72(%rsp), %rsi
	leaq	56(%rsp), %rdi
	movups	%xmm0, 56(%rsp)
	movups	%xmm1, 72(%rsp)
	call	_Z47__device_stub__Z20sumOfMatrixColKernel6MatrixS_R6MatrixS0_
.L132:
	call	cudaThreadSynchronize@PLT
	movq	48(%rsp), %rsi
	movq	%rbx, %rdx
	movq	%r12, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L133
	call	__stack_chk_fail@PLT
.L133:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2037:
	.size	_Z14sumOfMatrixCol6MatrixS_, .-_Z14sumOfMatrixCol6MatrixS_
	.globl	_Z42__device_stub__Z15transposeKernel6MatrixS_R6MatrixS0_
	.type	_Z42__device_stub__Z15transposeKernel6MatrixS_R6MatrixS0_, @function
_Z42__device_stub__Z15transposeKernel6MatrixS_R6MatrixS0_:
.LFB2090:
	.cfi_startproc
	endbr64
	subq	$72, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rdi, 40(%rsp)
	movq	%rsp, %rdx
	movabsq	$4294967297, %rax
	movq	%rsi, 48(%rsp)
	leaq	16(%rsp), %rdi
	leaq	28(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movl	$1, 24(%rsp)
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L135
	pushq	8(%rsp)
	.cfi_def_cfa_offset 88
	leaq	_Z15transposeKernel6MatrixS_(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 96
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	56(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 88
	popq	%rdx
	.cfi_def_cfa_offset 80
.L135:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L137
	call	__stack_chk_fail@PLT
.L137:
	addq	$72, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2090:
	.size	_Z42__device_stub__Z15transposeKernel6MatrixS_R6MatrixS0_, .-_Z42__device_stub__Z15transposeKernel6MatrixS_R6MatrixS0_
	.globl	_Z15transposeKernel6MatrixS_
	.type	_Z15transposeKernel6MatrixS_, @function
_Z15transposeKernel6MatrixS_:
.LFB2091:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 16(%rsp)
	leaq	16(%rsp), %rdi
	movq	%rsi, 24(%rsp)
	movq	%rsp, %rsi
	movq	%rdx, (%rsp)
	movq	%rcx, 8(%rsp)
	call	_Z42__device_stub__Z15transposeKernel6MatrixS_R6MatrixS0_
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2091:
	.size	_Z15transposeKernel6MatrixS_, .-_Z15transposeKernel6MatrixS_
	.globl	_Z9transpose6MatrixS_
	.type	_Z9transpose6MatrixS_, @function
_Z9transpose6MatrixS_:
.LFB2038:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdx, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	sarq	$32, %r12
	movl	%edi, %ebp
	imull	%r12d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	addl	$31, %ebx
	shrl	$5, %ebx
	movslq	%ebp, %rbp
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	salq	$3, %rbp
	movl	%edi, 24(%rsp)
	leaq	32(%rsp), %rdi
	movq	%rbp, %rsi
	movl	%r12d, 28(%rsp)
	addl	$31, %r12d
	call	cudaMalloc@PLT
	movq	%rbp, %rdx
	movq	32(%rsp), %rdi
	movq	%r15, %rbp
	sarq	$32, %rbp
	movl	$1, %ecx
	movq	%r14, %rsi
	shrl	$5, %r12d
	call	cudaMemcpy@PLT
	movl	%ebp, 44(%rsp)
	imull	%r15d, %ebp
	leaq	48(%rsp), %rdi
	movl	%r15d, 40(%rsp)
	movslq	%ebp, %rbp
	salq	$3, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movl	%ebx, 12(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r12d, 16(%rsp)
	movq	12(%rsp), %rdi
	movl	$1, %ecx
	movabsq	$137438953504, %rdx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L142
	movups	24(%rsp), %xmm0
	movups	40(%rsp), %xmm1
	leaq	72(%rsp), %rsi
	leaq	56(%rsp), %rdi
	movups	%xmm0, 56(%rsp)
	movups	%xmm1, 72(%rsp)
	call	_Z42__device_stub__Z15transposeKernel6MatrixS_R6MatrixS0_
.L142:
	call	cudaThreadSynchronize@PLT
	movq	48(%rsp), %rsi
	movq	%rbp, %rdx
	movq	%r13, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L143
	call	__stack_chk_fail@PLT
.L143:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2038:
	.size	_Z9transpose6MatrixS_, .-_Z9transpose6MatrixS_
	.globl	_Z36__device_stub__Z11zerosKernel6MatrixR6Matrix
	.type	_Z36__device_stub__Z11zerosKernel6MatrixR6Matrix, @function
_Z36__device_stub__Z11zerosKernel6MatrixR6Matrix:
.LFB2092:
	.cfi_startproc
	endbr64
	subq	$72, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rcx
	movq	%rdi, 48(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rdx
	leaq	36(%rsp), %rsi
	movq	%rax, 24(%rsp)
	leaq	24(%rsp), %rdi
	movl	$1, 32(%rsp)
	movq	%rax, 36(%rsp)
	movl	$1, 44(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L145
	pushq	16(%rsp)
	.cfi_def_cfa_offset 88
	leaq	_Z11zerosKernel6Matrix(%rip), %rdi
	pushq	16(%rsp)
	.cfi_def_cfa_offset 96
	movq	52(%rsp), %rcx
	movl	60(%rsp), %r8d
	movq	40(%rsp), %rsi
	movl	48(%rsp), %edx
	leaq	64(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 88
	popq	%rdx
	.cfi_def_cfa_offset 80
.L145:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L147
	call	__stack_chk_fail@PLT
.L147:
	addq	$72, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2092:
	.size	_Z36__device_stub__Z11zerosKernel6MatrixR6Matrix, .-_Z36__device_stub__Z11zerosKernel6MatrixR6Matrix
	.globl	_Z11zerosKernel6Matrix
	.type	_Z11zerosKernel6Matrix, @function
_Z11zerosKernel6Matrix:
.LFB2093:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, (%rsp)
	movq	%rsp, %rdi
	movq	%rsi, 8(%rsp)
	call	_Z36__device_stub__Z11zerosKernel6MatrixR6Matrix
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2093:
	.size	_Z11zerosKernel6Matrix, .-_Z11zerosKernel6Matrix
	.globl	_Z5zeros6Matrix
	.type	_Z5zeros6Matrix, @function
_Z5zeros6Matrix:
.LFB2039:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	sarq	$32, %r12
	movl	%edi, %ebp
	imull	%r12d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	addl	$31, %ebx
	shrl	$5, %ebx
	movslq	%ebp, %rbp
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	salq	$3, %rbp
	movl	%edi, 24(%rsp)
	leaq	32(%rsp), %rdi
	movq	%rbp, %rsi
	movl	%r12d, 28(%rsp)
	addl	$31, %r12d
	call	cudaMalloc@PLT
	movq	32(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	shrl	$5, %r12d
	call	cudaMemcpy@PLT
	movl	%ebx, 12(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r12d, 16(%rsp)
	movq	12(%rsp), %rdi
	movl	$1, %ecx
	movabsq	$137438953504, %rdx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L152
	movups	24(%rsp), %xmm0
	leaq	40(%rsp), %rdi
	movups	%xmm0, 40(%rsp)
	call	_Z36__device_stub__Z11zerosKernel6MatrixR6Matrix
.L152:
	call	cudaThreadSynchronize@PLT
	movq	32(%rsp), %rsi
	movq	%r13, %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L153
	call	__stack_chk_fail@PLT
.L153:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2039:
	.size	_Z5zeros6Matrix, .-_Z5zeros6Matrix
	.section	.rodata.str1.1
.LC4:
	.string	"_Z11zerosKernel6Matrix"
.LC5:
	.string	"_Z15transposeKernel6MatrixS_"
.LC6:
	.string	"_Z20sumOfMatrixColKernel6MatrixS_"
.LC7:
	.string	"_Z13reshapeKernel6MatrixS_"
.LC8:
	.string	"_Z12repmatKernel6MatrixiiS_"
.LC9:
	.string	"_Z10onesKernel6Matrix"
.LC10:
	.string	"_Z14maxOfMatrixRow6MatrixS_"
.LC11:
	.string	"_Z20matTimesScalerKernel6MatrixdS_"
.LC12:
	.string	"_Z12matSubKernel6MatrixS_S_"
.LC13:
	.string	"_Z19matPlusScalerKernel6MatrixdS_"
.LC14:
	.string	"_Z12matDivKernel6MatrixS_S_"
.LC15:
	.string	"_Z12matAddKernel6MatrixS_S_"
.LC16:
	.string	"_Z17isSymmetricKernel6MatrixPi"
.LC17:
	.string	"_Z12getRowKernel6MatrixS_i"
.LC18:
	.string	"_Z12getColKernel6MatrixS_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2095:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11zerosKernel6Matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z15transposeKernel6MatrixS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20sumOfMatrixColKernel6MatrixS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13reshapeKernel6MatrixS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12repmatKernel6MatrixiiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10onesKernel6Matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14maxOfMatrixRow6MatrixS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z20matTimesScalerKernel6MatrixdS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC12(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	movq	%rdx, %rcx
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z12matSubKernel6MatrixS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z19matPlusScalerKernel6MatrixdS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12matDivKernel6MatrixS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12matAddKernel6MatrixS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17isSymmetricKernel6MatrixPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12getRowKernel6MatrixS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12getColKernel6MatrixS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2095:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <float.h>
#include <limits.h>

#pragma once
#include <hip/hip_runtime.h>

#define BLOCK_SIZE 32
#define BLOCK_SIZE_DIM1 1024

// Matrices are stored in row-major order:
// M(row, col) = *(M.elements + row * M.width + col)
typedef struct {
  int width;
  int height;
	double* elements;
} Matrix;

//function to print a matrix
void printMatrix(Matrix A) {
	printf("\n");
	for (int i=0; i<A.height; i++) {
		for (int j=0; j<A.width; j++) {
			printf("%.4f ", A.elements[i*A.width+j]); 
		}
		printf("\n");
	}
	printf("\n");
}

// function to save matrix in an ascii file */
void saveMatrix(Matrix A, char *filename) {
	FILE *fp;
	fp = fopen(filename, "w");
	for (int i=0; i<A.height; i++) {
		for (int j=0; j<A.width; j++) {
			fprintf(fp, "%.4f ", A.elements[i*A.width+j]); 
		}
		fprintf(fp, "\n");
	}
	fclose(fp);
}


/*** matlib functions listed in alphabetical order *****/


/************************ G ************************/
// matrix getCol kernel
__global__
void getColKernel(Matrix d_In, Matrix d_Out, int num) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_In.height || col >= d_In.width) return;
	if(col == num) 
		d_Out.elements[row] = d_In.elements[row*d_In.width+col];
}

void getCol(Matrix In, Matrix Out, int num) {
	//printf("getCol()\n");
	// load In to device memory
	Matrix d_In;
	d_In.width = In.width;
	d_In.height = In.height;
	size_t size = In.width * In.height * sizeof(double);
	hipError_t err = hipMalloc(&d_In.elements, size);
	//printf("CUDA malloc In: %s\n", cudaGetErrorString(err));	
	hipMemcpy(d_In.elements, In.elements, size, hipMemcpyHostToDevice);	
	//printf("Copy input matrix to device: %s\n", cudaGetErrorString(err));
	
	// allocate Out in device memory
	Matrix d_Out;
  d_Out.width = Out.width; d_Out.height = Out.height;
  size = Out.width * Out.height * sizeof(double);
  err = hipMalloc(&d_Out.elements, size);
  //printf("CUDA malloc Out: %s\n", cudaGetErrorString(err));	

	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (In.width + dimBlock.x - 1)/dimBlock.x, (In.height + dimBlock.y - 1)/dimBlock.y );
	getColKernel<<<dimGrid, dimBlock>>>(d_In, d_Out, num);
	err = hipDeviceSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read Out from device memory
	err = hipMemcpy(Out.elements, d_Out.elements, size, hipMemcpyDeviceToHost);
	//printf("Copy output matrix off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	hipFree(d_In.elements);
	hipFree(d_Out.elements);
}

// matrix getRow kernel
__global__
void getRowKernel(Matrix d_In, Matrix d_Out, int num) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_In.height || col >= d_In.width) return;
	if(row == num) 
		d_Out.elements[col] = d_In.elements[row*d_In.width+col];
}

/************************ I ************************/

// check if a square matrix is symmetric
__global__
void isSymmetricKernel(Matrix d_A, int *d_result) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_A.height || col >= d_A.width) return;
	if(d_A.elements[row*d_A.width+col] != d_A.elements[row + col*d_A.width])
		*(d_result) = 0;
}

int isSymmetric(Matrix A) {
	//printf("isSymmetric()\n");
	// load A to device memory
	Matrix d_A;
	d_A.width = A.width;
	d_A.height = A.height;
	size_t size = A.width * A.height * sizeof(double);
	hipError_t err = hipMalloc(&d_A.elements, size);
	//printf("CUDA malloc A: %s\n", cudaGetErrorString(err));	
	hipMemcpy(d_A.elements, A.elements, size, hipMemcpyHostToDevice);
	//printf("Copy A to device: %s\n", cudaGetErrorString(err));

	// load result to device memory
	int result = 1;
	int *d_result;
	err = hipMalloc(&d_result, sizeof(int));
	//printf("CUDA malloc d_result: %s\n", cudaGetErrorString(err));	
	hipMemcpy(d_result, &result, sizeof(int), hipMemcpyHostToDevice);	
	//printf("Copy result to device: %s\n", cudaGetErrorString(err));

	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (A.width + dimBlock.x - 1)/dimBlock.x, (A.height + dimBlock.y - 1)/dimBlock.y );
	isSymmetricKernel<<<dimGrid, dimBlock>>>(d_A, d_result);
	err = hipDeviceSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	//read result from fdevice memory
	err = hipMemcpy(&result, d_result, sizeof(int), hipMemcpyDeviceToHost);
	//printf("Copy result off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	hipFree(d_A.elements);
	hipFree(d_result);

	return result;
}

/************************ M ************************/

// matAdd kernel
__global__
void matAddKernel(Matrix d_A, Matrix d_B, Matrix d_C) {
	int col = blockIdx.y * blockDim.y + threadIdx.y;
	int row = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_A.height || col >= d_A.width) return;
	d_C.elements[row*d_C.width + col] = d_A.elements[row*d_A.width + col] + d_B.elements[row*d_B.width + col];
}

// matrix matDiv kernel called by matDiv()
__global__
void matDivKernel(Matrix d_A, Matrix d_B, Matrix d_Out) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	int idx = row*d_A.width+col;
	if(row > d_A.height || col > d_A.width) return;
	d_Out.elements[idx] = d_A.elements[idx] / d_B.elements[idx];
}

void matDiv(Matrix A, Matrix B, Matrix Out) {
	//printf("matDiv()\n");
	if (A.width != B.width || A.height != B.height) {
		printf("Input matrices must have the same dimension!\n");
		return;
	}
	// load A to device memory
	Matrix d_A;
	d_A.width = A.width;
	d_A.height = A.height;
	size_t size = A.width * A.height * sizeof(double);
	hipError_t err = hipMalloc(&d_A.elements, size);
	//printf("CUDA malloc A: %s\n", cudaGetErrorString(err));	
	hipMemcpy(d_A.elements, A.elements, size, hipMemcpyHostToDevice);	
	//printf("Copy input matrix A to device: %s\n", cudaGetErrorString(err));
	
	// load B to device memory
	Matrix d_B;
	d_B.width = B.width;
	d_B.height = B.height;
	err = hipMalloc(&d_B.elements, size);
	//printf("CUDA malloc B: %s\n", cudaGetErrorString(err));	
	hipMemcpy(d_B.elements, B.elements, size, hipMemcpyHostToDevice);	
	//printf("Copy input matrix B to device: %s\n", cudaGetErrorString(err));
	
	// allocate Out in device memory
	Matrix d_Out;
  d_Out.width = Out.width; d_Out.height = Out.height;
  size = Out.width * Out.height * sizeof(double);
  hipMalloc(&d_Out.elements, size);

	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (A.width + dimBlock.x - 1)/dimBlock.x, (A.height + dimBlock.y - 1)/dimBlock.y );
	matDivKernel<<<dimGrid, dimBlock>>>(d_A, d_B, d_Out);
	err = hipDeviceSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read Out from device memory
	err = hipMemcpy(Out.elements, d_Out.elements, size, hipMemcpyDeviceToHost);
	//printf("Copy output matrix off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	hipFree(d_A.elements);
	hipFree(d_B.elements);
	hipFree(d_Out.elements);

}

// matrix matPlusScaler kernel called by matPlusScaler()
__global__
void matPlusScalerKernel(Matrix d_In, double scaler, Matrix d_Out) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_In.height || col >= d_In.width) return;
	int idx = row * d_In.width +  col;
	d_Out.elements[idx] = d_In.elements[idx] + scaler;
}

void matPlusScaler(Matrix In, double scaler, Matrix Out) {
	//printf("matPlusScaler()\n");
	// load In to device memory
	Matrix d_In;
	d_In.width = In.width;
	d_In.height = In.height;
	size_t size = In.width * In.height * sizeof(double);
	hipError_t err = hipMalloc(&d_In.elements, size);
	//printf("CUDA malloc In: %s\n", cudaGetErrorString(err));	
	hipMemcpy(d_In.elements, In.elements, size, hipMemcpyHostToDevice);	
	//printf("Copy input matrix to device: %s\n", cudaGetErrorString(err));
	
	// allocate Out in device memory
	Matrix d_Out;
  d_Out.width = Out.width; d_Out.height = Out.height;
  size = Out.width * Out.height * sizeof(double);
  hipMalloc(&d_Out.elements, size);

	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (In.width + dimBlock.x - 1)/dimBlock.x, (In.height + dimBlock.y - 1)/dimBlock.y );
	matPlusScalerKernel<<<dimGrid, dimBlock>>>(d_In, scaler, d_Out);
	err = hipDeviceSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read Out from device memory
	err = hipMemcpy(Out.elements, d_Out.elements, size, hipMemcpyDeviceToHost);
	//printf("Copy output matrix off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	hipFree(d_In.elements);
	hipFree(d_Out.elements);

}

// matSub kernel
__global__
void matSubKernel(Matrix d_A, Matrix d_B, Matrix d_C) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_A.height || col >= d_A.width) return;
	d_C.elements[row*d_A.width + col] = d_A.elements[row*d_A.width + col] - d_B.elements[row*d_A.width + col];
}

void matSub(Matrix A, Matrix B, Matrix C){
	//printf("matSub()\n");
	// load A, B to device memory
	Matrix d_A;
	Matrix d_B;
	d_A.width = A.width;
	d_B.width = B.width;
	d_A.height = A.height;
	d_B.height = B.height;
	size_t size = A.width * A.height * sizeof(double);

	hipError_t err = hipMalloc(&d_A.elements, size);
	//printf("CUDA malloc A: %s\n", cudaGetErrorString(err));
	hipMemcpy(d_A.elements, A.elements, size, hipMemcpyHostToDevice);
	//printf("Copy A to device: %s\n", cudaGetErrorString(err));

	err = hipMalloc(&d_B.elements, size);
	//printf("CUDA malloc B: %s\n", cudaGetErrorString(err));
	hipMemcpy(d_B.elements, B.elements, size, hipMemcpyHostToDevice);
	//printf("Copy B to device: %s\n", cudaGetErrorString(err));
	
	// allocate C to device memory
	Matrix d_C;
	d_C.width = C.width;
	d_C.height = C.height;
	err = hipMalloc(&d_C.elements, size);
	//printf("CUDA malloc C: %s\n", cudaGetErrorString(err));

	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (A.width + dimBlock.x - 1)/dimBlock.x, (A.height + dimBlock.y - 1)/dimBlock.y );
	matSubKernel<<<dimGrid, dimBlock>>>(d_A, d_B, d_C);
	err = hipDeviceSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read C from device memory
	err = hipMemcpy(C.elements, d_C.elements, size, hipMemcpyDeviceToHost);
	//printf("Copy C off of device: %s\n", cudaGetErrorString(err));

// free device memory
	hipFree(d_A.elements);
	hipFree(d_B.elements);
	hipFree(d_C.elements);
}

// matrix matTimesScaler kernel called by matTimesScaler()
__global__
void matTimesScalerKernel(Matrix d_In, double scaler, Matrix d_Out) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_In.height || col >= d_In.width) return;
	int idx = row * d_In.width +  col;
	d_Out.elements[idx] = d_In.elements[idx] * scaler;
}

void matTimesScaler(Matrix In, double scaler, Matrix Out) {
	//printf("matTimesScaler()\n");
	// load In to device memory
	Matrix d_In;
	d_In.width = In.width;
	d_In.height = In.height;
	size_t size = In.width * In.height * sizeof(double);
	hipError_t err = hipMalloc(&d_In.elements, size);
	//printf("CUDA malloc In: %s\n", cudaGetErrorString(err));	
	hipMemcpy(d_In.elements, In.elements, size, hipMemcpyHostToDevice);	
	//printf("Copy input matrix to device: %s\n", cudaGetErrorString(err));
	
	// allocate Out in device memory
	Matrix d_Out;
  d_Out.width = Out.width; d_Out.height = Out.height;
  size = Out.width * Out.height * sizeof(double);
  hipMalloc(&d_Out.elements, size);

	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (In.width + dimBlock.x - 1)/dimBlock.x, (In.height + dimBlock.y - 1)/dimBlock.y );
	matTimesScalerKernel<<<dimGrid, dimBlock>>>(d_In, scaler, d_Out);
	err = hipDeviceSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read Out from device memory
	err = hipMemcpy(Out.elements, d_Out.elements, size, hipMemcpyDeviceToHost);
	//printf("Copy output matrix off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	hipFree(d_In.elements);
	hipFree(d_Out.elements);
}

// need a better parallelized version
__global__
void maxOfMatrixRow(Matrix d_A, Matrix d_col) {
	int row = blockIdx.x * blockDim.x + threadIdx.x;
	double max = d_A.elements[row*d_A.width];
	for (int col=0; col<d_A.width; col++) {
		max = (d_A.elements[row*d_A.width+col] > max)? d_A.elements[row*d_A.width+col] : max;
	}
	d_col.elements[row] = max;
}

/************************ O ************************/
// matrix ones kernel called by ones()
__global__
void onesKernel(Matrix d_A) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row > d_A.height || col > d_A.width) return;
	d_A.elements[row*d_A.width+col] = 1;
}

void ones(Matrix A) {
	// load A to device memory
	Matrix d_A;
	d_A.width = A.width;
	d_A.height = A.height;
	size_t size = A.width * A.height * sizeof(double);
	hipError_t err = hipMalloc(&d_A.elements, size);
	//printf("CUDA malloc A: %s\n", cudaGetErrorString(err));	
	hipMemcpy(d_A.elements, A.elements, size, hipMemcpyHostToDevice);	
	//printf("Copy A to device: %s\n", cudaGetErrorString(err));
	
	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (A.width + dimBlock.x - 1)/dimBlock.x, (A.height + dimBlock.y - 1)/dimBlock.y );
	onesKernel<<<dimGrid, dimBlock>>>(d_A);
	err = hipDeviceSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read A from device memory
	err = hipMemcpy(A.elements, d_A.elements, size, hipMemcpyDeviceToHost);
	//printf("Copy C off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	hipFree(d_A.elements);
}


/************************ R ************************/

//create an m-by-n tiling of a given matrix
__global__
void repmatKernel(Matrix d_A, int m, int n, Matrix d_B) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_A.height || col >= d_A.width) return;
	for(int i=0; i < m; i++) {
		for(int j=0; j < n; j++) {
			d_B.elements[(row + i*d_A.height)*d_B.width + (col + j*d_A.width)] = d_A.elements[row*d_A.width + col];
		}
	}
}

// matrix reshape kernel called by reshape()
__global__
void reshapeKernel(Matrix d_In, Matrix d_Out) {
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	if(y >= d_In.height || x >= d_In.width) return;
	int c = x * d_In.height + y;
	d_Out.elements[(c%d_Out.height)*d_Out.width+(c/d_Out.height)] = d_In.elements[(c%d_In.height)*d_In.width+(c/d_In.height)];

}

void reshape(Matrix In, Matrix Out) {
	//printf("reshape()\n");
	// load In to device memory
	Matrix d_In;
	d_In.width = In.width;
	d_In.height = In.height;
	size_t size = In.width * In.height * sizeof(double);
	hipError_t err = hipMalloc(&d_In.elements, size);
	//printf("CUDA malloc In: %s\n", cudaGetErrorString(err));	
	hipMemcpy(d_In.elements, In.elements, size, hipMemcpyHostToDevice);	
	//printf("Copy input matrix to device: %s\n", cudaGetErrorString(err));
	
	// allocate Out in device memory
	Matrix d_Out;
	d_Out.width = Out.width; d_Out.height = Out.height;
	size = Out.width * Out.height * sizeof(double);
	hipMalloc(&d_Out.elements, size);

	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (In.width + dimBlock.x - 1)/dimBlock.x, (In.height + dimBlock.y - 1)/dimBlock.y );
	reshapeKernel<<<dimGrid, dimBlock>>>(d_In, d_Out);
	err = hipDeviceSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read Out from device memory
	err = hipMemcpy(Out.elements, d_Out.elements, size, hipMemcpyDeviceToHost);
	//printf("Copy output matrix off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	hipFree(d_In.elements);
	hipFree(d_Out.elements);
}

/************************ S ************************/
__global__
void sumOfMatrixColKernel(Matrix d_A, Matrix d_row) {
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(col >= d_A.width) return;
	for (int row=0; row<d_A.height; row++) {
		d_row.elements[col] += d_A.elements[row*d_A.width+col];
	}
}

void sumOfMatrixCol(Matrix In, Matrix Out) {
	// load In to device memory
	Matrix d_In;
	d_In.width = In.width;
	d_In.height = In.height;
	size_t size = In.width * In.height * sizeof(double);
	hipError_t err = hipMalloc(&d_In.elements, size);
	//printf("CUDA malloc In: %s\n", cudaGetErrorString(err));	
	hipMemcpy(d_In.elements, In.elements, size, hipMemcpyHostToDevice);	
	//printf("Copy input matrix to device: %s\n", cudaGetErrorString(err));
	
	// allocate Out in device memory
	Matrix d_Out;
	d_Out.width = Out.width; d_Out.height = Out.height;
	size = Out.width * Out.height * sizeof(double);
	hipMalloc(&d_Out.elements, size);

	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE_DIM1);
	dim3 dimGrid( (In.width + dimBlock.x - 1)/dimBlock.x );
	sumOfMatrixColKernel<<<dimGrid, dimBlock>>>(d_In, d_Out);
	err = hipDeviceSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read Out from device memory
	err = hipMemcpy(Out.elements, d_Out.elements, size, hipMemcpyDeviceToHost);
	//printf("Copy output matrix off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	hipFree(d_In.elements);
	hipFree(d_Out.elements);
}

/************************ T ************************/

//matrix transpose kernel
__global__
void transposeKernel(Matrix d_A, Matrix d_B){
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_A.height || col >= d_A.width) return;
	d_B.elements[col*d_B.width+row] = d_A.elements[row*d_A.width+col];
}

void transpose(Matrix In, Matrix Out) {
	//printf("transpose()\n");
	// load In to device memory
	Matrix d_In;
	d_In.width = In.width;
	d_In.height = In.height;
	size_t size = In.width * In.height * sizeof(double);

	hipError_t err = hipMalloc(&d_In.elements, size);
	//printf("CUDA malloc In: %s\n", cudaGetErrorString(err));
	hipMemcpy(d_In.elements, In.elements, size, hipMemcpyHostToDevice);
	//printf("Copy In to device: %s\n", cudaGetErrorString(err));

	// allocate Out on device memory
	Matrix d_Out;
	d_Out.width = Out.width;
	d_Out.height = Out.height;
	size = d_Out.width * d_Out.height * sizeof(double);
	err = hipMalloc(&d_Out.elements, size);
	//printf("CUDA malloc d_Out: %s\n", cudaGetErrorString(err));

	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (In.width + dimBlock.x - 1)/dimBlock.x, (In.height + dimBlock.y - 1)/dimBlock.y );
	transposeKernel<<<dimGrid, dimBlock>>>(d_In, d_Out);
	err = hipDeviceSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read Out from device memory
	err = hipMemcpy(Out.elements, d_Out.elements, size, hipMemcpyDeviceToHost);
	//printf("Copy d_Out off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	hipFree(d_In.elements);
	hipFree(d_Out.elements);
}

/************************ Z ************************/

// matrix zeros kernel called by zeros()
__global__
void zerosKernel(Matrix d_A) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	if(row >= d_A.height || col >= d_A.width) return;
	d_A.elements[row*d_A.width+col] = 0;
}

void zeros(Matrix A) {
	// load A to device memory
	Matrix d_A;
	d_A.width = A.width;
	d_A.height = A.height;
	size_t size = A.width * A.height * sizeof(double);
	hipError_t err = hipMalloc(&d_A.elements, size);
	//printf("CUDA malloc A: %s\n", cudaGetErrorString(err));	
	hipMemcpy(d_A.elements, A.elements, size, hipMemcpyHostToDevice);	
	//printf("Copy A to device: %s\n", cudaGetErrorString(err));
	
	// invoke kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid( (A.width + dimBlock.x - 1)/dimBlock.x, (A.height + dimBlock.y - 1)/dimBlock.y );
	zerosKernel<<<dimGrid, dimBlock>>>(d_A);
	err = hipDeviceSynchronize();
	//printf("Run kernel: %s\n", cudaGetErrorString(err));

	// read A from device memory
	err = hipMemcpy(A.elements, d_A.elements, size, hipMemcpyDeviceToHost);
	//printf("Copy A off of device: %s\n",cudaGetErrorString(err));

	// free device memory
	hipFree(d_A.elements);
}


	.text
	.file	"matlib.hip"
	.globl	_Z11printMatrix6Matrix          # -- Begin function _Z11printMatrix6Matrix
	.type	_Z11printMatrix6Matrix,@function
_Z11printMatrix6Matrix:                 # @_Z11printMatrix6Matrix
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	movq	%rdi, %r14
	movq	%rdi, %rbx
	shrq	$32, %rbx
	movl	$10, %edi
	callq	putchar@PLT
	movq	%rbx, 16(%rsp)                  # 8-byte Spill
	testl	%ebx, %ebx
	jle	.LBB0_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%r14d, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB0_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
	testl	%r14d, %r14d
	jle	.LBB0_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB0_2 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,8), %rbx
	xorl	%r15d, %r15d
.LBB0_4:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%rbx,%r15,8), %xmm0            # xmm0 = mem[0],zero
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB0_4
.LBB0_5:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%rbp
	addl	%r14d, %r13d
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB0_2
.LBB0_6:                                # %._crit_edge12
	movl	$10, %edi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end0:
	.size	_Z11printMatrix6Matrix, .Lfunc_end0-_Z11printMatrix6Matrix
	.cfi_endproc
                                        # -- End function
	.globl	_Z10saveMatrix6MatrixPc         # -- Begin function _Z10saveMatrix6MatrixPc
	.type	_Z10saveMatrix6MatrixPc,@function
_Z10saveMatrix6MatrixPc:                # @_Z10saveMatrix6MatrixPc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, (%rsp)                    # 8-byte Spill
	movq	%rdi, %r14
	movq	%rdi, %rbx
	shrq	$32, %rbx
	movl	$.L.str.2, %esi
	movq	%rdx, %rdi
	callq	fopen
	movq	%rax, %r15
	movq	%rbx, 16(%rsp)                  # 8-byte Spill
	testl	%ebx, %ebx
	jle	.LBB1_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%r14d, %r13d
	xorl	%ebp, %ebp
	xorl	%ebx, %ebx
	movq	%r14, 8(%rsp)                   # 8-byte Spill
.LBB1_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	testl	%r14d, %r14d
	jle	.LBB1_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	%ebp, %eax
	movq	(%rsp), %rcx                    # 8-byte Reload
	leaq	(%rcx,%rax,8), %r12
	xorl	%r14d, %r14d
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%r12,%r14,8), %xmm0            # xmm0 = mem[0],zero
	movl	$.L.str.1, %esi
	movq	%r15, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%r14
	cmpq	%r14, %r13
	jne	.LBB1_4
.LBB1_5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	$10, %edi
	movq	%r15, %rsi
	callq	fputc@PLT
	incq	%rbx
	movq	8(%rsp), %r14                   # 8-byte Reload
	addl	%r14d, %ebp
	cmpq	16(%rsp), %rbx                  # 8-byte Folded Reload
	jne	.LBB1_2
.LBB1_6:                                # %._crit_edge13
	movq	%r15, %rdi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.Lfunc_end1:
	.size	_Z10saveMatrix6MatrixPc, .Lfunc_end1-_Z10saveMatrix6MatrixPc
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__getColKernel6MatrixS_i # -- Begin function _Z27__device_stub__getColKernel6MatrixS_i
	.type	_Z27__device_stub__getColKernel6MatrixS_i,@function
_Z27__device_stub__getColKernel6MatrixS_i: # @_Z27__device_stub__getColKernel6MatrixS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsi, 8(%rax)
	leaq	64(%rsp), %rsi
	movq	%rdx, (%rsi)
	movq	%rcx, 8(%rsi)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rsi, 8(%rbx)
	movq	%rcx, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12getColKernel6MatrixS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z27__device_stub__getColKernel6MatrixS_i, .Lfunc_end2-_Z27__device_stub__getColKernel6MatrixS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z6getCol6MatrixS_i             # -- Begin function _Z6getCol6MatrixS_i
	.type	_Z6getCol6MatrixS_i,@function
_Z6getCol6MatrixS_i:                    # @_Z6getCol6MatrixS_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, 4(%rsp)                   # 4-byte Spill
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	movq	%rdx, %r12
	movq	%rsi, 24(%rsp)                  # 8-byte Spill
	movq	%rdi, %rbx
	movq	%rdx, %r14
	shrq	$32, %r14
	leaq	48(%rsp), %r13
	movq	%rdi, -8(%r13)
	movq	%rdi, %r15
	shrq	$32, %r15
	movl	%r15d, %eax
	imull	%ebx, %eax
	movslq	%eax, %rbp
	shlq	$3, %rbp
	movq	%r13, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rdi
	movq	%r12, -8(%rdi)
	imull	%r12d, %r14d
	movslq	%r14d, %r14
	shlq	$3, %r14
	movq	%r14, %rsi
	callq	hipMalloc
	leal	31(%rbx), %eax
	shrl	$5, %eax
	shlq	$27, %r15
	orq	%rax, %r15
	movl	$4160749568, %eax               # imm = 0xF8000000
	addq	%r15, %rax
	movabsq	$576460748142673919, %rdi       # imm = 0x7FFFFFF07FFFFFF
	andq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	40(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rcx
	movl	4(%rsp), %r8d                   # 4-byte Reload
	callq	_Z27__device_stub__getColKernel6MatrixS_i
.LBB3_2:
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z6getCol6MatrixS_i, .Lfunc_end3-_Z6getCol6MatrixS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__getRowKernel6MatrixS_i # -- Begin function _Z27__device_stub__getRowKernel6MatrixS_i
	.type	_Z27__device_stub__getRowKernel6MatrixS_i,@function
_Z27__device_stub__getRowKernel6MatrixS_i: # @_Z27__device_stub__getRowKernel6MatrixS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsi, 8(%rax)
	leaq	64(%rsp), %rsi
	movq	%rdx, (%rsi)
	movq	%rcx, 8(%rsi)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rsi, 8(%rbx)
	movq	%rcx, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12getRowKernel6MatrixS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z27__device_stub__getRowKernel6MatrixS_i, .Lfunc_end4-_Z27__device_stub__getRowKernel6MatrixS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__isSymmetricKernel6MatrixPi # -- Begin function _Z32__device_stub__isSymmetricKernel6MatrixPi
	.type	_Z32__device_stub__isSymmetricKernel6MatrixPi,@function
_Z32__device_stub__isSymmetricKernel6MatrixPi: # @_Z32__device_stub__isSymmetricKernel6MatrixPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsi, 8(%rax)
	leaq	24(%rsp), %rcx
	movq	%rdx, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17isSymmetricKernel6MatrixPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z32__device_stub__isSymmetricKernel6MatrixPi, .Lfunc_end5-_Z32__device_stub__isSymmetricKernel6MatrixPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z11isSymmetric6Matrix          # -- Begin function _Z11isSymmetric6Matrix
	.type	_Z11isSymmetric6Matrix,@function
_Z11isSymmetric6Matrix:                 # @_Z11isSymmetric6Matrix
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r14
	movq	%rdi, %rbx
	leaq	24(%rsp), %r15
	movq	%rdi, -8(%r15)
	movq	%rdi, %r13
	shrq	$32, %r13
	movl	%r13d, %eax
	imull	%ebx, %eax
	movslq	%eax, %r12
	shlq	$3, %r12
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movq	(%r15), %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	12(%rsp), %r14
	movl	$1, (%r14)
	movq	%rsp, %r15
	movl	$4, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$4, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leal	31(%rbx), %eax
	shrl	$5, %eax
	shlq	$27, %r13
	orq	%rax, %r13
	movl	$4160749568, %eax               # imm = 0xF8000000
	addq	%r13, %rax
	movabsq	$576460748142673919, %rdi       # imm = 0x7FFFFFF07FFFFFF
	andq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_2
# %bb.1:
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	(%rsp), %rdx
	callq	_Z32__device_stub__isSymmetricKernel6MatrixPi
.LBB6_2:
	callq	hipDeviceSynchronize
	movq	(%rsp), %rsi
	leaq	12(%rsp), %rbx
	movl	$4, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movl	(%rbx), %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z11isSymmetric6Matrix, .Lfunc_end6-_Z11isSymmetric6Matrix
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__matAddKernel6MatrixS_S_ # -- Begin function _Z27__device_stub__matAddKernel6MatrixS_S_
	.type	_Z27__device_stub__matAddKernel6MatrixS_S_,@function
_Z27__device_stub__matAddKernel6MatrixS_S_: # @_Z27__device_stub__matAddKernel6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsi, 8(%rax)
	leaq	64(%rsp), %rsi
	movq	%rdx, (%rsi)
	movq	%rcx, 8(%rsi)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	movq	%r9, 8(%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rsi, 8(%rbx)
	movq	%rcx, 16(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12matAddKernel6MatrixS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z27__device_stub__matAddKernel6MatrixS_S_, .Lfunc_end7-_Z27__device_stub__matAddKernel6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__matDivKernel6MatrixS_S_ # -- Begin function _Z27__device_stub__matDivKernel6MatrixS_S_
	.type	_Z27__device_stub__matDivKernel6MatrixS_S_,@function
_Z27__device_stub__matDivKernel6MatrixS_S_: # @_Z27__device_stub__matDivKernel6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsi, 8(%rax)
	leaq	64(%rsp), %rsi
	movq	%rdx, (%rsi)
	movq	%rcx, 8(%rsi)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	movq	%r9, 8(%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rsi, 8(%rbx)
	movq	%rcx, 16(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12matDivKernel6MatrixS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z27__device_stub__matDivKernel6MatrixS_S_, .Lfunc_end8-_Z27__device_stub__matDivKernel6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z6matDiv6MatrixS_S_            # -- Begin function _Z6matDiv6MatrixS_S_
	.type	_Z6matDiv6MatrixS_S_,@function
_Z6matDiv6MatrixS_S_:                   # @_Z6matDiv6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %r12
	cmpl	%edx, %r12d
	jne	.LBB9_5
# %bb.1:
	movq	%r12, %r14
	shrq	$32, %r14
	shrq	$32, %rdx
	cmpq	%rdx, %r14
	jne	.LBB9_5
# %bb.2:
	movq	%rsi, %r13
	movq	%r9, 32(%rsp)                   # 8-byte Spill
	movq	%r8, %r15
	shrq	$32, %r15
	leaq	64(%rsp), %rbp
	movl	%r12d, -8(%rbp)
	movl	%r14d, -4(%rbp)
	movl	%r12d, %eax
	imull	%r14d, %eax
	movslq	%eax, %rbx
	shlq	$3, %rbx
	movq	%rbp, %rdi
	movq	%rbx, %rsi
	movq	%r8, 24(%rsp)                   # 8-byte Spill
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	%r13, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %r13
	movl	%r12d, -8(%r13)
	movl	%r14d, -4(%r13)
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rdi
	movq	24(%rsp), %rax                  # 8-byte Reload
	movq	%rax, -8(%rdi)
	imull	%eax, %r15d
	movslq	%r15d, %r15
	shlq	$3, %r15
	movq	%r15, %rsi
	callq	hipMalloc
	addl	$31, %r12d
	shrl	$5, %r12d
	shlq	$27, %r14
	orq	%r12, %r14
	movl	$4160749568, %eax               # imm = 0xF8000000
	addq	%r14, %rax
	movabsq	$576460748142673919, %rdi       # imm = 0x7FFFFFF07FFFFFF
	andq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_4
# %bb.3:
	movq	56(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	48(%rsp), %rcx
	movq	(%rsp), %r8
	movq	8(%rsp), %r9
	callq	_Z27__device_stub__matDivKernel6MatrixS_S_
.LBB9_4:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB9_5:
	.cfi_def_cfa_offset 128
	movl	$.Lstr, %edi
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end9:
	.size	_Z6matDiv6MatrixS_S_, .Lfunc_end9-_Z6matDiv6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z34__device_stub__matPlusScalerKernel6MatrixdS_ # -- Begin function _Z34__device_stub__matPlusScalerKernel6MatrixdS_
	.type	_Z34__device_stub__matPlusScalerKernel6MatrixdS_,@function
_Z34__device_stub__matPlusScalerKernel6MatrixdS_: # @_Z34__device_stub__matPlusScalerKernel6MatrixdS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsi, 8(%rax)
	leaq	64(%rsp), %rsi
	movq	%rdx, (%rsi)
	movq	%rcx, 8(%rsi)
	leaq	24(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19matPlusScalerKernel6MatrixdS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z34__device_stub__matPlusScalerKernel6MatrixdS_, .Lfunc_end10-_Z34__device_stub__matPlusScalerKernel6MatrixdS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z13matPlusScaler6MatrixdS_     # -- Begin function _Z13matPlusScaler6MatrixdS_
	.type	_Z13matPlusScaler6MatrixdS_,@function
_Z13matPlusScaler6MatrixdS_:            # @_Z13matPlusScaler6MatrixdS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	movq	%rdx, %r12
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movq	%rsi, 24(%rsp)                  # 8-byte Spill
	movq	%rdi, %rbx
	movq	%rdx, %r14
	shrq	$32, %r14
	leaq	48(%rsp), %r13
	movq	%rdi, -8(%r13)
	movq	%rdi, %r15
	shrq	$32, %r15
	movl	%r15d, %eax
	imull	%ebx, %eax
	movslq	%eax, %rbp
	shlq	$3, %rbp
	movq	%r13, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rdi
	movq	%r12, -8(%rdi)
	imull	%r12d, %r14d
	movslq	%r14d, %r14
	shlq	$3, %r14
	movq	%r14, %rsi
	callq	hipMalloc
	leal	31(%rbx), %eax
	shrl	$5, %eax
	shlq	$27, %r15
	orq	%rax, %r15
	movl	$4160749568, %eax               # imm = 0xF8000000
	addq	%r15, %rax
	movabsq	$576460748142673919, %rdi       # imm = 0x7FFFFFF07FFFFFF
	andq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB11_2
# %bb.1:
	movq	40(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	(%rsp), %rdx
	movq	8(%rsp), %rcx
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_Z34__device_stub__matPlusScalerKernel6MatrixdS_
.LBB11_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z13matPlusScaler6MatrixdS_, .Lfunc_end11-_Z13matPlusScaler6MatrixdS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__matSubKernel6MatrixS_S_ # -- Begin function _Z27__device_stub__matSubKernel6MatrixS_S_
	.type	_Z27__device_stub__matSubKernel6MatrixS_S_,@function
_Z27__device_stub__matSubKernel6MatrixS_S_: # @_Z27__device_stub__matSubKernel6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsi, 8(%rax)
	leaq	64(%rsp), %rsi
	movq	%rdx, (%rsi)
	movq	%rcx, 8(%rsi)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	movq	%r9, 8(%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rsi, 8(%rbx)
	movq	%rcx, 16(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12matSubKernel6MatrixS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z27__device_stub__matSubKernel6MatrixS_S_, .Lfunc_end12-_Z27__device_stub__matSubKernel6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z6matSub6MatrixS_S_            # -- Begin function _Z6matSub6MatrixS_S_
	.type	_Z6matSub6MatrixS_S_,@function
_Z6matSub6MatrixS_S_:                   # @_Z6matSub6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 32(%rsp)                   # 8-byte Spill
	movq	%r8, 24(%rsp)                   # 8-byte Spill
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
	movq	%rsi, %rbp
	movq	%rdi, %r13
	movq	%rdi, %r15
	shrq	$32, %r15
	leaq	48(%rsp), %rbx
	movl	%edx, -8(%rbx)
	shrq	$32, %rdx
	leaq	64(%rsp), %r12
	movl	%r13d, -8(%r12)
	movl	%r15d, -4(%r12)
	movl	%edx, -4(%rbx)
	movl	%r13d, %eax
	imull	%r15d, %eax
	movslq	%eax, %r14
	shlq	$3, %r14
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	%rbp, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rdi
	movq	24(%rsp), %rax                  # 8-byte Reload
	movq	%rax, -8(%rdi)
	movq	%r14, %rsi
	callq	hipMalloc
	leal	31(%r13), %eax
	shrl	$5, %eax
	shlq	$27, %r15
	orq	%rax, %r15
	movl	$4160749568, %eax               # imm = 0xF8000000
	addq	%r15, %rax
	movabsq	$576460748142673919, %rdi       # imm = 0x7FFFFFF07FFFFFF
	andq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_2
# %bb.1:
	movq	56(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	48(%rsp), %rcx
	movq	(%rsp), %r8
	movq	8(%rsp), %r9
	callq	_Z27__device_stub__matSubKernel6MatrixS_S_
.LBB13_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_Z6matSub6MatrixS_S_, .Lfunc_end13-_Z6matSub6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__matTimesScalerKernel6MatrixdS_ # -- Begin function _Z35__device_stub__matTimesScalerKernel6MatrixdS_
	.type	_Z35__device_stub__matTimesScalerKernel6MatrixdS_,@function
_Z35__device_stub__matTimesScalerKernel6MatrixdS_: # @_Z35__device_stub__matTimesScalerKernel6MatrixdS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsi, 8(%rax)
	leaq	64(%rsp), %rsi
	movq	%rdx, (%rsi)
	movq	%rcx, 8(%rsi)
	leaq	24(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20matTimesScalerKernel6MatrixdS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end14:
	.size	_Z35__device_stub__matTimesScalerKernel6MatrixdS_, .Lfunc_end14-_Z35__device_stub__matTimesScalerKernel6MatrixdS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z14matTimesScaler6MatrixdS_    # -- Begin function _Z14matTimesScaler6MatrixdS_
	.type	_Z14matTimesScaler6MatrixdS_,@function
_Z14matTimesScaler6MatrixdS_:           # @_Z14matTimesScaler6MatrixdS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	movq	%rdx, %r12
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movq	%rsi, 24(%rsp)                  # 8-byte Spill
	movq	%rdi, %rbx
	movq	%rdx, %r14
	shrq	$32, %r14
	leaq	48(%rsp), %r13
	movq	%rdi, -8(%r13)
	movq	%rdi, %r15
	shrq	$32, %r15
	movl	%r15d, %eax
	imull	%ebx, %eax
	movslq	%eax, %rbp
	shlq	$3, %rbp
	movq	%r13, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rdi
	movq	%r12, -8(%rdi)
	imull	%r12d, %r14d
	movslq	%r14d, %r14
	shlq	$3, %r14
	movq	%r14, %rsi
	callq	hipMalloc
	leal	31(%rbx), %eax
	shrl	$5, %eax
	shlq	$27, %r15
	orq	%rax, %r15
	movl	$4160749568, %eax               # imm = 0xF8000000
	addq	%r15, %rax
	movabsq	$576460748142673919, %rdi       # imm = 0x7FFFFFF07FFFFFF
	andq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB15_2
# %bb.1:
	movq	40(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	(%rsp), %rdx
	movq	8(%rsp), %rcx
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_Z35__device_stub__matTimesScalerKernel6MatrixdS_
.LBB15_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end15:
	.size	_Z14matTimesScaler6MatrixdS_, .Lfunc_end15-_Z14matTimesScaler6MatrixdS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__maxOfMatrixRow6MatrixS_ # -- Begin function _Z29__device_stub__maxOfMatrixRow6MatrixS_
	.type	_Z29__device_stub__maxOfMatrixRow6MatrixS_,@function
_Z29__device_stub__maxOfMatrixRow6MatrixS_: # @_Z29__device_stub__maxOfMatrixRow6MatrixS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsi, 8(%rax)
	leaq	64(%rsp), %rsi
	movq	%rdx, (%rsi)
	movq	%rcx, 8(%rsi)
	leaq	48(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rsi, 8(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14maxOfMatrixRow6MatrixS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end16:
	.size	_Z29__device_stub__maxOfMatrixRow6MatrixS_, .Lfunc_end16-_Z29__device_stub__maxOfMatrixRow6MatrixS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__onesKernel6Matrix # -- Begin function _Z25__device_stub__onesKernel6Matrix
	.type	_Z25__device_stub__onesKernel6Matrix,@function
_Z25__device_stub__onesKernel6Matrix:   # @_Z25__device_stub__onesKernel6Matrix
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	64(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsi, 8(%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10onesKernel6Matrix, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end17:
	.size	_Z25__device_stub__onesKernel6Matrix, .Lfunc_end17-_Z25__device_stub__onesKernel6Matrix
	.cfi_endproc
                                        # -- End function
	.globl	_Z4ones6Matrix                  # -- Begin function _Z4ones6Matrix
	.type	_Z4ones6Matrix,@function
_Z4ones6Matrix:                         # @_Z4ones6Matrix
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	movq	%rdi, %r15
	leaq	8(%rsp), %r12
	movq	%rdi, -8(%r12)
	movq	%rdi, %r13
	shrq	$32, %r13
	movl	%r13d, %eax
	imull	%r15d, %eax
	movslq	%eax, %r14
	shlq	$3, %r14
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leal	31(%r15), %eax
	shrl	$5, %eax
	shlq	$27, %r13
	orq	%rax, %r13
	movl	$4160749568, %eax               # imm = 0xF8000000
	addq	%r13, %rax
	movabsq	$576460748142673919, %rdi       # imm = 0x7FFFFFF07FFFFFF
	andq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB18_2
# %bb.1:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z25__device_stub__onesKernel6Matrix
.LBB18_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end18:
	.size	_Z4ones6Matrix, .Lfunc_end18-_Z4ones6Matrix
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__repmatKernel6MatrixiiS_ # -- Begin function _Z27__device_stub__repmatKernel6MatrixiiS_
	.type	_Z27__device_stub__repmatKernel6MatrixiiS_,@function
_Z27__device_stub__repmatKernel6MatrixiiS_: # @_Z27__device_stub__repmatKernel6MatrixiiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsi, 8(%rax)
	leaq	64(%rsp), %rsi
	movq	%r8, (%rsi)
	movq	%r9, 8(%rsi)
	leaq	12(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rdx, 16(%rbx)
	movq	%rsi, 24(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12repmatKernel6MatrixiiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end19:
	.size	_Z27__device_stub__repmatKernel6MatrixiiS_, .Lfunc_end19-_Z27__device_stub__repmatKernel6MatrixiiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__reshapeKernel6MatrixS_ # -- Begin function _Z28__device_stub__reshapeKernel6MatrixS_
	.type	_Z28__device_stub__reshapeKernel6MatrixS_,@function
_Z28__device_stub__reshapeKernel6MatrixS_: # @_Z28__device_stub__reshapeKernel6MatrixS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsi, 8(%rax)
	leaq	64(%rsp), %rsi
	movq	%rdx, (%rsi)
	movq	%rcx, 8(%rsi)
	leaq	48(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rsi, 8(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13reshapeKernel6MatrixS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end20:
	.size	_Z28__device_stub__reshapeKernel6MatrixS_, .Lfunc_end20-_Z28__device_stub__reshapeKernel6MatrixS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z7reshape6MatrixS_             # -- Begin function _Z7reshape6MatrixS_
	.type	_Z7reshape6MatrixS_,@function
_Z7reshape6MatrixS_:                    # @_Z7reshape6MatrixS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	movq	%rdx, %r12
	movq	%rsi, 24(%rsp)                  # 8-byte Spill
	movq	%rdi, %rbx
	movq	%rdx, %r14
	shrq	$32, %r14
	leaq	48(%rsp), %r13
	movq	%rdi, -8(%r13)
	movq	%rdi, %r15
	shrq	$32, %r15
	movl	%r15d, %eax
	imull	%ebx, %eax
	movslq	%eax, %rbp
	shlq	$3, %rbp
	movq	%r13, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rdi
	movq	%r12, -8(%rdi)
	imull	%r12d, %r14d
	movslq	%r14d, %r14
	shlq	$3, %r14
	movq	%r14, %rsi
	callq	hipMalloc
	leal	31(%rbx), %eax
	shrl	$5, %eax
	shlq	$27, %r15
	orq	%rax, %r15
	movl	$4160749568, %eax               # imm = 0xF8000000
	addq	%r15, %rax
	movabsq	$576460748142673919, %rdi       # imm = 0x7FFFFFF07FFFFFF
	andq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB21_2
# %bb.1:
	movq	40(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rcx
	callq	_Z28__device_stub__reshapeKernel6MatrixS_
.LBB21_2:
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end21:
	.size	_Z7reshape6MatrixS_, .Lfunc_end21-_Z7reshape6MatrixS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__sumOfMatrixColKernel6MatrixS_ # -- Begin function _Z35__device_stub__sumOfMatrixColKernel6MatrixS_
	.type	_Z35__device_stub__sumOfMatrixColKernel6MatrixS_,@function
_Z35__device_stub__sumOfMatrixColKernel6MatrixS_: # @_Z35__device_stub__sumOfMatrixColKernel6MatrixS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsi, 8(%rax)
	leaq	64(%rsp), %rsi
	movq	%rdx, (%rsi)
	movq	%rcx, 8(%rsi)
	leaq	48(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rsi, 8(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20sumOfMatrixColKernel6MatrixS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end22:
	.size	_Z35__device_stub__sumOfMatrixColKernel6MatrixS_, .Lfunc_end22-_Z35__device_stub__sumOfMatrixColKernel6MatrixS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z14sumOfMatrixCol6MatrixS_     # -- Begin function _Z14sumOfMatrixCol6MatrixS_
	.type	_Z14sumOfMatrixCol6MatrixS_,@function
_Z14sumOfMatrixCol6MatrixS_:            # @_Z14sumOfMatrixCol6MatrixS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
	movq	%rdx, %rbx
	movq	%rsi, %r12
	movq	%rdi, %r15
	movq	%rdx, %r14
	shrq	$32, %r14
	leaq	32(%rsp), %r13
	movq	%rdi, -8(%r13)
	movq	%rdi, %rax
	shrq	$32, %rax
	imull	%r15d, %eax
	movslq	%eax, %rbp
	shlq	$3, %rbp
	movq	%r13, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	%r12, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rdi
	movq	%rbx, -8(%rdi)
	imull	%ebx, %r14d
	movslq	%r14d, %r14
	shlq	$3, %r14
	movq	%r14, %rsi
	callq	hipMalloc
	leal	1023(%r15), %edi
	shrl	$10, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$1024, %rdx                     # imm = 0x400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB23_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	(%rsp), %rdx
	movq	8(%rsp), %rcx
	callq	_Z35__device_stub__sumOfMatrixColKernel6MatrixS_
.LBB23_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end23:
	.size	_Z14sumOfMatrixCol6MatrixS_, .Lfunc_end23-_Z14sumOfMatrixCol6MatrixS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__transposeKernel6MatrixS_ # -- Begin function _Z30__device_stub__transposeKernel6MatrixS_
	.type	_Z30__device_stub__transposeKernel6MatrixS_,@function
_Z30__device_stub__transposeKernel6MatrixS_: # @_Z30__device_stub__transposeKernel6MatrixS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsi, 8(%rax)
	leaq	64(%rsp), %rsi
	movq	%rdx, (%rsi)
	movq	%rcx, 8(%rsi)
	leaq	48(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rsi, 8(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15transposeKernel6MatrixS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end24:
	.size	_Z30__device_stub__transposeKernel6MatrixS_, .Lfunc_end24-_Z30__device_stub__transposeKernel6MatrixS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z9transpose6MatrixS_           # -- Begin function _Z9transpose6MatrixS_
	.type	_Z9transpose6MatrixS_,@function
_Z9transpose6MatrixS_:                  # @_Z9transpose6MatrixS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	movq	%rdx, %r12
	movq	%rsi, 24(%rsp)                  # 8-byte Spill
	movq	%rdi, %rbx
	movq	%rdx, %r14
	shrq	$32, %r14
	leaq	48(%rsp), %r13
	movq	%rdi, -8(%r13)
	movq	%rdi, %r15
	shrq	$32, %r15
	movl	%r15d, %eax
	imull	%ebx, %eax
	movslq	%eax, %rbp
	shlq	$3, %rbp
	movq	%r13, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rdi
	movq	%r12, -8(%rdi)
	imull	%r12d, %r14d
	movslq	%r14d, %r14
	shlq	$3, %r14
	movq	%r14, %rsi
	callq	hipMalloc
	leal	31(%rbx), %eax
	shrl	$5, %eax
	shlq	$27, %r15
	orq	%rax, %r15
	movl	$4160749568, %eax               # imm = 0xF8000000
	addq	%r15, %rax
	movabsq	$576460748142673919, %rdi       # imm = 0x7FFFFFF07FFFFFF
	andq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB25_2
# %bb.1:
	movq	40(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rcx
	callq	_Z30__device_stub__transposeKernel6MatrixS_
.LBB25_2:
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end25:
	.size	_Z9transpose6MatrixS_, .Lfunc_end25-_Z9transpose6MatrixS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__zerosKernel6Matrix # -- Begin function _Z26__device_stub__zerosKernel6Matrix
	.type	_Z26__device_stub__zerosKernel6Matrix,@function
_Z26__device_stub__zerosKernel6Matrix:  # @_Z26__device_stub__zerosKernel6Matrix
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	64(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsi, 8(%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11zerosKernel6Matrix, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end26:
	.size	_Z26__device_stub__zerosKernel6Matrix, .Lfunc_end26-_Z26__device_stub__zerosKernel6Matrix
	.cfi_endproc
                                        # -- End function
	.globl	_Z5zeros6Matrix                 # -- Begin function _Z5zeros6Matrix
	.type	_Z5zeros6Matrix,@function
_Z5zeros6Matrix:                        # @_Z5zeros6Matrix
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	movq	%rdi, %r15
	leaq	8(%rsp), %r12
	movq	%rdi, -8(%r12)
	movq	%rdi, %r13
	shrq	$32, %r13
	movl	%r13d, %eax
	imull	%r15d, %eax
	movslq	%eax, %r14
	shlq	$3, %r14
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leal	31(%r15), %eax
	shrl	$5, %eax
	shlq	$27, %r13
	orq	%rax, %r13
	movl	$4160749568, %eax               # imm = 0xF8000000
	addq	%r13, %rax
	movabsq	$576460748142673919, %rdi       # imm = 0x7FFFFFF07FFFFFF
	andq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB27_2
# %bb.1:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z26__device_stub__zerosKernel6Matrix
.LBB27_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end27:
	.size	_Z5zeros6Matrix, .Lfunc_end27-_Z5zeros6Matrix
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB28_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB28_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12getColKernel6MatrixS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12getRowKernel6MatrixS_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17isSymmetricKernel6MatrixPi, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12matAddKernel6MatrixS_S_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12matDivKernel6MatrixS_S_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19matPlusScalerKernel6MatrixdS_, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12matSubKernel6MatrixS_S_, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20matTimesScalerKernel6MatrixdS_, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14maxOfMatrixRow6MatrixS_, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10onesKernel6Matrix, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12repmatKernel6MatrixiiS_, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13reshapeKernel6MatrixS_, %esi
	movl	$.L__unnamed_12, %edx
	movl	$.L__unnamed_12, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20sumOfMatrixColKernel6MatrixS_, %esi
	movl	$.L__unnamed_13, %edx
	movl	$.L__unnamed_13, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15transposeKernel6MatrixS_, %esi
	movl	$.L__unnamed_14, %edx
	movl	$.L__unnamed_14, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11zerosKernel6Matrix, %esi
	movl	$.L__unnamed_15, %edx
	movl	$.L__unnamed_15, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end28:
	.size	__hip_module_ctor, .Lfunc_end28-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB29_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB29_2:
	retq
.Lfunc_end29:
	.size	__hip_module_dtor, .Lfunc_end29-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%.4f "
	.size	.L.str.1, 6

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"w"
	.size	.L.str.2, 2

	.type	_Z12getColKernel6MatrixS_i,@object # @_Z12getColKernel6MatrixS_i
	.section	.rodata,"a",@progbits
	.globl	_Z12getColKernel6MatrixS_i
	.p2align	3, 0x0
_Z12getColKernel6MatrixS_i:
	.quad	_Z27__device_stub__getColKernel6MatrixS_i
	.size	_Z12getColKernel6MatrixS_i, 8

	.type	_Z12getRowKernel6MatrixS_i,@object # @_Z12getRowKernel6MatrixS_i
	.globl	_Z12getRowKernel6MatrixS_i
	.p2align	3, 0x0
_Z12getRowKernel6MatrixS_i:
	.quad	_Z27__device_stub__getRowKernel6MatrixS_i
	.size	_Z12getRowKernel6MatrixS_i, 8

	.type	_Z17isSymmetricKernel6MatrixPi,@object # @_Z17isSymmetricKernel6MatrixPi
	.globl	_Z17isSymmetricKernel6MatrixPi
	.p2align	3, 0x0
_Z17isSymmetricKernel6MatrixPi:
	.quad	_Z32__device_stub__isSymmetricKernel6MatrixPi
	.size	_Z17isSymmetricKernel6MatrixPi, 8

	.type	_Z12matAddKernel6MatrixS_S_,@object # @_Z12matAddKernel6MatrixS_S_
	.globl	_Z12matAddKernel6MatrixS_S_
	.p2align	3, 0x0
_Z12matAddKernel6MatrixS_S_:
	.quad	_Z27__device_stub__matAddKernel6MatrixS_S_
	.size	_Z12matAddKernel6MatrixS_S_, 8

	.type	_Z12matDivKernel6MatrixS_S_,@object # @_Z12matDivKernel6MatrixS_S_
	.globl	_Z12matDivKernel6MatrixS_S_
	.p2align	3, 0x0
_Z12matDivKernel6MatrixS_S_:
	.quad	_Z27__device_stub__matDivKernel6MatrixS_S_
	.size	_Z12matDivKernel6MatrixS_S_, 8

	.type	_Z19matPlusScalerKernel6MatrixdS_,@object # @_Z19matPlusScalerKernel6MatrixdS_
	.globl	_Z19matPlusScalerKernel6MatrixdS_
	.p2align	3, 0x0
_Z19matPlusScalerKernel6MatrixdS_:
	.quad	_Z34__device_stub__matPlusScalerKernel6MatrixdS_
	.size	_Z19matPlusScalerKernel6MatrixdS_, 8

	.type	_Z12matSubKernel6MatrixS_S_,@object # @_Z12matSubKernel6MatrixS_S_
	.globl	_Z12matSubKernel6MatrixS_S_
	.p2align	3, 0x0
_Z12matSubKernel6MatrixS_S_:
	.quad	_Z27__device_stub__matSubKernel6MatrixS_S_
	.size	_Z12matSubKernel6MatrixS_S_, 8

	.type	_Z20matTimesScalerKernel6MatrixdS_,@object # @_Z20matTimesScalerKernel6MatrixdS_
	.globl	_Z20matTimesScalerKernel6MatrixdS_
	.p2align	3, 0x0
_Z20matTimesScalerKernel6MatrixdS_:
	.quad	_Z35__device_stub__matTimesScalerKernel6MatrixdS_
	.size	_Z20matTimesScalerKernel6MatrixdS_, 8

	.type	_Z14maxOfMatrixRow6MatrixS_,@object # @_Z14maxOfMatrixRow6MatrixS_
	.globl	_Z14maxOfMatrixRow6MatrixS_
	.p2align	3, 0x0
_Z14maxOfMatrixRow6MatrixS_:
	.quad	_Z29__device_stub__maxOfMatrixRow6MatrixS_
	.size	_Z14maxOfMatrixRow6MatrixS_, 8

	.type	_Z10onesKernel6Matrix,@object   # @_Z10onesKernel6Matrix
	.globl	_Z10onesKernel6Matrix
	.p2align	3, 0x0
_Z10onesKernel6Matrix:
	.quad	_Z25__device_stub__onesKernel6Matrix
	.size	_Z10onesKernel6Matrix, 8

	.type	_Z12repmatKernel6MatrixiiS_,@object # @_Z12repmatKernel6MatrixiiS_
	.globl	_Z12repmatKernel6MatrixiiS_
	.p2align	3, 0x0
_Z12repmatKernel6MatrixiiS_:
	.quad	_Z27__device_stub__repmatKernel6MatrixiiS_
	.size	_Z12repmatKernel6MatrixiiS_, 8

	.type	_Z13reshapeKernel6MatrixS_,@object # @_Z13reshapeKernel6MatrixS_
	.globl	_Z13reshapeKernel6MatrixS_
	.p2align	3, 0x0
_Z13reshapeKernel6MatrixS_:
	.quad	_Z28__device_stub__reshapeKernel6MatrixS_
	.size	_Z13reshapeKernel6MatrixS_, 8

	.type	_Z20sumOfMatrixColKernel6MatrixS_,@object # @_Z20sumOfMatrixColKernel6MatrixS_
	.globl	_Z20sumOfMatrixColKernel6MatrixS_
	.p2align	3, 0x0
_Z20sumOfMatrixColKernel6MatrixS_:
	.quad	_Z35__device_stub__sumOfMatrixColKernel6MatrixS_
	.size	_Z20sumOfMatrixColKernel6MatrixS_, 8

	.type	_Z15transposeKernel6MatrixS_,@object # @_Z15transposeKernel6MatrixS_
	.globl	_Z15transposeKernel6MatrixS_
	.p2align	3, 0x0
_Z15transposeKernel6MatrixS_:
	.quad	_Z30__device_stub__transposeKernel6MatrixS_
	.size	_Z15transposeKernel6MatrixS_, 8

	.type	_Z11zerosKernel6Matrix,@object  # @_Z11zerosKernel6Matrix
	.globl	_Z11zerosKernel6Matrix
	.p2align	3, 0x0
_Z11zerosKernel6Matrix:
	.quad	_Z26__device_stub__zerosKernel6Matrix
	.size	_Z11zerosKernel6Matrix, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z12getColKernel6MatrixS_i"
	.size	.L__unnamed_1, 27

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z12getRowKernel6MatrixS_i"
	.size	.L__unnamed_2, 27

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z17isSymmetricKernel6MatrixPi"
	.size	.L__unnamed_3, 31

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z12matAddKernel6MatrixS_S_"
	.size	.L__unnamed_4, 28

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z12matDivKernel6MatrixS_S_"
	.size	.L__unnamed_5, 28

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z19matPlusScalerKernel6MatrixdS_"
	.size	.L__unnamed_6, 34

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z12matSubKernel6MatrixS_S_"
	.size	.L__unnamed_7, 28

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z20matTimesScalerKernel6MatrixdS_"
	.size	.L__unnamed_8, 35

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"_Z14maxOfMatrixRow6MatrixS_"
	.size	.L__unnamed_9, 28

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"_Z10onesKernel6Matrix"
	.size	.L__unnamed_10, 22

	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"_Z12repmatKernel6MatrixiiS_"
	.size	.L__unnamed_11, 28

	.type	.L__unnamed_12,@object          # @11
.L__unnamed_12:
	.asciz	"_Z13reshapeKernel6MatrixS_"
	.size	.L__unnamed_12, 27

	.type	.L__unnamed_13,@object          # @12
.L__unnamed_13:
	.asciz	"_Z20sumOfMatrixColKernel6MatrixS_"
	.size	.L__unnamed_13, 34

	.type	.L__unnamed_14,@object          # @13
.L__unnamed_14:
	.asciz	"_Z15transposeKernel6MatrixS_"
	.size	.L__unnamed_14, 29

	.type	.L__unnamed_15,@object          # @14
.L__unnamed_15:
	.asciz	"_Z11zerosKernel6Matrix"
	.size	.L__unnamed_15, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Input matrices must have the same dimension!"
	.size	.Lstr, 45

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__getColKernel6MatrixS_i
	.addrsig_sym _Z27__device_stub__getRowKernel6MatrixS_i
	.addrsig_sym _Z32__device_stub__isSymmetricKernel6MatrixPi
	.addrsig_sym _Z27__device_stub__matAddKernel6MatrixS_S_
	.addrsig_sym _Z27__device_stub__matDivKernel6MatrixS_S_
	.addrsig_sym _Z34__device_stub__matPlusScalerKernel6MatrixdS_
	.addrsig_sym _Z27__device_stub__matSubKernel6MatrixS_S_
	.addrsig_sym _Z35__device_stub__matTimesScalerKernel6MatrixdS_
	.addrsig_sym _Z29__device_stub__maxOfMatrixRow6MatrixS_
	.addrsig_sym _Z25__device_stub__onesKernel6Matrix
	.addrsig_sym _Z27__device_stub__repmatKernel6MatrixiiS_
	.addrsig_sym _Z28__device_stub__reshapeKernel6MatrixS_
	.addrsig_sym _Z35__device_stub__sumOfMatrixColKernel6MatrixS_
	.addrsig_sym _Z30__device_stub__transposeKernel6MatrixS_
	.addrsig_sym _Z26__device_stub__zerosKernel6Matrix
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12getColKernel6MatrixS_i
	.addrsig_sym _Z12getRowKernel6MatrixS_i
	.addrsig_sym _Z17isSymmetricKernel6MatrixPi
	.addrsig_sym _Z12matAddKernel6MatrixS_S_
	.addrsig_sym _Z12matDivKernel6MatrixS_S_
	.addrsig_sym _Z19matPlusScalerKernel6MatrixdS_
	.addrsig_sym _Z12matSubKernel6MatrixS_S_
	.addrsig_sym _Z20matTimesScalerKernel6MatrixdS_
	.addrsig_sym _Z14maxOfMatrixRow6MatrixS_
	.addrsig_sym _Z10onesKernel6Matrix
	.addrsig_sym _Z12repmatKernel6MatrixiiS_
	.addrsig_sym _Z13reshapeKernel6MatrixS_
	.addrsig_sym _Z20sumOfMatrixColKernel6MatrixS_
	.addrsig_sym _Z15transposeKernel6MatrixS_
	.addrsig_sym _Z11zerosKernel6Matrix
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12getColKernel6MatrixS_i ; -- Begin function _Z12getColKernel6MatrixS_i
	.globl	_Z12getColKernel6MatrixS_i
	.p2align	8
	.type	_Z12getColKernel6MatrixS_i,@function
_Z12getColKernel6MatrixS_i:             ; @_Z12getColKernel6MatrixS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[4:5], s[0:1], 0x0
	s_load_b32 s6, s[0:1], 0x20
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s2, s4, v1
	v_cmp_eq_u32_e64 s3, s6, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x8
	v_mad_u64_u32 v[1:2], null, v0, s4, s[6:7]
	s_load_b64 s[0:1], s[0:1], 0x18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_load_b64 v[2:3], v[1:2], off
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12getColKernel6MatrixS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12getColKernel6MatrixS_i, .Lfunc_end0-_Z12getColKernel6MatrixS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 252
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z12getRowKernel6MatrixS_i ; -- Begin function _Z12getRowKernel6MatrixS_i
	.globl	_Z12getRowKernel6MatrixS_i
	.p2align	8
	.type	_Z12getRowKernel6MatrixS_i,@function
_Z12getRowKernel6MatrixS_i:             ; @_Z12getRowKernel6MatrixS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[4:5], s[0:1], 0x0
	s_load_b32 s6, s[0:1], 0x20
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s15, s3, v[1:2]
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_cmp_gt_i32_e32 vcc_lo, s5, v3
	v_cmp_eq_u32_e64 s3, s6, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s4, v0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x8
	v_mad_u64_u32 v[1:2], null, s4, s6, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_load_b64 v[2:3], v[1:2], off
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12getRowKernel6MatrixS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z12getRowKernel6MatrixS_i, .Lfunc_end1-_Z12getRowKernel6MatrixS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 252
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z17isSymmetricKernel6MatrixPi ; -- Begin function _Z17isSymmetricKernel6MatrixPi
	.globl	_Z17isSymmetricKernel6MatrixPi
	.p2align	8
	.type	_Z17isSymmetricKernel6MatrixPi,@function
_Z17isSymmetricKernel6MatrixPi:         ; @_Z17isSymmetricKernel6MatrixPi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x0
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s4, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_3
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, v0, s4, v[1:2]
	v_mad_u64_u32 v[4:5], null, v1, s4, v[0:1]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[0:1], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 3, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_clause 0x1
	global_load_b64 v[0:1], v[0:1], off
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_neq_f64_e32 vcc_lo, v[0:1], v[2:3]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_3
; %bb.2:
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mov_b32_e32 v0, 0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v0, s[0:1]
.LBB2_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17isSymmetricKernel6MatrixPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z17isSymmetricKernel6MatrixPi, .Lfunc_end2-_Z17isSymmetricKernel6MatrixPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 272
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z12matAddKernel6MatrixS_S_ ; -- Begin function _Z12matAddKernel6MatrixS_S_
	.globl	_Z12matAddKernel6MatrixS_S_
	.p2align	8
	.type	_Z12matAddKernel6MatrixS_S_,@function
_Z12matAddKernel6MatrixS_S_:            ; @_Z12matAddKernel6MatrixS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b64 s[4:5], s[0:1], 0x0
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	v_cmp_gt_i32_e64 s2, s4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x10
	s_load_b64 s[2:3], s[0:1], 0x8
	v_mad_u64_u32 v[2:3], null, v0, s4, v[1:2]
	s_clause 0x2
	s_load_b64 s[4:5], s[0:1], 0x18
	s_load_b32 s7, s[0:1], 0x20
	s_load_b64 s[0:1], s[0:1], 0x28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 31, v2
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[4:5], null, s6, v0, v[1:2]
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s7, v0, v[1:2]
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[4:5]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12matAddKernel6MatrixS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z12matAddKernel6MatrixS_S_, .Lfunc_end3-_Z12matAddKernel6MatrixS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 328
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z12matDivKernel6MatrixS_S_ ; -- Begin function _Z12matDivKernel6MatrixS_S_
	.globl	_Z12matDivKernel6MatrixS_S_
	.p2align	8
	.type	_Z12matDivKernel6MatrixS_S_,@function
_Z12matDivKernel6MatrixS_S_:            ; @_Z12matDivKernel6MatrixS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b64 s[4:5], s[0:1], 0x0
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_ge_i32_e32 vcc_lo, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e64 s2, s4, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB4_2
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v0, s4, v[1:2]
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x18
	s_load_b64 s[0:1], s[0:1], 0x28
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[6:7], null, v[4:5], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[8:9], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_div_scale_f64 v[10:11], vcc_lo, v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[10:11], v[8:9]
	v_fma_f64 v[6:7], -v[6:7], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[12:13]
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_div_fixup_f64 v[2:3], v[6:7], v[4:5], v[2:3]
	global_store_b64 v[0:1], v[2:3], off
.LBB4_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12matDivKernel6MatrixS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z12matDivKernel6MatrixS_S_, .Lfunc_end4-_Z12matDivKernel6MatrixS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 348
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z19matPlusScalerKernel6MatrixdS_ ; -- Begin function _Z19matPlusScalerKernel6MatrixdS_
	.globl	_Z19matPlusScalerKernel6MatrixdS_
	.p2align	8
	.type	_Z19matPlusScalerKernel6MatrixdS_,@function
_Z19matPlusScalerKernel6MatrixdS_:      ; @_Z19matPlusScalerKernel6MatrixdS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[4:5], s[0:1], 0x0
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s4, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB5_2
; %bb.1:
	s_load_b128 s[8:11], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v0, s4, v[1:2]
	s_load_b64 s[0:1], s[0:1], 0x20
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], s[10:11]
	global_store_b64 v[0:1], v[2:3], off
.LBB5_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19matPlusScalerKernel6MatrixdS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z19matPlusScalerKernel6MatrixdS_, .Lfunc_end5-_Z19matPlusScalerKernel6MatrixdS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 220
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z12matSubKernel6MatrixS_S_ ; -- Begin function _Z12matSubKernel6MatrixS_S_
	.globl	_Z12matSubKernel6MatrixS_S_
	.p2align	8
	.type	_Z12matSubKernel6MatrixS_S_,@function
_Z12matSubKernel6MatrixS_S_:            ; @_Z12matSubKernel6MatrixS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b64 s[4:5], s[0:1], 0x0
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s4, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB6_2
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v0, s4, v[1:2]
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x18
	s_load_b64 s[0:1], s[0:1], 0x28
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], -v[4:5]
	global_store_b64 v[0:1], v[2:3], off
.LBB6_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12matSubKernel6MatrixS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z12matSubKernel6MatrixS_S_, .Lfunc_end6-_Z12matSubKernel6MatrixS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 252
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z20matTimesScalerKernel6MatrixdS_ ; -- Begin function _Z20matTimesScalerKernel6MatrixdS_
	.globl	_Z20matTimesScalerKernel6MatrixdS_
	.p2align	8
	.type	_Z20matTimesScalerKernel6MatrixdS_,@function
_Z20matTimesScalerKernel6MatrixdS_:     ; @_Z20matTimesScalerKernel6MatrixdS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[4:5], s[0:1], 0x0
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s4, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB7_2
; %bb.1:
	s_load_b128 s[8:11], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v0, s4, v[1:2]
	s_load_b64 s[0:1], s[0:1], 0x20
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[2:3], v[2:3], s[10:11]
	global_store_b64 v[0:1], v[2:3], off
.LBB7_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20matTimesScalerKernel6MatrixdS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	_Z20matTimesScalerKernel6MatrixdS_, .Lfunc_end7-_Z20matTimesScalerKernel6MatrixdS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 220
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z14maxOfMatrixRow6MatrixS_ ; -- Begin function _Z14maxOfMatrixRow6MatrixS_
	.globl	_Z14maxOfMatrixRow6MatrixS_
	.p2align	8
	.type	_Z14maxOfMatrixRow6MatrixS_,@function
_Z14maxOfMatrixRow6MatrixS_:            ; @_Z14maxOfMatrixRow6MatrixS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s4, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_cmp_lt_i32 s4, 1
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_clause 0x1
	s_load_b64 s[6:7], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, v1, s4
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v3, vcc_lo
	global_load_b64 v[3:4], v[5:6], off
	s_cbranch_scc1 .LBB8_2
.LBB8_1:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[7:8], v[5:6], off
	v_add_co_u32 v5, s0, v5, 8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v6, s0, 0, v6, s0
	s_add_i32 s4, s4, -1
	s_cmp_eq_u32 s4, 0
	s_waitcnt vmcnt(0)
	v_cmp_gt_f64_e32 vcc_lo, v[7:8], v[3:4]
	v_dual_cndmask_b32 v4, v4, v8 :: v_dual_cndmask_b32 v3, v3, v7
	s_cbranch_scc0 .LBB8_1
.LBB8_2:                                ; %Flow24
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[3:4], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14maxOfMatrixRow6MatrixS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end8:
	.size	_Z14maxOfMatrixRow6MatrixS_, .Lfunc_end8-_Z14maxOfMatrixRow6MatrixS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 236
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10onesKernel6Matrix   ; -- Begin function _Z10onesKernel6Matrix
	.globl	_Z10onesKernel6Matrix
	.p2align	8
	.type	_Z10onesKernel6Matrix,@function
_Z10onesKernel6Matrix:                  ; @_Z10onesKernel6Matrix
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b64 s[4:5], s[0:1], 0x0
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_ge_i32_e32 vcc_lo, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e64 s2, s4, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB9_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v0, s4, v[1:2]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 3, v[2:3]
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, 0x3ff00000
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB9_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10onesKernel6Matrix
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end9:
	.size	_Z10onesKernel6Matrix, .Lfunc_end9-_Z10onesKernel6Matrix
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 192
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z12repmatKernel6MatrixiiS_ ; -- Begin function _Z12repmatKernel6MatrixiiS_
	.globl	_Z12repmatKernel6MatrixiiS_
	.p2align	8
	.type	_Z12repmatKernel6MatrixiiS_,@function
_Z12repmatKernel6MatrixiiS_:            ; @_Z12repmatKernel6MatrixiiS_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[8:9], s[0:1], 0x0
	s_load_b128 s[4:7], s[0:1], 0x10
	v_bfe_u32 v3, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[0:1], null, s15, s3, v[3:4]
	s_mul_i32 s14, s14, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, s14, v2
	v_cmp_gt_i32_e32 vcc_lo, s9, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s8, v1
	s_and_b32 s3, vcc_lo, s2
	s_cmp_gt_i32 s4, 0
	s_mov_b32 s2, 0
	s_cselect_b32 s7, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s3, s7
	s_and_saveexec_b32 s7, s3
	s_cbranch_execz .LBB10_6
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[10:11], s[0:1], 0x8
	v_mad_u64_u32 v[3:4], null, v0, s8, v[1:2]
	s_load_b64 s[0:1], s[0:1], 0x20
	v_mul_lo_u32 v5, s6, v0
	s_cmp_gt_i32 s5, 0
	s_mul_i32 s6, s9, s6
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_add3_u32 v6, v2, v5, s14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
.LBB10_2:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB10_4 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB10_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB10_2 Depth=1
	global_load_b64 v[2:3], v[0:1], off
	v_mov_b32_e32 v4, v6
	s_mov_b32 s7, s5
.LBB10_4:                               ;   Parent Loop BB10_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s7, s7, -1
	s_cmp_eq_u32 s7, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 3, v[4:5]
	v_add_nc_u32_e32 v4, s8, v4
	v_add_co_u32 v7, vcc_lo, s0, v7
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[7:8], v[2:3], off
	s_cbranch_scc0 .LBB10_4
.LBB10_5:                               ; %._crit_edge
                                        ;   in Loop: Header=BB10_2 Depth=1
	v_add_nc_u32_e32 v6, s6, v6
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, s4
	s_cbranch_scc0 .LBB10_2
.LBB10_6:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12repmatKernel6MatrixiiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end10:
	.size	_Z12repmatKernel6MatrixiiS_, .Lfunc_end10-_Z12repmatKernel6MatrixiiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 340
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z13reshapeKernel6MatrixS_ ; -- Begin function _Z13reshapeKernel6MatrixS_
	.globl	_Z13reshapeKernel6MatrixS_
	.p2align	8
	.type	_Z13reshapeKernel6MatrixS_,@function
_Z13reshapeKernel6MatrixS_:             ; @_Z13reshapeKernel6MatrixS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b64 s[4:5], s[0:1], 0x0
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s4, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB11_2
; %bb.1:
	s_ashr_i32 s2, s5, 31
	s_load_b128 s[8:11], s[0:1], 0x8
	s_add_i32 s3, s5, s2
	s_load_b64 s[0:1], s[0:1], 0x18
	s_xor_b32 s3, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v2, s3
	s_sub_i32 s6, 0, s3
	v_rcp_iflag_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v2, 0x4f7ffffe, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v4, v2
	v_mad_u64_u32 v[2:3], null, v1, s5, v[0:1]
	v_mul_lo_u32 v0, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v2
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v2, v5
	v_xor_b32_e32 v6, v1, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v4, v0
	v_mul_hi_u32 v0, v6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v0, s3
	v_add_nc_u32_e32 v3, 1, v0
	v_sub_nc_u32_e32 v1, v6, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_le_u32_e32 vcc_lo, s3, v1
	v_subrev_nc_u32_e32 v4, s3, v1
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v3, 1, v0
	v_cndmask_b32_e32 v1, v1, v4, vcc_lo
	v_xor_b32_e32 v4, s2, v5
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s2, s11, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_xor_b32_e32 v5, s2, v5
	v_cmp_le_u32_e32 vcc_lo, s3, v1
	s_add_i32 s3, s11, s2
	s_xor_b32 s3, s3, s2
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v4
	v_sub_nc_u32_e32 v0, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, v0, s5
	v_sub_nc_u32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v1, s4, v[0:1]
	s_sub_i32 s4, 0, s3
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[3:4]
	v_cvt_f32_u32_e32 v3, s3
	v_rcp_iflag_f32_e32 v3, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	v_mul_f32_e32 v3, 0x4f7ffffe, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v3, v3
	v_mul_lo_u32 v4, s4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v4
	v_add_nc_u32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v6, v3
	v_mul_lo_u32 v4, v3, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v4, v6, v4
	v_add_nc_u32_e32 v6, 1, v3
	v_subrev_nc_u32_e32 v7, s3, v4
	v_cmp_le_u32_e32 vcc_lo, s3, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v3, v3, v6 :: v_dual_cndmask_b32 v4, v4, v7
	v_add_nc_u32_e32 v6, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s3, v4
	v_cndmask_b32_e32 v3, v3, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v3, v5
	v_sub_nc_u32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, v3, s11
	v_sub_nc_u32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v2, s10, v[3:4]
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[4:5]
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[2:3], v[0:1], off
.LBB11_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13reshapeKernel6MatrixS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end11:
	.size	_Z13reshapeKernel6MatrixS_, .Lfunc_end11-_Z13reshapeKernel6MatrixS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 608
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z20sumOfMatrixColKernel6MatrixS_ ; -- Begin function _Z20sumOfMatrixColKernel6MatrixS_
	.globl	_Z20sumOfMatrixColKernel6MatrixS_
	.p2align	8
	.type	_Z20sumOfMatrixColKernel6MatrixS_,@function
_Z20sumOfMatrixColKernel6MatrixS_:      ; @_Z20sumOfMatrixColKernel6MatrixS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_cmp_gt_i32 s3, 0
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_cselect_b32 s4, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_b32 s4, vcc_lo, s4
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB12_3
; %bb.1:                                ; %.lr.ph
	s_load_b64 s[4:5], s[0:1], 0x18
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b64 v[5:6], v[3:4], off
.LBB12_2:                               ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s3, 0
	v_lshlrev_b64 v[7:8], 3, v[1:2]
	v_add_nc_u32_e32 v1, s2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[5:6], v[7:8], v[5:6]
	global_store_b64 v[3:4], v[5:6], off
	s_cbranch_scc1 .LBB12_2
.LBB12_3:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20sumOfMatrixColKernel6MatrixS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end12:
	.size	_Z20sumOfMatrixColKernel6MatrixS_, .Lfunc_end12-_Z20sumOfMatrixColKernel6MatrixS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 216
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15transposeKernel6MatrixS_ ; -- Begin function _Z15transposeKernel6MatrixS_
	.globl	_Z15transposeKernel6MatrixS_
	.p2align	8
	.type	_Z15transposeKernel6MatrixS_,@function
_Z15transposeKernel6MatrixS_:           ; @_Z15transposeKernel6MatrixS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b64 s[4:5], s[0:1], 0x0
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s4, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB13_2
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v0, s4, v[1:2]
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x10
	s_load_b64 s[0:1], s[0:1], 0x18
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	v_mad_u64_u32 v[4:5], null, s4, v1, v[0:1]
	global_load_b64 v[2:3], v[2:3], off
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[0:1], 3, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
.LBB13_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15transposeKernel6MatrixS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end13:
	.size	_Z15transposeKernel6MatrixS_, .Lfunc_end13-_Z15transposeKernel6MatrixS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 248
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z11zerosKernel6Matrix  ; -- Begin function _Z11zerosKernel6Matrix
	.globl	_Z11zerosKernel6Matrix
	.p2align	8
	.type	_Z11zerosKernel6Matrix,@function
_Z11zerosKernel6Matrix:                 ; @_Z11zerosKernel6Matrix
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b64 s[4:5], s[0:1], 0x0
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s4, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB14_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v0, s4, v[1:2]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[2:3]
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, v2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB14_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11zerosKernel6Matrix
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end14:
	.size	_Z11zerosKernel6Matrix, .Lfunc_end14-_Z11zerosKernel6Matrix
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 188
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           16
        .value_kind:     by_value
      - .offset:         16
        .size:           16
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12getColKernel6MatrixS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12getColKernel6MatrixS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           16
        .value_kind:     by_value
      - .offset:         16
        .size:           16
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12getRowKernel6MatrixS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12getRowKernel6MatrixS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           16
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
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        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17isSymmetricKernel6MatrixPi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17isSymmetricKernel6MatrixPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           16
        .value_kind:     by_value
      - .offset:         16
        .size:           16
        .value_kind:     by_value
      - .offset:         32
        .size:           16
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
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        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
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        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
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        .size:           8
        .value_kind:     hidden_global_offset_y
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        .value_kind:     hidden_global_offset_z
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        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12matAddKernel6MatrixS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12matAddKernel6MatrixS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           16
        .value_kind:     by_value
      - .offset:         16
        .size:           16
        .value_kind:     by_value
      - .offset:         32
        .size:           16
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
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        .size:           2
        .value_kind:     hidden_group_size_z
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        .size:           2
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        .size:           2
        .value_kind:     hidden_remainder_y
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        .size:           2
        .value_kind:     hidden_remainder_z
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        .size:           8
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        .value_kind:     hidden_global_offset_z
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        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12matDivKernel6MatrixS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12matDivKernel6MatrixS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
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        .size:           16
        .value_kind:     by_value
      - .offset:         16
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        .size:           4
        .value_kind:     hidden_block_count_x
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      - .offset:         52
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        .value_kind:     hidden_group_size_x
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    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19matPlusScalerKernel6MatrixdS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z19matPlusScalerKernel6MatrixdS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
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        .size:           16
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    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
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      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12matSubKernel6MatrixS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12matSubKernel6MatrixS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
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  - .args:
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    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20matTimesScalerKernel6MatrixdS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20matTimesScalerKernel6MatrixdS_.kd
    .uniform_work_group_size: 1
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    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
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  - .args:
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    .group_segment_fixed_size: 0
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    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
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    .name:           _Z14maxOfMatrixRow6MatrixS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14maxOfMatrixRow6MatrixS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
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amdhsa.version:
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...

	.end_amdgpu_metadata
