#include<stdlib.h>
#include<math.h>
#include<iostream>
#include<time.h>

#define BLOCK_DIM_X 16
#define BLOCK_DIM_Y 16

using namespace std;

__global__ void dirihle (float* u, float* f, float* v, int N, float h2, int rb, float* eps)
{
	
	__shared__ float s_u[BLOCK_DIM_X + 2][BLOCK_DIM_Y + 2];
	int i = blockIdx.x*blockDim.x + threadIdx.x;
	int j = blockIdx.y*blockDim.y + threadIdx.y;
	int tx = threadIdx.x+1;
	int ty = threadIdx.y+1;
	int k = j*N + i;
	if ( i < N && j < N )
	{
	    s_u[ty][tx] = u[k];
	    if ( ty == 1 && j > 0 )
		s_u[ty-1][tx] = u[k-N];
	    if ( ty == BLOCK_DIM_X && j < N-1 )
		s_u[ty+1][tx] = u[k+N];
	    if ( tx == 1 && i > 0 )
		s_u[ty][tx-1] = u[k-1];
	    if ( tx == BLOCK_DIM_Y && i < N-1 )
		s_u[ty][tx+1] = u[k+1];
	    if ( i == 0 )
		s_u[ty][tx-1] = u[k+N-2];
	    if( i == N-1 )
		s_u[ty][tx+1] = u[k-N+2];
	}
	__syncthreads();
	eps[0] = 0;
	if ( (i > 0 ) && ( i < N-1 ) && ( j > 0 ) && ( j < N-1 ) && ( k < N*N ) && ( i + j )%2 == rb ) {
		u[k] = 0.25*(s_u[ty-1][tx] + s_u[ty+1][tx] + s_u[ty][tx-1] + s_u[ty][tx+1] - h2*f[k]);
		}
		if ( eps[0] < abs(v[k] - u[k] )){ 
		eps[0] = abs(v[k] - u[k]);
	}
}
int main( int argc, char *  argv [] )
{
	int rows = 256;
	int count = 1;
	float* eps1;
	float* eps;
	float h =(float)1/(rows-1);
	int numBytes = sizeof(float)*rows*rows;
	float* u;
	float* f;
	float* v;
	u = ( float* )malloc( numBytes );
	f = ( float* )malloc( numBytes );
	v = ( float* )malloc( numBytes );
	eps = ((float*)malloc(sizeof(float)));
	eps1 = ((float*)malloc(sizeof(float)));
	eps[0] = 0; 
	for ( int i = 0; i < rows; i++ )
	    for ( int j = 0; j < rows; j++ ) {
		    float x = i*h;
		    float y = j*h;
		    f[i*rows + j] =4 + 2*x*x - 2*x + 2*y*y - 2*y;
		    u[i*rows + j] = 0;
		    v[i*rows + j] = (x*x - x + 1)*(y*y - y + 1);
	}
	for ( int i = 0; i < rows; i++ ) {
		float x = i*h;
		u[i*rows] = x*x - x + 1;
		u[i] = x*x - x + 1;
		u[i*rows+(rows-1)] = x*x - x + 1;
		u[(rows-1)*rows+i] = x*x - x + 1;
	}
	// allocate device memory
	float * devU = NULL;
	float * devV = NULL;
	float * devF = NULL;
	float * devE = NULL;
		
	cudaMalloc ( (void**)&devU, numBytes );
	cudaMalloc ( (void**)&devV, numBytes );
	cudaMalloc ( (void**)&devF, numBytes );
	cudaMalloc ((void**)&devE, sizeof(float));
	
	//set kernel launch configuration
	dim3 grid = dim3(16, 16);
	dim3 blocks  = dim3(16, 16);
	
	cudaMemcpy ( devU, u, numBytes, cudaMemcpyHostToDevice);
	cudaMemcpy ( devV, v, numBytes, cudaMemcpyHostToDevice);
	cudaMemcpy ( devF, f, numBytes, cudaMemcpyHostToDevice);
	cudaMemcpy ( devE, eps, sizeof(float), cudaMemcpyHostToDevice);
	clock_t t1, t2;
	t1 = clock();
        do{
            dirihle<<<grid, blocks>>>(devU, devF, devV, rows, h*h, 0, devE);
	    cudaMemcpy(eps1, devE, sizeof(float), cudaMemcpyDeviceToHost);
	    dirihle<<<grid, blocks>>>(devU, devF, devV, rows, h*h, 1, devE);
	    cudaMemcpy(eps, devE, sizeof(float), cudaMemcpyDeviceToHost);
	    cerr<<count<<" "<<eps[0]<<" "<<eps1[0]<<endl;
	    count++;
	    }
	    while (count < 35300 || eps[0] > 0.005 || eps1[0] > 0.005);
	    cudaMemcpy(u,devU,numBytes,cudaMemcpyDeviceToHost);
	t2 = clock();
	cerr<<" "<<((float)(t2 - t1))/(CLOCKS_PER_SEC)<<" sec" <<endl;
	for (int i = 0; i < rows; i++ )
	    for ( int j = 0; j < rows; j++ ) {
	        cout << i*h << " " << j*h << " " << u[i*rows+j] <<endl;
	}
	delete [] u;
	delete [] f;
	delete [] v;
	delete [] eps;
	
	cudaFree ( devU );
	cudaFree ( devV );
	cudaFree ( devF );
	cudaFree ( devE );
	
	return 0;
}





	.file	"tmpxft_00393f7a_00000000-6_zeidel.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z35__device_stub__Z7dirihlePfS_S_ifiS_PfS_S_ifiS_
	.type	_Z35__device_stub__Z7dirihlePfS_S_ifiS_PfS_S_ifiS_, @function
_Z35__device_stub__Z7dirihlePfS_S_ifiS_PfS_S_ifiS_:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%r9, (%rsp)
	movss	%xmm0, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z7dirihlePfS_S_ifiS_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z35__device_stub__Z7dirihlePfS_S_ifiS_PfS_S_ifiS_, .-_Z35__device_stub__Z7dirihlePfS_S_ifiS_PfS_S_ifiS_
	.globl	_Z7dirihlePfS_S_ifiS_
	.type	_Z7dirihlePfS_S_ifiS_, @function
_Z7dirihlePfS_S_ifiS_:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z7dirihlePfS_S_ifiS_PfS_S_ifiS_
	.cfi_endproc
.LFE3661:
	.size	_Z7dirihlePfS_S_ifiS_, .-_Z7dirihlePfS_S_ifiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC5:
	.string	" "
.LC8:
	.string	" sec"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$262144, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$262144, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$262144, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$4, %edi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movl	$4, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$0x00000000, 0(%rbp)
	movss	.LC2(%rip), %xmm4
	movss	.LC3(%rip), %xmm3
	movq	%rax, %r13
	xorl	%eax, %eax
.L10:
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC1(%rip), %xmm0
	movq	%rax, %rcx
	xorl	%edx, %edx
	salq	$10, %rcx
	movaps	%xmm0, %xmm1
	movaps	%xmm0, %xmm2
	addss	%xmm0, %xmm1
	mulss	%xmm0, %xmm2
	movaps	%xmm1, %xmm5
	mulss	%xmm0, %xmm5
	subss	%xmm0, %xmm2
	addss	%xmm3, %xmm2
	addss	%xmm4, %xmm5
	subss	%xmm1, %xmm5
.L9:
	cvtsi2ssl	%edx, %xmm0
	mulss	.LC1(%rip), %xmm0
	movq	(%rsp), %rsi
	incl	%edx
	movaps	%xmm0, %xmm6
	addss	%xmm0, %xmm6
	movaps	%xmm6, %xmm1
	mulss	%xmm0, %xmm1
	addss	%xmm5, %xmm1
	subss	%xmm6, %xmm1
	movss	%xmm1, (%r12,%rcx)
	movaps	%xmm0, %xmm1
	mulss	%xmm0, %xmm1
	subss	%xmm0, %xmm1
	addss	%xmm3, %xmm1
	movaps	%xmm1, %xmm0
	mulss	%xmm2, %xmm0
	movss	%xmm0, (%rsi,%rcx)
	addq	$4, %rcx
	cmpl	$256, %edx
	jne	.L9
	incq	%rax
	cmpq	$256, %rax
	jne	.L10
	xorl	%eax, %eax
	movl	$65536, %ecx
	movq	%rbx, %rdi
	movq	%rbx, %rdx
	rep stosl
	xorl	%eax, %eax
.L13:
	cvtsi2ssl	%eax, %xmm1
	mulss	.LC1(%rip), %xmm1
	addq	$1024, %rdx
	movaps	%xmm1, %xmm0
	mulss	%xmm1, %xmm0
	subss	%xmm1, %xmm0
	addss	%xmm3, %xmm0
	movss	%xmm0, -1024(%rdx)
	movss	%xmm0, (%rbx,%rax,4)
	movss	%xmm0, -4(%rdx)
	movss	%xmm0, 261120(%rbx,%rax,4)
	incq	%rax
	cmpq	$256, %rax
	jne	.L13
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	movl	$262144, %esi
	movl	$1, %r14d
	movq	%rax, 16(%rsp)
	movq	%rax, 24(%rsp)
	movq	%rax, 32(%rsp)
	movq	%rax, 40(%rsp)
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movabsq	$68719476752, %rax
	movl	$262144, %edx
	movl	$1, 56(%rsp)
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	cudaMemcpy@PLT
	movq	(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	call	clock@PLT
	movq	%rax, %r15
.L14:
	movl	68(%rsp), %ecx
	movq	60(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	40(%rsp), %r9
	movss	.LC4(%rip), %xmm0
	xorl	%r8d, %r8d
	movl	$256, %ecx
	movq	24(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z35__device_stub__Z7dirihlePfS_S_ifiS_PfS_S_ifiS_
.L15:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	40(%rsp), %r9
	movq	24(%rsp), %rdx
	movl	$1, %r8d
	movl	$256, %ecx
	movss	.LC4(%rip), %xmm0
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z35__device_stub__Z7dirihlePfS_S_ifiS_PfS_S_ifiS_
.L16:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movl	%r14d, %esi
	leaq	_ZSt4cerr(%rip), %rdi
	incl	%r14d
	call	_ZNSolsEi@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	0(%rbp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	0(%r13), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	cmpl	$35299, %r14d
	jle	.L14
	movsd	.LC6(%rip), %xmm0
	cvtss2sd	0(%rbp), %xmm1
	comisd	%xmm0, %xmm1
	ja	.L14
	cvtss2sd	0(%r13), %xmm1
	comisd	%xmm0, %xmm1
	ja	.L14
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$262144, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	call	clock@PLT
	leaq	.LC5(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	movq	%rax, %r13
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	subq	%r15, %r13
	xorl	%r15d, %r15d
	movq	%rax, %rdi
	cvtsi2ssq	%r13, %xmm0
	divss	.LC7(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC8(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L18:
	cvtsi2ssl	%r15d, %xmm0
	mulss	.LC1(%rip), %xmm0
	movq	%r15, %r14
	xorl	%r13d, %r13d
	salq	$10, %r14
	addq	%rbx, %r14
	cvtss2sd	%xmm0, %xmm7
	movsd	%xmm7, 8(%rsp)
.L19:
	movsd	8(%rsp), %xmm0
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtsi2ssl	%r13d, %xmm0
	mulss	.LC1(%rip), %xmm0
	movq	%rax, %rdi
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	(%r14,%r13,4), %xmm0
	incq	%r13
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	cmpq	$256, %r13
	jne	.L19
	incq	%r15
	cmpq	$256, %r15
	jne	.L18
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	(%rsp), %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z7dirihlePfS_S_ifiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7dirihlePfS_S_ifiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	998277249
	.align 4
.LC2:
	.long	1082130432
	.align 4
.LC3:
	.long	1065353216
	.align 4
.LC4:
	.long	931201411
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC6:
	.long	1202590843
	.long	1064598241
	.section	.rodata.cst4
	.align 4
.LC7:
	.long	1232348160
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<stdlib.h>
#include<math.h>
#include<iostream>
#include<time.h>

#define BLOCK_DIM_X 16
#define BLOCK_DIM_Y 16

using namespace std;

__global__ void dirihle (float* u, float* f, float* v, int N, float h2, int rb, float* eps)
{
	
	__shared__ float s_u[BLOCK_DIM_X + 2][BLOCK_DIM_Y + 2];
	int i = blockIdx.x*blockDim.x + threadIdx.x;
	int j = blockIdx.y*blockDim.y + threadIdx.y;
	int tx = threadIdx.x+1;
	int ty = threadIdx.y+1;
	int k = j*N + i;
	if ( i < N && j < N )
	{
	    s_u[ty][tx] = u[k];
	    if ( ty == 1 && j > 0 )
		s_u[ty-1][tx] = u[k-N];
	    if ( ty == BLOCK_DIM_X && j < N-1 )
		s_u[ty+1][tx] = u[k+N];
	    if ( tx == 1 && i > 0 )
		s_u[ty][tx-1] = u[k-1];
	    if ( tx == BLOCK_DIM_Y && i < N-1 )
		s_u[ty][tx+1] = u[k+1];
	    if ( i == 0 )
		s_u[ty][tx-1] = u[k+N-2];
	    if( i == N-1 )
		s_u[ty][tx+1] = u[k-N+2];
	}
	__syncthreads();
	eps[0] = 0;
	if ( (i > 0 ) && ( i < N-1 ) && ( j > 0 ) && ( j < N-1 ) && ( k < N*N ) && ( i + j )%2 == rb ) {
		u[k] = 0.25*(s_u[ty-1][tx] + s_u[ty+1][tx] + s_u[ty][tx-1] + s_u[ty][tx+1] - h2*f[k]);
		}
		if ( eps[0] < abs(v[k] - u[k] )){ 
		eps[0] = abs(v[k] - u[k]);
	}
}
int main( int argc, char *  argv [] )
{
	int rows = 256;
	int count = 1;
	float* eps1;
	float* eps;
	float h =(float)1/(rows-1);
	int numBytes = sizeof(float)*rows*rows;
	float* u;
	float* f;
	float* v;
	u = ( float* )malloc( numBytes );
	f = ( float* )malloc( numBytes );
	v = ( float* )malloc( numBytes );
	eps = ((float*)malloc(sizeof(float)));
	eps1 = ((float*)malloc(sizeof(float)));
	eps[0] = 0; 
	for ( int i = 0; i < rows; i++ )
	    for ( int j = 0; j < rows; j++ ) {
		    float x = i*h;
		    float y = j*h;
		    f[i*rows + j] =4 + 2*x*x - 2*x + 2*y*y - 2*y;
		    u[i*rows + j] = 0;
		    v[i*rows + j] = (x*x - x + 1)*(y*y - y + 1);
	}
	for ( int i = 0; i < rows; i++ ) {
		float x = i*h;
		u[i*rows] = x*x - x + 1;
		u[i] = x*x - x + 1;
		u[i*rows+(rows-1)] = x*x - x + 1;
		u[(rows-1)*rows+i] = x*x - x + 1;
	}
	// allocate device memory
	float * devU = NULL;
	float * devV = NULL;
	float * devF = NULL;
	float * devE = NULL;
		
	hipMalloc ( (void**)&devU, numBytes );
	hipMalloc ( (void**)&devV, numBytes );
	hipMalloc ( (void**)&devF, numBytes );
	hipMalloc ((void**)&devE, sizeof(float));
	
	//set kernel launch configuration
	dim3 grid = dim3(16, 16);
	dim3 blocks  = dim3(16, 16);
	
	hipMemcpy ( devU, u, numBytes, hipMemcpyHostToDevice);
	hipMemcpy ( devV, v, numBytes, hipMemcpyHostToDevice);
	hipMemcpy ( devF, f, numBytes, hipMemcpyHostToDevice);
	hipMemcpy ( devE, eps, sizeof(float), hipMemcpyHostToDevice);
	clock_t t1, t2;
	t1 = clock();
        do{
            dirihle<<<grid, blocks>>>(devU, devF, devV, rows, h*h, 0, devE);
	    hipMemcpy(eps1, devE, sizeof(float), hipMemcpyDeviceToHost);
	    dirihle<<<grid, blocks>>>(devU, devF, devV, rows, h*h, 1, devE);
	    hipMemcpy(eps, devE, sizeof(float), hipMemcpyDeviceToHost);
	    cerr<<count<<" "<<eps[0]<<" "<<eps1[0]<<endl;
	    count++;
	    }
	    while (count < 35300 || eps[0] > 0.005 || eps1[0] > 0.005);
	    hipMemcpy(u,devU,numBytes,hipMemcpyDeviceToHost);
	t2 = clock();
	cerr<<" "<<((float)(t2 - t1))/(CLOCKS_PER_SEC)<<" sec" <<endl;
	for (int i = 0; i < rows; i++ )
	    for ( int j = 0; j < rows; j++ ) {
	        cout << i*h << " " << j*h << " " << u[i*rows+j] <<endl;
	}
	delete [] u;
	delete [] f;
	delete [] v;
	delete [] eps;
	
	hipFree ( devU );
	hipFree ( devV );
	hipFree ( devF );
	hipFree ( devE );
	
	return 0;
}





	.text
	.file	"zeidel.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z22__device_stub__dirihlePfS_S_ifiS_ # -- Begin function _Z22__device_stub__dirihlePfS_S_ifiS_
	.type	_Z22__device_stub__dirihlePfS_S_ifiS_,@function
_Z22__device_stub__dirihlePfS_S_ifiS_:  # @_Z22__device_stub__dirihlePfS_S_ifiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	8(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	4(%rsp), %r10
	movl	%r8d, (%r10)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r10, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7dirihlePfS_S_ifiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__dirihlePfS_S_ifiS_, .Lfunc_end0-_Z22__device_stub__dirihlePfS_S_ifiS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3b808081                      # float 0.00392156886
.LCPI1_1:
	.long	0x40800000                      # float 4
.LCPI1_2:
	.long	0x3f800000                      # float 1
.LCPI1_3:
	.long	0x37810183                      # float 1.53787023E-5
.LCPI1_5:
	.long	0x49742400                      # float 1.0E+6
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI1_4:
	.quad	0x3f747ae147ae147b              # double 0.0050000000000000001
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$1, %edi
	movl	$262144, %esi                   # imm = 0x40000
	callq	calloc@PLT
	movq	%rax, %r12
	movl	$262144, %edi                   # imm = 0x40000
	callq	malloc
	movq	%rax, %r15
	movl	$262144, %edi                   # imm = 0x40000
	callq	malloc
	movq	%rax, %rbx
	movl	$4, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$4, %edi
	callq	malloc
	movq	%rax, %r13
	movl	$0, (%r14)
	xorl	%eax, %eax
	movss	.LCPI1_0(%rip), %xmm7           # xmm7 = mem[0],zero,zero,zero
	movss	.LCPI1_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movss	.LCPI1_2(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$1024, %ecx                     # imm = 0x400
	movq	%r15, 40(%rsp)                  # 8-byte Spill
	movq	%rbx, 48(%rsp)                  # 8-byte Spill
.LBB1_1:                                # %.preheader149
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	xorps	%xmm4, %xmm4
	cvtsi2ss	%eax, %xmm4
	mulss	%xmm7, %xmm4
	movaps	%xmm4, %xmm2
	movaps	%xmm4, %xmm3
	mulss	%xmm4, %xmm3
	subss	%xmm4, %xmm3
	addss	%xmm4, %xmm4
	mulss	%xmm4, %xmm2
	addss	%xmm1, %xmm2
	subss	%xmm4, %xmm2
	addss	%xmm0, %xmm3
	xorl	%edi, %edi
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm4, %xmm4
	cvtsi2ss	%edi, %xmm4
	mulss	%xmm7, %xmm4
	movaps	%xmm4, %xmm5
	movaps	%xmm4, %xmm6
	mulss	%xmm4, %xmm6
	subss	%xmm4, %xmm6
	addss	%xmm4, %xmm4
	mulss	%xmm4, %xmm5
	addss	%xmm2, %xmm5
	subss	%xmm4, %xmm5
	movss	%xmm5, (%r15,%rdi,4)
	addss	%xmm0, %xmm6
	mulss	%xmm3, %xmm6
	movss	%xmm6, (%rbx,%rdi,4)
	incq	%rdi
	cmpq	$256, %rdi                      # imm = 0x100
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%rax
	addq	%rcx, %rbx
	addq	%rcx, %r15
	cmpq	$256, %rax                      # imm = 0x100
	jne	.LBB1_1
# %bb.4:                                # %.preheader148.preheader
	xorl	%eax, %eax
	movq	%r12, %rcx
.LBB1_5:                                # %.preheader148
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm1, %xmm1
	cvtsi2ss	%eax, %xmm1
	mulss	%xmm7, %xmm1
	movaps	%xmm1, %xmm2
	mulss	%xmm1, %xmm2
	subss	%xmm1, %xmm2
	addss	%xmm0, %xmm2
	movss	%xmm2, (%rcx)
	movss	%xmm2, (%r12,%rax,4)
	movss	%xmm2, 1020(%rcx)
	movss	%xmm2, 261120(%r12,%rax,4)
	incq	%rax
	addq	$1024, %rcx                     # imm = 0x400
	cmpq	$256, %rax                      # imm = 0x100
	jne	.LBB1_5
# %bb.6:
	movabsq	$68719476752, %rbp              # imm = 0x1000000010
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rax, (%rcx)
	movq	%rcx, %rdi
	leaq	16(%rsp), %rbx
	movq	%rax, (%rbx)
	leaq	32(%rsp), %r15
	movq	%rax, (%r15)
	movq	%rsp, %rcx
	movq	%rax, (%rcx)
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
	movl	$262144, %esi                   # imm = 0x40000
	movq	%rbx, %rdi
	callq	hipMalloc
	movl	$262144, %esi                   # imm = 0x40000
	movq	%r15, %rdi
	callq	hipMalloc
	movl	$4, %esi
	movq	%rsp, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rax
	movq	(%rax), %rdi
	movl	$1, %ebx
	movl	$262144, %edx                   # imm = 0x40000
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movl	$262144, %edx                   # imm = 0x40000
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movl	$262144, %edx                   # imm = 0x40000
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rsp, %rax
	movq	(%rax), %rdi
	movl	$4, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	clock
	movq	%rax, 24(%rsp)                  # 8-byte Spill
.LBB1_7:                                # %.backedge
                                        # =>This Inner Loop Header: Depth=1
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.8:                                #   in Loop: Header=BB1_7 Depth=1
	movq	8(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	(%rsp), %r9
	movl	$256, %ecx                      # imm = 0x100
	movss	.LCPI1_3(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	xorl	%r8d, %r8d
	callq	_Z22__device_stub__dirihlePfS_S_ifiS_
.LBB1_9:                                #   in Loop: Header=BB1_7 Depth=1
	movq	(%rsp), %rsi
	movl	$4, %edx
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_11
# %bb.10:                               #   in Loop: Header=BB1_7 Depth=1
	movq	8(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	(%rsp), %r9
	movl	$256, %ecx                      # imm = 0x100
	movss	.LCPI1_3(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$1, %r8d
	callq	_Z22__device_stub__dirihlePfS_S_ifiS_
.LBB1_11:                               #   in Loop: Header=BB1_7 Depth=1
	movq	(%rsp), %rsi
	movl	$4, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cerr, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movl	$.L.str, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14), %xmm0
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13), %xmm0
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	cmpl	$35299, %ebx                    # imm = 0x89E3
	jb	.LBB1_13
# %bb.12:                               #   in Loop: Header=BB1_7 Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14), %xmm0
	ucomisd	.LCPI1_4(%rip), %xmm0
	ja	.LBB1_13
# %bb.14:                               #   in Loop: Header=BB1_7 Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13), %xmm0
	ucomisd	.LCPI1_4(%rip), %xmm0
	jbe	.LBB1_15
.LBB1_13:                               # %.backedge.backedge
                                        #   in Loop: Header=BB1_7 Depth=1
	incl	%ebx
	jmp	.LBB1_7
.LBB1_15:
	movq	8(%rsp), %rsi
	movl	$262144, %edx                   # imm = 0x40000
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	movq	%rax, %rbx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	subq	24(%rsp), %rbx                  # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rbx, %xmm0
	divss	.LCPI1_5(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.1, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%r15d, %r15d
	movq	%r12, %r13
.LBB1_16:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_17 Depth 2
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r15d, %xmm0
	movss	.LCPI1_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	xorl	%ebp, %ebp
.LBB1_17:                               #   Parent Loop BB1_16 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$_ZSt4cout, %edi
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebp, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13,%rbp,4), %xmm0
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%rbp
	cmpq	$256, %rbp                      # imm = 0x100
	jne	.LBB1_17
# %bb.18:                               #   in Loop: Header=BB1_16 Depth=1
	incq	%r15
	addq	$1024, %r13                     # imm = 0x400
	cmpq	$256, %r15                      # imm = 0x100
	jne	.LBB1_16
# %bb.19:
	movq	%r12, %rdi
	callq	_ZdaPv
	movq	40(%rsp), %rdi                  # 8-byte Reload
	testq	%rdi, %rdi
	je	.LBB1_21
# %bb.20:
	callq	_ZdaPv
.LBB1_21:
	movq	48(%rsp), %rdi                  # 8-byte Reload
	testq	%rdi, %rdi
	je	.LBB1_23
# %bb.22:
	callq	_ZdaPv
.LBB1_23:
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7dirihlePfS_S_ifiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7dirihlePfS_S_ifiS_,@object   # @_Z7dirihlePfS_S_ifiS_
	.section	.rodata,"a",@progbits
	.globl	_Z7dirihlePfS_S_ifiS_
	.p2align	3, 0x0
_Z7dirihlePfS_S_ifiS_:
	.quad	_Z22__device_stub__dirihlePfS_S_ifiS_
	.size	_Z7dirihlePfS_S_ifiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" "
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" sec"
	.size	.L.str.1, 5

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7dirihlePfS_S_ifiS_"
	.size	.L__unnamed_1, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__dirihlePfS_S_ifiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7dirihlePfS_S_ifiS_
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7dirihlePfS_S_ifiS_   ; -- Begin function _Z7dirihlePfS_S_ifiS_
	.globl	_Z7dirihlePfS_S_ifiS_
	.p2align	8
	.type	_Z7dirihlePfS_S_ifiS_,@function
_Z7dirihlePfS_S_ifiS_:                  ; @_Z7dirihlePfS_S_ifiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[8:11], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[12:13], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[5:6], null, s15, s3, v[3:4]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, v5, s8, v[4:5]
	v_max_i32_e32 v10, v4, v5
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_i32_e64 s8, v10
	s_cbranch_execz .LBB0_13
; %bb.1:
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[0:1]
	v_lshlrev_b32_e32 v12, 2, v2
	v_cmp_lt_i32_e64 s2, 0, v5
	v_mad_u32_u24 v11, 0x48, v3, v12
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v8, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v7, vcc_lo
	v_subrev_nc_u32_e32 v6, s8, v0
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	global_load_b32 v13, v[8:9], off
	v_ashrrev_i32_e32 v7, 31, v6
	s_and_b32 s11, vcc_lo, s2
	s_waitcnt vmcnt(0)
	ds_store_b32 v11, v13 offset:76
	s_and_saveexec_b32 s2, s11
	s_cbranch_execz .LBB0_3
; %bb.2:
	v_lshlrev_b64 v[13:14], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, s4, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
	global_load_b32 v13, v[13:14], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v12, v13 offset:4
.LBB0_3:
	s_or_b32 exec_lo, exec_lo, s2
	s_add_i32 s11, s8, -1
	v_cmp_eq_u32_e32 vcc_lo, 15, v3
	v_cmp_gt_i32_e64 s2, s11, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s14, vcc_lo, s2
	s_and_saveexec_b32 s2, s14
	s_cbranch_execz .LBB0_5
; %bb.4:
	s_ashr_i32 s15, s8, 31
	s_mov_b32 s14, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[14:15], s[14:15], 2
	v_add_co_u32 v13, vcc_lo, v8, s14
	v_add_co_ci_u32_e32 v14, vcc_lo, s15, v9, vcc_lo
	global_load_b32 v13, v[13:14], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v12, v13 offset:1228
.LBB0_5:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	v_cmp_lt_i32_e64 s2, 0, v4
	v_mul_u32_u24_e32 v12, 0x48, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s14, vcc_lo, s2
	s_and_saveexec_b32 s2, s14
	s_cbranch_execz .LBB0_7
; %bb.6:
	global_load_b32 v13, v[8:9], off offset:-4
	s_waitcnt vmcnt(0)
	ds_store_b32 v12, v13 offset:72
.LBB0_7:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_eq_u32_e32 vcc_lo, 15, v2
	v_cmp_gt_i32_e64 s2, s11, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s14, vcc_lo, s2
	s_and_saveexec_b32 s2, s14
	s_cbranch_execz .LBB0_9
; %bb.8:
	global_load_b32 v13, v[8:9], off offset:4
	s_waitcnt vmcnt(0)
	ds_store_b32 v12, v13 offset:140
.LBB0_9:
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB0_11
; %bb.10:
	s_ashr_i32 s15, s8, 31
	s_mov_b32 s14, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[14:15], s[14:15], 2
	v_add_co_u32 v8, vcc_lo, v8, s14
	v_add_co_ci_u32_e32 v9, vcc_lo, s15, v9, vcc_lo
	global_load_b32 v8, v[8:9], off offset:-8
	s_waitcnt vmcnt(0)
	ds_store_b32 v11, v8 offset:72
.LBB0_11:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_eq_u32_e32 vcc_lo, s11, v4
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_13
; %bb.12:
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v6, v[6:7], off offset:8
	s_waitcnt vmcnt(0)
	ds_store_b32 v11, v6 offset:80
.LBB0_13:                               ; %Flow135
	s_or_b32 exec_lo, exec_lo, s3
	s_load_b64 s[2:3], s[0:1], 0x28
	v_mov_b32_e32 v6, 0
	s_mov_b32 s11, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	global_store_b32 v6, v6, s[2:3]
	v_cmpx_lt_i32_e32 0, v4
	s_cbranch_execz .LBB0_19
; %bb.14:
	s_add_i32 s0, s8, -1
	s_mul_i32 s1, s8, s8
	v_cmp_gt_i32_e32 vcc_lo, s0, v10
	v_cmp_gt_i32_e64 s0, s1, v0
	v_cmp_lt_i32_e64 s1, 0, v5
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_3)
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_18
; %bb.15:
	v_add_nc_u32_e32 v4, v5, v4
	v_mov_b32_e32 v6, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, 1, v4
	v_cmpx_eq_u32_e64 s10, v4
	s_cbranch_execz .LBB0_17
; %bb.16:
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	v_lshlrev_b32_e32 v2, 2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v5, vcc_lo
	global_load_b32 v8, v[6:7], off
	v_mad_u32_u24 v6, 0x48, v3, v2
	ds_load_2addr_b32 v[2:3], v6 offset0:1 offset1:18
	ds_load_2addr_b32 v[6:7], v6 offset0:20 offset1:37
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v3
	v_add_f32_e32 v2, v2, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v2, -v8, s9, v2
	v_mul_f32_e32 v6, 0x3e800000, v2
	v_add_co_u32 v2, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v5, vcc_lo
	v_mov_b32_e32 v4, 0
	global_store_b32 v[2:3], v6, off
	global_load_b32 v6, v4, s[2:3]
.LBB0_17:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_18:                               ; %Flow133
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_19:
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s11
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_mov_b32 s1, exec_lo
	v_add_co_u32 v2, vcc_lo, s12, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v0, v2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_f32_e64 v6, |v0|
	s_cbranch_execz .LBB0_21
; %bb.20:
	v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x7fffffff, v0
	global_store_b32 v1, v0, s[2:3]
.LBB0_21:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7dirihlePfS_S_ifiS_
		.amdhsa_group_segment_fixed_size 1296
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7dirihlePfS_S_ifiS_, .Lfunc_end0-_Z7dirihlePfS_S_ifiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1012
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1296 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1296
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7dirihlePfS_S_ifiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7dirihlePfS_S_ifiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
