#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>
#include <stdbool.h>
#include <unistd.h>
#include <pthread.h>
#include <cuda.h>
#define NUM_THREADs 5
#define BLOCK_SIZE 16
#define PI 3.141592654
#define MEGEXTRA 1000000

typedef struct Matrix
{
    int width;
    int height;
    double* elements;
} Matrix;


__global__ void find1elt(double *m, double *rs, int n)
{
    int rownum = blockIdx.x; // this thread will handle row # rownum
    double sum = 0;
    for (int k = 0; k < n; k++)
        sum += m[rownum*n+k];
    rs[rownum] = sum;
}
__global__ void Vector_Sub( double *dev_a , double *dev_b , double *dev_c,int n)
{
    //Get the id of thread within a block
//      unsigned short tid = threadIdx.x ;
    int tid=blockIdx.x * blockDim.x + threadIdx.x;
    if ( tid < n )  // check the boundry condition for the threads{
    {
        dev_c [tid] = (dev_a[tid]*1.0) - (dev_b[tid]*0.5) ;
// printf("%f %f\n",dev_a[tid],dev_b[tid]);
    }

}


extern "C" void get_host(Matrix A, Matrix D,double* Host_c , int n, int m,int dev_no){
    int nDevices;

  cudaGetDeviceCount(&nDevices);
  if(nDevices!=6){
    printf("shit\n");
    nDevices = 6;
  }
    dev_no = ((dev_no)%(nDevices));
        dev_no = nDevices - dev_no -1 ;

    cudaSetDevice(dev_no);
           double *dm, // device matrix
               *hrs, // host rowsums
               *drs; // device rowsums
        //int n;
        double msize = n * m * sizeof(double); // size of matrix in bytes
        // allocate space for host matrix
        // as a test, fill matrix with consecutive integers
        // allocate space for device matrix
        cudaMalloc((void **)&dm,msize);
        // copy host matrix to device matrix
        cudaMemcpy(dm,D.elements,msize,cudaMemcpyHostToDevice);
        // allocate host, device rowsum arrays
        double rssize = n * sizeof(double);
        hrs = (double *) malloc(rssize);
        cudaMalloc((void **)&drs,rssize);
        // set up parameters for threads structure
        dim3 dimGrid(n,1); // n blocks
        dim3 dimBlock(1,1,1); // 1 thread per block
        // invoke the kernel
        find1elt<<<dimGrid,dimBlock>>>(dm,drs,m);
        // wait for kernel to finish
        cudaThreadSynchronize();
        // copy row vector from device to host
        cudaMemcpy(hrs,drs,rssize,cudaMemcpyDeviceToHost);
        // check results
        /*
        printf("Sum(A*Q.xA),2)=\n");
        if (n < 100) for(int i=0; i<n; i++) printf("%f\n",hrs[i]);*/
        // clean up
        double *dm1, // device matrix
               *hrs1, // host rowsums
               *drs1; // device rowsums
        //int n;
        double msize1 = n * m * sizeof(double); // size of matrix in bytes
        // allocate space for host matrix
        // as a test, fill matrix with consecutive integers
        //  t = 0,i,j;

        // allocate space for device matrix
        cudaMalloc((void **)&dm1,msize1);
        // copy host matrix to device matrix
        cudaMemcpy(dm1,A.elements,msize1,cudaMemcpyHostToDevice);
        // allocate host, device rowsum arrays
        double rssize1 = n * sizeof(double);
        hrs1 = (double *) malloc(rssize1);
        cudaMalloc((void **)&drs1,rssize1);
        // set up parameters for threads structure
        dim3 dimGrid1(n,1); // n blocks
        dim3 dimBlock1(1,1,1); // 1 thread per block
        // invoke the kernel
        find1elt<<<dimGrid1,dimBlock1>>>(dm1,drs1,m);
        // wait for kernel to finish
        cudaThreadSynchronize();
        // copy row vector from device to host
        cudaMemcpy(hrs1,drs1,rssize1,cudaMemcpyDeviceToHost);
        // check results
        /* printf("Sum(A,2)=\n");
             if (n < 100) for(int i=0; i<n; i++) printf("%f\n",hrs1[i]);*/

        //Device array
        double* dev_c1 ;

        //Allocate the memory on the GPU
        cudaMalloc((void **)&dev_c1 , n*sizeof(double) ) ;


        dim3 dimGrid2(n,1); // n blocks
        dim3 dimBlock2(1,1,1); // 1 thread per block
        //Make a call to GPU kernel
        //Vector_Sub<<< dimGrid2 ,dimBlock2 >>> (dev_a1 , dev_b1 , dev_c1,n ) ;
        Vector_Sub<<< dimGrid2 ,dimBlock2 >>> (drs1 , drs , dev_c1,n ) ;
        //Copy back to Host array from Device array
        cudaMemcpy(Host_c , dev_c1 , n*sizeof(double) , cudaMemcpyDeviceToHost);

        //Display the result
        //printf("The F:=\n");
      /*  for ( int i = 0; i<n; i++ )
            printf ("%f\n", Host_c[i] ) ; */

        //Free the Device array memory
        cudaFree (dev_c1) ;

        cudaFree(dm);
        free(hrs);
        cudaFree(drs);
        cudaFree(dm1);
        free(hrs1);
        cudaFree(drs1);
        return;
}
	.file	"tmpxft_002f703a_00000000-6_host_c.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2052:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2052:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z30__device_stub__Z8find1eltPdS_iPdS_i
	.type	_Z30__device_stub__Z8find1eltPdS_iPdS_i, @function
_Z30__device_stub__Z8find1eltPdS_iPdS_i:
.LFB2074:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z8find1eltPdS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2074:
	.size	_Z30__device_stub__Z8find1eltPdS_iPdS_i, .-_Z30__device_stub__Z8find1eltPdS_iPdS_i
	.globl	_Z8find1eltPdS_i
	.type	_Z8find1eltPdS_i, @function
_Z8find1eltPdS_i:
.LFB2075:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z8find1eltPdS_iPdS_i
	.cfi_endproc
.LFE2075:
	.size	_Z8find1eltPdS_i, .-_Z8find1eltPdS_i
	.globl	_Z35__device_stub__Z10Vector_SubPdS_S_iPdS_S_i
	.type	_Z35__device_stub__Z10Vector_SubPdS_S_iPdS_S_i, @function
_Z35__device_stub__Z10Vector_SubPdS_S_iPdS_S_i:
.LFB2076:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10Vector_SubPdS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2076:
	.size	_Z35__device_stub__Z10Vector_SubPdS_S_iPdS_S_i, .-_Z35__device_stub__Z10Vector_SubPdS_S_iPdS_S_i
	.globl	_Z10Vector_SubPdS_S_i
	.type	_Z10Vector_SubPdS_S_i, @function
_Z10Vector_SubPdS_S_i:
.LFB2077:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10Vector_SubPdS_S_iPdS_S_i
	.cfi_endproc
.LFE2077:
	.size	_Z10Vector_SubPdS_S_i, .-_Z10Vector_SubPdS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"shit\n"
	.text
	.globl	get_host
	.type	get_host, @function
get_host:
.LFB2049:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r9d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rcx, %rbx
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	20(%rsp), %rdi
	call	cudaGetDeviceCount@PLT
	cmpl	$6, 20(%rsp)
	je	.L14
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$6, 20(%rsp)
.L14:
	movl	216(%rsp), %eax
	movl	20(%rsp), %edi
	cltd
	idivl	%edi
	subl	%edx, %edi
	decl	%edi
	call	cudaSetDevice@PLT
	movl	208(%rsp), %eax
	imull	%ebp, %eax
	cltq
	salq	$3, %rax
	js	.L15
	cvtsi2sdq	%rax, %xmm0
	jmp	.L16
.L15:
	shrq	%rax
	cvtsi2sdq	%rax, %xmm0
	addsd	%xmm0, %xmm0
.L16:
	movsd	.LC1(%rip), %xmm1
	comisd	%xmm1, %xmm0
	jnb	.L17
	cvttsd2siq	%xmm0, %r13
	jmp	.L18
.L17:
	subsd	%xmm1, %xmm0
	cvttsd2siq	%xmm0, %r13
	btcq	$63, %r13
.L18:
	leaq	24(%rsp), %rdi
	movq	%r13, %rsi
	movslq	%ebp, %r12
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movq	%r13, %rdx
	movq	%rbx, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	salq	$3, %r12
	movsd	.LC1(%rip), %xmm1
	js	.L19
	cvtsi2sdq	%r12, %xmm0
	jmp	.L20
.L19:
	movq	%r12, %rax
	shrq	%rax
	cvtsi2sdq	%rax, %xmm0
	addsd	%xmm0, %xmm0
.L20:
	comisd	%xmm1, %xmm0
	jnb	.L21
	cvttsd2siq	%xmm0, %rbx
	jmp	.L22
.L21:
	subsd	%xmm1, %xmm0
	cvttsd2siq	%xmm0, %rbx
	btcq	$63, %rbx
.L22:
	movq	%rbx, %rdi
	call	malloc@PLT
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movl	%ebp, 64(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rdx
	movl	$1, %ecx
	movq	%rdx, 68(%rsp)
	movq	64(%rsp), %rdi
	movl	72(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	movl	208(%rsp), %edx
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z30__device_stub__Z8find1eltPdS_iPdS_i
.L23:
	call	cudaThreadSynchronize@PLT
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	%r13, %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	40(%rsp), %rdi
	movq	%r13, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	%rbx, %rdi
	call	malloc@PLT
	leaq	48(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%rax, %r13
	call	cudaMalloc@PLT
	movl	%ebp, 88(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rdx
	movl	$1, %ecx
	movq	%rdx, 92(%rsp)
	movq	88(%rsp), %rdi
	movl	96(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	movl	208(%rsp), %edx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z30__device_stub__Z8find1eltPdS_iPdS_i
.L24:
	call	cudaThreadSynchronize@PLT
	movq	48(%rsp), %rsi
	movq	%rbx, %rdx
	movq	%r13, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	leaq	56(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movl	%ebp, 112(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rdx
	movl	$1, %ecx
	movq	%rdx, 116(%rsp)
	movq	112(%rsp), %rdi
	movl	120(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movq	56(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%ebp, %ecx
	movq	48(%rsp), %rdi
	call	_Z35__device_stub__Z10Vector_SubPdS_S_iPdS_S_i
.L25:
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdx
	movq	%r14, %rdi
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2049:
	.size	get_host, .-get_host
	.section	.rodata.str1.1
.LC2:
	.string	"_Z10Vector_SubPdS_S_i"
.LC3:
	.string	"_Z8find1eltPdS_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2079:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10Vector_SubPdS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8find1eltPdS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2079:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	0
	.long	1138753536
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>
#include <stdbool.h>
#include <unistd.h>
#include <pthread.h>
#include <hip/hip_runtime.h>
#define NUM_THREADs 5
#define BLOCK_SIZE 16
#define PI 3.141592654
#define MEGEXTRA 1000000

typedef struct Matrix
{
    int width;
    int height;
    double* elements;
} Matrix;


__global__ void find1elt(double *m, double *rs, int n)
{
    int rownum = blockIdx.x; // this thread will handle row # rownum
    double sum = 0;
    for (int k = 0; k < n; k++)
        sum += m[rownum*n+k];
    rs[rownum] = sum;
}
__global__ void Vector_Sub( double *dev_a , double *dev_b , double *dev_c,int n)
{
    //Get the id of thread within a block
//      unsigned short tid = threadIdx.x ;
    int tid=blockIdx.x * blockDim.x + threadIdx.x;
    if ( tid < n )  // check the boundry condition for the threads{
    {
        dev_c [tid] = (dev_a[tid]*1.0) - (dev_b[tid]*0.5) ;
// printf("%f %f\n",dev_a[tid],dev_b[tid]);
    }

}


extern "C" void get_host(Matrix A, Matrix D,double* Host_c , int n, int m,int dev_no){
    int nDevices;

  hipGetDeviceCount(&nDevices);
  if(nDevices!=6){
    printf("shit\n");
    nDevices = 6;
  }
    dev_no = ((dev_no)%(nDevices));
        dev_no = nDevices - dev_no -1 ;

    hipSetDevice(dev_no);
           double *dm, // device matrix
               *hrs, // host rowsums
               *drs; // device rowsums
        //int n;
        double msize = n * m * sizeof(double); // size of matrix in bytes
        // allocate space for host matrix
        // as a test, fill matrix with consecutive integers
        // allocate space for device matrix
        hipMalloc((void **)&dm,msize);
        // copy host matrix to device matrix
        hipMemcpy(dm,D.elements,msize,hipMemcpyHostToDevice);
        // allocate host, device rowsum arrays
        double rssize = n * sizeof(double);
        hrs = (double *) malloc(rssize);
        hipMalloc((void **)&drs,rssize);
        // set up parameters for threads structure
        dim3 dimGrid(n,1); // n blocks
        dim3 dimBlock(1,1,1); // 1 thread per block
        // invoke the kernel
        find1elt<<<dimGrid,dimBlock>>>(dm,drs,m);
        // wait for kernel to finish
        hipDeviceSynchronize();
        // copy row vector from device to host
        hipMemcpy(hrs,drs,rssize,hipMemcpyDeviceToHost);
        // check results
        /*
        printf("Sum(A*Q.xA),2)=\n");
        if (n < 100) for(int i=0; i<n; i++) printf("%f\n",hrs[i]);*/
        // clean up
        double *dm1, // device matrix
               *hrs1, // host rowsums
               *drs1; // device rowsums
        //int n;
        double msize1 = n * m * sizeof(double); // size of matrix in bytes
        // allocate space for host matrix
        // as a test, fill matrix with consecutive integers
        //  t = 0,i,j;

        // allocate space for device matrix
        hipMalloc((void **)&dm1,msize1);
        // copy host matrix to device matrix
        hipMemcpy(dm1,A.elements,msize1,hipMemcpyHostToDevice);
        // allocate host, device rowsum arrays
        double rssize1 = n * sizeof(double);
        hrs1 = (double *) malloc(rssize1);
        hipMalloc((void **)&drs1,rssize1);
        // set up parameters for threads structure
        dim3 dimGrid1(n,1); // n blocks
        dim3 dimBlock1(1,1,1); // 1 thread per block
        // invoke the kernel
        find1elt<<<dimGrid1,dimBlock1>>>(dm1,drs1,m);
        // wait for kernel to finish
        hipDeviceSynchronize();
        // copy row vector from device to host
        hipMemcpy(hrs1,drs1,rssize1,hipMemcpyDeviceToHost);
        // check results
        /* printf("Sum(A,2)=\n");
             if (n < 100) for(int i=0; i<n; i++) printf("%f\n",hrs1[i]);*/

        //Device array
        double* dev_c1 ;

        //Allocate the memory on the GPU
        hipMalloc((void **)&dev_c1 , n*sizeof(double) ) ;


        dim3 dimGrid2(n,1); // n blocks
        dim3 dimBlock2(1,1,1); // 1 thread per block
        //Make a call to GPU kernel
        //Vector_Sub<<< dimGrid2 ,dimBlock2 >>> (dev_a1 , dev_b1 , dev_c1,n ) ;
        Vector_Sub<<< dimGrid2 ,dimBlock2 >>> (drs1 , drs , dev_c1,n ) ;
        //Copy back to Host array from Device array
        hipMemcpy(Host_c , dev_c1 , n*sizeof(double) , hipMemcpyDeviceToHost);

        //Display the result
        //printf("The F:=\n");
      /*  for ( int i = 0; i<n; i++ )
            printf ("%f\n", Host_c[i] ) ; */

        //Free the Device array memory
        hipFree (dev_c1) ;

        hipFree(dm);
        free(hrs);
        hipFree(drs);
        hipFree(dm1);
        free(hrs1);
        hipFree(drs1);
        return;
}
	.text
	.file	"host_c.hip"
	.globl	_Z23__device_stub__find1eltPdS_i # -- Begin function _Z23__device_stub__find1eltPdS_i
	.type	_Z23__device_stub__find1eltPdS_i,@function
_Z23__device_stub__find1eltPdS_i:       # @_Z23__device_stub__find1eltPdS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8find1eltPdS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z23__device_stub__find1eltPdS_i, .Lfunc_end0-_Z23__device_stub__find1eltPdS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__Vector_SubPdS_S_i # -- Begin function _Z25__device_stub__Vector_SubPdS_S_i
	.type	_Z25__device_stub__Vector_SubPdS_S_i,@function
_Z25__device_stub__Vector_SubPdS_S_i:   # @_Z25__device_stub__Vector_SubPdS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10Vector_SubPdS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__Vector_SubPdS_S_i, .Lfunc_end1-_Z25__device_stub__Vector_SubPdS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function get_host
.LCPI2_0:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI2_1:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_2:
	.quad	0x43e0000000000000              # double 9.2233720368547758E+18
	.text
	.globl	get_host
	.type	get_host,@function
get_host:                               # @get_host
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %r15d
	movq	%r8, 64(%rsp)                   # 8-byte Spill
	movq	%rcx, %rbx
	movq	%rsi, 56(%rsp)                  # 8-byte Spill
	movl	136(%rsp), %ebp
	movl	128(%rsp), %r12d
	leaq	36(%rsp), %r14
	movq	%r14, %rdi
	callq	hipGetDeviceCount
	cmpl	$6, (%r14)
	je	.LBB2_2
# %bb.1:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$6, 36(%rsp)
.LBB2_2:
	movslq	%ebp, %rax
	imulq	$715827883, %rax, %rcx          # imm = 0x2AAAAAAB
	movq	%rcx, %rdx
	shrq	$63, %rdx
	shrq	$32, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,2), %edi
	subl	%eax, %edi
	addl	$5, %edi
	callq	hipSetDevice
	movl	%r12d, %eax
	imull	%r15d, %eax
	cltq
	shlq	$3, %rax
	movq	%rax, %xmm0
	punpckldq	.LCPI2_0(%rip), %xmm0   # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
	subpd	.LCPI2_1(%rip), %xmm0
	movapd	%xmm0, %xmm1
	unpckhpd	%xmm0, %xmm1                    # xmm1 = xmm1[1],xmm0[1]
	addsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %rax
	movq	%rax, %rcx
	sarq	$63, %rcx
	subsd	.LCPI2_2(%rip), %xmm1
	cvttsd2si	%xmm1, %r13
	andq	%rcx, %r13
	orq	%rax, %r13
	leaq	48(%rsp), %r14
	movq	%r14, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	(%r14), %rdi
	movq	%rbx, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%r15d, 32(%rsp)                 # 4-byte Spill
	movslq	%r15d, %r14
	leaq	(,%r14,8), %r12
	movq	%r12, %xmm0
	punpckldq	.LCPI2_0(%rip), %xmm0   # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
	subpd	.LCPI2_1(%rip), %xmm0
	movapd	%xmm0, %xmm1
	unpckhpd	%xmm0, %xmm1                    # xmm1 = xmm1[1],xmm0[1]
	addsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %rax
	movq	%rax, %rcx
	sarq	$63, %rcx
	subsd	.LCPI2_2(%rip), %xmm1
	cvttsd2si	%xmm1, %rbx
	andq	%rcx, %rbx
	orq	%rax, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r15
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	%r14d, %eax
	movabsq	$4294967297, %rdx               # imm = 0x100000001
	leaq	(%rax,%rdx), %r14
	decq	%r14
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	48(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	128(%rsp), %edx
	callq	_Z23__device_stub__find1eltPdS_i
.LBB2_4:
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rsi
	movq	%r15, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	40(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r13
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r14, %rdi
	movl	$1, %esi
	movabsq	$4294967297, %rbp               # imm = 0x100000001
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	40(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	128(%rsp), %edx
	callq	_Z23__device_stub__find1eltPdS_i
.LBB2_6:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	%r13, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.7:
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	32(%rsp), %ecx                  # 4-byte Reload
	callq	_Z25__device_stub__Vector_SubPdS_S_i
.LBB2_8:
	movq	24(%rsp), %rsi
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	%r15, %rdi
	callq	free
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	%r13, %rdi
	callq	free
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	get_host, .Lfunc_end2-get_host
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8find1eltPdS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10Vector_SubPdS_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8find1eltPdS_i,@object        # @_Z8find1eltPdS_i
	.section	.rodata,"a",@progbits
	.globl	_Z8find1eltPdS_i
	.p2align	3, 0x0
_Z8find1eltPdS_i:
	.quad	_Z23__device_stub__find1eltPdS_i
	.size	_Z8find1eltPdS_i, 8

	.type	_Z10Vector_SubPdS_S_i,@object   # @_Z10Vector_SubPdS_S_i
	.globl	_Z10Vector_SubPdS_S_i
	.p2align	3, 0x0
_Z10Vector_SubPdS_S_i:
	.quad	_Z25__device_stub__Vector_SubPdS_S_i
	.size	_Z10Vector_SubPdS_S_i, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z8find1eltPdS_i"
	.size	.L__unnamed_1, 17

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10Vector_SubPdS_S_i"
	.size	.L__unnamed_2, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"shit"
	.size	.Lstr, 5

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__find1eltPdS_i
	.addrsig_sym _Z25__device_stub__Vector_SubPdS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8find1eltPdS_i
	.addrsig_sym _Z10Vector_SubPdS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8find1eltPdS_i        ; -- Begin function _Z8find1eltPdS_i
	.globl	_Z8find1eltPdS_i
	.p2align	8
	.type	_Z8find1eltPdS_i,@function
_Z8find1eltPdS_i:                       ; @_Z8find1eltPdS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s5, 1
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_mul_i32 s6, s4, s5
	v_mov_b32_e32 v0, 0
	s_ashr_i32 s7, s6, 31
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[6:7], s[6:7], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s0, s6
	s_addc_u32 s1, s1, s7
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_load_b64 s[6:7], s[0:1], 0x0
	s_add_i32 s5, s5, -1
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s5, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], s[6:7]
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_4
.LBB0_3:
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
.LBB0_4:                                ; %Flow25
	s_ashr_i32 s5, s4, 31
	v_mov_b32_e32 v2, 0
	s_lshl_b64 s[0:1], s[4:5], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	global_store_b64 v2, v[0:1], s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8find1eltPdS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8find1eltPdS_i, .Lfunc_end0-_Z8find1eltPdS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 168
; NumSgprs: 16
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10Vector_SubPdS_S_i   ; -- Begin function _Z10Vector_SubPdS_S_i
	.globl	_Z10Vector_SubPdS_S_i
	.p2align	8
	.type	_Z10Vector_SubPdS_S_i,@function
_Z10Vector_SubPdS_S_i:                  ; @_Z10Vector_SubPdS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_fma_f64 v[2:3], v[4:5], -0.5, v[2:3]
	global_store_b64 v[0:1], v[2:3], off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10Vector_SubPdS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10Vector_SubPdS_S_i, .Lfunc_end1-_Z10Vector_SubPdS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 184
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8find1eltPdS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z8find1eltPdS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10Vector_SubPdS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10Vector_SubPdS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
