/* Copyright (c) 1993-2015, NVIDIA CORPORATION. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *  * Neither the name of NVIDIA CORPORATION nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */


/**
 * Matrix multiplication: C = A * B.
 * Host code.
 *
 * This sample implements matrix multiplication as described in Chapter 3
 * of the programming guide.
 * It has been written for clarity of exposition to illustrate various CUDA
 * programming principles, not with the goal of providing the most
 * performant generic kernel for matrix multiplication.
 *
 * See also:
 * V. Volkov and J. Demmel, "Benchmarking GPUs to tune dense linear algebra,"
 * in Proc. 2008 ACM/IEEE Conf. on Superconducting (SC '08),
 * Piscataway, NJ: IEEE Press, 2008, pp. Art. 31:1-11.
 */

// System includes
#include <stdio.h>
#include <assert.h>

// CUDA runtime
#include <cuda_runtime.h>

// Helper functions and utilities to work with CUDA
//#include <helper_functions.h>

/**
 * Matrix multiplication (CUDA Kernel) on the device: C = A * B
 * wA is A's width and wB is B's width
 */
template <int BLOCK_SIZE> __global__ void
matrixMulCUDA(float *C, float *A, float *B, int wA, int wB)
{
    // Block index
    int bx = blockIdx.x;
    int by = blockIdx.y;

    // Thread index
    int tx = threadIdx.x;
    int ty = threadIdx.y;

    // Index of the first sub-matrix of A processed by the block
    int aBegin = wA * BLOCK_SIZE * by;

    // Index of the last sub-matrix of A processed by the block
    int aEnd   = aBegin + wA - 1;

    // Step size used to iterate through the sub-matrices of A
    int aStep  = BLOCK_SIZE;

    // Index of the first sub-matrix of B processed by the block
    int bBegin = BLOCK_SIZE * bx;

    // Step size used to iterate through the sub-matrices of B
    int bStep  = BLOCK_SIZE * wB;

    // Csub is used to store the element of the block sub-matrix
    // that is computed by the thread
    float Csub = 0;

    // Loop over all the sub-matrices of A and B
    // required to compute the block sub-matrix
    for (int a = aBegin, b = bBegin;
         a <= aEnd;
         a += aStep, b += bStep)
    {

        // Declaration of the shared memory array As used to
        // store the sub-matrix of A
        __shared__ float As[BLOCK_SIZE][BLOCK_SIZE];

        // Declaration of the shared memory array Bs used to
        // store the sub-matrix of B
        __shared__ float Bs[BLOCK_SIZE][BLOCK_SIZE];

        // Load the matrices from device memory
        // to shared memory; each thread loads
        // one element of each matrix
        As[ty][tx] = A[a + wA * ty + tx];
        Bs[ty][tx] = B[b + wB * ty + tx];

        // Synchronize to make sure the matrices are loaded
        __syncthreads();

        // Multiply the two matrices together;
        // each thread computes one element
        // of the block sub-matrix
#pragma unroll

        for (int k = 0; k < BLOCK_SIZE; ++k)
        {
            Csub += As[ty][k] * Bs[k][tx];
        }

        // Synchronize to make sure that the preceding
        // computation is done before loading two new
        // sub-matrices of A and B in the next iteration
        __syncthreads();
    }

    // Write the block sub-matrix to device memory;
    // each thread writes one element
    int c = wB * BLOCK_SIZE * by + BLOCK_SIZE * bx;
    C[c + wB * ty + tx] = Csub;
}

void constantInit(float *data, int size, float val)
{
    for (int i = 0; i < size; ++i)
    {
        data[i] = val;
    }
}

/**
 * Run a simple test of matrix multiplication using CUDA
 */
int matrixMultiply(dim3 &dimsA, dim3 &dimsB)
{
	int block_size = 32;
    // Allocate host memory for matrices A and B
    unsigned int size_A = dimsA.x * dimsA.y;
    unsigned int mem_size_A = sizeof(float) * size_A;
    float *h_A = (float *)malloc(mem_size_A);
    unsigned int size_B = dimsB.x * dimsB.y;
    unsigned int mem_size_B = sizeof(float) * size_B;
    float *h_B = (float *)malloc(mem_size_B);

    // Initialize host memory
    const float valB = 0.001f;
    constantInit(h_A, size_A, 1.0f);
    constantInit(h_B, size_B, valB);

    // Allocate device memory
    float *d_A, *d_B, *d_C;

    // Allocate host matrix C
    dim3 dimsC(dimsB.x, dimsA.y, 1);
    unsigned int mem_size_C = dimsC.x * dimsC.y * sizeof(float);
    float *h_C = (float *) malloc(mem_size_C);

    if (h_C == NULL)
    {
        fprintf(stderr, "Failed to allocate host matrix C!\n");
        exit(EXIT_FAILURE);
    }

    cudaError_t error;

    error = cudaMalloc((void **) &d_A, mem_size_A);

    if (error != cudaSuccess)
    {
        printf("cudaMalloc d_A returned error code %d, line(%d)\n", error, __LINE__);
        exit(EXIT_FAILURE);
    }

    error = cudaMalloc((void **) &d_B, mem_size_B);

    if (error != cudaSuccess)
    {
        printf("cudaMalloc d_B returned error code %d, line(%d)\n", error, __LINE__);
        exit(EXIT_FAILURE);
    }

    error = cudaMalloc((void **) &d_C, mem_size_C);

    if (error != cudaSuccess)
    {
        printf("cudaMalloc d_C returned error code %d, line(%d)\n", error, __LINE__);
        exit(EXIT_FAILURE);
    }

    // copy host memory to device
    error = cudaMemcpy(d_A, h_A, mem_size_A, cudaMemcpyHostToDevice);

    if (error != cudaSuccess)
    {
        printf("cudaMemcpy (d_A,h_A) returned error code %d, line(%d)\n", error, __LINE__);
        exit(EXIT_FAILURE);
    }

    error = cudaMemcpy(d_B, h_B, mem_size_B, cudaMemcpyHostToDevice);

    if (error != cudaSuccess)
    {
        printf("cudaMemcpy (d_B,h_B) returned error code %d, line(%d)\n", error, __LINE__);
        exit(EXIT_FAILURE);
    }

    // Setup execution parameters
    dim3 threads(block_size, block_size);
    dim3 grid(dimsB.x / threads.x, dimsA.y / threads.y);

    // Create and start timer
    printf("\tRunning Matrix Multiplication CUDA Kernel...\n");

    // Performs warmup operation using matrixMul CUDA kernel
    if (block_size == 16)
    {
        matrixMulCUDA<16><<< grid, threads >>>(d_C, d_A, d_B, dimsA.x, dimsB.x);
    }
    else
    {
        matrixMulCUDA<32><<< grid, threads >>>(d_C, d_A, d_B, dimsA.x, dimsB.x);
    }

    cudaDeviceSynchronize();

    // Allocate CUDA events that we'll use for timing
    cudaEvent_t start;
    error = cudaEventCreate(&start);

    if (error != cudaSuccess)
    {
        fprintf(stderr, "Failed to create start event (error code %s)!\n", cudaGetErrorString(error));
        exit(EXIT_FAILURE);
    }

    cudaEvent_t stop;
    error = cudaEventCreate(&stop);

    if (error != cudaSuccess)
    {
        fprintf(stderr, "Failed to create stop event (error code %s)!\n", cudaGetErrorString(error));
        exit(EXIT_FAILURE);
    }

    // Record the start event
    error = cudaEventRecord(start, NULL);

    if (error != cudaSuccess)
    {
        fprintf(stderr, "Failed to record start event (error code %s)!\n", cudaGetErrorString(error));
        exit(EXIT_FAILURE);
    }

    // Execute the kernel
    int nIter = 300;

    for (int j = 0; j < nIter; j++)
    {
        if (block_size == 16)
        {
            matrixMulCUDA<16><<< grid, threads >>>(d_C, d_A, d_B, dimsA.x, dimsB.x);
        }
        else
        {
            matrixMulCUDA<32><<< grid, threads >>>(d_C, d_A, d_B, dimsA.x, dimsB.x);
        }
    }

    // Record the stop event
    error = cudaEventRecord(stop, NULL);

    if (error != cudaSuccess)
    {
        fprintf(stderr, "Failed to record stop event (error code %s)!\n", cudaGetErrorString(error));
        exit(EXIT_FAILURE);
    }

    // Wait for the stop event to complete
    error = cudaEventSynchronize(stop);

    if (error != cudaSuccess)
    {
        fprintf(stderr, "Failed to synchronize on the stop event (error code %s)!\n", cudaGetErrorString(error));
        exit(EXIT_FAILURE);
    }

    float msecTotal = 0.0f;
    error = cudaEventElapsedTime(&msecTotal, start, stop);

    if (error != cudaSuccess)
    {
        fprintf(stderr, "Failed to get time elapsed between events (error code %s)!\n", cudaGetErrorString(error));
        exit(EXIT_FAILURE);
    }

    // Compute and print the performance
    float msecPerMatrixMul = msecTotal / nIter;
    double flopsPerMatrixMul = 2.0 * (double)dimsA.x * (double)dimsA.y * (double)dimsB.x;
    double gigaFlops = (flopsPerMatrixMul * 1.0e-9f) / (msecPerMatrixMul / 1000.0f);
    printf(
        "\tPerformance= %.2f GFlop/s, Time= %.3f msec, Size= %.0f Ops\n",
        gigaFlops,
        msecPerMatrixMul,
        flopsPerMatrixMul);

    // Copy result from device to host
    error = cudaMemcpy(h_C, d_C, mem_size_C, cudaMemcpyDeviceToHost);

    if (error != cudaSuccess)
    {
        printf("cudaMemcpy (h_C,d_C) returned error code %d, line(%d)\n", error, __LINE__);
        exit(EXIT_FAILURE);
    }

    printf("\tChecking computed result for correctness: ");
    bool correct = true;

    for (int i = 0; i < (int)(dimsC.x * dimsC.y); i++)
    {
        if (fabs(h_C[i] - (dimsA.x * valB)) > 1e-5)
        {
            printf("Error! Matrix[%05d]=%.8f, ref=%.8f error term is > 1e-5\n", i, h_C[i], dimsA.x*valB);
            correct = false;
        }
    }

    printf("%s\n", correct ? "OK" : "FAIL");

    // Clean up memory
    free(h_A);
    free(h_B);
    free(h_C);
    cudaFree(d_A);
    cudaFree(d_B);
    cudaFree(d_C);

    printf("\n\tNote: For peak performance, please refer to the matrixMulCUBLAS example.\n");

    if (correct)
    {
        return EXIT_SUCCESS;
    }
    else
    {
        return EXIT_FAILURE;
    }
}

	.file	"tmpxft_00314b40_00000000-6_matrixMul.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.text._Z13matrixMulCUDAILi16EEvPfS0_S0_ii,"axG",@progbits,_Z13matrixMulCUDAILi16EEvPfS0_S0_ii,comdat
	.weak	_Z13matrixMulCUDAILi16EEvPfS0_S0_ii
	.type	_Z13matrixMulCUDAILi16EEvPfS0_S0_ii, @function
_Z13matrixMulCUDAILi16EEvPfS0_S0_ii:
.LFB2106:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 8(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	%rsp, %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, (%rsp)
	leaq	40(%rsp), %rcx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movl	%r8d, 4(%rsp)
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z13matrixMulCUDAILi16EEvPfS0_S0_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2106:
	.size	_Z13matrixMulCUDAILi16EEvPfS0_S0_ii, .-_Z13matrixMulCUDAILi16EEvPfS0_S0_ii
	.text
	.type	_Z36__wrapper__device_stub_matrixMulCUDAILi32EEvRPfS1_S1_RiS2_.isra.0, @function
_Z36__wrapper__device_stub_matrixMulCUDAILi32EEvRPfS1_S1_RiS2_.isra.0:
.LFB2180:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 8(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	%rsp, %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, (%rsp)
	leaq	40(%rsp), %rcx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movl	%r8d, 4(%rsp)
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z13matrixMulCUDAILi32EEvPfS0_S0_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L7:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2180:
	.size	_Z36__wrapper__device_stub_matrixMulCUDAILi32EEvRPfS1_S1_RiS2_.isra.0, .-_Z36__wrapper__device_stub_matrixMulCUDAILi32EEvRPfS1_S1_RiS2_.isra.0
	.section	.text._Z13matrixMulCUDAILi32EEvPfS0_S0_ii,"axG",@progbits,_Z13matrixMulCUDAILi32EEvPfS0_S0_ii,comdat
	.weak	_Z13matrixMulCUDAILi32EEvPfS0_S0_ii
	.type	_Z13matrixMulCUDAILi32EEvPfS0_S0_ii, @function
_Z13matrixMulCUDAILi32EEvPfS0_S0_ii:
.LFB2107:
	.cfi_startproc
	endbr64
	jmp	_Z36__wrapper__device_stub_matrixMulCUDAILi32EEvRPfS1_S1_RiS2_.isra.0
	.cfi_endproc
.LFE2107:
	.size	_Z13matrixMulCUDAILi32EEvPfS0_S0_ii, .-_Z13matrixMulCUDAILi32EEvPfS0_S0_ii
	.text
	.globl	_Z12constantInitPfif
	.type	_Z12constantInitPfif, @function
_Z12constantInitPfif:
.LFB2029:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L13:
	cmpl	%eax, %esi
	jle	.L15
	movss	%xmm0, (%rdi,%rax,4)
	incq	%rax
	jmp	.L13
.L15:
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z12constantInitPfif, .-_Z12constantInitPfif
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"OK"
.LC1:
	.string	"FAIL"
.LC4:
	.string	"Failed to allocate host matrix C!\n"
.LC5:
	.string	"cudaMalloc d_A returned error code %d, line(%d)\n"
.LC6:
	.string	"cudaMalloc d_B returned error code %d, line(%d)\n"
.LC7:
	.string	"cudaMalloc d_C returned error code %d, line(%d)\n"
.LC8:
	.string	"cudaMemcpy (d_A,h_A) returned error code %d, line(%d)\n"
.LC9:
	.string	"cudaMemcpy (d_B,h_B) returned error code %d, line(%d)\n"
.LC10:
	.string	"\tRunning Matrix Multiplication CUDA Kernel...\n"
.LC11:
	.string	"Failed to create start event (error code %s)!\n"
.LC12:
	.string	"Failed to create stop event (error code %s)!\n"
.LC13:
	.string	"Failed to record start event (error code %s)!\n"
.LC14:
	.string	"Failed to record stop event (error code %s)!\n"
.LC15:
	.string	"Failed to synchronize on the stop event (error code %s)!\n"
.LC17:
	.string	"Failed to get time elapsed between events (error code %s)!\n"
.LC21:
	.string	"\tPerformance= %.2f GFlop/s, Time= %.3f msec, Size= %.0f Ops\n"
.LC22:
	.string	"cudaMemcpy (h_C,d_C) returned error code %d, line(%d)\n"
.LC23:
	.string	"\tChecking computed result for correctness: "
.LC26:
	.string	"Error! Matrix[%05d]=%.8f, ref=%.8f error term is > 1e-5\n"
.LC27:
	.string	"%s\n"
.LC28:
	.string	"\n\tNote: For peak performance, please refer to the matrixMulCUBLAS example.\n"
	.text
	.globl	_Z14matrixMultiplyR4dim3S0_
	.type	_Z14matrixMultiplyR4dim3S0_, @function
_Z14matrixMultiplyR4dim3S0_:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movl	4(%rdi), %r13d
	movl	(%rdi), %esi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	imull	%r13d, %esi
	leal	0(,%rsi,4), %r15d
	movl	%esi, 8(%rsp)
	movq	%r15, %rdi
	call	malloc@PLT
	movl	0(%rbp), %r12d
	movl	4(%rbp), %r14d
	movq	%rax, 16(%rsp)
	imull	%r12d, %r14d
	imull	%r12d, %r13d
	leal	0(,%r14,4), %eax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movl	8(%rsp), %esi
	movq	16(%rsp), %rdi
	movss	.LC2(%rip), %xmm0
	movq	%rax, 24(%rsp)
	call	_Z12constantInitPfif
	movq	24(%rsp), %rdi
	movss	.LC3(%rip), %xmm0
	movl	%r14d, %esi
	call	_Z12constantInitPfif
	leal	0(,%r13,4), %eax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	testq	%rax, %rax
	jne	.L17
	movq	stderr(%rip), %rdi
	leaq	.LC4(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L53
.L17:
	leaq	40(%rsp), %rdi
	movq	%r15, %rsi
	movq	%rax, %r12
	call	cudaMalloc@PLT
	movl	%eax, %edx
	testl	%eax, %eax
	je	.L18
	movl	$182, %ecx
	leaq	.LC5(%rip), %rsi
.L54:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L53:
	movl	$1, %edi
	call	exit@PLT
.L18:
	movq	(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$190, %ecx
	leaq	.LC6(%rip), %rsi
	movl	%eax, %edx
	testl	%eax, %eax
	jne	.L54
	movq	8(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$198, %ecx
	leaq	.LC7(%rip), %rsi
	movl	%eax, %edx
	testl	%eax, %eax
	jne	.L54
	movq	16(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%r15, %rdx
	call	cudaMemcpy@PLT
	movl	$207, %ecx
	leaq	.LC8(%rip), %rsi
	movl	%eax, %edx
	testl	%eax, %eax
	jne	.L54
	movq	(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	48(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$215, %ecx
	leaq	.LC9(%rip), %rsi
	movl	%eax, %edx
	testl	%eax, %eax
	jne	.L54
	movl	4(%rbx), %eax
	movl	0(%rbp), %edx
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	movl	$1, 100(%rsp)
	shrl	$5, %eax
	shrl	$5, %edx
	movl	%eax, 96(%rsp)
	xorl	%eax, %eax
	movl	%edx, 92(%rsp)
	call	__printf_chk@PLT
	movq	92(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	100(%rsp), %esi
	movl	$1, %ecx
	movabsq	$137438953504, %rdx
	movl	$1, 88(%rsp)
	movq	%rdx, 80(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	movl	0(%rbp), %r8d
	movl	(%rbx), %ecx
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z36__wrapper__device_stub_matrixMulCUDAILi32EEvRPfS1_S1_RiS2_.isra.0
.L23:
	call	cudaDeviceSynchronize@PLT
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L24
	call	cudaGetErrorString@PLT
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L55
.L24:
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L25
	call	cudaGetErrorString@PLT
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L55
.L25:
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	movl	$300, %r14d
	call	cudaEventRecord@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L26
	call	cudaGetErrorString@PLT
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L55
.L27:
	decl	%r14d
	je	.L56
.L26:
	movl	88(%rsp), %ecx
	movq	80(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	92(%rsp), %rdi
	movl	100(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	movl	0(%rbp), %r8d
	movl	(%rbx), %ecx
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z36__wrapper__device_stub_matrixMulCUDAILi32EEvRPfS1_S1_RiS2_.isra.0
	jmp	.L27
.L56:
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L28
	call	cudaGetErrorString@PLT
	leaq	.LC14(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L55
.L28:
	movq	72(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L29
	call	cudaGetErrorString@PLT
	leaq	.LC15(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L55
.L29:
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	leaq	36(%rsp), %rdi
	movl	$0x00000000, 36(%rsp)
	call	cudaEventElapsedTime@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L30
	call	cudaGetErrorString@PLT
	leaq	.LC17(%rip), %rdx
	movq	%rax, %rcx
.L55:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L53
.L30:
	movl	(%rbx), %eax
	movss	36(%rsp), %xmm1
	movl	$2, %edi
	divss	.LC18(%rip), %xmm1
	movaps	%xmm1, %xmm3
	divss	.LC20(%rip), %xmm3
	cvtss2sd	%xmm3, %xmm3
	cvtss2sd	%xmm1, %xmm1
	cvtsi2sdq	%rax, %xmm2
	movl	4(%rbx), %eax
	leaq	.LC21(%rip), %rsi
	cvtsi2sdq	%rax, %xmm0
	movl	0(%rbp), %eax
	addsd	%xmm2, %xmm2
	mulsd	%xmm0, %xmm2
	cvtsi2sdq	%rax, %xmm0
	movb	$3, %al
	mulsd	%xmm0, %xmm2
	movsd	.LC19(%rip), %xmm0
	mulsd	%xmm2, %xmm0
	divsd	%xmm3, %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	%r12, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movl	$323, %ecx
	leaq	.LC22(%rip), %rsi
	movl	%eax, %edx
	testl	%eax, %eax
	jne	.L54
	leaq	.LC23(%rip), %rsi
	xorl	%eax, %eax
	xorl	%r14d, %r14d
	movb	$1, %bpl
	movl	$2, %edi
	call	__printf_chk@PLT
.L38:
	cmpl	%r14d, %r13d
	jle	.L57
	movl	(%rbx), %eax
	movss	(%r12,%r14,4), %xmm0
	cvtsi2ssq	%rax, %xmm1
	mulss	.LC3(%rip), %xmm1
	movaps	%xmm0, %xmm2
	subss	%xmm1, %xmm2
	andps	.LC24(%rip), %xmm2
	cvtss2sd	%xmm2, %xmm2
	comisd	.LC25(%rip), %xmm2
	jbe	.L41
	movl	%r14d, %edx
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	%xmm0, %xmm0
	leaq	.LC26(%rip), %rsi
	cvtss2sd	%xmm1, %xmm1
	xorl	%ebp, %ebp
	call	__printf_chk@PLT
.L41:
	incq	%r14
	jmp	.L38
.L57:
	testb	%bpl, %bpl
	leaq	.LC0(%rip), %rax
	leaq	.LC1(%rip), %rdx
	movl	$2, %edi
	cmovne	%rax, %rdx
	leaq	.LC27(%rip), %rsi
	xorl	%eax, %eax
	xorl	$1, %ebp
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC28(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movzbl	%bpl, %eax
	movq	104(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L45
	call	__stack_chk_fail@PLT
.L45:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z14matrixMultiplyR4dim3S0_, .-_Z14matrixMultiplyR4dim3S0_
	.section	.rodata.str1.1
.LC29:
	.string	"_Z13matrixMulCUDAILi32EEvPfS0_S0_ii"
.LC30:
	.string	"_Z13matrixMulCUDAILi16EEvPfS0_S0_ii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC29(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13matrixMulCUDAILi32EEvPfS0_S0_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC30(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13matrixMulCUDAILi16EEvPfS0_S0_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1065353216
	.align 4
.LC3:
	.long	981668463
	.align 4
.LC18:
	.long	1133903872
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC19:
	.long	-536870912
	.long	1041313291
	.section	.rodata.cst4
	.align 4
.LC20:
	.long	1148846080
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC24:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8
	.align 8
.LC25:
	.long	-1998362383
	.long	1055193269
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/* Copyright (c) 1993-2015, NVIDIA CORPORATION. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *  * Neither the name of NVIDIA CORPORATION nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */


/**
 * Matrix multiplication: C = A * B.
 * Host code.
 *
 * This sample implements matrix multiplication as described in Chapter 3
 * of the programming guide.
 * It has been written for clarity of exposition to illustrate various CUDA
 * programming principles, not with the goal of providing the most
 * performant generic kernel for matrix multiplication.
 *
 * See also:
 * V. Volkov and J. Demmel, "Benchmarking GPUs to tune dense linear algebra,"
 * in Proc. 2008 ACM/IEEE Conf. on Superconducting (SC '08),
 * Piscataway, NJ: IEEE Press, 2008, pp. Art. 31:1-11.
 */

// System includes
#include <stdio.h>
#include <assert.h>

// CUDA runtime
#include <hip/hip_runtime.h>

// Helper functions and utilities to work with CUDA
//#include <helper_functions.h>

/**
 * Matrix multiplication (CUDA Kernel) on the device: C = A * B
 * wA is A's width and wB is B's width
 */
template <int BLOCK_SIZE> __global__ void
matrixMulCUDA(float *C, float *A, float *B, int wA, int wB)
{
    // Block index
    int bx = blockIdx.x;
    int by = blockIdx.y;

    // Thread index
    int tx = threadIdx.x;
    int ty = threadIdx.y;

    // Index of the first sub-matrix of A processed by the block
    int aBegin = wA * BLOCK_SIZE * by;

    // Index of the last sub-matrix of A processed by the block
    int aEnd   = aBegin + wA - 1;

    // Step size used to iterate through the sub-matrices of A
    int aStep  = BLOCK_SIZE;

    // Index of the first sub-matrix of B processed by the block
    int bBegin = BLOCK_SIZE * bx;

    // Step size used to iterate through the sub-matrices of B
    int bStep  = BLOCK_SIZE * wB;

    // Csub is used to store the element of the block sub-matrix
    // that is computed by the thread
    float Csub = 0;

    // Loop over all the sub-matrices of A and B
    // required to compute the block sub-matrix
    for (int a = aBegin, b = bBegin;
         a <= aEnd;
         a += aStep, b += bStep)
    {

        // Declaration of the shared memory array As used to
        // store the sub-matrix of A
        __shared__ float As[BLOCK_SIZE][BLOCK_SIZE];

        // Declaration of the shared memory array Bs used to
        // store the sub-matrix of B
        __shared__ float Bs[BLOCK_SIZE][BLOCK_SIZE];

        // Load the matrices from device memory
        // to shared memory; each thread loads
        // one element of each matrix
        As[ty][tx] = A[a + wA * ty + tx];
        Bs[ty][tx] = B[b + wB * ty + tx];

        // Synchronize to make sure the matrices are loaded
        __syncthreads();

        // Multiply the two matrices together;
        // each thread computes one element
        // of the block sub-matrix
#pragma unroll

        for (int k = 0; k < BLOCK_SIZE; ++k)
        {
            Csub += As[ty][k] * Bs[k][tx];
        }

        // Synchronize to make sure that the preceding
        // computation is done before loading two new
        // sub-matrices of A and B in the next iteration
        __syncthreads();
    }

    // Write the block sub-matrix to device memory;
    // each thread writes one element
    int c = wB * BLOCK_SIZE * by + BLOCK_SIZE * bx;
    C[c + wB * ty + tx] = Csub;
}

void constantInit(float *data, int size, float val)
{
    for (int i = 0; i < size; ++i)
    {
        data[i] = val;
    }
}

/**
 * Run a simple test of matrix multiplication using CUDA
 */
int matrixMultiply(dim3 &dimsA, dim3 &dimsB)
{
	int block_size = 32;
    // Allocate host memory for matrices A and B
    unsigned int size_A = dimsA.x * dimsA.y;
    unsigned int mem_size_A = sizeof(float) * size_A;
    float *h_A = (float *)malloc(mem_size_A);
    unsigned int size_B = dimsB.x * dimsB.y;
    unsigned int mem_size_B = sizeof(float) * size_B;
    float *h_B = (float *)malloc(mem_size_B);

    // Initialize host memory
    const float valB = 0.001f;
    constantInit(h_A, size_A, 1.0f);
    constantInit(h_B, size_B, valB);

    // Allocate device memory
    float *d_A, *d_B, *d_C;

    // Allocate host matrix C
    dim3 dimsC(dimsB.x, dimsA.y, 1);
    unsigned int mem_size_C = dimsC.x * dimsC.y * sizeof(float);
    float *h_C = (float *) malloc(mem_size_C);

    if (h_C == NULL)
    {
        fprintf(stderr, "Failed to allocate host matrix C!\n");
        exit(EXIT_FAILURE);
    }

    hipError_t error;

    error = hipMalloc((void **) &d_A, mem_size_A);

    if (error != hipSuccess)
    {
        printf("hipMalloc d_A returned error code %d, line(%d)\n", error, __LINE__);
        exit(EXIT_FAILURE);
    }

    error = hipMalloc((void **) &d_B, mem_size_B);

    if (error != hipSuccess)
    {
        printf("hipMalloc d_B returned error code %d, line(%d)\n", error, __LINE__);
        exit(EXIT_FAILURE);
    }

    error = hipMalloc((void **) &d_C, mem_size_C);

    if (error != hipSuccess)
    {
        printf("hipMalloc d_C returned error code %d, line(%d)\n", error, __LINE__);
        exit(EXIT_FAILURE);
    }

    // copy host memory to device
    error = hipMemcpy(d_A, h_A, mem_size_A, hipMemcpyHostToDevice);

    if (error != hipSuccess)
    {
        printf("hipMemcpy (d_A,h_A) returned error code %d, line(%d)\n", error, __LINE__);
        exit(EXIT_FAILURE);
    }

    error = hipMemcpy(d_B, h_B, mem_size_B, hipMemcpyHostToDevice);

    if (error != hipSuccess)
    {
        printf("hipMemcpy (d_B,h_B) returned error code %d, line(%d)\n", error, __LINE__);
        exit(EXIT_FAILURE);
    }

    // Setup execution parameters
    dim3 threads(block_size, block_size);
    dim3 grid(dimsB.x / threads.x, dimsA.y / threads.y);

    // Create and start timer
    printf("\tRunning Matrix Multiplication CUDA Kernel...\n");

    // Performs warmup operation using matrixMul CUDA kernel
    if (block_size == 16)
    {
        matrixMulCUDA<16><<< grid, threads >>>(d_C, d_A, d_B, dimsA.x, dimsB.x);
    }
    else
    {
        matrixMulCUDA<32><<< grid, threads >>>(d_C, d_A, d_B, dimsA.x, dimsB.x);
    }

    hipDeviceSynchronize();

    // Allocate CUDA events that we'll use for timing
    hipEvent_t start;
    error = hipEventCreate(&start);

    if (error != hipSuccess)
    {
        fprintf(stderr, "Failed to create start event (error code %s)!\n", hipGetErrorString(error));
        exit(EXIT_FAILURE);
    }

    hipEvent_t stop;
    error = hipEventCreate(&stop);

    if (error != hipSuccess)
    {
        fprintf(stderr, "Failed to create stop event (error code %s)!\n", hipGetErrorString(error));
        exit(EXIT_FAILURE);
    }

    // Record the start event
    error = hipEventRecord(start, NULL);

    if (error != hipSuccess)
    {
        fprintf(stderr, "Failed to record start event (error code %s)!\n", hipGetErrorString(error));
        exit(EXIT_FAILURE);
    }

    // Execute the kernel
    int nIter = 300;

    for (int j = 0; j < nIter; j++)
    {
        if (block_size == 16)
        {
            matrixMulCUDA<16><<< grid, threads >>>(d_C, d_A, d_B, dimsA.x, dimsB.x);
        }
        else
        {
            matrixMulCUDA<32><<< grid, threads >>>(d_C, d_A, d_B, dimsA.x, dimsB.x);
        }
    }

    // Record the stop event
    error = hipEventRecord(stop, NULL);

    if (error != hipSuccess)
    {
        fprintf(stderr, "Failed to record stop event (error code %s)!\n", hipGetErrorString(error));
        exit(EXIT_FAILURE);
    }

    // Wait for the stop event to complete
    error = hipEventSynchronize(stop);

    if (error != hipSuccess)
    {
        fprintf(stderr, "Failed to synchronize on the stop event (error code %s)!\n", hipGetErrorString(error));
        exit(EXIT_FAILURE);
    }

    float msecTotal = 0.0f;
    error = hipEventElapsedTime(&msecTotal, start, stop);

    if (error != hipSuccess)
    {
        fprintf(stderr, "Failed to get time elapsed between events (error code %s)!\n", hipGetErrorString(error));
        exit(EXIT_FAILURE);
    }

    // Compute and print the performance
    float msecPerMatrixMul = msecTotal / nIter;
    double flopsPerMatrixMul = 2.0 * (double)dimsA.x * (double)dimsA.y * (double)dimsB.x;
    double gigaFlops = (flopsPerMatrixMul * 1.0e-9f) / (msecPerMatrixMul / 1000.0f);
    printf(
        "\tPerformance= %.2f GFlop/s, Time= %.3f msec, Size= %.0f Ops\n",
        gigaFlops,
        msecPerMatrixMul,
        flopsPerMatrixMul);

    // Copy result from device to host
    error = hipMemcpy(h_C, d_C, mem_size_C, hipMemcpyDeviceToHost);

    if (error != hipSuccess)
    {
        printf("hipMemcpy (h_C,d_C) returned error code %d, line(%d)\n", error, __LINE__);
        exit(EXIT_FAILURE);
    }

    printf("\tChecking computed result for correctness: ");
    bool correct = true;

    for (int i = 0; i < (int)(dimsC.x * dimsC.y); i++)
    {
        if (fabs(h_C[i] - (dimsA.x * valB)) > 1e-5)
        {
            printf("Error! Matrix[%05d]=%.8f, ref=%.8f error term is > 1e-5\n", i, h_C[i], dimsA.x*valB);
            correct = false;
        }
    }

    printf("%s\n", correct ? "OK" : "FAIL");

    // Clean up memory
    free(h_A);
    free(h_B);
    free(h_C);
    hipFree(d_A);
    hipFree(d_B);
    hipFree(d_C);

    printf("\n\tNote: For peak performance, please refer to the matrixMulCUBLAS example.\n");

    if (correct)
    {
        return EXIT_SUCCESS;
    }
    else
    {
        return EXIT_FAILURE;
    }
}

	.text
	.file	"matrixMul.hip"
	.globl	_Z12constantInitPfif            # -- Begin function _Z12constantInitPfif
	.type	_Z12constantInitPfif,@function
_Z12constantInitPfif:                   # @_Z12constantInitPfif
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB0_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%esi, %eax
	xorl	%ecx, %ecx
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	%xmm0, (%rdi,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB0_2
.LBB0_3:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z12constantInitPfif, .Lfunc_end0-_Z12constantInitPfif
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z14matrixMultiplyR4dim3S0_
.LCPI1_0:
	.long	0x43960000                      # float 300
.LCPI1_2:
	.long	0x447a0000                      # float 1000
.LCPI1_3:
	.long	0x3a83126f                      # float 0.00100000005
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI1_1:
	.quad	0x3e112e0be0000000              # double 9.9999997171806853E-10
.LCPI1_5:
	.quad	0x3ee4f8b588e368f1              # double 1.0000000000000001E-5
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI1_4:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.text
	.globl	_Z14matrixMultiplyR4dim3S0_
	.type	_Z14matrixMultiplyR4dim3S0_,@function
_Z14matrixMultiplyR4dim3S0_:            # @_Z14matrixMultiplyR4dim3S0_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r13
	movq	%rdi, %r15
	movl	4(%rdi), %r12d
	movl	(%rdi), %ebp
	imull	%r12d, %ebp
	leal	(,%rbp,4), %ebx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r14
	movl	(%r13), %eax
	movq	%r13, (%rsp)                    # 8-byte Spill
	movl	4(%r13), %r13d
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	imull	%eax, %r13d
	leal	(,%r13,4), %edi
	movq	%rdi, 64(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%r14, %rdx
	movq	%rax, %r14
	testl	%ebp, %ebp
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader.i
	movl	%ebp, %eax
	xorl	%ecx, %ecx
.LBB1_2:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rdx,%rcx,4)      # imm = 0x3F800000
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_2
.LBB1_3:                                # %_Z12constantInitPfif.exit
	movq	%rdx, 56(%rsp)                  # 8-byte Spill
	testl	%r13d, %r13d
	jle	.LBB1_6
# %bb.4:                                # %.lr.ph.preheader.i151
	movl	%r13d, %eax
	xorl	%ecx, %ecx
.LBB1_5:                                # %.lr.ph.i153
                                        # =>This Inner Loop Header: Depth=1
	movl	$981668463, (%r14,%rcx,4)       # imm = 0x3A83126F
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_5
.LBB1_6:                                # %_Z12constantInitPfif.exit157
	movq	32(%rsp), %r13                  # 8-byte Reload
	imull	%r12d, %r13d
	leal	(,%r13,4), %ebp
	movq	%rbp, %rdi
	callq	malloc
	testq	%rax, %rax
	je	.LBB1_33
# %bb.7:
	movq	%rax, %r12
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_34
# %bb.8:
	leaq	16(%rsp), %rdi
	movq	64(%rsp), %rsi                  # 8-byte Reload
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_35
# %bb.9:
	leaq	8(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_36
# %bb.10:
	movq	24(%rsp), %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_37
# %bb.11:
	movq	%rbp, 80(%rsp)                  # 8-byte Spill
	movq	16(%rsp), %rdi
	movq	%r14, %rsi
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_38
# %bb.12:
	movabsq	$137438953504, %rbp             # imm = 0x2000000020
	movq	(%rsp), %rax                    # 8-byte Reload
	movl	(%rax), %eax
	shrl	$5, %eax
	movl	4(%r15), %ebx
	shrl	$5, %ebx
	shlq	$32, %rbx
	orq	%rax, %rbx
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.13:
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	(%r15), %ecx
	movq	(%rsp), %rax                    # 8-byte Reload
	movl	(%rax), %r8d
	callq	_Z28__device_stub__matrixMulCUDAILi32EEvPfS0_S0_ii
.LBB1_14:
	callq	hipDeviceSynchronize
	leaq	72(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB1_39
# %bb.15:
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB1_40
# %bb.16:
	movq	%r13, 32(%rsp)                  # 8-byte Spill
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB1_41
# %bb.17:                               # %.preheader.preheader
	movl	$300, %r13d                     # imm = 0x12C
.LBB1_18:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_20
# %bb.19:                               #   in Loop: Header=BB1_18 Depth=1
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	(%r15), %ecx
	movq	(%rsp), %rax                    # 8-byte Reload
	movl	(%rax), %r8d
	callq	_Z28__device_stub__matrixMulCUDAILi32EEvPfS0_S0_ii
.LBB1_20:                               #   in Loop: Header=BB1_18 Depth=1
	decl	%r13d
	jne	.LBB1_18
# %bb.21:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB1_42
# %bb.22:
	movq	40(%rsp), %rdi
	callq	hipEventSynchronize
	testl	%eax, %eax
	movq	32(%rsp), %r13                  # 8-byte Reload
	movq	80(%rsp), %rbx                  # 8-byte Reload
	jne	.LBB1_43
# %bb.23:
	leaq	52(%rsp), %rdi
	movl	$0, (%rdi)
	movq	72(%rsp), %rsi
	movq	40(%rsp), %rdx
	callq	hipEventElapsedTime
	testl	%eax, %eax
	jne	.LBB1_44
# %bb.24:
	movss	52(%rsp), %xmm3                 # xmm3 = mem[0],zero,zero,zero
	divss	.LCPI1_0(%rip), %xmm3
	movl	(%r15), %eax
	cvtsi2sd	%rax, %xmm0
	movl	4(%r15), %eax
	addsd	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm1
	mulsd	%xmm0, %xmm1
	movq	(%rsp), %rax                    # 8-byte Reload
	movl	(%rax), %eax
	cvtsi2sd	%rax, %xmm2
	mulsd	%xmm1, %xmm2
	movsd	.LCPI1_1(%rip), %xmm0           # xmm0 = mem[0],zero
	mulsd	%xmm2, %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	%xmm3, %xmm1
	divss	.LCPI1_2(%rip), %xmm3
	cvtss2sd	%xmm3, %xmm3
	divsd	%xmm3, %xmm0
	movl	$.L.str.13, %edi
	movb	$3, %al
	callq	printf
	movq	8(%rsp), %rsi
	movq	%r12, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_46
# %bb.25:
	xorl	%ebx, %ebx
	movl	$.L.str.15, %edi
	xorl	%eax, %eax
	callq	printf
	testl	%r13d, %r13d
	jle	.LBB1_31
# %bb.26:                               # %.lr.ph.preheader
	movl	%r13d, %r13d
	movb	$1, %al
	xorl	%ebx, %ebx
	movss	.LCPI1_3(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	movaps	.LCPI1_4(%rip), %xmm4           # xmm4 = [NaN,NaN,NaN,NaN]
	movsd	.LCPI1_5(%rip), %xmm5           # xmm5 = mem[0],zero
.LBB1_27:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r15), %ecx
	xorps	%xmm1, %xmm1
	cvtsi2ss	%rcx, %xmm1
	movss	(%r12,%rbx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	mulss	%xmm3, %xmm1
	movaps	%xmm0, %xmm2
	subss	%xmm1, %xmm2
	andps	%xmm4, %xmm2
	cvtss2sd	%xmm2, %xmm2
	ucomisd	%xmm5, %xmm2
	jbe	.LBB1_29
# %bb.28:                               #   in Loop: Header=BB1_27 Depth=1
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	movl	$.L.str.16, %edi
	movl	%ebx, %esi
	movb	$2, %al
	callq	printf
	movsd	.LCPI1_5(%rip), %xmm5           # xmm5 = mem[0],zero
	movaps	.LCPI1_4(%rip), %xmm4           # xmm4 = [NaN,NaN,NaN,NaN]
	movss	.LCPI1_3(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	xorl	%eax, %eax
.LBB1_29:                               #   in Loop: Header=BB1_27 Depth=1
	incq	%rbx
	cmpq	%rbx, %r13
	jne	.LBB1_27
# %bb.30:                               # %._crit_edge
	andb	$1, %al
	movl	$.L.str.19, %ecx
	movl	$.L.str.18, %edi
	cmoveq	%rcx, %rdi
	xorb	$1, %al
	movzbl	%al, %ebx
	jmp	.LBB1_32
.LBB1_31:
	movl	$.L.str.18, %edi
.LBB1_32:                               # %._crit_edge.thread
	callq	puts@PLT
	movq	56(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	%ebx, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_33:
	.cfi_def_cfa_offset 144
	movq	stderr(%rip), %rcx
	movl	$.L.str, %edi
	movl	$34, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	jmp	.LBB1_48
.LBB1_34:
	movl	$.L.str.1, %edi
	movl	%eax, %esi
	movl	$182, %edx
	jmp	.LBB1_47
.LBB1_35:
	movl	$.L.str.2, %edi
	movl	%eax, %esi
	movl	$190, %edx
	jmp	.LBB1_47
.LBB1_36:
	movl	$.L.str.3, %edi
	movl	%eax, %esi
	movl	$198, %edx
	jmp	.LBB1_47
.LBB1_37:
	movl	$.L.str.4, %edi
	movl	%eax, %esi
	movl	$207, %edx
	jmp	.LBB1_47
.LBB1_38:
	movl	$.L.str.5, %edi
	movl	%eax, %esi
	movl	$215, %edx
	jmp	.LBB1_47
.LBB1_39:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %esi
	jmp	.LBB1_45
.LBB1_40:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	jmp	.LBB1_45
.LBB1_41:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.9, %esi
	jmp	.LBB1_45
.LBB1_42:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.10, %esi
	jmp	.LBB1_45
.LBB1_43:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.11, %esi
	jmp	.LBB1_45
.LBB1_44:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
.LBB1_45:
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB1_48
.LBB1_46:
	movl	$.L.str.14, %edi
	movl	%eax, %esi
	movl	$323, %edx                      # imm = 0x143
.LBB1_47:
	xorl	%eax, %eax
	callq	printf
.LBB1_48:
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	_Z14matrixMultiplyR4dim3S0_, .Lfunc_end1-_Z14matrixMultiplyR4dim3S0_
	.cfi_endproc
                                        # -- End function
	.section	.text._Z28__device_stub__matrixMulCUDAILi16EEvPfS0_S0_ii,"axG",@progbits,_Z28__device_stub__matrixMulCUDAILi16EEvPfS0_S0_ii,comdat
	.weak	_Z28__device_stub__matrixMulCUDAILi16EEvPfS0_S0_ii # -- Begin function _Z28__device_stub__matrixMulCUDAILi16EEvPfS0_S0_ii
	.type	_Z28__device_stub__matrixMulCUDAILi16EEvPfS0_S0_ii,@function
_Z28__device_stub__matrixMulCUDAILi16EEvPfS0_S0_ii: # @_Z28__device_stub__matrixMulCUDAILi16EEvPfS0_S0_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13matrixMulCUDAILi16EEvPfS0_S0_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z28__device_stub__matrixMulCUDAILi16EEvPfS0_S0_ii, .Lfunc_end2-_Z28__device_stub__matrixMulCUDAILi16EEvPfS0_S0_ii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z28__device_stub__matrixMulCUDAILi32EEvPfS0_S0_ii,"axG",@progbits,_Z28__device_stub__matrixMulCUDAILi32EEvPfS0_S0_ii,comdat
	.weak	_Z28__device_stub__matrixMulCUDAILi32EEvPfS0_S0_ii # -- Begin function _Z28__device_stub__matrixMulCUDAILi32EEvPfS0_S0_ii
	.type	_Z28__device_stub__matrixMulCUDAILi32EEvPfS0_S0_ii,@function
_Z28__device_stub__matrixMulCUDAILi32EEvPfS0_S0_ii: # @_Z28__device_stub__matrixMulCUDAILi32EEvPfS0_S0_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13matrixMulCUDAILi32EEvPfS0_S0_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z28__device_stub__matrixMulCUDAILi32EEvPfS0_S0_ii, .Lfunc_end3-_Z28__device_stub__matrixMulCUDAILi32EEvPfS0_S0_ii
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13matrixMulCUDAILi16EEvPfS0_S0_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13matrixMulCUDAILi32EEvPfS0_S0_ii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed to allocate host matrix C!\n"
	.size	.L.str, 35

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"hipMalloc d_A returned error code %d, line(%d)\n"
	.size	.L.str.1, 48

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"hipMalloc d_B returned error code %d, line(%d)\n"
	.size	.L.str.2, 48

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"hipMalloc d_C returned error code %d, line(%d)\n"
	.size	.L.str.3, 48

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"hipMemcpy (d_A,h_A) returned error code %d, line(%d)\n"
	.size	.L.str.4, 54

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"hipMemcpy (d_B,h_B) returned error code %d, line(%d)\n"
	.size	.L.str.5, 54

	.type	_Z13matrixMulCUDAILi16EEvPfS0_S0_ii,@object # @_Z13matrixMulCUDAILi16EEvPfS0_S0_ii
	.section	.rodata._Z13matrixMulCUDAILi16EEvPfS0_S0_ii,"aG",@progbits,_Z13matrixMulCUDAILi16EEvPfS0_S0_ii,comdat
	.weak	_Z13matrixMulCUDAILi16EEvPfS0_S0_ii
	.p2align	3, 0x0
_Z13matrixMulCUDAILi16EEvPfS0_S0_ii:
	.quad	_Z28__device_stub__matrixMulCUDAILi16EEvPfS0_S0_ii
	.size	_Z13matrixMulCUDAILi16EEvPfS0_S0_ii, 8

	.type	_Z13matrixMulCUDAILi32EEvPfS0_S0_ii,@object # @_Z13matrixMulCUDAILi32EEvPfS0_S0_ii
	.section	.rodata._Z13matrixMulCUDAILi32EEvPfS0_S0_ii,"aG",@progbits,_Z13matrixMulCUDAILi32EEvPfS0_S0_ii,comdat
	.weak	_Z13matrixMulCUDAILi32EEvPfS0_S0_ii
	.p2align	3, 0x0
_Z13matrixMulCUDAILi32EEvPfS0_S0_ii:
	.quad	_Z28__device_stub__matrixMulCUDAILi32EEvPfS0_S0_ii
	.size	_Z13matrixMulCUDAILi32EEvPfS0_S0_ii, 8

	.type	.L.str.7,@object                # @.str.7
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.7:
	.asciz	"Failed to create start event (error code %s)!\n"
	.size	.L.str.7, 47

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Failed to create stop event (error code %s)!\n"
	.size	.L.str.8, 46

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Failed to record start event (error code %s)!\n"
	.size	.L.str.9, 47

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Failed to record stop event (error code %s)!\n"
	.size	.L.str.10, 46

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Failed to synchronize on the stop event (error code %s)!\n"
	.size	.L.str.11, 58

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Failed to get time elapsed between events (error code %s)!\n"
	.size	.L.str.12, 60

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"\tPerformance= %.2f GFlop/s, Time= %.3f msec, Size= %.0f Ops\n"
	.size	.L.str.13, 61

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"hipMemcpy (h_C,d_C) returned error code %d, line(%d)\n"
	.size	.L.str.14, 54

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"\tChecking computed result for correctness: "
	.size	.L.str.15, 44

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"Error! Matrix[%05d]=%.8f, ref=%.8f error term is > 1e-5\n"
	.size	.L.str.16, 57

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"OK"
	.size	.L.str.18, 3

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"FAIL"
	.size	.L.str.19, 5

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13matrixMulCUDAILi16EEvPfS0_S0_ii"
	.size	.L__unnamed_1, 36

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13matrixMulCUDAILi32EEvPfS0_S0_ii"
	.size	.L__unnamed_2, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\tRunning Matrix Multiplication CUDA Kernel..."
	.size	.Lstr, 46

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\n\tNote: For peak performance, please refer to the matrixMulCUBLAS example."
	.size	.Lstr.1, 75

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__matrixMulCUDAILi16EEvPfS0_S0_ii
	.addrsig_sym _Z28__device_stub__matrixMulCUDAILi32EEvPfS0_S0_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13matrixMulCUDAILi16EEvPfS0_S0_ii
	.addrsig_sym _Z13matrixMulCUDAILi32EEvPfS0_S0_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._Z13matrixMulCUDAILi16EEvPfS0_S0_ii,"axG",@progbits,_Z13matrixMulCUDAILi16EEvPfS0_S0_ii,comdat
	.protected	_Z13matrixMulCUDAILi16EEvPfS0_S0_ii ; -- Begin function _Z13matrixMulCUDAILi16EEvPfS0_S0_ii
	.globl	_Z13matrixMulCUDAILi16EEvPfS0_S0_ii
	.p2align	8
	.type	_Z13matrixMulCUDAILi16EEvPfS0_S0_ii,@function
_Z13matrixMulCUDAILi16EEvPfS0_S0_ii:    ; @_Z13matrixMulCUDAILi16EEvPfS0_S0_ii
; %bb.0:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	s_mov_b32 s9, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v5, v1, s7
	s_cmp_gt_i32 s6, 0
	s_cbranch_scc1 .LBB0_2
; %bb.1:                                ; %.._crit_edge_crit_edge
	v_mul_lo_u32 v2, v1, s7
	s_mov_b32 s10, 0
	s_branch .LBB0_3
.LBB0_2:
	s_mov_b32 s9, -1
                                        ; implicit-def: $sgpr10
                                        ; implicit-def: $vgpr2
.LBB0_3:                                ; %Flow100
	v_and_b32_e32 v0, 0x3ff, v0
	s_lshl_b32 s8, s14, 4
	s_and_not1_b32 vcc_lo, exec_lo, s9
	s_lshl_b32 s7, s7, 4
	s_cbranch_vccnz .LBB0_7
; %bb.4:                                ; %.lr.ph
	v_lshlrev_b32_e32 v2, 2, v0
	v_lshl_add_u32 v6, s15, 4, v1
	v_lshlrev_b32_e32 v7, 6, v1
	v_add3_u32 v1, v0, v5, s8
	s_mul_i32 s9, s6, s15
	v_add_nc_u32_e32 v8, 0x400, v2
	s_lshl_b32 s9, s9, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[3:4], null, s6, v6, v[0:1]
	v_dual_mov_b32 v6, 0 :: v_dual_add_nc_u32 v9, v7, v2
	v_add_nc_u32_e32 v10, v8, v7
	s_add_i32 s6, s9, s6
.LBB0_5:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s9, s9, 16
	s_cmp_ge_i32 s9, s6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[3:4]
	v_lshlrev_b64 v[13:14], 2, v[1:2]
	v_add_nc_u32_e32 v1, s7, v1
	v_add_nc_u32_e32 v3, 16, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v11, vcc_lo, s2, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v12, vcc_lo
	v_add_co_u32 v13, vcc_lo, s4, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
	global_load_b32 v2, v[11:12], off
	global_load_b32 v4, v[13:14], off
	s_waitcnt vmcnt(1)
	ds_store_b32 v9, v2
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b32 v[19:20], v8 offset1:16
	ds_load_b128 v[11:14], v7
	ds_load_2addr_b32 v[21:22], v8 offset0:32 offset1:48
	ds_load_b128 v[15:18], v7 offset:16
	ds_load_2addr_b32 v[23:24], v8 offset0:64 offset1:80
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v11, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v12, v20
	ds_load_2addr_b32 v[19:20], v8 offset0:96 offset1:112
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v13, v21
	v_fmac_f32_e32 v6, v14, v22
	ds_load_2addr_b32 v[21:22], v8 offset0:128 offset1:144
	ds_load_b128 v[11:14], v7 offset:32
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v15, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v16, v24
	ds_load_2addr_b32 v[23:24], v8 offset0:160 offset1:176
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v17, v19
	v_fmac_f32_e32 v6, v18, v20
	ds_load_b128 v[15:18], v7 offset:48
	ds_load_2addr_b32 v[19:20], v8 offset0:192 offset1:208
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v11, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v6, v12, v22
	ds_load_2addr_b32 v[11:12], v8 offset0:224 offset1:240
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_fmac_f32_e32 v6, v13, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v14, v24
	v_fmac_f32_e32 v6, v15, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v16, v20
	v_fmac_f32_e32 v6, v17, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v6, v18, v12
	s_cbranch_scc0 .LBB0_5
; %bb.6:                                ; %Flow
	v_mov_b32_e32 v2, v5
	s_branch .LBB0_8
.LBB0_7:
	v_mov_b32_e32 v6, s10
.LBB0_8:                                ; %Flow101
	v_add_nc_u32_e32 v0, s8, v0
	s_mul_i32 s7, s7, s15
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_add3_u32 v0, v0, v2, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13matrixMulCUDAILi16EEvPfS0_S0_ii
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z13matrixMulCUDAILi16EEvPfS0_S0_ii,"axG",@progbits,_Z13matrixMulCUDAILi16EEvPfS0_S0_ii,comdat
.Lfunc_end0:
	.size	_Z13matrixMulCUDAILi16EEvPfS0_S0_ii, .Lfunc_end0-_Z13matrixMulCUDAILi16EEvPfS0_S0_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 596
; NumSgprs: 18
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z13matrixMulCUDAILi32EEvPfS0_S0_ii,"axG",@progbits,_Z13matrixMulCUDAILi32EEvPfS0_S0_ii,comdat
	.protected	_Z13matrixMulCUDAILi32EEvPfS0_S0_ii ; -- Begin function _Z13matrixMulCUDAILi32EEvPfS0_S0_ii
	.globl	_Z13matrixMulCUDAILi32EEvPfS0_S0_ii
	.p2align	8
	.type	_Z13matrixMulCUDAILi32EEvPfS0_S0_ii,@function
_Z13matrixMulCUDAILi32EEvPfS0_S0_ii:    ; @_Z13matrixMulCUDAILi32EEvPfS0_S0_ii
; %bb.0:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_bfe_u32 v2, v0, 10, 10
	s_mov_b32 s9, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v5, v2, s7
	s_cmp_gt_i32 s6, 0
	s_cbranch_scc1 .LBB1_2
; %bb.1:                                ; %.._crit_edge_crit_edge
	v_mul_lo_u32 v1, v2, s7
	s_mov_b32 s10, 0
	s_branch .LBB1_3
.LBB1_2:
	s_mov_b32 s9, -1
                                        ; implicit-def: $sgpr10
                                        ; implicit-def: $vgpr1
.LBB1_3:                                ; %Flow132
	v_and_b32_e32 v0, 0x3ff, v0
	s_lshl_b32 s8, s14, 5
	s_and_not1_b32 vcc_lo, exec_lo, s9
	s_lshl_b32 s7, s7, 5
	s_cbranch_vccnz .LBB1_7
; %bb.4:                                ; %.lr.ph
	v_dual_mov_b32 v6, 0 :: v_dual_lshlrev_b32 v3, 2, v0
	v_lshlrev_b32_e32 v7, 7, v2
	v_add3_u32 v1, v0, v5, s8
	v_lshl_add_u32 v2, s15, 5, v2
	s_delay_alu instid0(VALU_DEP_4)
	v_or_b32_e32 v8, 0x1000, v3
	s_mul_i32 s9, s6, s15
	v_add_nc_u32_e32 v9, v7, v3
	s_lshl_b32 s9, s9, 5
	v_mad_u64_u32 v[3:4], null, s6, v2, v[0:1]
	v_add_nc_u32_e32 v10, v8, v7
	v_add_nc_u32_e32 v11, 0x400, v8
	v_add_nc_u32_e32 v12, 0x800, v8
	v_add_nc_u32_e32 v13, 0xc00, v8
	s_add_i32 s6, s9, s6
.LBB1_5:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s9, s9, 32
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_ge_i32 s9, s6
	v_lshlrev_b64 v[14:15], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[16:17], 2, v[1:2]
	v_add_nc_u32_e32 v1, s7, v1
	v_add_nc_u32_e32 v3, 32, v3
	v_add_co_u32 v14, vcc_lo, s2, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s3, v15, vcc_lo
	v_add_co_u32 v16, vcc_lo, s4, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v17, vcc_lo
	global_load_b32 v2, v[14:15], off
	global_load_b32 v4, v[16:17], off
	s_waitcnt vmcnt(1)
	ds_store_b32 v9, v2
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b32 v[22:23], v8 offset1:32
	ds_load_b128 v[14:17], v7
	ds_load_2addr_b32 v[24:25], v8 offset0:64 offset1:96
	ds_load_b128 v[18:21], v7 offset:16
	ds_load_2addr_b32 v[26:27], v8 offset0:128 offset1:160
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v14, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v15, v23
	ds_load_2addr_b32 v[22:23], v8 offset0:192 offset1:224
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v16, v24
	v_fmac_f32_e32 v6, v17, v25
	ds_load_2addr_b32 v[24:25], v11 offset1:32
	ds_load_b128 v[14:17], v7 offset:32
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v18, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v19, v27
	ds_load_2addr_b32 v[26:27], v11 offset0:64 offset1:96
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v20, v22
	v_fmac_f32_e32 v6, v21, v23
	ds_load_b128 v[18:21], v7 offset:48
	ds_load_2addr_b32 v[22:23], v11 offset0:128 offset1:160
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v14, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v15, v25
	ds_load_2addr_b32 v[24:25], v11 offset0:192 offset1:224
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v16, v26
	v_fmac_f32_e32 v6, v17, v27
	ds_load_2addr_b32 v[26:27], v12 offset1:32
	ds_load_b128 v[14:17], v7 offset:64
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v18, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v19, v23
	ds_load_2addr_b32 v[22:23], v12 offset0:64 offset1:96
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v20, v24
	v_fmac_f32_e32 v6, v21, v25
	ds_load_b128 v[18:21], v7 offset:80
	ds_load_2addr_b32 v[24:25], v12 offset0:128 offset1:160
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v14, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v15, v27
	ds_load_2addr_b32 v[26:27], v12 offset0:192 offset1:224
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v16, v22
	v_fmac_f32_e32 v6, v17, v23
	ds_load_2addr_b32 v[22:23], v13 offset1:32
	ds_load_b128 v[14:17], v7 offset:96
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v18, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v19, v25
	ds_load_2addr_b32 v[24:25], v13 offset0:64 offset1:96
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v20, v26
	v_fmac_f32_e32 v6, v21, v27
	ds_load_b128 v[18:21], v7 offset:112
	ds_load_2addr_b32 v[26:27], v13 offset0:128 offset1:160
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v14, v22
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v6, v15, v23
	ds_load_2addr_b32 v[14:15], v13 offset0:192 offset1:224
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_fmac_f32_e32 v6, v16, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v17, v25
	v_fmac_f32_e32 v6, v18, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v19, v27
	v_fmac_f32_e32 v6, v20, v14
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v6, v21, v15
	s_cbranch_scc0 .LBB1_5
; %bb.6:                                ; %Flow
	v_mov_b32_e32 v1, v5
	s_branch .LBB1_8
.LBB1_7:
	v_mov_b32_e32 v6, s10
.LBB1_8:                                ; %Flow133
	v_add_nc_u32_e32 v0, s8, v0
	s_mul_i32 s7, s7, s15
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_add3_u32 v0, v0, v1, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13matrixMulCUDAILi32EEvPfS0_S0_ii
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 28
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z13matrixMulCUDAILi32EEvPfS0_S0_ii,"axG",@progbits,_Z13matrixMulCUDAILi32EEvPfS0_S0_ii,comdat
.Lfunc_end1:
	.size	_Z13matrixMulCUDAILi32EEvPfS0_S0_ii, .Lfunc_end1-_Z13matrixMulCUDAILi32EEvPfS0_S0_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 824
; NumSgprs: 18
; NumVgprs: 28
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 28
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13matrixMulCUDAILi16EEvPfS0_S0_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13matrixMulCUDAILi16EEvPfS0_S0_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     25
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13matrixMulCUDAILi32EEvPfS0_S0_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13matrixMulCUDAILi32EEvPfS0_S0_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     28
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
