
#include <stdio.h>
#include <stdlib.h>
// For the CUDA runtime routines (prefixed with "cuda_")
#include <cuda_runtime.h>
#include <sys/time.h>
#include <cooperative_groups.h>

//#include <helper_cuda.h>
#define N_INPUTS 256
#define N_ARITH 4096

__global__ void
ac(float *A, const int *B, const int *C, const int *op_sel, int n_inputs, const int n_arith, int thresh, int iter) {
  int i= blockDim.x * blockIdx.x + threadIdx.x;
  
  int idx_off= i*n_inputs;
  
  float temp[N_ARITH];

  for (int k=0; k<iter; k++) {
    for (int j=0; j <n_arith; j++ ) {    
      if (op_sel[j] == 0) {
        if (j < thresh) 
          temp[j] = A[idx_off + B[j]] + A[idx_off + C[j]];
        else
          temp[j] = temp[B[j]] + temp[C[j]];
      }
      else {
        if (j < thresh) 
          temp[j] = A[idx_off + B[j]] * A[idx_off + C[j]];
        else
          temp[j] = temp[B[j]] * temp[C[j]];
      }
    }
  }
  A[i*n_inputs]= temp[n_arith-1];
}

int 
main(void)
{
    // Error code to check return values for CUDA calls
    cudaError_t err = cudaSuccess;
    
    const int n_inputs= N_INPUTS;
    const int n_arith= N_ARITH;
    const int batch_size= 512;
    const int iter= 4096;
    const int thresh= n_arith/3;

    size_t size= batch_size * (n_inputs) * sizeof(float);
    size_t size_idx= n_arith * sizeof(int);

    float *h_A= (float *)malloc(size);
    int *h_B= (int *)malloc(size_idx);
    int *h_C= (int *)malloc(size_idx);
    int *h_op_sel= (int *) malloc(size_idx);
    
    // Initialize the host input vectors
    for (int i = 0; i < n_arith; ++i)
    {
        if (i < thresh) {
          h_B[i] = rand() % (n_inputs); 
          h_C[i] = rand() % (n_inputs);  
        }
        else{
          h_B[i] = rand() % (i); 
          h_C[i] = rand() % (i);  
        }
        h_op_sel[i]= rand() % 2;
    }
    
    for (int i= 0; i < n_inputs; ++i) {
      for (int b =0; b< batch_size; ++b) {
        h_A[b* n_inputs + i]= float(rand());
      }
    }

    // Allocate the device input vector A
    float *d_A = NULL;
    err = cudaMalloc((void **)&d_A, size);

    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    int *d_B = NULL;
    err = cudaMalloc((void **)&d_B, size_idx);

    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    int *d_C = NULL;
    err = cudaMalloc((void **)&d_C, size_idx);

    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    int *d_op_sel = NULL;
    err = cudaMalloc((void **)&d_op_sel, size_idx);

    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    // Copy the host input vectors A and B in host memory to the device input vectors in
    // device memory
    printf("Copy input data from the host memory to the CUDA device\n");
    err = cudaMemcpy(d_A, h_A, size, cudaMemcpyHostToDevice);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to copy vector A from host to device (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }
    err = cudaMemcpy(d_B, h_B, size_idx, cudaMemcpyHostToDevice);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to copy vector B from host to device (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }
    err = cudaMemcpy(d_C, h_C, size_idx, cudaMemcpyHostToDevice);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to copy vector C from host to device (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }
    err = cudaMemcpy(d_op_sel, h_op_sel, size_idx, cudaMemcpyHostToDevice);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to copy vector C from host to device (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    // Launch the Vector Add CUDA Kernel
    int threadsPerBlock = 64;
    int blocksPerGrid= (batch_size + threadsPerBlock -1)/ threadsPerBlock;
    struct timeval t1, t2;

    // Perform Warmup
    ac<<<blocksPerGrid, threadsPerBlock>>>(d_A, d_B, d_C, d_op_sel, n_inputs, n_arith, thresh, iter);
    // FInish execution of kernel
    cudaDeviceSynchronize();
    
    gettimeofday(&t1, 0);

    printf("CUDA kernel launch with %d blocks of %d threads\n", blocksPerGrid, threadsPerBlock);
    ac<<<blocksPerGrid, threadsPerBlock>>>(d_A, d_B, d_C, d_op_sel, n_inputs, n_arith, thresh, iter);

    // FInish execution of kernel
    cudaDeviceSynchronize();
    gettimeofday(&t2, 0);
    
    double time = (1000000.0*(t2.tv_sec-t1.tv_sec) + t2.tv_usec-t1.tv_usec)/1000.0;
    
    printf("Time of kernel:  %3.4f ms \n", time);

    err = cudaGetLastError();
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to launch vectorAdd kernel (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    printf("Throughput: %.3f Gops/sec\n", (((1.0*batch_size*iter*n_arith))/time)/10E6);

    // Copy the device result vector in device memory to the host result vector
    // in host memory.
    printf("Copy output data from the CUDA device to the host memory\n");
    err = cudaMemcpy(h_A, d_A, size, cudaMemcpyDeviceToHost);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to copy vector C from device to host (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }
    
    //for (int i=0; i<numElements; i++) {
    for (int i=0; i<8; i++) {
      printf("%d , %f\n", i, h_A[i]);
    }

    err = cudaFree(d_A);
    err = cudaFree(d_B);
    err = cudaFree(d_C);

    free(h_A);
    free(h_B);
    free(h_C);

    printf("Done!\n");
    return 0;
}

	.file	"tmpxft_002c0103_00000000-6_ac_1.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6562:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE6562:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z34__device_stub__Z2acPfPKiS1_S1_iiiiPfPKiS1_S1_iiii
	.type	_Z34__device_stub__Z2acPfPKiS1_S1_iiiiPfPKiS1_S1_iiii, @function
_Z34__device_stub__Z2acPfPKiS1_S1_iiiiPfPKiS1_S1_iiii:
.LFB6584:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z2acPfPKiS1_S1_iiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6584:
	.size	_Z34__device_stub__Z2acPfPKiS1_S1_iiiiPfPKiS1_S1_iiii, .-_Z34__device_stub__Z2acPfPKiS1_S1_iiiiPfPKiS1_S1_iiii
	.globl	_Z2acPfPKiS1_S1_iiii
	.type	_Z2acPfPKiS1_S1_iiii, @function
_Z2acPfPKiS1_S1_iiii:
.LFB6585:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z2acPfPKiS1_S1_iiiiPfPKiS1_S1_iiii
	.cfi_endproc
.LFE6585:
	.size	_Z2acPfPKiS1_S1_iiii, .-_Z2acPfPKiS1_S1_iiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Failed to allocate device vector A (error code %s)!\n"
.LC1:
	.string	"Copy input data from the host memory to the CUDA device\n"
.LC2:
	.string	"Failed to copy vector A from host to device (error code %s)!\n"
.LC3:
	.string	"Failed to copy vector B from host to device (error code %s)!\n"
.LC4:
	.string	"Failed to copy vector C from host to device (error code %s)!\n"
.LC5:
	.string	"CUDA kernel launch with %d blocks of %d threads\n"
.LC8:
	.string	"Time of kernel:  %3.4f ms \n"
.LC9:
	.string	"Failed to launch vectorAdd kernel (error code %s)!\n"
.LC12:
	.string	"Throughput: %.3f Gops/sec\n"
.LC13:
	.string	"Copy output data from the CUDA device to the host memory\n"
.LC14:
	.string	"Failed to copy vector C from device to host (error code %s)!\n"
.LC15:
	.string	"%d , %f\n"
.LC16:
	.string	"Done!\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB6559:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$524288, %edi
	movl	$256, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$16384, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$16384, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$16384, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movq	%rax, %r14
.L11:
	cmpq	$1364, %rbx
	ja	.L9
	call	rand@PLT
	cltd
	idivl	%r15d
	movl	%edx, (%r12,%rbx,4)
	call	rand@PLT
	cltd
	idivl	%r15d
	jmp	.L10
.L9:
	call	rand@PLT
	movl	%ebx, 8(%rsp)
	cltd
	idivl	%ebx
	movl	%edx, (%r12,%rbx,4)
	call	rand@PLT
	movl	8(%rsp), %ecx
	cltd
	idivl	%ecx
.L10:
	movl	%edx, 0(%r13,%rbx,4)
	call	rand@PLT
	cltd
	movl	$2, %ecx
	idivl	%ecx
	movl	%edx, (%r14,%rbx,4)
	incq	%rbx
	cmpq	$4096, %rbx
	jne	.L11
	xorl	%ebx, %ebx
.L12:
	leaq	0(%rbp,%rbx,4), %rdx
	movl	$512, %r15d
.L13:
	movq	%rdx, 8(%rsp)
	call	rand@PLT
	movq	8(%rsp), %rdx
	cvtsi2ssl	%eax, %xmm0
	addq	$1024, %rdx
	movss	%xmm0, -1024(%rdx)
	decl	%r15d
	jne	.L13
	incq	%rbx
	cmpq	$256, %rbx
	jne	.L12
	xorl	%r10d, %r10d
	leaq	24(%rsp), %rdi
	movl	$524288, %esi
	movq	%r10, 24(%rsp)
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	jne	.L37
	xorl	%r9d, %r9d
	leaq	32(%rsp), %rdi
	movl	$16384, %esi
	movq	%r9, 32(%rsp)
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	jne	.L37
	xorl	%r8d, %r8d
	leaq	40(%rsp), %rdi
	movl	$16384, %esi
	movq	%r8, 40(%rsp)
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	jne	.L37
	xorl	%edi, %edi
	movl	$16384, %esi
	movq	%rdi, 48(%rsp)
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L18
.L37:
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L36
.L18:
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$524288, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L19
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L36
.L19:
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$16384, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L20
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L36
.L20:
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movl	$16384, %edx
	movq	%r13, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	jne	.L38
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	movl	$16384, %edx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L22
.L38:
	call	cudaGetErrorString@PLT
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L36
.L22:
	movl	$67108865, %edx
	movl	$536870913, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$6, %rdx
	salq	$3, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 88(%rsp)
	movl	$1, 96(%rsp)
	movq	%rdi, 72(%rsp)
	movl	$1, 80(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	$4096
	.cfi_def_cfa_offset 184
	movl	$4096, %r9d
	movl	$256, %r8d
	pushq	$1365
	.cfi_def_cfa_offset 192
	movq	64(%rsp), %rcx
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z34__device_stub__Z2acPfPKiS1_S1_iiiiPfPKiS1_S1_iiii
	popq	%rcx
	.cfi_def_cfa_offset 184
	popq	%rsi
	.cfi_def_cfa_offset 176
.L23:
	call	cudaDeviceSynchronize@PLT
	xorl	%esi, %esi
	leaq	72(%rsp), %rdi
	call	gettimeofday@PLT
	movl	$64, %ecx
	movl	$8, %edx
	xorl	%eax, %eax
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$67108865, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$536870913, %edi
	salq	$6, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$3, %rdi
	movq	%rdx, 88(%rsp)
	movl	$1, 96(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	$4096
	.cfi_def_cfa_offset 184
	movl	$4096, %r9d
	movl	$256, %r8d
	pushq	$1365
	.cfi_def_cfa_offset 192
	movq	64(%rsp), %rcx
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z34__device_stub__Z2acPfPKiS1_S1_iiiiPfPKiS1_S1_iiii
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L24:
	call	cudaDeviceSynchronize@PLT
	leaq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	movq	88(%rsp), %rax
	subq	72(%rsp), %rax
	movl	$2, %edi
	cvtsi2sdq	%rax, %xmm0
	leaq	.LC8(%rip), %rsi
	movb	$1, %al
	mulsd	.LC6(%rip), %xmm0
	cvtsi2sdq	96(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	cvtsi2sdq	80(%rsp), %xmm1
	subsd	%xmm1, %xmm0
	divsd	.LC7(%rip), %xmm0
	movsd	%xmm0, 8(%rsp)
	call	__printf_chk@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L25
	call	cudaGetErrorString@PLT
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L36
.L25:
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	xorl	%ebx, %ebx
	movsd	.LC10(%rip), %xmm0
	divsd	8(%rsp), %xmm0
	divsd	.LC11(%rip), %xmm0
	leaq	.LC15(%rip), %r14
	call	__printf_chk@PLT
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	24(%rsp), %rsi
	movq	%rbp, %rdi
	movl	$2, %ecx
	movl	$524288, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L26
	call	cudaGetErrorString@PLT
	leaq	.LC14(%rip), %rdx
	movq	%rax, %rcx
.L36:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L26:
	movl	%ebx, %edx
	cvtss2sd	0(%rbp,%rbx,4), %xmm0
	movq	%r14, %rsi
	movb	$1, %al
	movl	$2, %edi
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$8, %rbx
	jne	.L26
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	xorl	%eax, %eax
	movl	$2, %edi
	leaq	.LC16(%rip), %rsi
	call	__printf_chk@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6559:
	.size	main, .-main
	.section	.rodata.str1.1
.LC17:
	.string	"_Z2acPfPKiS1_S1_iiii"
.LC18:
	.string	"_ZN37_INTERNAL_17f5dfec_7_ac_1_cu_8ffa9c794cuda3std3__419piecewise_constructE"
.LC19:
	.string	"_ZN37_INTERNAL_17f5dfec_7_ac_1_cu_8ffa9c794cuda3std6ranges3__45__cpo4swapE"
.LC20:
	.string	"_ZN37_INTERNAL_17f5dfec_7_ac_1_cu_8ffa9c794cuda3std6ranges3__45__cpo9iter_moveE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB6587:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z2acPfPKiS1_S1_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE6587:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC6:
	.long	0
	.long	1093567616
	.align 8
.LC7:
	.long	0
	.long	1083129856
	.align 8
.LC10:
	.long	0
	.long	1107296256
	.align 8
.LC11:
	.long	0
	.long	1097011920
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <stdio.h>
#include <stdlib.h>
// For the CUDA runtime routines (prefixed with "cuda_")
#include <hip/hip_runtime.h>
#include <sys/time.h>
#include <hip/hip_cooperative_groups.h>

//#include <helper_cuda.h>
#define N_INPUTS 256
#define N_ARITH 4096

__global__ void
ac(float *A, const int *B, const int *C, const int *op_sel, int n_inputs, const int n_arith, int thresh, int iter) {
  int i= blockDim.x * blockIdx.x + threadIdx.x;
  
  int idx_off= i*n_inputs;
  
  float temp[N_ARITH];

  for (int k=0; k<iter; k++) {
    for (int j=0; j <n_arith; j++ ) {    
      if (op_sel[j] == 0) {
        if (j < thresh) 
          temp[j] = A[idx_off + B[j]] + A[idx_off + C[j]];
        else
          temp[j] = temp[B[j]] + temp[C[j]];
      }
      else {
        if (j < thresh) 
          temp[j] = A[idx_off + B[j]] * A[idx_off + C[j]];
        else
          temp[j] = temp[B[j]] * temp[C[j]];
      }
    }
  }
  A[i*n_inputs]= temp[n_arith-1];
}

int 
main(void)
{
    // Error code to check return values for CUDA calls
    hipError_t err = hipSuccess;
    
    const int n_inputs= N_INPUTS;
    const int n_arith= N_ARITH;
    const int batch_size= 512;
    const int iter= 4096;
    const int thresh= n_arith/3;

    size_t size= batch_size * (n_inputs) * sizeof(float);
    size_t size_idx= n_arith * sizeof(int);

    float *h_A= (float *)malloc(size);
    int *h_B= (int *)malloc(size_idx);
    int *h_C= (int *)malloc(size_idx);
    int *h_op_sel= (int *) malloc(size_idx);
    
    // Initialize the host input vectors
    for (int i = 0; i < n_arith; ++i)
    {
        if (i < thresh) {
          h_B[i] = rand() % (n_inputs); 
          h_C[i] = rand() % (n_inputs);  
        }
        else{
          h_B[i] = rand() % (i); 
          h_C[i] = rand() % (i);  
        }
        h_op_sel[i]= rand() % 2;
    }
    
    for (int i= 0; i < n_inputs; ++i) {
      for (int b =0; b< batch_size; ++b) {
        h_A[b* n_inputs + i]= float(rand());
      }
    }

    // Allocate the device input vector A
    float *d_A = NULL;
    err = hipMalloc((void **)&d_A, size);

    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    int *d_B = NULL;
    err = hipMalloc((void **)&d_B, size_idx);

    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    int *d_C = NULL;
    err = hipMalloc((void **)&d_C, size_idx);

    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    int *d_op_sel = NULL;
    err = hipMalloc((void **)&d_op_sel, size_idx);

    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    // Copy the host input vectors A and B in host memory to the device input vectors in
    // device memory
    printf("Copy input data from the host memory to the CUDA device\n");
    err = hipMemcpy(d_A, h_A, size, hipMemcpyHostToDevice);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to copy vector A from host to device (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }
    err = hipMemcpy(d_B, h_B, size_idx, hipMemcpyHostToDevice);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to copy vector B from host to device (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }
    err = hipMemcpy(d_C, h_C, size_idx, hipMemcpyHostToDevice);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to copy vector C from host to device (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }
    err = hipMemcpy(d_op_sel, h_op_sel, size_idx, hipMemcpyHostToDevice);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to copy vector C from host to device (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    // Launch the Vector Add CUDA Kernel
    int threadsPerBlock = 64;
    int blocksPerGrid= (batch_size + threadsPerBlock -1)/ threadsPerBlock;
    struct timeval t1, t2;

    // Perform Warmup
    ac<<<blocksPerGrid, threadsPerBlock>>>(d_A, d_B, d_C, d_op_sel, n_inputs, n_arith, thresh, iter);
    // FInish execution of kernel
    hipDeviceSynchronize();
    
    gettimeofday(&t1, 0);

    printf("CUDA kernel launch with %d blocks of %d threads\n", blocksPerGrid, threadsPerBlock);
    ac<<<blocksPerGrid, threadsPerBlock>>>(d_A, d_B, d_C, d_op_sel, n_inputs, n_arith, thresh, iter);

    // FInish execution of kernel
    hipDeviceSynchronize();
    gettimeofday(&t2, 0);
    
    double time = (1000000.0*(t2.tv_sec-t1.tv_sec) + t2.tv_usec-t1.tv_usec)/1000.0;
    
    printf("Time of kernel:  %3.4f ms \n", time);

    err = hipGetLastError();
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to launch vectorAdd kernel (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    printf("Throughput: %.3f Gops/sec\n", (((1.0*batch_size*iter*n_arith))/time)/10E6);

    // Copy the device result vector in device memory to the host result vector
    // in host memory.
    printf("Copy output data from the CUDA device to the host memory\n");
    err = hipMemcpy(h_A, d_A, size, hipMemcpyDeviceToHost);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to copy vector C from device to host (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }
    
    //for (int i=0; i<numElements; i++) {
    for (int i=0; i<8; i++) {
      printf("%d , %f\n", i, h_A[i]);
    }

    err = hipFree(d_A);
    err = hipFree(d_B);
    err = hipFree(d_C);

    free(h_A);
    free(h_B);
    free(h_C);

    printf("Done!\n");
    return 0;
}

	.text
	.file	"ac_1.hip"
	.globl	_Z17__device_stub__acPfPKiS1_S1_iiii # -- Begin function _Z17__device_stub__acPfPKiS1_S1_iiii
	.type	_Z17__device_stub__acPfPKiS1_S1_iiii,@function
_Z17__device_stub__acPfPKiS1_S1_iiii:   # @_Z17__device_stub__acPfPKiS1_S1_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z2acPfPKiS1_S1_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z17__device_stub__acPfPKiS1_S1_iiii, .Lfunc_end0-_Z17__device_stub__acPfPKiS1_S1_iiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI1_1:
	.quad	0x408f400000000000              # double 1000
.LCPI1_2:
	.quad	0x4200000000000000              # double 8589934592
.LCPI1_3:
	.quad	0x416312d000000000              # double 1.0E+7
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$524288, %edi                   # imm = 0x80000
	callq	malloc
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movl	$16384, %edi                    # imm = 0x4000
	callq	malloc
	movq	%rax, %r15
	movl	$16384, %edi                    # imm = 0x4000
	callq	malloc
	movq	%rax, %rbx
	movl	$16384, %edi                    # imm = 0x4000
	callq	malloc
	movq	%rax, %r12
	xorl	%r13d, %r13d
	movl	$256, %ebp                      # imm = 0x100
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cmpq	$1365, %r13                     # imm = 0x555
	movl	%r13d, %r14d
	cmovbl	%ebp, %r14d
	cltd
	idivl	%r14d
	movl	%edx, (%r15,%r13,4)
	callq	rand
	cltd
	idivl	%r14d
	movl	%edx, (%rbx,%r13,4)
	callq	rand
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	andl	$-2, %ecx
	subl	%ecx, %eax
	movl	%eax, (%r12,%r13,4)
	incq	%r13
	cmpq	$4096, %r13                     # imm = 0x1000
	jne	.LBB1_1
# %bb.2:                                # %.preheader119.preheader
	xorl	%r13d, %r13d
	movq	40(%rsp), %rbp                  # 8-byte Reload
.LBB1_3:                                # %.preheader119
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	xorl	%r14d, %r14d
.LBB1_4:                                #   Parent Loop BB1_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbp,%r14)
	addq	$1024, %r14                     # imm = 0x400
	cmpq	$524288, %r14                   # imm = 0x80000
	jne	.LBB1_4
# %bb.5:                                #   in Loop: Header=BB1_3 Depth=1
	incq	%r13
	addq	$4, %rbp
	cmpq	$256, %r13                      # imm = 0x100
	jne	.LBB1_3
# %bb.6:
	leaq	8(%rsp), %rdi
	movq	$0, (%rdi)
	movl	$524288, %esi                   # imm = 0x80000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.9:
	leaq	24(%rsp), %rdi
	movq	$0, (%rdi)
	movl	$16384, %esi                    # imm = 0x4000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.10:
	movq	%r15, %r14
	leaq	16(%rsp), %rdi
	movq	$0, (%rdi)
	movl	$16384, %esi                    # imm = 0x4000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.11:
	movq	%rbx, %r15
	leaq	32(%rsp), %rdi
	movq	$0, (%rdi)
	movl	$16384, %esi                    # imm = 0x4000
	callq	hipMalloc
	testl	%eax, %eax
	movq	40(%rsp), %rbx                  # 8-byte Reload
	jne	.LBB1_7
# %bb.12:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	8(%rsp), %rdi
	movl	$524288, %edx                   # imm = 0x80000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_13
# %bb.14:
	movq	24(%rsp), %rdi
	movl	$16384, %edx                    # imm = 0x4000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_15
# %bb.16:
	movq	16(%rsp), %rdi
	movl	$16384, %edx                    # imm = 0x4000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_17
# %bb.18:
	movq	32(%rsp), %rdi
	movl	$16384, %edx                    # imm = 0x4000
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_17
# %bb.19:
	movabsq	$4294967304, %r13               # imm = 0x100000008
	leaq	56(%r13), %r12
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_21
# %bb.20:
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	32(%rsp), %rcx
	movl	$256, %r8d                      # imm = 0x100
	movl	$4096, %r9d                     # imm = 0x1000
	pushq	$4096                           # imm = 0x1000
	.cfi_adjust_cfa_offset 8
	pushq	$1365                           # imm = 0x555
	.cfi_adjust_cfa_offset 8
	callq	_Z17__device_stub__acPfPKiS1_S1_iiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB1_21:
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movl	$.L.str.5, %edi
	movl	$8, %esi
	movl	$64, %edx
	xorl	%eax, %eax
	callq	printf
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_23
# %bb.22:
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	32(%rsp), %rcx
	movl	$256, %r8d                      # imm = 0x100
	movl	$4096, %r9d                     # imm = 0x1000
	pushq	$4096                           # imm = 0x1000
	.cfi_adjust_cfa_offset 8
	pushq	$1365                           # imm = 0x555
	.cfi_adjust_cfa_offset 8
	callq	_Z17__device_stub__acPfPKiS1_S1_iiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB1_23:
	callq	hipDeviceSynchronize
	leaq	72(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r12), %rax
	subq	56(%rsp), %rax
	cvtsi2sd	%rax, %xmm2
	mulsd	.LCPI1_0(%rip), %xmm2
	cvtsi2sdq	8(%r12), %xmm0
	cvtsi2sdq	64(%rsp), %xmm1
	addsd	%xmm2, %xmm0
	subsd	%xmm1, %xmm0
	divsd	.LCPI1_1(%rip), %xmm0
	movl	$.L.str.6, %edi
	movsd	%xmm0, 48(%rsp)                 # 8-byte Spill
	movb	$1, %al
	callq	printf
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_24
# %bb.25:
	movsd	.LCPI1_2(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	48(%rsp), %xmm0                 # 8-byte Folded Reload
	divsd	.LCPI1_3(%rip), %xmm0
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movq	8(%rsp), %rsi
	movl	$524288, %edx                   # imm = 0x80000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_29
# %bb.26:                               # %.preheader.preheader
	xorl	%r12d, %r12d
.LBB1_27:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r12,4), %xmm0
	movl	$.L.str.11, %edi
	movl	%r12d, %esi
	movb	$1, %al
	callq	printf
	incq	%r12
	cmpq	$8, %r12
	jne	.LBB1_27
# %bb.28:
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_7:
	.cfi_def_cfa_offset 144
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	jmp	.LBB1_8
.LBB1_17:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	jmp	.LBB1_8
.LBB1_13:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	jmp	.LBB1_8
.LBB1_15:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	jmp	.LBB1_8
.LBB1_24:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %esi
	jmp	.LBB1_8
.LBB1_29:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.10, %esi
.LBB1_8:
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z2acPfPKiS1_S1_iiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z2acPfPKiS1_S1_iiii,@object    # @_Z2acPfPKiS1_S1_iiii
	.section	.rodata,"a",@progbits
	.globl	_Z2acPfPKiS1_S1_iiii
	.p2align	3, 0x0
_Z2acPfPKiS1_S1_iiii:
	.quad	_Z17__device_stub__acPfPKiS1_S1_iiii
	.size	_Z2acPfPKiS1_S1_iiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed to allocate device vector A (error code %s)!\n"
	.size	.L.str, 53

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to copy vector A from host to device (error code %s)!\n"
	.size	.L.str.2, 62

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to copy vector B from host to device (error code %s)!\n"
	.size	.L.str.3, 62

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to copy vector C from host to device (error code %s)!\n"
	.size	.L.str.4, 62

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"CUDA kernel launch with %d blocks of %d threads\n"
	.size	.L.str.5, 49

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Time of kernel:  %3.4f ms \n"
	.size	.L.str.6, 28

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Failed to launch vectorAdd kernel (error code %s)!\n"
	.size	.L.str.7, 52

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Throughput: %.3f Gops/sec\n"
	.size	.L.str.8, 27

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Failed to copy vector C from device to host (error code %s)!\n"
	.size	.L.str.10, 62

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"%d , %f\n"
	.size	.L.str.11, 9

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z2acPfPKiS1_S1_iiii"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Copy input data from the host memory to the CUDA device"
	.size	.Lstr, 56

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Copy output data from the CUDA device to the host memory"
	.size	.Lstr.1, 57

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Done!"
	.size	.Lstr.2, 6

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z17__device_stub__acPfPKiS1_S1_iiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z2acPfPKiS1_S1_iiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z2acPfPKiS1_S1_iiii    ; -- Begin function _Z2acPfPKiS1_S1_iiii
	.globl	_Z2acPfPKiS1_S1_iiii
	.p2align	8
	.type	_Z2acPfPKiS1_S1_iiii,@function
_Z2acPfPKiS1_S1_iiii:                   ; @_Z2acPfPKiS1_S1_iiii
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[16:19], s[0:1], 0x20
	s_load_b256 s[4:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s2, 0xffff
	s_cmp_lt_i32 s19, 1
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v0, v1, s16
	s_cbranch_scc1 .LBB0_20
; %bb.1:                                ; %.preheader.lr.ph
	s_cmp_gt_i32 s17, 0
	s_mov_b32 s1, 0
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v1, 0, 1, s0
	v_cmp_ne_u32_e64 s0, 1, v1
.LBB0_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_19
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v1, 16
	s_mov_b32 s16, 0
	s_mov_b64 s[2:3], s[8:9]
	s_mov_b64 s[12:13], s[6:7]
	s_mov_b64 s[14:15], s[10:11]
.LBB0_4:                                ; %.lr.ph
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_load_b32 s22, s[14:15], 0x0
	s_load_b32 s20, s[12:13], 0x0
	s_cmp_ge_i32 s16, s18
	s_cselect_b32 s21, -1, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_lg_u32 s22, 0
	s_cbranch_scc0 .LBB0_7
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=2
	s_and_b32 vcc_lo, exec_lo, s21
	s_cbranch_vccz .LBB0_8
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=2
	s_load_b32 s22, s[2:3], 0x0
	s_lshl_b32 s23, s20, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_i32 s23, s23, 16
	s_waitcnt lgkmcnt(0)
	s_lshl_b32 s22, s22, 2
	s_add_i32 s22, s22, 16
	s_clause 0x1
	scratch_load_b32 v2, off, s23
	scratch_load_b32 v3, off, s22
	s_mov_b32 s22, 0
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v2, v2, v3
	s_branch .LBB0_9
.LBB0_7:                                ;   in Loop: Header=BB0_4 Depth=2
	s_mov_b32 s22, -1
                                        ; implicit-def: $vgpr2
	s_branch .LBB0_12
.LBB0_8:                                ;   in Loop: Header=BB0_4 Depth=2
	s_mov_b32 s22, -1
                                        ; implicit-def: $vgpr2
.LBB0_9:                                ; %Flow
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s22
	s_cbranch_vccnz .LBB0_11
; %bb.10:                               ;   in Loop: Header=BB0_4 Depth=2
	s_load_b32 s22, s[2:3], 0x0
	v_add_nc_u32_e32 v2, s20, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v4, s22, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	s_clause 0x1
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v2, v2, v3
.LBB0_11:                               ; %Flow84
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_mov_b32 s22, 0
.LBB0_12:                               ; %Flow87
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s22
	s_cbranch_vccnz .LBB0_18
; %bb.13:                               ;   in Loop: Header=BB0_4 Depth=2
	s_and_b32 vcc_lo, exec_lo, s21
	s_cbranch_vccz .LBB0_15
; %bb.14:                               ;   in Loop: Header=BB0_4 Depth=2
	s_load_b32 s21, s[2:3], 0x0
	s_lshl_b32 s22, s20, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_i32 s22, s22, 16
	s_waitcnt lgkmcnt(0)
	s_lshl_b32 s21, s21, 2
	s_add_i32 s21, s21, 16
	s_clause 0x1
	scratch_load_b32 v2, off, s22
	scratch_load_b32 v3, off, s21
	s_mov_b32 s21, 0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	s_branch .LBB0_16
.LBB0_15:                               ;   in Loop: Header=BB0_4 Depth=2
	s_mov_b32 s21, -1
                                        ; implicit-def: $vgpr2
.LBB0_16:                               ; %Flow85
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s21
	s_cbranch_vccnz .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_4 Depth=2
	s_load_b32 s21, s[2:3], 0x0
	v_add_nc_u32_e32 v2, s20, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v4, s21, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	s_clause 0x1
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
.LBB0_18:                               ;   in Loop: Header=BB0_4 Depth=2
	s_add_i32 s16, s16, 1
	s_add_u32 s14, s14, 4
	s_addc_u32 s15, s15, 0
	s_add_u32 s12, s12, 4
	scratch_store_b32 v1, v2, off
	v_add_nc_u32_e32 v1, 4, v1
	s_addc_u32 s13, s13, 0
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s17, s16
	s_cbranch_scc0 .LBB0_4
.LBB0_19:                               ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s1, s1, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s1, s19
	s_cbranch_scc0 .LBB0_2
.LBB0_20:                               ; %._crit_edge52
	s_lshl_b32 s0, s17, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s0, s0, 16
	scratch_load_b32 v2, off, s0 offset:-4
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z2acPfPKiS1_S1_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 16400
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z2acPfPKiS1_S1_iiii, .Lfunc_end0-_Z2acPfPKiS1_S1_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 728
; NumSgprs: 26
; NumVgprs: 6
; ScratchSize: 16400
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z2acPfPKiS1_S1_iiii
    .private_segment_fixed_size: 16400
    .sgpr_count:     26
    .sgpr_spill_count: 0
    .symbol:         _Z2acPfPKiS1_S1_iiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
