#include <stdio.h>
#include <stdlib.h>

#define N 16

extern __global__ 
void cudaMatMul(int C[N][N], int A[N][N], int B[N][N], int n);

int main(int argc, char** argv)
{
	int* A[N];
	int* B[N];

	// result
	int* C[N];

	// cuda guys
	int* A_c[N];
	int* B_c[N];
	int* C_c[N];

	// cuda result placed in this value
	int* ret[N];

	int i = 0;
	int j = 0;

	// malloc individual arrays
	for(i = 0; i < N; i++)
	{
		//A[i] = (int*) malloc(N * sizeof(int));
		A[i] = (int*) malloc(N * sizeof(int));
		B[i] = (int*) malloc(N * sizeof(int));
		C[i] = (int*) malloc(N * sizeof(int));

		cudaMalloc((void**) &A_c[i], N * sizeof(int));
		cudaMalloc((void**) &B_c[i], N * sizeof(int));
		cudaMalloc((void**) &C_c[i], N * sizeof(int));

		ret[i] = (int*) malloc(N * sizeof(int));
	}

	// init data
	for(i = 0; i < N; i++)
	{
		for(j = 0; j < N; j++)
		{
			A[i][j] = i + j;
			B[i][j] = i * j;
			C[i][j] = 0;
			//ret[i][j] = 0;
			//printf("%d ", B[i][j]);
		}
		//printf("\n");
	}

	// COPY TO device memory
	for(i = 0; i < N; i++)
	{
		cudaMemcpy(A_c[i], A[i], N * sizeof(int), cudaMemcpyHostToDevice);
		cudaMemcpy(B_c[i], B[i], N * sizeof(int), cudaMemcpyHostToDevice);
		cudaMemcpy(C_c[i], C[i], N * sizeof(int), cudaMemcpyHostToDevice);
	}

	//cudaMemcpy2D ( void* dst, size_t dpitch, const void* src, size_t spitch, size_t width, size_t height, cudaMemcpyKind kind )
    //Copies data between host and device. 

	//dim3 dimBlock(N, N);

	cudaMatMul<<<1, 1>>>((int (*) [16])C_c, (int (*) [16])A_c, (int (*) [16])B_c, N);	

	// for(i = 0; i < N; i++)
	// {
	// 	cudaMemcpy(ret[i], C_c[i], N * sizeof(int), cudaMemcpyDeviceToHost);
	// }

	cudaMemcpy2D(ret, N * sizeof(int), C_c, N * sizeof(int), N * sizeof(int), N * sizeof(int), cudaMemcpyDeviceToHost);

	// printf("segfault before?\n");
	for(i = 0; i < N; i++)
	{
		for(j = 0; j < N; j++)
			printf("%d ", ret[i][j]);
		printf("\n");
	}
	fflush(stdout);

	// free arrays
	for(i = 0; i < N; i++)
	{
		free(A[i]);
		free(B[i]);
		free(C[i]);
		cudaFree(A_c[i]);
		cudaFree(B_c[i]);
		cudaFree(C_c[i]);
		free(ret[i]);
	}

	return 0;
}

extern __global__ 
void cudaMatMul(int c[N][N], int a[N][N], int b[N][N], int n)
{
	int i = 0;	
	int j = 0;
	int k = 0;

	// mat mul
	for(i = 0; i < n; i++)
		for(j = 0; j < n; j++)
			for(k = 0; k < n; k++)
				c[i][j] += a[i][k] * b[k][j];
}


	.file	"tmpxft_0033d0cd_00000000-6_prac_cuda_matmul.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z41__device_stub__Z10cudaMatMulPA16_iS0_S0_iPA16_iS0_S0_i
	.type	_Z41__device_stub__Z10cudaMatMulPA16_iS0_S0_iPA16_iS0_S0_i, @function
_Z41__device_stub__Z10cudaMatMulPA16_iS0_S0_iPA16_iS0_S0_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10cudaMatMulPA16_iS0_S0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z41__device_stub__Z10cudaMatMulPA16_iS0_S0_iPA16_iS0_S0_i, .-_Z41__device_stub__Z10cudaMatMulPA16_iS0_S0_iPA16_iS0_S0_i
	.globl	_Z10cudaMatMulPA16_iS0_S0_i
	.type	_Z10cudaMatMulPA16_iS0_S0_i, @function
_Z10cudaMatMulPA16_iS0_S0_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z10cudaMatMulPA16_iS0_S0_iPA16_iS0_S0_i
	.cfi_endproc
.LFE2053:
	.size	_Z10cudaMatMulPA16_iS0_S0_i, .-_Z10cudaMatMulPA16_iS0_S0_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d "
.LC1:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$968, %rsp
	.cfi_def_cfa_offset 1024
	movq	%fs:40, %rax
	movq	%rax, 952(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %r13
.L9:
	movl	$64, %edi
	leaq	440(%rsp), %r12
	leaq	568(%rsp), %rbp
	call	malloc@PLT
	movl	$64, %edi
	leaq	184(%rsp), %r15
	leaq	312(%rsp), %r14
	movq	%rax, 0(%r13,%rbx)
	call	malloc@PLT
	movl	$64, %edi
	movq	%rax, 184(%rsp,%rbx)
	call	malloc@PLT
	leaq	(%r12,%rbx), %rdi
	movl	$64, %esi
	movq	%rax, 312(%rsp,%rbx)
	call	cudaMalloc@PLT
	leaq	0(%rbp,%rbx), %rdi
	movl	$64, %esi
	call	cudaMalloc@PLT
	leaq	696(%rsp), %rax
	movl	$64, %esi
	leaq	(%rax,%rbx), %rdi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movl	$64, %edi
	call	malloc@PLT
	leaq	824(%rsp), %rdx
	movq	%rax, 824(%rsp,%rbx)
	addq	$8, %rbx
	movq	%rdx, 16(%rsp)
	cmpq	$128, %rbx
	jne	.L9
	xorl	%edx, %edx
	xorl	%eax, %eax
.L11:
	movq	0(%r13,%rdx,8), %r10
	movq	(%r15,%rdx,8), %r9
	movl	%edx, %edi
	xorl	%esi, %esi
	movq	(%r14,%rdx,8), %r8
	xorl	%ecx, %ecx
.L10:
	leal	(%rdi,%rcx), %r11d
	movl	%esi, (%r9,%rcx,4)
	addl	%edi, %esi
	movl	%r11d, (%r10,%rcx,4)
	incq	%rcx
	cmpq	$16, %rcx
	jne	.L10
	movq	%r8, %rdi
	incq	%rdx
	rep stosl
	cmpq	$16, %rdx
	jne	.L11
	xorl	%ebx, %ebx
.L12:
	movq	0(%r13,%rbx), %rsi
	movq	(%r12,%rbx), %rdi
	movl	$1, %ecx
	movl	$64, %edx
	call	cudaMemcpy@PLT
	movq	(%r15,%rbx), %rsi
	movq	0(%rbp,%rbx), %rdi
	movl	$1, %ecx
	movl	$64, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rax
	movq	(%r14,%rbx), %rsi
	movl	$1, %ecx
	movl	$64, %edx
	movq	(%rax,%rbx), %rdi
	addq	$8, %rbx
	call	cudaMemcpy@PLT
	cmpq	$128, %rbx
	jne	.L12
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 52(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	movq	8(%rsp), %rdi
	movl	$16, %ecx
	movq	%rbp, %rdx
	movq	%r12, %rsi
	call	_Z41__device_stub__Z10cudaMatMulPA16_iS0_S0_iPA16_iS0_S0_i
.L13:
	pushq	%rax
	.cfi_def_cfa_offset 1032
	movl	$64, %ecx
	movl	$64, %r9d
	xorl	%ebx, %ebx
	pushq	$2
	.cfi_def_cfa_offset 1040
	movq	24(%rsp), %rdx
	movl	$64, %r8d
	movl	$64, %esi
	movq	32(%rsp), %rdi
	call	cudaMemcpy2D@PLT
	popq	%rdx
	.cfi_def_cfa_offset 1032
	popq	%rcx
	.cfi_def_cfa_offset 1024
.L14:
	xorl	%ecx, %ecx
.L15:
	movq	16(%rsp), %rax
	movl	$2, %edi
	movq	%rcx, 24(%rsp)
	leaq	.LC0(%rip), %rsi
	movq	(%rax,%rbx,8), %rax
	movl	(%rax,%rcx), %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	24(%rsp), %rcx
	addq	$4, %rcx
	cmpq	$64, %rcx
	jne	.L15
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$16, %rbx
	jne	.L14
	movq	stdout(%rip), %rdi
	xorl	%ebx, %ebx
	call	fflush@PLT
.L17:
	movq	0(%r13,%rbx), %rdi
	call	free@PLT
	movq	(%r15,%rbx), %rdi
	call	free@PLT
	movq	(%r14,%rbx), %rdi
	call	free@PLT
	movq	(%r12,%rbx), %rdi
	call	cudaFree@PLT
	movq	0(%rbp,%rbx), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rax
	movq	(%rax,%rbx), %rdi
	call	cudaFree@PLT
	movq	824(%rsp,%rbx), %rdi
	addq	$8, %rbx
	call	free@PLT
	cmpq	$128, %rbx
	jne	.L17
	movq	952(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$968, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z10cudaMatMulPA16_iS0_S0_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10cudaMatMulPA16_iS0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>

#define N 16

extern __global__ 
void cudaMatMul(int C[N][N], int A[N][N], int B[N][N], int n);

int main(int argc, char** argv)
{
	int* A[N];
	int* B[N];

	// result
	int* C[N];

	// cuda guys
	int* A_c[N];
	int* B_c[N];
	int* C_c[N];

	// cuda result placed in this value
	int* ret[N];

	int i = 0;
	int j = 0;

	// malloc individual arrays
	for(i = 0; i < N; i++)
	{
		//A[i] = (int*) malloc(N * sizeof(int));
		A[i] = (int*) malloc(N * sizeof(int));
		B[i] = (int*) malloc(N * sizeof(int));
		C[i] = (int*) malloc(N * sizeof(int));

		hipMalloc((void**) &A_c[i], N * sizeof(int));
		hipMalloc((void**) &B_c[i], N * sizeof(int));
		hipMalloc((void**) &C_c[i], N * sizeof(int));

		ret[i] = (int*) malloc(N * sizeof(int));
	}

	// init data
	for(i = 0; i < N; i++)
	{
		for(j = 0; j < N; j++)
		{
			A[i][j] = i + j;
			B[i][j] = i * j;
			C[i][j] = 0;
			//ret[i][j] = 0;
			//printf("%d ", B[i][j]);
		}
		//printf("\n");
	}

	// COPY TO device memory
	for(i = 0; i < N; i++)
	{
		hipMemcpy(A_c[i], A[i], N * sizeof(int), hipMemcpyHostToDevice);
		hipMemcpy(B_c[i], B[i], N * sizeof(int), hipMemcpyHostToDevice);
		hipMemcpy(C_c[i], C[i], N * sizeof(int), hipMemcpyHostToDevice);
	}

	//cudaMemcpy2D ( void* dst, size_t dpitch, const void* src, size_t spitch, size_t width, size_t height, cudaMemcpyKind kind )
    //Copies data between host and device. 

	//dim3 dimBlock(N, N);

	cudaMatMul<<<1, 1>>>((int (*) [16])C_c, (int (*) [16])A_c, (int (*) [16])B_c, N);	

	// for(i = 0; i < N; i++)
	// {
	// 	cudaMemcpy(ret[i], C_c[i], N * sizeof(int), cudaMemcpyDeviceToHost);
	// }

	hipMemcpy2D(ret, N * sizeof(int), C_c, N * sizeof(int), N * sizeof(int), N * sizeof(int), hipMemcpyDeviceToHost);

	// printf("segfault before?\n");
	for(i = 0; i < N; i++)
	{
		for(j = 0; j < N; j++)
			printf("%d ", ret[i][j]);
		printf("\n");
	}
	fflush(stdout);

	// free arrays
	for(i = 0; i < N; i++)
	{
		free(A[i]);
		free(B[i]);
		free(C[i]);
		hipFree(A_c[i]);
		hipFree(B_c[i]);
		hipFree(C_c[i]);
		free(ret[i]);
	}

	return 0;
}

extern __global__ 
void cudaMatMul(int c[N][N], int a[N][N], int b[N][N], int n)
{
	int i = 0;	
	int j = 0;
	int k = 0;

	// mat mul
	for(i = 0; i < n; i++)
		for(j = 0; j < n; j++)
			for(k = 0; k < n; k++)
				c[i][j] += a[i][k] * b[k][j];
}


	.text
	.file	"prac_cuda_matmul.hip"
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$920, %rsp                      # imm = 0x398
	.cfi_def_cfa_offset 944
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	xorl	%ebx, %ebx
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	movl	$64, %edi
	callq	malloc
	movq	%rax, 784(%rsp,%rbx)
	movl	$64, %edi
	callq	malloc
	movq	%rax, 656(%rsp,%rbx)
	movl	$64, %edi
	callq	malloc
	movq	%rax, 528(%rsp,%rbx)
	leaq	(%rsp,%rbx), %rdi
	addq	$400, %rdi                      # imm = 0x190
	movl	$64, %esi
	callq	hipMalloc
	leaq	(%rsp,%rbx), %rdi
	addq	$272, %rdi                      # imm = 0x110
	movl	$64, %esi
	callq	hipMalloc
	leaq	(%rsp,%rbx), %rdi
	addq	$16, %rdi
	movl	$64, %esi
	callq	hipMalloc
	movl	$64, %edi
	callq	malloc
	movq	%rax, 144(%rsp,%rbx)
	addq	$8, %rbx
	cmpq	$128, %rbx
	jne	.LBB0_1
# %bb.2:                                # %.preheader54.preheader
	xorl	%eax, %eax
.LBB0_3:                                # %.preheader54
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
	movq	784(%rsp,%rax,8), %rcx
	movq	656(%rsp,%rax,8), %rdx
	movq	528(%rsp,%rax,8), %rsi
	xorl	%edi, %edi
	xorl	%r8d, %r8d
.LBB0_4:                                #   Parent Loop BB0_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rax,%r8), %r9d
	movl	%r9d, (%rcx,%r8,4)
	movl	%edi, (%rdx,%r8,4)
	movl	$0, (%rsi,%r8,4)
	incq	%r8
	addl	%eax, %edi
	cmpq	$16, %r8
	jne	.LBB0_4
# %bb.5:                                #   in Loop: Header=BB0_3 Depth=1
	incq	%rax
	cmpq	$16, %rax
	jne	.LBB0_3
# %bb.6:                                # %.preheader53.preheader
	xorl	%ebx, %ebx
.LBB0_7:                                # %.preheader53
                                        # =>This Inner Loop Header: Depth=1
	movq	400(%rsp,%rbx), %rdi
	movq	784(%rsp,%rbx), %rsi
	movl	$64, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	272(%rsp,%rbx), %rdi
	movq	656(%rsp,%rbx), %rsi
	movl	$64, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp,%rbx), %rdi
	movq	528(%rsp,%rbx), %rsi
	movl	$64, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	addq	$8, %rbx
	cmpq	$128, %rbx
	jne	.LBB0_7
# %bb.8:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_10
# %bb.9:
	leaq	16(%rsp), %rdi
	leaq	400(%rsp), %rsi
	leaq	272(%rsp), %rdx
	movl	$16, %ecx
	callq	_Z25__device_stub__cudaMatMulPA16_iS0_S0_i
.LBB0_10:
	movl	$2, (%rsp)
	leaq	144(%rsp), %rdi
	leaq	16(%rsp), %rdx
	movl	$64, %esi
	movl	$64, %ecx
	movl	$64, %r8d
	movl	$64, %r9d
	callq	hipMemcpy2D
	xorl	%ebx, %ebx
.LBB0_11:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_12 Depth 2
	xorl	%r14d, %r14d
.LBB0_12:                               #   Parent Loop BB0_11 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	144(%rsp,%rbx,8), %rax
	movl	(%rax,%r14,4), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	$16, %r14
	jne	.LBB0_12
# %bb.13:                               #   in Loop: Header=BB0_11 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%rbx
	cmpq	$16, %rbx
	jne	.LBB0_11
# %bb.14:
	movq	stdout(%rip), %rdi
	callq	fflush
	xorl	%ebx, %ebx
.LBB0_15:                               # =>This Inner Loop Header: Depth=1
	movq	784(%rsp,%rbx), %rdi
	callq	free
	movq	656(%rsp,%rbx), %rdi
	callq	free
	movq	528(%rsp,%rbx), %rdi
	callq	free
	movq	400(%rsp,%rbx), %rdi
	callq	hipFree
	movq	272(%rsp,%rbx), %rdi
	callq	hipFree
	movq	16(%rsp,%rbx), %rdi
	callq	hipFree
	movq	144(%rsp,%rbx), %rdi
	callq	free
	addq	$8, %rbx
	cmpq	$128, %rbx
	jne	.LBB0_15
# %bb.16:
	xorl	%eax, %eax
	addq	$920, %rsp                      # imm = 0x398
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__cudaMatMulPA16_iS0_S0_i # -- Begin function _Z25__device_stub__cudaMatMulPA16_iS0_S0_i
	.type	_Z25__device_stub__cudaMatMulPA16_iS0_S0_i,@function
_Z25__device_stub__cudaMatMulPA16_iS0_S0_i: # @_Z25__device_stub__cudaMatMulPA16_iS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10cudaMatMulPA16_iS0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__cudaMatMulPA16_iS0_S0_i, .Lfunc_end1-_Z25__device_stub__cudaMatMulPA16_iS0_S0_i
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10cudaMatMulPA16_iS0_S0_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10cudaMatMulPA16_iS0_S0_i,@object # @_Z10cudaMatMulPA16_iS0_S0_i
	.section	.rodata,"a",@progbits
	.globl	_Z10cudaMatMulPA16_iS0_S0_i
	.p2align	3, 0x0
_Z10cudaMatMulPA16_iS0_S0_i:
	.quad	_Z25__device_stub__cudaMatMulPA16_iS0_S0_i
	.size	_Z10cudaMatMulPA16_iS0_S0_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d "
	.size	.L.str, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10cudaMatMulPA16_iS0_S0_i"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__cudaMatMulPA16_iS0_S0_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10cudaMatMulPA16_iS0_S0_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10cudaMatMulPA16_iS0_S0_i ; -- Begin function _Z10cudaMatMulPA16_iS0_S0_i
	.globl	_Z10cudaMatMulPA16_iS0_S0_i
	.p2align	8
	.type	_Z10cudaMatMulPA16_iS0_S0_i,@function
_Z10cudaMatMulPA16_iS0_S0_i:            ; @_Z10cudaMatMulPA16_iS0_S0_i
; %bb.0:
	s_load_b32 s20, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s20, 1
	s_cbranch_scc1 .LBB0_7
; %bb.1:                                ; %.preheader23.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mov_b32_e32 v0, 0
	s_mov_b32 s3, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s8, s3
.LBB0_2:                                ; %.preheader23
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;       Child Loop BB0_4 Depth 3
	s_mov_b32 s9, s3
	s_waitcnt lgkmcnt(0)
	s_mov_b64 s[10:11], s[0:1]
	s_lshl_b64 s[12:13], s[8:9], 6
	s_mov_b32 s2, s3
.LBB0_3:                                ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_4 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[14:15], s[2:3], 2
	s_add_u32 s9, s4, s12
	s_addc_u32 s16, s5, s13
	s_add_u32 s14, s9, s14
	s_addc_u32 s15, s16, s15
	s_mov_b64 s[16:17], s[10:11]
	global_load_b32 v1, v0, s[14:15]
	s_mov_b64 s[18:19], s[6:7]
	s_mov_b32 s9, s20
.LBB0_4:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_clause 0x1
	global_load_b32 v2, v0, s[18:19]
	global_load_b32 v3, v0, s[16:17]
	s_add_i32 s9, s9, -1
	s_add_u32 s18, s18, 4
	s_addc_u32 s19, s19, 0
	s_add_u32 s16, s16, 64
	s_addc_u32 s17, s17, 0
	s_cmp_lg_u32 s9, 0
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v1, v2
	global_store_b32 v0, v1, s[14:15]
	s_cbranch_scc1 .LBB0_4
; %bb.5:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_add_i32 s2, s2, 1
	s_add_u32 s10, s10, 4
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s2, s20
	s_cbranch_scc1 .LBB0_3
; %bb.6:                                ; %._crit_edge26
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s8, s8, 1
	s_add_u32 s6, s6, 64
	s_addc_u32 s7, s7, 0
	s_cmp_lg_u32 s8, s20
	s_cbranch_scc1 .LBB0_2
.LBB0_7:                                ; %._crit_edge28
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10cudaMatMulPA16_iS0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 21
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10cudaMatMulPA16_iS0_S0_i, .Lfunc_end0-_Z10cudaMatMulPA16_iS0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 248
; NumSgprs: 21
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 21
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10cudaMatMulPA16_iS0_S0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     21
    .sgpr_spill_count: 0
    .symbol:         _Z10cudaMatMulPA16_iS0_S0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
