#include <iostream>
#include <math.h>
#include <vector>
#include <iomanip>
#include <sstream>
#include <string>
#include <fstream>
#include <thread>
#include <ctime>
#include <stdio.h>
__device__ static inline void setSeed(int64_t *seed)
{
    *seed = (*seed ^ 0x5deece66d) & ((1LL << 48) - 1);
}

__device__ static inline int next(int64_t *seed, const int bits)
{
    *seed = (*seed * 0x5deece66d + 0xb) & ((1LL << 48) - 1);
    return (int) (*seed >> (48 - bits));
}

__device__ static inline int nextInt(int64_t *seed, const int n)
{
    int bits, val;
    const int m = n - 1;

    if((m & n) == 0) return (int) ((n * (int64_t)next(seed, 31)) >> 31);

    do {
        bits = next(seed, 31);
        val = bits % n;
    }
    while (bits - val + m < 0);
    return val;
}

struct Pos
{
    int x, z;
};

__device__  class BoundingBox {
public:
	Pos start;
	Pos end;
	__device__ bool intersectsWith(BoundingBox box)
	{
		return this->end.x >= box.start.x && this->start.x <= box.end.x && this->end.z >= box.start.z && this->start.z <= box.end.z;
	}
};
#define BLOCK_SIZE (128)
#define WORK_SIZE_BITS 16
#define SEEDS_PER_CALL ((1ULL << (WORK_SIZE_BITS)) * (BLOCK_SIZE))

#define GPU_ASSERT(code) gpuAssert((code), __FILE__, __LINE__)
inline void gpuAssert(cudaError_t code, const char *file, int line) {
  if (code != cudaSuccess) {
    fprintf(stderr, "GPUassert: %s (code %d) %s %d\n", cudaGetErrorString(code), code, file, line);
    exit(code);
  }
}

/*
Originally 64-bit seed value.
Mod 48 bit to get the 48 bit value.
Time could be any 64-bit value that when mod 48 gives the structure seed value.
We have the 48 bit post-mod 48 value
((8682522807148012UL * 181783497276652981UL)^x)%(1LL << 48) = someSeed


Take 48 bit seed value
Loop upper bits
Xor (8682522807148012UL * 181783497276652981UL) with upperBits Seed
Find seed that matches
*/
__device__ BoundingBox guessBox;
__device__ int64_t startCurrent = 8682522807148012L;
__device__ int64_t hardcoded = 181783497276652981L;
__device__ int64_t current;

__global__ __launch_bounds__(BLOCK_SIZE,2) static void threadWork(uint64_t offset, uint32_t* counter, int64_t* buffer){
    int64_t timeGuess = (blockIdx.x * blockDim.x + threadIdx.x) + offset;
    timeGuess *= 1000;
    int64_t seedGuess = current ^ timeGuess;
    nextInt(&seedGuess, 203);
    if(nextInt(&seedGuess, 203) == 103){
        buffer[atomicAdd(counter, 1)] = timeGuess;
    }
}
__global__ __launch_bounds__(1,1) static void setupGuessBox(Pos guessMin, Pos guessMax){
    current = startCurrent*hardcoded*hardcoded*hardcoded*hardcoded*hardcoded*hardcoded*hardcoded*hardcoded*hardcoded*hardcoded*hardcoded*hardcoded*hardcoded;
    guessBox.start = guessMin;
    guessBox.end = guessMax;
}
int64_t* buffer;
uint32_t* counter;
std::vector<int64_t> structureSeeds;
int64_t* structSeedsArr;

int main(int argc, char **argv ){
    int64_t startValue  = 1282613228000000;
    int64_t total       = 1282706397225000;
    time_t start = time(NULL);
    FILE* fp = fopen("seananners-middlestep.txt", "w+");
    double seconds_per_structure_seed = 0.0;
    int thread = 0;
    int curr = 0;

    uint64_t amount = total - startValue;
    int tmpCount = 0;
    GPU_ASSERT(cudaMallocManaged(&buffer, sizeof(int64_t) * SEEDS_PER_CALL));
    GPU_ASSERT(cudaPeekAtLastError());
    GPU_ASSERT(cudaMallocManaged(&counter, sizeof(uint32_t)));
    GPU_ASSERT(cudaPeekAtLastError());
    Pos guessMin;
    Pos guessMax;
    guessMin.x = 1710;
    guessMin.z = 276;
    guessMax.x = 1734;
    guessMax.z = 348;
    setupGuessBox<<<1,1>>>(guessMin, guessMax);
    cudaSetDevice(0);
    GPU_ASSERT(cudaPeekAtLastError());
    GPU_ASSERT(cudaDeviceSynchronize());
    uint64_t countOut = 0;
    uint64_t tempCount;
    for(int64_t offset = 0; offset < amount; offset += SEEDS_PER_CALL){

        if(offset > amount){
            break;
        }
        int64_t value = startValue + offset;
        threadWork<<<1ULL<<WORK_SIZE_BITS,BLOCK_SIZE>>>(value, counter, buffer);
        GPU_ASSERT(cudaPeekAtLastError());
        GPU_ASSERT(cudaDeviceSynchronize());  
        for(int i = 0; i < *counter; i++){
            int64_t timeGuess = buffer[i];
            fprintf(fp, "%lld\n", timeGuess);
        }
        if(countOut >= 1000000000){
            time_t tempTime = time(NULL);
            uint64_t tempDiff = tempTime - start;
            double sps = (double)offset/(double)tempDiff;
            double percent = ((double)offset/(double)amount) * 100.0;
            printf("Seeds Per Second: %f\tProgress: %f\n", sps, percent);
            countOut = 0;
        }
        *counter = 0;
        countOut += SEEDS_PER_CALL;
    }
    time_t end = time(NULL);
    uint64_t diff = end - start;
    double seedsPerSec = (double)total/(double)diff;
    printf("Time taken: %lld\nSeeds per second: %15.9f", diff, seedsPerSec);
    fclose(fp);
    return 0;
}
	.file	"tmpxft_002c18ad_00000000-6_seananners_splash.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4596:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4596:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.text._ZNSt6vectorIlSaIlEED2Ev,"axG",@progbits,_ZNSt6vectorIlSaIlEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIlSaIlEED2Ev
	.type	_ZNSt6vectorIlSaIlEED2Ev, @function
_ZNSt6vectorIlSaIlEED2Ev:
.LFB5337:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L2
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L2:
	ret
	.cfi_endproc
.LFE5337:
	.size	_ZNSt6vectorIlSaIlEED2Ev, .-_ZNSt6vectorIlSaIlEED2Ev
	.weak	_ZNSt6vectorIlSaIlEED1Ev
	.set	_ZNSt6vectorIlSaIlEED1Ev,_ZNSt6vectorIlSaIlEED2Ev
	.text
	.type	_ZL33__device_stub__Z10threadWorkmPjPlmPjPl, @function
_ZL33__device_stub__Z10threadWorkmPjPlmPjPl:
.LFB4618:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L5
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_ZL10threadWorkmPjPl(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L5:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L7
	call	__stack_chk_fail@PLT
.L7:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4618:
	.size	_ZL33__device_stub__Z10threadWorkmPjPlmPjPl, .-_ZL33__device_stub__Z10threadWorkmPjPlmPjPl
	.type	_ZL10threadWorkmPjPl, @function
_ZL10threadWorkmPjPl:
.LFB4619:
	.cfi_startproc
	endbr64
	jmp	_ZL33__device_stub__Z10threadWorkmPjPlmPjPl
	.cfi_endproc
.LFE4619:
	.size	_ZL10threadWorkmPjPl, .-_ZL10threadWorkmPjPl
	.type	_ZL37__device_stub__Z13setupGuessBox3PosS_R3PosS0_, @function
_ZL37__device_stub__Z13setupGuessBox3PosS_R3PosS0_:
.LFB4620:
	.cfi_startproc
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rcx
	movq	%rdi, 72(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 80(%rsp)
	leaq	8(%rsp), %rdx
	leaq	36(%rsp), %rsi
	leaq	24(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movl	$1, 32(%rsp)
	movq	%rax, 36(%rsp)
	movl	$1, 44(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	16(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_ZL13setupGuessBox3PosS_(%rip), %rdi
	pushq	16(%rsp)
	.cfi_def_cfa_offset 128
	movq	52(%rsp), %rcx
	movl	60(%rsp), %r8d
	movq	40(%rsp), %rsi
	movl	48(%rsp), %edx
	leaq	88(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L10:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4620:
	.size	_ZL37__device_stub__Z13setupGuessBox3PosS_R3PosS0_, .-_ZL37__device_stub__Z13setupGuessBox3PosS_R3PosS0_
	.type	_ZL13setupGuessBox3PosS_, @function
_ZL13setupGuessBox3PosS_:
.LFB4621:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	leaq	8(%rsp), %rdi
	movq	%rsi, (%rsp)
	movq	%rsp, %rsi
	call	_ZL37__device_stub__Z13setupGuessBox3PosS_R3PosS0_
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4621:
	.size	_ZL13setupGuessBox3PosS_, .-_ZL13setupGuessBox3PosS_
	.section	.rodata._Z9gpuAssert9cudaErrorPKci.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPUassert: %s (code %d) %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKci,"axG",@progbits,_Z9gpuAssert9cudaErrorPKci,comdat
	.weak	_Z9gpuAssert9cudaErrorPKci
	.type	_Z9gpuAssert9cudaErrorPKci, @function
_Z9gpuAssert9cudaErrorPKci:
.LFB4582:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L16
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movq	%rsi, 8(%rsp)
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	%ebx, %r8d
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rcx
	pushq	%rax
	.cfi_def_cfa_offset 56
	movl	$2, %esi
	xorl	%eax, %eax
	pushq	%rbp
	.cfi_def_cfa_offset 64
	movq	24(%rsp), %r9
	call	__fprintf_chk@PLT
	movl	%ebx, %edi
	call	exit@PLT
.L16:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE4582:
	.size	_Z9gpuAssert9cudaErrorPKci, .-_Z9gpuAssert9cudaErrorPKci
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"w+"
.LC2:
	.string	"seananners-middlestep.txt"
.LC3:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/BoySanic/seananners/master/seananners_splash.cu"
.LC4:
	.string	"%lld\n"
.LC7:
	.string	"Seeds Per Second: %f\tProgress: %f\n"
.LC9:
	.string	"Time taken: %lld\nSeeds per second: %15.9f"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB4593:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%edi, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	time@PLT
	leaq	.LC1(%rip), %rsi
	leaq	.LC2(%rip), %rdi
	movq	%rax, %rbp
	call	fopen@PLT
	movl	$1, %edx
	movl	$67108864, %esi
	leaq	buffer(%rip), %rdi
	movq	%rax, 8(%rsp)
	call	cudaMallocManaged@PLT
	movl	$111, %edx
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	call	cudaPeekAtLastError@PLT
	movl	$112, %edx
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movl	$1, %edx
	movl	$4, %esi
	leaq	counter(%rip), %rdi
	call	cudaMallocManaged@PLT
	movl	$113, %edx
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	call	cudaPeekAtLastError@PLT
	movl	$114, %edx
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	movabsq	$1185410975406, %rax
	leaq	24(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movq	%rax, 16(%rsp)
	movabsq	$1494648620742, %rax
	movq	%rax, 24(%rsp)
	call	_ZL37__device_stub__Z13setupGuessBox3PosS_R3PosS0_
.L22:
	xorl	%edi, %edi
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
	movabsq	$4294967424, %r14
	call	cudaSetDevice@PLT
	call	cudaPeekAtLastError@PLT
	movl	$123, %edx
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	call	cudaDeviceSynchronize@PLT
	movl	$124, %edx
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
.L30:
	movl	$65537, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, %rdx
	salq	$16, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%r14, 44(%rsp)
	movl	$1, 52(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L23
.L25:
	call	cudaPeekAtLastError@PLT
	movl	$134, %edx
	xorl	%ebx, %ebx
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	leaq	.LC4(%rip), %r15
	call	_Z9gpuAssert9cudaErrorPKci
	call	cudaDeviceSynchronize@PLT
	movl	$135, %edx
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	jmp	.L24
.L23:
	movq	buffer(%rip), %rdx
	movq	counter(%rip), %rsi
	movabsq	$1282613228000000, %rdi
	addq	%r12, %rdi
	call	_ZL33__device_stub__Z10threadWorkmPjPlmPjPl
	jmp	.L25
.L24:
	movq	counter(%rip), %rax
	cmpl	(%rax), %ebx
	jnb	.L36
	movq	buffer(%rip), %rax
	movq	8(%rsp), %rdi
	movq	%r15, %rdx
	movl	$2, %esi
	movq	(%rax,%rbx,8), %rcx
	xorl	%eax, %eax
	incq	%rbx
	call	__fprintf_chk@PLT
	jmp	.L24
.L36:
	cmpq	$999999999, %r13
	jbe	.L27
	xorl	%edi, %edi
	call	time@PLT
	cvtsi2sdq	%r12, %xmm0
	movaps	%xmm0, %xmm1
	divsd	.LC5(%rip), %xmm1
	mulsd	.LC6(%rip), %xmm1
	subq	%rbp, %rax
	js	.L28
	cvtsi2sdq	%rax, %xmm2
	jmp	.L29
.L28:
	movq	%rax, %rdx
	andl	$1, %eax
	shrq	%rdx
	orq	%rax, %rdx
	cvtsi2sdq	%rdx, %xmm2
	addsd	%xmm2, %xmm2
.L29:
	divsd	%xmm2, %xmm0
	leaq	.LC7(%rip), %rsi
	movb	$2, %al
	xorl	%r13d, %r13d
	movl	$2, %edi
	call	__printf_chk@PLT
.L27:
	movq	counter(%rip), %rax
	xorl	%edx, %edx
	addq	$8388608, %r12
	addq	$8388608, %r13
	movl	%edx, (%rax)
	movl	$11107, %eax
	salq	$23, %rax
	cmpq	%rax, %r12
	jne	.L30
	xorl	%edi, %edi
	call	time@PLT
	subq	%rbp, %rax
	movq	%rax, %rdx
	js	.L31
	cvtsi2sdq	%rax, %xmm1
	jmp	.L32
.L31:
	movq	%rdx, %rcx
	shrq	%rax
	andl	$1, %ecx
	orq	%rcx, %rax
	cvtsi2sdq	%rax, %xmm1
	addsd	%xmm1, %xmm1
.L32:
	movsd	.LC8(%rip), %xmm0
	movl	$2, %edi
	leaq	.LC9(%rip), %rsi
	movb	$1, %al
	divsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	fclose@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4593:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z13setupGuessBox3PosS_"
.LC11:
	.string	"_Z10threadWorkmPjPl"
.LC12:
	.string	"guessBox"
.LC13:
	.string	"startCurrent"
.LC14:
	.string	"hardcoded"
.LC15:
	.string	"current"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4623:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_ZL13setupGuessBox3PosS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	orl	$-1, %r8d
	leaq	_ZL10threadWorkmPjPl(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	movl	$16, %r9d
	leaq	_ZL8guessBox(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$8, %r9d
	leaq	_ZL12startCurrent(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$8, %r9d
	leaq	_ZL9hardcoded(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$8, %r9d
	movq	%rdx, %rcx
	leaq	_ZL7current(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4623:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text.startup
	.type	_GLOBAL__sub_I_buffer, @function
_GLOBAL__sub_I_buffer:
.LFB5343:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	leaq	__dso_handle(%rip), %rdx
	leaq	structureSeeds(%rip), %rsi
	leaq	_ZNSt6vectorIlSaIlEED1Ev(%rip), %rdi
	movq	%rax, structureSeeds(%rip)
	movq	%rax, 8+structureSeeds(%rip)
	movq	%rax, 16+structureSeeds(%rip)
	jmp	__cxa_atexit@PLT
	.cfi_endproc
.LFE5343:
	.size	_GLOBAL__sub_I_buffer, .-_GLOBAL__sub_I_buffer
	.section	.init_array
	.align 8
	.quad	_GLOBAL__sub_I_buffer
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	structSeedsArr
	.bss
	.align 8
	.type	structSeedsArr, @object
	.size	structSeedsArr, 8
structSeedsArr:
	.zero	8
	.globl	structureSeeds
	.align 16
	.type	structureSeeds, @object
	.size	structureSeeds, 24
structureSeeds:
	.zero	24
	.globl	counter
	.align 8
	.type	counter, @object
	.size	counter, 8
counter:
	.zero	8
	.globl	buffer
	.align 8
	.type	buffer, @object
	.size	buffer, 8
buffer:
	.zero	8
	.local	_ZL7current
	.comm	_ZL7current,8,8
	.local	_ZL9hardcoded
	.comm	_ZL9hardcoded,8,8
	.local	_ZL12startCurrent
	.comm	_ZL12startCurrent,8,8
	.local	_ZL8guessBox
	.comm	_ZL8guessBox,16,16
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	-1926758400
	.long	1110815057
	.align 8
.LC6:
	.long	0
	.long	1079574528
	.align 8
.LC8:
	.long	1822523552
	.long	1125268085
	.hidden	__dso_handle
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <math.h>
#include <vector>
#include <iomanip>
#include <sstream>
#include <string>
#include <fstream>
#include <thread>
#include <ctime>
#include <stdio.h>
__device__ static inline void setSeed(int64_t *seed)
{
    *seed = (*seed ^ 0x5deece66d) & ((1LL << 48) - 1);
}

__device__ static inline int next(int64_t *seed, const int bits)
{
    *seed = (*seed * 0x5deece66d + 0xb) & ((1LL << 48) - 1);
    return (int) (*seed >> (48 - bits));
}

__device__ static inline int nextInt(int64_t *seed, const int n)
{
    int bits, val;
    const int m = n - 1;

    if((m & n) == 0) return (int) ((n * (int64_t)next(seed, 31)) >> 31);

    do {
        bits = next(seed, 31);
        val = bits % n;
    }
    while (bits - val + m < 0);
    return val;
}

struct Pos
{
    int x, z;
};

__device__  class BoundingBox {
public:
	Pos start;
	Pos end;
	__device__ bool intersectsWith(BoundingBox box)
	{
		return this->end.x >= box.start.x && this->start.x <= box.end.x && this->end.z >= box.start.z && this->start.z <= box.end.z;
	}
};
#define BLOCK_SIZE (128)
#define WORK_SIZE_BITS 16
#define SEEDS_PER_CALL ((1ULL << (WORK_SIZE_BITS)) * (BLOCK_SIZE))

#define GPU_ASSERT(code) gpuAssert((code), __FILE__, __LINE__)
inline void gpuAssert(hipError_t code, const char *file, int line) {
  if (code != hipSuccess) {
    fprintf(stderr, "GPUassert: %s (code %d) %s %d\n", hipGetErrorString(code), code, file, line);
    exit(code);
  }
}

/*
Originally 64-bit seed value.
Mod 48 bit to get the 48 bit value.
Time could be any 64-bit value that when mod 48 gives the structure seed value.
We have the 48 bit post-mod 48 value
((8682522807148012UL * 181783497276652981UL)^x)%(1LL << 48) = someSeed


Take 48 bit seed value
Loop upper bits
Xor (8682522807148012UL * 181783497276652981UL) with upperBits Seed
Find seed that matches
*/
__device__ BoundingBox guessBox;
__device__ int64_t startCurrent = 8682522807148012L;
__device__ int64_t hardcoded = 181783497276652981L;
__device__ int64_t current;

__global__ __launch_bounds__(BLOCK_SIZE,2) static void threadWork(uint64_t offset, uint32_t* counter, int64_t* buffer){
    int64_t timeGuess = (blockIdx.x * blockDim.x + threadIdx.x) + offset;
    timeGuess *= 1000;
    int64_t seedGuess = current ^ timeGuess;
    nextInt(&seedGuess, 203);
    if(nextInt(&seedGuess, 203) == 103){
        buffer[atomicAdd(counter, 1)] = timeGuess;
    }
}
__global__ __launch_bounds__(1,1) static void setupGuessBox(Pos guessMin, Pos guessMax){
    current = startCurrent*hardcoded*hardcoded*hardcoded*hardcoded*hardcoded*hardcoded*hardcoded*hardcoded*hardcoded*hardcoded*hardcoded*hardcoded*hardcoded;
    guessBox.start = guessMin;
    guessBox.end = guessMax;
}
int64_t* buffer;
uint32_t* counter;
std::vector<int64_t> structureSeeds;
int64_t* structSeedsArr;

int main(int argc, char **argv ){
    int64_t startValue  = 1282613228000000;
    int64_t total       = 1282706397225000;
    time_t start = time(NULL);
    FILE* fp = fopen("seananners-middlestep.txt", "w+");
    double seconds_per_structure_seed = 0.0;
    int thread = 0;
    int curr = 0;

    uint64_t amount = total - startValue;
    int tmpCount = 0;
    GPU_ASSERT(hipMallocManaged(&buffer, sizeof(int64_t) * SEEDS_PER_CALL));
    GPU_ASSERT(hipPeekAtLastError());
    GPU_ASSERT(hipMallocManaged(&counter, sizeof(uint32_t)));
    GPU_ASSERT(hipPeekAtLastError());
    Pos guessMin;
    Pos guessMax;
    guessMin.x = 1710;
    guessMin.z = 276;
    guessMax.x = 1734;
    guessMax.z = 348;
    setupGuessBox<<<1,1>>>(guessMin, guessMax);
    hipSetDevice(0);
    GPU_ASSERT(hipPeekAtLastError());
    GPU_ASSERT(hipDeviceSynchronize());
    uint64_t countOut = 0;
    uint64_t tempCount;
    for(int64_t offset = 0; offset < amount; offset += SEEDS_PER_CALL){

        if(offset > amount){
            break;
        }
        int64_t value = startValue + offset;
        threadWork<<<1ULL<<WORK_SIZE_BITS,BLOCK_SIZE>>>(value, counter, buffer);
        GPU_ASSERT(hipPeekAtLastError());
        GPU_ASSERT(hipDeviceSynchronize());  
        for(int i = 0; i < *counter; i++){
            int64_t timeGuess = buffer[i];
            fprintf(fp, "%lld\n", timeGuess);
        }
        if(countOut >= 1000000000){
            time_t tempTime = time(NULL);
            uint64_t tempDiff = tempTime - start;
            double sps = (double)offset/(double)tempDiff;
            double percent = ((double)offset/(double)amount) * 100.0;
            printf("Seeds Per Second: %f\tProgress: %f\n", sps, percent);
            countOut = 0;
        }
        *counter = 0;
        countOut += SEEDS_PER_CALL;
    }
    time_t end = time(NULL);
    uint64_t diff = end - start;
    double seedsPerSec = (double)total/(double)diff;
    printf("Time taken: %lld\nSeeds per second: %15.9f", diff, seedsPerSec);
    fclose(fp);
    return 0;
}
	.text
	.file	"seananners_splash.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.text._ZNSt6vectorIlSaIlEED2Ev,"axG",@progbits,_ZNSt6vectorIlSaIlEED2Ev,comdat
	.weak	_ZNSt6vectorIlSaIlEED2Ev        # -- Begin function _ZNSt6vectorIlSaIlEED2Ev
	.p2align	1, 0x90
	.type	_ZNSt6vectorIlSaIlEED2Ev,@function
_ZNSt6vectorIlSaIlEED2Ev:               # @_ZNSt6vectorIlSaIlEED2Ev
	.cfi_startproc
# %bb.0:
	movq	(%rdi), %rdi
	testq	%rdi, %rdi
	jne	_ZdlPv                          # TAILCALL
# %bb.1:                                # %_ZNSt12_Vector_baseIlSaIlEED2Ev.exit
	retq
.Lfunc_end0:
	.size	_ZNSt6vectorIlSaIlEED2Ev, .Lfunc_end0-_ZNSt6vectorIlSaIlEED2Ev
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI1_1:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI1_2:
	.quad	0x4235b1518d280000              # double 93169225000
.LCPI1_3:
	.quad	0x4059000000000000              # double 100
.LCPI1_4:
	.quad	0x43123a756ca180a0              # double 1282706397225000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%edi, %edi
	callq	time
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	movl	$buffer, %edi
	movl	$67108864, %esi                 # imm = 0x4000000
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	jne	.LBB1_1
# %bb.3:                                # %_Z9gpuAssert10hipError_tPKci.exit
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.5:                                # %_Z9gpuAssert10hipError_tPKci.exit47
	movl	$counter, %edi
	movl	$4, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.7:                                # %_Z9gpuAssert10hipError_tPKci.exit49
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.9:                                # %_Z9gpuAssert10hipError_tPKci.exit51
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%rdi, %r12
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_11
# %bb.10:
	movabsq	$1185410975406, %rdi            # imm = 0x114000006AE
	movabsq	$1494648620742, %rsi            # imm = 0x15C000006C6
	callq	_ZL28__device_stub__setupGuessBox3PosS_
.LBB1_11:
	xorl	%edi, %edi
	callq	hipSetDevice
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.13:                               # %_Z9gpuAssert10hipError_tPKci.exit53
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB1_27
# %bb.14:                               # %_Z9gpuAssert10hipError_tPKci.exit55.preheader.preheader
	leaq	127(%r12), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	addq	$65535, %r12                    # imm = 0xFFFF
	movl	$8388608, %r13d                 # imm = 0x800000
	xorl	%r15d, %r15d
	xorl	%r14d, %r14d
.LBB1_15:                               # %_Z9gpuAssert10hipError_tPKci.exit55.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_22 Depth 2
	movq	%r12, %rdi
	movl	$1, %esi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_17
# %bb.16:                               #   in Loop: Header=BB1_15 Depth=1
	movabsq	$1282613228000000, %rax         # imm = 0x48E87A9D6D300
	leaq	(%r14,%rax), %rdi
	movq	counter(%rip), %rsi
	movq	buffer(%rip), %rdx
	callq	_ZL25__device_stub__threadWorkmPjPl
.LBB1_17:                               #   in Loop: Header=BB1_15 Depth=1
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB1_18
# %bb.19:                               # %_Z9gpuAssert10hipError_tPKci.exit57
                                        #   in Loop: Header=BB1_15 Depth=1
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB1_28
# %bb.20:                               # %_Z9gpuAssert10hipError_tPKci.exit59.preheader
                                        #   in Loop: Header=BB1_15 Depth=1
	movq	counter(%rip), %rax
	cmpl	$0, (%rax)
	je	.LBB1_23
# %bb.21:                               # %_Z9gpuAssert10hipError_tPKci.exit59.preheader103
                                        #   in Loop: Header=BB1_15 Depth=1
	xorl	%ebp, %ebp
.LBB1_22:                               # %_Z9gpuAssert10hipError_tPKci.exit59
                                        #   Parent Loop BB1_15 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	buffer(%rip), %rax
	movq	(%rax,%rbp,8), %rdx
	movl	$.L.str.3, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	fprintf
	incq	%rbp
	movq	counter(%rip), %rax
	movl	(%rax), %ecx
	cmpq	%rcx, %rbp
	jb	.LBB1_22
.LBB1_23:                               # %_Z9gpuAssert10hipError_tPKci.exit59._crit_edge
                                        #   in Loop: Header=BB1_15 Depth=1
	cmpq	$999999999, %r15                # imm = 0x3B9AC9FF
	jbe	.LBB1_25
# %bb.24:                               #   in Loop: Header=BB1_15 Depth=1
	xorl	%edi, %edi
	callq	time
	subq	8(%rsp), %rax                   # 8-byte Folded Reload
	xorps	%xmm1, %xmm1
	cvtsi2sd	%r14, %xmm1
	movq	%rax, %xmm0
	punpckldq	.LCPI1_0(%rip), %xmm0   # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
	subpd	.LCPI1_1(%rip), %xmm0
	movapd	%xmm0, %xmm2
	unpckhpd	%xmm0, %xmm2                    # xmm2 = xmm2[1],xmm0[1]
	addsd	%xmm0, %xmm2
	movapd	%xmm1, %xmm0
	divsd	%xmm2, %xmm0
	divsd	.LCPI1_2(%rip), %xmm1
	mulsd	.LCPI1_3(%rip), %xmm1
	movl	$.L.str.4, %edi
	movb	$2, %al
	callq	printf
	movq	counter(%rip), %rax
	xorl	%r15d, %r15d
.LBB1_25:                               # %_Z9gpuAssert10hipError_tPKci.exit55
                                        #   in Loop: Header=BB1_15 Depth=1
	movl	$0, (%rax)
	addq	%r13, %r15
	leaq	(%r14,%r13), %rax
	movabsq	$93160836392, %rcx              # imm = 0x15B0D18D28
	cmpq	%rcx, %r14
	movq	%rax, %r14
	jb	.LBB1_15
# %bb.26:
	xorl	%edi, %edi
	callq	time
	subq	8(%rsp), %rax                   # 8-byte Folded Reload
	movq	%rax, %xmm0
	punpckldq	.LCPI1_0(%rip), %xmm0   # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
	subpd	.LCPI1_1(%rip), %xmm0
	movapd	%xmm0, %xmm1
	unpckhpd	%xmm0, %xmm1                    # xmm1 = xmm1[1],xmm0[1]
	addsd	%xmm0, %xmm1
	movsd	.LCPI1_4(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movl	$.L.str.5, %edi
	movq	%rax, %rsi
	movb	$1, %al
	callq	printf
	movq	%rbx, %rdi
	callq	fclose
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_28:
	.cfi_def_cfa_offset 80
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	%ebp, %ecx
	movl	$137, %r9d
	jmp	.LBB1_2
.LBB1_18:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	%ebp, %ecx
	movl	$136, %r9d
.LBB1_2:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.LBB1_1:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	%ebp, %ecx
	movl	$113, %r9d
	jmp	.LBB1_2
.LBB1_4:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	%ebp, %ecx
	movl	$114, %r9d
	jmp	.LBB1_2
.LBB1_6:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	%ebp, %ecx
	movl	$115, %r9d
	jmp	.LBB1_2
.LBB1_8:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	%ebp, %ecx
	movl	$116, %r9d
	jmp	.LBB1_2
.LBB1_12:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	%ebp, %ecx
	movl	$125, %r9d
	jmp	.LBB1_2
.LBB1_27:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	%ebp, %ecx
	movl	$126, %r9d
	jmp	.LBB1_2
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.type	_ZL28__device_stub__setupGuessBox3PosS_,@function # -- Begin function _ZL28__device_stub__setupGuessBox3PosS_
_ZL28__device_stub__setupGuessBox3PosS_: # @_ZL28__device_stub__setupGuessBox3PosS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZL13setupGuessBox3PosS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_ZL28__device_stub__setupGuessBox3PosS_, .Lfunc_end2-_ZL28__device_stub__setupGuessBox3PosS_
	.cfi_endproc
                                        # -- End function
	.type	_ZL25__device_stub__threadWorkmPjPl,@function # -- Begin function _ZL25__device_stub__threadWorkmPjPl
_ZL25__device_stub__threadWorkmPjPl:    # @_ZL25__device_stub__threadWorkmPjPl
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZL10threadWorkmPjPl, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_ZL25__device_stub__threadWorkmPjPl, .Lfunc_end3-_ZL25__device_stub__threadWorkmPjPl
	.cfi_endproc
                                        # -- End function
	.section	.text.startup,"ax",@progbits
	.type	_GLOBAL__sub_I_seananners_splash.hip,@function # -- Begin function _GLOBAL__sub_I_seananners_splash.hip
_GLOBAL__sub_I_seananners_splash.hip:   # @_GLOBAL__sub_I_seananners_splash.hip
	.cfi_startproc
# %bb.0:
	xorps	%xmm0, %xmm0
	movups	%xmm0, structureSeeds(%rip)
	movq	$0, structureSeeds+16(%rip)
	movl	$_ZNSt6vectorIlSaIlEED2Ev, %edi
	movl	$structureSeeds, %esi
	movl	$__dso_handle, %edx
	jmp	__cxa_atexit                    # TAILCALL
.Lfunc_end4:
	.size	_GLOBAL__sub_I_seananners_splash.hip, .Lfunc_end4-_GLOBAL__sub_I_seananners_splash.hip
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	subq	$32, %rsp
	.cfi_adjust_cfa_offset 32
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZL13setupGuessBox3PosS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZL10threadWorkmPjPl, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$guessBox, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$16, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$startCurrent, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$hardcoded, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$current, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$__hip_module_dtor, %edi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	guessBox,@object                # @guessBox
	.local	guessBox
	.comm	guessBox,16,4
	.type	startCurrent,@object            # @startCurrent
	.local	startCurrent
	.comm	startCurrent,8,8
	.type	hardcoded,@object               # @hardcoded
	.local	hardcoded
	.comm	hardcoded,8,8
	.type	current,@object                 # @current
	.local	current
	.comm	current,8,8
	.type	buffer,@object                  # @buffer
	.bss
	.globl	buffer
	.p2align	3, 0x0
buffer:
	.quad	0
	.size	buffer, 8

	.type	counter,@object                 # @counter
	.globl	counter
	.p2align	3, 0x0
counter:
	.quad	0
	.size	counter, 8

	.type	structureSeeds,@object          # @structureSeeds
	.globl	structureSeeds
	.p2align	3, 0x0
structureSeeds:
	.zero	24
	.size	structureSeeds, 24

	.hidden	__dso_handle
	.type	structSeedsArr,@object          # @structSeedsArr
	.globl	structSeedsArr
	.p2align	3, 0x0
structSeedsArr:
	.quad	0
	.size	structSeedsArr, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"seananners-middlestep.txt"
	.size	.L.str, 26

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"w+"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/BoySanic/seananners/master/seananners_splash.hip"
	.size	.L.str.2, 111

	.type	_ZL13setupGuessBox3PosS_,@object # @_ZL13setupGuessBox3PosS_
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
_ZL13setupGuessBox3PosS_:
	.quad	_ZL28__device_stub__setupGuessBox3PosS_
	.size	_ZL13setupGuessBox3PosS_, 8

	.type	_ZL10threadWorkmPjPl,@object    # @_ZL10threadWorkmPjPl
	.p2align	3, 0x0
_ZL10threadWorkmPjPl:
	.quad	_ZL25__device_stub__threadWorkmPjPl
	.size	_ZL10threadWorkmPjPl, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"%lld\n"
	.size	.L.str.3, 6

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Seeds Per Second: %f\tProgress: %f\n"
	.size	.L.str.4, 35

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Time taken: %lld\nSeeds per second: %15.9f"
	.size	.L.str.5, 42

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"GPUassert: %s (code %d) %s %d\n"
	.size	.L.str.6, 31

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_ZL13setupGuessBox3PosS_"
	.size	.L__unnamed_1, 25

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_ZL10threadWorkmPjPl"
	.size	.L__unnamed_2, 21

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"guessBox"
	.size	.L__unnamed_3, 9

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"startCurrent"
	.size	.L__unnamed_4, 13

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"hardcoded"
	.size	.L__unnamed_5, 10

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"current"
	.size	.L__unnamed_6, 8

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	_GLOBAL__sub_I_seananners_splash.hip
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _ZL28__device_stub__setupGuessBox3PosS_
	.addrsig_sym _ZL25__device_stub__threadWorkmPjPl
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _GLOBAL__sub_I_seananners_splash.hip
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym guessBox
	.addrsig_sym startCurrent
	.addrsig_sym hardcoded
	.addrsig_sym current
	.addrsig_sym buffer
	.addrsig_sym counter
	.addrsig_sym structureSeeds
	.addrsig_sym __dso_handle
	.addrsig_sym _ZL13setupGuessBox3PosS_
	.addrsig_sym _ZL10threadWorkmPjPl
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._ZL10threadWorkmPjPl,"axG",@progbits,_ZL10threadWorkmPjPl,comdat
	.globl	_ZL10threadWorkmPjPl            ; -- Begin function _ZL10threadWorkmPjPl
	.p2align	8
	.type	_ZL10threadWorkmPjPl,@function
_ZL10threadWorkmPjPl:                   ; @_ZL10threadWorkmPjPl
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_add_co_u32 v2, s2, v1, s4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, null, 0, s5, s2
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, current@rel32@lo+4
	s_addc_u32 s3, s3, current@rel32@hi+12
	v_mad_u64_u32 v[0:1], null, 0x3e8, v2, 0
	s_load_b64 s[2:3], s[2:3], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, 0x3e8, v4, v[1:2]
	v_mov_b32_e32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, s2, v0
	v_xor_b32_e32 v2, s3, v1
	s_mov_b32 s2, 0x942de6ba
	s_mov_b32 s3, 64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v5, 0xbb20, v4
	v_mul_lo_u32 v6, 0xb4600a69, v2
	v_mad_u64_u32 v[2:3], null, 0xb4600a69, v4, s[2:3]
	s_mov_b32 s2, 0x791064e3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v3, v6, v3, v5
	v_alignbit_b32 v2, v3, v2, 17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, 0x7fffffff, v2
	v_mad_u64_u32 v[2:3], null, v4, s2, 0x4a6768ab
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x142d662, v2
	s_cbranch_execz .LBB0_4
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x10
	s_mov_b32 s3, exec_lo
	s_mov_b32 s2, exec_lo
	v_mbcnt_lo_u32_b32 v2, s3, 0
                                        ; implicit-def: $vgpr3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_3
; %bb.2:
	s_bcnt1_i32_b32 s3, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v4, s3
	global_atomic_add_u32 v3, v3, v4, s[6:7] glc
.LBB0_3:
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v2, s2, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_store_b64 v[2:3], v[0:1], off
.LBB0_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZL10threadWorkmPjPl
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZL10threadWorkmPjPl,"axG",@progbits,_ZL10threadWorkmPjPl,comdat
.Lfunc_end0:
	.size	_ZL10threadWorkmPjPl, .Lfunc_end0-_ZL10threadWorkmPjPl
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 396
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZL13setupGuessBox3PosS_,"axG",@progbits,_ZL13setupGuessBox3PosS_,comdat
	.globl	_ZL13setupGuessBox3PosS_        ; -- Begin function _ZL13setupGuessBox3PosS_
	.p2align	8
	.type	_ZL13setupGuessBox3PosS_,@function
_ZL13setupGuessBox3PosS_:               ; @_ZL13setupGuessBox3PosS_
; %bb.0:
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, hardcoded@rel32@lo+4
	s_addc_u32 s3, s3, hardcoded@rel32@hi+12
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, startCurrent@rel32@lo+4
	s_addc_u32 s5, s5, startCurrent@rel32@hi+12
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, current@rel32@lo+4
	s_addc_u32 s9, s9, current@rel32@hi+12
	s_load_b64 s[6:7], s[2:3], 0x0
	s_load_b64 s[4:5], s[4:5], 0x0
	s_getpc_b64 s[10:11]
	s_add_u32 s10, s10, guessBox@rel32@lo+4
	s_addc_u32 s11, s11, guessBox@rel32@hi+12
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s12, s6, s7
	s_mul_hi_u32 s13, s6, s6
	s_mul_i32 s14, s6, s6
	s_add_i32 s13, s13, s12
	s_mul_i32 s16, s7, s4
	s_mul_i32 s7, s14, s7
	s_mul_hi_u32 s17, s14, s6
	s_add_i32 s12, s13, s12
	s_add_i32 s7, s17, s7
	s_mul_i32 s12, s12, s6
	s_mul_i32 s14, s14, s6
	s_add_i32 s7, s7, s12
	s_mul_i32 s5, s6, s5
	s_mul_hi_u32 s15, s6, s4
	s_mul_i32 s4, s6, s4
	s_mul_hi_u32 s13, s14, s14
	s_mul_i32 s6, s14, s14
	s_mul_i32 s14, s14, s7
	s_add_i32 s5, s15, s5
	s_add_i32 s12, s13, s14
	s_add_i32 s5, s5, s16
	s_add_i32 s12, s12, s14
	s_mul_hi_u32 s7, s4, s6
	s_mul_i32 s13, s4, s6
	s_mul_i32 s4, s4, s12
	s_mul_i32 s5, s5, s6
	s_add_i32 s4, s7, s4
	s_mul_hi_u32 s14, s13, s6
	s_mul_i32 s7, s13, s12
	s_add_i32 s4, s4, s5
	s_add_i32 s5, s14, s7
	s_mul_i32 s4, s4, s6
	s_mul_i32 s13, s13, s6
	s_add_i32 s5, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v5, s5
	v_mov_b32_e32 v4, s13
	v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v3, s3
	v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v2, s2
	s_clause 0x1
	global_store_b64 v6, v[4:5], s[8:9]
	global_store_b128 v6, v[0:3], s[10:11]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZL13setupGuessBox3PosS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 18
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZL13setupGuessBox3PosS_,"axG",@progbits,_ZL13setupGuessBox3PosS_,comdat
.Lfunc_end1:
	.size	_ZL13setupGuessBox3PosS_, .Lfunc_end1-_ZL13setupGuessBox3PosS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 308
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	guessBox                ; @guessBox
	.type	guessBox,@object
	.section	.bss,"aw",@nobits
	.globl	guessBox
	.p2align	3, 0x0
guessBox:
	.zero	16
	.size	guessBox, 16

	.protected	startCurrent            ; @startCurrent
	.type	startCurrent,@object
	.data
	.globl	startCurrent
	.p2align	3, 0x0
startCurrent:
	.quad	8682522807148012                ; 0x1ed8b55fac9dec
	.size	startCurrent, 8

	.protected	hardcoded               ; @hardcoded
	.type	hardcoded,@object
	.globl	hardcoded
	.p2align	3, 0x0
hardcoded:
	.quad	181783497276652981              ; 0x285d320ad33fdb5
	.size	hardcoded, 8

	.protected	current                 ; @current
	.type	current,@object
	.section	.bss,"aw",@nobits
	.globl	current
	.p2align	3, 0x0
current:
	.quad	0                               ; 0x0
	.size	current, 8

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym guessBox
	.addrsig_sym startCurrent
	.addrsig_sym hardcoded
	.addrsig_sym current
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 128
    .name:           _ZL10threadWorkmPjPl
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _ZL10threadWorkmPjPl.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .offset:         8
        .size:           8
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 4
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1
    .name:           _ZL13setupGuessBox3PosS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _ZL13setupGuessBox3PosS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
