#include <iostream>
#include <cuda_runtime.h>
#include <chrono>
#include <cstdio>
#include <cuda_fp16.h>   // CUDA_VERSION >= 7050

#define CUDA_ARCH_FP16_SUPPORTED(CUDA_ARCH) (CUDA_ARCH >= 600)

template <typename T>
__device__ T math_exp(T a);

template <>
__device__ half math_exp<half>(half a) {
#if CUDA_ARCH_FP16_SUPPORTED(__CUDA_ARCH__)
  return hexp(a);
#endif
}

template <>
__device__ float math_exp<float>(float a) {
  return expf(a);
}

template <typename T>
__global__ void swish_kernel(int num, const T *input, T *output, T beta) {
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  if (index < num) {
#if __CUDA_ARCH__ >= 350
    output[index] =
        __ldg(input + index) /
        (static_cast<T>(1.0) + math_exp<T>(-beta * __ldg(input + index)));
#else
    output[index] = input[index] /
                    (static_cast<T>(1.0) + math_exp<T>(-beta * input[index]));
#endif
  }
}

template <>
__global__ void swish_kernel<half>(int num,
                                   const half *input,
                                   half *output,
                                   half beta) {
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  // half2* input2 = (half2*)input;
  // half2* output2 = (half2*)output;
  if (index < num) {
// #if CUDA_ARCH_FP16_SUPPORTED(__CUDA_ARCH__)
    output[index] =
        __ldg(input + index) /
        (static_cast<half>(1.0) + math_exp<half>(-beta * __ldg(input + index)));
    // output[index] = __hdiv(__ldg(input + index), (__hadd(static_cast<half>(1.0), hexp(__hneg(beta * (__ldg(input + index)))))));

    // output2[index] = __h2div(__ldg(input2 + index), (__hadd2(__halves2half2(1.0, 1.0), hexp2(__hneg2(__hmul2(__halves2half2(beta,beta), (__ldg(input2 + index))))))));
    // output2[index] = __h2div(input2[index], (__hadd2(__halves2half2(1.0, 1.0), hexp2(__hneg2(__hmul2(__halves2half2(beta, beta), (input2[index])))))));
    // half2 val = __halves2half2(1.0, 1.0);
    printf("hehe");

// #endif
  }
}

int main() {
    using dtype = half;
    int num = 1 * 64 * 112 * 112;
    int size = num * sizeof(dtype);
    half beta = 1.0;
    int threads = 1024;
    int blocks = (num + threads - 1) / threads;
    
    dtype* h_input = new dtype[num];
    dtype* h_output = new dtype[num];
    h_input[0] = 5;
    
    int device_id = 2;
    cudaSetDevice(device_id);
    cudaStream_t stream;
    cudaStreamCreate(&stream);
    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);
    dtype *input, *output;
    cudaMalloc(&input, size);
    cudaMalloc(&output, size);

    // warmup
    for (int i = 0; i < 5; i ++)
    {
        cudaMemcpyAsync(input, h_input, size, cudaMemcpyHostToDevice, stream);
        swish_kernel<<<blocks, threads, 0, stream>>>(num, input, output, beta);
        cudaMemcpyAsync(h_output, output, size, cudaMemcpyDeviceToHost, stream);
    }
    cudaStreamSynchronize(stream);

    // run
    int repeats = 1; 
    float cost = 0.0f;

    for (int i = 0; i < repeats; i ++) {
        cudaMemcpyAsync(input, h_input, size, cudaMemcpyHostToDevice, stream);
        cudaEventRecord(start, stream);

        swish_kernel<<<blocks, threads, 0, stream>>>(num, input, output, beta);

        cudaEventRecord(stop, stream);
        cudaEventSynchronize(stop);
        float elapse_time = 0.0f;
        cudaEventElapsedTime(&elapse_time, start, stop);
        cost += elapse_time;
        // std::cout << elapse_time << std::endl;
        cudaMemcpyAsync(h_output, output, size, cudaMemcpyDeviceToHost, stream);
    }
    cudaStreamSynchronize(stream);
    
    for(int i = 0; i < 6; i ++) {
      std::cout << __half2float(h_output[i]) << std::endl;
    }
    float avg_cost = cost / (1.0f * repeats);
    std::cout << "avg cost: " << avg_cost << std::endl;
    cudaEventDestroy(start);
    cudaEventDestroy(stop);
    cudaFree(input);
    cudaFree(output);
    
    return 0;
}
	.file	"tmpxft_00314be6_00000000-6_main.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4116:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4116:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL12__float2halff, @function
_ZL12__float2halff:
.LFB3862:
	.cfi_startproc
	movd	%xmm0, %ecx
	movl	%ecx, %edx
	movl	%ecx, %eax
	shrl	$16, %eax
	andl	$2147483647, %edx
	andl	$32768, %eax
	cmpl	$2139095039, %edx
	jbe	.L3
	orb	$124, %ah
	cmpl	$2139095040, %edx
	movl	$32767, %edx
	cmovne	%edx, %eax
	ret
.L3:
	cmpl	$1199566847, %edx
	jbe	.L5
	orw	$31743, %ax
	jmp	.L6
.L5:
	cmpl	$947912703, %edx
	jbe	.L7
	movl	%edx, %edi
	subl	$939524096, %edx
	shrl	$13, %edx
	sall	$19, %edi
	orl	%edx, %eax
	jmp	.L8
.L7:
	cmpl	$855638016, %edx
	jbe	.L4
	andl	$8388607, %ecx
	shrl	$23, %edx
	movl	%ecx, %esi
	leal	-94(%rdx), %ecx
	orl	$8388608, %esi
	movl	%esi, %edi
	sall	%cl, %edi
	movl	$126, %ecx
	subl	%edx, %ecx
	shrl	%cl, %esi
	orl	%esi, %eax
.L8:
	cmpl	$-2147483648, %edi
	ja	.L6
	jne	.L4
	testb	$1, %al
	je	.L4
.L6:
	incl	%eax
.L4:
	ret
	.cfi_endproc
.LFE3862:
	.size	_ZL12__float2halff, .-_ZL12__float2halff
	.set	_ZL15__float2half_rnf,_ZL12__float2halff
	.type	_Z35__wrapper__device_stub_swish_kernelI6__halfEvRiRPKT_RPS2_RS2_.isra.0, @function
_Z35__wrapper__device_stub_swish_kernelI6__halfEvRiRPKT_RPS2_RS2_.isra.0:
.LFB4819:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	4(%rsp), %rax
	movl	%edi, 4(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rsi, 8(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	24(%rsp), %rdx
	movq	%rax, 104(%rsp)
	movabsq	$4294967297, %rax
	movq	%rcx, 112(%rsp)
	leaq	32(%rsp), %rcx
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	32(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12swish_kernelI6__halfEviPKT_PS1_S1_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 160
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L15:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4819:
	.size	_Z35__wrapper__device_stub_swish_kernelI6__halfEvRiRPKT_RPS2_RS2_.isra.0, .-_Z35__wrapper__device_stub_swish_kernelI6__halfEvRiRPKT_RPS2_RS2_.isra.0
	.globl	_Z12swish_kernelI6__halfEviPKT_PS1_S1_
	.type	_Z12swish_kernelI6__halfEviPKT_PS1_S1_, @function
_Z12swish_kernelI6__halfEviPKT_PS1_S1_:
.LFB4112:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movw	%cx, 14(%rsp)
	leaq	14(%rsp), %rcx
	call	_Z35__wrapper__device_stub_swish_kernelI6__halfEvRiRPKT_RPS2_RS2_.isra.0
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4112:
	.size	_Z12swish_kernelI6__halfEviPKT_PS1_S1_, .-_Z12swish_kernelI6__halfEviPKT_PS1_S1_
	.globl	_Z8math_expI6__halfET_S1_
	.type	_Z8math_expI6__halfET_S1_, @function
_Z8math_expI6__halfET_S1_:
.LFB4108:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4108:
	.size	_Z8math_expI6__halfET_S1_, .-_Z8math_expI6__halfET_S1_
	.globl	_Z8math_expIfET_S0_
	.type	_Z8math_expIfET_S0_, @function
_Z8math_expIfET_S0_:
.LFB4109:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4109:
	.size	_Z8math_expIfET_S0_, .-_Z8math_expIfET_S0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"avg cost: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB4113:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movabsq	$4294968320, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	$5, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	movss	.LC0(%rip), %xmm0
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	_ZL12__float2halff
	movl	$1605632, %edi
	movl	%eax, %r12d
	call	_Znam@PLT
	movl	$1605632, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movss	.LC1(%rip), %xmm0
	movq	%rax, %rbx
	call	_ZL15__float2half_rnf
	movl	$2, %edi
	movw	%ax, 0(%rbp)
	call	cudaSetDevice@PLT
	leaq	8(%rsp), %rdi
	call	cudaStreamCreate@PLT
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	24(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	32(%rsp), %rdi
	movl	$1605632, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$1605632, %esi
	call	cudaMalloc@PLT
.L27:
	movq	8(%rsp), %r8
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$1605632, %edx
	call	cudaMemcpyAsync@PLT
	movl	$268435505, %edi
	xorl	%r8d, %r8d
	movq	%r14, %rdx
	movq	8(%rsp), %r9
	salq	$4, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%r14, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	6(%rsp), %rcx
	movl	$802816, %edi
	movw	%r12w, 6(%rsp)
	call	_Z35__wrapper__device_stub_swish_kernelI6__halfEvRiRPKT_RPS2_RS2_.isra.0
.L26:
	movq	8(%rsp), %r8
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$1605632, %edx
	call	cudaMemcpyAsync@PLT
	decl	%r13d
	jne	.L27
	movq	8(%rsp), %rdi
	call	cudaStreamSynchronize@PLT
	movq	8(%rsp), %r8
	movq	32(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$1605632, %edx
	call	cudaMemcpyAsync@PLT
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	cudaEventRecord@PLT
	movl	$4194305, %edx
	movl	$268435505, %edi
	xorl	%r8d, %r8d
	movq	8(%rsp), %r9
	salq	$10, %rdx
	salq	$4, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	6(%rsp), %rcx
	movl	$802816, %edi
	movw	%r12w, 6(%rsp)
	call	_Z35__wrapper__device_stub_swish_kernelI6__halfEvRiRPKT_RPS2_RS2_.isra.0
.L28:
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi
	xorl	%r12d, %r12d
	leaq	_ZSt4cout(%rip), %rbp
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	leaq	60(%rsp), %rdi
	movl	$0x00000000, 60(%rsp)
	call	cudaEventElapsedTime@PLT
	xorps	%xmm0, %xmm0
	movq	8(%rsp), %r8
	movq	%rbx, %rdi
	addss	60(%rsp), %xmm0
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movl	$1605632, %edx
	movd	%xmm0, %r14d
	call	cudaMemcpyAsync@PLT
	movq	8(%rsp), %rdi
	call	cudaStreamSynchronize@PLT
.L33:
	movw	(%rbx,%r12,2), %dx
	movl	%edx, %eax
	movl	%edx, %ecx
	sall	$13, %edx
	shrw	$10, %ax
	shrw	$15, %cx
	andl	$8380416, %edx
	andl	$31, %eax
	movzwl	%cx, %ecx
	cmpw	$31, %ax
	jne	.L29
	movl	$255, %eax
	testl	%edx, %edx
	je	.L30
	xorl	%ecx, %ecx
	movl	$8388607, %edx
	jmp	.L30
.L29:
	testw	%ax, %ax
	jne	.L31
	xorl	%eax, %eax
	testl	%edx, %edx
	je	.L30
	movl	$113, %eax
.L32:
	movl	%edx, %esi
	decl	%eax
	addl	%edx, %edx
	andl	$4194304, %esi
	testl	%esi, %esi
	je	.L32
	andl	$8388607, %edx
	jmp	.L30
.L31:
	addl	$112, %eax
	movzwl	%ax, %eax
.L30:
	sall	$23, %eax
	sall	$31, %ecx
	movq	%rbp, %rdi
	incq	%r12
	orl	%eax, %ecx
	orl	%edx, %ecx
	movd	%ecx, %xmm1
	cvtss2sd	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	cmpq	$6, %r12
	jne	.L33
	leaq	.LC3(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movd	%r14d, %xmm2
	movq	%rax, %rdi
	cvtss2sd	%xmm2, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	16(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	24(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$80, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4113:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z12swish_kernelI6__halfEviPKT_PS1_S1_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4141:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12swish_kernelI6__halfEviPKT_PS1_S1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4141:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.align 4
.LC1:
	.long	1084227584
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <chrono>
#include <cstdio>
#include <hip/hip_fp16.h>   // CUDA_VERSION >= 7050

#define CUDA_ARCH_FP16_SUPPORTED(CUDA_ARCH) (CUDA_ARCH >= 600)

template <typename T>
__device__ T math_exp(T a);

template <>
__device__ half math_exp<half>(half a) {
#if CUDA_ARCH_FP16_SUPPORTED(__CUDA_ARCH__)
  return hexp(a);
#endif
}

template <>
__device__ float math_exp<float>(float a) {
  return expf(a);
}

template <typename T>
__global__ void swish_kernel(int num, const T *input, T *output, T beta) {
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  if (index < num) {
#if __CUDA_ARCH__ >= 350
    output[index] =
        __ldg(input + index) /
        (static_cast<T>(1.0) + math_exp<T>(-beta * __ldg(input + index)));
#else
    output[index] = input[index] /
                    (static_cast<T>(1.0) + math_exp<T>(-beta * input[index]));
#endif
  }
}

template <>
__global__ void swish_kernel<half>(int num,
                                   const half *input,
                                   half *output,
                                   half beta) {
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  // half2* input2 = (half2*)input;
  // half2* output2 = (half2*)output;
  if (index < num) {
// #if CUDA_ARCH_FP16_SUPPORTED(__CUDA_ARCH__)
    output[index] =
        __ldg(input + index) /
        (static_cast<half>(1.0) + math_exp<half>(-beta * __ldg(input + index)));
    // output[index] = __hdiv(__ldg(input + index), (__hadd(static_cast<half>(1.0), hexp(__hneg(beta * (__ldg(input + index)))))));

    // output2[index] = __h2div(__ldg(input2 + index), (__hadd2(__halves2half2(1.0, 1.0), hexp2(__hneg2(__hmul2(__halves2half2(beta,beta), (__ldg(input2 + index))))))));
    // output2[index] = __h2div(input2[index], (__hadd2(__halves2half2(1.0, 1.0), hexp2(__hneg2(__hmul2(__halves2half2(beta, beta), (input2[index])))))));
    // half2 val = __halves2half2(1.0, 1.0);
    printf("hehe");

// #endif
  }
}

int main() {
    using dtype = half;
    int num = 1 * 64 * 112 * 112;
    int size = num * sizeof(dtype);
    half beta = 1.0;
    int threads = 1024;
    int blocks = (num + threads - 1) / threads;
    
    dtype* h_input = new dtype[num];
    dtype* h_output = new dtype[num];
    h_input[0] = 5;
    
    int device_id = 2;
    hipSetDevice(device_id);
    hipStream_t stream;
    hipStreamCreate(&stream);
    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);
    dtype *input, *output;
    hipMalloc(&input, size);
    hipMalloc(&output, size);

    // warmup
    for (int i = 0; i < 5; i ++)
    {
        hipMemcpyAsync(input, h_input, size, hipMemcpyHostToDevice, stream);
        swish_kernel<<<blocks, threads, 0, stream>>>(num, input, output, beta);
        hipMemcpyAsync(h_output, output, size, hipMemcpyDeviceToHost, stream);
    }
    hipStreamSynchronize(stream);

    // run
    int repeats = 1; 
    float cost = 0.0f;

    for (int i = 0; i < repeats; i ++) {
        hipMemcpyAsync(input, h_input, size, hipMemcpyHostToDevice, stream);
        hipEventRecord(start, stream);

        swish_kernel<<<blocks, threads, 0, stream>>>(num, input, output, beta);

        hipEventRecord(stop, stream);
        hipEventSynchronize(stop);
        float elapse_time = 0.0f;
        hipEventElapsedTime(&elapse_time, start, stop);
        cost += elapse_time;
        // std::cout << elapse_time << std::endl;
        hipMemcpyAsync(h_output, output, size, hipMemcpyDeviceToHost, stream);
    }
    hipStreamSynchronize(stream);
    
    for(int i = 0; i < 6; i ++) {
      std::cout << __half2float(h_output[i]) << std::endl;
    }
    float avg_cost = cost / (1.0f * repeats);
    std::cout << "avg cost: " << avg_cost << std::endl;
    hipEventDestroy(start);
    hipEventDestroy(stop);
    hipFree(input);
    hipFree(output);
    
    return 0;
}
	.text
	.file	"main.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z27__device_stub__swish_kernelI6__halfEviPKT_PS1_S1_ # -- Begin function _Z27__device_stub__swish_kernelI6__halfEviPKT_PS1_S1_
	.type	_Z27__device_stub__swish_kernelI6__halfEviPKT_PS1_S1_,@function
_Z27__device_stub__swish_kernelI6__halfEviPKT_PS1_S1_: # @_Z27__device_stub__swish_kernelI6__halfEviPKT_PS1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	10(%rsp), %rax
	movw	%cx, (%rax)
	leaq	12(%rsp), %rcx
	movl	%edi, (%rcx)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rcx, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rax, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12swish_kernelI6__halfEviPKT_PS1_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__swish_kernelI6__halfEviPKT_PS1_S1_, .Lfunc_end0-_Z27__device_stub__swish_kernelI6__halfEviPKT_PS1_S1_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294968080, %r14               # imm = 0x100000310
	movl	$1605632, %edi                  # imm = 0x188000
	callq	_Znam
	movq	%rax, %r15
	movl	$1605632, %edi                  # imm = 0x188000
	callq	_Znam
	movq	%rax, %rbx
	movw	$17664, (%r15)                  # imm = 0x4500
	movl	$2, %edi
	callq	hipSetDevice
	leaq	8(%rsp), %rdi
	callq	hipStreamCreate
	leaq	48(%rsp), %rdi
	callq	hipEventCreate
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	leaq	32(%rsp), %rdi
	movl	$1605632, %esi                  # imm = 0x188000
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$1605632, %esi                  # imm = 0x188000
	callq	hipMalloc
	movl	$5, %ebp
	leaq	240(%r14), %r12
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movq	32(%rsp), %rdi
	movq	8(%rsp), %r8
	movl	$1605632, %edx                  # imm = 0x188000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	8(%rsp), %r9
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_3
# %bb.2:                                #   in Loop: Header=BB1_1 Depth=1
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	$802816, %edi                   # imm = 0xC4000
	movl	$15360, %ecx                    # imm = 0x3C00
	callq	_Z27__device_stub__swish_kernelI6__halfEviPKT_PS1_S1_
.LBB1_3:                                #   in Loop: Header=BB1_1 Depth=1
	movq	24(%rsp), %rsi
	movq	8(%rsp), %r8
	movl	$1605632, %edx                  # imm = 0x188000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpyAsync
	decl	%ebp
	jne	.LBB1_1
# %bb.4:
	movq	8(%rsp), %rdi
	callq	hipStreamSynchronize
	movq	32(%rsp), %rdi
	movq	8(%rsp), %r8
	movl	$1605632, %edx                  # imm = 0x188000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	48(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	hipEventRecord
	movq	8(%rsp), %r9
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	$802816, %edi                   # imm = 0xC4000
	movl	$15360, %ecx                    # imm = 0x3C00
	callq	_Z27__device_stub__swish_kernelI6__halfEviPKT_PS1_S1_
.LBB1_6:
	movq	40(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	hipEventRecord
	movq	40(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	60(%rsp), %r14
	movl	$0, (%r14)
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	movd	(%r14), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movd	%xmm0, 20(%rsp)                 # 4-byte Folded Spill
	movq	24(%rsp), %rsi
	movq	8(%rsp), %r8
	movl	$1605632, %edx                  # imm = 0x188000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movq	8(%rsp), %rdi
	callq	hipStreamSynchronize
	xorl	%r15d, %r15d
.LBB1_7:                                # =>This Inner Loop Header: Depth=1
	pinsrw	$0, (%rbx,%r15,2), %xmm0
	callq	__extendhfsf2@PLT
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r15
	cmpq	$6, %r15
	jne	.LBB1_7
# %bb.8:
	pxor	%xmm0, %xmm0
	movss	20(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm1
	movss	%xmm1, 20(%rsp)                 # 4-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	20(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	48(%rsp), %rdi
	callq	hipEventDestroy
	movq	40(%rsp), %rdi
	callq	hipEventDestroy
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12swish_kernelI6__halfEviPKT_PS1_S1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12swish_kernelI6__halfEviPKT_PS1_S1_,@object # @_Z12swish_kernelI6__halfEviPKT_PS1_S1_
	.section	.rodata,"a",@progbits
	.globl	_Z12swish_kernelI6__halfEviPKT_PS1_S1_
	.p2align	3, 0x0
_Z12swish_kernelI6__halfEviPKT_PS1_S1_:
	.quad	_Z27__device_stub__swish_kernelI6__halfEviPKT_PS1_S1_
	.size	_Z12swish_kernelI6__halfEviPKT_PS1_S1_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"avg cost: "
	.size	.L.str, 11

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12swish_kernelI6__halfEviPKT_PS1_S1_"
	.size	.L__unnamed_1, 39

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__swish_kernelI6__halfEviPKT_PS1_S1_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12swish_kernelI6__halfEviPKT_PS1_S1_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12swish_kernelI6__halfEviPKT_PS1_S1_ ; -- Begin function _Z12swish_kernelI6__halfEviPKT_PS1_S1_
	.globl	_Z12swish_kernelI6__halfEviPKT_PS1_S1_
	.p2align	8
	.type	_Z12swish_kernelI6__halfEviPKT_PS1_S1_,@function
_Z12swish_kernelI6__halfEviPKT_PS1_S1_: ; @_Z12swish_kernelI6__halfEviPKT_PS1_S1_
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12swish_kernelI6__halfEviPKT_PS1_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12swish_kernelI6__halfEviPKT_PS1_S1_, .Lfunc_end0-_Z12swish_kernelI6__halfEviPKT_PS1_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           2
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12swish_kernelI6__halfEviPKT_PS1_S1_
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z12swish_kernelI6__halfEviPKT_PS1_S1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
