#include<bits/stdc++.h>
using namespace std;



__global__ void MatrixMulKernel(int *M,int *N,int *P,int Tile_Width,int Width){
	__shared__ double ds_M[32][32];
	__shared__ double ds_N[32][32]; 
	
	int bx=blockIdx.x;
	int by=blockIdx.y;
	int tx=threadIdx.x;
	int ty=threadIdx.y;
	int Row=by*blockDim.y+ty;
	int Col=bx*blockDim.x+tx;

    
	int Pvalue=0;
	for(int p=0;p<Width/Tile_Width;p++){
		ds_M[ty][tx]=M[Row*Width+p*Tile_Width+tx];
		ds_N[ty][tx]=N[(p*Tile_Width+ty)*Width+Col];
		__syncthreads();
	for(int i=0;i<Tile_Width;i++)
		Pvalue+=ds_M[ty][i]*ds_N[i][tx];//partial dot product
	__syncthreads();
	}
    
	P[Row*Width+Col]=Pvalue;//final answer
  
}

__global__ void MatrixMulKernel2(int *M,int *N,int *P,int Width){

    int Row=(blockIdx.y*blockDim.y)+threadIdx.y;//row number
    int Col=(blockIdx.x*blockDim.x)+threadIdx.x;//column number
    
    if((Row<Width)&&(Col<Width)){
        float Pvalue=0;
        
        for(int k=0;k<Width;k++){
            Pvalue+=M[Row*Width+k]*N[k*Width+Col];
        }
        P[Row*Width+Col]=Pvalue;//final answer
    }
}

int main(int argc, char** argv){
        ifstream infile(argv[1]);
        int *arr1_h,*arr1_d,*arr2_d,*arr3_d,*degree_h;
        int a,b,bd,gd,tile_width,f=0;
        long long int vertices,edges,size,original_vertices;
        bd=32;
        tile_width=bd;
        while(infile >> a >> b){
        if(f==0){
            vertices=a;
            original_vertices=a;
            edges=b;
            if(vertices<tile_width){
                vertices=tile_width;
            }
            else{
                long long int temp=tile_width;
                while(vertices>temp){
                    temp=temp*2;
                }
                vertices=temp;
            }
            size=(vertices*vertices)*sizeof(int);
            arr1_h=new int[vertices*vertices];
            degree_h=new int[vertices];
            for (long long int i = 0; i < vertices; ++i)
            {
                degree_h[i]=0;
            }
            for(long long int i=0;i<vertices;i++){
                for(long long int j=0;j<vertices;j++){
                    arr1_h[i*vertices+j]=0;
                }
            }
            f=1;
        }
        else{
            arr1_h[a*vertices+b]=1;
            arr1_h[b*vertices+a]=1;
            degree_h[a]++;
            degree_h[b]++;
        }
    }
        cudaMalloc(&arr1_d,size);
        cudaMalloc(&arr2_d,size);
        cudaMalloc(&arr3_d,size);
        cudaMemcpy(arr1_d,arr1_h,size,cudaMemcpyHostToDevice);

            gd=vertices/bd;
            dim3 grid(gd,gd);
            dim3 block(bd,bd);
            MatrixMulKernel<<< grid,block >>>(arr1_d,arr1_d,arr2_d,tile_width,vertices);

            MatrixMulKernel<<< grid,block >>>(arr2_d,arr1_d,arr3_d,tile_width,vertices);
        
        
        cudaMemcpy(arr1_h,arr3_d,size,cudaMemcpyDeviceToHost);
        float cc=0;
        for(int i=0;i<vertices;i++){
        if(degree_h[i]>=2){
            cc=cc+((float(arr1_h[i*vertices+i]/2))/((degree_h[i]*(degree_h[i]-1))/2));
        }
    }
    cc=cc/original_vertices;
    cout<<cc<<endl;
    

    return 0;
}

	.file	"tmpxft_00248fa3_00000000-6_parallel_matmul.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB10828:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE10828:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z41__device_stub__Z15MatrixMulKernelPiS_S_iiPiS_S_ii
	.type	_Z41__device_stub__Z15MatrixMulKernelPiS_S_iiPiS_S_ii, @function
_Z41__device_stub__Z15MatrixMulKernelPiS_S_iiPiS_S_ii:
.LFB10850:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15MatrixMulKernelPiS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10850:
	.size	_Z41__device_stub__Z15MatrixMulKernelPiS_S_iiPiS_S_ii, .-_Z41__device_stub__Z15MatrixMulKernelPiS_S_iiPiS_S_ii
	.globl	_Z15MatrixMulKernelPiS_S_ii
	.type	_Z15MatrixMulKernelPiS_S_ii, @function
_Z15MatrixMulKernelPiS_S_ii:
.LFB10851:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z15MatrixMulKernelPiS_S_iiPiS_S_ii
	.cfi_endproc
.LFE10851:
	.size	_Z15MatrixMulKernelPiS_S_ii, .-_Z15MatrixMulKernelPiS_S_ii
	.globl	_Z41__device_stub__Z16MatrixMulKernel2PiS_S_iPiS_S_i
	.type	_Z41__device_stub__Z16MatrixMulKernel2PiS_S_iPiS_S_i, @function
_Z41__device_stub__Z16MatrixMulKernel2PiS_S_iPiS_S_i:
.LFB10852:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16MatrixMulKernel2PiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10852:
	.size	_Z41__device_stub__Z16MatrixMulKernel2PiS_S_iPiS_S_i, .-_Z41__device_stub__Z16MatrixMulKernel2PiS_S_iPiS_S_i
	.globl	_Z16MatrixMulKernel2PiS_S_i
	.type	_Z16MatrixMulKernel2PiS_S_i, @function
_Z16MatrixMulKernel2PiS_S_i:
.LFB10853:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z16MatrixMulKernel2PiS_S_iPiS_S_i
	.cfi_endproc
.LFE10853:
	.size	_Z16MatrixMulKernel2PiS_S_i, .-_Z16MatrixMulKernel2PiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z16MatrixMulKernel2PiS_S_i"
.LC1:
	.string	"_Z15MatrixMulKernelPiS_S_ii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB10855:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z16MatrixMulKernel2PiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15MatrixMulKernelPiS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE10855:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB10825:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA10825
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$8, %edx
	movabsq	$2305843009213693950, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$616, %rsp
	.cfi_def_cfa_offset 672
	movq	8(%rsi), %rsi
	movq	%fs:40, %rax
	movq	%rax, 600(%rsp)
	xorl	%eax, %eax
	leaq	80(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
.LEHB0:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE0:
.L16:
	movq	8(%rsp), %rdi
	leaq	24(%rsp), %rsi
.LEHB1:
	call	_ZNSirsERi@PLT
	movq	%rax, %rdi
	leaq	28(%rsp), %rsi
	call	_ZNSirsERi@PLT
	movq	(%rax), %rdx
	movq	-24(%rdx), %rdx
	testb	$5, 32(%rax,%rdx)
	jne	.L42
	testl	%r13d, %r13d
	movslq	24(%rsp), %rax
	jne	.L17
	movq	%rax, %r14
	movl	$32, %ebx
	cmpq	$31, %rax
	jle	.L18
.L19:
	cmpq	%rax, %rbx
	jge	.L18
	addq	%rbx, %rbx
	jmp	.L19
.L18:
	movq	%rbx, %rax
	imulq	%rbx, %rax
	leaq	0(,%rax,4), %rdx
	movq	%rdx, (%rsp)
	cmpq	%r15, %rax
	jg	.L21
	movq	%rdx, %rdi
	call	_Znam@PLT
	leaq	0(,%rbx,4), %r13
	movq	%rax, %rbp
	movq	%r13, %rdi
	call	_Znam@PLT
	movq	%rax, %r12
	movq	%r13, %rcx
	xorl	%eax, %eax
	movq	%rbp, %rsi
	movq	%r12, %rdi
	xorl	%edx, %edx
	rep stosb
	jmp	.L24
.L21:
	movq	600(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L39
	call	__cxa_throw_bad_array_new_length@PLT
.L24:
	movq	%rsi, %rdi
	movq	%r13, %rcx
	incq	%rdx
	rep stosb
	movq	%rdi, %rsi
	cmpq	%rdx, %rbx
	jne	.L24
	jmp	.L25
.L17:
	movq	%rax, %rcx
	movslq	28(%rsp), %rdx
	incl	(%r12,%rax,4)
	imulq	%rbx, %rcx
	incl	(%r12,%rdx,4)
	addq	%rdx, %rcx
	movl	$1, 0(%rbp,%rcx,4)
	movq	%rdx, %rcx
	imulq	%rbx, %rcx
	addq	%rax, %rcx
	movl	$1, 0(%rbp,%rcx,4)
.L25:
	movl	$1, %r13d
	jmp	.L16
.L42:
	movq	(%rsp), %rsi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdx
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	movq	%rbx, %rax
	movl	$32, %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cqto
	movl	$1, %esi
	movl	$1, 64(%rsp)
	idivq	%rcx
	movl	$1, 76(%rsp)
	movabsq	$137438953504, %rdx
	movl	$1, %ecx
	movq	%rdx, 68(%rsp)
	movl	%eax, 56(%rsp)
	movl	%eax, 60(%rsp)
	movq	56(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	movq	32(%rsp), %rdi
	movq	40(%rsp), %rdx
	movl	%ebx, %r8d
	movl	$32, %ecx
	movq	%rdi, %rsi
	call	_Z41__device_stub__Z15MatrixMulKernelPiS_S_iiPiS_S_ii
.L27:
	movl	76(%rsp), %ecx
	movq	68(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	56(%rsp), %rdi
	movl	64(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	movq	48(%rsp), %rdx
	testl	%eax, %eax
	jne	.L28
	movq	32(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	%ebx, %r8d
	movl	$32, %ecx
	call	_Z41__device_stub__Z15MatrixMulKernelPiS_S_iiPiS_S_ii
.L28:
	movq	(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	leaq	4(,%rbx,4), %rsi
	xorl	%ecx, %ecx
	xorps	%xmm0, %xmm0
	movl	$2, %edi
.L29:
	cmpq	%rcx, %rbx
	jle	.L43
	movl	(%r12,%rcx,4), %r8d
	cmpl	$1, %r8d
	jle	.L30
	movl	0(%rbp), %eax
	cltd
	idivl	%edi
	cvtsi2ssl	%eax, %xmm1
	leal	-1(%r8), %eax
	imull	%r8d, %eax
	sarl	%eax
	cvtsi2ssl	%eax, %xmm2
	divss	%xmm2, %xmm1
	addss	%xmm1, %xmm0
.L30:
	incq	%rcx
	addq	%rsi, %rbp
	jmp	.L29
.L43:
	cvtsi2ssq	%r14, %xmm1
	leaq	_ZSt4cout(%rip), %rdi
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.LEHE1:
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	600(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	jmp	.L39
.L36:
	endbr64
	movq	%rax, %rbx
.L32:
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	600(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L39
	movq	%rbx, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L39:
	call	__stack_chk_fail@PLT
.L34:
	addq	$616, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10825:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA10825:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE10825-.LLSDACSB10825
.LLSDACSB10825:
	.uleb128 .LEHB0-.LFB10825
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB10825
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L36-.LFB10825
	.uleb128 0
	.uleb128 .LEHB2-.LFB10825
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE10825:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<bits/stdc++.h>
using namespace std;



__global__ void MatrixMulKernel(int *M,int *N,int *P,int Tile_Width,int Width){
	__shared__ double ds_M[32][32];
	__shared__ double ds_N[32][32]; 
	
	int bx=blockIdx.x;
	int by=blockIdx.y;
	int tx=threadIdx.x;
	int ty=threadIdx.y;
	int Row=by*blockDim.y+ty;
	int Col=bx*blockDim.x+tx;

    
	int Pvalue=0;
	for(int p=0;p<Width/Tile_Width;p++){
		ds_M[ty][tx]=M[Row*Width+p*Tile_Width+tx];
		ds_N[ty][tx]=N[(p*Tile_Width+ty)*Width+Col];
		__syncthreads();
	for(int i=0;i<Tile_Width;i++)
		Pvalue+=ds_M[ty][i]*ds_N[i][tx];//partial dot product
	__syncthreads();
	}
    
	P[Row*Width+Col]=Pvalue;//final answer
  
}

__global__ void MatrixMulKernel2(int *M,int *N,int *P,int Width){

    int Row=(blockIdx.y*blockDim.y)+threadIdx.y;//row number
    int Col=(blockIdx.x*blockDim.x)+threadIdx.x;//column number
    
    if((Row<Width)&&(Col<Width)){
        float Pvalue=0;
        
        for(int k=0;k<Width;k++){
            Pvalue+=M[Row*Width+k]*N[k*Width+Col];
        }
        P[Row*Width+Col]=Pvalue;//final answer
    }
}

int main(int argc, char** argv){
        ifstream infile(argv[1]);
        int *arr1_h,*arr1_d,*arr2_d,*arr3_d,*degree_h;
        int a,b,bd,gd,tile_width,f=0;
        long long int vertices,edges,size,original_vertices;
        bd=32;
        tile_width=bd;
        while(infile >> a >> b){
        if(f==0){
            vertices=a;
            original_vertices=a;
            edges=b;
            if(vertices<tile_width){
                vertices=tile_width;
            }
            else{
                long long int temp=tile_width;
                while(vertices>temp){
                    temp=temp*2;
                }
                vertices=temp;
            }
            size=(vertices*vertices)*sizeof(int);
            arr1_h=new int[vertices*vertices];
            degree_h=new int[vertices];
            for (long long int i = 0; i < vertices; ++i)
            {
                degree_h[i]=0;
            }
            for(long long int i=0;i<vertices;i++){
                for(long long int j=0;j<vertices;j++){
                    arr1_h[i*vertices+j]=0;
                }
            }
            f=1;
        }
        else{
            arr1_h[a*vertices+b]=1;
            arr1_h[b*vertices+a]=1;
            degree_h[a]++;
            degree_h[b]++;
        }
    }
        hipMalloc(&arr1_d,size);
        hipMalloc(&arr2_d,size);
        hipMalloc(&arr3_d,size);
        hipMemcpy(arr1_d,arr1_h,size,hipMemcpyHostToDevice);

            gd=vertices/bd;
            dim3 grid(gd,gd);
            dim3 block(bd,bd);
            MatrixMulKernel<<< grid,block >>>(arr1_d,arr1_d,arr2_d,tile_width,vertices);

            MatrixMulKernel<<< grid,block >>>(arr2_d,arr1_d,arr3_d,tile_width,vertices);
        
        
        hipMemcpy(arr1_h,arr3_d,size,hipMemcpyDeviceToHost);
        float cc=0;
        for(int i=0;i<vertices;i++){
        if(degree_h[i]>=2){
            cc=cc+((float(arr1_h[i*vertices+i]/2))/((degree_h[i]*(degree_h[i]-1))/2));
        }
    }
    cc=cc/original_vertices;
    cout<<cc<<endl;
    

    return 0;
}

	.text
	.file	"parallel_matmul.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z30__device_stub__MatrixMulKernelPiS_S_ii # -- Begin function _Z30__device_stub__MatrixMulKernelPiS_S_ii
	.type	_Z30__device_stub__MatrixMulKernelPiS_S_ii,@function
_Z30__device_stub__MatrixMulKernelPiS_S_ii: # @_Z30__device_stub__MatrixMulKernelPiS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15MatrixMulKernelPiS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__MatrixMulKernelPiS_S_ii, .Lfunc_end0-_Z30__device_stub__MatrixMulKernelPiS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__MatrixMulKernel2PiS_S_i # -- Begin function _Z31__device_stub__MatrixMulKernel2PiS_S_i
	.type	_Z31__device_stub__MatrixMulKernel2PiS_S_i,@function
_Z31__device_stub__MatrixMulKernel2PiS_S_i: # @_Z31__device_stub__MatrixMulKernel2PiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16MatrixMulKernel2PiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__MatrixMulKernel2PiS_S_i, .Lfunc_end1-_Z31__device_stub__MatrixMulKernel2PiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$584, %rsp                      # imm = 0x248
	.cfi_def_cfa_offset 640
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	8(%rsi), %rsi
	leaq	64(%rsp), %rdi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
	movb	$1, %r12b
	movl	$1, %r13d
                                        # implicit-def: $rax
                                        # kill: killed $rax
                                        # implicit-def: $rax
                                        # kill: killed $rax
                                        # implicit-def: $rbx
                                        # implicit-def: $r15
                                        # implicit-def: $r14
.LBB2_1:                                # %.loopexit
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_7 Depth 2
.Ltmp0:
	leaq	64(%rsp), %rdi
	leaq	12(%rsp), %rsi
	callq	_ZNSirsERi
.Ltmp1:
# %bb.2:                                #   in Loop: Header=BB2_1 Depth=1
.Ltmp2:
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZNSirsERi
.Ltmp3:
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	testb	$5, 32(%rax,%rcx)
	jne	.LBB2_16
# %bb.4:                                #   in Loop: Header=BB2_1 Depth=1
	movslq	12(%rsp), %rbp
	testb	$1, %r12b
	jne	.LBB2_5
# %bb.15:                               #   in Loop: Header=BB2_1 Depth=1
	imulq	%rbx, %rbp
	movslq	8(%rsp), %rax
	addq	%rax, %rbp
	movl	%r13d, (%r14,%rbp,4)
	imulq	%rbx, %rax
	movslq	12(%rsp), %rcx
	addq	%rcx, %rax
	movl	%r13d, (%r14,%rax,4)
	incl	(%r15,%rcx,4)
	movslq	8(%rsp), %rax
	incl	(%r15,%rax,4)
	xorl	%r12d, %r12d
	jmp	.LBB2_1
.LBB2_5:                                #   in Loop: Header=BB2_1 Depth=1
	movl	$32, %ebx
	cmpl	$32, %ebp
	jl	.LBB2_8
# %bb.6:                                # %.preheader128.preheader
                                        #   in Loop: Header=BB2_1 Depth=1
	movl	$32, %eax
.LBB2_7:                                # %.preheader128
                                        #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%rax, %rbx
	addq	%rax, %rax
	cmpq	%rbp, %rbx
	jl	.LBB2_7
.LBB2_8:                                # %.loopexit129
                                        #   in Loop: Header=BB2_1 Depth=1
	movq	%rbx, %rax
	imulq	%rbx, %rax
	leaq	(,%rax,4), %rcx
	shrq	$62, %rax
	negq	%rax
	movl	$0, %edi
	sbbq	%rdi, %rdi
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	orq	%rcx, %rdi
.Ltmp34:
	callq	_Znam
.Ltmp35:
# %bb.9:                                #   in Loop: Header=BB2_1 Depth=1
	movq	%rax, %r14
	leaq	(,%rbx,4), %rdi
	movabsq	$4611686018427387903, %rax      # imm = 0x3FFFFFFFFFFFFFFF
	cmpq	%rax, %rbx
	movq	%rdi, 56(%rsp)                  # 8-byte Spill
	movq	$-1, %rax
	cmovaq	%rax, %rdi
.Ltmp36:
	callq	_Znam
.Ltmp37:
# %bb.10:                               # %.preheader127
                                        #   in Loop: Header=BB2_1 Depth=1
	movq	%rax, %r15
	xorl	%r12d, %r12d
	movq	%rbp, 24(%rsp)                  # 8-byte Spill
	testq	%rbx, %rbx
	jle	.LBB2_1
# %bb.11:                               # %.preheader125.preheader
                                        #   in Loop: Header=BB2_1 Depth=1
	xorl	%r12d, %r12d
	movq	%r15, %rdi
	xorl	%esi, %esi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	callq	memset@PLT
	movq	%r14, %rdi
	xorl	%esi, %esi
	movq	32(%rsp), %rdx                  # 8-byte Reload
	callq	memset@PLT
	movq	%rbp, 24(%rsp)                  # 8-byte Spill
	jmp	.LBB2_1
.LBB2_16:
.Ltmp5:
	leaq	16(%rsp), %rdi
	movq	32(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rsi
	callq	hipMalloc
.Ltmp6:
# %bb.17:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit
.Ltmp7:
	leaq	48(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
.Ltmp8:
# %bb.18:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit115
.Ltmp9:
	leaq	40(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
.Ltmp10:
# %bb.19:                               # %_ZL9hipMallocIiE10hipError_tPPT_m.exit116
	movq	16(%rsp), %rdi
.Ltmp11:
	movq	%r14, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp12:
# %bb.20:
	leaq	31(%rbx), %r12
	testq	%rbx, %rbx
	cmovnsq	%rbx, %r12
	shrq	$5, %r12
	movl	%r12d, %eax
	shlq	$32, %r12
	orq	%rax, %r12
.Ltmp14:
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movq	%r12, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp15:
# %bb.21:
	testl	%eax, %eax
	jne	.LBB2_23
# %bb.22:
	movq	16(%rsp), %rdi
	movq	48(%rsp), %rdx
.Ltmp16:
	movq	%rdi, %rsi
	movl	$32, %ecx
	movl	%ebx, %r8d
	callq	_Z30__device_stub__MatrixMulKernelPiS_S_ii
.Ltmp17:
.LBB2_23:
.Ltmp18:
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movq	%r12, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp19:
# %bb.24:
	testl	%eax, %eax
	jne	.LBB2_26
# %bb.25:
	movq	48(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	40(%rsp), %rdx
.Ltmp20:
	movl	$32, %ecx
	movl	%ebx, %r8d
	callq	_Z30__device_stub__MatrixMulKernelPiS_S_ii
.Ltmp21:
.LBB2_26:
	movq	40(%rsp), %rsi
.Ltmp22:
	movq	%r14, %rdi
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp23:
# %bb.27:                               # %.preheader
	testq	%rbx, %rbx
	jle	.LBB2_28
# %bb.34:                               # %.lr.ph142
	leaq	4(,%rbx,4), %rax
	xorps	%xmm0, %xmm0
	xorl	%ecx, %ecx
.LBB2_35:                               # =>This Inner Loop Header: Depth=1
	movl	(%r15,%rcx,4), %edx
	cmpl	$2, %edx
	jl	.LBB2_37
# %bb.36:                               #   in Loop: Header=BB2_35 Depth=1
	movl	(%r14), %esi
	movl	%esi, %edi
	shrl	$31, %edi
	addl	%esi, %edi
	sarl	%edi
	xorps	%xmm1, %xmm1
	cvtsi2ss	%edi, %xmm1
	leal	-1(%rdx), %esi
	imull	%edx, %esi
	movl	%esi, %edx
	shrl	$31, %edx
	addl	%esi, %edx
	sarl	%edx
	xorps	%xmm2, %xmm2
	cvtsi2ss	%edx, %xmm2
	divss	%xmm2, %xmm1
	addss	%xmm1, %xmm0
.LBB2_37:                               #   in Loop: Header=BB2_35 Depth=1
	incq	%rcx
	addq	%rax, %r14
	cmpq	%rcx, %rbx
	jne	.LBB2_35
	jmp	.LBB2_29
.LBB2_28:
	xorps	%xmm0, %xmm0
.LBB2_29:                               # %._crit_edge143
	xorps	%xmm1, %xmm1
	cvtsi2ssq	24(%rsp), %xmm1         # 8-byte Folded Reload
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
.Ltmp25:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp26:
# %bb.30:                               # %_ZNSolsEf.exit
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp27:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp28:
# %bb.31:                               # %.noexc
.Ltmp29:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp30:
# %bb.32:                               # %.noexc117
.Ltmp31:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp32:
# %bb.33:                               # %_ZNSolsEPFRSoS_E.exit
	leaq	64(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	xorl	%eax, %eax
	addq	$584, %rsp                      # imm = 0x248
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_13:                               # %.loopexit130.loopexit.split-lp
	.cfi_def_cfa_offset 640
.Ltmp38:
	jmp	.LBB2_39
.LBB2_40:
.Ltmp24:
	jmp	.LBB2_39
.LBB2_38:
.Ltmp33:
	jmp	.LBB2_39
.LBB2_14:                               # %.loopexit.split-lp
.Ltmp13:
	jmp	.LBB2_39
.LBB2_12:                               # %.loopexit130.loopexit
.Ltmp4:
.LBB2_39:                               # %.loopexit130
	movq	%rax, %rbx
	leaq	64(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table2:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp3-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp3
	.uleb128 .Ltmp4-.Lfunc_begin0           #     jumps to .Ltmp4
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp34-.Lfunc_begin0          # >> Call Site 3 <<
	.uleb128 .Ltmp37-.Ltmp34                #   Call between .Ltmp34 and .Ltmp37
	.uleb128 .Ltmp38-.Lfunc_begin0          #     jumps to .Ltmp38
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp37-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp5-.Ltmp37                 #   Call between .Ltmp37 and .Ltmp5
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp5-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp12-.Ltmp5                 #   Call between .Ltmp5 and .Ltmp12
	.uleb128 .Ltmp13-.Lfunc_begin0          #     jumps to .Ltmp13
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp14-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp23-.Ltmp14                #   Call between .Ltmp14 and .Ltmp23
	.uleb128 .Ltmp24-.Lfunc_begin0          #     jumps to .Ltmp24
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp25-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp32-.Ltmp25                #   Call between .Ltmp25 and .Ltmp32
	.uleb128 .Ltmp33-.Lfunc_begin0          #     jumps to .Ltmp33
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp32-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Lfunc_end2-.Ltmp32            #   Call between .Ltmp32 and .Lfunc_end2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15MatrixMulKernelPiS_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16MatrixMulKernel2PiS_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15MatrixMulKernelPiS_S_ii,@object # @_Z15MatrixMulKernelPiS_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z15MatrixMulKernelPiS_S_ii
	.p2align	3, 0x0
_Z15MatrixMulKernelPiS_S_ii:
	.quad	_Z30__device_stub__MatrixMulKernelPiS_S_ii
	.size	_Z15MatrixMulKernelPiS_S_ii, 8

	.type	_Z16MatrixMulKernel2PiS_S_i,@object # @_Z16MatrixMulKernel2PiS_S_i
	.globl	_Z16MatrixMulKernel2PiS_S_i
	.p2align	3, 0x0
_Z16MatrixMulKernel2PiS_S_i:
	.quad	_Z31__device_stub__MatrixMulKernel2PiS_S_i
	.size	_Z16MatrixMulKernel2PiS_S_i, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z15MatrixMulKernelPiS_S_ii"
	.size	.L__unnamed_1, 28

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z16MatrixMulKernel2PiS_S_i"
	.size	.L__unnamed_2, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__MatrixMulKernelPiS_S_ii
	.addrsig_sym _Z31__device_stub__MatrixMulKernel2PiS_S_i
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z15MatrixMulKernelPiS_S_ii
	.addrsig_sym _Z16MatrixMulKernel2PiS_S_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15MatrixMulKernelPiS_S_ii ; -- Begin function _Z15MatrixMulKernelPiS_S_ii
	.globl	_Z15MatrixMulKernelPiS_S_ii
	.p2align	8
	.type	_Z15MatrixMulKernelPiS_S_ii,@function
_Z15MatrixMulKernelPiS_S_ii:            ; @_Z15MatrixMulKernelPiS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x2c
	v_and_b32_e32 v3, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s2, s10, 31
	s_ashr_i32 s13, s11, 31
	s_add_i32 s3, s10, s2
	s_add_i32 s16, s11, s13
	s_xor_b32 s3, s3, s2
	s_xor_b32 s16, s16, s13
	v_cvt_f32_u32_e32 v1, s3
	s_sub_i32 s12, 0, s3
	s_xor_b32 s2, s13, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v1
	s_mul_i32 s12, s12, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s12, s1, s12
	s_add_i32 s1, s1, s12
	s_lshr_b32 s12, s0, 16
	s_mul_hi_u32 s1, s16, s1
	v_mad_u64_u32 v[4:5], null, s15, s12, v[0:1]
	s_mul_i32 s17, s1, s3
	s_and_b32 s0, s0, 0xffff
	s_sub_i32 s13, s16, s17
	s_add_i32 s16, s1, 1
	s_sub_i32 s17, s13, s3
	s_cmp_ge_u32 s13, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s0, v[3:4]
	s_cselect_b32 s1, s16, s1
	s_cselect_b32 s12, s17, s13
	s_add_i32 s13, s1, 1
	s_cmp_ge_u32 s12, s3
	v_mul_lo_u32 v2, v4, s11
	s_cselect_b32 s0, s13, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s0, s0, s2
	s_sub_i32 s1, s0, s2
	s_mov_b32 s2, 0
	s_cmp_lt_i32 s1, 1
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph47
	v_lshlrev_b32_e32 v7, 3, v3
	s_cmp_gt_i32 s10, 0
	v_lshlrev_b32_e32 v4, 8, v0
	s_cselect_b32 s0, -1, 0
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v6, v2, v3
	v_or_b32_e32 v5, 0x2000, v7
	v_cndmask_b32_e64 v9, 0, 1, s0
	v_add_nc_u32_e32 v7, v4, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v8, v5, v4
	v_cmp_ne_u32_e64 s0, 1, v9
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_mul_i32 s3, s2, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, s3, v0
	v_add_nc_u32_e32 v9, s3, v6
	s_mov_b32 s3, s10
	v_mad_u64_u32 v[11:12], null, v10, s11, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v12, 31, v11
	v_add_co_u32 v9, vcc_lo, s4, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
	global_load_b32 v9, v[9:10], off
	global_load_b32 v10, v[11:12], off
	s_and_b32 vcc_lo, exec_lo, s0
	s_waitcnt vmcnt(1)
	v_cvt_f64_i32_e32 v[11:12], v9
	s_waitcnt vmcnt(0)
	v_cvt_f64_i32_e32 v[13:14], v10
	v_dual_mov_b32 v10, v4 :: v_dual_mov_b32 v9, v5
	ds_store_b64 v7, v[11:12]
	ds_store_b64 v8, v[13:14]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_4
.LBB0_3:                                ; %.lr.ph
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f64_i32_e32 v[11:12], v3
	ds_load_b64 v[13:14], v10
	ds_load_b64 v[15:16], v9
	v_add_nc_u32_e32 v10, 8, v10
	v_add_nc_u32_e32 v9, 0x100, v9
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s3, 0
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[11:12], v[13:14], v[15:16], v[11:12]
	v_cvt_i32_f64_e32 v3, v[11:12]
	s_cbranch_scc0 .LBB0_3
.LBB0_4:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, s1
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_6
.LBB0_5:
	v_mov_b32_e32 v3, 0
.LBB0_6:                                ; %Flow74
	v_add_nc_u32_e32 v0, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	global_store_b32 v[0:1], v3, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15MatrixMulKernelPiS_S_ii
		.amdhsa_group_segment_fixed_size 16384
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15MatrixMulKernelPiS_S_ii, .Lfunc_end0-_Z15MatrixMulKernelPiS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 624
; NumSgprs: 20
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 16384 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z16MatrixMulKernel2PiS_S_i ; -- Begin function _Z16MatrixMulKernel2PiS_S_i
	.globl	_Z16MatrixMulKernel2PiS_S_i
	.p2align	8
	.type	_Z16MatrixMulKernel2PiS_S_i,@function
_Z16MatrixMulKernel2PiS_S_i:            ; @_Z16MatrixMulKernel2PiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
	v_mad_u64_u32 v[0:1], null, s14, s3, v[4:5]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v1, v2, v0
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB1_7
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_lo_u32 v1, v2, s2
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB1_5
; %bb.2:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, v0
	s_mov_b32 s3, s2
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
.LBB1_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s3, 0
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_add_nc_u32_e32 v4, s2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b32 v5, v[2:3], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v5, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v5, v5
	v_add_f32_e32 v6, v6, v5
	s_cbranch_scc0 .LBB1_3
; %bb.4:                                ; %._crit_edge.loopexit
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f32_e32 v2, v6
	s_branch .LBB1_6
.LBB1_5:
	v_mov_b32_e32 v2, 0
.LBB1_6:                                ; %Flow
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB1_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16MatrixMulKernel2PiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z16MatrixMulKernel2PiS_S_i, .Lfunc_end1-_Z16MatrixMulKernel2PiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 356
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 16384
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15MatrixMulKernelPiS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z15MatrixMulKernelPiS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16MatrixMulKernel2PiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16MatrixMulKernel2PiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
