#include <stdio.h>

typedef struct {
    int n;
    int m;
    int tile;
    float* arr;
} Matrix;

// Thread block size
#define BLOCK_SIZE 16

void printa(float *A, int n, int m);
void generateMatrix(float *A, int n, int m, int num);
__global__ void MulKernel(const Matrix, const Matrix, Matrix);
__global__ void MulKernelShared(const Matrix, const Matrix, Matrix);

__device__ float GetElement(const Matrix A, int row, int col)
{
    return A.arr[row * A.tile + col];
}

__device__ void SetElement(Matrix A, int row, int col, float value)
{
    A.arr[row * A.tile + col] = value;
}

// Get the BLOCK_SIZExBLOCK_SIZE sub-matrix
__device__ Matrix GetSubMatrix(Matrix A, int row, int col)
{
    Matrix Asub;
    Asub.n    = BLOCK_SIZE;
    Asub.m   = BLOCK_SIZE;
    Asub.tile   = A.tile;
    Asub.arr = &A.arr[A.tile * BLOCK_SIZE * row + BLOCK_SIZE * col];
    return Asub;
}

// Matrix multiplication kernel called by MatrixMultiplication()
__global__ void MulKernel(Matrix A, Matrix B, Matrix C)
{
    float sum = 0;
    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;

    for (int e = 0; e < A.n; ++e)
        sum += A.arr[row * A.n + e] * B.arr[e * B.n + col];
    C.arr[row * C.n + col] = sum;
}

// Matrix dimensions are assumed to be multiples of BLOCK_SIZE
__host__ void MatrixMultiplication(const Matrix A, const Matrix B, Matrix C)
{
    // Load A and B to device memory
    Matrix d_A;
    d_A.n = A.n; d_A.m = A.m;
    size_t size = A.n * A.m * sizeof(float);
    cudaMalloc(&d_A.arr, size);
    cudaMemcpy(d_A.arr, A.arr, size,
               cudaMemcpyHostToDevice);
    Matrix d_B;
    d_B.n = B.n; d_B.m = B.m;
    size = B.n * B.m * sizeof(float);
    cudaMalloc(&d_B.arr, size);
    cudaMemcpy(d_B.arr, B.arr, size,
               cudaMemcpyHostToDevice);

    // Allocate C in device memory
    Matrix d_C;
    d_C.n = C.n; d_C.m = C.m;
    size = C.n * C.m * sizeof(float);
    cudaMalloc(&d_C.arr, size);

    dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
    dim3 dimGrid(B.n / dimBlock.x, A.m / dimBlock.y);
    MulKernel<<<dimGrid, dimBlock>>>(d_A, d_B, d_C);

    cudaMemcpy(C.arr, d_C.arr, size, cudaMemcpyDeviceToHost);

    // printa(C.arr, C.n, C.m);
    cudaFree(d_A.arr);
    cudaFree(d_B.arr);
    cudaFree(d_C.arr);
}

__global__ void MulKernelShared(Matrix A, Matrix B, Matrix C)
{
    // Use the block size of subarr of Matrix C.
    int blockRow = blockIdx.y;
    int blockCol = blockIdx.x;
    Matrix Csub = GetSubMatrix(C, blockRow, blockCol);

    // Thread row and column within Csub
    int row = threadIdx.y;
    int col = threadIdx.x;
    float sum = 0;
    for (int m = 0; m < (A.n / BLOCK_SIZE); ++m) {

        Matrix Asub = GetSubMatrix(A, blockRow, m);
        Matrix Bsub = GetSubMatrix(B, m, blockCol);

        // subarr A and B are stored in Shared memory
        __shared__ float As[BLOCK_SIZE][BLOCK_SIZE];
        __shared__ float Bs[BLOCK_SIZE][BLOCK_SIZE];
        As[row][col] = GetElement(Asub, row, col);
        Bs[row][col] = GetElement(Bsub, row, col);

        // Synchronize the storing data Asub and B sub into As and Bs.
        __syncthreads();
        for (int e = 0; e < BLOCK_SIZE; ++e)
            sum += As[row][e] * Bs[e][col];

        // Synchronize to block the new generation of Asub and Bsub during iteration.
        __syncthreads();
    }

    SetElement(Csub, row, col, sum);
}

__host__ void MatrixMultiplicationShared(const Matrix A, const Matrix B, Matrix C)
{
    Matrix d_A;
    d_A.n = d_A.tile = A.n; d_A.m = A.m;
    size_t size = A.n * A.m * sizeof(float);
    cudaMalloc(&d_A.arr, size);
    cudaMemcpy(d_A.arr, A.arr, size, cudaMemcpyHostToDevice);
    Matrix d_B;
    d_B.n = d_B.tile = B.n; d_B.m = B.m;
    size = B.n * B.m * sizeof(float);
    cudaMalloc(&d_B.arr, size);
    cudaMemcpy(d_B.arr, B.arr, size, cudaMemcpyHostToDevice);

    Matrix d_C;
    d_C.n = d_C.tile = C.n; d_C.m = C.m;
    size = C.n * C.m * sizeof(float);
    cudaMalloc(&d_C.arr, size);

    // dim3(uint3 x, uint3 y), specify demensions. default is 1.
    dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE); // 16 x 16 , dimBlock.x * dimBlock.y, total 256 threads
    // printf("dimBlock.x: %d, dim.y: %d\n", dimBlock.x, dimBlock.y);
    dim3 dimGrid(B.n / dimBlock.x, A.m / dimBlock.y);
    MulKernelShared<<<dimGrid, dimBlock>>>(d_A, d_B, d_C);

    cudaMemcpy(C.arr, d_C.arr, size, cudaMemcpyDeviceToHost);

    cudaFree(d_A.arr);
    cudaFree(d_B.arr);
    cudaFree(d_C.arr);
}

// print the float array
void printa(float *A, int n, int m){
    for (int i=0; i<n*m; i++){
        printf("%.f ", A[i]);
    }
    printf("\n");
}

// fill the number in float array
void generateMatrix(float *A, int n, int m, int num){
    for (int i=0; i<n*m; i++){
        A[i] = num;
    }
}

void generateMatrix2d(float **a, int row, int col, int num){
    a = (float **)calloc(row, sizeof(float*));
    for(int i = 0; i < row; i++)
        a[i] = (float *) calloc (col, sizeof(float));

    for(int i = 0; i < row; i++){
        for(int j = 0; j < col; j++){
            a[i][j] = num;
        }
    }
}

void MatrixMultiplicationCPU(float **a, float **b, float **c, int n, int m){
    for(int i = 0; i < n; ++i)
        for(int j = 0; j < m; ++j)
            for(int k = 0; k < n; ++k)
            {
                c[i][j] += a[i][k] * b[k][j];
            }
}

int main(int argc, char const *argv[]) {
    int n, w, m;
    float ms = 0; // milliseconds
    float **a, **b, **c;
    int num, row, col;
    size_t sizeA, sizeB, sizeC;
    float *Ae, *Be, *Ce;

    for (int i= 32384; i >= 128; i >>= 1){
        // n = m = w = i;
        n = m  = i;
        w = i / 2;
        printf("N x N = %d \n", m * n);
        cudaEvent_t start, stop;
        cudaEventCreate(&start);
        cudaEventCreate(&stop);
//
//        num = 2, row = n, col = w;
//
//        a = (float **)calloc(row, sizeof(float*));
//        for(int i = 0; i < row; i++)
//            a[i] = (float *) calloc (col, sizeof(float));
//
//        for(int i = 0; i < row; i++){
//            for(int j = 0; j < col; j++){
//                a[i][j] = num;
//            }
//        }
//
//        num = 3, row = w, col = m;
//        b = (float **)calloc(row, sizeof(float*));
//        for(int i = 0; i < row; i++)
//            b[i] = (float *) calloc (col, sizeof(float));
//
//        for(int i = 0; i < row; i++){
//            for(int j = 0; j < col; j++){
//                b[i][j] = num;
//            }
//        }
//
//        num = 0, row = n, col = m;
//        c = (float **)calloc(row, sizeof(float*));
//        for(int i = 0; i < row; i++)
//            c[i] = (float *) calloc (col, sizeof(float));
//
//        for(int i = 0; i < row; i++){
//            for(int j = 0; j < col; j++){
//                c[i][j] = num;
//            }
//        }
////    generateMatrix2d(a, n, w, 2);
////    generateMatrix2d(b, w, m, 3);
////    generateMatrix2d(a, n, m, 0);
//
//        cudaEventRecord(start);
//        // Matrix Multiplication on CPU, no parallel
//        for(int i = 0; i < n; ++i)
//            for(int j = 0; j < m; ++j)
//                for(int k = 0; k < n; ++k)
//                {
//                    c[i][j] += a[i][k] * b[k][j];
//                }
//
//        cudaEventRecord(stop);
//        cudaEventSynchronize(stop);
//        cudaEventElapsedTime(&ms, start, stop);
//        printf("CPU Multiplication time: %fn(ms)\n", ms);

        sizeA = m * w * sizeof(float);
        sizeB = w * n * sizeof(float);
        sizeC = m * n * sizeof(float);

        Ae = (float*) malloc(sizeA);
        Be = (float*) malloc(sizeB);
        Ce = (float*) malloc(sizeC);

        Matrix A = {n, n, w, Ae};
        Matrix B = {w, w, m, Be};
        Matrix C = {n, n, m, Ce};

        generateMatrix(A.arr, A.n, A.m, 2);
        generateMatrix(B.arr, B.n, B.m, 3);
        generateMatrix(C.arr, C.n, C.m, 0);

        cudaEventRecord(start);
        // Matrix Multiplication without shared memory
        MatrixMultiplication(B, A, C);

        cudaEventRecord(stop);
        cudaEventSynchronize(stop);
        cudaEventElapsedTime(&ms, start, stop);
        printf("Matrix Multiplication time: %fn(ms)\n", ms);

        cudaEventRecord(start);
        // Matrix Multiplication with shared memory
        MatrixMultiplicationShared(B, A, C);

        cudaEventRecord(stop);
        cudaEventSynchronize(stop);
        cudaEventElapsedTime(&ms, start, stop);
        printf("Matrix Multiplication shared time: %fn(ms)\n", ms);

        free(a); free(b); free(c); free(Ae); free(Be); free(Ce);
    }


    return 0;
}

	.file	"tmpxft_003b91cd_00000000-6_main.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2039:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2039:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10GetElement6Matrixii
	.type	_Z10GetElement6Matrixii, @function
_Z10GetElement6Matrixii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z10GetElement6Matrixii, .-_Z10GetElement6Matrixii
	.globl	_Z10SetElement6Matrixiif
	.type	_Z10SetElement6Matrixiif, @function
_Z10SetElement6Matrixiif:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z10SetElement6Matrixiif, .-_Z10SetElement6Matrixiif
	.globl	_Z12GetSubMatrix6Matrixii
	.type	_Z12GetSubMatrix6Matrixii, @function
_Z12GetSubMatrix6Matrixii:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z12GetSubMatrix6Matrixii, .-_Z12GetSubMatrix6Matrixii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%.f "
.LC1:
	.string	"\n"
	.text
	.globl	_Z6printaPfii
	.type	_Z6printaPfii, @function
_Z6printaPfii:
.LFB2032:
	.cfi_startproc
	endbr64
	imull	%edx, %esi
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC0(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%esi, %ebp
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 48
.L9:
	cmpl	%ebx, %ebp
	jle	.L13
	movq	%r13, %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%r12,%rbx,4), %xmm0
	call	__printf_chk@PLT
	incq	%rbx
	jmp	.L9
.L13:
	popq	%rdx
	.cfi_def_cfa_offset 40
	leaq	.LC1(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2032:
	.size	_Z6printaPfii, .-_Z6printaPfii
	.globl	_Z14generateMatrixPfiii
	.type	_Z14generateMatrixPfiii, @function
_Z14generateMatrixPfiii:
.LFB2033:
	.cfi_startproc
	endbr64
	imull	%edx, %esi
	xorl	%eax, %eax
.L15:
	cmpl	%eax, %esi
	jle	.L17
	cvtsi2ssl	%ecx, %xmm0
	movss	%xmm0, (%rdi,%rax,4)
	incq	%rax
	jmp	.L15
.L17:
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z14generateMatrixPfiii, .-_Z14generateMatrixPfiii
	.globl	_Z16generateMatrix2dPPfiii
	.type	_Z16generateMatrix2dPPfiii, @function
_Z16generateMatrix2dPPfiii:
.LFB2034:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z16generateMatrix2dPPfiii, .-_Z16generateMatrix2dPPfiii
	.globl	_Z23MatrixMultiplicationCPUPPfS0_S0_ii
	.type	_Z23MatrixMultiplicationCPUPPfS0_S0_ii, @function
_Z23MatrixMultiplicationCPUPPfS0_S0_ii:
.LFB2035:
	.cfi_startproc
	endbr64
	movq	%rsi, %r9
	movq	%rdx, %r10
	xorl	%eax, %eax
.L27:
	cmpl	%eax, %ecx
	jle	.L32
	xorl	%esi, %esi
	cmpl	%esi, %r8d
	jg	.L31
	incq	%rax
	jmp	.L27
.L32:
	ret
.L31:
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
.L22:
	movq	(%r10,%rax,8), %r11
	leaq	0(,%rsi,4), %rbx
	movq	(%rdi,%rax,8), %rbp
	xorl	%edx, %edx
	addq	%rbx, %r11
.L21:
	movq	(%r9,%rdx,8), %r14
	movss	(%r14,%rbx), %xmm0
	mulss	0(%rbp,%rdx,4), %xmm0
	incq	%rdx
	addss	(%r11), %xmm0
	movss	%xmm0, (%r11)
	cmpl	%edx, %ecx
	jg	.L21
	incq	%rsi
.L23:
	cmpl	%esi, %r8d
	jg	.L22
	incq	%rax
	cmpl	%eax, %ecx
	jle	.L33
	xorl	%esi, %esi
	jmp	.L23
.L33:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	_Z23MatrixMultiplicationCPUPPfS0_S0_ii, .-_Z23MatrixMultiplicationCPUPPfS0_S0_ii
	.globl	_Z37__device_stub__Z9MulKernel6MatrixS_S_R6MatrixS0_S0_
	.type	_Z37__device_stub__Z9MulKernel6MatrixS_S_R6MatrixS0_S0_, @function
_Z37__device_stub__Z9MulKernel6MatrixS_S_R6MatrixS0_S0_:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rdi, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 72(%rsp)
	leaq	16(%rsp), %rdi
	leaq	28(%rsp), %rsi
	movq	%rdx, 80(%rsp)
	movq	%rsp, %rdx
	movq	%rax, 16(%rsp)
	movl	$1, 24(%rsp)
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	pushq	8(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z9MulKernel6MatrixS_S_(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 128
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L34:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z37__device_stub__Z9MulKernel6MatrixS_S_R6MatrixS0_S0_, .-_Z37__device_stub__Z9MulKernel6MatrixS_S_R6MatrixS0_S0_
	.globl	_Z9MulKernel6MatrixS_S_
	.type	_Z9MulKernel6MatrixS_S_, @function
_Z9MulKernel6MatrixS_S_:
.LFB2062:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	64(%rsp), %rdx
	leaq	40(%rsp), %rsi
	leaq	16(%rsp), %rdi
	call	_Z37__device_stub__Z9MulKernel6MatrixS_S_R6MatrixS0_S0_
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2062:
	.size	_Z9MulKernel6MatrixS_S_, .-_Z9MulKernel6MatrixS_S_
	.globl	_Z20MatrixMultiplication6MatrixS_S_
	.type	_Z20MatrixMultiplication6MatrixS_S_, @function
_Z20MatrixMultiplication6MatrixS_S_:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	movl	244(%rsp), %r14d
	movl	240(%rsp), %r13d
	leaq	40(%rsp), %rdi
	movl	264(%rsp), %r12d
	movl	268(%rsp), %ebp
	movl	%r13d, 24(%rsp)
	imull	%r14d, %r13d
	movl	288(%rsp), %ebx
	movl	292(%rsp), %r15d
	movl	%r14d, 28(%rsp)
	shrl	$4, %r14d
	movslq	%r13d, %r13
	salq	$2, %r13
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	movq	256(%rsp), %rsi
	movq	40(%rsp), %rdi
	movq	%r13, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebp, 52(%rsp)
	imull	%r12d, %ebp
	leaq	64(%rsp), %rdi
	movl	%r12d, 48(%rsp)
	shrl	$4, %r12d
	movslq	%ebp, %rbp
	salq	$2, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movq	280(%rsp), %rsi
	movq	64(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebx, 72(%rsp)
	imull	%r15d, %ebx
	leaq	88(%rsp), %rdi
	movl	%r15d, 76(%rsp)
	movslq	%ebx, %rbx
	salq	$2, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movl	%r12d, 12(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r14d, 16(%rsp)
	movq	12(%rsp), %rdi
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	movq	40(%rsp), %rax
	movups	24(%rsp), %xmm0
	leaq	144(%rsp), %rdx
	leaq	120(%rsp), %rsi
	movups	48(%rsp), %xmm1
	movups	72(%rsp), %xmm2
	leaq	96(%rsp), %rdi
	movq	%rax, 112(%rsp)
	movq	64(%rsp), %rax
	movups	%xmm0, 96(%rsp)
	movq	%rax, 136(%rsp)
	movq	88(%rsp), %rax
	movups	%xmm1, 120(%rsp)
	movq	%rax, 160(%rsp)
	movups	%xmm2, 144(%rsp)
	call	_Z37__device_stub__Z9MulKernel6MatrixS_S_R6MatrixS0_S0_
.L41:
	movq	88(%rsp), %rsi
	movq	304(%rsp), %rdi
	movl	$2, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z20MatrixMultiplication6MatrixS_S_, .-_Z20MatrixMultiplication6MatrixS_S_
	.globl	_Z44__device_stub__Z15MulKernelShared6MatrixS_S_R6MatrixS0_S0_
	.type	_Z44__device_stub__Z15MulKernelShared6MatrixS_S_R6MatrixS0_S0_, @function
_Z44__device_stub__Z15MulKernelShared6MatrixS_S_R6MatrixS0_S0_:
.LFB2063:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rdi, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 72(%rsp)
	leaq	16(%rsp), %rdi
	leaq	28(%rsp), %rsi
	movq	%rdx, 80(%rsp)
	movq	%rsp, %rdx
	movq	%rax, 16(%rsp)
	movl	$1, 24(%rsp)
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	pushq	8(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z15MulKernelShared6MatrixS_S_(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 128
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L44:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L46
	call	__stack_chk_fail@PLT
.L46:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2063:
	.size	_Z44__device_stub__Z15MulKernelShared6MatrixS_S_R6MatrixS0_S0_, .-_Z44__device_stub__Z15MulKernelShared6MatrixS_S_R6MatrixS0_S0_
	.globl	_Z15MulKernelShared6MatrixS_S_
	.type	_Z15MulKernelShared6MatrixS_S_, @function
_Z15MulKernelShared6MatrixS_S_:
.LFB2064:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	64(%rsp), %rdx
	leaq	40(%rsp), %rsi
	leaq	16(%rsp), %rdi
	call	_Z44__device_stub__Z15MulKernelShared6MatrixS_S_R6MatrixS0_S0_
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2064:
	.size	_Z15MulKernelShared6MatrixS_S_, .-_Z15MulKernelShared6MatrixS_S_
	.globl	_Z26MatrixMultiplicationShared6MatrixS_S_
	.type	_Z26MatrixMultiplicationShared6MatrixS_S_, @function
_Z26MatrixMultiplicationShared6MatrixS_S_:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	movl	240(%rsp), %edx
	movl	244(%rsp), %r14d
	leaq	40(%rsp), %rdi
	movl	264(%rsp), %r13d
	movl	288(%rsp), %ebx
	movl	%edx, 32(%rsp)
	movl	268(%rsp), %r12d
	movl	%edx, 24(%rsp)
	imull	%r14d, %edx
	movl	292(%rsp), %r15d
	movl	%r14d, 28(%rsp)
	shrl	$4, %r14d
	movslq	%edx, %rbp
	salq	$2, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movq	256(%rsp), %rsi
	movq	40(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r12d, 52(%rsp)
	imull	%r13d, %r12d
	leaq	64(%rsp), %rdi
	movl	%r13d, 56(%rsp)
	movl	%r13d, 48(%rsp)
	shrl	$4, %r13d
	movslq	%r12d, %rbp
	salq	$2, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movq	280(%rsp), %rsi
	movq	64(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebx, 80(%rsp)
	leaq	88(%rsp), %rdi
	movl	%ebx, 72(%rsp)
	imull	%r15d, %ebx
	movl	%r15d, 76(%rsp)
	movslq	%ebx, %rbx
	salq	$2, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movl	%r13d, 12(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r14d, 16(%rsp)
	movq	12(%rsp), %rdi
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L51
	movq	40(%rsp), %rax
	movups	24(%rsp), %xmm0
	leaq	144(%rsp), %rdx
	leaq	120(%rsp), %rsi
	movups	48(%rsp), %xmm1
	movups	72(%rsp), %xmm2
	leaq	96(%rsp), %rdi
	movq	%rax, 112(%rsp)
	movq	64(%rsp), %rax
	movups	%xmm0, 96(%rsp)
	movq	%rax, 136(%rsp)
	movq	88(%rsp), %rax
	movups	%xmm1, 120(%rsp)
	movq	%rax, 160(%rsp)
	movups	%xmm2, 144(%rsp)
	call	_Z44__device_stub__Z15MulKernelShared6MatrixS_S_R6MatrixS0_S0_
.L51:
	movq	88(%rsp), %rsi
	movq	304(%rsp), %rdi
	movl	$2, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L52
	call	__stack_chk_fail@PLT
.L52:
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z26MatrixMultiplicationShared6MatrixS_S_, .-_Z26MatrixMultiplicationShared6MatrixS_S_
	.section	.rodata.str1.1
.LC3:
	.string	"N x N = %d \n"
.LC4:
	.string	"Matrix Multiplication time: %fn(ms)\n"
.LC5:
	.string	"Matrix Multiplication shared time: %fn(ms)\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$8, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	$32384, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	movl	$0x00000000, 12(%rsp)
.L55:
	movl	%ebp, %ebx
	sarl	%ebp
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movl	%ebx, %r12d
	movl	%ebp, %r13d
	xorl	%eax, %eax
	imull	%ebx, %r12d
	imull	%ebx, %r13d
	movl	%r12d, %edx
	call	__printf_chk@PLT
	movslq	%r13d, %r13
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	salq	$2, %r13
	leaq	24(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	%r13, %rdi
	call	malloc@PLT
	movq	%r13, %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movslq	%r12d, %rdi
	salq	$2, %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movl	%ebx, %edx
	movl	%ebx, %esi
	movl	$2, %ecx
	movq	%r14, %rdi
	movl	%ebx, 64(%rsp)
	movq	%rax, %r12
	movl	%ebx, 88(%rsp)
	movl	%ebp, 40(%rsp)
	call	_Z14generateMatrixPfiii
	movl	$3, %ecx
	movl	%ebp, %edx
	movl	%ebp, %esi
	movq	%r13, %rdi
	call	_Z14generateMatrixPfiii
	xorl	%ecx, %ecx
	movl	%ebx, %edx
	movl	%ebx, %esi
	movq	%r12, %rdi
	call	_Z14generateMatrixPfiii
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%ebx, 32(%rsp)
	subq	$80, %rsp
	.cfi_def_cfa_offset 256
	movl	%ebx, 116(%rsp)
	movl	%ebx, 160(%rsp)
	movl	%ebx, 164(%rsp)
	movl	%ebp, 136(%rsp)
	movl	%ebp, 140(%rsp)
	movq	%r13, 152(%rsp)
	movq	%r14, 128(%rsp)
	movq	%r12, 176(%rsp)
	movups	160(%rsp), %xmm1
	movups	112(%rsp), %xmm2
	movups	136(%rsp), %xmm3
	movq	%r12, 64(%rsp)
	movups	%xmm1, 48(%rsp)
	movups	%xmm2, 24(%rsp)
	movups	%xmm3, (%rsp)
	movq	%r14, 40(%rsp)
	movq	%r13, 16(%rsp)
	call	_Z20MatrixMultiplication6MatrixS_S_
	movq	104(%rsp), %rdi
	addq	$80, %rsp
	.cfi_def_cfa_offset 176
	xorl	%esi, %esi
	leaq	12(%rsp), %rbx
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	%rbx, %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	12(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	subq	$80, %rsp
	.cfi_def_cfa_offset 256
	movq	176(%rsp), %rax
	movups	160(%rsp), %xmm4
	movups	112(%rsp), %xmm5
	movups	136(%rsp), %xmm6
	movq	%rax, 64(%rsp)
	movq	128(%rsp), %rax
	movups	%xmm4, 48(%rsp)
	movq	%rax, 40(%rsp)
	movq	152(%rsp), %rax
	movups	%xmm5, 24(%rsp)
	movups	%xmm6, (%rsp)
	movq	%rax, 16(%rsp)
	call	_Z26MatrixMultiplicationShared6MatrixS_S_
	movq	104(%rsp), %rdi
	addq	$80, %rsp
	.cfi_def_cfa_offset 176
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	%rbx, %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	12(%rsp), %xmm0
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	free@PLT
	xorl	%edi, %edi
	call	free@PLT
	xorl	%edi, %edi
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	decl	%r15d
	jne	.L55
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L56
	call	__stack_chk_fail@PLT
.L56:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z15MulKernelShared6MatrixS_S_"
.LC7:
	.string	"_Z9MulKernel6MatrixS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2066:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15MulKernelShared6MatrixS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9MulKernel6MatrixS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2066:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>

typedef struct {
    int n;
    int m;
    int tile;
    float* arr;
} Matrix;

// Thread block size
#define BLOCK_SIZE 16

void printa(float *A, int n, int m);
void generateMatrix(float *A, int n, int m, int num);
__global__ void MulKernel(const Matrix, const Matrix, Matrix);
__global__ void MulKernelShared(const Matrix, const Matrix, Matrix);

__device__ float GetElement(const Matrix A, int row, int col)
{
    return A.arr[row * A.tile + col];
}

__device__ void SetElement(Matrix A, int row, int col, float value)
{
    A.arr[row * A.tile + col] = value;
}

// Get the BLOCK_SIZExBLOCK_SIZE sub-matrix
__device__ Matrix GetSubMatrix(Matrix A, int row, int col)
{
    Matrix Asub;
    Asub.n    = BLOCK_SIZE;
    Asub.m   = BLOCK_SIZE;
    Asub.tile   = A.tile;
    Asub.arr = &A.arr[A.tile * BLOCK_SIZE * row + BLOCK_SIZE * col];
    return Asub;
}

// Matrix multiplication kernel called by MatrixMultiplication()
__global__ void MulKernel(Matrix A, Matrix B, Matrix C)
{
    float sum = 0;
    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;

    for (int e = 0; e < A.n; ++e)
        sum += A.arr[row * A.n + e] * B.arr[e * B.n + col];
    C.arr[row * C.n + col] = sum;
}

// Matrix dimensions are assumed to be multiples of BLOCK_SIZE
__host__ void MatrixMultiplication(const Matrix A, const Matrix B, Matrix C)
{
    // Load A and B to device memory
    Matrix d_A;
    d_A.n = A.n; d_A.m = A.m;
    size_t size = A.n * A.m * sizeof(float);
    hipMalloc(&d_A.arr, size);
    hipMemcpy(d_A.arr, A.arr, size,
               hipMemcpyHostToDevice);
    Matrix d_B;
    d_B.n = B.n; d_B.m = B.m;
    size = B.n * B.m * sizeof(float);
    hipMalloc(&d_B.arr, size);
    hipMemcpy(d_B.arr, B.arr, size,
               hipMemcpyHostToDevice);

    // Allocate C in device memory
    Matrix d_C;
    d_C.n = C.n; d_C.m = C.m;
    size = C.n * C.m * sizeof(float);
    hipMalloc(&d_C.arr, size);

    dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
    dim3 dimGrid(B.n / dimBlock.x, A.m / dimBlock.y);
    MulKernel<<<dimGrid, dimBlock>>>(d_A, d_B, d_C);

    hipMemcpy(C.arr, d_C.arr, size, hipMemcpyDeviceToHost);

    // printa(C.arr, C.n, C.m);
    hipFree(d_A.arr);
    hipFree(d_B.arr);
    hipFree(d_C.arr);
}

__global__ void MulKernelShared(Matrix A, Matrix B, Matrix C)
{
    // Use the block size of subarr of Matrix C.
    int blockRow = blockIdx.y;
    int blockCol = blockIdx.x;
    Matrix Csub = GetSubMatrix(C, blockRow, blockCol);

    // Thread row and column within Csub
    int row = threadIdx.y;
    int col = threadIdx.x;
    float sum = 0;
    for (int m = 0; m < (A.n / BLOCK_SIZE); ++m) {

        Matrix Asub = GetSubMatrix(A, blockRow, m);
        Matrix Bsub = GetSubMatrix(B, m, blockCol);

        // subarr A and B are stored in Shared memory
        __shared__ float As[BLOCK_SIZE][BLOCK_SIZE];
        __shared__ float Bs[BLOCK_SIZE][BLOCK_SIZE];
        As[row][col] = GetElement(Asub, row, col);
        Bs[row][col] = GetElement(Bsub, row, col);

        // Synchronize the storing data Asub and B sub into As and Bs.
        __syncthreads();
        for (int e = 0; e < BLOCK_SIZE; ++e)
            sum += As[row][e] * Bs[e][col];

        // Synchronize to block the new generation of Asub and Bsub during iteration.
        __syncthreads();
    }

    SetElement(Csub, row, col, sum);
}

__host__ void MatrixMultiplicationShared(const Matrix A, const Matrix B, Matrix C)
{
    Matrix d_A;
    d_A.n = d_A.tile = A.n; d_A.m = A.m;
    size_t size = A.n * A.m * sizeof(float);
    hipMalloc(&d_A.arr, size);
    hipMemcpy(d_A.arr, A.arr, size, hipMemcpyHostToDevice);
    Matrix d_B;
    d_B.n = d_B.tile = B.n; d_B.m = B.m;
    size = B.n * B.m * sizeof(float);
    hipMalloc(&d_B.arr, size);
    hipMemcpy(d_B.arr, B.arr, size, hipMemcpyHostToDevice);

    Matrix d_C;
    d_C.n = d_C.tile = C.n; d_C.m = C.m;
    size = C.n * C.m * sizeof(float);
    hipMalloc(&d_C.arr, size);

    // dim3(uint3 x, uint3 y), specify demensions. default is 1.
    dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE); // 16 x 16 , dimBlock.x * dimBlock.y, total 256 threads
    // printf("dimBlock.x: %d, dim.y: %d\n", dimBlock.x, dimBlock.y);
    dim3 dimGrid(B.n / dimBlock.x, A.m / dimBlock.y);
    MulKernelShared<<<dimGrid, dimBlock>>>(d_A, d_B, d_C);

    hipMemcpy(C.arr, d_C.arr, size, hipMemcpyDeviceToHost);

    hipFree(d_A.arr);
    hipFree(d_B.arr);
    hipFree(d_C.arr);
}

// print the float array
void printa(float *A, int n, int m){
    for (int i=0; i<n*m; i++){
        printf("%.f ", A[i]);
    }
    printf("\n");
}

// fill the number in float array
void generateMatrix(float *A, int n, int m, int num){
    for (int i=0; i<n*m; i++){
        A[i] = num;
    }
}

void generateMatrix2d(float **a, int row, int col, int num){
    a = (float **)calloc(row, sizeof(float*));
    for(int i = 0; i < row; i++)
        a[i] = (float *) calloc (col, sizeof(float));

    for(int i = 0; i < row; i++){
        for(int j = 0; j < col; j++){
            a[i][j] = num;
        }
    }
}

void MatrixMultiplicationCPU(float **a, float **b, float **c, int n, int m){
    for(int i = 0; i < n; ++i)
        for(int j = 0; j < m; ++j)
            for(int k = 0; k < n; ++k)
            {
                c[i][j] += a[i][k] * b[k][j];
            }
}

int main(int argc, char const *argv[]) {
    int n, w, m;
    float ms = 0; // milliseconds
    float **a, **b, **c;
    int num, row, col;
    size_t sizeA, sizeB, sizeC;
    float *Ae, *Be, *Ce;

    for (int i= 32384; i >= 128; i >>= 1){
        // n = m = w = i;
        n = m  = i;
        w = i / 2;
        printf("N x N = %d \n", m * n);
        hipEvent_t start, stop;
        hipEventCreate(&start);
        hipEventCreate(&stop);
//
//        num = 2, row = n, col = w;
//
//        a = (float **)calloc(row, sizeof(float*));
//        for(int i = 0; i < row; i++)
//            a[i] = (float *) calloc (col, sizeof(float));
//
//        for(int i = 0; i < row; i++){
//            for(int j = 0; j < col; j++){
//                a[i][j] = num;
//            }
//        }
//
//        num = 3, row = w, col = m;
//        b = (float **)calloc(row, sizeof(float*));
//        for(int i = 0; i < row; i++)
//            b[i] = (float *) calloc (col, sizeof(float));
//
//        for(int i = 0; i < row; i++){
//            for(int j = 0; j < col; j++){
//                b[i][j] = num;
//            }
//        }
//
//        num = 0, row = n, col = m;
//        c = (float **)calloc(row, sizeof(float*));
//        for(int i = 0; i < row; i++)
//            c[i] = (float *) calloc (col, sizeof(float));
//
//        for(int i = 0; i < row; i++){
//            for(int j = 0; j < col; j++){
//                c[i][j] = num;
//            }
//        }
////    generateMatrix2d(a, n, w, 2);
////    generateMatrix2d(b, w, m, 3);
////    generateMatrix2d(a, n, m, 0);
//
//        cudaEventRecord(start);
//        // Matrix Multiplication on CPU, no parallel
//        for(int i = 0; i < n; ++i)
//            for(int j = 0; j < m; ++j)
//                for(int k = 0; k < n; ++k)
//                {
//                    c[i][j] += a[i][k] * b[k][j];
//                }
//
//        cudaEventRecord(stop);
//        cudaEventSynchronize(stop);
//        cudaEventElapsedTime(&ms, start, stop);
//        printf("CPU Multiplication time: %fn(ms)\n", ms);

        sizeA = m * w * sizeof(float);
        sizeB = w * n * sizeof(float);
        sizeC = m * n * sizeof(float);

        Ae = (float*) malloc(sizeA);
        Be = (float*) malloc(sizeB);
        Ce = (float*) malloc(sizeC);

        Matrix A = {n, n, w, Ae};
        Matrix B = {w, w, m, Be};
        Matrix C = {n, n, m, Ce};

        generateMatrix(A.arr, A.n, A.m, 2);
        generateMatrix(B.arr, B.n, B.m, 3);
        generateMatrix(C.arr, C.n, C.m, 0);

        hipEventRecord(start);
        // Matrix Multiplication without shared memory
        MatrixMultiplication(B, A, C);

        hipEventRecord(stop);
        hipEventSynchronize(stop);
        hipEventElapsedTime(&ms, start, stop);
        printf("Matrix Multiplication time: %fn(ms)\n", ms);

        hipEventRecord(start);
        // Matrix Multiplication with shared memory
        MatrixMultiplicationShared(B, A, C);

        hipEventRecord(stop);
        hipEventSynchronize(stop);
        hipEventElapsedTime(&ms, start, stop);
        printf("Matrix Multiplication shared time: %fn(ms)\n", ms);

        free(a); free(b); free(c); free(Ae); free(Be); free(Ce);
    }


    return 0;
}

	.text
	.file	"main.hip"
	.globl	_Z24__device_stub__MulKernel6MatrixS_S_ # -- Begin function _Z24__device_stub__MulKernel6MatrixS_S_
	.type	_Z24__device_stub__MulKernel6MatrixS_S_,@function
_Z24__device_stub__MulKernel6MatrixS_S_: # @_Z24__device_stub__MulKernel6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	128(%rsp), %rax
	leaq	48(%rsp), %rbx
	movq	%rax, (%rbx)
	leaq	152(%rsp), %rax
	movq	%rax, 8(%rbx)
	leaq	176(%rsp), %rax
	movq	%rax, 16(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9MulKernel6MatrixS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__MulKernel6MatrixS_S_, .Lfunc_end0-_Z24__device_stub__MulKernel6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z20MatrixMultiplication6MatrixS_S_ # -- Begin function _Z20MatrixMultiplication6MatrixS_S_
	.type	_Z20MatrixMultiplication6MatrixS_S_,@function
_Z20MatrixMultiplication6MatrixS_S_:    # @_Z20MatrixMultiplication6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$248, %rsp
	.cfi_def_cfa_offset 304
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	352(%rsp), %r13
	movl	304(%rsp), %eax
	movl	308(%rsp), %r14d
	leaq	72(%rsp), %rbx
	movl	%eax, -16(%rbx)
	movl	%r14d, -12(%rbx)
	imull	%r14d, %eax
	movslq	%eax, %r15
	shlq	$2, %r15
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	320(%rsp), %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	328(%rsp), %r12d
	movl	332(%rsp), %eax
	leaq	48(%rsp), %rbx
	movl	%r12d, -16(%rbx)
	movl	%eax, -12(%rbx)
	imull	%r12d, %eax
	movslq	%eax, %r15
	shlq	$2, %r15
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	344(%rsp), %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	(%r13), %eax
	movl	4(%r13), %ecx
	leaq	24(%rsp), %rdi
	movl	%eax, -16(%rdi)
	movl	%ecx, -12(%rdi)
	imull	%eax, %ecx
	movslq	%ecx, %rbx
	shlq	$2, %rbx
	movq	%rbx, %rsi
	callq	hipMalloc
	shrl	$4, %r12d
	shrl	$4, %r14d
	shlq	$32, %r14
	orq	%r12, %r14
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	72(%rsp), %rax
	leaq	128(%rsp), %rcx
	movq	%rax, 16(%rcx)
	movups	56(%rsp), %xmm0
	movaps	%xmm0, (%rcx)
	movq	48(%rsp), %rax
	leaq	160(%rsp), %rdx
	movq	%rax, 16(%rdx)
	movups	32(%rsp), %xmm0
	movaps	%xmm0, (%rdx)
	movq	24(%rsp), %rax
	leaq	192(%rsp), %rsi
	movq	%rax, 16(%rsi)
	movups	8(%rsp), %xmm0
	movaps	%xmm0, (%rsi)
	leaq	224(%rsp), %r14
	movq	%rcx, (%r14)
	movq	%rdx, 8(%r14)
	movq	%rsi, 16(%r14)
	leaq	112(%rsp), %r15
	leaq	96(%rsp), %r12
	leaq	88(%rsp), %r13
	leaq	80(%rsp), %rbp
	movq	%r15, %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	movq	%rbp, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r15), %rsi
	movl	8(%r15), %edx
	movq	(%r12), %rcx
	movl	8(%r12), %r8d
	movl	$_Z9MulKernel6MatrixS_S_, %edi
	movq	%r14, %r9
	pushq	(%rbp)
	.cfi_adjust_cfa_offset 8
	pushq	(%r13)
	leaq	368(%rsp), %r13
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB1_2:
	movq	16(%r13), %rdi
	movq	24(%rsp), %rsi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	addq	$248, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z20MatrixMultiplication6MatrixS_S_, .Lfunc_end1-_Z20MatrixMultiplication6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__MulKernelShared6MatrixS_S_ # -- Begin function _Z30__device_stub__MulKernelShared6MatrixS_S_
	.type	_Z30__device_stub__MulKernelShared6MatrixS_S_,@function
_Z30__device_stub__MulKernelShared6MatrixS_S_: # @_Z30__device_stub__MulKernelShared6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	128(%rsp), %rax
	leaq	48(%rsp), %rbx
	movq	%rax, (%rbx)
	leaq	152(%rsp), %rax
	movq	%rax, 8(%rbx)
	leaq	176(%rsp), %rax
	movq	%rax, 16(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15MulKernelShared6MatrixS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z30__device_stub__MulKernelShared6MatrixS_S_, .Lfunc_end2-_Z30__device_stub__MulKernelShared6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z26MatrixMultiplicationShared6MatrixS_S_ # -- Begin function _Z26MatrixMultiplicationShared6MatrixS_S_
	.type	_Z26MatrixMultiplicationShared6MatrixS_S_,@function
_Z26MatrixMultiplicationShared6MatrixS_S_: # @_Z26MatrixMultiplicationShared6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$248, %rsp
	.cfi_def_cfa_offset 304
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	352(%rsp), %r13
	movl	304(%rsp), %eax
	movl	308(%rsp), %r14d
	leaq	72(%rsp), %rbx
	movl	%eax, -8(%rbx)
	movl	%eax, -16(%rbx)
	movl	%r14d, -12(%rbx)
	imull	%r14d, %eax
	movslq	%eax, %r15
	shlq	$2, %r15
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	320(%rsp), %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	328(%rsp), %r12d
	movl	332(%rsp), %eax
	leaq	48(%rsp), %rbx
	movl	%r12d, -8(%rbx)
	movl	%r12d, -16(%rbx)
	movl	%eax, -12(%rbx)
	imull	%r12d, %eax
	movslq	%eax, %r15
	shlq	$2, %r15
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	344(%rsp), %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	(%r13), %eax
	movl	4(%r13), %ecx
	leaq	24(%rsp), %rdi
	movl	%eax, -8(%rdi)
	movl	%eax, -16(%rdi)
	movl	%ecx, -12(%rdi)
	imull	%eax, %ecx
	movslq	%ecx, %rbx
	shlq	$2, %rbx
	movq	%rbx, %rsi
	callq	hipMalloc
	shrl	$4, %r12d
	shrl	$4, %r14d
	shlq	$32, %r14
	orq	%r12, %r14
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	72(%rsp), %rax
	leaq	128(%rsp), %rcx
	movq	%rax, 16(%rcx)
	movups	56(%rsp), %xmm0
	movaps	%xmm0, (%rcx)
	movq	48(%rsp), %rax
	leaq	160(%rsp), %rdx
	movq	%rax, 16(%rdx)
	movups	32(%rsp), %xmm0
	movaps	%xmm0, (%rdx)
	movq	24(%rsp), %rax
	leaq	192(%rsp), %rsi
	movq	%rax, 16(%rsi)
	movups	8(%rsp), %xmm0
	movaps	%xmm0, (%rsi)
	leaq	224(%rsp), %r14
	movq	%rcx, (%r14)
	movq	%rdx, 8(%r14)
	movq	%rsi, 16(%r14)
	leaq	112(%rsp), %r15
	leaq	96(%rsp), %r12
	leaq	88(%rsp), %r13
	leaq	80(%rsp), %rbp
	movq	%r15, %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	movq	%rbp, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r15), %rsi
	movl	8(%r15), %edx
	movq	(%r12), %rcx
	movl	8(%r12), %r8d
	movl	$_Z15MulKernelShared6MatrixS_S_, %edi
	movq	%r14, %r9
	pushq	(%rbp)
	.cfi_adjust_cfa_offset 8
	pushq	(%r13)
	leaq	368(%rsp), %r13
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB3_2:
	movq	16(%r13), %rdi
	movq	24(%rsp), %rsi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	addq	$248, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z26MatrixMultiplicationShared6MatrixS_S_, .Lfunc_end3-_Z26MatrixMultiplicationShared6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z6printaPfii                   # -- Begin function _Z6printaPfii
	.type	_Z6printaPfii,@function
_Z6printaPfii:                          # @_Z6printaPfii
	.cfi_startproc
# %bb.0:
	imull	%edx, %esi
	testl	%esi, %esi
	jle	.LBB4_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB4_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r15,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB4_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB4_4:                                # %._crit_edge
	movl	$10, %edi
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end4:
	.size	_Z6printaPfii, .Lfunc_end4-_Z6printaPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z14generateMatrixPfiii         # -- Begin function _Z14generateMatrixPfiii
	.type	_Z14generateMatrixPfiii,@function
_Z14generateMatrixPfiii:                # @_Z14generateMatrixPfiii
	.cfi_startproc
# %bb.0:
	imull	%edx, %esi
	testl	%esi, %esi
	jle	.LBB5_3
# %bb.1:                                # %.lr.ph
	cvtsi2ss	%ecx, %xmm0
	movl	%esi, %eax
	xorl	%ecx, %ecx
.LBB5_2:                                # =>This Inner Loop Header: Depth=1
	movss	%xmm0, (%rdi,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB5_2
.LBB5_3:                                # %._crit_edge
	retq
.Lfunc_end5:
	.size	_Z14generateMatrixPfiii, .Lfunc_end5-_Z14generateMatrixPfiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z16generateMatrix2dPPfiii      # -- Begin function _Z16generateMatrix2dPPfiii
	.type	_Z16generateMatrix2dPPfiii,@function
_Z16generateMatrix2dPPfiii:             # @_Z16generateMatrix2dPPfiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movl	%edx, %ebx
	movl	%esi, %r15d
	movslq	%esi, %r12
	movl	$8, %esi
	movq	%r12, %rdi
	callq	calloc
	testl	%r12d, %r12d
	jle	.LBB6_9
# %bb.1:                                # %.lr.ph
	movq	%rax, %r14
	movl	%ebp, 4(%rsp)                   # 4-byte Spill
	movslq	%ebx, %r12
	movl	%r15d, %r13d
	xorl	%ebp, %ebp
.LBB6_2:                                # =>This Inner Loop Header: Depth=1
	movl	$4, %esi
	movq	%r12, %rdi
	callq	calloc
	movq	%rax, (%r14,%rbp,8)
	incq	%rbp
	cmpq	%rbp, %r13
	jne	.LBB6_2
# %bb.3:                                # %.preheader19
	testl	%r15d, %r15d
	movl	4(%rsp), %eax                   # 4-byte Reload
	jle	.LBB6_9
# %bb.4:                                # %.preheader.lr.ph
	cvtsi2ss	%eax, %xmm0
	movl	%ebx, %eax
	xorl	%ecx, %ecx
.LBB6_5:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_7 Depth 2
	testl	%ebx, %ebx
	jle	.LBB6_8
# %bb.6:                                # %.lr.ph22
                                        #   in Loop: Header=BB6_5 Depth=1
	movq	(%r14,%rcx,8), %rdx
	xorl	%esi, %esi
.LBB6_7:                                #   Parent Loop BB6_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	%xmm0, (%rdx,%rsi,4)
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB6_7
.LBB6_8:                                # %._crit_edge
                                        #   in Loop: Header=BB6_5 Depth=1
	incq	%rcx
	cmpq	%r13, %rcx
	jne	.LBB6_5
.LBB6_9:                                # %._crit_edge24
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z16generateMatrix2dPPfiii, .Lfunc_end6-_Z16generateMatrix2dPPfiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z23MatrixMultiplicationCPUPPfS0_S0_ii # -- Begin function _Z23MatrixMultiplicationCPUPPfS0_S0_ii
	.type	_Z23MatrixMultiplicationCPUPPfS0_S0_ii,@function
_Z23MatrixMultiplicationCPUPPfS0_S0_ii: # @_Z23MatrixMultiplicationCPUPPfS0_S0_ii
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB7_9
# %bb.1:                                # %.preheader20.lr.ph
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%ecx, %eax
	movl	%r8d, %ecx
	xorl	%r9d, %r9d
.LBB7_2:                                # %.preheader20
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_4 Depth 2
                                        #       Child Loop BB7_5 Depth 3
	testl	%r8d, %r8d
	jle	.LBB7_7
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB7_2 Depth=1
	movq	(%rdi,%r9,8), %r10
	movq	(%rdx,%r9,8), %r11
	xorl	%ebx, %ebx
.LBB7_4:                                # %.lr.ph
                                        #   Parent Loop BB7_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB7_5 Depth 3
	movss	(%r11,%rbx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	xorl	%r14d, %r14d
.LBB7_5:                                #   Parent Loop BB7_2 Depth=1
                                        #     Parent Loop BB7_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r10,%r14,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	movq	(%rsi,%r14,8), %r15
	mulss	(%r15,%rbx,4), %xmm1
	addss	%xmm1, %xmm0
	movss	%xmm0, (%r11,%rbx,4)
	incq	%r14
	cmpq	%r14, %rax
	jne	.LBB7_5
# %bb.6:                                # %._crit_edge
                                        #   in Loop: Header=BB7_4 Depth=2
	incq	%rbx
	cmpq	%rcx, %rbx
	jne	.LBB7_4
.LBB7_7:                                # %._crit_edge23
                                        #   in Loop: Header=BB7_2 Depth=1
	incq	%r9
	cmpq	%rax, %r9
	jne	.LBB7_2
# %bb.8:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB7_9:                                # %._crit_edge25
	retq
.Lfunc_end7:
	.size	_Z23MatrixMultiplicationCPUPPfS0_S0_ii, .Lfunc_end7-_Z23MatrixMultiplicationCPUPPfS0_S0_ii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$248, %rsp
	.cfi_def_cfa_offset 304
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	84(%rsp), %rax
	movl	$0, (%rax)
	movl	$32384, %r15d                   # imm = 0x7E80
	movl	$32384, %ebx                    # imm = 0x7E80
.LBB8_1:                                # %.lr.ph.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_2 Depth 2
                                        #     Child Loop BB8_4 Depth 2
	shrl	%ebx
	movl	%r15d, %r14d
	imull	%r14d, %r14d
	movl	$.L.str.2, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	leaq	96(%rsp), %rdi
	callq	hipEventCreate
	leaq	88(%rsp), %rdi
	callq	hipEventCreate
	movl	%r15d, %r13d
	imull	%ebx, %r13d
	shll	$2, %r13d
	leal	(,%r14,4), %ebp
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r13
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %rbp
	xorl	%eax, %eax
.LBB8_2:                                #   Parent Loop BB8_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1073741824, (%r12,%rax,4)      # imm = 0x40000000
	incq	%rax
	cmpq	%rax, %r14
	jne	.LBB8_2
# %bb.3:                                # %.lr.ph.i70
                                        #   in Loop: Header=BB8_1 Depth=1
	movl	%ebx, %eax
	imull	%eax, %eax
	xorl	%ecx, %ecx
.LBB8_4:                                #   Parent Loop BB8_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1077936128, (%r13,%rcx,4)      # imm = 0x40400000
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB8_4
# %bb.5:                                # %.lr.ph.i76
                                        #   in Loop: Header=BB8_1 Depth=1
	movl	%r15d, %edx
	imulq	%rdx, %rdx
	shlq	$2, %rdx
	movq	%rbp, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%ebx, 176(%rsp)
	movl	%ebx, 180(%rsp)
	movl	%r15d, 184(%rsp)
	movq	%r13, 192(%rsp)
	movl	%r15d, 152(%rsp)
	movl	%r15d, 156(%rsp)
	movl	%ebx, 160(%rsp)
	movq	%r12, 168(%rsp)
	movl	%r15d, 224(%rsp)
	movl	%r15d, 228(%rsp)
	movl	%r15d, 232(%rsp)
	movq	%rbp, 240(%rsp)
	movq	%rbp, 64(%rsp)
	movups	224(%rsp), %xmm0
	movups	%xmm0, 48(%rsp)
	movq	168(%rsp), %rax
	movq	%rax, 40(%rsp)
	movups	152(%rsp), %xmm0
	movups	%xmm0, 24(%rsp)
	movq	192(%rsp), %rax
	movq	%rax, 16(%rsp)
	movups	176(%rsp), %xmm0
	movups	%xmm0, (%rsp)
	callq	_Z20MatrixMultiplication6MatrixS_S_
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	88(%rsp), %rdi
	callq	hipEventSynchronize
	movq	96(%rsp), %rsi
	movq	88(%rsp), %rdx
	leaq	84(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	84(%rsp), %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%ebx, 128(%rsp)
	movl	%ebx, 132(%rsp)
	movl	%r15d, 136(%rsp)
	movq	%r13, 144(%rsp)
	movl	%r15d, 104(%rsp)
	movl	%r15d, 108(%rsp)
	movl	%ebx, 112(%rsp)
	movq	%r12, 120(%rsp)
	movl	%r15d, 200(%rsp)
	movl	%r15d, 204(%rsp)
	movl	%r15d, 208(%rsp)
	movq	%rbp, 216(%rsp)
	movq	%rbp, 64(%rsp)
	movups	200(%rsp), %xmm0
	movups	%xmm0, 48(%rsp)
	movq	120(%rsp), %rax
	movq	%rax, 40(%rsp)
	movups	104(%rsp), %xmm0
	movups	%xmm0, 24(%rsp)
	movq	144(%rsp), %rax
	movq	%rax, 16(%rsp)
	movups	128(%rsp), %xmm0
	movups	%xmm0, (%rsp)
	callq	_Z26MatrixMultiplicationShared6MatrixS_S_
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	88(%rsp), %rdi
	callq	hipEventSynchronize
	movq	96(%rsp), %rsi
	movq	88(%rsp), %rdx
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	84(%rsp), %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	movq	%r12, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	%rbp, %rdi
	callq	free
	cmpl	$255, %r15d
	movl	%ebx, %r15d
	ja	.LBB8_1
# %bb.6:
	xorl	%eax, %eax
	addq	$248, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	main, .Lfunc_end8-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9MulKernel6MatrixS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15MulKernelShared6MatrixS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9MulKernel6MatrixS_S_,@object # @_Z9MulKernel6MatrixS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z9MulKernel6MatrixS_S_
	.p2align	3, 0x0
_Z9MulKernel6MatrixS_S_:
	.quad	_Z24__device_stub__MulKernel6MatrixS_S_
	.size	_Z9MulKernel6MatrixS_S_, 8

	.type	_Z15MulKernelShared6MatrixS_S_,@object # @_Z15MulKernelShared6MatrixS_S_
	.globl	_Z15MulKernelShared6MatrixS_S_
	.p2align	3, 0x0
_Z15MulKernelShared6MatrixS_S_:
	.quad	_Z30__device_stub__MulKernelShared6MatrixS_S_
	.size	_Z15MulKernelShared6MatrixS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%.f "
	.size	.L.str, 5

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"N x N = %d \n"
	.size	.L.str.2, 13

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Matrix Multiplication time: %fn(ms)\n"
	.size	.L.str.3, 37

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Matrix Multiplication shared time: %fn(ms)\n"
	.size	.L.str.4, 44

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9MulKernel6MatrixS_S_"
	.size	.L__unnamed_1, 24

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15MulKernelShared6MatrixS_S_"
	.size	.L__unnamed_2, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__MulKernel6MatrixS_S_
	.addrsig_sym _Z30__device_stub__MulKernelShared6MatrixS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9MulKernel6MatrixS_S_
	.addrsig_sym _Z15MulKernelShared6MatrixS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9MulKernel6MatrixS_S_ ; -- Begin function _Z9MulKernel6MatrixS_S_
	.globl	_Z9MulKernel6MatrixS_S_
	.p2align	8
	.type	_Z9MulKernel6MatrixS_S_,@function
_Z9MulKernel6MatrixS_S_:                ; @_Z9MulKernel6MatrixS_S_
; %bb.0:
	s_clause 0x2
	s_load_b32 s4, s[0:1], 0x54
	s_load_b32 s6, s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x40
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s4, 16
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, s15, s5, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s4, v[3:4]
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b64 s[8:9], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_lo_u32 v2, v0, s6
	s_clause 0x1
	s_load_b32 s7, s[0:1], 0x18
	s_load_b64 s[4:5], s[0:1], 0x28
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s6, s6, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s6, 0
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_add_nc_u32_e32 v4, s7, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	global_load_b32 v5, v[2:3], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v5, v7
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_4
.LBB0_3:
	v_mov_b32_e32 v6, 0
.LBB0_4:                                ; %Flow29
	s_load_b32 s0, s[0:1], 0x30
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v0, s0, v[1:2]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9MulKernel6MatrixS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9MulKernel6MatrixS_S_, .Lfunc_end0-_Z9MulKernel6MatrixS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 340
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z15MulKernelShared6MatrixS_S_ ; -- Begin function _Z15MulKernelShared6MatrixS_S_
	.globl	_Z15MulKernelShared6MatrixS_S_
	.p2align	8
	.type	_Z15MulKernelShared6MatrixS_S_,@function
_Z15MulKernelShared6MatrixS_S_:         ; @_Z15MulKernelShared6MatrixS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x40
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s5, 16
	s_cbranch_scc1 .LBB1_5
; %bb.1:                                ; %.lr.ph
	s_clause 0x3
	s_load_b32 s10, s[0:1], 0x8
	s_load_b32 s4, s[0:1], 0x20
	s_load_b64 s[6:7], s[0:1], 0x10
	s_load_b64 s[8:9], s[0:1], 0x28
	v_lshlrev_b32_e32 v2, 2, v0
	v_lshlrev_b32_e32 v3, 6, v1
	s_ashr_i32 s11, s5, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_lshr_b32 s11, s11, 28
	v_add_nc_u32_e32 v4, 0x400, v2
	s_add_i32 s5, s5, s11
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_ashr_i32 s5, s5, 4
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[5:6], null, s10, v1, v[0:1]
	v_mad_u64_u32 v[7:8], null, s4, v1, v[0:1]
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[9:10], 2, v[5:6]
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v5, v3, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[11:12], 2, v[7:8]
	v_add_nc_u32_e32 v6, v4, v3
	v_add_co_u32 v7, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s8, v11
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v12, vcc_lo
	s_mul_i32 s6, s10, s15
	s_mov_b32 s7, 0
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_3 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s8, s7, s4
	s_add_i32 s9, s7, s6
	s_add_i32 s10, s8, s14
	s_lshl_b32 s8, s9, 4
	s_lshl_b32 s10, s10, 4
	s_ashr_i32 s9, s8, 31
	s_ashr_i32 s11, s10, 31
	s_lshl_b64 s[8:9], s[8:9], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_u32 v11, vcc_lo, v7, s8
	v_add_co_ci_u32_e32 v12, vcc_lo, s9, v8, vcc_lo
	s_lshl_b64 s[8:9], s[10:11], 2
	v_add_co_u32 v13, vcc_lo, v9, s8
	v_add_co_ci_u32_e32 v14, vcc_lo, s9, v10, vcc_lo
	global_load_b32 v12, v[11:12], off
	global_load_b32 v13, v[13:14], off
	v_mov_b32_e32 v11, v4
	s_mov_b32 s8, 0
	s_waitcnt vmcnt(1)
	ds_store_b32 v5, v12
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v13
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_3:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v12, s8, v3
	s_add_i32 s8, s8, 4
	ds_load_b32 v13, v11
	ds_load_b32 v12, v12
	v_add_nc_u32_e32 v11, 64, v11
	s_cmp_eq_u32 s8, 64
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v2, v12, v13
	s_cbranch_scc0 .LBB1_3
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s7, s7, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s7, s5
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_2
.LBB1_5:                                ; %Flow101
	s_load_b32 s0, s[0:1], 0x38
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[3:4], null, s0, v1, v[0:1]
	s_mul_i32 s0, s0, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s14
	s_lshl_b32 s0, s0, 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_ashr_i32 s1, s0, 31
	v_ashrrev_i32_e32 v4, 31, v3
	s_lshl_b64 s[0:1], s[0:1], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15MulKernelShared6MatrixS_S_
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 72
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15MulKernelShared6MatrixS_S_, .Lfunc_end1-_Z15MulKernelShared6MatrixS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 540
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           24
        .value_kind:     by_value
      - .offset:         24
        .size:           24
        .value_kind:     by_value
      - .offset:         48
        .size:           24
        .value_kind:     by_value
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         76
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         84
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         86
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         88
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         90
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         92
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         94
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         136
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 328
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9MulKernel6MatrixS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9MulKernel6MatrixS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           24
        .value_kind:     by_value
      - .offset:         24
        .size:           24
        .value_kind:     by_value
      - .offset:         48
        .size:           24
        .value_kind:     by_value
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 72
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15MulKernelShared6MatrixS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15MulKernelShared6MatrixS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
