/**
 *	Demo code of Cuda programming lecture
 *	
 *	This programme illustrates how warp divergence may influence the performance of CUDA programme
 *
 *
 */
#include <cstdio>
#include <cstdlib>
#include <sys/time.h>

#define HALF_BLOCK_SIZE 512
#define BLOCK_SIZE 1024
#define LOOP_NUM 1024

//Kernel1 (has warp divergence)
__global__ void kernel1(int *A, int *B)
{
	int i = blockIdx.x*blockDim.x + threadIdx.x;	

	if (i % 2 == 0)
	{
		/*Execution Path 1: thread 0, 2, 4, 6...30... reach here*/
		
		int lower_bound = B[i];
		int tmp = 0;
		
		//do some computation to make this execution path long enough
		for (int j = lower_bound; j < lower_bound+LOOP_NUM; j += 2)	
			tmp += j;
		A[i] += tmp;
	}
	else
	{
		/*Execution Path 2: thread 1, 3, 5, 7...31... reach here*/

		int lower_bound = B[i];
		int tmp = 0;
		
		//do some computation to make this execution path long enough
		for (int j = lower_bound; j < lower_bound+LOOP_NUM; j += 2)	
			tmp += j;

		A[i] -= tmp;
	}
		
 	/*even threads and odd threads go back to the same exexution path*/
}

//Kerne2 (does not have warp divergence)
__global__ void kernel2(int *A, int *B)
{
	int base = blockIdx.x*blockDim.x;	
	
	if (threadIdx.x < HALF_BLOCK_SIZE)
	{
		/*Execution Path 1: the first half threads of a block reach here*/

		int even_index = base + threadIdx.x*2;
		
		int lower_bound = B[even_index];
		int tmp = 0;
		
		//Do some computation
		for (int j = lower_bound; j < lower_bound+LOOP_NUM; j += 2)	
			tmp += j;

		A[even_index] += tmp;
	}
	else
	{
		/*Execution Path 2: the second half threads of a block reach here*/

		int odd_index = base + (threadIdx.x - HALF_BLOCK_SIZE)*2 +1;
		
		int lower_bound = B[odd_index];
		int tmp = 0;
		
		//Do some computation
		for (int j = lower_bound; j < lower_bound+LOOP_NUM; j += 2)	
			tmp += j;

		A[odd_index] -= tmp;
	}
}

int main()
{
	//Device and host memory pointers
	int *h_A, *h_B, *d_A, *d_B;
	
	int N = 33554432;
	int data_size = N*(sizeof(int));
	
	//Kernel configuration parameter
	int threads_per_block = BLOCK_SIZE;
	int blocks_per_grid = N / threads_per_block;
	
	//Time measurement
	timeval k1_start, k1_end, k2_start, k2_end;
	float k1_elapsed_time, k2_elapsed_time;
	
	//Allocate Host Memory
	h_A = (int*)malloc(data_size);
	h_B = (int*)malloc(data_size);
	
	//Allocate Device Memory
	cudaMalloc((void**)&d_A, data_size);
	cudaMalloc((void**)&d_B, data_size);
	
	//Initialization
	for (int i = 0; i < N; i++)
	{
		h_A[i] = i;
		h_B[i] = i;
	}
	
	//Memory copy from host to device
	cudaMemcpy(d_A, h_A, data_size, cudaMemcpyHostToDevice);
	cudaMemcpy(d_B, h_B, data_size, cudaMemcpyHostToDevice);
	
	
	gettimeofday(&k1_start, NULL);
	
	//Invoke kernel1(has warp divergence)
	kernel1<<<blocks_per_grid, threads_per_block>>>(d_A, d_B);

	cudaDeviceSynchronize();

	gettimeofday(&k1_end, NULL);


	gettimeofday(&k2_start, NULL);
	
	//Invoke kernel2(does not have warp divergence)
	kernel2<<<blocks_per_grid, threads_per_block>>>(d_A, d_B);

	cudaDeviceSynchronize();

	gettimeofday(&k2_end, NULL);

	//Copy result back from device to host
	cudaMemcpy(h_A, d_A, data_size, cudaMemcpyDeviceToHost);

	k1_elapsed_time = 1000*(k1_end.tv_sec - k1_start.tv_sec) + (float)(k1_end.tv_usec - k1_start.tv_usec)/1000;
	k2_elapsed_time = 1000*(k2_end.tv_sec - k2_start.tv_sec) + (float)(k2_end.tv_usec - k2_start.tv_usec)/1000;
	
	printf("elapsed time of kernel function which has warp divergence: %.2f ms\n", k1_elapsed_time);
	printf("elapsed time of kernel function which has no warp divergence: %.2f ms\n", k2_elapsed_time);
	
	//Free device memory
	cudaFree(d_A);
	cudaFree(d_B);
	
	//Free host memory
	free(h_A);
	free(h_B);

	return 0;
}


	.file	"tmpxft_0028ff88_00000000-6_warp_example.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z28__device_stub__Z7kernel1PiS_PiS_
	.type	_Z28__device_stub__Z7kernel1PiS_PiS_, @function
_Z28__device_stub__Z7kernel1PiS_PiS_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7kernel1PiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z28__device_stub__Z7kernel1PiS_PiS_, .-_Z28__device_stub__Z7kernel1PiS_PiS_
	.globl	_Z7kernel1PiS_
	.type	_Z7kernel1PiS_, @function
_Z7kernel1PiS_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z7kernel1PiS_PiS_
	.cfi_endproc
.LFE2053:
	.size	_Z7kernel1PiS_, .-_Z7kernel1PiS_
	.globl	_Z28__device_stub__Z7kernel2PiS_PiS_
	.type	_Z28__device_stub__Z7kernel2PiS_PiS_, @function
_Z28__device_stub__Z7kernel2PiS_PiS_:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7kernel2PiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L8:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z28__device_stub__Z7kernel2PiS_PiS_, .-_Z28__device_stub__Z7kernel2PiS_PiS_
	.globl	_Z7kernel2PiS_
	.type	_Z7kernel2PiS_, @function
_Z7kernel2PiS_:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z7kernel2PiS_PiS_
	.cfi_endproc
.LFE2055:
	.size	_Z7kernel2PiS_, .-_Z7kernel2PiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"elapsed time of kernel function which has warp divergence: %.2f ms\n"
.LC2:
	.string	"elapsed time of kernel function which has no warp divergence: %.2f ms\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$134217728, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$136, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$134217728, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	leaq	24(%rsp), %rdi
	movl	$134217728, %esi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$134217728, %esi
	call	cudaMalloc@PLT
	xorl	%eax, %eax
.L14:
	movl	%eax, (%rbx,%rax,4)
	movl	%eax, 0(%rbp,%rax,4)
	incq	%rax
	cmpq	$33554432, %rax
	jne	.L14
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$134217728, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$134217728, %edx
	call	cudaMemcpy@PLT
	xorl	%esi, %esi
	leaq	56(%rsp), %rdi
	call	gettimeofday@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$131073, %edi
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$15, %rdi
	movq	%rdx, 104(%rsp)
	movl	$1, 112(%rsp)
	movq	%rdi, 88(%rsp)
	movl	$1, 96(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z28__device_stub__Z7kernel1PiS_PiS_
.L15:
	call	cudaDeviceSynchronize@PLT
	xorl	%esi, %esi
	leaq	72(%rsp), %rdi
	call	gettimeofday@PLT
	xorl	%esi, %esi
	leaq	88(%rsp), %rdi
	call	gettimeofday@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$131073, %edi
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$15, %rdi
	movq	%rdx, 104(%rsp)
	movl	$1, 112(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z28__device_stub__Z7kernel2PiS_PiS_
.L16:
	call	cudaDeviceSynchronize@PLT
	xorl	%esi, %esi
	leaq	104(%rsp), %rdi
	call	gettimeofday@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$134217728, %edx
	call	cudaMemcpy@PLT
	movq	104(%rsp), %rax
	subq	88(%rsp), %rax
	leaq	.LC1(%rip), %rsi
	imulq	$1000, %rax, %rax
	movss	.LC0(%rip), %xmm3
	movl	$2, %edi
	cvtsi2ssq	%rax, %xmm0
	movq	112(%rsp), %rax
	subq	96(%rsp), %rax
	cvtsi2ssq	%rax, %xmm1
	movq	72(%rsp), %rax
	subq	56(%rsp), %rax
	imulq	$1000, %rax, %rax
	divss	%xmm3, %xmm1
	addss	%xmm0, %xmm1
	cvtsi2ssq	%rax, %xmm0
	movq	80(%rsp), %rax
	subq	64(%rsp), %rax
	cvtsi2ssq	%rax, %xmm2
	movb	$1, %al
	movss	%xmm1, 12(%rsp)
	divss	%xmm3, %xmm2
	addss	%xmm2, %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$1, %al
	movss	12(%rsp), %xmm1
	leaq	.LC2(%rip), %rsi
	cvtss2sd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$136, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z7kernel2PiS_"
.LC4:
	.string	"_Z7kernel1PiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z7kernel2PiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7kernel1PiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
 *	Demo code of Cuda programming lecture
 *	
 *	This programme illustrates how warp divergence may influence the performance of CUDA programme
 *
 *
 */

#include <hip/hip_runtime.h>
#include <cstdio>
#include <cstdlib>
#include <sys/time.h>

#define HALF_BLOCK_SIZE 512
#define BLOCK_SIZE 1024
#define LOOP_NUM 1024

//Kernel1 (has warp divergence)
__global__ void kernel1(int *A, int *B)
{
	int i = blockIdx.x*blockDim.x + threadIdx.x;	

	if (i % 2 == 0)
	{
		/*Execution Path 1: thread 0, 2, 4, 6...30... reach here*/
		
		int lower_bound = B[i];
		int tmp = 0;
		
		//do some computation to make this execution path long enough
		for (int j = lower_bound; j < lower_bound+LOOP_NUM; j += 2)	
			tmp += j;
		A[i] += tmp;
	}
	else
	{
		/*Execution Path 2: thread 1, 3, 5, 7...31... reach here*/

		int lower_bound = B[i];
		int tmp = 0;
		
		//do some computation to make this execution path long enough
		for (int j = lower_bound; j < lower_bound+LOOP_NUM; j += 2)	
			tmp += j;

		A[i] -= tmp;
	}
		
 	/*even threads and odd threads go back to the same exexution path*/
}

//Kerne2 (does not have warp divergence)
__global__ void kernel2(int *A, int *B)
{
	int base = blockIdx.x*blockDim.x;	
	
	if (threadIdx.x < HALF_BLOCK_SIZE)
	{
		/*Execution Path 1: the first half threads of a block reach here*/

		int even_index = base + threadIdx.x*2;
		
		int lower_bound = B[even_index];
		int tmp = 0;
		
		//Do some computation
		for (int j = lower_bound; j < lower_bound+LOOP_NUM; j += 2)	
			tmp += j;

		A[even_index] += tmp;
	}
	else
	{
		/*Execution Path 2: the second half threads of a block reach here*/

		int odd_index = base + (threadIdx.x - HALF_BLOCK_SIZE)*2 +1;
		
		int lower_bound = B[odd_index];
		int tmp = 0;
		
		//Do some computation
		for (int j = lower_bound; j < lower_bound+LOOP_NUM; j += 2)	
			tmp += j;

		A[odd_index] -= tmp;
	}
}

int main()
{
	//Device and host memory pointers
	int *h_A, *h_B, *d_A, *d_B;
	
	int N = 33554432;
	int data_size = N*(sizeof(int));
	
	//Kernel configuration parameter
	int threads_per_block = BLOCK_SIZE;
	int blocks_per_grid = N / threads_per_block;
	
	//Time measurement
	timeval k1_start, k1_end, k2_start, k2_end;
	float k1_elapsed_time, k2_elapsed_time;
	
	//Allocate Host Memory
	h_A = (int*)malloc(data_size);
	h_B = (int*)malloc(data_size);
	
	//Allocate Device Memory
	hipMalloc((void**)&d_A, data_size);
	hipMalloc((void**)&d_B, data_size);
	
	//Initialization
	for (int i = 0; i < N; i++)
	{
		h_A[i] = i;
		h_B[i] = i;
	}
	
	//Memory copy from host to device
	hipMemcpy(d_A, h_A, data_size, hipMemcpyHostToDevice);
	hipMemcpy(d_B, h_B, data_size, hipMemcpyHostToDevice);
	
	
	gettimeofday(&k1_start, NULL);
	
	//Invoke kernel1(has warp divergence)
	kernel1<<<blocks_per_grid, threads_per_block>>>(d_A, d_B);

	hipDeviceSynchronize();

	gettimeofday(&k1_end, NULL);


	gettimeofday(&k2_start, NULL);
	
	//Invoke kernel2(does not have warp divergence)
	kernel2<<<blocks_per_grid, threads_per_block>>>(d_A, d_B);

	hipDeviceSynchronize();

	gettimeofday(&k2_end, NULL);

	//Copy result back from device to host
	hipMemcpy(h_A, d_A, data_size, hipMemcpyDeviceToHost);

	k1_elapsed_time = 1000*(k1_end.tv_sec - k1_start.tv_sec) + (float)(k1_end.tv_usec - k1_start.tv_usec)/1000;
	k2_elapsed_time = 1000*(k2_end.tv_sec - k2_start.tv_sec) + (float)(k2_end.tv_usec - k2_start.tv_usec)/1000;
	
	printf("elapsed time of kernel function which has warp divergence: %.2f ms\n", k1_elapsed_time);
	printf("elapsed time of kernel function which has no warp divergence: %.2f ms\n", k2_elapsed_time);
	
	//Free device memory
	hipFree(d_A);
	hipFree(d_B);
	
	//Free host memory
	free(h_A);
	free(h_B);

	return 0;
}


	.text
	.file	"warp_example.hip"
	.globl	_Z22__device_stub__kernel1PiS_  # -- Begin function _Z22__device_stub__kernel1PiS_
	.type	_Z22__device_stub__kernel1PiS_,@function
_Z22__device_stub__kernel1PiS_:         # @_Z22__device_stub__kernel1PiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7kernel1PiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__kernel1PiS_, .Lfunc_end0-_Z22__device_stub__kernel1PiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__kernel2PiS_  # -- Begin function _Z22__device_stub__kernel2PiS_
	.type	_Z22__device_stub__kernel2PiS_,@function
_Z22__device_stub__kernel2PiS_:         # @_Z22__device_stub__kernel2PiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7kernel2PiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z22__device_stub__kernel2PiS_, .Lfunc_end1-_Z22__device_stub__kernel2PiS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x447a0000                      # float 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$134217728, %edi                # imm = 0x8000000
	callq	malloc
	movq	%rax, %rbx
	movl	$134217728, %edi                # imm = 0x8000000
	callq	malloc
	movq	%rax, %r14
	movq	%rsp, %rdi
	movl	$134217728, %esi                # imm = 0x8000000
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$134217728, %esi                # imm = 0x8000000
	callq	hipMalloc
	xorl	%eax, %eax
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, (%rbx,%rax,4)
	movl	%eax, (%r14,%rax,4)
	incq	%rax
	cmpq	$33554432, %rax                 # imm = 0x2000000
	jne	.LBB2_1
# %bb.2:
	movabsq	$4294968320, %r15               # imm = 0x100000400
	movq	(%rsp), %rdi
	movl	$134217728, %edx                # imm = 0x8000000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movl	$134217728, %edx                # imm = 0x8000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	leaq	31744(%r15), %r12
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z22__device_stub__kernel1PiS_
.LBB2_4:
	callq	hipDeviceSynchronize
	leaq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	leaq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z22__device_stub__kernel2PiS_
.LBB2_6:
	callq	hipDeviceSynchronize
	leaq	72(%rsp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%rsp), %rsi
	movl	$134217728, %edx                # imm = 0x8000000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rax
	subq	56(%rsp), %rax
	imulq	$1000, %rax, %rax               # imm = 0x3E8
	cvtsi2ss	%rax, %xmm0
	movq	48(%rsp), %rax
	subq	64(%rsp), %rax
	cvtsi2ss	%rax, %xmm1
	movq	(%r15), %rax
	subq	24(%rsp), %rax
	imulq	$1000, %rax, %rax               # imm = 0x3E8
	cvtsi2ss	%rax, %xmm2
	movss	.LCPI2_0(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	movq	8(%r15), %rax
	subq	32(%rsp), %rax
	divss	%xmm3, %xmm1
	cvtsi2ss	%rax, %xmm4
	addss	%xmm0, %xmm1
	divss	%xmm3, %xmm4
	addss	%xmm2, %xmm4
	movss	%xmm4, 20(%rsp)                 # 4-byte Spill
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	20(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7kernel1PiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7kernel2PiS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7kernel1PiS_,@object          # @_Z7kernel1PiS_
	.section	.rodata,"a",@progbits
	.globl	_Z7kernel1PiS_
	.p2align	3, 0x0
_Z7kernel1PiS_:
	.quad	_Z22__device_stub__kernel1PiS_
	.size	_Z7kernel1PiS_, 8

	.type	_Z7kernel2PiS_,@object          # @_Z7kernel2PiS_
	.globl	_Z7kernel2PiS_
	.p2align	3, 0x0
_Z7kernel2PiS_:
	.quad	_Z22__device_stub__kernel2PiS_
	.size	_Z7kernel2PiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"elapsed time of kernel function which has warp divergence: %.2f ms\n"
	.size	.L.str, 68

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"elapsed time of kernel function which has no warp divergence: %.2f ms\n"
	.size	.L.str.1, 71

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7kernel1PiS_"
	.size	.L__unnamed_1, 15

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z7kernel2PiS_"
	.size	.L__unnamed_2, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__kernel1PiS_
	.addrsig_sym _Z22__device_stub__kernel2PiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7kernel1PiS_
	.addrsig_sym _Z7kernel2PiS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7kernel1PiS_          ; -- Begin function _Z7kernel1PiS_
	.globl	_Z7kernel1PiS_
	.p2align	8
	.type	_Z7kernel1PiS_,@function
_Z7kernel1PiS_:                         ; @_Z7kernel1PiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_and_b32_e32 v1, 1, v1
	v_add_co_u32 v4, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	v_cmp_eq_u32_e32 vcc_lo, 0, v1
	global_load_b32 v4, v[2:3], off
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v0, 9, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, 0x3fe00, v0
	v_sub_nc_u32_e32 v0, 0xfffc0200, v0
	v_cndmask_b32_e32 v0, v0, v5, vcc_lo
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v4, v0
	global_store_b32 v[2:3], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7kernel1PiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7kernel1PiS_, .Lfunc_end0-_Z7kernel1PiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 176
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7kernel2PiS_          ; -- Begin function _Z7kernel2PiS_
	.globl	_Z7kernel2PiS_
	.p2align	8
	.type	_Z7kernel2PiS_,@function
_Z7kernel2PiS_:                         ; @_Z7kernel2PiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	v_cmp_lt_u32_e32 vcc_lo, 0x1ff, v0
	v_lshlrev_b32_e32 v0, 1, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s4
	s_and_saveexec_b32 s4, vcc_lo
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB1_2
; %bb.1:
	v_add3_u32 v0, v0, s15, 0xfffffc01
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v2, 9, v2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v3, v2
	v_add_nc_u32_e32 v2, 0xfffc0200, v2
	global_store_b32 v[0:1], v2, off
                                        ; implicit-def: $vgpr0
.LBB1_2:                                ; %Flow
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB1_4
; %bb.3:
	v_add_nc_u32_e32 v0, s15, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v2, 9, v2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v2, v2, v3, 0x3fe00
	global_store_b32 v[0:1], v2, off
.LBB1_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7kernel2PiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z7kernel2PiS_, .Lfunc_end1-_Z7kernel2PiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 292
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7kernel1PiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7kernel1PiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7kernel2PiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7kernel2PiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
