#include <iostream>


using namespace std;



#define CUDA_CHECK_RETURN(value) {\
    cudaError_t _m_cudaStat = value;\
    if (_m_cudaStat != cudaSuccess) {\
        fprintf(stderr, "Error %s at line %d in file %s\n", cudaGetErrorString(_m_cudaStat), __LINE__, __FILE__);\
        exit(1);\
    }}



__global__ void VecSum(float *A, float *B, float *C, int size)
{
    int i = threadIdx.x + blockIdx.x * blockDim.x;

    if (i < size)
        C[i] = A[i] + B[i];
}



__global__ void VecMul(float *A, float *B, float *C, int partSize)
{
    __shared__ float cache[256];

    int tid = threadIdx.x + blockIdx.x * blockDim.x;
    int cacheIndex = threadIdx.x;
    int temp = 0;

    while (tid < partSize) {
        temp += A[tid] * B[tid];
        tid += blockDim.x * gridDim.x;
    }

    cache[cacheIndex] = temp;

    __syncthreads();

    for (int s = blockDim.x / 2; s > 0; s >>= 1) {
        if (cacheIndex < s) {
            cache[cacheIndex] += cache[cacheIndex + s];
        }
        __syncthreads();
    }

    if (cacheIndex == 0) C[blockIdx.x] = cache[0];
}


void InitVec(float *A, float *B, int size)
{
    for (int i = 0; i < size; i++) {
        A[i] = 1;
        B[i] = 1;
    }
}


void printVec(float *vec, int size)
{
    for (int i = 0; i < size; i++)
        cout << vec[i] << endl;
}



int main(int argc, char* argv[])
{
    if (argc != 3) {
        cout << "launch parametrs: [vector size] [partSize]" << endl;
        return 1;
    }

    cudaDeviceProp prop;
    int whichDevice;

    cudaGetDevice(&whichDevice);
    cudaGetDeviceProperties(&prop, whichDevice);
    if (!prop.deviceOverlap) {
        cout << "Device does not support overlapping" << endl;
        return 1;
    }

    int full_data_size = atoi(argv[1]);
    int partSize = atoi(argv[2]);

    if (full_data_size % partSize != 0) {
        cout << "The size of the data chunk must be a multiple of the full data size" << endl;
        return 1;
    }

    float *dev_a, *dev_b, *dev_c;
    float *A, *B, *C;

    cudaHostAlloc((void**)&A, full_data_size * sizeof(float), cudaHostAllocDefault);
    cudaHostAlloc((void**)&B, full_data_size * sizeof(float), cudaHostAllocDefault);
    cudaHostAlloc((void**)&C, full_data_size * sizeof(float), cudaHostAllocDefault);

    InitVec(A, B, full_data_size);

    cudaMalloc((void**)&dev_a, full_data_size * sizeof(float));
    cudaMalloc((void**)&dev_b, full_data_size * sizeof(float));
    cudaMalloc((void**)&dev_c, full_data_size * sizeof(float));

    cudaStream_t stream;
    cudaStreamCreate(&stream);

    float elapsedTime;
    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);

    cudaEventRecord(start, 0);
    for (int i = 0; i < full_data_size; i += partSize) {
        cudaMemcpyAsync(dev_a, A + i, partSize * sizeof(float), cudaMemcpyHostToDevice, stream);
        cudaMemcpyAsync(dev_b, B + i, partSize * sizeof(float), cudaMemcpyHostToDevice, stream);
        cudaMemcpyAsync(dev_c, C + i, partSize * sizeof(float), cudaMemcpyHostToDevice, stream);
        VecSum <<< partSize / 256, 256, 0, stream >>> (dev_a, dev_b, dev_c, full_data_size);
        cudaMemcpyAsync(C + i, dev_c, partSize * sizeof(float), cudaMemcpyDeviceToHost, stream);
    }

    //printVec(C, full_data_size);

    cudaStreamSynchronize(stream);
    cudaEventRecord(stop, 0);
    cudaEventSynchronize(stop);
    CUDA_CHECK_RETURN(cudaDeviceSynchronize());
    CUDA_CHECK_RETURN(cudaGetLastError());
    cudaEventElapsedTime(&elapsedTime, start, stop);
    cout << "time: " << elapsedTime << " ms" << endl;

    return 0;
}

	.file	"tmpxft_00398aa0_00000000-6_PartSize.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3640:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3640:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4297:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4297:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z7InitVecPfS_i
	.type	_Z7InitVecPfS_i, @function
_Z7InitVecPfS_i:
.LFB3635:
	.cfi_startproc
	endbr64
	movss	.LC0(%rip), %xmm0
	xorl	%eax, %eax
.L4:
	cmpl	%eax, %edx
	jle	.L7
	movss	%xmm0, (%rdi,%rax,4)
	movss	%xmm0, (%rsi,%rax,4)
	incq	%rax
	jmp	.L4
.L7:
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z7InitVecPfS_i, .-_Z7InitVecPfS_i
	.globl	_Z8printVecPfi
	.type	_Z8printVecPfi, @function
_Z8printVecPfi:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	_ZSt4cout(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L9:
	cmpl	%ebx, %ebp
	jle	.L12
	movq	%r13, %rdi
	cvtss2sd	(%r12,%rbx,4), %xmm0
	incq	%rbx
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L9
.L12:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z8printVecPfi, .-_Z8printVecPfi
	.globl	_Z30__device_stub__Z6VecSumPfS_S_iPfS_S_i
	.type	_Z30__device_stub__Z6VecSumPfS_S_iPfS_S_i, @function
_Z30__device_stub__Z6VecSumPfS_S_iPfS_S_i:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6VecSumPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L13:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z30__device_stub__Z6VecSumPfS_S_iPfS_S_i, .-_Z30__device_stub__Z6VecSumPfS_S_iPfS_S_i
	.globl	_Z6VecSumPfS_S_i
	.type	_Z6VecSumPfS_S_i, @function
_Z6VecSumPfS_S_i:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6VecSumPfS_S_iPfS_S_i
	.cfi_endproc
.LFE3663:
	.size	_Z6VecSumPfS_S_i, .-_Z6VecSumPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"launch parametrs: [vector size] [partSize]"
.LC2:
	.string	"Device does not support overlapping"
.LC3:
	.string	"The size of the data chunk must be a multiple of the full data size"
.LC4:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/VladislavMamonov/cuda/main/lab6/PartSize.cu"
.LC5:
	.string	"Error %s at line %d in file %s\n"
.LC6:
	.string	"time: "
.LC7:
	.string	" ms"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1176, %rsp
	.cfi_def_cfa_offset 1232
	movq	%fs:40, %rax
	movq	%rax, 1160(%rsp)
	xorl	%eax, %eax
	cmpl	$3, %edi
	je	.L19
	leaq	.LC1(%rip), %rsi
	jmp	.L31
.L19:
	leaq	28(%rsp), %rdi
	movq	%rsi, %rbp
	call	cudaGetDevice@PLT
	movl	28(%rsp), %esi
	leaq	128(%rsp), %rdi
	call	cudaGetDeviceProperties_v2@PLT
	cmpl	$0, 512(%rsp)
	jne	.L21
	leaq	.LC2(%rip), %rsi
.L31:
	leaq	_ZSt4cout(%rip), %rdi
	movl	$1, %r13d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L18
.L21:
	movq	8(%rbp), %rdi
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	leaq	.LC3(%rip), %rsi
	movl	%eax, %ebp
	movl	%ebx, %eax
	cltd
	idivl	%ebp
	movl	%edx, %r13d
	testl	%edx, %edx
	jne	.L31
	movslq	%ebx, %r12
	leaq	56(%rsp), %rdi
	xorl	%edx, %edx
	xorl	%r14d, %r14d
	movabsq	$4294967552, %r15
	salq	$2, %r12
	movq	%r12, %rsi
	call	cudaHostAlloc@PLT
	movq	%r12, %rsi
	leaq	64(%rsp), %rdi
	xorl	%edx, %edx
	call	cudaHostAlloc@PLT
	movq	%r12, %rsi
	leaq	72(%rsp), %rdi
	xorl	%edx, %edx
	call	cudaHostAlloc@PLT
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	movl	%ebx, %edx
	call	_Z7InitVecPfS_i
	movq	%r12, %rsi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	%r12, %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	%r12, %rsi
	leaq	48(%rsp), %rdi
	xorl	%r12d, %r12d
	call	cudaMalloc@PLT
	leaq	80(%rsp), %rdi
	call	cudaStreamCreate@PLT
	leaq	88(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	96(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movslq	%ebp, %rax
	movl	$256, %ecx
	salq	$2, %rax
	movq	%rax, (%rsp)
	movl	%ebp, %eax
	cltd
	idivl	%ecx
	movl	%eax, 12(%rsp)
.L24:
	movq	80(%rsp), %r8
	cmpl	%ebx, %r14d
	jge	.L33
	movq	56(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	$1, %ecx
	movq	32(%rsp), %rdi
	addq	%r12, %rsi
	call	cudaMemcpyAsync@PLT
	movq	64(%rsp), %rsi
	movq	80(%rsp), %r8
	movl	$1, %ecx
	movq	(%rsp), %rdx
	movq	40(%rsp), %rdi
	addq	%r12, %rsi
	call	cudaMemcpyAsync@PLT
	movq	72(%rsp), %rsi
	movq	80(%rsp), %r8
	movl	$1, %ecx
	movq	(%rsp), %rdx
	movq	48(%rsp), %rdi
	addq	%r12, %rsi
	call	cudaMemcpyAsync@PLT
	movl	12(%rsp), %eax
	xorl	%r8d, %r8d
	movq	%r15, %rdx
	movq	80(%rsp), %r9
	movl	$1, %ecx
	movq	%r15, 116(%rsp)
	movl	%eax, 104(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 108(%rsp)
	movq	104(%rsp), %rdi
	movl	112(%rsp), %esi
	movl	$1, 124(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	%ebx, %ecx
	movq	32(%rsp), %rdi
	call	_Z30__device_stub__Z6VecSumPfS_S_iPfS_S_i
.L25:
	movq	72(%rsp), %rdi
	movq	80(%rsp), %r8
	movl	$2, %ecx
	addl	%ebp, %r14d
	movq	(%rsp), %rdx
	movq	48(%rsp), %rsi
	addq	%r12, %rdi
	call	cudaMemcpyAsync@PLT
	movq	(%rsp), %rax
	addq	%rax, %r12
	jmp	.L24
.L33:
	movq	%r8, %rdi
	call	cudaStreamSynchronize@PLT
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	96(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L27
	call	cudaGetErrorString@PLT
	leaq	.LC4(%rip), %r9
	movl	$132, %r8d
	movq	%rax, %rcx
	jmp	.L32
.L27:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L28
	call	cudaGetErrorString@PLT
	leaq	.LC4(%rip), %r9
	movl	$133, %r8d
	movq	%rax, %rcx
.L32:
	movq	stderr(%rip), %rdi
	leaq	.LC5(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L28:
	movq	96(%rsp), %rdx
	movq	88(%rsp), %rsi
	leaq	116(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	116(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L18:
	movq	1160(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$1176, %rsp
	.cfi_def_cfa_offset 56
	movl	%r13d, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	main, .-main
	.text
	.globl	_Z30__device_stub__Z6VecMulPfS_S_iPfS_S_i
	.type	_Z30__device_stub__Z6VecMulPfS_S_iPfS_S_i, @function
_Z30__device_stub__Z6VecMulPfS_S_iPfS_S_i:
.LFB3664:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6VecMulPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L34:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_Z30__device_stub__Z6VecMulPfS_S_iPfS_S_i, .-_Z30__device_stub__Z6VecMulPfS_S_iPfS_S_i
	.globl	_Z6VecMulPfS_S_i
	.type	_Z6VecMulPfS_S_i, @function
_Z6VecMulPfS_S_i:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6VecMulPfS_S_iPfS_S_i
	.cfi_endproc
.LFE3665:
	.size	_Z6VecMulPfS_S_i, .-_Z6VecMulPfS_S_i
	.section	.rodata.str1.1
.LC8:
	.string	"_Z6VecMulPfS_S_i"
.LC9:
	.string	"_Z6VecSumPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3667:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z6VecMulPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6VecSumPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3667:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>


using namespace std;



#define CUDA_CHECK_RETURN(value) {\
    hipError_t _m_cudaStat = value;\
    if (_m_cudaStat != hipSuccess) {\
        fprintf(stderr, "Error %s at line %d in file %s\n", hipGetErrorString(_m_cudaStat), __LINE__, __FILE__);\
        exit(1);\
    }}



__global__ void VecSum(float *A, float *B, float *C, int size)
{
    int i = threadIdx.x + blockIdx.x * blockDim.x;

    if (i < size)
        C[i] = A[i] + B[i];
}



__global__ void VecMul(float *A, float *B, float *C, int partSize)
{
    __shared__ float cache[256];

    int tid = threadIdx.x + blockIdx.x * blockDim.x;
    int cacheIndex = threadIdx.x;
    int temp = 0;

    while (tid < partSize) {
        temp += A[tid] * B[tid];
        tid += blockDim.x * gridDim.x;
    }

    cache[cacheIndex] = temp;

    __syncthreads();

    for (int s = blockDim.x / 2; s > 0; s >>= 1) {
        if (cacheIndex < s) {
            cache[cacheIndex] += cache[cacheIndex + s];
        }
        __syncthreads();
    }

    if (cacheIndex == 0) C[blockIdx.x] = cache[0];
}


void InitVec(float *A, float *B, int size)
{
    for (int i = 0; i < size; i++) {
        A[i] = 1;
        B[i] = 1;
    }
}


void printVec(float *vec, int size)
{
    for (int i = 0; i < size; i++)
        cout << vec[i] << endl;
}



int main(int argc, char* argv[])
{
    if (argc != 3) {
        cout << "launch parametrs: [vector size] [partSize]" << endl;
        return 1;
    }

    hipDeviceProp_t prop;
    int whichDevice;

    hipGetDevice(&whichDevice);
    hipGetDeviceProperties(&prop, whichDevice);
    if (!prop.deviceOverlap) {
        cout << "Device does not support overlapping" << endl;
        return 1;
    }

    int full_data_size = atoi(argv[1]);
    int partSize = atoi(argv[2]);

    if (full_data_size % partSize != 0) {
        cout << "The size of the data chunk must be a multiple of the full data size" << endl;
        return 1;
    }

    float *dev_a, *dev_b, *dev_c;
    float *A, *B, *C;

    hipHostAlloc((void**)&A, full_data_size * sizeof(float), hipHostMallocDefault);
    hipHostAlloc((void**)&B, full_data_size * sizeof(float), hipHostMallocDefault);
    hipHostAlloc((void**)&C, full_data_size * sizeof(float), hipHostMallocDefault);

    InitVec(A, B, full_data_size);

    hipMalloc((void**)&dev_a, full_data_size * sizeof(float));
    hipMalloc((void**)&dev_b, full_data_size * sizeof(float));
    hipMalloc((void**)&dev_c, full_data_size * sizeof(float));

    hipStream_t stream;
    hipStreamCreate(&stream);

    float elapsedTime;
    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);

    hipEventRecord(start, 0);
    for (int i = 0; i < full_data_size; i += partSize) {
        hipMemcpyAsync(dev_a, A + i, partSize * sizeof(float), hipMemcpyHostToDevice, stream);
        hipMemcpyAsync(dev_b, B + i, partSize * sizeof(float), hipMemcpyHostToDevice, stream);
        hipMemcpyAsync(dev_c, C + i, partSize * sizeof(float), hipMemcpyHostToDevice, stream);
        VecSum <<< partSize / 256, 256, 0, stream >>> (dev_a, dev_b, dev_c, full_data_size);
        hipMemcpyAsync(C + i, dev_c, partSize * sizeof(float), hipMemcpyDeviceToHost, stream);
    }

    //printVec(C, full_data_size);

    hipStreamSynchronize(stream);
    hipEventRecord(stop, 0);
    hipEventSynchronize(stop);
    CUDA_CHECK_RETURN(hipDeviceSynchronize());
    CUDA_CHECK_RETURN(hipGetLastError());
    hipEventElapsedTime(&elapsedTime, start, stop);
    cout << "time: " << elapsedTime << " ms" << endl;

    return 0;
}

	.text
	.file	"PartSize.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__VecSumPfS_S_i # -- Begin function _Z21__device_stub__VecSumPfS_S_i
	.type	_Z21__device_stub__VecSumPfS_S_i,@function
_Z21__device_stub__VecSumPfS_S_i:       # @_Z21__device_stub__VecSumPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6VecSumPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__VecSumPfS_S_i, .Lfunc_end0-_Z21__device_stub__VecSumPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__VecMulPfS_S_i # -- Begin function _Z21__device_stub__VecMulPfS_S_i
	.type	_Z21__device_stub__VecMulPfS_S_i,@function
_Z21__device_stub__VecMulPfS_S_i:       # @_Z21__device_stub__VecMulPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6VecMulPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z21__device_stub__VecMulPfS_S_i, .Lfunc_end1-_Z21__device_stub__VecMulPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z7InitVecPfS_i                 # -- Begin function _Z7InitVecPfS_i
	.type	_Z7InitVecPfS_i,@function
_Z7InitVecPfS_i:                        # @_Z7InitVecPfS_i
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB2_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%edx, %eax
	xorl	%ecx, %ecx
	movl	$1065353216, %edx               # imm = 0x3F800000
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%edx, (%rdi,%rcx,4)
	movl	%edx, (%rsi,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB2_2
.LBB2_3:                                # %._crit_edge
	retq
.Lfunc_end2:
	.size	_Z7InitVecPfS_i, .Lfunc_end2-_Z7InitVecPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z8printVecPfi                  # -- Begin function _Z8printVecPfi
	.type	_Z8printVecPfi,@function
_Z8printVecPfi:                         # @_Z8printVecPfi
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB3_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r15d
	xorl	%r12d, %r12d
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r12,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r12
	cmpq	%r12, %r15
	jne	.LBB3_2
# %bb.3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
.LBB3_4:                                # %._crit_edge
	retq
.Lfunc_end3:
	.size	_Z8printVecPfi, .Lfunc_end3-_Z8printVecPfi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1576, %rsp                     # imm = 0x628
	.cfi_def_cfa_offset 1632
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$3, %edi
	jne	.LBB4_1
# %bb.2:
	movq	%rsi, %r14
	leaq	100(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDevice
	movl	(%rbx), %esi
	leaq	104(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDevicePropertiesR0600
	cmpl	$0, 384(%rbx)
	je	.LBB4_3
# %bb.5:
	movq	8(%r14), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, %ebp
	movl	%ebx, %eax
	cltd
	idivl	%ebp
	testl	%edx, %edx
	je	.LBB4_7
# %bb.6:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$67, %edx
	jmp	.LBB4_4
.LBB4_1:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$42, %edx
	jmp	.LBB4_4
.LBB4_3:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$35, %edx
.LBB4_4:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$1, %eax
.LBB4_21:
	addq	$1576, %rsp                     # imm = 0x628
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_7:
	.cfi_def_cfa_offset 1632
	movslq	%ebx, %rax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	leaq	(,%rax,4), %r14
	leaq	56(%rsp), %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	leaq	48(%rsp), %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	leaq	40(%rsp), %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	testl	%ebx, %ebx
	jle	.LBB4_10
# %bb.8:                                # %.lr.ph.preheader.i
	movq	56(%rsp), %rax
	movq	48(%rsp), %rcx
	movl	%ebx, %edx
	xorl	%esi, %esi
	movl	$1065353216, %edi               # imm = 0x3F800000
.LBB4_9:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movl	%edi, (%rax,%rsi,4)
	movl	%edi, (%rcx,%rsi,4)
	incq	%rsi
	cmpq	%rsi, %rdx
	jne	.LBB4_9
.LBB4_10:                               # %_Z7InitVecPfS_i.exit
	leaq	72(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	64(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	callq	hipStreamCreate
	leaq	88(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%ebx, 36(%rsp)                  # 4-byte Spill
	testl	%ebx, %ebx
	jle	.LBB4_15
# %bb.11:                               # %.lr.ph
	movabsq	$4294967296, %r14               # imm = 0x100000000
	movslq	%ebp, %r12
	leaq	(,%r12,4), %r15
	leal	255(%rbp), %r13d
	testl	%ebp, %ebp
	cmovnsl	%ebp, %r13d
	sarl	$8, %r13d
	btsq	$32, %r13
	xorl	%ebx, %ebx
	addq	$256, %r14                      # imm = 0x100
	xorl	%ebp, %ebp
.LBB4_12:                               # =>This Inner Loop Header: Depth=1
	movq	72(%rsp), %rdi
	movq	56(%rsp), %rsi
	addq	%rbx, %rsi
	movq	8(%rsp), %r8
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	64(%rsp), %rdi
	movq	48(%rsp), %rsi
	addq	%rbx, %rsi
	movq	8(%rsp), %r8
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	24(%rsp), %rdi
	movq	40(%rsp), %rsi
	addq	%rbx, %rsi
	movq	8(%rsp), %r8
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	8(%rsp), %r9
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_14
# %bb.13:                               #   in Loop: Header=BB4_12 Depth=1
	movq	72(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	36(%rsp), %ecx                  # 4-byte Reload
	callq	_Z21__device_stub__VecSumPfS_S_i
.LBB4_14:                               #   in Loop: Header=BB4_12 Depth=1
	movq	40(%rsp), %rdi
	addq	%rbx, %rdi
	movq	24(%rsp), %rsi
	movq	8(%rsp), %r8
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpyAsync
	addq	%r12, %rbp
	addq	%r15, %rbx
	cmpq	80(%rsp), %rbp                  # 8-byte Folded Reload
	jl	.LBB4_12
.LBB4_15:                               # %._crit_edge
	movq	8(%rsp), %rdi
	callq	hipStreamSynchronize
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	callq	hipEventSynchronize
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB4_16
# %bb.18:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB4_19
# %bb.20:
	movq	88(%rsp), %rsi
	movq	16(%rsp), %rdx
	leaq	96(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtss2sd	(%rbx), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.6, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	jmp	.LBB4_21
.LBB4_16:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	movl	$.L.str.4, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$134, %ecx
	jmp	.LBB4_17
.LBB4_19:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	movl	$.L.str.4, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$135, %ecx
.LBB4_17:
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6VecSumPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6VecMulPfS_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6VecSumPfS_S_i,@object        # @_Z6VecSumPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z6VecSumPfS_S_i
	.p2align	3, 0x0
_Z6VecSumPfS_S_i:
	.quad	_Z21__device_stub__VecSumPfS_S_i
	.size	_Z6VecSumPfS_S_i, 8

	.type	_Z6VecMulPfS_S_i,@object        # @_Z6VecMulPfS_S_i
	.globl	_Z6VecMulPfS_S_i
	.p2align	3, 0x0
_Z6VecMulPfS_S_i:
	.quad	_Z21__device_stub__VecMulPfS_S_i
	.size	_Z6VecMulPfS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"launch parametrs: [vector size] [partSize]"
	.size	.L.str, 43

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Device does not support overlapping"
	.size	.L.str.1, 36

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"The size of the data chunk must be a multiple of the full data size"
	.size	.L.str.2, 68

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Error %s at line %d in file %s\n"
	.size	.L.str.3, 32

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/VladislavMamonov/cuda/main/lab6/PartSize.hip"
	.size	.L.str.4, 107

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"time: "
	.size	.L.str.5, 7

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	" ms"
	.size	.L.str.6, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6VecSumPfS_S_i"
	.size	.L__unnamed_1, 17

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z6VecMulPfS_S_i"
	.size	.L__unnamed_2, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__VecSumPfS_S_i
	.addrsig_sym _Z21__device_stub__VecMulPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6VecSumPfS_S_i
	.addrsig_sym _Z6VecMulPfS_S_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6VecSumPfS_S_i        ; -- Begin function _Z6VecSumPfS_S_i
	.globl	_Z6VecSumPfS_S_i
	.p2align	8
	.type	_Z6VecSumPfS_S_i,@function
_Z6VecSumPfS_S_i:                       ; @_Z6VecSumPfS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6VecSumPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6VecSumPfS_S_i, .Lfunc_end0-_Z6VecSumPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6VecMulPfS_S_i        ; -- Begin function _Z6VecMulPfS_S_i
	.globl	_Z6VecMulPfS_S_i
	.p2align	8
	.type	_Z6VecMulPfS_S_i,@function
_Z6VecMulPfS_S_i:                       ; @_Z6VecMulPfS_S_i
; %bb.0:
	s_clause 0x3
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s10, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	s_add_u32 s0, s0, 32
	s_mov_b32 s2, s15
	s_addc_u32 s1, s1, 0
	s_mov_b32 s11, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	v_mov_b32_e32 v2, 0
	v_cmpx_gt_i32_e64 s10, v1
	s_cbranch_execz .LBB1_4
; %bb.1:                                ; %.lr.ph
	s_load_b32 s1, s[0:1], 0x0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s0, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s1, s3
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v3, v3
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_nc_u32_e32 v1, s1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s10, v1
	global_load_b32 v2, v[6:7], off
	global_load_b32 v4, v[4:5], off
	s_or_b32 s0, vcc_lo, s0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v3, v2, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f32_e32 v3, v3
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_2
; %bb.3:                                ; %._crit_edge.loopexit
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_i32_e32 v2, v3
.LBB1_4:                                ; %Flow43
	s_or_b32 exec_lo, exec_lo, s11
	v_lshlrev_b32_e32 v1, 2, v0
	s_cmp_lt_u32 s3, 2
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB1_5:                                ; %Flow43
                                        ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_9
; %bb.6:                                ; %.lr.ph30
                                        ;   in Loop: Header=BB1_5 Depth=1
	s_lshr_b32 s0, s3, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB1_8
; %bb.7:                                ;   in Loop: Header=BB1_5 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v1, v2
.LBB1_8:                                ;   in Loop: Header=BB1_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s3, 4
	s_mov_b32 s3, s0
	s_branch .LBB1_5
.LBB1_9:                                ; %._crit_edge31
	s_mov_b32 s3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_11
; %bb.10:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s8, s0
	s_addc_u32 s1, s9, s1
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB1_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6VecMulPfS_S_i
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z6VecMulPfS_S_i, .Lfunc_end1-_Z6VecMulPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 420
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6VecSumPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6VecSumPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6VecMulPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6VecMulPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
