#include <cstdlib>
#include <cstdio>
#include <cooperative_groups.h>

#define P(i, j) ((i) * nx + (j))

void allocate_2d(float *&a, int nx, int ny){
    cudaMallocManaged(&a, nx*ny*sizeof(float));
}

__global__  void build_up_b(float *b, float rho, float dt, float *u, float *v, float dx, float dy, int nx, int ny){
    int i = blockIdx.x*blockDim.x + threadIdx.x;
    int j = blockIdx.y*blockDim.y + threadIdx.y;
    if(i < 1 || i >= ny-1 || j < 1 || j >= nx-1){
        return;
    }
    b[P(i, j)] = (
        rho * (
            1 / dt * (
                (
                    u[P(i, j+1)] - u[P(i, j-1)]
                ) / (
                    2 * dx
                ) + (
                    v[P(i+1, j)] - v[P(i-1, j)]
                ) / (
                    2 * dy
                )
            ) - (
                (
                    u[P(i, j+1)] - u[P(i, j-1)]
                ) / (
                    2 * dx
                )
            ) * (
                (
                    u[P(i, j+1)] - u[P(i, j-1)]
                ) / (
                    2 * dx
                )
            ) - 2 * (
                (
                    u[P(i+1, j)] - u[P(i-1, j)]
                ) / (
                    2 * dy
                ) * (
                    v[P(i, j+1)] - v[P(i, j-1)]
                ) / (
                    2 * dx
                )
            ) - (
                (
                    v[P(i+1, j)] - v[P(i-1, j)]
                ) / (
                    2 * dy
                )
            ) * (
                (
                    v[P(i+1, j)] - v[P(i-1, j)]
                ) / (
                    2 * dy
                )
            )
        )
    );
}


__global__ void copy(float *a, float *b, int nx, int ny){
    int i = blockIdx.x*blockDim.x + threadIdx.x;
    int j = blockIdx.y*blockDim.y + threadIdx.y;
    if(i < 0 || i >= ny || j < 0 || j >= nx){
        return;
    }
    b[P(i, j)] = a[P(i, j)];

}


__global__ void pressure_poisson_step(float *p, float *pn, float dx, float dy, float *b, int nx, int ny){
    
    int i = blockIdx.x*blockDim.x + threadIdx.x;
    int j = blockIdx.y*blockDim.y + threadIdx.y;
    if(i < 1 || i >= ny-1 || j < 1 || j >= nx-1){
        return;
    }
    p[P(i, j)] = (
        (
            (
                pn[P(i, j+1)] + pn[P(i, j-1)]
            ) * dy * dy + (
                pn[P(i+1, j)] + pn[P(i-1, j)]
            ) * dx * dx
        ) / (
            2 * (
                dx * dx + dy * dy
            )
        ) - dx * dx * dy * dy / (
            2 * (
                dx * dx + dy * dy
            )
        ) * b[P(i, j)]
    );
}

void pressure_poisson(float *p, float *pn, float dx, float dy, float *b, int nit, int nx, int ny){
    for(int i = 0;i < nit;i++){

        dim3 grid = dim3(2, 2);
        dim3 block = dim3(32, 32);
        copy<<<grid,block>>>(p, pn, nx, ny);
        pressure_poisson_step<<<grid,block>>>(p, pn, dx, dy, b, nx, ny);
        cudaDeviceSynchronize();
        for(int i = 0;i < ny;i++){
            p[P(i, nx-1)] = p[P(i, nx-2)];
        }
        for(int i = 0;i < nx;i++){
            p[P(0, i)] = p[P(1, i)];
        }
        for(int i = 0;i < ny;i++){
            p[P(i, 0)] = p[P(i, 1)];
        }
        for(int i = 0;i < nx;i++){
            p[P(ny-1, i)] = 0;
        }

    }
}

__global__ void update_u(float *u, float *v, float *un, float *vn, float dt, float dx, float dy, float rho, float nu, float *p, int nx, int ny){
    int i = blockIdx.x*blockDim.x + threadIdx.x;
    int j = blockIdx.y*blockDim.y + threadIdx.y;
    if(i < 1 || i >= ny-1 || j < 1 || j >= nx-1){
        return;
    }
    u[P(i, j)] = (
        un[P(i, j)] - un[P(i, j)] * dt / dx * (
            un[P(i, j)] - un[P(i, j-1)]
        ) - vn[P(i, j)] * dt / dy * (
            un[P(i, j)] - un[P(i-1, j)]
        ) - dt / (
            2 * rho * dx
        ) * (
            p[P(i, j+1)] - p[P(i, j-1)]
        ) + nu * (
            dt / (dx * dx) * (
                un[P(i, j+1)] - 2 * un[P(i, j)] + un[P(i, j-1)]
            ) + dt / (dy * dy) * (
                un[P(i+1, j)] - 2 * un[P(i, j)] + un[P(i-1, j)]
            )
        )
    );

}

__global__ void update_v(float *u, float *v, float *un, float *vn, float dt, float dx, float dy, float rho, float nu, float *p, int nx, int ny){
    int i = blockIdx.x*blockDim.x + threadIdx.x;
    int j = blockIdx.y*blockDim.y + threadIdx.y;
    if(i < 1 || i >= ny-1 || j < 1 || j >= nx-1){
        return;
    }
    v[P(i, j)] = (
        vn[P(i, j)] - un[P(i, j)] * dt / dx * (
            vn[P(i, j)] - vn[P(i, j-1)]
        ) - vn[P(i, j)] * dt / dy * (
            vn[P(i, j)] - vn[P(i-1, j)]
        ) - dt /  (
            2 * rho * dy
        ) * (
            p[P(i+1, j)] - p[P(i-1, j)]
        ) + nu * (
            dt / (dx * dx) * (
                vn[P(i, j+1)] - 2 * vn[P(i, j)] + vn[P(i, j-1)]
            ) + dt / (dy * dy) * (
                vn[P(i+1, j)] - 2 * vn[P(i, j)] + vn[P(i-1, j)]
            )
        )
    );

}

void boarder(float *u, float *v, int nx, int ny){
    for(int i = 0;i < nx;i++){
        u[P(0, i)] = 0;
    }
    for(int i = 0;i < ny;i++){
        u[P(i, 0)] = 0;
    }
    for(int i = 0;i < ny;i++){
        u[P(i, nx-1)] = 0;
    }
    for(int i = 0;i < nx;i++){
        u[P(ny-1, i)] = 1;
    }
    for(int i = 0;i < nx;i++){
        v[P(0, i)] = 0;
    }
    for(int i = 0;i < nx;i++){
        v[P(ny-1, i)] = 0;
    }
    for(int i = 0;i < ny;i++){
        v[P(i, 0)] = 0;
    }
    for(int i = 0;i < ny;i++){
        v[P(i, nx-1)] = 0;
    }
}

void print2d(float *a, int nx, int ny){
    for(int i = 0;i < ny;i++){
        for(int j = 0;j < nx;j++){
            printf("%g\n", a[P(i, j)]);
        }
    }
}

void cavity_flow_step(float *u, float *un, float *v, float *vn, float dt, float dx, float dy, float *p, float *pn, float *b, float rho, float nu, int nx, int ny, int nit){
    dim3 grid = dim3(2, 2);
    dim3 block = dim3(32, 32);
    build_up_b<<<grid,block>>>(b, rho, dt, u, v, dx, dy, nx, ny);
    cudaDeviceSynchronize();
    pressure_poisson(p, pn, dx, dy, b, nit, nx, ny);
    cudaDeviceSynchronize();
    copy<<<grid,block>>>(u, un, nx, ny);
    copy<<<grid,block>>>(v, vn, nx, ny);
    update_u<<<grid,block>>>(u, v, un, vn, dt, dx, dy, rho, nu, p, nx, ny);
    update_v<<<grid,block>>>(u, v, un, vn, dt, dx, dy, rho, nu, p, nx, ny);
    cudaDeviceSynchronize();
    boarder(u, v, nx, ny);
    cudaDeviceSynchronize();
}

void cavity_flow(int nt, float *u, float *un, float *v, float *vn, float dt, float dx, float dy, float *p, float *pn, float *b, float rho, float nu, int nx, int ny, int nit){
    for(int i = 0;i < nt;i++){
        cavity_flow_step(u, un, v, vn, dt, dx, dy, p, pn, b, rho, nu, nx, ny, nit);
    }
}


int main(){
    int nx = 41;
    int ny = 41;
    int nt = 700;
    int nit = 50;
    float cx = 2;
    float cy = 2;
    float dx = cx / (nx - 1);
    float dy = cy / (ny - 1);

    float rho = 1;
    float nu = 0.1;
    float dt = 0.001;
    float *u;
    allocate_2d(u, nx, ny);
    float *v;
    allocate_2d(v, nx, ny);
    float *p;
    allocate_2d(p, nx, ny);
    float *b;
    allocate_2d(b, nx, ny);
    float *un;
    allocate_2d(un, nx, ny);
    float *vn;
    allocate_2d(vn, nx, ny);
    float *pn;
    allocate_2d(pn, nx, ny);

    for(int i = 0;i < ny;i++){
        for(int j = 0;j < nx;j++){
            u[P(i, j)] = v[P(i, j)] = p[P(i, j)] = b[P(i, j)] = 0;
        }
    }
    cavity_flow(nt, u, un, v, vn, dt, dx, dy, p, pn, b, rho, nu, nx, ny, nit);
    cudaDeviceSynchronize();
    print2d(u, nx, ny);
    print2d(v, nx, ny);
    print2d(p, nx, ny);
}

	.file	"tmpxft_00297013_00000000-6_navier_stokes.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6568:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE6568:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z11allocate_2dRPfii
	.type	_Z11allocate_2dRPfii, @function
_Z11allocate_2dRPfii:
.LFB6559:
	.cfi_startproc
	endbr64
	imull	%edx, %esi
	movl	$1, %edx
	movslq	%esi, %rsi
	salq	$2, %rsi
	jmp	cudaMallocManaged@PLT
	.cfi_endproc
.LFE6559:
	.size	_Z11allocate_2dRPfii, .-_Z11allocate_2dRPfii
	.globl	_Z7boarderPfS_ii
	.type	_Z7boarderPfS_ii, @function
_Z7boarderPfS_ii:
.LFB6561:
	.cfi_startproc
	endbr64
	movq	%rsi, %rax
	movl	%ecx, %r8d
	movl	%edx, %esi
	xorl	%edx, %edx
.L4:
	cmpl	%edx, %esi
	jle	.L21
	movl	$0x00000000, (%rdi,%rdx,4)
	incq	%rdx
	jmp	.L4
.L21:
	movslq	%esi, %rcx
	movq	%rdi, %r9
	xorl	%edx, %edx
	salq	$2, %rcx
.L6:
	cmpl	%r8d, %edx
	jge	.L22
	movl	$0x00000000, (%r9)
	incl	%edx
	addq	%rcx, %r9
	jmp	.L6
.L22:
	leaq	(%rdi,%rcx), %r9
	xorl	%edx, %edx
.L8:
	cmpl	%r8d, %edx
	jge	.L23
	movl	$0x00000000, -4(%r9)
	incl	%edx
	addq	%rcx, %r9
	jmp	.L8
.L23:
	leal	-1(%r8), %edx
	movss	.LC1(%rip), %xmm0
	xorl	%r9d, %r9d
	imull	%esi, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	addq	%rdx, %rdi
.L10:
	cmpl	%r9d, %esi
	jle	.L24
	movss	%xmm0, (%rdi,%r9,4)
	incq	%r9
	jmp	.L10
.L24:
	xorl	%edi, %edi
.L12:
	cmpl	%edi, %esi
	jle	.L25
	movl	$0x00000000, (%rax,%rdi,4)
	incq	%rdi
	jmp	.L12
.L25:
	addq	%rax, %rdx
	xorl	%edi, %edi
.L14:
	cmpl	%edi, %esi
	jle	.L26
	movl	$0x00000000, (%rdx,%rdi,4)
	incq	%rdi
	jmp	.L14
.L26:
	movq	%rax, %rsi
	xorl	%edx, %edx
.L16:
	cmpl	%r8d, %edx
	jge	.L27
	movl	$0x00000000, (%rsi)
	incl	%edx
	addq	%rcx, %rsi
	jmp	.L16
.L27:
	addq	%rcx, %rax
	xorl	%edx, %edx
.L18:
	cmpl	%r8d, %edx
	jge	.L28
	movl	$0x00000000, -4(%rax)
	incl	%edx
	addq	%rcx, %rax
	jmp	.L18
.L28:
	ret
	.cfi_endproc
.LFE6561:
	.size	_Z7boarderPfS_ii, .-_Z7boarderPfS_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"%g\n"
	.text
	.globl	_Z7print2dPfii
	.type	_Z7print2dPfii, @function
_Z7print2dPfii:
.LFB6562:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L30:
	cmpl	%edx, %r14d
	jge	.L29
	movslq	%r13d, %rax
	xorl	%ebx, %ebx
	leaq	(%r12,%rax,4), %r15
.L33:
	cmpl	%ebx, %ebp
	jle	.L35
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movl	%edx, 12(%rsp)
	cvtss2sd	(%r15,%rbx,4), %xmm0
	call	__printf_chk@PLT
	incq	%rbx
	movl	12(%rsp), %edx
	jmp	.L33
.L35:
	incl	%r14d
	addl	%ebp, %r13d
	jmp	.L30
.L29:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6562:
	.size	_Z7print2dPfii, .-_Z7print2dPfii
	.globl	_Z40__device_stub__Z10build_up_bPfffS_S_ffiiPfffS_S_ffii
	.type	_Z40__device_stub__Z10build_up_bPfffS_S_ffiiPfffS_S_ffii, @function
_Z40__device_stub__Z10build_up_bPfffS_S_ffiiPfffS_S_ffii:
.LFB6590:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 24(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, (%rsp)
	movss	%xmm0, 36(%rsp)
	movss	%xmm1, 32(%rsp)
	movss	%xmm2, 12(%rsp)
	movss	%xmm3, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	%rsp, %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	56(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z10build_up_bPfffS_S_ffii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L36:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6590:
	.size	_Z40__device_stub__Z10build_up_bPfffS_S_ffiiPfffS_S_ffii, .-_Z40__device_stub__Z10build_up_bPfffS_S_ffiiPfffS_S_ffii
	.globl	_Z10build_up_bPfffS_S_ffii
	.type	_Z10build_up_bPfffS_S_ffii, @function
_Z10build_up_bPfffS_S_ffii:
.LFB6591:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z10build_up_bPfffS_S_ffiiPfffS_S_ffii
	.cfi_endproc
.LFE6591:
	.size	_Z10build_up_bPfffS_S_ffii, .-_Z10build_up_bPfffS_S_ffii
	.globl	_Z27__device_stub__Z4copyPfS_iiPfS_ii
	.type	_Z27__device_stub__Z4copyPfS_iiPfS_ii, @function
_Z27__device_stub__Z4copyPfS_iiPfS_ii:
.LFB6592:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z4copyPfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L41:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L43
	call	__stack_chk_fail@PLT
.L43:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6592:
	.size	_Z27__device_stub__Z4copyPfS_iiPfS_ii, .-_Z27__device_stub__Z4copyPfS_iiPfS_ii
	.globl	_Z4copyPfS_ii
	.type	_Z4copyPfS_ii, @function
_Z4copyPfS_ii:
.LFB6593:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z4copyPfS_iiPfS_ii
	.cfi_endproc
.LFE6593:
	.size	_Z4copyPfS_ii, .-_Z4copyPfS_ii
	.globl	_Z49__device_stub__Z21pressure_poisson_stepPfS_ffS_iiPfS_ffS_ii
	.type	_Z49__device_stub__Z21pressure_poisson_stepPfS_ffS_iiPfS_ffS_ii, @function
_Z49__device_stub__Z21pressure_poisson_stepPfS_ffS_iiPfS_ffS_ii:
.LFB6594:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 8(%rsp)
	movss	%xmm0, 28(%rsp)
	movss	%xmm1, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z21pressure_poisson_stepPfS_ffS_ii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L46:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L48
	call	__stack_chk_fail@PLT
.L48:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6594:
	.size	_Z49__device_stub__Z21pressure_poisson_stepPfS_ffS_iiPfS_ffS_ii, .-_Z49__device_stub__Z21pressure_poisson_stepPfS_ffS_iiPfS_ffS_ii
	.globl	_Z21pressure_poisson_stepPfS_ffS_ii
	.type	_Z21pressure_poisson_stepPfS_ffS_ii, @function
_Z21pressure_poisson_stepPfS_ffS_ii:
.LFB6595:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z21pressure_poisson_stepPfS_ffS_iiPfS_ffS_ii
	.cfi_endproc
.LFE6595:
	.size	_Z21pressure_poisson_stepPfS_ffS_ii, .-_Z21pressure_poisson_stepPfS_ffS_ii
	.globl	_Z16pressure_poissonPfS_ffS_iii
	.type	_Z16pressure_poissonPfS_ffS_iii, @function
_Z16pressure_poissonPfS_ffS_iii:
.LFB6560:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leal	-1(%r9), %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movslq	%r8d, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r9d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r13, %rbp
	salq	$2, %r13
	imull	%ebp, %eax
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	(%rdi,%r13), %r15
	movq	%rdi, %rbx
	cltq
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	leaq	(%rdi,%rax,4), %rax
	movq	%rsi, 8(%rsp)
	movq	%rdx, 32(%rsp)
	movl	%ecx, 44(%rsp)
	movq	%rax, 16(%rsp)
	movss	%xmm0, 28(%rsp)
	movss	%xmm1, 40(%rsp)
.L52:
	movl	44(%rsp), %eax
	cmpl	%eax, %r14d
	jge	.L65
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$8589934594, %rax
	movl	$1, 64(%rsp)
	movabsq	$137438953504, %rdx
	movq	%rax, %rdi
	movq	%rax, 56(%rsp)
	movq	%rdx, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L53
	movq	8(%rsp), %rsi
	movl	%r12d, %ecx
	movl	%ebp, %edx
	movq	%rbx, %rdi
	call	_Z27__device_stub__Z4copyPfS_iiPfS_ii
.L53:
	movl	76(%rsp), %ecx
	movq	68(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	56(%rsp), %rdi
	movl	64(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	movq	32(%rsp), %rdx
	movss	40(%rsp), %xmm1
	movl	%r12d, %r8d
	movl	%ebp, %ecx
	movss	28(%rsp), %xmm0
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	call	_Z49__device_stub__Z21pressure_poisson_stepPfS_ffS_iiPfS_ffS_ii
.L54:
	call	cudaDeviceSynchronize@PLT
	movq	%r15, %rax
	xorl	%edx, %edx
.L55:
	cmpl	%r12d, %edx
	jge	.L66
	movss	-8(%rax), %xmm0
	incl	%edx
	movss	%xmm0, -4(%rax)
	addq	%r13, %rax
	jmp	.L55
.L66:
	xorl	%eax, %eax
.L57:
	cmpl	%eax, %ebp
	jle	.L67
	movss	(%r15,%rax,4), %xmm0
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	jmp	.L57
.L67:
	movq	%rbx, %rax
	xorl	%edx, %edx
.L59:
	cmpl	%r12d, %edx
	jge	.L68
	movss	4(%rax), %xmm0
	incl	%edx
	movss	%xmm0, (%rax)
	addq	%r13, %rax
	jmp	.L59
.L68:
	xorl	%eax, %eax
.L61:
	cmpl	%eax, %ebp
	jle	.L69
	movq	16(%rsp), %rsi
	movl	$0x00000000, (%rsi,%rax,4)
	incq	%rax
	jmp	.L61
.L69:
	incl	%r14d
	jmp	.L52
.L65:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6560:
	.size	_Z16pressure_poissonPfS_ffS_iii, .-_Z16pressure_poissonPfS_ffS_iii
	.globl	_Z42__device_stub__Z8update_uPfS_S_S_fffffS_iiPfS_S_S_fffffS_ii
	.type	_Z42__device_stub__Z8update_uPfS_S_S_fffffS_iiPfS_S_S_fffffS_ii, @function
_Z42__device_stub__Z8update_uPfS_S_S_fffffS_iiPfS_S_S_fffffS_ii:
.LFB6596:
	.cfi_startproc
	endbr64
	subq	$248, %rsp
	.cfi_def_cfa_offset 256
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, (%rsp)
	movl	%r9d, 8(%rsp)
	movss	%xmm0, 28(%rsp)
	movss	%xmm1, 24(%rsp)
	movss	%xmm2, 20(%rsp)
	movss	%xmm3, 16(%rsp)
	movss	%xmm4, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 200(%rsp)
	movq	%rsp, %rax
	movq	%rax, 208(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 224(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L70
	pushq	80(%rsp)
	.cfi_def_cfa_offset 264
	leaq	_Z8update_uPfS_S_S_fffffS_ii(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 272
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 264
	popq	%rdx
	.cfi_def_cfa_offset 256
.L70:
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L72
	call	__stack_chk_fail@PLT
.L72:
	addq	$248, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6596:
	.size	_Z42__device_stub__Z8update_uPfS_S_S_fffffS_iiPfS_S_S_fffffS_ii, .-_Z42__device_stub__Z8update_uPfS_S_S_fffffS_iiPfS_S_S_fffffS_ii
	.globl	_Z8update_uPfS_S_S_fffffS_ii
	.type	_Z8update_uPfS_S_S_fffffS_ii, @function
_Z8update_uPfS_S_S_fffffS_ii:
.LFB6597:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z8update_uPfS_S_S_fffffS_iiPfS_S_S_fffffS_ii
	.cfi_endproc
.LFE6597:
	.size	_Z8update_uPfS_S_S_fffffS_ii, .-_Z8update_uPfS_S_S_fffffS_ii
	.globl	_Z42__device_stub__Z8update_vPfS_S_S_fffffS_iiPfS_S_S_fffffS_ii
	.type	_Z42__device_stub__Z8update_vPfS_S_S_fffffS_iiPfS_S_S_fffffS_ii, @function
_Z42__device_stub__Z8update_vPfS_S_S_fffffS_iiPfS_S_S_fffffS_ii:
.LFB6598:
	.cfi_startproc
	endbr64
	subq	$248, %rsp
	.cfi_def_cfa_offset 256
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, (%rsp)
	movl	%r9d, 8(%rsp)
	movss	%xmm0, 28(%rsp)
	movss	%xmm1, 24(%rsp)
	movss	%xmm2, 20(%rsp)
	movss	%xmm3, 16(%rsp)
	movss	%xmm4, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 200(%rsp)
	movq	%rsp, %rax
	movq	%rax, 208(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 224(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L75
	pushq	80(%rsp)
	.cfi_def_cfa_offset 264
	leaq	_Z8update_vPfS_S_S_fffffS_ii(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 272
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 264
	popq	%rdx
	.cfi_def_cfa_offset 256
.L75:
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L77
	call	__stack_chk_fail@PLT
.L77:
	addq	$248, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6598:
	.size	_Z42__device_stub__Z8update_vPfS_S_S_fffffS_iiPfS_S_S_fffffS_ii, .-_Z42__device_stub__Z8update_vPfS_S_S_fffffS_iiPfS_S_S_fffffS_ii
	.globl	_Z8update_vPfS_S_S_fffffS_ii
	.type	_Z8update_vPfS_S_S_fffffS_ii, @function
_Z8update_vPfS_S_S_fffffS_ii:
.LFB6599:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z8update_vPfS_S_S_fffffS_iiPfS_S_S_fffffS_ii
	.cfi_endproc
.LFE6599:
	.size	_Z8update_vPfS_S_S_fffffS_ii, .-_Z8update_vPfS_S_S_fffffS_ii
	.globl	_Z16cavity_flow_stepPfS_S_S_fffS_S_S_ffiii
	.type	_Z16cavity_flow_stepPfS_S_S_fffS_S_S_ffiii, @function
_Z16cavity_flow_stepPfS_S_S_fffS_S_S_ffiii:
.LFB6563:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rcx, %r15
	movl	$1, %ecx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r9, %r14
	xorl	%r9d, %r9d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r8, %rbp
	xorl	%r8d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movl	152(%rsp), %eax
	movq	%rdi, (%rsp)
	movabsq	$8589934594, %rdi
	movq	%rsi, 24(%rsp)
	movl	$1, %esi
	movq	144(%rsp), %r13
	movq	%rdx, 8(%rsp)
	movl	160(%rsp), %ebx
	movabsq	$137438953504, %rdx
	movl	%eax, 16(%rsp)
	movl	168(%rsp), %r12d
	movq	%rdi, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rdx, 68(%rsp)
	movl	$1, 76(%rsp)
	movss	%xmm0, 36(%rsp)
	movss	%xmm1, 20(%rsp)
	movss	%xmm2, 32(%rsp)
	movss	%xmm3, 40(%rsp)
	movss	%xmm4, 44(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L81
	movl	16(%rsp), %ecx
	movss	32(%rsp), %xmm3
	movl	%ebx, %r8d
	movq	%r13, %rdi
	movss	20(%rsp), %xmm2
	movq	8(%rsp), %rdx
	movq	(%rsp), %rsi
	movss	36(%rsp), %xmm1
	movss	40(%rsp), %xmm0
	call	_Z40__device_stub__Z10build_up_bPfffS_S_ffiiPfffS_S_ffii
.L81:
	call	cudaDeviceSynchronize@PLT
	movl	16(%rsp), %r8d
	movl	%ebx, %r9d
	movl	%r12d, %ecx
	movss	32(%rsp), %xmm1
	movq	%r13, %rdx
	movq	%r14, %rsi
	movq	%rbp, %rdi
	movss	20(%rsp), %xmm0
	call	_Z16pressure_poissonPfS_ffS_iii
	call	cudaDeviceSynchronize@PLT
	movl	76(%rsp), %ecx
	movl	64(%rsp), %esi
	xorl	%r9d, %r9d
	movq	68(%rsp), %rdx
	movq	56(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L82
	movl	16(%rsp), %edx
	movq	24(%rsp), %rsi
	movl	%ebx, %ecx
	movq	(%rsp), %rdi
	call	_Z27__device_stub__Z4copyPfS_iiPfS_ii
.L82:
	movl	76(%rsp), %ecx
	movq	68(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	56(%rsp), %rdi
	movl	64(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L83
	movl	16(%rsp), %edx
	movq	8(%rsp), %rdi
	movl	%ebx, %ecx
	movq	%r15, %rsi
	call	_Z27__device_stub__Z4copyPfS_iiPfS_ii
.L83:
	movl	76(%rsp), %ecx
	movq	68(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	56(%rsp), %rdi
	movl	64(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L84
	pushq	%rsi
	.cfi_def_cfa_offset 152
	movq	%rbp, %r8
	movq	%r15, %rcx
	pushq	%rbx
	.cfi_def_cfa_offset 160
	movl	32(%rsp), %r9d
	movss	60(%rsp), %xmm4
	movss	56(%rsp), %xmm3
	movss	48(%rsp), %xmm2
	movss	36(%rsp), %xmm1
	movss	52(%rsp), %xmm0
	movq	40(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z42__device_stub__Z8update_uPfS_S_S_fffffS_iiPfS_S_S_fffffS_ii
	popq	%rdi
	.cfi_def_cfa_offset 152
	popq	%r8
	.cfi_def_cfa_offset 144
.L84:
	movl	76(%rsp), %ecx
	movq	68(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	56(%rsp), %rdi
	movl	64(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L85
	pushq	%rax
	.cfi_def_cfa_offset 152
	movq	%r15, %rcx
	movq	%rbp, %r8
	pushq	%rbx
	.cfi_def_cfa_offset 160
	movl	32(%rsp), %r9d
	movss	60(%rsp), %xmm4
	movss	56(%rsp), %xmm3
	movss	48(%rsp), %xmm2
	movss	36(%rsp), %xmm1
	movss	52(%rsp), %xmm0
	movq	40(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z42__device_stub__Z8update_vPfS_S_S_fffffS_iiPfS_S_S_fffffS_ii
	popq	%rdx
	.cfi_def_cfa_offset 152
	popq	%rcx
	.cfi_def_cfa_offset 144
.L85:
	call	cudaDeviceSynchronize@PLT
	movl	16(%rsp), %edx
	movq	8(%rsp), %rsi
	movl	%ebx, %ecx
	movq	(%rsp), %rdi
	call	_Z7boarderPfS_ii
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaDeviceSynchronize@PLT
	.cfi_endproc
.LFE6563:
	.size	_Z16cavity_flow_stepPfS_S_S_fffS_S_S_ffiii, .-_Z16cavity_flow_stepPfS_S_S_fffS_S_S_ffiii
	.globl	_Z11cavity_flowiPfS_S_S_fffS_S_S_ffiii
	.type	_Z11cavity_flowiPfS_S_S_fffS_S_S_ffiii, @function
_Z11cavity_flowiPfS_S_S_fffS_S_S_ffiii:
.LFB6564:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	movq	%r9, %r8
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movss	%xmm0, 4(%rsp)
.L88:
	cmpl	%r14d, %r15d
	jge	.L91
	movl	128(%rsp), %eax
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movq	%r13, %rdi
	incl	%r15d
	pushq	%rax
	.cfi_def_cfa_offset 104
	movl	128(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 112
	movl	128(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 120
	pushq	128(%rsp)
	.cfi_def_cfa_offset 128
	movq	128(%rsp), %r9
	movss	36(%rsp), %xmm0
	movq	%r8, 48(%rsp)
	movss	%xmm4, 60(%rsp)
	movss	%xmm3, 56(%rsp)
	movss	%xmm2, 44(%rsp)
	movss	%xmm1, 40(%rsp)
	call	_Z16cavity_flow_stepPfS_S_S_fffS_S_S_ffiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 96
	movss	28(%rsp), %xmm4
	movss	24(%rsp), %xmm3
	movq	16(%rsp), %r8
	movss	12(%rsp), %xmm2
	movss	8(%rsp), %xmm1
	jmp	.L88
.L91:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6564:
	.size	_Z11cavity_flowiPfS_S_S_fffS_S_S_ffiii, .-_Z11cavity_flowiPfS_S_S_fffS_S_S_ffiii
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB6565:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$1, %edx
	movl	$6724, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rdi
	call	cudaMallocManaged@PLT
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	movl	$6724, %esi
	call	cudaMallocManaged@PLT
	leaq	48(%rsp), %rdi
	movl	$1, %edx
	movl	$6724, %esi
	call	cudaMallocManaged@PLT
	leaq	56(%rsp), %rdi
	movl	$1, %edx
	movl	$6724, %esi
	call	cudaMallocManaged@PLT
	leaq	64(%rsp), %rdi
	movl	$1, %edx
	movl	$6724, %esi
	call	cudaMallocManaged@PLT
	leaq	72(%rsp), %rdi
	movl	$1, %edx
	movl	$6724, %esi
	call	cudaMallocManaged@PLT
	movl	$1, %edx
	movl	$6724, %esi
	leaq	80(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movq	56(%rsp), %rbp
	movq	48(%rsp), %r9
	movl	$164, %esi
	movq	40(%rsp), %rbx
	movq	32(%rsp), %r11
	xorl	%edx, %edx
	xorl	%eax, %eax
.L93:
	leaq	(%rdx,%rbp), %r10
	leaq	(%rsi,%rbx), %r13
	leaq	(%rdx,%rbx), %rcx
	cmpq	%r13, %r10
	leaq	(%rsi,%rbp), %rdi
	movq	%rcx, 8(%rsp)
	setnb	%r15b
	leaq	(%rdx,%r11), %rcx
	leaq	(%rsi,%r9), %r14
	cmpq	%rdi, 8(%rsp)
	movq	%rcx, 16(%rsp)
	leaq	(%rdx,%r9), %r8
	leaq	(%rsi,%r11), %r12
	setnb	%cl
	orl	%ecx, %r15d
	cmpq	%r14, %r10
	setnb	%cl
	cmpq	%rdi, %r8
	setnb	31(%rsp)
	orb	31(%rsp), %cl
	andl	%r15d, %ecx
	cmpq	%rdi, 16(%rsp)
	setnb	%dil
	cmpq	%r12, %r10
	setnb	%r15b
	orl	%r15d, %edi
	andl	%ecx, %edi
	cmpq	%r14, 8(%rsp)
	setnb	%cl
	cmpq	%r13, %r8
	setnb	%r15b
	orl	%r15d, %ecx
	andl	%edi, %ecx
	cmpq	%r14, 16(%rsp)
	setnb	%dil
	cmpq	%r12, %r8
	setnb	%r14b
	orl	%r14d, %edi
	testb	%dil, %cl
	je	.L100
	cmpq	%r13, 16(%rsp)
	setnb	%cl
	cmpq	%r12, 8(%rsp)
	setnb	%dil
	orb	%dil, %cl
	je	.L100
	movl	$41, %ecx
	movq	%r10, %rdi
	rep stosl
	movl	$41, %ecx
	movq	%r8, %rdi
	rep stosl
	movq	8(%rsp), %rdi
	movl	$41, %ecx
	rep stosl
	movq	16(%rsp), %rdi
	movl	$41, %ecx
	rep stosl
.L95:
	addq	$164, %rdx
	addq	$164, %rsi
	cmpq	$6724, %rdx
	jne	.L93
	jmp	.L96
.L100:
	movq	%rdx, %rcx
	xorl	%edi, %edi
.L94:
	incl	%edi
	movl	$0x00000000, 0(%rbp,%rcx)
	movl	$0x00000000, (%r9,%rcx)
	movl	$0x00000000, (%rbx,%rcx)
	movl	$0x00000000, (%r11,%rcx)
	addq	$4, %rcx
	cmpl	$41, %edi
	jne	.L94
	jmp	.L95
.L96:
	movss	.LC4(%rip), %xmm2
	pushq	%rax
	.cfi_def_cfa_offset 168
	movq	%r11, %rsi
	movq	%rbx, %rcx
	pushq	$50
	.cfi_def_cfa_offset 176
	movss	.LC3(%rip), %xmm4
	movl	$700, %edi
	pushq	$41
	.cfi_def_cfa_offset 184
	movss	.LC1(%rip), %xmm3
	movaps	%xmm2, %xmm1
	pushq	$41
	.cfi_def_cfa_offset 192
	movss	.LC5(%rip), %xmm0
	pushq	%rbp
	.cfi_def_cfa_offset 200
	pushq	120(%rsp)
	.cfi_def_cfa_offset 208
	movq	120(%rsp), %r8
	movq	112(%rsp), %rdx
	call	_Z11cavity_flowiPfS_S_S_fffS_S_S_ffiii
	addq	$48, %rsp
	.cfi_def_cfa_offset 160
	call	cudaDeviceSynchronize@PLT
	movq	32(%rsp), %rdi
	movl	$41, %edx
	movl	$41, %esi
	call	_Z7print2dPfii
	movq	40(%rsp), %rdi
	movl	$41, %edx
	movl	$41, %esi
	call	_Z7print2dPfii
	movq	48(%rsp), %rdi
	movl	$41, %edx
	movl	$41, %esi
	call	_Z7print2dPfii
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L99
	call	__stack_chk_fail@PLT
.L99:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6565:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z8update_vPfS_S_S_fffffS_ii"
.LC7:
	.string	"_Z8update_uPfS_S_S_fffffS_ii"
.LC8:
	.string	"_Z21pressure_poisson_stepPfS_ffS_ii"
.LC9:
	.string	"_Z4copyPfS_ii"
.LC10:
	.string	"_Z10build_up_bPfffS_S_ffii"
.LC11:
	.string	"_ZN47_INTERNAL_fa43cb8e_16_navier_stokes_cu_fa0bdc674cuda3std3__419piecewise_constructE"
.LC12:
	.string	"_ZN47_INTERNAL_fa43cb8e_16_navier_stokes_cu_fa0bdc674cuda3std6ranges3__45__cpo4swapE"
.LC13:
	.string	"_ZN47_INTERNAL_fa43cb8e_16_navier_stokes_cu_fa0bdc674cuda3std6ranges3__45__cpo9iter_moveE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB6601:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8update_vPfS_S_S_fffffS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8update_uPfS_S_S_fffffS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z21pressure_poisson_stepPfS_ffS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z4copyPfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10build_up_bPfffS_S_ffii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE6601:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1065353216
	.align 4
.LC3:
	.long	1036831949
	.align 4
.LC4:
	.long	1028443341
	.align 4
.LC5:
	.long	981668463
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <cstdlib>
#include <cstdio>
#include <hip/hip_cooperative_groups.h>

#define P(i, j) ((i) * nx + (j))

void allocate_2d(float *&a, int nx, int ny){
    hipMallocManaged(&a, nx*ny*sizeof(float));
}

__global__  void build_up_b(float *b, float rho, float dt, float *u, float *v, float dx, float dy, int nx, int ny){
    int i = blockIdx.x*blockDim.x + threadIdx.x;
    int j = blockIdx.y*blockDim.y + threadIdx.y;
    if(i < 1 || i >= ny-1 || j < 1 || j >= nx-1){
        return;
    }
    b[P(i, j)] = (
        rho * (
            1 / dt * (
                (
                    u[P(i, j+1)] - u[P(i, j-1)]
                ) / (
                    2 * dx
                ) + (
                    v[P(i+1, j)] - v[P(i-1, j)]
                ) / (
                    2 * dy
                )
            ) - (
                (
                    u[P(i, j+1)] - u[P(i, j-1)]
                ) / (
                    2 * dx
                )
            ) * (
                (
                    u[P(i, j+1)] - u[P(i, j-1)]
                ) / (
                    2 * dx
                )
            ) - 2 * (
                (
                    u[P(i+1, j)] - u[P(i-1, j)]
                ) / (
                    2 * dy
                ) * (
                    v[P(i, j+1)] - v[P(i, j-1)]
                ) / (
                    2 * dx
                )
            ) - (
                (
                    v[P(i+1, j)] - v[P(i-1, j)]
                ) / (
                    2 * dy
                )
            ) * (
                (
                    v[P(i+1, j)] - v[P(i-1, j)]
                ) / (
                    2 * dy
                )
            )
        )
    );
}


__global__ void copy(float *a, float *b, int nx, int ny){
    int i = blockIdx.x*blockDim.x + threadIdx.x;
    int j = blockIdx.y*blockDim.y + threadIdx.y;
    if(i < 0 || i >= ny || j < 0 || j >= nx){
        return;
    }
    b[P(i, j)] = a[P(i, j)];

}


__global__ void pressure_poisson_step(float *p, float *pn, float dx, float dy, float *b, int nx, int ny){
    
    int i = blockIdx.x*blockDim.x + threadIdx.x;
    int j = blockIdx.y*blockDim.y + threadIdx.y;
    if(i < 1 || i >= ny-1 || j < 1 || j >= nx-1){
        return;
    }
    p[P(i, j)] = (
        (
            (
                pn[P(i, j+1)] + pn[P(i, j-1)]
            ) * dy * dy + (
                pn[P(i+1, j)] + pn[P(i-1, j)]
            ) * dx * dx
        ) / (
            2 * (
                dx * dx + dy * dy
            )
        ) - dx * dx * dy * dy / (
            2 * (
                dx * dx + dy * dy
            )
        ) * b[P(i, j)]
    );
}

void pressure_poisson(float *p, float *pn, float dx, float dy, float *b, int nit, int nx, int ny){
    for(int i = 0;i < nit;i++){

        dim3 grid = dim3(2, 2);
        dim3 block = dim3(32, 32);
        copy<<<grid,block>>>(p, pn, nx, ny);
        pressure_poisson_step<<<grid,block>>>(p, pn, dx, dy, b, nx, ny);
        hipDeviceSynchronize();
        for(int i = 0;i < ny;i++){
            p[P(i, nx-1)] = p[P(i, nx-2)];
        }
        for(int i = 0;i < nx;i++){
            p[P(0, i)] = p[P(1, i)];
        }
        for(int i = 0;i < ny;i++){
            p[P(i, 0)] = p[P(i, 1)];
        }
        for(int i = 0;i < nx;i++){
            p[P(ny-1, i)] = 0;
        }

    }
}

__global__ void update_u(float *u, float *v, float *un, float *vn, float dt, float dx, float dy, float rho, float nu, float *p, int nx, int ny){
    int i = blockIdx.x*blockDim.x + threadIdx.x;
    int j = blockIdx.y*blockDim.y + threadIdx.y;
    if(i < 1 || i >= ny-1 || j < 1 || j >= nx-1){
        return;
    }
    u[P(i, j)] = (
        un[P(i, j)] - un[P(i, j)] * dt / dx * (
            un[P(i, j)] - un[P(i, j-1)]
        ) - vn[P(i, j)] * dt / dy * (
            un[P(i, j)] - un[P(i-1, j)]
        ) - dt / (
            2 * rho * dx
        ) * (
            p[P(i, j+1)] - p[P(i, j-1)]
        ) + nu * (
            dt / (dx * dx) * (
                un[P(i, j+1)] - 2 * un[P(i, j)] + un[P(i, j-1)]
            ) + dt / (dy * dy) * (
                un[P(i+1, j)] - 2 * un[P(i, j)] + un[P(i-1, j)]
            )
        )
    );

}

__global__ void update_v(float *u, float *v, float *un, float *vn, float dt, float dx, float dy, float rho, float nu, float *p, int nx, int ny){
    int i = blockIdx.x*blockDim.x + threadIdx.x;
    int j = blockIdx.y*blockDim.y + threadIdx.y;
    if(i < 1 || i >= ny-1 || j < 1 || j >= nx-1){
        return;
    }
    v[P(i, j)] = (
        vn[P(i, j)] - un[P(i, j)] * dt / dx * (
            vn[P(i, j)] - vn[P(i, j-1)]
        ) - vn[P(i, j)] * dt / dy * (
            vn[P(i, j)] - vn[P(i-1, j)]
        ) - dt /  (
            2 * rho * dy
        ) * (
            p[P(i+1, j)] - p[P(i-1, j)]
        ) + nu * (
            dt / (dx * dx) * (
                vn[P(i, j+1)] - 2 * vn[P(i, j)] + vn[P(i, j-1)]
            ) + dt / (dy * dy) * (
                vn[P(i+1, j)] - 2 * vn[P(i, j)] + vn[P(i-1, j)]
            )
        )
    );

}

void boarder(float *u, float *v, int nx, int ny){
    for(int i = 0;i < nx;i++){
        u[P(0, i)] = 0;
    }
    for(int i = 0;i < ny;i++){
        u[P(i, 0)] = 0;
    }
    for(int i = 0;i < ny;i++){
        u[P(i, nx-1)] = 0;
    }
    for(int i = 0;i < nx;i++){
        u[P(ny-1, i)] = 1;
    }
    for(int i = 0;i < nx;i++){
        v[P(0, i)] = 0;
    }
    for(int i = 0;i < nx;i++){
        v[P(ny-1, i)] = 0;
    }
    for(int i = 0;i < ny;i++){
        v[P(i, 0)] = 0;
    }
    for(int i = 0;i < ny;i++){
        v[P(i, nx-1)] = 0;
    }
}

void print2d(float *a, int nx, int ny){
    for(int i = 0;i < ny;i++){
        for(int j = 0;j < nx;j++){
            printf("%g\n", a[P(i, j)]);
        }
    }
}

void cavity_flow_step(float *u, float *un, float *v, float *vn, float dt, float dx, float dy, float *p, float *pn, float *b, float rho, float nu, int nx, int ny, int nit){
    dim3 grid = dim3(2, 2);
    dim3 block = dim3(32, 32);
    build_up_b<<<grid,block>>>(b, rho, dt, u, v, dx, dy, nx, ny);
    hipDeviceSynchronize();
    pressure_poisson(p, pn, dx, dy, b, nit, nx, ny);
    hipDeviceSynchronize();
    copy<<<grid,block>>>(u, un, nx, ny);
    copy<<<grid,block>>>(v, vn, nx, ny);
    update_u<<<grid,block>>>(u, v, un, vn, dt, dx, dy, rho, nu, p, nx, ny);
    update_v<<<grid,block>>>(u, v, un, vn, dt, dx, dy, rho, nu, p, nx, ny);
    hipDeviceSynchronize();
    boarder(u, v, nx, ny);
    hipDeviceSynchronize();
}

void cavity_flow(int nt, float *u, float *un, float *v, float *vn, float dt, float dx, float dy, float *p, float *pn, float *b, float rho, float nu, int nx, int ny, int nit){
    for(int i = 0;i < nt;i++){
        cavity_flow_step(u, un, v, vn, dt, dx, dy, p, pn, b, rho, nu, nx, ny, nit);
    }
}


int main(){
    int nx = 41;
    int ny = 41;
    int nt = 700;
    int nit = 50;
    float cx = 2;
    float cy = 2;
    float dx = cx / (nx - 1);
    float dy = cy / (ny - 1);

    float rho = 1;
    float nu = 0.1;
    float dt = 0.001;
    float *u;
    allocate_2d(u, nx, ny);
    float *v;
    allocate_2d(v, nx, ny);
    float *p;
    allocate_2d(p, nx, ny);
    float *b;
    allocate_2d(b, nx, ny);
    float *un;
    allocate_2d(un, nx, ny);
    float *vn;
    allocate_2d(vn, nx, ny);
    float *pn;
    allocate_2d(pn, nx, ny);

    for(int i = 0;i < ny;i++){
        for(int j = 0;j < nx;j++){
            u[P(i, j)] = v[P(i, j)] = p[P(i, j)] = b[P(i, j)] = 0;
        }
    }
    cavity_flow(nt, u, un, v, vn, dt, dx, dy, p, pn, b, rho, nu, nx, ny, nit);
    hipDeviceSynchronize();
    print2d(u, nx, ny);
    print2d(v, nx, ny);
    print2d(p, nx, ny);
}

	.text
	.file	"navier_stokes.hip"
	.globl	_Z11allocate_2dRPfii            # -- Begin function _Z11allocate_2dRPfii
	.type	_Z11allocate_2dRPfii,@function
_Z11allocate_2dRPfii:                   # @_Z11allocate_2dRPfii
	.cfi_startproc
# %bb.0:
	imull	%edx, %esi
	movslq	%esi, %rsi
	shlq	$2, %rsi
	movl	$1, %edx
	jmp	hipMallocManaged                # TAILCALL
.Lfunc_end0:
	.size	_Z11allocate_2dRPfii, .Lfunc_end0-_Z11allocate_2dRPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__build_up_bPfffS_S_ffii # -- Begin function _Z25__device_stub__build_up_bPfffS_S_ffii
	.type	_Z25__device_stub__build_up_bPfffS_S_ffii,@function
_Z25__device_stub__build_up_bPfffS_S_ffii: # @_Z25__device_stub__build_up_bPfffS_S_ffii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movss	%xmm0, (%rdi)
	leaq	16(%rsp), %r9
	movss	%xmm1, (%r9)
	leaq	48(%rsp), %r10
	movq	%rsi, (%r10)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movss	%xmm2, (%rdx)
	leaq	8(%rsp), %r11
	movss	%xmm3, (%r11)
	leaq	4(%rsp), %r14
	movl	%ecx, (%r14)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%r9, 16(%rbx)
	movq	%r10, 24(%rbx)
	movq	%rsi, 32(%rbx)
	movq	%rdx, 40(%rbx)
	movq	%r11, 48(%rbx)
	movq	%r14, 56(%rbx)
	movq	%rcx, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10build_up_bPfffS_S_ffii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__build_up_bPfffS_S_ffii, .Lfunc_end1-_Z25__device_stub__build_up_bPfffS_S_ffii
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__copyPfS_ii   # -- Begin function _Z19__device_stub__copyPfS_ii
	.type	_Z19__device_stub__copyPfS_ii,@function
_Z19__device_stub__copyPfS_ii:          # @_Z19__device_stub__copyPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4copyPfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z19__device_stub__copyPfS_ii, .Lfunc_end2-_Z19__device_stub__copyPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z36__device_stub__pressure_poisson_stepPfS_ffS_ii # -- Begin function _Z36__device_stub__pressure_poisson_stepPfS_ffS_ii
	.type	_Z36__device_stub__pressure_poisson_stepPfS_ffS_ii,@function
_Z36__device_stub__pressure_poisson_stepPfS_ffS_ii: # @_Z36__device_stub__pressure_poisson_stepPfS_ffS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	20(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	16(%rsp), %r9
	movss	%xmm1, (%r9)
	leaq	40(%rsp), %r10
	movq	%rdx, (%r10)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%r9, 24(%rbx)
	movq	%r10, 32(%rbx)
	movq	%rdx, 40(%rbx)
	movq	%rcx, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21pressure_poisson_stepPfS_ffS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z36__device_stub__pressure_poisson_stepPfS_ffS_ii, .Lfunc_end3-_Z36__device_stub__pressure_poisson_stepPfS_ffS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z16pressure_poissonPfS_ffS_iii # -- Begin function _Z16pressure_poissonPfS_ffS_iii
	.type	_Z16pressure_poissonPfS_ffS_iii,@function
_Z16pressure_poissonPfS_ffS_iii:        # @_Z16pressure_poissonPfS_ffS_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $r9d killed $r9d def $r9
	movq	%r9, 8(%rsp)                    # 8-byte Spill
	movl	%r8d, 4(%rsp)                   # 4-byte Spill
	movq	%rdx, 56(%rsp)                  # 8-byte Spill
	movss	%xmm1, 24(%rsp)                 # 4-byte Spill
	movss	%xmm0, 20(%rsp)                 # 4-byte Spill
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	movq	%rdi, 40(%rsp)                  # 8-byte Spill
	movl	%ecx, 28(%rsp)                  # 4-byte Spill
	testl	%ecx, %ecx
	jle	.LBB4_14
# %bb.1:                                # %.lr.ph87
	movabsq	$137438953504, %rbp             # imm = 0x2000000020
	movabsq	$8589934594, %rbx               # imm = 0x200000002
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leal	-1(%rcx), %eax
	movl	4(%rsp), %edx                   # 4-byte Reload
	imull	%edx, %eax
	movslq	%edx, %r15
	movl	%r15d, %r12d
	cltq
	movq	40(%rsp), %rdx                  # 8-byte Reload
	leaq	(%rdx,%rax,4), %rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	leaq	(,%r12,4), %rax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movl	%ecx, %eax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	leaq	(%rdx,%r15,4), %rax
	addq	$-4, %rax
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	leaq	(%rdx,%r12,4), %r14
	shlq	$2, %r15
	leaq	4(%rdx), %rax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	xorl	%r13d, %r13d
.LBB4_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_16 Depth 2
                                        #     Child Loop BB4_9 Depth 2
                                        #     Child Loop BB4_15 Depth 2
	movq	%r13, 96(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	40(%rsp), %r13                  # 8-byte Reload
	jne	.LBB4_4
# %bb.3:                                #   in Loop: Header=BB4_2 Depth=1
	movq	%r13, %rdi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movl	4(%rsp), %edx                   # 4-byte Reload
	movq	8(%rsp), %rcx                   # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z19__device_stub__copyPfS_ii
.LBB4_4:                                #   in Loop: Header=BB4_2 Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_6
# %bb.5:                                #   in Loop: Header=BB4_2 Depth=1
	movq	%r13, %rdi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movss	20(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	24(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	4(%rsp), %ecx                   # 4-byte Reload
	movq	8(%rsp), %r8                    # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	callq	_Z36__device_stub__pressure_poisson_stepPfS_ffS_ii
.LBB4_6:                                #   in Loop: Header=BB4_2 Depth=1
	callq	hipDeviceSynchronize
	movq	48(%rsp), %rax                  # 8-byte Reload
	movq	88(%rsp), %rcx                  # 8-byte Reload
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	jle	.LBB4_7
.LBB4_16:                               # %.lr.ph
                                        #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	-4(%rcx), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rcx)
	addq	%r15, %rcx
	decq	%rax
	jne	.LBB4_16
.LBB4_7:                                # %.preheader77
                                        #   in Loop: Header=BB4_2 Depth=1
	cmpl	$0, 4(%rsp)                     # 4-byte Folded Reload
	movabsq	$137438953504, %rbp             # imm = 0x2000000020
	movabsq	$8589934594, %rbx               # imm = 0x200000002
	jle	.LBB4_10
# %bb.8:                                # %.lr.ph80.preheader
                                        #   in Loop: Header=BB4_2 Depth=1
	xorl	%eax, %eax
.LBB4_9:                                # %.lr.ph80
                                        #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r14,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r13,%rax,4)
	incq	%rax
	cmpq	%rax, %r12
	jne	.LBB4_9
.LBB4_10:                               # %.preheader76
                                        #   in Loop: Header=BB4_2 Depth=1
	movq	48(%rsp), %rax                  # 8-byte Reload
	movq	80(%rsp), %rcx                  # 8-byte Reload
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	jle	.LBB4_11
.LBB4_15:                               # %.lr.ph82
                                        #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rcx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, -4(%rcx)
	addq	%r15, %rcx
	decq	%rax
	jne	.LBB4_15
.LBB4_11:                               # %.preheader
                                        #   in Loop: Header=BB4_2 Depth=1
	cmpl	$0, 4(%rsp)                     # 4-byte Folded Reload
	movq	96(%rsp), %r13                  # 8-byte Reload
	jle	.LBB4_13
# %bb.12:                               # %.lr.ph84.preheader
                                        #   in Loop: Header=BB4_2 Depth=1
	movq	72(%rsp), %rdi                  # 8-byte Reload
	xorl	%esi, %esi
	movq	64(%rsp), %rdx                  # 8-byte Reload
	callq	memset@PLT
	movabsq	$8589934594, %rbx               # imm = 0x200000002
	movabsq	$137438953504, %rbp             # imm = 0x2000000020
.LBB4_13:                               # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	incl	%r13d
	cmpl	28(%rsp), %r13d                 # 4-byte Folded Reload
	jne	.LBB4_2
.LBB4_14:                               # %._crit_edge88
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z16pressure_poissonPfS_ffS_iii, .Lfunc_end4-_Z16pressure_poissonPfS_ffS_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__update_uPfS_S_S_fffffS_ii # -- Begin function _Z23__device_stub__update_uPfS_S_S_fffffS_ii
	.type	_Z23__device_stub__update_uPfS_S_S_fffffS_ii,@function
_Z23__device_stub__update_uPfS_S_S_fffffS_ii: # @_Z23__device_stub__update_uPfS_S_S_fffffS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$208, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	20(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	16(%rsp), %r10
	movss	%xmm1, (%r10)
	leaq	12(%rsp), %r11
	movss	%xmm2, (%r11)
	leaq	8(%rsp), %r14
	movss	%xmm3, (%r14)
	leaq	4(%rsp), %r15
	movss	%xmm4, (%r15)
	leaq	40(%rsp), %r12
	movq	%r8, (%r12)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r10, 40(%rbx)
	movq	%r11, 48(%rbx)
	movq	%r14, 56(%rbx)
	movq	%r15, 64(%rbx)
	movq	%r12, 72(%rbx)
	movq	%r8, 80(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8update_uPfS_S_S_fffffS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$224, %rsp
	.cfi_adjust_cfa_offset -224
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z23__device_stub__update_uPfS_S_S_fffffS_ii, .Lfunc_end5-_Z23__device_stub__update_uPfS_S_S_fffffS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__update_vPfS_S_S_fffffS_ii # -- Begin function _Z23__device_stub__update_vPfS_S_S_fffffS_ii
	.type	_Z23__device_stub__update_vPfS_S_S_fffffS_ii,@function
_Z23__device_stub__update_vPfS_S_S_fffffS_ii: # @_Z23__device_stub__update_vPfS_S_S_fffffS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$208, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	20(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	16(%rsp), %r10
	movss	%xmm1, (%r10)
	leaq	12(%rsp), %r11
	movss	%xmm2, (%r11)
	leaq	8(%rsp), %r14
	movss	%xmm3, (%r14)
	leaq	4(%rsp), %r15
	movss	%xmm4, (%r15)
	leaq	40(%rsp), %r12
	movq	%r8, (%r12)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r10, 40(%rbx)
	movq	%r11, 48(%rbx)
	movq	%r14, 56(%rbx)
	movq	%r15, 64(%rbx)
	movq	%r12, 72(%rbx)
	movq	%r8, 80(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8update_vPfS_S_S_fffffS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$224, %rsp
	.cfi_adjust_cfa_offset -224
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z23__device_stub__update_vPfS_S_S_fffffS_ii, .Lfunc_end6-_Z23__device_stub__update_vPfS_S_S_fffffS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z7boarderPfS_ii                # -- Begin function _Z7boarderPfS_ii
	.type	_Z7boarderPfS_ii,@function
_Z7boarderPfS_ii:                       # @_Z7boarderPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %r14d
	movl	%edx, %ebp
	movq	%rsi, (%rsp)                    # 8-byte Spill
	movq	%rdi, %r12
	movl	%edx, %r15d
	testl	%edx, %edx
	jle	.LBB7_2
# %bb.1:                                # %.lr.ph.preheader
	leaq	(,%r15,4), %rdx
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB7_2:                                # %.preheader65
	movslq	%ebp, %rsi
	movl	%r14d, %r13d
	testl	%r14d, %r14d
	jle	.LBB7_8
# %bb.3:                                # %.lr.ph68.preheader
	leaq	(,%rsi,4), %rax
	movq	%r13, %rcx
	movq	%r12, %rdx
.LBB7_4:                                # %.lr.ph68
                                        # =>This Inner Loop Header: Depth=1
	movl	$0, (%rdx)
	addq	%rax, %rdx
	decq	%rcx
	jne	.LBB7_4
# %bb.5:                                # %.preheader64
	testl	%r14d, %r14d
	jle	.LBB7_8
# %bb.6:                                # %.lr.ph70
	leaq	(%r12,%rsi,4), %rcx
	addq	$-4, %rcx
	movq	%r13, %rdx
.LBB7_7:                                # =>This Inner Loop Header: Depth=1
	movl	$0, (%rcx)
	addq	%rax, %rcx
	decq	%rdx
	jne	.LBB7_7
.LBB7_8:                                # %.preheader63
	testl	%ebp, %ebp
	jle	.LBB7_13
# %bb.9:                                # %.lr.ph72
	leal	-1(%r14), %eax
	imull	%ebp, %eax
	movslq	%eax, %rbx
	leaq	(%r12,%rbx,4), %rax
	xorl	%ecx, %ecx
.LBB7_10:                               # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rax,%rcx,4)      # imm = 0x3F800000
	incq	%rcx
	cmpq	%rcx, %r15
	jne	.LBB7_10
# %bb.11:                               # %.preheader62
	testl	%ebp, %ebp
	jle	.LBB7_13
# %bb.12:                               # %.lr.ph76
	shlq	$2, %r15
	movq	(%rsp), %r12                    # 8-byte Reload
	movq	%r12, %rdi
	movq	%rsi, %rbp
	xorl	%esi, %esi
	movq	%r15, %rdx
	callq	memset@PLT
	leaq	(%r12,%rbx,4), %rdi
	xorl	%esi, %esi
	movq	%r15, %rdx
	callq	memset@PLT
	movq	%rbp, %rsi
.LBB7_13:                               # %.preheader60
	testl	%r14d, %r14d
	jle	.LBB7_19
# %bb.14:                               # %.lr.ph78.preheader
	leaq	(,%rsi,4), %rax
	movq	%r13, %rcx
	movq	(%rsp), %rdx                    # 8-byte Reload
.LBB7_15:                               # %.lr.ph78
                                        # =>This Inner Loop Header: Depth=1
	movl	$0, (%rdx)
	addq	%rax, %rdx
	decq	%rcx
	jne	.LBB7_15
# %bb.16:                               # %.preheader
	testl	%r14d, %r14d
	jle	.LBB7_19
# %bb.17:                               # %.lr.ph80
	movq	(%rsp), %rcx                    # 8-byte Reload
	leaq	(%rcx,%rsi,4), %rcx
	addq	$-4, %rcx
.LBB7_18:                               # =>This Inner Loop Header: Depth=1
	movl	$0, (%rcx)
	addq	%rax, %rcx
	decq	%r13
	jne	.LBB7_18
.LBB7_19:                               # %._crit_edge
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z7boarderPfS_ii, .Lfunc_end7-_Z7boarderPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z7print2dPfii                  # -- Begin function _Z7print2dPfii
	.type	_Z7print2dPfii,@function
_Z7print2dPfii:                         # @_Z7print2dPfii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	testl	%edx, %edx
	jle	.LBB8_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%esi, %ebx
	movl	%edx, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%esi, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB8_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB8_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB8_2 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%r15d, %r15d
.LBB8_4:                                #   Parent Loop BB8_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r15,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB8_4
.LBB8_5:                                # %._crit_edge
                                        #   in Loop: Header=BB8_2 Depth=1
	incq	%rbp
	addl	%ebx, %r13d
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB8_2
.LBB8_6:                                # %._crit_edge13
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z7print2dPfii, .Lfunc_end8-_Z7print2dPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z16cavity_flow_stepPfS_S_S_fffS_S_S_ffiii # -- Begin function _Z16cavity_flow_stepPfS_S_S_fffS_S_S_ffiii
	.type	_Z16cavity_flow_stepPfS_S_S_fffS_S_S_ffiii,@function
_Z16cavity_flow_stepPfS_S_S_fffS_S_S_ffiii: # @_Z16cavity_flow_stepPfS_S_S_fffS_S_S_ffiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movss	%xmm4, 28(%rsp)                 # 4-byte Spill
	movss	%xmm3, 24(%rsp)                 # 4-byte Spill
	movq	%r9, %rbx
	movq	%r8, %rbp
	movss	%xmm2, 16(%rsp)                 # 4-byte Spill
	movss	%xmm1, 12(%rsp)                 # 4-byte Spill
	movss	%xmm0, 20(%rsp)                 # 4-byte Spill
	movq	%rcx, 40(%rsp)                  # 8-byte Spill
	movq	%rdx, 56(%rsp)                  # 8-byte Spill
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	movq	%rdi, 48(%rsp)                  # 8-byte Spill
	movl	152(%rsp), %r14d
	movl	144(%rsp), %r12d
	movl	136(%rsp), %r15d
	movq	128(%rsp), %r13
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movabsq	$8589934594, %rdi               # imm = 0x200000002
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_2
# %bb.1:
	movq	%r13, %rdi
	movss	24(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	20(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movss	12(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	movss	16(%rsp), %xmm3                 # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	movl	%r15d, %ecx
	movl	%r12d, %r8d
	callq	_Z25__device_stub__build_up_bPfffS_S_ffii
.LBB9_2:
	callq	hipDeviceSynchronize
	movq	%rbp, 64(%rsp)                  # 8-byte Spill
	movq	%rbp, %rdi
	movq	%rbx, %rsi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	16(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movq	%r13, %rdx
	movl	%r14d, %ecx
	movl	%r15d, %r8d
	movl	%r12d, %r9d
	callq	_Z16pressure_poissonPfS_ffS_iii
	callq	hipDeviceSynchronize
	movabsq	$8589934594, %r13               # imm = 0x200000002
	movq	%r13, %rdi
	movl	$1, %esi
	movabsq	$137438953504, %r14             # imm = 0x2000000020
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	48(%rsp), %rbx                  # 8-byte Reload
	movl	%r12d, %ebp
	jne	.LBB9_4
# %bb.3:
	movq	%rbx, %rdi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movl	%r15d, %edx
	movl	%ebp, %ecx
	callq	_Z19__device_stub__copyPfS_ii
.LBB9_4:
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	56(%rsp), %r12                  # 8-byte Reload
	jne	.LBB9_6
# %bb.5:
	movq	%r12, %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movl	%r15d, %edx
	movl	%ebp, %ecx
	callq	_Z19__device_stub__copyPfS_ii
.LBB9_6:
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	%r14, %rdx
	movq	64(%rsp), %r14                  # 8-byte Reload
	jne	.LBB9_8
# %bb.7:
	movl	%ebp, (%rsp)
	movq	%rbx, %rdi
	movq	%r12, %rsi
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movq	40(%rsp), %rcx                  # 8-byte Reload
	movss	20(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	12(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movss	16(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	movss	24(%rsp), %xmm3                 # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	movss	28(%rsp), %xmm4                 # 4-byte Reload
                                        # xmm4 = mem[0],zero,zero,zero
	movq	%r14, %r8
	movl	%r15d, %r9d
	callq	_Z23__device_stub__update_uPfS_S_S_fffffS_ii
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
.LBB9_8:
	movq	%r13, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_10
# %bb.9:
	movl	%ebp, (%rsp)
	movq	%rbx, %rdi
	movq	%r12, %rsi
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movq	40(%rsp), %rcx                  # 8-byte Reload
	movss	20(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	12(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movss	16(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	movss	24(%rsp), %xmm3                 # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	movss	28(%rsp), %xmm4                 # 4-byte Reload
                                        # xmm4 = mem[0],zero,zero,zero
	movq	%r14, %r8
	movl	%r15d, %r9d
	callq	_Z23__device_stub__update_vPfS_S_S_fffffS_ii
.LBB9_10:
	callq	hipDeviceSynchronize
	movq	%rbx, %rdi
	movq	%r12, %rsi
	movl	%r15d, %edx
	movl	%ebp, %ecx
	callq	_Z7boarderPfS_ii
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipDeviceSynchronize            # TAILCALL
.Lfunc_end9:
	.size	_Z16cavity_flow_stepPfS_S_S_fffS_S_S_ffiii, .Lfunc_end9-_Z16cavity_flow_stepPfS_S_S_fffS_S_S_ffiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11cavity_flowiPfS_S_S_fffS_S_S_ffiii # -- Begin function _Z11cavity_flowiPfS_S_S_fffS_S_S_ffiii
	.type	_Z11cavity_flowiPfS_S_S_fffS_S_S_ffiii,@function
_Z11cavity_flowiPfS_S_S_fffS_S_S_ffiii: # @_Z11cavity_flowiPfS_S_S_fffS_S_S_ffiii
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jle	.LBB10_4
# %bb.1:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movl	%edi, %ebp
	movss	%xmm4, 20(%rsp)                 # 4-byte Spill
	movss	%xmm3, 16(%rsp)                 # 4-byte Spill
	movss	%xmm2, 12(%rsp)                 # 4-byte Spill
	movss	%xmm1, 8(%rsp)                  # 4-byte Spill
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
.LBB10_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	8(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movss	12(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	movq	%rbx, %r8
	movq	80(%rsp), %r9
	movss	16(%rsp), %xmm3                 # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	movss	20(%rsp), %xmm4                 # 4-byte Reload
                                        # xmm4 = mem[0],zero,zero,zero
	movl	112(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	112(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	112(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z16cavity_flow_stepPfS_S_S_fffS_S_S_ffiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	decl	%ebp
	jne	.LBB10_2
# %bb.3:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB10_4:                               # %._crit_edge
	retq
.Lfunc_end10:
	.size	_Z11cavity_flowiPfS_S_S_fffS_S_S_ffiii, .Lfunc_end10-_Z11cavity_flowiPfS_S_S_fffS_S_S_ffiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI11_0:
	.long	0x3a83126f                      # float 0.00100000005
.LCPI11_1:
	.long	0x3d4ccccd                      # float 0.0500000007
.LCPI11_2:
	.long	0x3f800000                      # float 1
.LCPI11_3:
	.long	0x3dcccccd                      # float 0.100000001
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	72(%rsp), %r15
	movl	$6724, %esi                     # imm = 0x1A44
	movq	%r15, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	64(%rsp), %r14
	movl	$6724, %esi                     # imm = 0x1A44
	movq	%r14, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	56(%rsp), %rbx
	movl	$6724, %esi                     # imm = 0x1A44
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	80(%rsp), %r12
	movl	$6724, %esi                     # imm = 0x1A44
	movq	%r12, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	48(%rsp), %rdi
	movl	$6724, %esi                     # imm = 0x1A44
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	40(%rsp), %rdi
	movl	$6724, %esi                     # imm = 0x1A44
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	32(%rsp), %rdi
	movl	$6724, %esi                     # imm = 0x1A44
	movl	$1, %edx
	callq	hipMallocManaged
	movq	(%r12), %r11
	movq	(%rbx), %rbx
	movq	(%r14), %r14
	xorl	%eax, %eax
	movq	(%r15), %r12
	movl	$164, %ecx
	movq	%r11, %rdx
	movq	%rbx, %rsi
	movq	%r14, %r15
	movq	%r12, %r8
	xorl	%r9d, %r9d
.LBB11_1:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB11_2 Depth 2
	xorl	%r10d, %r10d
.LBB11_2:                               #   Parent Loop BB11_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%eax, (%rdx,%r10,4)
	movl	%eax, (%rsi,%r10,4)
	movl	%eax, (%r15,%r10,4)
	movl	%eax, (%r8,%r10,4)
	incq	%r10
	cmpq	$41, %r10
	jne	.LBB11_2
# %bb.3:                                #   in Loop: Header=BB11_1 Depth=1
	incq	%r9
	addq	%rcx, %r8
	addq	%rcx, %r15
	addq	%rcx, %rsi
	addq	%rcx, %rdx
	cmpq	$41, %r9
	jne	.LBB11_1
# %bb.4:
	movq	48(%rsp), %rax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	40(%rsp), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	%rbx, 8(%rsp)                   # 8-byte Spill
	movl	$700, %ebx                      # imm = 0x2BC
	movq	32(%rsp), %rbp
	movl	$41, %r13d
.LBB11_5:                               # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movss	.LCPI11_0(%rip), %xmm0          # xmm0 = mem[0],zero,zero,zero
	movss	.LCPI11_1(%rip), %xmm1          # xmm1 = mem[0],zero,zero,zero
	movaps	%xmm1, %xmm2
	movq	8(%rsp), %r8                    # 8-byte Reload
	movq	%rbp, %r9
	movss	.LCPI11_2(%rip), %xmm3          # xmm3 = mem[0],zero,zero,zero
	movss	.LCPI11_3(%rip), %xmm4          # xmm4 = mem[0],zero,zero,zero
	pushq	$50
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	movq	%r11, %r15
	callq	_Z16cavity_flow_stepPfS_S_S_fffS_S_S_ffiii
	movq	%r15, %r11
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	decl	%ebx
	jne	.LBB11_5
# %bb.6:                                # %_Z11cavity_flowiPfS_S_S_fffS_S_S_ffiii.exit
	callq	hipDeviceSynchronize
	xorl	%ebx, %ebx
	movq	72(%rsp), %r14
.LBB11_7:                               # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB11_8 Depth 2
	xorl	%r15d, %r15d
.LBB11_8:                               #   Parent Loop BB11_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r15,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	$41, %r15
	jne	.LBB11_8
# %bb.9:                                # %._crit_edge.i
                                        #   in Loop: Header=BB11_7 Depth=1
	incq	%rbx
	addq	$164, %r14
	cmpq	$41, %rbx
	jne	.LBB11_7
# %bb.10:                               # %_Z7print2dPfii.exit
	movq	64(%rsp), %rbx
	xorl	%r14d, %r14d
.LBB11_11:                              # %.preheader.i54
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB11_12 Depth 2
	xorl	%r15d, %r15d
.LBB11_12:                              #   Parent Loop BB11_11 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r15,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	$41, %r15
	jne	.LBB11_12
# %bb.13:                               # %._crit_edge.i62
                                        #   in Loop: Header=BB11_11 Depth=1
	incq	%r14
	addq	$164, %rbx
	cmpq	$41, %r14
	jne	.LBB11_11
# %bb.14:                               # %_Z7print2dPfii.exit65
	movq	56(%rsp), %rbx
	xorl	%r14d, %r14d
.LBB11_15:                              # %.preheader.i66
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB11_16 Depth 2
	xorl	%r15d, %r15d
.LBB11_16:                              #   Parent Loop BB11_15 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r15,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	$41, %r15
	jne	.LBB11_16
# %bb.17:                               # %._crit_edge.i74
                                        #   in Loop: Header=BB11_15 Depth=1
	incq	%r14
	addq	$164, %rbx
	cmpq	$41, %r14
	jne	.LBB11_15
# %bb.18:                               # %_Z7print2dPfii.exit77
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	main, .Lfunc_end11-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB12_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB12_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10build_up_bPfffS_S_ffii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4copyPfS_ii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21pressure_poisson_stepPfS_ffS_ii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8update_uPfS_S_S_fffffS_ii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8update_vPfS_S_S_fffffS_ii, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end12:
	.size	__hip_module_ctor, .Lfunc_end12-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB13_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB13_2:
	retq
.Lfunc_end13:
	.size	__hip_module_dtor, .Lfunc_end13-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10build_up_bPfffS_S_ffii,@object # @_Z10build_up_bPfffS_S_ffii
	.section	.rodata,"a",@progbits
	.globl	_Z10build_up_bPfffS_S_ffii
	.p2align	3, 0x0
_Z10build_up_bPfffS_S_ffii:
	.quad	_Z25__device_stub__build_up_bPfffS_S_ffii
	.size	_Z10build_up_bPfffS_S_ffii, 8

	.type	_Z4copyPfS_ii,@object           # @_Z4copyPfS_ii
	.globl	_Z4copyPfS_ii
	.p2align	3, 0x0
_Z4copyPfS_ii:
	.quad	_Z19__device_stub__copyPfS_ii
	.size	_Z4copyPfS_ii, 8

	.type	_Z21pressure_poisson_stepPfS_ffS_ii,@object # @_Z21pressure_poisson_stepPfS_ffS_ii
	.globl	_Z21pressure_poisson_stepPfS_ffS_ii
	.p2align	3, 0x0
_Z21pressure_poisson_stepPfS_ffS_ii:
	.quad	_Z36__device_stub__pressure_poisson_stepPfS_ffS_ii
	.size	_Z21pressure_poisson_stepPfS_ffS_ii, 8

	.type	_Z8update_uPfS_S_S_fffffS_ii,@object # @_Z8update_uPfS_S_S_fffffS_ii
	.globl	_Z8update_uPfS_S_S_fffffS_ii
	.p2align	3, 0x0
_Z8update_uPfS_S_S_fffffS_ii:
	.quad	_Z23__device_stub__update_uPfS_S_S_fffffS_ii
	.size	_Z8update_uPfS_S_S_fffffS_ii, 8

	.type	_Z8update_vPfS_S_S_fffffS_ii,@object # @_Z8update_vPfS_S_S_fffffS_ii
	.globl	_Z8update_vPfS_S_S_fffffS_ii
	.p2align	3, 0x0
_Z8update_vPfS_S_S_fffffS_ii:
	.quad	_Z23__device_stub__update_vPfS_S_S_fffffS_ii
	.size	_Z8update_vPfS_S_S_fffffS_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%g\n"
	.size	.L.str, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10build_up_bPfffS_S_ffii"
	.size	.L__unnamed_1, 27

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z4copyPfS_ii"
	.size	.L__unnamed_2, 14

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z21pressure_poisson_stepPfS_ffS_ii"
	.size	.L__unnamed_3, 36

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z8update_uPfS_S_S_fffffS_ii"
	.size	.L__unnamed_4, 29

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z8update_vPfS_S_S_fffffS_ii"
	.size	.L__unnamed_5, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__build_up_bPfffS_S_ffii
	.addrsig_sym _Z19__device_stub__copyPfS_ii
	.addrsig_sym _Z36__device_stub__pressure_poisson_stepPfS_ffS_ii
	.addrsig_sym _Z23__device_stub__update_uPfS_S_S_fffffS_ii
	.addrsig_sym _Z23__device_stub__update_vPfS_S_S_fffffS_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10build_up_bPfffS_S_ffii
	.addrsig_sym _Z4copyPfS_ii
	.addrsig_sym _Z21pressure_poisson_stepPfS_ffS_ii
	.addrsig_sym _Z8update_uPfS_S_S_fffffS_ii
	.addrsig_sym _Z8update_vPfS_S_S_fffffS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10build_up_bPfffS_S_ffii ; -- Begin function _Z10build_up_bPfffS_S_ffii
	.globl	_Z10build_up_bPfffS_S_ffii
	.p2align	8
	.type	_Z10build_up_bPfffS_S_ffii,@function
_Z10build_up_bPfffS_S_ffii:             ; @_Z10build_up_bPfffS_S_ffii
; %bb.0:
	s_load_b32 s2, s[0:1], 0x3c
	v_and_b32_e32 v1, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s14, s3, v[1:2]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e32 0, v2
	s_cbranch_execz .LBB0_3
; %bb.1:
	s_load_b128 s[16:19], s[0:1], 0x20
	v_bfe_u32 v3, v0, 10, 10
	s_lshr_b32 s2, s2, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s15, s2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s19, -1
	s_add_i32 s3, s18, -1
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s2, s3, v0
	v_cmp_lt_i32_e64 s3, 0, v0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_3
; %bb.2:
	v_mul_lo_u32 v11, v2, s18
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v0
	s_lshl_b32 s0, s18, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v11
	v_add_co_u32 v1, vcc_lo, v0, v11
	v_add_co_ci_u32_e32 v2, vcc_lo, v2, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v12, v[7:8], off offset:4
	global_load_b32 v13, v[7:8], off offset:-4
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v12, v12, v13 :: v_dual_add_nc_u32 v3, s18, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s0, v3
	v_add_nc_u32_e32 v3, v3, v0
	v_add_nc_u32_e32 v5, v5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v4, 31, v3
	v_add_nc_u32_e32 v0, v11, v0
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v6, vcc_lo
	v_add_co_u32 v3, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v6, vcc_lo
	s_clause 0x1
	global_load_b32 v7, v[7:8], off
	global_load_b32 v8, v[9:10], off
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[5:6], off
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v5, v[1:2], off offset:4
	global_load_b32 v1, v[1:2], off offset:-4
	v_div_scale_f32 v2, null, s7, s7, 1.0
	v_add_f32_e64 v9, s16, s16
	v_add_f32_e64 v10, s17, s17
	v_div_scale_f32 v13, vcc_lo, 1.0, s7, 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f32_e32 v6, v2
	v_div_scale_f32 v21, s0, v12, v9, v12
	s_waitcnt_depctr 0xfff
	v_fma_f32 v14, -v2, v6, 1.0
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v6, v14, v6 :: v_dual_sub_f32 v7, v7, v8
	v_div_scale_f32 v8, null, v9, v9, v12
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v3, v3, v4
	v_rcp_f32_e32 v14, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_scale_f32 v15, null, v10, v10, v3
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v1, v5, v1
	v_rcp_f32_e32 v18, v15
	s_waitcnt_depctr 0xfff
	v_fma_f32 v20, -v8, v14, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v14, v20, v14
	v_fma_f32 v20, -v15, v18, 1.0
	v_mul_f32_e32 v24, v21, v14
	v_div_scale_f32 v4, null, v10, v10, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v18, v20, v18
	v_div_scale_f32 v23, s1, v7, v10, v7
	v_rcp_f32_e32 v16, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v22, -v4, v16, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v17, v13, v6 :: v_dual_fmac_f32 v16, v22, v16
	v_fma_f32 v19, -v2, v17, v13
	v_div_scale_f32 v22, s2, v3, v10, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v20, v23, v16 :: v_dual_mul_f32 v25, v22, v18
	v_fma_f32 v26, -v4, v20, v23
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v17, v19, v6
	v_fma_f32 v19, -v8, v24, v21
	v_fmac_f32_e32 v20, v26, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f32 v2, -v2, v17, v13
	v_fma_f32 v13, -v15, v25, v22
	v_fmac_f32_e32 v24, v19, v14
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v4, -v4, v20, v23
	v_div_fmas_f32 v2, v2, v6, v17
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v25, v13, v18
	v_fma_f32 v6, -v8, v24, v21
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v2, v2, s7, 1.0
	v_fma_f32 v8, -v15, v25, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v6, v6, v14, v24
	s_mov_b32 vcc_lo, s1
	v_div_fmas_f32 v4, v4, v16, v20
	s_mov_b32 vcc_lo, s2
	v_div_fixup_f32 v6, v6, v9, v12
	v_div_fmas_f32 v8, v8, v18, v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v4, v4, v10, v7
	v_mul_f32_e32 v7, v6, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v3, v8, v10, v3
	v_dual_add_f32 v6, v6, v4 :: v_dual_mul_f32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v2, v2, v6, -v7
	v_div_scale_f32 v3, null, v9, v9, v1
	v_div_scale_f32 v13, vcc_lo, v1, v9, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v3, v5, 1.0
	v_fmac_f32_e32 v5, v8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v13, v5
	v_fma_f32 v14, -v3, v8, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v14, v5
	v_fma_f32 v3, -v3, v8, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v3, v3, v5, v8
	v_div_fixup_f32 v1, v3, v9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v2, -2.0, v1
	v_ashrrev_i32_e32 v1, 31, v0
	v_fma_f32 v2, -v4, v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_mul_f32_e32 v2, s6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10build_up_bPfffS_S_ffii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 27
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10build_up_bPfffS_S_ffii, .Lfunc_end0-_Z10build_up_bPfffS_S_ffii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1036
; NumSgprs: 22
; NumVgprs: 27
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 27
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z4copyPfS_ii           ; -- Begin function _Z4copyPfS_ii
	.globl	_Z4copyPfS_ii
	.p2align	8
	.type	_Z4copyPfS_ii,@function
_Z4copyPfS_ii:                          ; @_Z4copyPfS_ii
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s14, s3, v[3:4]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e32 -1, v1
	s_cbranch_execz .LBB1_3
; %bb.1:
	s_load_b64 s[4:5], s[0:1], 0x10
	v_bfe_u32 v0, v0, 10, 10
	s_lshr_b32 s2, s2, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e64 s3, -1, v2
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, s5, v1
	v_cmp_gt_i32_e64 s2, s4, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB1_3
; %bb.2:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mad_u64_u32 v[3:4], null, v1, s4, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB1_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4copyPfS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z4copyPfS_ii, .Lfunc_end1-_Z4copyPfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 232
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z21pressure_poisson_stepPfS_ffS_ii ; -- Begin function _Z21pressure_poisson_stepPfS_ffS_ii
	.globl	_Z21pressure_poisson_stepPfS_ffS_ii
	.p2align	8
	.type	_Z21pressure_poisson_stepPfS_ffS_ii,@function
_Z21pressure_poisson_stepPfS_ffS_ii:    ; @_Z21pressure_poisson_stepPfS_ffS_ii
; %bb.0:
	s_load_b32 s2, s[0:1], 0x34
	v_and_b32_e32 v1, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s14, s3, v[1:2]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e32 0, v2
	s_cbranch_execz .LBB2_3
; %bb.1:
	s_load_b64 s[12:13], s[0:1], 0x20
	v_bfe_u32 v3, v0, 10, 10
	s_lshr_b32 s2, s2, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s15, s2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s13, -1
	s_add_i32 s3, s12, -1
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s2, s3, v0
	v_cmp_lt_i32_e64 s3, 0, v0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB2_3
; %bb.2:
	v_mul_lo_u32 v7, v2, s12
	s_load_b256 s[4:11], s[0:1], 0x0
	s_lshl_b32 s0, s12, 1
	v_ashrrev_i32_e32 v4, 31, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v2, s12, v7
	v_ashrrev_i32_e32 v6, 31, v7
	v_add_co_u32 v5, vcc_lo, v0, v7
	v_subrev_nc_u32_e32 v3, s0, v2
	v_add_nc_u32_e32 v1, v2, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, v4, v6, vcc_lo
	v_add_nc_u32_e32 v3, v3, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	s_clause 0x3
	global_load_b32 v8, v[1:2], off
	global_load_b32 v4, v[3:4], off
	global_load_b32 v9, v[5:6], off offset:4
	global_load_b32 v5, v[5:6], off offset:-4
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v5, v9, v5 :: v_dual_add_nc_u32 v0, v7, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	v_add_f32_e32 v3, v8, v4
	v_mul_f32_e64 v4, s8, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v3, s8, v3
	v_fma_f32 v6, s9, s9, v4
	v_dual_mul_f32 v4, s9, v4 :: v_dual_mul_f32 v5, s9, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v3, s8, v3 :: v_dual_add_f32 v6, v6, v6
	v_dual_mul_f32 v4, s9, v4 :: v_dual_fmac_f32 v3, s9, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v7, null, v6, v6, v4
	v_div_scale_f32 v5, null, v6, v6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v9, v7
	v_div_scale_f32 v12, vcc_lo, v3, v6, v3
	v_rcp_f32_e32 v8, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v7, v9, 1.0
	v_fma_f32 v10, -v5, v8, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v9, v11, v9 :: v_dual_fmac_f32 v8, v10, v8
	v_div_scale_f32 v10, s0, v4, v6, v4
	v_mul_f32_e32 v11, v12, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v13, v10, v9
	v_fma_f32 v14, -v5, v11, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v15, -v7, v13, v10
	v_fmac_f32_e32 v11, v14, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v13, v15, v9
	v_fma_f32 v5, -v5, v11, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v7, -v7, v13, v10
	v_div_fmas_f32 v5, v5, v8, v11
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v7, v7, v9, v13
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_div_fixup_f32 v3, v5, v6, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v4, v7, v6, v4
	s_waitcnt vmcnt(0)
	v_fma_f32 v2, -v4, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB2_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21pressure_poisson_stepPfS_ffS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z21pressure_poisson_stepPfS_ffS_ii, .Lfunc_end2-_Z21pressure_poisson_stepPfS_ffS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 680
; NumSgprs: 18
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z8update_uPfS_S_S_fffffS_ii ; -- Begin function _Z8update_uPfS_S_S_fffffS_ii
	.globl	_Z8update_uPfS_S_S_fffffS_ii
	.p2align	8
	.type	_Z8update_uPfS_S_S_fffffS_ii,@function
_Z8update_uPfS_S_S_fffffS_ii:           ; @_Z8update_uPfS_S_S_fffffS_ii
; %bb.0:
	s_load_b32 s2, s[0:1], 0x54
	v_and_b32_e32 v1, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s14, s3, v[1:2]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e32 0, v2
	s_cbranch_execz .LBB3_3
; %bb.1:
	s_load_b64 s[12:13], s[0:1], 0x40
	v_bfe_u32 v3, v0, 10, 10
	s_lshr_b32 s2, s2, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s15, s2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s13, -1
	s_add_i32 s3, s12, -1
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s2, s3, v0
	v_cmp_lt_i32_e64 s3, 0, v0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB3_3
; %bb.2:
	v_mul_lo_u32 v8, v2, s12
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x10
	s_load_b64 s[2:3], s[0:1], 0x38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v8, v0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v5, vcc_lo
	v_add_co_u32 v9, vcc_lo, s2, v4
	global_load_b96 v[1:3], v[1:2], off offset:-4
	global_load_b32 v13, v[6:7], off
	v_subrev_nc_u32_e32 v6, s12, v8
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v5, vcc_lo
	s_load_b64 s[6:7], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v6, v0
	v_lshl_add_u32 v7, s12, 1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v12, vcc_lo, s5, v8, vcc_lo
	s_clause 0x1
	global_load_b32 v0, v[9:10], off offset:4
	global_load_b32 v8, v[9:10], off offset:-4
	v_ashrrev_i32_e32 v7, 31, v6
	v_mul_f32_e64 v10, s9, s9
	global_load_b32 v9, v[11:12], off
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_div_scale_f32 v17, s2, s8, v10, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_load_b32 s5, s[0:1], 0x30
	global_load_b32 v6, v[6:7], off
	v_add_f32_e64 v7, s11, s11
	v_div_scale_f32 v12, null, v10, v10, s8
	v_mul_f32_e64 v11, s10, s10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v7, s9, v7
	v_rcp_f32_e32 v16, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v14, null, v11, v11, s8
	v_div_scale_f32 v15, null, v7, v7, s8
	v_div_scale_f32 v18, s3, s8, v11, s8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v19, v14
	v_rcp_f32_e32 v20, v15
	s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v23, -v12, v16, 1.0
	v_div_scale_f32 v22, s4, s8, v7, s8
	v_fmac_f32_e32 v16, v23, v16
	s_waitcnt_depctr 0xfff
	v_fma_f32 v26, -v14, v19, 1.0
	v_fma_f32 v27, -v15, v20, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v19, v26, v19 :: v_dual_mul_f32 v26, v17, v16
	v_fmac_f32_e32 v20, v27, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v31, -v12, v26, v17
	v_mul_f32_e32 v27, v18, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v29, v22, v20
	v_fmac_f32_e32 v26, v31, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v34, -v15, v29, v22
	v_fma_f32 v12, -v12, v26, v17
	s_waitcnt vmcnt(5)
	v_mul_f32_e32 v21, s8, v2
	s_waitcnt vmcnt(4)
	v_mul_f32_e32 v13, s8, v13
	v_fma_f32 v3, -2.0, v2, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_scale_f32 v24, null, s9, s9, v21
	v_div_scale_f32 v25, null, s10, s10, v13
	v_div_scale_f32 v33, vcc_lo, v21, s9, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v28, v24
	v_rcp_f32_e32 v23, v25
	s_waitcnt_depctr 0xfff
	v_fma_f32 v30, -v24, v28, 1.0
	v_fma_f32 v32, -v25, v23, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v28, v30, v28 :: v_dual_fmac_f32 v23, v32, v23
	v_fma_f32 v32, -v14, v27, v18
	v_div_scale_f32 v30, s0, v13, s10, v13
	v_mul_f32_e32 v35, v33, v28
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v0, v0, v8 :: v_dual_mul_f32 v31, v30, v23
	s_waitcnt vmcnt(1)
	v_fmac_f32_e32 v9, -2.0, v2
	v_fmac_f32_e32 v27, v32, v19
	v_fma_f32 v17, -v25, v31, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f32 v14, -v14, v27, v18
	v_sub_f32_e32 v18, v2, v1
	v_fma_f32 v32, -v24, v35, v33
	v_fmac_f32_e32 v31, v17, v23
	v_add_f32_e32 v1, v1, v3
	v_fmac_f32_e32 v29, v34, v20
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v35, v32, v28
	v_fma_f32 v17, -v25, v31, v30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v15, -v15, v29, v22
	v_fma_f32 v8, -v24, v35, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v8, v8, v28, v35
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f32 v17, v17, v23, v31
	s_mov_b32 vcc_lo, s4
	v_div_fixup_f32 v8, v8, s9, v21
	v_div_fmas_f32 v15, v15, v20, v29
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f32 v12, v12, v16, v26
	s_mov_b32 vcc_lo, s3
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v16, v2, v6
	v_add_f32_e32 v6, v6, v9
	v_div_fmas_f32 v14, v14, v19, v27
	v_div_fixup_f32 v9, v17, s10, v13
	v_fma_f32 v2, -v8, v18, v2
	v_div_fixup_f32 v3, v15, v7, s8
	v_div_fixup_f32 v7, v12, v10, s8
	v_div_fixup_f32 v8, v14, v11, s8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v2, -v9, v16, v2
	v_mul_f32_e32 v6, v8, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f32 v2, -v3, v0, v2
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s6, v4
	v_fmac_f32_e32 v6, v7, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_fmac_f32_e32 v2, s5, v6
	global_store_b32 v[0:1], v2, off
.LBB3_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8update_uPfS_S_S_fffffS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 36
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z8update_uPfS_S_S_fffffS_ii, .Lfunc_end3-_Z8update_uPfS_S_S_fffffS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1012
; NumSgprs: 18
; NumVgprs: 36
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 36
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z8update_vPfS_S_S_fffffS_ii ; -- Begin function _Z8update_vPfS_S_S_fffffS_ii
	.globl	_Z8update_vPfS_S_S_fffffS_ii
	.p2align	8
	.type	_Z8update_vPfS_S_S_fffffS_ii,@function
_Z8update_vPfS_S_S_fffffS_ii:           ; @_Z8update_vPfS_S_S_fffffS_ii
; %bb.0:
	s_load_b32 s2, s[0:1], 0x54
	v_and_b32_e32 v1, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s14, s3, v[1:2]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e32 0, v2
	s_cbranch_execz .LBB4_3
; %bb.1:
	s_load_b64 s[8:9], s[0:1], 0x40
	v_bfe_u32 v3, v0, 10, 10
	s_lshr_b32 s2, s2, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s15, s2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s9, -1
	s_add_i32 s3, s8, -1
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s2, s3, v0
	v_cmp_lt_i32_e64 s3, 0, v0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB4_3
; %bb.2:
	v_mul_lo_u32 v8, v2, s8
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v8, v0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v5, vcc_lo
	s_load_b64 s[6:7], s[0:1], 0x38
	global_load_b32 v14, v[1:2], off
	global_load_b96 v[1:3], v[6:7], off offset:-4
	v_subrev_nc_u32_e32 v6, s8, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v6, v0
	v_lshl_add_u32 v8, s8, 1, v6
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v10, vcc_lo, s2, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v11, vcc_lo, s3, v7, vcc_lo
	v_add_co_u32 v12, vcc_lo, s2, v8
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v9, vcc_lo
	s_clause 0x1
	global_load_b32 v0, v[10:11], off
	global_load_b32 v10, v[12:13], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, vcc_lo, s6, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_clause 0x1
	global_load_b32 v8, v[8:9], off
	global_load_b32 v6, v[6:7], off
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x20
	s_load_b32 s6, s[0:1], 0x30
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v11, s10, s10
	v_mul_f32_e64 v9, s9, s9
	v_add_f32_e64 v7, s11, s11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v13, null, v11, v11, s8
	v_mul_f32_e32 v7, s10, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_scale_f32 v12, null, v9, v9, s8
	v_rcp_f32_e32 v19, v13
	v_div_scale_f32 v18, s1, s8, v11, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_rcp_f32_e32 v16, v12
	v_div_scale_f32 v15, null, v7, v7, s8
	v_div_scale_f32 v17, s0, s8, v9, s8
	v_div_scale_f32 v21, s2, s8, v7, s8
	s_waitcnt_depctr 0xfff
	v_fma_f32 v26, -v13, v19, 1.0
	v_rcp_f32_e32 v20, v15
	v_fma_f32 v23, -v12, v16, 1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_fmac_f32 v19, v26, v19 :: v_dual_fmac_f32 v16, v23, v16
	s_waitcnt_depctr 0xfff
	v_fma_f32 v27, -v15, v20, 1.0
	s_waitcnt vmcnt(5)
	v_mul_f32_e32 v14, s8, v14
	s_waitcnt vmcnt(4)
	v_mul_f32_e32 v22, s8, v2
	v_fma_f32 v3, -2.0, v2, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_scale_f32 v24, null, s9, s9, v14
	v_div_scale_f32 v25, null, s10, s10, v22
	v_div_scale_f32 v33, vcc_lo, v14, s9, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v28, v24
	v_rcp_f32_e32 v23, v25
	s_waitcnt_depctr 0xfff
	v_fma_f32 v30, -v24, v28, 1.0
	v_fma_f32 v32, -v25, v23, 1.0
	v_dual_fmac_f32 v20, v27, v20 :: v_dual_mul_f32 v27, v18, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v23, v32, v23
	v_mul_f32_e32 v29, v21, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f32 v32, -v13, v27, v18
	v_fmac_f32_e32 v28, v30, v28
	v_div_scale_f32 v30, s3, v22, s10, v22
	v_dual_mul_f32 v26, v17, v16 :: v_dual_fmac_f32 v27, v32, v19
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v35, v33, v28 :: v_dual_fmac_f32 v10, -2.0, v2
	v_fma_f32 v31, -v12, v26, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v13, -v13, v27, v18
	v_fma_f32 v32, -v24, v35, v33
	v_sub_f32_e32 v18, v2, v1
	v_fma_f32 v34, -v15, v29, v21
	v_dual_fmac_f32 v26, v31, v16 :: v_dual_mul_f32 v31, v30, v23
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v35, v32, v28
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v6, v8, v6 :: v_dual_fmac_f32 v29, v34, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v12, -v12, v26, v17
	v_fma_f32 v17, -v25, v31, v30
	v_fmac_f32_e32 v31, v17, v23
	v_dual_sub_f32 v17, v2, v0 :: v_dual_add_f32 v0, v0, v10
	v_fma_f32 v15, -v15, v29, v21
	v_fma_f32 v21, -v24, v35, v33
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v24, -v25, v31, v30
	v_div_fmas_f32 v21, v21, v28, v35
	s_mov_b32 vcc_lo, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v23, v24, v23, v31
	s_mov_b32 vcc_lo, s2
	v_div_fixup_f32 v14, v21, s9, v14
	v_div_fmas_f32 v15, v15, v20, v29
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f32 v12, v12, v16, v26
	s_mov_b32 vcc_lo, s1
	v_fma_f32 v2, -v14, v18, v2
	v_div_fmas_f32 v13, v13, v19, v27
	v_div_fixup_f32 v7, v15, v7, s8
	v_div_fixup_f32 v8, v12, v9, s8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v10, v13, v11, s8
	v_add_f32_e32 v1, v1, v3
	v_div_fixup_f32 v3, v23, s10, v22
	v_mul_f32_e32 v0, v10, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v2, -v3, v17, v2
	v_fmac_f32_e32 v0, v8, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v2, -v7, v6, v2
	v_fmac_f32_e32 v2, s6, v0
	v_add_co_u32 v0, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v5, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB4_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8update_vPfS_S_S_fffffS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 36
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z8update_vPfS_S_S_fffffS_ii, .Lfunc_end4-_Z8update_vPfS_S_S_fffffS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1040
; NumSgprs: 18
; NumVgprs: 36
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 36
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
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      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
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        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
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        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10build_up_bPfffS_S_ffii
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z10build_up_bPfffS_S_ffii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     27
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
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        .size:           4
        .value_kind:     by_value
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        .size:           4
        .value_kind:     by_value
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        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
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        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
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        .size:           2
        .value_kind:     hidden_group_size_z
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        .size:           2
        .value_kind:     hidden_remainder_x
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        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4copyPfS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4copyPfS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
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        .offset:         0
        .size:           8
        .value_kind:     global_buffer
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        .size:           4
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        .size:           8
        .value_kind:     global_buffer
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        .size:           4
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        .size:           4
        .value_kind:     by_value
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        .size:           4
        .value_kind:     hidden_block_count_x
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        .size:           4
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        .size:           4
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        .value_kind:     hidden_group_size_x
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        .size:           2
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        .size:           2
        .value_kind:     hidden_remainder_x
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        .size:           2
        .value_kind:     hidden_remainder_y
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        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
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        .size:           8
        .value_kind:     hidden_global_offset_z
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        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
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      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21pressure_poisson_stepPfS_ffS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z21pressure_poisson_stepPfS_ffS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
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        .offset:         0
        .size:           8
        .value_kind:     global_buffer
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        .size:           8
        .value_kind:     global_buffer
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        .value_kind:     global_buffer
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        .size:           8
        .value_kind:     global_buffer
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        .size:           4
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        .size:           4
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        .size:           4
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        .size:           4
        .value_kind:     by_value
      - .offset:         68
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        .value_kind:     by_value
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_x
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        .size:           4
        .value_kind:     hidden_block_count_z
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        .size:           2
        .value_kind:     hidden_group_size_x
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        .size:           2
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    .kernarg_segment_align: 8
    .kernarg_segment_size: 328
    .language:       OpenCL C
    .language_version:
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    .max_flat_workgroup_size: 1024
    .name:           _Z8update_uPfS_S_S_fffffS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8update_uPfS_S_S_fffffS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     36
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
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    .language:       OpenCL C
    .language_version:
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      - 0
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    .name:           _Z8update_vPfS_S_S_fffffS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8update_vPfS_S_S_fffffS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     36
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
