// MIT License
// 
// Copyright (c) 2019 Miikka Väisälä
// 
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
// in the Software without restriction, including without limitation the rights
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
// copies of the Software, and to permit persons to whom the Software is
// furnished to do so, subject to the following conditions:
// 
// The above copyright notice and this permission notice shall be included in all
// copies or substantial portions of the Software.
// 
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
// SOFTWARE.



#include <cstdio>
#include <cmath>

#define DEBUG 0 
#define PI 3.14159265

void 
happy_face(float* domain, int idx, float xx, float yy, float zz, float size, 
            float radius1, float radius2)
{
    float rr    = sqrt(xx*xx + yy*yy + zz*zz); 
    float theta = acos(xx/rr) * 180.0/PI;
    float phi   = atan2(yy, zz) * 180.0/PI + 45.0;

    domain[idx] = 1.0;
    
    float rmax = (size/2.0);
    rr = rr/rmax;

    if (rr > radius1) {
        domain[idx] = 0.0;
    } else if (rr < radius2) {
        domain[idx] = 1.0;
    } else {
        if (theta > 40.0 && theta < 80.0) {
            if ((phi > 0.0  && phi < 40.0) || (phi > 50.0  && phi < 90.0)) {
                domain[idx] = 10.0;
            } else {
                domain[idx] = 1.0;
            }
        } else if ((theta > 120.0 && theta < 150.0)) {
            if (phi > 0.0  && phi < 90.0) {
                domain[idx] = 5.0;
            } else {
                domain[idx] = 1.0;
            }
        } else {
            domain[idx] = 1.0;
        } 
    }

#if DEBUG == 1
    if (rr >= radius2 && rr <= radius1)
    printf("SMILE %.3e %.3e %.3e, %1.1f %1.1f, %4.1f %4.1f %4.1f, %1.1f \n", 
                  xx, yy, zz, radius1, radius2,  rr, theta, phi, domain[idx]);
#endif
}

void 
coordinate(int* idx, float* xx, float* yy, float* zz, float* size, 
           int i, int j, int k, int NX, float dx) 
{
    *size = float(NX)*dx;
    float origin = *size/2.0;
    *xx = float(i)*dx - origin;
    *yy = float(j)*dx - origin;
    *zz = float(k)*dx - origin;
    *idx = i + j*NX + k*NX*NX;
}

void 
init_domain(float* domain, float* domain_buffer, int NX, float dx, 
            float radius1, float radius2)
{
    int idx;
    float xx, yy, zz, size;

    //Make the Happy Face
    for (int k=0; k < NX; k++ ) {
        for (int j=0; j < NX; j++ ) {
            for (int i=0; i < NX; i++ ) {
                 coordinate(&idx, &xx, &yy, &zz, &size, i, j, k, NX, dx);
                 happy_face(domain, idx, xx, yy, zz, size, radius1, radius2);
                 domain_buffer[i + j*NX + k*NX*NX] = 0.0;

            }       
        } 
        printf("...%.1f percent", 100.0*float(NX + NX*NX + k*NX*NX)/float(NX*NX*NX));      
    }       
    printf("\n");
}

void 
write_map(float* h_image, int NX, size_t image_size, float angle)
{
   const size_t n = NX*NX;
   
   const char* fname = "happy_face";
   char cstep[10];
   char filename[80] = "\0";
   
   sprintf(cstep, "%d", int(angle));
   
   strcat(filename, fname);
   strcat(filename, "_");
   strcat(filename, cstep);
   strcat(filename, ".map");
   
   printf("Savefile %s \n", filename);
   
   FILE* save_ptr = fopen(filename,"wb");
   
   float write_buf =  (float) angle;
   fwrite(&write_buf, sizeof(float), 1, save_ptr);
   //Map data
   for (size_t i = 0; i < n; ++i) {
       const float point_val = h_image[i];
       float write_buf =  (float) point_val;

       fwrite(&write_buf, sizeof(float), 1, save_ptr);
   }
   printf(" \n ");
   fclose(save_ptr);
   
}



//
//
//
//////////////////////////////////////////////////////
// ALL GPU RELATED PART BELLOW THIS POINT ======>   //
// (Everything above is just auxuliary C code fluff)//
//////////////////////////////////////////////////////
//
//
//


// Swap pointers arround the recycle buffer
void 
swap_pointers(float** aa, float** bb)
{
	float* temp = *aa;
	*aa = *bb;
	*bb = temp;
}

//Tranfer values from the chosed cell. This completely lacks any intertolation,
//so it quite stupid. However, enough for the demo purposes for now. Will
//result in some noticeable graphical errors. 
__device__ int
get_ind_source_stupid(const int ii, const int jj, const int kk, const int NX, 
                      const float stride) 
{
    float radians = stride * PI/180.0;

    float x_tgt = (float(jj)-float(NX)/2)*cos(radians) 
                - (float(kk)-float(NX)/2)*sin(radians);
    float z_tgt = (float(jj)-float(NX)/2)*sin(radians) 
                + (float(kk)-float(NX)/2)*cos(radians);

    int jj_tgt = floor(x_tgt)+NX/2;
    int kk_tgt = floor(z_tgt)+NX/2;

    int ind_source;
    if (jj_tgt >= 0 && jj_tgt < NX && kk_tgt >= 0 && kk_tgt < NX) {
        ind_source = ii + jj_tgt*NX + kk_tgt*NX*NX; 
    } else {
        ind_source = -1.0;
    }

    return ind_source;
}


// Here we rotate the sphere using a GPU. A buffer array is used, because
// otherwise there will be problems with sychronizing the result.
__global__ void 
rotate(float* d_domain, float* d_domain_buffer, const int NX, const float dx, 
       const float stride)
{
    int ii = threadIdx.x + blockIdx.x*blockDim.x;
    int jj = threadIdx.y + blockIdx.y*blockDim.y;
    int kk = threadIdx.z + blockIdx.z*blockDim.z;
    int ind_target = ii + jj*NX + kk*NX*NX; 

    int ind_source;
    ind_source = get_ind_source_stupid(ii, jj, kk, NX, stride);

    if (ind_source >= 0) {
        d_domain_buffer[ind_target] = d_domain[ind_source];
    } else {
	// Zero if trying o access outside of domain bounds. 
        d_domain_buffer[ind_target] = 0.0;
    }

}

// Integrator for the column density. The for loop is needed bacause the depth
// axis of integrated domain is not allocated to a thread index
__device__ void 
integrate_column_density(float* d_domain, float* d_image, const  int ind_pix, 
const int NX, const float dx)
{
    //Assume that the "detector" is initially empty
    d_image[ind_pix] = 0.0; 
    //Integrate in depth. 
    for (int kk = 0; kk<NX; kk++) {
        int ind = ind_pix + kk*NX*NX;
        d_image[ind_pix] += dx*d_domain[ind];
    }
}


// CUDA kernel which organizes the map construction by allocating the correct
// indices and calling the integrator
__global__ void
make_map(float* d_domain, float* d_image, int NX, float dx) 
{
    int ii = threadIdx.x + blockIdx.x*blockDim.x;
    int kk = threadIdx.y + blockIdx.y*blockDim.y;
    int ind_pix = ii + kk*NX; 

    integrate_column_density(d_domain, d_image, ind_pix, NX, dx);
    
}

//////////////////////////////////////////////////////////////
//                                                          //
// DOWNLOAD FROM: https://github.com/miikkavaisala/perkeles //
//                                                          //
//////////////////////////////////////////////////////////////
    
// **BASICS OF GPU PROGRAMMING WITH CUDA**

// 1. Increasing demands of computation require exotic approaches. Graphics
//    processing units (GPUs) are a popular tool for accelerating computation.
//    --> A multi-GPU node can be really compact and affordable for its
//        computing power; assuming you write GPU compatible code (a big issue
//        for most users). 

// 2. Popular uses for GPUs:
//    * Graphics (e.g. almost all computer games.)
//    * Blockchain / Cryptocurrencies (e.g. Dogecoin)
//    * Machine learning (E.g. with Tensorflow)
//    * Radiative transfer. (E.g. this demo here, SOC)
//    * Astronomical data reduction/analysis (??? glCLEAN, FADRA, FATBOY)
//    * Fluid dynamics / MHD (E.g. Astaroth, Fargo3D, Gamer-2)

// 3. GPUs are made for computing a humongous number of floating point
//    operations in parallel.
//    --> Good tool when performance is bound by computation. Bad tool when
//        bound by memory. Some uses are more equal than others. 

// 4. Known API: 
//    * CUDA, by Nvidia (most popular, used here)
//    * OpenCL, by Khronos Group (open standard)
//    * OpenACC, by OpenACC.org (directive based, like OpenMP) 

// 5. Programming GPUs is not that difficult, if you are writing C code anyway.

// 6. Challenges: 
//    * Porting old things takes time - exitisting tool limited.
//    * Debugging is challenging.
//    * For demanding optimizations memory require special attention.


// CODE TIME! 

   
// The main() is run on the HOST, from which the CUDA kernels are called.      
int 
main()
{
    //Define pointers for HOST and DEVICE arrays. 
    float *h_domain, *d_domain;
    float *h_domain_buffer, *d_domain_buffer;
    float *h_image,  *d_image;

    //Domain settings
    float dx = 1.0, radius1 = 0.9, radius2 = 0.6;
    int NX = 512;

    //Rotation settings
    float max_rot = 360.0; //in deg
    float stride  = 1.0;    //deg 

    //Determine the required memory
    size_t domain_size = sizeof(float) * NX*NX*NX;
    size_t image_size  = sizeof(float) *    NX*NX;

    //Integrator thread and block settings
    int  RAD_NumThreads = 16; //MAXIMUM 32 (32^2 = 1024)
    int  RAD_Blocks     = NX/RAD_NumThreads;
    dim3 RAD_threadsPerBlock(RAD_NumThreads, RAD_NumThreads);
    dim3 RAD_numBlocks(RAD_Blocks, RAD_Blocks);

    //Rotatator thread and block settings
    int  ROT_NumThreads = 8; //MAXIMUM 8 (32^2 = 1024)
    int  ROT_Blocks     = NX/ROT_NumThreads;
    dim3 ROT_threadsPerBlock(ROT_NumThreads, ROT_NumThreads, ROT_NumThreads);
    dim3 ROT_numBlocks(ROT_Blocks, ROT_Blocks, ROT_Blocks);

    //To prevent mismatch with threads
    if (NX % RAD_NumThreads != 0) {
        printf("NX should div by RAD_NumThreads! Now %i / %i = %f \n", 
                NX, RAD_NumThreads, float(NX) / float(RAD_NumThreads));
        return 666;  
    }

    if (NX % ROT_NumThreads != 0) {
        printf("NX should div by ROT_NumThreads! Now %i / %i = %f \n", 
                NX, ROT_NumThreads, float(NX) / float(ROT_NumThreads));
        return 666;  
    }

    //Allocate HOST memory 
    h_domain        = (float*)malloc(domain_size);
    h_domain_buffer = (float*)malloc(domain_size);
    h_image         = (float*)malloc(image_size);

    // Init density field on HOST
    // Make the Happy Face
    printf("Making Happy Face... \n");
    init_domain(h_domain, h_domain_buffer, NX, dx, radius1, radius2);
    printf("Happy day! \n");

    //Allocate DEVICE memory
    cudaMalloc(&d_domain,        domain_size);
    cudaMalloc(&d_domain_buffer, domain_size);
    cudaMalloc(&d_image,          image_size);

    //Transfer domain (happy face) to HOST    
    cudaMemcpy(d_domain, h_domain, domain_size, cudaMemcpyHostToDevice);    
    cudaMemcpy(d_domain_buffer, h_domain_buffer, domain_size, cudaMemcpyHostToDevice);    

    float angle = 0.0; 
    while (angle <= max_rot) {
        //Calculate column density
        make_map<<<RAD_numBlocks, RAD_threadsPerBlock>>>(d_domain, d_image, NX, dx); 
	cudaDeviceSynchronize();

        //Send image to host memory
        cudaMemcpy(h_image, d_image, image_size, cudaMemcpyDeviceToHost);    
        cudaDeviceSynchronize();

        //Save result
        write_map(h_image, NX, image_size, angle);

        //Make rotation
        rotate<<<ROT_numBlocks, ROT_threadsPerBlock>>>(d_domain, d_domain_buffer, 
                                                       NX, dx, stride);
        cudaDeviceSynchronize();

        //Swat buffer pointer. 
        swap_pointers(&d_domain, &d_domain_buffer);

        angle += stride;
    }


    //Free allocated gpu DEVICE memory
    cudaFree(d_domain); 
    cudaFree(d_domain_buffer); 
    cudaFree(d_image ); 

    //Free HOST memory
    free(h_domain);
    free(h_image );

    return 0; 
}








	.file	"tmpxft_002e58d4_00000000-6_simple_rt.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2037:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2037:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10happy_facePfiffffff
	.type	_Z10happy_facePfiffffff, @function
_Z10happy_facePfiffffff:
.LFB2027:
	.cfi_startproc
	endbr64
	movaps	%xmm1, %xmm8
	movaps	%xmm2, %xmm1
	movaps	%xmm0, %xmm7
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mulss	%xmm0, %xmm0
	movaps	%xmm8, %xmm2
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbp
	mulss	%xmm8, %xmm2
	movslq	%esi, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 64
	movss	%xmm3, 28(%rsp)
	movss	%xmm4, 4(%rsp)
	addss	%xmm2, %xmm0
	movaps	%xmm1, %xmm2
	movss	%xmm5, 24(%rsp)
	mulss	%xmm1, %xmm2
	movss	%xmm8, 20(%rsp)
	movss	%xmm1, 16(%rsp)
	movss	%xmm7, 8(%rsp)
	addss	%xmm2, %xmm0
	call	sqrtf@PLT
	movss	8(%rsp), %xmm7
	movss	%xmm0, 12(%rsp)
	divss	%xmm0, %xmm7
	movaps	%xmm7, %xmm0
	call	acosf@PLT
	movss	20(%rsp), %xmm8
	movss	16(%rsp), %xmm1
	movss	%xmm0, 8(%rsp)
	movaps	%xmm8, %xmm0
	call	atan2f@PLT
	movss	28(%rsp), %xmm3
	leaq	0(%rbp,%rbx,4), %rax
	xorps	%xmm1, %xmm1
	mulss	.LC4(%rip), %xmm3
	movss	12(%rsp), %xmm6
	divss	%xmm3, %xmm6
	comiss	4(%rsp), %xmm6
	ja	.L3
	movss	24(%rsp), %xmm5
	comiss	%xmm6, %xmm5
	ja	.L36
	movss	8(%rsp), %xmm4
	movsd	.LC6(%rip), %xmm3
	cvtss2sd	%xmm4, %xmm2
	movsd	.LC5(%rip), %xmm4
	mulsd	%xmm4, %xmm2
	divsd	%xmm3, %xmm2
	cvtsd2ss	%xmm2, %xmm2
	comiss	.LC7(%rip), %xmm2
	jbe	.L36
	cvtss2sd	%xmm0, %xmm0
	mulsd	%xmm4, %xmm0
	divsd	%xmm3, %xmm0
	movss	.LC9(%rip), %xmm3
	comiss	%xmm2, %xmm3
	addsd	.LC8(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	jbe	.L31
	comiss	%xmm1, %xmm0
	jbe	.L36
	movss	.LC7(%rip), %xmm2
	movss	.LC2(%rip), %xmm1
	comiss	%xmm0, %xmm2
	ja	.L3
	comiss	.LC10(%rip), %xmm0
	jbe	.L36
	jmp	.L38
.L31:
	comiss	.LC12(%rip), %xmm2
	jbe	.L36
	movss	.LC13(%rip), %xmm3
	comiss	%xmm2, %xmm3
	jbe	.L36
	comiss	%xmm1, %xmm0
	jbe	.L36
	movss	.LC3(%rip), %xmm1
.L38:
	movss	.LC11(%rip), %xmm2
	comiss	%xmm0, %xmm2
	ja	.L3
.L36:
	movss	.LC1(%rip), %xmm1
.L3:
	movss	%xmm1, (%rax)
	addq	$40, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z10happy_facePfiffffff, .-_Z10happy_facePfiffffff
	.globl	_Z10coordinatePiPfS0_S0_S0_iiiif
	.type	_Z10coordinatePiPfS0_S0_S0_iiiif, @function
_Z10coordinatePiPfS0_S0_S0_iiiif:
.LFB2028:
	.cfi_startproc
	endbr64
	movq	%rcx, %r11
	movl	24(%rsp), %ecx
	cvtsi2ssl	%r9d, %xmm2
	movl	8(%rsp), %eax
	movq	%rdx, %r10
	movl	16(%rsp), %edx
	cvtsi2ssl	%ecx, %xmm1
	mulss	%xmm0, %xmm2
	mulss	%xmm0, %xmm1
	movss	%xmm1, (%r8)
	mulss	.LC4(%rip), %xmm1
	subss	%xmm1, %xmm2
	movss	%xmm2, (%rsi)
	cvtsi2ssl	%eax, %xmm2
	imull	%ecx, %eax
	mulss	%xmm0, %xmm2
	addl	%r9d, %eax
	subss	%xmm1, %xmm2
	movss	%xmm2, (%r10)
	cvtsi2ssl	%edx, %xmm2
	imull	%ecx, %edx
	mulss	%xmm0, %xmm2
	imull	%ecx, %edx
	addl	%edx, %eax
	subss	%xmm1, %xmm2
	movss	%xmm2, (%r11)
	movl	%eax, (%rdi)
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z10coordinatePiPfS0_S0_S0_iiiif, .-_Z10coordinatePiPfS0_S0_S0_iiiif
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC15:
	.string	"...%.1f percent"
.LC16:
	.string	"\n"
	.text
	.globl	_Z11init_domainPfS_ifff
	.type	_Z11init_domainPfS_ifff, @function
_Z11init_domainPfS_ifff:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movslq	%edx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r12d, %r14d
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	imull	%r12d, %r14d
	movq	%r12, %rbx
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	movq	%rsi, 48(%rsp)
	movss	%xmm0, 56(%rsp)
	movss	%xmm1, 60(%rsp)
	movss	%xmm2, 72(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leal	(%r12,%r14), %eax
	movl	%eax, 20(%rsp)
	movl	%r12d, %eax
	imull	%r14d, %eax
	movl	%eax, 16(%rsp)
	movslq	%r14d, %rax
	movq	%rax, 32(%rsp)
	leaq	0(,%r12,4), %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movq	%rax, 8(%rsp)
.L42:
	cmpl	%ebx, %r13d
	jge	.L45
	movq	48(%rsp), %rax
	movq	8(%rsp), %rdx
	xorl	%r10d, %r10d
	leaq	116(%rsp), %r8
	leaq	(%rax,%rdx,4), %rax
.L46:
	movl	%r10d, %r11d
	xorl	%ebp, %ebp
.L43:
	movq	%r10, 88(%rsp)
	leaq	112(%rsp), %rcx
	leaq	108(%rsp), %rdx
	movl	%ebp, %r9d
	movq	%rax, 80(%rsp)
	leaq	104(%rsp), %rsi
	leaq	100(%rsp), %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 200
	pushq	%r13
	.cfi_def_cfa_offset 208
	pushq	%r11
	.cfi_def_cfa_offset 216
	movss	80(%rsp), %xmm0
	movl	%r11d, 100(%rsp)
	movq	%r8, 88(%rsp)
	call	_Z10coordinatePiPfS0_S0_S0_iiiif
	movss	96(%rsp), %xmm5
	movss	84(%rsp), %xmm4
	addq	$24, %rsp
	.cfi_def_cfa_offset 192
	movss	116(%rsp), %xmm3
	movss	112(%rsp), %xmm2
	movss	108(%rsp), %xmm1
	movss	104(%rsp), %xmm0
	movl	100(%rsp), %esi
	movq	40(%rsp), %rdi
	call	_Z10happy_facePfiffffff
	movq	80(%rsp), %rax
	movq	64(%rsp), %r8
	movl	76(%rsp), %r11d
	movq	88(%rsp), %r10
	movl	$0x00000000, (%rax,%rbp,4)
	incq	%rbp
	cmpq	%r12, %rbp
	jne	.L43
	movq	24(%rsp), %rcx
	incq	%r10
	addq	%rcx, %rax
	cmpq	%r12, %r10
	jne	.L46
	movl	20(%rsp), %eax
	cvtsi2ssl	16(%rsp), %xmm1
	movl	$2, %edi
	incl	%r13d
	leaq	.LC15(%rip), %rsi
	addl	%r15d, %eax
	addl	%r14d, %r15d
	cvtsi2ssl	%eax, %xmm0
	movb	$1, %al
	cvtss2sd	%xmm1, %xmm1
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LC14(%rip), %xmm0
	divsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movq	32(%rsp), %rcx
	addq	%rcx, 8(%rsp)
	jmp	.L42
.L45:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L47
	call	__stack_chk_fail@PLT
.L47:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	leaq	.LC16(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z11init_domainPfS_ifff, .-_Z11init_domainPfS_ifff
	.section	.rodata.str1.1
.LC17:
	.string	"%d"
.LC18:
	.string	"happy_face"
.LC19:
	.string	"_"
.LC20:
	.string	".map"
.LC21:
	.string	"Savefile %s \n"
.LC22:
	.string	"wb"
.LC23:
	.string	" \n "
	.text
	.globl	_Z9write_mapPfimf
	.type	_Z9write_mapPfimf, @function
_Z9write_mapPfimf:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	imull	%esi, %esi
	movl	$20, %ecx
	movl	$10, %edx
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	cvttss2sil	%xmm0, %r8d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movslq	%esi, %r13
	movl	$2, %esi
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	addq	$-128, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	30(%rsp), %rbp
	leaq	40(%rsp), %rdi
	movss	%xmm0, 12(%rsp)
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %r14
	rep stosl
	leaq	.LC17(%rip), %rcx
	movq	%rbp, %rdi
	call	__sprintf_chk@PLT
	movq	%rbx, %rdi
	movl	$80, %edx
	leaq	.LC18(%rip), %rsi
	call	__strcat_chk@PLT
	movq	%rbx, %rdi
	movl	$80, %edx
	leaq	.LC19(%rip), %rsi
	call	__strcat_chk@PLT
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$80, %edx
	call	__strcat_chk@PLT
	movq	%rbx, %rdi
	movl	$80, %edx
	xorl	%ebp, %ebp
	leaq	.LC20(%rip), %rsi
	call	__strcat_chk@PLT
	movq	%rbx, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC21(%rip), %rsi
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	leaq	.LC22(%rip), %rsi
	call	fopen@PLT
	movss	12(%rsp), %xmm0
	leaq	20(%rsp), %rdi
	movl	$1, %edx
	movq	%rax, %rcx
	movl	$4, %esi
	movq	%rax, %rbx
	movss	%xmm0, 20(%rsp)
	call	fwrite@PLT
.L52:
	cmpq	%r13, %rbp
	jnb	.L56
	movq	%rbx, %rcx
	movl	$1, %edx
	movl	$4, %esi
	movq	%r14, %rdi
	movss	(%r12,%rbp,4), %xmm0
	incq	%rbp
	movss	%xmm0, 24(%rsp)
	call	fwrite@PLT
	jmp	.L52
.L56:
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC23(%rip), %rsi
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	fclose@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L54
	call	__stack_chk_fail@PLT
.L54:
	subq	$-128, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z9write_mapPfimf, .-_Z9write_mapPfimf
	.globl	_Z13swap_pointersPPfS0_
	.type	_Z13swap_pointersPPfS0_, @function
_Z13swap_pointersPPfS0_:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movq	%rdx, (%rdi)
	movq	%rax, (%rsi)
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z13swap_pointersPPfS0_, .-_Z13swap_pointersPPfS0_
	.globl	_Z21get_ind_source_stupidiiiif
	.type	_Z21get_ind_source_stupidiiiif, @function
_Z21get_ind_source_stupidiiiif:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2032:
	.size	_Z21get_ind_source_stupidiiiif, .-_Z21get_ind_source_stupidiiiif
	.globl	_Z24integrate_column_densityPfS_iif
	.type	_Z24integrate_column_densityPfS_iif, @function
_Z24integrate_column_densityPfS_iif:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2033:
	.size	_Z24integrate_column_densityPfS_iif, .-_Z24integrate_column_densityPfS_iif
	.globl	_Z30__device_stub__Z6rotatePfS_iffPfS_iff
	.type	_Z30__device_stub__Z6rotatePfS_iffPfS_iff, @function
_Z30__device_stub__Z6rotatePfS_iffPfS_iff:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movss	%xmm0, 8(%rsp)
	movss	%xmm1, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L62
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6rotatePfS_iff(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L62:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L64
	call	__stack_chk_fail@PLT
.L64:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z30__device_stub__Z6rotatePfS_iffPfS_iff, .-_Z30__device_stub__Z6rotatePfS_iffPfS_iff
	.globl	_Z6rotatePfS_iff
	.type	_Z6rotatePfS_iff, @function
_Z6rotatePfS_iff:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6rotatePfS_iffPfS_iff
	.cfi_endproc
.LFE2060:
	.size	_Z6rotatePfS_iff, .-_Z6rotatePfS_iff
	.globl	_Z31__device_stub__Z8make_mapPfS_ifPfS_if
	.type	_Z31__device_stub__Z8make_mapPfS_ifPfS_if, @function
_Z31__device_stub__Z8make_mapPfS_ifPfS_if:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movss	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L67
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8make_mapPfS_if(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L67:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L69
	call	__stack_chk_fail@PLT
.L69:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z31__device_stub__Z8make_mapPfS_ifPfS_if, .-_Z31__device_stub__Z8make_mapPfS_ifPfS_if
	.globl	_Z8make_mapPfS_if
	.type	_Z8make_mapPfS_if, @function
_Z8make_mapPfS_if:
.LFB2062:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z8make_mapPfS_ifPfS_if
	.cfi_endproc
.LFE2062:
	.size	_Z8make_mapPfS_if, .-_Z8make_mapPfS_if
	.section	.rodata.str1.1
.LC24:
	.string	"Making Happy Face... \n"
.LC27:
	.string	"Happy day! \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$536870912, %edi
	xorl	%r14d, %r14d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$68719476752, %rax
	movl	$1, 32(%rsp)
	movl	$1, 44(%rsp)
	movl	$8, 56(%rsp)
	movl	$64, 68(%rsp)
	movq	%rax, 24(%rsp)
	movabsq	$137438953504, %rax
	movq	%rax, 36(%rsp)
	movabsq	$34359738376, %rax
	movq	%rax, 48(%rsp)
	movabsq	$274877907008, %rax
	movq	%rax, 60(%rsp)
	call	malloc@PLT
	movl	$536870912, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$1048576, %edi
	movq	%rax, %r12
	call	malloc@PLT
	leaq	.LC24(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rbx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$512, %edx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	movss	.LC25(%rip), %xmm2
	movss	.LC26(%rip), %xmm1
	movss	.LC1(%rip), %xmm0
	call	_Z11init_domainPfS_ifff
	leaq	.LC27(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rsp, %rdi
	movl	$536870912, %esi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$536870912, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$1048576, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$536870912, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	movl	$536870912, %edx
	movl	$361, %r12d
	call	cudaMemcpy@PLT
.L75:
	movl	32(%rsp), %ecx
	movq	24(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	36(%rsp), %rdi
	movl	44(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L73
	movq	16(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$512, %edx
	movss	.LC1(%rip), %xmm0
	call	_Z31__device_stub__Z8make_mapPfS_ifPfS_if
.L73:
	call	cudaDeviceSynchronize@PLT
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$1048576, %edx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	movl	$1048576, %edx
	movl	$512, %esi
	movq	%rbx, %rdi
	movd	%r14d, %xmm0
	call	_Z9write_mapPfimf
	movl	56(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	movq	48(%rsp), %rdx
	movq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L74
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$512, %edx
	movss	.LC1(%rip), %xmm1
	movaps	%xmm1, %xmm0
	call	_Z30__device_stub__Z6rotatePfS_iffPfS_iff
.L74:
	call	cudaDeviceSynchronize@PLT
	movd	%r14d, %xmm4
	movq	(%rsp), %rax
	movss	.LC1(%rip), %xmm3
	movq	8(%rsp), %rdi
	addss	%xmm4, %xmm3
	movq	%rax, 8(%rsp)
	movq	%rdi, (%rsp)
	movd	%xmm3, %r14d
	decl	%r12d
	jne	.L75
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L76
	call	__stack_chk_fail@PLT
.L76:
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	main, .-main
	.section	.rodata.str1.1
.LC28:
	.string	"_Z8make_mapPfS_if"
.LC29:
	.string	"_Z6rotatePfS_iff"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2064:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC28(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8make_mapPfS_if(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC29(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6rotatePfS_iff(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2064:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1065353216
	.align 4
.LC2:
	.long	1092616192
	.align 4
.LC3:
	.long	1084227584
	.align 4
.LC4:
	.long	1056964608
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1080459264
	.align 8
.LC6:
	.long	1405670641
	.long	1074340347
	.section	.rodata.cst4
	.align 4
.LC7:
	.long	1109393408
	.section	.rodata.cst8
	.align 8
.LC8:
	.long	0
	.long	1078362112
	.section	.rodata.cst4
	.align 4
.LC9:
	.long	1117782016
	.align 4
.LC10:
	.long	1112014848
	.align 4
.LC11:
	.long	1119092736
	.align 4
.LC12:
	.long	1123024896
	.align 4
.LC13:
	.long	1125515264
	.section	.rodata.cst8
	.align 8
.LC14:
	.long	0
	.long	1079574528
	.section	.rodata.cst4
	.align 4
.LC25:
	.long	1058642330
	.align 4
.LC26:
	.long	1063675494
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// MIT License
// 
// Copyright (c) 2019 Miikka Väisälä
// 
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
// in the Software without restriction, including without limitation the rights
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
// copies of the Software, and to permit persons to whom the Software is
// furnished to do so, subject to the following conditions:
// 
// The above copyright notice and this permission notice shall be included in all
// copies or substantial portions of the Software.
// 
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
// SOFTWARE.




#include <hip/hip_runtime.h>
#include <cstdio>
#include <cmath>

#define DEBUG 0 
#define PI 3.14159265

void 
happy_face(float* domain, int idx, float xx, float yy, float zz, float size, 
            float radius1, float radius2)
{
    float rr    = sqrt(xx*xx + yy*yy + zz*zz); 
    float theta = acos(xx/rr) * 180.0/PI;
    float phi   = atan2(yy, zz) * 180.0/PI + 45.0;

    domain[idx] = 1.0;
    
    float rmax = (size/2.0);
    rr = rr/rmax;

    if (rr > radius1) {
        domain[idx] = 0.0;
    } else if (rr < radius2) {
        domain[idx] = 1.0;
    } else {
        if (theta > 40.0 && theta < 80.0) {
            if ((phi > 0.0  && phi < 40.0) || (phi > 50.0  && phi < 90.0)) {
                domain[idx] = 10.0;
            } else {
                domain[idx] = 1.0;
            }
        } else if ((theta > 120.0 && theta < 150.0)) {
            if (phi > 0.0  && phi < 90.0) {
                domain[idx] = 5.0;
            } else {
                domain[idx] = 1.0;
            }
        } else {
            domain[idx] = 1.0;
        } 
    }

#if DEBUG == 1
    if (rr >= radius2 && rr <= radius1)
    printf("SMILE %.3e %.3e %.3e, %1.1f %1.1f, %4.1f %4.1f %4.1f, %1.1f \n", 
                  xx, yy, zz, radius1, radius2,  rr, theta, phi, domain[idx]);
#endif
}

void 
coordinate(int* idx, float* xx, float* yy, float* zz, float* size, 
           int i, int j, int k, int NX, float dx) 
{
    *size = float(NX)*dx;
    float origin = *size/2.0;
    *xx = float(i)*dx - origin;
    *yy = float(j)*dx - origin;
    *zz = float(k)*dx - origin;
    *idx = i + j*NX + k*NX*NX;
}

void 
init_domain(float* domain, float* domain_buffer, int NX, float dx, 
            float radius1, float radius2)
{
    int idx;
    float xx, yy, zz, size;

    //Make the Happy Face
    for (int k=0; k < NX; k++ ) {
        for (int j=0; j < NX; j++ ) {
            for (int i=0; i < NX; i++ ) {
                 coordinate(&idx, &xx, &yy, &zz, &size, i, j, k, NX, dx);
                 happy_face(domain, idx, xx, yy, zz, size, radius1, radius2);
                 domain_buffer[i + j*NX + k*NX*NX] = 0.0;

            }       
        } 
        printf("...%.1f percent", 100.0*float(NX + NX*NX + k*NX*NX)/float(NX*NX*NX));      
    }       
    printf("\n");
}

void 
write_map(float* h_image, int NX, size_t image_size, float angle)
{
   const size_t n = NX*NX;
   
   const char* fname = "happy_face";
   char cstep[10];
   char filename[80] = "\0";
   
   sprintf(cstep, "%d", int(angle));
   
   strcat(filename, fname);
   strcat(filename, "_");
   strcat(filename, cstep);
   strcat(filename, ".map");
   
   printf("Savefile %s \n", filename);
   
   FILE* save_ptr = fopen(filename,"wb");
   
   float write_buf =  (float) angle;
   fwrite(&write_buf, sizeof(float), 1, save_ptr);
   //Map data
   for (size_t i = 0; i < n; ++i) {
       const float point_val = h_image[i];
       float write_buf =  (float) point_val;

       fwrite(&write_buf, sizeof(float), 1, save_ptr);
   }
   printf(" \n ");
   fclose(save_ptr);
   
}



//
//
//
//////////////////////////////////////////////////////
// ALL GPU RELATED PART BELLOW THIS POINT ======>   //
// (Everything above is just auxuliary C code fluff)//
//////////////////////////////////////////////////////
//
//
//


// Swap pointers arround the recycle buffer
void 
swap_pointers(float** aa, float** bb)
{
	float* temp = *aa;
	*aa = *bb;
	*bb = temp;
}

//Tranfer values from the chosed cell. This completely lacks any intertolation,
//so it quite stupid. However, enough for the demo purposes for now. Will
//result in some noticeable graphical errors. 
__device__ int
get_ind_source_stupid(const int ii, const int jj, const int kk, const int NX, 
                      const float stride) 
{
    float radians = stride * PI/180.0;

    float x_tgt = (float(jj)-float(NX)/2)*cos(radians) 
                - (float(kk)-float(NX)/2)*sin(radians);
    float z_tgt = (float(jj)-float(NX)/2)*sin(radians) 
                + (float(kk)-float(NX)/2)*cos(radians);

    int jj_tgt = floor(x_tgt)+NX/2;
    int kk_tgt = floor(z_tgt)+NX/2;

    int ind_source;
    if (jj_tgt >= 0 && jj_tgt < NX && kk_tgt >= 0 && kk_tgt < NX) {
        ind_source = ii + jj_tgt*NX + kk_tgt*NX*NX; 
    } else {
        ind_source = -1.0;
    }

    return ind_source;
}


// Here we rotate the sphere using a GPU. A buffer array is used, because
// otherwise there will be problems with sychronizing the result.
__global__ void 
rotate(float* d_domain, float* d_domain_buffer, const int NX, const float dx, 
       const float stride)
{
    int ii = threadIdx.x + blockIdx.x*blockDim.x;
    int jj = threadIdx.y + blockIdx.y*blockDim.y;
    int kk = threadIdx.z + blockIdx.z*blockDim.z;
    int ind_target = ii + jj*NX + kk*NX*NX; 

    int ind_source;
    ind_source = get_ind_source_stupid(ii, jj, kk, NX, stride);

    if (ind_source >= 0) {
        d_domain_buffer[ind_target] = d_domain[ind_source];
    } else {
	// Zero if trying o access outside of domain bounds. 
        d_domain_buffer[ind_target] = 0.0;
    }

}

// Integrator for the column density. The for loop is needed bacause the depth
// axis of integrated domain is not allocated to a thread index
__device__ void 
integrate_column_density(float* d_domain, float* d_image, const  int ind_pix, 
const int NX, const float dx)
{
    //Assume that the "detector" is initially empty
    d_image[ind_pix] = 0.0; 
    //Integrate in depth. 
    for (int kk = 0; kk<NX; kk++) {
        int ind = ind_pix + kk*NX*NX;
        d_image[ind_pix] += dx*d_domain[ind];
    }
}


// CUDA kernel which organizes the map construction by allocating the correct
// indices and calling the integrator
__global__ void
make_map(float* d_domain, float* d_image, int NX, float dx) 
{
    int ii = threadIdx.x + blockIdx.x*blockDim.x;
    int kk = threadIdx.y + blockIdx.y*blockDim.y;
    int ind_pix = ii + kk*NX; 

    integrate_column_density(d_domain, d_image, ind_pix, NX, dx);
    
}

//////////////////////////////////////////////////////////////
//                                                          //
// DOWNLOAD FROM: https://github.com/miikkavaisala/perkeles //
//                                                          //
//////////////////////////////////////////////////////////////
    
// **BASICS OF GPU PROGRAMMING WITH CUDA**

// 1. Increasing demands of computation require exotic approaches. Graphics
//    processing units (GPUs) are a popular tool for accelerating computation.
//    --> A multi-GPU node can be really compact and affordable for its
//        computing power; assuming you write GPU compatible code (a big issue
//        for most users). 

// 2. Popular uses for GPUs:
//    * Graphics (e.g. almost all computer games.)
//    * Blockchain / Cryptocurrencies (e.g. Dogecoin)
//    * Machine learning (E.g. with Tensorflow)
//    * Radiative transfer. (E.g. this demo here, SOC)
//    * Astronomical data reduction/analysis (??? glCLEAN, FADRA, FATBOY)
//    * Fluid dynamics / MHD (E.g. Astaroth, Fargo3D, Gamer-2)

// 3. GPUs are made for computing a humongous number of floating point
//    operations in parallel.
//    --> Good tool when performance is bound by computation. Bad tool when
//        bound by memory. Some uses are more equal than others. 

// 4. Known API: 
//    * CUDA, by Nvidia (most popular, used here)
//    * OpenCL, by Khronos Group (open standard)
//    * OpenACC, by OpenACC.org (directive based, like OpenMP) 

// 5. Programming GPUs is not that difficult, if you are writing C code anyway.

// 6. Challenges: 
//    * Porting old things takes time - exitisting tool limited.
//    * Debugging is challenging.
//    * For demanding optimizations memory require special attention.


// CODE TIME! 

   
// The main() is run on the HOST, from which the CUDA kernels are called.      
int 
main()
{
    //Define pointers for HOST and DEVICE arrays. 
    float *h_domain, *d_domain;
    float *h_domain_buffer, *d_domain_buffer;
    float *h_image,  *d_image;

    //Domain settings
    float dx = 1.0, radius1 = 0.9, radius2 = 0.6;
    int NX = 512;

    //Rotation settings
    float max_rot = 360.0; //in deg
    float stride  = 1.0;    //deg 

    //Determine the required memory
    size_t domain_size = sizeof(float) * NX*NX*NX;
    size_t image_size  = sizeof(float) *    NX*NX;

    //Integrator thread and block settings
    int  RAD_NumThreads = 16; //MAXIMUM 32 (32^2 = 1024)
    int  RAD_Blocks     = NX/RAD_NumThreads;
    dim3 RAD_threadsPerBlock(RAD_NumThreads, RAD_NumThreads);
    dim3 RAD_numBlocks(RAD_Blocks, RAD_Blocks);

    //Rotatator thread and block settings
    int  ROT_NumThreads = 8; //MAXIMUM 8 (32^2 = 1024)
    int  ROT_Blocks     = NX/ROT_NumThreads;
    dim3 ROT_threadsPerBlock(ROT_NumThreads, ROT_NumThreads, ROT_NumThreads);
    dim3 ROT_numBlocks(ROT_Blocks, ROT_Blocks, ROT_Blocks);

    //To prevent mismatch with threads
    if (NX % RAD_NumThreads != 0) {
        printf("NX should div by RAD_NumThreads! Now %i / %i = %f \n", 
                NX, RAD_NumThreads, float(NX) / float(RAD_NumThreads));
        return 666;  
    }

    if (NX % ROT_NumThreads != 0) {
        printf("NX should div by ROT_NumThreads! Now %i / %i = %f \n", 
                NX, ROT_NumThreads, float(NX) / float(ROT_NumThreads));
        return 666;  
    }

    //Allocate HOST memory 
    h_domain        = (float*)malloc(domain_size);
    h_domain_buffer = (float*)malloc(domain_size);
    h_image         = (float*)malloc(image_size);

    // Init density field on HOST
    // Make the Happy Face
    printf("Making Happy Face... \n");
    init_domain(h_domain, h_domain_buffer, NX, dx, radius1, radius2);
    printf("Happy day! \n");

    //Allocate DEVICE memory
    hipMalloc(&d_domain,        domain_size);
    hipMalloc(&d_domain_buffer, domain_size);
    hipMalloc(&d_image,          image_size);

    //Transfer domain (happy face) to HOST    
    hipMemcpy(d_domain, h_domain, domain_size, hipMemcpyHostToDevice);    
    hipMemcpy(d_domain_buffer, h_domain_buffer, domain_size, hipMemcpyHostToDevice);    

    float angle = 0.0; 
    while (angle <= max_rot) {
        //Calculate column density
        make_map<<<RAD_numBlocks, RAD_threadsPerBlock>>>(d_domain, d_image, NX, dx); 
	hipDeviceSynchronize();

        //Send image to host memory
        hipMemcpy(h_image, d_image, image_size, hipMemcpyDeviceToHost);    
        hipDeviceSynchronize();

        //Save result
        write_map(h_image, NX, image_size, angle);

        //Make rotation
        rotate<<<ROT_numBlocks, ROT_threadsPerBlock>>>(d_domain, d_domain_buffer, 
                                                       NX, dx, stride);
        hipDeviceSynchronize();

        //Swat buffer pointer. 
        swap_pointers(&d_domain, &d_domain_buffer);

        angle += stride;
    }


    //Free allocated gpu DEVICE memory
    hipFree(d_domain); 
    hipFree(d_domain_buffer); 
    hipFree(d_image ); 

    //Free HOST memory
    free(h_domain);
    free(h_image );

    return 0; 
}








	.text
	.file	"simple_rt.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z10happy_facePfiffffff
.LCPI0_0:
	.quad	0x4066800000000000              # double 180
.LCPI0_1:
	.quad	0x400921fb53c8d4f1              # double 3.1415926500000002
.LCPI0_2:
	.quad	0x4046800000000000              # double 45
.LCPI0_10:
	.long	0x3f800000                      # float 1
	.long	0x40a00000                      # float 5
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI0_3:
	.long	0x3f000000                      # float 0.5
.LCPI0_4:
	.long	0x3f800000                      # float 1
.LCPI0_5:
	.long	0x42200000                      # float 40
.LCPI0_6:
	.long	0x42a00000                      # float 80
.LCPI0_7:
	.long	0x42f00000                      # float 120
.LCPI0_8:
	.long	0x43160000                      # float 150
.LCPI0_9:
	.long	0x42b40000                      # float 90
.LCPI0_11:
	.long	0x41200000                      # float 10
.LCPI0_12:
	.long	0x42480000                      # float 50
	.text
	.globl	_Z10happy_facePfiffffff
	.type	_Z10happy_facePfiffffff,@function
_Z10happy_facePfiffffff:                # @_Z10happy_facePfiffffff
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$40, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	movss	%xmm5, 8(%rsp)                  # 4-byte Spill
	movss	%xmm4, 28(%rsp)                 # 4-byte Spill
	movss	%xmm3, 24(%rsp)                 # 4-byte Spill
	movss	%xmm2, 16(%rsp)                 # 4-byte Spill
	movss	%xmm1, 20(%rsp)                 # 4-byte Spill
	movl	%esi, %ebp
	movq	%rdi, %rbx
	movaps	%xmm0, %xmm4
	mulss	%xmm0, %xmm4
	movaps	%xmm1, %xmm3
	mulss	%xmm1, %xmm3
	addss	%xmm4, %xmm3
	movaps	%xmm2, %xmm1
	mulss	%xmm2, %xmm1
	addss	%xmm3, %xmm1
	sqrtss	%xmm1, %xmm1
	movss	%xmm1, 12(%rsp)                 # 4-byte Spill
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	callq	acos
	movsd	%xmm0, 32(%rsp)                 # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtss2sd	20(%rsp), %xmm0                 # 4-byte Folded Reload
	xorps	%xmm1, %xmm1
	cvtss2sd	16(%rsp), %xmm1                 # 4-byte Folded Reload
	callq	atan2
	movss	12(%rsp), %xmm3                 # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	movss	24(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	mulss	.LCPI0_3(%rip), %xmm1
	divss	%xmm1, %xmm3
	xorps	%xmm2, %xmm2
	ucomiss	28(%rsp), %xmm3                 # 4-byte Folded Reload
	ja	.LBB0_12
# %bb.1:
	movss	.LCPI0_4(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movss	8(%rsp), %xmm2                  # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	ucomiss	%xmm3, %xmm2
	jbe	.LBB0_2
.LBB0_8:
	movaps	%xmm1, %xmm2
.LBB0_12:
	movslq	%ebp, %rax
	movss	%xmm2, (%rbx,%rax,4)
	addq	$40, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB0_2:
	.cfi_def_cfa_offset 64
	movsd	.LCPI0_0(%rip), %xmm3           # xmm3 = mem[0],zero
	movsd	32(%rsp), %xmm2                 # 8-byte Reload
                                        # xmm2 = mem[0],zero
	mulsd	%xmm3, %xmm2
	movsd	.LCPI0_1(%rip), %xmm4           # xmm4 = mem[0],zero
	divsd	%xmm4, %xmm2
	cvtsd2ss	%xmm2, %xmm2
	mulsd	%xmm3, %xmm0
	divsd	%xmm4, %xmm0
	addsd	.LCPI0_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	ucomiss	.LCPI0_5(%rip), %xmm2
	jbe	.LBB0_9
# %bb.3:
	movss	.LCPI0_6(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	ucomiss	%xmm2, %xmm3
	jbe	.LBB0_9
# %bb.4:
	xorps	%xmm2, %xmm2
	ucomiss	%xmm2, %xmm0
	movss	.LCPI0_11(%rip), %xmm2          # xmm2 = mem[0],zero,zero,zero
	jbe	.LBB0_6
# %bb.5:
	movss	.LCPI0_5(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm3
	ja	.LBB0_12
.LBB0_6:
	ucomiss	.LCPI0_12(%rip), %xmm0
	jbe	.LBB0_8
# %bb.7:
	movss	.LCPI0_9(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm3
	ja	.LBB0_12
	jmp	.LBB0_8
.LBB0_9:
	ucomiss	.LCPI0_7(%rip), %xmm2
	jbe	.LBB0_8
# %bb.10:
	movss	.LCPI0_8(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	ucomiss	%xmm2, %xmm3
	movaps	%xmm1, %xmm2
	jbe	.LBB0_12
# %bb.11:
	movss	.LCPI0_9(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorl	%eax, %eax
	ucomiss	%xmm0, %xmm1
	seta	%al
	xorps	%xmm2, %xmm2
	cmpltss	%xmm0, %xmm2
	movss	.LCPI0_10(,%rax,4), %xmm0       # xmm0 = mem[0],zero,zero,zero
	andps	%xmm2, %xmm0
	movss	.LCPI0_4(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	andnps	%xmm1, %xmm2
	orps	%xmm0, %xmm2
	jmp	.LBB0_12
.Lfunc_end0:
	.size	_Z10happy_facePfiffffff, .Lfunc_end0-_Z10happy_facePfiffffff
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z10coordinatePiPfS0_S0_S0_iiiif
.LCPI1_0:
	.long	0x3f000000                      # float 0.5
	.text
	.globl	_Z10coordinatePiPfS0_S0_S0_iiiif
	.type	_Z10coordinatePiPfS0_S0_S0_iiiif,@function
_Z10coordinatePiPfS0_S0_S0_iiiif:       # @_Z10coordinatePiPfS0_S0_S0_iiiif
	.cfi_startproc
# %bb.0:
	movl	8(%rsp), %r10d
	movl	24(%rsp), %eax
	cvtsi2ss	%eax, %xmm1
	mulss	%xmm0, %xmm1
	movss	%xmm1, (%r8)
	mulss	.LCPI1_0(%rip), %xmm1
	cvtsi2ss	%r9d, %xmm2
	mulss	%xmm0, %xmm2
	subss	%xmm1, %xmm2
	cvtsi2ss	%r10d, %xmm3
	movss	%xmm2, (%rsi)
	movl	16(%rsp), %esi
	mulss	%xmm0, %xmm3
	subss	%xmm1, %xmm3
	movss	%xmm3, (%rdx)
	xorps	%xmm2, %xmm2
	cvtsi2ss	%esi, %xmm2
	mulss	%xmm0, %xmm2
	subss	%xmm1, %xmm2
	movss	%xmm2, (%rcx)
	imull	%eax, %esi
	addl	%r10d, %esi
	imull	%eax, %esi
	addl	%r9d, %esi
	movl	%esi, (%rdi)
	retq
.Lfunc_end1:
	.size	_Z10coordinatePiPfS0_S0_S0_iiiif, .Lfunc_end1-_Z10coordinatePiPfS0_S0_S0_iiiif
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z11init_domainPfS_ifff
.LCPI2_0:
	.long	0x3f000000                      # float 0.5
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_1:
	.quad	0x4059000000000000              # double 100
	.text
	.globl	_Z11init_domainPfS_ifff
	.type	_Z11init_domainPfS_ifff,@function
_Z11init_domainPfS_ifff:                # @_Z11init_domainPfS_ifff
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movss	%xmm2, 28(%rsp)                 # 4-byte Spill
	movss	%xmm1, 24(%rsp)                 # 4-byte Spill
                                        # kill: def $edx killed $edx def $rdx
	movq	%rdx, 40(%rsp)                  # 8-byte Spill
	testl	%edx, %edx
	jle	.LBB2_7
# %bb.1:                                # %.preheader38.lr.ph
	movaps	%xmm0, %xmm1
	movq	%rsi, %r14
	movq	%rdi, %r15
	movq	40(%rsp), %rcx                  # 8-byte Reload
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ecx, %xmm0
	movl	%ecx, %r12d
	mulss	%xmm1, %xmm0
	movss	.LCPI2_0(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	movss	%xmm0, 20(%rsp)                 # 4-byte Spill
	mulss	%xmm0, %xmm3
	movl	%ecx, %eax
	imull	%eax, %eax
	leal	(%rax,%rcx), %edx
	movl	%edx, 8(%rsp)                   # 4-byte Spill
	movq	%rax, 56(%rsp)                  # 8-byte Spill
                                        # kill: def $eax killed $eax killed $rax
	imull	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movsd	%xmm0, 48(%rsp)                 # 8-byte Spill
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
	movss	%xmm3, (%rsp)                   # 4-byte Spill
.LBB2_2:                                # %.preheader.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_3 Depth 2
                                        #       Child Loop BB2_4 Depth 3
	movl	%ebp, 12(%rsp)                  # 4-byte Spill
	xorps	%xmm2, %xmm2
	cvtsi2ss	%ebp, %xmm2
	mulss	%xmm1, %xmm2
	subss	%xmm3, %xmm2
	movq	%r13, 64(%rsp)                  # 8-byte Spill
	xorl	%eax, %eax
	movss	%xmm2, 32(%rsp)                 # 4-byte Spill
.LBB2_3:                                # %.preheader
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_4 Depth 3
	movl	%eax, 16(%rsp)                  # 4-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	subss	%xmm3, %xmm0
	movss	%xmm0, 36(%rsp)                 # 4-byte Spill
	xorl	%ebx, %ebx
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        #     Parent Loop BB2_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebx, %xmm0
	mulss	%xmm1, %xmm0
	subss	%xmm3, %xmm0
	leal	(%rbx,%r13), %ebp
	movq	%r15, %rdi
	movl	%ebp, %esi
	movss	36(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movss	20(%rsp), %xmm3                 # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	movss	24(%rsp), %xmm4                 # 4-byte Reload
                                        # xmm4 = mem[0],zero,zero,zero
	movss	28(%rsp), %xmm5                 # 4-byte Reload
                                        # xmm5 = mem[0],zero,zero,zero
	callq	_Z10happy_facePfiffffff
	movss	32(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	movss	(%rsp), %xmm3                   # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	movss	4(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movslq	%ebp, %rax
	movl	$0, (%r14,%rax,4)
	incq	%rbx
	cmpq	%rbx, %r12
	jne	.LBB2_4
# %bb.5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_3 Depth=2
	movl	16(%rsp), %eax                  # 4-byte Reload
	incl	%eax
	addq	%r12, %r13
	cmpl	40(%rsp), %eax                  # 4-byte Folded Reload
	jne	.LBB2_3
# %bb.6:                                # %._crit_edge41
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	56(%rsp), %rbx                  # 8-byte Reload
	movl	%ebx, %eax
	movl	12(%rsp), %ebp                  # 4-byte Reload
	imull	%ebp, %eax
	addl	8(%rsp), %eax                   # 4-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LCPI2_1(%rip), %xmm0
	divsd	48(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movss	(%rsp), %xmm3                   # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	movss	4(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	incl	%ebp
	movq	64(%rsp), %r13                  # 8-byte Reload
	addq	%rbx, %r13
	cmpl	%r12d, %ebp
	jne	.LBB2_2
.LBB2_7:                                # %._crit_edge43
	movl	$10, %edi
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end2:
	.size	_Z11init_domainPfS_ifff, .Lfunc_end2-_Z11init_domainPfS_ifff
	.cfi_endproc
                                        # -- End function
	.globl	_Z9write_mapPfimf               # -- Begin function _Z9write_mapPfimf
	.type	_Z9write_mapPfimf,@function
_Z9write_mapPfimf:                      # @_Z9write_mapPfimf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	movl	%esi, %ebx
	movq	%rdi, %r14
	xorps	%xmm1, %xmm1
	leaq	32(%rsp), %r15
	movaps	%xmm1, 64(%r15)
	movaps	%xmm1, 48(%r15)
	movaps	%xmm1, 32(%r15)
	movaps	%xmm1, 16(%r15)
	movaps	%xmm1, (%r15)
	cvttss2si	%xmm0, %edx
	leaq	22(%rsp), %r12
	movl	$.L.str.3, %esi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	sprintf
	movq	%r15, %rdi
	callq	strlen@PLT
	movabsq	$7018402044485591400, %rcx      # imm = 0x61665F7970706168
	movq	%rcx, 32(%rsp,%rax)
	movl	$6644577, 39(%rsp,%rax)         # imm = 0x656361
	movq	%r15, %rdi
	callq	strlen@PLT
	movw	$95, 32(%rsp,%rax)
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	strcat
	movq	%r15, %rdi
	callq	strlen@PLT
	movl	$1885433134, 32(%rsp,%rax)      # imm = 0x70616D2E
	movb	$0, 36(%rsp,%rax)
	movl	$.L.str.6, %edi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.7, %esi
	movq	%r15, %rdi
	callq	fopen
	movq	%rax, %r15
	leaq	16(%rsp), %rdi
	movss	8(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rdi)
	movl	$4, %esi
	movl	$1, %edx
	movq	%rax, %rcx
	callq	fwrite
	testl	%ebx, %ebx
	je	.LBB3_3
# %bb.1:                                # %.lr.ph.preheader
	imull	%ebx, %ebx
	cmpl	$1, %ebx
	adcl	$0, %ebx
	xorl	%r13d, %r13d
	leaq	12(%rsp), %r12
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r14,%r13,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 12(%rsp)
	movl	$4, %esi
	movl	$1, %edx
	movq	%r12, %rdi
	movq	%r15, %rcx
	callq	fwrite
	incq	%r13
	cmpq	%r13, %rbx
	jne	.LBB3_2
.LBB3_3:                                # %._crit_edge
	movl	$.L.str.8, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%r15, %rdi
	callq	fclose
	addq	$112, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z9write_mapPfimf, .Lfunc_end3-_Z9write_mapPfimf
	.cfi_endproc
                                        # -- End function
	.globl	_Z13swap_pointersPPfS0_         # -- Begin function _Z13swap_pointersPPfS0_
	.type	_Z13swap_pointersPPfS0_,@function
_Z13swap_pointersPPfS0_:                # @_Z13swap_pointersPPfS0_
	.cfi_startproc
# %bb.0:
	movq	(%rdi), %rax
	movq	(%rsi), %rcx
	movq	%rcx, (%rdi)
	movq	%rax, (%rsi)
	retq
.Lfunc_end4:
	.size	_Z13swap_pointersPPfS0_, .Lfunc_end4-_Z13swap_pointersPPfS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__rotatePfS_iff # -- Begin function _Z21__device_stub__rotatePfS_iff
	.type	_Z21__device_stub__rotatePfS_iff,@function
_Z21__device_stub__rotatePfS_iff:       # @_Z21__device_stub__rotatePfS_iff
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	4(%rsp), %rdi
	movss	%xmm1, (%rdi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rdi, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6rotatePfS_iff, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z21__device_stub__rotatePfS_iff, .Lfunc_end5-_Z21__device_stub__rotatePfS_iff
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__make_mapPfS_if # -- Begin function _Z23__device_stub__make_mapPfS_if
	.type	_Z23__device_stub__make_mapPfS_if,@function
_Z23__device_stub__make_mapPfS_if:      # @_Z23__device_stub__make_mapPfS_if
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8make_mapPfS_if, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z23__device_stub__make_mapPfS_if, .Lfunc_end6-_Z23__device_stub__make_mapPfS_if
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI7_0:
	.long	0x3f800000                      # float 1
.LCPI7_1:
	.long	0x3f666666                      # float 0.899999976
.LCPI7_2:
	.long	0x3f19999a                      # float 0.600000024
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$536870912, %edi                # imm = 0x20000000
	callq	malloc
	movq	%rax, %rbx
	movl	$536870912, %edi                # imm = 0x20000000
	callq	malloc
	movq	%rax, %r15
	movl	$1048576, %edi                  # imm = 0x100000
	callq	malloc
	movq	%rax, %r14
	movl	$.Lstr, %edi
	callq	puts@PLT
	movss	.LCPI7_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movss	.LCPI7_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movss	.LCPI7_2(%rip), %xmm2           # xmm2 = mem[0],zero,zero,zero
	movq	%rbx, %rdi
	movq	%r15, %rsi
	movl	$512, %edx                      # imm = 0x200
	callq	_Z11init_domainPfS_ifff
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	leaq	8(%rsp), %r12
	movl	$536870912, %esi                # imm = 0x20000000
	movq	%r12, %rdi
	callq	hipMalloc
	movq	%rsp, %r13
	movl	$536870912, %esi                # imm = 0x20000000
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$1048576, %esi                  # imm = 0x100000
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$536870912, %edx                # imm = 0x20000000
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$536870912, %edx                # imm = 0x20000000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	xorl	%ebx, %ebx
	movabsq	$137438953504, %r15             # imm = 0x2000000020
	movabsq	$68719476752, %r12              # imm = 0x1000000010
	movabsq	$274877907008, %r13             # imm = 0x4000000040
	movabsq	$34359738376, %rbp              # imm = 0x800000008
.LBB7_1:                                # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_3
# %bb.2:                                #   in Loop: Header=BB7_1 Depth=1
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$512, %edx                      # imm = 0x200
	movss	.LCPI7_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z23__device_stub__make_mapPfS_if
.LBB7_3:                                #   in Loop: Header=BB7_1 Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebx, %xmm0
	movss	%xmm0, 28(%rsp)                 # 4-byte Spill
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	movq	%r14, %rdi
	movl	$512, %esi                      # imm = 0x200
	movss	28(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	callq	_Z9write_mapPfimf
	movq	%r13, %rdi
	movl	$64, %esi
	movq	%rbp, %rdx
	movl	$8, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_5
# %bb.4:                                #   in Loop: Header=BB7_1 Depth=1
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$512, %edx                      # imm = 0x200
	movss	.LCPI7_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movaps	%xmm0, %xmm1
	callq	_Z21__device_stub__rotatePfS_iff
.LBB7_5:                                #   in Loop: Header=BB7_1 Depth=1
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rax
	movq	(%rsp), %rdi
	movq	%rdi, 8(%rsp)
	movq	%rax, (%rsp)
	incl	%ebx
	cmpl	$361, %ebx                      # imm = 0x169
	jne	.LBB7_1
# %bb.6:
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r14, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6rotatePfS_iff, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8make_mapPfS_if, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"...%.1f percent"
	.size	.L.str, 16

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"happy_face"
	.size	.L.str.2, 11

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%d"
	.size	.L.str.3, 3

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	".map"
	.size	.L.str.5, 5

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Savefile %s \n"
	.size	.L.str.6, 14

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"wb"
	.size	.L.str.7, 3

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	" \n "
	.size	.L.str.8, 4

	.type	_Z6rotatePfS_iff,@object        # @_Z6rotatePfS_iff
	.section	.rodata,"a",@progbits
	.globl	_Z6rotatePfS_iff
	.p2align	3, 0x0
_Z6rotatePfS_iff:
	.quad	_Z21__device_stub__rotatePfS_iff
	.size	_Z6rotatePfS_iff, 8

	.type	_Z8make_mapPfS_if,@object       # @_Z8make_mapPfS_if
	.globl	_Z8make_mapPfS_if
	.p2align	3, 0x0
_Z8make_mapPfS_if:
	.quad	_Z23__device_stub__make_mapPfS_if
	.size	_Z8make_mapPfS_if, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z6rotatePfS_iff"
	.size	.L__unnamed_1, 17

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z8make_mapPfS_if"
	.size	.L__unnamed_2, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Making Happy Face... "
	.size	.Lstr, 22

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Happy day! "
	.size	.Lstr.1, 12

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__rotatePfS_iff
	.addrsig_sym _Z23__device_stub__make_mapPfS_if
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6rotatePfS_iff
	.addrsig_sym _Z8make_mapPfS_if
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6rotatePfS_iff        ; -- Begin function _Z6rotatePfS_iff
	.globl	_Z6rotatePfS_iff
	.p2align	8
	.type	_Z6rotatePfS_iff,@function
_Z6rotatePfS_iff:                       ; @_Z6rotatePfS_iff
; %bb.0:
	s_load_b32 s2, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	v_cvt_f64_f32_e32 v[1:2], s2
	s_mov_b32 s2, 0x53c8d4f1
	s_mov_b32 s3, 0x400921fb
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_f64 v[1:2], v[1:2], s[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[3:4], null, 0x40668000, 0x40668000, v[1:2]
	v_rcp_f64_e32 v[5:6], v[3:4]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[7:8], -v[3:4], v[5:6], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], v[5:6], v[7:8], v[5:6]
	v_fma_f64 v[7:8], -v[3:4], v[5:6], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], v[5:6], v[7:8], v[5:6]
	v_div_scale_f64 v[7:8], vcc_lo, v[1:2], 0x40668000, v[1:2]
	v_mul_f64 v[9:10], v[7:8], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[3:4], -v[3:4], v[9:10], v[7:8]
	v_div_fmas_f64 v[3:4], v[3:4], v[5:6], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[1:2], v[3:4], 0x40668000, v[1:2]
	v_cvt_f32_f64_e32 v5, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_ngt_f32_e64 s2, 0x48000000, |v5|
	v_readfirstlane_b32 s3, v5
	s_and_b32 vcc_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1)
	s_bitset0_b32 s3, 31
	s_cbranch_vccz .LBB0_2
; %bb.1:
	s_and_b32 s4, s3, 0x7fffff
	s_lshr_b32 s5, s3, 23
	s_bitset1_b32 s4, 23
	s_addk_i32 s5, 0xff88
	s_mul_hi_u32 s6, s4, 0xfe5163ab
	s_mul_i32 s7, s4, 0x3c439041
	s_mul_hi_u32 s8, s4, 0x3c439041
	s_add_u32 s6, s6, s7
	s_addc_u32 s7, 0, s8
	s_mul_i32 s8, s4, 0xdb629599
	s_mul_hi_u32 s9, s4, 0xdb629599
	s_add_u32 s7, s7, s8
	s_addc_u32 s8, 0, s9
	s_mul_i32 s9, s4, 0xf534ddc0
	s_mul_hi_u32 s10, s4, 0xf534ddc0
	s_add_u32 s8, s8, s9
	s_addc_u32 s9, 0, s10
	s_mul_i32 s10, s4, 0xfc2757d1
	s_mul_hi_u32 s11, s4, 0xfc2757d1
	s_add_u32 s9, s9, s10
	s_addc_u32 s10, 0, s11
	s_mul_i32 s11, s4, 0x4e441529
	s_mul_hi_u32 s12, s4, 0x4e441529
	s_add_u32 s10, s10, s11
	s_addc_u32 s11, 0, s12
	s_cmp_gt_u32 s5, 63
	s_mul_i32 s12, s4, 0xfe5163ab
	s_mul_hi_u32 s16, s4, 0xa2f9836e
	s_mul_i32 s4, s4, 0xa2f9836e
	s_cselect_b32 s17, s7, s9
	s_cselect_b32 s6, s6, s8
	s_cselect_b32 s7, s12, s7
	s_add_u32 s4, s11, s4
	s_addc_u32 s11, 0, s16
	s_cmp_gt_u32 s5, 63
	s_cselect_b32 s12, 0xffffffc0, 0
	s_cselect_b32 s8, s8, s10
	s_cselect_b32 s4, s9, s4
	s_cselect_b32 s9, s10, s11
	s_add_i32 s12, s12, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s12, 31
	s_cselect_b32 s5, 0xffffffe0, 0
	s_cselect_b32 s10, s8, s4
	s_cselect_b32 s4, s4, s9
	s_cselect_b32 s8, s17, s8
	s_cselect_b32 s9, s6, s17
	s_cselect_b32 s6, s7, s6
	s_add_i32 s5, s5, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s5, 31
	s_cselect_b32 s7, 0xffffffe0, 0
	s_cselect_b32 s4, s10, s4
	s_cselect_b32 s10, s8, s10
	s_cselect_b32 s8, s9, s8
	s_cselect_b32 s6, s6, s9
	s_add_i32 s7, s7, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s5, 32, s7
	s_cmp_eq_u32 s7, 0
	v_mov_b32_e32 v1, s5
	s_cselect_b32 s7, -1, 0
	v_alignbit_b32 v2, s4, s10, v1
	v_alignbit_b32 v3, s10, s8, v1
	v_alignbit_b32 v1, s8, s6, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s5, v2
	v_cndmask_b32_e64 v2, v3, s10, s7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v1, v1, s8, s7
	s_cselect_b32 s4, s4, s5
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v3, s4, v2, 30
	s_bfe_u32 s5, s4, 0x1001d
	s_delay_alu instid0(VALU_DEP_2)
	v_alignbit_b32 v2, v2, v1, 30
	s_sub_i32 s9, 0, s5
	v_alignbit_b32 v1, v1, s6, 30
	v_xor_b32_e32 v3, s9, v3
	s_lshr_b32 s6, s4, 29
	v_xor_b32_e32 v2, s9, v2
	s_lshl_b32 s6, s6, 31
	v_xor_b32_e32 v1, s9, v1
	v_clz_i32_u32_e32 v4, v3
	s_or_b32 s7, s6, 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v4, 32, v4
	v_sub_nc_u32_e32 v6, 31, v4
	v_lshlrev_b32_e32 v7, 23, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_alignbit_b32 v3, v3, v2, v6
	v_alignbit_b32 v1, v2, v1, v6
	v_sub_nc_u32_e32 v7, s7, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_alignbit_b32 v2, v3, v1, 9
	v_clz_i32_u32_e32 v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v6, 32, v6
	v_sub_nc_u32_e32 v8, 31, v6
	v_add_nc_u32_e32 v4, v6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_alignbit_b32 v1, v2, v1, v8
	v_lshrrev_b32_e32 v2, 9, v3
	v_lshlrev_b32_e32 v3, 23, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v1, 9, v1
	v_or_b32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v1, v1, v3
	v_mul_f32_e32 v3, 0x3fc90fda, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, 0x33000000, v1
	v_fma_f32 v4, 0x3fc90fda, v2, -v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v1, s6, v1
	v_fmamk_f32 v2, v2, 0x33a22168, v4
	s_lshr_b32 s6, s4, 30
	s_mov_b32 s4, 0
	s_add_i32 s5, s5, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, 0x3fc90fda, v1
	v_add_f32_e32 v3, v3, v2
	s_branch .LBB0_3
.LBB0_2:
	s_mov_b32 s4, -1
                                        ; implicit-def: $sgpr5
                                        ; implicit-def: $vgpr3
.LBB0_3:                                ; %Flow49
	v_mov_b32_e32 v4, s5
	v_mul_f32_e64 v1, 0x3f22f983, |v5|
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB0_5
; %bb.4:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v2, v1
	v_fma_f32 v3, 0xbfc90fda, v2, |v5|
	v_cvt_i32_f32_e32 v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v3, v2, 0xb3a22168, v3
	v_fmamk_f32 v3, v2, 0xa7c234c4, v3
.LBB0_5:                                ; %_ZL3cosf.exit.i
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB0_7
; %bb.6:
	s_and_b32 s4, s3, 0x7fffff
	s_lshr_b32 s5, s3, 23
	s_bitset1_b32 s4, 23
	s_addk_i32 s5, 0xff88
	s_mul_hi_u32 s6, s4, 0xfe5163ab
	s_mul_i32 s7, s4, 0x3c439041
	s_mul_hi_u32 s8, s4, 0x3c439041
	s_add_u32 s6, s6, s7
	s_addc_u32 s7, 0, s8
	s_mul_i32 s8, s4, 0xdb629599
	s_mul_hi_u32 s9, s4, 0xdb629599
	s_add_u32 s7, s7, s8
	s_addc_u32 s8, 0, s9
	s_mul_i32 s9, s4, 0xf534ddc0
	s_mul_hi_u32 s10, s4, 0xf534ddc0
	s_add_u32 s8, s8, s9
	s_addc_u32 s9, 0, s10
	s_mul_i32 s10, s4, 0xfc2757d1
	s_mul_hi_u32 s11, s4, 0xfc2757d1
	s_add_u32 s9, s9, s10
	s_addc_u32 s10, 0, s11
	s_mul_i32 s11, s4, 0x4e441529
	s_mul_hi_u32 s12, s4, 0x4e441529
	s_add_u32 s10, s10, s11
	s_addc_u32 s11, 0, s12
	s_cmp_gt_u32 s5, 63
	s_mul_i32 s12, s4, 0xfe5163ab
	s_mul_hi_u32 s16, s4, 0xa2f9836e
	s_mul_i32 s4, s4, 0xa2f9836e
	s_cselect_b32 s17, s7, s9
	s_cselect_b32 s6, s6, s8
	s_cselect_b32 s7, s12, s7
	s_add_u32 s4, s11, s4
	s_addc_u32 s11, 0, s16
	s_cmp_gt_u32 s5, 63
	s_cselect_b32 s12, 0xffffffc0, 0
	s_cselect_b32 s8, s8, s10
	s_cselect_b32 s4, s9, s4
	s_cselect_b32 s9, s10, s11
	s_add_i32 s12, s12, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s12, 31
	s_cselect_b32 s5, 0xffffffe0, 0
	s_cselect_b32 s10, s8, s4
	s_cselect_b32 s4, s4, s9
	s_cselect_b32 s8, s17, s8
	s_cselect_b32 s9, s6, s17
	s_cselect_b32 s6, s7, s6
	s_add_i32 s5, s5, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s5, 31
	s_cselect_b32 s7, 0xffffffe0, 0
	s_cselect_b32 s4, s10, s4
	s_cselect_b32 s10, s8, s10
	s_cselect_b32 s8, s9, s8
	s_cselect_b32 s6, s6, s9
	s_add_i32 s7, s7, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s5, 32, s7
	s_cmp_eq_u32 s7, 0
	v_mov_b32_e32 v2, s5
	s_cselect_b32 s7, -1, 0
	v_alignbit_b32 v6, s4, s10, v2
	v_alignbit_b32 v7, s10, s8, v2
	v_alignbit_b32 v2, s8, s6, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s5, v6
	v_cndmask_b32_e64 v6, v7, s10, s7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v2, v2, s8, s7
	s_cselect_b32 s4, s4, s5
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v7, s4, v6, 30
	s_bfe_u32 s5, s4, 0x1001d
	s_delay_alu instid0(VALU_DEP_2)
	v_alignbit_b32 v6, v6, v2, 30
	s_sub_i32 s9, 0, s5
	v_alignbit_b32 v2, v2, s6, 30
	v_xor_b32_e32 v7, s9, v7
	s_lshr_b32 s6, s4, 29
	v_xor_b32_e32 v6, s9, v6
	s_lshl_b32 s6, s6, 31
	v_xor_b32_e32 v2, s9, v2
	v_clz_i32_u32_e32 v8, v7
	s_or_b32 s7, s6, 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v8, 32, v8
	v_sub_nc_u32_e32 v9, 31, v8
	v_lshlrev_b32_e32 v10, 23, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_alignbit_b32 v7, v7, v6, v9
	v_alignbit_b32 v2, v6, v2, v9
	v_sub_nc_u32_e32 v10, s7, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_alignbit_b32 v6, v7, v2, 9
	v_clz_i32_u32_e32 v9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v9, 32, v9
	v_sub_nc_u32_e32 v11, 31, v9
	v_add_nc_u32_e32 v8, v9, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_alignbit_b32 v2, v6, v2, v11
	v_lshrrev_b32_e32 v6, 9, v7
	v_lshlrev_b32_e32 v7, 23, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v2, 9, v2
	v_or_b32_e32 v6, v6, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v7
	v_mul_f32_e32 v7, 0x3fc90fda, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, 0x33000000, v2
	v_fma_f32 v8, 0x3fc90fda, v6, -v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v2, s6, v2
	v_fmamk_f32 v6, v6, 0x33a22168, v8
	s_lshr_b32 s6, s4, 30
	s_mov_b32 s4, 0
	s_add_i32 s5, s5, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, 0x3fc90fda, v2
	v_add_f32_e32 v6, v7, v6
	s_branch .LBB0_8
.LBB0_7:
	s_mov_b32 s4, -1
                                        ; implicit-def: $sgpr5
                                        ; implicit-def: $vgpr6
.LBB0_8:                                ; %Flow48
	v_mov_b32_e32 v7, s5
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB0_10
; %bb.9:
	v_rndne_f32_e32 v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v6, 0xbfc90fda, v2, |v5|
	v_cvt_i32_f32_e32 v7, v2
	v_fmamk_f32 v6, v2, 0xb3a22168, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_fmamk_f32 v6, v2, 0xa7c234c4, v6
.LBB0_10:                               ; %_ZL3sinf.exit.i
	s_load_b32 s5, s[0:1], 0x30
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB0_12
; %bb.11:
	s_and_b32 s4, s3, 0x7fffff
	s_lshr_b32 s6, s3, 23
	s_bitset1_b32 s4, 23
	s_addk_i32 s6, 0xff88
	s_mul_hi_u32 s7, s4, 0xfe5163ab
	s_mul_i32 s8, s4, 0x3c439041
	s_mul_hi_u32 s9, s4, 0x3c439041
	s_add_u32 s7, s7, s8
	s_addc_u32 s8, 0, s9
	s_mul_i32 s9, s4, 0xdb629599
	s_mul_hi_u32 s10, s4, 0xdb629599
	s_add_u32 s8, s8, s9
	s_addc_u32 s9, 0, s10
	s_mul_i32 s10, s4, 0xf534ddc0
	s_mul_hi_u32 s11, s4, 0xf534ddc0
	s_add_u32 s9, s9, s10
	s_addc_u32 s10, 0, s11
	s_mul_i32 s11, s4, 0xfc2757d1
	s_mul_hi_u32 s12, s4, 0xfc2757d1
	s_add_u32 s10, s10, s11
	s_addc_u32 s11, 0, s12
	s_mul_i32 s12, s4, 0x4e441529
	s_mul_hi_u32 s16, s4, 0x4e441529
	s_add_u32 s11, s11, s12
	s_addc_u32 s12, 0, s16
	s_cmp_gt_u32 s6, 63
	s_mul_i32 s16, s4, 0xfe5163ab
	s_mul_hi_u32 s17, s4, 0xa2f9836e
	s_mul_i32 s4, s4, 0xa2f9836e
	s_cselect_b32 s18, s8, s10
	s_cselect_b32 s7, s7, s9
	s_cselect_b32 s8, s16, s8
	s_add_u32 s4, s12, s4
	s_addc_u32 s12, 0, s17
	s_cmp_gt_u32 s6, 63
	s_cselect_b32 s16, 0xffffffc0, 0
	s_cselect_b32 s9, s9, s11
	s_cselect_b32 s4, s10, s4
	s_cselect_b32 s10, s11, s12
	s_add_i32 s16, s16, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s16, 31
	s_cselect_b32 s6, 0xffffffe0, 0
	s_cselect_b32 s11, s9, s4
	s_cselect_b32 s4, s4, s10
	s_cselect_b32 s9, s18, s9
	s_cselect_b32 s10, s7, s18
	s_cselect_b32 s7, s8, s7
	s_add_i32 s6, s6, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s6, 31
	s_cselect_b32 s8, 0xffffffe0, 0
	s_cselect_b32 s4, s11, s4
	s_cselect_b32 s11, s9, s11
	s_cselect_b32 s9, s10, s9
	s_cselect_b32 s7, s7, s10
	s_add_i32 s8, s8, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s6, 32, s8
	s_cmp_eq_u32 s8, 0
	v_mov_b32_e32 v2, s6
	s_cselect_b32 s8, -1, 0
	v_alignbit_b32 v8, s4, s11, v2
	v_alignbit_b32 v9, s11, s9, v2
	v_alignbit_b32 v2, s9, s7, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s6, v8
	v_cndmask_b32_e64 v8, v9, s11, s8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v2, v2, s9, s8
	s_cselect_b32 s4, s4, s6
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v9, s4, v8, 30
	s_bfe_u32 s10, s4, 0x1001d
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_alignbit_b32 v8, v8, v2, 30
	s_sub_i32 s6, 0, s10
	v_alignbit_b32 v2, v2, s7, 30
	v_xor_b32_e32 v9, s6, v9
	v_xor_b32_e32 v8, s6, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v2, s6, v2
	v_clz_i32_u32_e32 v10, v9
	s_lshr_b32 s6, s4, 29
	s_lshr_b32 s4, s4, 30
	s_lshl_b32 s6, s6, 31
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_min_u32_e32 v10, 32, v10
	s_or_b32 s7, s6, 0.5
	v_sub_nc_u32_e32 v11, 31, v10
	v_lshlrev_b32_e32 v12, 23, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_alignbit_b32 v9, v9, v8, v11
	v_alignbit_b32 v2, v8, v2, v11
	v_sub_nc_u32_e32 v12, s7, v12
	s_add_i32 s7, s10, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_alignbit_b32 v8, v9, v2, 9
	v_clz_i32_u32_e32 v11, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v11, 32, v11
	v_sub_nc_u32_e32 v13, 31, v11
	v_add_nc_u32_e32 v10, v11, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_alignbit_b32 v2, v8, v2, v13
	v_lshrrev_b32_e32 v8, 9, v9
	v_lshlrev_b32_e32 v9, 23, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v2, 9, v2
	v_or_b32_e32 v8, v8, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v9
	v_mul_f32_e32 v9, 0x3fc90fda, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, 0x33000000, v2
	v_fma_f32 v10, 0x3fc90fda, v8, -v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v2, s6, v2
	v_fmamk_f32 v8, v8, 0x33a22168, v10
	s_mov_b32 s6, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, 0x3fc90fda, v2
	v_add_f32_e32 v8, v9, v8
	s_branch .LBB0_13
.LBB0_12:
	s_mov_b32 s6, -1
                                        ; implicit-def: $sgpr7
                                        ; implicit-def: $vgpr8
.LBB0_13:                               ; %Flow47
	s_load_b32 s4, s[0:1], 0x2c
	v_mov_b32_e32 v9, s7
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_cbranch_vccnz .LBB0_15
; %bb.14:
	v_rndne_f32_e32 v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v8, 0xbfc90fda, v2, |v5|
	v_cvt_i32_f32_e32 v9, v2
	v_fmamk_f32 v8, v2, 0xb3a22168, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_fmamk_f32 v8, v2, 0xa7c234c4, v8
.LBB0_15:                               ; %_ZL3sinf.exit46.i
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB0_17
; %bb.16:
	s_and_b32 s2, s3, 0x7fffff
	s_lshr_b32 s6, s3, 23
	s_bitset1_b32 s2, 23
	s_addk_i32 s6, 0xff88
	s_mul_hi_u32 s7, s2, 0xfe5163ab
	s_mul_i32 s8, s2, 0x3c439041
	s_mul_hi_u32 s9, s2, 0x3c439041
	s_add_u32 s7, s7, s8
	s_addc_u32 s8, 0, s9
	s_mul_i32 s9, s2, 0xdb629599
	s_mul_hi_u32 s10, s2, 0xdb629599
	s_add_u32 s8, s8, s9
	s_addc_u32 s9, 0, s10
	s_mul_i32 s10, s2, 0xf534ddc0
	s_mul_hi_u32 s11, s2, 0xf534ddc0
	s_add_u32 s9, s9, s10
	s_addc_u32 s10, 0, s11
	s_mul_i32 s11, s2, 0xfc2757d1
	s_mul_hi_u32 s12, s2, 0xfc2757d1
	s_add_u32 s10, s10, s11
	s_addc_u32 s11, 0, s12
	s_mul_i32 s12, s2, 0x4e441529
	s_mul_hi_u32 s16, s2, 0x4e441529
	s_add_u32 s11, s11, s12
	s_addc_u32 s12, 0, s16
	s_cmp_gt_u32 s6, 63
	s_mul_i32 s16, s2, 0xfe5163ab
	s_mul_hi_u32 s17, s2, 0xa2f9836e
	s_mul_i32 s2, s2, 0xa2f9836e
	s_cselect_b32 s18, s8, s10
	s_cselect_b32 s7, s7, s9
	s_cselect_b32 s8, s16, s8
	s_add_u32 s2, s12, s2
	s_addc_u32 s12, 0, s17
	s_cmp_gt_u32 s6, 63
	s_cselect_b32 s16, 0xffffffc0, 0
	s_cselect_b32 s9, s9, s11
	s_cselect_b32 s2, s10, s2
	s_cselect_b32 s10, s11, s12
	s_add_i32 s16, s16, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s16, 31
	s_cselect_b32 s6, 0xffffffe0, 0
	s_cselect_b32 s11, s9, s2
	s_cselect_b32 s2, s2, s10
	s_cselect_b32 s9, s18, s9
	s_cselect_b32 s10, s7, s18
	s_cselect_b32 s7, s8, s7
	s_add_i32 s6, s6, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s6, 31
	s_cselect_b32 s8, 0xffffffe0, 0
	s_cselect_b32 s2, s11, s2
	s_cselect_b32 s11, s9, s11
	s_cselect_b32 s9, s10, s9
	s_cselect_b32 s7, s7, s10
	s_add_i32 s8, s8, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s6, 32, s8
	s_cmp_eq_u32 s8, 0
	v_mov_b32_e32 v2, s6
	s_cselect_b32 s8, -1, 0
	v_alignbit_b32 v10, s2, s11, v2
	v_alignbit_b32 v11, s11, s9, v2
	v_alignbit_b32 v2, s9, s7, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s6, v10
	v_cndmask_b32_e64 v10, v11, s11, s8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v2, v2, s9, s8
	s_cselect_b32 s2, s2, s6
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_alignbit_b32 v11, s2, v10, 30
	s_bfe_u32 s6, s2, 0x1001d
	s_delay_alu instid0(VALU_DEP_2)
	v_alignbit_b32 v10, v10, v2, 30
	s_sub_i32 s10, 0, s6
	v_alignbit_b32 v2, v2, s7, 30
	v_xor_b32_e32 v11, s10, v11
	s_lshr_b32 s7, s2, 29
	v_xor_b32_e32 v10, s10, v10
	s_lshl_b32 s7, s7, 31
	v_xor_b32_e32 v2, s10, v2
	v_clz_i32_u32_e32 v12, v11
	s_or_b32 s8, s7, 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v12, 32, v12
	v_sub_nc_u32_e32 v13, 31, v12
	v_lshlrev_b32_e32 v14, 23, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_alignbit_b32 v11, v11, v10, v13
	v_alignbit_b32 v2, v10, v2, v13
	v_sub_nc_u32_e32 v14, s8, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_alignbit_b32 v10, v11, v2, 9
	v_clz_i32_u32_e32 v13, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v13, 32, v13
	v_sub_nc_u32_e32 v15, 31, v13
	v_add_nc_u32_e32 v12, v13, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_alignbit_b32 v2, v10, v2, v15
	v_lshrrev_b32_e32 v10, 9, v11
	v_lshlrev_b32_e32 v11, 23, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v2, 9, v2
	v_or_b32_e32 v10, v10, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v11
	v_mul_f32_e32 v11, 0x3fc90fda, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, 0x33000000, v2
	v_fma_f32 v12, 0x3fc90fda, v10, -v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v2, s7, v2
	v_fmamk_f32 v10, v10, 0x33a22168, v12
	s_lshr_b32 s7, s2, 30
	s_mov_b32 s2, 0
	s_add_i32 s6, s6, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, 0x3fc90fda, v2
	v_add_f32_e32 v10, v11, v10
	s_branch .LBB0_18
.LBB0_17:
	s_mov_b32 s2, -1
                                        ; implicit-def: $sgpr6
                                        ; implicit-def: $vgpr10
.LBB0_18:                               ; %Flow46
	v_mov_b32_e32 v11, s6
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_20
; %bb.19:
	v_rndne_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v2, 0xbfc90fda, v1, |v5|
	v_cvt_i32_f32_e32 v11, v1
	v_fmamk_f32 v2, v1, 0xb3a22168, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_fmamk_f32 v10, v1, 0xa7c234c4, v2
.LBB0_20:                               ; %_ZL3cosf.exit52.i
	v_dual_mul_f32 v14, v3, v3 :: v_dual_mul_f32 v15, v6, v6
	s_mov_b32 s7, 0xb94c1982
	s_mov_b32 s8, 0x37d75334
	v_bfe_u32 v13, v0, 20, 10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_fmaak_f32 v1, s7, v14, 0x3c0881c4 :: v_dual_fmaak_f32 v16, s7, v15, 0x3c0881c4
	v_dual_fmaak_f32 v2, s8, v14, 0xbab64f3b :: v_dual_fmaak_f32 v17, s8, v15, 0xbab64f3b
	s_and_b32 s5, s5, 0xffff
	v_dual_fmaak_f32 v1, v14, v1, 0xbe2aaa9d :: v_dual_fmaak_f32 v16, v15, v16, 0xbe2aaa9d
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmaak_f32 v18, v14, v2, 0x3d2aabf7 :: v_dual_fmaak_f32 v17, v15, v17, 0x3d2aabf7
	s_load_b32 s6, s[0:1], 0x10
	v_mul_f32_e32 v19, v14, v1
	v_mad_u64_u32 v[1:2], null, s15, s5, v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_fmaak_f32 v2, v14, v18, 0xbf000004 :: v_dual_mul_f32 v13, v15, v16
	v_dual_fmaak_f32 v16, v15, v17, 0xbf000004 :: v_dual_lshlrev_b32 v17, 30, v7
	v_and_b32_e32 v7, 1, v7
	v_fma_f32 v2, v14, v2, 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v6, v6, v13
	v_fma_f32 v13, v15, v16, 1.0
	v_and_b32_e32 v14, 0x80000000, v17
	v_cmp_eq_u32_e32 vcc_lo, 0, v7
	v_and_b32_e32 v15, 1, v4
	v_dual_fmac_f32 v3, v3, v19 :: v_dual_lshlrev_b32 v4, 30, v4
	v_bfe_u32 v12, v0, 10, 10
	v_cndmask_b32_e32 v6, v13, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v15
	v_xor_b32_e32 v7, s3, v14
	s_lshr_b32 s2, s4, 16
	v_cndmask_b32_e64 v13, -v3, v2, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v5, 0x1f8
	v_mad_u64_u32 v[2:3], null, s14, s2, v[12:13]
	v_xor_b32_e32 v3, v7, v6
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_i32_e32 v12, s6
	v_cvt_f32_i32_e32 v6, v1
	s_lshr_b32 s2, s6, 31
	v_xor_b32_e32 v3, v3, v5
	v_cvt_f32_i32_e32 v7, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v6, -0.5, v12
	s_add_i32 s2, s6, s2
	v_cndmask_b32_e32 v3, 0x7fc00000, v3, vcc_lo
	v_and_b32_e32 v4, 0x80000000, v4
	v_fmac_f32_e32 v7, -0.5, v12
	s_ashr_i32 s2, s2, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v3, v6, v3
	v_xor_b32_e32 v4, v4, v13
	v_cvt_f32_i32_e32 v12, s2
	v_and_b32_e32 v13, 0x3ff, v0
	s_and_b32 s2, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_cndmask_b32_e32 v4, 0x7fc00000, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v3, v7, v4, -v3
	v_floor_f32_e32 v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v12
	v_cvt_i32_f32_e32 v0, v3
	v_mad_u64_u32 v[3:4], null, s13, s2, v[13:14]
	v_mov_b32_e32 v4, -1
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_lt_i32_e32 -1, v0
	s_cbranch_execz .LBB0_24
; %bb.21:
	v_dual_mul_f32 v4, v8, v8 :: v_dual_and_b32 v13, 1, v9
	v_dual_mul_f32 v14, v10, v10 :: v_dual_lshlrev_b32 v9, 30, v9
	v_and_b32_e32 v17, 1, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fmaak_f32 v15, s7, v4, 0x3c0881c4
	v_fmaak_f32 v16, s8, v4, 0xbab64f3b
	v_fmaak_f32 v18, s7, v14, 0x3c0881c4
	v_cmp_eq_u32_e64 s2, 0, v13
	v_lshlrev_b32_e32 v11, 30, v11
	v_fmaak_f32 v15, v4, v15, 0xbe2aaa9d
	v_fmaak_f32 v16, v4, v16, 0x3d2aabf7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmaak_f32 v18, v14, v18, 0xbe2aaa9d :: v_dual_mul_f32 v15, v4, v15
	v_mul_f32_e32 v18, v14, v18
	v_fmaak_f32 v19, s8, v14, 0xbab64f3b
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v8, v8, v15 :: v_dual_and_b32 v9, 0x80000000, v9
	v_fmac_f32_e32 v10, v10, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fmaak_f32 v19, v14, v19, 0x3d2aabf7
	v_fmaak_f32 v16, v4, v16, 0xbf000004
	v_xor_b32_e32 v9, s3, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmaak_f32 v19, v14, v19, 0xbf000004
	v_fma_f32 v4, v4, v16, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v14, v14, v19, 1.0
	v_cndmask_b32_e64 v4, v4, v8, s2
	v_cmp_eq_u32_e64 s2, 0, v17
	v_and_b32_e32 v8, 0x80000000, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v4, v9, v4
	v_cndmask_b32_e64 v10, -v10, v14, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, v4, v5
	v_xor_b32_e32 v8, v8, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, 0x7fc00000, v4, vcc_lo
	v_cndmask_b32_e32 v5, 0x7fc00000, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v5, v6, v5
	v_fmac_f32_e32 v5, v7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_floor_f32_e32 v4, v5
	v_add_f32_e32 v4, v4, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v5, v4
	v_max_i32_e32 v4, v0, v5
	v_cmp_lt_i32_e32 vcc_lo, -1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s2, s6, v4
	v_mov_b32_e32 v4, -1
	s_and_b32 s3, s2, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s3
; %bb.22:
	v_mad_u64_u32 v[6:7], null, v5, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v6, s6, v[3:4]
; %bb.23:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_24:                               ; %_Z21get_ind_source_stupidiiiif.exit
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s4
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mov_b32_e32 v0, 0
	s_mov_b32 s4, exec_lo
	v_cmpx_lt_i32_e32 -1, v4
	s_cbranch_execz .LBB0_26
; %bb.25:
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	global_load_b32 v0, v[4:5], off
.LBB0_26:
	s_or_b32 exec_lo, exec_lo, s4
	v_mad_u64_u32 v[4:5], null, v1, s6, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v4, s6, v[3:4]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6rotatePfS_iff
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 20
		.amdhsa_next_free_sgpr 19
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6rotatePfS_iff, .Lfunc_end0-_Z6rotatePfS_iff
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3988
; NumSgprs: 21
; NumVgprs: 20
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 21
; NumVGPRsForWavesPerEU: 20
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z8make_mapPfS_if       ; -- Begin function _Z8make_mapPfS_if
	.globl	_Z8make_mapPfS_if
	.p2align	8
	.type	_Z8make_mapPfS_if,@function
_Z8make_mapPfS_if:                      ; @_Z8make_mapPfS_if
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	v_mov_b32_e32 v4, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s2, s6, 16
	s_and_b32 s6, s6, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s2, v[1:2]
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s14, s14, s6
	s_cmp_lt_i32 s4, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, v2, s4
	v_add3_u32 v0, s14, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_store_b32 v[2:3], v4, off
	s_cbranch_scc1 .LBB1_3
; %bb.1:                                ; %.lr.ph.i
	s_mul_i32 s2, s4, s4
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s4, s4, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s4, 0
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_add_nc_u32_e32 v0, s2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	global_load_b32 v1, v[5:6], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v4, s5, v1
	global_store_b32 v[2:3], v4, off
	s_cbranch_scc1 .LBB1_2
.LBB1_3:                                ; %_Z24integrate_column_densityPfS_iif.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8make_mapPfS_if
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z8make_mapPfS_if, .Lfunc_end1-_Z8make_mapPfS_if
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 236
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6rotatePfS_iff
    .private_segment_fixed_size: 0
    .sgpr_count:     21
    .sgpr_spill_count: 0
    .symbol:         _Z6rotatePfS_iff.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     20
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8make_mapPfS_if
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8make_mapPfS_if.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
