#include <cuda.h>
#include "cuda_runtime.h"
#include <iostream>
#include <ctime>
#include <stdlib.h>
// imported for the random functionality
using namespace std;

__global__ void AddIntegers(int *arr1, int *arr2, int num_elements)
{
	int id = blockIdx.x * blockDim.x + threadIdx.x;
	if (id < num_elements)
	{
		arr1[id] += arr2[id];
	}
}

int main()
{
	srand(time(NULL));
	int num_elements = 100;
	int *array1, *array2;
	array1 = new int[num_elements];
	array2 = new int[num_elements];
	// initialize with random numbers	
	for (int i = 0; i < num_elements; i++)
	{
		array1[i] = rand() % 1000;
		array2[i] = rand() % 1000;
	}
	// print the numbers that were initialized
	cout << "The numbers that were initialized were : " << endl;
	for (int i = 0; i < num_elements; i++)
		cout << array1[i] << " " << array2[i] << endl;
	cout << endl;

	// now initialize kernel
	int *deviceArray1, *deviceArray2;
	if (cudaMalloc(&deviceArray1, sizeof(int) * num_elements) != cudaSuccess)
	{
		cout << "Couldn't initialize deviceArray1!" << endl;
		return 0;
	}
	if (cudaMalloc(&deviceArray2, sizeof(int) * num_elements) != cudaSuccess)
	{
		cout << "Couldn't initialize deviceArray2!" << endl;
		cudaFree(deviceArray1);
		return 0;
	}
	// now copy the data from the local memory to GPU memory
	if (cudaMemcpy(deviceArray1, array1, sizeof(int) * num_elements, cudaMemcpyHostToDevice) != cudaSuccess)
	{
		cout << "Could not copy to deviceArray1!" << endl;
		cudaFree(deviceArray1);
		cudaFree(deviceArray2);
		return 0;
	}
	if (cudaMemcpy(deviceArray2, array2, sizeof(int) * num_elements, cudaMemcpyHostToDevice) != cudaSuccess)
	{
		cout << "Could not copy to deviceArray2!" << endl;
		cudaFree(deviceArray1);
		cudaFree(deviceArray2);
		return 0;
	}
	
	AddIntegers<<<num_elements / 256 + 1, 256 >>>(deviceArray1, deviceArray2, num_elements);
	// now copy the data back from the GPU memory to local memory
	if (cudaMemcpy(array1, deviceArray1, sizeof(int) * num_elements, cudaMemcpyDeviceToHost) != cudaSuccess)
	{
		delete[] array1;
		delete[] array2;
		cudaFree(deviceArray1);
		cudaFree(deviceArray2);
		return 0;
	}

	for (int i = 0; i < num_elements; i++)
		cout << array1[i] << endl;

	cudaFree(deviceArray1);
	cudaFree(deviceArray2);
	delete[] array1;
	delete[] array2;
	return 0;
}
	.file	"tmpxft_0039d8a4_00000000-6_kernel.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4293:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4293:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z34__device_stub__Z11AddIntegersPiS_iPiS_i
	.type	_Z34__device_stub__Z11AddIntegersPiS_iPiS_i, @function
_Z34__device_stub__Z11AddIntegersPiS_iPiS_i:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z11AddIntegersPiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L3:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z34__device_stub__Z11AddIntegersPiS_iPiS_i, .-_Z34__device_stub__Z11AddIntegersPiS_iPiS_i
	.globl	_Z11AddIntegersPiS_i
	.type	_Z11AddIntegersPiS_i, @function
_Z11AddIntegersPiS_i:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z11AddIntegersPiS_iPiS_i
	.cfi_endproc
.LFE3661:
	.size	_Z11AddIntegersPiS_i, .-_Z11AddIntegersPiS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"The numbers that were initialized were : "
.LC1:
	.string	" "
.LC2:
	.string	"Couldn't initialize deviceArray1!"
.LC3:
	.string	"Couldn't initialize deviceArray2!"
.LC4:
	.string	"Could not copy to deviceArray1!"
.LC5:
	.string	"Could not copy to deviceArray2!"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	xorl	%edi, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	$1000, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	movl	$400, %edi
	call	_Znam@PLT
	movl	$400, %edi
	movq	%rax, %rbx
	call	_Znam@PLT
	movq	%rax, %r12
.L10:
	call	rand@PLT
	cltd
	idivl	%r13d
	movl	%edx, (%rbx,%rbp)
	call	rand@PLT
	cltd
	idivl	%r13d
	movl	%edx, (%r12,%rbp)
	addq	$4, %rbp
	cmpq	$400, %rbp
	jne	.L10
	leaq	_ZSt4cout(%rip), %rbp
	leaq	.LC0(%rip), %rsi
	xorl	%r13d, %r13d
	movq	%rbp, %rdi
	leaq	.LC1(%rip), %r14
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L11:
	movl	(%rbx,%r13), %esi
	movq	%rbp, %rdi
	call	_ZNSolsEi@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	(%r12,%r13), %esi
	addq	$4, %r13
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	cmpq	$400, %r13
	jne	.L11
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%rsp, %rdi
	movl	$400, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L12
	movq	%rbp, %rdi
	leaq	.LC2(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L13
.L12:
	leaq	8(%rsp), %rdi
	movl	$400, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L14
	leaq	.LC3(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	(%rsp), %rdi
	jmp	.L27
.L14:
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movl	$400, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L15
	leaq	.LC4(%rip), %rsi
.L29:
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L28:
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
.L27:
	call	cudaFree@PLT
	jmp	.L13
.L15:
	movq	8(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	movl	$400, %edx
	call	cudaMemcpy@PLT
	leaq	.LC5(%rip), %rsi
	testl	%eax, %eax
	jne	.L29
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$8, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$100, %edx
	call	_Z34__device_stub__Z11AddIntegersPiS_iPiS_i
.L17:
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	xorl	%r13d, %r13d
	movl	$400, %edx
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L18
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	jmp	.L28
.L18:
	movl	(%rbx,%r13,4), %esi
	movq	%rbp, %rdi
	incq	%r13
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	cmpq	$100, %r13
	jne	.L18
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
.L13:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z11AddIntegersPiS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z11AddIntegersPiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>

#include <iostream>
#include <ctime>
#include <stdlib.h>
// imported for the random functionality
using namespace std;

__global__ void AddIntegers(int *arr1, int *arr2, int num_elements)
{
	int id = blockIdx.x * blockDim.x + threadIdx.x;
	if (id < num_elements)
	{
		arr1[id] += arr2[id];
	}
}

int main()
{
	srand(time(NULL));
	int num_elements = 100;
	int *array1, *array2;
	array1 = new int[num_elements];
	array2 = new int[num_elements];
	// initialize with random numbers	
	for (int i = 0; i < num_elements; i++)
	{
		array1[i] = rand() % 1000;
		array2[i] = rand() % 1000;
	}
	// print the numbers that were initialized
	cout << "The numbers that were initialized were : " << endl;
	for (int i = 0; i < num_elements; i++)
		cout << array1[i] << " " << array2[i] << endl;
	cout << endl;

	// now initialize kernel
	int *deviceArray1, *deviceArray2;
	if (hipMalloc(&deviceArray1, sizeof(int) * num_elements) != hipSuccess)
	{
		cout << "Couldn't initialize deviceArray1!" << endl;
		return 0;
	}
	if (hipMalloc(&deviceArray2, sizeof(int) * num_elements) != hipSuccess)
	{
		cout << "Couldn't initialize deviceArray2!" << endl;
		hipFree(deviceArray1);
		return 0;
	}
	// now copy the data from the local memory to GPU memory
	if (hipMemcpy(deviceArray1, array1, sizeof(int) * num_elements, hipMemcpyHostToDevice) != hipSuccess)
	{
		cout << "Could not copy to deviceArray1!" << endl;
		hipFree(deviceArray1);
		hipFree(deviceArray2);
		return 0;
	}
	if (hipMemcpy(deviceArray2, array2, sizeof(int) * num_elements, hipMemcpyHostToDevice) != hipSuccess)
	{
		cout << "Could not copy to deviceArray2!" << endl;
		hipFree(deviceArray1);
		hipFree(deviceArray2);
		return 0;
	}
	
	AddIntegers<<<num_elements / 256 + 1, 256 >>>(deviceArray1, deviceArray2, num_elements);
	// now copy the data back from the GPU memory to local memory
	if (hipMemcpy(array1, deviceArray1, sizeof(int) * num_elements, hipMemcpyDeviceToHost) != hipSuccess)
	{
		delete[] array1;
		delete[] array2;
		hipFree(deviceArray1);
		hipFree(deviceArray2);
		return 0;
	}

	for (int i = 0; i < num_elements; i++)
		cout << array1[i] << endl;

	hipFree(deviceArray1);
	hipFree(deviceArray2);
	delete[] array1;
	delete[] array2;
	return 0;
}
	.text
	.file	"kernel.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z26__device_stub__AddIntegersPiS_i # -- Begin function _Z26__device_stub__AddIntegersPiS_i
	.type	_Z26__device_stub__AddIntegersPiS_i,@function
_Z26__device_stub__AddIntegersPiS_i:    # @_Z26__device_stub__AddIntegersPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11AddIntegersPiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__AddIntegersPiS_i, .Lfunc_end0-_Z26__device_stub__AddIntegersPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	xorl	%r15d, %r15d
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movl	$400, %edi                      # imm = 0x190
	callq	_Znam
	movq	%rax, %r14
	movl	$400, %edi                      # imm = 0x190
	callq	_Znam
	movq	%rax, %rbx
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	movl	%eax, (%r14,%r15,4)
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r15,4)
	incq	%r15
	cmpq	$100, %r15
	jne	.LBB1_1
# %bb.2:
	movl	$_ZSt4cout, %r15d
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$41, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%r12d, %r12d
.LBB1_3:                                # =>This Inner Loop Header: Depth=1
	movl	(%r14,%r12,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	(%rbx,%r12,4), %esi
	movq	%r15, %rdi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r12
	cmpq	$100, %r12
	jne	.LBB1_3
# %bb.4:
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %r15d
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	leaq	8(%rsp), %rdi
	movl	$400, %esi                      # imm = 0x190
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_6
# %bb.5:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	jmp	.LBB1_22
.LBB1_6:
	leaq	16(%rsp), %rdi
	movl	$400, %esi                      # imm = 0x190
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_8
# %bb.7:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	8(%rsp), %rdi
	jmp	.LBB1_21
.LBB1_8:
	movq	8(%rsp), %rdi
	movl	$400, %edx                      # imm = 0x190
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_11
# %bb.9:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	jmp	.LBB1_10
.LBB1_11:
	movq	16(%rsp), %rdi
	movl	$400, %edx                      # imm = 0x190
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_13
# %bb.12:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
.LBB1_10:
	movl	$31, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_20:
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
.LBB1_21:
	callq	hipFree
.LBB1_22:
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB1_13:
	.cfi_def_cfa_offset 64
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	255(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_15
# %bb.14:
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$100, %edx
	callq	_Z26__device_stub__AddIntegersPiS_i
.LBB1_15:
	movq	8(%rsp), %rsi
	movl	$400, %edx                      # imm = 0x190
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_16
# %bb.19:
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%rbx, %rdi
	callq	_ZdaPv
	jmp	.LBB1_20
.LBB1_16:                               # %.preheader.preheader
	xorl	%r12d, %r12d
.LBB1_17:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r14,%r12,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r12
	cmpq	$100, %r12
	jne	.LBB1_17
# %bb.18:
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%rbx, %rdi
	callq	_ZdaPv
	jmp	.LBB1_22
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11AddIntegersPiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11AddIntegersPiS_i,@object    # @_Z11AddIntegersPiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z11AddIntegersPiS_i
	.p2align	3, 0x0
_Z11AddIntegersPiS_i:
	.quad	_Z26__device_stub__AddIntegersPiS_i
	.size	_Z11AddIntegersPiS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"The numbers that were initialized were : "
	.size	.L.str, 42

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" "
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Couldn't initialize deviceArray1!"
	.size	.L.str.2, 34

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Couldn't initialize deviceArray2!"
	.size	.L.str.3, 34

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Could not copy to deviceArray1!"
	.size	.L.str.4, 32

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Could not copy to deviceArray2!"
	.size	.L.str.5, 32

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11AddIntegersPiS_i"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__AddIntegersPiS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11AddIntegersPiS_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11AddIntegersPiS_i    ; -- Begin function _Z11AddIntegersPiS_i
	.globl	_Z11AddIntegersPiS_i
	.p2align	8
	.type	_Z11AddIntegersPiS_i,@function
_Z11AddIntegersPiS_i:                   ; @_Z11AddIntegersPiS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11AddIntegersPiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11AddIntegersPiS_i, .Lfunc_end0-_Z11AddIntegersPiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 160
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11AddIntegersPiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11AddIntegersPiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
