/*
* This sample implements a separable convolution 
* of a 2D image with an arbitrary filter.
*/

#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>
#include <sys/time.h>


#define FILTER_RADIUS 	16
#define FILTER_LENGTH 	(2 * FILTER_RADIUS + 1)
#define ABS(val)  	((val)<0.0 ? (-(val)) : (val))
#define accuracy  	5e-4
#define TILE_WIDTH      96
#define TILE_HEIGHT     96



__constant__  float Filter[FILTER_LENGTH];   // gia na apothikeusw tous suntelestes tou filtrou
 

////////////////////////////////////////////////////////////////////////////////
// Reference row convolution filter
////////////////////////////////////////////////////////////////////////////////
void convolutionRowCPU(float *h_Dst, float *h_Src, float *h_Filter, 
                       int imageW, int imageH, int filterR) {

  int x, y, k;
  
                      
  for (y = filterR; y < imageH-filterR; y++) {
    for (x = filterR; x < imageW-filterR; x++) {
      float sum = 0;

      for (k = -filterR; k <= filterR; k++) {
        int d = x + k;

        
        sum += h_Src[y * imageW + d] * h_Filter[filterR - k];
           
        h_Dst[y * imageW + x] = sum;  
      }
    }
  }
   
}


////////////////////////////////////////////////////////////////////////////////
// Reference column convolution filter
////////////////////////////////////////////////////////////////////////////////
void convolutionColumnCPU(float *h_Dst, float *h_Src, float *h_Filter,
    			   int imageW, int imageH, int filterR) {

  
  int x, y, k;
  
  for (y = filterR; y < imageH-filterR; y++) {
    for (x = filterR; x < imageW-filterR; x++) {
      float sum = 0;

      for (k = -filterR; k <= filterR; k++) {
        int d = y + k;

        
         sum += h_Src[d * imageW + x] * h_Filter[filterR - k];
        
        h_Dst[y * imageW + x] = sum;  
      }
    }
  }

 
    
}

///// Reference row convolution filter in GPU   /////

__global__ void row_Kernel(float *Dst, float *Src, float *filter,int imageW, int imageH, int filterR) {

     int k;
    
     float sum=0; //value to store the element of the matrix that is computed by the thread

    if(!((threadIdx.x+blockDim.x*blockIdx.x) < filterR  || (threadIdx.x+blockDim.x*blockIdx.x) >= imageH-filterR)){
		for(k = -filterR; k<=filterR; k++){
		
			int d = threadIdx.x + k+blockDim.x * blockIdx.x;	
			sum += Src[(blockIdx.y * blockDim.y + threadIdx.y)*imageW + d]*filter[filterR-k];	
	                
		}
	}
      Dst[(blockIdx.y * blockDim.y + threadIdx.y)*imageW + threadIdx.x + blockDim.x*blockIdx.x] = sum;
	
       
}

///// Reference column convolution filter in GPU  /////


__global__ void column_Kernel(float *Dst, float *Src, float *filter,int imageW, int imageH, int filterR) {

      int k;
     
      float sum=0; //value to store the element of the matrix that is computed by the thread

   if(!((threadIdx.y+blockDim.y*blockIdx.y) < filterR  || (threadIdx.y+blockDim.y*blockIdx.y) >= imageH-filterR)){
		for(k = -filterR; k<=filterR; k++){

			int d = k+ (blockIdx.y * blockDim.y + threadIdx.y);
		        sum += Src[d*imageW + threadIdx.x+blockDim.x * blockIdx.x]*filter[filterR-k];

		}
	}
	Dst[(blockIdx.y * blockDim.y + threadIdx.y)*imageW + threadIdx.x+blockDim.x*blockIdx.x] = sum;



}


///// Reference tiled row convolution filter in GPU   /////

__global__ void tiled_row_Kernel(float *Dst, float *Src,int imageW, int imageH, int filterR) {

     int k;
     
     float sum=0; //value to store the element of the matrix that is computed by the thread

     
     // allocate 1D tile in __shared__ memory
    __shared__ float data[TILE_HEIGHT * (FILTER_LENGTH - 1 +TILE_WIDTH)];
 
    
    //h global adress autou tou thread
    const int adr =  (blockIdx.y * blockDim.y + threadIdx.y)*imageW + (threadIdx.x +blockDim.x * blockIdx.x);  

    //xrhsimopoiw to shift gia na kinoumaste katallhla afou twra exoume 1D tile
    //kai na grafoume sth swsth thesh
    const int shift = threadIdx.y * (TILE_WIDTH + FILTER_LENGTH -1 );

    // bash eikonas
    const int x0 = threadIdx.x + (blockDim.x * blockIdx.x);

    //periptwseis gia na feroume sth share mem ta swsta kommatia tile apo to Src.elegxoume an h eikona einai mesa sta oria pou theloume

    
    //periptwsh 1
    if(!(x0 < filterR)){
        data[threadIdx.x + shift ] = Src[ adr - filterR];
    }
    else{
        data[threadIdx.x  + shift ] = 0;
    }

  
    //periptwsh 2
    if(!( x0 >= imageH - filterR)){
        data[ threadIdx.x + blockDim.x + shift ] = Src[ adr + filterR];
    }
    else{
       data[ threadIdx.x + blockDim.x + shift ] = 0;
    }

    __syncthreads();   //barrier giati theloume na fortwsoume ola ta dedomena apo thn global protou proxwrhsoume

    

     //convolution

    for ( k = -filterR; k <= filterR; k++){
        sum += data[ threadIdx.x + filterR + k + shift ] * Filter[ filterR - k];
    }


    Dst[ adr ] = sum;


	
       
}

///// Reference tiled_column convolution filter in GPU  /////


__global__ void tiled_column_Kernel(float *Dst, float *Src,int imageW, int imageH, int filterR) {

     int k;
     
     float sum=0; //value to store the element of the matrix that is computed by the thread
     
     
     // allocate 1D tile in __shared__ memory
    __shared__ float data[TILE_WIDTH * (TILE_HEIGHT + FILTER_LENGTH - 1)];


    //h global adress autou tou thread
    const int adr =  (blockIdx.y * blockDim.y + threadIdx.y)*imageW + (threadIdx.x +blockDim.x * blockIdx.x);

   
    //xrhsimopoiw to shift gia na kinoumaste katallhla afou twra exoume 1D tile
    //kai na grafoume sth swsth thesh
    //shift_1 gia thn panw periptwsh(periptwsh 1)
    //shift_2 gia thn katw periptwsh(periptwsh 2)
    const int shift_1 = threadIdx.y * (TILE_WIDTH);
    const int shift_2 = shift_1 + (blockDim.y * TILE_WIDTH);

    //bash eikonas
    const int y0 = threadIdx.y + (blockIdx.y * blockDim.y); 


    //periptwseis gia na feroume sth share mem ta swsta kommatia tile apo to Src.elegxoume an h eikona einai mesa sta oria pou theloume

    
    //periptwsh 1
    if(!(y0 < filterR)){

       data[ threadIdx.x + shift_1 ] = Src[ adr - (imageW * filterR)];

    }
    else {
       data[ threadIdx.x + shift_1 ] = 0;
    }



   //periptwsh 2
   if(!(y0 >= imageH - filterR)){
      data[ threadIdx.x + shift_2 ] = Src[ adr + (imageW * filterR)];
   }
   else{
      data[ threadIdx.x + shift_2 ] = 0;
   }

   __syncthreads();    //barrier giati theloume na fortwsoume ola ta dedomena apo thn global protou proxwrhsoume

  



    //convolution
   
   for (k = -filterR; k <= filterR; k++){
     sum += data[ (threadIdx.y + filterR) * TILE_WIDTH + threadIdx.x +  (k * TILE_WIDTH)] * Filter[ filterR - k ];
   }


   Dst[ adr ] = sum;

  
}



////////////////////////////////////////////////////////////////////////////////
// Main program
////////////////////////////////////////////////////////////////////////////////
int main(int argc, char **argv) {
    
    
    float
    *h_Filter,
    *h_Input,
    *h_Buffer,
    *h_OutputCPU,
    *d_Input,     //eikona eisodou sto device
    *d_OutputGPU1,*d_OutputGPU2,  //apotelesma apo to device gpu
    *d_Filter,    //filtro sto device 
    *h_OutputGPU1,*h_OutputGPU2,      //to epistrefomeno apotelesma apo thn gpu sto host
    *d_Buffer;       //Buffer sto device gia endiameso apotelesma apo thn row sth column ston kernel

   

    int imageW,newW;
    int imageH,newH;
    unsigned int i,j;
    cudaEvent_t start_GPU1,start_GPU2;  //var gia na metrisw xrono sth gpu
    cudaEvent_t stop_GPU1,stop_GPU2;   //var gia na metrisw xrono sth gpu 
    float elapsed_GPU1,elapsed_GPU2;  //xronos sth gpu
    float average_1=0;  //mesos xronos gia thn gpu xwris to tile
    float average_2=0;  //mesos xronso gia thn gpu me to tile
    timeval t1;     //gia na metrisw to xrono sth cpu
    timeval t2;     //gia na metrisw to xrono sth cpu
    double elapsed_CPU;  // xronos sth cpu
    cudaError_t err;   // elegxos gia cuda malloc kai cudamemcopy


    // Ta imageW, imageH ta dinei o xrhsths kai thewroume oti einai isa,
    // dhladh imageW = imageH = N, opou to N to dinei o xrhsths.
    // Gia aplothta thewroume tetragwnikes eikones.  
    if(argc <= 1){
       printf("I have to terminate because you didnt enter image size.Pls try again \n");
       return 1;
    }
    imageW=atoi(argv[1]);
    printf("You entered image size. Should be a power of two and greater than %d\n", FILTER_LENGTH);
    if( imageW <= FILTER_LENGTH){
       printf("I have to terminate because you enter image smaller than filter\n");
       return 1;
    }
    imageH = imageW;

    
    newH = imageH + FILTER_LENGTH -1;
    newW = imageW + FILTER_LENGTH -1;
  
    printf("Image Width x Height = %i x %i\n\n", imageW, imageH);
    printf("Allocating and initializing host arrays...\n");
    // Tha htan kalh idea na elegxete kai to apotelesma twn malloc...
    h_Filter    = (float *)malloc(FILTER_LENGTH * sizeof(float));
    h_Input     = (float *)malloc(newW * newH * sizeof(float));
    h_Buffer    = (float *)malloc(newW * newH * sizeof(float));
    h_OutputCPU = (float *)malloc(newW * newH * sizeof(float));
    h_OutputGPU1 = (float *)malloc(newW * newH * sizeof(float));
    h_OutputGPU2 = (float *)malloc(newW * newH * sizeof(float));



    // if either memory allocation failed, report an error message
    if(h_Filter == 0 || h_Input == 0 || h_Buffer == 0 || h_OutputCPU == 0 || h_OutputGPU1 == 0 || h_OutputGPU2 == 0 )
    {
       printf("couldn't allocate memory\n");
       return 1;
    }
    
    cudaSetDevice(0/*cutGetMaxGflopsDevice()*/);

    // Allocate memory on device
    err = cudaSuccess;
    err = cudaMalloc((void**)&d_Input, newW * newH * sizeof(float));
    err = cudaMalloc((void**)&d_OutputGPU1, newW * newH * sizeof(float));
    err = cudaMalloc((void**)&d_OutputGPU2, newW * newH * sizeof(float));
    err = cudaMalloc((void**)&d_Filter, ((2*FILTER_RADIUS)+1)*sizeof(float)); 
    err = cudaMalloc((void**)&d_Buffer, newW * newH * sizeof(float)); 
    
    // if either memory allocation failed, report an error message

    if( err != cudaSuccess) {
       printf("CUDA Error in allocation memory on device: %s\n", cudaGetErrorString(err));
       return 1;
    }  
    


    

    // to 'h_Filter' apotelei to filtro me to opoio ginetai to convolution kai
    // arxikopoieitai tuxaia. To 'h_Input' einai h eikona panw sthn opoia ginetai
    // to convolution kai arxikopoieitai kai auth tuxaia.

   //arxikopoiw me floats wste na exw megaluterh anakriveia sta apotelesmata mou
    srand(time(NULL));
       	
    for (i = 0; i < FILTER_LENGTH; i++)
    {
        h_Filter[i] = (float)(rand() / (float)RAND_MAX);
	
     }

    
    for (i = 0; i < newW; i++){	
	for(j=0; j < newH; j++){
		if(i<FILTER_RADIUS || j<FILTER_RADIUS  || i >= (imageW+FILTER_RADIUS) || j>=(imageH+FILTER_RADIUS)){		
		       
			 
			h_Input[j*newW+i] = 0;
		
		}
		else{
		      h_Input[j*newH+i] = (float)(rand()/(float)RAND_MAX);			
		}
		
        	h_Buffer[j*newW+i]=0;
		h_OutputCPU[j*newH+i]=0;
	}
	 	       
    }

      
     
    // To parakatw einai to kommati pou ekteleitai sthn CPU kai me vash auto prepei na ginei h sugrish me thn GPU.
    printf("CPU computation...\n");

    ///// cpu events gia metrisi xronou  /////
     
    gettimeofday(&t1, NULL);

    convolutionRowCPU(h_Buffer, h_Input, h_Filter, newW, newH, FILTER_RADIUS); // convolution kata grammes
    convolutionColumnCPU(h_OutputCPU, h_Buffer, h_Filter, newW, newH, FILTER_RADIUS); // convolution kata sthles

    ///// cpu events gia metrisi xronou  /////
    gettimeofday(&t2, NULL);
    elapsed_CPU = (t2.tv_sec - t1.tv_sec) +  ((t2.tv_usec - t1.tv_usec)/1000000.0);
    printf("CPU elapsed time:%f sec\n",elapsed_CPU);

    

    // Kanete h sugrish anamesa se GPU kai CPU kai an estw kai kapoio apotelesma xeperna thn akriveia
    // pou exoume orisei, tote exoume sfalma kai mporoume endexomenws na termatisoume to programma mas  

    
    printf("GPU computation...\n");

    
    //Load h_Input and h_Filter to device memory
     err = cudaMemcpy(d_Input,h_Input,newW * newH * sizeof(float),cudaMemcpyHostToDevice);
     err = cudaMemcpy(d_Filter,h_Filter,((2*FILTER_RADIUS)+1)*sizeof(float),cudaMemcpyHostToDevice);  
     err = cudaMemcpyToSymbol(Filter,h_Filter,((2*FILTER_RADIUS)+1)*sizeof(float),0,cudaMemcpyHostToDevice);

     if( err != cudaSuccess) {
         printf("CUDA Error in loading memory on device: %s\n", cudaGetErrorString(err));
         return 1;
    }  
     
    // Kernel Invocation
    // Setup the execution configuration
          
     dim3 dimBlock;
     dimBlock.x=16;
     dimBlock.y=16;
     dim3 dimGrid(newW/dimBlock.x,newH/dimBlock.y);

     dim3 dimBlock_tiled;
     dimBlock_tiled.x=32;
     dimBlock_tiled.y=32;
     dim3 dimGrid_tiled(newW/dimBlock_tiled.x,newH/dimBlock_tiled.y);
     
     
    /////  cuda events for gpu time calculation /////
    cudaEventCreate(&start_GPU1);
    cudaEventCreate(&stop_GPU1);
    

    //Launch the device
    cudaFuncSetCacheConfig(row_Kernel,cudaFuncCachePreferL1);
    cudaFuncSetCacheConfig(column_Kernel,cudaFuncCachePreferL1);

    for(int i = 0; i < 10; ++ i){
       cudaEventRecord(start_GPU1, 0);
       cudaDeviceSynchronize();
       row_Kernel<<<dimGrid,dimBlock>>>(d_Buffer,d_Input,d_Filter,newW,newH,FILTER_RADIUS);
       cudaDeviceSynchronize();
       column_Kernel<<<dimGrid,dimBlock>>>(d_OutputGPU1,d_Buffer,d_Filter,newW,newH,FILTER_RADIUS);
       cudaDeviceSynchronize();


     /////  cuda events for gpu time calculation  /////
      cudaEventRecord(stop_GPU1, 0);
      cudaEventSynchronize(stop_GPU1);
      cudaEventElapsedTime(&elapsed_GPU1, start_GPU1, stop_GPU1);
  
      average_1 += elapsed_GPU1;
    }

    average_1 /= 10; 
    
    cudaEventDestroy(start_GPU1);
    cudaEventDestroy(stop_GPU1);



    
    
    /////  cuda events for tiled gpu time calculation /////
    cudaEventCreate(&start_GPU2);
    cudaEventCreate(&stop_GPU2);
    

    //Launch the tiled device
    cudaFuncSetCacheConfig(tiled_row_Kernel,cudaFuncCachePreferShared);
    cudaFuncSetCacheConfig(tiled_column_Kernel,cudaFuncCachePreferShared);
    
    for(int i = 0; i < 10; ++i ){
       cudaEventRecord(start_GPU2, 0);
       cudaDeviceSynchronize();
       tiled_row_Kernel<<<dimGrid_tiled,dimBlock_tiled>>>(d_Buffer,d_Input,newW,newH,FILTER_RADIUS);
       cudaDeviceSynchronize();
       tiled_column_Kernel<<<dimGrid_tiled,dimBlock_tiled>>>(d_OutputGPU2,d_Buffer,newW,newH,FILTER_RADIUS);
       cudaDeviceSynchronize();


   /////  cuda events for tiled gpu time calculation  /////
       cudaEventRecord(stop_GPU2, 0);
       cudaEventSynchronize(stop_GPU2);
       cudaEventElapsedTime(&elapsed_GPU2, start_GPU2, stop_GPU2);
     
       average_2 += elapsed_GPU2 ;

    }

    average_2 /= 10;    

    cudaEventDestroy(start_GPU2);
    cudaEventDestroy(stop_GPU2);


    // ask CUDA for the last error to occur (if one exists)
    cudaError_t error = cudaGetLastError();
    if(error != cudaSuccess) {
       printf("CUDA Error: %s\n", cudaGetErrorString(error));
       return 1;
    } 

    //Read d_OutputGPU1 and d_OutputGPU2 from the device
    err = cudaMemcpy(h_OutputGPU1,d_OutputGPU1,newW * newH * sizeof(float),cudaMemcpyDeviceToHost);
    err = cudaMemcpy(h_OutputGPU2,d_OutputGPU2,newW * newH * sizeof(float),cudaMemcpyDeviceToHost);

    if( err != cudaSuccess) {
       printf("CUDA Error in reading memory from device: %s\n", cudaGetErrorString(err));
       return 1;
    }  


    printf("GPU elapsed time:%f sec \n ",average_1/1000);
    printf("--tiled--GPU elapsed time:%f sec \n ",average_2/1000);

    

    printf("1.GPU:%d=%f\n",imageW * imageH-1,h_OutputGPU1[imageW * imageH-1]); 
    printf("2.--tiled--GPU:%d=%f\n",imageW * imageH-1,h_OutputGPU2[imageW * imageH-1]); 
    printf("3.CPU:%d=%f\n",imageW * imageH-1,h_OutputCPU[imageW * imageH-1]);  
      

    
    
    // CPU Vs GPU (comparison) //
    

    for(i = 0; i< newW * newH; i++){
       if ( ABS(h_OutputCPU[i] - h_OutputGPU1[i]) >= accuracy) {
          printf("ERROR at element i:%d , accuracy error so i have to terminate sorry \n",i);
          return 1;
       }
       

    }
     
    
    // free all the allocated memory
    free(h_OutputCPU);
    free(h_Buffer);
    free(h_Input);
    free(h_Filter);
    free(h_OutputGPU1);
    free(h_OutputGPU2);
    cudaFree(d_Input);
    cudaFree(d_Filter);
    cudaFree(d_OutputGPU1);
    cudaFree(d_OutputGPU2);
    cudaFree(d_Buffer);



     printf("success !!!! \n");

    


    // Do a device reset just in case... Bgalte to sxolio otan ylopoihsete CUDA
     cudaDeviceReset();


    return 0;
}

	.file	"tmpxft_003536e3_00000000-6_lab2_4.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z17convolutionRowCPUPfS_S_iii
	.type	_Z17convolutionRowCPUPfS_S_iii, @function
_Z17convolutionRowCPUPfS_S_iii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r10
	movl	%r9d, %esi
	movl	%ecx, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	imull	%ecx, %esi
	movl	%r9d, %r11d
	subl	%r9d, %r8d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r9d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	negl	%r13d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movslq	%r9d, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	movl	%ecx, %edi
	leaq	(%rdx,%rbp,4), %r12
	subl	%r9d, %edi
	movl	%edi, -4(%rsp)
.L3:
	cmpl	%r11d, %r8d
	jle	.L2
	movslq	%esi, %rdx
	movl	%r9d, %ecx
	addq	%rbp, %rdx
	leaq	(%r10,%rdx,4), %rdi
.L8:
	cmpl	%ecx, -4(%rsp)
	jle	.L11
	leal	(%rcx,%rsi), %edx
	xorps	%xmm0, %xmm0
	movslq	%edx, %rdx
	leaq	(%rbx,%rdx,4), %r14
	movslq	%r13d, %rdx
.L4:
	cmpl	%edx, %r9d
	jl	.L12
	imulq	$-4, %rdx, %r15
	movss	(%r12,%r15), %xmm1
	mulss	(%rdi,%rdx,4), %xmm1
	incq	%rdx
	addss	%xmm1, %xmm0
	movss	%xmm0, (%r14)
	jmp	.L4
.L12:
	incl	%ecx
	addq	$4, %rdi
	jmp	.L8
.L11:
	incl	%r11d
	addl	%eax, %esi
	jmp	.L3
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z17convolutionRowCPUPfS_S_iii, .-_Z17convolutionRowCPUPfS_S_iii
	.globl	_Z20convolutionColumnCPUPfS_S_iii
	.type	_Z20convolutionColumnCPUPfS_S_iii, @function
_Z20convolutionColumnCPUPfS_S_iii:
.LFB2028:
	.cfi_startproc
	endbr64
	movq	%rdx, %r11
	movslq	%r9d, %rdx
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	subl	%r9d, %r8d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	salq	$2, %rdx
	movl	%r9d, %r10d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	addq	%rdx, %r11
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movslq	%ecx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	leaq	(%rsi,%rdx), %rdi
	movl	%r12d, %esi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subl	%r9d, %esi
	movl	%r9d, %ebx
	movq	%r12, %rax
	imull	%r12d, %ebx
	leaq	0(,%r12,4), %r13
	movl	%esi, -8(%rsp)
	movl	%r9d, %esi
	negl	%esi
	movl	%r8d, -12(%rsp)
	movl	%esi, -4(%rsp)
	movq	%rdi, -24(%rsp)
	xorl	%edi, %edi
.L14:
	cmpl	%r10d, -12(%rsp)
	jle	.L13
	movq	-24(%rsp), %rdx
	leaq	(%rdx,%rdi,4), %rsi
	movl	%r9d, %edx
.L19:
	cmpl	%edx, -8(%rsp)
	jle	.L21
	leal	(%rdx,%rbx), %ecx
	movq	%rsi, %r8
	xorps	%xmm0, %xmm0
	movslq	%ecx, %rcx
	leaq	0(%rbp,%rcx,4), %r14
	movslq	-4(%rsp), %rcx
.L15:
	cmpl	%ecx, %r9d
	jl	.L22
	imulq	$-4, %rcx, %r15
	incq	%rcx
	movss	(%r11,%r15), %xmm1
	mulss	(%r8), %xmm1
	addq	%r13, %r8
	addss	%xmm1, %xmm0
	movss	%xmm0, (%r14)
	jmp	.L15
.L22:
	incl	%edx
	addq	$4, %rsi
	jmp	.L19
.L21:
	incl	%r10d
	addl	%eax, %ebx
	addq	%r12, %rdi
	jmp	.L14
.L13:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z20convolutionColumnCPUPfS_S_iii, .-_Z20convolutionColumnCPUPfS_S_iii
	.globl	_Z37__device_stub__Z10row_KernelPfS_S_iiiPfS_S_iii
	.type	_Z37__device_stub__Z10row_KernelPfS_S_iiiPfS_S_iii, @function
_Z37__device_stub__Z10row_KernelPfS_S_iiiPfS_S_iii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z10row_KernelPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L23:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z37__device_stub__Z10row_KernelPfS_S_iiiPfS_S_iii, .-_Z37__device_stub__Z10row_KernelPfS_S_iiiPfS_S_iii
	.globl	_Z10row_KernelPfS_S_iii
	.type	_Z10row_KernelPfS_S_iii, @function
_Z10row_KernelPfS_S_iii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z10row_KernelPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2055:
	.size	_Z10row_KernelPfS_S_iii, .-_Z10row_KernelPfS_S_iii
	.globl	_Z40__device_stub__Z13column_KernelPfS_S_iiiPfS_S_iii
	.type	_Z40__device_stub__Z13column_KernelPfS_S_iiiPfS_S_iii, @function
_Z40__device_stub__Z13column_KernelPfS_S_iiiPfS_S_iii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z13column_KernelPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L28:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z40__device_stub__Z13column_KernelPfS_S_iiiPfS_S_iii, .-_Z40__device_stub__Z13column_KernelPfS_S_iiiPfS_S_iii
	.globl	_Z13column_KernelPfS_S_iii
	.type	_Z13column_KernelPfS_S_iii, @function
_Z13column_KernelPfS_S_iii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z13column_KernelPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2057:
	.size	_Z13column_KernelPfS_S_iii, .-_Z13column_KernelPfS_S_iii
	.globl	_Z41__device_stub__Z16tiled_row_KernelPfS_iiiPfS_iii
	.type	_Z41__device_stub__Z16tiled_row_KernelPfS_iiiPfS_iii, @function
_Z41__device_stub__Z16tiled_row_KernelPfS_iiiPfS_iii:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16tiled_row_KernelPfS_iii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L33:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z41__device_stub__Z16tiled_row_KernelPfS_iiiPfS_iii, .-_Z41__device_stub__Z16tiled_row_KernelPfS_iiiPfS_iii
	.globl	_Z16tiled_row_KernelPfS_iii
	.type	_Z16tiled_row_KernelPfS_iii, @function
_Z16tiled_row_KernelPfS_iii:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z16tiled_row_KernelPfS_iiiPfS_iii
	.cfi_endproc
.LFE2059:
	.size	_Z16tiled_row_KernelPfS_iii, .-_Z16tiled_row_KernelPfS_iii
	.globl	_Z44__device_stub__Z19tiled_column_KernelPfS_iiiPfS_iii
	.type	_Z44__device_stub__Z19tiled_column_KernelPfS_iiiPfS_iii, @function
_Z44__device_stub__Z19tiled_column_KernelPfS_iiiPfS_iii:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z19tiled_column_KernelPfS_iii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L38:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L40
	call	__stack_chk_fail@PLT
.L40:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z44__device_stub__Z19tiled_column_KernelPfS_iiiPfS_iii, .-_Z44__device_stub__Z19tiled_column_KernelPfS_iiiPfS_iii
	.globl	_Z19tiled_column_KernelPfS_iii
	.type	_Z19tiled_column_KernelPfS_iii, @function
_Z19tiled_column_KernelPfS_iii:
.LFB2061:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z19tiled_column_KernelPfS_iiiPfS_iii
	.cfi_endproc
.LFE2061:
	.size	_Z19tiled_column_KernelPfS_iii, .-_Z19tiled_column_KernelPfS_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"I have to terminate because you didnt enter image size.Pls try again \n"
.LC2:
	.string	"You entered image size. Should be a power of two and greater than %d\n"
.LC3:
	.string	"I have to terminate because you enter image smaller than filter\n"
.LC4:
	.string	"Image Width x Height = %i x %i\n\n"
.LC5:
	.string	"Allocating and initializing host arrays...\n"
.LC6:
	.string	"couldn't allocate memory\n"
.LC7:
	.string	"CUDA Error in allocation memory on device: %s\n"
.LC9:
	.string	"CPU computation...\n"
.LC11:
	.string	"CPU elapsed time:%f sec\n"
.LC12:
	.string	"GPU computation...\n"
.LC13:
	.string	"CUDA Error in loading memory on device: %s\n"
.LC14:
	.string	"CUDA Error: %s\n"
.LC15:
	.string	"CUDA Error in reading memory from device: %s\n"
.LC18:
	.string	"GPU elapsed time:%f sec \n "
.LC19:
	.string	"--tiled--GPU elapsed time:%f sec \n "
.LC20:
	.string	"1.GPU:%d=%f\n"
.LC21:
	.string	"2.--tiled--GPU:%d=%f\n"
.LC22:
	.string	"3.CPU:%d=%f\n"
.LC25:
	.string	"ERROR at element i:%d , accuracy error so i have to terminate sorry \n"
.LC26:
	.string	"success !!!! \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$248, %rsp
	.cfi_def_cfa_offset 304
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
	decl	%edi
	jg	.L44
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	jmp	.L83
.L44:
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movl	$33, %edx
	movl	$2, %edi
	leaq	.LC2(%rip), %rsi
	movl	%eax, %ebp
	xorl	%eax, %eax
	call	__printf_chk@PLT
	cmpl	$33, %ebp
	jg	.L46
	leaq	.LC3(%rip), %rsi
.L85:
	movl	$2, %edi
	xorl	%eax, %eax
.L83:
	call	__printf_chk@PLT
.L45:
	movl	$1, %eax
	jmp	.L43
.L46:
	movl	%ebp, %ecx
	movl	%ebp, %edx
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	leal	32(%rbp), %ebx
	call	__printf_chk@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$132, %edi
	call	malloc@PLT
	movq	%rax, 8(%rsp)
	movl	%ebx, %eax
	imull	%ebx, %eax
	movl	%eax, 56(%rsp)
	cltq
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	cmpq	$0, 8(%rsp)
	movq	%rax, 32(%rsp)
	je	.L48
	testq	%r12, %r12
	je	.L48
	cmpq	$0, 16(%rsp)
	je	.L48
	testq	%r13, %r13
	je	.L48
	cmpq	$0, 24(%rsp)
	je	.L48
	testq	%rax, %rax
	jne	.L49
.L48:
	leaq	.LC6(%rip), %rsi
	jmp	.L85
.L49:
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	movq	(%rsp), %rsi
	leaq	80(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	88(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	96(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	104(%rsp), %rdi
	movl	$132, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	112(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L51
	call	cudaGetErrorString@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdx
	jmp	.L84
.L51:
	xorl	%edi, %edi
	xorl	%r14d, %r14d
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L52:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC8(%rip), %xmm0
	movq	8(%rsp), %rax
	movss	%xmm0, (%rax,%r14,4)
	incq	%r14
	cmpq	$33, %r14
	jne	.L52
	xorl	%r14d, %r14d
	leal	16(%rbp), %esi
.L53:
	movl	%r14d, %ecx
	xorl	%r15d, %r15d
.L57:
	movl	%ecx, %edx
	cmpl	$15, %r14d
	jbe	.L54
	cmpl	$15, %r15d
	jbe	.L54
	cmpl	%r15d, %r14d
	movl	%r15d, %eax
	cmovnb	%r14d, %eax
	cmpl	%esi, %eax
	jb	.L55
.L54:
	movl	$0x00000000, (%r12,%rdx,4)
	jmp	.L56
.L55:
	movl	%esi, 60(%rsp)
	movq	%rdx, 48(%rsp)
	movl	%ecx, 44(%rsp)
	call	rand@PLT
	movq	48(%rsp), %rdx
	movl	60(%rsp), %esi
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC8(%rip), %xmm0
	movl	44(%rsp), %ecx
	movss	%xmm0, (%r12,%rdx,4)
.L56:
	movq	16(%rsp), %rax
	incl	%r15d
	addl	%ebx, %ecx
	movl	$0x00000000, 0(%r13,%rdx,4)
	movl	$0x00000000, (%rax,%rdx,4)
	cmpl	%ebx, %r15d
	jb	.L57
	incl	%r14d
	cmpl	%ebx, %r14d
	jb	.L53
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	200(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	movq	8(%rsp), %rdx
	movl	%ebx, %r8d
	movl	%ebx, %ecx
	movq	16(%rsp), %rdi
	movl	$16, %r9d
	movq	%r12, %rsi
	call	_Z17convolutionRowCPUPfS_S_iii
	movq	8(%rsp), %rdx
	movl	%ebx, %r8d
	movl	%ebx, %ecx
	movq	16(%rsp), %rsi
	movq	%r13, %rdi
	call	_Z20convolutionColumnCPUPfS_S_iii
	leaq	216(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	movq	224(%rsp), %rax
	movl	$2, %edi
	subq	208(%rsp), %rax
	cvtsi2sdq	%rax, %xmm0
	movq	216(%rsp), %rax
	subq	200(%rsp), %rax
	divsd	.LC10(%rip), %xmm0
	cvtsi2sdq	%rax, %xmm1
	leaq	.LC11(%rip), %rsi
	movb	$1, %al
	addsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	(%rsp), %rdx
	movq	80(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movq	104(%rsp), %rdi
	movl	$1, %ecx
	movl	$132, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	_ZL6Filter(%rip), %rdi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	movl	$132, %edx
	call	cudaMemcpyToSymbol@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L59
	call	cudaGetErrorString@PLT
	leaq	.LC13(%rip), %rsi
	movq	%rax, %rdx
	jmp	.L84
.L59:
	movl	%ebx, %eax
	leaq	120(%rsp), %rdi
	movl	$1, 160(%rsp)
	movl	$10, %r14d
	movl	$1, 172(%rsp)
	shrl	$4, %eax
	movabsq	$68719476752, %r15
	movl	%eax, 164(%rsp)
	movl	%eax, 168(%rsp)
	movl	%ebx, %eax
	movl	$1, 184(%rsp)
	shrl	$5, %eax
	movl	%eax, 188(%rsp)
	movl	%eax, 192(%rsp)
	movl	$1, 196(%rsp)
	call	cudaEventCreate@PLT
	leaq	136(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$2, %esi
	leaq	_Z10row_KernelPfS_S_iii(%rip), %rdi
	call	cudaFuncSetCacheConfig@PLT
	movl	$2, %esi
	leaq	_Z13column_KernelPfS_S_iii(%rip), %rdi
	call	cudaFuncSetCacheConfig@PLT
	movl	$0x00000000, 48(%rsp)
.L62:
	movq	120(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	call	cudaDeviceSynchronize@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r15, %rdx
	movl	160(%rsp), %ecx
	movq	164(%rsp), %rdi
	movq	%r15, 152(%rsp)
	movl	172(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L60
	movq	104(%rsp), %rdx
	movq	80(%rsp), %rsi
	movl	%ebx, %r8d
	movl	%ebx, %ecx
	movq	112(%rsp), %rdi
	movl	$16, %r9d
	call	_Z37__device_stub__Z10row_KernelPfS_S_iiiPfS_S_iii
.L60:
	call	cudaDeviceSynchronize@PLT
	movl	160(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	152(%rsp), %rdx
	movq	164(%rsp), %rdi
	movl	172(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L61
	movq	104(%rsp), %rdx
	movq	112(%rsp), %rsi
	movl	%ebx, %r8d
	movl	%ebx, %ecx
	movq	88(%rsp), %rdi
	movl	$16, %r9d
	call	_Z40__device_stub__Z13column_KernelPfS_S_iiiPfS_S_iii
.L61:
	call	cudaDeviceSynchronize@PLT
	movq	136(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	136(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	120(%rsp), %rsi
	leaq	72(%rsp), %rdi
	movq	136(%rsp), %rdx
	call	cudaEventElapsedTime@PLT
	movss	48(%rsp), %xmm4
	addss	72(%rsp), %xmm4
	movss	%xmm4, 48(%rsp)
	decl	%r14d
	jne	.L62
	movq	120(%rsp), %rdi
	movl	$10, %r14d
	movabsq	$137438953504, %r15
	call	cudaEventDestroy@PLT
	movq	136(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	128(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	144(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$1, %esi
	leaq	_Z16tiled_row_KernelPfS_iii(%rip), %rdi
	call	cudaFuncSetCacheConfig@PLT
	movl	$1, %esi
	leaq	_Z19tiled_column_KernelPfS_iii(%rip), %rdi
	call	cudaFuncSetCacheConfig@PLT
	movl	$0x00000000, 44(%rsp)
.L65:
	movq	128(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	call	cudaDeviceSynchronize@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r15, %rdx
	movl	184(%rsp), %ecx
	movq	188(%rsp), %rdi
	movq	%r15, 176(%rsp)
	movl	196(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L63
	movq	80(%rsp), %rsi
	movq	112(%rsp), %rdi
	movl	%ebx, %ecx
	movl	%ebx, %edx
	movl	$16, %r8d
	call	_Z41__device_stub__Z16tiled_row_KernelPfS_iiiPfS_iii
.L63:
	call	cudaDeviceSynchronize@PLT
	movl	184(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	176(%rsp), %rdx
	movq	188(%rsp), %rdi
	movl	196(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L64
	movq	112(%rsp), %rsi
	movq	96(%rsp), %rdi
	movl	%ebx, %ecx
	movl	%ebx, %edx
	movl	$16, %r8d
	call	_Z44__device_stub__Z19tiled_column_KernelPfS_iiiPfS_iii
.L64:
	call	cudaDeviceSynchronize@PLT
	movq	144(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	144(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	144(%rsp), %rdx
	leaq	76(%rsp), %rdi
	movq	128(%rsp), %rsi
	call	cudaEventElapsedTime@PLT
	movss	44(%rsp), %xmm5
	addss	76(%rsp), %xmm5
	movss	%xmm5, 44(%rsp)
	decl	%r14d
	jne	.L65
	movq	128(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	144(%rsp), %rdi
	call	cudaEventDestroy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L66
	call	cudaGetErrorString@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdx
	jmp	.L84
.L66:
	movq	(%rsp), %rdx
	movq	88(%rsp), %rsi
	movl	$2, %ecx
	movq	24(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movq	(%rsp), %rdx
	movl	$2, %ecx
	movq	96(%rsp), %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L67
	call	cudaGetErrorString@PLT
	leaq	.LC15(%rip), %rsi
	movq	%rax, %rdx
.L84:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L45
.L67:
	imull	%ebp, %ebp
	movl	$2, %edi
	movb	$1, %al
	movss	48(%rsp), %xmm0
	leaq	.LC18(%rip), %rsi
	divss	.LC16(%rip), %xmm0
	divss	.LC17(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	leaq	.LC19(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	44(%rsp), %xmm0
	divss	.LC16(%rip), %xmm0
	divss	.LC17(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	24(%rsp), %rcx
	movslq	%ebp, %rax
	decl	%ebp
	leaq	0(,%rax,4), %rbx
	movl	%ebp, %edx
	movl	$2, %edi
	cvtss2sd	-4(%rcx,%rax,4), %xmm0
	leaq	.LC20(%rip), %rsi
	movb	$1, %al
	call	__printf_chk@PLT
	movq	32(%rsp), %rax
	movl	%ebp, %edx
	leaq	.LC21(%rip), %rsi
	movl	$2, %edi
	cvtss2sd	-4(%rax,%rbx), %xmm0
	movb	$1, %al
	call	__printf_chk@PLT
	movl	%ebp, %edx
	leaq	.LC22(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	cvtss2sd	-4(%r13,%rbx), %xmm0
	call	__printf_chk@PLT
	movsd	.LC24(%rip), %xmm2
	xorl	%edx, %edx
	xorps	%xmm1, %xmm1
	movss	.LC23(%rip), %xmm3
.L72:
	movq	24(%rsp), %rax
	movss	0(%r13,%rdx,4), %xmm0
	subss	(%rax,%rdx,4), %xmm0
	comiss	%xmm0, %xmm1
	jbe	.L68
	xorps	%xmm3, %xmm0
.L68:
	cvtss2sd	%xmm0, %xmm0
	comisd	%xmm2, %xmm0
	jb	.L81
	leaq	.LC25(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L45
.L81:
	movl	56(%rsp), %eax
	incq	%rdx
	cmpl	%eax, %edx
	jb	.L72
	movq	%r13, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	free@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC26(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	cudaDeviceReset@PLT
	xorl	%eax, %eax
.L43:
	movq	232(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L73
	call	__stack_chk_fail@PLT
.L73:
	addq	$248, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC27:
	.string	"_Z19tiled_column_KernelPfS_iii"
.LC28:
	.string	"_Z16tiled_row_KernelPfS_iii"
.LC29:
	.string	"_Z13column_KernelPfS_S_iii"
.LC30:
	.string	"_Z10row_KernelPfS_S_iii"
.LC31:
	.string	"Filter"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2063:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC27(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z19tiled_column_KernelPfS_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC28(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16tiled_row_KernelPfS_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC29(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13column_KernelPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC30(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10row_KernelPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC31(%rip), %rdx
	movl	$132, %r9d
	leaq	_ZL6Filter(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2063:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL6Filter
	.comm	_ZL6Filter,132,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC8:
	.long	805306368
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC10:
	.long	0
	.long	1093567616
	.section	.rodata.cst4
	.align 4
.LC16:
	.long	1092616192
	.align 4
.LC17:
	.long	1148846080
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC23:
	.long	-2147483648
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8
	.align 8
.LC24:
	.long	-755914244
	.long	1061184077
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
* This sample implements a separable convolution 
* of a 2D image with an arbitrary filter.
*/


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>
#include <sys/time.h>


#define FILTER_RADIUS 	16
#define FILTER_LENGTH 	(2 * FILTER_RADIUS + 1)
#define ABS(val)  	((val)<0.0 ? (-(val)) : (val))
#define accuracy  	5e-4
#define TILE_WIDTH      96
#define TILE_HEIGHT     96



__constant__  float Filter[FILTER_LENGTH];   // gia na apothikeusw tous suntelestes tou filtrou
 

////////////////////////////////////////////////////////////////////////////////
// Reference row convolution filter
////////////////////////////////////////////////////////////////////////////////
void convolutionRowCPU(float *h_Dst, float *h_Src, float *h_Filter, 
                       int imageW, int imageH, int filterR) {

  int x, y, k;
  
                      
  for (y = filterR; y < imageH-filterR; y++) {
    for (x = filterR; x < imageW-filterR; x++) {
      float sum = 0;

      for (k = -filterR; k <= filterR; k++) {
        int d = x + k;

        
        sum += h_Src[y * imageW + d] * h_Filter[filterR - k];
           
        h_Dst[y * imageW + x] = sum;  
      }
    }
  }
   
}


////////////////////////////////////////////////////////////////////////////////
// Reference column convolution filter
////////////////////////////////////////////////////////////////////////////////
void convolutionColumnCPU(float *h_Dst, float *h_Src, float *h_Filter,
    			   int imageW, int imageH, int filterR) {

  
  int x, y, k;
  
  for (y = filterR; y < imageH-filterR; y++) {
    for (x = filterR; x < imageW-filterR; x++) {
      float sum = 0;

      for (k = -filterR; k <= filterR; k++) {
        int d = y + k;

        
         sum += h_Src[d * imageW + x] * h_Filter[filterR - k];
        
        h_Dst[y * imageW + x] = sum;  
      }
    }
  }

 
    
}

///// Reference row convolution filter in GPU   /////

__global__ void row_Kernel(float *Dst, float *Src, float *filter,int imageW, int imageH, int filterR) {

     int k;
    
     float sum=0; //value to store the element of the matrix that is computed by the thread

    if(!((threadIdx.x+blockDim.x*blockIdx.x) < filterR  || (threadIdx.x+blockDim.x*blockIdx.x) >= imageH-filterR)){
		for(k = -filterR; k<=filterR; k++){
		
			int d = threadIdx.x + k+blockDim.x * blockIdx.x;	
			sum += Src[(blockIdx.y * blockDim.y + threadIdx.y)*imageW + d]*filter[filterR-k];	
	                
		}
	}
      Dst[(blockIdx.y * blockDim.y + threadIdx.y)*imageW + threadIdx.x + blockDim.x*blockIdx.x] = sum;
	
       
}

///// Reference column convolution filter in GPU  /////


__global__ void column_Kernel(float *Dst, float *Src, float *filter,int imageW, int imageH, int filterR) {

      int k;
     
      float sum=0; //value to store the element of the matrix that is computed by the thread

   if(!((threadIdx.y+blockDim.y*blockIdx.y) < filterR  || (threadIdx.y+blockDim.y*blockIdx.y) >= imageH-filterR)){
		for(k = -filterR; k<=filterR; k++){

			int d = k+ (blockIdx.y * blockDim.y + threadIdx.y);
		        sum += Src[d*imageW + threadIdx.x+blockDim.x * blockIdx.x]*filter[filterR-k];

		}
	}
	Dst[(blockIdx.y * blockDim.y + threadIdx.y)*imageW + threadIdx.x+blockDim.x*blockIdx.x] = sum;



}


///// Reference tiled row convolution filter in GPU   /////

__global__ void tiled_row_Kernel(float *Dst, float *Src,int imageW, int imageH, int filterR) {

     int k;
     
     float sum=0; //value to store the element of the matrix that is computed by the thread

     
     // allocate 1D tile in __shared__ memory
    __shared__ float data[TILE_HEIGHT * (FILTER_LENGTH - 1 +TILE_WIDTH)];
 
    
    //h global adress autou tou thread
    const int adr =  (blockIdx.y * blockDim.y + threadIdx.y)*imageW + (threadIdx.x +blockDim.x * blockIdx.x);  

    //xrhsimopoiw to shift gia na kinoumaste katallhla afou twra exoume 1D tile
    //kai na grafoume sth swsth thesh
    const int shift = threadIdx.y * (TILE_WIDTH + FILTER_LENGTH -1 );

    // bash eikonas
    const int x0 = threadIdx.x + (blockDim.x * blockIdx.x);

    //periptwseis gia na feroume sth share mem ta swsta kommatia tile apo to Src.elegxoume an h eikona einai mesa sta oria pou theloume

    
    //periptwsh 1
    if(!(x0 < filterR)){
        data[threadIdx.x + shift ] = Src[ adr - filterR];
    }
    else{
        data[threadIdx.x  + shift ] = 0;
    }

  
    //periptwsh 2
    if(!( x0 >= imageH - filterR)){
        data[ threadIdx.x + blockDim.x + shift ] = Src[ adr + filterR];
    }
    else{
       data[ threadIdx.x + blockDim.x + shift ] = 0;
    }

    __syncthreads();   //barrier giati theloume na fortwsoume ola ta dedomena apo thn global protou proxwrhsoume

    

     //convolution

    for ( k = -filterR; k <= filterR; k++){
        sum += data[ threadIdx.x + filterR + k + shift ] * Filter[ filterR - k];
    }


    Dst[ adr ] = sum;


	
       
}

///// Reference tiled_column convolution filter in GPU  /////


__global__ void tiled_column_Kernel(float *Dst, float *Src,int imageW, int imageH, int filterR) {

     int k;
     
     float sum=0; //value to store the element of the matrix that is computed by the thread
     
     
     // allocate 1D tile in __shared__ memory
    __shared__ float data[TILE_WIDTH * (TILE_HEIGHT + FILTER_LENGTH - 1)];


    //h global adress autou tou thread
    const int adr =  (blockIdx.y * blockDim.y + threadIdx.y)*imageW + (threadIdx.x +blockDim.x * blockIdx.x);

   
    //xrhsimopoiw to shift gia na kinoumaste katallhla afou twra exoume 1D tile
    //kai na grafoume sth swsth thesh
    //shift_1 gia thn panw periptwsh(periptwsh 1)
    //shift_2 gia thn katw periptwsh(periptwsh 2)
    const int shift_1 = threadIdx.y * (TILE_WIDTH);
    const int shift_2 = shift_1 + (blockDim.y * TILE_WIDTH);

    //bash eikonas
    const int y0 = threadIdx.y + (blockIdx.y * blockDim.y); 


    //periptwseis gia na feroume sth share mem ta swsta kommatia tile apo to Src.elegxoume an h eikona einai mesa sta oria pou theloume

    
    //periptwsh 1
    if(!(y0 < filterR)){

       data[ threadIdx.x + shift_1 ] = Src[ adr - (imageW * filterR)];

    }
    else {
       data[ threadIdx.x + shift_1 ] = 0;
    }



   //periptwsh 2
   if(!(y0 >= imageH - filterR)){
      data[ threadIdx.x + shift_2 ] = Src[ adr + (imageW * filterR)];
   }
   else{
      data[ threadIdx.x + shift_2 ] = 0;
   }

   __syncthreads();    //barrier giati theloume na fortwsoume ola ta dedomena apo thn global protou proxwrhsoume

  



    //convolution
   
   for (k = -filterR; k <= filterR; k++){
     sum += data[ (threadIdx.y + filterR) * TILE_WIDTH + threadIdx.x +  (k * TILE_WIDTH)] * Filter[ filterR - k ];
   }


   Dst[ adr ] = sum;

  
}



////////////////////////////////////////////////////////////////////////////////
// Main program
////////////////////////////////////////////////////////////////////////////////
int main(int argc, char **argv) {
    
    
    float
    *h_Filter,
    *h_Input,
    *h_Buffer,
    *h_OutputCPU,
    *d_Input,     //eikona eisodou sto device
    *d_OutputGPU1,*d_OutputGPU2,  //apotelesma apo to device gpu
    *d_Filter,    //filtro sto device 
    *h_OutputGPU1,*h_OutputGPU2,      //to epistrefomeno apotelesma apo thn gpu sto host
    *d_Buffer;       //Buffer sto device gia endiameso apotelesma apo thn row sth column ston kernel

   

    int imageW,newW;
    int imageH,newH;
    unsigned int i,j;
    hipEvent_t start_GPU1,start_GPU2;  //var gia na metrisw xrono sth gpu
    hipEvent_t stop_GPU1,stop_GPU2;   //var gia na metrisw xrono sth gpu 
    float elapsed_GPU1,elapsed_GPU2;  //xronos sth gpu
    float average_1=0;  //mesos xronos gia thn gpu xwris to tile
    float average_2=0;  //mesos xronso gia thn gpu me to tile
    timeval t1;     //gia na metrisw to xrono sth cpu
    timeval t2;     //gia na metrisw to xrono sth cpu
    double elapsed_CPU;  // xronos sth cpu
    hipError_t err;   // elegxos gia cuda malloc kai cudamemcopy


    // Ta imageW, imageH ta dinei o xrhsths kai thewroume oti einai isa,
    // dhladh imageW = imageH = N, opou to N to dinei o xrhsths.
    // Gia aplothta thewroume tetragwnikes eikones.  
    if(argc <= 1){
       printf("I have to terminate because you didnt enter image size.Pls try again \n");
       return 1;
    }
    imageW=atoi(argv[1]);
    printf("You entered image size. Should be a power of two and greater than %d\n", FILTER_LENGTH);
    if( imageW <= FILTER_LENGTH){
       printf("I have to terminate because you enter image smaller than filter\n");
       return 1;
    }
    imageH = imageW;

    
    newH = imageH + FILTER_LENGTH -1;
    newW = imageW + FILTER_LENGTH -1;
  
    printf("Image Width x Height = %i x %i\n\n", imageW, imageH);
    printf("Allocating and initializing host arrays...\n");
    // Tha htan kalh idea na elegxete kai to apotelesma twn malloc...
    h_Filter    = (float *)malloc(FILTER_LENGTH * sizeof(float));
    h_Input     = (float *)malloc(newW * newH * sizeof(float));
    h_Buffer    = (float *)malloc(newW * newH * sizeof(float));
    h_OutputCPU = (float *)malloc(newW * newH * sizeof(float));
    h_OutputGPU1 = (float *)malloc(newW * newH * sizeof(float));
    h_OutputGPU2 = (float *)malloc(newW * newH * sizeof(float));



    // if either memory allocation failed, report an error message
    if(h_Filter == 0 || h_Input == 0 || h_Buffer == 0 || h_OutputCPU == 0 || h_OutputGPU1 == 0 || h_OutputGPU2 == 0 )
    {
       printf("couldn't allocate memory\n");
       return 1;
    }
    
    hipSetDevice(0/*cutGetMaxGflopsDevice()*/);

    // Allocate memory on device
    err = hipSuccess;
    err = hipMalloc((void**)&d_Input, newW * newH * sizeof(float));
    err = hipMalloc((void**)&d_OutputGPU1, newW * newH * sizeof(float));
    err = hipMalloc((void**)&d_OutputGPU2, newW * newH * sizeof(float));
    err = hipMalloc((void**)&d_Filter, ((2*FILTER_RADIUS)+1)*sizeof(float)); 
    err = hipMalloc((void**)&d_Buffer, newW * newH * sizeof(float)); 
    
    // if either memory allocation failed, report an error message

    if( err != hipSuccess) {
       printf("CUDA Error in allocation memory on device: %s\n", hipGetErrorString(err));
       return 1;
    }  
    


    

    // to 'h_Filter' apotelei to filtro me to opoio ginetai to convolution kai
    // arxikopoieitai tuxaia. To 'h_Input' einai h eikona panw sthn opoia ginetai
    // to convolution kai arxikopoieitai kai auth tuxaia.

   //arxikopoiw me floats wste na exw megaluterh anakriveia sta apotelesmata mou
    srand(time(NULL));
       	
    for (i = 0; i < FILTER_LENGTH; i++)
    {
        h_Filter[i] = (float)(rand() / (float)RAND_MAX);
	
     }

    
    for (i = 0; i < newW; i++){	
	for(j=0; j < newH; j++){
		if(i<FILTER_RADIUS || j<FILTER_RADIUS  || i >= (imageW+FILTER_RADIUS) || j>=(imageH+FILTER_RADIUS)){		
		       
			 
			h_Input[j*newW+i] = 0;
		
		}
		else{
		      h_Input[j*newH+i] = (float)(rand()/(float)RAND_MAX);			
		}
		
        	h_Buffer[j*newW+i]=0;
		h_OutputCPU[j*newH+i]=0;
	}
	 	       
    }

      
     
    // To parakatw einai to kommati pou ekteleitai sthn CPU kai me vash auto prepei na ginei h sugrish me thn GPU.
    printf("CPU computation...\n");

    ///// cpu events gia metrisi xronou  /////
     
    gettimeofday(&t1, NULL);

    convolutionRowCPU(h_Buffer, h_Input, h_Filter, newW, newH, FILTER_RADIUS); // convolution kata grammes
    convolutionColumnCPU(h_OutputCPU, h_Buffer, h_Filter, newW, newH, FILTER_RADIUS); // convolution kata sthles

    ///// cpu events gia metrisi xronou  /////
    gettimeofday(&t2, NULL);
    elapsed_CPU = (t2.tv_sec - t1.tv_sec) +  ((t2.tv_usec - t1.tv_usec)/1000000.0);
    printf("CPU elapsed time:%f sec\n",elapsed_CPU);

    

    // Kanete h sugrish anamesa se GPU kai CPU kai an estw kai kapoio apotelesma xeperna thn akriveia
    // pou exoume orisei, tote exoume sfalma kai mporoume endexomenws na termatisoume to programma mas  

    
    printf("GPU computation...\n");

    
    //Load h_Input and h_Filter to device memory
     err = hipMemcpy(d_Input,h_Input,newW * newH * sizeof(float),hipMemcpyHostToDevice);
     err = hipMemcpy(d_Filter,h_Filter,((2*FILTER_RADIUS)+1)*sizeof(float),hipMemcpyHostToDevice);  
     err = hipMemcpyToSymbol(HIP_SYMBOL(Filter),h_Filter,((2*FILTER_RADIUS)+1)*sizeof(float),0,hipMemcpyHostToDevice);

     if( err != hipSuccess) {
         printf("CUDA Error in loading memory on device: %s\n", hipGetErrorString(err));
         return 1;
    }  
     
    // Kernel Invocation
    // Setup the execution configuration
          
     dim3 dimBlock;
     dimBlock.x=16;
     dimBlock.y=16;
     dim3 dimGrid(newW/dimBlock.x,newH/dimBlock.y);

     dim3 dimBlock_tiled;
     dimBlock_tiled.x=32;
     dimBlock_tiled.y=32;
     dim3 dimGrid_tiled(newW/dimBlock_tiled.x,newH/dimBlock_tiled.y);
     
     
    /////  cuda events for gpu time calculation /////
    hipEventCreate(&start_GPU1);
    hipEventCreate(&stop_GPU1);
    

    //Launch the device
    hipFuncSetCacheConfig(reinterpret_cast<const void*>(row_Kernel),hipFuncCachePreferL1);
    hipFuncSetCacheConfig(reinterpret_cast<const void*>(column_Kernel),hipFuncCachePreferL1);

    for(int i = 0; i < 10; ++ i){
       hipEventRecord(start_GPU1, 0);
       hipDeviceSynchronize();
       row_Kernel<<<dimGrid,dimBlock>>>(d_Buffer,d_Input,d_Filter,newW,newH,FILTER_RADIUS);
       hipDeviceSynchronize();
       column_Kernel<<<dimGrid,dimBlock>>>(d_OutputGPU1,d_Buffer,d_Filter,newW,newH,FILTER_RADIUS);
       hipDeviceSynchronize();


     /////  cuda events for gpu time calculation  /////
      hipEventRecord(stop_GPU1, 0);
      hipEventSynchronize(stop_GPU1);
      hipEventElapsedTime(&elapsed_GPU1, start_GPU1, stop_GPU1);
  
      average_1 += elapsed_GPU1;
    }

    average_1 /= 10; 
    
    hipEventDestroy(start_GPU1);
    hipEventDestroy(stop_GPU1);



    
    
    /////  cuda events for tiled gpu time calculation /////
    hipEventCreate(&start_GPU2);
    hipEventCreate(&stop_GPU2);
    

    //Launch the tiled device
    hipFuncSetCacheConfig(reinterpret_cast<const void*>(tiled_row_Kernel),hipFuncCachePreferShared);
    hipFuncSetCacheConfig(reinterpret_cast<const void*>(tiled_column_Kernel),hipFuncCachePreferShared);
    
    for(int i = 0; i < 10; ++i ){
       hipEventRecord(start_GPU2, 0);
       hipDeviceSynchronize();
       tiled_row_Kernel<<<dimGrid_tiled,dimBlock_tiled>>>(d_Buffer,d_Input,newW,newH,FILTER_RADIUS);
       hipDeviceSynchronize();
       tiled_column_Kernel<<<dimGrid_tiled,dimBlock_tiled>>>(d_OutputGPU2,d_Buffer,newW,newH,FILTER_RADIUS);
       hipDeviceSynchronize();


   /////  cuda events for tiled gpu time calculation  /////
       hipEventRecord(stop_GPU2, 0);
       hipEventSynchronize(stop_GPU2);
       hipEventElapsedTime(&elapsed_GPU2, start_GPU2, stop_GPU2);
     
       average_2 += elapsed_GPU2 ;

    }

    average_2 /= 10;    

    hipEventDestroy(start_GPU2);
    hipEventDestroy(stop_GPU2);


    // ask CUDA for the last error to occur (if one exists)
    hipError_t error = hipGetLastError();
    if(error != hipSuccess) {
       printf("CUDA Error: %s\n", hipGetErrorString(error));
       return 1;
    } 

    //Read d_OutputGPU1 and d_OutputGPU2 from the device
    err = hipMemcpy(h_OutputGPU1,d_OutputGPU1,newW * newH * sizeof(float),hipMemcpyDeviceToHost);
    err = hipMemcpy(h_OutputGPU2,d_OutputGPU2,newW * newH * sizeof(float),hipMemcpyDeviceToHost);

    if( err != hipSuccess) {
       printf("CUDA Error in reading memory from device: %s\n", hipGetErrorString(err));
       return 1;
    }  


    printf("GPU elapsed time:%f sec \n ",average_1/1000);
    printf("--tiled--GPU elapsed time:%f sec \n ",average_2/1000);

    

    printf("1.GPU:%d=%f\n",imageW * imageH-1,h_OutputGPU1[imageW * imageH-1]); 
    printf("2.--tiled--GPU:%d=%f\n",imageW * imageH-1,h_OutputGPU2[imageW * imageH-1]); 
    printf("3.CPU:%d=%f\n",imageW * imageH-1,h_OutputCPU[imageW * imageH-1]);  
      

    
    
    // CPU Vs GPU (comparison) //
    

    for(i = 0; i< newW * newH; i++){
       if ( ABS(h_OutputCPU[i] - h_OutputGPU1[i]) >= accuracy) {
          printf("ERROR at element i:%d , accuracy error so i have to terminate sorry \n",i);
          return 1;
       }
       

    }
     
    
    // free all the allocated memory
    free(h_OutputCPU);
    free(h_Buffer);
    free(h_Input);
    free(h_Filter);
    free(h_OutputGPU1);
    free(h_OutputGPU2);
    hipFree(d_Input);
    hipFree(d_Filter);
    hipFree(d_OutputGPU1);
    hipFree(d_OutputGPU2);
    hipFree(d_Buffer);



     printf("success !!!! \n");

    


    // Do a device reset just in case... Bgalte to sxolio otan ylopoihsete CUDA
     hipDeviceReset();


    return 0;
}

	.text
	.file	"lab2_4.hip"
	.globl	_Z17convolutionRowCPUPfS_S_iii  # -- Begin function _Z17convolutionRowCPUPfS_S_iii
	.type	_Z17convolutionRowCPUPfS_S_iii,@function
_Z17convolutionRowCPUPfS_S_iii:         # @_Z17convolutionRowCPUPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $r9d killed $r9d def $r9
	movq	%rdi, -24(%rsp)                 # 8-byte Spill
	subl	%r9d, %r8d
	cmpl	%r9d, %r8d
	jle	.LBB0_9
# %bb.1:                                # %.preheader.lr.ph
	movq	%rdx, %r15
	movabsq	$4294967296, %rax               # imm = 0x100000000
	movl	%r9d, %edx
	negl	%edx
	movslq	%edx, %rdx
	movslq	%r9d, %r12
	movslq	%ecx, %r10
	subl	%r9d, %ecx
	movslq	%r8d, %rdi
	movq	%rdi, -8(%rsp)                  # 8-byte Spill
	movl	%ecx, -44(%rsp)                 # 4-byte Spill
	movslq	%ecx, %rbx
	leal	1(%r10), %edi
	imull	%r9d, %edi
	shlq	$32, %rdi
	movq	%rdx, %rcx
	shlq	$32, %rcx
	addq	%rdi, %rcx
	movq	%r10, -40(%rsp)                 # 8-byte Spill
	shlq	$32, %r10
	movq	%r10, -16(%rsp)                 # 8-byte Spill
	leaq	(,%r12,4), %rdi
	shlq	$2, %rdx
	subq	%rdx, %rdi
	addq	%rdi, %r15
	leal	1(,%r9,2), %r11d
	movq	%r12, -32(%rsp)                 # 8-byte Spill
.LBB0_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
                                        #       Child Loop BB0_6 Depth 3
	cmpl	%r9d, -44(%rsp)                 # 4-byte Folded Reload
	jle	.LBB0_8
# %bb.3:                                # %.lr.ph36
                                        #   in Loop: Header=BB0_2 Depth=1
	movq	%r12, %rdx
	imulq	-40(%rsp), %rdx                 # 8-byte Folded Reload
	movq	-24(%rsp), %rdi                 # 8-byte Reload
	leaq	(%rdi,%rdx,4), %r13
	movq	%rcx, %r8
	movq	-32(%rsp), %rdi                 # 8-byte Reload
.LBB0_4:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_6 Depth 3
	testl	%r9d, %r9d
	js	.LBB0_7
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB0_4 Depth=2
	xorps	%xmm0, %xmm0
	movl	%r11d, %ebp
	movq	%r15, %rdx
	movq	%r8, %r10
.LBB0_6:                                #   Parent Loop BB0_2 Depth=1
                                        #     Parent Loop BB0_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	%r10, %r14
	sarq	$30, %r14
	movss	(%rsi,%r14), %xmm1              # xmm1 = mem[0],zero,zero,zero
	mulss	(%rdx), %xmm1
	addss	%xmm1, %xmm0
	movss	%xmm0, (%r13,%rdi,4)
	addq	%rax, %r10
	addq	$-4, %rdx
	decl	%ebp
	jne	.LBB0_6
.LBB0_7:                                # %._crit_edge
                                        #   in Loop: Header=BB0_4 Depth=2
	incq	%rdi
	addq	%rax, %r8
	cmpq	%rbx, %rdi
	jne	.LBB0_4
.LBB0_8:                                # %._crit_edge37
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%r12
	addq	-16(%rsp), %rcx                 # 8-byte Folded Reload
	cmpq	-8(%rsp), %r12                  # 8-byte Folded Reload
	jne	.LBB0_2
.LBB0_9:                                # %._crit_edge39
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z17convolutionRowCPUPfS_S_iii, .Lfunc_end0-_Z17convolutionRowCPUPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z20convolutionColumnCPUPfS_S_iii # -- Begin function _Z20convolutionColumnCPUPfS_S_iii
	.type	_Z20convolutionColumnCPUPfS_S_iii,@function
_Z20convolutionColumnCPUPfS_S_iii:      # @_Z20convolutionColumnCPUPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $r9d killed $r9d def $r9
	movl	%r8d, %eax
	movq	%rdi, -8(%rsp)                  # 8-byte Spill
	subl	%r9d, %eax
	cmpl	%r9d, %eax
	jle	.LBB1_9
# %bb.1:                                # %.preheader.lr.ph
	movq	%rdx, %r10
	movq	%rsi, %r8
	movl	%r9d, %edx
	negl	%edx
	movslq	%edx, %rdx
	movslq	%ecx, %rbx
	subl	%r9d, %ecx
	movslq	%r9d, %r14
	movslq	%eax, %rdi
	movslq	%ecx, %r11
	leaq	(,%r14,4), %rax
	leaq	(,%rdx,4), %rsi
	addq	%r14, %rdx
	imulq	%rbx, %rdx
	leaq	(%rax,%rdx,4), %rdx
	subq	%rsi, %rax
	addq	%rax, %r10
	addq	%rdx, %r8
	movq	%rbx, -16(%rsp)                 # 8-byte Spill
	leaq	(,%rbx,4), %rbx
	leal	1(,%r9,2), %eax
	movq	%r14, -24(%rsp)                 # 8-byte Spill
.LBB1_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
                                        #       Child Loop BB1_6 Depth 3
	cmpl	%r9d, %ecx
	jle	.LBB1_8
# %bb.3:                                # %.lr.ph36
                                        #   in Loop: Header=BB1_2 Depth=1
	movq	%r14, %rdx
	imulq	-16(%rsp), %rdx                 # 8-byte Folded Reload
	movq	-8(%rsp), %rsi                  # 8-byte Reload
	leaq	(%rsi,%rdx,4), %r15
	movq	%r8, %rsi
	movq	-24(%rsp), %r13                 # 8-byte Reload
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_6 Depth 3
	testl	%r9d, %r9d
	js	.LBB1_7
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB1_4 Depth=2
	xorps	%xmm0, %xmm0
	movl	%eax, %ebp
	movq	%rsi, %r12
	movq	%r10, %rdx
.LBB1_6:                                #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r12), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	mulss	(%rdx), %xmm1
	addss	%xmm1, %xmm0
	movss	%xmm0, (%r15,%r13,4)
	addq	$-4, %rdx
	addq	%rbx, %r12
	decl	%ebp
	jne	.LBB1_6
.LBB1_7:                                # %._crit_edge
                                        #   in Loop: Header=BB1_4 Depth=2
	incq	%r13
	addq	$4, %rsi
	cmpq	%r11, %r13
	jne	.LBB1_4
.LBB1_8:                                # %._crit_edge37
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r14
	addq	%rbx, %r8
	cmpq	%rdi, %r14
	jne	.LBB1_2
.LBB1_9:                                # %._crit_edge39
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z20convolutionColumnCPUPfS_S_iii, .Lfunc_end1-_Z20convolutionColumnCPUPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__row_KernelPfS_S_iii # -- Begin function _Z25__device_stub__row_KernelPfS_S_iii
	.type	_Z25__device_stub__row_KernelPfS_S_iii,@function
_Z25__device_stub__row_KernelPfS_S_iii: # @_Z25__device_stub__row_KernelPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10row_KernelPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25__device_stub__row_KernelPfS_S_iii, .Lfunc_end2-_Z25__device_stub__row_KernelPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__column_KernelPfS_S_iii # -- Begin function _Z28__device_stub__column_KernelPfS_S_iii
	.type	_Z28__device_stub__column_KernelPfS_S_iii,@function
_Z28__device_stub__column_KernelPfS_S_iii: # @_Z28__device_stub__column_KernelPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13column_KernelPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z28__device_stub__column_KernelPfS_S_iii, .Lfunc_end3-_Z28__device_stub__column_KernelPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__tiled_row_KernelPfS_iii # -- Begin function _Z31__device_stub__tiled_row_KernelPfS_iii
	.type	_Z31__device_stub__tiled_row_KernelPfS_iii,@function
_Z31__device_stub__tiled_row_KernelPfS_iii: # @_Z31__device_stub__tiled_row_KernelPfS_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16tiled_row_KernelPfS_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z31__device_stub__tiled_row_KernelPfS_iii, .Lfunc_end4-_Z31__device_stub__tiled_row_KernelPfS_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z34__device_stub__tiled_column_KernelPfS_iii # -- Begin function _Z34__device_stub__tiled_column_KernelPfS_iii
	.type	_Z34__device_stub__tiled_column_KernelPfS_iii,@function
_Z34__device_stub__tiled_column_KernelPfS_iii: # @_Z34__device_stub__tiled_column_KernelPfS_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19tiled_column_KernelPfS_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z34__device_stub__tiled_column_KernelPfS_iii, .Lfunc_end5-_Z34__device_stub__tiled_column_KernelPfS_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI6_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI6_2:
	.long	0x41200000                      # float 10
.LCPI6_3:
	.long	0x447a0000                      # float 1000
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI6_1:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI6_5:
	.quad	0x3f40624dd2f1a9fc              # double 5.0000000000000001E-4
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI6_4:
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$1, %edi
	jg	.LBB6_2
# %bb.1:
	movl	$.Lstr.6, %edi
	jmp	.LBB6_14
.LBB6_2:
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r12d
	movl	$.L.str.1, %edi
	movl	$33, %esi
	xorl	%eax, %eax
	callq	printf
	cmpl	$33, %r12d
	jg	.LBB6_4
# %bb.3:
	movl	$.Lstr.5, %edi
	jmp	.LBB6_14
.LBB6_4:
	leal	32(%r12), %ebx
	movl	$.L.str.3, %edi
	movl	%r12d, %esi
	movl	%r12d, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$132, %edi
	callq	malloc
	movq	%rax, %r14
	movl	%ebx, 4(%rsp)                   # 4-byte Spill
	movl	%ebx, %eax
	imull	%eax, %eax
	movq	%rax, 160(%rsp)                 # 8-byte Spill
	leaq	(,%rax,4), %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %rbp
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r13
	movq	%r15, %rdi
	callq	malloc
	movq	%r15, 64(%rsp)                  # 8-byte Spill
	movq	%r15, %rdi
	movq	%rax, %r15
	callq	malloc
	testq	%r14, %r14
	je	.LBB6_13
# %bb.5:
	testq	%rbx, %rbx
	je	.LBB6_13
# %bb.6:
	movq	%rbp, %rcx
	testq	%rbp, %rbp
	je	.LBB6_13
# %bb.7:
	testq	%r13, %r13
	je	.LBB6_13
# %bb.8:
	testq	%r15, %r15
	je	.LBB6_13
# %bb.9:
	movq	%rax, %rbp
	testq	%rax, %rax
	je	.LBB6_13
# %bb.10:
	movq	%r13, 88(%rsp)                  # 8-byte Spill
	movq	%rcx, 72(%rsp)                  # 8-byte Spill
	movq	%rbx, 80(%rsp)                  # 8-byte Spill
	xorl	%edi, %edi
	callq	hipSetDevice
	leaq	48(%rsp), %rdi
	movq	64(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	120(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	112(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movl	$132, %esi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB6_17
# %bb.11:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
.LBB6_12:
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB6_15
.LBB6_13:
	movl	$.Lstr.4, %edi
.LBB6_14:
	callq	puts@PLT
.LBB6_15:
	movl	$1, %ebx
.LBB6_16:
	movl	%ebx, %eax
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB6_17:
	.cfi_def_cfa_offset 256
	movq	%rbp, 136(%rsp)                 # 8-byte Spill
	movq	%r15, 56(%rsp)                  # 8-byte Spill
	xorl	%ebx, %ebx
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
.LBB6_18:                               # =>This Inner Loop Header: Depth=1
	callq	rand
	movss	.LCPI6_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%r14,%rbx,4)
	incq	%rbx
	cmpq	$33, %rbx
	jne	.LBB6_18
# %bb.19:                               # %.preheader254
	movq	%r14, 152(%rsp)                 # 8-byte Spill
	movq	%r12, 144(%rsp)                 # 8-byte Spill
	leal	16(%r12), %ebx
	movl	4(%rsp), %r8d                   # 4-byte Reload
	movl	%r8d, %r12d
	xorl	%r14d, %r14d
	xorl	%r13d, %r13d
	movq	80(%rsp), %rcx                  # 8-byte Reload
	movq	72(%rsp), %rdx                  # 8-byte Reload
	movq	88(%rsp), %rsi                  # 8-byte Reload
.LBB6_20:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_21 Depth 2
	movl	%r13d, %ebp
	xorl	%r15d, %r15d
.LBB6_21:                               #   Parent Loop BB6_20 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cmpl	$16, %r13d
	jb	.LBB6_26
# %bb.22:                               #   in Loop: Header=BB6_21 Depth=2
	cmpq	$16, %r15
	jb	.LBB6_26
# %bb.23:                               #   in Loop: Header=BB6_21 Depth=2
	cmpl	%ebx, %r13d
	jae	.LBB6_26
# %bb.24:                               #   in Loop: Header=BB6_21 Depth=2
	cmpq	%rbx, %r15
	jae	.LBB6_26
# %bb.25:                               #   in Loop: Header=BB6_21 Depth=2
	callq	rand
	movl	4(%rsp), %r8d                   # 4-byte Reload
	movq	88(%rsp), %rsi                  # 8-byte Reload
	movq	72(%rsp), %rdx                  # 8-byte Reload
	movq	80(%rsp), %rcx                  # 8-byte Reload
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI6_0(%rip), %xmm0
.LBB6_26:                               #   in Loop: Header=BB6_21 Depth=2
	movl	%ebp, %eax
	movss	%xmm0, (%rcx,%rax,4)
	movl	%r14d, (%rdx,%rax,4)
	movl	%r14d, (%rsi,%rax,4)
	incq	%r15
	addl	%r8d, %ebp
	cmpq	%r15, %r12
	jne	.LBB6_21
# %bb.27:                               #   in Loop: Header=BB6_20 Depth=1
	incl	%r13d
	cmpl	%r8d, %r13d
	jne	.LBB6_20
# %bb.28:
	movq	%rdx, %r12
	movq	%rsi, %r13
	movl	$.Lstr.1, %edi
	movq	%rcx, %r15
	movl	%r8d, %ebp
	callq	puts@PLT
	leaq	184(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	152(%rsp), %r14                 # 8-byte Reload
	movq	%r14, %rdx
	movl	%ebp, %ecx
	movl	%ebp, %r8d
	movl	$16, %r9d
	callq	_Z17convolutionRowCPUPfS_S_iii
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r14, %rdx
	movl	%ebp, %ecx
	movl	%ebp, %r8d
	movl	$16, %r9d
	callq	_Z20convolutionColumnCPUPfS_S_iii
	leaq	168(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r12), %rax
	movq	8(%r12), %rcx
	subq	(%rbx), %rax
	cvtsi2sd	%rax, %xmm1
	subq	8(%rbx), %rcx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rcx, %xmm0
	divsd	.LCPI6_1(%rip), %xmm0
	addsd	%xmm1, %xmm0
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	48(%rsp), %rdi
	movl	$1, %ebx
	movq	%r15, %rsi
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rdi
	movl	$132, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$Filter, %edi
	movl	$132, %edx
	movq	%r14, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	testl	%eax, %eax
	je	.LBB6_30
# %bb.29:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.10, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB6_16
.LBB6_30:
	movabsq	$68719476752, %r13              # imm = 0x1000000010
	movl	%ebp, %eax
	shrl	$4, %eax
	movq	%rax, %r12
	shlq	$32, %r12
	orq	%rax, %r12
	movl	%ebp, %r15d
	shrl	$5, %r15d
	leaq	104(%rsp), %rdi
	callq	hipEventCreate
	leaq	32(%rsp), %rdi
	callq	hipEventCreate
	movl	$_Z10row_KernelPfS_S_iii, %edi
	movl	$2, %esi
	callq	hipFuncSetCacheConfig
	movl	$_Z13column_KernelPfS_S_iii, %edi
	movl	$2, %esi
	callq	hipFuncSetCacheConfig
	xorpd	%xmm0, %xmm0
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movl	$10, %ebx
.LBB6_31:                               # =>This Inner Loop Header: Depth=1
	movq	104(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	callq	hipDeviceSynchronize
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rbp
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_33
# %bb.32:                               #   in Loop: Header=BB6_31 Depth=1
	movq	16(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdx
	movl	4(%rsp), %ecx                   # 4-byte Reload
	movl	%ecx, %r8d
	movl	$16, %r9d
	callq	_Z25__device_stub__row_KernelPfS_S_iii
.LBB6_33:                               #   in Loop: Header=BB6_31 Depth=1
	callq	hipDeviceSynchronize
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_35
# %bb.34:                               #   in Loop: Header=BB6_31 Depth=1
	movq	120(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	40(%rsp), %rdx
	movl	4(%rsp), %ecx                   # 4-byte Reload
	movl	%ecx, %r8d
	movl	$16, %r9d
	callq	_Z28__device_stub__column_KernelPfS_S_iii
.LBB6_35:                               #   in Loop: Header=BB6_31 Depth=1
	callq	hipDeviceSynchronize
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	32(%rsp), %rdi
	callq	hipEventSynchronize
	movq	104(%rsp), %rsi
	movq	32(%rsp), %rdx
	leaq	132(%rsp), %rdi
	callq	hipEventElapsedTime
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	132(%rsp), %xmm0
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	decl	%ebx
	jne	.LBB6_31
# %bb.36:
	movabsq	$137438953504, %r12             # imm = 0x2000000020
	movabsq	$4294967297, %rax               # imm = 0x100000001
	imulq	%rax, %r15
	movq	104(%rsp), %rdi
	callq	hipEventDestroy
	movq	32(%rsp), %rdi
	callq	hipEventDestroy
	leaq	96(%rsp), %rdi
	callq	hipEventCreate
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	movl	$_Z16tiled_row_KernelPfS_iii, %edi
	movl	$1, %esi
	callq	hipFuncSetCacheConfig
	movl	$_Z19tiled_column_KernelPfS_iii, %edi
	movl	$1, %esi
	callq	hipFuncSetCacheConfig
	xorpd	%xmm0, %xmm0
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	movl	$10, %ebx
	leaq	128(%rsp), %r13
.LBB6_37:                               # =>This Inner Loop Header: Depth=1
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	callq	hipDeviceSynchronize
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_39
# %bb.38:                               #   in Loop: Header=BB6_37 Depth=1
	movq	16(%rsp), %rdi
	movq	48(%rsp), %rsi
	movl	4(%rsp), %ecx                   # 4-byte Reload
	movl	%ecx, %edx
	movl	$16, %r8d
	callq	_Z31__device_stub__tiled_row_KernelPfS_iii
.LBB6_39:                               #   in Loop: Header=BB6_37 Depth=1
	callq	hipDeviceSynchronize
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_41
# %bb.40:                               #   in Loop: Header=BB6_37 Depth=1
	movq	112(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	4(%rsp), %ecx                   # 4-byte Reload
	movl	%ecx, %edx
	movl	$16, %r8d
	callq	_Z34__device_stub__tiled_column_KernelPfS_iii
.LBB6_41:                               #   in Loop: Header=BB6_37 Depth=1
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	movq	96(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	%r13, %rdi
	callq	hipEventElapsedTime
	movss	8(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	128(%rsp), %xmm0
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	decl	%ebx
	jne	.LBB6_37
# %bb.42:
	movq	96(%rsp), %rdi
	callq	hipEventDestroy
	movq	24(%rsp), %rdi
	callq	hipEventDestroy
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB6_44
# %bb.43:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.11, %edi
	jmp	.LBB6_12
.LBB6_44:
	movq	120(%rsp), %rsi
	movq	56(%rsp), %rdi                  # 8-byte Reload
	movq	64(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	112(%rsp), %rsi
	movq	136(%rsp), %r12                 # 8-byte Reload
	movq	%r12, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB6_46
# %bb.45:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %edi
	jmp	.LBB6_12
.LBB6_46:
	movss	.LCPI6_2(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movss	12(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	movss	8(%rsp), %xmm2                  # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm2
	movss	%xmm2, 8(%rsp)                  # 4-byte Spill
	divss	.LCPI6_3(%rip), %xmm1
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	movl	$.L.str.13, %edi
	movb	$1, %al
	callq	printf
	movss	8(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI6_3(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.14, %edi
	movb	$1, %al
	callq	printf
	movq	144(%rsp), %r15                 # 8-byte Reload
	imull	%r15d, %r15d
	leal	-1(%r15), %ebx
	movq	56(%rsp), %rax                  # 8-byte Reload
	xorps	%xmm0, %xmm0
	cvtss2sd	-4(%rax,%r15,4), %xmm0
	movl	$.L.str.15, %edi
	movl	%ebx, %esi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	-4(%r12,%r15,4), %xmm0
	movl	$.L.str.16, %edi
	movl	%ebx, %esi
	movb	$1, %al
	callq	printf
	movq	88(%rsp), %r12                  # 8-byte Reload
	xorps	%xmm0, %xmm0
	cvtss2sd	-4(%r12,%r15,4), %xmm0
	movq	56(%rsp), %r15                  # 8-byte Reload
	movl	$.L.str.17, %edi
	movl	%ebx, %esi
	movb	$1, %al
	callq	printf
	movq	%r12, %rdi
	movq	160(%rsp), %rax                 # 8-byte Reload
	cmpl	$1, %eax
	adcl	$0, %eax
	xorl	%esi, %esi
	movaps	.LCPI6_4(%rip), %xmm0           # xmm0 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
	movsd	.LCPI6_5(%rip), %xmm1           # xmm1 = mem[0],zero
.LBB6_47:                               # =>This Inner Loop Header: Depth=1
	movss	(%rdi,%rsi,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	subss	(%r15,%rsi,4), %xmm2
	movaps	%xmm2, %xmm3
	xorps	%xmm0, %xmm3
	maxss	%xmm2, %xmm3
	xorps	%xmm2, %xmm2
	cvtss2sd	%xmm3, %xmm2
	ucomisd	%xmm1, %xmm2
	jae	.LBB6_50
# %bb.48:                               #   in Loop: Header=BB6_47 Depth=1
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB6_47
# %bb.49:
	callq	free
	movq	72(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	80(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	136(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	120(%rsp), %rdi
	callq	hipFree
	movq	112(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	callq	hipDeviceReset
	xorl	%ebx, %ebx
	jmp	.LBB6_16
.LBB6_50:
	movl	$.L.str.18, %edi
                                        # kill: def $esi killed $esi killed $rsi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB6_15
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10row_KernelPfS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13column_KernelPfS_S_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16tiled_row_KernelPfS_iii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19tiled_column_KernelPfS_iii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$Filter, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movl	$132, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	Filter,@object                  # @Filter
	.local	Filter
	.comm	Filter,132,16
	.type	_Z10row_KernelPfS_S_iii,@object # @_Z10row_KernelPfS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z10row_KernelPfS_S_iii
	.p2align	3, 0x0
_Z10row_KernelPfS_S_iii:
	.quad	_Z25__device_stub__row_KernelPfS_S_iii
	.size	_Z10row_KernelPfS_S_iii, 8

	.type	_Z13column_KernelPfS_S_iii,@object # @_Z13column_KernelPfS_S_iii
	.globl	_Z13column_KernelPfS_S_iii
	.p2align	3, 0x0
_Z13column_KernelPfS_S_iii:
	.quad	_Z28__device_stub__column_KernelPfS_S_iii
	.size	_Z13column_KernelPfS_S_iii, 8

	.type	_Z16tiled_row_KernelPfS_iii,@object # @_Z16tiled_row_KernelPfS_iii
	.globl	_Z16tiled_row_KernelPfS_iii
	.p2align	3, 0x0
_Z16tiled_row_KernelPfS_iii:
	.quad	_Z31__device_stub__tiled_row_KernelPfS_iii
	.size	_Z16tiled_row_KernelPfS_iii, 8

	.type	_Z19tiled_column_KernelPfS_iii,@object # @_Z19tiled_column_KernelPfS_iii
	.globl	_Z19tiled_column_KernelPfS_iii
	.p2align	3, 0x0
_Z19tiled_column_KernelPfS_iii:
	.quad	_Z34__device_stub__tiled_column_KernelPfS_iii
	.size	_Z19tiled_column_KernelPfS_iii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"You entered image size. Should be a power of two and greater than %d\n"
	.size	.L.str.1, 70

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Image Width x Height = %i x %i\n\n"
	.size	.L.str.3, 33

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"CUDA Error in allocation memory on device: %s\n"
	.size	.L.str.6, 47

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"CPU elapsed time:%f sec\n"
	.size	.L.str.8, 25

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"CUDA Error in loading memory on device: %s\n"
	.size	.L.str.10, 44

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"CUDA Error: %s\n"
	.size	.L.str.11, 16

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"CUDA Error in reading memory from device: %s\n"
	.size	.L.str.12, 46

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"GPU elapsed time:%f sec \n "
	.size	.L.str.13, 27

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"--tiled--GPU elapsed time:%f sec \n "
	.size	.L.str.14, 36

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"1.GPU:%d=%f\n"
	.size	.L.str.15, 13

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"2.--tiled--GPU:%d=%f\n"
	.size	.L.str.16, 22

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"3.CPU:%d=%f\n"
	.size	.L.str.17, 13

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"ERROR at element i:%d , accuracy error so i have to terminate sorry \n"
	.size	.L.str.18, 70

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10row_KernelPfS_S_iii"
	.size	.L__unnamed_1, 24

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13column_KernelPfS_S_iii"
	.size	.L__unnamed_2, 27

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z16tiled_row_KernelPfS_iii"
	.size	.L__unnamed_3, 28

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z19tiled_column_KernelPfS_iii"
	.size	.L__unnamed_4, 31

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"Filter"
	.size	.L__unnamed_5, 7

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Allocating and initializing host arrays..."
	.size	.Lstr, 43

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"CPU computation..."
	.size	.Lstr.1, 19

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"GPU computation..."
	.size	.Lstr.2, 19

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"success !!!! "
	.size	.Lstr.3, 14

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"couldn't allocate memory"
	.size	.Lstr.4, 25

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"I have to terminate because you enter image smaller than filter"
	.size	.Lstr.5, 64

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"I have to terminate because you didnt enter image size.Pls try again "
	.size	.Lstr.6, 70

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__row_KernelPfS_S_iii
	.addrsig_sym _Z28__device_stub__column_KernelPfS_S_iii
	.addrsig_sym _Z31__device_stub__tiled_row_KernelPfS_iii
	.addrsig_sym _Z34__device_stub__tiled_column_KernelPfS_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym Filter
	.addrsig_sym _Z10row_KernelPfS_S_iii
	.addrsig_sym _Z13column_KernelPfS_S_iii
	.addrsig_sym _Z16tiled_row_KernelPfS_iii
	.addrsig_sym _Z19tiled_column_KernelPfS_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10row_KernelPfS_S_iii ; -- Begin function _Z10row_KernelPfS_S_iii
	.globl	_Z10row_KernelPfS_S_iii
	.p2align	8
	.type	_Z10row_KernelPfS_S_iii,@function
_Z10row_KernelPfS_S_iii:                ; @_Z10row_KernelPfS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	s_add_u32 s2, s0, 40
	v_and_b32_e32 v2, 0x3ff, v0
	s_addc_u32 s3, s1, 0
	v_bfe_u32 v0, v0, 10, 10
	v_mov_b32_e32 v4, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s8, 0xffff
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[12:13], s[0:1], 0x10
	s_mul_i32 s14, s14, s7
	s_sub_i32 s0, s5, s6
	v_add_nc_u32_e32 v1, s14, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e32 vcc_lo, s6, v1
	v_cmp_gt_u32_e64 s0, s0, v1
	s_and_b32 s0, vcc_lo, s0
	s_cmp_gt_i32 s6, -1
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_and_saveexec_b32 s5, s0
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s0, s[2:3], 0xc
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s0, 16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s15, s0, v[0:1]
	s_lshl_b32 s0, s6, 1
	v_mul_lo_u32 v3, v3, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add3_u32 v2, v2, v3, s14
	v_mov_b32_e32 v3, 0
	v_subrev_nc_u32_e32 v2, s6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v4, v3
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[5:6], 2, v[2:3]
	s_ashr_i32 s1, s0, 31
	v_add_nc_u32_e32 v2, 1, v2
	s_lshl_b64 s[6:7], s[0:1], 2
	s_add_u32 s6, s12, s6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
	s_addc_u32 s7, s13, s7
	s_add_i32 s0, s0, -1
	s_load_b32 s1, s[6:7], 0x0
	global_load_b32 v5, v[5:6], off
	s_cmp_lg_u32 s0, -1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v4, s1, v5
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %Flow53
	s_or_b32 exec_lo, exec_lo, s5
	s_load_b32 s0, s[2:3], 0xc
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s0, 16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
	v_mad_u64_u32 v[5:6], null, v2, s4, v[1:2]
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[5:6]
	v_add_co_u32 v0, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10row_KernelPfS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10row_KernelPfS_S_iii, .Lfunc_end0-_Z10row_KernelPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 380
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z13column_KernelPfS_S_iii ; -- Begin function _Z13column_KernelPfS_S_iii
	.globl	_Z13column_KernelPfS_S_iii
	.p2align	8
	.type	_Z13column_KernelPfS_S_iii,@function
_Z13column_KernelPfS_S_iii:             ; @_Z13column_KernelPfS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_bfe_u32 v3, v0, 10, 10
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	v_and_b32_e32 v0, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s7, s8, 16
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[12:13], s[0:1], 0x10
	v_mad_u64_u32 v[1:2], null, s15, s7, v[3:4]
	s_sub_i32 s0, s5, s6
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e32 vcc_lo, s6, v1
	v_cmp_gt_u32_e64 s0, s0, v1
	s_and_b32 s0, vcc_lo, s0
	s_cmp_gt_i32 s6, -1
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_and_saveexec_b32 s5, s0
	s_cbranch_execz .LBB1_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s0, s[2:3], 0xc
	v_subrev_nc_u32_e32 v2, s6, v1
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, s4, v2
	v_mov_b32_e32 v4, v3
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s0, s14, s0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add3_u32 v2, v0, v2, s0
	s_lshl_b32 s0, s6, 1
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[5:6], 2, v[2:3]
	s_ashr_i32 s1, s0, 31
	v_add_nc_u32_e32 v2, s4, v2
	s_lshl_b64 s[6:7], s[0:1], 2
	s_add_u32 s6, s12, s6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
	s_addc_u32 s7, s13, s7
	s_add_i32 s0, s0, -1
	s_load_b32 s1, s[6:7], 0x0
	global_load_b32 v5, v[5:6], off
	s_cmp_lg_u32 s0, -1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v4, s1, v5
	s_cbranch_scc1 .LBB1_2
.LBB1_3:                                ; %Flow53
	s_or_b32 exec_lo, exec_lo, s5
	s_load_b32 s0, s[2:3], 0xc
	v_mul_lo_u32 v2, v1, s4
	v_mov_b32_e32 v1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s14, s14, s0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add3_u32 v0, v2, v0, s14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13column_KernelPfS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13column_KernelPfS_S_iii, .Lfunc_end1-_Z13column_KernelPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 388
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z16tiled_row_KernelPfS_iii ; -- Begin function _Z16tiled_row_KernelPfS_iii
	.globl	_Z16tiled_row_KernelPfS_iii
	.p2align	8
	.type	_Z16tiled_row_KernelPfS_iii,@function
_Z16tiled_row_KernelPfS_iii:            ; @_Z16tiled_row_KernelPfS_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x2c
	s_load_b256 s[0:7], s[0:1], 0x0
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s9, s8, 16
	s_and_b32 s7, s8, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, s15, s9, v[2:3]
	v_mad_u64_u32 v[4:5], null, s14, s7, v[3:4]
	v_mad_u64_u32 v[0:1], null, v6, s4, v[4:5]
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v1, 0
	s_mov_b32 s4, exec_lo
	v_cmpx_le_i32_e64 s6, v4
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v5, s6, v0
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_u32 v5, vcc_lo, s2, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	global_load_b32 v6, v[5:6], off
.LBB2_2:
	s_or_b32 exec_lo, exec_lo, s4
	v_lshlrev_b32_e32 v5, 7, v2
	s_sub_i32 s4, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v4
	v_add_lshl_u32 v5, v5, v3, 2
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v6
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB2_4
; %bb.3:
	v_add_nc_u32_e32 v6, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s2, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	global_load_b32 v1, v[6:7], off
.LBB2_4:
	s_or_b32 exec_lo, exec_lo, s4
	v_lshl_add_u32 v5, s7, 2, v5
	v_mov_b32_e32 v4, 0
	s_cmp_lt_i32 s6, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB2_7
; %bb.5:                                ; %.lr.ph
	v_dual_mov_b32 v4, 0 :: v_dual_lshlrev_b32 v1, 2, v3
	s_lshl_b32 s2, s6, 1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v1, v2, 9, v1
.LBB2_6:                                ; =>This Inner Loop Header: Depth=1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, Filter@rel32@lo+4
	s_addc_u32 s5, s5, Filter@rel32@hi+12
	s_ashr_i32 s3, s2, 31
	ds_load_b32 v2, v1
	s_lshl_b64 s[6:7], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s4, s6, s4
	s_addc_u32 s5, s7, s5
	s_add_i32 s2, s2, -1
	s_load_b32 s3, s[4:5], 0x0
	v_add_nc_u32_e32 v1, 4, v1
	s_cmp_lg_u32 s2, -1
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v4, s3, v2
	s_cbranch_scc1 .LBB2_6
.LBB2_7:                                ; %._crit_edge
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16tiled_row_KernelPfS_iii
		.amdhsa_group_segment_fixed_size 49152
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z16tiled_row_KernelPfS_iii, .Lfunc_end2-_Z16tiled_row_KernelPfS_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 452
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 49152 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z19tiled_column_KernelPfS_iii ; -- Begin function _Z19tiled_column_KernelPfS_iii
	.globl	_Z19tiled_column_KernelPfS_iii
	.p2align	8
	.type	_Z19tiled_column_KernelPfS_iii,@function
_Z19tiled_column_KernelPfS_iii:         ; @_Z19tiled_column_KernelPfS_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x2c
	s_load_b256 s[0:7], s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	v_mov_b32_e32 v4, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s7, s8, 16
	s_and_b32 s8, s8, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s7, v[1:2]
	v_and_b32_e32 v3, 0x3ff, v0
	s_mul_i32 s14, s14, s8
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v5, v2, s4
	v_add3_u32 v0, s14, v3, v5
	v_mov_b32_e32 v5, 0
	v_cmpx_le_i32_e64 s6, v2
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_mul_i32 s9, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v5, s9, v0
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_u32 v5, vcc_lo, s2, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	global_load_b32 v5, v[5:6], off
.LBB3_2:
	s_or_b32 exec_lo, exec_lo, s8
	v_mul_u32_u24_e32 v6, 0x60, v1
	s_sub_i32 s5, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s5, v2
	v_add_lshl_u32 v6, v6, v3, 2
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v5
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB3_4
; %bb.3:
	v_mad_u64_u32 v[4:5], null, s6, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
.LBB3_4:
	s_or_b32 exec_lo, exec_lo, s5
	v_add_nc_u32_e32 v2, s7, v1
	s_cmp_lt_i32 s6, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_u32_u24_e32 v2, 0x60, v2
	v_add_lshl_u32 v5, v2, v3, 2
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB3_7
; %bb.5:                                ; %.lr.ph
	v_lshlrev_b32_e32 v2, 2, v3
	s_lshl_b32 s2, s6, 1
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u32_u24 v1, 0x180, v1, v2
	v_mov_b32_e32 v2, 0
.LBB3_6:                                ; =>This Inner Loop Header: Depth=1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, Filter@rel32@lo+4
	s_addc_u32 s5, s5, Filter@rel32@hi+12
	s_ashr_i32 s3, s2, 31
	ds_load_b32 v3, v1
	s_lshl_b64 s[6:7], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s4, s6, s4
	s_addc_u32 s5, s7, s5
	s_add_i32 s2, s2, -1
	s_load_b32 s3, s[4:5], 0x0
	v_add_nc_u32_e32 v1, 0x180, v1
	s_cmp_lg_u32 s2, -1
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v2, s3, v3
	s_cbranch_scc1 .LBB3_6
.LBB3_7:                                ; %._crit_edge
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19tiled_column_KernelPfS_iii
		.amdhsa_group_segment_fixed_size 49152
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z19tiled_column_KernelPfS_iii, .Lfunc_end3-_Z19tiled_column_KernelPfS_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 492
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 49152 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	Filter                  ; @Filter
	.type	Filter,@object
	.section	.bss,"aw",@nobits
	.globl	Filter
	.p2align	4, 0x0
Filter:
	.zero	132
	.size	Filter, 132

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym Filter
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10row_KernelPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10row_KernelPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13column_KernelPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13column_KernelPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 49152
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16tiled_row_KernelPfS_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16tiled_row_KernelPfS_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 49152
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19tiled_column_KernelPfS_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z19tiled_column_KernelPfS_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
