#include <stdio.h>
#include "cuda.h"
#define max(x,y)  ((x) > (y)? (x) : (y))
#define min(x,y)  ((x) < (y)? (x) : (y))
#define ceil(a,b) ((a) % (b) == 0 ? (a) / (b) : ((a) / (b)) + 1)

void check_error (const char* message) {
	cudaError_t error = cudaGetLastError ();
	if (error != cudaSuccess) {
		printf ("CUDA error : %s, %s\n", message, cudaGetErrorString (error));
		exit(-1);
	}
}

__global__ void __launch_bounds__(256,1) curvi_1 (double * __restrict__ in_r1, double *__restrict__ in_u1, double * __restrict__ in_u2, double *__restrict__ in_u3, double * __restrict__ in_mu, double * __restrict__ in_la, double * __restrict__ in_met1, double * __restrict__ in_met2, double * __restrict__ in_met3, double * __restrict__ in_met4, double * strx, double * stry, double c1, double c2, int N) {
	//Determing the block's indices
	int blockdim_k= (int)(blockDim.x);
	int k0 = (int)(blockIdx.x)*(blockdim_k);
	int k = max (k0, 0) + (int)(threadIdx.x);
	int blockdim_j= (int)(blockDim.y);
	int j0 = (int)(blockIdx.y)*(blockdim_j);
	int j = max (j0, 0) + (int)(threadIdx.y);

	double (*u1)[304][304] = (double (*)[304][304])in_u1;
	double (*u2)[304][304] = (double (*)[304][304])in_u2;
	double (*u3)[304][304] = (double (*)[304][304])in_u3;
	double (*mu)[304][304] = (double (*)[304][304])in_mu;
	double (*la)[304][304] = (double (*)[304][304])in_la;
	double (*r1)[304][304] = (double (*)[304][304])in_r1;
	double (*met1)[304][304] = (double (*)[304][304])in_met1;
	double (*met2)[304][304] = (double (*)[304][304])in_met2;
	double (*met3)[304][304] = (double (*)[304][304])in_met3;
	double (*met4)[304][304] = (double (*)[304][304])in_met4;

	if (j>=2 & k>=2 & j<=N-3 & k<=N-3) {
		for (int i=2; i<=N-3; i++) {
double _t_6_;
double _t_4_;
double _t_7_;
double _t_5_;
double _t_8_;
double _t_3_;
double _t_2_;
double _t_1_;
double _t_11_;
double _t_9_;
double _t_12_;
double _t_10_;
double _t_13_;
double _t_18_;
double _t_16_;
double _t_19_;
double _t_17_;
double _t_20_;
double _t_15_;
double _t_14_;
double _t_23_;
double _t_21_;
double _t_24_;
double _t_22_;
double _t_25_;
double _t_0_;
double _t_31_;
double _t_29_;
double _t_32_;
double _t_30_;
double _t_33_;
double _t_28_;
double _t_27_;
double _t_26_;
double _t_36_;
double _t_34_;
double _t_37_;
double _t_35_;
double _t_38_;
double _t_43_;
double _t_41_;
double _t_44_;
double _t_42_;
double _t_45_;
double _t_40_;
double _t_39_;
double _t_48_;
double _t_46_;
double _t_49_;
double _t_47_;
double _t_50_;
double r1ic0jc0kc0 = r1[i][j][k];
double _t_58_;
double _t_57_;
double _t_55_;
double _t_59_;
double _t_56_;
double _t_60_;
double _t_54_;
double _t_53_;
double _t_64_;
double _t_62_;
double _t_65_;
double _t_63_;
double _t_66_;
double _t_61_;
double _t_69_;
double _t_67_;
double _t_70_;
double _t_68_;
double _t_71_;
double _t_76_;
double _t_75_;
double _t_73_;
double _t_77_;
double _t_74_;
double _t_78_;
double _t_72_;
double _t_82_;
double _t_80_;
double _t_83_;
double _t_81_;
double _t_84_;
double _t_79_;
double _t_87_;
double _t_85_;
double _t_88_;
double _t_86_;
double _t_89_;
double _t_52_;
double _t_95_;
double _t_94_;
double _t_92_;
double _t_96_;
double _t_93_;
double _t_97_;
double _t_91_;
double _t_90_;
double _t_101_;
double _t_99_;
double _t_102_;
double _t_100_;
double _t_103_;
double _t_98_;
double _t_106_;
double _t_104_;
double _t_107_;
double _t_105_;
double _t_108_;
double _t_113_;
double _t_112_;
double _t_110_;
double _t_114_;
double _t_111_;
double _t_115_;
double _t_109_;
double _t_119_;
double _t_117_;
double _t_120_;
double _t_118_;
double _t_121_;
double _t_116_;
double _t_124_;
double _t_122_;
double _t_125_;
double _t_123_;
double _t_126_;
double _t_51_;
double _t_134_;
double _t_133_;
double _t_131_;
double _t_135_;
double _t_132_;
double _t_136_;
double _t_130_;
double _t_129_;
double _t_128_;
double _t_139_;
double _t_137_;
double _t_140_;
double _t_138_;
double _t_141_;
double _t_145_;
double _t_143_;
double _t_146_;
double _t_144_;
double _t_147_;
double _t_142_;
double _t_153_;
double _t_152_;
double _t_150_;
double _t_154_;
double _t_151_;
double _t_155_;
double _t_149_;
double _t_148_;
double _t_158_;
double _t_156_;
double _t_159_;
double _t_157_;
double _t_160_;
double _t_164_;
double _t_162_;
double _t_165_;
double _t_163_;
double _t_166_;
double _t_161_;
double _t_127_;
double _t_173_;
double _t_172_;
double _t_170_;
double _t_174_;
double _t_171_;
double _t_175_;
double _t_169_;
double _t_168_;
double _t_167_;
double _t_178_;
double _t_176_;
double _t_179_;
double _t_177_;
double _t_180_;
double _t_184_;
double _t_182_;
double _t_185_;
double _t_183_;
double _t_186_;
double _t_181_;
double _t_192_;
double _t_191_;
double _t_189_;
double _t_193_;
double _t_190_;
double _t_194_;
double _t_188_;
double _t_187_;
double _t_197_;
double _t_195_;
double _t_198_;
double _t_196_;
double _t_199_;
double _t_203_;
double _t_201_;
double _t_204_;
double _t_202_;
double _t_205_;
double _t_200_;

_t_6_ = mu[i][j][k+2] * met3[i][j][k+2];
_t_4_ = _t_6_ * met1[i][j][k+2];
_t_7_ = u1[i][j+2][k+2];
_t_7_ -= u1[i][j-2][k+2];
_t_5_ = c2 * _t_7_;
_t_8_ = u1[i][j+1][k+2];
_t_8_ -= u1[i][j-1][k+2];
_t_5_ += c1 * _t_8_;
_t_3_ = _t_4_ * _t_5_;
_t_2_ = _t_3_ * stry[j+2];
_t_1_ = _t_2_ * strx[i];
_t_11_ = la[i][j][k+2] * met2[i][j][k+2];
_t_9_ = _t_11_ * met1[i][j][k+2];
_t_12_ = u2[i][j+2][k+2];
_t_12_ -= u2[i][j-2][k+2];
_t_10_ = c2 * _t_12_;
_t_13_ = u2[i][j+1][k+2];
_t_13_ -= u2[i][j-1][k+2];
_t_10_ += c1 * _t_13_;
_t_1_ += _t_9_ * _t_10_;
_t_18_ = mu[i][j][k-2] * met3[i][j][k-2];
_t_16_ = _t_18_ * met1[i][j][k-2];
_t_19_ = u1[i][j+2][k-2];
_t_19_ -= u1[i][j-2][k-2];
_t_17_ = c2 * _t_19_;
_t_20_ = u1[i][j+1][k-2];
_t_20_ -= u1[i][j-1][k-2];
_t_17_ += c1 * _t_20_;
_t_15_ = _t_16_ * _t_17_;
_t_14_ = _t_15_ * stry[j];
_t_1_ += _t_14_ * strx[i];
_t_23_ = la[i][j][k-2] * met2[i][j][k-2];
_t_21_ = _t_23_ * met1[i][j][k-2];
_t_24_ = u2[i][j+2][k-2];
_t_24_ -= u2[i][j-2][k-2];
_t_22_ = c2 * _t_24_;
_t_25_ = u2[i][j+1][k-2];
_t_25_ -= u2[i][j-1][k-2];
_t_22_ += c1 * _t_25_;
_t_1_ += _t_21_ * _t_22_;
_t_0_ = c2 * _t_1_;
_t_31_ = mu[i][j][k+1] * met3[i][j][k+1];
_t_29_ = _t_31_ * met1[i][j][k+1];
_t_32_ = u1[i][j+2][k+1];
_t_32_ -= u1[i][j-2][k+1];
_t_30_ = c2 * _t_32_;
_t_33_ = u1[i][j+1][k+1];
_t_33_ -= u1[i][j-1][k+1];
_t_30_ += c1 * _t_33_;
_t_28_ = _t_29_ * _t_30_;
_t_27_ = _t_28_ * stry[j-2];
_t_26_ = _t_27_ * strx[i];
_t_36_ = la[i][j][k+1] * met2[i][j][k+1];
_t_34_ = _t_36_ * met1[i][j][k+1];
_t_37_ = u2[i][j+2][k+1];
_t_37_ -= u2[i][j-2][k+1];
_t_35_ = c2 * _t_37_;
_t_38_ = u2[i][j+1][k+1];
_t_38_ -= u2[i][j-1][k+1];
_t_35_ += c1 * _t_38_;
_t_26_ += _t_34_ * _t_35_;
_t_43_ = mu[i][j][k-1] * met3[i][j][k-1];
_t_41_ = _t_43_ * met1[i][j][k-1];
_t_44_ = u1[i][j+2][k-1];
_t_44_ -= u1[i][j-2][k-1];
_t_42_ = c2 * _t_44_;
_t_45_ = u1[i][j+1][k-1];
_t_45_ -= u1[i][j-1][k-1];
_t_42_ += c1 * _t_45_;
_t_40_ = _t_41_ * _t_42_;
_t_39_ = _t_40_ * stry[j];
_t_26_ += _t_39_ * strx[i];
_t_48_ = la[i][j][k-1] * met2[i][j][k-1];
_t_46_ = _t_48_ * met1[i][j][k-1];
_t_49_ = u2[i][j+2][k-1];
_t_49_ -= u2[i][j-2][k-1];
_t_47_ = c2 * _t_49_;
_t_50_ = u2[i][j+1][k-1];
_t_50_ -= u2[i][j-1][k-1];
_t_47_ += c1 * _t_50_;
_t_26_ += _t_46_ * _t_47_;
_t_0_ += c1 * _t_26_;
r1ic0jc0kc0 += _t_0_;
_t_58_ = 2.0 * mu[i+2][j][k];
_t_58_ += la[i+2][j][k];
_t_57_ = _t_58_ * met2[i+2][j][k];
_t_55_ = _t_57_ * met1[i+2][j][k];
_t_59_ = u1[i+2][j][k+2];
_t_59_ -= u1[i+2][j][k-2];
_t_56_ = c2 * _t_59_;
_t_60_ = u1[i+2][j][k+1];
_t_60_ -= u1[i+2][j][k-1];
_t_56_ += c1 * _t_60_;
_t_54_ = _t_55_ * _t_56_;
_t_53_ = _t_54_ * strx[i];
_t_64_ = la[i+2][j][k] * met3[i+2][j][k];
_t_62_ = _t_64_ * met1[i+2][j][k];
_t_65_ = u2[i+2][j][k+2];
_t_65_ -= u2[i+2][j][k-2];
_t_63_ = c2 * _t_65_;
_t_66_ = u2[i+2][j][k+1];
_t_66_ -= u2[i+2][j][k-1];
_t_63_ += c1 * _t_66_;
_t_61_ = _t_62_ * _t_63_;
_t_53_ += _t_61_ * stry[j];
_t_69_ = la[i+2][j][k] * met4[i+2][j][k];
_t_67_ = _t_69_ * met1[i+2][j][k];
_t_70_ = u3[i+2][j][k+2];
_t_70_ -= u3[i+2][j][k-2];
_t_68_ = c2 * _t_70_;
_t_71_ = u3[i+2][j][k+1];
_t_71_ -= u3[i+2][j][k-1];
_t_68_ += c1 * _t_71_;
_t_53_ += _t_67_ * _t_68_;
_t_76_ = 2.0 * mu[i-2][j][k];
_t_76_ += la[i-2][j][k];
_t_75_ = _t_76_ * met2[i-2][j][k];
_t_73_ = _t_75_ * met1[i-2][j][k];
_t_77_ = u1[i-2][j][k+2];
_t_77_ -= u1[i-2][j][k-2];
_t_74_ = c2 * _t_77_;
_t_78_ = u1[i-2][j][k+1];
_t_78_ -= u1[i-2][j][k-1];
_t_74_ += c1 * _t_78_;
_t_72_ = _t_73_ * _t_74_;
_t_53_ += _t_72_ * strx[i];
_t_82_ = la[i-2][j][k] * met3[i-2][j][k];
_t_80_ = _t_82_ * met1[i-2][j][k];
_t_83_ = u2[i-2][j][k+2];
_t_83_ -= u2[i-2][j][k-2];
_t_81_ = c2 * _t_83_;
_t_84_ = u2[i-2][j][k+1];
_t_84_ -= u2[i-2][j][k-1];
_t_81_ += c1 * _t_84_;
_t_79_ = _t_80_ * _t_81_;
_t_53_ += _t_79_ * stry[j];
_t_87_ = la[i-2][j][k] * met4[i-2][j][k];
_t_85_ = _t_87_ * met1[i-2][j][k];
_t_88_ = u3[i-2][j][k+2];
_t_88_ -= u3[i-2][j][k-2];
_t_86_ = c2 * _t_88_;
_t_89_ = u3[i-2][j][k+1];
_t_89_ -= u3[i-2][j][k-1];
_t_86_ += c1 * _t_89_;
_t_53_ += _t_85_ * _t_86_;
_t_52_ = c2 * _t_53_;
_t_95_ = 2.0 * mu[i+1][j][k];
_t_95_ += la[i+1][j][k];
_t_94_ = _t_95_ * met2[i+1][j][k];
_t_92_ = _t_94_ * met1[i+1][j][k];
_t_96_ = u1[i+1][j][k+2];
_t_96_ -= u1[i+1][j][k-2];
_t_93_ = c2 * _t_96_;
_t_97_ = u1[i+1][j][k+1];
_t_97_ -= u1[i+1][j][k-1];
_t_93_ += c1 * _t_97_;
_t_91_ = _t_92_ * _t_93_;
_t_90_ = _t_91_ * strx[i];
_t_101_ = la[i+1][j][k] * met3[i+1][j][k];
_t_99_ = _t_101_ * met1[i+1][j][k];
_t_102_ = u2[i+1][j][k+2];
_t_102_ -= u2[i+1][j][k-2];
_t_100_ = c2 * _t_102_;
_t_103_ = u2[i+1][j][k+1];
_t_103_ -= u2[i+1][j][k-1];
_t_100_ += c1 * _t_103_;
_t_98_ = _t_99_ * _t_100_;
_t_90_ += _t_98_ * stry[j];
_t_106_ = la[i+1][j][k] * met4[i+1][j][k];
_t_104_ = _t_106_ * met1[i+1][j][k];
_t_107_ = u3[i+1][j][k+2];
_t_107_ -= u3[i+1][j][k-2];
_t_105_ = c2 * _t_107_;
_t_108_ = u3[i+1][j][k+1];
_t_108_ -= u3[i+1][j][k-1];
_t_105_ += c1 * _t_108_;
_t_90_ += _t_104_ * _t_105_;
_t_113_ = 2.0 * mu[i-1][j][k];
_t_113_ += la[i-1][j][k];
_t_112_ = _t_113_ * met2[i-1][j][k];
_t_110_ = _t_112_ * met1[i-1][j][k];
_t_114_ = u1[i-1][j][k+2];
_t_114_ -= u1[i-1][j][k-2];
_t_111_ = c2 * _t_114_;
_t_115_ = u1[i-1][j][k+1];
_t_115_ -= u1[i-1][j][k-1];
_t_111_ += c1 * _t_115_;
_t_109_ = _t_110_ * _t_111_;
_t_90_ += _t_109_ * strx[i];
_t_119_ = la[i-1][j][k] * met3[i-1][j][k];
_t_117_ = _t_119_ * met1[i-1][j][k];
_t_120_ = u2[i-1][j][k+2];
_t_120_ -= u2[i-1][j][k-2];
_t_118_ = c2 * _t_120_;
_t_121_ = u2[i-1][j][k+1];
_t_121_ -= u2[i-1][j][k-1];
_t_118_ += c1 * _t_121_;
_t_116_ = _t_117_ * _t_118_;
_t_90_ += _t_116_ * stry[j];
_t_124_ = la[i-1][j][k] * met4[i-1][j][k];
_t_122_ = _t_124_ * met1[i-1][j][k];
_t_125_ = u3[i-1][j][k+2];
_t_125_ -= u3[i-1][j][k-2];
_t_123_ = c2 * _t_125_;
_t_126_ = u3[i-1][j][k+1];
_t_126_ -= u3[i-1][j][k-1];
_t_123_ += c1 * _t_126_;
_t_90_ += _t_122_ * _t_123_;
_t_52_ += c1 * _t_90_;
_t_51_ = _t_52_ * stry[j];
r1ic0jc0kc0 += _t_51_;
_t_134_ = 2.0 * mu[i][j][k+2];
_t_134_ += la[i][j][k+2];
_t_133_ = _t_134_ * met2[i][j][k+2];
_t_131_ = _t_133_ * met1[i][j][k+2];
_t_135_ = u1[i+2][j][k+2];
_t_135_ -= u1[i-2][j][k+2];
_t_132_ = c2 * _t_135_;
_t_136_ = u1[i+1][j][k+2];
_t_136_ -= u1[i-1][j][k+2];
_t_132_ += c1 * _t_136_;
_t_130_ = _t_131_ * _t_132_;
_t_129_ = _t_130_ * strx[i];
_t_128_ = _t_129_ * stry[j];
_t_139_ = mu[i][j][k+2] * met3[i][j][k+2];
_t_137_ = _t_139_ * met1[i][j][k+2];
_t_140_ = u2[i+2][j][k+2];
_t_140_ -= u2[i-2][j][k+2];
_t_138_ = c2 * _t_140_;
_t_141_ = u2[i+1][j][k+2];
_t_141_ -= u2[i-1][j][k+2];
_t_138_ += c1 * _t_141_;
_t_128_ += _t_137_ * _t_138_;
_t_145_ = mu[i][j][k+2] * met4[i][j][k+2];
_t_143_ = _t_145_ * met1[i][j][k+2];
_t_146_ = u3[i+2][j][k+2];
_t_146_ -= u3[i-2][j][k+2];
_t_144_ = c2 * _t_146_;
_t_147_ = u3[i+1][j][k+2];
_t_147_ -= u3[i-1][j][k+2];
_t_144_ += c1 * _t_147_;
_t_142_ = _t_143_ * _t_144_;
_t_128_ += _t_142_ * stry[j];
_t_153_ = 2.0 * mu[i][j][k-2];
_t_153_ += la[i][j][k-2];
_t_152_ = _t_153_ * met2[i][j][k-2];
_t_150_ = _t_152_ * met1[i][j][k-2];
_t_154_ = u1[i+2][j][k-2];
_t_154_ -= u1[i-2][j][k-2];
_t_151_ = c2 * _t_154_;
_t_155_ = u1[i+1][j][k-2];
_t_155_ -= u1[i-1][j][k-2];
_t_151_ += c1 * _t_155_;
_t_149_ = _t_150_ * _t_151_;
_t_148_ = _t_149_ * strx[i];
_t_128_ += _t_148_ * stry[j];
_t_158_ = mu[i][j][k-2] * met3[i][j][k-2];
_t_156_ = _t_158_ * met1[i][j][k-2];
_t_159_ = u2[i+2][j][k-2];
_t_159_ -= u2[i-2][j][k-2];
_t_157_ = c2 * _t_159_;
_t_160_ = u2[i+1][j][k-2];
_t_160_ -= u2[i-1][j][k-2];
_t_157_ += c1 * _t_160_;
_t_128_ += _t_156_ * _t_157_;
_t_164_ = mu[i][j][k-2] * met4[i][j][k-2];
_t_162_ = _t_164_ * met1[i][j][k-2];
_t_165_ = u3[i+2][j][k-2];
_t_165_ -= u3[i-2][j][k-2];
_t_163_ = c2 * _t_165_;
_t_166_ = u3[i+1][j][k-2];
_t_166_ -= u3[i-1][j][k-2];
_t_163_ += c1 * _t_166_;
_t_161_ = _t_162_ * _t_163_;
_t_128_ += _t_161_ * stry[j];
_t_127_ = c2 * _t_128_;
_t_173_ = 2.0 * mu[i][j][k+1];
_t_173_ += la[i][j][k+1];
_t_172_ = _t_173_ * met2[i][j][k+1];
_t_170_ = _t_172_ * met1[i][j][k+1];
_t_174_ = u1[i+2][j][k+1];
_t_174_ -= u1[i-2][j][k+1];
_t_171_ = c2 * _t_174_;
_t_175_ = u1[i+1][j][k+1];
_t_175_ -= u1[i-1][j][k+1];
_t_171_ += c1 * _t_175_;
_t_169_ = _t_170_ * _t_171_;
_t_168_ = _t_169_ * strx[i+2];
_t_167_ = _t_168_ * stry[j];
_t_178_ = mu[i][j][k+1] * met3[i][j][k+1];
_t_176_ = _t_178_ * met1[i][j][k+1];
_t_179_ = u2[i+2][j][k+1];
_t_179_ -= u2[i-2][j][k+1];
_t_177_ = c2 * _t_179_;
_t_180_ = u2[i+1][j][k+1];
_t_180_ -= u2[i-1][j][k+1];
_t_177_ += c1 * _t_180_;
_t_167_ += _t_176_ * _t_177_;
_t_184_ = mu[i][j][k+1] * met4[i][j][k+1];
_t_182_ = _t_184_ * met1[i][j][k+1];
_t_185_ = u3[i+2][j][k+1];
_t_185_ -= u3[i-2][j][k+1];
_t_183_ = c2 * _t_185_;
_t_186_ = u3[i+1][j][k+1];
_t_186_ -= u3[i-1][j][k+1];
_t_183_ += c1 * _t_186_;
_t_181_ = _t_182_ * _t_183_;
_t_167_ += _t_181_ * stry[j];
_t_192_ = 2.0 * mu[i][j][k-1];
_t_192_ += la[i][j][k-1];
_t_191_ = _t_192_ * met2[i][j][k-1];
_t_189_ = _t_191_ * met1[i][j][k-1];
_t_193_ = u1[i+2][j][k-1];
_t_193_ -= u1[i-2][j][k-1];
_t_190_ = c2 * _t_193_;
_t_194_ = u1[i+1][j][k-1];
_t_194_ -= u1[i-1][j][k-1];
_t_190_ += c1 * _t_194_;
_t_188_ = _t_189_ * _t_190_;
_t_187_ = _t_188_ * strx[i-2];
_t_167_ += _t_187_ * stry[j];
_t_197_ = mu[i][j][k-1] * met3[i][j][k-1];
_t_195_ = _t_197_ * met1[i][j][k-1];
_t_198_ = u2[i+2][j][k-1];
_t_198_ -= u2[i-2][j][k-1];
_t_196_ = c2 * _t_198_;
_t_199_ = u2[i+1][j][k-1];
_t_199_ -= u2[i-1][j][k-1];
_t_196_ += c1 * _t_199_;
_t_167_ += _t_195_ * _t_196_;
_t_203_ = mu[i][j][k-1] * met4[i][j][k-1];
_t_201_ = _t_203_ * met1[i][j][k-1];
_t_204_ = u3[i+2][j][k-1];
_t_204_ -= u3[i-2][j][k-1];
_t_202_ = c2 * _t_204_;
_t_205_ = u3[i+1][j][k-1];
_t_205_ -= u3[i-1][j][k-1];
_t_202_ += c1 * _t_205_;
_t_200_ = _t_201_ * _t_202_;
_t_167_ += _t_200_ * stry[j];
_t_127_ += c1 * _t_167_;
r1ic0jc0kc0 += _t_127_;
r1[i][j][k] = r1ic0jc0kc0;
		} 
	}
}


__global__ void __launch_bounds__(128,4) curvi_2 (double * __restrict__ in_r1, double *__restrict__ in_u1, double * __restrict__ in_u2, double *__restrict__ in_u3, double * __restrict__ in_mu, double * __restrict__ in_la, double * __restrict__ in_met1, double * __restrict__ in_met2, double * __restrict__ in_met3, double * __restrict__ in_met4, double * strx, double * stry, double c1, double c2, int N) {
	//Determing the block's indices
	int blockdim_k= (int)(blockDim.x);
	int k0 = (int)(blockIdx.x)*(blockdim_k);
	int k = max (k0, 0) + (int)(threadIdx.x);
	int blockdim_j= (int)(blockDim.y);
	int j0 = (int)(blockIdx.y)*(blockdim_j);
	int j = max (j0, 0) + (int)(threadIdx.y);
	int blockdim_i= (int)(blockDim.z);
	int i0 = (int)(blockIdx.z)*(blockdim_i);
	int i = max (i0, 0) + (int)(threadIdx.z);

	double (*u1)[304][304] = (double (*)[304][304])in_u1;
	double (*u2)[304][304] = (double (*)[304][304])in_u2;
	double (*u3)[304][304] = (double (*)[304][304])in_u3;
	double (*mu)[304][304] = (double (*)[304][304])in_mu;
	double (*la)[304][304] = (double (*)[304][304])in_la;
	double (*r1)[304][304] = (double (*)[304][304])in_r1;
	double (*met1)[304][304] = (double (*)[304][304])in_met1;
	double (*met2)[304][304] = (double (*)[304][304])in_met2;
	double (*met3)[304][304] = (double (*)[304][304])in_met3;
	double (*met4)[304][304] = (double (*)[304][304])in_met4;

	if (j>=2 & k>=2 & j<=N-3 & k<=N-3 & i>=2 & i<=N-3) {
double _t_6_;
double _t_4_;
double _t_7_;
double _t_5_;
double _t_8_;
double _t_3_;
double _t_2_;
double _t_1_;
double _t_11_;
double _t_9_;
double _t_12_;
double _t_10_;
double _t_13_;
double _t_18_;
double _t_16_;
double _t_19_;
double _t_17_;
double _t_20_;
double _t_15_;
double _t_14_;
double _t_23_;
double _t_21_;
double _t_24_;
double _t_22_;
double _t_25_;
double _t_0_;
double _t_31_;
double _t_29_;
double _t_32_;
double _t_30_;
double _t_33_;
double _t_28_;
double _t_27_;
double _t_26_;
double _t_36_;
double _t_34_;
double _t_37_;
double _t_35_;
double _t_38_;
double _t_43_;
double _t_41_;
double _t_44_;
double _t_42_;
double _t_45_;
double _t_40_;
double _t_39_;
double _t_48_;
double _t_46_;
double _t_49_;
double _t_47_;
double _t_50_;
double r1ic0jc0kc0 = r1[i][j][k];
double _t_55_;
double _t_53_;
double _t_56_;
double _t_54_;
double _t_57_;
double _t_52_;
double _t_60_;
double _t_58_;
double _t_61_;
double _t_59_;
double _t_62_;
double _t_51_;
double _t_66_;
double _t_64_;
double _t_67_;
double _t_65_;
double _t_68_;
double _t_63_;
double _t_71_;
double _t_69_;
double _t_72_;
double _t_70_;
double _t_73_;
double _t_77_;
double _t_75_;
double _t_78_;
double _t_76_;
double _t_79_;
double _t_74_;
double _t_82_;
double _t_80_;
double _t_83_;
double _t_81_;
double _t_84_;
double _t_88_;
double _t_86_;
double _t_89_;
double _t_87_;
double _t_90_;
double _t_85_;
double _t_93_;
double _t_91_;
double _t_94_;
double _t_92_;
double _t_95_;

_t_6_ = mu[i][j+2][k] * met3[i][j+2][k];
_t_4_ = _t_6_ * met1[i][j+2][k];
_t_7_ = u1[i][j+2][k+2];
_t_7_ -= u1[i][j+2][k-2];
_t_5_ = c2 * _t_7_;
_t_8_ = u1[i][j+2][k+1];
_t_8_ -= u1[i][j+2][k-1];
_t_5_ += c1 * _t_8_;
_t_3_ = _t_4_ * _t_5_;
_t_2_ = _t_3_ * stry[j+1];
_t_1_ = _t_2_ * strx[i];
_t_11_ = mu[i][j+2][k] * met2[i][j+2][k];
_t_9_ = _t_11_ * met1[i][j+2][k];
_t_12_ = u2[i][j+2][k+2];
_t_12_ -= u2[i][j+2][k-2];
_t_10_ = c2 * _t_12_;
_t_13_ = u2[i][j+2][k+1];
_t_13_ -= u2[i][j+2][k-1];
_t_10_ += c1 * _t_13_;
_t_1_ += _t_9_ * _t_10_;
_t_18_ = mu[i][j-2][k] * met3[i][j-2][k];
_t_16_ = _t_18_ * met1[i][j-2][k];
_t_19_ = u1[i][j-2][k+2];
_t_19_ -= u1[i][j-2][k-2];
_t_17_ = c2 * _t_19_;
_t_20_ = u1[i][j-2][k+1];
_t_20_ -= u1[i][j-2][k-1];
_t_17_ += c1 * _t_20_;
_t_15_ = _t_16_ * _t_17_;
_t_14_ = _t_15_ * stry[j];
_t_1_ += _t_14_ * strx[i];
_t_23_ = mu[i][j-2][k] * met2[i][j-2][k];
_t_21_ = _t_23_ * met1[i][j-2][k];
_t_24_ = u2[i][j-2][k+2];
_t_24_ -= u2[i][j-2][k-2];
_t_22_ = c2 * _t_24_;
_t_25_ = u2[i][j-2][k+1];
_t_25_ -= u2[i][j-2][k-1];
_t_22_ += c1 * _t_25_;
_t_1_ += _t_21_ * _t_22_;
_t_0_ = c2 * _t_1_;
_t_31_ = mu[i][j+1][k] * met3[i][j+1][k];
_t_29_ = _t_31_ * met1[i][j+1][k];
_t_32_ = u1[i][j+1][k+2];
_t_32_ -= u1[i][j+1][k-2];
_t_30_ = c2 * _t_32_;
_t_33_ = u1[i][j+1][k+1];
_t_33_ -= u1[i][j+1][k-1];
_t_30_ += c1 * _t_33_;
_t_28_ = _t_29_ * _t_30_;
_t_27_ = _t_28_ * stry[j-1];
_t_26_ = _t_27_ * strx[i];
_t_36_ = mu[i][j+1][k] * met2[i][j+1][k];
_t_34_ = _t_36_ * met1[i][j+1][k];
_t_37_ = u2[i][j+1][k+2];
_t_37_ -= u2[i][j+1][k-2];
_t_35_ = c2 * _t_37_;
_t_38_ = u2[i][j+1][k+1];
_t_38_ -= u2[i][j+1][k-1];
_t_35_ += c1 * _t_38_;
_t_26_ += _t_34_ * _t_35_;
_t_43_ = mu[i][j-1][k] * met3[i][j-1][k];
_t_41_ = _t_43_ * met1[i][j-1][k];
_t_44_ = u1[i][j-1][k+2];
_t_44_ -= u1[i][j-1][k-2];
_t_42_ = c2 * _t_44_;
_t_45_ = u1[i][j-1][k+1];
_t_45_ -= u1[i][j-1][k-1];
_t_42_ += c1 * _t_45_;
_t_40_ = _t_41_ * _t_42_;
_t_39_ = _t_40_ * stry[j];
_t_26_ += _t_39_ * strx[i];
_t_48_ = mu[i][j-1][k] * met2[i][j-1][k];
_t_46_ = _t_48_ * met1[i][j-1][k];
_t_49_ = u2[i][j-1][k+2];
_t_49_ -= u2[i][j-1][k-2];
_t_47_ = c2 * _t_49_;
_t_50_ = u2[i][j-1][k+1];
_t_50_ -= u2[i][j-1][k-1];
_t_47_ += c1 * _t_50_;
_t_26_ += _t_46_ * _t_47_;
_t_0_ += c1 * _t_26_;
r1ic0jc0kc0 += _t_0_;
_t_55_ = mu[i][j+2][k] * met1[i][j+2][k];
_t_53_ = _t_55_ * met1[i][j+2][k];
_t_56_ = u2[i+2][j+2][k];
_t_56_ -= u2[i-2][j+2][k];
_t_54_ = c2 * _t_56_;
_t_57_ = u2[i+1][j+2][k];
_t_57_ -= u2[i-1][j+2][k];
_t_54_ += c1 * _t_57_;
_t_52_ = _t_53_ * _t_54_;
_t_60_ = mu[i][j-2][k] * met1[i][j-2][k];
_t_58_ = _t_60_ * met1[i][j-2][k];
_t_61_ = u2[i+2][j-2][k];
_t_61_ -= u2[i-2][j-2][k];
_t_59_ = c2 * _t_61_;
_t_62_ = u2[i+1][j-2][k];
_t_62_ -= u2[i-1][j-2][k];
_t_59_ += c1 * _t_62_;
_t_52_ += _t_58_ * _t_59_;
_t_51_ = c2 * _t_52_;
_t_66_ = mu[i][j+1][k] * met1[i][j+1][k];
_t_64_ = _t_66_ * met1[i][j+1][k];
_t_67_ = u2[i+2][j+1][k];
_t_67_ -= u2[i-2][j+1][k];
_t_65_ = c2 * _t_67_;
_t_68_ = u2[i+1][j+1][k];
_t_68_ -= u2[i-1][j+1][k];
_t_65_ += c1 * _t_68_;
_t_63_ = _t_64_ * _t_65_;
_t_71_ = mu[i][j-1][k] * met1[i][j-1][k];
_t_69_ = _t_71_ * met1[i][j-1][k];
_t_72_ = u2[i+2][j-1][k];
_t_72_ -= u2[i-2][j-1][k];
_t_70_ = c2 * _t_72_;
_t_73_ = u2[i+1][j-1][k];
_t_73_ -= u2[i-1][j-1][k];
_t_70_ += c1 * _t_73_;
_t_63_ += _t_69_ * _t_70_;
_t_51_ += c1 * _t_63_;
_t_77_ = la[i+2][j][k] * met1[i+2][j][k];
_t_75_ = _t_77_ * met1[i+2][j][k];
_t_78_ = u2[i+2][j+2][k];
_t_78_ -= u2[i+2][j-2][k];
_t_76_ = c2 * _t_78_;
_t_79_ = u2[i+2][j+1][k];
_t_79_ -= u2[i+2][j-1][k];
_t_76_ += c1 * _t_79_;
_t_74_ = _t_75_ * _t_76_;
_t_82_ = la[i-2][j][k] * met1[i-2][j][k];
_t_80_ = _t_82_ * met1[i-2][j][k];
_t_83_ = u2[i-2][j+2][k];
_t_83_ -= u2[i-2][j-2][k];
_t_81_ = c2 * _t_83_;
_t_84_ = u2[i-2][j+1][k];
_t_84_ -= u2[i-2][j-1][k];
_t_81_ += c1 * _t_84_;
_t_74_ += _t_80_ * _t_81_;
_t_51_ += c2 * _t_74_;
_t_88_ = la[i+1][j][k] * met1[i+1][j][k];
_t_86_ = _t_88_ * met1[i+1][j][k];
_t_89_ = u2[i+1][j+2][k];
_t_89_ -= u2[i+1][j-2][k];
_t_87_ = c2 * _t_89_;
_t_90_ = u2[i+1][j+1][k];
_t_90_ -= u2[i+1][j-1][k];
_t_87_ += c1 * _t_90_;
_t_85_ = _t_86_ * _t_87_;
_t_93_ = la[i-1][j][k] * met1[i-1][j][k];
_t_91_ = _t_93_ * met1[i-1][j][k];
_t_94_ = u2[i-1][j+2][k];
_t_94_ -= u2[i-1][j-2][k];
_t_92_ = c2 * _t_94_;
_t_95_ = u2[i-1][j+1][k];
_t_95_ -= u2[i-1][j-1][k];
_t_92_ += c1 * _t_95_;
_t_85_ += _t_91_ * _t_92_;
_t_51_ += c1 * _t_85_;
r1ic0jc0kc0 += _t_51_;
r1[i][j][k] = r1ic0jc0kc0;
	}
}

extern "C" void host_code (double *h_r1, double *h_u1, double *h_u2, double *h_u3,  double *h_mu, double *h_la, double *h_met1, double *h_met2, double *h_met3, double *h_met4, double *h_strx, double *h_stry, double c1, double c2, int N) {
	double *r1;
	cudaMalloc (&r1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for r1\n");
	cudaMemcpy (r1, h_r1, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *u1;
	cudaMalloc (&u1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u1\n");
	cudaMemcpy (u1, h_u1, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *u2;
	cudaMalloc (&u2, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u2\n");
	cudaMemcpy (u2, h_u2, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *u3;
	cudaMalloc (&u3, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u3\n");
	cudaMemcpy (u3, h_u3, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *mu;
	cudaMalloc (&mu, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for mu\n");
	cudaMemcpy (mu, h_mu, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *la;
	cudaMalloc (&la, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for la\n");
	cudaMemcpy (la, h_la, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *met1;
	cudaMalloc (&met1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met1\n");
	cudaMemcpy (met1, h_met1, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *met2;
	cudaMalloc (&met2, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met2\n");
	cudaMemcpy (met2, h_met2, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *met3;
	cudaMalloc (&met3, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met3\n");
	cudaMemcpy (met3, h_met3, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *met4;
	cudaMalloc (&met4, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met4\n");
	cudaMemcpy (met4, h_met4, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *strx;
	cudaMalloc (&strx, sizeof(double)*N);
	check_error ("Failed to allocate device memory for strx\n");
	cudaMemcpy (strx, h_strx, sizeof(double)*N, cudaMemcpyHostToDevice);
	double *stry;
	cudaMalloc (&stry, sizeof(double)*N);
	check_error ("Failed to allocate device memory for stry\n");
	cudaMemcpy (stry, h_stry, sizeof(double)*N, cudaMemcpyHostToDevice);

	dim3 blockconfig (16, 8);
	dim3 gridconfig (ceil(N, blockconfig.x), ceil(N, blockconfig.y), 1);
	curvi_1 <<<gridconfig, blockconfig>>> (r1, u1, u2, u3, mu, la, met1, met2, met3, met4, strx, stry, c1, c2, N);
	dim3 blockconfig_1 (16, 2, 2);
	dim3 gridconfig_1 (ceil(N, blockconfig_1.x), ceil(N, blockconfig_1.y), ceil(N, blockconfig_1.z));
	curvi_2 <<<gridconfig_1, blockconfig_1>>> (r1, u1, u2, u3, mu, la, met1, met2, met3, met4, strx, stry, c1, c2, N);

	cudaMemcpy (h_r1, r1, sizeof(double)*N*N*N, cudaMemcpyDeviceToHost);
}

	.file	"tmpxft_003643d1_00000000-6_reordered-l.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0, @function
_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0:
.LFB2175:
	.cfi_startproc
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE2175:
	.size	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0, .-_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error : %s, %s\n"
	.text
	.globl	_Z11check_errorPKc
	.type	_Z11check_errorPKc, @function
_Z11check_errorPKc:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L3
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	movq	%rbx, %rdx
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L3:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z11check_errorPKc, .-_Z11check_errorPKc
	.globl	_Z51__device_stub__Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.type	_Z51__device_stub__Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi, @function
_Z51__device_stub__Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$312, %rsp
	.cfi_def_cfa_offset 320
	movq	352(%rsp), %rax
	movsd	%xmm0, 8(%rsp)
	movsd	%xmm1, (%rsp)
	movq	%rax, 24(%rsp)
	movq	360(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 296(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rax
	movq	%rdi, 32(%rsp)
	leaq	128(%rsp), %rdi
	movq	%rax, 176(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 216(%rsp)
	movq	320(%rsp), %rax
	movq	%rsi, 40(%rsp)
	leaq	140(%rsp), %rsi
	movq	%rax, 80(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 224(%rsp)
	movq	328(%rsp), %rax
	movq	%rdx, 48(%rsp)
	leaq	112(%rsp), %rdx
	movq	%rax, 88(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 232(%rsp)
	movq	336(%rsp), %rax
	movq	%rcx, 56(%rsp)
	leaq	120(%rsp), %rcx
	movq	%rax, 96(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 240(%rsp)
	movq	344(%rsp), %rax
	movq	%r8, 64(%rsp)
	movq	%r9, 72(%rsp)
	movq	%rax, 104(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 272(%rsp)
	movq	%rsp, %rax
	movq	%rax, 280(%rsp)
	leaq	368(%rsp), %rax
	movq	%rax, 288(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 128(%rsp)
	movl	$1, 136(%rsp)
	movq	%rax, 140(%rsp)
	movl	$1, 148(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	120(%rsp)
	.cfi_def_cfa_offset 328
	leaq	_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi(%rip), %rdi
	pushq	120(%rsp)
	.cfi_def_cfa_offset 336
	movq	156(%rsp), %rcx
	movl	164(%rsp), %r8d
	movq	144(%rsp), %rsi
	movl	152(%rsp), %edx
	leaq	192(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 328
	popq	%rdx
	.cfi_def_cfa_offset 320
.L7:
	movq	296(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$312, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z51__device_stub__Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi, .-_Z51__device_stub__Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.globl	_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.type	_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi, @function
_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z51__device_stub__Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.cfi_endproc
.LFE2054:
	.size	_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi, .-_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.globl	_Z51__device_stub__Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.type	_Z51__device_stub__Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi, @function
_Z51__device_stub__Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$312, %rsp
	.cfi_def_cfa_offset 320
	movq	352(%rsp), %rax
	movsd	%xmm0, 8(%rsp)
	movsd	%xmm1, (%rsp)
	movq	%rax, 24(%rsp)
	movq	360(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 296(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rax
	movq	%rdi, 32(%rsp)
	leaq	128(%rsp), %rdi
	movq	%rax, 176(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 216(%rsp)
	movq	320(%rsp), %rax
	movq	%rsi, 40(%rsp)
	leaq	140(%rsp), %rsi
	movq	%rax, 80(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 224(%rsp)
	movq	328(%rsp), %rax
	movq	%rdx, 48(%rsp)
	leaq	112(%rsp), %rdx
	movq	%rax, 88(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 232(%rsp)
	movq	336(%rsp), %rax
	movq	%rcx, 56(%rsp)
	leaq	120(%rsp), %rcx
	movq	%rax, 96(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 240(%rsp)
	movq	344(%rsp), %rax
	movq	%r8, 64(%rsp)
	movq	%r9, 72(%rsp)
	movq	%rax, 104(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 272(%rsp)
	movq	%rsp, %rax
	movq	%rax, 280(%rsp)
	leaq	368(%rsp), %rax
	movq	%rax, 288(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 128(%rsp)
	movl	$1, 136(%rsp)
	movq	%rax, 140(%rsp)
	movl	$1, 148(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	120(%rsp)
	.cfi_def_cfa_offset 328
	leaq	_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi(%rip), %rdi
	pushq	120(%rsp)
	.cfi_def_cfa_offset 336
	movq	156(%rsp), %rcx
	movl	164(%rsp), %r8d
	movq	144(%rsp), %rsi
	movl	152(%rsp), %edx
	leaq	192(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 328
	popq	%rdx
	.cfi_def_cfa_offset 320
.L12:
	movq	296(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$312, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z51__device_stub__Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi, .-_Z51__device_stub__Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.globl	_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.type	_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi, @function
_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z51__device_stub__Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.cfi_endproc
.LFE2056:
	.size	_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi, .-_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.section	.rodata.str1.1
.LC1:
	.string	"Failed to allocate device memory for r1\n"
.LC2:
	.string	"Failed to allocate device memory for u1\n"
.LC3:
	.string	"Failed to allocate device memory for u2\n"
.LC4:
	.string	"Failed to allocate device memory for u3\n"
.LC5:
	.string	"Failed to allocate device memory for mu\n"
.LC6:
	.string	"Failed to allocate device memory for la\n"
.LC7:
	.string	"Failed to allocate device memory for met1\n"
.LC8:
	.string	"Failed to allocate device memory for met2\n"
.LC9:
	.string	"Failed to allocate device memory for met3\n"
.LC10:
	.string	"Failed to allocate device memory for met4\n"
.LC11:
	.string	"Failed to allocate device memory for strx\n"
.LC12:
	.string	"Failed to allocate device memory for stry\n"
	.text
	.globl	host_code
	.type	host_code, @function
host_code:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$264, %rsp
	.cfi_def_cfa_offset 320
	movq	320(%rsp), %rax
	movq	%r9, 32(%rsp)
	movq	%rdi, 16(%rsp)
	movslq	368(%rsp), %rbp
	leaq	104(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movq	328(%rsp), %rax
	movsd	%xmm0, 24(%rsp)
	movq	%rbp, %rbx
	movq	%rax, 48(%rsp)
	movq	336(%rsp), %rax
	movsd	%xmm1, 88(%rsp)
	movq	%rax, 56(%rsp)
	movq	344(%rsp), %rax
	movq	%rax, 64(%rsp)
	movq	352(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	360(%rsp), %rax
	movq	%rax, 80(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 248(%rsp)
	movq	%rbp, %rax
	imulq	%rbp, %rax
	imulq	%rbp, %rax
	salq	$3, %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC1(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	104(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	112(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC2(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	112(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	120(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC3(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	120(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	128(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC4(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	movq	%r13, %rsi
	movq	128(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	136(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC5(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	movq	%r12, %rsi
	movq	136(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	144(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC6(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$1, %ecx
	movq	144(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	152(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC7(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	$1, %ecx
	movq	152(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	160(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC8(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	$1, %ecx
	movq	160(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	168(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC9(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	$1, %ecx
	movq	168(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	176(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC10(%rip), %rdi
	salq	$3, %rbp
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$1, %ecx
	movq	176(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	%rbp, %rsi
	leaq	184(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC11(%rip), %rdi
	call	_Z11check_errorPKc
	movq	72(%rsp), %rsi
	movq	%rbp, %rdx
	movq	184(%rsp), %rdi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	%rbp, %rsi
	leaq	192(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC12(%rip), %rdi
	call	_Z11check_errorPKc
	movq	80(%rsp), %rsi
	movq	%rbp, %rdx
	movq	192(%rsp), %rdi
	movl	$1, %ecx
	movl	%ebx, %ebp
	call	cudaMemcpy@PLT
	movl	%ebx, %edx
	movl	%ebx, %eax
	movl	$1, %ecx
	andl	$7, %edx
	shrl	$3, %eax
	movl	$1, %esi
	cmpl	$1, %edx
	movl	%ebx, %edx
	sbbl	$-1, %eax
	andl	$15, %edx
	shrl	$4, %ebp
	cmpl	$1, %edx
	movl	%eax, 216(%rsp)
	movl	$2147483649, %edx
	sbbl	$-1, %ebp
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$4, %rdx
	movl	%ebp, 212(%rsp)
	movq	212(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	movsd	88(%rsp), %xmm1
	testl	%eax, %eax
	jne	.L20
	pushq	%rdx
	.cfi_def_cfa_offset 328
	pushq	%rbx
	.cfi_def_cfa_offset 336
	pushq	208(%rsp)
	.cfi_def_cfa_offset 344
	pushq	208(%rsp)
	.cfi_def_cfa_offset 352
	pushq	208(%rsp)
	.cfi_def_cfa_offset 360
	pushq	208(%rsp)
	.cfi_def_cfa_offset 368
	pushq	208(%rsp)
	.cfi_def_cfa_offset 376
	pushq	208(%rsp)
	.cfi_def_cfa_offset 384
	movsd	88(%rsp), %xmm0
	movq	208(%rsp), %r9
	movq	200(%rsp), %r8
	movq	192(%rsp), %rcx
	movq	184(%rsp), %rdx
	movsd	%xmm1, 96(%rsp)
	movq	176(%rsp), %rsi
	movq	168(%rsp), %rdi
	call	_Z51__device_stub__Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi
	movsd	96(%rsp), %xmm1
	addq	$64, %rsp
	.cfi_def_cfa_offset 320
.L20:
	movl	%ebx, %eax
	movl	%ebx, %esi
	movl	%ebp, 236(%rsp)
	movl	$536870913, %edx
	andl	$1, %eax
	shrl	%esi
	movl	$2, %ecx
	movsd	%xmm1, 32(%rsp)
	cmpl	$1, %eax
	sbbl	$-1, %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$4, %rdx
	movl	%esi, 240(%rsp)
	movq	236(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	movsd	32(%rsp), %xmm1
	testl	%eax, %eax
	jne	.L22
	pushq	%rax
	.cfi_def_cfa_offset 328
	pushq	%rbx
	.cfi_def_cfa_offset 336
	pushq	208(%rsp)
	.cfi_def_cfa_offset 344
	pushq	208(%rsp)
	.cfi_def_cfa_offset 352
	pushq	208(%rsp)
	.cfi_def_cfa_offset 360
	pushq	208(%rsp)
	.cfi_def_cfa_offset 368
	pushq	208(%rsp)
	.cfi_def_cfa_offset 376
	pushq	208(%rsp)
	.cfi_def_cfa_offset 384
	movsd	88(%rsp), %xmm0
	movq	208(%rsp), %r9
	movq	200(%rsp), %r8
	movq	192(%rsp), %rcx
	movq	184(%rsp), %rdx
	movq	176(%rsp), %rsi
	movq	168(%rsp), %rdi
	call	_Z51__device_stub__Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi
	addq	$64, %rsp
	.cfi_def_cfa_offset 320
.L22:
	movq	8(%rsp), %rdx
	movq	104(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$264, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	host_code, .-host_code
	.section	.rodata.str1.1
.LC13:
	.string	"_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi"
.LC14:
	.string	"_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include "hip/hip_runtime.h"
#define max(x,y)  ((x) > (y)? (x) : (y))
#define min(x,y)  ((x) < (y)? (x) : (y))
#define ceil(a,b) ((a) % (b) == 0 ? (a) / (b) : ((a) / (b)) + 1)

void check_error (const char* message) {
	hipError_t error = hipGetLastError ();
	if (error != hipSuccess) {
		printf ("CUDA error : %s, %s\n", message, hipGetErrorString (error));
		exit(-1);
	}
}

__global__ void __launch_bounds__(256,1) curvi_1 (double * __restrict__ in_r1, double *__restrict__ in_u1, double * __restrict__ in_u2, double *__restrict__ in_u3, double * __restrict__ in_mu, double * __restrict__ in_la, double * __restrict__ in_met1, double * __restrict__ in_met2, double * __restrict__ in_met3, double * __restrict__ in_met4, double * strx, double * stry, double c1, double c2, int N) {
	//Determing the block's indices
	int blockdim_k= (int)(blockDim.x);
	int k0 = (int)(blockIdx.x)*(blockdim_k);
	int k = max (k0, 0) + (int)(threadIdx.x);
	int blockdim_j= (int)(blockDim.y);
	int j0 = (int)(blockIdx.y)*(blockdim_j);
	int j = max (j0, 0) + (int)(threadIdx.y);

	double (*u1)[304][304] = (double (*)[304][304])in_u1;
	double (*u2)[304][304] = (double (*)[304][304])in_u2;
	double (*u3)[304][304] = (double (*)[304][304])in_u3;
	double (*mu)[304][304] = (double (*)[304][304])in_mu;
	double (*la)[304][304] = (double (*)[304][304])in_la;
	double (*r1)[304][304] = (double (*)[304][304])in_r1;
	double (*met1)[304][304] = (double (*)[304][304])in_met1;
	double (*met2)[304][304] = (double (*)[304][304])in_met2;
	double (*met3)[304][304] = (double (*)[304][304])in_met3;
	double (*met4)[304][304] = (double (*)[304][304])in_met4;

	if (j>=2 & k>=2 & j<=N-3 & k<=N-3) {
		for (int i=2; i<=N-3; i++) {
double _t_6_;
double _t_4_;
double _t_7_;
double _t_5_;
double _t_8_;
double _t_3_;
double _t_2_;
double _t_1_;
double _t_11_;
double _t_9_;
double _t_12_;
double _t_10_;
double _t_13_;
double _t_18_;
double _t_16_;
double _t_19_;
double _t_17_;
double _t_20_;
double _t_15_;
double _t_14_;
double _t_23_;
double _t_21_;
double _t_24_;
double _t_22_;
double _t_25_;
double _t_0_;
double _t_31_;
double _t_29_;
double _t_32_;
double _t_30_;
double _t_33_;
double _t_28_;
double _t_27_;
double _t_26_;
double _t_36_;
double _t_34_;
double _t_37_;
double _t_35_;
double _t_38_;
double _t_43_;
double _t_41_;
double _t_44_;
double _t_42_;
double _t_45_;
double _t_40_;
double _t_39_;
double _t_48_;
double _t_46_;
double _t_49_;
double _t_47_;
double _t_50_;
double r1ic0jc0kc0 = r1[i][j][k];
double _t_58_;
double _t_57_;
double _t_55_;
double _t_59_;
double _t_56_;
double _t_60_;
double _t_54_;
double _t_53_;
double _t_64_;
double _t_62_;
double _t_65_;
double _t_63_;
double _t_66_;
double _t_61_;
double _t_69_;
double _t_67_;
double _t_70_;
double _t_68_;
double _t_71_;
double _t_76_;
double _t_75_;
double _t_73_;
double _t_77_;
double _t_74_;
double _t_78_;
double _t_72_;
double _t_82_;
double _t_80_;
double _t_83_;
double _t_81_;
double _t_84_;
double _t_79_;
double _t_87_;
double _t_85_;
double _t_88_;
double _t_86_;
double _t_89_;
double _t_52_;
double _t_95_;
double _t_94_;
double _t_92_;
double _t_96_;
double _t_93_;
double _t_97_;
double _t_91_;
double _t_90_;
double _t_101_;
double _t_99_;
double _t_102_;
double _t_100_;
double _t_103_;
double _t_98_;
double _t_106_;
double _t_104_;
double _t_107_;
double _t_105_;
double _t_108_;
double _t_113_;
double _t_112_;
double _t_110_;
double _t_114_;
double _t_111_;
double _t_115_;
double _t_109_;
double _t_119_;
double _t_117_;
double _t_120_;
double _t_118_;
double _t_121_;
double _t_116_;
double _t_124_;
double _t_122_;
double _t_125_;
double _t_123_;
double _t_126_;
double _t_51_;
double _t_134_;
double _t_133_;
double _t_131_;
double _t_135_;
double _t_132_;
double _t_136_;
double _t_130_;
double _t_129_;
double _t_128_;
double _t_139_;
double _t_137_;
double _t_140_;
double _t_138_;
double _t_141_;
double _t_145_;
double _t_143_;
double _t_146_;
double _t_144_;
double _t_147_;
double _t_142_;
double _t_153_;
double _t_152_;
double _t_150_;
double _t_154_;
double _t_151_;
double _t_155_;
double _t_149_;
double _t_148_;
double _t_158_;
double _t_156_;
double _t_159_;
double _t_157_;
double _t_160_;
double _t_164_;
double _t_162_;
double _t_165_;
double _t_163_;
double _t_166_;
double _t_161_;
double _t_127_;
double _t_173_;
double _t_172_;
double _t_170_;
double _t_174_;
double _t_171_;
double _t_175_;
double _t_169_;
double _t_168_;
double _t_167_;
double _t_178_;
double _t_176_;
double _t_179_;
double _t_177_;
double _t_180_;
double _t_184_;
double _t_182_;
double _t_185_;
double _t_183_;
double _t_186_;
double _t_181_;
double _t_192_;
double _t_191_;
double _t_189_;
double _t_193_;
double _t_190_;
double _t_194_;
double _t_188_;
double _t_187_;
double _t_197_;
double _t_195_;
double _t_198_;
double _t_196_;
double _t_199_;
double _t_203_;
double _t_201_;
double _t_204_;
double _t_202_;
double _t_205_;
double _t_200_;

_t_6_ = mu[i][j][k+2] * met3[i][j][k+2];
_t_4_ = _t_6_ * met1[i][j][k+2];
_t_7_ = u1[i][j+2][k+2];
_t_7_ -= u1[i][j-2][k+2];
_t_5_ = c2 * _t_7_;
_t_8_ = u1[i][j+1][k+2];
_t_8_ -= u1[i][j-1][k+2];
_t_5_ += c1 * _t_8_;
_t_3_ = _t_4_ * _t_5_;
_t_2_ = _t_3_ * stry[j+2];
_t_1_ = _t_2_ * strx[i];
_t_11_ = la[i][j][k+2] * met2[i][j][k+2];
_t_9_ = _t_11_ * met1[i][j][k+2];
_t_12_ = u2[i][j+2][k+2];
_t_12_ -= u2[i][j-2][k+2];
_t_10_ = c2 * _t_12_;
_t_13_ = u2[i][j+1][k+2];
_t_13_ -= u2[i][j-1][k+2];
_t_10_ += c1 * _t_13_;
_t_1_ += _t_9_ * _t_10_;
_t_18_ = mu[i][j][k-2] * met3[i][j][k-2];
_t_16_ = _t_18_ * met1[i][j][k-2];
_t_19_ = u1[i][j+2][k-2];
_t_19_ -= u1[i][j-2][k-2];
_t_17_ = c2 * _t_19_;
_t_20_ = u1[i][j+1][k-2];
_t_20_ -= u1[i][j-1][k-2];
_t_17_ += c1 * _t_20_;
_t_15_ = _t_16_ * _t_17_;
_t_14_ = _t_15_ * stry[j];
_t_1_ += _t_14_ * strx[i];
_t_23_ = la[i][j][k-2] * met2[i][j][k-2];
_t_21_ = _t_23_ * met1[i][j][k-2];
_t_24_ = u2[i][j+2][k-2];
_t_24_ -= u2[i][j-2][k-2];
_t_22_ = c2 * _t_24_;
_t_25_ = u2[i][j+1][k-2];
_t_25_ -= u2[i][j-1][k-2];
_t_22_ += c1 * _t_25_;
_t_1_ += _t_21_ * _t_22_;
_t_0_ = c2 * _t_1_;
_t_31_ = mu[i][j][k+1] * met3[i][j][k+1];
_t_29_ = _t_31_ * met1[i][j][k+1];
_t_32_ = u1[i][j+2][k+1];
_t_32_ -= u1[i][j-2][k+1];
_t_30_ = c2 * _t_32_;
_t_33_ = u1[i][j+1][k+1];
_t_33_ -= u1[i][j-1][k+1];
_t_30_ += c1 * _t_33_;
_t_28_ = _t_29_ * _t_30_;
_t_27_ = _t_28_ * stry[j-2];
_t_26_ = _t_27_ * strx[i];
_t_36_ = la[i][j][k+1] * met2[i][j][k+1];
_t_34_ = _t_36_ * met1[i][j][k+1];
_t_37_ = u2[i][j+2][k+1];
_t_37_ -= u2[i][j-2][k+1];
_t_35_ = c2 * _t_37_;
_t_38_ = u2[i][j+1][k+1];
_t_38_ -= u2[i][j-1][k+1];
_t_35_ += c1 * _t_38_;
_t_26_ += _t_34_ * _t_35_;
_t_43_ = mu[i][j][k-1] * met3[i][j][k-1];
_t_41_ = _t_43_ * met1[i][j][k-1];
_t_44_ = u1[i][j+2][k-1];
_t_44_ -= u1[i][j-2][k-1];
_t_42_ = c2 * _t_44_;
_t_45_ = u1[i][j+1][k-1];
_t_45_ -= u1[i][j-1][k-1];
_t_42_ += c1 * _t_45_;
_t_40_ = _t_41_ * _t_42_;
_t_39_ = _t_40_ * stry[j];
_t_26_ += _t_39_ * strx[i];
_t_48_ = la[i][j][k-1] * met2[i][j][k-1];
_t_46_ = _t_48_ * met1[i][j][k-1];
_t_49_ = u2[i][j+2][k-1];
_t_49_ -= u2[i][j-2][k-1];
_t_47_ = c2 * _t_49_;
_t_50_ = u2[i][j+1][k-1];
_t_50_ -= u2[i][j-1][k-1];
_t_47_ += c1 * _t_50_;
_t_26_ += _t_46_ * _t_47_;
_t_0_ += c1 * _t_26_;
r1ic0jc0kc0 += _t_0_;
_t_58_ = 2.0 * mu[i+2][j][k];
_t_58_ += la[i+2][j][k];
_t_57_ = _t_58_ * met2[i+2][j][k];
_t_55_ = _t_57_ * met1[i+2][j][k];
_t_59_ = u1[i+2][j][k+2];
_t_59_ -= u1[i+2][j][k-2];
_t_56_ = c2 * _t_59_;
_t_60_ = u1[i+2][j][k+1];
_t_60_ -= u1[i+2][j][k-1];
_t_56_ += c1 * _t_60_;
_t_54_ = _t_55_ * _t_56_;
_t_53_ = _t_54_ * strx[i];
_t_64_ = la[i+2][j][k] * met3[i+2][j][k];
_t_62_ = _t_64_ * met1[i+2][j][k];
_t_65_ = u2[i+2][j][k+2];
_t_65_ -= u2[i+2][j][k-2];
_t_63_ = c2 * _t_65_;
_t_66_ = u2[i+2][j][k+1];
_t_66_ -= u2[i+2][j][k-1];
_t_63_ += c1 * _t_66_;
_t_61_ = _t_62_ * _t_63_;
_t_53_ += _t_61_ * stry[j];
_t_69_ = la[i+2][j][k] * met4[i+2][j][k];
_t_67_ = _t_69_ * met1[i+2][j][k];
_t_70_ = u3[i+2][j][k+2];
_t_70_ -= u3[i+2][j][k-2];
_t_68_ = c2 * _t_70_;
_t_71_ = u3[i+2][j][k+1];
_t_71_ -= u3[i+2][j][k-1];
_t_68_ += c1 * _t_71_;
_t_53_ += _t_67_ * _t_68_;
_t_76_ = 2.0 * mu[i-2][j][k];
_t_76_ += la[i-2][j][k];
_t_75_ = _t_76_ * met2[i-2][j][k];
_t_73_ = _t_75_ * met1[i-2][j][k];
_t_77_ = u1[i-2][j][k+2];
_t_77_ -= u1[i-2][j][k-2];
_t_74_ = c2 * _t_77_;
_t_78_ = u1[i-2][j][k+1];
_t_78_ -= u1[i-2][j][k-1];
_t_74_ += c1 * _t_78_;
_t_72_ = _t_73_ * _t_74_;
_t_53_ += _t_72_ * strx[i];
_t_82_ = la[i-2][j][k] * met3[i-2][j][k];
_t_80_ = _t_82_ * met1[i-2][j][k];
_t_83_ = u2[i-2][j][k+2];
_t_83_ -= u2[i-2][j][k-2];
_t_81_ = c2 * _t_83_;
_t_84_ = u2[i-2][j][k+1];
_t_84_ -= u2[i-2][j][k-1];
_t_81_ += c1 * _t_84_;
_t_79_ = _t_80_ * _t_81_;
_t_53_ += _t_79_ * stry[j];
_t_87_ = la[i-2][j][k] * met4[i-2][j][k];
_t_85_ = _t_87_ * met1[i-2][j][k];
_t_88_ = u3[i-2][j][k+2];
_t_88_ -= u3[i-2][j][k-2];
_t_86_ = c2 * _t_88_;
_t_89_ = u3[i-2][j][k+1];
_t_89_ -= u3[i-2][j][k-1];
_t_86_ += c1 * _t_89_;
_t_53_ += _t_85_ * _t_86_;
_t_52_ = c2 * _t_53_;
_t_95_ = 2.0 * mu[i+1][j][k];
_t_95_ += la[i+1][j][k];
_t_94_ = _t_95_ * met2[i+1][j][k];
_t_92_ = _t_94_ * met1[i+1][j][k];
_t_96_ = u1[i+1][j][k+2];
_t_96_ -= u1[i+1][j][k-2];
_t_93_ = c2 * _t_96_;
_t_97_ = u1[i+1][j][k+1];
_t_97_ -= u1[i+1][j][k-1];
_t_93_ += c1 * _t_97_;
_t_91_ = _t_92_ * _t_93_;
_t_90_ = _t_91_ * strx[i];
_t_101_ = la[i+1][j][k] * met3[i+1][j][k];
_t_99_ = _t_101_ * met1[i+1][j][k];
_t_102_ = u2[i+1][j][k+2];
_t_102_ -= u2[i+1][j][k-2];
_t_100_ = c2 * _t_102_;
_t_103_ = u2[i+1][j][k+1];
_t_103_ -= u2[i+1][j][k-1];
_t_100_ += c1 * _t_103_;
_t_98_ = _t_99_ * _t_100_;
_t_90_ += _t_98_ * stry[j];
_t_106_ = la[i+1][j][k] * met4[i+1][j][k];
_t_104_ = _t_106_ * met1[i+1][j][k];
_t_107_ = u3[i+1][j][k+2];
_t_107_ -= u3[i+1][j][k-2];
_t_105_ = c2 * _t_107_;
_t_108_ = u3[i+1][j][k+1];
_t_108_ -= u3[i+1][j][k-1];
_t_105_ += c1 * _t_108_;
_t_90_ += _t_104_ * _t_105_;
_t_113_ = 2.0 * mu[i-1][j][k];
_t_113_ += la[i-1][j][k];
_t_112_ = _t_113_ * met2[i-1][j][k];
_t_110_ = _t_112_ * met1[i-1][j][k];
_t_114_ = u1[i-1][j][k+2];
_t_114_ -= u1[i-1][j][k-2];
_t_111_ = c2 * _t_114_;
_t_115_ = u1[i-1][j][k+1];
_t_115_ -= u1[i-1][j][k-1];
_t_111_ += c1 * _t_115_;
_t_109_ = _t_110_ * _t_111_;
_t_90_ += _t_109_ * strx[i];
_t_119_ = la[i-1][j][k] * met3[i-1][j][k];
_t_117_ = _t_119_ * met1[i-1][j][k];
_t_120_ = u2[i-1][j][k+2];
_t_120_ -= u2[i-1][j][k-2];
_t_118_ = c2 * _t_120_;
_t_121_ = u2[i-1][j][k+1];
_t_121_ -= u2[i-1][j][k-1];
_t_118_ += c1 * _t_121_;
_t_116_ = _t_117_ * _t_118_;
_t_90_ += _t_116_ * stry[j];
_t_124_ = la[i-1][j][k] * met4[i-1][j][k];
_t_122_ = _t_124_ * met1[i-1][j][k];
_t_125_ = u3[i-1][j][k+2];
_t_125_ -= u3[i-1][j][k-2];
_t_123_ = c2 * _t_125_;
_t_126_ = u3[i-1][j][k+1];
_t_126_ -= u3[i-1][j][k-1];
_t_123_ += c1 * _t_126_;
_t_90_ += _t_122_ * _t_123_;
_t_52_ += c1 * _t_90_;
_t_51_ = _t_52_ * stry[j];
r1ic0jc0kc0 += _t_51_;
_t_134_ = 2.0 * mu[i][j][k+2];
_t_134_ += la[i][j][k+2];
_t_133_ = _t_134_ * met2[i][j][k+2];
_t_131_ = _t_133_ * met1[i][j][k+2];
_t_135_ = u1[i+2][j][k+2];
_t_135_ -= u1[i-2][j][k+2];
_t_132_ = c2 * _t_135_;
_t_136_ = u1[i+1][j][k+2];
_t_136_ -= u1[i-1][j][k+2];
_t_132_ += c1 * _t_136_;
_t_130_ = _t_131_ * _t_132_;
_t_129_ = _t_130_ * strx[i];
_t_128_ = _t_129_ * stry[j];
_t_139_ = mu[i][j][k+2] * met3[i][j][k+2];
_t_137_ = _t_139_ * met1[i][j][k+2];
_t_140_ = u2[i+2][j][k+2];
_t_140_ -= u2[i-2][j][k+2];
_t_138_ = c2 * _t_140_;
_t_141_ = u2[i+1][j][k+2];
_t_141_ -= u2[i-1][j][k+2];
_t_138_ += c1 * _t_141_;
_t_128_ += _t_137_ * _t_138_;
_t_145_ = mu[i][j][k+2] * met4[i][j][k+2];
_t_143_ = _t_145_ * met1[i][j][k+2];
_t_146_ = u3[i+2][j][k+2];
_t_146_ -= u3[i-2][j][k+2];
_t_144_ = c2 * _t_146_;
_t_147_ = u3[i+1][j][k+2];
_t_147_ -= u3[i-1][j][k+2];
_t_144_ += c1 * _t_147_;
_t_142_ = _t_143_ * _t_144_;
_t_128_ += _t_142_ * stry[j];
_t_153_ = 2.0 * mu[i][j][k-2];
_t_153_ += la[i][j][k-2];
_t_152_ = _t_153_ * met2[i][j][k-2];
_t_150_ = _t_152_ * met1[i][j][k-2];
_t_154_ = u1[i+2][j][k-2];
_t_154_ -= u1[i-2][j][k-2];
_t_151_ = c2 * _t_154_;
_t_155_ = u1[i+1][j][k-2];
_t_155_ -= u1[i-1][j][k-2];
_t_151_ += c1 * _t_155_;
_t_149_ = _t_150_ * _t_151_;
_t_148_ = _t_149_ * strx[i];
_t_128_ += _t_148_ * stry[j];
_t_158_ = mu[i][j][k-2] * met3[i][j][k-2];
_t_156_ = _t_158_ * met1[i][j][k-2];
_t_159_ = u2[i+2][j][k-2];
_t_159_ -= u2[i-2][j][k-2];
_t_157_ = c2 * _t_159_;
_t_160_ = u2[i+1][j][k-2];
_t_160_ -= u2[i-1][j][k-2];
_t_157_ += c1 * _t_160_;
_t_128_ += _t_156_ * _t_157_;
_t_164_ = mu[i][j][k-2] * met4[i][j][k-2];
_t_162_ = _t_164_ * met1[i][j][k-2];
_t_165_ = u3[i+2][j][k-2];
_t_165_ -= u3[i-2][j][k-2];
_t_163_ = c2 * _t_165_;
_t_166_ = u3[i+1][j][k-2];
_t_166_ -= u3[i-1][j][k-2];
_t_163_ += c1 * _t_166_;
_t_161_ = _t_162_ * _t_163_;
_t_128_ += _t_161_ * stry[j];
_t_127_ = c2 * _t_128_;
_t_173_ = 2.0 * mu[i][j][k+1];
_t_173_ += la[i][j][k+1];
_t_172_ = _t_173_ * met2[i][j][k+1];
_t_170_ = _t_172_ * met1[i][j][k+1];
_t_174_ = u1[i+2][j][k+1];
_t_174_ -= u1[i-2][j][k+1];
_t_171_ = c2 * _t_174_;
_t_175_ = u1[i+1][j][k+1];
_t_175_ -= u1[i-1][j][k+1];
_t_171_ += c1 * _t_175_;
_t_169_ = _t_170_ * _t_171_;
_t_168_ = _t_169_ * strx[i+2];
_t_167_ = _t_168_ * stry[j];
_t_178_ = mu[i][j][k+1] * met3[i][j][k+1];
_t_176_ = _t_178_ * met1[i][j][k+1];
_t_179_ = u2[i+2][j][k+1];
_t_179_ -= u2[i-2][j][k+1];
_t_177_ = c2 * _t_179_;
_t_180_ = u2[i+1][j][k+1];
_t_180_ -= u2[i-1][j][k+1];
_t_177_ += c1 * _t_180_;
_t_167_ += _t_176_ * _t_177_;
_t_184_ = mu[i][j][k+1] * met4[i][j][k+1];
_t_182_ = _t_184_ * met1[i][j][k+1];
_t_185_ = u3[i+2][j][k+1];
_t_185_ -= u3[i-2][j][k+1];
_t_183_ = c2 * _t_185_;
_t_186_ = u3[i+1][j][k+1];
_t_186_ -= u3[i-1][j][k+1];
_t_183_ += c1 * _t_186_;
_t_181_ = _t_182_ * _t_183_;
_t_167_ += _t_181_ * stry[j];
_t_192_ = 2.0 * mu[i][j][k-1];
_t_192_ += la[i][j][k-1];
_t_191_ = _t_192_ * met2[i][j][k-1];
_t_189_ = _t_191_ * met1[i][j][k-1];
_t_193_ = u1[i+2][j][k-1];
_t_193_ -= u1[i-2][j][k-1];
_t_190_ = c2 * _t_193_;
_t_194_ = u1[i+1][j][k-1];
_t_194_ -= u1[i-1][j][k-1];
_t_190_ += c1 * _t_194_;
_t_188_ = _t_189_ * _t_190_;
_t_187_ = _t_188_ * strx[i-2];
_t_167_ += _t_187_ * stry[j];
_t_197_ = mu[i][j][k-1] * met3[i][j][k-1];
_t_195_ = _t_197_ * met1[i][j][k-1];
_t_198_ = u2[i+2][j][k-1];
_t_198_ -= u2[i-2][j][k-1];
_t_196_ = c2 * _t_198_;
_t_199_ = u2[i+1][j][k-1];
_t_199_ -= u2[i-1][j][k-1];
_t_196_ += c1 * _t_199_;
_t_167_ += _t_195_ * _t_196_;
_t_203_ = mu[i][j][k-1] * met4[i][j][k-1];
_t_201_ = _t_203_ * met1[i][j][k-1];
_t_204_ = u3[i+2][j][k-1];
_t_204_ -= u3[i-2][j][k-1];
_t_202_ = c2 * _t_204_;
_t_205_ = u3[i+1][j][k-1];
_t_205_ -= u3[i-1][j][k-1];
_t_202_ += c1 * _t_205_;
_t_200_ = _t_201_ * _t_202_;
_t_167_ += _t_200_ * stry[j];
_t_127_ += c1 * _t_167_;
r1ic0jc0kc0 += _t_127_;
r1[i][j][k] = r1ic0jc0kc0;
		} 
	}
}


__global__ void __launch_bounds__(128,4) curvi_2 (double * __restrict__ in_r1, double *__restrict__ in_u1, double * __restrict__ in_u2, double *__restrict__ in_u3, double * __restrict__ in_mu, double * __restrict__ in_la, double * __restrict__ in_met1, double * __restrict__ in_met2, double * __restrict__ in_met3, double * __restrict__ in_met4, double * strx, double * stry, double c1, double c2, int N) {
	//Determing the block's indices
	int blockdim_k= (int)(blockDim.x);
	int k0 = (int)(blockIdx.x)*(blockdim_k);
	int k = max (k0, 0) + (int)(threadIdx.x);
	int blockdim_j= (int)(blockDim.y);
	int j0 = (int)(blockIdx.y)*(blockdim_j);
	int j = max (j0, 0) + (int)(threadIdx.y);
	int blockdim_i= (int)(blockDim.z);
	int i0 = (int)(blockIdx.z)*(blockdim_i);
	int i = max (i0, 0) + (int)(threadIdx.z);

	double (*u1)[304][304] = (double (*)[304][304])in_u1;
	double (*u2)[304][304] = (double (*)[304][304])in_u2;
	double (*u3)[304][304] = (double (*)[304][304])in_u3;
	double (*mu)[304][304] = (double (*)[304][304])in_mu;
	double (*la)[304][304] = (double (*)[304][304])in_la;
	double (*r1)[304][304] = (double (*)[304][304])in_r1;
	double (*met1)[304][304] = (double (*)[304][304])in_met1;
	double (*met2)[304][304] = (double (*)[304][304])in_met2;
	double (*met3)[304][304] = (double (*)[304][304])in_met3;
	double (*met4)[304][304] = (double (*)[304][304])in_met4;

	if (j>=2 & k>=2 & j<=N-3 & k<=N-3 & i>=2 & i<=N-3) {
double _t_6_;
double _t_4_;
double _t_7_;
double _t_5_;
double _t_8_;
double _t_3_;
double _t_2_;
double _t_1_;
double _t_11_;
double _t_9_;
double _t_12_;
double _t_10_;
double _t_13_;
double _t_18_;
double _t_16_;
double _t_19_;
double _t_17_;
double _t_20_;
double _t_15_;
double _t_14_;
double _t_23_;
double _t_21_;
double _t_24_;
double _t_22_;
double _t_25_;
double _t_0_;
double _t_31_;
double _t_29_;
double _t_32_;
double _t_30_;
double _t_33_;
double _t_28_;
double _t_27_;
double _t_26_;
double _t_36_;
double _t_34_;
double _t_37_;
double _t_35_;
double _t_38_;
double _t_43_;
double _t_41_;
double _t_44_;
double _t_42_;
double _t_45_;
double _t_40_;
double _t_39_;
double _t_48_;
double _t_46_;
double _t_49_;
double _t_47_;
double _t_50_;
double r1ic0jc0kc0 = r1[i][j][k];
double _t_55_;
double _t_53_;
double _t_56_;
double _t_54_;
double _t_57_;
double _t_52_;
double _t_60_;
double _t_58_;
double _t_61_;
double _t_59_;
double _t_62_;
double _t_51_;
double _t_66_;
double _t_64_;
double _t_67_;
double _t_65_;
double _t_68_;
double _t_63_;
double _t_71_;
double _t_69_;
double _t_72_;
double _t_70_;
double _t_73_;
double _t_77_;
double _t_75_;
double _t_78_;
double _t_76_;
double _t_79_;
double _t_74_;
double _t_82_;
double _t_80_;
double _t_83_;
double _t_81_;
double _t_84_;
double _t_88_;
double _t_86_;
double _t_89_;
double _t_87_;
double _t_90_;
double _t_85_;
double _t_93_;
double _t_91_;
double _t_94_;
double _t_92_;
double _t_95_;

_t_6_ = mu[i][j+2][k] * met3[i][j+2][k];
_t_4_ = _t_6_ * met1[i][j+2][k];
_t_7_ = u1[i][j+2][k+2];
_t_7_ -= u1[i][j+2][k-2];
_t_5_ = c2 * _t_7_;
_t_8_ = u1[i][j+2][k+1];
_t_8_ -= u1[i][j+2][k-1];
_t_5_ += c1 * _t_8_;
_t_3_ = _t_4_ * _t_5_;
_t_2_ = _t_3_ * stry[j+1];
_t_1_ = _t_2_ * strx[i];
_t_11_ = mu[i][j+2][k] * met2[i][j+2][k];
_t_9_ = _t_11_ * met1[i][j+2][k];
_t_12_ = u2[i][j+2][k+2];
_t_12_ -= u2[i][j+2][k-2];
_t_10_ = c2 * _t_12_;
_t_13_ = u2[i][j+2][k+1];
_t_13_ -= u2[i][j+2][k-1];
_t_10_ += c1 * _t_13_;
_t_1_ += _t_9_ * _t_10_;
_t_18_ = mu[i][j-2][k] * met3[i][j-2][k];
_t_16_ = _t_18_ * met1[i][j-2][k];
_t_19_ = u1[i][j-2][k+2];
_t_19_ -= u1[i][j-2][k-2];
_t_17_ = c2 * _t_19_;
_t_20_ = u1[i][j-2][k+1];
_t_20_ -= u1[i][j-2][k-1];
_t_17_ += c1 * _t_20_;
_t_15_ = _t_16_ * _t_17_;
_t_14_ = _t_15_ * stry[j];
_t_1_ += _t_14_ * strx[i];
_t_23_ = mu[i][j-2][k] * met2[i][j-2][k];
_t_21_ = _t_23_ * met1[i][j-2][k];
_t_24_ = u2[i][j-2][k+2];
_t_24_ -= u2[i][j-2][k-2];
_t_22_ = c2 * _t_24_;
_t_25_ = u2[i][j-2][k+1];
_t_25_ -= u2[i][j-2][k-1];
_t_22_ += c1 * _t_25_;
_t_1_ += _t_21_ * _t_22_;
_t_0_ = c2 * _t_1_;
_t_31_ = mu[i][j+1][k] * met3[i][j+1][k];
_t_29_ = _t_31_ * met1[i][j+1][k];
_t_32_ = u1[i][j+1][k+2];
_t_32_ -= u1[i][j+1][k-2];
_t_30_ = c2 * _t_32_;
_t_33_ = u1[i][j+1][k+1];
_t_33_ -= u1[i][j+1][k-1];
_t_30_ += c1 * _t_33_;
_t_28_ = _t_29_ * _t_30_;
_t_27_ = _t_28_ * stry[j-1];
_t_26_ = _t_27_ * strx[i];
_t_36_ = mu[i][j+1][k] * met2[i][j+1][k];
_t_34_ = _t_36_ * met1[i][j+1][k];
_t_37_ = u2[i][j+1][k+2];
_t_37_ -= u2[i][j+1][k-2];
_t_35_ = c2 * _t_37_;
_t_38_ = u2[i][j+1][k+1];
_t_38_ -= u2[i][j+1][k-1];
_t_35_ += c1 * _t_38_;
_t_26_ += _t_34_ * _t_35_;
_t_43_ = mu[i][j-1][k] * met3[i][j-1][k];
_t_41_ = _t_43_ * met1[i][j-1][k];
_t_44_ = u1[i][j-1][k+2];
_t_44_ -= u1[i][j-1][k-2];
_t_42_ = c2 * _t_44_;
_t_45_ = u1[i][j-1][k+1];
_t_45_ -= u1[i][j-1][k-1];
_t_42_ += c1 * _t_45_;
_t_40_ = _t_41_ * _t_42_;
_t_39_ = _t_40_ * stry[j];
_t_26_ += _t_39_ * strx[i];
_t_48_ = mu[i][j-1][k] * met2[i][j-1][k];
_t_46_ = _t_48_ * met1[i][j-1][k];
_t_49_ = u2[i][j-1][k+2];
_t_49_ -= u2[i][j-1][k-2];
_t_47_ = c2 * _t_49_;
_t_50_ = u2[i][j-1][k+1];
_t_50_ -= u2[i][j-1][k-1];
_t_47_ += c1 * _t_50_;
_t_26_ += _t_46_ * _t_47_;
_t_0_ += c1 * _t_26_;
r1ic0jc0kc0 += _t_0_;
_t_55_ = mu[i][j+2][k] * met1[i][j+2][k];
_t_53_ = _t_55_ * met1[i][j+2][k];
_t_56_ = u2[i+2][j+2][k];
_t_56_ -= u2[i-2][j+2][k];
_t_54_ = c2 * _t_56_;
_t_57_ = u2[i+1][j+2][k];
_t_57_ -= u2[i-1][j+2][k];
_t_54_ += c1 * _t_57_;
_t_52_ = _t_53_ * _t_54_;
_t_60_ = mu[i][j-2][k] * met1[i][j-2][k];
_t_58_ = _t_60_ * met1[i][j-2][k];
_t_61_ = u2[i+2][j-2][k];
_t_61_ -= u2[i-2][j-2][k];
_t_59_ = c2 * _t_61_;
_t_62_ = u2[i+1][j-2][k];
_t_62_ -= u2[i-1][j-2][k];
_t_59_ += c1 * _t_62_;
_t_52_ += _t_58_ * _t_59_;
_t_51_ = c2 * _t_52_;
_t_66_ = mu[i][j+1][k] * met1[i][j+1][k];
_t_64_ = _t_66_ * met1[i][j+1][k];
_t_67_ = u2[i+2][j+1][k];
_t_67_ -= u2[i-2][j+1][k];
_t_65_ = c2 * _t_67_;
_t_68_ = u2[i+1][j+1][k];
_t_68_ -= u2[i-1][j+1][k];
_t_65_ += c1 * _t_68_;
_t_63_ = _t_64_ * _t_65_;
_t_71_ = mu[i][j-1][k] * met1[i][j-1][k];
_t_69_ = _t_71_ * met1[i][j-1][k];
_t_72_ = u2[i+2][j-1][k];
_t_72_ -= u2[i-2][j-1][k];
_t_70_ = c2 * _t_72_;
_t_73_ = u2[i+1][j-1][k];
_t_73_ -= u2[i-1][j-1][k];
_t_70_ += c1 * _t_73_;
_t_63_ += _t_69_ * _t_70_;
_t_51_ += c1 * _t_63_;
_t_77_ = la[i+2][j][k] * met1[i+2][j][k];
_t_75_ = _t_77_ * met1[i+2][j][k];
_t_78_ = u2[i+2][j+2][k];
_t_78_ -= u2[i+2][j-2][k];
_t_76_ = c2 * _t_78_;
_t_79_ = u2[i+2][j+1][k];
_t_79_ -= u2[i+2][j-1][k];
_t_76_ += c1 * _t_79_;
_t_74_ = _t_75_ * _t_76_;
_t_82_ = la[i-2][j][k] * met1[i-2][j][k];
_t_80_ = _t_82_ * met1[i-2][j][k];
_t_83_ = u2[i-2][j+2][k];
_t_83_ -= u2[i-2][j-2][k];
_t_81_ = c2 * _t_83_;
_t_84_ = u2[i-2][j+1][k];
_t_84_ -= u2[i-2][j-1][k];
_t_81_ += c1 * _t_84_;
_t_74_ += _t_80_ * _t_81_;
_t_51_ += c2 * _t_74_;
_t_88_ = la[i+1][j][k] * met1[i+1][j][k];
_t_86_ = _t_88_ * met1[i+1][j][k];
_t_89_ = u2[i+1][j+2][k];
_t_89_ -= u2[i+1][j-2][k];
_t_87_ = c2 * _t_89_;
_t_90_ = u2[i+1][j+1][k];
_t_90_ -= u2[i+1][j-1][k];
_t_87_ += c1 * _t_90_;
_t_85_ = _t_86_ * _t_87_;
_t_93_ = la[i-1][j][k] * met1[i-1][j][k];
_t_91_ = _t_93_ * met1[i-1][j][k];
_t_94_ = u2[i-1][j+2][k];
_t_94_ -= u2[i-1][j-2][k];
_t_92_ = c2 * _t_94_;
_t_95_ = u2[i-1][j+1][k];
_t_95_ -= u2[i-1][j-1][k];
_t_92_ += c1 * _t_95_;
_t_85_ += _t_91_ * _t_92_;
_t_51_ += c1 * _t_85_;
r1ic0jc0kc0 += _t_51_;
r1[i][j][k] = r1ic0jc0kc0;
	}
}

extern "C" void host_code (double *h_r1, double *h_u1, double *h_u2, double *h_u3,  double *h_mu, double *h_la, double *h_met1, double *h_met2, double *h_met3, double *h_met4, double *h_strx, double *h_stry, double c1, double c2, int N) {
	double *r1;
	hipMalloc (&r1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for r1\n");
	hipMemcpy (r1, h_r1, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *u1;
	hipMalloc (&u1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u1\n");
	hipMemcpy (u1, h_u1, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *u2;
	hipMalloc (&u2, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u2\n");
	hipMemcpy (u2, h_u2, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *u3;
	hipMalloc (&u3, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u3\n");
	hipMemcpy (u3, h_u3, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *mu;
	hipMalloc (&mu, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for mu\n");
	hipMemcpy (mu, h_mu, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *la;
	hipMalloc (&la, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for la\n");
	hipMemcpy (la, h_la, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *met1;
	hipMalloc (&met1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met1\n");
	hipMemcpy (met1, h_met1, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *met2;
	hipMalloc (&met2, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met2\n");
	hipMemcpy (met2, h_met2, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *met3;
	hipMalloc (&met3, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met3\n");
	hipMemcpy (met3, h_met3, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *met4;
	hipMalloc (&met4, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met4\n");
	hipMemcpy (met4, h_met4, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *strx;
	hipMalloc (&strx, sizeof(double)*N);
	check_error ("Failed to allocate device memory for strx\n");
	hipMemcpy (strx, h_strx, sizeof(double)*N, hipMemcpyHostToDevice);
	double *stry;
	hipMalloc (&stry, sizeof(double)*N);
	check_error ("Failed to allocate device memory for stry\n");
	hipMemcpy (stry, h_stry, sizeof(double)*N, hipMemcpyHostToDevice);

	dim3 blockconfig (16, 8);
	dim3 gridconfig (ceil(N, blockconfig.x), ceil(N, blockconfig.y), 1);
	curvi_1 <<<gridconfig, blockconfig>>> (r1, u1, u2, u3, mu, la, met1, met2, met3, met4, strx, stry, c1, c2, N);
	dim3 blockconfig_1 (16, 2, 2);
	dim3 gridconfig_1 (ceil(N, blockconfig_1.x), ceil(N, blockconfig_1.y), ceil(N, blockconfig_1.z));
	curvi_2 <<<gridconfig_1, blockconfig_1>>> (r1, u1, u2, u3, mu, la, met1, met2, met3, met4, strx, stry, c1, c2, N);

	hipMemcpy (h_r1, r1, sizeof(double)*N*N*N, hipMemcpyDeviceToHost);
}

	.text
	.file	"reordered-l.hip"
	.globl	_Z11check_errorPKc              # -- Begin function _Z11check_errorPKc
	.type	_Z11check_errorPKc,@function
_Z11check_errorPKc:                     # @_Z11check_errorPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_2
# %bb.1:
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB0_2:
	.cfi_def_cfa_offset 16
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$-1, %edi
	callq	exit
.Lfunc_end0:
	.size	_Z11check_errorPKc, .Lfunc_end0-_Z11check_errorPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi # -- Begin function _Z22__device_stub__curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.type	_Z22__device_stub__curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi,@function
_Z22__device_stub__curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi: # @_Z22__device_stub__curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$240, %rsp
	.cfi_def_cfa_offset 288
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	24(%rsp), %r9
	movsd	%xmm0, (%r9)
	leaq	16(%rsp), %r10
	movsd	%xmm1, (%r10)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 88(%rbx)
	movq	%r9, 96(%rbx)
	movq	%r10, 104(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$256, %rsp                      # imm = 0x100
	.cfi_adjust_cfa_offset -256
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z22__device_stub__curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi, .Lfunc_end1-_Z22__device_stub__curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi # -- Begin function _Z22__device_stub__curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.type	_Z22__device_stub__curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi,@function
_Z22__device_stub__curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi: # @_Z22__device_stub__curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$240, %rsp
	.cfi_def_cfa_offset 288
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	24(%rsp), %r9
	movsd	%xmm0, (%r9)
	leaq	16(%rsp), %r10
	movsd	%xmm1, (%r10)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 88(%rbx)
	movq	%r9, 96(%rbx)
	movq	%r10, 104(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$256, %rsp                      # imm = 0x100
	.cfi_adjust_cfa_offset -256
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z22__device_stub__curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi, .Lfunc_end2-_Z22__device_stub__curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.cfi_endproc
                                        # -- End function
	.globl	host_code                       # -- Begin function host_code
	.type	host_code,@function
host_code:                              # @host_code
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movsd	%xmm1, 16(%rsp)                 # 8-byte Spill
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%r9, 136(%rsp)                  # 8-byte Spill
	movq	%r8, 128(%rsp)                  # 8-byte Spill
	movq	%rcx, 120(%rsp)                 # 8-byte Spill
	movq	%rdx, 112(%rsp)                 # 8-byte Spill
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movslq	256(%rsp), %rbp
	leaq	(,%rbp,8), %r12
	movq	%rbp, %r14
	imulq	%rbp, %r14
	imulq	%r12, %r14
	movq	%rsp, %r13
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.1, %edi
	callq	_Z11check_errorPKc
	movq	(%r13), %rdi
	movq	%rbx, 144(%rsp)                 # 8-byte Spill
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	104(%rsp), %r13
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.2, %edi
	callq	_Z11check_errorPKc
	movq	(%r13), %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	96(%rsp), %r15
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.3, %edi
	callq	_Z11check_errorPKc
	movq	(%r15), %rdi
	movq	112(%rsp), %rsi                 # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	88(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.4, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	120(%rsp), %rsi                 # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	80(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.5, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	128(%rsp), %rsi                 # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	72(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.6, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	136(%rsp), %rsi                 # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	64(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.7, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	208(%rsp), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	56(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.8, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	216(%rsp), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.9, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	224(%rsp), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	40(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.10, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	232(%rsp), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$.L.str.11, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	240(%rsp), %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$.L.str.12, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	248(%rsp), %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%ebp, %eax
	andl	$15, %eax
	movl	%ebp, %ebx
	shrl	$4, %ebx
	cmpl	$1, %eax
	sbbl	$-1, %ebx
	movl	%ebp, %eax
	andl	$7, %eax
	movl	%ebp, %edi
	shrl	$3, %edi
	cmpl	$1, %eax
	sbbl	$-1, %edi
	shlq	$32, %rdi
	orq	%rbx, %rdi
	movabsq	$34359738384, %rdx              # imm = 0x800000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	(%rsp), %rdi
	movq	104(%rsp), %rsi
	movq	96(%rsp), %rdx
	movq	88(%rsp), %rcx
	movq	80(%rsp), %r8
	movq	72(%rsp), %r9
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movsd	24(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	pushq	%rbp
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	88(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	104(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	120(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z22__device_stub__curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.LBB3_2:
	movl	%ebp, %eax
	andl	$1, %eax
	movl	%ebp, %esi
	shrl	%esi
	addl	%eax, %esi
	movq	%rsi, %rdi
	shlq	$32, %rdi
	orq	%rbx, %rdi
	movabsq	$8589934608, %rdx               # imm = 0x200000010
                                        # kill: def $esi killed $esi killed $rsi
	movl	$2, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.3:
	movq	(%rsp), %rdi
	movq	104(%rsp), %rsi
	movq	96(%rsp), %rdx
	movq	88(%rsp), %rcx
	movq	80(%rsp), %r8
	movq	72(%rsp), %r9
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movsd	24(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	pushq	%rbp
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	88(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	104(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	120(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z22__device_stub__curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.LBB3_4:
	movq	(%rsp), %rsi
	movq	144(%rsp), %rdi                 # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	host_code, .Lfunc_end3-host_code
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error : %s, %s\n"
	.size	.L.str, 21

	.type	_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi,@object # @_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.section	.rodata,"a",@progbits
	.globl	_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.p2align	3, 0x0
_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi:
	.quad	_Z22__device_stub__curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.size	_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi, 8

	.type	_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi,@object # @_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.globl	_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.p2align	3, 0x0
_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi:
	.quad	_Z22__device_stub__curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.size	_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Failed to allocate device memory for r1\n"
	.size	.L.str.1, 41

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to allocate device memory for u1\n"
	.size	.L.str.2, 41

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to allocate device memory for u2\n"
	.size	.L.str.3, 41

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to allocate device memory for u3\n"
	.size	.L.str.4, 41

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to allocate device memory for mu\n"
	.size	.L.str.5, 41

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Failed to allocate device memory for la\n"
	.size	.L.str.6, 41

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Failed to allocate device memory for met1\n"
	.size	.L.str.7, 43

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Failed to allocate device memory for met2\n"
	.size	.L.str.8, 43

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Failed to allocate device memory for met3\n"
	.size	.L.str.9, 43

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Failed to allocate device memory for met4\n"
	.size	.L.str.10, 43

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Failed to allocate device memory for strx\n"
	.size	.L.str.11, 43

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Failed to allocate device memory for stry\n"
	.size	.L.str.12, 43

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi"
	.size	.L__unnamed_1, 38

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi"
	.size	.L__unnamed_2, 38

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.addrsig_sym _Z22__device_stub__curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.addrsig_sym _Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi ; -- Begin function _Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.globl	_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.p2align	8
	.type	_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi,@function
_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi:  ; @_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x84
	s_load_b32 s3, s[0:1], 0x70
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s2, 0xffff
	s_lshr_b32 s2, s2, 16
	s_mul_i32 s14, s14, s4
	s_mul_i32 s15, s15, s2
	s_max_i32 s2, s14, 0
	s_max_i32 s4, s15, 0
	v_add_nc_u32_e32 v2, s2, v1
	v_add_nc_u32_e32 v0, s4, v0
	s_add_i32 s2, s3, -3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, v2, v0
	v_max_i32_e32 v3, v0, v2
	v_cmp_lt_u32_e32 vcc_lo, 1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e64 s2, s2, v3
	s_and_b32 s2, s2, vcc_lo
	s_cmp_gt_i32 s3, 4
	s_cselect_b32 s4, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s4, s2
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b256 s[4:11], s[0:1], 0x50
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v8, -2, v0
	v_add_nc_u32_e32 v7, 2, v0
	v_mad_u64_u32 v[14:15], null, 0x980, v0, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 3, v[0:1]
	s_add_i32 s33, s3, -4
	s_mov_b64 s[2:3], 0
	v_add_nc_u32_e32 v0, 1, v2
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	scratch_store_b64 off, v[5:6], off offset:4 ; 8-byte Folded Spill
	s_clause 0x1
	global_load_b64 v[10:11], v[3:4], off
	global_load_b64 v[3:4], v[3:4], off offset:-16
	v_dual_mov_b32 v6, v1 :: v_dual_add_nc_u32 v5, 2, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	s_waitcnt vmcnt(0)
	scratch_store_b64 off, v[3:4], off offset:12 ; 8-byte Folded Spill
	v_mov_b32_e32 v3, v1
	s_clause 0x2
	s_load_b128 s[28:31], s[0:1], 0x40
	s_load_b256 s[12:19], s[0:1], 0x0
	s_load_b256 s[20:27], s[0:1], 0x20
	s_add_u32 s0, s4, 32
	s_addc_u32 s1, s5, 0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_lshlrev_b64 v[3:4], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v3, -16
	v_add_co_ci_u32_e32 v12, vcc_lo, -1, v4, vcc_lo
	v_add_co_u32 v13, vcc_lo, v3, -8
	v_add_co_ci_u32_e32 v16, vcc_lo, -1, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v14, v13
	v_add_co_ci_u32_e32 v17, vcc_lo, v15, v16, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, s18, v2
	scratch_store_b32 off, v18, off offset:20 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v18, vcc_lo, s19, v17, vcc_lo
	scratch_store_b32 off, v18, off offset:24 ; 4-byte Folded Spill
	v_add_co_u32 v18, vcc_lo, v14, v5
	v_add_co_ci_u32_e32 v19, vcc_lo, v15, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v20, vcc_lo, s14, v18
	scratch_store_b32 off, v20, off offset:28 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v20, vcc_lo, s15, v19, vcc_lo
	scratch_store_b32 off, v20, off offset:32 ; 4-byte Folded Spill
	v_add_co_u32 v20, vcc_lo, v14, v9
	v_add_co_ci_u32_e32 v21, vcc_lo, v15, v12, vcc_lo
	v_add_co_u32 v22, vcc_lo, v14, v0
	v_add_co_ci_u32_e32 v23, vcc_lo, v15, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v52, vcc_lo, s14, v20
	v_add_co_ci_u32_e32 v53, vcc_lo, s15, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v54, vcc_lo, s14, v22
	v_add_co_ci_u32_e32 v55, vcc_lo, s15, v23, vcc_lo
	v_add_co_u32 v56, vcc_lo, s14, v2
	v_add_co_ci_u32_e32 v57, vcc_lo, s15, v17, vcc_lo
	v_add_co_u32 v58, vcc_lo, s16, v18
	v_add_co_ci_u32_e32 v59, vcc_lo, s17, v19, vcc_lo
	v_add_co_u32 v60, vcc_lo, s16, v20
	v_add_co_ci_u32_e32 v61, vcc_lo, s17, v21, vcc_lo
	v_add_co_u32 v62, vcc_lo, s16, v22
	v_add_co_ci_u32_e32 v63, vcc_lo, s17, v23, vcc_lo
	v_add_co_u32 v3, vcc_lo, v14, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v15, v4, vcc_lo
	v_add_co_u32 v64, vcc_lo, s16, v2
	v_add_co_ci_u32_e32 v65, vcc_lo, s17, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v66, vcc_lo, s30, v3
	v_add_co_ci_u32_e32 v67, vcc_lo, s31, v4, vcc_lo
	v_add_co_u32 v68, vcc_lo, s18, v18
	v_add_co_ci_u32_e32 v69, vcc_lo, s19, v19, vcc_lo
	v_add_co_u32 v70, vcc_lo, s18, v20
	v_add_co_ci_u32_e32 v71, vcc_lo, s19, v21, vcc_lo
	v_add_co_u32 v72, vcc_lo, s18, v22
	v_add_co_ci_u32_e32 v73, vcc_lo, s19, v23, vcc_lo
	v_add_co_u32 v74, vcc_lo, s16, v3
	v_add_co_ci_u32_e32 v75, vcc_lo, s17, v4, vcc_lo
	v_add_co_u32 v76, vcc_lo, s26, v3
	v_add_co_ci_u32_e32 v77, vcc_lo, s27, v4, vcc_lo
	v_add_co_u32 v78, vcc_lo, s22, v3
	v_add_co_ci_u32_e32 v79, vcc_lo, s23, v4, vcc_lo
	v_add_co_u32 v80, vcc_lo, s14, v3
	v_add_co_ci_u32_e32 v81, vcc_lo, s15, v4, vcc_lo
	v_add_co_u32 v82, vcc_lo, s24, v3
	v_add_co_ci_u32_e32 v83, vcc_lo, s25, v4, vcc_lo
	v_add_co_u32 v84, vcc_lo, s28, v3
	v_add_co_ci_u32_e32 v85, vcc_lo, s29, v4, vcc_lo
	v_add_co_u32 v86, vcc_lo, s20, v3
	v_add_co_ci_u32_e32 v87, vcc_lo, s21, v4, vcc_lo
	v_add_co_u32 v17, vcc_lo, v3, s12
	v_mad_u64_u32 v[2:3], null, 0x980, v7, 0
	v_add_co_ci_u32_e32 v4, vcc_lo, s13, v4, vcc_lo
	v_mad_i64_i32 v[14:15], null, 0x980, v8, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v88, vcc_lo, 0x169000, v17
	v_add_co_ci_u32_e32 v89, vcc_lo, 0, v4, vcc_lo
	v_add_co_u32 v4, vcc_lo, v2, v5
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v6, vcc_lo
	v_add_co_u32 v5, vcc_lo, v14, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, v15, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, 0x169000, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v5, vcc_lo, 0x169000, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v90, vcc_lo, s14, v4
	v_add_co_ci_u32_e32 v91, vcc_lo, s15, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v92, vcc_lo, s14, v5
	v_add_co_ci_u32_e32 v93, vcc_lo, s15, v6, vcc_lo
	v_add_co_u32 v94, vcc_lo, s16, v4
	v_add_co_ci_u32_e32 v95, vcc_lo, s17, v7, vcc_lo
	v_add_co_u32 v96, vcc_lo, s16, v5
	v_add_co_ci_u32_e32 v97, vcc_lo, s17, v6, vcc_lo
	v_add_co_u32 v4, vcc_lo, v2, v9
	v_add_co_ci_u32_e32 v5, vcc_lo, v3, v12, vcc_lo
	v_add_co_u32 v6, vcc_lo, v14, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v15, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, 0x169000, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, 0x169000, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v98, vcc_lo, s14, v4
	v_add_co_ci_u32_e32 v99, vcc_lo, s15, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v100, vcc_lo, s14, v6
	v_add_co_ci_u32_e32 v101, vcc_lo, s15, v7, vcc_lo
	v_add_co_u32 v102, vcc_lo, s16, v4
	v_add_co_ci_u32_e32 v103, vcc_lo, s17, v5, vcc_lo
	v_add_co_u32 v104, vcc_lo, s16, v6
	v_add_co_ci_u32_e32 v105, vcc_lo, s17, v7, vcc_lo
	v_add_co_u32 v4, vcc_lo, v2, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, v3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, v14, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v15, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, 0x169000, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, 0x169000, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v106, vcc_lo, s14, v4
	v_add_co_ci_u32_e32 v107, vcc_lo, s15, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v108, vcc_lo, s14, v0
	v_add_co_ci_u32_e32 v109, vcc_lo, s15, v1, vcc_lo
	v_add_co_u32 v110, vcc_lo, s16, v4
	v_add_co_ci_u32_e32 v111, vcc_lo, s17, v5, vcc_lo
	v_add_co_u32 v112, vcc_lo, s16, v0
	v_add_co_ci_u32_e32 v113, vcc_lo, s17, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, v2, v13
	v_add_co_ci_u32_e32 v1, vcc_lo, v3, v16, vcc_lo
	v_add_co_u32 v2, vcc_lo, v14, v13
	v_add_co_ci_u32_e32 v3, vcc_lo, v15, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, 0x169000, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, 0x169000, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v114, vcc_lo, s14, v0
	v_add_co_ci_u32_e32 v115, vcc_lo, s15, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v116, vcc_lo, s14, v2
	v_add_co_ci_u32_e32 v117, vcc_lo, s15, v3, vcc_lo
	v_add_co_u32 v118, vcc_lo, s16, v0
	v_add_co_ci_u32_e32 v119, vcc_lo, s17, v1, vcc_lo
	v_add_co_u32 v120, vcc_lo, s16, v2
	v_add_co_ci_u32_e32 v121, vcc_lo, s17, v3, vcc_lo
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v0, vcc_lo, v80, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v81, vcc_lo
	s_add_u32 s4, s0, -16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, 0x169000, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v18, vcc_lo, 0x168000, v0
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v1, vcc_lo
	s_clause 0x3
	global_load_b128 v[0:3], v[4:5], off offset:2440
	global_load_b128 v[4:7], v[4:5], off offset:2416
	global_load_b128 v[14:17], v[18:19], off offset:1672
	global_load_b128 v[22:25], v[18:19], off offset:1648
	s_addc_u32 s5, s1, -1
	s_add_u32 s6, s0, 0xffffffe0
	s_addc_u32 s7, s1, -1
	s_waitcnt vmcnt(1)
	v_add_f64 v[18:19], v[0:1], -v[14:15]
	v_add_co_u32 v0, vcc_lo, v74, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v75, vcc_lo
	v_add_f64 v[26:27], v[2:3], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v14, vcc_lo, 0x169000, v0
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v20, vcc_lo, 0x168000, v0
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v1, vcc_lo
	s_clause 0x3
	global_load_b128 v[0:3], v[14:15], off offset:2440
	global_load_b128 v[14:17], v[14:15], off offset:2416
	global_load_b128 v[30:33], v[20:21], off offset:1672
	global_load_b128 v[34:37], v[20:21], off offset:1648
	v_mul_f64 v[18:19], v[18:19], s[8:9]
	v_mul_f64 v[26:27], v[26:27], s[8:9]
	s_waitcnt vmcnt(1)
	v_add_f64 v[28:29], v[2:3], -v[32:33]
	s_waitcnt vmcnt(0)
	v_add_f64 v[32:33], v[14:15], -v[34:35]
	v_add_co_u32 v14, vcc_lo, v84, s2
	v_add_co_ci_u32_e32 v15, vcc_lo, s3, v85, vcc_lo
	v_add_f64 v[20:21], v[0:1], -v[30:31]
	v_add_f64 v[30:31], v[4:5], -v[22:23]
	v_add_f64 v[22:23], v[6:7], -v[24:25]
	v_add_f64 v[24:25], v[16:17], -v[36:37]
	v_add_co_u32 v16, vcc_lo, v86, s2
	v_add_co_ci_u32_e32 v17, vcc_lo, s3, v87, vcc_lo
	v_add_co_u32 v0, vcc_lo, 0x169000, v14
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, 0x169000, v16
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v17, vcc_lo
	global_load_b128 v[4:7], v[0:1], off offset:8
	s_clause 0x1
	global_load_b128 v[0:3], v[2:3], off offset:8
	global_load_b64 v[40:41], v[16:17], off
	global_load_b64 v[42:43], v[14:15], off
	v_mul_f64 v[28:29], v[28:29], s[8:9]
	v_mul_f64 v[32:33], v[32:33], s[8:9]
	v_mul_f64 v[20:21], v[20:21], s[8:9]
	v_mul_f64 v[30:31], v[30:31], s[8:9]
	v_mul_f64 v[22:23], v[22:23], s[8:9]
	v_mul_f64 v[24:25], v[24:25], s[8:9]
	s_waitcnt vmcnt(2)
	v_mul_f64 v[44:45], v[0:1], v[4:5]
	v_add_co_u32 v4, vcc_lo, v66, s2
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v67, vcc_lo
	v_mul_f64 v[38:39], v[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, 0x169000, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v5, vcc_lo
	v_add_co_u32 v46, vcc_lo, 0x168000, v4
	v_add_co_ci_u32_e32 v47, vcc_lo, 0, v5, vcc_lo
	s_clause 0x1
	global_load_b128 v[34:37], v[6:7], off offset:8
	global_load_b128 v[122:125], v[46:47], off offset:4080
	v_add_co_u32 v6, vcc_lo, v78, s2
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v79, vcc_lo
	s_waitcnt vmcnt(1)
	v_mul_f64 v[130:131], v[2:3], v[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v36, vcc_lo, 0x169000, v6
	v_add_co_ci_u32_e32 v37, vcc_lo, 0, v7, vcc_lo
	s_clause 0x1
	global_load_b128 v[126:129], v[36:37], off offset:8
	global_load_b64 v[46:47], v[6:7], off
	v_add_co_u32 v36, vcc_lo, v76, s2
	v_add_co_ci_u32_e32 v37, vcc_lo, s3, v77, vcc_lo
	v_mul_f64 v[34:35], v[0:1], v[34:35]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[134:135], v[0:1], 2.0, v[126:127]
	v_add_co_u32 v0, vcc_lo, 0x169000, v36
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v37, vcc_lo
	v_fma_f64 v[132:133], v[2:3], 2.0, v[128:129]
	s_clause 0x1
	global_load_b128 v[0:3], v[0:1], off offset:8
	global_load_b64 v[136:137], v[36:37], off
	s_waitcnt vmcnt(2)
	v_fma_f64 v[40:41], v[40:41], 2.0, v[46:47]
	v_mul_f64 v[42:43], v[46:47], v[42:43]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[140:141], v[126:127], v[0:1]
	v_mul_f64 v[134:135], v[134:135], v[0:1]
	v_add_co_u32 v0, vcc_lo, 0x168000, v16
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v17, vcc_lo
	v_add_co_u32 v126, vcc_lo, 0x168000, v14
	v_add_co_ci_u32_e32 v127, vcc_lo, 0, v15, vcc_lo
	v_mul_f64 v[138:139], v[128:129], v[2:3]
	v_mul_f64 v[132:133], v[132:133], v[2:3]
	global_load_b128 v[0:3], v[0:1], off offset:4080
	global_load_b128 v[126:129], v[126:127], off offset:4080
	s_waitcnt vmcnt(2)
	v_mul_f64 v[40:41], v[40:41], v[136:137]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[142:143], v[0:1], v[122:123]
	v_add_co_u32 v122, vcc_lo, 0x168000, v6
	v_add_co_ci_u32_e32 v123, vcc_lo, 0, v7, vcc_lo
	v_mul_f64 v[144:145], v[2:3], v[124:125]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[126:127], v[0:1], v[126:127]
	v_mul_f64 v[128:129], v[2:3], v[128:129]
	global_load_b128 v[122:125], v[122:123], off offset:4080
	s_waitcnt vmcnt(0)
	v_fma_f64 v[146:147], v[0:1], 2.0, v[122:123]
	v_add_co_u32 v0, vcc_lo, 0x168000, v36
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v37, vcc_lo
	v_fma_f64 v[148:149], v[2:3], 2.0, v[124:125]
	v_add_co_u32 v154, vcc_lo, v82, s2
	global_load_b128 v[0:3], v[0:1], off offset:4080
	v_add_co_ci_u32_e32 v155, vcc_lo, s3, v83, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f64 v[150:151], v[122:123], v[0:1]
	v_mul_f64 v[146:147], v[146:147], v[0:1]
	v_add_co_u32 v0, vcc_lo, 0x169000, v154
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v155, vcc_lo
	v_mul_f64 v[152:153], v[124:125], v[2:3]
	v_mul_f64 v[148:149], v[148:149], v[2:3]
	s_clause 0x1
	global_load_b128 v[0:3], v[0:1], off offset:8
	global_load_b64 v[156:157], v[154:155], off
	s_waitcnt vmcnt(1)
	v_mul_f64 v[160:161], v[44:45], v[0:1]
	v_mul_f64 v[140:141], v[0:1], v[140:141]
	v_mul_f64 v[34:35], v[0:1], v[34:35]
	v_mul_f64 v[134:135], v[0:1], v[134:135]
	v_add_co_u32 v0, vcc_lo, 0x168000, v154
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v155, vcc_lo
	v_mul_f64 v[158:159], v[38:39], v[2:3]
	v_mul_f64 v[138:139], v[2:3], v[138:139]
	v_mul_f64 v[130:131], v[2:3], v[130:131]
	global_load_b128 v[122:125], v[0:1], off offset:4080
	v_mul_f64 v[132:133], v[2:3], v[132:133]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[40:41], v[40:41], v[156:157]
	v_mul_f64 v[42:43], v[156:157], v[42:43]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[38:39], v[128:129], v[124:125]
	v_mul_f64 v[128:129], v[124:125], v[152:153]
	v_mul_f64 v[2:3], v[124:125], v[144:145]
	v_mul_f64 v[44:45], v[124:125], v[148:149]
	v_add_co_u32 v124, vcc_lo, 0x2d2000, v16
	v_add_co_ci_u32_e32 v125, vcc_lo, 0, v17, vcc_lo
	v_mul_f64 v[0:1], v[122:123], v[142:143]
	v_add_co_u32 v142, vcc_lo, 0x2d2000, v6
	v_add_co_ci_u32_e32 v143, vcc_lo, 0, v7, vcc_lo
	v_add_co_u32 v144, vcc_lo, 0x2d2000, v14
	v_add_co_ci_u32_e32 v145, vcc_lo, 0, v15, vcc_lo
	v_mul_f64 v[126:127], v[126:127], v[122:123]
	v_mul_f64 v[150:151], v[122:123], v[150:151]
	v_mul_f64 v[122:123], v[122:123], v[146:147]
	v_add_co_u32 v146, vcc_lo, 0x2d2000, v4
	v_add_co_ci_u32_e32 v147, vcc_lo, 0, v5, vcc_lo
	global_load_b64 v[124:125], v[124:125], off
	global_load_b64 v[142:143], v[142:143], off
	global_load_b64 v[144:145], v[144:145], off
	global_load_b64 v[146:147], v[146:147], off
	scratch_load_b32 v8, off, off offset:28 ; 4-byte Folded Reload
	global_load_b64 v[148:149], v[4:5], off
	s_waitcnt vmcnt(4)
	v_fma_f64 v[124:125], v[124:125], 2.0, v[142:143]
	s_waitcnt vmcnt(3)
	v_mul_f64 v[144:145], v[142:143], v[144:145]
	s_waitcnt vmcnt(2)
	v_mul_f64 v[142:143], v[142:143], v[146:147]
	v_add_co_u32 v146, vcc_lo, 0x2d2000, v36
	v_add_co_ci_u32_e32 v147, vcc_lo, 0, v37, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f64 v[46:47], v[46:47], v[148:149]
	global_load_b64 v[146:147], v[146:147], off
	v_mul_f64 v[46:47], v[156:157], v[46:47]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[124:125], v[124:125], v[146:147]
	v_add_co_u32 v146, vcc_lo, 0x2d2000, v154
	v_add_co_ci_u32_e32 v147, vcc_lo, 0, v155, vcc_lo
	global_load_b64 v[146:147], v[146:147], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[144:145], v[146:147], v[144:145]
	v_mul_f64 v[142:143], v[146:147], v[142:143]
	v_mul_f64 v[124:125], v[124:125], v[146:147]
	v_add_co_u32 v146, vcc_lo, v8, s2
	scratch_load_b32 v8, off, off offset:32 ; 4-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v147, vcc_lo, s3, v8, vcc_lo
	v_add_co_u32 v152, vcc_lo, v52, s2
	v_add_co_ci_u32_e32 v153, vcc_lo, s3, v53, vcc_lo
	v_add_co_u32 v162, vcc_lo, v54, s2
	v_add_co_ci_u32_e32 v163, vcc_lo, s3, v55, vcc_lo
	v_add_co_u32 v164, vcc_lo, v56, s2
	v_add_co_ci_u32_e32 v165, vcc_lo, s3, v57, vcc_lo
	v_add_co_u32 v166, vcc_lo, 0x2d2000, v146
	v_add_co_ci_u32_e32 v167, vcc_lo, 0, v147, vcc_lo
	v_add_co_u32 v168, vcc_lo, 0x2d2000, v162
	v_add_co_ci_u32_e32 v169, vcc_lo, 0, v163, vcc_lo
	v_add_co_u32 v170, vcc_lo, 0x2d2000, v164
	v_add_co_ci_u32_e32 v171, vcc_lo, 0, v165, vcc_lo
	v_add_co_u32 v172, vcc_lo, 0x2d2000, v152
	v_add_co_ci_u32_e32 v173, vcc_lo, 0, v153, vcc_lo
	s_clause 0x7
	global_load_b64 v[168:169], v[168:169], off
	global_load_b64 v[170:171], v[170:171], off
	global_load_b64 v[166:167], v[166:167], off
	global_load_b64 v[172:173], v[172:173], off
	global_load_b64 v[174:175], v[164:165], off
	global_load_b64 v[176:177], v[162:163], off
	global_load_b64 v[180:181], v[152:153], off
	global_load_b64 v[182:183], v[146:147], off
	s_waitcnt vmcnt(6)
	v_add_f64 v[178:179], v[168:169], -v[170:171]
	s_waitcnt vmcnt(4)
	v_add_f64 v[184:185], v[166:167], -v[172:173]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[178:179], v[178:179], s[8:9]
	v_fma_f64 v[178:179], v[184:185], s[10:11], v[178:179]
	v_add_co_u32 v184, vcc_lo, v58, s2
	v_add_co_ci_u32_e32 v185, vcc_lo, s3, v59, vcc_lo
	v_add_co_u32 v186, vcc_lo, v60, s2
	v_add_co_ci_u32_e32 v187, vcc_lo, s3, v61, vcc_lo
	v_add_co_u32 v188, vcc_lo, v62, s2
	v_add_co_ci_u32_e32 v189, vcc_lo, s3, v63, vcc_lo
	v_add_co_u32 v190, vcc_lo, v64, s2
	v_add_co_ci_u32_e32 v191, vcc_lo, s3, v65, vcc_lo
	v_add_co_u32 v192, vcc_lo, 0x2d2000, v184
	v_add_co_ci_u32_e32 v193, vcc_lo, 0, v185, vcc_lo
	v_add_co_u32 v194, vcc_lo, 0x2d2000, v188
	v_add_co_ci_u32_e32 v195, vcc_lo, 0, v189, vcc_lo
	v_add_co_u32 v196, vcc_lo, 0x2d2000, v190
	v_add_co_ci_u32_e32 v197, vcc_lo, 0, v191, vcc_lo
	v_add_co_u32 v198, vcc_lo, 0x2d2000, v186
	v_add_co_ci_u32_e32 v199, vcc_lo, 0, v187, vcc_lo
	s_clause 0x7
	global_load_b64 v[194:195], v[194:195], off
	global_load_b64 v[196:197], v[196:197], off
	global_load_b64 v[192:193], v[192:193], off
	global_load_b64 v[198:199], v[198:199], off
	global_load_b64 v[200:201], v[190:191], off
	global_load_b64 v[202:203], v[188:189], off
	global_load_b64 v[206:207], v[186:187], off
	global_load_b64 v[208:209], v[184:185], off
	scratch_load_b32 v8, off, off offset:20 ; 4-byte Folded Reload
	v_mul_f64 v[124:125], v[124:125], v[178:179]
	s_waitcnt vmcnt(7)
	v_add_f64 v[204:205], v[194:195], -v[196:197]
	s_waitcnt vmcnt(5)
	v_add_f64 v[210:211], v[192:193], -v[198:199]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[204:205], v[204:205], s[8:9]
	v_fma_f64 v[204:205], v[210:211], s[10:11], v[204:205]
	v_add_co_u32 v210, vcc_lo, v68, s2
	v_add_co_ci_u32_e32 v211, vcc_lo, s3, v69, vcc_lo
	v_add_co_u32 v212, vcc_lo, v70, s2
	v_add_co_ci_u32_e32 v213, vcc_lo, s3, v71, vcc_lo
	v_add_co_u32 v214, vcc_lo, v72, s2
	v_add_co_ci_u32_e32 v215, vcc_lo, s3, v73, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_co_u32 v216, vcc_lo, v8, s2
	scratch_load_b32 v8, off, off offset:24 ; 4-byte Folded Reload
	v_mul_f64 v[144:145], v[144:145], v[204:205]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[144:145], v[10:11], v[144:145]
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v217, vcc_lo, s3, v8, vcc_lo
	v_add_co_u32 v218, vcc_lo, 0x2d2000, v210
	v_add_co_ci_u32_e32 v219, vcc_lo, 0, v211, vcc_lo
	v_add_co_u32 v220, vcc_lo, 0x2d2000, v214
	v_add_co_ci_u32_e32 v221, vcc_lo, 0, v215, vcc_lo
	v_add_co_u32 v222, vcc_lo, 0x2d2000, v216
	v_add_co_ci_u32_e32 v223, vcc_lo, 0, v217, vcc_lo
	v_add_co_u32 v224, vcc_lo, 0x2d2000, v212
	v_add_co_ci_u32_e32 v225, vcc_lo, 0, v213, vcc_lo
	s_clause 0x7
	global_load_b64 v[220:221], v[220:221], off
	global_load_b64 v[222:223], v[222:223], off
	global_load_b64 v[218:219], v[218:219], off
	global_load_b64 v[224:225], v[224:225], off
	global_load_b64 v[226:227], v[216:217], off
	global_load_b64 v[228:229], v[214:215], off
	global_load_b64 v[232:233], v[212:213], off
	global_load_b64 v[234:235], v[210:211], off
	s_load_b64 s[4:5], s[4:5], 0x0
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[124:125], s[4:5], v[124:125], v[144:145]
	s_waitcnt vmcnt(6)
	v_add_f64 v[230:231], v[220:221], -v[222:223]
	s_waitcnt vmcnt(4)
	v_add_f64 v[236:237], v[218:219], -v[224:225]
	s_waitcnt vmcnt(2)
	v_add_f64 v[136:137], v[228:229], -v[226:227]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[230:231], v[230:231], s[8:9]
	v_mul_f64 v[136:137], v[136:137], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[230:231], v[236:237], s[10:11], v[230:231]
	v_fma_f64 v[124:125], v[142:143], v[230:231], v[124:125]
	v_add_co_u32 v142, vcc_lo, 0x21d000, v16
	v_add_co_ci_u32_e32 v143, vcc_lo, 0, v17, vcc_lo
	v_add_co_u32 v144, vcc_lo, 0x21d000, v6
	v_add_co_ci_u32_e32 v145, vcc_lo, 0, v7, vcc_lo
	v_add_co_u32 v178, vcc_lo, 0x21d000, v14
	v_add_co_ci_u32_e32 v179, vcc_lo, 0, v15, vcc_lo
	v_add_co_u32 v204, vcc_lo, 0x21d000, v4
	v_add_co_ci_u32_e32 v205, vcc_lo, 0, v5, vcc_lo
	global_load_b64 v[142:143], v[142:143], off offset:2048
	global_load_b64 v[144:145], v[144:145], off offset:2048
	global_load_b64 v[178:179], v[178:179], off offset:2048
	global_load_b64 v[204:205], v[204:205], off offset:2048
	s_waitcnt vmcnt(2)
	v_fma_f64 v[142:143], v[142:143], 2.0, v[144:145]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[178:179], v[144:145], v[178:179]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[144:145], v[144:145], v[204:205]
	v_add_co_u32 v204, vcc_lo, 0x21d000, v36
	v_add_co_ci_u32_e32 v205, vcc_lo, 0, v37, vcc_lo
	global_load_b64 v[204:205], v[204:205], off offset:2048
	s_waitcnt vmcnt(0)
	v_mul_f64 v[142:143], v[142:143], v[204:205]
	v_add_co_u32 v204, vcc_lo, 0x21d000, v154
	v_add_co_ci_u32_e32 v205, vcc_lo, 0, v155, vcc_lo
	global_load_b64 v[204:205], v[204:205], off offset:2048
	s_waitcnt vmcnt(0)
	v_mul_f64 v[178:179], v[204:205], v[178:179]
	v_mul_f64 v[144:145], v[204:205], v[144:145]
	v_mul_f64 v[142:143], v[142:143], v[204:205]
	v_add_co_u32 v204, vcc_lo, 0x21d000, v146
	v_add_co_ci_u32_e32 v205, vcc_lo, 0, v147, vcc_lo
	v_add_co_u32 v230, vcc_lo, 0x21d000, v162
	v_add_co_ci_u32_e32 v231, vcc_lo, 0, v163, vcc_lo
	v_add_co_u32 v236, vcc_lo, 0x21d000, v164
	v_add_co_ci_u32_e32 v237, vcc_lo, 0, v165, vcc_lo
	v_add_co_u32 v238, vcc_lo, 0x21d000, v152
	v_add_co_ci_u32_e32 v239, vcc_lo, 0, v153, vcc_lo
	s_clause 0x3
	global_load_b64 v[236:237], v[236:237], off offset:2048
	global_load_b64 v[230:231], v[230:231], off offset:2048
	global_load_b64 v[204:205], v[204:205], off offset:2048
	global_load_b64 v[238:239], v[238:239], off offset:2048
	s_waitcnt vmcnt(2)
	v_add_f64 v[240:241], v[230:231], -v[236:237]
	s_waitcnt vmcnt(0)
	v_add_f64 v[242:243], v[204:205], -v[238:239]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[240:241], v[240:241], s[8:9]
	v_fma_f64 v[240:241], v[242:243], s[10:11], v[240:241]
	v_add_co_u32 v242, vcc_lo, 0x21d000, v184
	v_add_co_ci_u32_e32 v243, vcc_lo, 0, v185, vcc_lo
	v_add_co_u32 v244, vcc_lo, 0x21d000, v188
	v_add_co_ci_u32_e32 v245, vcc_lo, 0, v189, vcc_lo
	v_add_co_u32 v246, vcc_lo, 0x21d000, v190
	v_add_co_ci_u32_e32 v247, vcc_lo, 0, v191, vcc_lo
	v_add_co_u32 v248, vcc_lo, 0x21d000, v186
	v_add_co_ci_u32_e32 v249, vcc_lo, 0, v187, vcc_lo
	s_clause 0x3
	global_load_b64 v[246:247], v[246:247], off offset:2048
	global_load_b64 v[244:245], v[244:245], off offset:2048
	global_load_b64 v[242:243], v[242:243], off offset:2048
	global_load_b64 v[248:249], v[248:249], off offset:2048
	v_mul_f64 v[142:143], v[142:143], v[240:241]
	s_waitcnt vmcnt(2)
	v_add_f64 v[250:251], v[244:245], -v[246:247]
	s_waitcnt vmcnt(0)
	v_add_f64 v[252:253], v[242:243], -v[248:249]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[250:251], v[250:251], s[8:9]
	v_fma_f64 v[250:251], v[252:253], s[10:11], v[250:251]
	v_add_co_u32 v252, vcc_lo, 0x21d000, v210
	v_add_co_ci_u32_e32 v253, vcc_lo, 0, v211, vcc_lo
	v_add_co_u32 v254, vcc_lo, 0x21d000, v214
	v_add_co_ci_u32_e32 v255, vcc_lo, 0, v215, vcc_lo
	v_add_co_u32 v8, vcc_lo, 0x21d000, v216
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v217, vcc_lo
	v_add_co_u32 v12, vcc_lo, 0x21d000, v212
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v213, vcc_lo
	s_clause 0x3
	global_load_b64 v[8:9], v[8:9], off offset:2048
	global_load_b64 v[254:255], v[254:255], off offset:2048
	global_load_b64 v[252:253], v[252:253], off offset:2048
	global_load_b64 v[12:13], v[12:13], off offset:2048
	s_waitcnt vmcnt(2)
	v_add_f64 v[48:49], v[254:255], -v[8:9]
	s_waitcnt vmcnt(0)
	v_add_f64 v[50:51], v[252:253], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[48:49], v[48:49], s[8:9]
	v_fma_f64 v[48:49], v[50:51], s[10:11], v[48:49]
	v_mul_f64 v[50:51], v[178:179], v[250:251]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[50:51], v[10:11], v[50:51]
	v_fma_f64 v[50:51], s[4:5], v[142:143], v[50:51]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[48:49], v[144:145], v[48:49], v[50:51]
	v_add_co_u32 v50, vcc_lo, v90, s2
	v_add_co_ci_u32_e32 v51, vcc_lo, s3, v91, vcc_lo
	v_add_co_u32 v142, vcc_lo, v92, s2
	v_add_co_ci_u32_e32 v143, vcc_lo, s3, v93, vcc_lo
	s_clause 0x1
	global_load_b64 v[50:51], v[50:51], off
	global_load_b64 v[142:143], v[142:143], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[50:51], v[50:51], -v[142:143]
	v_add_co_u32 v142, vcc_lo, v94, s2
	v_add_co_ci_u32_e32 v143, vcc_lo, s3, v95, vcc_lo
	v_add_co_u32 v144, vcc_lo, v96, s2
	v_add_co_ci_u32_e32 v145, vcc_lo, s3, v97, vcc_lo
	s_clause 0x1
	global_load_b64 v[142:143], v[142:143], off
	global_load_b64 v[144:145], v[144:145], off
	v_fma_f64 v[26:27], v[50:51], s[10:11], v[26:27]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[26:27], v[158:159], v[26:27]
	s_waitcnt vmcnt(0)
	v_add_f64 v[142:143], v[142:143], -v[144:145]
	v_add_co_u32 v144, vcc_lo, v98, s2
	v_add_co_ci_u32_e32 v145, vcc_lo, s3, v99, vcc_lo
	v_add_co_u32 v178, vcc_lo, v100, s2
	v_add_co_ci_u32_e32 v179, vcc_lo, s3, v101, vcc_lo
	s_clause 0x1
	global_load_b64 v[144:145], v[144:145], off
	global_load_b64 v[178:179], v[178:179], off
	v_fma_f64 v[28:29], v[142:143], s[10:11], v[28:29]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[28:29], v[138:139], v[28:29]
	s_waitcnt vmcnt(0)
	v_add_f64 v[144:145], v[144:145], -v[178:179]
	v_add_co_u32 v178, vcc_lo, v102, s2
	v_add_co_ci_u32_e32 v179, vcc_lo, s3, v103, vcc_lo
	v_add_co_u32 v240, vcc_lo, v104, s2
	v_add_co_ci_u32_e32 v241, vcc_lo, s3, v105, vcc_lo
	s_clause 0x1
	global_load_b64 v[178:179], v[178:179], off
	global_load_b64 v[240:241], v[240:241], off
	scratch_load_b64 v[50:51], off, off offset:4 ; 8-byte Folded Reload
	v_fma_f64 v[30:31], v[144:145], s[10:11], v[30:31]
	s_waitcnt vmcnt(1)
	v_add_f64 v[178:179], v[178:179], -v[240:241]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[26:27], v[50:51], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[178:179], s[10:11], v[32:33]
	v_fma_f64 v[26:27], s[4:5], v[26:27], v[28:29]
	v_mul_f64 v[28:29], v[126:127], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[28:29], v[10:11], v[28:29]
	v_fma_f64 v[26:27], s[4:5], v[28:29], v[26:27]
	v_add_co_u32 v28, vcc_lo, 0xb4000, v162
	v_add_co_ci_u32_e32 v29, vcc_lo, 0, v163, vcc_lo
	v_add_co_u32 v30, vcc_lo, 0xb4000, v188
	v_add_co_ci_u32_e32 v31, vcc_lo, 0, v189, vcc_lo
	v_fma_f64 v[26:27], v[150:151], v[32:33], v[26:27]
	v_add_co_u32 v32, vcc_lo, 0xb4000, v152
	v_add_co_ci_u32_e32 v33, vcc_lo, 0, v153, vcc_lo
	v_add_co_u32 v50, vcc_lo, 0xb4000, v186
	v_add_co_ci_u32_e32 v51, vcc_lo, 0, v187, vcc_lo
	v_add_co_u32 v138, vcc_lo, 0xb4000, v164
	v_add_co_ci_u32_e32 v139, vcc_lo, 0, v165, vcc_lo
	v_add_co_u32 v142, vcc_lo, 0xb4000, v190
	v_add_co_ci_u32_e32 v143, vcc_lo, 0, v191, vcc_lo
	v_add_co_u32 v144, vcc_lo, v106, s2
	v_add_co_ci_u32_e32 v145, vcc_lo, s3, v107, vcc_lo
	v_add_co_u32 v150, vcc_lo, v108, s2
	v_add_co_ci_u32_e32 v151, vcc_lo, s3, v109, vcc_lo
	s_clause 0x1
	global_load_b64 v[144:145], v[144:145], off
	global_load_b64 v[150:151], v[150:151], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[144:145], v[144:145], -v[150:151]
	v_add_co_u32 v150, vcc_lo, v110, s2
	v_add_co_ci_u32_e32 v151, vcc_lo, s3, v111, vcc_lo
	v_add_co_u32 v152, vcc_lo, v112, s2
	v_add_co_ci_u32_e32 v153, vcc_lo, s3, v113, vcc_lo
	s_clause 0x1
	global_load_b64 v[150:151], v[150:151], off
	global_load_b64 v[152:153], v[152:153], off
	v_fma_f64 v[18:19], v[144:145], s[10:11], v[18:19]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[18:19], v[160:161], v[18:19]
	s_waitcnt vmcnt(0)
	v_add_f64 v[150:151], v[150:151], -v[152:153]
	v_add_co_u32 v152, vcc_lo, v114, s2
	v_add_co_ci_u32_e32 v153, vcc_lo, s3, v115, vcc_lo
	v_add_co_u32 v162, vcc_lo, v116, s2
	v_add_co_ci_u32_e32 v163, vcc_lo, s3, v117, vcc_lo
	s_clause 0x1
	global_load_b64 v[152:153], v[152:153], off
	global_load_b64 v[162:163], v[162:163], off
	v_fma_f64 v[20:21], v[150:151], s[10:11], v[20:21]
	v_add_f64 v[150:151], v[168:169], -v[176:177]
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[20:21], v[140:141], v[20:21]
	s_waitcnt vmcnt(0)
	v_add_f64 v[152:153], v[152:153], -v[162:163]
	v_add_co_u32 v162, vcc_lo, v118, s2
	v_add_co_ci_u32_e32 v163, vcc_lo, s3, v119, vcc_lo
	v_add_co_u32 v164, vcc_lo, v120, s2
	v_add_co_ci_u32_e32 v165, vcc_lo, s3, v121, vcc_lo
	s_clause 0x1
	global_load_b64 v[162:163], v[162:163], off
	global_load_b64 v[164:165], v[164:165], off
	s_clause 0x2
	global_load_b64 v[28:29], v[28:29], off offset:2048
	global_load_b64 v[138:139], v[138:139], off offset:2048
	global_load_b64 v[32:33], v[32:33], off offset:2048
	s_clause 0x2
	global_load_b64 v[30:31], v[30:31], off offset:2048
	global_load_b64 v[142:143], v[142:143], off offset:2048
	global_load_b64 v[50:51], v[50:51], off offset:2048
	scratch_load_b64 v[140:141], off, off offset:12 ; 8-byte Folded Reload
	s_clause 0x1
	s_load_b64 s[12:13], s[0:1], 0x0
	s_load_b64 s[6:7], s[6:7], 0x0
	v_fma_f64 v[22:23], v[152:153], s[10:11], v[22:23]
	v_add_f64 v[152:153], v[194:195], -v[202:203]
	s_waitcnt vmcnt(6)
	v_add_f64 v[144:145], v[230:231], -v[28:29]
	v_add_f64 v[162:163], v[162:163], -v[164:165]
	v_add_f64 v[164:165], v[198:199], -v[206:207]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[18:19], v[140:141], v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[144:145], v[144:145], s[8:9]
	v_fma_f64 v[24:25], v[162:163], s[10:11], v[24:25]
	v_add_f64 v[162:163], v[172:173], -v[180:181]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], s[4:5], v[18:19], v[20:21]
	v_mul_f64 v[20:21], v[38:39], v[22:23]
	v_fma_f64 v[144:145], v[150:151], s[10:11], v[144:145]
	v_add_f64 v[150:151], v[244:245], -v[30:31]
	v_mul_f64 v[20:21], v[10:11], v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[134:135], v[134:135], v[144:145]
	v_mul_f64 v[150:151], v[150:151], s[8:9]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[18:19], s[4:5], v[20:21], v[18:19]
	v_add_co_u32 v20, vcc_lo, 0xb4000, v146
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v147, vcc_lo
	v_add_co_u32 v22, vcc_lo, 0xb4000, v184
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v185, vcc_lo
	global_load_b64 v[20:21], v[20:21], off offset:2048
	global_load_b64 v[22:23], v[22:23], off offset:2048
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[134:135], v[134:135], s[12:13]
	v_fma_f64 v[150:151], v[152:153], s[10:11], v[150:151]
	v_add_f64 v[152:153], v[192:193], -v[208:209]
	v_fma_f64 v[18:19], v[128:129], v[24:25], v[18:19]
	v_add_co_u32 v24, vcc_lo, 0xb4000, v210
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v211, vcc_lo
	v_add_co_u32 v128, vcc_lo, 0xb4000, v212
	v_add_co_ci_u32_e32 v129, vcc_lo, 0, v213, vcc_lo
	v_add_co_u32 v140, vcc_lo, 0xb4000, v214
	v_add_co_ci_u32_e32 v141, vcc_lo, 0, v215, vcc_lo
	v_add_co_u32 v144, vcc_lo, 0xb4000, v216
	v_add_co_ci_u32_e32 v145, vcc_lo, 0, v217, vcc_lo
	s_clause 0x3
	global_load_b64 v[24:25], v[24:25], off offset:2048
	global_load_b64 v[128:129], v[128:129], off offset:2048
	global_load_b64 v[140:141], v[140:141], off offset:2048
	global_load_b64 v[144:145], v[144:145], off offset:2048
	v_add_co_u32 v16, vcc_lo, 0xb4000, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v17, vcc_lo
	v_add_co_u32 v6, vcc_lo, 0xb4000, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	v_add_co_u32 v36, vcc_lo, 0xb4000, v36
	v_add_co_ci_u32_e32 v37, vcc_lo, 0, v37, vcc_lo
	v_mul_f64 v[134:135], v[10:11], v[134:135]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[134:135], v[160:161], v[150:151], v[134:135]
	v_add_f64 v[150:151], v[166:167], -v[182:183]
	v_add_f64 v[160:161], v[218:219], -v[234:235]
	s_waitcnt vmcnt(5)
	v_add_f64 v[146:147], v[204:205], -v[20:21]
	v_add_f64 v[20:21], v[20:21], -v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_mul_f64 v[146:147], v[146:147], s[8:9]
	s_waitcnt vmcnt(2)
	v_add_f64 v[12:13], v[12:13], -v[128:129]
	s_waitcnt vmcnt(0)
	v_add_f64 v[8:9], v[8:9], -v[144:145]
	v_fma_f64 v[146:147], v[150:151], s[10:11], v[146:147]
	v_add_f64 v[150:151], v[242:243], -v[22:23]
	v_add_f64 v[22:23], v[22:23], -v[50:51]
	v_mul_f64 v[12:13], v[12:13], s[8:9]
	v_mul_f64 v[8:9], v[8:9], s[8:9]
	v_mul_f64 v[132:133], v[132:133], v[146:147]
	v_mul_f64 v[150:151], v[150:151], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[132:133], s[4:5], v[132:133]
	v_fma_f64 v[150:151], v[152:153], s[10:11], v[150:151]
	v_add_f64 v[152:153], v[252:253], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[146:147], v[158:159], v[150:151]
	v_mul_f64 v[152:153], v[152:153], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[132:133], v[10:11], v[132:133], v[146:147]
	v_fma_f64 v[152:153], v[160:161], s[10:11], v[152:153]
	v_add_f64 v[160:161], v[238:239], -v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[130:131], v[152:153], v[130:131]
	v_mul_f64 v[160:161], v[160:161], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[130:131], v[10:11], v[130:131], v[132:133]
	v_fma_f64 v[160:161], v[162:163], s[10:11], v[160:161]
	v_add_f64 v[162:163], v[248:249], -v[50:51]
	v_add_f64 v[132:133], v[176:177], -v[174:175]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[122:123], v[122:123], v[160:161]
	v_mul_f64 v[162:163], v[162:163], s[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[132:133], v[132:133], s[8:9]
	v_mul_f64 v[122:123], s[4:5], v[122:123]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[162:163], v[164:165], s[10:11], v[162:163]
	v_fma_f64 v[122:123], v[10:11], v[122:123], v[130:131]
	v_add_f64 v[130:131], v[208:209], -v[206:207]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[122:123], v[126:127], v[162:163], v[122:123]
	v_add_f64 v[126:127], v[182:183], -v[180:181]
	v_fma_f64 v[126:127], v[126:127], s[10:11], v[132:133]
	v_add_f64 v[132:133], v[202:203], -v[200:201]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[40:41], v[40:41], v[126:127]
	v_mul_f64 v[132:133], v[132:133], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[40:41], s[4:5], v[40:41], v[124:125]
	v_fma_f64 v[130:131], v[130:131], s[10:11], v[132:133]
	v_add_f64 v[132:133], v[234:235], -v[232:233]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[42:43], v[42:43], v[130:131]
	v_fma_f64 v[132:133], v[132:133], s[10:11], v[136:137]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[40:41], v[10:11], v[42:43], v[40:41]
	v_add_co_u32 v42, vcc_lo, 0xb4000, v154
	v_add_co_ci_u32_e32 v43, vcc_lo, 0, v155, vcc_lo
	v_add_co_u32 v14, vcc_lo, 0xb4000, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v15, vcc_lo
	v_add_co_u32 v4, vcc_lo, 0xb4000, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	global_load_b64 v[16:17], v[16:17], off offset:2048
	global_load_b64 v[6:7], v[6:7], off offset:2048
	global_load_b64 v[14:15], v[14:15], off offset:2048
	global_load_b64 v[4:5], v[4:5], off offset:2048
	v_fma_f64 v[40:41], v[46:47], v[132:133], v[40:41]
	s_waitcnt vmcnt(2)
	v_fma_f64 v[16:17], v[16:17], 2.0, v[6:7]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[14:15], v[6:7], v[14:15]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[4:5], v[6:7], v[4:5]
	global_load_b64 v[6:7], v[36:37], off offset:2048
	s_waitcnt vmcnt(0)
	v_mul_f64 v[6:7], v[16:17], v[6:7]
	global_load_b64 v[16:17], v[42:43], off offset:2048
	s_waitcnt vmcnt(0)
	v_mul_f64 v[14:15], v[16:17], v[14:15]
	v_mul_f64 v[4:5], v[16:17], v[4:5]
	v_mul_f64 v[6:7], v[6:7], v[16:17]
	v_add_f64 v[16:17], v[28:29], -v[138:139]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[16:17], v[16:17], s[8:9]
	v_fma_f64 v[16:17], v[20:21], s[10:11], v[16:17]
	v_add_f64 v[20:21], v[30:31], -v[142:143]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[6:7], v[6:7], v[16:17]
	v_mul_f64 v[20:21], v[20:21], s[8:9]
	v_add_f64 v[16:17], v[170:171], -v[174:175]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], s[4:5], v[6:7], v[48:49]
	v_fma_f64 v[20:21], v[22:23], s[10:11], v[20:21]
	v_add_f64 v[22:23], v[24:25], -v[128:129]
	v_add_f64 v[24:25], v[140:141], -v[144:145]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[14:15], v[14:15], v[20:21]
	v_add_f64 v[20:21], v[236:237], -v[138:139]
	v_mul_f64 v[24:25], v[24:25], s[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[10:11], v[14:15], v[6:7]
	v_add_f64 v[14:15], v[220:221], -v[228:229]
	v_fma_f64 v[22:23], v[22:23], s[10:11], v[24:25]
	v_add_f64 v[24:25], v[246:247], -v[142:143]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], v[4:5], v[22:23], v[6:7]
	v_add_f64 v[6:7], v[254:255], -v[140:141]
	v_add_f64 v[22:23], v[196:197], -v[200:201]
	v_mul_f64 v[4:5], v[4:5], s[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[6:7], v[6:7], s[8:9]
	v_fma_f64 v[4:5], v[40:41], s[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[14:15], s[10:11], v[6:7]
	v_mul_f64 v[14:15], v[20:21], s[8:9]
	v_mul_f64 v[6:7], v[6:7], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[16:17], s[10:11], v[14:15]
	v_mul_f64 v[16:17], v[24:25], s[8:9]
	v_fma_f64 v[6:7], v[10:11], v[6:7], v[134:135]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[14:15], v[44:45], v[14:15]
	v_fma_f64 v[16:17], v[22:23], s[10:11], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[14:15], v[14:15], s[6:7]
	v_fma_f64 v[6:7], v[10:11], v[14:15], v[6:7]
	v_add_f64 v[14:15], v[224:225], -v[232:233]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[38:39], v[16:17], v[6:7]
	v_fma_f64 v[12:13], v[14:15], s[10:11], v[12:13]
	v_add_f64 v[16:17], v[222:223], -v[226:227]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_f64 v[0:1], v[12:13], v[0:1]
	v_add_co_u32 v12, vcc_lo, v88, s2
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v89, vcc_lo
	v_fma_f64 v[8:9], v[16:17], s[10:11], v[8:9]
	s_add_u32 s2, s2, 0xb4800
	s_addc_u32 s3, s3, 0
	global_load_b64 v[14:15], v[12:13], off
	s_add_i32 s33, s33, -1
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s33, 0
	v_fma_f64 v[0:1], v[10:11], v[0:1], v[122:123]
	v_mul_f64 v[2:3], v[8:9], v[2:3]
	v_mul_f64 v[8:9], v[18:19], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[10:11], v[2:3], v[6:7]
	v_fma_f64 v[8:9], v[26:27], s[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], s[8:9]
	v_fma_f64 v[0:1], v[0:1], s[10:11], v[2:3]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[14:15], v[8:9]
	v_fma_f64 v[4:5], v[10:11], v[4:5], v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[0:1], v[4:5], v[0:1]
	global_store_b64 v[12:13], v[0:1], off
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 36
		.amdhsa_kernarg_size 376
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 256
		.amdhsa_next_free_sgpr 34
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi, .Lfunc_end0-_Z7curvi_1PdS_S_S_S_S_S_S_S_S_S_S_ddi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 6504
; NumSgprs: 36
; NumVgprs: 256
; ScratchSize: 36
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 31
; NumSGPRsForWavesPerEU: 36
; NumVGPRsForWavesPerEU: 256
; Occupancy: 5
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi ; -- Begin function _Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.globl	_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi
	.p2align	8
	.type	_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi,@function
_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi:  ; @_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x84
	s_load_b32 s4, s[0:1], 0x70
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v2, v0, 10, 10
	v_bfe_u32 v3, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_and_b32 s5, s2, 0xffff
	s_lshr_b32 s2, s2, 16
	s_mul_i32 s13, s13, s5
	s_mul_i32 s14, s14, s2
	s_mul_i32 s15, s15, s3
	s_max_i32 s2, s13, 0
	s_max_i32 s3, s14, 0
	s_max_i32 s5, s15, 0
	v_add_nc_u32_e32 v0, s2, v1
	v_add_nc_u32_e32 v26, s3, v2
	v_add_nc_u32_e32 v12, s5, v3
	s_add_i32 s4, s4, -3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min3_u32 v1, v0, v26, v12
	v_max3_i32 v2, v26, v0, v12
	v_cmp_lt_u32_e32 vcc_lo, 1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e64 s2, s4, v2
	s_and_b32 s2, s2, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_clause 0x4
	s_load_b64 s[22:23], s[0:1], 0x40
	s_load_b128 s[16:19], s[0:1], 0x0
	s_load_b64 s[20:21], s[0:1], 0x10
	s_load_b256 s[8:15], s[0:1], 0x20
	s_load_b256 s[0:7], s[0:1], 0x50
	v_mad_u64_u32 v[10:11], null, 0xb4800, v12, 0
	v_mov_b32_e32 v13, 0
	v_mad_u64_u32 v[6:7], null, 0x980, v26, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v1, v13
	v_lshlrev_b64 v[8:9], 3, v[0:1]
	v_add_nc_u32_e32 v1, 2, v26
	v_dual_mov_b32 v27, v13 :: v_dual_add_nc_u32 v0, 1, v0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s16, v10
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v11, vcc_lo
	v_mad_u64_u32 v[14:15], null, 0x980, v1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v2, v8
	v_add_co_ci_u32_e32 v5, vcc_lo, v3, v9, vcc_lo
	v_add_co_u32 v42, vcc_lo, s8, v10
	v_add_co_ci_u32_e32 v43, vcc_lo, s9, v11, vcc_lo
	global_load_b64 v[16:17], v[4:5], off
	v_add_co_u32 v1, vcc_lo, v42, v14
	v_add_co_ci_u32_e32 v2, vcc_lo, v43, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, v1, v8
	v_add_co_ci_u32_e32 v2, vcc_lo, v2, v9, vcc_lo
	v_add_co_u32 v46, vcc_lo, s22, v10
	v_add_co_ci_u32_e32 v47, vcc_lo, s23, v11, vcc_lo
	global_load_b64 v[18:19], v[1:2], off
	v_add_co_u32 v1, vcc_lo, v46, v14
	v_add_co_ci_u32_e32 v2, vcc_lo, v47, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, v1, v8
	v_add_co_ci_u32_e32 v2, vcc_lo, v2, v9, vcc_lo
	v_add_co_u32 v48, vcc_lo, s12, v10
	v_add_co_ci_u32_e32 v49, vcc_lo, s13, v11, vcc_lo
	global_load_b64 v[1:2], v[1:2], off
	v_add_co_u32 v3, vcc_lo, v48, v14
	v_add_co_ci_u32_e32 v21, vcc_lo, v49, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v20, vcc_lo, v3, v8
	v_add_co_ci_u32_e32 v21, vcc_lo, v21, v9, vcc_lo
	v_add_co_u32 v52, vcc_lo, s18, v10
	v_add_co_ci_u32_e32 v53, vcc_lo, s19, v11, vcc_lo
	global_load_b64 v[20:21], v[20:21], off
	v_add_co_u32 v28, vcc_lo, v52, v14
	v_add_co_ci_u32_e32 v29, vcc_lo, v53, v15, vcc_lo
	s_waitcnt vmcnt(1)
	v_mul_f64 v[1:2], v[18:19], v[1:2]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[22:23], v[1:2], v[20:21]
	v_mov_b32_e32 v1, v13
	v_lshlrev_b64 v[34:35], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v28, v34
	v_add_co_ci_u32_e32 v1, vcc_lo, v29, v35, vcc_lo
	v_add_co_u32 v44, vcc_lo, v8, -16
	v_add_co_ci_u32_e32 v45, vcc_lo, -1, v9, vcc_lo
	global_load_b128 v[0:3], v[0:1], off
	v_add_co_u32 v24, vcc_lo, v28, v44
	v_add_co_ci_u32_e32 v25, vcc_lo, v29, v45, vcc_lo
	v_add_co_u32 v50, vcc_lo, v8, -8
	v_add_co_ci_u32_e32 v51, vcc_lo, -1, v9, vcc_lo
	global_load_b64 v[24:25], v[24:25], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], -v[24:25]
	v_add_co_u32 v24, vcc_lo, v28, v50
	v_add_co_ci_u32_e32 v25, vcc_lo, v29, v51, vcc_lo
	v_add_nc_u32_e32 v29, 1, v26
	global_load_b64 v[24:25], v[24:25], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[0:1], v[0:1], -v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[0:1], s[4:5]
	v_fma_f64 v[0:1], v[2:3], s[6:7], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[22:23], v[22:23], v[0:1]
	v_lshlrev_b64 v[0:1], 3, v[26:27]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_clause 0x1
	global_load_b64 v[24:25], v[0:1], off offset:8
	global_load_b128 v[0:3], v[0:1], off offset:-8
	s_waitcnt vmcnt(1)
	v_mul_f64 v[27:28], v[24:25], v[22:23]
	v_lshlrev_b64 v[22:23], 3, v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v22, vcc_lo, s0, v22
	v_add_co_ci_u32_e32 v23, vcc_lo, s1, v23, vcc_lo
	v_add_co_u32 v13, vcc_lo, s14, v10
	v_add_co_ci_u32_e32 v54, vcc_lo, s15, v11, vcc_lo
	global_load_b64 v[38:39], v[22:23], off
	v_add_co_u32 v22, vcc_lo, v13, v14
	v_add_co_ci_u32_e32 v23, vcc_lo, v54, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v22, vcc_lo, v22, v8
	v_add_co_ci_u32_e32 v23, vcc_lo, v23, v9, vcc_lo
	v_add_co_u32 v56, vcc_lo, s20, v10
	v_add_co_ci_u32_e32 v57, vcc_lo, s21, v11, vcc_lo
	global_load_b64 v[22:23], v[22:23], off
	v_add_co_u32 v32, vcc_lo, v56, v14
	v_add_co_ci_u32_e32 v33, vcc_lo, v57, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v32, v34
	v_add_co_ci_u32_e32 v11, vcc_lo, v33, v35, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f64 v[22:23], v[18:19], v[22:23]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[30:31], v[20:21], v[22:23]
	global_load_b128 v[22:25], v[10:11], off
	v_add_co_u32 v10, vcc_lo, v32, v44
	v_add_co_ci_u32_e32 v11, vcc_lo, v33, v45, vcc_lo
	global_load_b64 v[10:11], v[10:11], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[10:11], v[24:25], -v[10:11]
	v_add_co_u32 v24, vcc_lo, v32, v50
	v_add_co_ci_u32_e32 v25, vcc_lo, v33, v51, vcc_lo
	global_load_b64 v[24:25], v[24:25], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	v_add_nc_u32_e32 v24, -2, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[22:23], v[22:23], s[4:5]
	v_fma_f64 v[10:11], v[10:11], s[6:7], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_i64_i32 v[22:23], null, 0x980, v24, 0
	v_add_co_u32 v24, vcc_lo, v42, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v25, vcc_lo, v43, v23, vcc_lo
	v_add_co_u32 v24, vcc_lo, v24, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v25, vcc_lo, v25, v9, vcc_lo
	global_load_b64 v[24:25], v[24:25], off
	v_mul_f64 v[10:11], v[30:31], v[10:11]
	v_fma_f64 v[10:11], v[38:39], v[27:28], v[10:11]
	v_add_co_u32 v27, vcc_lo, v46, v22
	v_add_co_ci_u32_e32 v28, vcc_lo, v47, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v27, vcc_lo, v27, v8
	v_add_co_ci_u32_e32 v28, vcc_lo, v28, v9, vcc_lo
	global_load_b64 v[27:28], v[27:28], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[30:31], v[24:25], v[27:28]
	v_add_co_u32 v27, vcc_lo, v48, v22
	v_add_co_ci_u32_e32 v28, vcc_lo, v49, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v27, vcc_lo, v27, v8
	v_add_co_ci_u32_e32 v28, vcc_lo, v28, v9, vcc_lo
	v_add_co_u32 v55, vcc_lo, v52, v22
	v_add_co_ci_u32_e32 v58, vcc_lo, v53, v23, vcc_lo
	global_load_b64 v[27:28], v[27:28], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[36:37], v[30:31], v[27:28]
	v_add_co_u32 v30, vcc_lo, v55, v34
	v_add_co_ci_u32_e32 v31, vcc_lo, v58, v35, vcc_lo
	v_add_co_u32 v40, vcc_lo, v55, v44
	v_add_co_ci_u32_e32 v41, vcc_lo, v58, v45, vcc_lo
	s_clause 0x1
	global_load_b128 v[30:33], v[30:31], off
	global_load_b64 v[40:41], v[40:41], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[32:33], v[32:33], -v[40:41]
	v_add_co_u32 v40, vcc_lo, v55, v50
	v_add_co_ci_u32_e32 v41, vcc_lo, v58, v51, vcc_lo
	v_add_nc_u32_e32 v58, -1, v26
	global_load_b64 v[40:41], v[40:41], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[30:31], v[30:31], -v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[30:31], v[30:31], s[4:5]
	v_fma_f64 v[30:31], v[32:33], s[6:7], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[30:31], v[36:37], v[30:31]
	v_mul_f64 v[30:31], v[2:3], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[38:39], v[30:31], v[10:11]
	v_add_co_u32 v30, vcc_lo, v13, v22
	v_add_co_ci_u32_e32 v31, vcc_lo, v54, v23, vcc_lo
	v_add_co_u32 v30, vcc_lo, v30, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v31, vcc_lo, v31, v9, vcc_lo
	v_add_co_u32 v40, vcc_lo, v56, v22
	v_add_co_ci_u32_e32 v41, vcc_lo, v57, v23, vcc_lo
	global_load_b64 v[30:31], v[30:31], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[30:31], v[24:25], v[30:31]
	v_mul_f64 v[24:25], v[24:25], v[27:28]
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[36:37], v[27:28], v[30:31]
	v_add_co_u32 v30, vcc_lo, v40, v34
	v_add_co_ci_u32_e32 v31, vcc_lo, v41, v35, vcc_lo
	v_add_co_u32 v34, vcc_lo, v40, v44
	v_add_co_ci_u32_e32 v35, vcc_lo, v41, v45, vcc_lo
	global_load_b128 v[30:33], v[30:31], off
	v_mul_f64 v[24:25], v[27:28], v[24:25]
	global_load_b64 v[34:35], v[34:35], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[32:33], v[32:33], -v[34:35]
	v_add_co_u32 v34, vcc_lo, v40, v50
	v_add_co_ci_u32_e32 v35, vcc_lo, v41, v51, vcc_lo
	global_load_b64 v[34:35], v[34:35], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[30:31], v[30:31], -v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[30:31], v[30:31], s[4:5]
	v_fma_f64 v[30:31], v[32:33], s[6:7], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[40:41], v[36:37], v[30:31], v[10:11]
	v_add_co_u32 v10, vcc_lo, v42, v6
	v_add_co_ci_u32_e32 v11, vcc_lo, v43, v7, vcc_lo
	v_add_co_u32 v42, vcc_lo, v10, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v43, vcc_lo, v11, v9, vcc_lo
	v_add_co_u32 v10, vcc_lo, v46, v6
	v_add_co_ci_u32_e32 v11, vcc_lo, v47, v7, vcc_lo
	global_load_b64 v[44:45], v[42:43], off offset:2432
	v_add_co_u32 v46, vcc_lo, v10, v8
	v_add_co_ci_u32_e32 v47, vcc_lo, v11, v9, vcc_lo
	global_load_b64 v[10:11], v[46:47], off offset:2432
	s_waitcnt vmcnt(0)
	v_mul_f64 v[30:31], v[44:45], v[10:11]
	v_add_co_u32 v10, vcc_lo, v48, v6
	v_add_co_ci_u32_e32 v11, vcc_lo, v49, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v10, v8
	v_add_co_ci_u32_e32 v11, vcc_lo, v11, v9, vcc_lo
	global_load_b64 v[48:49], v[10:11], off offset:2432
	s_waitcnt vmcnt(0)
	v_mul_f64 v[50:51], v[30:31], v[48:49]
	v_add_co_u32 v30, vcc_lo, v52, v6
	v_add_co_ci_u32_e32 v31, vcc_lo, v53, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v52, vcc_lo, v30, v8
	v_add_co_ci_u32_e32 v53, vcc_lo, v31, v9, vcc_lo
	s_clause 0x1
	global_load_b128 v[30:33], v[52:53], off offset:2440
	global_load_b128 v[34:37], v[52:53], off offset:2416
	v_add_co_u32 v13, vcc_lo, v13, v6
	v_add_co_ci_u32_e32 v26, vcc_lo, v54, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f64 v[30:31], v[30:31], -v[36:37]
	v_add_f64 v[32:33], v[32:33], -v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[30:31], v[30:31], s[4:5]
	v_fma_f64 v[30:31], v[32:33], s[6:7], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_mul_f64 v[30:31], v[50:51], v[30:31]
	v_add_co_u32 v50, vcc_lo, v13, v8
	v_add_co_ci_u32_e32 v51, vcc_lo, v26, v9, vcc_lo
	v_add_co_u32 v13, vcc_lo, v56, v6
	v_add_co_ci_u32_e32 v26, vcc_lo, v57, v7, vcc_lo
	v_add_co_u32 v56, vcc_lo, v13, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v57, vcc_lo, v26, v9, vcc_lo
	v_mul_f64 v[0:1], v[0:1], v[30:31]
	global_load_b64 v[30:31], v[50:51], off offset:2432
	s_waitcnt vmcnt(0)
	v_mul_f64 v[30:31], v[44:45], v[30:31]
	v_mul_f64 v[54:55], v[48:49], v[30:31]
	s_clause 0x1
	global_load_b128 v[30:33], v[56:57], off offset:2440
	global_load_b128 v[34:37], v[56:57], off offset:2416
	s_waitcnt vmcnt(0)
	v_add_f64 v[30:31], v[30:31], -v[36:37]
	v_add_f64 v[32:33], v[32:33], -v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[30:31], v[30:31], s[4:5]
	v_fma_f64 v[30:31], v[32:33], s[6:7], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[30:31], v[54:55], v[30:31]
	v_fma_f64 v[0:1], v[38:39], v[0:1], v[30:31]
	global_load_b64 v[42:43], v[42:43], off offset:-2432
	global_load_b64 v[30:31], v[46:47], off offset:-2432
	global_load_b64 v[46:47], v[10:11], off offset:-2432
	s_waitcnt vmcnt(1)
	v_mul_f64 v[30:31], v[42:43], v[30:31]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[54:55], v[30:31], v[46:47]
	s_clause 0x1
	global_load_b128 v[30:33], v[52:53], off offset:-2424
	global_load_b128 v[34:37], v[52:53], off offset:-2448
	s_waitcnt vmcnt(0)
	v_add_f64 v[30:31], v[30:31], -v[36:37]
	v_add_f64 v[32:33], v[32:33], -v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[30:31], v[30:31], s[4:5]
	v_fma_f64 v[30:31], v[32:33], s[6:7], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[30:31], v[54:55], v[30:31]
	v_add_nc_u32_e32 v54, 2, v12
	v_add_nc_u32_e32 v55, -2, v12
	v_mul_f64 v[2:3], v[2:3], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[38:39], v[2:3], v[0:1]
	global_load_b64 v[0:1], v[50:51], off offset:-2432
	s_waitcnt vmcnt(0)
	v_mul_f64 v[0:1], v[42:43], v[0:1]
	v_mul_f64 v[42:43], v[42:43], v[46:47]
	v_mul_f64 v[36:37], v[46:47], v[0:1]
	s_clause 0x1
	global_load_b128 v[0:3], v[56:57], off offset:-2424
	global_load_b128 v[30:33], v[56:57], off offset:-2448
	v_add_nc_u32_e32 v56, 1, v12
	v_add_nc_u32_e32 v57, -1, v12
	v_mul_f64 v[42:43], v[46:47], v[42:43]
	v_mad_i64_i32 v[46:47], null, 0x980, v58, 0
	s_waitcnt vmcnt(0)
	v_add_f64 v[0:1], v[0:1], -v[32:33]
	v_add_f64 v[2:3], v[2:3], -v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[0:1], s[4:5]
	v_fma_f64 v[0:1], v[2:3], s[6:7], v[0:1]
	v_mul_f64 v[2:3], v[18:19], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[0:1], v[36:37], v[0:1], v[34:35]
	v_mul_f64 v[2:3], v[20:21], v[2:3]
	v_mad_i64_i32 v[20:21], null, 0xb4800, v55, s[20:21]
	v_mad_u64_u32 v[34:35], null, 0xb4800, v56, s[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[0:1], s[4:5]
	v_fma_f64 v[0:1], v[40:41], s[6:7], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[16:17], v[0:1]
	v_mad_u64_u32 v[16:17], null, 0xb4800, v54, s[20:21]
	v_add_co_u32 v13, vcc_lo, v16, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v19, vcc_lo, v17, v15, vcc_lo
	v_add_co_u32 v18, vcc_lo, v13, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v19, vcc_lo, v19, v9, vcc_lo
	v_add_co_u32 v13, vcc_lo, v20, v14
	v_add_co_ci_u32_e32 v26, vcc_lo, v21, v15, vcc_lo
	global_load_b64 v[18:19], v[18:19], off
	v_add_co_u32 v30, vcc_lo, v13, v8
	v_add_co_ci_u32_e32 v31, vcc_lo, v26, v9, vcc_lo
	v_add_co_u32 v13, vcc_lo, v34, v14
	v_add_co_ci_u32_e32 v26, vcc_lo, v35, v15, vcc_lo
	global_load_b64 v[30:31], v[30:31], off
	v_add_co_u32 v36, vcc_lo, v13, v8
	v_mad_i64_i32 v[12:13], null, 0xb4800, v57, s[20:21]
	v_add_co_ci_u32_e32 v37, vcc_lo, v26, v9, vcc_lo
	global_load_b64 v[36:37], v[36:37], off
	v_add_co_u32 v14, vcc_lo, v12, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, v13, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, v14, v8
	v_add_co_ci_u32_e32 v15, vcc_lo, v15, v9, vcc_lo
	v_add_co_u32 v26, vcc_lo, v16, v22
	v_add_co_ci_u32_e32 v27, vcc_lo, v17, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v26, vcc_lo, v26, v8
	v_add_co_ci_u32_e32 v27, vcc_lo, v27, v9, vcc_lo
	v_add_co_u32 v28, vcc_lo, v20, v22
	s_clause 0x1
	global_load_b64 v[26:27], v[26:27], off
	global_load_b64 v[14:15], v[14:15], off
	s_waitcnt vmcnt(3)
	v_add_f64 v[32:33], v[18:19], -v[30:31]
	s_waitcnt vmcnt(1)
	v_add_f64 v[18:19], v[18:19], -v[26:27]
	s_waitcnt vmcnt(0)
	v_add_f64 v[38:39], v[36:37], -v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[38:39], v[38:39], s[4:5]
	v_fma_f64 v[32:33], v[32:33], s[6:7], v[38:39]
	v_add_co_ci_u32_e32 v39, vcc_lo, v21, v23, vcc_lo
	v_add_co_u32 v38, vcc_lo, v28, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v39, vcc_lo, v39, v9, vcc_lo
	v_add_co_u32 v28, vcc_lo, v34, v22
	v_add_co_ci_u32_e32 v51, vcc_lo, v35, v23, vcc_lo
	global_load_b64 v[38:39], v[38:39], off
	v_add_co_u32 v50, vcc_lo, v28, v8
	v_add_co_ci_u32_e32 v51, vcc_lo, v51, v9, vcc_lo
	v_add_co_u32 v22, vcc_lo, v12, v22
	v_add_co_ci_u32_e32 v23, vcc_lo, v13, v23, vcc_lo
	global_load_b64 v[50:51], v[50:51], off
	v_add_co_u32 v22, vcc_lo, v22, v8
	v_add_co_ci_u32_e32 v23, vcc_lo, v23, v9, vcc_lo
	global_load_b64 v[22:23], v[22:23], off
	s_waitcnt vmcnt(2)
	v_add_f64 v[40:41], v[26:27], -v[38:39]
	s_waitcnt vmcnt(0)
	v_add_f64 v[52:53], v[50:51], -v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[52:53], v[52:53], s[4:5]
	v_fma_f64 v[40:41], v[40:41], s[6:7], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[24:25], v[40:41]
	v_fma_f64 v[2:3], v[2:3], v[32:33], v[24:25]
	v_mul_f64 v[24:25], v[44:45], v[48:49]
	v_mad_u64_u32 v[32:33], null, 0x980, v29, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v28, vcc_lo, v16, v32
	v_add_co_ci_u32_e32 v29, vcc_lo, v17, v33, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v28, vcc_lo, v28, v8
	v_add_co_ci_u32_e32 v29, vcc_lo, v29, v9, vcc_lo
	v_add_co_u32 v40, vcc_lo, v20, v32
	v_add_co_ci_u32_e32 v41, vcc_lo, v21, v33, vcc_lo
	global_load_b64 v[28:29], v[28:29], off
	v_add_co_u32 v40, vcc_lo, v40, v8
	v_add_co_ci_u32_e32 v41, vcc_lo, v41, v9, vcc_lo
	global_load_b64 v[40:41], v[40:41], off
	v_mul_f64 v[24:25], v[48:49], v[24:25]
	v_add_co_u32 v48, vcc_lo, v34, v32
	v_add_co_ci_u32_e32 v49, vcc_lo, v35, v33, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v48, vcc_lo, v48, v8
	v_add_co_ci_u32_e32 v49, vcc_lo, v49, v9, vcc_lo
	v_add_co_u32 v32, vcc_lo, v12, v32
	v_add_co_ci_u32_e32 v33, vcc_lo, v13, v33, vcc_lo
	global_load_b64 v[48:49], v[48:49], off
	v_add_co_u32 v32, vcc_lo, v32, v8
	v_add_co_ci_u32_e32 v33, vcc_lo, v33, v9, vcc_lo
	v_add_co_u32 v16, vcc_lo, v16, v46
	v_add_co_ci_u32_e32 v17, vcc_lo, v17, v47, vcc_lo
	global_load_b64 v[32:33], v[32:33], off
	v_add_co_u32 v16, vcc_lo, v16, v8
	v_add_co_ci_u32_e32 v17, vcc_lo, v17, v9, vcc_lo
	v_add_co_u32 v20, vcc_lo, v20, v46
	v_add_co_ci_u32_e32 v21, vcc_lo, v21, v47, vcc_lo
	global_load_b64 v[16:17], v[16:17], off
	v_add_co_u32 v20, vcc_lo, v20, v8
	v_add_co_ci_u32_e32 v21, vcc_lo, v21, v9, vcc_lo
	v_add_co_u32 v34, vcc_lo, v34, v46
	v_add_co_ci_u32_e32 v35, vcc_lo, v35, v47, vcc_lo
	global_load_b64 v[20:21], v[20:21], off
	v_add_co_u32 v34, vcc_lo, v34, v8
	v_add_co_ci_u32_e32 v35, vcc_lo, v35, v9, vcc_lo
	v_add_co_u32 v12, vcc_lo, v12, v46
	v_add_co_ci_u32_e32 v13, vcc_lo, v13, v47, vcc_lo
	global_load_b64 v[34:35], v[34:35], off
	v_add_co_u32 v12, vcc_lo, v12, v8
	v_add_co_ci_u32_e32 v13, vcc_lo, v13, v9, vcc_lo
	global_load_b64 v[12:13], v[12:13], off
	s_waitcnt vmcnt(6)
	v_add_f64 v[44:45], v[28:29], -v[40:41]
	s_waitcnt vmcnt(4)
	v_add_f64 v[52:53], v[48:49], -v[32:33]
	s_waitcnt vmcnt(0)
	v_add_f64 v[46:47], v[34:35], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[52:53], s[4:5]
	v_mul_f64 v[46:47], v[46:47], s[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[44:45], v[44:45], s[6:7], v[52:53]
	v_add_f64 v[52:53], v[16:17], -v[20:21]
	v_add_f64 v[16:17], v[28:29], -v[16:17]
	v_add_f64 v[20:21], v[40:41], -v[20:21]
	v_fma_f64 v[46:47], v[52:53], s[6:7], v[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[16:17], v[16:17], s[4:5]
	v_mul_f64 v[20:21], v[20:21], s[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[42:43], v[42:43], v[46:47]
	v_fma_f64 v[16:17], v[18:19], s[6:7], v[16:17]
	v_mad_i64_i32 v[18:19], null, 0xb4800, v55, s[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[24:25], v[24:25], v[44:45], v[42:43]
	v_mul_f64 v[24:25], v[24:25], s[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[2:3], s[6:7], v[24:25]
	v_mad_u64_u32 v[24:25], null, 0xb4800, v54, s[10:11]
	v_add_co_u32 v24, vcc_lo, v24, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v25, vcc_lo, v25, v7, vcc_lo
	v_add_co_u32 v24, vcc_lo, v24, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v25, vcc_lo, v25, v9, vcc_lo
	v_add_co_u32 v42, vcc_lo, 0x169000, v10
	v_add_co_ci_u32_e32 v43, vcc_lo, 0, v11, vcc_lo
	v_add_co_u32 v18, vcc_lo, v18, v6
	v_add_co_ci_u32_e32 v19, vcc_lo, v19, v7, vcc_lo
	global_load_b64 v[24:25], v[24:25], off
	v_add_co_u32 v18, vcc_lo, v18, v8
	v_add_co_ci_u32_e32 v19, vcc_lo, v19, v9, vcc_lo
	v_add_co_u32 v26, vcc_lo, 0xffe97000, v10
	v_add_co_ci_u32_e32 v27, vcc_lo, -1, v11, vcc_lo
	global_load_b64 v[18:19], v[18:19], off
	s_clause 0x1
	global_load_b64 v[42:43], v[42:43], off
	global_load_b64 v[26:27], v[26:27], off
	s_waitcnt vmcnt(1)
	v_mul_f64 v[24:25], v[24:25], v[42:43]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[18:19], v[18:19], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[24:25], v[42:43], v[24:25]
	v_mul_f64 v[18:19], v[26:27], v[18:19]
	v_add_f64 v[26:27], v[30:31], -v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[26:27], s[6:7], v[20:21]
	v_mul_f64 v[18:19], v[20:21], v[18:19]
	v_add_f64 v[20:21], v[48:49], -v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[16:17], v[24:25], v[18:19]
	v_mul_f64 v[20:21], v[20:21], s[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[16:17], s[6:7], v[2:3]
	v_mad_u64_u32 v[16:17], null, 0xb4800, v56, s[10:11]
	v_add_co_u32 v16, vcc_lo, v16, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v17, vcc_lo, v17, v7, vcc_lo
	v_add_co_u32 v16, vcc_lo, v16, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v17, vcc_lo, v17, v9, vcc_lo
	v_add_co_u32 v18, vcc_lo, 0xb4000, v10
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v11, vcc_lo
	global_load_b64 v[16:17], v[16:17], off
	global_load_b64 v[18:19], v[18:19], off offset:2048
	s_waitcnt vmcnt(0)
	v_mul_f64 v[16:17], v[16:17], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[16:17], v[18:19], v[16:17]
	v_add_f64 v[18:19], v[36:37], -v[50:51]
	v_fma_f64 v[18:19], v[18:19], s[6:7], v[20:21]
	v_mad_i64_i32 v[20:21], null, 0xb4800, v57, s[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v20, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v21, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v6, v8
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_add_co_u32 v8, vcc_lo, 0xfff4c000, v10
	v_add_co_ci_u32_e32 v9, vcc_lo, -1, v11, vcc_lo
	global_load_b64 v[6:7], v[6:7], off
	v_add_f64 v[10:11], v[32:33], -v[12:13]
	global_load_b64 v[8:9], v[8:9], off offset:-2048
	v_mul_f64 v[10:11], v[10:11], s[4:5]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[6:7], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[8:9], v[6:7]
	v_add_f64 v[8:9], v[14:15], -v[22:23]
	v_fma_f64 v[8:9], v[8:9], s[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[8:9], v[6:7]
	v_fma_f64 v[6:7], v[18:19], v[16:17], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[6:7], s[4:5], v[2:3]
	v_add_f64 v[0:1], v[0:1], v[2:3]
	global_store_b64 v[4:5], v[0:1], off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 376
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 59
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi, .Lfunc_end1-_Z7curvi_2PdS_S_S_S_S_S_S_S_S_S_S_ddi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3724
; NumSgprs: 26
; NumVgprs: 59
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 7
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 59
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         72
        .size:           8
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
