#include <stdio.h>
#include <stdlib.h>

#define KNZ_LEN 20
#define DIM_COUNT 3
#define DIM_SIZE 10000
#define FACT_SIZE 250000

// Datenstruktur

typedef struct _dim {
    long id;
    char knz[KNZ_LEN];
} DimTable;

typedef struct _factIn {
    char knz[DIM_COUNT][KNZ_LEN];
} FactTableIn;

typedef struct _factOut {
    long id[DIM_COUNT];
} FactTableOut;

// Funktion

__device__ int nvstrncmp(const char* s1, const char* s2, size_t n)
{
    while(n--) {
        if(*s1++!=*s2++) {
            return *(unsigned char*)(s1 - 1) - *(unsigned char*)(s2 - 1);
        }
    }
    return 0;
}

__global__ void join(DimTable *dim, int dim_len, 
          FactTableIn *in, FactTableOut *out, int fact_len, 
          int idx) 
{
    int t = threadIdx.x;
    int max = blockDim.x;
    int len = (fact_len / max);
    int start = len * t;
    for(int i = start; i < len; i++) {        
        for(int j = 0; j < dim_len; j++) {
            if(nvstrncmp(dim[j].knz, in[i].knz[idx], KNZ_LEN) == 0) {
                out[i].id[idx] = dim[j].id;
                break;
            }
        }
    }    
}

int main(int argc, char *argv[]) {
    // Dimensionsdaten vorbereiten (jede genau DIM_SIZE Einträge) 
    //                             (das ist zwar unrealistisch hier aber praktisch)
    DimTable **dims = (DimTable**)calloc(sizeof(DimTable*), DIM_COUNT);
    for(int i = 0; i < DIM_COUNT; i++) {
        dims[i] = (DimTable*)calloc(sizeof(DimTable), DIM_SIZE);
        for(int j = 0; j < DIM_SIZE; j++) {
            dims[i][j].id = j;
            sprintf(dims[i][j].knz, "KNZ%d-%d", i, j);
        }
    }

    // Faktendaten vorbereiten
    FactTableIn *factIn = (FactTableIn*)calloc(sizeof(FactTableIn), FACT_SIZE);
    FactTableOut *factOut = (FactTableOut*)calloc(sizeof(FactTableOut), FACT_SIZE);
    for(int i = 0; i < DIM_COUNT; i++) {
        for(int j = 0; j < FACT_SIZE; j++) {
            sprintf(factIn[j].knz[i], "KNZ%d-%d", i % DIM_COUNT, j % DIM_SIZE);
        }
    }

    // Daten kopieren
    DimTable *dev_dim;
    FactTableIn *dev_factIn;
    FactTableOut *dev_factOut;

    cudaMalloc(&dev_dim, sizeof(DimTable) * DIM_SIZE);
    cudaMalloc(&dev_factIn, sizeof(FactTableIn) * FACT_SIZE);
    cudaMalloc(&dev_factOut, sizeof(FactTableOut) * FACT_SIZE);

    cudaMemcpy(dev_factIn, factIn, sizeof(FactTableIn) * FACT_SIZE, cudaMemcpyHostToDevice);

    // Join berechnen
    printf("Fakten und Dimmensionen vorbereitet\n");
    for(int i = 0; i < DIM_COUNT; i++) {
        cudaMemcpy(dev_dim, dims[i], sizeof(DimTable) * DIM_SIZE, cudaMemcpyHostToDevice);
        join<<<1, 200>>>(dev_dim, DIM_SIZE, 
             dev_factIn, dev_factOut, FACT_SIZE, i);
        cudaDeviceSynchronize();        
    }    
    printf("Join abgeschlossen\n");

    // Daten zurückkopieren
    cudaMemcpy(factOut, dev_factOut, sizeof(FactTableOut) * FACT_SIZE, cudaMemcpyDeviceToHost);

    cudaFree(dev_dim);
    cudaFree(dev_factIn);
    cudaFree(dev_factOut);

    // Ergebnis ausgeben
    printf("Top 5:\n");
    for(int i = 0; i < 5; i++) {
        for(int j = 0; j < DIM_COUNT; j++) {
            printf("%s->%ld | ", factIn[i].knz[j], factOut[i].id[j]);
        }
        printf("\n");
    }
    
    free(factIn);
    for(int i = 0; i < DIM_COUNT; i++) {
        free(dims[i]);
    }
    free(dims);
    free(factOut);

    return 0;
}
	.file	"tmpxft_00366fcd_00000000-6_dwhjoin.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9nvstrncmpPKcS0_m
	.type	_Z9nvstrncmpPKcS0_m, @function
_Z9nvstrncmpPKcS0_m:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z9nvstrncmpPKcS0_m, .-_Z9nvstrncmpPKcS0_m
	.globl	_Z49__device_stub__Z4joinP4_dimiP7_factInP8_factOutiiP4_dimiP7_factInP8_factOutii
	.type	_Z49__device_stub__Z4joinP4_dimiP7_factInP8_factOutiiP4_dimiP7_factInP8_factOutii, @function
_Z49__device_stub__Z4joinP4_dimiP7_factInP8_factOutiiP4_dimiP7_factInP8_factOutii:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 36(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 32(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z4joinP4_dimiP7_factInP8_factOutii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L4:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z49__device_stub__Z4joinP4_dimiP7_factInP8_factOutiiP4_dimiP7_factInP8_factOutii, .-_Z49__device_stub__Z4joinP4_dimiP7_factInP8_factOutiiP4_dimiP7_factInP8_factOutii
	.globl	_Z4joinP4_dimiP7_factInP8_factOutii
	.type	_Z4joinP4_dimiP7_factInP8_factOutii, @function
_Z4joinP4_dimiP7_factInP8_factOutii:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z4joinP4_dimiP7_factInP8_factOutiiP4_dimiP7_factInP8_factOutii
	.cfi_endproc
.LFE2054:
	.size	_Z4joinP4_dimiP7_factInP8_factOutii, .-_Z4joinP4_dimiP7_factInP8_factOutii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"KNZ%d-%d"
.LC1:
	.string	"Fakten und Dimmensionen vorbereitet\n"
.LC2:
	.string	"Join abgeschlossen\n"
.LC3:
	.string	"Top 5:\n"
.LC4:
	.string	"%s->%ld | "
.LC5:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$3, %esi
	movl	$8, %edi
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	.LC0(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	calloc@PLT
	movq	%rax, %rbx
.L12:
	movl	$10000, %esi
	movl	$32, %edi
	movl	%r15d, %r13d
	xorl	%r14d, %r14d
	call	calloc@PLT
	movq	%rax, (%rbx,%r15,8)
	leaq	8(%rax), %rbp
.L11:
	imulq	$-32, %r14, %rdx
	movq	%r14, -8(%rbp)
	movl	%r14d, %r9d
	movq	%rbp, %rdi
	movl	%r13d, %r8d
	movq	%r12, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	incq	%r14
	addq	$32, %rbp
	addq	$319992, %rdx
	call	__sprintf_chk@PLT
	cmpq	$10000, %r14
	jne	.L11
	incq	%r15
	cmpq	$3, %r15
	jne	.L12
	movl	$250000, %esi
	movl	$60, %edi
	xorl	%r14d, %r14d
	call	calloc@PLT
	movl	$250000, %esi
	movl	$24, %edi
	movq	%rax, (%rsp)
	call	calloc@PLT
	movq	(%rsp), %r15
	movq	%rax, %rbp
	movq	%r15, %r10
.L13:
	imulq	$-20, %r14, %rax
	movl	%r14d, %r8d
	movq	%r10, %r12
	xorl	%r13d, %r13d
	leaq	15000000(%rax), %r11
.L14:
	movl	%r13d, %eax
	movl	$10000, %ecx
	movq	%r12, %rdi
	movl	$2, %esi
	cltd
	movq	%r10, 24(%rsp)
	incl	%r13d
	addq	$60, %r12
	idivl	%ecx
	movl	%r8d, 20(%rsp)
	movq	%r11, 8(%rsp)
	xorl	%eax, %eax
	leaq	.LC0(%rip), %rcx
	movl	%edx, %r9d
	movq	%r11, %rdx
	call	__sprintf_chk@PLT
	movq	8(%rsp), %r11
	movl	20(%rsp), %r8d
	movq	24(%rsp), %r10
	subq	$60, %r11
	cmpl	$250000, %r13d
	jne	.L14
	incq	%r14
	addq	$20, %r10
	cmpq	$3, %r14
	jne	.L13
	leaq	40(%rsp), %rdi
	movl	$320000, %esi
	xorl	%r13d, %r13d
	movabsq	$4294967496, %r14
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$15000000, %esi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$6000000, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	movl	$15000000, %edx
	call	cudaMemcpy@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L17:
	movq	(%rbx,%r13,8), %rsi
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movl	$320000, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	56(%rsp), %rcx
	movq	48(%rsp), %rdx
	movl	%r13d, %r9d
	movl	$10000, %esi
	movq	40(%rsp), %rdi
	movl	$250000, %r8d
	call	_Z49__device_stub__Z4joinP4_dimiP7_factInP8_factOutiiP4_dimiP7_factInP8_factOutii
.L16:
	call	cudaDeviceSynchronize@PLT
	incq	%r13
	cmpq	$3, %r13
	jne	.L17
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	leaq	120(%rbp), %r13
	movq	%rbp, %r12
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$6000000, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L18:
	xorl	%r14d, %r14d
.L19:
	imulq	$20, %r14, %rdx
	movq	(%r12,%r14,8), %rcx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC4(%rip), %rsi
	incq	%r14
	addq	%r15, %rdx
	call	__printf_chk@PLT
	cmpq	$3, %r14
	jne	.L19
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$24, %r12
	addq	$60, %r15
	leaq	.LC5(%rip), %rsi
	call	__printf_chk@PLT
	cmpq	%r13, %r12
	jne	.L18
	movq	(%rsp), %rdi
	call	free@PLT
	movq	(%rbx), %rdi
	call	free@PLT
	movq	8(%rbx), %rdi
	call	free@PLT
	movq	16(%rbx), %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z4joinP4_dimiP7_factInP8_factOutii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z4joinP4_dimiP7_factInP8_factOutii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>

#define KNZ_LEN 20
#define DIM_COUNT 3
#define DIM_SIZE 10000
#define FACT_SIZE 250000

// Datenstruktur

typedef struct _dim {
    long id;
    char knz[KNZ_LEN];
} DimTable;

typedef struct _factIn {
    char knz[DIM_COUNT][KNZ_LEN];
} FactTableIn;

typedef struct _factOut {
    long id[DIM_COUNT];
} FactTableOut;

// Funktion

__device__ int nvstrncmp(const char* s1, const char* s2, size_t n)
{
    while(n--) {
        if(*s1++!=*s2++) {
            return *(unsigned char*)(s1 - 1) - *(unsigned char*)(s2 - 1);
        }
    }
    return 0;
}

__global__ void join(DimTable *dim, int dim_len, 
          FactTableIn *in, FactTableOut *out, int fact_len, 
          int idx) 
{
    int t = threadIdx.x;
    int max = blockDim.x;
    int len = (fact_len / max);
    int start = len * t;
    for(int i = start; i < len; i++) {        
        for(int j = 0; j < dim_len; j++) {
            if(nvstrncmp(dim[j].knz, in[i].knz[idx], KNZ_LEN) == 0) {
                out[i].id[idx] = dim[j].id;
                break;
            }
        }
    }    
}

int main(int argc, char *argv[]) {
    // Dimensionsdaten vorbereiten (jede genau DIM_SIZE Einträge) 
    //                             (das ist zwar unrealistisch hier aber praktisch)
    DimTable **dims = (DimTable**)calloc(sizeof(DimTable*), DIM_COUNT);
    for(int i = 0; i < DIM_COUNT; i++) {
        dims[i] = (DimTable*)calloc(sizeof(DimTable), DIM_SIZE);
        for(int j = 0; j < DIM_SIZE; j++) {
            dims[i][j].id = j;
            sprintf(dims[i][j].knz, "KNZ%d-%d", i, j);
        }
    }

    // Faktendaten vorbereiten
    FactTableIn *factIn = (FactTableIn*)calloc(sizeof(FactTableIn), FACT_SIZE);
    FactTableOut *factOut = (FactTableOut*)calloc(sizeof(FactTableOut), FACT_SIZE);
    for(int i = 0; i < DIM_COUNT; i++) {
        for(int j = 0; j < FACT_SIZE; j++) {
            sprintf(factIn[j].knz[i], "KNZ%d-%d", i % DIM_COUNT, j % DIM_SIZE);
        }
    }

    // Daten kopieren
    DimTable *dev_dim;
    FactTableIn *dev_factIn;
    FactTableOut *dev_factOut;

    hipMalloc(&dev_dim, sizeof(DimTable) * DIM_SIZE);
    hipMalloc(&dev_factIn, sizeof(FactTableIn) * FACT_SIZE);
    hipMalloc(&dev_factOut, sizeof(FactTableOut) * FACT_SIZE);

    hipMemcpy(dev_factIn, factIn, sizeof(FactTableIn) * FACT_SIZE, hipMemcpyHostToDevice);

    // Join berechnen
    printf("Fakten und Dimmensionen vorbereitet\n");
    for(int i = 0; i < DIM_COUNT; i++) {
        hipMemcpy(dev_dim, dims[i], sizeof(DimTable) * DIM_SIZE, hipMemcpyHostToDevice);
        join<<<1, 200>>>(dev_dim, DIM_SIZE, 
             dev_factIn, dev_factOut, FACT_SIZE, i);
        hipDeviceSynchronize();        
    }    
    printf("Join abgeschlossen\n");

    // Daten zurückkopieren
    hipMemcpy(factOut, dev_factOut, sizeof(FactTableOut) * FACT_SIZE, hipMemcpyDeviceToHost);

    hipFree(dev_dim);
    hipFree(dev_factIn);
    hipFree(dev_factOut);

    // Ergebnis ausgeben
    printf("Top 5:\n");
    for(int i = 0; i < 5; i++) {
        for(int j = 0; j < DIM_COUNT; j++) {
            printf("%s->%ld | ", factIn[i].knz[j], factOut[i].id[j]);
        }
        printf("\n");
    }
    
    free(factIn);
    for(int i = 0; i < DIM_COUNT; i++) {
        free(dims[i]);
    }
    free(dims);
    free(factOut);

    return 0;
}
	.text
	.file	"dwhjoin.hip"
	.globl	_Z19__device_stub__joinP4_dimiP7_factInP8_factOutii # -- Begin function _Z19__device_stub__joinP4_dimiP7_factInP8_factOutii
	.type	_Z19__device_stub__joinP4_dimiP7_factInP8_factOutii,@function
_Z19__device_stub__joinP4_dimiP7_factInP8_factOutii: # @_Z19__device_stub__joinP4_dimiP7_factInP8_factOutii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4joinP4_dimiP7_factInP8_factOutii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z19__device_stub__joinP4_dimiP7_factInP8_factOutii, .Lfunc_end0-_Z19__device_stub__joinP4_dimiP7_factInP8_factOutii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$8, %edi
	movl	$3, %esi
	callq	calloc
	movq	%rax, %rbx
	xorl	%r14d, %r14d
.LBB1_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	movl	$32, %edi
	movl	$10000, %esi                    # imm = 0x2710
	callq	calloc
	movq	%rax, %r15
	movq	%rax, (%rbx,%r14,8)
	addq	$8, %r15
	xorl	%r12d, %r12d
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%r12, -8(%r15)
	movl	$.L.str, %esi
	movq	%r15, %rdi
	movl	%r14d, %edx
	movl	%r12d, %ecx
	xorl	%eax, %eax
	callq	sprintf
	incq	%r12
	addq	$32, %r15
	cmpq	$10000, %r12                    # imm = 0x2710
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%r14
	cmpq	$3, %r14
	jne	.LBB1_1
# %bb.4:
	movl	$60, %edi
	movl	$250000, %esi                   # imm = 0x3D090
	callq	calloc
	movq	%rax, %rbp
	movl	$24, %edi
	movl	$250000, %esi                   # imm = 0x3D090
	callq	calloc
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	$3518437209, %r13d              # imm = 0xD1B71759
	movq	%rbp, (%rsp)                    # 8-byte Spill
	xorl	%r12d, %r12d
.LBB1_5:                                # %.preheader62
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_6 Depth 2
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB1_6:                                #   Parent Loop BB1_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%r14d, %eax
	imulq	%r13, %rax
	shrq	$45, %rax
	imull	$10000, %eax, %eax              # imm = 0x2710
	movl	%r14d, %ecx
	subl	%eax, %ecx
	leaq	(%r15,%rbp), %rdi
	movl	$.L.str, %esi
	movl	%r12d, %edx
	xorl	%eax, %eax
	callq	sprintf
	addq	$60, %r15
	incl	%r14d
	cmpq	$15000000, %r15                 # imm = 0xE4E1C0
	jne	.LBB1_6
# %bb.7:                                #   in Loop: Header=BB1_5 Depth=1
	incq	%r12
	addq	$20, %rbp
	cmpq	$3, %r12
	jne	.LBB1_5
# %bb.8:
	movabsq	$4294967297, %r12               # imm = 0x100000001
	leaq	16(%rsp), %rdi
	movl	$320000, %esi                   # imm = 0x4E200
	callq	hipMalloc
	leaq	32(%rsp), %r13
	movl	$15000000, %esi                 # imm = 0xE4E1C0
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$6000000, %esi                  # imm = 0x5B8D80
	callq	hipMalloc
	movq	(%r13), %rdi
	movl	$15000000, %edx                 # imm = 0xE4E1C0
	movq	(%rsp), %rsi                    # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%r13d, %r13d
	leaq	199(%r12), %rbp
.LBB1_9:                                # =>This Inner Loop Header: Depth=1
	movq	16(%rsp), %rdi
	movq	(%rbx,%r13,8), %rsi
	movl	$320000, %edx                   # imm = 0x4E200
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_11
# %bb.10:                               #   in Loop: Header=BB1_9 Depth=1
	movq	16(%rsp), %rdi
	movq	32(%rsp), %rdx
	movq	8(%rsp), %rcx
	movl	$10000, %esi                    # imm = 0x2710
	movl	$250000, %r8d                   # imm = 0x3D090
	movl	%r13d, %r9d
	callq	_Z19__device_stub__joinP4_dimiP7_factInP8_factOutii
.LBB1_11:                               #   in Loop: Header=BB1_9 Depth=1
	callq	hipDeviceSynchronize
	incq	%r13
	cmpq	$3, %r13
	jne	.LBB1_9
# %bb.12:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movq	8(%rsp), %rsi
	movl	$6000000, %edx                  # imm = 0x5B8D80
	movq	24(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	(%rsp), %r13                    # 8-byte Reload
	xorl	%r14d, %r14d
.LBB1_13:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_14 Depth 2
	movq	%r13, %r12
	xorl	%r15d, %r15d
.LBB1_14:                               #   Parent Loop BB1_13 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	(%rbp,%r15,8), %rdx
	movl	$.L.str.4, %edi
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	addq	$20, %r12
	cmpq	$3, %r15
	jne	.LBB1_14
# %bb.15:                               #   in Loop: Header=BB1_13 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$24, %rbp
	addq	$60, %r13
	cmpq	$5, %r14
	jne	.LBB1_13
# %bb.16:
	movq	(%rsp), %rdi                    # 8-byte Reload
	callq	free
	xorl	%r14d, %r14d
.LBB1_17:                               # =>This Inner Loop Header: Depth=1
	movq	(%rbx,%r14,8), %rdi
	callq	free
	incq	%r14
	cmpq	$3, %r14
	jne	.LBB1_17
# %bb.18:
	movq	%rbx, %rdi
	callq	free
	movq	24(%rsp), %rdi                  # 8-byte Reload
	callq	free
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4joinP4_dimiP7_factInP8_factOutii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z4joinP4_dimiP7_factInP8_factOutii,@object # @_Z4joinP4_dimiP7_factInP8_factOutii
	.section	.rodata,"a",@progbits
	.globl	_Z4joinP4_dimiP7_factInP8_factOutii
	.p2align	3, 0x0
_Z4joinP4_dimiP7_factInP8_factOutii:
	.quad	_Z19__device_stub__joinP4_dimiP7_factInP8_factOutii
	.size	_Z4joinP4_dimiP7_factInP8_factOutii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"KNZ%d-%d"
	.size	.L.str, 9

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%s->%ld | "
	.size	.L.str.4, 11

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z4joinP4_dimiP7_factInP8_factOutii"
	.size	.L__unnamed_1, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Fakten und Dimmensionen vorbereitet"
	.size	.Lstr, 36

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Join abgeschlossen"
	.size	.Lstr.1, 19

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Top 5:"
	.size	.Lstr.2, 7

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__joinP4_dimiP7_factInP8_factOutii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4joinP4_dimiP7_factInP8_factOutii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4joinP4_dimiP7_factInP8_factOutii ; -- Begin function _Z4joinP4_dimiP7_factInP8_factOutii
	.globl	_Z4joinP4_dimiP7_factInP8_factOutii
	.p2align	8
	.type	_Z4joinP4_dimiP7_factInP8_factOutii,@function
_Z4joinP4_dimiP7_factInP8_factOutii:    ; @_Z4joinP4_dimiP7_factInP8_factOutii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[10:11], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_ashr_i32 s5, s10, 31
	v_cvt_f32_u32_e32 v1, s2
	s_sub_i32 s4, 0, s2
	s_add_i32 s6, s10, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_xor_b32 s6, s6, s5
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s4, s4, s3
	s_mul_hi_u32 s4, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s3, s4
	s_mul_hi_u32 s3, s6, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s4, s3, s2
	s_sub_i32 s4, s6, s4
	s_add_i32 s6, s3, 1
	s_sub_i32 s7, s4, s2
	s_cmp_ge_u32 s4, s2
	s_cselect_b32 s3, s6, s3
	s_cselect_b32 s4, s7, s4
	s_add_i32 s6, s3, 1
	s_cmp_ge_u32 s4, s2
	s_cselect_b32 s2, s6, s3
	s_mov_b32 s3, 0
	s_xor_b32 s2, s2, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_sub_i32 s12, s2, s5
	s_mov_b32 s2, exec_lo
	v_mul_lo_u32 v4, s12, v0
	v_cmpx_gt_i32_e64 s12, v4
	s_cbranch_execz .LBB0_18
; %bb.1:                                ; %.preheader.lr.ph
	s_clause 0x2
	s_load_b32 s13, s[0:1], 0x8
	s_load_b128 s[16:19], s[0:1], 0x10
	s_load_b64 s[4:5], s[0:1], 0x0
	s_mov_b32 s0, s11
	s_mul_i32 s2, s11, 20
	v_mov_b32_e32 v5, 0
	s_mov_b32 s15, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s13, 0
	s_cselect_b32 s14, -1, 0
	s_ashr_i32 s1, s11, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 3
	s_add_u32 s6, s18, s0
	s_addc_u32 s7, s19, s1
	s_add_u32 s8, s4, 8
	s_addc_u32 s9, s5, 0
	s_mul_hi_i32 s1, s11, 20
	s_add_u32 s0, s16, s2
	s_addc_u32 s1, s17, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_i64_i32 v[0:1], null, v4, 60, s[0:1]
.LBB0_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_5 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB0_17
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s16, 0
	s_mov_b64 s[0:1], s[8:9]
	s_mov_b32 s2, s16
                                        ; implicit-def: $sgpr17
                                        ; implicit-def: $sgpr18
.LBB0_4:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_5 Depth 3
	s_mov_b64 s[10:11], 0
	s_mov_b32 s19, 0
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr21
.LBB0_5:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_or_b32 s21, s21, exec_lo
	s_cmp_eq_u64 s[10:11], 20
	s_cbranch_scc1 .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=3
	v_add_co_u32 v6, vcc_lo, v0, s10
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v1, vcc_lo
	s_add_u32 s22, s0, s10
	s_addc_u32 s23, s1, s11
	global_load_u8 v2, v5, s[22:23]
	global_load_u8 v3, v[6:7], off
	s_add_u32 s10, s10, 1
	s_addc_u32 s11, s11, 0
	s_and_not1_b32 s21, s21, exec_lo
	s_mov_b32 s22, 0
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e32 vcc_lo, v2, v3
	s_and_b32 s23, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s21, s21, s23
                                        ; implicit-def: $sgpr23
	s_branch .LBB0_8
.LBB0_7:                                ;   in Loop: Header=BB0_5 Depth=3
	s_mov_b32 s23, 0
	s_mov_b32 s22, -1
                                        ; implicit-def: $sgpr10_sgpr11
                                        ; implicit-def: $vgpr2
                                        ; implicit-def: $vgpr3
.LBB0_8:                                ; %Flow76
                                        ;   in Loop: Header=BB0_5 Depth=3
	s_and_b32 s24, exec_lo, s21
	v_mov_b32_e32 v6, s23
	s_or_b32 s19, s24, s19
	s_and_not1_b32 s20, s20, exec_lo
	s_and_b32 s22, s22, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s20, s20, s22
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB0_5
; %bb.9:                                ; %loop.exit.guard73
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s19
	s_xor_b32 s10, s20, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s11, s10
	s_xor_b32 s10, exec_lo, s11
; %bb.10:                               ;   in Loop: Header=BB0_4 Depth=2
	v_and_b32_e32 v2, 0xff, v2
	v_and_b32_e32 v3, 0xff, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v6, v2, v3
; %bb.11:                               ; %_Z9nvstrncmpPKcS0_m.exit
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s10
	s_mov_b32 s11, -1
	s_or_b32 s18, s18, exec_lo
	s_mov_b32 s19, exec_lo
                                        ; implicit-def: $sgpr10
	v_cmpx_ne_u32_e32 0, v6
; %bb.12:                               ;   in Loop: Header=BB0_4 Depth=2
	s_add_i32 s10, s2, 1
	s_add_u32 s0, s0, 32
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s10, s13
	s_cselect_b32 s11, -1, 0
	s_and_not1_b32 s18, s18, exec_lo
	s_or_not1_b32 s11, s11, exec_lo
; %bb.13:                               ; %Flow77
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s19
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_and_b32 s11, exec_lo, s11
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_or_b32 s16, s11, s16
	s_and_not1_b32 s2, s17, exec_lo
	s_and_b32 s11, s18, exec_lo
	s_or_b32 s17, s2, s11
	s_mov_b32 s2, s10
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB0_4
; %bb.14:                               ; %loop.exit.guard
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	s_and_saveexec_b32 s0, s17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_16
; %bb.15:                               ;   in Loop: Header=BB0_2 Depth=1
	v_lshlrev_b64 v[2:3], 5, v[2:3]
	v_mad_i64_i32 v[6:7], null, v4, 24, s[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[6:7], v[2:3], off
.LBB0_16:                               ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_17:                               ; %.loopexit
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v0, s0, v0, 60
	v_add_co_ci_u32_e64 v1, s0, 0, v1, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s12, v4
	s_or_b32 s15, vcc_lo, s15
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB0_2
.LBB0_18:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4joinP4_dimiP7_factInP8_factOutii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 25
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4joinP4_dimiP7_factInP8_factOutii, .Lfunc_end0-_Z4joinP4_dimiP7_factInP8_factOutii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 732
; NumSgprs: 27
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 27
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4joinP4_dimiP7_factInP8_factOutii
    .private_segment_fixed_size: 0
    .sgpr_count:     27
    .sgpr_spill_count: 0
    .symbol:         _Z4joinP4_dimiP7_factInP8_factOutii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
