#include<stdio.h>
#include<stdlib.h>
__global__ void matadd(int *d_a,int *d_b,int *d_c, int n){

int idx=threadIdx.x;
if(idx<n)
d_c[idx]=d_a[idx]+d_b[idx];

}


int main(){

int n;
scanf("%d",&n);
cudaEvent_t start,stop;
float escap_time;


cudaEventCreate(&start);
cudaEventCreate(&stop);

cudaEventRecord(start,0);

cudaStream_t stream;
cudaStreamCreate(&stream);




int *h_a,*h_b,*h_c;

cudaHostAlloc((void**)&h_a,20*n*sizeof(int),cudaHostAllocDefault);
cudaHostAlloc((void**)&h_b,20*n*sizeof(int),cudaHostAllocDefault);
cudaHostAlloc((void**)&h_c,20*n*sizeof(int),cudaHostAllocDefault);

for(int i=0; i<20*n; i++){
	h_a[i]=i;
	h_b[i]=i+1;
}

int *d_a,*d_b,*d_c;

cudaMalloc((void**)&d_a,n*sizeof(int));
cudaMalloc((void**)&d_b,n*sizeof(int));
cudaMalloc((void**)&d_c,n*sizeof(int));


for(int i=0; i<20*n; i+=n){
	cudaMemcpyAsync(d_a,h_a+i,n*sizeof(int),cudaMemcpyHostToDevice,stream);
	cudaMemcpyAsync(d_b,h_b+i,n*sizeof(int),cudaMemcpyHostToDevice,stream);

matadd<<<1,n,0,stream>>>(d_a,d_b,d_c,n);
	
	cudaMemcpyAsync(h_c+i,d_c,n*sizeof(int),cudaMemcpyDeviceToHost,stream);
}
cudaStreamSynchronize(stream);
cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&escap_time,start,stop);
printf("Time:%3.1f\n",escap_time);

for(int i=0; i<20*n; i++)
 printf("%d ",h_c[i]);
cudaFreeHost(h_a);
cudaFreeHost(h_b);
cudaFreeHost(h_c);
cudaEventDestroy(start);
cudaEventDestroy(stop);
cudaFree(h_a);
cudaFree(h_b);
cudaFree(h_c);
cudaStreamDestroy(stream);
return 0;

}

	.file	"tmpxft_0021465c_00000000-6_stream_bhanu.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z30__device_stub__Z6mataddPiS_S_iPiS_S_i
	.type	_Z30__device_stub__Z6mataddPiS_S_iPiS_S_i, @function
_Z30__device_stub__Z6mataddPiS_S_iPiS_S_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6mataddPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z30__device_stub__Z6mataddPiS_S_iPiS_S_i, .-_Z30__device_stub__Z6mataddPiS_S_iPiS_S_i
	.globl	_Z6mataddPiS_S_i
	.type	_Z6mataddPiS_S_i, @function
_Z6mataddPiS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6mataddPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2053:
	.size	_Z6mataddPiS_S_i, .-_Z6mataddPiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d"
.LC1:
	.string	"Time:%3.1f\n"
.LC2:
	.string	"%d "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	leaq	.LC0(%rip), %rdi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$112, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	4(%rsp), %rsi
	call	__isoc23_scanf@PLT
	leaq	8(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	leaq	24(%rsp), %rdi
	call	cudaStreamCreate@PLT
	imull	$20, 4(%rsp), %esi
	leaq	32(%rsp), %rdi
	xorl	%edx, %edx
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaHostAlloc@PLT
	imull	$20, 4(%rsp), %esi
	leaq	40(%rsp), %rdi
	xorl	%edx, %edx
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaHostAlloc@PLT
	imull	$20, 4(%rsp), %esi
	leaq	48(%rsp), %rdi
	xorl	%edx, %edx
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaHostAlloc@PLT
	movq	32(%rsp), %rcx
	movq	40(%rsp), %rdi
	xorl	%eax, %eax
.L9:
	movslq	4(%rsp), %rsi
	imull	$20, %esi, %edx
	cmpl	%eax, %edx
	jle	.L18
	leal	1(%rax), %edx
	movl	%eax, (%rcx,%rax,4)
	movl	%edx, (%rdi,%rax,4)
	incq	%rax
	jmp	.L9
.L18:
	salq	$2, %rsi
	leaq	56(%rsp), %rdi
	xorl	%ebp, %ebp
	movabsq	$4294967297, %r12
	call	cudaMalloc@PLT
	movslq	4(%rsp), %rsi
	leaq	64(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	4(%rsp), %rsi
	leaq	72(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
.L11:
	movslq	4(%rsp), %rdx
	movq	24(%rsp), %r8
	imull	$20, %edx, %eax
	cmpl	%ebp, %eax
	jle	.L19
	movq	32(%rsp), %rsi
	movslq	%ebp, %rbx
	movq	56(%rsp), %rdi
	salq	$2, %rdx
	salq	$2, %rbx
	movl	$1, %ecx
	addq	%rbx, %rsi
	call	cudaMemcpyAsync@PLT
	movslq	4(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	$1, %ecx
	movq	24(%rsp), %r8
	movq	64(%rsp), %rdi
	salq	$2, %rdx
	addq	%rbx, %rsi
	call	cudaMemcpyAsync@PLT
	movl	4(%rsp), %eax
	xorl	%r8d, %r8d
	movq	%r12, %rdi
	movq	%r12, 96(%rsp)
	movq	24(%rsp), %r9
	movl	$1, %esi
	movl	%eax, 92(%rsp)
	movl	100(%rsp), %ecx
	movq	92(%rsp), %rdx
	movq	%r12, 80(%rsp)
	movl	$1, 88(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movl	4(%rsp), %ecx
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z30__device_stub__Z6mataddPiS_S_iPiS_S_i
.L12:
	movslq	4(%rsp), %rdx
	addq	48(%rsp), %rbx
	movl	$2, %ecx
	movq	24(%rsp), %r8
	movq	72(%rsp), %rsi
	movq	%rbx, %rdi
	salq	$2, %rdx
	call	cudaMemcpyAsync@PLT
	addl	4(%rsp), %ebp
	jmp	.L11
.L19:
	movq	%r8, %rdi
	xorl	%ebx, %ebx
	leaq	.LC2(%rip), %rbp
	call	cudaStreamSynchronize@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	16(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	leaq	92(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	92(%rsp), %xmm0
	call	__printf_chk@PLT
.L14:
	imull	$20, 4(%rsp), %eax
	cmpl	%ebx, %eax
	jle	.L20
	movq	48(%rsp), %rax
	movq	%rbp, %rsi
	movl	$2, %edi
	movl	(%rax,%rbx,4), %edx
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L14
.L20:
	movq	32(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	40(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	48(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	8(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	16(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$112, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z6mataddPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6mataddPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<stdio.h>
#include<stdlib.h>
__global__ void matadd(int *d_a,int *d_b,int *d_c, int n){

int idx=threadIdx.x;
if(idx<n)
d_c[idx]=d_a[idx]+d_b[idx];

}


int main(){

int n;
scanf("%d",&n);
hipEvent_t start,stop;
float escap_time;


hipEventCreate(&start);
hipEventCreate(&stop);

hipEventRecord(start,0);

hipStream_t stream;
hipStreamCreate(&stream);




int *h_a,*h_b,*h_c;

hipHostAlloc((void**)&h_a,20*n*sizeof(int),hipHostMallocDefault);
hipHostAlloc((void**)&h_b,20*n*sizeof(int),hipHostMallocDefault);
hipHostAlloc((void**)&h_c,20*n*sizeof(int),hipHostMallocDefault);

for(int i=0; i<20*n; i++){
	h_a[i]=i;
	h_b[i]=i+1;
}

int *d_a,*d_b,*d_c;

hipMalloc((void**)&d_a,n*sizeof(int));
hipMalloc((void**)&d_b,n*sizeof(int));
hipMalloc((void**)&d_c,n*sizeof(int));


for(int i=0; i<20*n; i+=n){
	hipMemcpyAsync(d_a,h_a+i,n*sizeof(int),hipMemcpyHostToDevice,stream);
	hipMemcpyAsync(d_b,h_b+i,n*sizeof(int),hipMemcpyHostToDevice,stream);

matadd<<<1,n,0,stream>>>(d_a,d_b,d_c,n);
	
	hipMemcpyAsync(h_c+i,d_c,n*sizeof(int),hipMemcpyDeviceToHost,stream);
}
hipStreamSynchronize(stream);
hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipEventElapsedTime(&escap_time,start,stop);
printf("Time:%3.1f\n",escap_time);

for(int i=0; i<20*n; i++)
 printf("%d ",h_c[i]);
hipHostFree(h_a);
hipHostFree(h_b);
hipHostFree(h_c);
hipEventDestroy(start);
hipEventDestroy(stop);
hipFree(h_a);
hipFree(h_b);
hipFree(h_c);
hipStreamDestroy(stream);
return 0;

}

	.text
	.file	"stream_bhanu.hip"
	.globl	_Z21__device_stub__mataddPiS_S_i # -- Begin function _Z21__device_stub__mataddPiS_S_i
	.type	_Z21__device_stub__mataddPiS_S_i,@function
_Z21__device_stub__mataddPiS_S_i:       # @_Z21__device_stub__mataddPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6mataddPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__mataddPiS_S_i, .Lfunc_end0-_Z21__device_stub__mataddPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rbx
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	leaq	72(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	8(%rsp), %rdi
	callq	hipStreamCreate
	movslq	(%rbx), %rax
	shlq	$4, %rax
	leaq	(%rax,%rax,4), %rsi
	leaq	32(%rsp), %rdi
	xorl	%edx, %edx
	callq	hipHostAlloc
	movslq	(%rbx), %rax
	shlq	$4, %rax
	leaq	(%rax,%rax,4), %rsi
	leaq	24(%rsp), %rdi
	xorl	%edx, %edx
	callq	hipHostAlloc
	movslq	(%rbx), %rax
	shlq	$4, %rax
	leaq	(%rax,%rax,4), %rsi
	leaq	16(%rsp), %rdi
	xorl	%edx, %edx
	callq	hipHostAlloc
	movl	(%rbx), %edx
	testl	%edx, %edx
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph
	movq	32(%rsp), %rax
	movq	24(%rsp), %rcx
	xorl	%esi, %esi
.LBB1_2:                                # =>This Inner Loop Header: Depth=1
	movl	%esi, (%rax,%rsi,4)
	leaq	1(%rsi), %rdi
	movl	%edi, (%rcx,%rsi,4)
	movslq	4(%rsp), %rdx
	leaq	(,%rdx,4), %rsi
	leaq	(%rsi,%rsi,4), %r8
	movq	%rdi, %rsi
	cmpq	%r8, %rdi
	jl	.LBB1_2
.LBB1_3:                                # %._crit_edge
	movslq	%edx, %rsi
	shlq	$2, %rsi
	leaq	64(%rsp), %rdi
	callq	hipMalloc
	movslq	4(%rsp), %rsi
	shlq	$2, %rsi
	leaq	56(%rsp), %rdi
	callq	hipMalloc
	movslq	4(%rsp), %rsi
	shlq	$2, %rsi
	leaq	48(%rsp), %rdi
	callq	hipMalloc
	movl	4(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB1_8
# %bb.4:                                # %.lr.ph24.preheader
	xorl	%r15d, %r15d
	movabsq	$4294967296, %r12               # imm = 0x100000000
	leaq	1(%r12), %rbx
.LBB1_5:                                # %.lr.ph24
                                        # =>This Inner Loop Header: Depth=1
	movq	64(%rsp), %rdi
	movslq	%r15d, %r14
	shlq	$2, %r14
	movq	32(%rsp), %rsi
	addq	%r14, %rsi
	movslq	%eax, %rdx
	shlq	$2, %rdx
	movq	8(%rsp), %r8
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	56(%rsp), %rdi
	movq	24(%rsp), %rsi
	addq	%r14, %rsi
	movslq	4(%rsp), %rdx
	shlq	$2, %rdx
	movq	8(%rsp), %r8
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movl	4(%rsp), %edx
	movq	8(%rsp), %r9
	orq	%r12, %rdx
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.6:                                #   in Loop: Header=BB1_5 Depth=1
	movq	64(%rsp), %rdi
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdx
	movl	4(%rsp), %ecx
	callq	_Z21__device_stub__mataddPiS_S_i
.LBB1_7:                                #   in Loop: Header=BB1_5 Depth=1
	addq	16(%rsp), %r14
	movq	48(%rsp), %rsi
	movslq	4(%rsp), %rdx
	shlq	$2, %rdx
	movq	8(%rsp), %r8
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movl	4(%rsp), %eax
	addl	%eax, %r15d
	leal	(,%rax,4), %ecx
	leal	(%rcx,%rcx,4), %ecx
	cmpl	%ecx, %r15d
	jl	.LBB1_5
.LBB1_8:                                # %._crit_edge25
	movq	8(%rsp), %rdi
	callq	hipStreamSynchronize
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	40(%rsp), %rdi
	callq	hipEventSynchronize
	movq	72(%rsp), %rsi
	movq	40(%rsp), %rdx
	leaq	84(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	cmpl	$0, 4(%rsp)
	jle	.LBB1_11
# %bb.9:                                # %.lr.ph28.preheader
	xorl	%ebx, %ebx
.LBB1_10:                               # %.lr.ph28
                                        # =>This Inner Loop Header: Depth=1
	movq	16(%rsp), %rax
	movl	(%rax,%rbx,4), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	movslq	4(%rsp), %rax
	shlq	$2, %rax
	leaq	(%rax,%rax,4), %rax
	cmpq	%rax, %rbx
	jl	.LBB1_10
.LBB1_11:                               # %._crit_edge29
	movq	32(%rsp), %rdi
	callq	hipHostFree
	movq	24(%rsp), %rdi
	callq	hipHostFree
	movq	16(%rsp), %rdi
	callq	hipHostFree
	movq	72(%rsp), %rdi
	callq	hipEventDestroy
	movq	40(%rsp), %rdi
	callq	hipEventDestroy
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipStreamDestroy
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6mataddPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6mataddPiS_S_i,@object        # @_Z6mataddPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z6mataddPiS_S_i
	.p2align	3, 0x0
_Z6mataddPiS_S_i:
	.quad	_Z21__device_stub__mataddPiS_S_i
	.size	_Z6mataddPiS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d"
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Time:%3.1f\n"
	.size	.L.str.1, 12

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%d "
	.size	.L.str.2, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6mataddPiS_S_i"
	.size	.L__unnamed_1, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__mataddPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6mataddPiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6mataddPiS_S_i        ; -- Begin function _Z6mataddPiS_S_i
	.globl	_Z6mataddPiS_S_i
	.p2align	8
	.type	_Z6mataddPiS_S_i,@function
_Z6mataddPiS_S_i:                       ; @_Z6mataddPiS_S_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 2, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v0, s[4:5]
	global_load_b32 v2, v0, s[6:7]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	global_store_b32 v0, v1, s[0:1]
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6mataddPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 8
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6mataddPiS_S_i, .Lfunc_end0-_Z6mataddPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 96
; NumSgprs: 10
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 10
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6mataddPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     10
    .sgpr_spill_count: 0
    .symbol:         _Z6mataddPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
