#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <math.h> // for pow()

#define NUM_THREADS 8
#define NUM_BLOCKS 1


__host__ void generate_rand_data(unsigned int * data, unsigned int num_elements)
{
	for(unsigned int i=0; i < num_elements; i++)
	{
		data[i] = rand() % 4; //PLACE YOUR CODE HERE
	}
}

__device__ void copy_data_to_shared(unsigned int * const data,
			unsigned int * const shared_tmp,
			const unsigned int tid)
{
	// Copy data into shared memory
	shared_tmp[tid] = data[tid];
	__syncthreads();
}

__device__ void simple_squaring_operation(unsigned int * const data,
				const unsigned int tid)
{
	//square the mem value and overwrite
	data[tid] = data[tid] * data[tid]; //PLACE YOUR CODE HERE
}

__global__ void gpu_register_array_operation(unsigned int * const data, const unsigned int num_elements)
{
	const unsigned int tid = (blockIdx.x * blockDim.x) + threadIdx.x;

	//perform some simple operation
	simple_squaring_operation(data, tid);
}

__global__ void gpu_shared_array_operation(unsigned int * const data, const unsigned int num_elements)
{
	const unsigned int tid = (blockIdx.x * blockDim.x) + threadIdx.x;

	//allocate shared memory
	__shared__ unsigned int shared_tmp[NUM_THREADS];

	//make a copy of the global device data into the shared device memory
	copy_data_to_shared(data, shared_tmp, tid);

	//perform some simple operation
	simple_squaring_operation(shared_tmp, tid);

	//push updated shared mem back to the initial global data mem
	data[tid] = shared_tmp[tid];
}

//tier 2 method for printing a specific cuda device properties
//already called by the tier 1 method
void print_all_device_properties(int device_id){
	cudaDeviceProp prop;
	cudaGetDeviceProperties( &prop, device_id);
	// printf("============Start Device %x============\n", device_id);
	// printf("Name:                          %s\n",  prop.name);
	// printf("Total global memory:           %lu\n",  prop.totalGlobalMem);
	// printf("Total shared memory per block: %lu\n",  prop.sharedMemPerBlock);
	// printf("Total registers per block:     %lu\n",  (unsigned long)prop.regsPerBlock);
	// printf("Warp size:                     %lu\n",  (unsigned long)prop.warpSize);
	// printf("Maximum memory pitch:          %lu\n",  prop.memPitch);
	// printf("Maximum threads per block:     %lu\n",  (unsigned long)prop.maxThreadsPerBlock);
	// for (int i = 0; i < 3; ++i)
	// printf("Maximum dimension %d of block: %lu\n", i, (unsigned long)prop.maxThreadsDim[i]);
	// for (int i = 0; i < 3; ++i)
	// printf("Maximum dimension %d of grid:  %lu\n", i, (unsigned long)prop.maxGridSize[i]);
	// printf("Total constant memory:         %lu\n",  prop.totalConstMem);
	// printf("Major revision number:         %lu\n",  (unsigned long)prop.major);
	// printf("Minor revision number:         %lu\n",  (unsigned long)prop.minor);
	// printf("Clock rate:                    %lu\n",  (unsigned long)prop.clockRate);
	// printf("Texture alignment:             %lu\n",  prop.textureAlignment);
	// printf("Concurrent copy and execution: %s\n",  (prop.deviceOverlap ? "Yes" : "No"));
	// printf("Number of multiprocessors:     %lu\n",  (unsigned long)prop.multiProcessorCount);
	// printf("Kernel execution timeout:      %s\n",  (prop.kernelExecTimeoutEnabled ? "Yes" : "No"));
	// printf("Integrated:                    %s\n",  (prop.integrated ? "Yes" : "No"));
	// printf("Mapable Host Memory:           %s\n",  (prop.canMapHostMemory ? "Yes" : "No"));
	// printf("Compute Mode:                  %d\n",  prop.computeMode);
	// printf("Concurrent Kernels:            %d\n",  prop.concurrentKernels);
	// printf("ECC Enabled:                   %s\n",  (prop.ECCEnabled ? "Yes" : "No"));
	// printf("pci Bus ID:                    %lu\n",  (unsigned long)prop.pciBusID);
	// printf("pci Device ID:                 %lu\n",  (unsigned long)prop.pciDeviceID);
	// printf("Using a tcc Driver:            %s\n",  (prop.tccDriver ? "Yes" : "No"));
	// printf("============End Device %x============\n", device_id);

	printf("============Start Device %x============\n", device_id);
	printf("Name:                          %s\n",  prop.name);
	printf("Total global memory:           %lu\n",  prop.totalGlobalMem);
	printf("Total shared memory per block: %lu\n",  prop.sharedMemPerBlock);
	printf("Total registers per block:     %d\n",  prop.regsPerBlock);
	printf("Warp size:                     %d\n",  prop.warpSize);
	printf("Maximum memory pitch:          %lu\n",  prop.memPitch);
	printf("Maximum threads per block:     %d\n",  prop.maxThreadsPerBlock);
	for (int i = 0; i < 3; ++i)
	printf("Maximum dimension %d of block: %d\n", i, prop.maxThreadsDim[i]);
	for (int i = 0; i < 3; ++i)
	printf("Maximum dimension %d of grid:  %d\n", i, prop.maxGridSize[i]);
	printf("Total constant memory:         %lu\n",  prop.totalConstMem);
	printf("Major revision number:         %d\n",  prop.major);
	printf("Minor revision number:         %d\n",  prop.minor);
	printf("Clock rate:                    %d\n",  prop.clockRate);
	printf("Texture alignment:             %lu\n",  prop.textureAlignment);
	printf("Concurrent copy and execution: %s\n",  (prop.deviceOverlap ? "Yes" : "No"));
	printf("Number of multiprocessors:     %d\n",  prop.multiProcessorCount);
	printf("Kernel execution timeout:      %s\n",  (prop.kernelExecTimeoutEnabled ? "Yes" : "No"));
	printf("Integrated:                    %s\n",  (prop.integrated ? "Yes" : "No"));
	printf("Mapable Host Memory:           %s\n",  (prop.canMapHostMemory ? "Yes" : "No"));
	printf("Compute Mode:                  %d\n",  prop.computeMode);
	printf("Concurrent Kernels:            %d\n",  prop.concurrentKernels);
	printf("ECC Enabled:                   %s\n",  (prop.ECCEnabled ? "Yes" : "No"));
	printf("pci Bus ID:                    %d\n",  prop.pciBusID);
	printf("pci Device ID:                 %d\n",  prop.pciDeviceID);
	printf("Using a tcc Driver:            %s\n",  (prop.tccDriver ? "Yes" : "No"));
	printf("============End Device %x============\n", device_id);
}

//tier 1 method for printing all cuda devices and their properties
void print_all_CUDA_devices_and_properties() {
  int device_id;
  cudaGetDeviceCount( &device_id);
  printf("Print of all CUDA devices and device properties\n");
	for (int i = 0; i < device_id; i++){
		//states that cudaDeviceProp returns a 25 data types in a struct
		print_all_device_properties(device_id);
	}
}

__host__ float execute_register_memory_operations(void)
{
	const unsigned int num_elements = NUM_THREADS;
	const unsigned int num_bytes = NUM_THREADS * sizeof(unsigned int);
	unsigned int * d_data;		//device data
	unsigned int hi_data[num_elements];		//initial host data
	unsigned int hf_data[num_elements];		//final host data

	/* Set timing Metrics */
	cudaEvent_t kernel_start, kernel_stop;
	float delta = 0.0F;
	cudaEventCreate(&kernel_start,0);
	cudaEventCreate(&kernel_stop,0);

	//set CUDA stream
  	cudaStream_t stream;
  	cudaStreamCreate(&stream);

	//start timing metric
	cudaEventRecord(kernel_start, 0);

	//device memory alloc
	cudaMalloc(&d_data, num_bytes);

	//populate the initial host array with random data
	generate_rand_data(hi_data, num_elements);

	//copy from host memory to device memory
	cudaMemcpy(d_data, hi_data, num_bytes, cudaMemcpyHostToDevice);

	//Call GPU kernel <<<BLOCK TOTAL, THREADS TOTAL>>>
	gpu_register_array_operation<<<NUM_BLOCKS, NUM_THREADS>>>(d_data, num_elements);

 	cudaStreamSynchronize(stream);	// Wait for the GPU launched work to complete
	cudaGetLastError();

	//copy from device to host memory
	cudaMemcpy(hf_data, d_data, num_bytes, cudaMemcpyDeviceToHost);

	//end timing metric
	cudaEventRecord(kernel_stop, 0);
	cudaEventSynchronize(kernel_stop);
	cudaEventElapsedTime(&delta, kernel_start, kernel_stop);
	cudaEventDestroy(kernel_start);
	cudaEventDestroy(kernel_stop);

	//console print the host data after the GPU kernal
	for (int i = 0; i < num_elements; i++){
		printf("Input value: %x, device output: %x\n", hi_data[i], hf_data[i]);
	}

	//free device and host memory allocations
	//PLACE YOUR CODE HERE

	return delta;
}


__host__ float execute_shared_memory_operations()
{
	const unsigned int num_elements = NUM_THREADS;
	const unsigned int num_bytes = NUM_THREADS * sizeof(unsigned int);
	unsigned int * d_data;		//device data
	unsigned int hi_data[num_elements];		//initial host data
	unsigned int hf_data[num_elements];		//final host data

	/* Set timing Metrics */
	cudaEvent_t kernel_start, kernel_stop;
	float delta = 0.0F;
	cudaEventCreate(&kernel_start,0);
	cudaEventCreate(&kernel_stop,0);

	//set CUDA stream
  cudaStream_t stream; //PLACE YOUR CODE HERE
	cudaStreamCreate(&stream);

	//start timing metric
	cudaEventRecord(kernel_start, 0);

	//device memory alloc
	cudaMalloc(&d_data, num_bytes);

	//populate the initial host array with random data
	generate_rand_data(hi_data, num_elements);

	//copy from host memory to device memory
	cudaMemcpy(d_data, hi_data, num_bytes, cudaMemcpyHostToDevice);

	//Call GPU kernels <<<BLOCK TOTAL, THREADS TOTAL>>>
	gpu_shared_array_operation<<<NUM_BLOCKS, NUM_THREADS>>>(d_data, num_elements);

	//sync the cuda stream
 	cudaStreamSynchronize(stream);	// Wait for the GPU launched work to complete
	cudaGetLastError();				//error handling

	//copy from device to host memory
	cudaMemcpy(hf_data, d_data, num_bytes, cudaMemcpyDeviceToHost);

	//end timing metric
	cudaEventRecord(kernel_stop, 0);
	cudaEventSynchronize(kernel_stop);
	cudaEventElapsedTime(&delta, kernel_start, kernel_stop);
	cudaEventDestroy(kernel_start);
	cudaEventDestroy(kernel_stop);

	//console print the host data after the GPU kernal
	for (int i = 0; i < num_elements; i++){
		printf("Input value: %x, device output: %x\n", hi_data[i], hf_data[i]);
	}

	//free device and host memory allocations
	cudaFree((void* ) d_data);		//free devide data
	cudaFreeHost(hi_data);	 			//free up the host memory
	cudaFreeHost(hf_data);	 			//free up the host memory
	cudaDeviceReset();

	return delta;
}

/**
 * Host function that prepares data array and passes it to the CUDA kernel.
 */
int main(void) {
	//print all cuda devices and device properties for kicks
  print_all_CUDA_devices_and_properties();

  //test harness for timing some kernels using streams and events
	float delta_shared = execute_shared_memory_operations(); //PLACE YOUR CODE HERE TO USE SHARED MEMORY FOR OPERATIONS
	float delta_register = execute_register_memory_operations();//PLACE YOUR CODE HERE TO USE REGISTER MEMORY FOR OPERATIONS

	//print out the results of the time executions returned by the prev methods
	printf("========================\n");
	printf("Summary\n");
	printf("Total Threads: %d\n", NUM_THREADS);
	printf("Total Blocks: %d\n", NUM_BLOCKS);
	printf("========================\n");
	printf("Time to copy global to shared mem, perform simple operation w/ shared memory, copy memory back to global\n");
	printf("duration: %fms\n",delta_shared);
	printf("========================\n");
	printf("Time to copy global to register mem, perform simple operation w/ register memory, copy memory back to global\n");
	printf("duration: %fms\n",delta_register);
	return 0;
}

	.file	"tmpxft_0039f287_00000000-6_module7_stretch_problem.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2037:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2037:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z18generate_rand_dataPjj
	.type	_Z18generate_rand_dataPjj, @function
_Z18generate_rand_dataPjj:
.LFB2027:
	.cfi_startproc
	endbr64
	movl	%esi, %esi
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	leaq	(%rdi,%rsi,4), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	$4, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
.L3:
	cmpq	%r12, %rbx
	je	.L7
	call	rand@PLT
	addq	$4, %rbx
	cltd
	idivl	%ebp
	movl	%edx, -4(%rbx)
	jmp	.L3
.L7:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z18generate_rand_dataPjj, .-_Z18generate_rand_dataPjj
	.globl	_Z19copy_data_to_sharedPjS_j
	.type	_Z19copy_data_to_sharedPjS_j, @function
_Z19copy_data_to_sharedPjS_j:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z19copy_data_to_sharedPjS_j, .-_Z19copy_data_to_sharedPjS_j
	.globl	_Z25simple_squaring_operationPjj
	.type	_Z25simple_squaring_operationPjj, @function
_Z25simple_squaring_operationPjj:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z25simple_squaring_operationPjj, .-_Z25simple_squaring_operationPjj
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Yes"
.LC1:
	.string	"No"
.LC2:
	.string	"============Start Device %x============\n"
.LC3:
	.string	"Name:                          %s\n"
.LC4:
	.string	"Total global memory:           %lu\n"
.LC5:
	.string	"Total shared memory per block: %lu\n"
.LC6:
	.string	"Total registers per block:     %d\n"
.LC7:
	.string	"Warp size:                     %d\n"
.LC8:
	.string	"Maximum memory pitch:          %lu\n"
.LC9:
	.string	"Maximum threads per block:     %d\n"
.LC10:
	.string	"Maximum dimension %d of block: %d\n"
.LC11:
	.string	"Maximum dimension %d of grid:  %d\n"
.LC12:
	.string	"Total constant memory:         %lu\n"
.LC13:
	.string	"Major revision number:         %d\n"
.LC14:
	.string	"Minor revision number:         %d\n"
.LC15:
	.string	"Clock rate:                    %d\n"
.LC16:
	.string	"Texture alignment:             %lu\n"
.LC17:
	.string	"Concurrent copy and execution: %s\n"
.LC18:
	.string	"Number of multiprocessors:     %d\n"
.LC19:
	.string	"Kernel execution timeout:      %s\n"
.LC20:
	.string	"Integrated:                    %s\n"
.LC21:
	.string	"Mapable Host Memory:           %s\n"
.LC22:
	.string	"Compute Mode:                  %d\n"
.LC23:
	.string	"Concurrent Kernels:            %d\n"
.LC24:
	.string	"ECC Enabled:                   %s\n"
.LC25:
	.string	"pci Bus ID:                    %d\n"
.LC26:
	.string	"pci Device ID:                 %d\n"
.LC27:
	.string	"Using a tcc Driver:            %s\n"
.LC28:
	.string	"============End Device %x============\n"
	.text
	.globl	_Z27print_all_device_propertiesi
	.type	_Z27print_all_device_propertiesi, @function
_Z27print_all_device_propertiesi:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%edi, %esi
	leaq	.LC10(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%edi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	subq	$1048, %rsp
	.cfi_def_cfa_offset 1088
	movq	%fs:40, %rax
	movq	%rax, 1032(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rbp
	movq	%rbp, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movl	%r12d, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC2(%rip), %rsi
	call	__printf_chk@PLT
	movq	%rbp, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rsi
	call	__printf_chk@PLT
	movq	288(%rsp), %rdx
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	296(%rsp), %rdx
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	304(%rsp), %edx
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	308(%rsp), %edx
	leaq	.LC7(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	312(%rsp), %rdx
	leaq	.LC8(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	320(%rsp), %edx
	leaq	.LC9(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L13:
	movl	324(%rbp,%rbx,4), %ecx
	movl	%ebx, %edx
	movq	%r13, %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$3, %rbx
	jne	.L13
	xorl	%ebx, %ebx
	leaq	.LC11(%rip), %r13
.L14:
	movl	336(%rbp,%rbx,4), %ecx
	movl	%ebx, %edx
	movq	%r13, %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$3, %rbx
	jne	.L14
	movq	352(%rsp), %rdx
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC0(%rip), %rbp
	leaq	.LC1(%rip), %rbx
	call	__printf_chk@PLT
	movl	360(%rsp), %edx
	leaq	.LC13(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	364(%rsp), %edx
	leaq	.LC14(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	348(%rsp), %edx
	leaq	.LC15(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	368(%rsp), %rdx
	leaq	.LC16(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	$0, 384(%rsp)
	movq	%rbp, %rdx
	leaq	.LC17(%rip), %rsi
	cmove	%rbx, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	388(%rsp), %edx
	leaq	.LC18(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	$0, 392(%rsp)
	movq	%rbp, %rdx
	leaq	.LC19(%rip), %rsi
	cmove	%rbx, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	cmpl	$0, 396(%rsp)
	movq	%rbp, %rdx
	leaq	.LC20(%rip), %rsi
	cmove	%rbx, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	cmpl	$0, 400(%rsp)
	movq	%rbp, %rdx
	leaq	.LC21(%rip), %rsi
	cmove	%rbx, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	404(%rsp), %edx
	leaq	.LC22(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	576(%rsp), %edx
	leaq	.LC23(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	$0, 580(%rsp)
	movq	%rbp, %rdx
	leaq	.LC24(%rip), %rsi
	cmove	%rbx, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	584(%rsp), %edx
	leaq	.LC25(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	588(%rsp), %edx
	leaq	.LC26(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	$0, 596(%rsp)
	movq	%rbp, %rdx
	leaq	.LC27(%rip), %rsi
	cmove	%rbx, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
	movl	%r12d, %edx
	movl	$2, %edi
	leaq	.LC28(%rip), %rsi
	call	__printf_chk@PLT
	movq	1032(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$1048, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z27print_all_device_propertiesi, .-_Z27print_all_device_propertiesi
	.section	.rodata.str1.1
.LC29:
	.string	"Print of all CUDA devices and device properties\n"
	.text
	.globl	_Z37print_all_CUDA_devices_and_propertiesv
	.type	_Z37print_all_CUDA_devices_and_propertiesv, @function
_Z37print_all_CUDA_devices_and_propertiesv:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	xorl	%ebx, %ebx
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	4(%rsp), %rdi
	call	cudaGetDeviceCount@PLT
	leaq	.LC29(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L32:
	movl	4(%rsp), %edi
	cmpl	%ebx, %edi
	jle	.L36
	call	_Z27print_all_device_propertiesi
	incl	%ebx
	jmp	.L32
.L36:
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z37print_all_CUDA_devices_and_propertiesv, .-_Z37print_all_CUDA_devices_and_propertiesv
	.globl	_Z49__device_stub__Z28gpu_register_array_operationPjjPjj
	.type	_Z49__device_stub__Z28gpu_register_array_operationPjjPjj, @function
_Z49__device_stub__Z28gpu_register_array_operationPjjPjj:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z28gpu_register_array_operationPjj(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L37:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z49__device_stub__Z28gpu_register_array_operationPjjPjj, .-_Z49__device_stub__Z28gpu_register_array_operationPjjPjj
	.globl	_Z28gpu_register_array_operationPjj
	.type	_Z28gpu_register_array_operationPjj, @function
_Z28gpu_register_array_operationPjj:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z28gpu_register_array_operationPjjPjj
	.cfi_endproc
.LFE2060:
	.size	_Z28gpu_register_array_operationPjj, .-_Z28gpu_register_array_operationPjj
	.section	.rodata.str1.1
.LC31:
	.string	"Input value: %x, device output: %x\n"
	.text
	.globl	_Z34execute_register_memory_operationsv
	.type	_Z34execute_register_memory_operationsv, @function
_Z34execute_register_memory_operationsv:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xorl	%esi, %esi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$152, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rdi
	movl	$0x00000000, 12(%rsp)
	leaq	72(%rsp), %rbp
	call	cudaEventCreateWithFlags@PLT
	xorl	%esi, %esi
	leaq	32(%rsp), %rdi
	call	cudaEventCreateWithFlags@PLT
	leaq	40(%rsp), %rdi
	call	cudaStreamCreate@PLT
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	leaq	16(%rsp), %rdi
	movl	$32, %esi
	call	cudaMalloc@PLT
	movl	$8, %esi
	movq	%rbp, %rdi
	call	_Z18generate_rand_dataPjj
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$32, %edx
	call	cudaMemcpy@PLT
	movl	$536870913, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$3, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	movq	16(%rsp), %rdi
	movl	$8, %esi
	call	_Z49__device_stub__Z28gpu_register_array_operationPjjPjj
.L43:
	movq	40(%rsp), %rdi
	leaq	104(%rsp), %r12
	xorl	%ebx, %ebx
	leaq	.LC31(%rip), %r13
	call	cudaStreamSynchronize@PLT
	call	cudaGetLastError@PLT
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	$32, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	32(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	leaq	12(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	24(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	32(%rsp), %rdi
	call	cudaEventDestroy@PLT
.L44:
	movl	(%r12,%rbx), %ecx
	movl	0(%rbp,%rbx), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$4, %rbx
	call	__printf_chk@PLT
	cmpq	$32, %rbx
	jne	.L44
	movss	12(%rsp), %xmm0
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L45
	call	__stack_chk_fail@PLT
.L45:
	addq	$152, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z34execute_register_memory_operationsv, .-_Z34execute_register_memory_operationsv
	.globl	_Z47__device_stub__Z26gpu_shared_array_operationPjjPjj
	.type	_Z47__device_stub__Z26gpu_shared_array_operationPjjPjj, @function
_Z47__device_stub__Z26gpu_shared_array_operationPjjPjj:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z26gpu_shared_array_operationPjj(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L48:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z47__device_stub__Z26gpu_shared_array_operationPjjPjj, .-_Z47__device_stub__Z26gpu_shared_array_operationPjjPjj
	.globl	_Z26gpu_shared_array_operationPjj
	.type	_Z26gpu_shared_array_operationPjj, @function
_Z26gpu_shared_array_operationPjj:
.LFB2062:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z26gpu_shared_array_operationPjjPjj
	.cfi_endproc
.LFE2062:
	.size	_Z26gpu_shared_array_operationPjj, .-_Z26gpu_shared_array_operationPjj
	.globl	_Z32execute_shared_memory_operationsv
	.type	_Z32execute_shared_memory_operationsv, @function
_Z32execute_shared_memory_operationsv:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xorl	%esi, %esi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$152, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rdi
	movl	$0x00000000, 12(%rsp)
	leaq	72(%rsp), %rbp
	call	cudaEventCreateWithFlags@PLT
	xorl	%esi, %esi
	leaq	32(%rsp), %rdi
	call	cudaEventCreateWithFlags@PLT
	leaq	40(%rsp), %rdi
	call	cudaStreamCreate@PLT
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	leaq	16(%rsp), %rdi
	movl	$32, %esi
	call	cudaMalloc@PLT
	movl	$8, %esi
	movq	%rbp, %rdi
	call	_Z18generate_rand_dataPjj
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$32, %edx
	call	cudaMemcpy@PLT
	movl	$536870913, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$3, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	movq	16(%rsp), %rdi
	movl	$8, %esi
	call	_Z47__device_stub__Z26gpu_shared_array_operationPjjPjj
.L54:
	movq	40(%rsp), %rdi
	leaq	104(%rsp), %r12
	xorl	%ebx, %ebx
	leaq	.LC31(%rip), %r13
	call	cudaStreamSynchronize@PLT
	call	cudaGetLastError@PLT
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	$32, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	32(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	leaq	12(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	24(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	32(%rsp), %rdi
	call	cudaEventDestroy@PLT
.L55:
	movl	(%r12,%rbx), %ecx
	movl	0(%rbp,%rbx), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$4, %rbx
	call	__printf_chk@PLT
	cmpq	$32, %rbx
	jne	.L55
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	cudaFreeHost@PLT
	movq	%r12, %rdi
	call	cudaFreeHost@PLT
	call	cudaDeviceReset@PLT
	movss	12(%rsp), %xmm0
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L56
	call	__stack_chk_fail@PLT
.L56:
	addq	$152, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z32execute_shared_memory_operationsv, .-_Z32execute_shared_memory_operationsv
	.section	.rodata.str1.1
.LC32:
	.string	"========================\n"
.LC33:
	.string	"Summary\n"
.LC34:
	.string	"Total Threads: %d\n"
.LC35:
	.string	"Total Blocks: %d\n"
.LC36:
	.string	"Time to copy global to shared mem, perform simple operation w/ shared memory, copy memory back to global\n"
.LC37:
	.string	"duration: %fms\n"
.LC38:
	.string	"Time to copy global to register mem, perform simple operation w/ register memory, copy memory back to global\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	leaq	.LC37(%rip), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	leaq	.LC32(%rip), %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	call	_Z37print_all_CUDA_devices_and_propertiesv
	call	_Z32execute_shared_memory_operationsv
	movss	%xmm0, 12(%rsp)
	call	_Z34execute_register_memory_operationsv
	movq	%rbx, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movss	%xmm0, 8(%rsp)
	call	__printf_chk@PLT
	leaq	.LC33(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$8, %edx
	leaq	.LC34(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$1, %edx
	leaq	.LC35(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	%rbx, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC36(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movss	12(%rsp), %xmm2
	movq	%rbp, %rsi
	movb	$1, %al
	movl	$2, %edi
	cvtss2sd	%xmm2, %xmm0
	call	__printf_chk@PLT
	movq	%rbx, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC38(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movss	8(%rsp), %xmm1
	movq	%rbp, %rsi
	movb	$1, %al
	movl	$2, %edi
	cvtss2sd	%xmm1, %xmm0
	call	__printf_chk@PLT
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	main, .-main
	.section	.rodata.str1.1
.LC39:
	.string	"_Z26gpu_shared_array_operationPjj"
.LC40:
	.string	"_Z28gpu_register_array_operationPjj"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2064:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC39(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z26gpu_shared_array_operationPjj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC40(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z28gpu_register_array_operationPjj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2064:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <math.h> // for pow()

#define NUM_THREADS 8
#define NUM_BLOCKS 1


__host__ void generate_rand_data(unsigned int * data, unsigned int num_elements)
{
	for(unsigned int i=0; i < num_elements; i++)
	{
		data[i] = rand() % 4; //PLACE YOUR CODE HERE
	}
}

__device__ void copy_data_to_shared(unsigned int * const data,
			unsigned int * const shared_tmp,
			const unsigned int tid)
{
	// Copy data into shared memory
	shared_tmp[tid] = data[tid];
	__syncthreads();
}

__device__ void simple_squaring_operation(unsigned int * const data,
				const unsigned int tid)
{
	//square the mem value and overwrite
	data[tid] = data[tid] * data[tid]; //PLACE YOUR CODE HERE
}

__global__ void gpu_register_array_operation(unsigned int * const data, const unsigned int num_elements)
{
	const unsigned int tid = (blockIdx.x * blockDim.x) + threadIdx.x;

	//perform some simple operation
	simple_squaring_operation(data, tid);
}

__global__ void gpu_shared_array_operation(unsigned int * const data, const unsigned int num_elements)
{
	const unsigned int tid = (blockIdx.x * blockDim.x) + threadIdx.x;

	//allocate shared memory
	__shared__ unsigned int shared_tmp[NUM_THREADS];

	//make a copy of the global device data into the shared device memory
	copy_data_to_shared(data, shared_tmp, tid);

	//perform some simple operation
	simple_squaring_operation(shared_tmp, tid);

	//push updated shared mem back to the initial global data mem
	data[tid] = shared_tmp[tid];
}

//tier 2 method for printing a specific cuda device properties
//already called by the tier 1 method
void print_all_device_properties(int device_id){
	hipDeviceProp_t prop;
	hipGetDeviceProperties( &prop, device_id);
	// printf("============Start Device %x============\n", device_id);
	// printf("Name:                          %s\n",  prop.name);
	// printf("Total global memory:           %lu\n",  prop.totalGlobalMem);
	// printf("Total shared memory per block: %lu\n",  prop.sharedMemPerBlock);
	// printf("Total registers per block:     %lu\n",  (unsigned long)prop.regsPerBlock);
	// printf("Warp size:                     %lu\n",  (unsigned long)prop.warpSize);
	// printf("Maximum memory pitch:          %lu\n",  prop.memPitch);
	// printf("Maximum threads per block:     %lu\n",  (unsigned long)prop.maxThreadsPerBlock);
	// for (int i = 0; i < 3; ++i)
	// printf("Maximum dimension %d of block: %lu\n", i, (unsigned long)prop.maxThreadsDim[i]);
	// for (int i = 0; i < 3; ++i)
	// printf("Maximum dimension %d of grid:  %lu\n", i, (unsigned long)prop.maxGridSize[i]);
	// printf("Total constant memory:         %lu\n",  prop.totalConstMem);
	// printf("Major revision number:         %lu\n",  (unsigned long)prop.major);
	// printf("Minor revision number:         %lu\n",  (unsigned long)prop.minor);
	// printf("Clock rate:                    %lu\n",  (unsigned long)prop.clockRate);
	// printf("Texture alignment:             %lu\n",  prop.textureAlignment);
	// printf("Concurrent copy and execution: %s\n",  (prop.deviceOverlap ? "Yes" : "No"));
	// printf("Number of multiprocessors:     %lu\n",  (unsigned long)prop.multiProcessorCount);
	// printf("Kernel execution timeout:      %s\n",  (prop.kernelExecTimeoutEnabled ? "Yes" : "No"));
	// printf("Integrated:                    %s\n",  (prop.integrated ? "Yes" : "No"));
	// printf("Mapable Host Memory:           %s\n",  (prop.canMapHostMemory ? "Yes" : "No"));
	// printf("Compute Mode:                  %d\n",  prop.computeMode);
	// printf("Concurrent Kernels:            %d\n",  prop.concurrentKernels);
	// printf("ECC Enabled:                   %s\n",  (prop.ECCEnabled ? "Yes" : "No"));
	// printf("pci Bus ID:                    %lu\n",  (unsigned long)prop.pciBusID);
	// printf("pci Device ID:                 %lu\n",  (unsigned long)prop.pciDeviceID);
	// printf("Using a tcc Driver:            %s\n",  (prop.tccDriver ? "Yes" : "No"));
	// printf("============End Device %x============\n", device_id);

	printf("============Start Device %x============\n", device_id);
	printf("Name:                          %s\n",  prop.name);
	printf("Total global memory:           %lu\n",  prop.totalGlobalMem);
	printf("Total shared memory per block: %lu\n",  prop.sharedMemPerBlock);
	printf("Total registers per block:     %d\n",  prop.regsPerBlock);
	printf("Warp size:                     %d\n",  prop.warpSize);
	printf("Maximum memory pitch:          %lu\n",  prop.memPitch);
	printf("Maximum threads per block:     %d\n",  prop.maxThreadsPerBlock);
	for (int i = 0; i < 3; ++i)
	printf("Maximum dimension %d of block: %d\n", i, prop.maxThreadsDim[i]);
	for (int i = 0; i < 3; ++i)
	printf("Maximum dimension %d of grid:  %d\n", i, prop.maxGridSize[i]);
	printf("Total constant memory:         %lu\n",  prop.totalConstMem);
	printf("Major revision number:         %d\n",  prop.major);
	printf("Minor revision number:         %d\n",  prop.minor);
	printf("Clock rate:                    %d\n",  prop.clockRate);
	printf("Texture alignment:             %lu\n",  prop.textureAlignment);
	printf("Concurrent copy and execution: %s\n",  (prop.deviceOverlap ? "Yes" : "No"));
	printf("Number of multiprocessors:     %d\n",  prop.multiProcessorCount);
	printf("Kernel execution timeout:      %s\n",  (prop.kernelExecTimeoutEnabled ? "Yes" : "No"));
	printf("Integrated:                    %s\n",  (prop.integrated ? "Yes" : "No"));
	printf("Mapable Host Memory:           %s\n",  (prop.canMapHostMemory ? "Yes" : "No"));
	printf("Compute Mode:                  %d\n",  prop.computeMode);
	printf("Concurrent Kernels:            %d\n",  prop.concurrentKernels);
	printf("ECC Enabled:                   %s\n",  (prop.ECCEnabled ? "Yes" : "No"));
	printf("pci Bus ID:                    %d\n",  prop.pciBusID);
	printf("pci Device ID:                 %d\n",  prop.pciDeviceID);
	printf("Using a tcc Driver:            %s\n",  (prop.tccDriver ? "Yes" : "No"));
	printf("============End Device %x============\n", device_id);
}

//tier 1 method for printing all cuda devices and their properties
void print_all_CUDA_devices_and_properties() {
  int device_id;
  hipGetDeviceCount( &device_id);
  printf("Print of all CUDA devices and device properties\n");
	for (int i = 0; i < device_id; i++){
		//states that cudaDeviceProp returns a 25 data types in a struct
		print_all_device_properties(device_id);
	}
}

__host__ float execute_register_memory_operations(void)
{
	const unsigned int num_elements = NUM_THREADS;
	const unsigned int num_bytes = NUM_THREADS * sizeof(unsigned int);
	unsigned int * d_data;		//device data
	unsigned int hi_data[num_elements];		//initial host data
	unsigned int hf_data[num_elements];		//final host data

	/* Set timing Metrics */
	hipEvent_t kernel_start, kernel_stop;
	float delta = 0.0F;
	hipEventCreateWithFlags(&kernel_start,0);
	hipEventCreateWithFlags(&kernel_stop,0);

	//set CUDA stream
  	hipStream_t stream;
  	hipStreamCreate(&stream);

	//start timing metric
	hipEventRecord(kernel_start, 0);

	//device memory alloc
	hipMalloc(&d_data, num_bytes);

	//populate the initial host array with random data
	generate_rand_data(hi_data, num_elements);

	//copy from host memory to device memory
	hipMemcpy(d_data, hi_data, num_bytes, hipMemcpyHostToDevice);

	//Call GPU kernel <<<BLOCK TOTAL, THREADS TOTAL>>>
	gpu_register_array_operation<<<NUM_BLOCKS, NUM_THREADS>>>(d_data, num_elements);

 	hipStreamSynchronize(stream);	// Wait for the GPU launched work to complete
	hipGetLastError();

	//copy from device to host memory
	hipMemcpy(hf_data, d_data, num_bytes, hipMemcpyDeviceToHost);

	//end timing metric
	hipEventRecord(kernel_stop, 0);
	hipEventSynchronize(kernel_stop);
	hipEventElapsedTime(&delta, kernel_start, kernel_stop);
	hipEventDestroy(kernel_start);
	hipEventDestroy(kernel_stop);

	//console print the host data after the GPU kernal
	for (int i = 0; i < num_elements; i++){
		printf("Input value: %x, device output: %x\n", hi_data[i], hf_data[i]);
	}

	//free device and host memory allocations
	//PLACE YOUR CODE HERE

	return delta;
}


__host__ float execute_shared_memory_operations()
{
	const unsigned int num_elements = NUM_THREADS;
	const unsigned int num_bytes = NUM_THREADS * sizeof(unsigned int);
	unsigned int * d_data;		//device data
	unsigned int hi_data[num_elements];		//initial host data
	unsigned int hf_data[num_elements];		//final host data

	/* Set timing Metrics */
	hipEvent_t kernel_start, kernel_stop;
	float delta = 0.0F;
	hipEventCreateWithFlags(&kernel_start,0);
	hipEventCreateWithFlags(&kernel_stop,0);

	//set CUDA stream
  hipStream_t stream; //PLACE YOUR CODE HERE
	hipStreamCreate(&stream);

	//start timing metric
	hipEventRecord(kernel_start, 0);

	//device memory alloc
	hipMalloc(&d_data, num_bytes);

	//populate the initial host array with random data
	generate_rand_data(hi_data, num_elements);

	//copy from host memory to device memory
	hipMemcpy(d_data, hi_data, num_bytes, hipMemcpyHostToDevice);

	//Call GPU kernels <<<BLOCK TOTAL, THREADS TOTAL>>>
	gpu_shared_array_operation<<<NUM_BLOCKS, NUM_THREADS>>>(d_data, num_elements);

	//sync the cuda stream
 	hipStreamSynchronize(stream);	// Wait for the GPU launched work to complete
	hipGetLastError();				//error handling

	//copy from device to host memory
	hipMemcpy(hf_data, d_data, num_bytes, hipMemcpyDeviceToHost);

	//end timing metric
	hipEventRecord(kernel_stop, 0);
	hipEventSynchronize(kernel_stop);
	hipEventElapsedTime(&delta, kernel_start, kernel_stop);
	hipEventDestroy(kernel_start);
	hipEventDestroy(kernel_stop);

	//console print the host data after the GPU kernal
	for (int i = 0; i < num_elements; i++){
		printf("Input value: %x, device output: %x\n", hi_data[i], hf_data[i]);
	}

	//free device and host memory allocations
	hipFree((void* ) d_data);		//free devide data
	hipHostFree(hi_data);	 			//free up the host memory
	hipHostFree(hf_data);	 			//free up the host memory
	hipDeviceReset();

	return delta;
}

/**
 * Host function that prepares data array and passes it to the CUDA kernel.
 */
int main(void) {
	//print all cuda devices and device properties for kicks
  print_all_CUDA_devices_and_properties();

  //test harness for timing some kernels using streams and events
	float delta_shared = execute_shared_memory_operations(); //PLACE YOUR CODE HERE TO USE SHARED MEMORY FOR OPERATIONS
	float delta_register = execute_register_memory_operations();//PLACE YOUR CODE HERE TO USE REGISTER MEMORY FOR OPERATIONS

	//print out the results of the time executions returned by the prev methods
	printf("========================\n");
	printf("Summary\n");
	printf("Total Threads: %d\n", NUM_THREADS);
	printf("Total Blocks: %d\n", NUM_BLOCKS);
	printf("========================\n");
	printf("Time to copy global to shared mem, perform simple operation w/ shared memory, copy memory back to global\n");
	printf("duration: %fms\n",delta_shared);
	printf("========================\n");
	printf("Time to copy global to register mem, perform simple operation w/ register memory, copy memory back to global\n");
	printf("duration: %fms\n",delta_register);
	return 0;
}

	.text
	.file	"module7_stretch_problem.hip"
	.globl	_Z18generate_rand_dataPjj       # -- Begin function _Z18generate_rand_dataPjj
	.type	_Z18generate_rand_dataPjj,@function
_Z18generate_rand_dataPjj:              # @_Z18generate_rand_dataPjj
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	je	.LBB0_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	3(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-4, %ecx
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB0_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB0_4:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z18generate_rand_dataPjj, .Lfunc_end0-_Z18generate_rand_dataPjj
	.cfi_endproc
                                        # -- End function
	.globl	_Z43__device_stub__gpu_register_array_operationPjj # -- Begin function _Z43__device_stub__gpu_register_array_operationPjj
	.type	_Z43__device_stub__gpu_register_array_operationPjj,@function
_Z43__device_stub__gpu_register_array_operationPjj: # @_Z43__device_stub__gpu_register_array_operationPjj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z28gpu_register_array_operationPjj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z43__device_stub__gpu_register_array_operationPjj, .Lfunc_end1-_Z43__device_stub__gpu_register_array_operationPjj
	.cfi_endproc
                                        # -- End function
	.globl	_Z41__device_stub__gpu_shared_array_operationPjj # -- Begin function _Z41__device_stub__gpu_shared_array_operationPjj
	.type	_Z41__device_stub__gpu_shared_array_operationPjj,@function
_Z41__device_stub__gpu_shared_array_operationPjj: # @_Z41__device_stub__gpu_shared_array_operationPjj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z26gpu_shared_array_operationPjj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z41__device_stub__gpu_shared_array_operationPjj, .Lfunc_end2-_Z41__device_stub__gpu_shared_array_operationPjj
	.cfi_endproc
                                        # -- End function
	.globl	_Z27print_all_device_propertiesi # -- Begin function _Z27print_all_device_propertiesi
	.type	_Z27print_all_device_propertiesi,@function
_Z27print_all_device_propertiesi:       # @_Z27print_all_device_propertiesi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$1472, %rsp                     # imm = 0x5C0
	.cfi_def_cfa_offset 1504
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%edi, %ebx
	movq	%rsp, %r14
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	hipGetDevicePropertiesR0600
	movl	$.L.str, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	printf
	movq	288(%r14), %rsi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movq	296(%r14), %rsi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movl	304(%r14), %esi
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	movl	308(%r14), %esi
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	callq	printf
	movq	312(%r14), %rsi
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
	movl	320(%r14), %esi
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
	xorl	%r14d, %r14d
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	movl	324(%rsp,%r14,4), %edx
	movl	$.L.str.8, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	$3, %r14
	jne	.LBB3_1
# %bb.2:                                # %.preheader.preheader
	xorl	%r14d, %r14d
.LBB3_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	336(%rsp,%r14,4), %edx
	movl	$.L.str.9, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	$3, %r14
	jne	.LBB3_3
# %bb.4:
	movq	352(%rsp), %rsi
	movl	$.L.str.10, %edi
	xorl	%eax, %eax
	callq	printf
	movl	360(%rsp), %esi
	movl	$.L.str.11, %edi
	xorl	%eax, %eax
	callq	printf
	movl	364(%rsp), %esi
	movl	$.L.str.12, %edi
	xorl	%eax, %eax
	callq	printf
	movl	348(%rsp), %esi
	movl	$.L.str.13, %edi
	xorl	%eax, %eax
	callq	printf
	movq	368(%rsp), %rsi
	movl	$.L.str.14, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, 384(%rsp)
	movl	$.L.str.17, %r15d
	movl	$.L.str.16, %r14d
	movl	$.L.str.16, %esi
	cmoveq	%r15, %rsi
	movl	$.L.str.15, %edi
	xorl	%eax, %eax
	callq	printf
	movl	388(%rsp), %esi
	movl	$.L.str.18, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, 392(%rsp)
	movl	$.L.str.16, %esi
	cmoveq	%r15, %rsi
	movl	$.L.str.19, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, 396(%rsp)
	movl	$.L.str.16, %esi
	cmoveq	%r15, %rsi
	movl	$.L.str.20, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, 400(%rsp)
	movl	$.L.str.16, %esi
	cmoveq	%r15, %rsi
	movl	$.L.str.21, %edi
	xorl	%eax, %eax
	callq	printf
	movl	404(%rsp), %esi
	movl	$.L.str.22, %edi
	xorl	%eax, %eax
	callq	printf
	movl	576(%rsp), %esi
	movl	$.L.str.23, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, 580(%rsp)
	movl	$.L.str.16, %esi
	cmoveq	%r15, %rsi
	movl	$.L.str.24, %edi
	xorl	%eax, %eax
	callq	printf
	movl	584(%rsp), %esi
	movl	$.L.str.25, %edi
	xorl	%eax, %eax
	callq	printf
	movl	588(%rsp), %esi
	movl	$.L.str.26, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, 596(%rsp)
	cmoveq	%r15, %r14
	movl	$.L.str.27, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.28, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	addq	$1472, %rsp                     # imm = 0x5C0
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z27print_all_device_propertiesi, .Lfunc_end3-_Z27print_all_device_propertiesi
	.cfi_endproc
                                        # -- End function
	.globl	_Z37print_all_CUDA_devices_and_propertiesv # -- Begin function _Z37print_all_CUDA_devices_and_propertiesv
	.type	_Z37print_all_CUDA_devices_and_propertiesv,@function
_Z37print_all_CUDA_devices_and_propertiesv: # @_Z37print_all_CUDA_devices_and_propertiesv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	leaq	12(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	(%rbx), %edi
	testl	%edi, %edi
	jle	.LBB4_3
# %bb.1:                                # %.lr.ph.preheader
	xorl	%ebx, %ebx
.LBB4_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	_Z27print_all_device_propertiesi
	incl	%ebx
	movl	12(%rsp), %edi
	cmpl	%edi, %ebx
	jl	.LBB4_2
.LBB4_3:                                # %._crit_edge
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z37print_all_CUDA_devices_and_propertiesv, .Lfunc_end4-_Z37print_all_CUDA_devices_and_propertiesv
	.cfi_endproc
                                        # -- End function
	.globl	_Z34execute_register_memory_operationsv # -- Begin function _Z34execute_register_memory_operationsv
	.type	_Z34execute_register_memory_operationsv,@function
_Z34execute_register_memory_operationsv: # @_Z34execute_register_memory_operationsv
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$120, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	$0, 12(%rsp)
	leaq	32(%rsp), %rbx
	xorl	%r14d, %r14d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	leaq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	leaq	40(%rsp), %rdi
	callq	hipStreamCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	24(%rsp), %rdi
	movl	$32, %esi
	callq	hipMalloc
.LBB5_1:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	3(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-4, %ecx
	subl	%ecx, %eax
	movl	%eax, 48(%rsp,%r14,4)
	incq	%r14
	cmpq	$8, %r14
	jne	.LBB5_1
# %bb.2:                                # %_Z18generate_rand_dataPjj.exit
	movq	24(%rsp), %rdi
	leaq	48(%rsp), %rsi
	movl	$32, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	7(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_4
# %bb.3:
	movq	24(%rsp), %rdi
	movl	$8, %esi
	callq	_Z43__device_stub__gpu_register_array_operationPjj
.LBB5_4:
	movq	40(%rsp), %rdi
	callq	hipStreamSynchronize
	callq	hipGetLastError
	movq	24(%rsp), %rsi
	leaq	80(%rsp), %rdi
	movl	$32, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	callq	hipEventSynchronize
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdx
	leaq	12(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	32(%rsp), %rdi
	callq	hipEventDestroy
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	xorl	%ebx, %ebx
.LBB5_5:                                # =>This Inner Loop Header: Depth=1
	movl	48(%rsp,%rbx,4), %esi
	movl	80(%rsp,%rbx,4), %edx
	movl	$.L.str.30, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$8, %rbx
	jne	.LBB5_5
# %bb.6:
	movss	12(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	addq	$120, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z34execute_register_memory_operationsv, .Lfunc_end5-_Z34execute_register_memory_operationsv
	.cfi_endproc
                                        # -- End function
	.globl	_Z32execute_shared_memory_operationsv # -- Begin function _Z32execute_shared_memory_operationsv
	.type	_Z32execute_shared_memory_operationsv,@function
_Z32execute_shared_memory_operationsv:  # @_Z32execute_shared_memory_operationsv
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$120, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	$0, 12(%rsp)
	leaq	32(%rsp), %rbx
	xorl	%r14d, %r14d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	leaq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	leaq	40(%rsp), %rdi
	callq	hipStreamCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	24(%rsp), %rdi
	movl	$32, %esi
	callq	hipMalloc
.LBB6_1:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	3(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-4, %ecx
	subl	%ecx, %eax
	movl	%eax, 48(%rsp,%r14,4)
	incq	%r14
	cmpq	$8, %r14
	jne	.LBB6_1
# %bb.2:                                # %_Z18generate_rand_dataPjj.exit
	movq	24(%rsp), %rdi
	leaq	48(%rsp), %rsi
	movl	$32, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	7(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_4
# %bb.3:
	movq	24(%rsp), %rdi
	movl	$8, %esi
	callq	_Z41__device_stub__gpu_shared_array_operationPjj
.LBB6_4:
	movq	40(%rsp), %rdi
	callq	hipStreamSynchronize
	callq	hipGetLastError
	movq	24(%rsp), %rsi
	leaq	80(%rsp), %rdi
	movl	$32, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	callq	hipEventSynchronize
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdx
	leaq	12(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	32(%rsp), %rdi
	callq	hipEventDestroy
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	xorl	%ebx, %ebx
.LBB6_5:                                # =>This Inner Loop Header: Depth=1
	movl	48(%rsp,%rbx,4), %esi
	movl	80(%rsp,%rbx,4), %edx
	movl	$.L.str.30, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$8, %rbx
	jne	.LBB6_5
# %bb.6:
	movq	24(%rsp), %rdi
	callq	hipFree
	leaq	48(%rsp), %rdi
	callq	hipHostFree
	leaq	80(%rsp), %rdi
	callq	hipHostFree
	callq	hipDeviceReset
	movss	12(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	addq	$120, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z32execute_shared_memory_operationsv, .Lfunc_end6-_Z32execute_shared_memory_operationsv
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	_Z37print_all_CUDA_devices_and_propertiesv
	callq	_Z32execute_shared_memory_operationsv
	movss	%xmm0, (%rsp)                   # 4-byte Spill
	callq	_Z34execute_register_memory_operationsv
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$.L.str.33, %edi
	movl	$8, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.34, %edi
	movl	$1, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rsp), %xmm0                   # 4-byte Folded Reload
	movl	$.L.str.36, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movl	$.Lstr.6, %edi
	callq	puts@PLT
	xorps	%xmm0, %xmm0
	cvtss2sd	4(%rsp), %xmm0                  # 4-byte Folded Reload
	movl	$.L.str.36, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z28gpu_register_array_operationPjj, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z26gpu_shared_array_operationPjj, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z28gpu_register_array_operationPjj,@object # @_Z28gpu_register_array_operationPjj
	.section	.rodata,"a",@progbits
	.globl	_Z28gpu_register_array_operationPjj
	.p2align	3, 0x0
_Z28gpu_register_array_operationPjj:
	.quad	_Z43__device_stub__gpu_register_array_operationPjj
	.size	_Z28gpu_register_array_operationPjj, 8

	.type	_Z26gpu_shared_array_operationPjj,@object # @_Z26gpu_shared_array_operationPjj
	.globl	_Z26gpu_shared_array_operationPjj
	.p2align	3, 0x0
_Z26gpu_shared_array_operationPjj:
	.quad	_Z41__device_stub__gpu_shared_array_operationPjj
	.size	_Z26gpu_shared_array_operationPjj, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"============Start Device %x============\n"
	.size	.L.str, 41

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Name:                          %s\n"
	.size	.L.str.1, 35

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Total global memory:           %lu\n"
	.size	.L.str.2, 36

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Total shared memory per block: %lu\n"
	.size	.L.str.3, 36

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Total registers per block:     %d\n"
	.size	.L.str.4, 35

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Warp size:                     %d\n"
	.size	.L.str.5, 35

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Maximum memory pitch:          %lu\n"
	.size	.L.str.6, 36

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Maximum threads per block:     %d\n"
	.size	.L.str.7, 35

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Maximum dimension %d of block: %d\n"
	.size	.L.str.8, 35

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Maximum dimension %d of grid:  %d\n"
	.size	.L.str.9, 35

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Total constant memory:         %lu\n"
	.size	.L.str.10, 36

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Major revision number:         %d\n"
	.size	.L.str.11, 35

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Minor revision number:         %d\n"
	.size	.L.str.12, 35

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"Clock rate:                    %d\n"
	.size	.L.str.13, 35

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Texture alignment:             %lu\n"
	.size	.L.str.14, 36

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Concurrent copy and execution: %s\n"
	.size	.L.str.15, 35

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"Yes"
	.size	.L.str.16, 4

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"No"
	.size	.L.str.17, 3

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"Number of multiprocessors:     %d\n"
	.size	.L.str.18, 35

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"Kernel execution timeout:      %s\n"
	.size	.L.str.19, 35

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"Integrated:                    %s\n"
	.size	.L.str.20, 35

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"Mapable Host Memory:           %s\n"
	.size	.L.str.21, 35

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"Compute Mode:                  %d\n"
	.size	.L.str.22, 35

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"Concurrent Kernels:            %d\n"
	.size	.L.str.23, 35

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"ECC Enabled:                   %s\n"
	.size	.L.str.24, 35

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"pci Bus ID:                    %d\n"
	.size	.L.str.25, 35

	.type	.L.str.26,@object               # @.str.26
.L.str.26:
	.asciz	"pci Device ID:                 %d\n"
	.size	.L.str.26, 35

	.type	.L.str.27,@object               # @.str.27
.L.str.27:
	.asciz	"Using a tcc Driver:            %s\n"
	.size	.L.str.27, 35

	.type	.L.str.28,@object               # @.str.28
.L.str.28:
	.asciz	"============End Device %x============\n"
	.size	.L.str.28, 39

	.type	.L.str.30,@object               # @.str.30
.L.str.30:
	.asciz	"Input value: %x, device output: %x\n"
	.size	.L.str.30, 36

	.type	.L.str.33,@object               # @.str.33
.L.str.33:
	.asciz	"Total Threads: %d\n"
	.size	.L.str.33, 19

	.type	.L.str.34,@object               # @.str.34
.L.str.34:
	.asciz	"Total Blocks: %d\n"
	.size	.L.str.34, 18

	.type	.L.str.36,@object               # @.str.36
.L.str.36:
	.asciz	"duration: %fms\n"
	.size	.L.str.36, 16

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z28gpu_register_array_operationPjj"
	.size	.L__unnamed_1, 36

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z26gpu_shared_array_operationPjj"
	.size	.L__unnamed_2, 34

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Print of all CUDA devices and device properties"
	.size	.Lstr, 48

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Summary"
	.size	.Lstr.2, 8

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Time to copy global to shared mem, perform simple operation w/ shared memory, copy memory back to global"
	.size	.Lstr.4, 105

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"========================"
	.size	.Lstr.5, 25

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"Time to copy global to register mem, perform simple operation w/ register memory, copy memory back to global"
	.size	.Lstr.6, 109

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z43__device_stub__gpu_register_array_operationPjj
	.addrsig_sym _Z41__device_stub__gpu_shared_array_operationPjj
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z28gpu_register_array_operationPjj
	.addrsig_sym _Z26gpu_shared_array_operationPjj
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z28gpu_register_array_operationPjj ; -- Begin function _Z28gpu_register_array_operationPjj
	.globl	_Z28gpu_register_array_operationPjj
	.p2align	8
	.type	_Z28gpu_register_array_operationPjj,@function
_Z28gpu_register_array_operationPjj:    ; @_Z28gpu_register_array_operationPjj
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v2, v2, v2
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z28gpu_register_array_operationPjj
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z28gpu_register_array_operationPjj, .Lfunc_end0-_Z28gpu_register_array_operationPjj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 112
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z26gpu_shared_array_operationPjj ; -- Begin function _Z26gpu_shared_array_operationPjj
	.globl	_Z26gpu_shared_array_operationPjj
	.p2align	8
	.type	_Z26gpu_shared_array_operationPjj,@function
_Z26gpu_shared_array_operationPjj:      ; @_Z26gpu_shared_array_operationPjj
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_lshlrev_b32_e32 v1, 2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_load_b32 v0, v[2:3], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v0, v1
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v0, v0, v0
	ds_store_b32 v1, v0
	global_store_b32 v[2:3], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z26gpu_shared_array_operationPjj
		.amdhsa_group_segment_fixed_size 32
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z26gpu_shared_array_operationPjj, .Lfunc_end1-_Z26gpu_shared_array_operationPjj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 160
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 32 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z28gpu_register_array_operationPjj
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z28gpu_register_array_operationPjj.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 32
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z26gpu_shared_array_operationPjj
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z26gpu_shared_array_operationPjj.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
