// Rishabh Agarwal - 18JE0676
#include <bits/stdc++.h>
#include <cuda.h>
using namespace std;

// kernel functions

// compare single point and double point
__global__ void CompareKernel(float *da, double *db) {
    int tid = blockIdx.x * blockDim.x + threadIdx.x;
    if (tid == 0) {
        *da = 20.234;
        *db = 20.234;
    }
}

// single precision operations
__global__ void SinglePrecisionOperationsKernel(float *fres_add, float *fres_sub, float *fres_mul, float *fres_div) {
    float f1 = 45.238; 
    float f2 = 26.547;
    *fres_add = f1 + f2;
    *fres_sub = f1 - f2;
    *fres_mul = f1 * f2;
    *fres_div = f1 / f2;
}

// double precision operations
__global__ void DoublePrecisionOperationsKernel(double *dres_add, double *dres_sub, double *dres_mul, double *dres_div) {
    double d1 = 74.112;
    double d2 = 55.656;
    *dres_add = d1 + d2;
    *dres_sub = d1 - d2;
    *dres_mul = d1 * d2;
    *dres_div = d1 / d2;
}

// main()

int main() {

    float host_f = 20.234, device_f;
    double host_d = 20.234, device_d;

    float *da;
    double *db;

    cudaMalloc(&da, sizeof(float));
    cudaMalloc(&db, sizeof(double));

    CompareKernel<<<1, 32>>>(da, db);
    cudaMemcpy(&device_f, da, sizeof(float), cudaMemcpyDeviceToHost);
    cudaMemcpy(&device_d, db, sizeof(double), cudaMemcpyDeviceToHost);

    cudaFree(da);
    cudaFree(db);

    cout << "Single point float precision number in host: " << host_f << "\n";
    cout << "Single point float precision number in device: " << device_f << "\n";
    cout << ((host_f == device_f) ? "Equal\n" : "Unequal\n");
    cout << "Double point float precision number in host: " << host_d << "\n";
    cout << "Double point float precision number in device: " << device_d << "\n";
    cout << ((host_d == device_d) ? "Equal\n" : "Unequal\n");
    
    // host and device storing variables
    float f1 = 45.238, f2 = 26.547;
    float device_f_add, device_f_sub, device_f_mul, device_f_div;
    double d1 = 74.112, d2 = 55.656;
    double device_d_add, device_d_sub, device_d_mul, device_d_div;

    // pointers to send in kernel
    float *fres_add, *fres_sub, *fres_mul, *fres_div;
    double *dres_add, *dres_sub, *dres_mul, *dres_div;
    
    // allocation memories
    cudaMalloc(&fres_add, sizeof(float));
    cudaMalloc(&fres_sub, sizeof(float));
    cudaMalloc(&fres_mul, sizeof(float));
    cudaMalloc(&fres_div, sizeof(float));
    cudaMalloc(&dres_add, sizeof(double));
    cudaMalloc(&dres_sub, sizeof(double));
    cudaMalloc(&dres_mul, sizeof(double));
    cudaMalloc(&dres_div, sizeof(double));
    
    // calling kernel
    SinglePrecisionOperationsKernel<<<1, 32>>>(
        fres_add, fres_sub, fres_mul, fres_div
    );
    DoublePrecisionOperationsKernel<<<1, 32>>>(
        dres_add, dres_sub, dres_mul, dres_div
    );

    // copying back to host    
    cudaMemcpy(&device_f_add, fres_add, sizeof(float), cudaMemcpyDeviceToHost);
    cudaMemcpy(&device_f_sub, fres_sub, sizeof(float), cudaMemcpyDeviceToHost);
    cudaMemcpy(&device_f_mul, fres_mul, sizeof(float), cudaMemcpyDeviceToHost);
    cudaMemcpy(&device_f_div, fres_div, sizeof(float), cudaMemcpyDeviceToHost);
    cudaMemcpy(&device_d_add, dres_add, sizeof(double), cudaMemcpyDeviceToHost);
    cudaMemcpy(&device_d_sub, dres_sub, sizeof(double), cudaMemcpyDeviceToHost);
    cudaMemcpy(&device_d_mul, dres_mul, sizeof(double), cudaMemcpyDeviceToHost);
    cudaMemcpy(&device_d_div, dres_div, sizeof(double), cudaMemcpyDeviceToHost);

    // freeing memory
    cudaFree(fres_add);
    cudaFree(fres_sub);
    cudaFree(fres_mul);
    cudaFree(fres_div);
    cudaFree(dres_add);
    cudaFree(dres_sub);
    cudaFree(dres_mul);
    cudaFree(dres_div);
    
    cout << "\nNow performing single point precision operations:\n\n";
    
    cout << "Single point precision addition in host: " << f1+f2 << "\n";
    cout << "Single point precision addition in device: " << device_f_add << "\n";
    if(device_f_add == f1 + f2) {
        cout << "Equal\n\n";
    } else {
        cout << "Unequal\n\n";
    }

    cout << "Single point precision subtraction in host: " << f1-f2 << "\n";
    cout << "Single point precision subtraction in device: " << device_f_sub << "\n";
    if(device_f_sub == f1 - f2) {
        cout << "Equal\n\n";
    } else {
        cout << "Unequal\n\n";
    }
    
    cout << "Single point precision multiplication in host: " << f1*f2 << "\n";
    cout << "Single point precision multiplication in device: " << device_f_mul << "\n";
    if(device_f_mul == f1 * f2) {
        cout << "Equal\n\n";
    } else {
        cout << "Unequal\n\n";
    }
    
    cout << "Single point precision division in host: " << f1/f2 << "\n";
    cout << "Single point precision division in device: " << device_f_div << "\n"; 
    if(device_f_div == f1 / f2) {
        cout << "Equal\n\n";
    } else {
        cout << "Unequal\n\n";
    }

    cout << "Now performing double point precision operations:\n\n";
    
    cout << "Double point precision addition in host: " << d1+d2 << "\n";
    cout << "Double point precision addition in device: " << device_d_add << "\n";
    if(device_d_add == d1 + d2) {
        cout << "Equal\n\n";
    } else {
        cout << "Unequal\n\n";
    }

    cout << "Double point precision subtraction in host: " << d1-d2 << "\n";
    cout << "Double point precision subtraction in device: " << device_d_sub << "\n";
    if(device_d_sub == d1 - d2) {
        cout << "Equal\n\n";
    } else {
        cout << "Unequal\n\n";
    }

    cout << "Double point precision multiplication in host: " << d1*d2 << "\n";
    cout << "Double point precision multiplication in device: " << device_d_mul << "\n";
    if(device_d_mul == d1 * d2) {
        cout << "Equal\n\n";
    } else {
        cout << "Unequal\n\n";
    }

    cout << "Double point precision division in host: " << d1/d2 << "\n";
    cout << "Double point precision division in device: " << device_d_div << "\n";
    if(device_d_div == d1 / d2) {
        cout << "Equal\n\n";
    } else {
        cout << "Unequal\n\n";
    }

    return 0;
}

	.file	"tmpxft_002c4ff4_00000000-6_Assignment_5_single_precision.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB10828:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE10828:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0, @function
_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0:
.LFB12554:
	.cfi_startproc
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE12554:
	.size	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0, .-_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	.globl	_Z35__device_stub__Z13CompareKernelPfPdPfPd
	.type	_Z35__device_stub__Z13CompareKernelPfPdPfPd, @function
_Z35__device_stub__Z13CompareKernelPfPdPfPd:
.LFB10850:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z13CompareKernelPfPd(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L3:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10850:
	.size	_Z35__device_stub__Z13CompareKernelPfPdPfPd, .-_Z35__device_stub__Z13CompareKernelPfPdPfPd
	.globl	_Z13CompareKernelPfPd
	.type	_Z13CompareKernelPfPd, @function
_Z13CompareKernelPfPd:
.LFB10851:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z13CompareKernelPfPdPfPd
	.cfi_endproc
.LFE10851:
	.size	_Z13CompareKernelPfPd, .-_Z13CompareKernelPfPd
	.globl	_Z57__device_stub__Z31SinglePrecisionOperationsKernelPfS_S_S_PfS_S_S_
	.type	_Z57__device_stub__Z31SinglePrecisionOperationsKernelPfS_S_S_PfS_S_S_, @function
_Z57__device_stub__Z31SinglePrecisionOperationsKernelPfS_S_S_PfS_S_S_:
.LFB10852:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z31SinglePrecisionOperationsKernelPfS_S_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L9:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10852:
	.size	_Z57__device_stub__Z31SinglePrecisionOperationsKernelPfS_S_S_PfS_S_S_, .-_Z57__device_stub__Z31SinglePrecisionOperationsKernelPfS_S_S_PfS_S_S_
	.globl	_Z31SinglePrecisionOperationsKernelPfS_S_S_
	.type	_Z31SinglePrecisionOperationsKernelPfS_S_S_, @function
_Z31SinglePrecisionOperationsKernelPfS_S_S_:
.LFB10853:
	.cfi_startproc
	endbr64
	jmp	_Z57__device_stub__Z31SinglePrecisionOperationsKernelPfS_S_S_PfS_S_S_
	.cfi_endproc
.LFE10853:
	.size	_Z31SinglePrecisionOperationsKernelPfS_S_S_, .-_Z31SinglePrecisionOperationsKernelPfS_S_S_
	.globl	_Z57__device_stub__Z31DoublePrecisionOperationsKernelPdS_S_S_PdS_S_S_
	.type	_Z57__device_stub__Z31DoublePrecisionOperationsKernelPdS_S_S_PdS_S_S_, @function
_Z57__device_stub__Z31DoublePrecisionOperationsKernelPdS_S_S_PdS_S_S_:
.LFB10854:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z31DoublePrecisionOperationsKernelPdS_S_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L14:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10854:
	.size	_Z57__device_stub__Z31DoublePrecisionOperationsKernelPdS_S_S_PdS_S_S_, .-_Z57__device_stub__Z31DoublePrecisionOperationsKernelPdS_S_S_PdS_S_S_
	.globl	_Z31DoublePrecisionOperationsKernelPdS_S_S_
	.type	_Z31DoublePrecisionOperationsKernelPdS_S_S_, @function
_Z31DoublePrecisionOperationsKernelPdS_S_S_:
.LFB10855:
	.cfi_startproc
	endbr64
	jmp	_Z57__device_stub__Z31DoublePrecisionOperationsKernelPdS_S_S_PdS_S_S_
	.cfi_endproc
.LFE10855:
	.size	_Z31DoublePrecisionOperationsKernelPdS_S_S_, .-_Z31DoublePrecisionOperationsKernelPdS_S_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Equal\n"
.LC1:
	.string	"Unequal\n"
.LC2:
	.string	"Single point float precision number in host: "
.LC4:
	.string	"\n"
.LC5:
	.string	"Single point float precision number in device: "
.LC7:
	.string	"Double point float precision number in host: "
.LC9:
	.string	"Double point float precision number in device: "
.LC10:
	.string	"\nNow performing single point precision operations:\n\n"
.LC11:
	.string	"Single point precision addition in host: "
.LC13:
	.string	"Single point precision addition in device: "
.LC15:
	.string	"Equal\n\n"
.LC16:
	.string	"Unequal\n\n"
.LC17:
	.string	"Single point precision subtraction in host: "
.LC19:
	.string	"Single point precision subtraction in device: "
.LC21:
	.string	"Single point precision multiplication in host: "
.LC23:
	.string	"Single point precision multiplication in device: "
.LC25:
	.string	"Single point precision division in host: "
.LC27:
	.string	"Single point precision division in device: "
.LC29:
	.string	"Now performing double point precision operations:\n\n"
.LC30:
	.string	"Double point precision addition in host: "
.LC32:
	.string	"Double point precision addition in device: "
.LC33:
	.string	"Double point precision subtraction in host: "
.LC35:
	.string	"Double point precision subtraction in device: "
.LC36:
	.string	"Double point precision multiplication in host: "
.LC38:
	.string	"Double point precision multiplication in device: "
.LC39:
	.string	"Double point precision division in host: "
.LC41:
	.string	"Double point precision division in device: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB10825:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$4, %esi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$184, %rsp
	.cfi_def_cfa_offset 208
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	48(%rsp), %rdi
	movl	$8, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$5, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movq	%rdx, 152(%rsp)
	movl	$1, 160(%rsp)
	movq	%rdi, 136(%rsp)
	movl	$1, 144(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z35__device_stub__Z13CompareKernelPfPdPfPd
.L20:
	movq	40(%rsp), %rsi
	leaq	12(%rsp), %rdi
	movl	$2, %ecx
	movl	$4, %edx
	leaq	_ZSt4cout(%rip), %rbx
	leaq	.LC4(%rip), %rbp
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movl	$8, %edx
	leaq	32(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC3(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	12(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	12(%rsp), %xmm0
	ucomiss	.LC6(%rip), %xmm0
	jp	.L52
	leaq	.LC0(%rip), %rsi
	je	.L21
.L52:
	leaq	.LC1(%rip), %rsi
.L21:
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC8(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC9(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	32(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC8(%rip), %xmm1
	ucomisd	32(%rsp), %xmm1
	jp	.L53
	leaq	.LC0(%rip), %rsi
	je	.L23
.L53:
	leaq	.LC1(%rip), %rsi
.L23:
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	72(%rsp), %rdi
	movl	$4, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	80(%rsp), %rdi
	movl	$4, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	88(%rsp), %rdi
	movl	$4, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	96(%rsp), %rdi
	movl	$4, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	104(%rsp), %rdi
	movl	$8, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	112(%rsp), %rdi
	movl	$8, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	120(%rsp), %rdi
	movl	$8, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	128(%rsp), %rdi
	movl	$8, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$5, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movq	%rdx, 152(%rsp)
	movl	$1, 160(%rsp)
	movq	%rdi, 136(%rsp)
	movl	$1, 144(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movq	96(%rsp), %rcx
	movq	88(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	72(%rsp), %rdi
	call	_Z57__device_stub__Z31SinglePrecisionOperationsKernelPfS_S_S_PfS_S_S_
.L25:
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$5, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 160(%rsp)
	movq	%rdx, 152(%rsp)
	movq	%rdi, 136(%rsp)
	movl	$1, 144(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	128(%rsp), %rcx
	movq	120(%rsp), %rdx
	movq	112(%rsp), %rsi
	movq	104(%rsp), %rdi
	call	_Z57__device_stub__Z31DoublePrecisionOperationsKernelPdS_S_S_PdS_S_S_
.L26:
	movq	72(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$2, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movq	80(%rsp), %rsi
	leaq	20(%rsp), %rdi
	movl	$2, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movq	88(%rsp), %rsi
	leaq	24(%rsp), %rdi
	movl	$2, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movq	96(%rsp), %rsi
	leaq	28(%rsp), %rdi
	movl	$2, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movq	104(%rsp), %rsi
	leaq	56(%rsp), %rdi
	movl	$2, %ecx
	movl	$8, %edx
	call	cudaMemcpy@PLT
	movq	112(%rsp), %rsi
	leaq	64(%rsp), %rdi
	movl	$2, %ecx
	movl	$8, %edx
	call	cudaMemcpy@PLT
	movq	120(%rsp), %rsi
	movl	$2, %ecx
	leaq	136(%rsp), %rdi
	movl	$8, %edx
	call	cudaMemcpy@PLT
	movl	$2, %ecx
	movq	128(%rsp), %rsi
	movl	$8, %edx
	leaq	152(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC10(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC11(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC12(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC13(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	16(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	16(%rsp), %xmm0
	ucomiss	.LC14(%rip), %xmm0
	jp	.L27
	leaq	.LC15(%rip), %rsi
	je	.L65
.L27:
	leaq	.LC16(%rip), %rsi
.L65:
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC17(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC18(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC19(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	20(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	20(%rsp), %xmm0
	ucomiss	.LC20(%rip), %xmm0
	jp	.L30
	leaq	.LC15(%rip), %rsi
	je	.L66
.L30:
	leaq	.LC16(%rip), %rsi
.L66:
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC21(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC22(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC23(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	24(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	24(%rsp), %xmm0
	ucomiss	.LC24(%rip), %xmm0
	jp	.L33
	leaq	.LC15(%rip), %rsi
	je	.L67
.L33:
	leaq	.LC16(%rip), %rsi
.L67:
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC26(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC27(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	28(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	28(%rsp), %xmm0
	ucomiss	.LC28(%rip), %xmm0
	jp	.L36
	leaq	.LC15(%rip), %rsi
	je	.L68
.L36:
	leaq	.LC16(%rip), %rsi
.L68:
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC29(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC30(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC31(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC32(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	56(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC31(%rip), %xmm2
	ucomisd	56(%rsp), %xmm2
	jp	.L39
	leaq	.LC15(%rip), %rsi
	je	.L69
.L39:
	leaq	.LC16(%rip), %rsi
.L69:
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC33(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC34(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC35(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	64(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC34(%rip), %xmm3
	ucomisd	64(%rsp), %xmm3
	jp	.L42
	leaq	.LC15(%rip), %rsi
	je	.L70
.L42:
	leaq	.LC16(%rip), %rsi
.L70:
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC36(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC37(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC38(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	136(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC37(%rip), %xmm4
	ucomisd	136(%rsp), %xmm4
	jp	.L45
	leaq	.LC15(%rip), %rsi
	je	.L71
.L45:
	leaq	.LC16(%rip), %rsi
.L71:
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC39(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC40(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC41(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	152(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC40(%rip), %xmm5
	ucomisd	152(%rsp), %xmm5
	jp	.L48
	leaq	.LC15(%rip), %rsi
	je	.L72
.L48:
	leaq	.LC16(%rip), %rsi
.L72:
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L51
	call	__stack_chk_fail@PLT
.L51:
	addq	$184, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10825:
	.size	main, .-main
	.section	.rodata.str1.1
.LC42:
	.string	"_Z31DoublePrecisionOperationsKernelPdS_S_S_"
.LC43:
	.string	"_Z31SinglePrecisionOperationsKernelPfS_S_S_"
.LC44:
	.string	"_Z13CompareKernelPfPd"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB10857:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC42(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z31DoublePrecisionOperationsKernelPdS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC43(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z31SinglePrecisionOperationsKernelPfS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC44(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13CompareKernelPfPd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE10857:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	1610612736
	.long	1077165031
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC6:
	.long	1101127483
	.section	.rodata.cst8
	.align 8
.LC8:
	.long	1821066134
	.long	1077165031
	.align 8
.LC12:
	.long	-2147483648
	.long	1079112253
	.section	.rodata.cst4
	.align 4
.LC14:
	.long	1116705260
	.section	.rodata.cst8
	.align 8
.LC18:
	.long	1073741824
	.long	1077063909
	.section	.rodata.cst4
	.align 4
.LC20:
	.long	1100318506
	.section	.rodata.cst8
	.align 8
.LC22:
	.long	-1610612736
	.long	1083360187
	.section	.rodata.cst4
	.align 4
.LC24:
	.long	1150688733
	.section	.rodata.cst8
	.align 8
.LC26:
	.long	-536870912
	.long	1073431520
	.section	.rodata.cst4
	.align 4
.LC28:
	.long	1071259399
	.section	.rodata.cst8
	.align 8
.LC31:
	.long	1958505087
	.long	1080047763
	.align 8
.LC34:
	.long	1786706394
	.long	1077048508
	.align 8
.LC37:
	.long	141012366
	.long	1085283527
	.align 8
.LC40:
	.long	-1442768230
	.long	1073040964
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// Rishabh Agarwal - 18JE0676
#include <bits/stdc++.h>
#include <hip/hip_runtime.h>
using namespace std;

// kernel functions

// compare single point and double point
__global__ void CompareKernel(float *da, double *db) {
    int tid = blockIdx.x * blockDim.x + threadIdx.x;
    if (tid == 0) {
        *da = 20.234;
        *db = 20.234;
    }
}

// single precision operations
__global__ void SinglePrecisionOperationsKernel(float *fres_add, float *fres_sub, float *fres_mul, float *fres_div) {
    float f1 = 45.238; 
    float f2 = 26.547;
    *fres_add = f1 + f2;
    *fres_sub = f1 - f2;
    *fres_mul = f1 * f2;
    *fres_div = f1 / f2;
}

// double precision operations
__global__ void DoublePrecisionOperationsKernel(double *dres_add, double *dres_sub, double *dres_mul, double *dres_div) {
    double d1 = 74.112;
    double d2 = 55.656;
    *dres_add = d1 + d2;
    *dres_sub = d1 - d2;
    *dres_mul = d1 * d2;
    *dres_div = d1 / d2;
}

// main()

int main() {

    float host_f = 20.234, device_f;
    double host_d = 20.234, device_d;

    float *da;
    double *db;

    hipMalloc(&da, sizeof(float));
    hipMalloc(&db, sizeof(double));

    CompareKernel<<<1, 32>>>(da, db);
    hipMemcpy(&device_f, da, sizeof(float), hipMemcpyDeviceToHost);
    hipMemcpy(&device_d, db, sizeof(double), hipMemcpyDeviceToHost);

    hipFree(da);
    hipFree(db);

    cout << "Single point float precision number in host: " << host_f << "\n";
    cout << "Single point float precision number in device: " << device_f << "\n";
    cout << ((host_f == device_f) ? "Equal\n" : "Unequal\n");
    cout << "Double point float precision number in host: " << host_d << "\n";
    cout << "Double point float precision number in device: " << device_d << "\n";
    cout << ((host_d == device_d) ? "Equal\n" : "Unequal\n");
    
    // host and device storing variables
    float f1 = 45.238, f2 = 26.547;
    float device_f_add, device_f_sub, device_f_mul, device_f_div;
    double d1 = 74.112, d2 = 55.656;
    double device_d_add, device_d_sub, device_d_mul, device_d_div;

    // pointers to send in kernel
    float *fres_add, *fres_sub, *fres_mul, *fres_div;
    double *dres_add, *dres_sub, *dres_mul, *dres_div;
    
    // allocation memories
    hipMalloc(&fres_add, sizeof(float));
    hipMalloc(&fres_sub, sizeof(float));
    hipMalloc(&fres_mul, sizeof(float));
    hipMalloc(&fres_div, sizeof(float));
    hipMalloc(&dres_add, sizeof(double));
    hipMalloc(&dres_sub, sizeof(double));
    hipMalloc(&dres_mul, sizeof(double));
    hipMalloc(&dres_div, sizeof(double));
    
    // calling kernel
    SinglePrecisionOperationsKernel<<<1, 32>>>(
        fres_add, fres_sub, fres_mul, fres_div
    );
    DoublePrecisionOperationsKernel<<<1, 32>>>(
        dres_add, dres_sub, dres_mul, dres_div
    );

    // copying back to host    
    hipMemcpy(&device_f_add, fres_add, sizeof(float), hipMemcpyDeviceToHost);
    hipMemcpy(&device_f_sub, fres_sub, sizeof(float), hipMemcpyDeviceToHost);
    hipMemcpy(&device_f_mul, fres_mul, sizeof(float), hipMemcpyDeviceToHost);
    hipMemcpy(&device_f_div, fres_div, sizeof(float), hipMemcpyDeviceToHost);
    hipMemcpy(&device_d_add, dres_add, sizeof(double), hipMemcpyDeviceToHost);
    hipMemcpy(&device_d_sub, dres_sub, sizeof(double), hipMemcpyDeviceToHost);
    hipMemcpy(&device_d_mul, dres_mul, sizeof(double), hipMemcpyDeviceToHost);
    hipMemcpy(&device_d_div, dres_div, sizeof(double), hipMemcpyDeviceToHost);

    // freeing memory
    hipFree(fres_add);
    hipFree(fres_sub);
    hipFree(fres_mul);
    hipFree(fres_div);
    hipFree(dres_add);
    hipFree(dres_sub);
    hipFree(dres_mul);
    hipFree(dres_div);
    
    cout << "\nNow performing single point precision operations:\n\n";
    
    cout << "Single point precision addition in host: " << f1+f2 << "\n";
    cout << "Single point precision addition in device: " << device_f_add << "\n";
    if(device_f_add == f1 + f2) {
        cout << "Equal\n\n";
    } else {
        cout << "Unequal\n\n";
    }

    cout << "Single point precision subtraction in host: " << f1-f2 << "\n";
    cout << "Single point precision subtraction in device: " << device_f_sub << "\n";
    if(device_f_sub == f1 - f2) {
        cout << "Equal\n\n";
    } else {
        cout << "Unequal\n\n";
    }
    
    cout << "Single point precision multiplication in host: " << f1*f2 << "\n";
    cout << "Single point precision multiplication in device: " << device_f_mul << "\n";
    if(device_f_mul == f1 * f2) {
        cout << "Equal\n\n";
    } else {
        cout << "Unequal\n\n";
    }
    
    cout << "Single point precision division in host: " << f1/f2 << "\n";
    cout << "Single point precision division in device: " << device_f_div << "\n"; 
    if(device_f_div == f1 / f2) {
        cout << "Equal\n\n";
    } else {
        cout << "Unequal\n\n";
    }

    cout << "Now performing double point precision operations:\n\n";
    
    cout << "Double point precision addition in host: " << d1+d2 << "\n";
    cout << "Double point precision addition in device: " << device_d_add << "\n";
    if(device_d_add == d1 + d2) {
        cout << "Equal\n\n";
    } else {
        cout << "Unequal\n\n";
    }

    cout << "Double point precision subtraction in host: " << d1-d2 << "\n";
    cout << "Double point precision subtraction in device: " << device_d_sub << "\n";
    if(device_d_sub == d1 - d2) {
        cout << "Equal\n\n";
    } else {
        cout << "Unequal\n\n";
    }

    cout << "Double point precision multiplication in host: " << d1*d2 << "\n";
    cout << "Double point precision multiplication in device: " << device_d_mul << "\n";
    if(device_d_mul == d1 * d2) {
        cout << "Equal\n\n";
    } else {
        cout << "Unequal\n\n";
    }

    cout << "Double point precision division in host: " << d1/d2 << "\n";
    cout << "Double point precision division in device: " << device_d_div << "\n";
    if(device_d_div == d1 / d2) {
        cout << "Equal\n\n";
    } else {
        cout << "Unequal\n\n";
    }

    return 0;
}

	.text
	.file	"Assignment_5_single_precision.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z28__device_stub__CompareKernelPfPd # -- Begin function _Z28__device_stub__CompareKernelPfPd
	.type	_Z28__device_stub__CompareKernelPfPd,@function
_Z28__device_stub__CompareKernelPfPd:   # @_Z28__device_stub__CompareKernelPfPd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13CompareKernelPfPd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__CompareKernelPfPd, .Lfunc_end0-_Z28__device_stub__CompareKernelPfPd
	.cfi_endproc
                                        # -- End function
	.globl	_Z46__device_stub__SinglePrecisionOperationsKernelPfS_S_S_ # -- Begin function _Z46__device_stub__SinglePrecisionOperationsKernelPfS_S_S_
	.type	_Z46__device_stub__SinglePrecisionOperationsKernelPfS_S_S_,@function
_Z46__device_stub__SinglePrecisionOperationsKernelPfS_S_S_: # @_Z46__device_stub__SinglePrecisionOperationsKernelPfS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z31SinglePrecisionOperationsKernelPfS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z46__device_stub__SinglePrecisionOperationsKernelPfS_S_S_, .Lfunc_end1-_Z46__device_stub__SinglePrecisionOperationsKernelPfS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z46__device_stub__DoublePrecisionOperationsKernelPdS_S_S_ # -- Begin function _Z46__device_stub__DoublePrecisionOperationsKernelPdS_S_S_
	.type	_Z46__device_stub__DoublePrecisionOperationsKernelPdS_S_S_,@function
_Z46__device_stub__DoublePrecisionOperationsKernelPdS_S_S_: # @_Z46__device_stub__DoublePrecisionOperationsKernelPdS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z31DoublePrecisionOperationsKernelPdS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z46__device_stub__DoublePrecisionOperationsKernelPdS_S_S_, .Lfunc_end2-_Z46__device_stub__DoublePrecisionOperationsKernelPdS_S_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x40343be760000000              # double 20.233999252319336
.LCPI3_2:
	.quad	0x40343be76c8b4396              # double 20.234000000000002
.LCPI3_3:
	.quad	0x4051f23d80000000              # double 71.785003662109375
.LCPI3_5:
	.quad	0x4032b0e540000000              # double 18.690998077392578
.LCPI3_7:
	.quad	0x4092c3bba0000000              # double 1200.9332275390625
.LCPI3_9:
	.quad	0x3ffb43e0e0000000              # double 1.7040718793869019
.LCPI3_11:
	.quad	0x4060389374bc6a7f              # double 129.768
.LCPI3_12:
	.quad	0x403274bc6a7ef9da              # double 18.455999999999996
.LCPI3_13:
	.quad	0x40b01cc70867ad8e              # double 4124.7774719999998
.LCPI3_14:
	.quad	0x3ff54e44aa011a9a              # double 1.3316084519189304
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI3_1:
	.long	0x41a1df3b                      # float 20.2339993
.LCPI3_4:
	.long	0x428f91ec                      # float 71.7850037
.LCPI3_6:
	.long	0x4195872a                      # float 18.6909981
.LCPI3_8:
	.long	0x44961ddd                      # float 1200.93323
.LCPI3_10:
	.long	0x3fda1f07                      # float 1.70407188
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movabsq	$4294967297, %rbx               # imm = 0x100000001
	leaq	88(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	leaq	80(%rsp), %rdi
	movl	$8, %esi
	callq	hipMalloc
	leaq	31(%rbx), %r14
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	88(%rsp), %rdi
	movq	80(%rsp), %rsi
	callq	_Z28__device_stub__CompareKernelPfPd
.LBB3_2:
	movq	88(%rsp), %rsi
	leaq	132(%rsp), %r12
	movl	$4, %edx
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	80(%rsp), %rsi
	leaq	136(%rsp), %r15
	movl	$8, %edx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	88(%rsp), %rdi
	callq	hipFree
	movq	80(%rsp), %rdi
	callq	hipFree
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	.LCPI3_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$47, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	(%r12), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	.LCPI3_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movaps	%xmm0, %xmm2
	cmpneqss	%xmm1, %xmm2
	movd	%xmm2, %eax
	andl	$1, %eax
	ucomiss	%xmm1, %xmm0
	movl	$.L.str.4, %r13d
	movl	$.L.str.3, %esi
	cmovneq	%r13, %rsi
	movl	$.L.str.3, %r12d
	cmovpq	%r13, %rsi
	leaq	6(,%rax,2), %rdx
	movl	$_ZSt4cout, %edi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	.LCPI3_2(%rip), %xmm0           # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$47, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	(%r15), %xmm0                   # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	(%r15), %xmm0                   # xmm0 = mem[0],zero
	movapd	%xmm0, %xmm1
	movsd	.LCPI3_2(%rip), %xmm2           # xmm2 = mem[0],zero
	cmpneqsd	%xmm2, %xmm1
	movq	%xmm1, %rax
	andl	$1, %eax
	ucomisd	%xmm2, %xmm0
	cmovneq	%r13, %r12
	cmovpq	%r13, %r12
	leaq	6(,%rax,2), %rdx
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	72(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	leaq	64(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movl	$8, %esi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movl	$8, %esi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$8, %esi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$8, %esi
	callq	hipMalloc
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.3:
	movq	72(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rcx
	callq	_Z46__device_stub__SinglePrecisionOperationsKernelPfS_S_S_
.LBB3_4:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_6
# %bb.5:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rcx
	callq	_Z46__device_stub__DoublePrecisionOperationsKernelPdS_S_S_
.LBB3_6:
	movq	72(%rsp), %rsi
	leaq	128(%rsp), %rbx
	movl	$4, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	64(%rsp), %rsi
	leaq	12(%rsp), %rdi
	movl	$4, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	56(%rsp), %rsi
	leaq	8(%rsp), %rdi
	movl	$4, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	48(%rsp), %rsi
	leaq	4(%rsp), %rdi
	movl	$4, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rsi
	leaq	120(%rsp), %rdi
	movl	$8, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rsi
	leaq	112(%rsp), %rdi
	movl	$8, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	leaq	104(%rsp), %rdi
	movl	$8, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	leaq	96(%rsp), %rdi
	movl	$8, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$52, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$41, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	.LCPI3_3(%rip), %xmm0           # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$43, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movl	$_ZSt4cout, %edi
	ucomiss	.LCPI3_4(%rip), %xmm0
	jne	.LBB3_8
	jp	.LBB3_8
# %bb.7:
	movl	$.L.str.10, %esi
	movl	$7, %edx
	jmp	.LBB3_9
.LBB3_8:
	movl	$.L.str.11, %esi
	movl	$9, %edx
.LBB3_9:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.12, %esi
	movl	$44, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	.LCPI3_5(%rip), %xmm0           # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$46, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	12(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movl	$_ZSt4cout, %edi
	ucomiss	.LCPI3_6(%rip), %xmm0
	jne	.LBB3_11
	jp	.LBB3_11
# %bb.10:
	movl	$.L.str.10, %esi
	movl	$7, %edx
	jmp	.LBB3_12
.LBB3_11:
	movl	$.L.str.11, %esi
	movl	$9, %edx
.LBB3_12:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.14, %esi
	movl	$47, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	.LCPI3_7(%rip), %xmm0           # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.15, %esi
	movl	$49, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	8(%rsp), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	8(%rsp), %xmm0                  # xmm0 = mem[0],zero,zero,zero
	movl	$_ZSt4cout, %edi
	ucomiss	.LCPI3_8(%rip), %xmm0
	jne	.LBB3_14
	jp	.LBB3_14
# %bb.13:
	movl	$.L.str.10, %esi
	movl	$7, %edx
	jmp	.LBB3_15
.LBB3_14:
	movl	$.L.str.11, %esi
	movl	$9, %edx
.LBB3_15:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.16, %esi
	movl	$41, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	.LCPI3_9(%rip), %xmm0           # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.17, %esi
	movl	$43, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	4(%rsp), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	4(%rsp), %xmm0                  # xmm0 = mem[0],zero,zero,zero
	movl	$_ZSt4cout, %edi
	ucomiss	.LCPI3_10(%rip), %xmm0
	jne	.LBB3_17
	jp	.LBB3_17
# %bb.16:
	movl	$.L.str.10, %esi
	movl	$7, %edx
	jmp	.LBB3_18
.LBB3_17:
	movl	$.L.str.11, %esi
	movl	$9, %edx
.LBB3_18:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.18, %esi
	movl	$51, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.19, %esi
	movl	$41, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	.LCPI3_11(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.20, %esi
	movl	$43, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	120(%rsp), %xmm0                # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	120(%rsp), %xmm0                # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	ucomisd	.LCPI3_11(%rip), %xmm0
	jne	.LBB3_20
	jp	.LBB3_20
# %bb.19:
	movl	$.L.str.10, %esi
	movl	$7, %edx
	jmp	.LBB3_21
.LBB3_20:
	movl	$.L.str.11, %esi
	movl	$9, %edx
.LBB3_21:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.21, %esi
	movl	$44, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	.LCPI3_12(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.22, %esi
	movl	$46, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	112(%rsp), %xmm0                # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	112(%rsp), %xmm0                # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	ucomisd	.LCPI3_12(%rip), %xmm0
	jne	.LBB3_23
	jp	.LBB3_23
# %bb.22:
	movl	$.L.str.10, %esi
	movl	$7, %edx
	jmp	.LBB3_24
.LBB3_23:
	movl	$.L.str.11, %esi
	movl	$9, %edx
.LBB3_24:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.23, %esi
	movl	$47, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	.LCPI3_13(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.24, %esi
	movl	$49, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	104(%rsp), %xmm0                # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	104(%rsp), %xmm0                # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	ucomisd	.LCPI3_13(%rip), %xmm0
	jne	.LBB3_26
	jp	.LBB3_26
# %bb.25:
	movl	$.L.str.10, %esi
	movl	$7, %edx
	jmp	.LBB3_27
.LBB3_26:
	movl	$.L.str.11, %esi
	movl	$9, %edx
.LBB3_27:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.25, %esi
	movl	$41, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	.LCPI3_14(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.26, %esi
	movl	$43, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	96(%rsp), %xmm0                 # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	96(%rsp), %xmm0                 # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	ucomisd	.LCPI3_14(%rip), %xmm0
	jne	.LBB3_29
	jp	.LBB3_29
# %bb.28:
	movl	$.L.str.10, %esi
	movl	$7, %edx
	jmp	.LBB3_30
.LBB3_29:
	movl	$.L.str.11, %esi
	movl	$9, %edx
.LBB3_30:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorl	%eax, %eax
	addq	$144, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13CompareKernelPfPd, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z31SinglePrecisionOperationsKernelPfS_S_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z31DoublePrecisionOperationsKernelPdS_S_S_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13CompareKernelPfPd,@object   # @_Z13CompareKernelPfPd
	.section	.rodata,"a",@progbits
	.globl	_Z13CompareKernelPfPd
	.p2align	3, 0x0
_Z13CompareKernelPfPd:
	.quad	_Z28__device_stub__CompareKernelPfPd
	.size	_Z13CompareKernelPfPd, 8

	.type	_Z31SinglePrecisionOperationsKernelPfS_S_S_,@object # @_Z31SinglePrecisionOperationsKernelPfS_S_S_
	.globl	_Z31SinglePrecisionOperationsKernelPfS_S_S_
	.p2align	3, 0x0
_Z31SinglePrecisionOperationsKernelPfS_S_S_:
	.quad	_Z46__device_stub__SinglePrecisionOperationsKernelPfS_S_S_
	.size	_Z31SinglePrecisionOperationsKernelPfS_S_S_, 8

	.type	_Z31DoublePrecisionOperationsKernelPdS_S_S_,@object # @_Z31DoublePrecisionOperationsKernelPdS_S_S_
	.globl	_Z31DoublePrecisionOperationsKernelPdS_S_S_
	.p2align	3, 0x0
_Z31DoublePrecisionOperationsKernelPdS_S_S_:
	.quad	_Z46__device_stub__DoublePrecisionOperationsKernelPdS_S_S_
	.size	_Z31DoublePrecisionOperationsKernelPdS_S_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Single point float precision number in host: "
	.size	.L.str, 46

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\n"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Single point float precision number in device: "
	.size	.L.str.2, 48

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Equal\n"
	.size	.L.str.3, 7

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Unequal\n"
	.size	.L.str.4, 9

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Double point float precision number in host: "
	.size	.L.str.5, 46

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Double point float precision number in device: "
	.size	.L.str.6, 48

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"\nNow performing single point precision operations:\n\n"
	.size	.L.str.7, 53

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Single point precision addition in host: "
	.size	.L.str.8, 42

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Single point precision addition in device: "
	.size	.L.str.9, 44

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Equal\n\n"
	.size	.L.str.10, 8

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Unequal\n\n"
	.size	.L.str.11, 10

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Single point precision subtraction in host: "
	.size	.L.str.12, 45

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"Single point precision subtraction in device: "
	.size	.L.str.13, 47

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Single point precision multiplication in host: "
	.size	.L.str.14, 48

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Single point precision multiplication in device: "
	.size	.L.str.15, 50

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"Single point precision division in host: "
	.size	.L.str.16, 42

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"Single point precision division in device: "
	.size	.L.str.17, 44

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"Now performing double point precision operations:\n\n"
	.size	.L.str.18, 52

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"Double point precision addition in host: "
	.size	.L.str.19, 42

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"Double point precision addition in device: "
	.size	.L.str.20, 44

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"Double point precision subtraction in host: "
	.size	.L.str.21, 45

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"Double point precision subtraction in device: "
	.size	.L.str.22, 47

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"Double point precision multiplication in host: "
	.size	.L.str.23, 48

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"Double point precision multiplication in device: "
	.size	.L.str.24, 50

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"Double point precision division in host: "
	.size	.L.str.25, 42

	.type	.L.str.26,@object               # @.str.26
.L.str.26:
	.asciz	"Double point precision division in device: "
	.size	.L.str.26, 44

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13CompareKernelPfPd"
	.size	.L__unnamed_1, 22

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z31SinglePrecisionOperationsKernelPfS_S_S_"
	.size	.L__unnamed_2, 44

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z31DoublePrecisionOperationsKernelPdS_S_S_"
	.size	.L__unnamed_3, 44

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__CompareKernelPfPd
	.addrsig_sym _Z46__device_stub__SinglePrecisionOperationsKernelPfS_S_S_
	.addrsig_sym _Z46__device_stub__DoublePrecisionOperationsKernelPdS_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13CompareKernelPfPd
	.addrsig_sym _Z31SinglePrecisionOperationsKernelPfS_S_S_
	.addrsig_sym _Z31DoublePrecisionOperationsKernelPdS_S_S_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13CompareKernelPfPd   ; -- Begin function _Z13CompareKernelPfPd
	.globl	_Z13CompareKernelPfPd
	.p2align	8
	.type	_Z13CompareKernelPfPd,@function
_Z13CompareKernelPfPd:                  ; @_Z13CompareKernelPfPd
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	v_sub_nc_u32_e32 v0, 0, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s2
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e64 s15, v0
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, 0x41a1df3b
	v_mov_b32_e32 v0, 0x6c8b4396
	v_mov_b32_e32 v1, 0x40343be7
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_store_b32 v2, v3, s[0:1]
	global_store_b64 v2, v[0:1], s[2:3]
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13CompareKernelPfPd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13CompareKernelPfPd, .Lfunc_end0-_Z13CompareKernelPfPd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 120
; NumSgprs: 16
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z31SinglePrecisionOperationsKernelPfS_S_S_ ; -- Begin function _Z31SinglePrecisionOperationsKernelPfS_S_S_
	.globl	_Z31SinglePrecisionOperationsKernelPfS_S_S_
	.p2align	8
	.type	_Z31SinglePrecisionOperationsKernelPfS_S_S_,@function
_Z31SinglePrecisionOperationsKernelPfS_S_S_: ; @_Z31SinglePrecisionOperationsKernelPfS_S_S_
; %bb.0:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x428f91ec
	v_mov_b32_e32 v2, 0x4195872a
	v_mov_b32_e32 v3, 0x44961ddd
	v_mov_b32_e32 v4, 0x3fda1f07
	s_waitcnt lgkmcnt(0)
	s_clause 0x3
	global_store_b32 v0, v1, s[0:1]
	global_store_b32 v0, v2, s[2:3]
	global_store_b32 v0, v3, s[4:5]
	global_store_b32 v0, v4, s[6:7]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z31SinglePrecisionOperationsKernelPfS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z31SinglePrecisionOperationsKernelPfS_S_S_, .Lfunc_end1-_Z31SinglePrecisionOperationsKernelPfS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 96
; NumSgprs: 8
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z31DoublePrecisionOperationsKernelPdS_S_S_ ; -- Begin function _Z31DoublePrecisionOperationsKernelPdS_S_S_
	.globl	_Z31DoublePrecisionOperationsKernelPdS_S_S_
	.p2align	8
	.type	_Z31DoublePrecisionOperationsKernelPdS_S_S_,@function
_Z31DoublePrecisionOperationsKernelPdS_S_S_: ; @_Z31DoublePrecisionOperationsKernelPdS_S_S_
; %bb.0:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v1, 0x40603893
	v_mov_b32_e32 v0, 0x74bc6a7f
	v_mov_b32_e32 v2, 0x6a7ef9da
	v_mov_b32_e32 v3, 0x403274bc
	v_mov_b32_e32 v4, 0x867ad8e
	v_mov_b32_e32 v5, 0x40b01cc7
	v_mov_b32_e32 v6, 0xaa011a9a
	v_mov_b32_e32 v7, 0x3ff54e44
	s_waitcnt lgkmcnt(0)
	s_clause 0x3
	global_store_b64 v8, v[0:1], s[0:1]
	global_store_b64 v8, v[2:3], s[2:3]
	global_store_b64 v8, v[4:5], s[4:5]
	global_store_b64 v8, v[6:7], s[6:7]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z31DoublePrecisionOperationsKernelPdS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z31DoublePrecisionOperationsKernelPdS_S_S_, .Lfunc_end2-_Z31DoublePrecisionOperationsKernelPdS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 128
; NumSgprs: 8
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13CompareKernelPfPd
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z13CompareKernelPfPd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z31SinglePrecisionOperationsKernelPfS_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z31SinglePrecisionOperationsKernelPfS_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z31DoublePrecisionOperationsKernelPdS_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z31DoublePrecisionOperationsKernelPdS_S_S_.kd
    .uniform_work_group_size: 1
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    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
