/*
Authors
- Dibyadarshan Hota 16CO154
- Omkar Prabhu 16CO233
*/
#include <iostream>
#include <stdio.h>
#include <sstream>
#include <string.h>
#include <cuda.h>

#define ll long long 

using namespace std;

/**
 * Kernel for computing Betweenness Centrality
 * res: Stored in global memory variable bc
 */
__global__
void betweenness_centrality_kernel (int nodes, int *C, int *R, int *d, int *sigma, float *delta, float *bc, int *reverse_stack, int *finish_limit) {
    // ================================== VARIABLES INIT ============================================
    // initial variables
    __shared__ int position;
    __shared__ int s;
    __shared__ int finish_limit_position;
    
    // source variable initially 0
    int idx = threadIdx.x;
    if (idx == 0) {
        s = 0;
    }
    __syncthreads();
    
    // move through all nodes
    while (s < nodes) {
        __syncthreads();
        
        // ============================== distance, delta and sigma INIT ============================================
        for(int v=idx; v<nodes; v+=blockDim.x) {
            if(v == s) {
                d[v] = 0;
                sigma[v] = 1;
            }
            else {
                d[v] = INT_MAX;
                sigma[v] = 0;
            }
            delta[v] = 0;
        }
        __syncthreads();
        __shared__ int current_depth;
        __shared__ bool done;
        if(idx == 0) {
            done = false;
            current_depth = 0;
            position = 0;
            finish_limit_position = 1;
            finish_limit[0] = 0;
        }
        __syncthreads();
        
        // ============================== Shortest Path Calculation using curr source ======================
        // ============================== Using Vertex Parallel ============================================  
        while(!done)
        {   // wait
            __syncthreads();
            done = true;
            __syncthreads();
            // move through modes
            for(int v=idx; v<nodes; v+=blockDim.x) {
                if(d[v] == current_depth) {
                    // add to reverse_stack 
                    int t = atomicAdd(&position,1);
                    reverse_stack[t] = v;
                    // move through neighbours
                    for(int r=R[v]; r<R[v+1]; r++) {
                        int w = C[r];
                        // if not visited
                        if(d[w] == INT_MAX) {
                            d[w] = d[v] + 1;
                            done = false;
                        }
                        // add number of paths
                        if(d[w] == (d[v] + 1)) {
                            atomicAdd(&sigma[w],sigma[v]);
                        }
                    }
                }
            }
            __syncthreads();
            // increment variables
            if(idx == 0){
                current_depth++;
                finish_limit[finish_limit_position] = position;
                ++finish_limit_position;
            }
        }


        // ============================== BC calculation using Brande's Algorithm ============================================

        // Parallel Vertex Parallel implementation   
        // __syncthreads();
        if(idx == 0){
            finish_limit_position-=2;
            // printf("%d %d %d<--", finish_limit_position, finish_limit[finish_limit_position], finish_limit[finish_limit_position+1]);
            // for(int a1=0;a1<=finish_limit_position+1;++a1) printf("%d-", finish_limit[a1]);
            // printf("\n");
            // for(int a1=0;a1<nodes;++a1) printf("%d<", reverse_stack[a1]);
            // cout<<"\n";
            // printf("\n");
        } 
        __syncthreads();
	    //atomicSub(&finish_limit_position,2);
        for(int itr1 = finish_limit_position; itr1 >= 0; --itr1){
            // __syncthreads();
		    for(int itr2 = finish_limit[itr1] + idx; itr2 < finish_limit[itr1+1]; itr2+=blockDim.x){
                // reverse_stack[itr2] is one node
                for(int itr3 = R[reverse_stack[itr2]]; itr3 < R[reverse_stack[itr2] + 1]; ++itr3){
                    int consider = C[itr3];
                    // C[itr3] other node
                    if(d[consider] == d[reverse_stack[itr2]]+1){
                        //atomicAdd(&delta[consider], ( ((float)sigma[consider]/sigma[reverse_stack[itr2]]) * ((float)1 + delta[reverse_stack[itr2]]) )); 
                        delta[reverse_stack[itr2]] += ( ((float)sigma[reverse_stack[itr2]]/sigma[consider]) * ((float)1 + delta[consider]) );
                    }
                }
                if(reverse_stack[itr2] != s){
                    bc[reverse_stack[itr2]] += delta[reverse_stack[itr2]];
                }

            }
            __syncthreads();
        }

        // Serialized Vertex Parallel implementation

        // if(idx == 0){
            
        //     for(int itr1 = nodes - 1; itr1 >= 0; --itr1){
        //         for(int itr2 = R[reverse_stack[itr1]]; itr2 < R[reverse_stack[itr1] + 1]; ++itr2){
        //             int consider = C[itr2];
        //             if(d[consider] == d[reverse_stack[itr1]]-1){
        //                 delta[consider] += ( ((float)sigma[consider]/sigma[reverse_stack[itr1]]) * ((float)1 + delta[reverse_stack[itr1]]) ); 
        //             }
        //         }
        //         if(reverse_stack[itr1] != s){
        //             bc[reverse_stack[itr1]] += delta[reverse_stack[itr1]];
        //         }
        //     }
        // }

        // increment 
        __syncthreads();
        if (idx == 0) {
            s += 1;
        }
       
    }
}


/**
 * Main function
 */
int main () {

    // ================================ READ INPUT AND MAKE Compressed Adjancency List ====================================
    // freopen("graph", "r", stdin);

    // nodes and edges
    int nodes, edges;
    cin>>nodes>>edges;

    // compressed adjancency list
    int * V = new int[nodes + 1];
    int * E = new int[2 * edges];
    // read graph data in CSR format 
    string line;
    int node = 0;
    int counter = 0;
    getline(cin, line);
    for (int i = 0; i < nodes; ++i) {
        getline(cin, line);
        V[node] = counter;
        istringstream is(line);
        int tmp;
        while (is >> tmp) {
            E[counter] = tmp;
            counter += 1;
        }
        ++node;
    }
    V[node] = counter;
    
    // cout<<"\n";
    // for (int i = 0; i <= nodes; i++) {
    //     cout<<V[i]<<" ";
    // }
    // cout<<"\n";
    // for (int i = 0; i < 2 * edges; ++i) {
    //     cout<<E[i]<<" ";
    // }
    // cout<<"\n";

    // ================================ DECLARE AND INIT VARIABLES ====================================
    int *d = new int[nodes];
    int *sigma = new int[nodes];
    float *delta = new float[nodes];
    float *bc = new float[nodes];

    memset(bc,0,sizeof(bc));

    int *d_d, *d_sigma, *d_V, *d_E, *d_reverse_stack, *d_end_point;
    float *d_delta, *d_bc;

    cudaMalloc((void**)&d_d, sizeof(int) * nodes);
    cudaMalloc((void**)&d_end_point, sizeof(int) * (nodes + 1));
    cudaMalloc((void**)&d_sigma, sizeof(int) * nodes);
    cudaMalloc((void**)&d_reverse_stack, sizeof(int) * nodes);
    cudaMalloc((void**)&d_V, sizeof(int) * (nodes + 1));
    cudaMalloc((void**)&d_E, sizeof(int) * (2*edges));
    cudaMalloc((void**)&d_delta, sizeof(float) * nodes);
    cudaMalloc((void**)&d_bc, sizeof(float) * nodes);

    cudaMemcpy(d_V, V, sizeof(int) * (nodes+1), cudaMemcpyHostToDevice);
    cudaMemcpy(d_E, E, sizeof(int) * (2*edges), cudaMemcpyHostToDevice);
    cudaMemcpy(d_bc, bc, sizeof(float) * (nodes), cudaMemcpyHostToDevice);    
    // cudaMemcpy(d_delta, delta, sizeof(float) * (nodes), cudaMemcpyHostToDevice);
    
    // ================================ KERNEL PARAMS AND CALL ====================================

    float elapsed_time;
    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);
    cudaEventRecord(start, 0);
    // kernel call
    betweenness_centrality_kernel <<<1, 1024>>> (nodes, d_E, d_V, d_d, d_sigma, d_delta, d_bc, d_reverse_stack, d_end_point);
    cudaEventRecord(stop, 0);
    cudaEventSynchronize(stop);
    cudaEventElapsedTime(&elapsed_time, start, stop);

    // ================================ RESULT ====================================

    // cudaMemcpy(d, d_d, sizeof(float) * nodes, cudaMemcpyDeviceToHost);
    // cudaMemcpy(sigma, d_sigma, sizeof(float) * nodes, cudaMemcpyDeviceToHost);
    cudaMemcpy(bc, d_bc, sizeof(float) * nodes, cudaMemcpyDeviceToHost);
    // cudaMemcpy(delta, d_delta, sizeof(float) * nodes, cudaMemcpyDeviceToHost);

    cout<<"Result: \n";
    // for (int i = 0; i < nodes; i++) {
    //     cout<<"Node: "<<i<<" BC: "<<fixed<<setprecision(6)<<bc[i]/2.0<<"\n";
    // }
    cout<<"\n";
    // Print the time for execution
    cout<<"Execution time: "<<elapsed_time/1000.0<<endl;

    // Maximum BC value
    float max_bc = 0.0;
    for (int i = 0; i < nodes; ++i) {
        max_bc = (bc[i] > max_bc) ? bc[i] : max_bc;
    }
    cout<<"Max BC value: "<<max_bc/2.0<<endl;

    // ================================ MEMORY RELEASE ====================================
    cudaFree(d_sigma);
    cudaFree(d_d);
    cudaFree(d_V);
    cudaFree(d_E);
    cudaFree(d_delta);
    cudaFree(d_bc);
    cudaFree(d_reverse_stack);
    cudaFree(d_end_point);

    free(E);
    free(V);
    free(d);
    free(sigma);
    free(delta);
    free(bc);

    return 0;
}

	.file	"tmpxft_0026977c_00000000-6_main_vertex_parallel.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3697:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3697:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0, @function
_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0:
.LFB4400:
	.cfi_startproc
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	(%rdi), %rax
	movq	-24(%rax), %rax
	movq	240(%rdi,%rax), %rbx
	testq	%rbx, %rbx
	jne	.L3
	call	_ZSt16__throw_bad_castv@PLT
.L3:
	cmpb	$0, 56(%rbx)
	movq	%rdi, %rbp
	movq	%rsi, %r12
	je	.L4
	movb	67(%rbx), %al
	jmp	.L5
.L4:
	movq	%rbx, %rdi
	call	_ZNKSt5ctypeIcE13_M_widen_initEv@PLT
	movq	(%rbx), %rax
	movl	$10, %esi
	movq	%rbx, %rdi
	call	*48(%rax)
.L5:
	popq	%rbx
	.cfi_def_cfa_offset 24
	movq	%r12, %rsi
	movq	%rbp, %rdi
	movsbl	%al, %edx
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_@PLT
	.cfi_endproc
.LFE4400:
	.size	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0, .-_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0
	.globl	_Z65__device_stub__Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_iPiS_S_S_PfS0_S_S_
	.type	_Z65__device_stub__Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_iPiS_S_S_PfS0_S_S_, @function
_Z65__device_stub__Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_iPiS_S_S_PfS0_S_S_:
.LFB3719:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	240(%rsp), %rax
	movl	%edi, 76(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	108(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	248(%rsp), %rax
	movq	%rdx, 56(%rsp)
	leaq	80(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	256(%rsp), %rax
	movq	%rcx, 48(%rsp)
	leaq	88(%rsp), %rcx
	movq	%r8, 40(%rsp)
	movq	%r9, 32(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	76(%rsp), %rax
	movl	$1, 104(%rsp)
	movq	%rax, 144(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 96(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	88(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 256
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	160(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L8:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3719:
	.size	_Z65__device_stub__Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_iPiS_S_S_PfS0_S_S_, .-_Z65__device_stub__Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_iPiS_S_S_PfS0_S_S_
	.globl	_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_
	.type	_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_, @function
_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_:
.LFB3720:
	.cfi_startproc
	endbr64
	jmp	_Z65__device_stub__Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_iPiS_S_S_PfS0_S_S_
	.cfi_endproc
.LFE3720:
	.size	_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_, .-_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3722:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3722:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC2:
	.string	"Result: \n"
.LC3:
	.string	"\n"
.LC4:
	.string	"Execution time: "
.LC6:
	.string	"Max BC value: "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3693:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3693
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	leaq	_ZSt3cin(%rip), %r14
	leaq	-584(%rbp), %rsi
	pushq	%r13
	movq	%r14, %rdi
	pushq	%r12
	pushq	%rbx
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movabsq	$2305843009213693950, %rbx
	subq	$584, %rsp
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
.LEHB0:
	call	_ZNSirsERi@PLT
	leaq	-580(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSirsERi@PLT
	movl	-584(%rbp), %eax
	leal	1(%rax), %edi
	movslq	%edi, %rdi
	cmpq	%rdi, %rbx
	jb	.L16
	salq	$2, %rdi
	call	_Znam@PLT
	movq	%rax, %r12
	movl	-580(%rbp), %eax
	leal	(%rax,%rax), %edi
	movslq	%edi, %rdi
	cmpq	%rdi, %rbx
	jnb	.L17
.L16:
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L40
	call	__cxa_throw_bad_array_new_length@PLT
.L17:
	salq	$2, %rdi
	call	_Znam@PLT
.LEHE0:
	xorl	%ecx, %ecx
	movq	%r14, %rdi
	movb	$0, -456(%rbp)
	movq	%rax, %r13
	leaq	-472(%rbp), %rax
	movq	%rcx, -464(%rbp)
	movq	%rax, -608(%rbp)
	movq	-608(%rbp), %rsi
	leaq	-456(%rbp), %rax
	movq	%rax, -472(%rbp)
.LEHB1:
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0
	xorl	%edx, %edx
	xorl	%ebx, %ebx
	leaq	-484(%rbp), %r15
	movq	%rdx, -600(%rbp)
.L19:
	movl	-584(%rbp), %eax
	movslq	-600(%rbp), %rcx
	cmpl	%ecx, %eax
	jle	.L43
	movq	-608(%rbp), %rsi
	movq	%r14, %rdi
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0
	movq	-600(%rbp), %rax
	movq	-608(%rbp), %rsi
	movl	$8, %edx
	movl	%ebx, (%r12,%rax,4)
	leaq	-440(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -616(%rbp)
	call	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEC1ERKNS_12basic_stringIcS2_S3_EESt13_Ios_Openmode@PLT
.LEHE1:
	movslq	%ebx, %rbx
.L20:
	movq	-616(%rbp), %rdi
	movq	%r15, %rsi
.LEHB2:
	call	_ZNSirsERi@PLT
.LEHE2:
	movq	(%rax), %rdx
	movq	-24(%rdx), %rdx
	testb	$5, 32(%rax,%rdx)
	jne	.L44
	movl	-484(%rbp), %eax
	movl	%eax, 0(%r13,%rbx,4)
	incq	%rbx
	jmp	.L20
.L44:
	movq	-616(%rbp), %rdi
	call	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
	incq	-600(%rbp)
	jmp	.L19
.L43:
	movl	%ebx, (%r12,%rcx,4)
	movslq	%eax, %rbx
	movabsq	$2305843009213693950, %rax
	cmpq	%rbx, %rax
	jnb	.L23
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L40
.LEHB3:
	call	__cxa_throw_bad_array_new_length@PLT
.L23:
	salq	$2, %rbx
	movq	%rbx, %rdi
	call	_Znam@PLT
	xorl	%esi, %esi
	movq	%rax, %rdi
	movq	%rbx, %rcx
	movl	$8, %edx
	movq	%rax, %r14
	call	__memset_chk@PLT
	movslq	-584(%rbp), %rsi
	leaq	-576(%rbp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	-584(%rbp), %eax
	leaq	-536(%rbp), %rdi
	leal	1(%rax), %esi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	-584(%rbp), %rsi
	leaq	-568(%rbp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	-584(%rbp), %rsi
	leaq	-544(%rbp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	-584(%rbp), %eax
	leaq	-560(%rbp), %rdi
	leal	1(%rax), %esi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	-580(%rbp), %eax
	leaq	-552(%rbp), %rdi
	leal	(%rax,%rax), %esi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	-584(%rbp), %rsi
	leaq	-528(%rbp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	-584(%rbp), %rsi
	leaq	-520(%rbp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	-584(%rbp), %eax
	movq	-560(%rbp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	leal	1(%rax), %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	-580(%rbp), %eax
	movq	-552(%rbp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	leal	(%rax,%rax), %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	-584(%rbp), %rdx
	movq	-520(%rbp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	leaq	-512(%rbp), %rdi
	call	cudaEventCreate@PLT
	leaq	-504(%rbp), %rdi
	call	cudaEventCreate@PLT
	movq	-512(%rbp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$10, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, -476(%rbp)
	movq	%rdx, -484(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L25
.L27:
	movq	-504(%rbp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	jmp	.L45
.L25:
	pushq	%rax
	movl	-584(%rbp), %edi
	pushq	-536(%rbp)
	pushq	-544(%rbp)
	movq	-568(%rbp), %r8
	pushq	-520(%rbp)
	movq	-576(%rbp), %rcx
	movq	-528(%rbp), %r9
	movq	-560(%rbp), %rdx
	movq	-552(%rbp), %rsi
	.cfi_escape 0x2e,0x20
	call	_Z65__device_stub__Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_iPiS_S_S_PfS0_S_S_
	addq	$32, %rsp
	jmp	.L27
.L45:
	movq	-504(%rbp), %rdi
	.cfi_escape 0x2e,0
	call	cudaEventSynchronize@PLT
	movq	-504(%rbp), %rdx
	movq	-512(%rbp), %rsi
	movq	%r15, %rdi
	call	cudaEventElapsedTime@PLT
	movslq	-584(%rbp), %rdx
	movq	-520(%rbp), %rsi
	movl	$2, %ecx
	movq	%r14, %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	leaq	_ZSt4cout(%rip), %rbx
	leaq	.LC2(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	cvtss2sd	-484(%rbp), %xmm0
	divsd	.LC5(%rip), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$0x00000000, -600(%rbp)
	movl	-584(%rbp), %edx
	xorl	%eax, %eax
.L28:
	cmpl	%eax, %edx
	jle	.L46
	movss	(%r14,%rax,4), %xmm0
	maxss	-600(%rbp), %xmm0
	incq	%rax
	movss	%xmm0, -600(%rbp)
	jmp	.L28
.L46:
	leaq	.LC6(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	-600(%rbp), %xmm0
	mulsd	.LC7(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	-568(%rbp), %rdi
	call	cudaFree@PLT
	movq	-576(%rbp), %rdi
	call	cudaFree@PLT
	movq	-560(%rbp), %rdi
	call	cudaFree@PLT
	movq	-552(%rbp), %rdi
	call	cudaFree@PLT
	movq	-528(%rbp), %rdi
	call	cudaFree@PLT
	movq	-520(%rbp), %rdi
	call	cudaFree@PLT
	movq	-544(%rbp), %rdi
	call	cudaFree@PLT
	movq	-536(%rbp), %rdi
	call	cudaFree@PLT
.LEHE3:
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	leaq	-472(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L34
	jmp	.L40
.L37:
	endbr64
	movq	%rax, %rbx
.L31:
	movq	-616(%rbp), %rdi
	call	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
	jmp	.L32
.L36:
	endbr64
	movq	%rax, %rbx
.L32:
	movq	-608(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L40
	movq	%rbx, %rdi
.LEHB4:
	call	_Unwind_Resume@PLT
.LEHE4:
.L40:
	call	__stack_chk_fail@PLT
.L34:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3693:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3693:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3693-.LLSDACSB3693
.LLSDACSB3693:
	.uleb128 .LEHB0-.LFB3693
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3693
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L36-.LFB3693
	.uleb128 0
	.uleb128 .LEHB2-.LFB3693
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L37-.LFB3693
	.uleb128 0
	.uleb128 .LEHB3-.LFB3693
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L36-.LFB3693
	.uleb128 0
	.uleb128 .LEHB4-.LFB3693
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
.LLSDACSE3693:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1083129856
	.align 8
.LC7:
	.long	0
	.long	1071644672
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
Authors
- Dibyadarshan Hota 16CO154
- Omkar Prabhu 16CO233
*/
#include <iostream>
#include <stdio.h>
#include <sstream>
#include <string.h>
#include <hip/hip_runtime.h>

#define ll long long 

using namespace std;

/**
 * Kernel for computing Betweenness Centrality
 * res: Stored in global memory variable bc
 */
__global__
void betweenness_centrality_kernel (int nodes, int *C, int *R, int *d, int *sigma, float *delta, float *bc, int *reverse_stack, int *finish_limit) {
    // ================================== VARIABLES INIT ============================================
    // initial variables
    __shared__ int position;
    __shared__ int s;
    __shared__ int finish_limit_position;
    
    // source variable initially 0
    int idx = threadIdx.x;
    if (idx == 0) {
        s = 0;
    }
    __syncthreads();
    
    // move through all nodes
    while (s < nodes) {
        __syncthreads();
        
        // ============================== distance, delta and sigma INIT ============================================
        for(int v=idx; v<nodes; v+=blockDim.x) {
            if(v == s) {
                d[v] = 0;
                sigma[v] = 1;
            }
            else {
                d[v] = INT_MAX;
                sigma[v] = 0;
            }
            delta[v] = 0;
        }
        __syncthreads();
        __shared__ int current_depth;
        __shared__ bool done;
        if(idx == 0) {
            done = false;
            current_depth = 0;
            position = 0;
            finish_limit_position = 1;
            finish_limit[0] = 0;
        }
        __syncthreads();
        
        // ============================== Shortest Path Calculation using curr source ======================
        // ============================== Using Vertex Parallel ============================================  
        while(!done)
        {   // wait
            __syncthreads();
            done = true;
            __syncthreads();
            // move through modes
            for(int v=idx; v<nodes; v+=blockDim.x) {
                if(d[v] == current_depth) {
                    // add to reverse_stack 
                    int t = atomicAdd(&position,1);
                    reverse_stack[t] = v;
                    // move through neighbours
                    for(int r=R[v]; r<R[v+1]; r++) {
                        int w = C[r];
                        // if not visited
                        if(d[w] == INT_MAX) {
                            d[w] = d[v] + 1;
                            done = false;
                        }
                        // add number of paths
                        if(d[w] == (d[v] + 1)) {
                            atomicAdd(&sigma[w],sigma[v]);
                        }
                    }
                }
            }
            __syncthreads();
            // increment variables
            if(idx == 0){
                current_depth++;
                finish_limit[finish_limit_position] = position;
                ++finish_limit_position;
            }
        }


        // ============================== BC calculation using Brande's Algorithm ============================================

        // Parallel Vertex Parallel implementation   
        // __syncthreads();
        if(idx == 0){
            finish_limit_position-=2;
            // printf("%d %d %d<--", finish_limit_position, finish_limit[finish_limit_position], finish_limit[finish_limit_position+1]);
            // for(int a1=0;a1<=finish_limit_position+1;++a1) printf("%d-", finish_limit[a1]);
            // printf("\n");
            // for(int a1=0;a1<nodes;++a1) printf("%d<", reverse_stack[a1]);
            // cout<<"\n";
            // printf("\n");
        } 
        __syncthreads();
	    //atomicSub(&finish_limit_position,2);
        for(int itr1 = finish_limit_position; itr1 >= 0; --itr1){
            // __syncthreads();
		    for(int itr2 = finish_limit[itr1] + idx; itr2 < finish_limit[itr1+1]; itr2+=blockDim.x){
                // reverse_stack[itr2] is one node
                for(int itr3 = R[reverse_stack[itr2]]; itr3 < R[reverse_stack[itr2] + 1]; ++itr3){
                    int consider = C[itr3];
                    // C[itr3] other node
                    if(d[consider] == d[reverse_stack[itr2]]+1){
                        //atomicAdd(&delta[consider], ( ((float)sigma[consider]/sigma[reverse_stack[itr2]]) * ((float)1 + delta[reverse_stack[itr2]]) )); 
                        delta[reverse_stack[itr2]] += ( ((float)sigma[reverse_stack[itr2]]/sigma[consider]) * ((float)1 + delta[consider]) );
                    }
                }
                if(reverse_stack[itr2] != s){
                    bc[reverse_stack[itr2]] += delta[reverse_stack[itr2]];
                }

            }
            __syncthreads();
        }

        // Serialized Vertex Parallel implementation

        // if(idx == 0){
            
        //     for(int itr1 = nodes - 1; itr1 >= 0; --itr1){
        //         for(int itr2 = R[reverse_stack[itr1]]; itr2 < R[reverse_stack[itr1] + 1]; ++itr2){
        //             int consider = C[itr2];
        //             if(d[consider] == d[reverse_stack[itr1]]-1){
        //                 delta[consider] += ( ((float)sigma[consider]/sigma[reverse_stack[itr1]]) * ((float)1 + delta[reverse_stack[itr1]]) ); 
        //             }
        //         }
        //         if(reverse_stack[itr1] != s){
        //             bc[reverse_stack[itr1]] += delta[reverse_stack[itr1]];
        //         }
        //     }
        // }

        // increment 
        __syncthreads();
        if (idx == 0) {
            s += 1;
        }
       
    }
}


/**
 * Main function
 */
int main () {

    // ================================ READ INPUT AND MAKE Compressed Adjancency List ====================================
    // freopen("graph", "r", stdin);

    // nodes and edges
    int nodes, edges;
    cin>>nodes>>edges;

    // compressed adjancency list
    int * V = new int[nodes + 1];
    int * E = new int[2 * edges];
    // read graph data in CSR format 
    string line;
    int node = 0;
    int counter = 0;
    getline(cin, line);
    for (int i = 0; i < nodes; ++i) {
        getline(cin, line);
        V[node] = counter;
        istringstream is(line);
        int tmp;
        while (is >> tmp) {
            E[counter] = tmp;
            counter += 1;
        }
        ++node;
    }
    V[node] = counter;
    
    // cout<<"\n";
    // for (int i = 0; i <= nodes; i++) {
    //     cout<<V[i]<<" ";
    // }
    // cout<<"\n";
    // for (int i = 0; i < 2 * edges; ++i) {
    //     cout<<E[i]<<" ";
    // }
    // cout<<"\n";

    // ================================ DECLARE AND INIT VARIABLES ====================================
    int *d = new int[nodes];
    int *sigma = new int[nodes];
    float *delta = new float[nodes];
    float *bc = new float[nodes];

    memset(bc,0,sizeof(bc));

    int *d_d, *d_sigma, *d_V, *d_E, *d_reverse_stack, *d_end_point;
    float *d_delta, *d_bc;

    hipMalloc((void**)&d_d, sizeof(int) * nodes);
    hipMalloc((void**)&d_end_point, sizeof(int) * (nodes + 1));
    hipMalloc((void**)&d_sigma, sizeof(int) * nodes);
    hipMalloc((void**)&d_reverse_stack, sizeof(int) * nodes);
    hipMalloc((void**)&d_V, sizeof(int) * (nodes + 1));
    hipMalloc((void**)&d_E, sizeof(int) * (2*edges));
    hipMalloc((void**)&d_delta, sizeof(float) * nodes);
    hipMalloc((void**)&d_bc, sizeof(float) * nodes);

    hipMemcpy(d_V, V, sizeof(int) * (nodes+1), hipMemcpyHostToDevice);
    hipMemcpy(d_E, E, sizeof(int) * (2*edges), hipMemcpyHostToDevice);
    hipMemcpy(d_bc, bc, sizeof(float) * (nodes), hipMemcpyHostToDevice);    
    // cudaMemcpy(d_delta, delta, sizeof(float) * (nodes), cudaMemcpyHostToDevice);
    
    // ================================ KERNEL PARAMS AND CALL ====================================

    float elapsed_time;
    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);
    hipEventRecord(start, 0);
    // kernel call
    betweenness_centrality_kernel <<<1, 1024>>> (nodes, d_E, d_V, d_d, d_sigma, d_delta, d_bc, d_reverse_stack, d_end_point);
    hipEventRecord(stop, 0);
    hipEventSynchronize(stop);
    hipEventElapsedTime(&elapsed_time, start, stop);

    // ================================ RESULT ====================================

    // cudaMemcpy(d, d_d, sizeof(float) * nodes, cudaMemcpyDeviceToHost);
    // cudaMemcpy(sigma, d_sigma, sizeof(float) * nodes, cudaMemcpyDeviceToHost);
    hipMemcpy(bc, d_bc, sizeof(float) * nodes, hipMemcpyDeviceToHost);
    // cudaMemcpy(delta, d_delta, sizeof(float) * nodes, cudaMemcpyDeviceToHost);

    cout<<"Result: \n";
    // for (int i = 0; i < nodes; i++) {
    //     cout<<"Node: "<<i<<" BC: "<<fixed<<setprecision(6)<<bc[i]/2.0<<"\n";
    // }
    cout<<"\n";
    // Print the time for execution
    cout<<"Execution time: "<<elapsed_time/1000.0<<endl;

    // Maximum BC value
    float max_bc = 0.0;
    for (int i = 0; i < nodes; ++i) {
        max_bc = (bc[i] > max_bc) ? bc[i] : max_bc;
    }
    cout<<"Max BC value: "<<max_bc/2.0<<endl;

    // ================================ MEMORY RELEASE ====================================
    hipFree(d_sigma);
    hipFree(d_d);
    hipFree(d_V);
    hipFree(d_E);
    hipFree(d_delta);
    hipFree(d_bc);
    hipFree(d_reverse_stack);
    hipFree(d_end_point);

    free(E);
    free(V);
    free(d);
    free(sigma);
    free(delta);
    free(bc);

    return 0;
}

	.text
	.file	"main_vertex_parallel.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z44__device_stub__betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_ # -- Begin function _Z44__device_stub__betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_
	.type	_Z44__device_stub__betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_,@function
_Z44__device_stub__betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_: # @_Z44__device_stub__betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z44__device_stub__betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_, .Lfunc_end0-_Z44__device_stub__betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x408f400000000000              # double 1000
.LCPI1_1:
	.quad	0x3fe0000000000000              # double 0.5
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$536, %rsp                      # imm = 0x218
	.cfi_def_cfa_offset 592
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	.cfi_escape 0x2e, 0x00
	movl	$_ZSt3cin, %r15d
	leaq	8(%rsp), %rbx
	movl	$_ZSt3cin, %edi
	movq	%rbx, %rsi
	callq	_ZNSirsERi
	.cfi_escape 0x2e, 0x00
	leaq	12(%rsp), %r14
	movq	%rax, %rdi
	movq	%r14, %rsi
	callq	_ZNSirsERi
	movslq	(%rbx), %rax
	movq	$-1, %rbx
	cmpq	%rbx, %rax
	leaq	4(,%rax,4), %rdi
	cmovlq	%rbx, %rdi
	.cfi_escape 0x2e, 0x00
	callq	_Znam
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movslq	(%r14), %rax
	leaq	(,%rax,8), %rdi
	testq	%rax, %rax
	cmovsq	%rbx, %rdi
	.cfi_escape 0x2e, 0x00
	callq	_Znam
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	leaq	136(%rsp), %rax
	movq	%rax, -16(%rax)
	movq	$0, -8(%rax)
	movb	$0, (%rax)
	movq	_ZSt3cin(%rip), %rax
	addq	-24(%rax), %r15
.Ltmp0:
	.cfi_escape 0x2e, 0x00
	movq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp1:
# %bb.1:                                # %.noexc
.Ltmp2:
	.cfi_escape 0x2e, 0x00
	movsbl	%al, %edx
	leaq	120(%rsp), %rsi
	movl	$_ZSt3cin, %edi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp3:
# %bb.2:                                # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit.preheader
	movl	8(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB1_3
# %bb.39:                               # %.lr.ph
	xorl	%r14d, %r14d
	leaq	120(%rsp), %r12
	leaq	152(%rsp), %r13
	leaq	32(%rsp), %rbp
	xorl	%ebx, %ebx
.LBB1_40:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_44 Depth 2
	movq	_ZSt3cin(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt3cin, %eax
	addq	%rax, %rdi
.Ltmp5:
	.cfi_escape 0x2e, 0x00
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp6:
# %bb.41:                               # %.noexc63
                                        #   in Loop: Header=BB1_40 Depth=1
.Ltmp7:
	.cfi_escape 0x2e, 0x00
	movsbl	%al, %edx
	movl	$_ZSt3cin, %edi
	movq	%r12, %rsi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp8:
# %bb.42:                               # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit65
                                        #   in Loop: Header=BB1_40 Depth=1
	movq	16(%rsp), %rax                  # 8-byte Reload
	movl	%ebx, (%rax,%r14,4)
.Ltmp10:
	.cfi_escape 0x2e, 0x00
	movq	%r13, %rdi
	movq	%r12, %rsi
	movl	$8, %edx
	callq	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEC1ERKNS_12basic_stringIcS2_S3_EESt13_Ios_Openmode
.Ltmp11:
# %bb.43:                               #   in Loop: Header=BB1_40 Depth=1
	movslq	%ebx, %rax
	movq	40(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r15
.LBB1_44:                               #   Parent Loop BB1_40 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
.Ltmp13:
	.cfi_escape 0x2e, 0x00
	movq	%r13, %rdi
	movq	%rbp, %rsi
	callq	_ZNSirsERi
.Ltmp14:
# %bb.45:                               #   in Loop: Header=BB1_44 Depth=2
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	testb	$5, 32(%rax,%rcx)
	jne	.LBB1_50
# %bb.46:                               #   in Loop: Header=BB1_44 Depth=2
	movl	32(%rsp), %eax
	movl	%eax, (%r15)
	incl	%ebx
	addq	$4, %r15
	jmp	.LBB1_44
.LBB1_50:                               # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit
                                        #   in Loop: Header=BB1_40 Depth=1
	incq	%r14
	.cfi_escape 0x2e, 0x00
	movl	$_ZTTNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEE, %esi
	movq	%r13, %rdi
	callq	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED2Ev
	.cfi_escape 0x2e, 0x00
	leaq	272(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	movl	8(%rsp), %eax
	cmpl	%r14d, %eax
	jg	.LBB1_40
	jmp	.LBB1_4
.LBB1_3:
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB1_4:                                # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit._crit_edge
	movl	%r14d, %ecx
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	%ebx, (%rdx,%rcx,4)
	cltq
	leaq	(,%rax,4), %r15
	testl	%eax, %eax
	movq	$-1, %rbp
	cmovnsq	%r15, %rbp
.Ltmp16:
	.cfi_escape 0x2e, 0x00
	movq	%rbp, %rdi
	callq	_Znam
.Ltmp17:
# %bb.5:
.Ltmp19:
	movq	%rax, %rbx
	.cfi_escape 0x2e, 0x00
	movq	%rbp, %rdi
	callq	_Znam
.Ltmp20:
# %bb.6:
.Ltmp22:
	movq	%rax, %r12
	.cfi_escape 0x2e, 0x00
	movq	%rbp, %rdi
	callq	_Znam
.Ltmp23:
# %bb.7:
.Ltmp25:
	movq	%rax, %r13
	.cfi_escape 0x2e, 0x00
	movq	%rbp, %rdi
	callq	_Znam
.Ltmp26:
# %bb.8:
	movq	%rax, %rbp
	movq	$0, (%rax)
.Ltmp28:
	.cfi_escape 0x2e, 0x00
	leaq	152(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp29:
# %bb.9:
	movslq	8(%rsp), %rax
	leaq	4(,%rax,4), %rsi
.Ltmp30:
	.cfi_escape 0x2e, 0x00
	leaq	104(%rsp), %rdi
	callq	hipMalloc
.Ltmp31:
# %bb.10:
	movslq	8(%rsp), %rsi
	shlq	$2, %rsi
.Ltmp32:
	.cfi_escape 0x2e, 0x00
	leaq	32(%rsp), %rdi
	callq	hipMalloc
.Ltmp33:
# %bb.11:
	movslq	8(%rsp), %rsi
	shlq	$2, %rsi
.Ltmp34:
	.cfi_escape 0x2e, 0x00
	leaq	112(%rsp), %rdi
	callq	hipMalloc
.Ltmp35:
# %bb.12:
	movslq	8(%rsp), %rax
	leaq	4(,%rax,4), %rsi
.Ltmp36:
	.cfi_escape 0x2e, 0x00
	leaq	64(%rsp), %rdi
	callq	hipMalloc
.Ltmp37:
# %bb.13:
	movslq	12(%rsp), %rsi
	shlq	$3, %rsi
.Ltmp38:
	.cfi_escape 0x2e, 0x00
	leaq	56(%rsp), %rdi
	callq	hipMalloc
.Ltmp39:
# %bb.14:
	movslq	8(%rsp), %rsi
	shlq	$2, %rsi
.Ltmp40:
	.cfi_escape 0x2e, 0x00
	leaq	96(%rsp), %rdi
	callq	hipMalloc
.Ltmp41:
# %bb.15:
	movslq	8(%rsp), %rsi
	shlq	$2, %rsi
.Ltmp42:
	.cfi_escape 0x2e, 0x00
	leaq	24(%rsp), %rdi
	callq	hipMalloc
.Ltmp43:
# %bb.16:
	movq	64(%rsp), %rdi
	movslq	8(%rsp), %rax
	leaq	4(,%rax,4), %rdx
.Ltmp44:
	.cfi_escape 0x2e, 0x00
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp45:
# %bb.17:
	movq	56(%rsp), %rdi
	movslq	12(%rsp), %rdx
	shlq	$3, %rdx
.Ltmp46:
	.cfi_escape 0x2e, 0x00
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp47:
# %bb.18:
	movq	24(%rsp), %rdi
	movslq	8(%rsp), %rdx
	shlq	$2, %rdx
.Ltmp48:
	.cfi_escape 0x2e, 0x00
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp49:
# %bb.19:
.Ltmp51:
	.cfi_escape 0x2e, 0x00
	leaq	88(%rsp), %rdi
	callq	hipEventCreate
.Ltmp52:
# %bb.20:
.Ltmp53:
	.cfi_escape 0x2e, 0x00
	leaq	48(%rsp), %rdi
	callq	hipEventCreate
.Ltmp54:
# %bb.21:
	movq	88(%rsp), %rdi
.Ltmp55:
	.cfi_escape 0x2e, 0x00
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp56:
# %bb.22:
.Ltmp57:
	.cfi_escape 0x2e, 0x00
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$4294968320, %rdx               # imm = 0x100000400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp58:
# %bb.23:
	testl	%eax, %eax
	jne	.LBB1_25
# %bb.24:
	movl	8(%rsp), %edi
	movq	56(%rsp), %rsi
	movq	64(%rsp), %rdx
	movq	152(%rsp), %rcx
	movq	32(%rsp), %r8
	movq	96(%rsp), %r9
.Ltmp59:
	.cfi_escape 0x2e, 0x20
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	128(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z44__device_stub__betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.Ltmp60:
.LBB1_25:
	movq	48(%rsp), %rdi
.Ltmp61:
	.cfi_escape 0x2e, 0x00
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp62:
# %bb.26:
	movq	48(%rsp), %rdi
.Ltmp63:
	.cfi_escape 0x2e, 0x00
	callq	hipEventSynchronize
.Ltmp64:
# %bb.27:
	movq	88(%rsp), %rsi
	movq	48(%rsp), %rdx
.Ltmp65:
	.cfi_escape 0x2e, 0x00
	leaq	76(%rsp), %rdi
	callq	hipEventElapsedTime
.Ltmp66:
# %bb.28:
	movq	24(%rsp), %rsi
	movslq	8(%rsp), %rdx
	shlq	$2, %rdx
.Ltmp67:
	.cfi_escape 0x2e, 0x00
	movq	%rbp, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp68:
# %bb.29:
.Ltmp69:
	.cfi_escape 0x2e, 0x00
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$9, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp70:
# %bb.30:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
.Ltmp71:
	.cfi_escape 0x2e, 0x00
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp72:
# %bb.31:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit68
.Ltmp73:
	.cfi_escape 0x2e, 0x00
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp74:
# %bb.32:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit70
	cvtss2sd	76(%rsp), %xmm0
	divsd	.LCPI1_0(%rip), %xmm0
.Ltmp75:
	.cfi_escape 0x2e, 0x00
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp76:
# %bb.33:                               # %_ZNSolsEd.exit
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp77:
	.cfi_escape 0x2e, 0x00
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp78:
# %bb.34:                               # %.noexc82
.Ltmp79:
	.cfi_escape 0x2e, 0x00
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp80:
# %bb.35:                               # %.noexc83
.Ltmp81:
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp82:
# %bb.36:                               # %_ZNSolsEPFRSoS_E.exit.preheader
	movl	8(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB1_37
# %bb.74:                               # %_ZNSolsEPFRSoS_E.exit.preheader111
	xorpd	%xmm0, %xmm0
	xorl	%ecx, %ecx
.LBB1_75:                               # %_ZNSolsEPFRSoS_E.exit
                                        # =>This Inner Loop Header: Depth=1
	movapd	%xmm0, %xmm1
	movss	(%rbp,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	maxss	%xmm1, %xmm0
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_75
# %bb.57:                               # %_ZNSolsEPFRSoS_E.exit._crit_edge.loopexit
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LCPI1_1(%rip), %xmm0
	jmp	.LBB1_58
.LBB1_37:
	xorpd	%xmm0, %xmm0
.LBB1_58:                               # %_ZNSolsEPFRSoS_E.exit._crit_edge
	movsd	%xmm0, 80(%rsp)                 # 8-byte Spill
.Ltmp84:
	.cfi_escape 0x2e, 0x00
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp85:
# %bb.59:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit74
.Ltmp86:
	.cfi_escape 0x2e, 0x00
	movl	$_ZSt4cout, %edi
	movsd	80(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp87:
# %bb.60:                               # %_ZNSolsEd.exit76
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp88:
	.cfi_escape 0x2e, 0x00
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp89:
# %bb.61:                               # %.noexc85
.Ltmp90:
	.cfi_escape 0x2e, 0x00
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp91:
# %bb.62:                               # %.noexc86
.Ltmp92:
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp93:
# %bb.63:                               # %_ZNSolsEPFRSoS_E.exit78
	movq	32(%rsp), %rdi
.Ltmp94:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp95:
# %bb.64:
	movq	152(%rsp), %rdi
.Ltmp96:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp97:
# %bb.65:
	movq	64(%rsp), %rdi
.Ltmp98:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp99:
# %bb.66:
	movq	56(%rsp), %rdi
.Ltmp100:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp101:
# %bb.67:
	movq	96(%rsp), %rdi
.Ltmp102:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp103:
# %bb.68:
	movq	24(%rsp), %rdi
.Ltmp104:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp105:
# %bb.69:
	movq	112(%rsp), %rdi
.Ltmp106:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp107:
# %bb.70:
	movq	104(%rsp), %rdi
.Ltmp108:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp109:
# %bb.71:
	.cfi_escape 0x2e, 0x00
	movq	40(%rsp), %rdi                  # 8-byte Reload
	callq	free
	.cfi_escape 0x2e, 0x00
	movq	16(%rsp), %rdi                  # 8-byte Reload
	callq	free
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	free
	.cfi_escape 0x2e, 0x00
	movq	%r12, %rdi
	callq	free
	.cfi_escape 0x2e, 0x00
	movq	%r13, %rdi
	callq	free
	.cfi_escape 0x2e, 0x00
	movq	%rbp, %rdi
	callq	free
	movq	120(%rsp), %rdi
	leaq	136(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB1_73
# %bb.72:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB1_73:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	xorl	%eax, %eax
	addq	$536, %rsp                      # imm = 0x218
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_54:
	.cfi_def_cfa_offset 592
.Ltmp27:
	jmp	.LBB1_77
.LBB1_53:
.Ltmp24:
	jmp	.LBB1_77
.LBB1_52:
.Ltmp21:
	jmp	.LBB1_77
.LBB1_51:
.Ltmp18:
	jmp	.LBB1_77
.LBB1_38:
.Ltmp4:
	jmp	.LBB1_77
.LBB1_55:
.Ltmp50:
	jmp	.LBB1_77
.LBB1_76:
.Ltmp110:
	jmp	.LBB1_77
.LBB1_56:
.Ltmp83:
	jmp	.LBB1_77
.LBB1_48:
.Ltmp12:
	jmp	.LBB1_77
.LBB1_47:
.Ltmp9:
.LBB1_77:
	movq	%rax, %rbx
	jmp	.LBB1_78
.LBB1_49:
.Ltmp15:
	movq	%rax, %rbx
	.cfi_escape 0x2e, 0x00
	leaq	152(%rsp), %rdi
	movl	$_ZTTNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEE, %esi
	callq	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED2Ev
	.cfi_escape 0x2e, 0x00
	leaq	272(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
.LBB1_78:
	movq	120(%rsp), %rdi
	leaq	136(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB1_80
# %bb.79:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i79
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB1_80:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit81
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp3-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp3
	.uleb128 .Ltmp4-.Lfunc_begin0           #     jumps to .Ltmp4
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp5-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp8-.Ltmp5                  #   Call between .Ltmp5 and .Ltmp8
	.uleb128 .Ltmp9-.Lfunc_begin0           #     jumps to .Ltmp9
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp10-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp11-.Ltmp10                #   Call between .Ltmp10 and .Ltmp11
	.uleb128 .Ltmp12-.Lfunc_begin0          #     jumps to .Ltmp12
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp13-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp14-.Ltmp13                #   Call between .Ltmp13 and .Ltmp14
	.uleb128 .Ltmp15-.Lfunc_begin0          #     jumps to .Ltmp15
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp16-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp17-.Ltmp16                #   Call between .Ltmp16 and .Ltmp17
	.uleb128 .Ltmp18-.Lfunc_begin0          #     jumps to .Ltmp18
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp19-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp20-.Ltmp19                #   Call between .Ltmp19 and .Ltmp20
	.uleb128 .Ltmp21-.Lfunc_begin0          #     jumps to .Ltmp21
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp22-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp23-.Ltmp22                #   Call between .Ltmp22 and .Ltmp23
	.uleb128 .Ltmp24-.Lfunc_begin0          #     jumps to .Ltmp24
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp25-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp26-.Ltmp25                #   Call between .Ltmp25 and .Ltmp26
	.uleb128 .Ltmp27-.Lfunc_begin0          #     jumps to .Ltmp27
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp28-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp49-.Ltmp28                #   Call between .Ltmp28 and .Ltmp49
	.uleb128 .Ltmp50-.Lfunc_begin0          #     jumps to .Ltmp50
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp51-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Ltmp82-.Ltmp51                #   Call between .Ltmp51 and .Ltmp82
	.uleb128 .Ltmp83-.Lfunc_begin0          #     jumps to .Ltmp83
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp84-.Lfunc_begin0          # >> Call Site 12 <<
	.uleb128 .Ltmp109-.Ltmp84               #   Call between .Ltmp84 and .Ltmp109
	.uleb128 .Ltmp110-.Lfunc_begin0         #     jumps to .Ltmp110
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp109-.Lfunc_begin0         # >> Call Site 13 <<
	.uleb128 .Lfunc_end1-.Ltmp109           #   Call between .Ltmp109 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_,@object # @_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_
	.p2align	3, 0x0
_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_:
	.quad	_Z44__device_stub__betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_
	.size	_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Result: \n"
	.size	.L.str, 10

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\n"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Execution time: "
	.size	.L.str.2, 17

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Max BC value: "
	.size	.L.str.3, 15

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_"
	.size	.L__unnamed_1, 52

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z44__device_stub__betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_
	.addrsig_sym _ZSt3cin
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_ ; -- Begin function _Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_
	.globl	_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_
	.p2align	8
	.type	_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_,@function
_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_: ; @_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_
; %bb.0:
	v_cmp_eq_u32_e64 s2, 0, v0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_mov_b32_e32 v1, 0
	ds_store_b32 v1, v1 offset:4
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v2, 0
	s_load_b32 s24, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v1, v2 offset:4
	s_waitcnt lgkmcnt(0)
	v_cmp_le_i32_e32 vcc_lo, s24, v1
	s_cbranch_vccnz .LBB0_47
; %bb.3:                                ; %.lr.ph136
	s_load_b512 s[4:19], s[0:1], 0x8
	v_cmp_gt_i32_e64 s3, s24, v0
	v_bfrev_b32_e32 v19, -2
	v_mov_b32_e32 v1, 1
	s_add_u32 s20, s0, 0x48
	s_addc_u32 s21, s1, 0
	s_mov_b32 s23, 0
	s_mov_b32 s1, 0
.LBB0_4:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
                                        ;     Child Loop BB0_14 Depth 2
                                        ;       Child Loop BB0_16 Depth 3
                                        ;         Child Loop BB0_21 Depth 4
                                        ;     Child Loop BB0_33 Depth 2
                                        ;       Child Loop BB0_35 Depth 3
                                        ;         Child Loop BB0_37 Depth 4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s22, s3
	s_cbranch_execz .LBB0_11
; %bb.5:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_4 Depth=1
	ds_load_b32 v3, v2 offset:4
	s_load_b32 s0, s[20:21], 0xc
	v_mov_b32_e32 v8, v0
	s_mov_b32 s26, 0
	s_waitcnt lgkmcnt(0)
	v_ashrrev_i32_e32 v4, 31, v3
	s_and_b32 s25, s0, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[3:4]
	v_add_co_u32 v4, vcc_lo, s8, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v7, vcc_lo
	v_add_co_u32 v6, vcc_lo, s10, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
.LBB0_6:                                ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u32_e64 v3, v8
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=2
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[8:9]
	v_add_co_u32 v12, vcc_lo, s8, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v11, vcc_lo
	v_add_co_u32 v10, vcc_lo, s10, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v11, vcc_lo
	global_store_b32 v[12:13], v19, off
	global_store_b32 v[10:11], v2, off
.LBB0_8:                                ; %Flow185
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_6 Depth=2
	v_ashrrev_i32_e32 v9, 31, v8
	global_store_b32 v[4:5], v2, off
	global_store_b32 v[6:7], v1, off
.LBB0_10:                               ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_lshlrev_b64 v[9:10], 2, v[8:9]
	v_add_nc_u32_e32 v8, s25, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_i32_e32 vcc_lo, s24, v8
	v_add_co_u32 v9, s0, s12, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s0, s13, v10, s0
	s_or_b32 s26, vcc_lo, s26
	global_store_b32 v[9:10], v2, off
	s_and_not1_b32 exec_lo, exec_lo, s26
	s_cbranch_execnz .LBB0_6
.LBB0_11:                               ; %Flow187
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_4 Depth=1
	ds_store_b32 v2, v2
	ds_store_b64 v2, v[1:2] offset:8
	ds_store_b8 v2, v2 offset:16
	global_store_b32 v2, v2, s[18:19]
.LBB0_13:                               ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_u8 v3, v2 offset:16
	s_waitcnt lgkmcnt(0)
	v_cmp_ne_u16_e32 vcc_lo, 0, v3
	s_cbranch_vccnz .LBB0_30
.LBB0_14:                               ; %.lr.ph121
                                        ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_16 Depth 3
                                        ;         Child Loop BB0_21 Depth 4
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_store_b8 v2, v1 offset:16
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s22, s3
	s_cbranch_execz .LBB0_27
; %bb.15:                               ; %.lr.ph117
                                        ;   in Loop: Header=BB0_14 Depth=2
	s_load_b32 s0, s[20:21], 0xc
	ds_load_b32 v17, v2
	v_mov_b32_e32 v3, v0
	s_mov_b32 s26, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s25, s0, 0xffff
.LBB0_16:                               ;   Parent Loop BB0_4 Depth=1
                                        ;     Parent Loop BB0_14 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_21 Depth 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	s_mov_b32 s27, exec_lo
	v_lshlrev_b64 v[10:11], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s8, v10
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v11, vcc_lo
	global_load_b32 v6, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e64 v6, v17
	s_cbranch_execz .LBB0_26
; %bb.17:                               ;   in Loop: Header=BB0_16 Depth=3
	s_mov_b32 s28, exec_lo
	s_mov_b32 s0, exec_lo
	v_mbcnt_lo_u32_b32 v6, s28, 0
                                        ; implicit-def: $vgpr7
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB0_19
; %bb.18:                               ;   in Loop: Header=BB0_16 Depth=3
	s_bcnt1_i32_b32 s28, s28
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v7, s28
	ds_add_rtn_u32 v7, v2, v7 offset:12
.LBB0_19:                               ;   in Loop: Header=BB0_16 Depth=3
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt lgkmcnt(0)
	v_readfirstlane_b32 s0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, s0, v6
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v8, vcc_lo, s16, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s17, v7, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v10
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v11, vcc_lo
	global_store_b32 v[8:9], v3, off
	global_load_b64 v[8:9], v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v8, v9
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_26
; %bb.20:                               ; %.lr.ph114
                                        ;   in Loop: Header=BB0_16 Depth=3
	v_ashrrev_i32_e32 v9, 31, v8
	s_mov_b32 s28, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[12:13], 2, v[8:9]
	v_add_co_u32 v9, vcc_lo, s10, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v11, vcc_lo
	v_add_co_u32 v11, vcc_lo, s4, v12
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v12, vcc_lo, s5, v13, vcc_lo
.LBB0_21:                               ;   Parent Loop BB0_4 Depth=1
                                        ;     Parent Loop BB0_14 Depth=2
                                        ;       Parent Loop BB0_16 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	global_load_b32 v13, v[11:12], off
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v14, 31, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[13:14], 2, v[13:14]
	v_add_co_u32 v15, vcc_lo, s8, v13
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v16, vcc_lo, s9, v14, vcc_lo
	s_clause 0x1
	global_load_b32 v18, v[15:16], off
	global_load_b32 v20, v[4:5], off
	s_waitcnt vmcnt(1)
	v_cmpx_eq_u32_e32 0x7fffffff, v18
	s_cbranch_execz .LBB0_23
; %bb.22:                               ;   in Loop: Header=BB0_21 Depth=4
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v18, 1, v20
	ds_store_b8 v2, v2 offset:16
	global_store_b32 v[15:16], v18, off
	global_load_b32 v20, v[4:5], off
.LBB0_23:                               ;   in Loop: Header=BB0_21 Depth=4
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v15, 1, v20
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e64 v18, v15
	s_cbranch_execz .LBB0_25
; %bb.24:                               ;   in Loop: Header=BB0_21 Depth=4
	global_load_b32 v15, v[9:10], off
	v_add_co_u32 v13, vcc_lo, s10, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s11, v14, vcc_lo
	s_waitcnt vmcnt(0)
	global_atomic_add_u32 v[13:14], v15, off
.LBB0_25:                               ;   in Loop: Header=BB0_21 Depth=4
	s_or_b32 exec_lo, exec_lo, s0
	global_load_b32 v13, v[6:7], off offset:4
	v_add_nc_u32_e32 v8, 1, v8
	v_add_co_u32 v11, s0, v11, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v12, s0, 0, v12, s0
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v8, v13
	s_or_b32 s28, vcc_lo, s28
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s28
	s_cbranch_execnz .LBB0_21
.LBB0_26:                               ; %Flow180
                                        ;   in Loop: Header=BB0_16 Depth=3
	s_or_b32 exec_lo, exec_lo, s27
	v_add_nc_u32_e32 v3, s25, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s24, v3
	s_or_b32 s26, vcc_lo, s26
	s_and_not1_b32 exec_lo, exec_lo, s26
	s_cbranch_execnz .LBB0_16
.LBB0_27:                               ; %Flow182
                                        ;   in Loop: Header=BB0_14 Depth=2
	s_or_b32 exec_lo, exec_lo, s22
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB0_29
; %bb.28:                               ;   in Loop: Header=BB0_14 Depth=2
	ds_load_b64 v[3:4], v2 offset:8
	ds_load_b32 v7, v2
	s_waitcnt lgkmcnt(1)
	v_ashrrev_i32_e32 v6, 31, v3
	v_mov_b32_e32 v5, v3
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v7, 1, v7
	v_add_nc_u32_e32 v3, 1, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	ds_store_2addr_b32 v2, v7, v3 offset1:2
	v_add_co_u32 v5, vcc_lo, s18, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s19, v6, vcc_lo
	global_store_b32 v[5:6], v4, off
.LBB0_29:                               ;   in Loop: Header=BB0_14 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	ds_load_u8 v3, v2 offset:16
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v3
	s_cbranch_vccnz .LBB0_14
.LBB0_30:                               ; %._crit_edge122
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB0_32
; %bb.31:                               ;   in Loop: Header=BB0_4 Depth=1
	ds_load_b32 v3, v2 offset:8
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v3, -2, v3
	ds_store_b32 v2, v3 offset:8
.LBB0_32:                               ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v3, v2 offset:8
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, 0, v3
	v_readfirstlane_b32 s22, v3
	s_cbranch_vccnz .LBB0_44
.LBB0_33:                               ; %.lr.ph133
                                        ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_35 Depth 3
                                        ;         Child Loop BB0_37 Depth 4
	s_delay_alu instid0(VALU_DEP_1)
	s_lshl_b64 s[26:27], s[22:23], 2
	s_mov_b32 s25, exec_lo
	s_add_u32 s26, s18, s26
	s_addc_u32 s27, s19, s27
	global_load_b64 v[3:4], v2, s[26:27]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, v3, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e64 v5, v4
	s_cbranch_execz .LBB0_43
; %bb.34:                               ; %.lr.ph129
                                        ;   in Loop: Header=BB0_33 Depth=2
	s_load_b32 s0, s[20:21], 0xc
	ds_load_b32 v3, v2 offset:4
	s_mov_b32 s27, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s26, s0, 0xffff
.LBB0_35:                               ;   Parent Loop BB0_4 Depth=1
                                        ;     Parent Loop BB0_33 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_37 Depth 4
	v_ashrrev_i32_e32 v6, 31, v5
	s_mov_b32 s28, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	v_add_co_u32 v6, vcc_lo, s16, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, s17, v7, vcc_lo
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[6:7], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v7, vcc_lo
	global_load_b64 v[9:10], v[9:10], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v9, v10
	s_cbranch_execz .LBB0_40
; %bb.36:                               ; %.lr.ph125
                                        ;   in Loop: Header=BB0_35 Depth=3
	v_add_co_u32 v11, vcc_lo, s8, v6
	v_add_co_ci_u32_e32 v12, vcc_lo, s9, v7, vcc_lo
	v_ashrrev_i32_e32 v14, 31, v9
	s_mov_b32 s29, 0
	global_load_b32 v17, v[11:12], off
	v_mov_b32_e32 v13, v9
	v_add_co_u32 v11, vcc_lo, s10, v6
	v_add_co_ci_u32_e32 v12, vcc_lo, s11, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v20, 1, v17
	v_lshlrev_b64 v[15:16], 2, v[13:14]
	v_add_co_u32 v13, vcc_lo, s12, v6
	v_add_co_ci_u32_e32 v14, vcc_lo, s13, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v15, vcc_lo, s4, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v16, vcc_lo
.LBB0_37:                               ;   Parent Loop BB0_4 Depth=1
                                        ;     Parent Loop BB0_33 Depth=2
                                        ;       Parent Loop BB0_35 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	global_load_b32 v17, v[15:16], off
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v18, 31, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	v_add_co_u32 v21, vcc_lo, s8, v17
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v22, vcc_lo, s9, v18, vcc_lo
	global_load_b32 v21, v[21:22], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e64 v21, v20
	s_cbranch_execz .LBB0_39
; %bb.38:                               ;   in Loop: Header=BB0_37 Depth=4
	v_add_co_u32 v21, vcc_lo, s10, v17
	v_add_co_ci_u32_e32 v22, vcc_lo, s11, v18, vcc_lo
	v_add_co_u32 v17, vcc_lo, s12, v17
	s_clause 0x1
	global_load_b32 v23, v[11:12], off
	global_load_b32 v21, v[21:22], off
	v_add_co_ci_u32_e32 v18, vcc_lo, s13, v18, vcc_lo
	s_clause 0x1
	global_load_b32 v17, v[17:18], off
	global_load_b32 v18, v[13:14], off
	s_waitcnt vmcnt(3)
	v_cvt_f32_i32_e32 v22, v23
	s_waitcnt vmcnt(2)
	v_cvt_f32_i32_e32 v21, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_div_scale_f32 v23, null, v21, v21, v22
	v_div_scale_f32 v26, vcc_lo, v22, v21, v22
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v17, 1.0, v17
	v_rcp_f32_e32 v24, v23
	s_waitcnt_depctr 0xfff
	v_fma_f32 v25, -v23, v24, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v24, v25, v24
	v_mul_f32_e32 v25, v26, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v27, -v23, v25, v26
	v_fmac_f32_e32 v25, v27, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v23, -v23, v25, v26
	v_div_fmas_f32 v23, v23, v24, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v21, v23, v21, v22
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v18, v21, v17
	global_store_b32 v[13:14], v18, off
.LBB0_39:                               ;   in Loop: Header=BB0_37 Depth=4
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v9, 1, v9
	v_add_co_u32 v15, s0, v15, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v16, s0, 0, v16, s0
	v_cmp_ge_i32_e32 vcc_lo, v9, v10
	s_or_b32 s29, vcc_lo, s29
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s29
	s_cbranch_execnz .LBB0_37
.LBB0_40:                               ; %Flow173
                                        ;   in Loop: Header=BB0_35 Depth=3
	s_or_b32 exec_lo, exec_lo, s28
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u32_e64 v8, v3
	s_cbranch_execz .LBB0_42
; %bb.41:                               ;   in Loop: Header=BB0_35 Depth=3
	v_add_co_u32 v8, vcc_lo, s12, v6
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v7, vcc_lo
	v_add_co_u32 v6, vcc_lo, s14, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s15, v7, vcc_lo
	global_load_b32 v8, v[8:9], off
	global_load_b32 v9, v[6:7], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v8, v8, v9
	global_store_b32 v[6:7], v8, off
.LBB0_42:                               ;   in Loop: Header=BB0_35 Depth=3
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v5, s26, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v5, v4
	s_or_b32 s27, vcc_lo, s27
	s_and_not1_b32 exec_lo, exec_lo, s27
	s_cbranch_execnz .LBB0_35
.LBB0_43:                               ; %Flow175
                                        ;   in Loop: Header=BB0_33 Depth=2
	s_or_b32 exec_lo, exec_lo, s25
	s_add_i32 s0, s22, -1
	s_cmp_lt_i32 s22, 1
	s_mov_b32 s22, s0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_33
.LBB0_44:                               ; %._crit_edge134
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v3, v2 offset:4
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB0_46
; %bb.45:                               ;   in Loop: Header=BB0_4 Depth=1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v3, 1, v3
	ds_store_b32 v2, v3 offset:4
.LBB0_46:                               ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt lgkmcnt(0)
	v_cmp_le_i32_e32 vcc_lo, s24, v3
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_4
.LBB0_47:                               ; %._crit_edge137
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_
		.amdhsa_group_segment_fixed_size 20
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 28
		.amdhsa_next_free_sgpr 30
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_, .Lfunc_end0-_Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2140
; NumSgprs: 32
; NumVgprs: 28
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 20 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 32
; NumVGPRsForWavesPerEU: 28
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         76
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         84
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         86
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         88
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         90
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         92
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         94
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         136
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 20
    .kernarg_segment_align: 8
    .kernarg_segment_size: 328
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     32
    .sgpr_spill_count: 0
    .symbol:         _Z29betweenness_centrality_kerneliPiS_S_S_PfS0_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     28
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
