#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <math.h>
#include <time.h>
#include "cuda_fp16.h"
#define L1_SIZE 65536
#define FP_TYPE double
#define FP_DEV_TYPE double
/* Kernel for vector addition */

__global__ void Vec_add(FP_DEV_TYPE x[], FP_DEV_TYPE y[], FP_DEV_TYPE z[], int n,  FP_DEV_TYPE lookup[], uint32_t startClk[], uint32_t stopClk[]) {
   /* blockDim.x = threads_per_block                            */
   /* First block gets first threads_per_block components.      */
   /* Second block gets next threads_per_block components, etc. */
   int tid = blockDim.x * blockIdx.x + threadIdx.x;
   /* block_count*threads_per_block may be >= n */
   // a register to avoid compiler optimization
   //float sink = 0;


   if (tid < n) {

     float temp_x  = x[tid];
     float temp_y  = y[tid];
     float temp_z = 1e-8;
     // synchronize all threads
     asm volatile ("bar.sync 0;");
     uint32_t start = 0;
    // start timing
    asm volatile ("mov.u32 %0, %%clock;" : "=r"(start) :: "memory");

    for (int i =0;i < 1000; i++)
      temp_z += temp_y * temp_x * temp_x;
    // synchronize all threads
    //asm volatile ("bar.sync 0;");
    // stop timing
    uint32_t stop = 0;
    asm volatile ("mov.u32 %0, %%clock;" : "=r"(stop) :: "memory");
    // write time and data back to memory
    startClk[tid] = start;
    stopClk[tid] = stop;
  //  dsink[tid] = sink;

    z[tid] = temp_z;///1000.0;
   }
}  /* Vec_add */


/* Host code */
int main(int argc, char* argv[]) {

   int n, i;
   FP_TYPE *h_x, *h_y, *h_z, *h_lookup;
   FP_DEV_TYPE *d_x, *d_y, *d_z, *d_lookup ;
   uint32_t *h_startClk, *h_stopClk;
   uint32_t *d_startClk, *d_stopClk;
   int threads_per_block;
   int block_count;
   size_t size, size_clock;
	cudaEvent_t start, stop;
  float elapsedTime;
  srand(time(0));
   /* Get number of components in vector */
   if (argc != 2) {
      fprintf(stderr, "usage: %s <vector order>\n", argv[0]);
      exit(0);
   }
   n = strtol(argv[1], NULL, 10); // half2 = 2x half , reduce size
   size = n*sizeof(FP_TYPE);
   size_clock = n*sizeof(uint32_t);
   /* Allocate input vectors in host memory */
   h_x = (FP_TYPE*) malloc(size);
   h_y = (FP_TYPE*) malloc(size);
   h_z = (FP_TYPE*) malloc(size);

   h_startClk = (uint32_t*) malloc(size_clock);
   h_stopClk = (uint32_t*) malloc(size_clock);

   h_lookup = (FP_TYPE*) malloc(L1_SIZE*sizeof(FP_TYPE));
   // declare and allocate memory

   /* Initialize input vectors */
   for (i = 0; i < n; i++) {
       h_x[i] = 0.5641895835477563; //R of circle with area = 10
       h_y[i] = 3.14159265358979;
  //    h_x[i] = rand()%L1_SIZE;
   }
   for (i=0;i<L1_SIZE;i++)
      h_lookup[i] = (i*5)%L1_SIZE;

   /* Allocate vectors in device memory */
   cudaMalloc(&d_x, size);
   cudaMalloc(&d_y, size);
   cudaMalloc(&d_z, size);
   cudaMalloc(&d_lookup, L1_SIZE*sizeof(FP_TYPE));
   cudaMalloc(&d_stopClk, size_clock);
   cudaMalloc(&d_startClk, size_clock);

   /* Copy vectors from host memory to device memory */
   cudaMemcpy(d_x, h_x, size, cudaMemcpyHostToDevice);
   cudaMemcpy(d_y, h_y, size, cudaMemcpyHostToDevice);
   cudaMemcpy(d_lookup, h_lookup, L1_SIZE*sizeof(FP_TYPE), cudaMemcpyHostToDevice);

//   cudaMemcpy(buffer, h_buffer, MAX_TEXTURE_SIZE*sizeof(float), cudaMemcpyHostToDevice); //copy data to texture

   /* Define block size */
   threads_per_block = 256;

   block_count = (n + threads_per_block - 1)/threads_per_block;
	cudaEventCreate(&start);
	cudaEventRecord(start,0);

  for (int i =0; i<100 ; i++){
   Vec_add<<<block_count, threads_per_block>>>(d_x, d_y, d_z, n, d_lookup, d_startClk,d_stopClk);
   cudaDeviceSynchronize();
  }

	cudaEventCreate(&stop);
	cudaEventRecord(stop,0);
	cudaEventSynchronize(stop);
 cudaEventElapsedTime(&elapsedTime, start,stop);
 printf("Elapsed time : %f ms\n" ,elapsedTime/100);
  cudaMemcpy(h_z, d_z, size, cudaMemcpyDeviceToHost);
  cudaMemcpy(h_startClk, d_startClk, size_clock, cudaMemcpyDeviceToHost);
  cudaMemcpy(h_stopClk, d_stopClk, size_clock, cudaMemcpyDeviceToHost);

uint32_t sum = 0;
printf("clk cycles spent on each thread \n");
for (i = 0; i < n; i++) {
;
//  printf("%d, \n", h_z[i]);
//  if(i%100 == 0)
//    printf("%u,", h_stopClk[i] - h_startClk[i]);
  sum+=h_stopClk[i] - h_startClk[i];
}


printf("\n -------- \n average latency (cycles) %f \n",float(sum)/n);
double sum_err = 0.0;

for (i = 0; i < n; i++) {
  sum_err += fabs(1000 + 1e-8 - h_z[i]);
}
printf("\n -------- \n avg error %.10f \n",sum_err/n);
   /* Free device memory */
   cudaFree(d_x);
   cudaFree(d_y);
   cudaFree(d_z);

   /* Free host memory */
   free(h_x);
   free(h_y);
   free(h_z);

   return 0;
}  /* main */

	.file	"tmpxft_0032f827_00000000-6_simpleFloat.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2404:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2404:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z38__device_stub__Z7Vec_addPdS_S_iS_PjS0_PdS_S_iS_PjS0_
	.type	_Z38__device_stub__Z7Vec_addPdS_S_iS_PjS0_PdS_S_iS_PjS0_, @function
_Z38__device_stub__Z7Vec_addPdS_S_iS_PjS0_PdS_S_iS_PjS0_:
.LFB2426:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movl	%ecx, 36(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	72(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z7Vec_addPdS_S_iS_PjS0_(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 224
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2426:
	.size	_Z38__device_stub__Z7Vec_addPdS_S_iS_PjS0_PdS_S_iS_PjS0_, .-_Z38__device_stub__Z7Vec_addPdS_S_iS_PjS0_PdS_S_iS_PjS0_
	.globl	_Z7Vec_addPdS_S_iS_PjS0_
	.type	_Z7Vec_addPdS_S_iS_PjS0_, @function
_Z7Vec_addPdS_S_iS_PjS0_:
.LFB2427:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z7Vec_addPdS_S_iS_PjS0_PdS_S_iS_PjS0_
	.cfi_endproc
.LFE2427:
	.size	_Z7Vec_addPdS_S_iS_PjS0_, .-_Z7Vec_addPdS_S_iS_PjS0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"usage: %s <vector order>\n"
.LC5:
	.string	"Elapsed time : %f ms\n"
.LC6:
	.string	"clk cycles spent on each thread \n"
.LC7:
	.string	"\n -------- \n average latency (cycles) %f \n"
.LC10:
	.string	"\n -------- \n avg error %.10f \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2401:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	xorl	%edi, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	cmpl	$2, %ebp
	je	.L9
	movq	stderr(%rip), %rdi
	movq	(%rbx), %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC1(%rip), %rdx
	call	__fprintf_chk@PLT
	xorl	%edi, %edi
	call	exit@PLT
.L9:
	movq	8(%rbx), %rdi
	movl	$10, %edx
	xorl	%esi, %esi
	call	__isoc23_strtol@PLT
	movq	%rax, %rbp
	movl	%eax, %r12d
	cltq
	leaq	0(,%rax,8), %rcx
	salq	$2, %rax
	movq	%rcx, %rdi
	movq	%rcx, (%rsp)
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 32(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$524288, %edi
	movq	%rax, %r14
	call	malloc@PLT
	movsd	.LC2(%rip), %xmm0
	movsd	.LC3(%rip), %xmm1
	movq	%rax, %rbx
	xorl	%eax, %eax
.L10:
	cmpl	%eax, %r12d
	jle	.L25
	movq	16(%rsp), %rcx
	movsd	%xmm0, (%rcx,%rax,8)
	movq	24(%rsp), %rcx
	movsd	%xmm1, (%rcx,%rax,8)
	incq	%rax
	jmp	.L10
.L25:
	xorl	%eax, %eax
.L12:
	leal	(%rax,%rax,4), %edx
	movzwl	%dx, %edx
	cvtsi2sdl	%edx, %xmm0
	movsd	%xmm0, (%rbx,%rax,8)
	incq	%rax
	cmpq	$65536, %rax
	jne	.L12
	movq	(%rsp), %rsi
	leaq	48(%rsp), %rdi
	movabsq	$4294967552, %r15
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	64(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movl	$524288, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	88(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	80(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	48(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	56(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$524288, %edx
	movl	$100, %ebx
	call	cudaMemcpy@PLT
	leal	255(%rbp), %eax
	movl	$256, %ecx
	leaq	96(%rsp), %rdi
	cltd
	idivl	%ecx
	movl	%eax, 44(%rsp)
	call	cudaEventCreate@PLT
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
.L14:
	movl	44(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	%r15, 120(%rsp)
	movl	%eax, 108(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 112(%rsp)
	movq	108(%rsp), %rdi
	movl	$1, 128(%rsp)
	movl	116(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	%rax
	.cfi_def_cfa_offset 216
	movl	%r12d, %ecx
	pushq	96(%rsp)
	.cfi_def_cfa_offset 224
	movq	96(%rsp), %r9
	movq	88(%rsp), %r8
	movq	80(%rsp), %rdx
	movq	72(%rsp), %rsi
	movq	64(%rsp), %rdi
	call	_Z38__device_stub__Z7Vec_addPdS_S_iS_PjS0_PdS_S_iS_PjS0_
	popq	%rdx
	.cfi_def_cfa_offset 216
	popq	%rcx
	.cfi_def_cfa_offset 208
.L13:
	call	cudaDeviceSynchronize@PLT
	decl	%ebx
	jne	.L14
	leaq	120(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	120(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	120(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	120(%rsp), %rdx
	movq	96(%rsp), %rsi
	leaq	108(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	108(%rsp), %xmm0
	divss	.LC4(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$2, %ecx
	movq	32(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	%r13, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	88(%rsp), %rsi
	movq	%r14, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L15:
	cmpl	%eax, %r12d
	jle	.L26
	addl	(%r14,%rax,4), %ebx
	subl	0(%r13,%rax,4), %ebx
	incq	%rax
	jmp	.L15
.L26:
	movl	%ebx, %ebx
	cvtsi2ssl	%ebp, %xmm1
	leaq	.LC7(%rip), %rsi
	movb	$1, %al
	cvtsi2ssq	%rbx, %xmm0
	movl	$2, %edi
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
	movsd	.LC8(%rip), %xmm2
	movq	.LC9(%rip), %xmm3
.L19:
	cmpl	%eax, %r12d
	jle	.L27
	movq	32(%rsp), %rbx
	movaps	%xmm2, %xmm1
	subsd	(%rbx,%rax,8), %xmm1
	incq	%rax
	andps	%xmm3, %xmm1
	addsd	%xmm1, %xmm0
	jmp	.L19
.L27:
	cvtsi2sdl	%ebp, %xmm1
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	divsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	free@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2401:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z7Vec_addPdS_S_iS_PjS0_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2429:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7Vec_addPdS_S_iS_PjS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2429:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	1346542445
	.long	1071779287
	.align 8
.LC3:
	.long	1413754129
	.long	1074340347
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC4:
	.long	1120403456
	.section	.rodata.cst8
	.align 8
.LC8:
	.long	87961
	.long	1083129856
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC9:
	.long	-1
	.long	2147483647
	.long	0
	.long	0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <math.h>
#include <time.h>
#include "hip/hip_fp16.h"
#define L1_SIZE 65536
#define FP_TYPE double
#define FP_DEV_TYPE double
/* Kernel for vector addition */

__global__ void Vec_add(FP_DEV_TYPE x[], FP_DEV_TYPE y[], FP_DEV_TYPE z[], int n,  FP_DEV_TYPE lookup[], uint32_t startClk[], uint32_t stopClk[]) {
   /* blockDim.x = threads_per_block                            */
   /* First block gets first threads_per_block components.      */
   /* Second block gets next threads_per_block components, etc. */
   int tid = blockDim.x * blockIdx.x + threadIdx.x;
   /* block_count*threads_per_block may be >= n */
   // a register to avoid compiler optimization
   //float sink = 0;


   if (tid < n) {

     float temp_x  = x[tid];
     float temp_y  = y[tid];
     float temp_z = 1e-8;
     // synchronize all threads
     asm volatile ("bar.sync 0;");
     uint32_t start = 0;
    // start timing
    asm volatile ("mov.u32 %0, %%clock;" : "=r"(start) :: "memory");

    for (int i =0;i < 1000; i++)
      temp_z += temp_y * temp_x * temp_x;
    // synchronize all threads
    //asm volatile ("bar.sync 0;");
    // stop timing
    uint32_t stop = 0;
    asm volatile ("mov.u32 %0, %%clock;" : "=r"(stop) :: "memory");
    // write time and data back to memory
    startClk[tid] = start;
    stopClk[tid] = stop;
  //  dsink[tid] = sink;

    z[tid] = temp_z;///1000.0;
   }
}  /* Vec_add */


/* Host code */
int main(int argc, char* argv[]) {

   int n, i;
   FP_TYPE *h_x, *h_y, *h_z, *h_lookup;
   FP_DEV_TYPE *d_x, *d_y, *d_z, *d_lookup ;
   uint32_t *h_startClk, *h_stopClk;
   uint32_t *d_startClk, *d_stopClk;
   int threads_per_block;
   int block_count;
   size_t size, size_clock;
	hipEvent_t start, stop;
  float elapsedTime;
  srand(time(0));
   /* Get number of components in vector */
   if (argc != 2) {
      fprintf(stderr, "usage: %s <vector order>\n", argv[0]);
      exit(0);
   }
   n = strtol(argv[1], NULL, 10); // half2 = 2x half , reduce size
   size = n*sizeof(FP_TYPE);
   size_clock = n*sizeof(uint32_t);
   /* Allocate input vectors in host memory */
   h_x = (FP_TYPE*) malloc(size);
   h_y = (FP_TYPE*) malloc(size);
   h_z = (FP_TYPE*) malloc(size);

   h_startClk = (uint32_t*) malloc(size_clock);
   h_stopClk = (uint32_t*) malloc(size_clock);

   h_lookup = (FP_TYPE*) malloc(L1_SIZE*sizeof(FP_TYPE));
   // declare and allocate memory

   /* Initialize input vectors */
   for (i = 0; i < n; i++) {
       h_x[i] = 0.5641895835477563; //R of circle with area = 10
       h_y[i] = 3.14159265358979;
  //    h_x[i] = rand()%L1_SIZE;
   }
   for (i=0;i<L1_SIZE;i++)
      h_lookup[i] = (i*5)%L1_SIZE;

   /* Allocate vectors in device memory */
   hipMalloc(&d_x, size);
   hipMalloc(&d_y, size);
   hipMalloc(&d_z, size);
   hipMalloc(&d_lookup, L1_SIZE*sizeof(FP_TYPE));
   hipMalloc(&d_stopClk, size_clock);
   hipMalloc(&d_startClk, size_clock);

   /* Copy vectors from host memory to device memory */
   hipMemcpy(d_x, h_x, size, hipMemcpyHostToDevice);
   hipMemcpy(d_y, h_y, size, hipMemcpyHostToDevice);
   hipMemcpy(d_lookup, h_lookup, L1_SIZE*sizeof(FP_TYPE), hipMemcpyHostToDevice);

//   cudaMemcpy(buffer, h_buffer, MAX_TEXTURE_SIZE*sizeof(float), cudaMemcpyHostToDevice); //copy data to texture

   /* Define block size */
   threads_per_block = 256;

   block_count = (n + threads_per_block - 1)/threads_per_block;
	hipEventCreate(&start);
	hipEventRecord(start,0);

  for (int i =0; i<100 ; i++){
   Vec_add<<<block_count, threads_per_block>>>(d_x, d_y, d_z, n, d_lookup, d_startClk,d_stopClk);
   hipDeviceSynchronize();
  }

	hipEventCreate(&stop);
	hipEventRecord(stop,0);
	hipEventSynchronize(stop);
 hipEventElapsedTime(&elapsedTime, start,stop);
 printf("Elapsed time : %f ms\n" ,elapsedTime/100);
  hipMemcpy(h_z, d_z, size, hipMemcpyDeviceToHost);
  hipMemcpy(h_startClk, d_startClk, size_clock, hipMemcpyDeviceToHost);
  hipMemcpy(h_stopClk, d_stopClk, size_clock, hipMemcpyDeviceToHost);

uint32_t sum = 0;
printf("clk cycles spent on each thread \n");
for (i = 0; i < n; i++) {
;
//  printf("%d, \n", h_z[i]);
//  if(i%100 == 0)
//    printf("%u,", h_stopClk[i] - h_startClk[i]);
  sum+=h_stopClk[i] - h_startClk[i];
}


printf("\n -------- \n average latency (cycles) %f \n",float(sum)/n);
double sum_err = 0.0;

for (i = 0; i < n; i++) {
  sum_err += fabs(1000 + 1e-8 - h_z[i]);
}
printf("\n -------- \n avg error %.10f \n",sum_err/n);
   /* Free device memory */
   hipFree(d_x);
   hipFree(d_y);
   hipFree(d_z);

   /* Free host memory */
   free(h_x);
   free(h_y);
   free(h_z);

   return 0;
}  /* main */

	.text
	.file	"simpleFloat.hip"
	.globl	_Z22__device_stub__Vec_addPdS_S_iS_PjS0_ # -- Begin function _Z22__device_stub__Vec_addPdS_S_iS_PjS0_
	.type	_Z22__device_stub__Vec_addPdS_S_iS_PjS0_,@function
_Z22__device_stub__Vec_addPdS_S_iS_PjS0_: # @_Z22__device_stub__Vec_addPdS_S_iS_PjS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7Vec_addPdS_S_iS_PjS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__Vec_addPdS_S_iS_PjS0_, .Lfunc_end0-_Z22__device_stub__Vec_addPdS_S_iS_PjS0_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x42c80000                      # float 100
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI1_1:
	.quad	0x408f400000015799              # double 1000.00000001
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI1_2:
	.quad	0x7fffffffffffffff              # double NaN
	.quad	0x7fffffffffffffff              # double NaN
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %ebp
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	cmpl	$2, %ebp
	jne	.LBB1_19
# %bb.1:
	movq	8(%rbx), %rdi
	xorl	%esi, %esi
	movl	$10, %edx
	callq	__isoc23_strtol
	movq	%rax, %r12
	movq	%rax, %rbp
	shlq	$32, %rbp
	movq	%rbp, %r14
	sarq	$29, %r14
	sarq	$30, %rbp
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r14, 56(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r13
	movq	%rbp, 64(%rsp)                  # 8-byte Spill
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %rbp
	movl	$524288, %edi                   # imm = 0x80000
	callq	malloc
	testl	%r12d, %r12d
	jle	.LBB1_4
# %bb.2:                                # %.lr.ph.preheader
	movl	%r12d, %edi
	xorl	%ecx, %ecx
	movabsq	$4603256987541740397, %rdx      # imm = 0x3FE20DD750429B6D
	movabsq	$4614256656552045841, %rsi      # imm = 0x400921FB54442D11
.LBB1_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%rdx, (%rbx,%rcx,8)
	movq	%rsi, (%r15,%rcx,8)
	incq	%rcx
	cmpq	%rcx, %rdi
	jne	.LBB1_3
.LBB1_4:                                # %.preheader.preheader
	movq	%r15, 48(%rsp)                  # 8-byte Spill
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	movq	%r14, 104(%rsp)                 # 8-byte Spill
	xorl	%esi, %esi
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	movq	%rax, %rcx
.LBB1_5:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movzwl	%si, %edx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%edx, %xmm0
	movsd	%xmm0, (%rcx)
	addq	$5, %rsi
	addq	$8, %rcx
	cmpq	$327680, %rsi                   # imm = 0x50000
	jne	.LBB1_5
# %bb.6:
	movabsq	$4294967296, %r15               # imm = 0x100000000
	leaq	32(%rsp), %rdi
	movq	56(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	88(%rsp), %rdi
	movl	$524288, %esi                   # imm = 0x80000
	callq	hipMalloc
	leaq	72(%rsp), %rdi
	movq	64(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	80(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rax
	movq	(%rax), %rdi
	movq	%rbx, 40(%rsp)                  # 8-byte Spill
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %rax
	movq	(%rax), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	88(%rsp), %rax
	movq	(%rax), %rdi
	movl	$524288, %edx                   # imm = 0x80000
	movq	96(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leal	255(%rcx), %eax
	leal	510(%rcx), %r12d
	testl	%eax, %eax
	cmovnsl	%eax, %r12d
	sarl	$8, %r12d
	leaq	112(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	btsq	$32, %r12
	movl	$100, %ebx
	addq	$256, %r15                      # imm = 0x100
.LBB1_7:                                # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.8:                                #   in Loop: Header=BB1_7 Depth=1
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	88(%rsp), %r8
	movq	80(%rsp), %r9
	movq	72(%rsp), %rax
	movq	%rax, (%rsp)
	movq	8(%rsp), %rcx                   # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z22__device_stub__Vec_addPdS_S_iS_PjS0_
.LBB1_9:                                #   in Loop: Header=BB1_7 Depth=1
	callq	hipDeviceSynchronize
	decl	%ebx
	jne	.LBB1_7
# %bb.10:
	leaq	128(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventCreate
	movq	(%r15), %rdi
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r15), %rdi
	callq	hipEventSynchronize
	movq	112(%rsp), %rsi
	movq	(%r15), %rdx
	leaq	124(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	movss	(%r15), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI1_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rsi
	movq	104(%rsp), %r15                 # 8-byte Reload
	movq	%r15, %rdi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	80(%rsp), %rsi
	movq	%r13, %rdi
	movq	64(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	72(%rsp), %rsi
	movq	%rbp, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	8(%rsp), %rdx                   # 8-byte Reload
	testl	%edx, %edx
	jle	.LBB1_17
# %bb.11:                               # %.lr.ph81.preheader
	movl	%edx, %eax
	xorl	%ecx, %ecx
	movq	40(%rsp), %rbx                  # 8-byte Reload
.LBB1_12:                               # %.lr.ph81
                                        # =>This Inner Loop Header: Depth=1
	addl	(%rbp,%rcx,4), %r12d
	subl	(%r13,%rcx,4), %r12d
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_12
# %bb.13:                               # %._crit_edge.loopexit
	movl	%r12d, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	cvtsi2ss	%edx, %xmm1
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdx                   # 8-byte Reload
	testl	%edx, %edx
	jle	.LBB1_14
# %bb.15:                               # %.lr.ph85.preheader
	movl	%edx, %eax
	xorps	%xmm0, %xmm0
	xorl	%ecx, %ecx
	movsd	.LCPI1_1(%rip), %xmm1           # xmm1 = mem[0],zero
	movapd	.LCPI1_2(%rip), %xmm2           # xmm2 = [NaN,NaN]
.LBB1_16:                               # %.lr.ph85
                                        # =>This Inner Loop Header: Depth=1
	movapd	%xmm1, %xmm3
	subsd	(%r15,%rcx,8), %xmm3
	andpd	%xmm2, %xmm3
	addsd	%xmm3, %xmm0
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_16
	jmp	.LBB1_18
.LBB1_17:                               # %._crit_edge86.critedge
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edx, %xmm0
	xorps	%xmm1, %xmm1
	divss	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdx                   # 8-byte Reload
	xorps	%xmm0, %xmm0
	movq	40(%rsp), %rbx                  # 8-byte Reload
	jmp	.LBB1_18
.LBB1_14:
	xorps	%xmm0, %xmm0
.LBB1_18:                               # %._crit_edge86
	xorps	%xmm1, %xmm1
	cvtsi2sd	%edx, %xmm1
	divsd	%xmm1, %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	48(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_19:
	.cfi_def_cfa_offset 192
	movq	stderr(%rip), %rdi
	movq	(%rbx), %rdx
	movl	$.L.str, %esi
	xorl	%eax, %eax
	callq	fprintf
	xorl	%edi, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7Vec_addPdS_S_iS_PjS0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7Vec_addPdS_S_iS_PjS0_,@object # @_Z7Vec_addPdS_S_iS_PjS0_
	.section	.rodata,"a",@progbits
	.globl	_Z7Vec_addPdS_S_iS_PjS0_
	.p2align	3, 0x0
_Z7Vec_addPdS_S_iS_PjS0_:
	.quad	_Z22__device_stub__Vec_addPdS_S_iS_PjS0_
	.size	_Z7Vec_addPdS_S_iS_PjS0_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"usage: %s <vector order>\n"
	.size	.L.str, 26

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Elapsed time : %f ms\n"
	.size	.L.str.1, 22

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\n -------- \n average latency (cycles) %f \n"
	.size	.L.str.3, 43

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\n -------- \n avg error %.10f \n"
	.size	.L.str.4, 31

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7Vec_addPdS_S_iS_PjS0_"
	.size	.L__unnamed_1, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"clk cycles spent on each thread "
	.size	.Lstr, 33

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__Vec_addPdS_S_iS_PjS0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7Vec_addPdS_S_iS_PjS0_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7Vec_addPdS_S_iS_PjS0_ ; -- Begin function _Z7Vec_addPdS_S_iS_PjS0_
	.globl	_Z7Vec_addPdS_S_iS_PjS0_
	.p2align	8
	.type	_Z7Vec_addPdS_S_iS_PjS0_,@function
_Z7Vec_addPdS_S_iS_PjS0_:               ; @_Z7Vec_addPdS_S_iS_PjS0_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_4
; %bb.1:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v4, vcc_lo
	s_movk_i32 s5, 0x3e8
	global_load_b64 v[5:6], v[5:6], off
	global_load_b64 v[7:8], v[7:8], off
	;;#ASMSTART
	bar.sync 0;
	;;#ASMEND
	;;#ASMSTART
	mov.u32 s4, %clock;
	;;#ASMEND
	s_waitcnt vmcnt(1)
	v_cvt_f32_f64_e32 v0, v[5:6]
	s_waitcnt vmcnt(0)
	v_cvt_f32_f64_e32 v5, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v5, v0, v5
	v_dual_mul_f32 v5, v5, v0 :: v_dual_mov_b32 v0, 0x322bcc77
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_f32_e32 v0, v5, v0
	s_add_i32 s5, s5, -1
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc0 .LBB0_2
; %bb.3:
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[5:6], v0
	s_load_b128 s[8:11], s[0:1], 0x28
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	;;#ASMSTART
	mov.u32 s0, %clock;
	;;#ASMEND
	v_dual_mov_b32 v9, s4 :: v_dual_mov_b32 v10, s0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v4, vcc_lo
	global_store_b32 v[7:8], v9, off
	global_store_b32 v[0:1], v10, off
	global_store_b64 v[2:3], v[5:6], off
.LBB0_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7Vec_addPdS_S_iS_PjS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7Vec_addPdS_S_iS_PjS0_, .Lfunc_end0-_Z7Vec_addPdS_S_iS_PjS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 376
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7Vec_addPdS_S_iS_PjS0_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7Vec_addPdS_S_iS_PjS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
