#include <cuda.h>
#include <stdio.h>
#include <stdlib.h> 
#include <iostream>

#define THREADS_PER_BLOCK 32

__global__ void innerProd(float *aa, float *bb, float *cc)
{
   __shared__ float temp[THREADS_PER_BLOCK];
   int index = threadIdx.x + blockIdx.x* blockDim.x;
   temp[threadIdx.x] = aa[index]*bb[index];

   *cc = 8; // Initialized to avoid memory problems. See comments
            // below, next to the free and cudaFree commands.

   // No thread goes beyond this point until all of them
   // have reached it. Threads are only synchronized within
   // a block.
   __syncthreads();

   //  Thread 0 sums the pairwise products
   if (threadIdx.x == 0) {
     float sum = 0;
     for (int i = 0; i < THREADS_PER_BLOCK; i++){
       sum += temp[i];
     }
      // Use atomicAdd to avoid different blocks accessing cc at the
      // same time (race condition). The atomic opperation enables
      // read-modify-write to be performed by a block without interruption.
      //*cc += sum;
    atomicAdd(cc, sum);
   }

}

void cuda_function(float *ainput, float *binput, float *cinput, int NN)
{
  std::cout << ">>> inside cuda_function " << std::endl;
  std::cout << "NN = " << NN << "\n";
  
  #define NUMBER_OF_BLOCKS (NN/THREADS_PER_BLOCK)
  float *d_ainput, *d_binput, *d_cinput;// device copies of a, b, c
  //float GPU_profile;
  float size = NN * sizeof(float);

  ainput = (float *)malloc(size);
  binput = (float *)malloc(size);
  cinput = (float *)malloc(sizeof(float));
  *cinput = 7;

   for (int i = 0; i < NN; i++) {
    ainput[i] = 1;
    binput[i] = 1;
  }

  std::cout << "a[0] = " << ainput[0] << "\n";
  std::cout << "b[0] = " << binput[0] << "\n";



float test = 67.0f;

int retMem = 99;
int retMalloc = 99;


  //std::cout << "size = " << size << "\n";

  // ----- Variables to profile the execution time
  //cudaEvent_t start, stop;
  //cudaEventCreate(&start);
  //cudaEventCreate(&stop);
	
  // In the GPU ------------------------------------------
  retMalloc = cudaMalloc((void**)&*d_ainput, 1024*4);
  cudaMalloc((void**)&d_binput, size);
  cudaMalloc((void**)&d_cinput, sizeof(float));

  cudaMemcpy(d_ainput, ainput, size, cudaMemcpyHostToDevice);
  cudaMemcpy(d_binput, binput, size, cudaMemcpyHostToDevice);
  retMem = cudaMemcpy(d_cinput, cinput, sizeof(float), cudaMemcpyHostToDevice);

  // Call kernel
  //cudaEventRecord(start);
  innerProd<<<NUMBER_OF_BLOCKS, THREADS_PER_BLOCK>>>(d_ainput, d_binput, d_cinput);
  //cudaEventRecord(stop);

  cudaMemcpy(cinput, d_cinput, sizeof(float), cudaMemcpyDeviceToHost);
  //cudaEventSynchronize(stop);

  // Elapsed time -- GPU
  //cudaEventElapsedTime(&GPU_profile, start, stop);
  // -----------------------------------------------------

  std::cout << "retMalloc = " << retMalloc << "\n"; 
  std::cout << "retMem = " << retMem << "\n";  
std::cout << "NUMBER_OF_BLOCKS = " << NUMBER_OF_BLOCKS << "\n";
  std::cout << "c = " << *cinput << "\n";
 // std::cout << "Kernel execution time in GPU = " << GPU_profile <<
   //     " milliseconds" << "\n";


    std::cout << ">>> Free memory " << "\n";
   // Remember: free and cudaFree DO NOT ERASE MEMORY! They only
  // return memory to a pool to be re-allocated. That is why the shared
  // variable 'cc' is initialized inside the kernel. See this:
  // http://stackoverflow.com/questions/13100615/cudafree-is-not-freeing-memory
  //free(ainput);
  //free(binput);
  //free(cinput);

  cudaFree(d_ainput);
  cudaFree(d_binput);
  cudaFree(d_cinput);
}

	.file	"tmpxft_00294f02_00000000-6_kernelGPU.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z32__device_stub__Z9innerProdPfS_S_PfS_S_
	.type	_Z32__device_stub__Z9innerProdPfS_S_PfS_S_, @function
_Z32__device_stub__Z9innerProdPfS_S_PfS_S_:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9innerProdPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z32__device_stub__Z9innerProdPfS_S_PfS_S_, .-_Z32__device_stub__Z9innerProdPfS_S_PfS_S_
	.globl	_Z9innerProdPfS_S_
	.type	_Z9innerProdPfS_S_, @function
_Z9innerProdPfS_S_:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z9innerProdPfS_S_PfS_S_
	.cfi_endproc
.LFE3661:
	.size	_Z9innerProdPfS_S_, .-_Z9innerProdPfS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	">>> inside cuda_function "
.LC1:
	.string	"NN = "
.LC2:
	.string	"\n"
.LC6:
	.string	"a[0] = "
.LC7:
	.string	"b[0] = "
.LC8:
	.string	"retMalloc = "
.LC9:
	.string	"retMem = "
.LC10:
	.string	"NUMBER_OF_BLOCKS = "
.LC11:
	.string	"c = "
.LC12:
	.string	">>> Free memory "
	.text
	.globl	_Z13cuda_functionPfS_S_i
	.type	_Z13cuda_functionPfS_S_i, @function
_Z13cuda_functionPfS_S_i:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movslq	%ebx, %rax
	salq	$2, %rax
	js	.L9
	cvtsi2ssq	%rax, %xmm0
	jmp	.L10
.L9:
	shrq	%rax
	cvtsi2ssq	%rax, %xmm0
	addss	%xmm0, %xmm0
.L10:
	comiss	.LC3(%rip), %xmm0
	jnb	.L11
	cvttss2siq	%xmm0, %rbp
	jmp	.L12
.L11:
	subss	.LC3(%rip), %xmm0
	cvttss2siq	%xmm0, %rbp
	btcq	$63, %rbp
.L12:
	movq	%rbp, %rdi
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movl	$4, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movss	.LC5(%rip), %xmm0
	movl	$0x40e00000, (%rax)
	movq	%rax, %r12
	xorl	%eax, %eax
.L13:
	cmpl	%eax, %ebx
	jle	.L18
	movss	%xmm0, (%r14,%rax,4)
	movss	%xmm0, 0(%r13,%rax,4)
	incq	%rax
	jmp	.L13
.L18:
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	xorl	%r15d, %r15d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	(%r14), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC7(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	0(%r13), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$4096, %esi
	movq	%r15, %rdi
	call	cudaMalloc@PLT
	movq	%rbp, %rsi
	leaq	16(%rsp), %rdi
	movl	%eax, 12(%rsp)
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r14, %rsi
	movq	%r15, %rdi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	$32, %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%eax, %ebp
	movl	%ebx, %eax
	cltd
	idivl	%ecx
	movl	$134217729, %edx
	movl	$1, %ecx
	salq	$5, %rdx
	movl	%eax, 32(%rsp)
	movl	%eax, %ebx
	movabsq	$4294967297, %rax
	movq	%rax, 36(%rsp)
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	%r15, %rdi
	call	_Z32__device_stub__Z9innerProdPfS_S_PfS_S_
.L15:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC8(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	12(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC9(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC10(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC11(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	(%r12), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC12(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	xorl	%edi, %edi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z13cuda_functionPfS_S_i, .-_Z13cuda_functionPfS_S_i
	.section	.rodata.str1.1
.LC13:
	.string	"_Z9innerProdPfS_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9innerProdPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC3:
	.long	1593835520
	.align 4
.LC5:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h> 
#include <iostream>

#define THREADS_PER_BLOCK 32

__global__ void innerProd(float *aa, float *bb, float *cc)
{
   __shared__ float temp[THREADS_PER_BLOCK];
   int index = threadIdx.x + blockIdx.x* blockDim.x;
   temp[threadIdx.x] = aa[index]*bb[index];

   *cc = 8; // Initialized to avoid memory problems. See comments
            // below, next to the free and cudaFree commands.

   // No thread goes beyond this point until all of them
   // have reached it. Threads are only synchronized within
   // a block.
   __syncthreads();

   //  Thread 0 sums the pairwise products
   if (threadIdx.x == 0) {
     float sum = 0;
     for (int i = 0; i < THREADS_PER_BLOCK; i++){
       sum += temp[i];
     }
      // Use atomicAdd to avoid different blocks accessing cc at the
      // same time (race condition). The atomic opperation enables
      // read-modify-write to be performed by a block without interruption.
      //*cc += sum;
    atomicAdd(cc, sum);
   }

}

void cuda_function(float *ainput, float *binput, float *cinput, int NN)
{
  std::cout << ">>> inside cuda_function " << std::endl;
  std::cout << "NN = " << NN << "\n";
  
  #define NUMBER_OF_BLOCKS (NN/THREADS_PER_BLOCK)
  float *d_ainput, *d_binput, *d_cinput;// device copies of a, b, c
  //float GPU_profile;
  float size = NN * sizeof(float);

  ainput = (float *)malloc(size);
  binput = (float *)malloc(size);
  cinput = (float *)malloc(sizeof(float));
  *cinput = 7;

   for (int i = 0; i < NN; i++) {
    ainput[i] = 1;
    binput[i] = 1;
  }

  std::cout << "a[0] = " << ainput[0] << "\n";
  std::cout << "b[0] = " << binput[0] << "\n";



float test = 67.0f;

int retMem = 99;
int retMalloc = 99;


  //std::cout << "size = " << size << "\n";

  // ----- Variables to profile the execution time
  //cudaEvent_t start, stop;
  //cudaEventCreate(&start);
  //cudaEventCreate(&stop);
	
  // In the GPU ------------------------------------------
  retMalloc = hipMalloc((void**)&*d_ainput, 1024*4);
  hipMalloc((void**)&d_binput, size);
  hipMalloc((void**)&d_cinput, sizeof(float));

  hipMemcpy(d_ainput, ainput, size, hipMemcpyHostToDevice);
  hipMemcpy(d_binput, binput, size, hipMemcpyHostToDevice);
  retMem = hipMemcpy(d_cinput, cinput, sizeof(float), hipMemcpyHostToDevice);

  // Call kernel
  //cudaEventRecord(start);
  innerProd<<<NUMBER_OF_BLOCKS, THREADS_PER_BLOCK>>>(d_ainput, d_binput, d_cinput);
  //cudaEventRecord(stop);

  hipMemcpy(cinput, d_cinput, sizeof(float), hipMemcpyDeviceToHost);
  //cudaEventSynchronize(stop);

  // Elapsed time -- GPU
  //cudaEventElapsedTime(&GPU_profile, start, stop);
  // -----------------------------------------------------

  std::cout << "retMalloc = " << retMalloc << "\n"; 
  std::cout << "retMem = " << retMem << "\n";  
std::cout << "NUMBER_OF_BLOCKS = " << NUMBER_OF_BLOCKS << "\n";
  std::cout << "c = " << *cinput << "\n";
 // std::cout << "Kernel execution time in GPU = " << GPU_profile <<
   //     " milliseconds" << "\n";


    std::cout << ">>> Free memory " << "\n";
   // Remember: free and cudaFree DO NOT ERASE MEMORY! They only
  // return memory to a pool to be re-allocated. That is why the shared
  // variable 'cc' is initialized inside the kernel. See this:
  // http://stackoverflow.com/questions/13100615/cudafree-is-not-freeing-memory
  //free(ainput);
  //free(binput);
  //free(cinput);

  hipFree(d_ainput);
  hipFree(d_binput);
  hipFree(d_cinput);
}

	.text
	.file	"kernelGPU.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z24__device_stub__innerProdPfS_S_ # -- Begin function _Z24__device_stub__innerProdPfS_S_
	.type	_Z24__device_stub__innerProdPfS_S_,@function
_Z24__device_stub__innerProdPfS_S_:     # @_Z24__device_stub__innerProdPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9innerProdPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__innerProdPfS_S_, .Lfunc_end0-_Z24__device_stub__innerProdPfS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z13cuda_functionPfS_S_i
.LCPI1_0:
	.long	0x5f000000                      # float 9.22337203E+18
	.text
	.globl	_Z13cuda_functionPfS_S_i
	.type	_Z13cuda_functionPfS_S_i,@function
_Z13cuda_functionPfS_S_i:               # @_Z13cuda_functionPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %r14d
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$25, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movslq	%r14d, %rax
	shlq	$2, %rax
	testq	%rax, %rax
	js	.LBB1_1
# %bb.2:
	cvtsi2ss	%rax, %xmm0
	jmp	.LBB1_3
.LBB1_1:
	shrq	%rax
	cvtsi2ss	%rax, %xmm0
	addss	%xmm0, %xmm0
.LBB1_3:
	cvttss2si	%xmm0, %rax
	movq	%rax, %rcx
	sarq	$63, %rcx
	subss	.LCPI1_0(%rip), %xmm0
	cvttss2si	%xmm0, %r15
	andq	%rcx, %r15
	orq	%rax, %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r13
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r12
	movl	$4, %edi
	callq	malloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	$1088421888, (%rax)             # imm = 0x40E00000
	testl	%r14d, %r14d
	jle	.LBB1_6
# %bb.4:                                # %.lr.ph.preheader
	movl	%r14d, %eax
	xorl	%ecx, %ecx
	movl	$1065353216, %edx               # imm = 0x3F800000
.LBB1_5:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%edx, (%r13,%rcx,4)
	movl	%edx, (%r12,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_5
.LBB1_6:                                # %._crit_edge
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	movl	%eax, 20(%rsp)                  # 4-byte Spill
	leaq	24(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rbx
	movl	$4, %esi
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	%r13, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movl	$4, %edx
	movq	32(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %r12d
	leal	31(%r14), %r15d
	testl	%r14d, %r14d
	cmovnsl	%r14d, %r15d
	sarl	$5, %r15d
	movq	%r15, %rdi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.7:
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z24__device_stub__innerProdPfS_S_
.LBB1_8:
	movq	8(%rsp), %rsi
	movl	$4, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	20(%rsp), %esi                  # 4-byte Reload
	callq	_ZNSolsEi
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$9, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r12d, %esi
	callq	_ZNSolsEi
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r15d, %esi
	callq	_ZNSolsEi
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$4, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtss2sd	(%rbx), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z13cuda_functionPfS_S_i, .Lfunc_end1-_Z13cuda_functionPfS_S_i
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9innerProdPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9innerProdPfS_S_,@object      # @_Z9innerProdPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z9innerProdPfS_S_
	.p2align	3, 0x0
_Z9innerProdPfS_S_:
	.quad	_Z24__device_stub__innerProdPfS_S_
	.size	_Z9innerProdPfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	">>> inside cuda_function "
	.size	.L.str, 26

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"NN = "
	.size	.L.str.1, 6

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"\n"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"a[0] = "
	.size	.L.str.3, 8

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"b[0] = "
	.size	.L.str.4, 8

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"retMalloc = "
	.size	.L.str.5, 13

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"retMem = "
	.size	.L.str.6, 10

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"NUMBER_OF_BLOCKS = "
	.size	.L.str.7, 20

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"c = "
	.size	.L.str.8, 5

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	">>> Free memory "
	.size	.L.str.9, 17

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9innerProdPfS_S_"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__innerProdPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9innerProdPfS_S_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9innerProdPfS_S_      ; -- Begin function _Z9innerProdPfS_S_
	.globl	_Z9innerProdPfS_S_
	.p2align	8
	.type	_Z9innerProdPfS_S_,@function
_Z9innerProdPfS_S_:                     ; @_Z9innerProdPfS_S_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_mov_b32 s3, exec_lo
	v_lshlrev_b32_e32 v5, 2, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, 0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_load_b32 v3, v[3:4], off
	global_load_b32 v1, v[1:2], off
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v4, 0x41000000 :: v_dual_mul_f32 v1, v3, v1
	global_store_b32 v2, v4, s[0:1]
	ds_store_b32 v5, v1
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_5
.LBB0_1:                                ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v0, s2
	s_add_i32 s2, s2, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_eq_i32 s2, 0x80
	ds_load_b32 v0, v0
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v0
	s_cbranch_scc0 .LBB0_1
; %bb.2:
	s_mov_b32 s3, exec_lo
	s_mov_b32 s2, 0
	v_mbcnt_lo_u32_b32 v0, s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s4, exec_lo, vcc_lo
	s_mov_b32 exec_lo, s4
	s_cbranch_execz .LBB0_5
; %bb.3:
	s_bcnt1_i32_b32 s3, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_ubyte0_e32 v0, s3
	v_dual_mov_b32 v3, 0 :: v_dual_mul_f32 v2, v2, v0
	global_load_b32 v1, v3, s[0:1]
.LBB0_4:                                ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v1, v2
	global_atomic_cmpswap_b32 v0, v3, v[0:1], s[0:1] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v1
	v_mov_b32_e32 v1, v0
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_4
.LBB0_5:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9innerProdPfS_S_
		.amdhsa_group_segment_fixed_size 128
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9innerProdPfS_S_, .Lfunc_end0-_Z9innerProdPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 336
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 128 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 128
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9innerProdPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9innerProdPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
