#include <iostream>
#include <cuda.h>
#include <cuda_runtime.h>
#include<stdlib.h>
#include<stdio.h>
#define min(a,b) (a<b?a:b)

const int threadsPerBlock = 256;
int blocksPerGrid = 32;

__global__ void reduce(float *data, float *output, int N){	
  
 __shared__ float scratch[threadsPerBlock];		
	
    int global_index = threadIdx.x + blockIdx.x * blockDim.x;
    int local_index  = threadIdx.x;			
	
    //if(global_index >= N) return;  

    float   soma_bloco = 0;
    while (global_index < N) {
        soma_bloco += data[global_index];					
        global_index += blockDim.x * gridDim.x;			
    }   
    
     scratch[local_index] = soma_bloco;
    __syncthreads();		
    
    //Redução paralela

    int i = blockDim.x/2;	
    while (i != 0) {
        if (local_index < i && local_index+i < N )
            scratch[local_index] += scratch[local_index + i];
        __syncthreads();
        i /= 2;
    }

    if (local_index == 0)
        output[blockIdx.x] = scratch[0];

}

float soma_seq(float *x, int tamanho){
    int i;
    float sum=0;
    for(i=0;i<tamanho;i++) {

        sum+=x[i];
    }

    return sum;
}

int main(int argc, char * argv[])
{
        const int N = atoi(argv[1]);
	
	blocksPerGrid = min(32, (N+threadsPerBlock-1) / threadsPerBlock);
	
	float *a, *b;
	int size = N;
	float *dev_a, *dev_b; int *dev_size;

	a = (float*)malloc(N*sizeof(float));
	b = (float*)malloc(N*sizeof(float));
	
	
	cudaMalloc( (void**)&dev_a, N * sizeof(float) );
	cudaMalloc( (void**)&dev_b, N * sizeof(float) );
	cudaMalloc( (void**)&dev_size,  sizeof(int) );

	for (int i=0; i<N; i++ ){
	    a[i]= 1.0f; b[i] = 0;
	 }

	float valor_seq = soma_seq(a, N);

	float time;
	cudaEvent_t start, stop;

	cudaEventCreate(&start);
	cudaEventCreate(&stop);
	cudaEventRecord(start, 0);

	cudaMemcpy (dev_a,a, N*sizeof(float), cudaMemcpyHostToDevice);
        cudaMemcpy (dev_b,b, N*sizeof(float), cudaMemcpyHostToDevice);
        cudaMemcpy (dev_size, &size, 1*sizeof(int), cudaMemcpyHostToDevice);

	reduce<<<blocksPerGrid, threadsPerBlock>>>(dev_a, dev_b, size);

	cudaMemcpy(b, dev_b, blocksPerGrid*sizeof(float), cudaMemcpyDeviceToHost);
	
	float soma = 0;

	//Segundo estágio da redução
        for (int i=0; i<blocksPerGrid; i++) {
		soma += b[i];
	}

	cudaEventRecord(stop, 0);
	cudaEventSynchronize(stop);
	cudaEventElapsedTime(&time, start, stop);

	printf("%.10f\n", time);

	if(soma != valor_seq)
            printf("Soma incorreta\n");

	//printf("Soma: %f\n", soma);       


	cudaFree(dev_a);
	cudaFree(dev_b);

	return 0;
}

	.file	"tmpxft_00305a39_00000000-6_source.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8soma_seqPfi
	.type	_Z8soma_seqPfi, @function
_Z8soma_seqPfi:
.LFB3635:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
.L3:
	cmpl	%eax, %esi
	jle	.L6
	addss	(%rdi,%rax,4), %xmm0
	incq	%rax
	jmp	.L3
.L6:
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z8soma_seqPfi, .-_Z8soma_seqPfi
	.globl	_Z28__device_stub__Z6reducePfS_iPfS_i
	.type	_Z28__device_stub__Z6reducePfS_iPfS_i, @function
_Z28__device_stub__Z6reducePfS_iPfS_i:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6reducePfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L7:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z28__device_stub__Z6reducePfS_iPfS_i, .-_Z28__device_stub__Z6reducePfS_iPfS_i
	.globl	_Z6reducePfS_i
	.type	_Z6reducePfS_i, @function
_Z6reducePfS_i:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z6reducePfS_iPfS_i
	.cfi_endproc
.LFE3662:
	.size	_Z6reducePfS_i, .-_Z6reducePfS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"%.10f\n"
.LC3:
	.string	"Soma incorreta\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$104, %rsp
	.cfi_def_cfa_offset 144
	movq	8(%rsi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	atoi@PLT
	movl	%eax, %ebp
	movl	$32, %eax
	cmpl	$8192, %ebp
	jg	.L13
	leal	255(%rbp), %eax
	movl	$256, %ecx
	cltd
	idivl	%ecx
.L13:
	movl	%eax, blocksPerGrid(%rip)
	movl	%ebp, 20(%rsp)
	movslq	%ebp, %rbx
	salq	$2, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %r13
	call	malloc@PLT
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%rax, %r12
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movss	.LC1(%rip), %xmm0
	xorl	%eax, %eax
.L14:
	cmpl	%eax, %ebp
	jle	.L26
	movl	$0x00000000, (%r12,%rax,4)
	movss	%xmm0, 0(%r13,%rax,4)
	incq	%rax
	jmp	.L14
.L26:
	movl	%ebp, %esi
	movq	%r13, %rdi
	call	_Z8soma_seqPfi
	leaq	48(%rsp), %rdi
	movss	%xmm0, 8(%rsp)
	call	cudaEventCreate@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	leaq	20(%rsp), %rsi
	movl	$1, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	blocksPerGrid(%rip), %eax
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, 84(%rsp)
	movq	%rdx, 76(%rsp)
	movl	%eax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 68(%rsp)
	movq	64(%rsp), %rdi
	movl	72(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movl	20(%rsp), %edx
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z28__device_stub__Z6reducePfS_iPfS_i
.L16:
	movslq	blocksPerGrid(%rip), %rdx
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	blocksPerGrid(%rip), %edx
	xorl	%eax, %eax
	xorps	%xmm1, %xmm1
.L17:
	cmpl	%eax, %edx
	jle	.L27
	addss	(%r12,%rax,4), %xmm1
	incq	%rax
	jmp	.L17
.L27:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	movss	%xmm1, 12(%rsp)
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	76(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	76(%rsp), %xmm0
	call	__printf_chk@PLT
	movss	12(%rsp), %xmm1
	ucomiss	8(%rsp), %xmm1
	jp	.L23
	je	.L19
.L23:
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L19:
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$104, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z6reducePfS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6reducePfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	blocksPerGrid
	.data
	.align 4
	.type	blocksPerGrid, @object
	.size	blocksPerGrid, 4
blocksPerGrid:
	.long	32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>

#include<stdlib.h>
#include<stdio.h>
#define min(a,b) (a<b?a:b)

const int threadsPerBlock = 256;
int blocksPerGrid = 32;

__global__ void reduce(float *data, float *output, int N){	
  
 __shared__ float scratch[threadsPerBlock];		
	
    int global_index = threadIdx.x + blockIdx.x * blockDim.x;
    int local_index  = threadIdx.x;			
	
    //if(global_index >= N) return;  

    float   soma_bloco = 0;
    while (global_index < N) {
        soma_bloco += data[global_index];					
        global_index += blockDim.x * gridDim.x;			
    }   
    
     scratch[local_index] = soma_bloco;
    __syncthreads();		
    
    //Redução paralela

    int i = blockDim.x/2;	
    while (i != 0) {
        if (local_index < i && local_index+i < N )
            scratch[local_index] += scratch[local_index + i];
        __syncthreads();
        i /= 2;
    }

    if (local_index == 0)
        output[blockIdx.x] = scratch[0];

}

float soma_seq(float *x, int tamanho){
    int i;
    float sum=0;
    for(i=0;i<tamanho;i++) {

        sum+=x[i];
    }

    return sum;
}

int main(int argc, char * argv[])
{
        const int N = atoi(argv[1]);
	
	blocksPerGrid = min(32, (N+threadsPerBlock-1) / threadsPerBlock);
	
	float *a, *b;
	int size = N;
	float *dev_a, *dev_b; int *dev_size;

	a = (float*)malloc(N*sizeof(float));
	b = (float*)malloc(N*sizeof(float));
	
	
	hipMalloc( (void**)&dev_a, N * sizeof(float) );
	hipMalloc( (void**)&dev_b, N * sizeof(float) );
	hipMalloc( (void**)&dev_size,  sizeof(int) );

	for (int i=0; i<N; i++ ){
	    a[i]= 1.0f; b[i] = 0;
	 }

	float valor_seq = soma_seq(a, N);

	float time;
	hipEvent_t start, stop;

	hipEventCreate(&start);
	hipEventCreate(&stop);
	hipEventRecord(start, 0);

	hipMemcpy (dev_a,a, N*sizeof(float), hipMemcpyHostToDevice);
        hipMemcpy (dev_b,b, N*sizeof(float), hipMemcpyHostToDevice);
        hipMemcpy (dev_size, &size, 1*sizeof(int), hipMemcpyHostToDevice);

	reduce<<<blocksPerGrid, threadsPerBlock>>>(dev_a, dev_b, size);

	hipMemcpy(b, dev_b, blocksPerGrid*sizeof(float), hipMemcpyDeviceToHost);
	
	float soma = 0;

	//Segundo estágio da redução
        for (int i=0; i<blocksPerGrid; i++) {
		soma += b[i];
	}

	hipEventRecord(stop, 0);
	hipEventSynchronize(stop);
	hipEventElapsedTime(&time, start, stop);

	printf("%.10f\n", time);

	if(soma != valor_seq)
            printf("Soma incorreta\n");

	//printf("Soma: %f\n", soma);       


	hipFree(dev_a);
	hipFree(dev_b);

	return 0;
}

	.text
	.file	"source.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__reducePfS_i  # -- Begin function _Z21__device_stub__reducePfS_i
	.type	_Z21__device_stub__reducePfS_i,@function
_Z21__device_stub__reducePfS_i:         # @_Z21__device_stub__reducePfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6reducePfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__reducePfS_i, .Lfunc_end0-_Z21__device_stub__reducePfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z8soma_seqPfi                  # -- Begin function _Z8soma_seqPfi
	.type	_Z8soma_seqPfi,@function
_Z8soma_seqPfi:                         # @_Z8soma_seqPfi
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB1_1
# %bb.2:                                # %.lr.ph.preheader
	movl	%esi, %eax
	xorps	%xmm0, %xmm0
	xorl	%ecx, %ecx
.LBB1_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	addss	(%rdi,%rcx,4), %xmm0
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_3
# %bb.4:                                # %._crit_edge
	retq
.LBB1_1:
	xorps	%xmm0, %xmm0
	retq
.Lfunc_end1:
	.size	_Z8soma_seqPfi, .Lfunc_end1-_Z8soma_seqPfi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r12d
	movl	$32, %eax
	cmpl	$8192, %r12d                    # imm = 0x2000
	jg	.LBB2_2
# %bb.1:
	leal	255(%r12), %ecx
	leal	510(%r12), %eax
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$8, %eax
.LBB2_2:
	movl	%eax, blocksPerGrid(%rip)
	movl	%r12d, 12(%rsp)
	movslq	%r12d, %r14
	shlq	$2, %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %rbx
	leaq	32(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	xorps	%xmm0, %xmm0
	testl	%r12d, %r12d
	jle	.LBB2_8
# %bb.3:                                # %.lr.ph.preheader
	movl	%r12d, %r13d
	leaq	(,%r13,4), %rdx
	xorl	%ebp, %ebp
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB2_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%r15,%rbp,4)      # imm = 0x3F800000
	incq	%rbp
	cmpq	%rbp, %r13
	jne	.LBB2_4
# %bb.5:                                # %._crit_edge
	testl	%r12d, %r12d
	xorps	%xmm0, %xmm0
	jle	.LBB2_8
# %bb.6:                                # %.lr.ph.preheader.i
	xorl	%eax, %eax
.LBB2_7:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	addss	(%r15,%rax,4), %xmm0
	incq	%rax
	cmpq	%rax, %r13
	jne	.LBB2_7
.LBB2_8:                                # %_Z8soma_seqPfi.exit
	movss	%xmm0, 44(%rsp)                 # 4-byte Spill
	leaq	48(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	32(%rsp), %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	56(%rsp), %rdi
	leaq	12(%rsp), %rsi
	movl	$4, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	blocksPerGrid(%rip), %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.9:
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	12(%rsp), %edx
	callq	_Z21__device_stub__reducePfS_i
.LBB2_10:
	movq	16(%rsp), %rsi
	movslq	blocksPerGrid(%rip), %rdx
	shlq	$2, %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	blocksPerGrid(%rip), %eax
	xorps	%xmm0, %xmm0
	testl	%eax, %eax
	jle	.LBB2_11
# %bb.14:                               # %.lr.ph41.preheader
	xorl	%ecx, %ecx
.LBB2_15:                               # %.lr.ph41
                                        # =>This Inner Loop Header: Depth=1
	addss	(%rbx,%rcx,4), %xmm0
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB2_15
.LBB2_11:                               # %._crit_edge42
	movss	%xmm0, 40(%rsp)                 # 4-byte Spill
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	movq	48(%rsp), %rsi
	movq	24(%rsp), %rdx
	leaq	68(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movss	40(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	ucomiss	44(%rsp), %xmm0                 # 4-byte Folded Reload
	jne	.LBB2_12
	jnp	.LBB2_13
.LBB2_12:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB2_13:
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6reducePfS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	blocksPerGrid,@object           # @blocksPerGrid
	.data
	.globl	blocksPerGrid
	.p2align	2, 0x0
blocksPerGrid:
	.long	32                              # 0x20
	.size	blocksPerGrid, 4

	.type	_Z6reducePfS_i,@object          # @_Z6reducePfS_i
	.section	.rodata,"a",@progbits
	.globl	_Z6reducePfS_i
	.p2align	3, 0x0
_Z6reducePfS_i:
	.quad	_Z21__device_stub__reducePfS_i
	.size	_Z6reducePfS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%.10f\n"
	.size	.L.str, 7

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6reducePfS_i"
	.size	.L__unnamed_1, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Soma incorreta"
	.size	.Lstr, 15

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__reducePfS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6reducePfS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6reducePfS_i          ; -- Begin function _Z6reducePfS_i
	.globl	_Z6reducePfS_i
	.p2align	8
	.type	_Z6reducePfS_i,@function
_Z6reducePfS_i:                         ; @_Z6reducePfS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s8, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_add_u32 s0, s0, 24
	s_mov_b32 s2, s15
	s_addc_u32 s1, s1, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s9, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s2, s8, v[0:1]
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_4
; %bb.1:                                ; %.lr.ph
	s_load_b32 s1, s[0:1], 0x0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s0, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s1, s8
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_nc_u32_e32 v1, s1, v1
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s3, v1
	global_load_b32 v2, v[4:5], off
	s_or_b32 s0, vcc_lo, s0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v3, v3, v2
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_2
; %bb.3:                                ; %Flow42
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_4:                                ; %Flow43
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s9
	v_lshlrev_b32_e32 v1, 2, v0
	s_cmp_lt_u32 s8, 2
	ds_store_b32 v1, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_8
.LBB0_5:                                ; %.lr.ph32
                                        ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s1, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, s1, v0
	v_cmp_gt_u32_e32 vcc_lo, s1, v0
	v_cmp_gt_i32_e64 s0, s3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, vcc_lo, s0
	s_and_saveexec_b32 s0, s4
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	v_lshl_add_u32 v2, s1, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v1, v2
.LBB0_7:                                ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_cmp_gt_u32 s8, 3
	s_mov_b32 s8, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_5
.LBB0_8:                                ; %._crit_edge33
	s_mov_b32 s3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_10
; %bb.9:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB0_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6reducePfS_i
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6reducePfS_i, .Lfunc_end0-_Z6reducePfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 404
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6reducePfS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6reducePfS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
