// This program will demo how to use CUDA to accelerate inner-product
#include <iostream>
#include <cstdlib>
using namespace std;

#define VECNUM 50000
#define VECLEN 1000

int *inputA, *inputB;
int *devInputA, *devInputB, *devOut;
int *outCPU, *outGPU;

void init()
{
	int i, j, idx;

	inputA = new int[VECNUM * VECLEN] ;
	inputB = new int[VECNUM * VECLEN];

	for(i = 0; i < VECNUM; i++){
		for(j = 0; j < VECLEN; j++){
			idx = i*VECLEN + j;
			inputA[idx] = rand()%1000;
			inputB[idx] = rand()%1000;
		}
	}

	outCPU = new int[VECNUM]();
	outGPU = new int[VECNUM]();
}

void initGPU()
{
	int inputSize = sizeof(int)*VECNUM*VECLEN;

	cudaMalloc(&devInputA, inputSize);
	cudaMalloc(&devInputB, inputSize);
	cudaMalloc(&devOut, sizeof(int)*VECNUM);

	cudaMemcpy(devInputA, inputA, inputSize, cudaMemcpyHostToDevice);
	cudaMemcpy(devInputB, inputB, inputSize, cudaMemcpyHostToDevice);
}

__global__ 
void innerProductGPU(int *A, int *B, int *out)
{
	int y = blockIdx.x;
	int x = threadIdx.x;
	__shared__ int tmp[VECLEN];

	int idx = y * VECLEN + x;
	tmp[x] = A[idx] * B[idx];
	
	__syncthreads();

	if(x == 0){
		int i, sum = 0;
		for(i = 0; i < VECLEN; i++)
			sum += tmp[i];
		out[y] = sum;
	}
}

void innerProductCPU()
{
	int i, j, acc, idx;

	for(i = 0; i < VECNUM; i++){
		acc = 0;
		for(j = 0; j < VECLEN; j++){
			idx = i*VECLEN + j;
			acc += inputA[idx] * inputB[idx];
		}
		outCPU[i] = acc;
	}
}

bool checker(){
	int i;

	for(i = 0; i < VECNUM; i++){ 
		if(outCPU[i] != outGPU[i]){
			cout << "The element: " << i << " is wrong!\n";
			cout << "outCPU[" << i << "] = " << outCPU[i] << endl;
			cout << "outGPU[" << i << "] = " << outGPU[i] << endl;
			return false;
		}
	}

	return true;
}

int timespec_diff_us(timespec& t1, timespec& t2)
{                                                                                
  return (t2.tv_sec - t1.tv_sec) * 1e6 + (t2.tv_nsec - t1.tv_nsec) / 1e3;        
} 

int main()
{
	init();

	timespec time_begin, time_end;                                                 
  clock_gettime(CLOCK_REALTIME, &time_begin);

	innerProductCPU();

  clock_gettime(CLOCK_REALTIME, &time_end);
	cout << "CPU time for executing inner-product = " 
			 << timespec_diff_us(time_begin, time_end) / 1000 << "ms" << endl;

	/***	Inside area is CUDA related code ***/
	initGPU();

	dim3 threadsPerBlock(VECLEN);
	dim3 numBlocks(VECNUM);

  clock_gettime(CLOCK_REALTIME, &time_begin);
	/***	Lunch your CUDA kernel here ***/

	innerProductGPU<<<numBlocks, threadsPerBlock>>>(devInputA, devInputB, devOut);

	cudaDeviceSynchronize();
	/***	Lunch your CUDA kernel here ***/
  clock_gettime(CLOCK_REALTIME, &time_end);

	int outSize = sizeof(int)*VECNUM;
	cudaMemcpy(outGPU, devOut, outSize, cudaMemcpyDeviceToHost);

	cudaFree(&devInputA);
	cudaFree(&devInputB);
	cudaFree(&devOut);
	/***	Inside area is CUDA related code ***/

	cout << "GPU time for executing inner-product = " 
			 << timespec_diff_us(time_begin, time_end) / 1000 << "ms" << endl;

	if(checker())
		cout << "Congratulations! You pass the check." << endl;
	else
		cout << "Sorry! Your result is wrong." << endl;

	return 0;
}

	.file	"tmpxft_002a1c22_00000000-6_ip.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3643:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3643:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4298:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4298:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z4initv
	.type	_Z4initv, @function
_Z4initv:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$200000000, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	$1000, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rdx
	.cfi_def_cfa_offset 48
	call	_Znam@PLT
	movl	$200000000, %edi
	movq	%rax, inputA(%rip)
	call	_Znam@PLT
	movq	%rax, inputB(%rip)
.L4:
	xorl	%ebx, %ebx
.L5:
	call	rand@PLT
	leaq	0(%rbp,%rbx,4), %r13
	incq	%rbx
	cltd
	idivl	%r12d
	movq	inputA(%rip), %rax
	movl	%edx, (%rax,%r13)
	call	rand@PLT
	cltd
	idivl	%r12d
	movq	inputB(%rip), %rax
	movl	%edx, (%rax,%r13)
	cmpq	$1000, %rbx
	jne	.L5
	addq	$4000, %rbp
	cmpq	$200000000, %rbp
	jne	.L4
	movl	$200000, %edi
	xorl	%ebx, %ebx
	call	_Znam@PLT
	movl	$50000, %ecx
	movq	%rax, %rdx
	movq	%rax, %rdi
	movl	%ebx, %eax
	rep stosl
	movl	$200000, %edi
	movq	%rdx, outCPU(%rip)
	call	_Znam@PLT
	movl	$50000, %ecx
	movq	%rax, %rdx
	movq	%rax, %rdi
	movl	%ebx, %eax
	rep stosl
	movq	%rdx, outGPU(%rip)
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z4initv, .-_Z4initv
	.globl	_Z7initGPUv
	.type	_Z7initGPUv, @function
_Z7initGPUv:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$200000000, %esi
	leaq	devInputA(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$200000000, %esi
	leaq	devInputB(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$200000, %esi
	leaq	devOut(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$200000000, %edx
	movq	inputA(%rip), %rsi
	movq	devInputA(%rip), %rdi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$200000000, %edx
	movq	inputB(%rip), %rsi
	movq	devInputB(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 8
	jmp	cudaMemcpy@PLT
	.cfi_endproc
.LFE3636:
	.size	_Z7initGPUv, .-_Z7initGPUv
	.globl	_Z15innerProductCPUv
	.type	_Z15innerProductCPUv, @function
_Z15innerProductCPUv:
.LFB3637:
	.cfi_startproc
	endbr64
	movq	inputA(%rip), %r8
	movq	inputB(%rip), %r9
	xorl	%eax, %eax
	movq	outCPU(%rip), %r10
.L13:
	imulq	$4000, %rax, %rdx
	xorl	%esi, %esi
	xorl	%ecx, %ecx
.L14:
	movl	(%r8,%rdx), %edi
	imull	(%r9,%rdx), %edi
	incl	%ecx
	addq	$4, %rdx
	addl	%edi, %esi
	cmpl	$1000, %ecx
	jne	.L14
	movl	%esi, (%r10,%rax,4)
	incq	%rax
	cmpq	$50000, %rax
	jne	.L13
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z15innerProductCPUv, .-_Z15innerProductCPUv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"The element: "
.LC1:
	.string	" is wrong!\n"
.LC2:
	.string	"outCPU["
.LC3:
	.string	"] = "
.LC4:
	.string	"outGPU["
	.text
	.globl	_Z7checkerv
	.type	_Z7checkerv, @function
_Z7checkerv:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 48
	movq	outCPU(%rip), %rax
	movq	outGPU(%rip), %rdx
.L20:
	movl	(%rdx,%rbx,4), %ecx
	cmpl	%ecx, (%rax,%rbx,4)
	je	.L18
	leaq	_ZSt4cout(%rip), %r13
	leaq	.LC0(%rip), %rsi
	movq	%r13, %rdi
	leaq	.LC3(%rip), %rbp
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	outCPU(%rip), %rax
	movl	(%rax,%rbx,4), %esi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC4(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	outGPU(%rip), %rax
	movl	(%rax,%rbx,4), %esi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	xorl	%eax, %eax
	jmp	.L17
.L18:
	incq	%rbx
	cmpq	$50000, %rbx
	jne	.L20
	movb	$1, %al
.L17:
	popq	%rdx
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	_Z7checkerv, .-_Z7checkerv
	.globl	_Z16timespec_diff_usR8timespecS0_
	.type	_Z16timespec_diff_usR8timespecS0_, @function
_Z16timespec_diff_usR8timespecS0_:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	(%rsi), %rax
	subq	(%rdi), %rax
	cvtsi2sdq	%rax, %xmm0
	mulsd	.LC5(%rip), %xmm0
	movq	8(%rsi), %rax
	subq	8(%rdi), %rax
	cvtsi2sdq	%rax, %xmm1
	divsd	.LC6(%rip), %xmm1
	addsd	%xmm1, %xmm0
	cvttsd2sil	%xmm0, %eax
	ret
	.cfi_endproc
.LFE3639:
	.size	_Z16timespec_diff_usR8timespecS0_, .-_Z16timespec_diff_usR8timespecS0_
	.globl	_Z39__device_stub__Z15innerProductGPUPiS_S_PiS_S_
	.type	_Z39__device_stub__Z15innerProductGPUPiS_S_PiS_S_, @function
_Z39__device_stub__Z15innerProductGPUPiS_S_PiS_S_:
.LFB3665:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15innerProductGPUPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L24:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3665:
	.size	_Z39__device_stub__Z15innerProductGPUPiS_S_PiS_S_, .-_Z39__device_stub__Z15innerProductGPUPiS_S_PiS_S_
	.globl	_Z15innerProductGPUPiS_S_
	.type	_Z15innerProductGPUPiS_S_, @function
_Z15innerProductGPUPiS_S_:
.LFB3666:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z15innerProductGPUPiS_S_PiS_S_
	.cfi_endproc
.LFE3666:
	.size	_Z15innerProductGPUPiS_S_, .-_Z15innerProductGPUPiS_S_
	.section	.rodata.str1.1
.LC7:
	.string	"CPU time for executing inner-product = "
.LC8:
	.string	"ms"
.LC9:
	.string	"GPU time for executing inner-product = "
.LC10:
	.string	"Congratulations! You pass the check."
.LC11:
	.string	"Sorry! Your result is wrong."
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3640:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC8(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	leaq	_ZSt4cout(%rip), %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rbp
	leaq	40(%rsp), %r12
	call	_Z4initv
	xorl	%edi, %edi
	movq	%rbp, %rsi
	call	clock_gettime@PLT
	call	_Z15innerProductCPUv
	xorl	%edi, %edi
	movq	%r12, %rsi
	call	clock_gettime@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r12, %rsi
	movq	%rbp, %rdi
	movq	%rax, %rcx
	call	_Z16timespec_diff_usR8timespecS0_
	movl	$1000, %esi
	movq	%rcx, %rdi
	cltd
	idivl	%esi
	movl	%eax, %esi
	call	_ZNSolsEi@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	call	_Z7initGPUv
	movl	$536871037, %eax
	xorl	%edi, %edi
	movq	%rbp, %rsi
	salq	$3, %rax
	movl	$1, 8(%rsp)
	movq	%rax, (%rsp)
	addq	$49000, %rax
	movq	%rax, 12(%rsp)
	movl	$1, 20(%rsp)
	call	clock_gettime@PLT
	movl	8(%rsp), %ecx
	movq	(%rsp), %rdx
	xorl	%r9d, %r9d
	movq	12(%rsp), %rdi
	movl	20(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	movq	devOut(%rip), %rdx
	movq	devInputB(%rip), %rsi
	movq	devInputA(%rip), %rdi
	call	_Z39__device_stub__Z15innerProductGPUPiS_S_PiS_S_
.L30:
	call	cudaDeviceSynchronize@PLT
	movq	%r12, %rsi
	xorl	%edi, %edi
	call	clock_gettime@PLT
	movl	$2, %ecx
	movl	$200000, %edx
	movq	devOut(%rip), %rsi
	movq	outGPU(%rip), %rdi
	call	cudaMemcpy@PLT
	leaq	devInputA(%rip), %rdi
	call	cudaFree@PLT
	leaq	devInputB(%rip), %rdi
	call	cudaFree@PLT
	leaq	devOut(%rip), %rdi
	call	cudaFree@PLT
	leaq	.LC9(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r12, %rsi
	movq	%rbp, %rdi
	movq	%rax, %rcx
	call	_Z16timespec_diff_usR8timespecS0_
	movl	$1000, %esi
	movq	%rcx, %rdi
	cltd
	idivl	%esi
	movl	%eax, %esi
	call	_ZNSolsEi@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	call	_Z7checkerv
	leaq	.LC10(%rip), %rsi
	testb	%al, %al
	jne	.L35
	leaq	.LC11(%rip), %rsi
.L35:
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3640:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z15innerProductGPUPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3668:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15innerProductGPUPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3668:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	outGPU
	.bss
	.align 8
	.type	outGPU, @object
	.size	outGPU, 8
outGPU:
	.zero	8
	.globl	outCPU
	.align 8
	.type	outCPU, @object
	.size	outCPU, 8
outCPU:
	.zero	8
	.globl	devOut
	.align 8
	.type	devOut, @object
	.size	devOut, 8
devOut:
	.zero	8
	.globl	devInputB
	.align 8
	.type	devInputB, @object
	.size	devInputB, 8
devInputB:
	.zero	8
	.globl	devInputA
	.align 8
	.type	devInputA, @object
	.size	devInputA, 8
devInputA:
	.zero	8
	.globl	inputB
	.align 8
	.type	inputB, @object
	.size	inputB, 8
inputB:
	.zero	8
	.globl	inputA
	.align 8
	.type	inputA, @object
	.size	inputA, 8
inputA:
	.zero	8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1093567616
	.align 8
.LC6:
	.long	0
	.long	1083129856
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// This program will demo how to use CUDA to accelerate inner-product

#include <hip/hip_runtime.h>
#include <iostream>
#include <cstdlib>
using namespace std;

#define VECNUM 50000
#define VECLEN 1000

int *inputA, *inputB;
int *devInputA, *devInputB, *devOut;
int *outCPU, *outGPU;

void init()
{
	int i, j, idx;

	inputA = new int[VECNUM * VECLEN] ;
	inputB = new int[VECNUM * VECLEN];

	for(i = 0; i < VECNUM; i++){
		for(j = 0; j < VECLEN; j++){
			idx = i*VECLEN + j;
			inputA[idx] = rand()%1000;
			inputB[idx] = rand()%1000;
		}
	}

	outCPU = new int[VECNUM]();
	outGPU = new int[VECNUM]();
}

void initGPU()
{
	int inputSize = sizeof(int)*VECNUM*VECLEN;

	hipMalloc(&devInputA, inputSize);
	hipMalloc(&devInputB, inputSize);
	hipMalloc(&devOut, sizeof(int)*VECNUM);

	hipMemcpy(devInputA, inputA, inputSize, hipMemcpyHostToDevice);
	hipMemcpy(devInputB, inputB, inputSize, hipMemcpyHostToDevice);
}

__global__ 
void innerProductGPU(int *A, int *B, int *out)
{
	int y = blockIdx.x;
	int x = threadIdx.x;
	__shared__ int tmp[VECLEN];

	int idx = y * VECLEN + x;
	tmp[x] = A[idx] * B[idx];
	
	__syncthreads();

	if(x == 0){
		int i, sum = 0;
		for(i = 0; i < VECLEN; i++)
			sum += tmp[i];
		out[y] = sum;
	}
}

void innerProductCPU()
{
	int i, j, acc, idx;

	for(i = 0; i < VECNUM; i++){
		acc = 0;
		for(j = 0; j < VECLEN; j++){
			idx = i*VECLEN + j;
			acc += inputA[idx] * inputB[idx];
		}
		outCPU[i] = acc;
	}
}

bool checker(){
	int i;

	for(i = 0; i < VECNUM; i++){ 
		if(outCPU[i] != outGPU[i]){
			cout << "The element: " << i << " is wrong!\n";
			cout << "outCPU[" << i << "] = " << outCPU[i] << endl;
			cout << "outGPU[" << i << "] = " << outGPU[i] << endl;
			return false;
		}
	}

	return true;
}

int timespec_diff_us(timespec& t1, timespec& t2)
{                                                                                
  return (t2.tv_sec - t1.tv_sec) * 1e6 + (t2.tv_nsec - t1.tv_nsec) / 1e3;        
} 

int main()
{
	init();

	timespec time_begin, time_end;                                                 
  clock_gettime(CLOCK_REALTIME, &time_begin);

	innerProductCPU();

  clock_gettime(CLOCK_REALTIME, &time_end);
	cout << "CPU time for executing inner-product = " 
			 << timespec_diff_us(time_begin, time_end) / 1000 << "ms" << endl;

	/***	Inside area is CUDA related code ***/
	initGPU();

	dim3 threadsPerBlock(VECLEN);
	dim3 numBlocks(VECNUM);

  clock_gettime(CLOCK_REALTIME, &time_begin);
	/***	Lunch your CUDA kernel here ***/

	innerProductGPU<<<numBlocks, threadsPerBlock>>>(devInputA, devInputB, devOut);

	hipDeviceSynchronize();
	/***	Lunch your CUDA kernel here ***/
  clock_gettime(CLOCK_REALTIME, &time_end);

	int outSize = sizeof(int)*VECNUM;
	hipMemcpy(outGPU, devOut, outSize, hipMemcpyDeviceToHost);

	hipFree(&devInputA);
	hipFree(&devInputB);
	hipFree(&devOut);
	/***	Inside area is CUDA related code ***/

	cout << "GPU time for executing inner-product = " 
			 << timespec_diff_us(time_begin, time_end) / 1000 << "ms" << endl;

	if(checker())
		cout << "Congratulations! You pass the check." << endl;
	else
		cout << "Sorry! Your result is wrong." << endl;

	return 0;
}

	.text
	.file	"ip.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z4initv                        # -- Begin function _Z4initv
	.type	_Z4initv,@function
_Z4initv:                               # @_Z4initv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$200000000, %edi                # imm = 0xBEBC200
	callq	_Znam
	movq	%rax, inputA(%rip)
	movl	$200000000, %edi                # imm = 0xBEBC200
	callq	_Znam
	movq	%rax, inputB(%rip)
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB0_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_2 Depth 2
	movl	$1000, %r15d                    # imm = 0x3E8
	movq	%rbx, %r12
.LBB0_2:                                #   Parent Loop BB0_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	movq	inputA(%rip), %rcx
	movl	%eax, (%rcx,%r12)
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	movq	inputB(%rip), %rcx
	movl	%eax, (%rcx,%r12)
	addq	$4, %r12
	decq	%r15
	jne	.LBB0_2
# %bb.3:                                #   in Loop: Header=BB0_1 Depth=1
	incq	%r14
	addq	$4000, %rbx                     # imm = 0xFA0
	cmpq	$50000, %r14                    # imm = 0xC350
	jne	.LBB0_1
# %bb.4:
	movl	$200000, %edi                   # imm = 0x30D40
	callq	_Znam
	movq	%rax, %rbx
	movl	$200000, %edx                   # imm = 0x30D40
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	%rbx, outCPU(%rip)
	movl	$200000, %edi                   # imm = 0x30D40
	callq	_Znam
	movq	%rax, %rbx
	movl	$200000, %edx                   # imm = 0x30D40
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	%rbx, outGPU(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z4initv, .Lfunc_end0-_Z4initv
	.cfi_endproc
                                        # -- End function
	.globl	_Z7initGPUv                     # -- Begin function _Z7initGPUv
	.type	_Z7initGPUv,@function
_Z7initGPUv:                            # @_Z7initGPUv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$devInputA, %edi
	movl	$200000000, %esi                # imm = 0xBEBC200
	callq	hipMalloc
	movl	$devInputB, %edi
	movl	$200000000, %esi                # imm = 0xBEBC200
	callq	hipMalloc
	movl	$devOut, %edi
	movl	$200000, %esi                   # imm = 0x30D40
	callq	hipMalloc
	movq	devInputA(%rip), %rdi
	movq	inputA(%rip), %rsi
	movl	$200000000, %edx                # imm = 0xBEBC200
	movl	$1, %ecx
	callq	hipMemcpy
	movq	devInputB(%rip), %rdi
	movq	inputB(%rip), %rsi
	movl	$200000000, %edx                # imm = 0xBEBC200
	movl	$1, %ecx
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipMemcpy                       # TAILCALL
.Lfunc_end1:
	.size	_Z7initGPUv, .Lfunc_end1-_Z7initGPUv
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__innerProductGPUPiS_S_ # -- Begin function _Z30__device_stub__innerProductGPUPiS_S_
	.type	_Z30__device_stub__innerProductGPUPiS_S_,@function
_Z30__device_stub__innerProductGPUPiS_S_: # @_Z30__device_stub__innerProductGPUPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15innerProductGPUPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z30__device_stub__innerProductGPUPiS_S_, .Lfunc_end2-_Z30__device_stub__innerProductGPUPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z15innerProductCPUv            # -- Begin function _Z15innerProductCPUv
	.type	_Z15innerProductCPUv,@function
_Z15innerProductCPUv:                   # @_Z15innerProductCPUv
	.cfi_startproc
# %bb.0:
	movq	inputA(%rip), %rax
	movq	inputB(%rip), %rcx
	movq	outCPU(%rip), %rdx
	xorl	%esi, %esi
	movl	$4000, %edi                     # imm = 0xFA0
.LBB3_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
.LBB3_2:                                #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rcx,%r9,4), %r10d
	imull	(%rax,%r9,4), %r10d
	addl	%r10d, %r8d
	incq	%r9
	cmpq	$1000, %r9                      # imm = 0x3E8
	jne	.LBB3_2
# %bb.3:                                #   in Loop: Header=BB3_1 Depth=1
	movl	%r8d, (%rdx,%rsi,4)
	incq	%rsi
	addq	%rdi, %rcx
	addq	%rdi, %rax
	cmpq	$50000, %rsi                    # imm = 0xC350
	jne	.LBB3_1
# %bb.4:
	retq
.Lfunc_end3:
	.size	_Z15innerProductCPUv, .Lfunc_end3-_Z15innerProductCPUv
	.cfi_endproc
                                        # -- End function
	.globl	_Z7checkerv                     # -- Begin function _Z7checkerv
	.type	_Z7checkerv,@function
_Z7checkerv:                            # @_Z7checkerv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	outCPU(%rip), %rax
	movq	outGPU(%rip), %rcx
	movl	(%rax), %edx
	cmpl	(%rcx), %edx
	jne	.LBB4_1
# %bb.5:                                # %.lr.ph.preheader
	xorl	%edx, %edx
.LBB4_6:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	cmpq	$49999, %rdx                    # imm = 0xC34F
	je	.LBB4_7
# %bb.2:                                #   in Loop: Header=BB4_6 Depth=1
	movl	4(%rax,%rdx,4), %esi
	leaq	1(%rdx), %r14
	cmpl	4(%rcx,%rdx,4), %esi
	movq	%r14, %rdx
	je	.LBB4_6
# %bb.3:                                # %._crit_edge.loopexit
	leaq	-1(%r14), %rax
	cmpq	$49999, %rax                    # imm = 0xC34F
	setae	%bl
	jmp	.LBB4_4
.LBB4_1:
	xorl	%r14d, %r14d
	xorl	%ebx, %ebx
.LBB4_4:                                # %._crit_edge
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movl	$.L.str.1, %esi
	movl	$11, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movl	$.L.str.3, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	outCPU(%rip), %rax
	movl	(%rax,%r14,4), %esi
	movq	%r15, %rdi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movl	$.L.str.3, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	outGPU(%rip), %rax
	movl	(%rax,%r14,4), %esi
	movq	%r15, %rdi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	jmp	.LBB4_8
.LBB4_7:                                # %.loopexit.loopexit
	setae	%bl
.LBB4_8:                                # %.loopexit
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z7checkerv, .Lfunc_end4-_Z7checkerv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z16timespec_diff_usR8timespecS0_
.LCPI5_0:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI5_1:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	_Z16timespec_diff_usR8timespecS0_
	.type	_Z16timespec_diff_usR8timespecS0_,@function
_Z16timespec_diff_usR8timespecS0_:      # @_Z16timespec_diff_usR8timespecS0_
	.cfi_startproc
# %bb.0:
	movq	(%rsi), %rax
	movq	8(%rsi), %rcx
	subq	(%rdi), %rax
	cvtsi2sd	%rax, %xmm0
	mulsd	.LCPI5_0(%rip), %xmm0
	subq	8(%rdi), %rcx
	cvtsi2sd	%rcx, %xmm1
	divsd	.LCPI5_1(%rip), %xmm1
	addsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %eax
	retq
.Lfunc_end5:
	.size	_Z16timespec_diff_usR8timespecS0_, .Lfunc_end5-_Z16timespec_diff_usR8timespecS0_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI6_0:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI6_1:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$40, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	callq	_Z4initv
	leaq	8(%rsp), %rbx
	xorl	%edi, %edi
	movq	%rbx, %rsi
	callq	clock_gettime
	callq	_Z15innerProductCPUv
	leaq	24(%rsp), %r14
	xorl	%edi, %edi
	movq	%r14, %rsi
	callq	clock_gettime
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$39, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r14), %rax
	movq	8(%r14), %rcx
	subq	(%rbx), %rax
	cvtsi2sd	%rax, %xmm0
	mulsd	.LCPI6_0(%rip), %xmm0
	subq	8(%rbx), %rcx
	cvtsi2sd	%rcx, %xmm1
	divsd	.LCPI6_1(%rip), %xmm1
	addsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %eax
	cltq
	imulq	$274877907, %rax, %rsi          # imm = 0x10624DD3
	movq	%rsi, %rax
	shrq	$63, %rax
	sarq	$38, %rsi
	addl	%eax, %esi
	movl	$_ZSt4cout, %edi
                                        # kill: def $esi killed $esi killed $rsi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movl	$.L.str.6, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r14), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	callq	_Z7initGPUv
	xorl	%edi, %edi
	movq	%rbx, %rsi
	callq	clock_gettime
	movabsq	$4294968296, %rdx               # imm = 0x1000003E8
	leaq	49000(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_2
# %bb.1:
	movq	devInputA(%rip), %rdi
	movq	devInputB(%rip), %rsi
	movq	devOut(%rip), %rdx
	callq	_Z30__device_stub__innerProductGPUPiS_S_
.LBB6_2:
	callq	hipDeviceSynchronize
	leaq	24(%rsp), %rbx
	xorl	%edi, %edi
	movq	%rbx, %rsi
	callq	clock_gettime
	movq	outGPU(%rip), %rdi
	movq	devOut(%rip), %rsi
	movl	$200000, %edx                   # imm = 0x30D40
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$devInputA, %edi
	callq	hipFree
	movl	$devInputB, %edi
	callq	hipFree
	movl	$devOut, %edi
	callq	hipFree
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$39, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	8(%rbx), %rcx
	subq	8(%rsp), %rax
	cvtsi2sd	%rax, %xmm0
	mulsd	.LCPI6_0(%rip), %xmm0
	subq	16(%rsp), %rcx
	cvtsi2sd	%rcx, %xmm1
	divsd	.LCPI6_1(%rip), %xmm1
	addsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %eax
	cltq
	imulq	$274877907, %rax, %rsi          # imm = 0x10624DD3
	movq	%rsi, %rax
	shrq	$63, %rax
	sarq	$38, %rsi
	addl	%eax, %esi
	movl	$_ZSt4cout, %edi
                                        # kill: def $esi killed $esi killed $rsi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.6, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	callq	_Z7checkerv
	movl	$_ZSt4cout, %edi
	testb	%al, %al
	je	.LBB6_4
# %bb.3:
	movl	$.L.str.8, %esi
	movl	$36, %edx
	jmp	.LBB6_5
.LBB6_4:
	movl	$.L.str.9, %esi
	movl	$28, %edx
.LBB6_5:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15innerProductGPUPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	inputA,@object                  # @inputA
	.bss
	.globl	inputA
	.p2align	3, 0x0
inputA:
	.quad	0
	.size	inputA, 8

	.type	inputB,@object                  # @inputB
	.globl	inputB
	.p2align	3, 0x0
inputB:
	.quad	0
	.size	inputB, 8

	.type	devInputA,@object               # @devInputA
	.globl	devInputA
	.p2align	3, 0x0
devInputA:
	.quad	0
	.size	devInputA, 8

	.type	devInputB,@object               # @devInputB
	.globl	devInputB
	.p2align	3, 0x0
devInputB:
	.quad	0
	.size	devInputB, 8

	.type	devOut,@object                  # @devOut
	.globl	devOut
	.p2align	3, 0x0
devOut:
	.quad	0
	.size	devOut, 8

	.type	outCPU,@object                  # @outCPU
	.globl	outCPU
	.p2align	3, 0x0
outCPU:
	.quad	0
	.size	outCPU, 8

	.type	outGPU,@object                  # @outGPU
	.globl	outGPU
	.p2align	3, 0x0
outGPU:
	.quad	0
	.size	outGPU, 8

	.type	_Z15innerProductGPUPiS_S_,@object # @_Z15innerProductGPUPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z15innerProductGPUPiS_S_
	.p2align	3, 0x0
_Z15innerProductGPUPiS_S_:
	.quad	_Z30__device_stub__innerProductGPUPiS_S_
	.size	_Z15innerProductGPUPiS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"The element: "
	.size	.L.str, 14

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" is wrong!\n"
	.size	.L.str.1, 12

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"outCPU["
	.size	.L.str.2, 8

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"] = "
	.size	.L.str.3, 5

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"outGPU["
	.size	.L.str.4, 8

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"CPU time for executing inner-product = "
	.size	.L.str.5, 40

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"ms"
	.size	.L.str.6, 3

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"GPU time for executing inner-product = "
	.size	.L.str.7, 40

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Congratulations! You pass the check."
	.size	.L.str.8, 37

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Sorry! Your result is wrong."
	.size	.L.str.9, 29

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15innerProductGPUPiS_S_"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__innerProductGPUPiS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym devInputA
	.addrsig_sym devInputB
	.addrsig_sym devOut
	.addrsig_sym _Z15innerProductGPUPiS_S_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15innerProductGPUPiS_S_ ; -- Begin function _Z15innerProductGPUPiS_S_
	.globl	_Z15innerProductGPUPiS_S_
	.p2align	8
	.type	_Z15innerProductGPUPiS_S_,@function
_Z15innerProductGPUPiS_S_:              ; @_Z15innerProductGPUPiS_S_
; %bb.0:
	s_mov_b32 s2, s15
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mad_u64_u32 v[1:2], null, 0x3e8, s2, v[0:1]
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	s_mov_b32 s4, exec_lo
	global_load_b32 v3, v[3:4], off
	global_load_b32 v1, v[1:2], off
	v_lshlrev_b32_e32 v2, 2, v0
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v1, v1, v3
	ds_store_b32 v2, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_4
; %bb.1:                                ; %.preheader.preheader
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mov_b32_e32 v0, 0
.LBB0_2:                                ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v1, s3
	s_add_i32 s3, s3, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s3, 0xfa0
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v0, v1, v0
	s_cbranch_scc1 .LBB0_2
; %bb.3:
	s_ashr_i32 s3, s2, 31
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[2:3], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	global_store_b32 v1, v0, s[0:1]
.LBB0_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15innerProductGPUPiS_S_
		.amdhsa_group_segment_fixed_size 4000
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15innerProductGPUPiS_S_, .Lfunc_end0-_Z15innerProductGPUPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 236
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4000 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 4000
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15innerProductGPUPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15innerProductGPUPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
