#include <iostream>
#include <math.h>
#include <float.h>


__global__ void sdt_compute(unsigned char *img, int *sz, float *sdt, int sz_edge, int width, float *d_min, int start, int val)
{
  int tx = threadIdx.x + blockDim.x*blockIdx.x;
	extern __shared__ int ep[];
  for(int i=start, j=0;i< val; i++){
    ep[j++] = sz[i];
  }
  __syncthreads();
  float min_dist, dist2;
  min_dist = d_min[tx];
  float _x, _y;
  float sign;
  float dx, dy;
  int x = tx % width;
  int y = tx / width;
  for(int k=0; k<val-start; k++)
  {
    _x = ep[k] % width;
    _y = ep[k] / width;
    dx = _x - x;
    dy = _y - y;
    dist2 = dx*dx + dy*dy;
    if(dist2 < min_dist) min_dist = dist2;
  }
  d_min[tx] = min_dist;

}


__global__ void final_comp(unsigned char *img, float *d_min, float *d_min2, float *sdt)
{
  float sign;
  int tx = threadIdx.x + blockDim.x*blockIdx.x;
  sign  = (img[tx] >= 127)? 1.0f : -1.0f;
  float dm = d_min[tx];
  if(dm > d_min2[tx])
    dm = d_min2[tx];
  sdt[tx] = sign * sqrtf(dm);  
}

extern "C" void run_sampleKernel(unsigned char * bitmap, float *sdt, int width, int height)
{
  //Collect all edge pixels in an array
  int sz = width*height;
  int sz_edge = 0;
  for(int i = 0; i<sz; i++) if(bitmap[i] == 255) sz_edge++;
  int *edge_pixels = new int[sz_edge];
  for(int i = 0, j = 0; i<sz; i++) if(bitmap[i] == 255) edge_pixels[j++] = i;
  std::cout<< "\t"<<sz_edge << " edge pixels in the image of size " << width << " x " << height << "\n"<<std::flush;

  int *d_sz;
  float *temp_min;
  unsigned char *d_img;
  float *d_sdt, *d_min, *d_min2;

  cudaMallocHost(&temp_min,height*width*sizeof(float));
  // temp_min = new float[height*width];

  for(int i=0;i<height*width;i++){
    temp_min[i] = FLT_MAX;
  }

  cudaStream_t stream1, stream2;
  cudaStreamCreate(&stream1);
  cudaStreamCreate(&stream2);
  // cudaStreamCreateWithFlags(&stream1,cudaStreamNonBlocking);

  cudaMalloc((void**)&d_sz, sz_edge*sizeof(int));
  cudaMalloc((void**)&d_img, height*width*sizeof(unsigned char));
  cudaMalloc((void**)&d_sdt, height*width*sizeof(float));
  cudaMalloc((void**)&d_min, height*width*sizeof(float));
  cudaMalloc((void**)&d_min2, height*width*sizeof(float));

  cudaMemcpyAsync(d_img, bitmap, width*height*sizeof(unsigned char), cudaMemcpyHostToDevice);
  cudaMemcpyAsync(d_min, temp_min, width*height*sizeof(float), cudaMemcpyHostToDevice);
  cudaMemcpyAsync(d_min2, temp_min, width*height*sizeof(float), cudaMemcpyHostToDevice);
  cudaMemcpyAsync(d_sz, edge_pixels, sz_edge*sizeof(int), cudaMemcpyHostToDevice);

  int divisions = 20;
  int val_div = sz_edge/divisions;
  int n, m;
  m =1;
  for(n =0; n<divisions; n+=2){
    sdt_compute<<<(height*width)/256, 256, val_div*sizeof(int), stream2>>>(d_img, d_sz, d_sdt, sz_edge, width, d_min, n*val_div, (n+1)*val_div); 
    sdt_compute<<<(height*width)/256, 256, val_div*sizeof(int), stream1>>>(d_img, d_sz, d_sdt, sz_edge, width, d_min2, m*val_div, (m+1)*val_div);
    m += 2; 
  }
  // std::cout<<n<<std::endl;
  if((sz_edge%divisions) !=0){
    sdt_compute<<<(height*width)/256, 256, (sz_edge%divisions)*sizeof(int)>>>(d_img, d_sz, d_sdt, sz_edge, width, d_min, (m-1)*val_div, (m-1)*val_div + sz_edge%divisions);
  }

  final_comp<<<(height*width)/256, 256>>>(d_img, d_min, d_min2, d_sdt);
  cudaDeviceSynchronize();
  cudaMemcpy(sdt, d_sdt, height*width*sizeof(float), cudaMemcpyDeviceToHost);

}

	.file	"tmpxft_002c09f9_00000000-6_sdt_gpu_kernels.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z42__device_stub__Z11sdt_computePhPiPfiiS1_iiPhPiPfiiS1_ii
	.type	_Z42__device_stub__Z11sdt_computePhPiPfiiS1_iiPhPiPfiiS1_ii, @function
_Z42__device_stub__Z11sdt_computePhPiPfiiS1_iiPhPiPfiiS1_ii:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z11sdt_computePhPiPfiiS1_ii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z42__device_stub__Z11sdt_computePhPiPfiiS1_iiPhPiPfiiS1_ii, .-_Z42__device_stub__Z11sdt_computePhPiPfiiS1_iiPhPiPfiiS1_ii
	.globl	_Z11sdt_computePhPiPfiiS1_ii
	.type	_Z11sdt_computePhPiPfiiS1_ii, @function
_Z11sdt_computePhPiPfiiS1_ii:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z11sdt_computePhPiPfiiS1_iiPhPiPfiiS1_ii
	.cfi_endproc
.LFE3661:
	.size	_Z11sdt_computePhPiPfiiS1_ii, .-_Z11sdt_computePhPiPfiiS1_ii
	.globl	_Z38__device_stub__Z10final_compPhPfS0_S0_PhPfS0_S0_
	.type	_Z38__device_stub__Z10final_compPhPfS0_S0_PhPfS0_S0_, @function
_Z38__device_stub__Z10final_compPhPfS0_S0_PhPfS0_S0_:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10final_compPhPfS0_S0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z38__device_stub__Z10final_compPhPfS0_S0_PhPfS0_S0_, .-_Z38__device_stub__Z10final_compPhPfS0_S0_PhPfS0_S0_
	.globl	_Z10final_compPhPfS0_S0_
	.type	_Z10final_compPhPfS0_S0_, @function
_Z10final_compPhPfS0_S0_:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z10final_compPhPfS0_S0_PhPfS0_S0_
	.cfi_endproc
.LFE3663:
	.size	_Z10final_compPhPfS0_S0_, .-_Z10final_compPhPfS0_S0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\t"
.LC1:
	.string	" edge pixels in the image of size "
.LC2:
	.string	" x "
.LC3:
	.string	"\n"
	.text
	.globl	run_sampleKernel
	.type	run_sampleKernel, @function
run_sampleKernel:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%ecx, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	imull	%ecx, %ebx
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movq	%rsi, 40(%rsp)
	movl	%edx, 20(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
.L14:
	cmpl	%eax, %ebx
	jle	.L37
	cmpb	$-1, 0(%r13,%rax)
	jne	.L15
	incl	%ebp
.L15:
	incq	%rax
	jmp	.L14
.L37:
	movabsq	$2305843009213693950, %rax
	movslq	%ebp, %r12
	cmpq	%r12, %rax
	jb	.L17
	salq	$2, %r12
	movq	%r12, %rdi
	call	_Znam@PLT
	xorl	%edx, %edx
	movq	%rax, %r14
	xorl	%eax, %eax
	jmp	.L18
.L17:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L36
	call	__cxa_throw_bad_array_new_length@PLT
.L21:
	cmpb	$-1, 0(%r13,%rax)
	jne	.L20
	movslq	%edx, %rcx
	incl	%edx
	movl	%eax, (%r14,%rcx,4)
.L20:
	incq	%rax
.L18:
	cmpl	%eax, %ebx
	jg	.L21
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	20(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r15d, %esi
	movslq	%ebx, %r15
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZNSo5flushEv@PLT
	leaq	0(,%r15,4), %rax
	xorl	%edx, %edx
	leaq	56(%rsp), %rdi
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaHostAlloc@PLT
	movq	56(%rsp), %rdx
	movss	.LC4(%rip), %xmm0
	xorl	%eax, %eax
.L22:
	cmpl	%eax, %ebx
	jle	.L38
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	jmp	.L22
.L38:
	leaq	96(%rsp), %rdi
	call	cudaStreamCreate@PLT
	leaq	104(%rsp), %rdi
	call	cudaStreamCreate@PLT
	movq	%r12, %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	%r15, %rsi
	leaq	64(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	80(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	88(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	64(%rsp), %rdi
	movq	%r15, %rdx
	movq	%r13, %rsi
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967552, %r15
	call	cudaMemcpyAsync@PLT
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rsi
	xorl	%r8d, %r8d
	movq	80(%rsp), %rdi
	movl	$1, %ecx
	call	cudaMemcpyAsync@PLT
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rsi
	xorl	%r8d, %r8d
	movq	88(%rsp), %rdi
	movl	$1, %ecx
	call	cudaMemcpyAsync@PLT
	movq	48(%rsp), %rdi
	movq	%r12, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	movabsq	$4294967297, %r14
	call	cudaMemcpyAsync@PLT
	movl	%ebp, %eax
	movl	$20, %ecx
	movl	$10, 36(%rsp)
	cltd
	idivl	%ecx
	movl	$256, %ecx
	cltq
	movq	%rax, %r12
	salq	$2, %rax
	movq	%rax, 24(%rsp)
	movl	%ebx, %eax
	movl	%r12d, %r13d
	cltd
	idivl	%ecx
	movl	%eax, %ebx
	leal	(%r12,%r12), %eax
	movl	%eax, 32(%rsp)
.L26:
	movq	%r14, 116(%rsp)
	movq	104(%rsp), %r9
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	24(%rsp), %r8
	movl	120(%rsp), %esi
	movl	%ebx, 112(%rsp)
	movq	112(%rsp), %rdi
	movq	%r15, 124(%rsp)
	movl	$1, 132(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	movl	%r13d, %eax
	pushq	%r13
	.cfi_def_cfa_offset 216
	movl	%ebp, %ecx
	subl	%r12d, %eax
	pushq	%rax
	.cfi_def_cfa_offset 224
	movq	96(%rsp), %r9
	movl	36(%rsp), %r8d
	movq	88(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z42__device_stub__Z11sdt_computePhPiPfiiS1_iiPhPiPfiiS1_ii
	popq	%rdi
	.cfi_def_cfa_offset 216
	popq	%r8
	.cfi_def_cfa_offset 208
.L24:
	movq	%r14, 116(%rsp)
	movq	96(%rsp), %r9
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	24(%rsp), %r8
	movl	120(%rsp), %esi
	movl	%ebx, 112(%rsp)
	movq	112(%rsp), %rdi
	movq	%r15, 124(%rsp)
	movl	$1, 132(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	leal	0(%r13,%r12), %eax
	movl	%ebp, %ecx
	pushq	%rax
	.cfi_def_cfa_offset 216
	pushq	%r13
	.cfi_def_cfa_offset 224
	movq	104(%rsp), %r9
	movl	36(%rsp), %r8d
	movq	88(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z42__device_stub__Z11sdt_computePhPiPfiiS1_iiPhPiPfiiS1_ii
	popq	%rcx
	.cfi_def_cfa_offset 216
	popq	%rsi
	.cfi_def_cfa_offset 208
.L25:
	movl	32(%rsp), %eax
	addl	%eax, %r13d
	decl	36(%rsp)
	jne	.L26
	movl	%ebp, %eax
	movl	$20, %ecx
	cltd
	idivl	%ecx
	testl	%edx, %edx
	je	.L27
	movl	$16777217, %eax
	movslq	%edx, %rdx
	movl	%ebx, 112(%rsp)
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rcx
	salq	$8, %rax
	leaq	0(,%rdx,4), %r8
	movl	$1, 132(%rsp)
	movq	%rcx, 116(%rsp)
	movq	112(%rsp), %rdi
	movq	%rax, %rdx
	movl	$1, %ecx
	movl	120(%rsp), %esi
	movq	%rax, 124(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	imull	$20, %r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 216
	movl	%ebp, %ecx
	pushq	%r12
	.cfi_def_cfa_offset 224
	movq	96(%rsp), %r9
	movl	36(%rsp), %r8d
	movq	88(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z42__device_stub__Z11sdt_computePhPiPfiiS1_iiPhPiPfiiS1_ii
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L27:
	movl	%ebx, 112(%rsp)
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, 132(%rsp)
	movq	%rax, 116(%rsp)
	movq	112(%rsp), %rdi
	movl	120(%rsp), %esi
	movq	%rdx, 124(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movq	72(%rsp), %rcx
	movq	88(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	64(%rsp), %rdi
	call	_Z38__device_stub__Z10final_compPhPfS0_S0_PhPfS0_S0_
.L29:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rdx
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	40(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
.L36:
	call	__stack_chk_fail@PLT
.L30:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	run_sampleKernel, .-run_sampleKernel
	.section	.rodata.str1.1
.LC5:
	.string	"_Z10final_compPhPfS0_S0_"
.LC6:
	.string	"_Z11sdt_computePhPiPfiiS1_ii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3665:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10final_compPhPfS0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11sdt_computePhPiPfiiS1_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3665:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC4:
	.long	2139095039
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <math.h>
#include <float.h>


__global__ void sdt_compute(unsigned char *img, int *sz, float *sdt, int sz_edge, int width, float *d_min, int start, int val)
{
  int tx = threadIdx.x + blockDim.x*blockIdx.x;
	extern __shared__ int ep[];
  for(int i=start, j=0;i< val; i++){
    ep[j++] = sz[i];
  }
  __syncthreads();
  float min_dist, dist2;
  min_dist = d_min[tx];
  float _x, _y;
  float sign;
  float dx, dy;
  int x = tx % width;
  int y = tx / width;
  for(int k=0; k<val-start; k++)
  {
    _x = ep[k] % width;
    _y = ep[k] / width;
    dx = _x - x;
    dy = _y - y;
    dist2 = dx*dx + dy*dy;
    if(dist2 < min_dist) min_dist = dist2;
  }
  d_min[tx] = min_dist;

}


__global__ void final_comp(unsigned char *img, float *d_min, float *d_min2, float *sdt)
{
  float sign;
  int tx = threadIdx.x + blockDim.x*blockIdx.x;
  sign  = (img[tx] >= 127)? 1.0f : -1.0f;
  float dm = d_min[tx];
  if(dm > d_min2[tx])
    dm = d_min2[tx];
  sdt[tx] = sign * sqrtf(dm);  
}

extern "C" void run_sampleKernel(unsigned char * bitmap, float *sdt, int width, int height)
{
  //Collect all edge pixels in an array
  int sz = width*height;
  int sz_edge = 0;
  for(int i = 0; i<sz; i++) if(bitmap[i] == 255) sz_edge++;
  int *edge_pixels = new int[sz_edge];
  for(int i = 0, j = 0; i<sz; i++) if(bitmap[i] == 255) edge_pixels[j++] = i;
  std::cout<< "\t"<<sz_edge << " edge pixels in the image of size " << width << " x " << height << "\n"<<std::flush;

  int *d_sz;
  float *temp_min;
  unsigned char *d_img;
  float *d_sdt, *d_min, *d_min2;

  hipHostMalloc(&temp_min,height*width*sizeof(float), hipHostMallocDefault);
  // temp_min = new float[height*width];

  for(int i=0;i<height*width;i++){
    temp_min[i] = FLT_MAX;
  }

  hipStream_t stream1, stream2;
  hipStreamCreate(&stream1);
  hipStreamCreate(&stream2);
  // cudaStreamCreateWithFlags(&stream1,cudaStreamNonBlocking);

  hipMalloc((void**)&d_sz, sz_edge*sizeof(int));
  hipMalloc((void**)&d_img, height*width*sizeof(unsigned char));
  hipMalloc((void**)&d_sdt, height*width*sizeof(float));
  hipMalloc((void**)&d_min, height*width*sizeof(float));
  hipMalloc((void**)&d_min2, height*width*sizeof(float));

  hipMemcpyAsync(d_img, bitmap, width*height*sizeof(unsigned char), hipMemcpyHostToDevice);
  hipMemcpyAsync(d_min, temp_min, width*height*sizeof(float), hipMemcpyHostToDevice);
  hipMemcpyAsync(d_min2, temp_min, width*height*sizeof(float), hipMemcpyHostToDevice);
  hipMemcpyAsync(d_sz, edge_pixels, sz_edge*sizeof(int), hipMemcpyHostToDevice);

  int divisions = 20;
  int val_div = sz_edge/divisions;
  int n, m;
  m =1;
  for(n =0; n<divisions; n+=2){
    sdt_compute<<<(height*width)/256, 256, val_div*sizeof(int), stream2>>>(d_img, d_sz, d_sdt, sz_edge, width, d_min, n*val_div, (n+1)*val_div); 
    sdt_compute<<<(height*width)/256, 256, val_div*sizeof(int), stream1>>>(d_img, d_sz, d_sdt, sz_edge, width, d_min2, m*val_div, (m+1)*val_div);
    m += 2; 
  }
  // std::cout<<n<<std::endl;
  if((sz_edge%divisions) !=0){
    sdt_compute<<<(height*width)/256, 256, (sz_edge%divisions)*sizeof(int)>>>(d_img, d_sz, d_sdt, sz_edge, width, d_min, (m-1)*val_div, (m-1)*val_div + sz_edge%divisions);
  }

  final_comp<<<(height*width)/256, 256>>>(d_img, d_min, d_min2, d_sdt);
  hipDeviceSynchronize();
  hipMemcpy(sdt, d_sdt, height*width*sizeof(float), hipMemcpyDeviceToHost);

}

	.text
	.file	"sdt_gpu_kernels.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z26__device_stub__sdt_computePhPiPfiiS1_ii # -- Begin function _Z26__device_stub__sdt_computePhPiPfiiS1_ii
	.type	_Z26__device_stub__sdt_computePhPiPfiiS1_ii,@function
_Z26__device_stub__sdt_computePhPiPfiiS1_ii: # @_Z26__device_stub__sdt_computePhPiPfiiS1_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11sdt_computePhPiPfiiS1_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__sdt_computePhPiPfiiS1_ii, .Lfunc_end0-_Z26__device_stub__sdt_computePhPiPfiiS1_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__final_compPhPfS0_S0_ # -- Begin function _Z25__device_stub__final_compPhPfS0_S0_
	.type	_Z25__device_stub__final_compPhPfS0_S0_,@function
_Z25__device_stub__final_compPhPfS0_S0_: # @_Z25__device_stub__final_compPhPfS0_S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10final_compPhPfS0_S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__final_compPhPfS0_S0_, .Lfunc_end1-_Z25__device_stub__final_compPhPfS0_S0_
	.cfi_endproc
                                        # -- End function
	.globl	run_sampleKernel                # -- Begin function run_sampleKernel
	.type	run_sampleKernel,@function
run_sampleKernel:                       # @run_sampleKernel
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %r15d
	movq	%rsi, 96(%rsp)                  # 8-byte Spill
	movq	%rdi, %r13
	movl	%ecx, %ebp
	movl	%edx, 12(%rsp)                  # 4-byte Spill
	imull	%edx, %ebp
	movl	%ebp, %ebx
	xorl	%eax, %eax
	testl	%ebp, %ebp
	jle	.LBB2_1
# %bb.22:                               # %.lr.ph.preheader
	xorl	%r14d, %r14d
.LBB2_23:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	xorl	%ecx, %ecx
	cmpb	$-1, (%r13,%rax)
	sete	%cl
	addl	%ecx, %r14d
	incq	%rax
	cmpq	%rax, %rbx
	jne	.LBB2_23
# %bb.17:                               # %._crit_edge
	movl	%r14d, %edi
	shlq	$2, %rdi
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	callq	_Znam
	testl	%ebp, %ebp
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	jle	.LBB2_2
# %bb.18:                               # %.lr.ph140.preheader
	xorl	%esi, %esi
	xorl	%ecx, %ecx
.LBB2_19:                               # %.lr.ph140
                                        # =>This Inner Loop Header: Depth=1
	cmpb	$-1, (%r13,%rsi)
	jne	.LBB2_21
# %bb.20:                               #   in Loop: Header=BB2_19 Depth=1
	movslq	%ecx, %rdx
	incl	%ecx
	movl	%esi, (%rax,%rdx,4)
.LBB2_21:                               #   in Loop: Header=BB2_19 Depth=1
	incq	%rsi
	cmpq	%rsi, %rbx
	jne	.LBB2_19
	jmp	.LBB2_2
.LBB2_1:                                # %._crit_edge.thread
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%edi, %edi
	callq	_Znam
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	xorl	%r14d, %r14d
.LBB2_2:                                # %._crit_edge141
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r14d, 8(%rsp)                  # 4-byte Spill
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r12
	movl	$.L.str.1, %esi
	movl	$34, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r12, %rdi
	movl	12(%rsp), %esi                  # 4-byte Reload
	callq	_ZNSolsEi
	movq	%rax, %r12
	movl	$.L.str.2, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movl	$.L.str.3, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r15, %rdi
	callq	_ZNSo5flushEv
	movslq	%ebp, %rax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	leaq	(,%rax,4), %r12
	leaq	80(%rsp), %rdi
	xorl	%r15d, %r15d
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	testl	%ebp, %ebp
	jle	.LBB2_5
# %bb.3:                                # %.lr.ph144
	movq	80(%rsp), %rax
	xorl	%ecx, %ecx
.LBB2_4:                                # =>This Inner Loop Header: Depth=1
	movl	$2139095039, (%rax,%rcx,4)      # imm = 0x7F7FFFFF
	incq	%rcx
	cmpq	%rcx, %rbx
	jne	.LBB2_4
.LBB2_5:                                # %._crit_edge145
	leaq	112(%rsp), %rdi
	callq	hipStreamCreate
	leaq	104(%rsp), %rdi
	callq	hipStreamCreate
	leaq	56(%rsp), %rdi
	movq	16(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	64(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	72(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r13, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	leaq	48(%rsp), %rax
	movq	(%rax), %rdi
	movq	80(%rsp), %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	leaq	72(%rsp), %rax
	movq	(%rax), %rdi
	movq	80(%rsp), %rsi
	movq	%r12, 64(%rsp)                  # 8-byte Spill
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	leaq	56(%rsp), %rax
	movq	(%rax), %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	movl	8(%rsp), %ecx                   # 4-byte Reload
	movslq	%ecx, %rax
	imulq	$1717986919, %rax, %rdx         # imm = 0x66666667
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$35, %rdx
	addl	%eax, %edx
	leal	(,%rdx,4), %eax
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	leal	(%rax,%rax,4), %eax
                                        # kill: def $ecx killed $ecx def $rcx
	subl	%eax, %ecx
	movq	%rcx, 40(%rsp)                  # 8-byte Spill
	leal	255(%rbp), %eax
	testl	%ebp, %ebp
	cmovnsl	%ebp, %eax
	sarl	$8, %eax
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
	movslq	%edx, %r12
	leaq	(,%r12,4), %r13
	movabsq	$4294967552, %rcx               # imm = 0x100000100
	leaq	(%rax,%rcx), %rbx
	addq	$-256, %rbx
	addl	%r12d, %r12d
	movl	$-2, %ebp
	movabsq	$4294967552, %r14               # imm = 0x100000100
.LBB2_6:                                # =>This Inner Loop Header: Depth=1
	movq	104(%rsp), %r9
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	movq	%r13, %r8
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.7:                                #   in Loop: Header=BB2_6 Depth=1
	movq	32(%rsp), %rdi
	movq	56(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	48(%rsp), %r9
	movq	16(%rsp), %rax                  # 8-byte Reload
	addl	%r15d, %eax
	movl	8(%rsp), %ecx                   # 4-byte Reload
	movl	12(%rsp), %r8d                  # 4-byte Reload
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__sdt_computePhPiPfiiS1_ii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB2_8:                                #   in Loop: Header=BB2_6 Depth=1
	movq	112(%rsp), %r9
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	movq	%r13, %r8
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.9:                                #   in Loop: Header=BB2_6 Depth=1
	movq	32(%rsp), %rdi
	movq	56(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	72(%rsp), %r9
	movq	16(%rsp), %rax                  # 8-byte Reload
	addl	%r15d, %eax
	leal	(%r12,%r15), %r10d
	movl	8(%rsp), %ecx                   # 4-byte Reload
	movl	12(%rsp), %r8d                  # 4-byte Reload
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__sdt_computePhPiPfiiS1_ii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB2_10:                               #   in Loop: Header=BB2_6 Depth=1
	addl	$2, %ebp
	addl	%r12d, %r15d
	cmpl	$18, %ebp
	jb	.LBB2_6
# %bb.11:
	movq	40(%rsp), %r14                  # 8-byte Reload
	testl	%r14d, %r14d
	movabsq	$4294967552, %r15               # imm = 0x100000100
	je	.LBB2_14
# %bb.12:
	movslq	%r14d, %r8
	shlq	$2, %r8
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_14
# %bb.13:
	movq	32(%rsp), %rdi
	movq	56(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	48(%rsp), %r9
	movq	88(%rsp), %rax                  # 8-byte Reload
	leal	(%rax,%rax,4), %eax
	addl	%eax, %r14d
	movl	8(%rsp), %ecx                   # 4-byte Reload
	movl	12(%rsp), %r8d                  # 4-byte Reload
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__sdt_computePhPiPfiiS1_ii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB2_14:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	64(%rsp), %rbx                  # 8-byte Reload
	jne	.LBB2_16
# %bb.15:
	movq	32(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	72(%rsp), %rdx
	movq	24(%rsp), %rcx
	callq	_Z25__device_stub__final_compPhPfS0_S0_
.LBB2_16:
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rsi
	movq	96(%rsp), %rdi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	run_sampleKernel, .Lfunc_end2-run_sampleKernel
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11sdt_computePhPiPfiiS1_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10final_compPhPfS0_S0_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11sdt_computePhPiPfiiS1_ii,@object # @_Z11sdt_computePhPiPfiiS1_ii
	.section	.rodata,"a",@progbits
	.globl	_Z11sdt_computePhPiPfiiS1_ii
	.p2align	3, 0x0
_Z11sdt_computePhPiPfiiS1_ii:
	.quad	_Z26__device_stub__sdt_computePhPiPfiiS1_ii
	.size	_Z11sdt_computePhPiPfiiS1_ii, 8

	.type	_Z10final_compPhPfS0_S0_,@object # @_Z10final_compPhPfS0_S0_
	.globl	_Z10final_compPhPfS0_S0_
	.p2align	3, 0x0
_Z10final_compPhPfS0_S0_:
	.quad	_Z25__device_stub__final_compPhPfS0_S0_
	.size	_Z10final_compPhPfS0_S0_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\t"
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" edge pixels in the image of size "
	.size	.L.str.1, 35

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" x "
	.size	.L.str.2, 4

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\n"
	.size	.L.str.3, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11sdt_computePhPiPfiiS1_ii"
	.size	.L__unnamed_1, 29

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10final_compPhPfS0_S0_"
	.size	.L__unnamed_2, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__sdt_computePhPiPfiiS1_ii
	.addrsig_sym _Z25__device_stub__final_compPhPfS0_S0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11sdt_computePhPiPfiiS1_ii
	.addrsig_sym _Z10final_compPhPfS0_S0_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11sdt_computePhPiPfiiS1_ii ; -- Begin function _Z11sdt_computePhPiPfiiS1_ii
	.globl	_Z11sdt_computePhPiPfiiS1_ii
	.p2align	8
	.type	_Z11sdt_computePhPiPfiiS1_ii,@function
_Z11sdt_computePhPiPfiiS1_ii:           ; @_Z11sdt_computePhPiPfiiS1_ii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x28
	s_load_b32 s6, s[0:1], 0x3c
	s_waitcnt lgkmcnt(0)
	s_cmp_le_i32 s3, s2
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b64 s[4:5], s[0:1], 0x8
	s_ashr_i32 s9, s2, 31
	s_mov_b32 s8, s2
	s_mov_b32 s7, 0
	s_lshl_b64 s[8:9], s[8:9], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s4, s4, s8
	s_addc_u32 s5, s5, s9
	s_mov_b32 s8, s2
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_load_b32 s9, s[4:5], 0x0
	v_mov_b32_e32 v1, s7
	s_add_i32 s8, s8, 1
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	s_add_i32 s7, s7, 4
	s_cmp_ge_i32 s8, s3
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v2, s9
	ds_store_b32 v1, v2
	s_cbranch_scc0 .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_and_b32 s6, 0xffff, s6
	s_load_b64 s[4:5], s[0:1], 0x20
	v_mad_u64_u32 v[2:3], null, s15, s6, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_sub_i32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_lt_i32 s2, 1
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v4, v[0:1], off
	s_cbranch_scc1 .LBB0_6
; %bb.4:                                ; %.lr.ph48
	s_load_b32 s0, s[0:1], 0x1c
	s_mov_b32 s6, 0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s0, s1
	s_xor_b32 s3, s3, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v5, s3
	s_sub_i32 s5, 0, s3
	v_rcp_iflag_f32_e32 v5, v5
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v5, 0x4f7ffffe, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v5, v5
	v_readfirstlane_b32 s4, v5
	v_add_nc_u32_e32 v5, v2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mul_i32 s5, s5, s4
	v_xor_b32_e32 v5, v5, v3
	s_mul_hi_u32 s5, s4, s5
	v_xor_b32_e32 v3, s1, v3
	s_add_i32 s4, s4, s5
	s_mov_b32 s5, 0
	v_mul_hi_u32 v6, v5, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, v6, s3
	v_sub_nc_u32_e32 v5, v5, v7
	v_add_nc_u32_e32 v7, 1, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v8, s3, v5
	v_cmp_le_u32_e32 vcc_lo, s3, v5
	v_dual_cndmask_b32 v6, v6, v7 :: v_dual_cndmask_b32 v5, v5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, 1, v6
	v_cmp_le_u32_e32 vcc_lo, s3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, v6, v7, vcc_lo
	v_xor_b32_e32 v5, v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v5, v3
	v_mul_lo_u32 v5, v3, s0
	v_cvt_f32_i32_e32 v3, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v5
	v_cvt_f32_i32_e32 v2, v2
.LBB0_5:                                ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v5, s5
	ds_load_b32 v5, v5
	s_waitcnt lgkmcnt(0)
	v_readfirstlane_b32 s7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s8, s7, 31
	s_add_i32 s9, s7, s8
	s_xor_b32 s10, s8, s1
	s_xor_b32 s8, s9, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s9, s8, s4
	s_mul_i32 s11, s9, s3
	s_add_i32 s12, s9, 1
	s_sub_i32 s8, s8, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s11, s8, s3
	s_cmp_ge_u32 s8, s3
	s_cselect_b32 s9, s12, s9
	s_cselect_b32 s8, s11, s8
	s_add_i32 s11, s9, 1
	s_cmp_ge_u32 s8, s3
	s_cselect_b32 s8, s11, s9
	s_add_i32 s6, s6, 1
	s_xor_b32 s8, s8, s10
	s_add_i32 s5, s5, 4
	s_sub_i32 s8, s8, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cvt_f32_i32_e32 v5, s8
	s_mul_i32 s9, s8, s0
	s_sub_i32 s7, s7, s9
	s_cmp_ge_i32 s6, s2
	v_cvt_f32_i32_e32 v6, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v5, v5, v3 :: v_dual_sub_f32 v6, v6, v2
	v_mul_f32_e32 v5, v5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v6, v6
	s_waitcnt vmcnt(0)
	v_cmp_lt_f32_e32 vcc_lo, v5, v4
	v_cndmask_b32_e32 v4, v4, v5, vcc_lo
	s_cbranch_scc0 .LBB0_5
.LBB0_6:                                ; %Flow67
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11sdt_computePhPiPfiiS1_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11sdt_computePhPiPfiiS1_ii, .Lfunc_end0-_Z11sdt_computePhPiPfiiS1_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 620
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10final_compPhPfS0_S0_ ; -- Begin function _Z10final_compPhPfS0_S0_
	.globl	_Z10final_compPhPfS0_S0_
	.p2align	8
	.type	_Z10final_compPhPfS0_S0_,@function
_Z10final_compPhPfS0_S0_:               ; @_Z10final_compPhPfS0_S0_
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x2c
	s_load_b256 s[0:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_co_u32 v5, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v1
	global_load_b32 v5, v[5:6], off
	global_load_b32 v6, v[7:8], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v2, vcc_lo
	global_load_u8 v0, v[0:1], off
	s_waitcnt vmcnt(1)
	v_cmp_gt_f32_e32 vcc_lo, v5, v6
	v_cndmask_b32_e32 v1, v5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v2, 0x4f800000, v1
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v1
	v_cndmask_b32_e32 v1, v1, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v2, v1
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v5, -1, v2
	v_add_nc_u32_e32 v6, 1, v2
	v_fma_f32 v7, -v5, v2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v8, -v6, v2, v1
	v_cmp_ge_f32_e64 s0, 0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v2, v2, v5, s0
	v_cmp_lt_f32_e64 s0, 0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v2, v2, v6, s0
	v_mul_f32_e32 v5, 0x37800000, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v2, v5, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v1, 0x260
	v_cndmask_b32_e32 v1, v2, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_cmp_lt_u16_e32 vcc_lo, 0x7e, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v2, -v1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v4, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10final_compPhPfS0_S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10final_compPhPfS0_S0_, .Lfunc_end1-_Z10final_compPhPfS0_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 328
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         168
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11sdt_computePhPiPfiiS1_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11sdt_computePhPiPfiiS1_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10final_compPhPfS0_S0_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10final_compPhPfS0_S0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
