/*
 * Instituto Tecnologico de Costa Rica
 * Centro de Investigaciones en Computacion
 * 
 * Asesoria-Practica en Computacion Paralela
 * Instituto Costarricense de Electricidad
 * Julio-Agosto 2011
 * 
 * Autor: Santiago Nunez Corrales
 * Programa: suma de vectores en CUDA C
 */

#include <stdio.h>
#define DEF_TAM 10

__global__ void suma_vec(float *a, float *b, float *c) {
	/* threadIdx.x es el identificador del hilo en la dimension x */
	int idx = threadIdx.x;
	a[idx] = 0;
	b[idx] = idx;
	c[idx] = a[idx] + b[idx];
}


int revisar_gpu(int disp_gpu) {
	int total_gpu = 0;
	int id_gpu;

	cudaGetDeviceCount(&total_gpu);

	if (disp_gpu > total_gpu) { 
		printf("disp_gpu >=  total_gpu ... terminando.\n");
		exit(1);
	}

	cudaError_t ret_cuda; 
	cudaDeviceProp props;

	cudaGetDeviceProperties(&props, disp_gpu);
	printf("[props.major.props.minor] = [%d.%d]\n",
					props.major, props.minor); 

	if (props.major > 999) {
		printf("CUDA Device Emulation (CPU) detectado, terminando.\n"); 
		exit(1); 
	} 

	ret_cuda = cudaSetDevice(disp_gpu); 

	if (ret_cuda == cudaErrorInvalidDevice) { 
		perror("cudaSetDevice retorno cudaErrorInvalidDevice"); 
	} else { 
		cudaGetDevice(&id_gpu); 
		printf("cudaGetDevice()=%d\n",id_gpu);
	} 
} 

int main (int argc, char *argv[]) {
	int n;
	int i;
	float a[DEF_TAM];
	float b[DEF_TAM];
	float c[DEF_TAM];
	float *ptr_dev_a;
	float *ptr_dev_b;
	float *ptr_dev_c;
	int mem_reservada;

	revisar_gpu(0);

	n = DEF_TAM;
	mem_reservada = DEF_TAM * sizeof(float);

	cudaMalloc((void **)&ptr_dev_a, mem_reservada);
	cudaMalloc((void **)&ptr_dev_b, mem_reservada);
	cudaMalloc((void **)&ptr_dev_c, mem_reservada);

	cudaMemcpy(ptr_dev_a, a, mem_reservada, cudaMemcpyHostToDevice);
	cudaMemcpy(ptr_dev_b, b, mem_reservada, cudaMemcpyHostToDevice);

	suma_vec<<<1, n>>>(ptr_dev_a, ptr_dev_b, ptr_dev_c);

	cudaMemcpy(c, ptr_dev_c, mem_reservada, cudaMemcpyDeviceToHost);

	for (i = 0; i < DEF_TAM; i++)
		printf("c[%d] = %f\n", i, c[i]);

	cudaFree(ptr_dev_a);
	cudaFree(ptr_dev_b);
	cudaFree(ptr_dev_c);

	return 0;
}



	.file	"tmpxft_002c6271_00000000-6_icevecadd_det.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"disp_gpu >=  total_gpu ... terminando.\n"
.LC1:
	.string	"[props.major.props.minor] = [%d.%d]\n"
.LC2:
	.string	"CUDA Device Emulation (CPU) detectado, terminando.\n"
.LC3:
	.string	"cudaSetDevice retorno cudaErrorInvalidDevice"
.LC4:
	.string	"cudaGetDevice()=%d\n"
	.text
	.globl	_Z11revisar_gpui
	.type	_Z11revisar_gpui, @function
_Z11revisar_gpui:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%edi, %ebx
	subq	$1056, %rsp
	.cfi_def_cfa_offset 1072
	movq	%fs:40, %rax
	movq	%rax, 1048(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	xorl	%eax, %eax
	movl	%eax, 8(%rsp)
	call	cudaGetDeviceCount@PLT
	leaq	.LC0(%rip), %rsi
	cmpl	%ebx, 8(%rsp)
	jl	.L9
	leaq	16(%rsp), %rdi
	movl	%ebx, %esi
	call	cudaGetDeviceProperties_v2@PLT
	movl	380(%rsp), %ecx
	xorl	%eax, %eax
	movl	376(%rsp), %edx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	$999, 376(%rsp)
	jle	.L4
	leaq	.LC2(%rip), %rsi
.L9:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L4:
	movl	%ebx, %edi
	call	cudaSetDevice@PLT
	cmpl	$101, %eax
	jne	.L5
	leaq	.LC3(%rip), %rdi
	call	perror@PLT
	jmp	.L6
.L5:
	leaq	12(%rsp), %rdi
	call	cudaGetDevice@PLT
	movl	12(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC4(%rip), %rsi
	call	__printf_chk@PLT
.L6:
	.cfi_endproc
.LFE2027:
	.size	_Z11revisar_gpui, .-_Z11revisar_gpui
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	xorl	%edi, %edi
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z11revisar_gpui
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.text
	.globl	_Z31__device_stub__Z8suma_vecPfS_S_PfS_S_
	.type	_Z31__device_stub__Z8suma_vecPfS_S_PfS_S_, @function
_Z31__device_stub__Z8suma_vecPfS_S_PfS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z8suma_vecPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L13:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z31__device_stub__Z8suma_vecPfS_S_PfS_S_, .-_Z31__device_stub__Z8suma_vecPfS_S_PfS_S_
	.globl	_Z8suma_vecPfS_S_
	.type	_Z8suma_vecPfS_S_, @function
_Z8suma_vecPfS_S_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z8suma_vecPfS_S_PfS_S_
	.cfi_endproc
.LFE2054:
	.size	_Z8suma_vecPfS_S_, .-_Z8suma_vecPfS_S_
	.section	.rodata.str1.1
.LC5:
	.string	"_Z8suma_vecPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z8suma_vecPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 * Instituto Tecnologico de Costa Rica
 * Centro de Investigaciones en Computacion
 * 
 * Asesoria-Practica en Computacion Paralela
 * Instituto Costarricense de Electricidad
 * Julio-Agosto 2011
 * 
 * Autor: Santiago Nunez Corrales
 * Programa: suma de vectores en CUDA C
 */


#include <hip/hip_runtime.h>
#include <stdio.h>
#define DEF_TAM 10

__global__ void suma_vec(float *a, float *b, float *c) {
	/* threadIdx.x es el identificador del hilo en la dimension x */
	int idx = threadIdx.x;
	a[idx] = 0;
	b[idx] = idx;
	c[idx] = a[idx] + b[idx];
}


int revisar_gpu(int disp_gpu) {
	int total_gpu = 0;
	int id_gpu;

	hipGetDeviceCount(&total_gpu);

	if (disp_gpu > total_gpu) { 
		printf("disp_gpu >=  total_gpu ... terminando.\n");
		exit(1);
	}

	hipError_t ret_cuda; 
	hipDeviceProp_t props;

	hipGetDeviceProperties(&props, disp_gpu);
	printf("[props.major.props.minor] = [%d.%d]\n",
					props.major, props.minor); 

	if (props.major > 999) {
		printf("CUDA Device Emulation (CPU) detectado, terminando.\n"); 
		exit(1); 
	} 

	ret_cuda = hipSetDevice(disp_gpu); 

	if (ret_cuda == hipErrorInvalidDevice) { 
		perror("hipSetDevice retorno hipErrorInvalidDevice"); 
	} else { 
		hipGetDevice(&id_gpu); 
		printf("cudaGetDevice()=%d\n",id_gpu);
	} 
} 

int main (int argc, char *argv[]) {
	int n;
	int i;
	float a[DEF_TAM];
	float b[DEF_TAM];
	float c[DEF_TAM];
	float *ptr_dev_a;
	float *ptr_dev_b;
	float *ptr_dev_c;
	int mem_reservada;

	revisar_gpu(0);

	n = DEF_TAM;
	mem_reservada = DEF_TAM * sizeof(float);

	hipMalloc((void **)&ptr_dev_a, mem_reservada);
	hipMalloc((void **)&ptr_dev_b, mem_reservada);
	hipMalloc((void **)&ptr_dev_c, mem_reservada);

	hipMemcpy(ptr_dev_a, a, mem_reservada, hipMemcpyHostToDevice);
	hipMemcpy(ptr_dev_b, b, mem_reservada, hipMemcpyHostToDevice);

	suma_vec<<<1, n>>>(ptr_dev_a, ptr_dev_b, ptr_dev_c);

	hipMemcpy(c, ptr_dev_c, mem_reservada, hipMemcpyDeviceToHost);

	for (i = 0; i < DEF_TAM; i++)
		printf("c[%d] = %f\n", i, c[i]);

	hipFree(ptr_dev_a);
	hipFree(ptr_dev_b);
	hipFree(ptr_dev_c);

	return 0;
}



	.text
	.file	"icevecadd_det.hip"
	.globl	_Z23__device_stub__suma_vecPfS_S_ # -- Begin function _Z23__device_stub__suma_vecPfS_S_
	.type	_Z23__device_stub__suma_vecPfS_S_,@function
_Z23__device_stub__suma_vecPfS_S_:      # @_Z23__device_stub__suma_vecPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8suma_vecPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z23__device_stub__suma_vecPfS_S_, .Lfunc_end0-_Z23__device_stub__suma_vecPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z11revisar_gpui                # -- Begin function _Z11revisar_gpui
	.type	_Z11revisar_gpui,@function
_Z11revisar_gpui:                       # @_Z11revisar_gpui
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$1480, %rsp                     # imm = 0x5C8
	.cfi_def_cfa_offset 1504
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%edi, %ebx
	leaq	4(%rsp), %r14
	movl	$0, (%r14)
	movq	%r14, %rdi
	callq	hipGetDeviceCount
	cmpl	%ebx, (%r14)
	jge	.LBB1_3
# %bb.1:
	movl	$.Lstr.1, %edi
	jmp	.LBB1_2
.LBB1_3:
	leaq	8(%rsp), %r14
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	hipGetDevicePropertiesR0600
	movl	360(%r14), %esi
	movl	364(%r14), %edx
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$1000, 360(%r14)                # imm = 0x3E8
	jl	.LBB1_5
# %bb.4:
	movl	$.Lstr, %edi
.LBB1_2:
	callq	puts@PLT
	movl	$1, %edi
	callq	exit
.LBB1_5:
	movl	%ebx, %edi
	callq	hipSetDevice
	cmpl	$101, %eax
	jne	.LBB1_7
# %bb.6:
	movl	$.L.str.3, %edi
	callq	perror
.LBB1_7:
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	callq	hipGetDevice
	movl	(%rbx), %esi
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
.Lfunc_end1:
	.size	_Z11revisar_gpui, .Lfunc_end1-_Z11revisar_gpui
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	xorl	%edi, %edi
	callq	_Z11revisar_gpui
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8suma_vecPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8suma_vecPfS_S_,@object       # @_Z8suma_vecPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z8suma_vecPfS_S_
	.p2align	3, 0x0
_Z8suma_vecPfS_S_:
	.quad	_Z23__device_stub__suma_vecPfS_S_
	.size	_Z8suma_vecPfS_S_, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"[props.major.props.minor] = [%d.%d]\n"
	.size	.L.str.1, 37

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"hipSetDevice retorno hipErrorInvalidDevice"
	.size	.L.str.3, 43

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"cudaGetDevice()=%d\n"
	.size	.L.str.4, 20

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8suma_vecPfS_S_"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"CUDA Device Emulation (CPU) detectado, terminando."
	.size	.Lstr, 51

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"disp_gpu >=  total_gpu ... terminando."
	.size	.Lstr.1, 39

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__suma_vecPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8suma_vecPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8suma_vecPfS_S_       ; -- Begin function _Z8suma_vecPfS_S_
	.globl	_Z8suma_vecPfS_S_
	.p2align	8
	.type	_Z8suma_vecPfS_S_,@function
_Z8suma_vecPfS_S_:                      ; @_Z8suma_vecPfS_S_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v2, 2, v0
	v_cvt_f32_i32_e32 v0, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_store_b32 v2, v1, s[4:5]
	global_store_b32 v2, v0, s[6:7]
	global_load_b32 v1, v2, s[4:5]
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v1, v0
	global_store_b32 v2, v0, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8suma_vecPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8suma_vecPfS_S_, .Lfunc_end0-_Z8suma_vecPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 88
; NumSgprs: 8
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8suma_vecPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z8suma_vecPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
