#include <cstdlib>
#include <cstdio>
#include <ctime>
#include <chrono>

__global__ void cuda_vecAdd(float *v1, float *v2, float *v3, int offset)
{
	int i = offset + blockIdx.x * blockDim.x + threadIdx.x;
	v3[i] = v1[i] + v2[i];
}

int main(void)
{
	typedef std::chrono::high_resolution_clock Clock;
	typedef std::chrono::time_point<Clock> TimePoint;
	typedef std::chrono::duration<float> Time;

	constexpr int n = 256*1000000;

	constexpr int nStreams = 32;
	constexpr int blockSize = 256;
	constexpr int streamSize = n / nStreams;
	constexpr int gridSize = streamSize / blockSize;

	printf("%d %d\n", streamSize, gridSize);

	TimePoint tstart, tstop;

	cudaStream_t streams[nStreams];

	float *v1 = nullptr, *v2 = nullptr, *v3 = nullptr;
	float *dv1 = nullptr, *dv2 = nullptr, *dv3 = nullptr;

	for(int i=0; i<nStreams; i++)
		cudaStreamCreate(&streams[i]);

	cudaMallocHost((void**)&v1, sizeof(float) * n);
	cudaMallocHost((void**)&v2, sizeof(float) * n);
	cudaMallocHost((void**)&v3, sizeof(float) * n);

	cudaMalloc((void**)&dv1, sizeof(float) * n);
	cudaMalloc((void**)&dv2, sizeof(float) * n);
	cudaMalloc((void**)&dv3, sizeof(float) * n);

	for(int i=0; i<n; i++)
	{
		v1[i] = (float)i;
		v2[i] = (float)-i+1;
	}

	for(int i=0; i<n; i++)
		v3[i] = 0.0f;

	tstart = Clock::now();

	for(int i=0; i<nStreams; i++)
	{
		int offset = i * streamSize;

		cudaMemcpyAsync(&dv1[offset], &v1[offset], sizeof(float) * streamSize, cudaMemcpyHostToDevice, streams[i]);
		cudaMemcpyAsync(&dv2[offset], &v2[offset], sizeof(float) * streamSize, cudaMemcpyHostToDevice, streams[i]);

		cuda_vecAdd<<<gridSize, blockSize, 0, streams[i]>>>(dv1, dv2, dv3, offset);

		cudaMemcpyAsync(&v3[offset], &dv3[offset], sizeof(float) * streamSize, cudaMemcpyDeviceToHost, streams[i]);
	}
	
	for(int i=0; i<nStreams; i++)
		cudaStreamSynchronize(streams[i]);
	
	tstop = Clock::now();

	float elaspedTimeGPU = std::chrono::duration_cast<Time>(tstop-tstart).count();

	float checkGPU = 0.0f;
	for(int i=0; i<n; i++)
		checkGPU += v3[i];

	printf("CheckGPU: %f -- TimeGPU: %fms\n", checkGPU, elaspedTimeGPU);

	cudaFree(dv1);
	cudaFree(dv2);
	cudaFree(dv3);

	cudaFreeHost(v1);
	cudaFreeHost(v2);
	cudaFreeHost(v3);

	for(int i=0; i<nStreams; i++)
		cudaStreamDestroy(streams[i]);

	return 0;
}
	.file	"tmpxft_0035eae6_00000000-6_main.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2135:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2135:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z36__device_stub__Z11cuda_vecAddPfS_S_iPfS_S_i
	.type	_Z36__device_stub__Z11cuda_vecAddPfS_S_iPfS_S_i, @function
_Z36__device_stub__Z11cuda_vecAddPfS_S_iPfS_S_i:
.LFB2157:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11cuda_vecAddPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2157:
	.size	_Z36__device_stub__Z11cuda_vecAddPfS_S_iPfS_S_i, .-_Z36__device_stub__Z11cuda_vecAddPfS_S_iPfS_S_i
	.globl	_Z11cuda_vecAddPfS_S_i
	.type	_Z11cuda_vecAddPfS_S_i, @function
_Z11cuda_vecAddPfS_S_i:
.LFB2158:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z11cuda_vecAddPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2158:
	.size	_Z11cuda_vecAddPfS_S_i, .-_Z11cuda_vecAddPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"%d %d\n"
.LC4:
	.string	"CheckGPU: %f -- TimeGPU: %fms\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2126:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$31250, %ecx
	movl	$8000000, %edx
	leaq	.LC1(%rip), %rsi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	$2, %edi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$344, %rsp
	.cfi_def_cfa_offset 400
	movq	%fs:40, %rax
	movq	%rax, 328(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rbx
	leaq	328(%rsp), %r12
	movq	%rbx, %rbp
	movq	%rbx, %r13
	call	__printf_chk@PLT
	xorl	%eax, %eax
	movq	%rax, (%rsp)
	movq	%rax, 8(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 24(%rsp)
	movq	%rax, 32(%rsp)
	movq	%rax, 40(%rsp)
.L9:
	movq	%rbp, %rdi
	addq	$8, %rbp
	call	cudaStreamCreate@PLT
	cmpq	%r12, %rbp
	jne	.L9
	movq	%rsp, %rdi
	movl	$1024000000, %esi
	call	cudaMallocHost@PLT
	leaq	8(%rsp), %rdi
	movl	$1024000000, %esi
	call	cudaMallocHost@PLT
	leaq	16(%rsp), %rdi
	movl	$1024000000, %esi
	call	cudaMallocHost@PLT
	leaq	24(%rsp), %rdi
	movl	$1024000000, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$1024000000, %esi
	call	cudaMalloc@PLT
	movl	$1024000000, %esi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	movq	8(%rsp), %rax
	xorl	%ecx, %ecx
	movss	.LC2(%rip), %xmm1
.L10:
	cvtsi2ssl	%ecx, %xmm0
	movl	%ecx, %edx
	negl	%edx
	movss	%xmm0, (%rsi,%rcx,4)
	cvtsi2ssl	%edx, %xmm0
	addss	%xmm1, %xmm0
	movss	%xmm0, (%rax,%rcx,4)
	incq	%rcx
	cmpq	$256000000, %rcx
	jne	.L10
	movq	16(%rsp), %rdi
	xorl	%eax, %eax
	xorl	%r12d, %r12d
	movabsq	$4294967552, %r15
	rep stosl
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	%rax, %r14
.L12:
	imulq	$32000000, %r12, %rbp
	movq	(%rsp), %rsi
	movq	(%rbx), %r8
	movl	$1, %ecx
	movq	24(%rsp), %rdi
	movl	$32000000, %edx
	addq	%rbp, %rsi
	addq	%rbp, %rdi
	call	cudaMemcpyAsync@PLT
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	(%rbx), %r8
	movl	$32000000, %edx
	addq	%rbp, %rsi
	addq	%rbp, %rdi
	call	cudaMemcpyAsync@PLT
	movl	$2147499273, %edi
	movq	(%rbx), %r9
	xorl	%r8d, %r8d
	addq	%rdi, %rdi
	movq	%r15, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movq	%r15, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	imull	$8000000, %r12d, %ecx
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z36__device_stub__Z11cuda_vecAddPfS_S_iPfS_S_i
.L11:
	movq	40(%rsp), %rsi
	movq	(%rbx), %r8
	movl	$2, %ecx
	incq	%r12
	movq	16(%rsp), %rdi
	movl	$32000000, %edx
	addq	$8, %rbx
	addq	%rbp, %rsi
	addq	%rbp, %rdi
	call	cudaMemcpyAsync@PLT
	cmpq	$32, %r12
	jne	.L12
	xorl	%ebx, %ebx
.L13:
	movq	0(%r13,%rbx,8), %rdi
	incq	%rbx
	call	cudaStreamSynchronize@PLT
	cmpq	$32, %rbx
	jne	.L13
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	16(%rsp), %rdx
	xorps	%xmm0, %xmm0
	subq	%r14, %rax
	cvtsi2ssq	%rax, %xmm1
	xorl	%eax, %eax
	divss	.LC3(%rip), %xmm1
.L14:
	addss	(%rdx,%rax,4), %xmm0
	incq	%rax
	cmpq	$256000000, %rax
	jne	.L14
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	movb	$2, %al
	xorl	%ebx, %ebx
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	8(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	16(%rsp), %rdi
	call	cudaFreeHost@PLT
.L15:
	movq	0(%r13,%rbx,8), %rdi
	incq	%rbx
	call	cudaStreamDestroy@PLT
	cmpq	$32, %rbx
	jne	.L15
	movq	328(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$344, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2126:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z11cuda_vecAddPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2160:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z11cuda_vecAddPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2160:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1065353216
	.align 4
.LC3:
	.long	1315859240
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <cstdlib>
#include <cstdio>
#include <ctime>
#include <chrono>

__global__ void cuda_vecAdd(float *v1, float *v2, float *v3, int offset)
{
	int i = offset + blockIdx.x * blockDim.x + threadIdx.x;
	v3[i] = v1[i] + v2[i];
}

int main(void)
{
	typedef std::chrono::high_resolution_clock Clock;
	typedef std::chrono::time_point<Clock> TimePoint;
	typedef std::chrono::duration<float> Time;

	constexpr int n = 256*1000000;

	constexpr int nStreams = 32;
	constexpr int blockSize = 256;
	constexpr int streamSize = n / nStreams;
	constexpr int gridSize = streamSize / blockSize;

	printf("%d %d\n", streamSize, gridSize);

	TimePoint tstart, tstop;

	hipStream_t streams[nStreams];

	float *v1 = nullptr, *v2 = nullptr, *v3 = nullptr;
	float *dv1 = nullptr, *dv2 = nullptr, *dv3 = nullptr;

	for(int i=0; i<nStreams; i++)
		hipStreamCreate(&streams[i]);

	hipHostMalloc((void**)&v1, sizeof(float) * n, hipHostMallocDefault);
	hipHostMalloc((void**)&v2, sizeof(float) * n, hipHostMallocDefault);
	hipHostMalloc((void**)&v3, sizeof(float) * n, hipHostMallocDefault);

	hipMalloc((void**)&dv1, sizeof(float) * n);
	hipMalloc((void**)&dv2, sizeof(float) * n);
	hipMalloc((void**)&dv3, sizeof(float) * n);

	for(int i=0; i<n; i++)
	{
		v1[i] = (float)i;
		v2[i] = (float)-i+1;
	}

	for(int i=0; i<n; i++)
		v3[i] = 0.0f;

	tstart = Clock::now();

	for(int i=0; i<nStreams; i++)
	{
		int offset = i * streamSize;

		hipMemcpyAsync(&dv1[offset], &v1[offset], sizeof(float) * streamSize, hipMemcpyHostToDevice, streams[i]);
		hipMemcpyAsync(&dv2[offset], &v2[offset], sizeof(float) * streamSize, hipMemcpyHostToDevice, streams[i]);

		cuda_vecAdd<<<gridSize, blockSize, 0, streams[i]>>>(dv1, dv2, dv3, offset);

		hipMemcpyAsync(&v3[offset], &dv3[offset], sizeof(float) * streamSize, hipMemcpyDeviceToHost, streams[i]);
	}
	
	for(int i=0; i<nStreams; i++)
		hipStreamSynchronize(streams[i]);
	
	tstop = Clock::now();

	float elaspedTimeGPU = std::chrono::duration_cast<Time>(tstop-tstart).count();

	float checkGPU = 0.0f;
	for(int i=0; i<n; i++)
		checkGPU += v3[i];

	printf("CheckGPU: %f -- TimeGPU: %fms\n", checkGPU, elaspedTimeGPU);

	hipFree(dv1);
	hipFree(dv2);
	hipFree(dv3);

	hipHostFree(v1);
	hipHostFree(v2);
	hipHostFree(v3);

	for(int i=0; i<nStreams; i++)
		hipStreamDestroy(streams[i]);

	return 0;
}
	.text
	.file	"main.hip"
	.globl	_Z26__device_stub__cuda_vecAddPfS_S_i # -- Begin function _Z26__device_stub__cuda_vecAddPfS_S_i
	.type	_Z26__device_stub__cuda_vecAddPfS_S_i,@function
_Z26__device_stub__cuda_vecAddPfS_S_i:  # @_Z26__device_stub__cuda_vecAddPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11cuda_vecAddPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__cuda_vecAddPfS_S_i, .Lfunc_end0-_Z26__device_stub__cuda_vecAddPfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3f800000                      # float 1
.LCPI1_1:
	.long	0x4e6e6b28                      # float 1.0E+9
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$312, %rsp                      # imm = 0x138
	.cfi_def_cfa_offset 368
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%ebx, %ebx
	movl	$.L.str, %edi
	movl	$8000000, %esi                  # imm = 0x7A1200
	movl	$31250, %edx                    # imm = 0x7A12
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, 40(%rsp)
	movq	%rbx, 32(%rsp)
	movq	%rbx, (%rsp)
	movq	%rbx, 24(%rsp)
	movq	%rbx, 16(%rsp)
	movq	%rbx, 8(%rsp)
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	leaq	(%rsp,%rbx), %rdi
	addq	$48, %rdi
	callq	hipStreamCreate
	addq	$8, %rbx
	cmpq	$256, %rbx                      # imm = 0x100
	jne	.LBB1_1
# %bb.2:
	leaq	40(%rsp), %rbx
	xorl	%r15d, %r15d
	movl	$1024000000, %esi               # imm = 0x3D090000
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	32(%rsp), %r14
	movl	$1024000000, %esi               # imm = 0x3D090000
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	hipHostMalloc
	movq	%rsp, %rdi
	movl	$1024000000, %esi               # imm = 0x3D090000
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	24(%rsp), %rdi
	movl	$1024000000, %esi               # imm = 0x3D090000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$1024000000, %esi               # imm = 0x3D090000
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$1024000000, %esi               # imm = 0x3D090000
	callq	hipMalloc
	movq	(%rbx), %rax
	movq	(%r14), %rcx
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	xorl	%edx, %edx
.LBB1_3:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm1, %xmm1
	cvtsi2ss	%edx, %xmm1
	movss	%xmm1, (%rax,%rdx,4)
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r15d, %xmm1
	addss	%xmm0, %xmm1
	movss	%xmm1, (%rcx,%rdx,4)
	incq	%rdx
	decl	%r15d
	cmpq	$256000000, %rdx                # imm = 0xF424000
	jne	.LBB1_3
# %bb.4:                                # %.preheader55
	movabsq	$4294967552, %r14               # imm = 0x100000100
	movq	(%rsp), %rdi
	xorl	%r15d, %r15d
	movl	$1024000000, %edx               # imm = 0x3D090000
	xorl	%esi, %esi
	callq	memset@PLT
	leaq	48(%rsp), %r13
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %rbx
	leaq	30994(%r14), %r12
	xorl	%ebp, %ebp
.LBB1_5:                                # =>This Inner Loop Header: Depth=1
	movq	24(%rsp), %rdi
	addq	%rbp, %rdi
	movq	40(%rsp), %rsi
	addq	%rbp, %rsi
	movq	(%r13), %r8
	movl	$32000000, %edx                 # imm = 0x1E84800
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	16(%rsp), %rdi
	addq	%rbp, %rdi
	movq	32(%rsp), %rsi
	addq	%rbp, %rsi
	movq	(%r13), %r8
	movl	$32000000, %edx                 # imm = 0x1E84800
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	(%r13), %r9
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.6:                                #   in Loop: Header=BB1_5 Depth=1
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	%r15d, %ecx
	callq	_Z26__device_stub__cuda_vecAddPfS_S_i
.LBB1_7:                                #   in Loop: Header=BB1_5 Depth=1
	movq	(%rsp), %rdi
	addq	%rbp, %rdi
	movq	8(%rsp), %rsi
	addq	%rbp, %rsi
	movq	(%r13), %r8
	movl	$32000000, %edx                 # imm = 0x1E84800
	movl	$2, %ecx
	callq	hipMemcpyAsync
	addq	$32000000, %rbp                 # imm = 0x1E84800
	addq	$8000000, %r15                  # imm = 0x7A1200
	addq	$8, %r13
	cmpq	$256000000, %r15                # imm = 0xF424000
	jne	.LBB1_5
# %bb.8:                                # %.preheader.preheader
	xorl	%r14d, %r14d
.LBB1_9:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movq	48(%rsp,%r14,8), %rdi
	callq	hipStreamSynchronize
	incq	%r14
	cmpq	$32, %r14
	jne	.LBB1_9
# %bb.10:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	%rbx, %rax
	xorps	%xmm1, %xmm1
	cvtsi2ss	%rax, %xmm1
	xorps	%xmm0, %xmm0
	xorl	%eax, %eax
	movq	(%rsp), %rcx
.LBB1_11:                               # =>This Inner Loop Header: Depth=1
	addss	(%rcx,%rax,4), %xmm0
	incq	%rax
	cmpq	$256000000, %rax                # imm = 0xF424000
	jne	.LBB1_11
# %bb.12:
	divss	.LCPI1_1(%rip), %xmm1
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	movl	$.L.str.1, %edi
	movb	$2, %al
	callq	printf
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipHostFree
	movq	32(%rsp), %rdi
	callq	hipHostFree
	movq	(%rsp), %rdi
	callq	hipHostFree
	xorl	%ebx, %ebx
.LBB1_13:                               # =>This Inner Loop Header: Depth=1
	movq	48(%rsp,%rbx,8), %rdi
	callq	hipStreamDestroy
	incq	%rbx
	cmpq	$32, %rbx
	jne	.LBB1_13
# %bb.14:
	xorl	%eax, %eax
	addq	$312, %rsp                      # imm = 0x138
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11cuda_vecAddPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11cuda_vecAddPfS_S_i,@object  # @_Z11cuda_vecAddPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z11cuda_vecAddPfS_S_i
	.p2align	3, 0x0
_Z11cuda_vecAddPfS_S_i:
	.quad	_Z26__device_stub__cuda_vecAddPfS_S_i
	.size	_Z11cuda_vecAddPfS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d %d\n"
	.size	.L.str, 7

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"CheckGPU: %f -- TimeGPU: %fms\n"
	.size	.L.str.1, 31

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11cuda_vecAddPfS_S_i"
	.size	.L__unnamed_1, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__cuda_vecAddPfS_S_i
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11cuda_vecAddPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11cuda_vecAddPfS_S_i  ; -- Begin function _Z11cuda_vecAddPfS_S_i
	.globl	_Z11cuda_vecAddPfS_S_i
	.p2align	8
	.type	_Z11cuda_vecAddPfS_S_i,@function
_Z11cuda_vecAddPfS_S_i:                 ; @_Z11cuda_vecAddPfS_S_i
; %bb.0:
	s_clause 0x3
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s2
	v_add3_u32 v0, s15, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11cuda_vecAddPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11cuda_vecAddPfS_S_i, .Lfunc_end0-_Z11cuda_vecAddPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11cuda_vecAddPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11cuda_vecAddPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
