
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <cuComplex.h>
#include <math.h>
#include <math_constants.h>
#include <iostream>

__global__ void Goertzel(int N, cuFloatComplex *device_x, cuFloatComplex *device_X_k)
{
	int xIndex, yIndex, zIndex, n;

	xIndex = threadIdx.x + blockIdx.x * blockDim.x;
	yIndex = threadIdx.y + blockIdx.y * blockDim.y;
	zIndex = threadIdx.z + blockIdx.z * blockDim.z;

	cuFloatComplex sk1,sk2,skn,ykn;
	cuFloatComplex aux_1,aux_2,aux_3,aux_4,aux_5;
	sk1 = make_cuFloatComplex(0.0,0.0);
	sk2 = make_cuFloatComplex(0.0,0.0);

	for(n = 0; n < N; n++)
	{
		aux_1 = cuCmulf(make_cuFloatComplex((2 * cos(2*CUDART_PI_F*xIndex/N)),0.0),sk1);
		aux_2 = cuCaddf(device_x[n],aux_1);
		aux_3 = cuCsubf(aux_2,sk2);
		skn = aux_3;

		sk2 = sk1;
		sk1 = skn;
	}
	aux_4 = cuCmulf(make_cuFloatComplex((2 * cos(2*CUDART_PI_F*xIndex/N)),0.0),sk1);
	skn = cuCsubf(aux_4,sk2);
	aux_5 = cuCmulf(make_cuFloatComplex(cos((-2*CUDART_PI_F*xIndex)/N), sin((-2*CUDART_PI_F*xIndex)/N)),sk1);
	ykn = cuCsubf(skn,aux_5);
	device_X_k[xIndex] = ykn;
}

int main()
{
	//Ingrese el tamao del vector de entrada x[n]
	int N = 1000;

	//Numero de iteraciones
	int j;
	int loop = 500;

	//Pausa
	printf("\n---PRESIONA UNA TECLA PARA CONTINUAR---\n\n");
	getchar();
	
	for(j = 0;j < loop;j++)
	{
		//Comandos necesarios para medir el tiempo de la aplicacion (app)
		float elapsedTime_app;
		cudaEvent_t start_app, stop_app;
		cudaEventCreate(&start_app);
		cudaEventCreate(&stop_app);

		//---------------------------------------------------------------------------------------------
		//Se empieza a medir el tiempo de ejecucion de la aplicacion
		cudaEventRecord(start_app,0);

		//Comandos necesarios para medir el tiempo del kernel (kernel)
		float elapsedTime_kernel;
		cudaEvent_t start_kernel, stop_kernel;
		cudaEventCreate(&start_kernel);
		cudaEventCreate(&stop_kernel);

		//Declaracion de variables
		int i;
		cuFloatComplex *host_x;
		cuFloatComplex *host_X_k;
		cuFloatComplex *device_x;
		cuFloatComplex *device_X_k;
		FILE *time_app;
		FILE *time_kernel;

		//Se crean los archivos binarios donde se guardaran los tiempos
		time_app = fopen("time_app.bin","a+b");
		time_kernel = fopen("time_kernel.bin","a+b");

		//Se reserva memoria en host y device para x
		host_x = (cuFloatComplex*) malloc(sizeof(cuFloatComplex)*N);
		host_X_k = (cuFloatComplex*) malloc(sizeof(cuFloatComplex)*N);
		cudaMalloc((void**)&device_x,sizeof(cuFloatComplex)*N);
		cudaMalloc((void**)&device_X_k,sizeof(cuFloatComplex)*N);

		//Se dan valores al vector de entrada x[n]
		for(i = 0;i < N;i++ )
		{
			host_x[i] = make_cuFloatComplex(rand()%11,rand()%21);
			//host_x[i] = make_cuFloatComplex(i+1,0.0);
		}

		/*
		//Se imprime vector de entrada x[n]
		printf("\n\n---VECTOR DE ENTRADA x[n]---\n");
		for(i = 0;i < N;i++)
		{
			printf("\nx[%d] = (%f) + (%f)\n ",i,cuCrealf(host_x[i]),cuCimagf(host_x[i]));
		}
		*/

		//--------------------------------------------------------------------------------------------
		//Se empieza a medir el tiempo de ejecucion del kernel
		cudaEventRecord(start_kernel,0);
	
		//Se copia el arreglo x[n] a la memoria global de la GPU
		cudaMemcpy(device_x,host_x,sizeof(cuFloatComplex)*N,cudaMemcpyHostToDevice);

		//Variables necesarias para dimensionar el block y grid
		dim3 dimBlock; 
		dim3 dimGrid;
		dimBlock.x = N; dimBlock.y = 1; dimBlock.z = 1;
		dimGrid.x  = 1; dimGrid.y  = 1; dimGrid.z  = 1;
		
		//Se invoca el kernel
		Goertzel<<<dimGrid,dimBlock >>>(N, device_x, device_X_k);
		cudaThreadSynchronize();

		//Se leen los resultados de la GPU
		cudaMemcpy(host_X_k,device_X_k,sizeof(cuFloatComplex)*N,cudaMemcpyDeviceToHost);
	
		//Se termina de medir el tiempo de ejecucion del kernel
		cudaEventRecord(stop_kernel,0);
		cudaEventSynchronize(stop_kernel);
		cudaEventElapsedTime(&elapsedTime_kernel,start_kernel,stop_kernel);
		//fprintf(time_kernel,"%f\n",elapsedTime_kernel);
		fwrite(&elapsedTime_kernel,sizeof(float),1,time_kernel);
		//printf("\n\nTiempo de ejecucion del kernel: %f milisegundos\n\n",elapsedTime_kernel);
		//--------------------------------------------------------------------------------------------

		//Se destruyen los eventos que miden el tiempo del kernel
		cudaEventDestroy(start_kernel);
		cudaEventDestroy(stop_kernel);

		//Se cierra el archivo binario "time_kernel"
		fclose(time_kernel);

		/*
		//Se imprime vector de salida X[k]
		printf("\n\n---VECTOR DE SALIDA X[k]---\n");
		for(i = 0;i < N;i++)
		{
			printf("\nX[%d] = (%f) + (%f)\n ",i,cuCrealf(host_X_k[i]),cuCimagf(host_X_k[i]));
		}
		*/

		//Se liberan memorias del Host y Device
		free(host_x);
		free(host_X_k);
		cudaFree(device_x);
		cudaFree(device_X_k);

		//Comandos necesarios para medir el tiempo de la aplicacion (app)
		cudaEventRecord(stop_app,0);
		cudaEventSynchronize(stop_app);
		cudaEventElapsedTime(&elapsedTime_app,start_app,stop_app);
		fwrite(&elapsedTime_app,sizeof(float),1,time_app);
		//fprintf(time_app,"%f\n",elapsedTime_app);
		//printf("\n\nTiempo de ejecucion de la aplicacion: %f milisegundos\n\n",elapsedTime_app);
		//--------------------------------------------------------------------------------------------

		//Se destruyen los eventos que miden el tiempo de la aplicacion
		cudaEventDestroy(start_app);
		cudaEventDestroy(stop_app);

		//Se cierra el archivo binario "time_app"
		fclose(time_app);
	}
}


	.file	"tmpxft_002b8b57_00000000-6_kernel.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3661:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3661:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z37__device_stub__Z8GoertzeliP6float2S0_iP6float2S0_
	.type	_Z37__device_stub__Z8GoertzeliP6float2S0_iP6float2S0_, @function
_Z37__device_stub__Z8GoertzeliP6float2S0_iP6float2S0_:
.LFB3683:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z8GoertzeliP6float2S0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3683:
	.size	_Z37__device_stub__Z8GoertzeliP6float2S0_iP6float2S0_, .-_Z37__device_stub__Z8GoertzeliP6float2S0_iP6float2S0_
	.globl	_Z8GoertzeliP6float2S0_
	.type	_Z8GoertzeliP6float2S0_, @function
_Z8GoertzeliP6float2S0_:
.LFB3684:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z8GoertzeliP6float2S0_iP6float2S0_
	.cfi_endproc
.LFE3684:
	.size	_Z8GoertzeliP6float2S0_, .-_Z8GoertzeliP6float2S0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\n---PRESIONA UNA TECLA PARA CONTINUAR---\n\n"
.LC1:
	.string	"a+b"
.LC2:
	.string	"time_app.bin"
.LC3:
	.string	"time_kernel.bin"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3658:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	.LC1(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	$500, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	getchar@PLT
.L11:
	leaq	48(%rsp), %rdi
	xorl	%ebp, %ebp
	movl	$21, %r15d
	call	cudaEventCreate@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	%r14, %rsi
	leaq	.LC2(%rip), %rdi
	call	fopen@PLT
	movq	%r14, %rsi
	leaq	.LC3(%rip), %rdi
	movq	%rax, 8(%rsp)
	call	fopen@PLT
	movl	$8000, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$8000, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	leaq	80(%rsp), %rdi
	movl	$8000, %esi
	movq	%rax, 16(%rsp)
	call	cudaMalloc@PLT
	leaq	88(%rsp), %rdi
	movl	$8000, %esi
	call	cudaMalloc@PLT
.L9:
	call	rand@PLT
	cltd
	idivl	%r15d
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, 28(%rsp)
	call	rand@PLT
	movl	$11, %esi
	movss	28(%rsp), %xmm0
	cltd
	idivl	%esi
	movss	%xmm0, 4(%rbx,%rbp)
	cvtsi2ssl	%edx, %xmm1
	movss	%xmm1, (%rbx,%rbp)
	addq	$8, %rbp
	cmpq	$8000, %rbp
	jne	.L9
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	80(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$8000, %edx
	call	cudaMemcpy@PLT
	movl	$536871037, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$3, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	88(%rsp), %rdx
	movq	80(%rsp), %rsi
	movl	$1000, %edi
	call	_Z37__device_stub__Z8GoertzeliP6float2S0_iP6float2S0_
.L10:
	call	cudaThreadSynchronize@PLT
	movq	88(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$2, %ecx
	movl	$8000, %edx
	leaq	44(%rsp), %r15
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	72(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	%r15, %rdi
	call	cudaEventElapsedTime@PLT
	movq	%r12, %rcx
	movl	$1, %edx
	movq	%r15, %rdi
	movl	$4, %esi
	call	fwrite@PLT
	movq	64(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	72(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	%r12, %rdi
	call	fclose@PLT
	movq	%rbx, %rdi
	leaq	40(%rsp), %rbx
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	%rbx, %rdi
	call	cudaEventElapsedTime@PLT
	movq	8(%rsp), %rcx
	movl	$1, %edx
	movq	%rbx, %rdi
	movl	$4, %esi
	call	fwrite@PLT
	movq	48(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	56(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	8(%rsp), %rdi
	call	fclose@PLT
	decl	%r13d
	jne	.L11
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3658:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z8GoertzeliP6float2S0_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3686:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z8GoertzeliP6float2S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3686:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include "hip/hip_runtime.h"

#include <stdio.h>
#include <hip/hip_complex.h>
#include <math.h>
#include <hip/hip_math_constants.h>
#include <iostream>

__global__ void Goertzel(int N, hipFloatComplex *device_x, hipFloatComplex *device_X_k)
{
	int xIndex, yIndex, zIndex, n;

	xIndex = threadIdx.x + blockIdx.x * blockDim.x;
	yIndex = threadIdx.y + blockIdx.y * blockDim.y;
	zIndex = threadIdx.z + blockIdx.z * blockDim.z;

	hipFloatComplex sk1,sk2,skn,ykn;
	hipFloatComplex aux_1,aux_2,aux_3,aux_4,aux_5;
	sk1 = make_hipFloatComplex(0.0,0.0);
	sk2 = make_hipFloatComplex(0.0,0.0);

	for(n = 0; n < N; n++)
	{
		aux_1 = hipCmulf(make_hipFloatComplex((2 * cos(2*HIP_PI_F*xIndex/N)),0.0),sk1);
		aux_2 = hipCaddf(device_x[n],aux_1);
		aux_3 = hipCsubf(aux_2,sk2);
		skn = aux_3;

		sk2 = sk1;
		sk1 = skn;
	}
	aux_4 = hipCmulf(make_hipFloatComplex((2 * cos(2*HIP_PI_F*xIndex/N)),0.0),sk1);
	skn = hipCsubf(aux_4,sk2);
	aux_5 = hipCmulf(make_hipFloatComplex(cos((-2*HIP_PI_F*xIndex)/N), sin((-2*HIP_PI_F*xIndex)/N)),sk1);
	ykn = hipCsubf(skn,aux_5);
	device_X_k[xIndex] = ykn;
}

int main()
{
	//Ingrese el tamao del vector de entrada x[n]
	int N = 1000;

	//Numero de iteraciones
	int j;
	int loop = 500;

	//Pausa
	printf("\n---PRESIONA UNA TECLA PARA CONTINUAR---\n\n");
	getchar();
	
	for(j = 0;j < loop;j++)
	{
		//Comandos necesarios para medir el tiempo de la aplicacion (app)
		float elapsedTime_app;
		hipEvent_t start_app, stop_app;
		hipEventCreate(&start_app);
		hipEventCreate(&stop_app);

		//---------------------------------------------------------------------------------------------
		//Se empieza a medir el tiempo de ejecucion de la aplicacion
		hipEventRecord(start_app,0);

		//Comandos necesarios para medir el tiempo del kernel (kernel)
		float elapsedTime_kernel;
		hipEvent_t start_kernel, stop_kernel;
		hipEventCreate(&start_kernel);
		hipEventCreate(&stop_kernel);

		//Declaracion de variables
		int i;
		hipFloatComplex *host_x;
		hipFloatComplex *host_X_k;
		hipFloatComplex *device_x;
		hipFloatComplex *device_X_k;
		FILE *time_app;
		FILE *time_kernel;

		//Se crean los archivos binarios donde se guardaran los tiempos
		time_app = fopen("time_app.bin","a+b");
		time_kernel = fopen("time_kernel.bin","a+b");

		//Se reserva memoria en host y device para x
		host_x = (hipFloatComplex*) malloc(sizeof(hipFloatComplex)*N);
		host_X_k = (hipFloatComplex*) malloc(sizeof(hipFloatComplex)*N);
		hipMalloc((void**)&device_x,sizeof(hipFloatComplex)*N);
		hipMalloc((void**)&device_X_k,sizeof(hipFloatComplex)*N);

		//Se dan valores al vector de entrada x[n]
		for(i = 0;i < N;i++ )
		{
			host_x[i] = make_hipFloatComplex(rand()%11,rand()%21);
			//host_x[i] = make_cuFloatComplex(i+1,0.0);
		}

		/*
		//Se imprime vector de entrada x[n]
		printf("\n\n---VECTOR DE ENTRADA x[n]---\n");
		for(i = 0;i < N;i++)
		{
			printf("\nx[%d] = (%f) + (%f)\n ",i,cuCrealf(host_x[i]),cuCimagf(host_x[i]));
		}
		*/

		//--------------------------------------------------------------------------------------------
		//Se empieza a medir el tiempo de ejecucion del kernel
		hipEventRecord(start_kernel,0);
	
		//Se copia el arreglo x[n] a la memoria global de la GPU
		hipMemcpy(device_x,host_x,sizeof(hipFloatComplex)*N,hipMemcpyHostToDevice);

		//Variables necesarias para dimensionar el block y grid
		dim3 dimBlock; 
		dim3 dimGrid;
		dimBlock.x = N; dimBlock.y = 1; dimBlock.z = 1;
		dimGrid.x  = 1; dimGrid.y  = 1; dimGrid.z  = 1;
		
		//Se invoca el kernel
		Goertzel<<<dimGrid,dimBlock >>>(N, device_x, device_X_k);
		hipDeviceSynchronize();

		//Se leen los resultados de la GPU
		hipMemcpy(host_X_k,device_X_k,sizeof(hipFloatComplex)*N,hipMemcpyDeviceToHost);
	
		//Se termina de medir el tiempo de ejecucion del kernel
		hipEventRecord(stop_kernel,0);
		hipEventSynchronize(stop_kernel);
		hipEventElapsedTime(&elapsedTime_kernel,start_kernel,stop_kernel);
		//fprintf(time_kernel,"%f\n",elapsedTime_kernel);
		fwrite(&elapsedTime_kernel,sizeof(float),1,time_kernel);
		//printf("\n\nTiempo de ejecucion del kernel: %f milisegundos\n\n",elapsedTime_kernel);
		//--------------------------------------------------------------------------------------------

		//Se destruyen los eventos que miden el tiempo del kernel
		hipEventDestroy(start_kernel);
		hipEventDestroy(stop_kernel);

		//Se cierra el archivo binario "time_kernel"
		fclose(time_kernel);

		/*
		//Se imprime vector de salida X[k]
		printf("\n\n---VECTOR DE SALIDA X[k]---\n");
		for(i = 0;i < N;i++)
		{
			printf("\nX[%d] = (%f) + (%f)\n ",i,cuCrealf(host_X_k[i]),cuCimagf(host_X_k[i]));
		}
		*/

		//Se liberan memorias del Host y Device
		free(host_x);
		free(host_X_k);
		hipFree(device_x);
		hipFree(device_X_k);

		//Comandos necesarios para medir el tiempo de la aplicacion (app)
		hipEventRecord(stop_app,0);
		hipEventSynchronize(stop_app);
		hipEventElapsedTime(&elapsedTime_app,start_app,stop_app);
		fwrite(&elapsedTime_app,sizeof(float),1,time_app);
		//fprintf(time_app,"%f\n",elapsedTime_app);
		//printf("\n\nTiempo de ejecucion de la aplicacion: %f milisegundos\n\n",elapsedTime_app);
		//--------------------------------------------------------------------------------------------

		//Se destruyen los eventos que miden el tiempo de la aplicacion
		hipEventDestroy(start_app);
		hipEventDestroy(stop_app);

		//Se cierra el archivo binario "time_app"
		fclose(time_app);
	}
}


	.text
	.file	"kernel.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z23__device_stub__GoertzeliP15HIP_vector_typeIfLj2EES1_ # -- Begin function _Z23__device_stub__GoertzeliP15HIP_vector_typeIfLj2EES1_
	.type	_Z23__device_stub__GoertzeliP15HIP_vector_typeIfLj2EES1_,@function
_Z23__device_stub__GoertzeliP15HIP_vector_typeIfLj2EES1_: # @_Z23__device_stub__GoertzeliP15HIP_vector_typeIfLj2EES1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8GoertzeliP15HIP_vector_typeIfLj2EES1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z23__device_stub__GoertzeliP15HIP_vector_typeIfLj2EES1_, .Lfunc_end0-_Z23__device_stub__GoertzeliP15HIP_vector_typeIfLj2EES1_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967297, %rbx               # imm = 0x100000001
	movl	$.Lstr, %edi
	callq	puts@PLT
	callq	getchar
	xorl	%r14d, %r14d
	leaq	999(%rbx), %rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
.LBB1_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	leaq	48(%rsp), %rdi
	callq	hipEventCreate
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %r13
	movl	$.L.str.3, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %rbp
	movl	$8000, %edi                     # imm = 0x1F40
	callq	malloc
	movq	%rax, %rbx
	movl	$8000, %edi                     # imm = 0x1F40
	callq	malloc
	movq	%rax, %r15
	movl	$8000, %esi                     # imm = 0x1F40
	leaq	32(%rsp), %rdi
	callq	hipMalloc
	movl	$8000, %esi                     # imm = 0x1F40
	leaq	24(%rsp), %rdi
	callq	hipMalloc
	xorl	%r12d, %r12d
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$780903145, %rax, %rcx          # imm = 0x2E8BA2E9
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$33, %rcx
	addl	%edx, %ecx
	leal	(%rcx,%rcx,4), %edx
	leal	(%rcx,%rdx,2), %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, 68(%rsp)                 # 4-byte Spill
	callq	rand
	cltq
	imulq	$818089009, %rax, %rcx          # imm = 0x30C30C31
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	leal	(%rcx,%rcx,4), %edx
	leal	(%rcx,%rdx,4), %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	68(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, 56(%rsp)
	movss	%xmm0, 60(%rsp)
	movsd	56(%rsp), %xmm0                 # xmm0 = mem[0],zero
	movsd	%xmm0, (%rbx,%r12,8)
	incq	%r12
	cmpq	$1000, %r12                     # imm = 0x3E8
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	32(%rsp), %rdi
	movl	$8000, %edx                     # imm = 0x1F40
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	72(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_5
# %bb.4:                                #   in Loop: Header=BB1_1 Depth=1
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	$1000, %edi                     # imm = 0x3E8
	callq	_Z23__device_stub__GoertzeliP15HIP_vector_typeIfLj2EES1_
.LBB1_5:                                #   in Loop: Header=BB1_1 Depth=1
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rsi
	movl	$8000, %edx                     # imm = 0x1F40
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	40(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	84(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	movl	$4, %esi
	movl	$1, %edx
	movq	%r12, %rdi
	movq	%rbp, %rcx
	callq	fwrite
	movq	40(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	movq	%rbp, %rdi
	callq	fclose
	movq	%rbx, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	callq	hipEventSynchronize
	movq	48(%rsp), %rsi
	movq	16(%rsp), %rdx
	leaq	56(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movl	$4, %esi
	movl	$1, %edx
	movq	%rbx, %rdi
	movq	%r13, %rcx
	callq	fwrite
	movq	48(%rsp), %rdi
	callq	hipEventDestroy
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	%r13, %rdi
	callq	fclose
	incl	%r14d
	cmpl	$500, %r14d                     # imm = 0x1F4
	jne	.LBB1_1
# %bb.6:
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8GoertzeliP15HIP_vector_typeIfLj2EES1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8GoertzeliP15HIP_vector_typeIfLj2EES1_,@object # @_Z8GoertzeliP15HIP_vector_typeIfLj2EES1_
	.section	.rodata,"a",@progbits
	.globl	_Z8GoertzeliP15HIP_vector_typeIfLj2EES1_
	.p2align	3, 0x0
_Z8GoertzeliP15HIP_vector_typeIfLj2EES1_:
	.quad	_Z23__device_stub__GoertzeliP15HIP_vector_typeIfLj2EES1_
	.size	_Z8GoertzeliP15HIP_vector_typeIfLj2EES1_, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"time_app.bin"
	.size	.L.str.1, 13

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"a+b"
	.size	.L.str.2, 4

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"time_kernel.bin"
	.size	.L.str.3, 16

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8GoertzeliP15HIP_vector_typeIfLj2EES1_"
	.size	.L__unnamed_1, 41

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\n---PRESIONA UNA TECLA PARA CONTINUAR---\n"
	.size	.Lstr, 42

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__GoertzeliP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8GoertzeliP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8GoertzeliP15HIP_vector_typeIfLj2EES1_ ; -- Begin function _Z8GoertzeliP15HIP_vector_typeIfLj2EES1_
	.globl	_Z8GoertzeliP15HIP_vector_typeIfLj2EES1_
	.p2align	8
	.type	_Z8GoertzeliP15HIP_vector_typeIfLj2EES1_,@function
_Z8GoertzeliP15HIP_vector_typeIfLj2EES1_: ; @_Z8GoertzeliP15HIP_vector_typeIfLj2EES1_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x0
	s_load_b128 s[4:7], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	v_cvt_f32_i32_e32 v7, s3
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_cmp_lt_i32 s3, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v8, v1
	v_mul_f32_e32 v0, 0x40c90fdb, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v2, null, v7, v7, v0
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v4, -v2, v3, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v4, v3
	v_div_scale_f32 v5, vcc_lo, v0, v7, v0
	v_mul_f32_e32 v4, v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, -v2, v4, v5
	v_fmac_f32_e32 v4, v6, v3
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v2, -v2, v4, v5
	v_mov_b32_e32 v5, 0
	v_div_fmas_f32 v2, v2, v3, v4
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v10, v2, v7, v0
	v_dual_mov_b32 v0, 0 :: v_dual_and_b32 v11, 0x7fffffff, v10
	v_mul_f32_e64 v12, 0x3f22f983, |v10|
	v_cmp_class_f32_e64 s0, v10, 0x1f8
	s_delay_alu instid0(VALU_DEP_3)
	v_lshrrev_b32_e32 v9, 23, v11
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_mov_b32 s1, 0x7fffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v0, v11, s1, 0x800000
	v_mad_u64_u32 v[4:5], null, 0xfe5163ab, v0, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, v5
	v_mad_u64_u32 v[5:6], null, 0x3c439041, v0, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v2, v6
	v_add_nc_u32_e32 v6, 0xffffff88, v9
	v_mad_u64_u32 v[13:14], null, 0xdb629599, v0, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_lt_u32_e32 vcc_lo, 63, v6
	v_cndmask_b32_e64 v17, 0, 0xffffffc0, vcc_lo
	v_mov_b32_e32 v2, v14
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v4, v13, v4, vcc_lo
	v_add_nc_u32_e32 v6, v17, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[14:15], null, 0xf534ddc0, v0, v[2:3]
	v_cmp_lt_u32_e64 s1, 31, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v2, v15 :: v_dual_cndmask_b32 v5, v14, v5
	v_cndmask_b32_e64 v18, 0, 0xffffffe0, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[15:16], null, 0xfc2757d1, v0, v[2:3]
	v_add_nc_u32_e32 v6, v18, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v4, v5, v4, s1
	v_cmp_lt_u32_e64 s2, 31, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v2, v16
	v_mad_u64_u32 v[16:17], null, 0x4e441529, v0, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v2, v17
	v_mad_u64_u32 v[17:18], null, 0xa2f9836e, v0, v[2:3]
	v_cndmask_b32_e64 v0, 0, 0xffffffe0, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v16, v14, vcc_lo
	v_dual_cndmask_b32 v17, v17, v15 :: v_dual_add_nc_u32 v0, v0, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v16, v18, v16 :: v_dual_cndmask_b32 v15, v15, v13
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v6, v17, v2, s1
	v_cndmask_b32_e64 v14, v16, v17, s1
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e64 v2, v2, v15, s1
	v_sub_nc_u32_e32 v16, 32, v0
	v_cndmask_b32_e64 v15, v15, v5, s1
	s_mov_b32 s1, 0xb94c1982
	v_cndmask_b32_e64 v14, v14, v6, s2
	v_cndmask_b32_e64 v6, v6, v2, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v2, v2, v15, s2
	v_cndmask_b32_e64 v4, v15, v4, s2
	s_mov_b32 s2, 0x37d75334
	v_alignbit_b32 v17, v14, v6, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v13, v6, v2, v16
	v_alignbit_b32 v15, v2, v4, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v0, v17, v14, vcc_lo
	v_cndmask_b32_e32 v5, v13, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v2, v15, v2, vcc_lo
	v_cmp_gt_f32_e64 vcc_lo, 0x48000000, |v10|
	v_bfe_u32 v6, v0, 29, 1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_alignbit_b32 v13, v0, v5, 30
	v_alignbit_b32 v5, v5, v2, 30
	v_alignbit_b32 v2, v2, v4, 30
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v14, 0, v6
	v_xor_b32_e32 v13, v13, v14
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v4, v5, v14
	v_xor_b32_e32 v2, v2, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v15, v13
	v_min_u32_e32 v15, 32, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v5, 31, v15
	v_lshlrev_b32_e32 v17, 23, v15
	v_alignbit_b32 v13, v13, v4, v5
	v_alignbit_b32 v2, v4, v2, v5
	v_lshrrev_b32_e32 v5, 29, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_alignbit_b32 v4, v13, v2, 9
	v_lshlrev_b32_e32 v5, 31, v5
	v_lshrrev_b32_e32 v13, 9, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_clz_i32_u32_e32 v14, v4
	v_or_b32_e32 v16, 0.5, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min_u32_e32 v14, 32, v14
	v_sub_nc_u32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v18, 31, v14
	v_alignbit_b32 v2, v4, v2, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or_b32_e32 v4, v13, v16
	v_add_lshl_u32 v13, v14, v15, 23
	v_lshrrev_b32_e32 v2, 9, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v14, 0x3fc90fda, v4
	v_sub_nc_u32_e32 v2, v2, v13
	v_rndne_f32_e32 v13, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v15, 0x3fc90fda, v4, -v14
	v_add_nc_u32_e32 v2, 0x33000000, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v16, 0xbfc90fda, v13, |v10|
	v_fmamk_f32 v4, v4, 0x33a22168, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v2, v2, v5
	v_fmamk_f32 v5, v13, 0xb3a22168, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, 0x3fc90fda, v2
	v_fmamk_f32 v2, v13, 0xa7c234c4, v5
	v_cvt_i32_f32_e32 v13, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v14, v4
	v_cndmask_b32_e32 v2, v4, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v2, v2
	v_fmaak_f32 v5, s1, v4, 0x3c0881c4
	v_fmaak_f32 v14, s2, v4, 0xbab64f3b
	s_add_u32 s1, s4, 4
	s_addc_u32 s2, s5, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v5, v4, v5, 0xbe2aaa9d
	v_mul_f32_e32 v5, v4, v5
	v_lshrrev_b32_e32 v0, 30, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v2, v2, v5
	v_add_nc_u32_e32 v0, v6, v0
	v_dual_fmaak_f32 v6, v4, v14, 0x3d2aabf7 :: v_dual_mov_b32 v5, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v13, vcc_lo
	v_dual_fmaak_f32 v6, v4, v6, 0xbf000004 :: v_dual_and_b32 v13, 1, v0
	v_lshlrev_b32_e32 v0, 30, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v4, v4, v6, 1.0
	v_cmp_eq_u32_e32 vcc_lo, 0, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_and_b32_e32 v0, 0x80000000, v0
	v_cndmask_b32_e64 v2, -v2, v4, vcc_lo
	v_mov_b32_e32 v4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v2
	v_add_f32_e32 v2, v0, v0
	v_mov_b32_e32 v0, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v2, 0x7fc00000, v2, s0
.LBB0_2:                                ; %_ZL3cosf.exit
                                        ; =>This Inner Loop Header: Depth=1
	s_add_u32 s4, s1, -4
	s_addc_u32 s5, s2, -1
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v13, v0 :: v_dual_mov_b32 v0, v5
	s_load_b64 s[4:5], s[4:5], 0x0
	v_mov_b32_e32 v6, v4
	s_add_i32 s3, s3, -1
	s_add_u32 s1, s1, 8
	v_mul_f32_e32 v5, v2, v0
	v_mul_f32_e32 v4, 0, v0
	s_addc_u32 s2, s2, 0
	s_cmp_lg_u32 s3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v5, 0, v6
	v_fma_f32 v4, v2, v6, -v4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v4, s4, v4 :: v_dual_add_f32 v5, s5, v5
	v_dual_sub_f32 v4, v4, v3 :: v_dual_sub_f32 v5, v5, v13
	v_mov_b32_e32 v3, v6
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %._crit_edge
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr2
	s_mov_b32 s2, exec_lo
	v_cmpx_ngt_f32_e64 0x48000000, |v10|
	s_xor_b32 s3, exec_lo, s2
	s_cbranch_execz .LBB0_5
; %bb.4:
	s_mov_b32 s1, 0x7fffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_or_b32 v19, v11, s1, 0x800000
	v_mad_u64_u32 v[2:3], null, 0xfe5163ab, v19, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v10, v3
	v_add_nc_u32_e32 v3, 0xffffff88, v9
	v_mad_u64_u32 v[12:13], null, 0x3c439041, v19, v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_lt_u32_e32 vcc_lo, 63, v3
	v_cndmask_b32_e64 v9, 0, 0xffffffc0, vcc_lo
	v_mov_b32_e32 v10, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v9, v3
	v_mad_u64_u32 v[13:14], null, 0xdb629599, v19, v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s1, 31, v3
	v_mov_b32_e32 v10, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v9, 0, 0xffffffe0, s1
	v_cndmask_b32_e32 v2, v13, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[14:15], null, 0xf534ddc0, v19, v[10:11]
	v_add_nc_u32_e32 v3, v9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_u32_e64 s2, 31, v3
	v_mov_b32_e32 v10, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v9, 0, 0xffffffe0, s2
	v_mad_u64_u32 v[15:16], null, 0xfc2757d1, v19, v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v9, v3
	v_dual_cndmask_b32 v9, v14, v12 :: v_dual_mov_b32 v10, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v2, v9, v2, s1
	v_mad_u64_u32 v[16:17], null, 0x4e441529, v19, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v10, v17
	v_mad_u64_u32 v[17:18], null, 0xa2f9836e, v19, v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v10, v16, v14, vcc_lo
	v_sub_nc_u32_e32 v14, 32, v3
	v_dual_cndmask_b32 v11, v17, v15 :: v_dual_cndmask_b32 v16, v18, v16
	v_cndmask_b32_e32 v15, v15, v13, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v12, v11, v10, s1
	v_cndmask_b32_e64 v11, v16, v11, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v10, v10, v15, s1
	v_cndmask_b32_e64 v15, v15, v9, s1
	v_cndmask_b32_e64 v11, v11, v12, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v12, v12, v10, s2
	v_cndmask_b32_e64 v10, v10, v15, s2
	v_cndmask_b32_e64 v2, v15, v2, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v16, v11, v12, v14
	v_alignbit_b32 v13, v12, v10, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v14, v10, v2, v14
	v_cndmask_b32_e32 v3, v16, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v9, v13, v12 :: v_dual_cndmask_b32 v10, v14, v10
	v_bfe_u32 v11, v3, 29, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v12, v3, v9, 30
	v_alignbit_b32 v9, v9, v10, 30
	v_alignbit_b32 v2, v10, v2, 30
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v13, 0, v11
	v_xor_b32_e32 v12, v12, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v9, v9, v13
	v_xor_b32_e32 v2, v2, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v14, v12
	v_min_u32_e32 v14, 32, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v10, 31, v14
	v_lshlrev_b32_e32 v16, 23, v14
	v_alignbit_b32 v12, v12, v9, v10
	v_alignbit_b32 v2, v9, v2, v10
	v_lshrrev_b32_e32 v10, 29, v3
	v_lshrrev_b32_e32 v3, 30, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v9, v12, v2, 9
	v_lshlrev_b32_e32 v10, 31, v10
	v_lshrrev_b32_e32 v12, 9, v12
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v3, v11, v3
	v_clz_i32_u32_e32 v13, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v15, 0.5, v10
	v_min_u32_e32 v13, 32, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v15, v15, v16
	v_sub_nc_u32_e32 v17, 31, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v2, v9, v2, v17
	v_or_b32_e32 v9, v12, v15
	v_add_lshl_u32 v12, v13, v14, 23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v2, 9, v2
	v_mul_f32_e32 v13, 0x3fc90fda, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v12
	v_fma_f32 v12, 0x3fc90fda, v9, -v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, 0x33000000, v2
	v_fmamk_f32 v9, v9, 0x33a22168, v12
                                        ; implicit-def: $vgpr12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v2, v2, v10
                                        ; implicit-def: $vgpr10
	v_fmac_f32_e32 v9, 0x3fc90fda, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v2, v13, v9
.LBB0_5:                                ; %Flow228
	s_and_not1_saveexec_b32 s1, s3
; %bb.6:
	v_rndne_f32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v2, 0xbfc90fda, v3, |v10|
	v_fmamk_f32 v2, v3, 0xb3a22168, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_fmamk_f32 v2, v3, 0xa7c234c4, v2
	v_cvt_i32_f32_e32 v3, v3
; %bb.7:                                ; %_ZL3cosf.exit147
	s_or_b32 exec_lo, exec_lo, s1
	v_mul_f32_e32 v8, 0xc0c90fdb, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v9, null, v7, v7, v8
	v_div_scale_f32 v12, vcc_lo, v8, v7, v8
	v_rcp_f32_e32 v10, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v9, v10, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v11, v10
	v_mul_f32_e32 v11, v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v13, -v9, v11, v12
	v_fmac_f32_e32 v11, v13, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v9, v11, v12
	v_div_fmas_f32 v9, v9, v10, v11
                                        ; implicit-def: $vgpr10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v7, v9, v7, v8
                                        ; implicit-def: $vgpr9
	v_and_b32_e32 v8, 0x7fffffff, v7
	v_cmp_ngt_f32_e64 s3, 0x48000000, |v7|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s3
	s_xor_b32 s4, exec_lo, s1
	s_cbranch_execz .LBB0_9
; %bb.8:
	s_mov_b32 s1, 0x7fffff
	v_mov_b32_e32 v11, 0
	v_and_or_b32 v19, v8, s1, 0x800000
	v_lshrrev_b32_e32 v16, 23, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[9:10], null, 0xfe5163ab, v19, 0
	v_add_nc_u32_e32 v17, 0xffffff88, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_u32_e32 vcc_lo, 63, v17
	v_mad_u64_u32 v[12:13], null, 0x3c439041, v19, v[10:11]
	v_cndmask_b32_e64 v18, 0, 0xffffffc0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v10, v13
	v_add_nc_u32_e32 v18, v18, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[13:14], null, 0xdb629599, v19, v[10:11]
	v_cmp_lt_u32_e64 s1, 31, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v20, 0, 0xffffffe0, s1
	v_dual_mov_b32 v10, v14 :: v_dual_cndmask_b32 v9, v13, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v20, v20, v18
	v_mad_u64_u32 v[14:15], null, 0xf534ddc0, v19, v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s2, 31, v20
	v_mov_b32_e32 v10, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v12, v14, v12, vcc_lo
	v_mad_u64_u32 v[15:16], null, 0xfc2757d1, v19, v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v9, v12, v9, s1
	v_mov_b32_e32 v10, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[16:17], null, 0x4e441529, v19, v[10:11]
	v_mov_b32_e32 v10, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[17:18], null, 0xa2f9836e, v19, v[10:11]
	v_cndmask_b32_e64 v10, 0, 0xffffffe0, s2
	v_dual_cndmask_b32 v11, v16, v14 :: v_dual_add_nc_u32 v10, v10, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v17, v17, v15 :: v_dual_cndmask_b32 v16, v18, v16
	v_cndmask_b32_e32 v15, v15, v13, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v14, v17, v11, s1
	v_cndmask_b32_e64 v16, v16, v17, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v11, v11, v15, s1
	v_sub_nc_u32_e32 v17, 32, v10
	v_cndmask_b32_e64 v15, v15, v12, s1
	v_cndmask_b32_e64 v16, v16, v14, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v14, v14, v11, s2
	v_cndmask_b32_e64 v11, v11, v15, s2
	v_cndmask_b32_e64 v9, v15, v9, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v18, v16, v14, v17
	v_alignbit_b32 v13, v14, v11, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v10, v18, v16, vcc_lo
	v_alignbit_b32 v16, v11, v9, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v12, v13, v14, vcc_lo
	v_bfe_u32 v13, v10, 29, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v11, v16, v11, vcc_lo
	v_alignbit_b32 v14, v10, v12, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v15, 0, v13
	v_alignbit_b32 v12, v12, v11, 30
	v_alignbit_b32 v9, v11, v9, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v14, v14, v15
	v_xor_b32_e32 v11, v12, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v9, v9, v15
	v_clz_i32_u32_e32 v16, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v16, 32, v16
	v_sub_nc_u32_e32 v12, 31, v16
	v_lshlrev_b32_e32 v18, 23, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_alignbit_b32 v14, v14, v11, v12
	v_alignbit_b32 v9, v11, v9, v12
	v_lshrrev_b32_e32 v12, 29, v10
	v_alignbit_b32 v11, v14, v9, 9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v12, 31, v12
	v_lshrrev_b32_e32 v14, 9, v14
	v_clz_i32_u32_e32 v15, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v17, 0.5, v12
	v_min_u32_e32 v15, 32, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v17, v17, v18
	v_sub_nc_u32_e32 v19, 31, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v9, v11, v9, v19
	v_or_b32_e32 v11, v14, v17
	v_add_lshl_u32 v14, v15, v16, 23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v9, 9, v9
	v_mul_f32_e32 v15, 0x3fc90fda, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v9, v9, v14
	v_fma_f32 v14, 0x3fc90fda, v11, -v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v9, 0x33000000, v9
	v_fmamk_f32 v11, v11, 0x33a22168, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v9, v9, v12
	v_fmac_f32_e32 v11, 0x3fc90fda, v9
	v_lshrrev_b32_e32 v10, 30, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_add_f32 v9, v15, v11 :: v_dual_add_nc_u32 v10, v13, v10
.LBB0_9:                                ; %Flow227
	s_and_not1_saveexec_b32 s1, s4
; %bb.10:
	v_mul_f32_e64 v9, 0x3f22f983, |v7|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v10, v9
	v_fma_f32 v9, 0xbfc90fda, v10, |v7|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v9, v10, 0xb3a22168, v9
	v_fmamk_f32 v9, v10, 0xa7c234c4, v9
	v_cvt_i32_f32_e32 v10, v10
; %bb.11:                               ; %_ZL3cosf.exit153
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr11
	s_and_saveexec_b32 s1, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s1
	s_cbranch_execz .LBB0_13
; %bb.12:
	s_mov_b32 s1, 0x7fffff
	v_mov_b32_e32 v13, 0
	v_and_or_b32 v21, v8, s1, 0x800000
	v_lshrrev_b32_e32 v18, 23, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[11:12], null, 0xfe5163ab, v21, 0
	v_add_nc_u32_e32 v19, 0xffffff88, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_u32_e32 vcc_lo, 63, v19
	v_mad_u64_u32 v[14:15], null, 0x3c439041, v21, v[12:13]
	v_cndmask_b32_e64 v20, 0, 0xffffffc0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v12, v15
	v_add_nc_u32_e32 v20, v20, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[15:16], null, 0xdb629599, v21, v[12:13]
	v_cmp_lt_u32_e64 s1, 31, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v22, 0, 0xffffffe0, s1
	v_dual_mov_b32 v12, v16 :: v_dual_cndmask_b32 v11, v15, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v22, v22, v20
	v_mad_u64_u32 v[16:17], null, 0xf534ddc0, v21, v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s2, 31, v22
	v_mov_b32_e32 v12, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v14, v16, v14, vcc_lo
	v_mad_u64_u32 v[17:18], null, 0xfc2757d1, v21, v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v11, v14, v11, s1
	v_mov_b32_e32 v12, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[18:19], null, 0x4e441529, v21, v[12:13]
	v_mov_b32_e32 v12, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[19:20], null, 0xa2f9836e, v21, v[12:13]
	v_cndmask_b32_e64 v12, 0, 0xffffffe0, s2
	v_dual_cndmask_b32 v13, v18, v16 :: v_dual_add_nc_u32 v12, v12, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v19, v19, v17 :: v_dual_cndmask_b32 v18, v20, v18
	v_cndmask_b32_e32 v17, v17, v15, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v16, v19, v13, s1
	v_cndmask_b32_e64 v18, v18, v19, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v13, v13, v17, s1
	v_sub_nc_u32_e32 v19, 32, v12
	v_cndmask_b32_e64 v17, v17, v14, s1
	v_cndmask_b32_e64 v18, v18, v16, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v16, v16, v13, s2
	v_cndmask_b32_e64 v13, v13, v17, s2
	v_cndmask_b32_e64 v11, v17, v11, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v20, v18, v16, v19
	v_alignbit_b32 v15, v16, v13, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v12, v20, v18, vcc_lo
	v_alignbit_b32 v18, v13, v11, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v14, v15, v16, vcc_lo
	v_bfe_u32 v15, v12, 29, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v13, v18, v13, vcc_lo
	v_alignbit_b32 v16, v12, v14, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v17, 0, v15
	v_alignbit_b32 v14, v14, v13, 30
	v_alignbit_b32 v11, v13, v11, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v16, v16, v17
	v_xor_b32_e32 v13, v14, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v11, v11, v17
	v_clz_i32_u32_e32 v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v18, 32, v18
	v_sub_nc_u32_e32 v14, 31, v18
	v_lshlrev_b32_e32 v20, 23, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_alignbit_b32 v16, v16, v13, v14
	v_alignbit_b32 v11, v13, v11, v14
	v_lshrrev_b32_e32 v14, 29, v12
	v_alignbit_b32 v13, v16, v11, 9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v14, 31, v14
	v_lshrrev_b32_e32 v16, 9, v16
	v_clz_i32_u32_e32 v17, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v19, 0.5, v14
	v_min_u32_e32 v17, 32, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v19, v19, v20
	v_sub_nc_u32_e32 v21, 31, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v11, v13, v11, v21
	v_or_b32_e32 v13, v16, v19
	v_add_lshl_u32 v16, v17, v18, 23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v11, 9, v11
	v_mul_f32_e32 v17, 0x3fc90fda, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v11, v11, v16
	v_fma_f32 v16, 0x3fc90fda, v13, -v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, 0x33000000, v11
	v_fmamk_f32 v13, v13, 0x33a22168, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v11, v11, v14
	v_fmac_f32_e32 v13, 0x3fc90fda, v11
	v_lshrrev_b32_e32 v12, 30, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_add_f32 v11, v17, v13 :: v_dual_add_nc_u32 v12, v15, v12
.LBB0_13:                               ; %Flow
	s_and_not1_saveexec_b32 s1, s3
; %bb.14:
	v_mul_f32_e64 v11, 0x3f22f983, |v7|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v12, v11
	v_fma_f32 v11, 0xbfc90fda, v12, |v7|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v11, v12, 0xb3a22168, v11
	v_fmamk_f32 v11, v12, 0xa7c234c4, v11
	v_cvt_i32_f32_e32 v12, v12
; %bb.15:                               ; %_ZL3sinf.exit
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mul_f32 v13, v9, v9 :: v_dual_lshlrev_b32 v14, 30, v10
	s_mov_b32 s2, 0xb94c1982
	s_mov_b32 s1, 0x37d75334
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_dual_mul_f32 v15, v2, v2 :: v_dual_fmaak_f32 v16, s1, v13, 0xbab64f3b
	v_dual_fmaak_f32 v17, s2, v13, 0x3c0881c4 :: v_dual_and_b32 v10, 1, v10
	v_xor_b32_e32 v8, v8, v7
	v_mul_f32_e32 v20, v11, v11
	s_delay_alu instid0(VALU_DEP_4)
	v_fmaak_f32 v19, s2, v15, 0x3c0881c4
	v_dual_fmaak_f32 v16, v13, v16, 0x3d2aabf7 :: v_dual_lshlrev_b32 v21, 30, v3
	v_fmaak_f32 v17, v13, v17, 0xbe2aaa9d
	v_fmaak_f32 v18, s1, v15, 0xbab64f3b
	v_fmaak_f32 v22, s2, v20, 0x3c0881c4
	v_fmaak_f32 v19, v15, v19, 0xbe2aaa9d
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_mul_f32 v17, v13, v17 :: v_dual_and_b32 v14, 0x80000000, v14
	v_dual_fmaak_f32 v18, v15, v18, 0x3d2aabf7 :: v_dual_and_b32 v3, 1, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v19, v15, v19
	v_fmaak_f32 v23, s1, v20, 0xbab64f3b
	v_and_b32_e32 v21, 0x80000000, v21
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v2, v2, v19
	v_fmaak_f32 v19, v20, v23, 0x3d2aabf7
	v_fmaak_f32 v18, v15, v18, 0xbf000004
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f32 v15, v15, v18, 1.0
	v_fmaak_f32 v18, v20, v22, 0xbe2aaa9d
	v_fmaak_f32 v16, v13, v16, 0xbf000004
	v_cndmask_b32_e64 v2, -v2, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v3, v20, v18
	v_fmaak_f32 v15, v20, v19, 0xbf000004
	v_fma_f32 v13, v13, v16, 1.0
	v_cmp_eq_u32_e32 vcc_lo, 0, v10
	v_xor_b32_e32 v2, v21, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v2
	v_cndmask_b32_e64 v2, 0x7fc00000, v2, s0
	v_fmac_f32_e32 v11, v11, v3
	v_fma_f32 v3, v20, v15, 1.0
	v_and_b32_e32 v15, 1, v12
	v_dual_fmac_f32 v9, v9, v17 :: v_dual_lshlrev_b32 v12, 30, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v10, 0x80000000, v12
	v_cndmask_b32_e64 v9, -v9, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v15
	v_xor_b32_e32 v9, v14, v9
	v_cndmask_b32_e32 v3, v3, v11, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v7, 0x1f8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_xor3_b32 v3, v8, v10, v3
	v_mul_f32_e32 v8, v2, v5
	v_dual_fmac_f32 v8, 0, v4 :: v_dual_cndmask_b32 v7, 0x7fc00000, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v9, 0, v5 :: v_dual_sub_f32 v8, v8, v0
	v_fma_f32 v9, v2, v4, -v9
	v_cndmask_b32_e32 v3, 0x7fc00000, v3, vcc_lo
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v6, v9, v6
	v_mul_f32_e32 v10, v3, v5
	v_mul_f32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_fma_f32 v4, v7, v4, -v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v3, v7, v5
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_sub_f32 v2, v6, v4 :: v_dual_sub_f32 v3, v8, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8GoertzeliP15HIP_vector_typeIfLj2EES1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8GoertzeliP15HIP_vector_typeIfLj2EES1_, .Lfunc_end0-_Z8GoertzeliP15HIP_vector_typeIfLj2EES1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4192
; NumSgprs: 18
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8GoertzeliP15HIP_vector_typeIfLj2EES1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8GoertzeliP15HIP_vector_typeIfLj2EES1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     24
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
