// Multiple GPU version of cuFFT_check that uses multiple GPU's
// This program creates a real-valued 3D function sin(x)*cos(y)*cos(z) and then 
// takes the forward and inverse Fourier Transform, with the necessary scaling included. 
// The output of this process should match the input function

// includes, system
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <math.h>
#include <complex.h>

// includes, project
#include <cuda_runtime.h>
#include <device_launch_parameters.h>

#define NX 512
#define NY 512
#define NZ 512
#define NZ2 (NZ/2+1)
#define NN (NX*NY*NZ)
#define L (2*M_PI)
#define TX 8
#define TY 8
#define TZ 8

int divUp(int a, int b) { return (a + b - 1) / b; }

__device__
int idxClip(int idx, int idxMax){
    return idx > (idxMax - 1) ? (idxMax - 1) : (idx < 0 ? 0 : idx);
}

__device__
int flatten(int col, int row, int stack, int width, int height, int depth){
    return idxClip(stack, depth) + idxClip(row, height)*depth + idxClip(col, width)*depth*height;
    // Note: using column-major indexing format
}

__global__ 
void initialize(double *f1, double *f2)
{
    const int i = blockIdx.x * blockDim.x + threadIdx.x;
    const int j = blockIdx.y * blockDim.y + threadIdx.y;
    const int k = blockIdx.z * blockDim.z + threadIdx.z;
    // if ((i >= NX) || (j >= NY) || (k >= NZ)) return;
    const int idx = flatten(i, j, k, NX, NY, NZ);

    // Initialize array
    f1[idx] = 0.5+0.5;
    f2[idx] = 2.5*2.0;

    return;
}

void initialize_singleGPU(double *f1, double *f2)
{
    // Launch CUDA kernel to initialize velocity field
    const dim3 blockSize(TX, TY, TZ);
    const dim3 gridSize(divUp(NX, TX), divUp(NY, TY), divUp(NZ, TZ));

    initialize<<<gridSize, blockSize>>>(f1, f2);

    return;
}

void initialize_multiGPU(const int GPUnum, double *f1, double *f2)
{
    int i, idx, NX_per_GPU;
    // Split data according to number of GPUs
    NX_per_GPU = NX/GPUnum;              // This is not a good solution long-term; needs more work for arbitrary grid sizes/nGPUs
    printf("   The number of divisions in the X-direction is %d\n", NX_per_GPU);

    // Launch CUDA kernel to initialize velocity field
    const dim3 blockSize(TX, TY, TZ);
    const dim3 gridSize(divUp(NX_per_GPU, TX), divUp(NY, TY), divUp(NZ, TZ));

    for (i = 0; i<GPUnum; ++i){
        cudaSetDevice(i);
        idx = i*NX_per_GPU*NY*NZ;                // sets the index value of the data to send to each gpu
        initialize<<<gridSize, blockSize>>>(&f1[idx], &f2[idx]);
    }

    return;
}

int main (void)
{
    int i, j, k, idx;

    // Declare variables
    double *u;
    double *u_fft;

    // Allocate memory for arrays
    cudaMallocManaged(&u, sizeof(double)*NN );
    cudaMallocManaged(&u_fft, sizeof(double)*NN );

    // Perform kernel calculation using only one GPU first:
    cudaSetDevice(0);

    initialize_singleGPU(u, u_fft);

    cudaDeviceSynchronize();

    double result1 = 0.0;
    for (i = 0; i < NX; ++i ){
        for (j = 0; j<NY; ++j){
            for (k = 0; k<NZ; ++k){
                idx = k + j*NZ + i*NY*NZ;
                result1 += u[idx] + u_fft[idx];
            }
        }
    }

    // Set GPU's to use and list device properties
    int nGPUs = 2, deviceNum[nGPUs];
    for(i = 0; i<nGPUs; ++i)
    {
        deviceNum[i] = i;

        cudaSetDevice(deviceNum[i]);

        cudaDeviceProp prop;
        cudaGetDeviceProperties(&prop, deviceNum[i]);
        printf("  Device name: %s\n", prop.name);
        printf("  Memory Clock Rate (KHz): %d\n",
           prop.memoryClockRate);
        printf("  Memory Bus Width (bits): %d\n",
           prop.memoryBusWidth);
        printf("  Peak Memory Bandwidth (GB/s): %f\n\n",
            2.0*prop.memoryClockRate*(prop.memoryBusWidth/8)/1.0e6);
    }

    initialize_multiGPU(nGPUs, u, u_fft);

    // Synchronize both GPUs in order to print reports
    for (i = 0; i<nGPUs; ++i){
        cudaSetDevice(deviceNum[i]);
        cudaDeviceSynchronize();
    }
    
    double result2 = 0.0;
    for (i = 0; i < NX; ++i ){
        for (j = 0; j<NY; ++j){
            for (k = 0; k<NZ; ++k){
                idx = k + j*NZ + i*NY*NZ;
                result2 += u[idx] + u_fft[idx];
            }
        }
    }

    printf("The value of f1 is %d, which should equal to 6*NX*NY*NZ, %d\n", (int)result1, NN + 5*NN);
    printf("The value of f2 is %d, which should equal to 6*NX*NY*NZ, %d\n", (int)result2, NN + 5*NN);

    cudaFree(u);
    cudaFree(u_fft);

    return 0;

}
	.file	"tmpxft_003a2abd_00000000-6_Multi_GPU_Test.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3944:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3944:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z5divUpii
	.type	_Z5divUpii, @function
_Z5divUpii:
.LFB3936:
	.cfi_startproc
	endbr64
	leal	-1(%rsi,%rdi), %eax
	cltd
	idivl	%esi
	ret
	.cfi_endproc
.LFE3936:
	.size	_Z5divUpii, .-_Z5divUpii
	.globl	_Z7idxClipii
	.type	_Z7idxClipii, @function
_Z7idxClipii:
.LFB3937:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3937:
	.size	_Z7idxClipii, .-_Z7idxClipii
	.globl	_Z7flatteniiiiii
	.type	_Z7flatteniiiiii, @function
_Z7flatteniiiiii:
.LFB3938:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3938:
	.size	_Z7flatteniiiiii, .-_Z7flatteniiiiii
	.globl	_Z32__device_stub__Z10initializePdS_PdS_
	.type	_Z32__device_stub__Z10initializePdS_PdS_, @function
_Z32__device_stub__Z10initializePdS_PdS_:
.LFB3966:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10initializePdS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L7:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3966:
	.size	_Z32__device_stub__Z10initializePdS_PdS_, .-_Z32__device_stub__Z10initializePdS_PdS_
	.globl	_Z10initializePdS_
	.type	_Z10initializePdS_, @function
_Z10initializePdS_:
.LFB3967:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z10initializePdS_PdS_
	.cfi_endproc
.LFE3967:
	.size	_Z10initializePdS_, .-_Z10initializePdS_
	.globl	_Z20initialize_singleGPUPdS_
	.type	_Z20initialize_singleGPUPdS_, @function
_Z20initialize_singleGPUPdS_:
.LFB3939:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xorl	%r9d, %r9d
	movq	%rsi, %rbp
	xorl	%r8d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	$8, %ecx
	movq	%rdi, %rbx
	movl	$64, %esi
	movabsq	$34359738376, %rdx
	movabsq	$274877907008, %rdi
	subq	$40, %rsp
	.cfi_def_cfa_offset 64
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z32__device_stub__Z10initializePdS_PdS_
.L13:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3939:
	.size	_Z20initialize_singleGPUPdS_, .-_Z20initialize_singleGPUPdS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"   The number of divisions in the X-direction is %d\n"
	.text
	.globl	_Z19initialize_multiGPUiPdS_
	.type	_Z19initialize_multiGPUiPdS_, @function
_Z19initialize_multiGPUiPdS_:
.LFB3940:
	.cfi_startproc
	endbr64
	movl	$512, %eax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdx, %r15
	cltd
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	leaq	.LC0(%rip), %rsi
	idivl	%edi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edi, %ebp
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	$2, %edi
	xorl	%r13d, %r13d
	xorl	%r12d, %r12d
	movl	%eax, %ebx
	movl	%eax, %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$8, %ecx
	movabsq	$34359738376, %rax
	movl	$8, 16(%rsp)
	movq	%rax, 8(%rsp)
	leal	7(%rbx), %eax
	sall	$18, %ebx
	cltd
	idivl	%ecx
	movl	%eax, 20(%rsp)
	movabsq	$274877907008, %rax
	movq	%rax, 24(%rsp)
.L17:
	cmpl	%ebp, %r12d
	jge	.L21
	movl	%r12d, %edi
	call	cudaSetDevice@PLT
	movl	16(%rsp), %ecx
	movl	28(%rsp), %esi
	xorl	%r9d, %r9d
	movq	8(%rsp), %rdx
	movq	20(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movslq	%r13d, %rdi
	salq	$3, %rdi
	leaq	(%r15,%rdi), %rsi
	addq	%r14, %rdi
	call	_Z32__device_stub__Z10initializePdS_PdS_
.L18:
	incl	%r12d
	addl	%ebx, %r13d
	jmp	.L17
.L21:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3940:
	.size	_Z19initialize_multiGPUiPdS_, .-_Z19initialize_multiGPUiPdS_
	.section	.rodata.str1.1
.LC2:
	.string	"  Device name: %s\n"
.LC3:
	.string	"  Memory Clock Rate (KHz): %d\n"
.LC4:
	.string	"  Memory Bus Width (bits): %d\n"
.LC6:
	.string	"  Peak Memory Bandwidth (GB/s): %f\n\n"
.LC7:
	.string	"The value of f1 is %d, which should equal to 6*NX*NY*NZ, %d\n"
.LC8:
	.string	"The value of f2 is %d, which should equal to 6*NX*NY*NZ, %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3941:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$1, %edx
	movl	$1073741824, %esi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$1096, %rsp
	.cfi_def_cfa_offset 1136
	movq	%fs:40, %rax
	movq	%rax, 1080(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movl	$1, %edx
	movl	$1073741824, %esi
	leaq	32(%rsp), %rdi
	call	cudaMallocManaged@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z20initialize_singleGPUPdS_
	call	cudaDeviceSynchronize@PLT
	movq	$0x000000000, (%rsp)
	movq	24(%rsp), %r8
	xorl	%eax, %eax
	movq	32(%rsp), %r9
.L23:
	leaq	0(,%rax,8), %rsi
	xorl	%ecx, %ecx
.L27:
	movq	%rsi, %rdx
	xorl	%edi, %edi
.L24:
	movsd	(%r8,%rdx), %xmm0
	addsd	(%r9,%rdx), %xmm0
	incl	%edi
	addq	$8, %rdx
	addsd	(%rsp), %xmm0
	movsd	%xmm0, (%rsp)
	cmpl	$512, %edi
	jne	.L24
	addl	$512, %ecx
	addq	$4096, %rsi
	cmpl	$262144, %ecx
	jne	.L27
	addq	$262144, %rax
	cmpq	$134217728, %rax
	jne	.L23
	xorl	%ebx, %ebx
	leaq	.LC2(%rip), %rbp
.L26:
	movl	%ebx, %edi
	leaq	48(%rsp), %r12
	movl	%ebx, 40(%rsp,%rbx,4)
	call	cudaSetDevice@PLT
	movl	%ebx, %esi
	movq	%r12, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	656(%rsp), %edx
	leaq	.LC3(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	660(%rsp), %edx
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$8, %ecx
	movl	$2, %edi
	movl	660(%rsp), %eax
	cvtsi2sdl	656(%rsp), %xmm0
	leaq	.LC6(%rip), %rsi
	cltd
	idivl	%ecx
	addsd	%xmm0, %xmm0
	cvtsi2sdl	%eax, %xmm1
	movb	$1, %al
	mulsd	%xmm1, %xmm0
	divsd	.LC5(%rip), %xmm0
	call	__printf_chk@PLT
	testq	%rbx, %rbx
	jne	.L39
	movl	$1, %ebx
	jmp	.L26
.L39:
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$2, %edi
	call	_Z19initialize_multiGPUiPdS_
	movl	40(%rsp), %edi
	call	cudaSetDevice@PLT
	call	cudaDeviceSynchronize@PLT
	movl	44(%rsp), %edi
	call	cudaSetDevice@PLT
	call	cudaDeviceSynchronize@PLT
	movq	24(%rsp), %r8
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
	movq	32(%rsp), %r9
.L28:
	leaq	0(,%rax,8), %rsi
	xorl	%ecx, %ecx
.L32:
	movq	%rsi, %rdx
	xorl	%edi, %edi
.L29:
	movsd	(%r8,%rdx), %xmm1
	addsd	(%r9,%rdx), %xmm1
	incl	%edi
	addq	$8, %rdx
	addsd	%xmm1, %xmm0
	cmpl	$512, %edi
	jne	.L29
	addl	$512, %ecx
	addq	$4096, %rsi
	cmpl	$262144, %ecx
	jne	.L32
	addq	$262144, %rax
	cmpq	$134217728, %rax
	jne	.L28
	cvttsd2sil	(%rsp), %edx
	movl	$805306368, %ecx
	leaq	.LC7(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	movsd	%xmm0, 8(%rsp)
	call	__printf_chk@PLT
	movsd	8(%rsp), %xmm0
	movl	$805306368, %ecx
	xorl	%eax, %eax
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	cvttsd2sil	%xmm0, %edx
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	1080(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$1096, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3941:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z10initializePdS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3969:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10initializePdS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3969:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// Multiple GPU version of cuFFT_check that uses multiple GPU's
// This program creates a real-valued 3D function sin(x)*cos(y)*cos(z) and then 
// takes the forward and inverse Fourier Transform, with the necessary scaling included. 
// The output of this process should match the input function

// includes, system
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <math.h>
#include <complex.h>

// includes, project
#include <hip/hip_runtime.h>


#define NX 512
#define NY 512
#define NZ 512
#define NZ2 (NZ/2+1)
#define NN (NX*NY*NZ)
#define L (2*M_PI)
#define TX 8
#define TY 8
#define TZ 8

int divUp(int a, int b) { return (a + b - 1) / b; }

__device__
int idxClip(int idx, int idxMax){
    return idx > (idxMax - 1) ? (idxMax - 1) : (idx < 0 ? 0 : idx);
}

__device__
int flatten(int col, int row, int stack, int width, int height, int depth){
    return idxClip(stack, depth) + idxClip(row, height)*depth + idxClip(col, width)*depth*height;
    // Note: using column-major indexing format
}

__global__ 
void initialize(double *f1, double *f2)
{
    const int i = blockIdx.x * blockDim.x + threadIdx.x;
    const int j = blockIdx.y * blockDim.y + threadIdx.y;
    const int k = blockIdx.z * blockDim.z + threadIdx.z;
    // if ((i >= NX) || (j >= NY) || (k >= NZ)) return;
    const int idx = flatten(i, j, k, NX, NY, NZ);

    // Initialize array
    f1[idx] = 0.5+0.5;
    f2[idx] = 2.5*2.0;

    return;
}

void initialize_singleGPU(double *f1, double *f2)
{
    // Launch CUDA kernel to initialize velocity field
    const dim3 blockSize(TX, TY, TZ);
    const dim3 gridSize(divUp(NX, TX), divUp(NY, TY), divUp(NZ, TZ));

    initialize<<<gridSize, blockSize>>>(f1, f2);

    return;
}

void initialize_multiGPU(const int GPUnum, double *f1, double *f2)
{
    int i, idx, NX_per_GPU;
    // Split data according to number of GPUs
    NX_per_GPU = NX/GPUnum;              // This is not a good solution long-term; needs more work for arbitrary grid sizes/nGPUs
    printf("   The number of divisions in the X-direction is %d\n", NX_per_GPU);

    // Launch CUDA kernel to initialize velocity field
    const dim3 blockSize(TX, TY, TZ);
    const dim3 gridSize(divUp(NX_per_GPU, TX), divUp(NY, TY), divUp(NZ, TZ));

    for (i = 0; i<GPUnum; ++i){
        hipSetDevice(i);
        idx = i*NX_per_GPU*NY*NZ;                // sets the index value of the data to send to each gpu
        initialize<<<gridSize, blockSize>>>(&f1[idx], &f2[idx]);
    }

    return;
}

int main (void)
{
    int i, j, k, idx;

    // Declare variables
    double *u;
    double *u_fft;

    // Allocate memory for arrays
    hipMallocManaged(&u, sizeof(double)*NN );
    hipMallocManaged(&u_fft, sizeof(double)*NN );

    // Perform kernel calculation using only one GPU first:
    hipSetDevice(0);

    initialize_singleGPU(u, u_fft);

    hipDeviceSynchronize();

    double result1 = 0.0;
    for (i = 0; i < NX; ++i ){
        for (j = 0; j<NY; ++j){
            for (k = 0; k<NZ; ++k){
                idx = k + j*NZ + i*NY*NZ;
                result1 += u[idx] + u_fft[idx];
            }
        }
    }

    // Set GPU's to use and list device properties
    int nGPUs = 2, deviceNum[nGPUs];
    for(i = 0; i<nGPUs; ++i)
    {
        deviceNum[i] = i;

        hipSetDevice(deviceNum[i]);

        hipDeviceProp_t prop;
        hipGetDeviceProperties(&prop, deviceNum[i]);
        printf("  Device name: %s\n", prop.name);
        printf("  Memory Clock Rate (KHz): %d\n",
           prop.memoryClockRate);
        printf("  Memory Bus Width (bits): %d\n",
           prop.memoryBusWidth);
        printf("  Peak Memory Bandwidth (GB/s): %f\n\n",
            2.0*prop.memoryClockRate*(prop.memoryBusWidth/8)/1.0e6);
    }

    initialize_multiGPU(nGPUs, u, u_fft);

    // Synchronize both GPUs in order to print reports
    for (i = 0; i<nGPUs; ++i){
        hipSetDevice(deviceNum[i]);
        hipDeviceSynchronize();
    }
    
    double result2 = 0.0;
    for (i = 0; i < NX; ++i ){
        for (j = 0; j<NY; ++j){
            for (k = 0; k<NZ; ++k){
                idx = k + j*NZ + i*NY*NZ;
                result2 += u[idx] + u_fft[idx];
            }
        }
    }

    printf("The value of f1 is %d, which should equal to 6*NX*NY*NZ, %d\n", (int)result1, NN + 5*NN);
    printf("The value of f2 is %d, which should equal to 6*NX*NY*NZ, %d\n", (int)result2, NN + 5*NN);

    hipFree(u);
    hipFree(u_fft);

    return 0;

}
	.text
	.file	"Multi_GPU_Test.hip"
	.globl	_Z5divUpii                      # -- Begin function _Z5divUpii
	.type	_Z5divUpii,@function
_Z5divUpii:                             # @_Z5divUpii
	.cfi_startproc
# %bb.0:
                                        # kill: def $esi killed $esi def $rsi
                                        # kill: def $edi killed $edi def $rdi
	leal	(%rdi,%rsi), %eax
	decl	%eax
	cltd
	idivl	%esi
	retq
.Lfunc_end0:
	.size	_Z5divUpii, .Lfunc_end0-_Z5divUpii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__initializePdS_ # -- Begin function _Z25__device_stub__initializePdS_
	.type	_Z25__device_stub__initializePdS_,@function
_Z25__device_stub__initializePdS_:      # @_Z25__device_stub__initializePdS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10initializePdS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__initializePdS_, .Lfunc_end1-_Z25__device_stub__initializePdS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z20initialize_singleGPUPdS_    # -- Begin function _Z20initialize_singleGPUPdS_
	.type	_Z20initialize_singleGPUPdS_,@function
_Z20initialize_singleGPUPdS_:           # @_Z20initialize_singleGPUPdS_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movabsq	$274877907008, %rdi             # imm = 0x4000000040
	movabsq	$34359738376, %rdx              # imm = 0x800000008
	movl	$64, %esi
	movl	$8, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB2_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB2_2:
	.cfi_def_cfa_offset 32
	movq	%r14, %rdi
	movq	%rbx, %rsi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z25__device_stub__initializePdS_ # TAILCALL
.Lfunc_end2:
	.size	_Z20initialize_singleGPUPdS_, .Lfunc_end2-_Z20initialize_singleGPUPdS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z19initialize_multiGPUiPdS_    # -- Begin function _Z19initialize_multiGPUiPdS_
	.type	_Z19initialize_multiGPUiPdS_,@function
_Z19initialize_multiGPUiPdS_:           # @_Z19initialize_multiGPUiPdS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	movl	%edi, %ebp
	xorl	%ebx, %ebx
	movl	$512, %eax                      # imm = 0x200
	xorl	%edx, %edx
	idivl	%edi
	movl	%eax, %r15d
	movl	$.L.str, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
	leal	7(%r15), %ecx
	leal	14(%r15), %eax
	testw	%cx, %cx
	cmovnsl	%ecx, %eax
	testl	%ebp, %ebp
	jle	.LBB3_5
# %bb.1:                                # %.lr.ph
	cwtl
	shrl	$3, %eax
	movswq	%ax, %rax
	movl	%eax, %r12d
	btsq	$38, %r12
	shll	$18, %r15d
	movl	%ebp, %r14d
	movabsq	$34359738376, %r13              # imm = 0x800000008
	xorl	%ebp, %ebp
.LBB3_2:                                # =>This Inner Loop Header: Depth=1
	movl	%ebp, %edi
	callq	hipSetDevice
	movq	%r12, %rdi
	movl	$64, %esi
	movq	%r13, %rdx
	movl	$8, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.3:                                #   in Loop: Header=BB3_2 Depth=1
	movslq	%ebx, %rax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,8), %rdi
	movq	16(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,8), %rsi
	callq	_Z25__device_stub__initializePdS_
.LBB3_4:                                #   in Loop: Header=BB3_2 Depth=1
	incq	%rbp
	addl	%r15d, %ebx
	cmpq	%rbp, %r14
	jne	.LBB3_2
.LBB3_5:                                # %._crit_edge
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z19initialize_multiGPUiPdS_, .Lfunc_end3-_Z19initialize_multiGPUiPdS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI4_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$1496, %rsp                     # imm = 0x5D8
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	leaq	-64(%rbp), %rbx
	movl	$1073741824, %esi               # imm = 0x40000000
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	-56(%rbp), %r14
	movl	$1073741824, %esi               # imm = 0x40000000
	movq	%r14, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	xorl	%r15d, %r15d
	xorl	%edi, %edi
	callq	hipSetDevice
	movq	(%rbx), %rdi
	movq	(%r14), %rsi
	callq	_Z20initialize_singleGPUPdS_
	callq	hipDeviceSynchronize
	movq	(%rbx), %rax
	xorpd	%xmm1, %xmm1
	movq	(%r14), %rcx
	movl	$4096, %edx                     # imm = 0x1000
	movl	$2097152, %esi                  # imm = 0x200000
.LBB4_1:                                # %.preheader53
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_2 Depth 2
                                        #       Child Loop BB4_3 Depth 3
	movq	%rax, %rdi
	movq	%rcx, %r8
	xorl	%r9d, %r9d
.LBB4_2:                                # %.preheader52
                                        #   Parent Loop BB4_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB4_3 Depth 3
	xorl	%r10d, %r10d
.LBB4_3:                                #   Parent Loop BB4_1 Depth=1
                                        #     Parent Loop BB4_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movsd	(%rdi,%r10,8), %xmm0            # xmm0 = mem[0],zero
	addsd	(%r8,%r10,8), %xmm0
	addsd	%xmm0, %xmm1
	incq	%r10
	cmpq	$512, %r10                      # imm = 0x200
	jne	.LBB4_3
# %bb.4:                                #   in Loop: Header=BB4_2 Depth=2
	incq	%r9
	addq	%rdx, %r8
	addq	%rdx, %rdi
	cmpq	$512, %r9                       # imm = 0x200
	jne	.LBB4_2
# %bb.5:                                #   in Loop: Header=BB4_1 Depth=1
	incq	%r15
	addq	%rsi, %rcx
	addq	%rsi, %rax
	cmpq	$512, %r15                      # imm = 0x200
	jne	.LBB4_1
# %bb.6:
	movsd	%xmm1, -48(%rbp)                # 8-byte Spill
	movq	%rsp, %r15
	movq	%rsp, %r12
	addq	$-16, %r12
	movq	%r12, %rsp
	movb	$1, %r13b
	xorl	%r14d, %r14d
	leaq	-1536(%rbp), %rbx
.LBB4_7:                                # =>This Inner Loop Header: Depth=1
	movl	%r14d, (%r12,%r14,4)
	movl	%r14d, %edi
	callq	hipSetDevice
	movq	%rbx, %rdi
	movl	%r14d, %esi
	callq	hipGetDevicePropertiesR0600
	movl	$.L.str.1, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	-928(%rbp), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movl	-924(%rbp), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	xorps	%xmm1, %xmm1
	cvtsi2sdl	-928(%rbp), %xmm1
	addsd	%xmm1, %xmm1
	movl	-924(%rbp), %eax
	leal	7(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$3, %ecx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ecx, %xmm0
	mulsd	%xmm1, %xmm0
	divsd	.LCPI4_0(%rip), %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	movl	$1, %r14d
	testb	$1, %r13b
	movl	$0, %r13d
	jne	.LBB4_7
# %bb.8:                                # %.preheader51.critedge
	movq	-64(%rbp), %rsi
	movq	-56(%rbp), %rdx
	movl	$2, %edi
	callq	_Z19initialize_multiGPUiPdS_
	movl	(%r12), %edi
	callq	hipSetDevice
	callq	hipDeviceSynchronize
	movl	4(%r12), %edi
	callq	hipSetDevice
	callq	hipDeviceSynchronize
	movq	-64(%rbp), %rax
	xorpd	%xmm2, %xmm2
	xorl	%ecx, %ecx
	movq	-56(%rbp), %rdx
	movl	$4096, %esi                     # imm = 0x1000
	movl	$2097152, %edi                  # imm = 0x200000
	movsd	-48(%rbp), %xmm1                # 8-byte Reload
                                        # xmm1 = mem[0],zero
.LBB4_9:                                # %.preheader50
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_10 Depth 2
                                        #       Child Loop BB4_11 Depth 3
	movq	%rax, %r8
	movq	%rdx, %r9
	xorl	%r10d, %r10d
.LBB4_10:                               # %.preheader
                                        #   Parent Loop BB4_9 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB4_11 Depth 3
	xorl	%r11d, %r11d
.LBB4_11:                               #   Parent Loop BB4_9 Depth=1
                                        #     Parent Loop BB4_10 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movsd	(%r8,%r11,8), %xmm0             # xmm0 = mem[0],zero
	addsd	(%r9,%r11,8), %xmm0
	addsd	%xmm0, %xmm2
	incq	%r11
	cmpq	$512, %r11                      # imm = 0x200
	jne	.LBB4_11
# %bb.12:                               #   in Loop: Header=BB4_10 Depth=2
	incq	%r10
	addq	%rsi, %r9
	addq	%rsi, %r8
	cmpq	$512, %r10                      # imm = 0x200
	jne	.LBB4_10
# %bb.13:                               #   in Loop: Header=BB4_9 Depth=1
	incq	%rcx
	addq	%rdi, %rdx
	addq	%rdi, %rax
	cmpq	$512, %rcx                      # imm = 0x200
	jne	.LBB4_9
# %bb.14:
	cvttsd2si	%xmm1, %esi
	movl	$.L.str.5, %edi
	movl	$805306368, %edx                # imm = 0x30000000
	xorl	%eax, %eax
	movsd	%xmm2, -48(%rbp)                # 8-byte Spill
	callq	printf
	cvttsd2si	-48(%rbp), %esi         # 8-byte Folded Reload
	movl	$.L.str.6, %edi
	movl	$805306368, %edx                # imm = 0x30000000
	xorl	%eax, %eax
	callq	printf
	movq	-64(%rbp), %rdi
	callq	hipFree
	movq	-56(%rbp), %rdi
	callq	hipFree
	movq	%r15, %rsp
	xorl	%eax, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10initializePdS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10initializePdS_,@object      # @_Z10initializePdS_
	.section	.rodata,"a",@progbits
	.globl	_Z10initializePdS_
	.p2align	3, 0x0
_Z10initializePdS_:
	.quad	_Z25__device_stub__initializePdS_
	.size	_Z10initializePdS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"   The number of divisions in the X-direction is %d\n"
	.size	.L.str, 53

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"  Device name: %s\n"
	.size	.L.str.1, 19

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"  Memory Clock Rate (KHz): %d\n"
	.size	.L.str.2, 31

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"  Memory Bus Width (bits): %d\n"
	.size	.L.str.3, 31

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"  Peak Memory Bandwidth (GB/s): %f\n\n"
	.size	.L.str.4, 37

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"The value of f1 is %d, which should equal to 6*NX*NY*NZ, %d\n"
	.size	.L.str.5, 61

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"The value of f2 is %d, which should equal to 6*NX*NY*NZ, %d\n"
	.size	.L.str.6, 61

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10initializePdS_"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__initializePdS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10initializePdS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10initializePdS_      ; -- Begin function _Z10initializePdS_
	.globl	_Z10initializePdS_
	.p2align	8
	.type	_Z10initializePdS_,@function
_Z10initializePdS_:                     ; @_Z10initializePdS_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x1c
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[3:4], null, s14, s4, v[2:3]
	v_mad_u64_u32 v[4:5], null, s13, s2, v[1:2]
	s_and_b32 s2, s3, 0xffff
	v_mov_b32_e32 v5, 0x3ff00000
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_med3_i32 v0, v3, 0, 0x1ff
	s_load_b128 s[0:3], s[0:1], 0x0
	v_med3_i32 v2, v4, 0, 0x1ff
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b32_e32 v0, 9, v0
	v_med3_i32 v3, v1, 0, 0x1ff
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v2, 18, v2
	v_dual_mov_b32 v7, 0x40140000 :: v_dual_mov_b32 v4, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_or3_b32 v0, v3, v0, v2
	v_mov_b32_e32 v6, v1
	v_lshlrev_b64 v[2:3], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_store_b64 v[0:1], v[4:5], off
	global_store_b64 v[2:3], v[6:7], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10initializePdS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10initializePdS_, .Lfunc_end0-_Z10initializePdS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 252
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10initializePdS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10initializePdS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
