/*
    Authors: Erkin Verbeek, Prabhat Bhootra
    Date: 12/2/2019

 *     *** with 3 x 3 patch ***
 *
	M = 10000
	N = 10000
	The elapsed time: 71.6 ms

    M = 30000
	N = 10000
	The elapsed time: 215.1 ms
	
	M = 20000
	N = 20000
	The elapsed time: 227.6 ms
	
 *     *** with 7 x 7 patch ***
 
	M = 10000
	N = 10000
	The elapsed time: 225.5 ms

	M = 30000
	N = 10000
	The elapsed time: 766.0 ms
 
	M = 20000
	N = 20000
	The elapsed time: 964.6 ms
	
	
*/
 
#include <stdio.h>
#include <stdlib.h>
#include <time.h>

#define MAX_VAL 255 // the max value for each pixel 
#define M 10000
#define N 10000

__global__ void blurKernel(unsigned char * in_img,
		unsigned char * out_img, int patchWidth) {
	
	int Col = blockIdx.x*blockDim.x + threadIdx.x;
	int Row = blockIdx.y*blockDim.y + threadIdx.y;
	
	if (Col < N && Row < M) {
		int pixVal = 0;
		int pixels = 0;
	
	
		for (int blurRow = -patchWidth; blurRow < patchWidth + 1; blurRow++) {
			for (int blurCol = -patchWidth; blurCol < patchWidth + 1; blurCol++) {
				int curRow = Row + blurRow;
				int curCol = Col + blurCol;
			
				if (curRow > -1 && curRow < M && curCol > -1 && curCol < N) {
					pixVal += in_img[curRow*N + curCol];
					pixels++;
				}
			}
		}
		out_img[Row*N + Col] = (unsigned char) (pixVal/pixels);
	}
	
}


int main(int argc, char* argv[]) {
	int i;
	unsigned char * img;	// original IMG
	unsigned char * dev_img;	// original IMG
	unsigned char * dev_newImg;	// new IMG
	int size = M * N * sizeof(unsigned char);
	
	// dimensions of the grid and the block
	dim3 DimGrid((N-1)/16 + 1, (M-1)/16+1, 1);
	dim3 DimBlock(16, 16, 1);
	
	// allocates memory on device
	cudaMalloc((void **)&dev_img, size);	// device space for original img
	cudaMalloc((void **)&dev_newImg, size);	// device space for new img
	
	// allocate memory on host
	img = (unsigned char * ) malloc(size);
	
	srand(time(0)); // seed the random number generator
  
  	// we iterate through img and fill with random values
  	for (i = 0; i < M * N; i++) {
		img[i] = rand() % (MAX_VAL + 1);
		//printf("img[%d] = %d\n", i, img[i]);
  	}
  	printf("M = %d\nN = %d\n", M, N);
	
	cudaMemcpy(dev_img, img, size, cudaMemcpyHostToDevice);	// copy image from host to device
	
	float elapsedTime;		// timing stuff
	cudaEvent_t start,end;
	cudaEventCreate(&start);
	cudaEventCreate(&end);
	cudaEventRecord(start,0);
	
	//launch dot() kernel with 1 block and N threads
	blurKernel<<<DimGrid, DimBlock>>>(dev_img, dev_newImg, 3);
	
	cudaEventRecord(end, 0);	// stop timer
	cudaEventSynchronize(end);
	cudaEventElapsedTime(&elapsedTime,start,end);
	
	// copy device result back to the host copy of c
	
	cudaMemcpy(img, dev_newImg, size, cudaMemcpyDeviceToHost);	// copy new image back to host
	
	/*
	// write out new image so we can see if we did anything
  	for (i = 0; i < M * N; i++)
    	printf("newImg[%d] = %d\n", i, img[i]);
	*/
	
	// print elapsed time
	printf("The elapsed time: %3.1f ms\n", elapsedTime);
	cudaEventDestroy(start);
	cudaEventDestroy(end);
	
	// free up heap space variables
	free(img);
	cudaFree(dev_img);
	cudaFree(dev_newImg);
	return 0;
}





	.file	"tmpxft_00282867_00000000-6_blur.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z33__device_stub__Z10blurKernelPhS_iPhS_i
	.type	_Z33__device_stub__Z10blurKernelPhS_iPhS_i, @function
_Z33__device_stub__Z10blurKernelPhS_iPhS_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10blurKernelPhS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z33__device_stub__Z10blurKernelPhS_iPhS_i, .-_Z33__device_stub__Z10blurKernelPhS_iPhS_i
	.globl	_Z10blurKernelPhS_i
	.type	_Z10blurKernelPhS_i, @function
_Z10blurKernelPhS_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z10blurKernelPhS_iPhS_i
	.cfi_endproc
.LFE2053:
	.size	_Z10blurKernelPhS_i, .-_Z10blurKernelPhS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"M = %d\nN = %d\n"
.LC1:
	.string	"The elapsed time: %3.1f ms\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$100000000, %esi
	movl	$256, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$80, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$2684354560625, %rax
	leaq	16(%rsp), %rdi
	movl	$1, 56(%rsp)
	movl	$1, 68(%rsp)
	movq	%rax, 48(%rsp)
	movabsq	$68719476752, %rax
	movq	%rax, 60(%rsp)
	call	cudaMalloc@PLT
	movl	$100000000, %esi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$100000000, %edi
	call	malloc@PLT
	xorl	%edi, %edi
	movq	%rax, %rbx
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L9:
	call	rand@PLT
	cltd
	idivl	%r12d
	movb	%dl, (%rbx,%rbp)
	incq	%rbp
	cmpq	$100000000, %rbp
	jne	.L9
	movl	$10000, %ecx
	movl	$10000, %edx
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$100000000, %edx
	call	cudaMemcpy@PLT
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$3, %edx
	call	_Z33__device_stub__Z10blurKernelPhS_iPhS_i
.L10:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	12(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$100000000, %edx
	call	cudaMemcpy@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	12(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	32(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	40(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$80, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z10blurKernelPhS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10blurKernelPhS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
    Authors: Erkin Verbeek, Prabhat Bhootra
    Date: 12/2/2019

 *     *** with 3 x 3 patch ***
 *
	M = 10000
	N = 10000
	The elapsed time: 71.6 ms

    M = 30000
	N = 10000
	The elapsed time: 215.1 ms
	
	M = 20000
	N = 20000
	The elapsed time: 227.6 ms
	
 *     *** with 7 x 7 patch ***
 
	M = 10000
	N = 10000
	The elapsed time: 225.5 ms

	M = 30000
	N = 10000
	The elapsed time: 766.0 ms
 
	M = 20000
	N = 20000
	The elapsed time: 964.6 ms
	
	
*/
 

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>

#define MAX_VAL 255 // the max value for each pixel 
#define M 10000
#define N 10000

__global__ void blurKernel(unsigned char * in_img,
		unsigned char * out_img, int patchWidth) {
	
	int Col = blockIdx.x*blockDim.x + threadIdx.x;
	int Row = blockIdx.y*blockDim.y + threadIdx.y;
	
	if (Col < N && Row < M) {
		int pixVal = 0;
		int pixels = 0;
	
	
		for (int blurRow = -patchWidth; blurRow < patchWidth + 1; blurRow++) {
			for (int blurCol = -patchWidth; blurCol < patchWidth + 1; blurCol++) {
				int curRow = Row + blurRow;
				int curCol = Col + blurCol;
			
				if (curRow > -1 && curRow < M && curCol > -1 && curCol < N) {
					pixVal += in_img[curRow*N + curCol];
					pixels++;
				}
			}
		}
		out_img[Row*N + Col] = (unsigned char) (pixVal/pixels);
	}
	
}


int main(int argc, char* argv[]) {
	int i;
	unsigned char * img;	// original IMG
	unsigned char * dev_img;	// original IMG
	unsigned char * dev_newImg;	// new IMG
	int size = M * N * sizeof(unsigned char);
	
	// dimensions of the grid and the block
	dim3 DimGrid((N-1)/16 + 1, (M-1)/16+1, 1);
	dim3 DimBlock(16, 16, 1);
	
	// allocates memory on device
	hipMalloc((void **)&dev_img, size);	// device space for original img
	hipMalloc((void **)&dev_newImg, size);	// device space for new img
	
	// allocate memory on host
	img = (unsigned char * ) malloc(size);
	
	srand(time(0)); // seed the random number generator
  
  	// we iterate through img and fill with random values
  	for (i = 0; i < M * N; i++) {
		img[i] = rand() % (MAX_VAL + 1);
		//printf("img[%d] = %d\n", i, img[i]);
  	}
  	printf("M = %d\nN = %d\n", M, N);
	
	hipMemcpy(dev_img, img, size, hipMemcpyHostToDevice);	// copy image from host to device
	
	float elapsedTime;		// timing stuff
	hipEvent_t start,end;
	hipEventCreate(&start);
	hipEventCreate(&end);
	hipEventRecord(start,0);
	
	//launch dot() kernel with 1 block and N threads
	blurKernel<<<DimGrid, DimBlock>>>(dev_img, dev_newImg, 3);
	
	hipEventRecord(end, 0);	// stop timer
	hipEventSynchronize(end);
	hipEventElapsedTime(&elapsedTime,start,end);
	
	// copy device result back to the host copy of c
	
	hipMemcpy(img, dev_newImg, size, hipMemcpyDeviceToHost);	// copy new image back to host
	
	/*
	// write out new image so we can see if we did anything
  	for (i = 0; i < M * N; i++)
    	printf("newImg[%d] = %d\n", i, img[i]);
	*/
	
	// print elapsed time
	printf("The elapsed time: %3.1f ms\n", elapsedTime);
	hipEventDestroy(start);
	hipEventDestroy(end);
	
	// free up heap space variables
	free(img);
	hipFree(dev_img);
	hipFree(dev_newImg);
	return 0;
}





	.text
	.file	"blur.hip"
	.globl	_Z25__device_stub__blurKernelPhS_i # -- Begin function _Z25__device_stub__blurKernelPhS_i
	.type	_Z25__device_stub__blurKernelPhS_i,@function
_Z25__device_stub__blurKernelPhS_i:     # @_Z25__device_stub__blurKernelPhS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10blurKernelPhS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__blurKernelPhS_i, .Lfunc_end0-_Z25__device_stub__blurKernelPhS_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$40, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	16(%rsp), %rdi
	movl	$100000000, %esi                # imm = 0x5F5E100
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$100000000, %esi                # imm = 0x5F5E100
	callq	hipMalloc
	movl	$100000000, %edi                # imm = 0x5F5E100
	callq	malloc
	movq	%rax, %rbx
	xorl	%r14d, %r14d
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	movb	%al, (%rbx,%r14)
	incq	%r14
	cmpq	$100000000, %r14                # imm = 0x5F5E100
	jne	.LBB1_1
# %bb.2:
	movl	$.L.str, %edi
	movl	$10000, %esi                    # imm = 0x2710
	movl	$10000, %edx                    # imm = 0x2710
	xorl	%eax, %eax
	callq	printf
	movq	16(%rsp), %rdi
	movl	$100000000, %edx                # imm = 0x5F5E100
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$2684354560625, %rdi            # imm = 0x27100000271
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$3, %edx
	callq	_Z25__device_stub__blurKernelPhS_i
.LBB1_4:
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	24(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	36(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	movq	8(%rsp), %rsi
	movl	$100000000, %edx                # imm = 0x5F5E100
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movq	24(%rsp), %rdi
	callq	hipEventDestroy
	movq	(%rsp), %rdi
	callq	hipEventDestroy
	movq	%rbx, %rdi
	callq	free
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10blurKernelPhS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10blurKernelPhS_i,@object     # @_Z10blurKernelPhS_i
	.section	.rodata,"a",@progbits
	.globl	_Z10blurKernelPhS_i
	.p2align	3, 0x0
_Z10blurKernelPhS_i:
	.quad	_Z25__device_stub__blurKernelPhS_i
	.size	_Z10blurKernelPhS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"M = %d\nN = %d\n"
	.size	.L.str, 15

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"The elapsed time: %3.1f ms\n"
	.size	.L.str.1, 28

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10blurKernelPhS_i"
	.size	.L__unnamed_1, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__blurKernelPhS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10blurKernelPhS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10blurKernelPhS_i     ; -- Begin function _Z10blurKernelPhS_i
	.globl	_Z10blurKernelPhS_i
	.p2align	8
	.type	_Z10blurKernelPhS_i,@function
_Z10blurKernelPhS_i:                    ; @_Z10blurKernelPhS_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e32 0x2710, v2
	s_cbranch_execz .LBB0_12
; %bb.1:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 0
	s_cbranch_scc1 .LBB0_9
; %bb.2:                                ; %.preheader.preheader
	v_mad_u64_u32 v[3:4], null, 0x2710, v1, v[0:1]
	s_mul_i32 s0, s2, 0x2711
	v_subrev_nc_u32_e32 v4, s2, v0
	v_mov_b32_e32 v2, 0
	s_sub_i32 s8, 0, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_subrev_nc_u32_e32 v5, s0, v3
	v_mov_b32_e32 v3, 0
	s_lshl_b32 s0, s2, 1
	s_or_b32 s3, s0, 1
.LBB0_3:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	v_dual_mov_b32 v6, v4 :: v_dual_add_nc_u32 v7, s8, v1
	s_mov_b32 s9, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, 0x2710, v7
	v_mov_b32_e32 v7, v5
.LBB0_4:                                ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e64 s0, -1, v6
	v_cmp_gt_i32_e64 s1, 0x2710, v6
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=2
	global_load_u8 v8, v7, s[4:5]
	v_add_nc_u32_e32 v3, 1, v3
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v2, v8
.LBB0_6:                                ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v7, 1, v7
	v_add_nc_u32_e32 v6, 1, v6
	s_add_i32 s9, s9, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s9, 0
	s_cbranch_scc0 .LBB0_4
; %bb.7:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_add_nc_u32_e32 v5, 0x2710, v5
	s_add_i32 s0, s8, 1
	s_cmp_eq_u32 s8, s2
	s_cbranch_scc1 .LBB0_10
; %bb.8:                                ;   in Loop: Header=BB0_3 Depth=1
	s_mov_b32 s8, s0
	s_branch .LBB0_3
.LBB0_9:
                                        ; implicit-def: $vgpr2
	s_branch .LBB0_11
.LBB0_10:                               ; %._crit_edge57.loopexit
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v7, 31, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v3, v4
	v_add_nc_u32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v3, v3, v4
	v_xor_b32_e32 v4, v7, v4
	v_xor_b32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v5, v3
	v_sub_nc_u32_e32 v6, 0, v3
	v_rcp_iflag_f32_e32 v5, v5
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v5, 0x4f7ffffe, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v5, v5
	v_mul_lo_u32 v6, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v6, v5, v6
	v_add_nc_u32_e32 v5, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v2, v5
	v_mul_lo_u32 v6, v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v6
	v_add_nc_u32_e32 v6, 1, v5
	v_sub_nc_u32_e32 v8, v2, v3
	v_cmp_ge_u32_e32 vcc_lo, v2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v2, v2, v8 :: v_dual_cndmask_b32 v5, v5, v6
	v_cmp_ge_u32_e32 vcc_lo, v2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, 1, v5
	v_cndmask_b32_e32 v2, v5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v4
	v_sub_nc_u32_e32 v2, v2, v4
.LBB0_11:                               ; %._crit_edge57
	v_mad_u64_u32 v[3:4], null, 0x2710, v1, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v3
	v_add_co_u32 v0, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b8 v[0:1], v2, off
.LBB0_12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10blurKernelPhS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10blurKernelPhS_i, .Lfunc_end0-_Z10blurKernelPhS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 552
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10blurKernelPhS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10blurKernelPhS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
