#include<bits/stdc++.h>

using namespace std;

#define BLOCK_SIZE 16

__global__ void matrix_multiplication(int *dev_a, int *dev_b, int *dev_c, int n){
    __shared__ int tile_a[BLOCK_SIZE][BLOCK_SIZE];
    __shared__ int tile_b[BLOCK_SIZE][BLOCK_SIZE];

    int row = blockIdx.y*BLOCK_SIZE + threadIdx.y;
    int col = blockIdx.x*BLOCK_SIZE + threadIdx.x;
    int temp = 0;
    int idx;

    for (int i=0; i<gridDim.x; ++i){
        idx = row*n + i*BLOCK_SIZE + threadIdx.x;
        if (idx >= n*n){
            tile_a[threadIdx.y][threadIdx.x] = 0;
        }
        else{
            tile_a[threadIdx.y][threadIdx.x] = dev_a[idx];
        }

        idx = (i*BLOCK_SIZE + threadIdx.y)*n + col;
        if (idx >= n*n){
            tile_b[threadIdx.y][threadIdx.x] = 0;
        }
        else{
            tile_b[threadIdx.y][threadIdx.x] = dev_b[idx];
        }
        __syncthreads();

        for (int j=0; j<BLOCK_SIZE; ++j){
            temp += tile_a[threadIdx.y][j]*tile_b[j][threadIdx.x];
        }
        __syncthreads();
    }
    if (row<n && col<n){
        dev_c[row*n+col] = temp;
    }
}

int main(int argc, char const *argv[]){
    int n;
    srand(1);
    int *a, *b, *c;
    n=10000;
    cudaMallocHost((void **) &a, sizeof(int)*n*n);
    cudaMallocHost((void **) &b, sizeof(int)*n*n);
    cudaMallocHost((void **) &c, sizeof(int)*n*n);

    for (int i = 0; i < n; ++i) {
        for (int j = 0; j < n; ++j) {
            a[i * n + j] = rand() % n;
            b[i * n + j] = rand() % n;
        }
    }

    float time_taken;
    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);

    cudaEventRecord(start,0);

    int *dev_a, *dev_b, *dev_c;
    cudaMalloc((void **) &dev_a, sizeof(int)*n*n);
    cudaMalloc((void **) &dev_b, sizeof(int)*n*n);
    cudaMalloc((void **) &dev_c, sizeof(int)*n*n);

    cudaMemcpy(dev_a, a, sizeof(int)*n*n, cudaMemcpyHostToDevice);
    cudaMemcpy(dev_b, b, sizeof(int)*n*n, cudaMemcpyHostToDevice);

    unsigned int grid_rows = (n+BLOCK_SIZE-1)/BLOCK_SIZE;
    unsigned int grid_cols = (n+BLOCK_SIZE-1)/BLOCK_SIZE;

    dim3 dimGrid(grid_cols, grid_rows);
    dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);

    matrix_multiplication<<<dimGrid, dimBlock>>>(dev_a, dev_b, dev_c, n);

    cudaMemcpy(c, dev_c, sizeof(int)*n*n, cudaMemcpyDeviceToHost);
    cudaThreadSynchronize();
    cudaEventRecord(stop, 0);
    cudaEventSynchronize(stop);
    cudaEventElapsedTime(&time_taken, start, stop);

    printf("Time elapsed in matrix multiplication on GPU: %f ms.\n",time_taken);

    cudaFreeHost(a);
    cudaFreeHost(b);
    cudaFreeHost(c);
    cudaFree(dev_a);
    cudaFree(dev_b);
    cudaFree(dev_c);
    return 0;
}
	.file	"tmpxft_0035e273_00000000-6_que1.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB10828:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE10828:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z46__device_stub__Z21matrix_multiplicationPiS_S_iPiS_S_i
	.type	_Z46__device_stub__Z21matrix_multiplicationPiS_S_iPiS_S_i, @function
_Z46__device_stub__Z21matrix_multiplicationPiS_S_iPiS_S_i:
.LFB10850:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z21matrix_multiplicationPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10850:
	.size	_Z46__device_stub__Z21matrix_multiplicationPiS_S_iPiS_S_i, .-_Z46__device_stub__Z21matrix_multiplicationPiS_S_iPiS_S_i
	.globl	_Z21matrix_multiplicationPiS_S_i
	.type	_Z21matrix_multiplicationPiS_S_i, @function
_Z21matrix_multiplicationPiS_S_i:
.LFB10851:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z21matrix_multiplicationPiS_S_iPiS_S_i
	.cfi_endproc
.LFE10851:
	.size	_Z21matrix_multiplicationPiS_S_i, .-_Z21matrix_multiplicationPiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Time elapsed in matrix multiplication on GPU: %f ms.\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB10825:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$1, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	$10000, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$120, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	srand@PLT
	leaq	16(%rsp), %rdi
	movl	$400000000, %esi
	call	cudaMallocHost@PLT
	leaq	24(%rsp), %rdi
	movl	$400000000, %esi
	call	cudaMallocHost@PLT
	leaq	32(%rsp), %rdi
	movl	$400000000, %esi
	call	cudaMallocHost@PLT
.L9:
	xorl	%ebx, %ebx
.L10:
	call	rand@PLT
	leaq	0(%rbp,%rbx,4), %r13
	incq	%rbx
	cltd
	idivl	%r12d
	movq	16(%rsp), %rax
	movl	%edx, (%rax,%r13)
	call	rand@PLT
	cltd
	idivl	%r12d
	movq	24(%rsp), %rax
	movl	%edx, (%rax,%r13)
	cmpq	$10000, %rbx
	jne	.L10
	addq	$40000, %rbp
	cmpq	$400000000, %rbp
	jne	.L9
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	leaq	56(%rsp), %rdi
	movl	$400000000, %esi
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movl	$400000000, %esi
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movl	$400000000, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rsi
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movl	$400000000, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rsi
	movq	64(%rsp), %rdi
	movl	$1, %ecx
	movl	$400000000, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	movabsq	$2684354560625, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$10000, %ecx
	movq	56(%rsp), %rdi
	call	_Z46__device_stub__Z21matrix_multiplicationPiS_S_iPiS_S_i
.L12:
	movq	72(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$2, %ecx
	movl	$400000000, %edx
	call	cudaMemcpy@PLT
	call	cudaThreadSynchronize@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	48(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	leaq	12(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	12(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	24(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	32(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$120, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10825:
	.size	main, .-main
	.section	.rodata.str1.1
.LC1:
	.string	"_Z21matrix_multiplicationPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB10853:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z21matrix_multiplicationPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE10853:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<bits/stdc++.h>

using namespace std;

#define BLOCK_SIZE 16

__global__ void matrix_multiplication(int *dev_a, int *dev_b, int *dev_c, int n){
    __shared__ int tile_a[BLOCK_SIZE][BLOCK_SIZE];
    __shared__ int tile_b[BLOCK_SIZE][BLOCK_SIZE];

    int row = blockIdx.y*BLOCK_SIZE + threadIdx.y;
    int col = blockIdx.x*BLOCK_SIZE + threadIdx.x;
    int temp = 0;
    int idx;

    for (int i=0; i<gridDim.x; ++i){
        idx = row*n + i*BLOCK_SIZE + threadIdx.x;
        if (idx >= n*n){
            tile_a[threadIdx.y][threadIdx.x] = 0;
        }
        else{
            tile_a[threadIdx.y][threadIdx.x] = dev_a[idx];
        }

        idx = (i*BLOCK_SIZE + threadIdx.y)*n + col;
        if (idx >= n*n){
            tile_b[threadIdx.y][threadIdx.x] = 0;
        }
        else{
            tile_b[threadIdx.y][threadIdx.x] = dev_b[idx];
        }
        __syncthreads();

        for (int j=0; j<BLOCK_SIZE; ++j){
            temp += tile_a[threadIdx.y][j]*tile_b[j][threadIdx.x];
        }
        __syncthreads();
    }
    if (row<n && col<n){
        dev_c[row*n+col] = temp;
    }
}

int main(int argc, char const *argv[]){
    int n;
    srand(1);
    int *a, *b, *c;
    n=10000;
    hipHostMalloc((void **) &a, sizeof(int)*n*n, hipHostMallocDefault);
    hipHostMalloc((void **) &b, sizeof(int)*n*n, hipHostMallocDefault);
    hipHostMalloc((void **) &c, sizeof(int)*n*n, hipHostMallocDefault);

    for (int i = 0; i < n; ++i) {
        for (int j = 0; j < n; ++j) {
            a[i * n + j] = rand() % n;
            b[i * n + j] = rand() % n;
        }
    }

    float time_taken;
    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);

    hipEventRecord(start,0);

    int *dev_a, *dev_b, *dev_c;
    hipMalloc((void **) &dev_a, sizeof(int)*n*n);
    hipMalloc((void **) &dev_b, sizeof(int)*n*n);
    hipMalloc((void **) &dev_c, sizeof(int)*n*n);

    hipMemcpy(dev_a, a, sizeof(int)*n*n, hipMemcpyHostToDevice);
    hipMemcpy(dev_b, b, sizeof(int)*n*n, hipMemcpyHostToDevice);

    unsigned int grid_rows = (n+BLOCK_SIZE-1)/BLOCK_SIZE;
    unsigned int grid_cols = (n+BLOCK_SIZE-1)/BLOCK_SIZE;

    dim3 dimGrid(grid_cols, grid_rows);
    dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);

    matrix_multiplication<<<dimGrid, dimBlock>>>(dev_a, dev_b, dev_c, n);

    hipMemcpy(c, dev_c, sizeof(int)*n*n, hipMemcpyDeviceToHost);
    hipDeviceSynchronize();
    hipEventRecord(stop, 0);
    hipEventSynchronize(stop);
    hipEventElapsedTime(&time_taken, start, stop);

    printf("Time elapsed in matrix multiplication on GPU: %f ms.\n",time_taken);

    hipHostFree(a);
    hipHostFree(b);
    hipHostFree(c);
    hipFree(dev_a);
    hipFree(dev_b);
    hipFree(dev_c);
    return 0;
}
	.text
	.file	"que1.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z36__device_stub__matrix_multiplicationPiS_S_i # -- Begin function _Z36__device_stub__matrix_multiplicationPiS_S_i
	.type	_Z36__device_stub__matrix_multiplicationPiS_S_i,@function
_Z36__device_stub__matrix_multiplicationPiS_S_i: # @_Z36__device_stub__matrix_multiplicationPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21matrix_multiplicationPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z36__device_stub__matrix_multiplicationPiS_S_i, .Lfunc_end0-_Z36__device_stub__matrix_multiplicationPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$1, %edi
	callq	srand
	leaq	24(%rsp), %rdi
	xorl	%ebx, %ebx
	movl	$400000000, %esi                # imm = 0x17D78400
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	16(%rsp), %rdi
	movl	$400000000, %esi                # imm = 0x17D78400
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	48(%rsp), %rdi
	movl	$400000000, %esi                # imm = 0x17D78400
	xorl	%edx, %edx
	callq	hipHostMalloc
	xorl	%r14d, %r14d
.LBB1_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	movl	$10000, %r15d                   # imm = 0x2710
	movq	%rbx, %r12
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1759218605, %rax, %rcx         # imm = 0x68DB8BAD
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$44, %rcx
	addl	%edx, %ecx
	imull	$10000, %ecx, %ecx              # imm = 0x2710
	subl	%ecx, %eax
	movq	24(%rsp), %rcx
	movl	%eax, (%rcx,%r12)
	callq	rand
	cltq
	imulq	$1759218605, %rax, %rcx         # imm = 0x68DB8BAD
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$44, %rcx
	addl	%edx, %ecx
	imull	$10000, %ecx, %ecx              # imm = 0x2710
	subl	%ecx, %eax
	movq	16(%rsp), %rcx
	movl	%eax, (%rcx,%r12)
	addq	$4, %r12
	decq	%r15
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%r14
	addq	$40000, %rbx                    # imm = 0x9C40
	cmpq	$10000, %r14                    # imm = 0x2710
	jne	.LBB1_1
# %bb.4:
	leaq	56(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	40(%rsp), %rbx
	movl	$400000000, %esi                # imm = 0x17D78400
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	32(%rsp), %r14
	movl	$400000000, %esi                # imm = 0x17D78400
	movq	%r14, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$400000000, %esi                # imm = 0x17D78400
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	24(%rsp), %rsi
	movl	$400000000, %edx                # imm = 0x17D78400
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movq	16(%rsp), %rsi
	movl	$400000000, %edx                # imm = 0x17D78400
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$2684354560625, %rdi            # imm = 0x27100000271
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	$10000, %ecx                    # imm = 0x2710
	callq	_Z36__device_stub__matrix_multiplicationPiS_S_i
.LBB1_6:
	movq	48(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$400000000, %edx                # imm = 0x17D78400
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	56(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	68(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movq	24(%rsp), %rdi
	callq	hipHostFree
	movq	16(%rsp), %rdi
	callq	hipHostFree
	movq	48(%rsp), %rdi
	callq	hipHostFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21matrix_multiplicationPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z21matrix_multiplicationPiS_S_i,@object # @_Z21matrix_multiplicationPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z21matrix_multiplicationPiS_S_i
	.p2align	3, 0x0
_Z21matrix_multiplicationPiS_S_i:
	.quad	_Z36__device_stub__matrix_multiplicationPiS_S_i
	.size	_Z21matrix_multiplicationPiS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Time elapsed in matrix multiplication on GPU: %f ms.\n"
	.size	.L.str, 54

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z21matrix_multiplicationPiS_S_i"
	.size	.L__unnamed_1, 33

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z36__device_stub__matrix_multiplicationPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z21matrix_multiplicationPiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z21matrix_multiplicationPiS_S_i ; -- Begin function _Z21matrix_multiplicationPiS_S_i
	.globl	_Z21matrix_multiplicationPiS_S_i
	.p2align	8
	.type	_Z21matrix_multiplicationPiS_S_i,@function
_Z21matrix_multiplicationPiS_S_i:       ; @_Z21matrix_multiplicationPiS_S_i
; %bb.0:
	s_clause 0x3
	s_load_b32 s3, s[0:1], 0x20
	s_load_b32 s2, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_bfe_u32 v6, v0, 10, 10
	v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v4, 0x3ff, v0
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v5, s15, 4, v6
	v_lshl_add_u32 v0, s14, 4, v4
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB0_9
; %bb.1:                                ; %.lr.ph
	v_lshlrev_b32_e32 v1, 2, v4
	v_lshlrev_b32_e32 v7, 6, v6
	v_mad_u64_u32 v[2:3], null, v5, s2, v[4:5]
	s_mul_i32 s9, s2, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v8, 0x400, v1
	v_add_nc_u32_e32 v9, v7, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v10, v8, v7
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_7 Depth 2
	s_lshl_b32 s10, s8, 4
	v_mov_b32_e32 v11, 0
	v_add_nc_u32_e32 v3, s10, v2
	s_mov_b32 s11, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s9, v3
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v11, v[3:4], off
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v12, s10, v6
	s_mov_b32 s10, exec_lo
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v11
	v_mad_u64_u32 v[3:4], null, v12, s2, v[0:1]
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_i32_e64 s9, v3
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v4, v[3:4], off
.LBB0_6:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	v_mov_b32_e32 v3, v8
	s_mov_b32 s10, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_7:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v4, s10, v7
	s_add_i32 s10, s10, 4
	ds_load_b32 v13, v3
	ds_load_b32 v4, v4
	v_add_nc_u32_e32 v3, 64, v3
	s_cmp_eq_u32 s10, 64
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[11:12], null, v13, v4, v[1:2]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v1, v11
	s_cbranch_scc0 .LBB0_7
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s8, s3
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
.LBB0_9:                                ; %Flow63
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v5, v0
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_i32_e64 s2, v2
	s_cbranch_execz .LBB0_11
; %bb.10:
	v_mad_u64_u32 v[2:3], null, v5, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_store_b32 v[2:3], v1, off
.LBB0_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21matrix_multiplicationPiS_S_i
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z21matrix_multiplicationPiS_S_i, .Lfunc_end0-_Z21matrix_multiplicationPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 512
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21matrix_multiplicationPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z21matrix_multiplicationPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
