/*
 * sgemm.cu:
 *
 */

#include <stdio.h>
#include <sys/time.h>
#include <cuda_runtime.h>

enum {
    BLOCK_SIZE = 32,
    N = 1024
};

__global__ void sgemm_naive(const float *a, const float *b, float *c, int n)
{
    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;  

    if (row < n && col < n) {
        float s = 0.0;
        for (int k = 0; k < n; k++)
            s += a[row * n + k] * b[k * n + col];
        c[row * n + col] = s;
    }
}

__global__ void sgemm_tailed(const float *a, const float *b, float *c, int n)
{
    __shared__ float as[BLOCK_SIZE][BLOCK_SIZE];
    __shared__ float bs[BLOCK_SIZE][BLOCK_SIZE];
    
    int tail_size = blockDim.x;
    int tx = threadIdx.x;
    int ty = threadIdx.y;
    int bx = blockIdx.x;
    int by = blockIdx.y;

    // Result for c[i, j]
    float sum = 0.0;

    // Index of first tail (sub-matrix) in A 
    int Astart = by * n * tail_size;
    int Aend = Astart + n - 1;
    int Astep = tail_size;
    
    // Index of first tail (sub-matrix) in B
    int Bstart = bx * tail_size;    
    int Bstep = n * tail_size;
    
    int ai = Astart;
    int bi = Bstart;
    while (ai <= Aend) {
        // Load tail to shared memory - each thread load one item
        as[ty][tx] = a[ai + ty * n + tx];
        bs[ty][tx] = b[bi + ty * n + tx];
                
        // Wait all threads
        __syncthreads();   
        
        // Compute partial result        
        for (int k = 0; k < tail_size; k++)
            sum += as[ty][k] * bs[k][tx];            

        // Wait for all threads before overwriting of as and bs
        __syncthreads();   
                             
        ai += Astep;
        bi += Bstep;
    }
    
    int Cstart = by * n * tail_size + bx * tail_size;
    c[Cstart + ty * n + tx] = sum;
}

void sgemm_host(float *a, float *b, float *c, int n)
{
    for (int i = 0; i < n; i++) {
        for (int j = 0; j < n; j++) {
            float s = 0.0;
            for (int k = 0; k < n; k++)
                s += a[i * n + k] * b[k * n + j];
            c[i * n + j] = s;
        }            
    }
}

double wtime()
{
    struct timeval t;
    gettimeofday(&t, NULL);
    return (double)t.tv_sec + (double)t.tv_usec * 1E-6;
}

int main()
{
    double tcpu, tgpu, tmem;
    cudaError_t err;
    
    /* Allocate memory on host */
    size_t size = sizeof(float) * N * N;
    float *h_A = (float *)malloc(size);
    float *h_B = (float *)malloc(size);
    float *h_C = (float *)malloc(size);
    if (h_A == NULL || h_B == NULL || h_C == NULL) {
        fprintf(stderr, "Allocation error.\n");
        exit(EXIT_FAILURE);
    }

    for (int i = 0; i < N; i++) {
        for (int j = 0; j < N; j++) {
            h_A[i * N + j] = 2.0;
            h_B[i * N + j] = 3.0;
        }            
    }
    
    tcpu = -wtime();
    sgemm_host(h_A, h_B, h_C, N);
    tcpu += wtime();

    // Verify that the result vector is correct
    for (int i = 0; i < N; i++) {
        for (int j = 0; j < N; j++) {
            if (fabs(6.0 * N - h_C[i * N + j]) > 1e-5) {
                fprintf(stderr, "CPU results verification failed at element %d %d!\n", i, j);
                exit(EXIT_FAILURE);
            }
        }
    }
    
    /* Allocate vectors on device */
    float *d_A = NULL, *d_B = NULL,  *d_C = NULL;
    if (cudaMalloc((void **)&d_A, size) != cudaSuccess) {
        fprintf(stderr, "Allocation error\n");
        exit(EXIT_FAILURE);
    }
    if (cudaMalloc((void **)&d_B, size) != cudaSuccess) {
        fprintf(stderr, "Allocation error\n");
        exit(EXIT_FAILURE);
    }
    if (cudaMalloc((void **)&d_C, size) != cudaSuccess) {
        fprintf(stderr, "Allocation error\n");
        exit(EXIT_FAILURE);
    }

    /* Copy the host vectors to device */
    tmem = -wtime();
    if (cudaMemcpy(d_A, h_A, size, cudaMemcpyHostToDevice) != cudaSuccess) {
        fprintf(stderr, "Host to device copying failed\n");
        exit(EXIT_FAILURE);        
    }
    if (cudaMemcpy(d_B, h_B, size, cudaMemcpyHostToDevice) != cudaSuccess) {
        fprintf(stderr, "Host to device copying failed\n");
        exit(EXIT_FAILURE);        
    }
    tmem += wtime();
    
    /* Launch the kernel */
    int threadsPerBlockDim = BLOCK_SIZE;
    dim3 blockDim(threadsPerBlockDim, threadsPerBlockDim, 1);    
    int blocksPerGridDimX = ceilf(N / (float)threadsPerBlockDim);
    int blocksPerGridDimY = ceilf(N / (float)threadsPerBlockDim);
    dim3 gridDim(blocksPerGridDimX, blocksPerGridDimY, 1);
    printf("CUDA kernel launch with %d (%d %d) blocks of %d (%d %d) threads\n", 
           blocksPerGridDimX * blocksPerGridDimY, blocksPerGridDimX, blocksPerGridDimY,
           threadsPerBlockDim * threadsPerBlockDim, threadsPerBlockDim, threadsPerBlockDim);
    tgpu = -wtime();
    //sgemm_naive<<<gridDim, blockDim>>>(d_A, d_B, d_C, N);
    sgemm_tailed<<<gridDim, blockDim>>>(d_A, d_B, d_C, N);
    cudaDeviceSynchronize();
    tgpu += wtime();
    
    if ( (err = cudaGetLastError()) != cudaSuccess) {
        fprintf(stderr, "Failed to launch kernel (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    /* Copy the device vectors to host */
    tmem -= wtime();
    if (cudaMemcpy(h_C, d_C, size, cudaMemcpyDeviceToHost) != cudaSuccess) {
        fprintf(stderr, "Device to host copying failed\n");
        exit(EXIT_FAILURE);
    }
    tmem += wtime();

    // Verify that the result vector is correct
    for (int i = 0; i < N; i++) {
        for (int j = 0; j < N; j++) {
            if (fabs(6.0 * N - h_C[i * N + j]) > 1e-5) {
                fprintf(stderr, "GPU results verification failed at element %d %d!\n", i, j);
                exit(EXIT_FAILURE);
            }
        }
    }
    
    printf("CPU version (sec.): %.6f\n", tcpu);
    printf("GPU version (sec.): %.6f\n", tgpu);
    printf("Memory ops. (sec.): %.6f\n", tmem);
    printf("Memory bw. (MiB/sec.): %.2f\n", ((3 * size) >> 20) / tmem);
    printf("CPU GFLOPS: %.2f\n", 2.0 * N * N * N * 1.0E-9F / tcpu);
    printf("GPU GFLOPS: %.2f\n", 2.0 * N * N * N * 1.0E-9F / tgpu);
    printf("Speedup: %.2f\n", tcpu / tgpu);
    printf("Speedup (with mem ops.): %.2f\n", tcpu / (tgpu + tmem));

    cudaFree(d_A);
    cudaFree(d_B);
    cudaFree(d_C);

    free(h_A);
    free(h_B);
    free(h_C);

    cudaDeviceReset();
    return 0;
}


	.file	"tmpxft_001fd5fe_00000000-6_sgemm.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10sgemm_hostPfS_S_i
	.type	_Z10sgemm_hostPfS_S_i, @function
_Z10sgemm_hostPfS_S_i:
.LFB2027:
	.cfi_startproc
	endbr64
	movq	%rdi, %r10
	xorl	%r9d, %r9d
	movslq	%ecx, %rdi
	movq	%rsi, %r11
	salq	$2, %rdi
	xorl	%esi, %esi
	cmpl	%ecx, %r9d
	jl	.L11
	ret
.L11:
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
.L7:
	xorl	%eax, %eax
	leaq	(%r10,%rsi), %rbp
	leaq	(%rdx,%rsi), %r12
.L6:
	leaq	(%r11,%rax,4), %rbx
	xorl	%r8d, %r8d
	xorps	%xmm0, %xmm0
.L4:
	movss	0(%rbp,%r8,4), %xmm1
	mulss	(%rbx), %xmm1
	incq	%r8
	addq	%rdi, %rbx
	addss	%xmm1, %xmm0
	cmpl	%r8d, %ecx
	jg	.L4
	movss	%xmm0, (%r12,%rax,4)
	incq	%rax
	cmpl	%eax, %ecx
	jg	.L6
	incl	%r9d
	addq	%rdi, %rsi
	cmpl	%ecx, %r9d
	jl	.L7
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z10sgemm_hostPfS_S_i, .-_Z10sgemm_hostPfS_S_i
	.globl	_Z5wtimev
	.type	_Z5wtimev, @function
_Z5wtimev:
.LFB2028:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	xorl	%esi, %esi
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC1(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z5wtimev, .-_Z5wtimev
	.globl	_Z38__device_stub__Z11sgemm_naivePKfS0_PfiPKfS0_Pfi
	.type	_Z38__device_stub__Z11sgemm_naivePKfS0_PfiPKfS0_Pfi, @function
_Z38__device_stub__Z11sgemm_naivePKfS0_PfiPKfS0_Pfi:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11sgemm_naivePKfS0_Pfi(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L16:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z38__device_stub__Z11sgemm_naivePKfS0_PfiPKfS0_Pfi, .-_Z38__device_stub__Z11sgemm_naivePKfS0_PfiPKfS0_Pfi
	.globl	_Z11sgemm_naivePKfS0_Pfi
	.type	_Z11sgemm_naivePKfS0_Pfi, @function
_Z11sgemm_naivePKfS0_Pfi:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z11sgemm_naivePKfS0_PfiPKfS0_Pfi
	.cfi_endproc
.LFE2055:
	.size	_Z11sgemm_naivePKfS0_Pfi, .-_Z11sgemm_naivePKfS0_Pfi
	.globl	_Z39__device_stub__Z12sgemm_tailedPKfS0_PfiPKfS0_Pfi
	.type	_Z39__device_stub__Z12sgemm_tailedPKfS0_PfiPKfS0_Pfi, @function
_Z39__device_stub__Z12sgemm_tailedPKfS0_PfiPKfS0_Pfi:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12sgemm_tailedPKfS0_Pfi(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L21:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z39__device_stub__Z12sgemm_tailedPKfS0_PfiPKfS0_Pfi, .-_Z39__device_stub__Z12sgemm_tailedPKfS0_PfiPKfS0_Pfi
	.globl	_Z12sgemm_tailedPKfS0_Pfi
	.type	_Z12sgemm_tailedPKfS0_Pfi, @function
_Z12sgemm_tailedPKfS0_Pfi:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z12sgemm_tailedPKfS0_PfiPKfS0_Pfi
	.cfi_endproc
.LFE2057:
	.size	_Z12sgemm_tailedPKfS0_Pfi, .-_Z12sgemm_tailedPKfS0_Pfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Allocation error.\n"
.LC8:
	.string	"CPU results verification failed at element %d %d!\n"
.LC9:
	.string	"Allocation error\n"
.LC10:
	.string	"Host to device copying failed\n"
.LC11:
	.string	"CUDA kernel launch with %d (%d %d) blocks of %d (%d %d) threads\n"
.LC12:
	.string	"Failed to launch kernel (error code %s)!\n"
.LC13:
	.string	"Device to host copying failed\n"
.LC14:
	.string	"GPU results verification failed at element %d %d!\n"
.LC15:
	.string	"CPU version (sec.): %.6f\n"
.LC16:
	.string	"GPU version (sec.): %.6f\n"
.LC17:
	.string	"Memory ops. (sec.): %.6f\n"
.LC19:
	.string	"Memory bw. (MiB/sec.): %.2f\n"
.LC21:
	.string	"CPU GFLOPS: %.2f\n"
.LC22:
	.string	"GPU GFLOPS: %.2f\n"
.LC23:
	.string	"Speedup: %.2f\n"
.LC24:
	.string	"Speedup (with mem ops.): %.2f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$4194304, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	testq	%r12, %r12
	movq	%rax, %rbx
	sete	%al
	testq	%rbp, %rbp
	sete	%dl
	orb	%dl, %al
	jne	.L51
	xorl	%edx, %edx
	testq	%rbx, %rbx
	je	.L51
	movss	.LC3(%rip), %xmm0
	movss	.LC4(%rip), %xmm1
	jmp	.L27
.L51:
	leaq	.LC2(%rip), %rdx
	jmp	.L63
.L27:
	movq	%rdx, %rax
	xorl	%ecx, %ecx
.L29:
	incl	%ecx
	movss	%xmm0, (%r12,%rax)
	movss	%xmm1, 0(%rbp,%rax)
	addq	$4, %rax
	cmpl	$1024, %ecx
	jne	.L29
	addq	$4096, %rdx
	cmpq	$4194304, %rdx
	jne	.L27
	call	_Z5wtimev
	movl	$1024, %ecx
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	movq	%r12, %rdi
	movsd	%xmm0, 8(%rsp)
	movq	%rbx, %r13
	call	_Z10sgemm_hostPfS_S_i
	call	_Z5wtimev
	movq	%rbx, %rax
	xorl	%ecx, %ecx
	movq	%xmm0, %r14
.L31:
	xorl	%r8d, %r8d
.L34:
	movsd	.LC5(%rip), %xmm0
	cvtss2sd	(%rax,%r8,4), %xmm1
	subsd	%xmm1, %xmm0
	andps	.LC6(%rip), %xmm0
	comisd	.LC7(%rip), %xmm0
	jbe	.L58
	leaq	.LC8(%rip), %rdx
.L62:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L61:
	movl	$1, %edi
	call	exit@PLT
.L58:
	incq	%r8
	cmpq	$1024, %r8
	jne	.L34
	incl	%ecx
	addq	$4096, %rax
	cmpl	$1024, %ecx
	jne	.L31
	xorl	%ecx, %ecx
	leaq	56(%rsp), %rdi
	movl	$4194304, %esi
	movq	%rcx, 56(%rsp)
	movq	%rcx, 64(%rsp)
	movq	%rcx, 72(%rsp)
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L36
.L64:
	leaq	.LC9(%rip), %rdx
.L63:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L61
.L36:
	leaq	64(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	jne	.L64
	leaq	72(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	jne	.L64
	call	_Z5wtimev
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$4194304, %edx
	movsd	%xmm0, 24(%rsp)
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	jne	.L65
	movq	64(%rsp), %rdi
	movl	$1, %ecx
	movl	$4194304, %edx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L40
.L65:
	leaq	.LC10(%rip), %rdx
	jmp	.L63
.L40:
	call	_Z5wtimev
	movl	$1024, %r9d
	movl	$32, %ecx
	movabsq	$137438953504, %rax
	movq	%rax, 80(%rsp)
	movl	$32, %r8d
	movl	$1024, %edx
	leaq	.LC11(%rip), %rsi
	movq	%rax, 92(%rsp)
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%xmm0, %r15
	movl	$1, 88(%rsp)
	movl	$1, 100(%rsp)
	pushq	$32
	.cfi_def_cfa_offset 184
	pushq	$32
	.cfi_def_cfa_offset 192
	call	__printf_chk@PLT
	call	_Z5wtimev
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movsd	%xmm0, 32(%rsp)
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
	movl	88(%rsp), %ecx
	movq	80(%rsp), %rdx
	movq	92(%rsp), %rdi
	movl	100(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$1024, %ecx
	movq	56(%rsp), %rdi
	call	_Z39__device_stub__Z12sgemm_tailedPKfS0_PfiPKfS0_Pfi
.L41:
	call	cudaDeviceSynchronize@PLT
	call	_Z5wtimev
	movsd	%xmm0, 32(%rsp)
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L42
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L61
.L42:
	call	_Z5wtimev
	movq	72(%rsp), %rsi
	movl	$4194304, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	movsd	%xmm0, 40(%rsp)
	call	cudaMemcpy@PLT
	leaq	.LC13(%rip), %rdx
	testl	%eax, %eax
	jne	.L63
	call	_Z5wtimev
	xorl	%ecx, %ecx
.L44:
	xorl	%r8d, %r8d
.L47:
	movsd	.LC5(%rip), %xmm1
	cvtss2sd	0(%r13,%r8,4), %xmm2
	subsd	%xmm2, %xmm1
	andps	.LC6(%rip), %xmm1
	comisd	.LC7(%rip), %xmm1
	jbe	.L59
	leaq	.LC14(%rip), %rdx
	jmp	.L62
.L59:
	incq	%r8
	cmpq	$1024, %r8
	jne	.L47
	incl	%ecx
	addq	$4096, %r13
	cmpl	$1024, %ecx
	jne	.L44
	movq	%r15, %xmm1
	subsd	24(%rsp), %xmm1
	movb	$1, %al
	movsd	32(%rsp), %xmm4
	subsd	40(%rsp), %xmm1
	movq	%r14, %xmm3
	subsd	8(%rsp), %xmm3
	movl	$2, %edi
	subsd	16(%rsp), %xmm4
	leaq	.LC15(%rip), %rsi
	addsd	%xmm0, %xmm1
	movaps	%xmm3, %xmm0
	movsd	%xmm3, 8(%rsp)
	movsd	%xmm4, 16(%rsp)
	movsd	%xmm1, 24(%rsp)
	call	__printf_chk@PLT
	movsd	16(%rsp), %xmm0
	leaq	.LC16(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movsd	24(%rsp), %xmm0
	leaq	.LC17(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC19(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	movsd	.LC18(%rip), %xmm0
	divsd	24(%rsp), %xmm0
	call	__printf_chk@PLT
	leaq	.LC21(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	movsd	.LC20(%rip), %xmm0
	divsd	8(%rsp), %xmm0
	call	__printf_chk@PLT
	leaq	.LC22(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	movsd	.LC20(%rip), %xmm0
	divsd	16(%rsp), %xmm0
	call	__printf_chk@PLT
	leaq	.LC23(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movsd	8(%rsp), %xmm0
	divsd	16(%rsp), %xmm0
	call	__printf_chk@PLT
	movsd	16(%rsp), %xmm1
	addsd	24(%rsp), %xmm1
	movb	$1, %al
	movsd	8(%rsp), %xmm0
	leaq	.LC24(%rip), %rsi
	movl	$2, %edi
	divsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	call	cudaDeviceReset@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L49
	call	__stack_chk_fail@PLT
.L49:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC25:
	.string	"_Z12sgemm_tailedPKfS0_Pfi"
.LC26:
	.string	"_Z11sgemm_naivePKfS0_Pfi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC25(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12sgemm_tailedPKfS0_Pfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC26(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11sgemm_naivePKfS0_Pfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	-1598689907
	.long	1051772663
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC3:
	.long	1073741824
	.align 4
.LC4:
	.long	1077936128
	.section	.rodata.cst8
	.align 8
.LC5:
	.long	0
	.long	1085800448
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC6:
	.long	-1
	.long	2147483647
	.long	0
	.long	0
	.section	.rodata.cst8
	.align 8
.LC7:
	.long	-1998362383
	.long	1055193269
	.align 8
.LC18:
	.long	0
	.long	1076363264
	.align 8
.LC20:
	.long	-536870912
	.long	1073819147
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 * sgemm.cu:
 *
 */

#include <stdio.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>

enum {
    BLOCK_SIZE = 32,
    N = 1024
};

__global__ void sgemm_naive(const float *a, const float *b, float *c, int n)
{
    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;  

    if (row < n && col < n) {
        float s = 0.0;
        for (int k = 0; k < n; k++)
            s += a[row * n + k] * b[k * n + col];
        c[row * n + col] = s;
    }
}

__global__ void sgemm_tailed(const float *a, const float *b, float *c, int n)
{
    __shared__ float as[BLOCK_SIZE][BLOCK_SIZE];
    __shared__ float bs[BLOCK_SIZE][BLOCK_SIZE];
    
    int tail_size = blockDim.x;
    int tx = threadIdx.x;
    int ty = threadIdx.y;
    int bx = blockIdx.x;
    int by = blockIdx.y;

    // Result for c[i, j]
    float sum = 0.0;

    // Index of first tail (sub-matrix) in A 
    int Astart = by * n * tail_size;
    int Aend = Astart + n - 1;
    int Astep = tail_size;
    
    // Index of first tail (sub-matrix) in B
    int Bstart = bx * tail_size;    
    int Bstep = n * tail_size;
    
    int ai = Astart;
    int bi = Bstart;
    while (ai <= Aend) {
        // Load tail to shared memory - each thread load one item
        as[ty][tx] = a[ai + ty * n + tx];
        bs[ty][tx] = b[bi + ty * n + tx];
                
        // Wait all threads
        __syncthreads();   
        
        // Compute partial result        
        for (int k = 0; k < tail_size; k++)
            sum += as[ty][k] * bs[k][tx];            

        // Wait for all threads before overwriting of as and bs
        __syncthreads();   
                             
        ai += Astep;
        bi += Bstep;
    }
    
    int Cstart = by * n * tail_size + bx * tail_size;
    c[Cstart + ty * n + tx] = sum;
}

void sgemm_host(float *a, float *b, float *c, int n)
{
    for (int i = 0; i < n; i++) {
        for (int j = 0; j < n; j++) {
            float s = 0.0;
            for (int k = 0; k < n; k++)
                s += a[i * n + k] * b[k * n + j];
            c[i * n + j] = s;
        }            
    }
}

double wtime()
{
    struct timeval t;
    gettimeofday(&t, NULL);
    return (double)t.tv_sec + (double)t.tv_usec * 1E-6;
}

int main()
{
    double tcpu, tgpu, tmem;
    hipError_t err;
    
    /* Allocate memory on host */
    size_t size = sizeof(float) * N * N;
    float *h_A = (float *)malloc(size);
    float *h_B = (float *)malloc(size);
    float *h_C = (float *)malloc(size);
    if (h_A == NULL || h_B == NULL || h_C == NULL) {
        fprintf(stderr, "Allocation error.\n");
        exit(EXIT_FAILURE);
    }

    for (int i = 0; i < N; i++) {
        for (int j = 0; j < N; j++) {
            h_A[i * N + j] = 2.0;
            h_B[i * N + j] = 3.0;
        }            
    }
    
    tcpu = -wtime();
    sgemm_host(h_A, h_B, h_C, N);
    tcpu += wtime();

    // Verify that the result vector is correct
    for (int i = 0; i < N; i++) {
        for (int j = 0; j < N; j++) {
            if (fabs(6.0 * N - h_C[i * N + j]) > 1e-5) {
                fprintf(stderr, "CPU results verification failed at element %d %d!\n", i, j);
                exit(EXIT_FAILURE);
            }
        }
    }
    
    /* Allocate vectors on device */
    float *d_A = NULL, *d_B = NULL,  *d_C = NULL;
    if (hipMalloc((void **)&d_A, size) != hipSuccess) {
        fprintf(stderr, "Allocation error\n");
        exit(EXIT_FAILURE);
    }
    if (hipMalloc((void **)&d_B, size) != hipSuccess) {
        fprintf(stderr, "Allocation error\n");
        exit(EXIT_FAILURE);
    }
    if (hipMalloc((void **)&d_C, size) != hipSuccess) {
        fprintf(stderr, "Allocation error\n");
        exit(EXIT_FAILURE);
    }

    /* Copy the host vectors to device */
    tmem = -wtime();
    if (hipMemcpy(d_A, h_A, size, hipMemcpyHostToDevice) != hipSuccess) {
        fprintf(stderr, "Host to device copying failed\n");
        exit(EXIT_FAILURE);        
    }
    if (hipMemcpy(d_B, h_B, size, hipMemcpyHostToDevice) != hipSuccess) {
        fprintf(stderr, "Host to device copying failed\n");
        exit(EXIT_FAILURE);        
    }
    tmem += wtime();
    
    /* Launch the kernel */
    int threadsPerBlockDim = BLOCK_SIZE;
    dim3 blockDim(threadsPerBlockDim, threadsPerBlockDim, 1);    
    int blocksPerGridDimX = ceilf(N / (float)threadsPerBlockDim);
    int blocksPerGridDimY = ceilf(N / (float)threadsPerBlockDim);
    dim3 gridDim(blocksPerGridDimX, blocksPerGridDimY, 1);
    printf("CUDA kernel launch with %d (%d %d) blocks of %d (%d %d) threads\n", 
           blocksPerGridDimX * blocksPerGridDimY, blocksPerGridDimX, blocksPerGridDimY,
           threadsPerBlockDim * threadsPerBlockDim, threadsPerBlockDim, threadsPerBlockDim);
    tgpu = -wtime();
    //sgemm_naive<<<gridDim, blockDim>>>(d_A, d_B, d_C, N);
    sgemm_tailed<<<gridDim, blockDim>>>(d_A, d_B, d_C, N);
    hipDeviceSynchronize();
    tgpu += wtime();
    
    if ( (err = hipGetLastError()) != hipSuccess) {
        fprintf(stderr, "Failed to launch kernel (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    /* Copy the device vectors to host */
    tmem -= wtime();
    if (hipMemcpy(h_C, d_C, size, hipMemcpyDeviceToHost) != hipSuccess) {
        fprintf(stderr, "Device to host copying failed\n");
        exit(EXIT_FAILURE);
    }
    tmem += wtime();

    // Verify that the result vector is correct
    for (int i = 0; i < N; i++) {
        for (int j = 0; j < N; j++) {
            if (fabs(6.0 * N - h_C[i * N + j]) > 1e-5) {
                fprintf(stderr, "GPU results verification failed at element %d %d!\n", i, j);
                exit(EXIT_FAILURE);
            }
        }
    }
    
    printf("CPU version (sec.): %.6f\n", tcpu);
    printf("GPU version (sec.): %.6f\n", tgpu);
    printf("Memory ops. (sec.): %.6f\n", tmem);
    printf("Memory bw. (MiB/sec.): %.2f\n", ((3 * size) >> 20) / tmem);
    printf("CPU GFLOPS: %.2f\n", 2.0 * N * N * N * 1.0E-9F / tcpu);
    printf("GPU GFLOPS: %.2f\n", 2.0 * N * N * N * 1.0E-9F / tgpu);
    printf("Speedup: %.2f\n", tcpu / tgpu);
    printf("Speedup (with mem ops.): %.2f\n", tcpu / (tgpu + tmem));

    hipFree(d_A);
    hipFree(d_B);
    hipFree(d_C);

    free(h_A);
    free(h_B);
    free(h_C);

    hipDeviceReset();
    return 0;
}


	.text
	.file	"sgemm.hip"
	.globl	_Z26__device_stub__sgemm_naivePKfS0_Pfi # -- Begin function _Z26__device_stub__sgemm_naivePKfS0_Pfi
	.type	_Z26__device_stub__sgemm_naivePKfS0_Pfi,@function
_Z26__device_stub__sgemm_naivePKfS0_Pfi: # @_Z26__device_stub__sgemm_naivePKfS0_Pfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11sgemm_naivePKfS0_Pfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__sgemm_naivePKfS0_Pfi, .Lfunc_end0-_Z26__device_stub__sgemm_naivePKfS0_Pfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__sgemm_tailedPKfS0_Pfi # -- Begin function _Z27__device_stub__sgemm_tailedPKfS0_Pfi
	.type	_Z27__device_stub__sgemm_tailedPKfS0_Pfi,@function
_Z27__device_stub__sgemm_tailedPKfS0_Pfi: # @_Z27__device_stub__sgemm_tailedPKfS0_Pfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12sgemm_tailedPKfS0_Pfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z27__device_stub__sgemm_tailedPKfS0_Pfi, .Lfunc_end1-_Z27__device_stub__sgemm_tailedPKfS0_Pfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z10sgemm_hostPfS_S_i           # -- Begin function _Z10sgemm_hostPfS_S_i
	.type	_Z10sgemm_hostPfS_S_i,@function
_Z10sgemm_hostPfS_S_i:                  # @_Z10sgemm_hostPfS_S_i
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB2_8
# %bb.1:                                # %.preheader26.lr.ph
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%ecx, %eax
	leaq	(,%rax,4), %r8
	xorl	%r9d, %r9d
	xorl	%r10d, %r10d
.LBB2_2:                                # %.preheader.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_3 Depth 2
                                        #       Child Loop BB2_4 Depth 3
	movl	%r9d, %r11d
	leaq	(%rdi,%r11,4), %r11
	movq	%r10, %rbx
	imulq	%rax, %rbx
	leaq	(%rdx,%rbx,4), %rbx
	movq	%rsi, %r14
	xorl	%r15d, %r15d
.LBB2_3:                                # %.preheader
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_4 Depth 3
	xorps	%xmm0, %xmm0
	movq	%r14, %r12
	xorl	%r13d, %r13d
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        #     Parent Loop BB2_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r11,%r13,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%r12), %xmm1
	addss	%xmm1, %xmm0
	incq	%r13
	addq	%r8, %r12
	cmpq	%r13, %rax
	jne	.LBB2_4
# %bb.5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_3 Depth=2
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	addq	$4, %r14
	cmpq	%rax, %r15
	jne	.LBB2_3
# %bb.6:                                # %._crit_edge30
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%r10
	addl	%ecx, %r9d
	cmpq	%rax, %r10
	jne	.LBB2_2
# %bb.7:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
.LBB2_8:                                # %._crit_edge32
	retq
.Lfunc_end2:
	.size	_Z10sgemm_hostPfS_S_i, .Lfunc_end2-_Z10sgemm_hostPfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z5wtimev
.LCPI3_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z5wtimev
	.type	_Z5wtimev,@function
_Z5wtimev:                              # @_Z5wtimev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	cvtsi2sdq	(%rbx), %xmm1
	cvtsi2sdq	8(%rbx), %xmm0
	mulsd	.LCPI3_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z5wtimev, .Lfunc_end3-_Z5wtimev
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI4_0:
	.quad	0x40b8000000000000              # double 6144
.LCPI4_2:
	.quad	0x3ee4f8b588e368f1              # double 1.0000000000000001E-5
.LCPI4_3:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
.LCPI4_4:
	.quad	0x4028000000000000              # double 12
.LCPI4_5:
	.quad	0x40012e0be0000000              # double 2.1474835872650146
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI4_1:
	.quad	0x7fffffffffffffff              # double NaN
	.quad	0x7fffffffffffffff              # double NaN
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %rbp
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r14
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	testq	%rbp, %rbp
	je	.LBB4_38
# %bb.1:
	testq	%r14, %r14
	je	.LBB4_38
# %bb.2:
	movq	%rax, %r15
	testq	%rax, %rax
	je	.LBB4_38
# %bb.3:                                # %.preheader109.preheader
	xorl	%eax, %eax
	movl	$4096, %ecx                     # imm = 0x1000
	movq	%rbp, %rdx
	movq	%r14, %rsi
.LBB4_4:                                # %.preheader109
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_5 Depth 2
	xorl	%edi, %edi
.LBB4_5:                                #   Parent Loop BB4_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1073741824, (%rdx,%rdi,4)      # imm = 0x40000000
	movl	$1077936128, (%rsi,%rdi,4)      # imm = 0x40400000
	incq	%rdi
	cmpq	$1024, %rdi                     # imm = 0x400
	jne	.LBB4_5
# %bb.6:                                #   in Loop: Header=BB4_4 Depth=1
	incq	%rax
	addq	%rcx, %rsi
	addq	%rcx, %rdx
	cmpq	$1024, %rax                     # imm = 0x400
	jne	.LBB4_4
# %bb.7:
	xorl	%ebx, %ebx
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r12), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	8(%r12), %rax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	%rbp, %rax
.LBB4_8:                                # %.preheader.lr.ph.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_9 Depth 2
                                        #       Child Loop BB4_10 Depth 3
	movq	%rbx, %rcx
	shlq	$12, %rcx
	addq	%r15, %rcx
	movq	%r14, %rdx
	xorl	%esi, %esi
.LBB4_9:                                # %.preheader.i
                                        #   Parent Loop BB4_8 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB4_10 Depth 3
	xorps	%xmm0, %xmm0
	movq	%rdx, %rdi
	xorl	%r8d, %r8d
.LBB4_10:                               #   Parent Loop BB4_8 Depth=1
                                        #     Parent Loop BB4_9 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rax,%r8,4), %xmm1             # xmm1 = mem[0],zero,zero,zero
	mulss	(%rdi), %xmm1
	addss	%xmm1, %xmm0
	incq	%r8
	addq	$4096, %rdi                     # imm = 0x1000
	cmpq	$1024, %r8                      # imm = 0x400
	jne	.LBB4_10
# %bb.11:                               # %._crit_edge.i
                                        #   in Loop: Header=BB4_9 Depth=2
	movss	%xmm0, (%rcx,%rsi,4)
	incq	%rsi
	addq	$4, %rdx
	cmpq	$1024, %rsi                     # imm = 0x400
	jne	.LBB4_9
# %bb.12:                               # %._crit_edge30.i
                                        #   in Loop: Header=BB4_8 Depth=1
	incq	%rbx
	addq	$4096, %rax                     # imm = 0x1000
	cmpq	$1024, %rbx                     # imm = 0x400
	jne	.LBB4_8
# %bb.13:                               # %_Z10sgemm_hostPfS_S_i.exit
	xorl	%r12d, %r12d
	leaq	56(%rsp), %r13
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r13), %rbx
	movq	8(%r13), %rdx
	movsd	.LCPI4_0(%rip), %xmm2           # xmm2 = mem[0],zero
	movq	%r15, %rax
.LBB4_14:                               # %.preheader108
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_15 Depth 2
	xorl	%ecx, %ecx
.LBB4_15:                               #   Parent Loop BB4_14 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%rcx,4), %xmm0
	movapd	%xmm2, %xmm1
	subsd	%xmm0, %xmm1
	andpd	.LCPI4_1(%rip), %xmm1
	ucomisd	.LCPI4_2(%rip), %xmm1
	ja	.LBB4_33
# %bb.16:                               #   in Loop: Header=BB4_15 Depth=2
	incq	%rcx
	cmpq	$1024, %rcx                     # imm = 0x400
	jne	.LBB4_15
# %bb.17:                               #   in Loop: Header=BB4_14 Depth=1
	incq	%r12
	addq	$4096, %rax                     # imm = 0x1000
	cmpq	$1024, %r12                     # imm = 0x400
	jne	.LBB4_14
# %bb.18:
	movq	%rdx, 8(%rsp)                   # 8-byte Spill
	xorl	%eax, %eax
	leaq	48(%rsp), %rdi
	movq	%rax, (%rdi)
	movq	%rax, 40(%rsp)
	movq	%rax, 32(%rsp)
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_36
# %bb.19:
	leaq	40(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_36
# %bb.20:
	leaq	32(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_36
# %bb.21:
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r12), %rax
	movq	%rax, 144(%rsp)                 # 8-byte Spill
	movq	8(%r12), %r12
	movq	48(%rsp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_37
# %bb.22:
	movq	%r12, 136(%rsp)                 # 8-byte Spill
	movq	40(%rsp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_37
# %bb.23:
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r12), %rax
	movq	%rax, 112(%rsp)                 # 8-byte Spill
	movq	8(%r12), %rax
	movq	%rax, 104(%rsp)                 # 8-byte Spill
	movl	$32, (%rsp)
	movl	$.L.str.4, %edi
	movl	$1024, %esi                     # imm = 0x400
	movl	$32, %edx
	movl	$32, %ecx
	movl	$1024, %r8d                     # imm = 0x400
	movl	$32, %r9d
	xorl	%eax, %eax
	callq	printf
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r12), %rax
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	movq	8(%r12), %rax
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	movabsq	$137438953504, %rdi             # imm = 0x2000000020
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_25
# %bb.24:
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdx
	movl	$1024, %ecx                     # imm = 0x400
	callq	_Z27__device_stub__sgemm_tailedPKfS0_Pfi
.LBB4_25:
	movq	%rbx, 120(%rsp)                 # 8-byte Spill
	movq	%rbp, 128(%rsp)                 # 8-byte Spill
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r12), %rax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movq	8(%r12), %rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB4_39
# %bb.26:
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r12), %rbp
	movq	8(%r12), %rbx
	movq	32(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_40
# %bb.27:
	xorl	%r12d, %r12d
	leaq	56(%rsp), %r13
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r13), %rax
	movq	8(%r13), %rdx
	movq	%r15, %rsi
	movsd	.LCPI4_0(%rip), %xmm2           # xmm2 = mem[0],zero
	movapd	.LCPI4_1(%rip), %xmm3           # xmm3 = [NaN,NaN]
	movsd	.LCPI4_2(%rip), %xmm4           # xmm4 = mem[0],zero
.LBB4_28:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_29 Depth 2
	xorl	%ecx, %ecx
.LBB4_29:                               #   Parent Loop BB4_28 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rsi,%rcx,4), %xmm0
	movapd	%xmm2, %xmm1
	subsd	%xmm0, %xmm1
	andpd	%xmm3, %xmm1
	ucomisd	%xmm4, %xmm1
	ja	.LBB4_34
# %bb.30:                               #   in Loop: Header=BB4_29 Depth=2
	incq	%rcx
	cmpq	$1024, %rcx                     # imm = 0x400
	jne	.LBB4_29
# %bb.31:                               #   in Loop: Header=BB4_28 Depth=1
	incq	%r12
	addq	$4096, %rsi                     # imm = 0x1000
	cmpq	$1024, %r12                     # imm = 0x400
	jne	.LBB4_28
# %bb.32:
	xorps	%xmm2, %xmm2
	cvtsi2sd	%rdx, %xmm2
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	xorps	%xmm3, %xmm3
	cvtsi2sd	%rbx, %xmm3
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rbp, %xmm1
	xorps	%xmm4, %xmm4
	cvtsi2sdq	72(%rsp), %xmm4         # 8-byte Folded Reload
	cvtsi2sdq	80(%rsp), %xmm14        # 8-byte Folded Reload
	cvtsi2sdq	88(%rsp), %xmm5         # 8-byte Folded Reload
	cvtsi2sdq	96(%rsp), %xmm6         # 8-byte Folded Reload
	cvtsi2sdq	104(%rsp), %xmm7        # 8-byte Folded Reload
	cvtsi2sdq	112(%rsp), %xmm15       # 8-byte Folded Reload
	cvtsi2sdq	136(%rsp), %xmm8        # 8-byte Folded Reload
	cvtsi2sdq	144(%rsp), %xmm9        # 8-byte Folded Reload
	cvtsi2sdq	8(%rsp), %xmm10         # 8-byte Folded Reload
	cvtsi2sdq	120(%rsp), %xmm11       # 8-byte Folded Reload
	movsd	%xmm11, 8(%rsp)                 # 8-byte Spill
	xorps	%xmm11, %xmm11
	cvtsi2sdq	24(%rsp), %xmm11        # 8-byte Folded Reload
	movsd	.LCPI4_3(%rip), %xmm12          # xmm12 = mem[0],zero
	mulsd	%xmm12, %xmm2
	cvtsi2sdq	16(%rsp), %xmm13        # 8-byte Folded Reload
	addsd	%xmm2, %xmm0
	mulsd	%xmm12, %xmm3
	addsd	%xmm3, %xmm1
	mulsd	%xmm12, %xmm4
	addsd	%xmm4, %xmm14
	mulsd	%xmm12, %xmm5
	addsd	%xmm5, %xmm6
	subsd	%xmm6, %xmm14
	movsd	%xmm14, 16(%rsp)                # 8-byte Spill
	mulsd	%xmm12, %xmm7
	addsd	%xmm7, %xmm15
	mulsd	%xmm12, %xmm8
	addsd	%xmm8, %xmm9
	subsd	%xmm9, %xmm15
	subsd	%xmm1, %xmm15
	addsd	%xmm0, %xmm15
	movsd	%xmm15, 24(%rsp)                # 8-byte Spill
	mulsd	%xmm12, %xmm10
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	addsd	%xmm10, %xmm0
	mulsd	%xmm12, %xmm11
	addsd	%xmm11, %xmm13
	subsd	%xmm13, %xmm0
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.9, %edi
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$.L.str.10, %edi
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movsd	.LCPI4_4(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	24(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$.L.str.11, %edi
	movb	$1, %al
	callq	printf
	movsd	.LCPI4_5(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	8(%rsp), %xmm0                  # 8-byte Folded Reload
	movl	$.L.str.12, %edi
	movb	$1, %al
	callq	printf
	movsd	.LCPI4_5(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	16(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$.L.str.13, %edi
	movb	$1, %al
	callq	printf
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	divsd	16(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$.L.str.14, %edi
	movb	$1, %al
	callq	printf
	movsd	24(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	addsd	16(%rsp), %xmm1                 # 8-byte Folded Reload
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movl	$.L.str.15, %edi
	movb	$1, %al
	callq	printf
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	128(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	callq	hipDeviceReset
	xorl	%eax, %eax
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_33:
	.cfi_def_cfa_offset 208
	movq	stderr(%rip), %rdi
	movl	$.L.str.1, %esi
	jmp	.LBB4_35
.LBB4_34:
	movq	stderr(%rip), %rdi
	movl	$.L.str.7, %esi
.LBB4_35:
	movl	%r12d, %edx
                                        # kill: def $ecx killed $ecx killed $rcx
	xorl	%eax, %eax
	callq	fprintf
.LBB4_43:
	movl	$1, %edi
	callq	exit
.LBB4_36:
	movq	stderr(%rip), %rcx
	movl	$.L.str.2, %edi
	movl	$17, %esi
	jmp	.LBB4_42
.LBB4_37:
	movq	stderr(%rip), %rcx
	movl	$.L.str.3, %edi
	jmp	.LBB4_41
.LBB4_38:
	movq	stderr(%rip), %rcx
	movl	$.L.str, %edi
	movl	$18, %esi
	jmp	.LBB4_42
.LBB4_39:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_43
.LBB4_40:
	movq	stderr(%rip), %rcx
	movl	$.L.str.6, %edi
.LBB4_41:
	movl	$30, %esi
.LBB4_42:
	movl	$1, %edx
	callq	fwrite@PLT
	jmp	.LBB4_43
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11sgemm_naivePKfS0_Pfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12sgemm_tailedPKfS0_Pfi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11sgemm_naivePKfS0_Pfi,@object # @_Z11sgemm_naivePKfS0_Pfi
	.section	.rodata,"a",@progbits
	.globl	_Z11sgemm_naivePKfS0_Pfi
	.p2align	3, 0x0
_Z11sgemm_naivePKfS0_Pfi:
	.quad	_Z26__device_stub__sgemm_naivePKfS0_Pfi
	.size	_Z11sgemm_naivePKfS0_Pfi, 8

	.type	_Z12sgemm_tailedPKfS0_Pfi,@object # @_Z12sgemm_tailedPKfS0_Pfi
	.globl	_Z12sgemm_tailedPKfS0_Pfi
	.p2align	3, 0x0
_Z12sgemm_tailedPKfS0_Pfi:
	.quad	_Z27__device_stub__sgemm_tailedPKfS0_Pfi
	.size	_Z12sgemm_tailedPKfS0_Pfi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Allocation error.\n"
	.size	.L.str, 19

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"CPU results verification failed at element %d %d!\n"
	.size	.L.str.1, 51

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Allocation error\n"
	.size	.L.str.2, 18

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Host to device copying failed\n"
	.size	.L.str.3, 31

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"CUDA kernel launch with %d (%d %d) blocks of %d (%d %d) threads\n"
	.size	.L.str.4, 65

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to launch kernel (error code %s)!\n"
	.size	.L.str.5, 42

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Device to host copying failed\n"
	.size	.L.str.6, 31

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"GPU results verification failed at element %d %d!\n"
	.size	.L.str.7, 51

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"CPU version (sec.): %.6f\n"
	.size	.L.str.8, 26

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"GPU version (sec.): %.6f\n"
	.size	.L.str.9, 26

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Memory ops. (sec.): %.6f\n"
	.size	.L.str.10, 26

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Memory bw. (MiB/sec.): %.2f\n"
	.size	.L.str.11, 29

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"CPU GFLOPS: %.2f\n"
	.size	.L.str.12, 18

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"GPU GFLOPS: %.2f\n"
	.size	.L.str.13, 18

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Speedup: %.2f\n"
	.size	.L.str.14, 15

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Speedup (with mem ops.): %.2f\n"
	.size	.L.str.15, 31

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11sgemm_naivePKfS0_Pfi"
	.size	.L__unnamed_1, 25

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z12sgemm_tailedPKfS0_Pfi"
	.size	.L__unnamed_2, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__sgemm_naivePKfS0_Pfi
	.addrsig_sym _Z27__device_stub__sgemm_tailedPKfS0_Pfi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11sgemm_naivePKfS0_Pfi
	.addrsig_sym _Z12sgemm_tailedPKfS0_Pfi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11sgemm_naivePKfS0_Pfi ; -- Begin function _Z11sgemm_naivePKfS0_Pfi
	.globl	_Z11sgemm_naivePKfS0_Pfi
	.p2align	8
	.type	_Z11sgemm_naivePKfS0_Pfi,@function
_Z11sgemm_naivePKfS0_Pfi:               ; @_Z11sgemm_naivePKfS0_Pfi
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
	v_mad_u64_u32 v[0:1], null, s14, s3, v[4:5]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v1, v2, v0
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_lo_u32 v1, v2, s2
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, v0
	s_mov_b32 s3, s2
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s3, 0
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_add_nc_u32_e32 v4, s2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b32 v5, v[2:3], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v5, v7
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v6, 0
.LBB0_5:                                ; %Flow46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11sgemm_naivePKfS0_Pfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11sgemm_naivePKfS0_Pfi, .Lfunc_end0-_Z11sgemm_naivePKfS0_Pfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 332
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z12sgemm_tailedPKfS0_Pfi ; -- Begin function _Z12sgemm_tailedPKfS0_Pfi
	.globl	_Z12sgemm_tailedPKfS0_Pfi
	.p2align	8
	.type	_Z12sgemm_tailedPKfS0_Pfi,@function
_Z12sgemm_tailedPKfS0_Pfi:              ; @_Z12sgemm_tailedPKfS0_Pfi
; %bb.0:
	s_clause 0x3
	s_load_b32 s8, s[0:1], 0x2c
	s_load_b32 s11, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s8, 0xffff
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, v3, s11, v[2:3]
	s_mul_i32 s10, s9, s11
	s_cmp_lt_i32 s11, 1
	s_mul_i32 s1, s10, s15
	s_mul_i32 s8, s14, s9
	s_cbranch_scc1 .LBB1_5
; %bb.1:                                ; %.lr.ph64
	v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v4, 2, v2
	s_add_i32 s11, s1, s11
	s_cmp_lg_u32 s9, 0
	v_lshlrev_b32_e32 v2, 7, v3
	s_cselect_b32 s0, -1, 0
	v_or_b32_e32 v3, 0x1000, v4
	v_cndmask_b32_e64 v6, 0, 1, s0
	s_mov_b32 s12, s8
	v_add_nc_u32_e32 v4, v2, v4
	s_mov_b32 s13, s1
	v_add_nc_u32_e32 v5, v3, v2
	v_cmp_ne_u32_e64 s0, 1, v6
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_3 Depth 2
	v_add_nc_u32_e32 v6, s13, v0
	v_add_nc_u32_e32 v8, s12, v0
	s_mov_b32 s14, s9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v7, 31, v6
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v8, vcc_lo, s6, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
	s_and_b32 vcc_lo, exec_lo, s0
	global_load_b32 v10, v[6:7], off
	global_load_b32 v8, v[8:9], off
	v_dual_mov_b32 v7, v2 :: v_dual_mov_b32 v6, v3
	s_waitcnt vmcnt(1)
	ds_store_b32 v4, v10
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB1_4
.LBB1_3:                                ; %.lr.ph
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_b32 v8, v7
	ds_load_b32 v9, v6
	v_add_nc_u32_e32 v7, 4, v7
	v_add_nc_u32_e32 v6, 0x80, v6
	s_add_i32 s14, s14, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s14, 0
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v1, v8, v9
	s_cbranch_scc0 .LBB1_3
.LBB1_4:                                ; %._crit_edge
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s13, s13, s9
	s_add_i32 s12, s12, s10
	s_cmp_ge_i32 s13, s11
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_2
	s_branch .LBB1_6
.LBB1_5:
	v_mov_b32_e32 v1, 0
.LBB1_6:                                ; %._crit_edge65
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v2, s8, s1, v0
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_store_b32 v[2:3], v1, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12sgemm_tailedPKfS0_Pfi
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z12sgemm_tailedPKfS0_Pfi, .Lfunc_end1-_Z12sgemm_tailedPKfS0_Pfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 460
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11sgemm_naivePKfS0_Pfi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11sgemm_naivePKfS0_Pfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12sgemm_tailedPKfS0_Pfi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12sgemm_tailedPKfS0_Pfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
