#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <inttypes.h>

void __global__ kernel0(int64_t Npart,int64_t* totalNpairs, int64_t* npairs){

 int64_t i =  blockIdx.x * blockDim.x + threadIdx.x;
 if(i< Npart) {
  for(int64_t j = 0;j < Npart;j++) {
      totalNpairs[(i*Npart)+j]+=7;
   }
 }
 __syncthreads();
 // the code below for reduction is incorrect and should be commented, while the commented code in the main function should be uncommented
  if(i==0){
     for(int64_t k=0; k<Npart; k++){
       for (int64_t j=0; j<Npart; j++){
              npairs[j] += totalNpairs[(k*Npart)+ j];
       }
     }
  }
 
}

//uncomment the code below for getting correct results
/*
void __global__ kernel1(int64_t *npairs, int64_t* totalNpairs, int64_t Npart){

 int64_t i =  blockIdx.x * blockDim.x + threadIdx.x;
 
 if(i==0){
     for(int64_t k=0; k<Npart; k++){
      for (int64_t j=0; j<Npart; j++){
              npairs[j] += totalNpairs[(k*Npart)+ j];
      }
     }

 }

}
*/

int main(int argc,char **argv){
  int64_t *device_npairs;
  int64_t *device_totalNpairs;

  int64_t Npart=10000;
  
  int64_t *npairs = (int64_t *) (calloc(Npart,sizeof((*npairs))));

  int64_t *totalNpairs = (int64_t *) (calloc((Npart*Npart),sizeof(( *npairs))));


  int D_rows = (Npart > 1024 ) ? Npart/1024 : Npart;
  int D_cols = (Npart > 1024 ) ? 1024 : 1;
  if ( Npart % 1024 && Npart > 1024){
    D_rows++;
  }

  printf("\nD_rows:%d, D_cols:%d\n",D_rows, D_cols);

  dim3 dimGrid(D_rows,1);
  dim3 dimBlock(D_cols,1);

  for (int64_t j=0; j<Npart; j++){
    npairs[j]  = 5;
  }
  cudaMalloc((void **) &device_npairs,(Npart)*sizeof(int64_t));
  cudaMemcpy(device_npairs,npairs,(Npart)*sizeof(int64_t),cudaMemcpyHostToDevice);


  for (int64_t j=0; j<Npart*Npart; j++){
    totalNpairs[j]  = 0;
  }

  cudaMalloc((void **) &device_totalNpairs,(Npart*Npart)*sizeof(int64_t));
  cudaMemcpy(device_totalNpairs,totalNpairs,(Npart*Npart)*sizeof(int64_t),cudaMemcpyHostToDevice);


  kernel0<<<dimGrid,dimBlock>>>(Npart, device_totalNpairs, device_npairs);

 
  cudaMemcpy(totalNpairs,device_totalNpairs,(Npart*Npart)*sizeof(int64_t), cudaMemcpyDeviceToHost); 
  //uncomment the code below to get correct results
  //kernel1<<<dimGrid,dimBlock>>>(device_npairs,device_totalNpairs, Npart);

  //cudaMemcpy(npairs,device_npairs,(Npart)*sizeof(int64_t), cudaMemcpyDeviceToHost);

  cudaFree(device_npairs);
  cudaFree(device_totalNpairs);

  //only printing the first 100 elements
  for (int i = 0; i < 100; i++) {
    fprintf(stdout,"%lu\t ",npairs[i]);
  }

  free(npairs);
  free(totalNpairs);
  return 0;
}

	.file	"tmpxft_0028ff15_00000000-6_buggy_version.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z29__device_stub__Z7kernel0lPlS_lPlS_
	.type	_Z29__device_stub__Z7kernel0lPlS_lPlS_, @function
_Z29__device_stub__Z7kernel0lPlS_lPlS_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z7kernel0lPlS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z29__device_stub__Z7kernel0lPlS_lPlS_, .-_Z29__device_stub__Z7kernel0lPlS_lPlS_
	.globl	_Z7kernel0lPlS_
	.type	_Z7kernel0lPlS_, @function
_Z7kernel0lPlS_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z7kernel0lPlS_lPlS_
	.cfi_endproc
.LFE2053:
	.size	_Z7kernel0lPlS_, .-_Z7kernel0lPlS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\nD_rows:%d, D_cols:%d\n"
.LC1:
	.string	"%lu\t "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$8, %esi
	movl	$10000, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	calloc@PLT
	movl	$8, %esi
	movl	$100000000, %edi
	movq	%rax, %rbp
	call	calloc@PLT
	movl	$1024, %ecx
	movl	$10, %edx
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rbx
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$2147483653, %eax
	movl	$1, 24(%rsp)
	addq	%rax, %rax
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	addq	$1014, %rax
	movq	%rax, 28(%rsp)
	xorl	%eax, %eax
.L9:
	movq	$5, 0(%rbp,%rax,8)
	incq	%rax
	cmpq	$10000, %rax
	jne	.L9
	movq	%rsp, %rdi
	movl	$80000, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$80000, %edx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	movl	$200000000, %ecx
	movq	%rbx, %rdi
	rep stosl
	movl	$800000000, %esi
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$800000000, %edx
	call	cudaMemcpy@PLT
	movl	36(%rsp), %ecx
	movl	24(%rsp), %esi
	xorl	%r9d, %r9d
	movq	28(%rsp), %rdx
	movq	16(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$10000, %edi
	call	_Z29__device_stub__Z7kernel0lPlS_lPlS_
.L10:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	xorl	%r12d, %r12d
	movl	$800000000, %edx
	leaq	.LC1(%rip), %r13
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
.L11:
	movq	0(%rbp,%r12,8), %rcx
	movq	%r13, %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	movq	stdout(%rip), %rdi
	incq	%r12
	call	__fprintf_chk@PLT
	cmpq	$100, %r12
	jne	.L11
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z7kernel0lPlS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7kernel0lPlS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <inttypes.h>

void __global__ kernel0(int64_t Npart,int64_t* totalNpairs, int64_t* npairs){

 int64_t i =  blockIdx.x * blockDim.x + threadIdx.x;
 if(i< Npart) {
  for(int64_t j = 0;j < Npart;j++) {
      totalNpairs[(i*Npart)+j]+=7;
   }
 }
 __syncthreads();
 // the code below for reduction is incorrect and should be commented, while the commented code in the main function should be uncommented
  if(i==0){
     for(int64_t k=0; k<Npart; k++){
       for (int64_t j=0; j<Npart; j++){
              npairs[j] += totalNpairs[(k*Npart)+ j];
       }
     }
  }
 
}

//uncomment the code below for getting correct results
/*
void __global__ kernel1(int64_t *npairs, int64_t* totalNpairs, int64_t Npart){

 int64_t i =  blockIdx.x * blockDim.x + threadIdx.x;
 
 if(i==0){
     for(int64_t k=0; k<Npart; k++){
      for (int64_t j=0; j<Npart; j++){
              npairs[j] += totalNpairs[(k*Npart)+ j];
      }
     }

 }

}
*/

int main(int argc,char **argv){
  int64_t *device_npairs;
  int64_t *device_totalNpairs;

  int64_t Npart=10000;
  
  int64_t *npairs = (int64_t *) (calloc(Npart,sizeof((*npairs))));

  int64_t *totalNpairs = (int64_t *) (calloc((Npart*Npart),sizeof(( *npairs))));


  int D_rows = (Npart > 1024 ) ? Npart/1024 : Npart;
  int D_cols = (Npart > 1024 ) ? 1024 : 1;
  if ( Npart % 1024 && Npart > 1024){
    D_rows++;
  }

  printf("\nD_rows:%d, D_cols:%d\n",D_rows, D_cols);

  dim3 dimGrid(D_rows,1);
  dim3 dimBlock(D_cols,1);

  for (int64_t j=0; j<Npart; j++){
    npairs[j]  = 5;
  }
  hipMalloc((void **) &device_npairs,(Npart)*sizeof(int64_t));
  hipMemcpy(device_npairs,npairs,(Npart)*sizeof(int64_t),hipMemcpyHostToDevice);


  for (int64_t j=0; j<Npart*Npart; j++){
    totalNpairs[j]  = 0;
  }

  hipMalloc((void **) &device_totalNpairs,(Npart*Npart)*sizeof(int64_t));
  hipMemcpy(device_totalNpairs,totalNpairs,(Npart*Npart)*sizeof(int64_t),hipMemcpyHostToDevice);


  kernel0<<<dimGrid,dimBlock>>>(Npart, device_totalNpairs, device_npairs);

 
  hipMemcpy(totalNpairs,device_totalNpairs,(Npart*Npart)*sizeof(int64_t), hipMemcpyDeviceToHost); 
  //uncomment the code below to get correct results
  //kernel1<<<dimGrid,dimBlock>>>(device_npairs,device_totalNpairs, Npart);

  //cudaMemcpy(npairs,device_npairs,(Npart)*sizeof(int64_t), cudaMemcpyDeviceToHost);

  hipFree(device_npairs);
  hipFree(device_totalNpairs);

  //only printing the first 100 elements
  for (int i = 0; i < 100; i++) {
    fprintf(stdout,"%lu\t ",npairs[i]);
  }

  free(npairs);
  free(totalNpairs);
  return 0;
}

	.text
	.file	"buggy_version.hip"
	.globl	_Z22__device_stub__kernel0lPlS_ # -- Begin function _Z22__device_stub__kernel0lPlS_
	.type	_Z22__device_stub__kernel0lPlS_,@function
_Z22__device_stub__kernel0lPlS_:        # @_Z22__device_stub__kernel0lPlS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7kernel0lPlS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__kernel0lPlS_, .Lfunc_end0-_Z22__device_stub__kernel0lPlS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$10000, %edi                    # imm = 0x2710
	movl	$8, %esi
	callq	calloc
	movq	%rax, %rbx
	movl	$100000000, %edi                # imm = 0x5F5E100
	movl	$8, %esi
	callq	calloc
	movq	%rax, %r14
	xorl	%r15d, %r15d
	movl	$.L.str, %edi
	movl	$10, %esi
	movl	$1024, %edx                     # imm = 0x400
	xorl	%eax, %eax
	callq	printf
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movq	$5, (%rbx,%r15,8)
	incq	%r15
	cmpq	$10000, %r15                    # imm = 0x2710
	jne	.LBB1_1
# %bb.2:
	leaq	8(%rsp), %r15
	movl	$80000, %esi                    # imm = 0x13880
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$80000, %edx                    # imm = 0x13880
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rsp, %r15
	movl	$800000000, %esi                # imm = 0x2FAF0800
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$800000000, %edx                # imm = 0x2FAF0800
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967306, %rdi               # imm = 0x10000000A
	leaq	1014(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$10000, %edi                    # imm = 0x2710
	callq	_Z22__device_stub__kernel0lPlS_
.LBB1_4:
	movq	(%rsp), %rsi
	movl	$800000000, %edx                # imm = 0x2FAF0800
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%r15d, %r15d
.LBB1_5:                                # =>This Inner Loop Header: Depth=1
	movq	stdout(%rip), %rdi
	movq	(%rbx,%r15,8), %rdx
	movl	$.L.str.1, %esi
	xorl	%eax, %eax
	callq	fprintf
	incq	%r15
	cmpq	$100, %r15
	jne	.LBB1_5
# %bb.6:
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7kernel0lPlS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7kernel0lPlS_,@object         # @_Z7kernel0lPlS_
	.section	.rodata,"a",@progbits
	.globl	_Z7kernel0lPlS_
	.p2align	3, 0x0
_Z7kernel0lPlS_:
	.quad	_Z22__device_stub__kernel0lPlS_
	.size	_Z7kernel0lPlS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\nD_rows:%d, D_cols:%d\n"
	.size	.L.str, 23

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%lu\t "
	.size	.L.str.1, 6

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7kernel0lPlS_"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__kernel0lPlS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7kernel0lPlS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7kernel0lPlS_         ; -- Begin function _Z7kernel0lPlS_
	.globl	_Z7kernel0lPlS_
	.p2align	8
	.type	_Z7kernel0lPlS_,@function
_Z7kernel0lPlS_:                        ; @_Z7kernel0lPlS_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	v_cmp_gt_i64_e64 s8, s[4:5], 0
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_gt_i64_e32 vcc_lo, s[4:5], v[1:2]
	s_and_b32 s2, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s9, s2
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	v_mad_u64_u32 v[2:3], null, v1, s4, 0
	s_mov_b64 s[2:3], s[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v0, v3
	v_mad_u64_u32 v[3:4], null, v1, s5, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[4:5], v[2:3], off
	s_add_u32 s2, s2, -1
	s_addc_u32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[2:3], 0
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v4, 7
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	global_store_b64 v[2:3], v[4:5], off
	v_add_co_u32 v2, vcc_lo, v2, 8
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %Flow56
	s_or_b32 exec_lo, exec_lo, s9
	v_cmp_eq_u32_e32 vcc_lo, 0, v1
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_b32 s2, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_8
; %bb.4:                                ; %.preheader.preheader
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[2:3], s[4:5], 3
	s_mov_b64 s[8:9], 0
.LBB0_5:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
	s_mov_b64 s[10:11], s[6:7]
	s_mov_b64 s[12:13], s[0:1]
	s_mov_b64 s[14:15], s[4:5]
.LBB0_6:                                ;   Parent Loop BB0_5 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[10:11]
	global_load_b64 v[3:4], v0, s[12:13]
	s_add_u32 s14, s14, -1
	s_addc_u32 s15, s15, -1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v3, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, v4, v2, vcc_lo
	global_store_b64 v0, v[1:2], s[12:13]
	s_add_u32 s12, s12, 8
	s_addc_u32 s13, s13, 0
	s_add_u32 s10, s10, 8
	s_addc_u32 s11, s11, 0
	s_cmp_eq_u64 s[14:15], 0
	s_cbranch_scc0 .LBB0_6
; %bb.7:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_5 Depth=1
	s_add_u32 s8, s8, 1
	s_addc_u32 s9, s9, 0
	s_add_u32 s6, s6, s2
	s_addc_u32 s7, s7, s3
	s_cmp_eq_u64 s[8:9], s[4:5]
	s_cbranch_scc0 .LBB0_5
.LBB0_8:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7kernel0lPlS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7kernel0lPlS_, .Lfunc_end0-_Z7kernel0lPlS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 380
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7kernel0lPlS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7kernel0lPlS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
