#include <stdio.h>
#include <time.h>

__global__ void matrixMulGPU( int * a, int * b, int * c, int N )
{
    int val = 0;

    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;

    if (row < N && col < N)
    {
        for ( int k = 0; k < N; ++k )
            val += a[row * N + k] * b[k * N + col];
        c[row * N + col] = val;
    }
}

__host__ void matrixMulCPU( int * a, int * b, int * c, int N )
{
    int val = 0;

    for( int row = 0; row < N; ++row )
        for( int col = 0; col < N; ++col )
        {
            val = 0;
            for ( int k = 0; k < N; ++k )
                val += a[row * N + k] * b[k * N + col];
            c[row * N + col] = val;
        }
}

__host__ void printMatrix(int *mat, int N) {
	for( int row = 0; row < N; ++row ){
        for( int col = 0; col < N; ++col )
            printf("%d\t", mat[row * N + col]);
		printf("\n");
	}
}

int main()
{
    int N, size, *a, *b, *c_cpu, *c_gpu;

	printf("N?\n");
	scanf("%d", &N);

    size = N * N * sizeof (int); // Number of bytes of an N x N matrix

    // Allocate memory
    cudaMallocManaged (&a, size);
    cudaMallocManaged (&b, size);
    cudaMallocManaged (&c_cpu, size);
    cudaMallocManaged (&c_gpu, size);

    // Initialize memory
    for( int row = 0; row < N; ++row ){
        for( int col = 0; col < N; ++col )
        {
            a[row*N + col] = row;
            b[row*N + col] = col+2;
            c_cpu[row*N + col] = 0;
            c_gpu[row*N + col] = 0;
        }
	}

	printf("\nMatrix A:\n");
	printMatrix(a, N);

	printf("\nMatrix B:\n");
	printMatrix(b, N);

	printf("\n\n");

    dim3 threads_per_block (16, 16, 1); // A 16 x 16 block threads
    dim3 number_of_blocks ((N / threads_per_block.x) + 1, (N / threads_per_block.y) + 1, 1);

	cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);

	cudaEventRecord(start,0);

    matrixMulGPU <<< number_of_blocks, threads_per_block >>> ( a, b, c_gpu, N );

    cudaEventRecord(stop,0);
    cudaEventSynchronize(stop);	// Wait for the GPU to finish before proceeding
    
	float et;
    cudaEventElapsedTime(&et, start, stop);
    cudaEventDestroy(start);
    cudaEventDestroy(stop);
	
    // Call the CPU version to check our work
	clock_t begin = clock();
    matrixMulCPU( a, b, c_cpu, N );
    clock_t end = clock();
    double time_spent = (double)1000 * (end - begin) / CLOCKS_PER_SEC;

	printf("GPU time: %f\n", et);
	printf("CPU time: %f", time_spent);

    // Compare the two answers to make sure they are equal
    bool error = false;
    for( int row = 0; row < N && !error; ++row )
        for( int col = 0; col < N && !error; ++col )
            if (c_cpu[row * N + col] != c_gpu[row * N + col])
            {
                printf("FOUND ERROR at c[%d][%d]\n", row, col);
                error = true;
                break;
            }
    if (!error){
        printf("\nSuccess!\n");		
		printf("\nResult:\n");
		//printMatrix(c_gpu, N);
	}

    // Free all our allocated memory
    cudaFree(a); cudaFree(b);
    cudaFree( c_cpu ); cudaFree( c_gpu );
}
	.file	"tmpxft_0029b7ed_00000000-6_matmul_shlee.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z12matrixMulCPUPiS_S_i
	.type	_Z12matrixMulCPUPiS_S_i, @function
_Z12matrixMulCPUPiS_S_i:
.LFB2027:
	.cfi_startproc
	endbr64
	movq	%rsi, %r10
	movslq	%ecx, %rsi
	xorl	%r8d, %r8d
	movq	%rdi, %r9
	movq	%rsi, %rax
	movq	%rdx, %r11
	salq	$2, %rsi
	xorl	%ecx, %ecx
	cmpl	%eax, %r8d
	jl	.L11
	ret
.L11:
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
.L7:
	xorl	%edx, %edx
	leaq	(%r9,%rcx), %r13
	leaq	(%r11,%rcx), %r14
.L6:
	leaq	(%r10,%rdx,4), %rbp
	xorl	%edi, %edi
	xorl	%ebx, %ebx
.L4:
	movl	0(%r13,%rdi,4), %r12d
	imull	0(%rbp), %r12d
	incq	%rdi
	addq	%rsi, %rbp
	addl	%r12d, %ebx
	cmpl	%edi, %eax
	jg	.L4
	movl	%ebx, (%r14,%rdx,4)
	incq	%rdx
	cmpl	%edx, %eax
	jg	.L6
	incl	%r8d
	addq	%rsi, %rcx
	cmpl	%eax, %r8d
	jl	.L7
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z12matrixMulCPUPiS_S_i, .-_Z12matrixMulCPUPiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d\t"
.LC1:
	.string	"\n"
	.text
	.globl	_Z11printMatrixPii
	.type	_Z11printMatrixPii, @function
_Z11printMatrixPii:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	.LC0(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movslq	%esi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r13, %rbp
	salq	$2, %r13
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 64
.L14:
	cmpl	%ebp, %r12d
	jge	.L19
	leaq	(%rbx,%r13), %r15
.L15:
	movl	(%rbx), %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$4, %rbx
	call	__printf_chk@PLT
	cmpq	%r15, %rbx
	jne	.L15
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%r12d
	call	__printf_chk@PLT
	jmp	.L14
.L19:
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z11printMatrixPii, .-_Z11printMatrixPii
	.globl	_Z37__device_stub__Z12matrixMulGPUPiS_S_iPiS_S_i
	.type	_Z37__device_stub__Z12matrixMulGPUPiS_S_iPiS_S_i, @function
_Z37__device_stub__Z12matrixMulGPUPiS_S_iPiS_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12matrixMulGPUPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L20:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z37__device_stub__Z12matrixMulGPUPiS_S_iPiS_S_i, .-_Z37__device_stub__Z12matrixMulGPUPiS_S_iPiS_S_i
	.globl	_Z12matrixMulGPUPiS_S_i
	.type	_Z12matrixMulGPUPiS_S_i, @function
_Z12matrixMulGPUPiS_S_i:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z12matrixMulGPUPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2055:
	.size	_Z12matrixMulGPUPiS_S_i, .-_Z12matrixMulGPUPiS_S_i
	.section	.rodata.str1.1
.LC2:
	.string	"N?\n"
.LC3:
	.string	"%d"
.LC4:
	.string	"\nMatrix A:\n"
.LC5:
	.string	"\nMatrix B:\n"
.LC6:
	.string	"\n\n"
.LC9:
	.string	"GPU time: %f\n"
.LC10:
	.string	"CPU time: %f"
.LC11:
	.string	"FOUND ERROR at c[%d][%d]\n"
.LC12:
	.string	"\nSuccess!\n"
.LC13:
	.string	"\nResult:\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$104, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	8(%rsp), %rsi
	leaq	.LC3(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	8(%rsp), %ebx
	leaq	16(%rsp), %rdi
	movl	$1, %edx
	imull	%ebx, %ebx
	sall	$2, %ebx
	movslq	%ebx, %rbx
	movq	%rbx, %rsi
	call	cudaMallocManaged@PLT
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	movq	%rbx, %rsi
	call	cudaMallocManaged@PLT
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	movq	%rbx, %rsi
	call	cudaMallocManaged@PLT
	leaq	40(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %edx
	call	cudaMallocManaged@PLT
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi
	xorl	%eax, %eax
	movq	32(%rsp), %r8
	movq	40(%rsp), %r9
.L26:
	cmpl	%eax, 8(%rsp)
	jle	.L41
	xorl	%edx, %edx
.L28:
	movl	8(%rsp), %ecx
	cmpl	%edx, %ecx
	jle	.L42
	imull	%eax, %ecx
	leal	2(%rdx), %r10d
	xorl	%r11d, %r11d
	addl	%edx, %ecx
	movslq	%ecx, %rcx
	movl	%eax, (%rsi,%rcx,4)
	movl	8(%rsp), %ecx
	imull	%eax, %ecx
	addl	%edx, %ecx
	movslq	%ecx, %rcx
	movl	%r10d, (%rdi,%rcx,4)
	movl	8(%rsp), %ecx
	xorl	%r10d, %r10d
	imull	%eax, %ecx
	addl	%edx, %ecx
	movslq	%ecx, %rcx
	movl	%r10d, (%r8,%rcx,4)
	movl	8(%rsp), %ecx
	imull	%eax, %ecx
	addl	%edx, %ecx
	incl	%edx
	movslq	%ecx, %rcx
	movl	%r11d, (%r9,%rcx,4)
	jmp	.L28
.L42:
	incl	%eax
	jmp	.L26
.L41:
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	8(%rsp), %esi
	movq	16(%rsp), %rdi
	call	_Z11printMatrixPii
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	8(%rsp), %esi
	movq	24(%rsp), %rdi
	call	_Z11printMatrixPii
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	8(%rsp), %eax
	leaq	48(%rsp), %rdi
	movl	$1, 84(%rsp)
	shrl	$4, %eax
	incl	%eax
	movl	%eax, 76(%rsp)
	movl	%eax, 80(%rsp)
	call	cudaEventCreate@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	76(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	84(%rsp), %esi
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, 72(%rsp)
	movq	%rdx, 64(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movl	8(%rsp), %ecx
	movq	40(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z37__device_stub__Z12matrixMulGPUPiS_S_iPiS_S_i
.L29:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	leaq	.LC11(%rip), %rbp
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	12(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	48(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	56(%rsp), %rdi
	call	cudaEventDestroy@PLT
	call	clock@PLT
	movq	32(%rsp), %rdx
	movl	8(%rsp), %ecx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movq	%rax, %rbx
	call	_Z12matrixMulCPUPiS_S_i
	call	clock@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	subq	%rbx, %rax
	cvtsi2sdq	%rax, %xmm0
	mulsd	.LC7(%rip), %xmm0
	movb	$1, %al
	divsd	.LC8(%rip), %xmm0
	movq	%xmm0, %rbx
	cvtss2sd	12(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	%rbx, %xmm0
	leaq	.LC10(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
	xorl	%edx, %edx
.L30:
	movl	8(%rsp), %esi
	cmpl	%ebx, %esi
	jle	.L34
	testb	%dl, %dl
	jne	.L35
	movl	%esi, %eax
	movq	32(%rsp), %r8
	movq	40(%rsp), %rdi
	xorl	%ecx, %ecx
	imull	%ebx, %eax
	cltq
	salq	$2, %rax
.L36:
	movl	(%rdi,%rax), %r11d
	cmpl	%r11d, (%r8,%rax)
	je	.L39
	movl	%ebx, %edx
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movb	$1, %dl
	jmp	.L31
.L39:
	incl	%ecx
	addq	$4, %rax
	cmpl	%ecx, %esi
	jne	.L36
.L31:
	incl	%ebx
	jmp	.L30
.L34:
	testb	%dl, %dl
	jne	.L35
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L35:
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$104, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC14:
	.string	"_Z12matrixMulGPUPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12matrixMulGPUPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC7:
	.long	0
	.long	1083129856
	.align 8
.LC8:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <time.h>

__global__ void matrixMulGPU( int * a, int * b, int * c, int N )
{
    int val = 0;

    int row = blockIdx.x * blockDim.x + threadIdx.x;
    int col = blockIdx.y * blockDim.y + threadIdx.y;

    if (row < N && col < N)
    {
        for ( int k = 0; k < N; ++k )
            val += a[row * N + k] * b[k * N + col];
        c[row * N + col] = val;
    }
}

__host__ void matrixMulCPU( int * a, int * b, int * c, int N )
{
    int val = 0;

    for( int row = 0; row < N; ++row )
        for( int col = 0; col < N; ++col )
        {
            val = 0;
            for ( int k = 0; k < N; ++k )
                val += a[row * N + k] * b[k * N + col];
            c[row * N + col] = val;
        }
}

__host__ void printMatrix(int *mat, int N) {
	for( int row = 0; row < N; ++row ){
        for( int col = 0; col < N; ++col )
            printf("%d\t", mat[row * N + col]);
		printf("\n");
	}
}

int main()
{
    int N, size, *a, *b, *c_cpu, *c_gpu;

	printf("N?\n");
	scanf("%d", &N);

    size = N * N * sizeof (int); // Number of bytes of an N x N matrix

    // Allocate memory
    hipMallocManaged (&a, size);
    hipMallocManaged (&b, size);
    hipMallocManaged (&c_cpu, size);
    hipMallocManaged (&c_gpu, size);

    // Initialize memory
    for( int row = 0; row < N; ++row ){
        for( int col = 0; col < N; ++col )
        {
            a[row*N + col] = row;
            b[row*N + col] = col+2;
            c_cpu[row*N + col] = 0;
            c_gpu[row*N + col] = 0;
        }
	}

	printf("\nMatrix A:\n");
	printMatrix(a, N);

	printf("\nMatrix B:\n");
	printMatrix(b, N);

	printf("\n\n");

    dim3 threads_per_block (16, 16, 1); // A 16 x 16 block threads
    dim3 number_of_blocks ((N / threads_per_block.x) + 1, (N / threads_per_block.y) + 1, 1);

	hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);

	hipEventRecord(start,0);

    matrixMulGPU <<< number_of_blocks, threads_per_block >>> ( a, b, c_gpu, N );

    hipEventRecord(stop,0);
    hipEventSynchronize(stop);	// Wait for the GPU to finish before proceeding
    
	float et;
    hipEventElapsedTime(&et, start, stop);
    hipEventDestroy(start);
    hipEventDestroy(stop);
	
    // Call the CPU version to check our work
	clock_t begin = clock();
    matrixMulCPU( a, b, c_cpu, N );
    clock_t end = clock();
    double time_spent = (double)1000 * (end - begin) / CLOCKS_PER_SEC;

	printf("GPU time: %f\n", et);
	printf("CPU time: %f", time_spent);

    // Compare the two answers to make sure they are equal
    bool error = false;
    for( int row = 0; row < N && !error; ++row )
        for( int col = 0; col < N && !error; ++col )
            if (c_cpu[row * N + col] != c_gpu[row * N + col])
            {
                printf("FOUND ERROR at c[%d][%d]\n", row, col);
                error = true;
                break;
            }
    if (!error){
        printf("\nSuccess!\n");		
		printf("\nResult:\n");
		//printMatrix(c_gpu, N);
	}

    // Free all our allocated memory
    hipFree(a); hipFree(b);
    hipFree( c_cpu ); hipFree( c_gpu );
}
	.text
	.file	"matmul_shlee.hip"
	.globl	_Z27__device_stub__matrixMulGPUPiS_S_i # -- Begin function _Z27__device_stub__matrixMulGPUPiS_S_i
	.type	_Z27__device_stub__matrixMulGPUPiS_S_i,@function
_Z27__device_stub__matrixMulGPUPiS_S_i: # @_Z27__device_stub__matrixMulGPUPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12matrixMulGPUPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__matrixMulGPUPiS_S_i, .Lfunc_end0-_Z27__device_stub__matrixMulGPUPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z12matrixMulCPUPiS_S_i         # -- Begin function _Z12matrixMulCPUPiS_S_i
	.type	_Z12matrixMulCPUPiS_S_i,@function
_Z12matrixMulCPUPiS_S_i:                # @_Z12matrixMulCPUPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, -8(%rsp)                  # 8-byte Spill
	testl	%ecx, %ecx
	jle	.LBB1_7
# %bb.1:                                # %.preheader26.lr.ph
	movl	%ecx, %eax
	leaq	(,%rax,4), %r8
	xorl	%edx, %edx
	xorl	%r10d, %r10d
.LBB1_2:                                # %.preheader.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
                                        #       Child Loop BB1_4 Depth 3
	movl	%edx, %r11d
	leaq	(%rdi,%r11,4), %r11
	movq	%r10, %rbx
	imulq	%rax, %rbx
	movq	-8(%rsp), %r9                   # 8-byte Reload
	leaq	(%r9,%rbx,4), %rbx
	movq	%rsi, %r14
	xorl	%r15d, %r15d
.LBB1_3:                                # %.preheader
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_4 Depth 3
	xorl	%r12d, %r12d
	movq	%r14, %r13
	xorl	%ebp, %ebp
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%r13), %r9d
	imull	(%r11,%r12,4), %r9d
	addl	%r9d, %ebp
	incq	%r12
	addq	%r8, %r13
	cmpq	%r12, %rax
	jne	.LBB1_4
# %bb.5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_3 Depth=2
	movl	%ebp, (%rbx,%r15,4)
	incq	%r15
	addq	$4, %r14
	cmpq	%rax, %r15
	jne	.LBB1_3
# %bb.6:                                # %._crit_edge30
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r10
	addl	%ecx, %edx
	cmpq	%rax, %r10
	jne	.LBB1_2
.LBB1_7:                                # %._crit_edge32
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z12matrixMulCPUPiS_S_i, .Lfunc_end1-_Z12matrixMulCPUPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z11printMatrixPii              # -- Begin function _Z11printMatrixPii
	.type	_Z11printMatrixPii,@function
_Z11printMatrixPii:                     # @_Z11printMatrixPii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, (%rsp)                    # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB2_5
# %bb.1:                                # %.preheader.lr.ph
	movl	%esi, %ebx
	movl	%esi, %r15d
	xorl	%ebp, %ebp
	xorl	%r12d, %r12d
.LBB2_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_3 Depth 2
	movl	%ebp, %eax
	movq	(%rsp), %rcx                    # 8-byte Reload
	leaq	(%rcx,%rax,4), %r13
	xorl	%r14d, %r14d
.LBB2_3:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r13,%r14,4), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB2_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r12
	addl	%ebx, %ebp
	cmpq	%r15, %r12
	jne	.LBB2_2
.LBB2_5:                                # %._crit_edge13
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z11printMatrixPii, .Lfunc_end2-_Z11printMatrixPii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x408f400000000000              # double 1000
.LCPI3_1:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%r15d, %r15d
	leaq	4(%rsp), %rbx
	movl	$.L.str.3, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	(%rbx), %eax
	imull	%eax, %eax
	shll	$2, %eax
	movslq	%eax, %r14
	leaq	16(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	40(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	32(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	(%rbx), %r8d
	testl	%r8d, %r8d
	jle	.LBB3_6
# %bb.1:                                # %.preheader55.lr.ph
	movq	16(%rsp), %rax
	movq	8(%rsp), %rcx
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	xorl	%edi, %edi
.LBB3_2:                                # %.preheader55
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	testl	%r8d, %r8d
	jle	.LBB3_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB3_2 Depth=1
	movslq	%edi, %r9
	xorl	%r10d, %r10d
.LBB3_4:                                # %.lr.ph
                                        #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	%edi, %r8d
	movslq	%r8d, %r8
	addq	%r10, %r8
	movl	%r9d, (%rax,%r8,4)
	leal	2(%r10), %r8d
	movslq	4(%rsp), %r11
	imulq	%r9, %r11
	addq	%r10, %r11
	movl	%r8d, (%rcx,%r11,4)
	movslq	4(%rsp), %r8
	imulq	%r9, %r8
	addq	%r10, %r8
	movl	%r15d, (%rdx,%r8,4)
	movslq	4(%rsp), %r8
	imulq	%r9, %r8
	addq	%r10, %r8
	movl	%r15d, (%rsi,%r8,4)
	movl	4(%rsp), %r8d
	incq	%r10
	cmpl	%r8d, %r10d
	jl	.LBB3_4
.LBB3_5:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	incl	%edi
	cmpl	%r8d, %edi
	jl	.LBB3_2
.LBB3_6:                                # %._crit_edge59
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movq	16(%rsp), %rdi
	movl	4(%rsp), %esi
	callq	_Z11printMatrixPii
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	8(%rsp), %rdi
	movl	4(%rsp), %esi
	callq	_Z11printMatrixPii
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movl	4(%rsp), %eax
	shrl	$4, %eax
	movq	%rax, %rcx
	shlq	$32, %rcx
	orq	%rax, %rcx
	movabsq	$4294967297, %rbx               # imm = 0x100000001
	addq	%rcx, %rbx
	leaq	64(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_8
# %bb.7:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdx
	movl	4(%rsp), %ecx
	callq	_Z27__device_stub__matrixMulGPUPiS_S_i
.LBB3_8:
	movq	24(%rsp), %rdi
	xorl	%r14d, %r14d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	movq	64(%rsp), %rsi
	movq	24(%rsp), %rdx
	leaq	60(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	64(%rsp), %rdi
	callq	hipEventDestroy
	movq	24(%rsp), %rdi
	callq	hipEventDestroy
	callq	clock
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movl	4(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB3_15
# %bb.9:                                # %.preheader26.lr.ph.i
	movq	16(%rsp), %rcx
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rsi
	leaq	(,%rax,4), %rdi
	xorl	%r8d, %r8d
.LBB3_10:                               # %.preheader.lr.ph.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_11 Depth 2
                                        #       Child Loop BB3_12 Depth 3
	movl	%r14d, %r9d
	leaq	(%rcx,%r9,4), %r9
	movq	%r8, %r10
	imulq	%rax, %r10
	leaq	(%rsi,%r10,4), %r10
	movq	%rdx, %r11
	xorl	%r15d, %r15d
.LBB3_11:                               # %.preheader.i
                                        #   Parent Loop BB3_10 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_12 Depth 3
	xorl	%r12d, %r12d
	movq	%r11, %r13
	xorl	%ebp, %ebp
.LBB3_12:                               #   Parent Loop BB3_10 Depth=1
                                        #     Parent Loop BB3_11 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%r13), %ebx
	imull	(%r9,%r12), %ebx
	addl	%ebx, %ebp
	addq	$4, %r12
	addq	%rdi, %r13
	cmpq	%r12, %rdi
	jne	.LBB3_12
# %bb.13:                               # %._crit_edge.i
                                        #   in Loop: Header=BB3_11 Depth=2
	movl	%ebp, (%r10,%r15,4)
	incq	%r15
	addq	$4, %r11
	cmpq	%rax, %r15
	jne	.LBB3_11
# %bb.14:                               # %._crit_edge30.i
                                        #   in Loop: Header=BB3_10 Depth=1
	incq	%r8
	addl	%eax, %r14d
	cmpq	%rax, %r8
	jne	.LBB3_10
.LBB3_15:                               # %_Z12matrixMulCPUPiS_S_i.exit
	callq	clock
	subq	48(%rsp), %rax                  # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	mulsd	.LCPI3_0(%rip), %xmm0
	divsd	.LCPI3_1(%rip), %xmm0
	movsd	%xmm0, 48(%rsp)                 # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtss2sd	60(%rsp), %xmm0
	movl	$.L.str.7, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.8, %edi
	movsd	48(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	4(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB3_22
# %bb.16:                               # %.preheader.preheader
	movq	40(%rsp), %rcx
	xorl	%edi, %edi
	movq	32(%rsp), %r8
	xorl	%esi, %esi
.LBB3_17:                               # %.lr.ph61
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_18 Depth 2
	movl	%edi, %edx
	leaq	(%rcx,%rdx,4), %r9
	leaq	(%r8,%rdx,4), %r10
	xorl	%edx, %edx
.LBB3_18:                               #   Parent Loop BB3_17 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r9,%rdx,4), %r11d
	cmpl	(%r10,%rdx,4), %r11d
	jne	.LBB3_19
# %bb.20:                               #   in Loop: Header=BB3_18 Depth=2
	incq	%rdx
	cmpq	%rdx, %rax
	jne	.LBB3_18
# %bb.21:                               # %.loopexit
                                        #   in Loop: Header=BB3_17 Depth=1
	incl	%esi
	addl	%eax, %edi
	cmpl	%eax, %esi
	jl	.LBB3_17
.LBB3_22:                               # %.critedge
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	jmp	.LBB3_23
.LBB3_19:                               # %._crit_edge65.thread
	movl	$.L.str.9, %edi
                                        # kill: def $edx killed $edx killed $rdx
	xorl	%eax, %eax
	callq	printf
.LBB3_23:
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12matrixMulGPUPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12matrixMulGPUPiS_S_i,@object # @_Z12matrixMulGPUPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z12matrixMulGPUPiS_S_i
	.p2align	3, 0x0
_Z12matrixMulGPUPiS_S_i:
	.quad	_Z27__device_stub__matrixMulGPUPiS_S_i
	.size	_Z12matrixMulGPUPiS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d\t"
	.size	.L.str, 4

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%d"
	.size	.L.str.3, 3

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"GPU time: %f\n"
	.size	.L.str.7, 14

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"CPU time: %f"
	.size	.L.str.8, 13

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"FOUND ERROR at c[%d][%d]\n"
	.size	.L.str.9, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12matrixMulGPUPiS_S_i"
	.size	.L__unnamed_1, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"N?"
	.size	.Lstr, 3

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\nMatrix A:"
	.size	.Lstr.1, 11

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"\nMatrix B:"
	.size	.Lstr.2, 11

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"\n"
	.size	.Lstr.3, 2

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"\nSuccess!"
	.size	.Lstr.4, 10

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"\nResult:"
	.size	.Lstr.5, 9

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__matrixMulGPUPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12matrixMulGPUPiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12matrixMulGPUPiS_S_i ; -- Begin function _Z12matrixMulGPUPiS_S_i
	.globl	_Z12matrixMulGPUPiS_S_i
	.p2align	8
	.type	_Z12matrixMulGPUPiS_S_i,@function
_Z12matrixMulGPUPiS_S_i:                ; @_Z12matrixMulGPUPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s14, s3, v[1:2]
	v_mad_u64_u32 v[0:1], null, s15, s4, v[4:5]
	s_mov_b32 s3, exec_lo
	v_max_i32_e32 v1, v2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_lo_u32 v1, v2, s2
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s3, s2
	v_mov_b32_e32 v5, v0
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v6, 31, v5
	s_add_i32 s3, s3, -1
	s_cmp_eq_u32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	v_add_co_u32 v6, vcc_lo, s6, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	global_load_b32 v8, v[3:4], off
	global_load_b32 v9, v[6:7], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s2, v5
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v2, 0
.LBB0_5:                                ; %Flow46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12matrixMulGPUPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12matrixMulGPUPiS_S_i, .Lfunc_end0-_Z12matrixMulGPUPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 352
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12matrixMulGPUPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12matrixMulGPUPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
