#include<iostream>
using namespace std;
__global__ void add(int *a,int*b,int *c,int n)
{
  int row=blockIdx.y*blockDim.y+threadIdx.y;
  int col=blockIdx.x*blockDim.x+threadIdx.x;
  int sum=0;
  for(int i=0;i<n;i++)
  {
    sum=sum+a[row*n+i]*b[i*n+col];
  }
  c[row*n+col]=sum;
}

int main()
{
  cout<<"Enter size of matrix";
  int n;
  cin>>n;
  int a[n][n],b[n][n],c[n][n];
  for(int i=0;i<n;i++)
  {
    for(int j=0;j<n;j++)
    {
    cin>>a[i][j];
  }
}
  cout<<"Enter the 2nd matrix";
  for(int i=0;i<n;i++)
  {
    for(int j=0;j<n;j++)
    {
    cin>>b[i][j];
  }
}
  int *ad,*bd,*cd;
  int size;
  size=n*n*sizeof(int);
  cudaMalloc(&ad,size);
  cudaMalloc(&bd,size);
  cudaMalloc(&cd,size);
  cudaMemcpy(ad,a,size,cudaMemcpyHostToDevice);
  cudaMemcpy(bd,b,size,cudaMemcpyHostToDevice);
  cudaEvent_t start,end;
  dim3 grid(n,n,n);
  dim3 block(1,1,1);
  cudaEventCreate(&start);
  cudaEventCreate(&end);
  cudaEventRecord(start);
  add <<<grid,size>>>(ad,bd,cd,n);
  cudaEventRecord(end);
  float time=0;
  cudaEventElapsedTime(&time,start,end);
  cudaMemcpy(c,cd,size,cudaMemcpyDeviceToHost);

  	for(int i=0;i<n;i++)
  	{
  		for(int j=0;j<n;j++)
  		{
  		cout<<c[i][j]<<" ";
  		}
  		cout<<endl;
  	}
  cout<<"The time required is"<<time<<endl;

  }

	.file	"tmpxft_002332b9_00000000-6_cuda_matmatadd.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z27__device_stub__Z3addPiS_S_iPiS_S_i
	.type	_Z27__device_stub__Z3addPiS_S_iPiS_S_i, @function
_Z27__device_stub__Z3addPiS_S_iPiS_S_i:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z3addPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z27__device_stub__Z3addPiS_S_iPiS_S_i, .-_Z27__device_stub__Z3addPiS_S_iPiS_S_i
	.globl	_Z3addPiS_S_i
	.type	_Z3addPiS_S_i, @function
_Z3addPiS_S_i:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z3addPiS_S_iPiS_S_i
	.cfi_endproc
.LFE3661:
	.size	_Z3addPiS_S_i, .-_Z3addPiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Enter size of matrix"
.LC1:
	.string	"Enter the 2nd matrix"
.LC3:
	.string	" "
.LC4:
	.string	"The time required is"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$120, %rsp
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	-124(%rbp), %rsi
	leaq	_ZSt3cin(%rip), %rdi
	call	_ZNSirsERi@PLT
	movslq	-124(%rbp), %rax
	movq	%rsp, %rcx
	leaq	0(,%rax,4), %r12
	imulq	%rax, %rax
	leaq	15(,%rax,4), %rax
	movq	%rax, %rsi
	movq	%rax, %rdx
	andq	$-4096, %rsi
	andq	$-16, %rdx
	subq	%rsi, %rcx
.L9:
	cmpq	%rcx, %rsp
	je	.L10
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L9
.L10:
	andl	$4095, %edx
	subq	%rdx, %rsp
	testq	%rdx, %rdx
	je	.L11
	orq	$0, -8(%rsp,%rdx)
.L11:
	movq	%rax, %rsi
	movq	%rsp, -136(%rbp)
	movq	%rax, %rdx
	movq	%rsp, %rcx
	andq	$-4096, %rsi
	andq	$-16, %rdx
	subq	%rsi, %rcx
.L12:
	cmpq	%rcx, %rsp
	je	.L13
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L12
.L13:
	andl	$4095, %edx
	subq	%rdx, %rsp
	testq	%rdx, %rdx
	je	.L14
	orq	$0, -8(%rsp,%rdx)
.L14:
	movq	%rsp, -144(%rbp)
	movq	%rax, %rdx
	movq	%rsp, %rcx
	andq	$-4096, %rax
	andq	$-16, %rdx
	subq	%rax, %rcx
.L15:
	cmpq	%rcx, %rsp
	je	.L16
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L15
.L16:
	movq	%rdx, %rax
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L17
	orq	$0, -8(%rsp,%rax)
.L17:
	movq	%rsp, -152(%rbp)
	movq	%r12, %r15
	xorl	%r14d, %r14d
	xorl	%r9d, %r9d
	shrq	$2, %r15
.L18:
	cmpl	%r9d, -124(%rbp)
	jle	.L20
	movq	-136(%rbp), %rax
	xorl	%ebx, %ebx
	leaq	(%rax,%r14,4), %r13
.L21:
	cmpl	%ebx, -124(%rbp)
	jle	.L42
	movq	%r13, %rsi
	leaq	_ZSt3cin(%rip), %rdi
	incl	%ebx
	addq	$4, %r13
	movl	%r9d, -156(%rbp)
	call	_ZNSirsERi@PLT
	movl	-156(%rbp), %r9d
	jmp	.L21
.L42:
	incl	%r9d
	addq	%r15, %r14
	jmp	.L18
.L20:
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	xorl	%r14d, %r14d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	xorl	%r9d, %r9d
.L22:
	movl	-124(%rbp), %eax
	cmpl	%r9d, %eax
	jle	.L24
	movq	-144(%rbp), %rax
	xorl	%ebx, %ebx
	leaq	(%rax,%r14,4), %r13
.L25:
	cmpl	%ebx, -124(%rbp)
	jle	.L43
	movq	%r13, %rsi
	leaq	_ZSt3cin(%rip), %rdi
	incl	%ebx
	addq	$4, %r13
	movl	%r9d, -156(%rbp)
	call	_ZNSirsERi@PLT
	movl	-156(%rbp), %r9d
	jmp	.L25
.L43:
	incl	%r9d
	addq	%r15, %r14
	jmp	.L22
.L24:
	imull	%eax, %eax
	leaq	-120(%rbp), %rdi
	leal	0(,%rax,4), %r15d
	movslq	%r15d, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	-112(%rbp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	-104(%rbp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	-136(%rbp), %rsi
	movq	-120(%rbp), %rdi
	movq	%rbx, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	-144(%rbp), %rsi
	movq	-112(%rbp), %rdi
	movq	%rbx, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	-124(%rbp), %eax
	leaq	-96(%rbp), %rdi
	movl	%eax, -80(%rbp)
	movl	%eax, -76(%rbp)
	movl	%eax, -72(%rbp)
	call	cudaEventCreate@PLT
	leaq	-88(%rbp), %rdi
	call	cudaEventCreate@PLT
	movq	-96(%rbp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%r15d, -68(%rbp)
	movq	-80(%rbp), %rdi
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movl	-72(%rbp), %esi
	xorl	%r8d, %r8d
	movq	%rax, -64(%rbp)
	movl	-60(%rbp), %ecx
	movq	-68(%rbp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movl	-124(%rbp), %ecx
	movq	-104(%rbp), %rdx
	movq	-112(%rbp), %rsi
	movq	-120(%rbp), %rdi
	call	_Z27__device_stub__Z3addPiS_S_iPiS_S_i
.L26:
	movq	-88(%rbp), %rdi
	xorl	%esi, %esi
	xorl	%r13d, %r13d
	leaq	.LC3(%rip), %r14
	call	cudaEventRecord@PLT
	movq	-88(%rbp), %rdx
	movq	-96(%rbp), %rsi
	leaq	-68(%rbp), %rdi
	movl	$0x00000000, -68(%rbp)
	call	cudaEventElapsedTime@PLT
	movq	-104(%rbp), %rsi
	movq	%rbx, %rdx
	movq	-152(%rbp), %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	-152(%rbp), %rbx
.L27:
	cmpl	%r13d, -124(%rbp)
	jle	.L44
	xorl	%r15d, %r15d
.L29:
	cmpl	%r15d, -124(%rbp)
	jle	.L45
	movl	(%rbx,%r15,4), %esi
	leaq	_ZSt4cout(%rip), %rdi
	incq	%r15
	call	_ZNSolsEi@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L29
.L45:
	leaq	_ZSt4cout(%rip), %rdi
	incl	%r13d
	addq	%r12, %rbx
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	jmp	.L27
.L44:
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	-68(%rbp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z3addPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z3addPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<iostream>
using namespace std;
__global__ void add(int *a,int*b,int *c,int n)
{
  int row=blockIdx.y*blockDim.y+threadIdx.y;
  int col=blockIdx.x*blockDim.x+threadIdx.x;
  int sum=0;
  for(int i=0;i<n;i++)
  {
    sum=sum+a[row*n+i]*b[i*n+col];
  }
  c[row*n+col]=sum;
}

int main()
{
  cout<<"Enter size of matrix";
  int n;
  cin>>n;
  int a[n][n],b[n][n],c[n][n];
  for(int i=0;i<n;i++)
  {
    for(int j=0;j<n;j++)
    {
    cin>>a[i][j];
  }
}
  cout<<"Enter the 2nd matrix";
  for(int i=0;i<n;i++)
  {
    for(int j=0;j<n;j++)
    {
    cin>>b[i][j];
  }
}
  int *ad,*bd,*cd;
  int size;
  size=n*n*sizeof(int);
  hipMalloc(&ad,size);
  hipMalloc(&bd,size);
  hipMalloc(&cd,size);
  hipMemcpy(ad,a,size,hipMemcpyHostToDevice);
  hipMemcpy(bd,b,size,hipMemcpyHostToDevice);
  hipEvent_t start,end;
  dim3 grid(n,n,n);
  dim3 block(1,1,1);
  hipEventCreate(&start);
  hipEventCreate(&end);
  hipEventRecord(start);
  add <<<grid,size>>>(ad,bd,cd,n);
  hipEventRecord(end);
  float time=0;
  hipEventElapsedTime(&time,start,end);
  hipMemcpy(c,cd,size,hipMemcpyDeviceToHost);

  	for(int i=0;i<n;i++)
  	{
  		for(int j=0;j<n;j++)
  		{
  		cout<<c[i][j]<<" ";
  		}
  		cout<<endl;
  	}
  cout<<"The time required is"<<time<<endl;

  }

	.text
	.file	"cuda_matmatadd.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z18__device_stub__addPiS_S_i   # -- Begin function _Z18__device_stub__addPiS_S_i
	.type	_Z18__device_stub__addPiS_S_i,@function
_Z18__device_stub__addPiS_S_i:          # @_Z18__device_stub__addPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3addPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z18__device_stub__addPiS_S_i, .Lfunc_end0-_Z18__device_stub__addPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$104, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	-44(%rbp), %r14
	movl	$_ZSt3cin, %edi
	movq	%r14, %rsi
	callq	_ZNSirsERi
	movq	%rsp, -112(%rbp)                # 8-byte Spill
	movl	(%r14), %eax
	movq	%rax, %rbx
	imulq	%rax, %rax
	movq	%rsp, %rcx
	leaq	15(,%rax,4), %rax
	andq	$-16, %rax
	subq	%rax, %rcx
	movq	%rcx, -80(%rbp)                 # 8-byte Spill
	movq	%rcx, %rsp
	movl	(%r14), %ecx
	movq	%rcx, %rax
	imulq	%rcx, %rax
	movq	%rsp, %rdx
	leaq	15(,%rax,4), %rax
	andq	$-16, %rax
	subq	%rax, %rdx
	movq	%rdx, -72(%rbp)                 # 8-byte Spill
	movq	%rdx, %rsp
	movq	%rsp, %rdx
	subq	%rax, %rdx
	movq	%rdx, -104(%rbp)                # 8-byte Spill
	movq	%rdx, %rsp
	movq	%rcx, %rax
	movq	%rcx, -56(%rbp)                 # 8-byte Spill
	testl	%ecx, %ecx
	jle	.LBB1_5
# %bb.1:                                # %.preheader39.preheader
	shlq	$2, %rbx
	xorl	%r15d, %r15d
	movq	-80(%rbp), %r13                 # 8-byte Reload
	movq	-56(%rbp), %rax                 # 8-byte Reload
                                        # kill: def $eax killed $eax killed $rax
.LBB1_2:                                # %.preheader39
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_20 Depth 2
	testl	%eax, %eax
	jle	.LBB1_3
# %bb.19:                               # %.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	movq	%r13, %r12
	xorl	%r14d, %r14d
.LBB1_20:                               #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$_ZSt3cin, %edi
	movq	%r12, %rsi
	callq	_ZNSirsERi
	incq	%r14
	movl	-44(%rbp), %eax
	movslq	%eax, %rcx
	addq	$4, %r12
	cmpq	%rcx, %r14
	jl	.LBB1_20
	jmp	.LBB1_4
.LBB1_3:                                # %.preheader39.._crit_edge_crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	movslq	%eax, %rcx
.LBB1_4:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r15
	addq	%rbx, %r13
	cmpq	%rcx, %r15
	jl	.LBB1_2
.LBB1_5:                                # %._crit_edge42
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	-44(%rbp), %r12d
	testl	%r12d, %r12d
	jle	.LBB1_10
# %bb.6:                                # %.preheader38.preheader
	movq	-56(%rbp), %rax                 # 8-byte Reload
	leaq	(,%rax,4), %rax
	movq	%rax, -120(%rbp)                # 8-byte Spill
	xorl	%r15d, %r15d
	movq	-72(%rbp), %r14                 # 8-byte Reload
.LBB1_7:                                # %.preheader38
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_22 Depth 2
	testl	%r12d, %r12d
	jle	.LBB1_8
# %bb.21:                               # %.lr.ph44
                                        #   in Loop: Header=BB1_7 Depth=1
	movq	%r14, %r13
	xorl	%ebx, %ebx
.LBB1_22:                               #   Parent Loop BB1_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$_ZSt3cin, %edi
	movq	%r13, %rsi
	callq	_ZNSirsERi
	incq	%rbx
	movl	-44(%rbp), %r12d
	movslq	%r12d, %rax
	addq	$4, %r13
	cmpq	%rax, %rbx
	jl	.LBB1_22
	jmp	.LBB1_9
.LBB1_8:                                # %.preheader38.._crit_edge45_crit_edge
                                        #   in Loop: Header=BB1_7 Depth=1
	movslq	%r12d, %rax
.LBB1_9:                                # %._crit_edge45
                                        #   in Loop: Header=BB1_7 Depth=1
	incq	%r15
	addq	-120(%rbp), %r14                # 8-byte Folded Reload
	cmpq	%rax, %r15
	jl	.LBB1_7
.LBB1_10:                               # %._crit_edge47
	imull	%r12d, %r12d
	shll	$2, %r12d
	movslq	%r12d, %r13
	leaq	-144(%rbp), %r14
	movq	%r14, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	-136(%rbp), %r15
	movq	%r15, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	-96(%rbp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	(%r14), %rdi
	movq	-80(%rbp), %rsi                 # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movq	-72(%rbp), %rsi                 # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	-44(%rbp), %r14d
	movq	%r14, %r15
	shlq	$32, %r15
	orq	%r14, %r15
	leaq	-128(%rbp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	leaq	-88(%rbp), %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	btsq	$32, %r12
	movq	%r15, %rdi
	movl	%r14d, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.11:
	movq	-144(%rbp), %rdi
	movq	-136(%rbp), %rsi
	movq	-96(%rbp), %rdx
	movl	-44(%rbp), %ecx
	callq	_Z18__device_stub__addPiS_S_i
.LBB1_12:
	movq	-88(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	-60(%rbp), %rdi
	movl	$0, (%rdi)
	movq	-128(%rbp), %rsi
	movq	-88(%rbp), %rdx
	callq	hipEventElapsedTime
	movq	-96(%rbp), %rsi
	movq	-104(%rbp), %rbx                # 8-byte Reload
	movq	%rbx, %rdi
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	-44(%rbp), %eax
	testl	%eax, %eax
	jle	.LBB1_18
# %bb.13:                               # %.preheader.preheader
	movq	-56(%rbp), %rcx                 # 8-byte Reload
	leaq	(,%rcx,4), %r14
	xorl	%r15d, %r15d
	movl	$_ZSt4cout, %r12d
.LBB1_14:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_16 Depth 2
	testl	%eax, %eax
	jle	.LBB1_17
# %bb.15:                               # %.lr.ph49
                                        #   in Loop: Header=BB1_14 Depth=1
	xorl	%r13d, %r13d
.LBB1_16:                               #   Parent Loop BB1_14 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbx,%r13,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r13
	movslq	-44(%rbp), %rax
	cmpq	%rax, %r13
	jl	.LBB1_16
.LBB1_17:                               # %._crit_edge50
                                        #   in Loop: Header=BB1_14 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r15
	movslq	-44(%rbp), %rax
	addq	%r14, %rbx
	cmpq	%rax, %r15
	jl	.LBB1_14
.LBB1_18:                               # %._crit_edge52
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtss2sd	-60(%rbp), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	-112(%rbp), %rsp                # 8-byte Reload
	xorl	%eax, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3addPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z3addPiS_S_i,@object           # @_Z3addPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z3addPiS_S_i
	.p2align	3, 0x0
_Z3addPiS_S_i:
	.quad	_Z18__device_stub__addPiS_S_i
	.size	_Z3addPiS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Enter size of matrix"
	.size	.L.str, 21

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Enter the 2nd matrix"
	.size	.L.str.1, 21

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" "
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"The time required is"
	.size	.L.str.3, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3addPiS_S_i"
	.size	.L__unnamed_1, 14

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__addPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3addPiS_S_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym _ZSt3cin
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3addPiS_S_i           ; -- Begin function _Z3addPiS_S_i
	.globl	_Z3addPiS_S_i
	.p2align	8
	.type	_Z3addPiS_S_i,@function
_Z3addPiS_S_i:                          ; @_Z3addPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s8, s3, 16
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s8, v[1:2]
	v_and_b32_e32 v3, 0x3ff, v0
	s_cmp_lt_i32 s2, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[0:1], null, s14, s3, v[3:4]
	v_mul_lo_u32 v1, v2, s2
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s3, s2
	v_mov_b32_e32 v5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_mov_b32_e32 v2, 0
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v6, 31, v5
	s_add_i32 s3, s3, -1
	s_cmp_eq_u32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	v_add_co_u32 v6, vcc_lo, s6, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	global_load_b32 v8, v[3:4], off
	global_load_b32 v9, v[6:7], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s2, v5
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_4
.LBB0_3:
	v_mov_b32_e32 v2, 0
.LBB0_4:                                ; %Flow40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3addPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3addPiS_S_i, .Lfunc_end0-_Z3addPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 324
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3addPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3addPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
