#include<stdio.h>
#include<math.h>
#include <fstream>
#include <iostream>

using namespace std;

#define THREADS_PER_BLOCK 1024
#define NUMBER_OF_BLOCKS 1024

#define DEBUG 0

//initially, 6 & 9

// number of threads_per_block*blocks should be atleast V-1.
// threads per block should be greater than or equal to number_of_blocks and both should be power of 2.
// only bcz of the restriction of cuda kernel two.


// if the vertices begin with 1 not 0, be careful, got to map it accordingly.
//destinationVertexArray decrease the value of indices by 1, and when result is out, increase the indices by 1.
//R2 array will also begin with 2 in that case, as the R1 initialization would be 1.

void initializeGraph(int *indexArray , int *destinationVertexArray , int *weightArray, int edges, int vertices)
{

	// to be read from file or generators for now make static.

	
	int u = 1,v,w;
	int count = 0;
	int prev = 1;
	for(int i = 0 ; i < edges ; i++) 
	{
		prev = u;
       	cin >>u>>v>>w;
	   	if(prev == u)
	   	{
			count++;
		}	
	   	else
	   	{
		   indexArray[prev] = count + indexArray[prev-1];
		   count = 1;
	   	}	
	   	destinationVertexArray[i] = v-1;
	   	weightArray[i] = w;
    }

}




// R1 source, R2 destination,R3 weight
void initMSTEdgeList(int *R1 , int *R2 , int *R3, int *indexArray , int *destinationVertexArray, int *weightArray, int vertices)
{
	for(int v = indexArray[0] ; v < indexArray[1] ; v++)
	{
		// update weight of adjacent vertices of vertex 0. -1 bcz counting at r2 starts from 1 i.e at index 0 vertex 1 is placed.
		// So correspondingly for R3.
		R3[destinationVertexArray[v]-1] = weightArray[v];
	}	

	for(int i = 0;i< vertices-1;i++)
	{
		R2[i] = i+1;
		R1[i] = 0;
	}
}


void printArray(int *a  , int size)
{
    for(int i = 0; i < size ; i++)
        printf("%d\t",a[i]);
    printf("\n");
}


__global__ void updateMSTList(int startIndex,int endIndex, int *d_nearestVertex, int *destinationVertexArray,int *weightArray,int *d_R1,int *d_R2,int *d_R3)
{
	int threadId = blockIdx.x * THREADS_PER_BLOCK + threadIdx.x;
	int offset = startIndex;
	
	if((threadId+offset) >= startIndex && (threadId+offset) <= endIndex)
	{
		int destVertex = destinationVertexArray[threadId+offset];
		if(destVertex != 0)
		{
			if(d_R2[destVertex-1] != 0)
			{
				if(d_R3[destVertex-1] > weightArray[threadId+offset] )
				{
					d_R3[destVertex-1] = weightArray[threadId+offset];
					d_R1[destVertex-1] = *d_nearestVertex;
				}
			}
		}
	}
}

__global__ void findNearestVertexKernelOne( int *d_R2 , int *d_R3, int *T1, int *T2, int *d_nearestVertex,int secondKernelRequired,int vertices)
{
	int blockNo = blockIdx.x;
	int threadId =  blockNo * THREADS_PER_BLOCK + threadIdx.x;

	__shared__ int	r2[THREADS_PER_BLOCK],r3[THREADS_PER_BLOCK];	
  
	r2[threadIdx.x] = 0;	
	r3[threadIdx.x] = 10000;	

	if(threadId < vertices-1)
	{
		r2[threadIdx.x] = d_R2[threadId];
		r3[threadIdx.x] = d_R3[threadId];
	
	__syncthreads();
	
	
	int i = 0;
	for(i = THREADS_PER_BLOCK/2; i > 0 ; i = i>>1)
	{
		if(threadIdx.x < i)
		{
			if(r2[threadIdx.x] != 0 && r2[i + threadIdx.x]!=0)
			{
				// we also want to store the indices of the minimum location, so that we can get the desired vertex.
				if(r3[threadIdx.x] > r3[i+threadIdx.x])
				{
					//update index.
					r2[threadIdx.x] = r2[i+threadIdx.x];
					//update weight.
					r3[threadIdx.x] = r3[i+threadIdx.x];
				}	
				//else its the same.
			}
			else if(r2[threadIdx.x] == 0 && r2[i+threadIdx.x] == 0)
			{
				// do nothing
			}
			else if(r2[threadIdx.x] == 0 && r2[i+threadIdx.x] != 0)
			{
				r2[threadIdx.x] = r2[i+threadIdx.x];
				r3[threadIdx.x] = r3[i+threadIdx.x];
			}
			// else same present value needs to be considered in the 4th case.
		}
		__syncthreads();
				
	}	
		// only one value needed, first thread will write.
		if(threadIdx.x == 0)
		{
			if(!secondKernelRequired)
			{
				// update the nearest_Vertex
				*d_nearestVertex = r2[0];
			    // mark vertex as used..
			 	 d_R2[r2[0]-1] = 0;
			}
			// for multiple blocks, because they are in the shared memory, set T1 T2 here which is index and weight for second kernel..		
			else
			{
				T1[blockIdx.x] = r2[0];
				T2[blockIdx.x] = r3[0];
			}	
		}
			
	}


}


__global__ void findNearestVertexKernelTwo(int *d_R1 , int *d_R2 , int *d_R3 , int *d_T1, int *d_T2, int *d_nearestVertex)
{

	// no need to use the shared memory, only one block.	
	
    for(int i = NUMBER_OF_BLOCKS/2; i > 0 ; i = i>>1)
    {
        if(threadIdx.x < i)
        {
            if(d_T1[threadIdx.x] != 0 && d_T1[i + threadIdx.x]!=0)
            {
                // we also want to store the indices of the minimum location, so that we can get the desired vertex.
                if(d_T2[threadIdx.x] > d_T2[i+threadIdx.x])
                {
                    //update index.
                    d_T1[threadIdx.x] = d_T1[i+threadIdx.x];
                    //update weight.
                    d_T2[threadIdx.x] = d_T2[i+threadIdx.x];
                }
                //else its the same.
            }
            else if(d_T1[threadIdx.x] == 0 && d_T1[i+threadIdx.x] == 0)
            {
            	// do nothing
			}
            else if(d_T1[threadIdx.x] == 0 && d_T1[i+threadIdx.x] != 0)
            {
                d_T1[threadIdx.x] = d_T1[i+threadIdx.x];
                d_T2[threadIdx.x] = d_T2[i+threadIdx.x];
            }
            // else same present value needs to be considered in the 4th case.
        }
        __syncthreads();

    }

	if(threadIdx.x == 0)
    {
		*d_nearestVertex = d_T1[0];
         d_R2[d_T1[0]-1] = 0;
    }

}


int main()
{
	// graph representatioon arrays
	int *h_indexArray;
	int *h_weightArray;
	int *h_destinationVertexArray;

	int secondKernelRequired = 0;

	// device Graph	
	int *d_indexArray;
	int *d_weightArray;
	int *d_destinationVertexArray;


	// MST Edge list
	int *h_R1;
	int *h_R2;
	int *h_R3;
	int *h_nearestVertex;
   	int *h_T1;
	int *h_T2;
 
	// device MST list	
	int *d_R1;
	int *d_R2;
	int *d_R3;
	int *d_nearestVertex;
   	int *d_T1;
	int *d_T2;


	int edges,vertices;
    cin>>vertices>>edges;	

	cout << vertices << edges<< endl;
	edges = edges/2;		
	// iteration indexes for updation
	int startIndex, endIndex;
	
	// allocate memory to compact adjacency list

	h_indexArray = (int *)malloc(vertices * sizeof(int));
    h_weightArray = (int *)malloc(2 * edges * sizeof(int));
    h_destinationVertexArray = (int *)malloc(2 * edges * sizeof(int));
	h_nearestVertex = (int *)malloc(sizeof(int));
	
	memset(h_indexArray,0,vertices * sizeof(int));
	memset(h_weightArray,0,2 * edges * sizeof(int));
	memset(h_destinationVertexArray,0,2 * edges * sizeof(int));
	*h_nearestVertex = 0;
	
	h_R1 = (int *)malloc((vertices-1) * sizeof(int));
	h_R2 = (int *)malloc((vertices-1) * sizeof(int));
	h_R3 = (int *)malloc((vertices-1) * sizeof(int));

	h_T1 = (int *)malloc(NUMBER_OF_BLOCKS * sizeof(int));
	h_T2 = (int *)malloc(NUMBER_OF_BLOCKS * sizeof(int));
	
	memset(h_R3,1,(vertices-1)*sizeof(int));
	memset(h_T1,0,NUMBER_OF_BLOCKS * sizeof(int));
	memset(h_T2,0,NUMBER_OF_BLOCKS * sizeof(int));

	initializeGraph(h_indexArray,h_destinationVertexArray,h_weightArray,2*edges,vertices);


	
	initMSTEdgeList(h_R1,h_R2,h_R3,h_indexArray,h_destinationVertexArray,h_weightArray,vertices);	


	// cuda memory allocation of graph representation
	cudaMalloc(&d_indexArray,(vertices) * sizeof(int));
	cudaMalloc(&d_weightArray,2 * edges * sizeof(int));
	cudaMalloc(&d_destinationVertexArray,2 * edges * sizeof(int));
	cudaMalloc(&d_nearestVertex,sizeof(int));

	// cuda memory allocation of MST list
	cudaMalloc(&d_R1,(vertices-1) * sizeof(int));
	cudaMalloc(&d_R2,(vertices-1) * sizeof(int));
	cudaMalloc(&d_R3,(vertices-1) * sizeof(int));
	cudaMalloc(&d_T1, NUMBER_OF_BLOCKS * sizeof(int));
	cudaMalloc(&d_T2, NUMBER_OF_BLOCKS * sizeof(int));
	
	// start time
	 cudaEvent_t start, stop;
	 float time;
     cudaEventCreate(&start);
     cudaEventCreate(&stop);
     cudaEventRecord( start, 0 );

	// copy host to device graph and initial MST list
		
	cudaMemcpy(d_indexArray,h_indexArray, vertices* sizeof(int),cudaMemcpyHostToDevice);
	cudaMemcpy(d_destinationVertexArray,h_destinationVertexArray, 2 * edges * sizeof(int),cudaMemcpyHostToDevice);
	cudaMemcpy(d_weightArray,h_weightArray,2 * edges * sizeof(int),cudaMemcpyHostToDevice);
	cudaMemcpy(d_nearestVertex,h_nearestVertex,sizeof(int),cudaMemcpyHostToDevice);
		
	cudaMemcpy(d_R1,h_R1, (vertices - 1)* sizeof(int),cudaMemcpyHostToDevice);
	cudaMemcpy(d_R2,h_R2, (vertices - 1)* sizeof(int),cudaMemcpyHostToDevice);
	cudaMemcpy(d_R3,h_R3, (vertices - 1)* sizeof(int),cudaMemcpyHostToDevice);


	// MEMSET T1 AND T2
	cudaMemset(d_T1,0,NUMBER_OF_BLOCKS * sizeof(int));
	cudaMemset(d_T2,0,NUMBER_OF_BLOCKS * sizeof(int));

	if(DEBUG)
	{
		printArray(h_R1,vertices-1);
		printArray(h_R2,vertices-1);
		printArray(h_R3,vertices-1);
	}
	
	
	if( vertices-1 > THREADS_PER_BLOCK)
	{
		secondKernelRequired = 1;
	}
	
	
	

	// kernel launch
	for(int v = 0 ; v < vertices-2; v++)
	{
		findNearestVertexKernelOne<<<NUMBER_OF_BLOCKS,THREADS_PER_BLOCK>>>(d_R2, d_R3, d_T1, d_T2, d_nearestVertex,secondKernelRequired,vertices);

		if(secondKernelRequired)
		{
			if(DEBUG)
			{
				printf("\n Yes Requird \n");
				cudaMemcpy(h_T1,d_T1, NUMBER_OF_BLOCKS* sizeof(int),cudaMemcpyDeviceToHost);
				cudaMemcpy(h_T2,d_T2, NUMBER_OF_BLOCKS * sizeof(int),cudaMemcpyDeviceToHost);
				printArray(h_T1,NUMBER_OF_BLOCKS);
				printArray(h_T2,NUMBER_OF_BLOCKS);
			}
			findNearestVertexKernelTwo<<<1,THREADS_PER_BLOCK>>>(d_R1, d_R2, d_R3, d_T1, d_T2, d_nearestVertex);
		}	
		
		if(DEBUG)
		{	
			cudaMemcpy(h_R1,d_R1, (vertices - 1)* sizeof(int),cudaMemcpyDeviceToHost);
			cudaMemcpy(h_R2,d_R2, (vertices - 1)* sizeof(int),cudaMemcpyDeviceToHost);
			cudaMemcpy(h_R3,d_R3, (vertices - 1)* sizeof(int),cudaMemcpyDeviceToHost);
			printf("\nAfter Minimum\n");
			printArray(h_R1,vertices-1);
			printArray(h_R2,vertices-1);
			printArray(h_R3,vertices-1);
			printf("%d\n",*h_nearestVertex);
		}
		cudaMemcpy(h_nearestVertex,d_nearestVertex,  sizeof(int),cudaMemcpyDeviceToHost);
		startIndex = h_indexArray[*h_nearestVertex];
		if(*(h_nearestVertex) == vertices-1)
        		endIndex = 2*edges-1;
	    	else
        		endIndex = h_indexArray[*(h_nearestVertex)+1]-1;
		if(DEBUG)
		{
			printf("\nstart : %d  end : %d\n",startIndex,endIndex);
		}
		
		// update the list
		updateMSTList<<<NUMBER_OF_BLOCKS,THREADS_PER_BLOCK>>>(startIndex, endIndex , d_nearestVertex, d_destinationVertexArray, d_weightArray, d_R1, d_R2, d_R3);
		if(DEBUG)
		{
			cudaMemcpy(h_R1,d_R1, (vertices - 1)* sizeof(int),cudaMemcpyDeviceToHost);
			cudaMemcpy(h_R2,d_R2, (vertices - 1)* sizeof(int),cudaMemcpyDeviceToHost);
			cudaMemcpy(h_R3,d_R3, (vertices - 1)* sizeof(int),cudaMemcpyDeviceToHost);
			cudaMemcpy(h_nearestVertex,d_nearestVertex,  sizeof(int),cudaMemcpyDeviceToHost);
			printf("\nAfter Update\n");
			printArray(h_R1,vertices-1);
			printArray(h_R2,vertices-1);
			printArray(h_R3,vertices-1);
			printf("%d\n",*h_nearestVertex);
		}
	}

	// for generating the output...
	
	cudaMemcpy(h_R1,d_R1, (vertices - 1)* sizeof(int),cudaMemcpyDeviceToHost);
	cudaMemcpy(h_R2,d_R2, (vertices - 1)* sizeof(int),cudaMemcpyDeviceToHost);
	cudaMemcpy(h_R3,d_R3, (vertices - 1)* sizeof(int),cudaMemcpyDeviceToHost);
	
	// end time
	cudaEventRecord( stop, 0 );
   	cudaEventSynchronize( stop );
   	cudaEventElapsedTime( &time, start, stop );
   	cudaEventDestroy( start );
   	cudaEventDestroy( stop );


	printf("u\tv\tw\n");
	long cost = 0;
	for(int i = 0; i < vertices-1;i++)
	{
		printf("%d\t%d\t%d\t\n",h_R1[i]+1,i+2,h_R3[i]);
		cost = cost + h_R3[i];
	}
	cout<<"\ncost:"<<cost;
		
	printf("\nTime: %fms\n",time);


}
        

	.file	"tmpxft_00333d5b_00000000-6_ParallelPrim.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3772:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3772:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0, @function
_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0:
.LFB4450:
	.cfi_startproc
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE4450:
	.size	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0, .-_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	.globl	_Z15initializeGraphPiS_S_ii
	.type	_Z15initializeGraphPiS_S_ii, @function
_Z15initializeGraphPiS_S_ii:
.LFB3766:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%ecx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movl	$1, 28(%rsp)
.L4:
	cmpl	%ebp, %r13d
	jle	.L11
	leaq	28(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	movslq	28(%rsp), %r12
	leaq	_ZSt3cin(%rip), %rdi
	call	_ZNSirsERi@PLT
	leaq	32(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSirsERi@PLT
	leaq	36(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSirsERi@PLT
	cmpl	%r12d, 28(%rsp)
	movq	8(%rsp), %rdx
	jne	.L5
	incl	%ebx
	jmp	.L6
.L5:
	addl	-4(%r15,%r12,4), %ebx
	movl	%ebx, (%r15,%r12,4)
	movl	$1, %ebx
.L6:
	movl	32(%rsp), %eax
	decl	%eax
	movl	%eax, (%r14,%rbp,4)
	movl	36(%rsp), %eax
	movl	%eax, (%rdx,%rbp,4)
	incq	%rbp
	jmp	.L4
.L11:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3766:
	.size	_Z15initializeGraphPiS_S_ii, .-_Z15initializeGraphPiS_S_ii
	.globl	_Z15initMSTEdgeListPiS_S_S_S_S_i
	.type	_Z15initMSTEdgeListPiS_S_S_S_S_i, @function
_Z15initMSTEdgeListPiS_S_S_S_S_i:
.LFB3767:
	.cfi_startproc
	endbr64
	movslq	(%rcx), %rax
.L13:
	cmpl	%eax, 4(%rcx)
	jle	.L17
	movl	(%r9,%rax,4), %r11d
	movslq	(%r8,%rax,4), %r10
	incq	%rax
	movl	%r11d, -4(%rdx,%r10,4)
	jmp	.L13
.L17:
	movl	8(%rsp), %edx
	xorl	%eax, %eax
	decl	%edx
.L15:
	cmpl	%eax, %edx
	jle	.L18
	leal	1(%rax), %ecx
	movl	%ecx, (%rsi,%rax,4)
	xorl	%ecx, %ecx
	movl	%ecx, (%rdi,%rax,4)
	incq	%rax
	jmp	.L15
.L18:
	ret
	.cfi_endproc
.LFE3767:
	.size	_Z15initMSTEdgeListPiS_S_S_S_S_i, .-_Z15initMSTEdgeListPiS_S_S_S_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d\t"
.LC1:
	.string	"\n"
	.text
	.globl	_Z10printArrayPii
	.type	_Z10printArrayPii, @function
_Z10printArrayPii:
.LFB3768:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC0(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 48
.L20:
	cmpl	%ebx, %ebp
	jle	.L23
	movl	(%r12,%rbx,4), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L20
.L23:
	popq	%rdx
	.cfi_def_cfa_offset 40
	leaq	.LC1(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE3768:
	.size	_Z10printArrayPii, .-_Z10printArrayPii
	.globl	_Z45__device_stub__Z13updateMSTListiiPiS_S_S_S_S_iiPiS_S_S_S_S_
	.type	_Z45__device_stub__Z13updateMSTListiiPiS_S_S_S_S_iiPiS_S_S_S_S_, @function
_Z45__device_stub__Z13updateMSTListiiPiS_S_S_S_S_iiPiS_S_S_S_S_:
.LFB3794:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	224(%rsp), %rax
	movl	%edi, 60(%rsp)
	leaq	88(%rsp), %rdi
	movl	%esi, 56(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movq	232(%rsp), %rax
	movq	%rdx, 48(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 40(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, 32(%rsp)
	movq	%r9, 24(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	60(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	80(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z13updateMSTListiiPiS_S_S_S_S_(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 240
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L24:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3794:
	.size	_Z45__device_stub__Z13updateMSTListiiPiS_S_S_S_S_iiPiS_S_S_S_S_, .-_Z45__device_stub__Z13updateMSTListiiPiS_S_S_S_S_iiPiS_S_S_S_S_
	.globl	_Z13updateMSTListiiPiS_S_S_S_S_
	.type	_Z13updateMSTListiiPiS_S_S_S_S_, @function
_Z13updateMSTListiiPiS_S_S_S_S_:
.LFB3795:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z13updateMSTListiiPiS_S_S_S_S_iiPiS_S_S_S_S_
	.cfi_endproc
.LFE3795:
	.size	_Z13updateMSTListiiPiS_S_S_S_S_, .-_Z13updateMSTListiiPiS_S_S_S_S_
	.globl	_Z56__device_stub__Z26findNearestVertexKernelOnePiS_S_S_S_iiPiS_S_S_S_ii
	.type	_Z56__device_stub__Z26findNearestVertexKernelOnePiS_S_S_S_iiPiS_S_S_S_ii, @function
_Z56__device_stub__Z26findNearestVertexKernelOnePiS_S_S_S_iiPiS_S_S_S_ii:
.LFB3796:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z26findNearestVertexKernelOnePiS_S_S_S_ii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L29:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3796:
	.size	_Z56__device_stub__Z26findNearestVertexKernelOnePiS_S_S_S_iiPiS_S_S_S_ii, .-_Z56__device_stub__Z26findNearestVertexKernelOnePiS_S_S_S_iiPiS_S_S_S_ii
	.globl	_Z26findNearestVertexKernelOnePiS_S_S_S_ii
	.type	_Z26findNearestVertexKernelOnePiS_S_S_S_ii, @function
_Z26findNearestVertexKernelOnePiS_S_S_S_ii:
.LFB3797:
	.cfi_startproc
	endbr64
	jmp	_Z56__device_stub__Z26findNearestVertexKernelOnePiS_S_S_S_iiPiS_S_S_S_ii
	.cfi_endproc
.LFE3797:
	.size	_Z26findNearestVertexKernelOnePiS_S_S_S_ii, .-_Z26findNearestVertexKernelOnePiS_S_S_S_ii
	.globl	_Z56__device_stub__Z26findNearestVertexKernelTwoPiS_S_S_S_S_PiS_S_S_S_S_
	.type	_Z56__device_stub__Z26findNearestVertexKernelTwoPiS_S_S_S_S_PiS_S_S_S_S_, @function
_Z56__device_stub__Z26findNearestVertexKernelTwoPiS_S_S_S_S_PiS_S_S_S_S_:
.LFB3798:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z26findNearestVertexKernelTwoPiS_S_S_S_S_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L34:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3798:
	.size	_Z56__device_stub__Z26findNearestVertexKernelTwoPiS_S_S_S_S_PiS_S_S_S_S_, .-_Z56__device_stub__Z26findNearestVertexKernelTwoPiS_S_S_S_S_PiS_S_S_S_S_
	.globl	_Z26findNearestVertexKernelTwoPiS_S_S_S_S_
	.type	_Z26findNearestVertexKernelTwoPiS_S_S_S_S_, @function
_Z26findNearestVertexKernelTwoPiS_S_S_S_S_:
.LFB3799:
	.cfi_startproc
	endbr64
	jmp	_Z56__device_stub__Z26findNearestVertexKernelTwoPiS_S_S_S_S_PiS_S_S_S_S_
	.cfi_endproc
.LFE3799:
	.size	_Z26findNearestVertexKernelTwoPiS_S_S_S_S_, .-_Z26findNearestVertexKernelTwoPiS_S_S_S_S_
	.section	.rodata.str1.1
.LC2:
	.string	"u\tv\tw\n"
.LC3:
	.string	"%d\t%d\t%d\t\n"
.LC4:
	.string	"\ncost:"
.LC5:
	.string	"\nTime: %fms\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3769:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	_ZSt3cin(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	52(%rsp), %rsi
	call	_ZNSirsERi@PLT
	leaq	48(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSirsERi@PLT
	movl	52(%rsp), %esi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSolsEi@PLT
	movl	48(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	48(%rsp), %eax
	movl	$2, %ecx
	movslq	52(%rsp), %rbx
	cltd
	movl	%ebx, 44(%rsp)
	salq	$2, %rbx
	idivl	%ecx
	movq	%rbx, %rdi
	movl	%eax, %ebp
	movl	%eax, 48(%rsp)
	call	malloc@PLT
	addl	%ebp, %ebp
	movslq	%ebp, %r14
	movq	%rax, (%rsp)
	salq	$2, %r14
	movq	%r14, %rdi
	call	malloc@PLT
	movq	%r14, %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$4, %edi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rbx, %rcx
	movq	%rbx, %rdx
	xorl	%esi, %esi
	movq	%rax, %r13
	call	__memset_chk@PLT
	movq	%r14, %rcx
	movq	%r14, %rdx
	xorl	%esi, %esi
	movq	%r12, %rdi
	call	__memset_chk@PLT
	movq	16(%rsp), %rdi
	movq	%r14, %rcx
	movq	%r14, %rdx
	xorl	%esi, %esi
	call	__memset_chk@PLT
	xorl	%r8d, %r8d
	leaq	-4(%rbx), %rax
	movl	%r8d, 0(%r13)
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r15
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movl	$4096, %edi
	movq	%rax, %r14
	call	malloc@PLT
	movl	$4096, %edi
	movq	%rax, 32(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rcx
	movl	$1, %esi
	movq	%r14, %rdi
	movq	%rax, %rbx
	movq	%rcx, %rdx
	call	__memset_chk@PLT
	movq	32(%rsp), %rdi
	xorl	%eax, %eax
	movq	%r12, %rdx
	movl	$1024, %ecx
	movl	44(%rsp), %r8d
	movq	16(%rsp), %rsi
	rep stosl
	movq	%rbx, %rdi
	movl	$1024, %ecx
	rep stosl
	movq	(%rsp), %rdi
	movl	%ebp, %ecx
	call	_Z15initializeGraphPiS_S_ii
	movl	52(%rsp), %ebx
	movq	%r14, %rdx
	movq	%r15, %rdi
	pushq	%r9
	.cfi_def_cfa_offset 248
	movq	%r12, %r9
	pushq	%rbx
	.cfi_def_cfa_offset 256
	movq	32(%rsp), %r8
	movq	16(%rsp), %rcx
	movq	40(%rsp), %rsi
	call	_Z15initMSTEdgeListPiS_S_S_S_S_i
	popq	%r10
	.cfi_def_cfa_offset 248
	movslq	%ebx, %rsi
	popq	%r11
	.cfi_def_cfa_offset 240
	salq	$2, %rsi
	leaq	56(%rsp), %rdi
	movl	$4194305, %ebx
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movl	48(%rsp), %eax
	leaq	64(%rsp), %rdi
	leal	(%rax,%rax), %esi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movl	48(%rsp), %eax
	leaq	72(%rsp), %rdi
	leal	(%rax,%rax), %esi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	leaq	104(%rsp), %rdi
	movl	$4, %esi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movl	52(%rsp), %eax
	leaq	80(%rsp), %rdi
	leal	-1(%rax), %esi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movl	52(%rsp), %eax
	leaq	88(%rsp), %rdi
	leal	-1(%rax), %esi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movl	52(%rsp), %eax
	leaq	96(%rsp), %rdi
	leal	-1(%rax), %esi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	leaq	112(%rsp), %rdi
	movl	$4096, %esi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movl	$4096, %esi
	leaq	120(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	leaq	128(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	136(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	128(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movslq	52(%rsp), %rdx
	movq	(%rsp), %rsi
	movl	$1, %ecx
	movq	56(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	48(%rsp), %eax
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	72(%rsp), %rdi
	leal	(%rax,%rax), %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	48(%rsp), %eax
	movq	64(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	leal	(%rax,%rax), %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	104(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	52(%rsp), %eax
	movq	80(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	leal	-1(%rax), %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	52(%rsp), %eax
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	88(%rsp), %rdi
	leal	-1(%rax), %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	52(%rsp), %eax
	movq	96(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	leal	-1(%rax), %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	112(%rsp), %rdi
	xorl	%esi, %esi
	movl	$4096, %edx
	call	cudaMemset@PLT
	movq	120(%rsp), %rdi
	xorl	%esi, %esi
	movl	$4096, %edx
	call	cudaMemset@PLT
	movl	52(%rsp), %eax
	cmpl	$1025, %eax
	movl	%eax, 8(%rsp)
	setg	%al
	xorl	%r12d, %r12d
	salq	$10, %rbx
	movzbl	%al, %eax
	movl	%eax, 32(%rsp)
.L40:
	movl	52(%rsp), %edx
	leal	-2(%rdx), %eax
	cmpl	%eax, %r12d
	jge	.L52
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, 156(%rsp)
	movl	$1, 164(%rsp)
	movq	%rbx, 144(%rsp)
	movl	$1, 152(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	pushq	%rcx
	.cfi_def_cfa_offset 248
	movl	60(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 256
	movl	48(%rsp), %r9d
	movq	120(%rsp), %r8
	movq	136(%rsp), %rcx
	movq	128(%rsp), %rdx
	movq	112(%rsp), %rsi
	movq	104(%rsp), %rdi
	call	_Z56__device_stub__Z26findNearestVertexKernelOnePiS_S_S_S_iiPiS_S_S_S_ii
	popq	%rsi
	.cfi_def_cfa_offset 248
	popq	%rdi
	.cfi_def_cfa_offset 240
.L41:
	cmpl	$1025, 8(%rsp)
	jle	.L42
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rbx, 156(%rsp)
	movl	$1, 164(%rsp)
	movq	%rdi, 144(%rsp)
	movl	$1, 152(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	movq	104(%rsp), %r9
	movq	120(%rsp), %r8
	movq	112(%rsp), %rcx
	movq	96(%rsp), %rdx
	movq	88(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z56__device_stub__Z26findNearestVertexKernelTwoPiS_S_S_S_S_PiS_S_S_S_S_
.L42:
	movq	104(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movslq	0(%r13), %rax
	movq	(%rsp), %rsi
	movq	%rax, %rdx
	leaq	0(,%rax,4), %rcx
	movl	(%rsi,%rax,4), %eax
	movl	%eax, 16(%rsp)
	movl	52(%rsp), %eax
	decl	%eax
	cmpl	%eax, %edx
	jne	.L44
	movl	48(%rsp), %eax
	leal	-1(%rax,%rax), %ebp
	jmp	.L45
.L44:
	movq	(%rsp), %rax
	movl	4(%rax,%rcx), %ebp
	decl	%ebp
.L45:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, 156(%rsp)
	movl	$1, 164(%rsp)
	movq	%rbx, 144(%rsp)
	movl	$1, 152(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	pushq	96(%rsp)
	.cfi_def_cfa_offset 248
	movl	%ebp, %esi
	pushq	96(%rsp)
	.cfi_def_cfa_offset 256
	movq	96(%rsp), %r9
	movq	80(%rsp), %r8
	movq	88(%rsp), %rcx
	movq	120(%rsp), %rdx
	movl	32(%rsp), %edi
	call	_Z45__device_stub__Z13updateMSTListiiPiS_S_S_S_S_iiPiS_S_S_S_S_
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L46:
	incl	%r12d
	jmp	.L40
.L52:
	decl	%edx
	movq	80(%rsp), %rsi
	movl	$2, %ecx
	movq	%r15, %rdi
	movslq	%edx, %rdx
	xorl	%ebx, %ebx
	leaq	.LC3(%rip), %r12
	xorl	%ebp, %ebp
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	52(%rsp), %eax
	movq	88(%rsp), %rsi
	movl	$2, %ecx
	movq	24(%rsp), %rdi
	leal	-1(%rax), %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	52(%rsp), %eax
	movq	96(%rsp), %rsi
	movq	%r14, %rdi
	movl	$2, %ecx
	leal	-1(%rax), %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	136(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	136(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	136(%rsp), %rdx
	movq	128(%rsp), %rsi
	leaq	156(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	128(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	136(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L48:
	movl	52(%rsp), %eax
	decl	%eax
	cmpl	%ebx, %eax
	jle	.L53
	movl	(%r15,%rbx,4), %eax
	movl	(%r14,%rbx,4), %r8d
	leal	2(%rbx), %ecx
	movq	%r12, %rsi
	movl	$2, %edi
	leal	1(%rax), %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movslq	(%r14,%rbx,4), %rax
	incq	%rbx
	addq	%rax, %rbp
	jmp	.L48
.L53:
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIlEERSoT_@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	156(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3769:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z26findNearestVertexKernelTwoPiS_S_S_S_S_"
.LC7:
	.string	"_Z26findNearestVertexKernelOnePiS_S_S_S_ii"
.LC8:
	.string	"_Z13updateMSTListiiPiS_S_S_S_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3801:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z26findNearestVertexKernelTwoPiS_S_S_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z26findNearestVertexKernelOnePiS_S_S_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13updateMSTListiiPiS_S_S_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3801:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<stdio.h>
#include<math.h>
#include <fstream>
#include <iostream>

using namespace std;

#define THREADS_PER_BLOCK 1024
#define NUMBER_OF_BLOCKS 1024

#define DEBUG 0

//initially, 6 & 9

// number of threads_per_block*blocks should be atleast V-1.
// threads per block should be greater than or equal to number_of_blocks and both should be power of 2.
// only bcz of the restriction of cuda kernel two.


// if the vertices begin with 1 not 0, be careful, got to map it accordingly.
//destinationVertexArray decrease the value of indices by 1, and when result is out, increase the indices by 1.
//R2 array will also begin with 2 in that case, as the R1 initialization would be 1.

void initializeGraph(int *indexArray , int *destinationVertexArray , int *weightArray, int edges, int vertices)
{

	// to be read from file or generators for now make static.

	
	int u = 1,v,w;
	int count = 0;
	int prev = 1;
	for(int i = 0 ; i < edges ; i++) 
	{
		prev = u;
       	cin >>u>>v>>w;
	   	if(prev == u)
	   	{
			count++;
		}	
	   	else
	   	{
		   indexArray[prev] = count + indexArray[prev-1];
		   count = 1;
	   	}	
	   	destinationVertexArray[i] = v-1;
	   	weightArray[i] = w;
    }

}




// R1 source, R2 destination,R3 weight
void initMSTEdgeList(int *R1 , int *R2 , int *R3, int *indexArray , int *destinationVertexArray, int *weightArray, int vertices)
{
	for(int v = indexArray[0] ; v < indexArray[1] ; v++)
	{
		// update weight of adjacent vertices of vertex 0. -1 bcz counting at r2 starts from 1 i.e at index 0 vertex 1 is placed.
		// So correspondingly for R3.
		R3[destinationVertexArray[v]-1] = weightArray[v];
	}	

	for(int i = 0;i< vertices-1;i++)
	{
		R2[i] = i+1;
		R1[i] = 0;
	}
}


void printArray(int *a  , int size)
{
    for(int i = 0; i < size ; i++)
        printf("%d\t",a[i]);
    printf("\n");
}


__global__ void updateMSTList(int startIndex,int endIndex, int *d_nearestVertex, int *destinationVertexArray,int *weightArray,int *d_R1,int *d_R2,int *d_R3)
{
	int threadId = blockIdx.x * THREADS_PER_BLOCK + threadIdx.x;
	int offset = startIndex;
	
	if((threadId+offset) >= startIndex && (threadId+offset) <= endIndex)
	{
		int destVertex = destinationVertexArray[threadId+offset];
		if(destVertex != 0)
		{
			if(d_R2[destVertex-1] != 0)
			{
				if(d_R3[destVertex-1] > weightArray[threadId+offset] )
				{
					d_R3[destVertex-1] = weightArray[threadId+offset];
					d_R1[destVertex-1] = *d_nearestVertex;
				}
			}
		}
	}
}

__global__ void findNearestVertexKernelOne( int *d_R2 , int *d_R3, int *T1, int *T2, int *d_nearestVertex,int secondKernelRequired,int vertices)
{
	int blockNo = blockIdx.x;
	int threadId =  blockNo * THREADS_PER_BLOCK + threadIdx.x;

	__shared__ int	r2[THREADS_PER_BLOCK],r3[THREADS_PER_BLOCK];	
  
	r2[threadIdx.x] = 0;	
	r3[threadIdx.x] = 10000;	

	if(threadId < vertices-1)
	{
		r2[threadIdx.x] = d_R2[threadId];
		r3[threadIdx.x] = d_R3[threadId];
	
	__syncthreads();
	
	
	int i = 0;
	for(i = THREADS_PER_BLOCK/2; i > 0 ; i = i>>1)
	{
		if(threadIdx.x < i)
		{
			if(r2[threadIdx.x] != 0 && r2[i + threadIdx.x]!=0)
			{
				// we also want to store the indices of the minimum location, so that we can get the desired vertex.
				if(r3[threadIdx.x] > r3[i+threadIdx.x])
				{
					//update index.
					r2[threadIdx.x] = r2[i+threadIdx.x];
					//update weight.
					r3[threadIdx.x] = r3[i+threadIdx.x];
				}	
				//else its the same.
			}
			else if(r2[threadIdx.x] == 0 && r2[i+threadIdx.x] == 0)
			{
				// do nothing
			}
			else if(r2[threadIdx.x] == 0 && r2[i+threadIdx.x] != 0)
			{
				r2[threadIdx.x] = r2[i+threadIdx.x];
				r3[threadIdx.x] = r3[i+threadIdx.x];
			}
			// else same present value needs to be considered in the 4th case.
		}
		__syncthreads();
				
	}	
		// only one value needed, first thread will write.
		if(threadIdx.x == 0)
		{
			if(!secondKernelRequired)
			{
				// update the nearest_Vertex
				*d_nearestVertex = r2[0];
			    // mark vertex as used..
			 	 d_R2[r2[0]-1] = 0;
			}
			// for multiple blocks, because they are in the shared memory, set T1 T2 here which is index and weight for second kernel..		
			else
			{
				T1[blockIdx.x] = r2[0];
				T2[blockIdx.x] = r3[0];
			}	
		}
			
	}


}


__global__ void findNearestVertexKernelTwo(int *d_R1 , int *d_R2 , int *d_R3 , int *d_T1, int *d_T2, int *d_nearestVertex)
{

	// no need to use the shared memory, only one block.	
	
    for(int i = NUMBER_OF_BLOCKS/2; i > 0 ; i = i>>1)
    {
        if(threadIdx.x < i)
        {
            if(d_T1[threadIdx.x] != 0 && d_T1[i + threadIdx.x]!=0)
            {
                // we also want to store the indices of the minimum location, so that we can get the desired vertex.
                if(d_T2[threadIdx.x] > d_T2[i+threadIdx.x])
                {
                    //update index.
                    d_T1[threadIdx.x] = d_T1[i+threadIdx.x];
                    //update weight.
                    d_T2[threadIdx.x] = d_T2[i+threadIdx.x];
                }
                //else its the same.
            }
            else if(d_T1[threadIdx.x] == 0 && d_T1[i+threadIdx.x] == 0)
            {
            	// do nothing
			}
            else if(d_T1[threadIdx.x] == 0 && d_T1[i+threadIdx.x] != 0)
            {
                d_T1[threadIdx.x] = d_T1[i+threadIdx.x];
                d_T2[threadIdx.x] = d_T2[i+threadIdx.x];
            }
            // else same present value needs to be considered in the 4th case.
        }
        __syncthreads();

    }

	if(threadIdx.x == 0)
    {
		*d_nearestVertex = d_T1[0];
         d_R2[d_T1[0]-1] = 0;
    }

}


int main()
{
	// graph representatioon arrays
	int *h_indexArray;
	int *h_weightArray;
	int *h_destinationVertexArray;

	int secondKernelRequired = 0;

	// device Graph	
	int *d_indexArray;
	int *d_weightArray;
	int *d_destinationVertexArray;


	// MST Edge list
	int *h_R1;
	int *h_R2;
	int *h_R3;
	int *h_nearestVertex;
   	int *h_T1;
	int *h_T2;
 
	// device MST list	
	int *d_R1;
	int *d_R2;
	int *d_R3;
	int *d_nearestVertex;
   	int *d_T1;
	int *d_T2;


	int edges,vertices;
    cin>>vertices>>edges;	

	cout << vertices << edges<< endl;
	edges = edges/2;		
	// iteration indexes for updation
	int startIndex, endIndex;
	
	// allocate memory to compact adjacency list

	h_indexArray = (int *)malloc(vertices * sizeof(int));
    h_weightArray = (int *)malloc(2 * edges * sizeof(int));
    h_destinationVertexArray = (int *)malloc(2 * edges * sizeof(int));
	h_nearestVertex = (int *)malloc(sizeof(int));
	
	memset(h_indexArray,0,vertices * sizeof(int));
	memset(h_weightArray,0,2 * edges * sizeof(int));
	memset(h_destinationVertexArray,0,2 * edges * sizeof(int));
	*h_nearestVertex = 0;
	
	h_R1 = (int *)malloc((vertices-1) * sizeof(int));
	h_R2 = (int *)malloc((vertices-1) * sizeof(int));
	h_R3 = (int *)malloc((vertices-1) * sizeof(int));

	h_T1 = (int *)malloc(NUMBER_OF_BLOCKS * sizeof(int));
	h_T2 = (int *)malloc(NUMBER_OF_BLOCKS * sizeof(int));
	
	memset(h_R3,1,(vertices-1)*sizeof(int));
	memset(h_T1,0,NUMBER_OF_BLOCKS * sizeof(int));
	memset(h_T2,0,NUMBER_OF_BLOCKS * sizeof(int));

	initializeGraph(h_indexArray,h_destinationVertexArray,h_weightArray,2*edges,vertices);


	
	initMSTEdgeList(h_R1,h_R2,h_R3,h_indexArray,h_destinationVertexArray,h_weightArray,vertices);	


	// cuda memory allocation of graph representation
	hipMalloc(&d_indexArray,(vertices) * sizeof(int));
	hipMalloc(&d_weightArray,2 * edges * sizeof(int));
	hipMalloc(&d_destinationVertexArray,2 * edges * sizeof(int));
	hipMalloc(&d_nearestVertex,sizeof(int));

	// cuda memory allocation of MST list
	hipMalloc(&d_R1,(vertices-1) * sizeof(int));
	hipMalloc(&d_R2,(vertices-1) * sizeof(int));
	hipMalloc(&d_R3,(vertices-1) * sizeof(int));
	hipMalloc(&d_T1, NUMBER_OF_BLOCKS * sizeof(int));
	hipMalloc(&d_T2, NUMBER_OF_BLOCKS * sizeof(int));
	
	// start time
	 hipEvent_t start, stop;
	 float time;
     hipEventCreate(&start);
     hipEventCreate(&stop);
     hipEventRecord( start, 0 );

	// copy host to device graph and initial MST list
		
	hipMemcpy(d_indexArray,h_indexArray, vertices* sizeof(int),hipMemcpyHostToDevice);
	hipMemcpy(d_destinationVertexArray,h_destinationVertexArray, 2 * edges * sizeof(int),hipMemcpyHostToDevice);
	hipMemcpy(d_weightArray,h_weightArray,2 * edges * sizeof(int),hipMemcpyHostToDevice);
	hipMemcpy(d_nearestVertex,h_nearestVertex,sizeof(int),hipMemcpyHostToDevice);
		
	hipMemcpy(d_R1,h_R1, (vertices - 1)* sizeof(int),hipMemcpyHostToDevice);
	hipMemcpy(d_R2,h_R2, (vertices - 1)* sizeof(int),hipMemcpyHostToDevice);
	hipMemcpy(d_R3,h_R3, (vertices - 1)* sizeof(int),hipMemcpyHostToDevice);


	// MEMSET T1 AND T2
	hipMemset(d_T1,0,NUMBER_OF_BLOCKS * sizeof(int));
	hipMemset(d_T2,0,NUMBER_OF_BLOCKS * sizeof(int));

	if(DEBUG)
	{
		printArray(h_R1,vertices-1);
		printArray(h_R2,vertices-1);
		printArray(h_R3,vertices-1);
	}
	
	
	if( vertices-1 > THREADS_PER_BLOCK)
	{
		secondKernelRequired = 1;
	}
	
	
	

	// kernel launch
	for(int v = 0 ; v < vertices-2; v++)
	{
		findNearestVertexKernelOne<<<NUMBER_OF_BLOCKS,THREADS_PER_BLOCK>>>(d_R2, d_R3, d_T1, d_T2, d_nearestVertex,secondKernelRequired,vertices);

		if(secondKernelRequired)
		{
			if(DEBUG)
			{
				printf("\n Yes Requird \n");
				hipMemcpy(h_T1,d_T1, NUMBER_OF_BLOCKS* sizeof(int),hipMemcpyDeviceToHost);
				hipMemcpy(h_T2,d_T2, NUMBER_OF_BLOCKS * sizeof(int),hipMemcpyDeviceToHost);
				printArray(h_T1,NUMBER_OF_BLOCKS);
				printArray(h_T2,NUMBER_OF_BLOCKS);
			}
			findNearestVertexKernelTwo<<<1,THREADS_PER_BLOCK>>>(d_R1, d_R2, d_R3, d_T1, d_T2, d_nearestVertex);
		}	
		
		if(DEBUG)
		{	
			hipMemcpy(h_R1,d_R1, (vertices - 1)* sizeof(int),hipMemcpyDeviceToHost);
			hipMemcpy(h_R2,d_R2, (vertices - 1)* sizeof(int),hipMemcpyDeviceToHost);
			hipMemcpy(h_R3,d_R3, (vertices - 1)* sizeof(int),hipMemcpyDeviceToHost);
			printf("\nAfter Minimum\n");
			printArray(h_R1,vertices-1);
			printArray(h_R2,vertices-1);
			printArray(h_R3,vertices-1);
			printf("%d\n",*h_nearestVertex);
		}
		hipMemcpy(h_nearestVertex,d_nearestVertex,  sizeof(int),hipMemcpyDeviceToHost);
		startIndex = h_indexArray[*h_nearestVertex];
		if(*(h_nearestVertex) == vertices-1)
        		endIndex = 2*edges-1;
	    	else
        		endIndex = h_indexArray[*(h_nearestVertex)+1]-1;
		if(DEBUG)
		{
			printf("\nstart : %d  end : %d\n",startIndex,endIndex);
		}
		
		// update the list
		updateMSTList<<<NUMBER_OF_BLOCKS,THREADS_PER_BLOCK>>>(startIndex, endIndex , d_nearestVertex, d_destinationVertexArray, d_weightArray, d_R1, d_R2, d_R3);
		if(DEBUG)
		{
			hipMemcpy(h_R1,d_R1, (vertices - 1)* sizeof(int),hipMemcpyDeviceToHost);
			hipMemcpy(h_R2,d_R2, (vertices - 1)* sizeof(int),hipMemcpyDeviceToHost);
			hipMemcpy(h_R3,d_R3, (vertices - 1)* sizeof(int),hipMemcpyDeviceToHost);
			hipMemcpy(h_nearestVertex,d_nearestVertex,  sizeof(int),hipMemcpyDeviceToHost);
			printf("\nAfter Update\n");
			printArray(h_R1,vertices-1);
			printArray(h_R2,vertices-1);
			printArray(h_R3,vertices-1);
			printf("%d\n",*h_nearestVertex);
		}
	}

	// for generating the output...
	
	hipMemcpy(h_R1,d_R1, (vertices - 1)* sizeof(int),hipMemcpyDeviceToHost);
	hipMemcpy(h_R2,d_R2, (vertices - 1)* sizeof(int),hipMemcpyDeviceToHost);
	hipMemcpy(h_R3,d_R3, (vertices - 1)* sizeof(int),hipMemcpyDeviceToHost);
	
	// end time
	hipEventRecord( stop, 0 );
   	hipEventSynchronize( stop );
   	hipEventElapsedTime( &time, start, stop );
   	hipEventDestroy( start );
   	hipEventDestroy( stop );


	printf("u\tv\tw\n");
	long cost = 0;
	for(int i = 0; i < vertices-1;i++)
	{
		printf("%d\t%d\t%d\t\n",h_R1[i]+1,i+2,h_R3[i]);
		cost = cost + h_R3[i];
	}
	cout<<"\ncost:"<<cost;
		
	printf("\nTime: %fms\n",time);


}
        

	.text
	.file	"ParallelPrim.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z15initializeGraphPiS_S_ii     # -- Begin function _Z15initializeGraphPiS_S_ii
	.type	_Z15initializeGraphPiS_S_ii,@function
_Z15initializeGraphPiS_S_ii:            # @_Z15initializeGraphPiS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
	movl	$1, 4(%rsp)
	testl	%ecx, %ecx
	jle	.LBB0_6
# %bb.1:                                # %.lr.ph.preheader
	movq	%rsi, %r14
	movq	%rdi, %r15
	movl	%ecx, %r12d
	xorl	%r13d, %r13d
	movl	$1, %ebx
	xorl	%ebp, %ebp
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$_ZSt3cin, %edi
	leaq	4(%rsp), %rsi
	callq	_ZNSirsERi
	movq	%rax, %rdi
	leaq	12(%rsp), %rsi
	callq	_ZNSirsERi
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZNSirsERi
	movl	4(%rsp), %eax
	cmpl	%eax, %ebx
	jne	.LBB0_4
# %bb.3:                                #   in Loop: Header=BB0_2 Depth=1
	incl	%ebp
	jmp	.LBB0_5
.LBB0_4:                                #   in Loop: Header=BB0_2 Depth=1
	movslq	%ebx, %rcx
	addl	-4(%r15,%rcx,4), %ebp
	movl	%ebp, (%r15,%rcx,4)
	movl	$1, %ebp
.LBB0_5:                                #   in Loop: Header=BB0_2 Depth=1
	movl	12(%rsp), %ecx
	decl	%ecx
	movl	%ecx, (%r14,%r13,4)
	movl	8(%rsp), %ecx
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	%ecx, (%rdx,%r13,4)
	incq	%r13
	movl	%eax, %ebx
	cmpq	%r13, %r12
	jne	.LBB0_2
.LBB0_6:                                # %._crit_edge
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z15initializeGraphPiS_S_ii, .Lfunc_end0-_Z15initializeGraphPiS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z15initMSTEdgeListPiS_S_S_S_S_i # -- Begin function _Z15initMSTEdgeListPiS_S_S_S_S_i
	.type	_Z15initMSTEdgeListPiS_S_S_S_S_i,@function
_Z15initMSTEdgeListPiS_S_S_S_S_i:       # @_Z15initMSTEdgeListPiS_S_S_S_S_i
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	16(%rsp), %eax
	movslq	(%rcx), %r10
	cmpl	4(%rcx), %r10d
	jge	.LBB1_1
.LBB1_5:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r9,%r10,4), %r11d
	movslq	(%r8,%r10,4), %rbx
	movl	%r11d, -4(%rdx,%rbx,4)
	incq	%r10
	movslq	4(%rcx), %r11
	cmpq	%r11, %r10
	jl	.LBB1_5
.LBB1_1:                                # %.preheader
	cmpl	$2, %eax
	jl	.LBB1_4
# %bb.2:                                # %.lr.ph19.preheader
	decl	%eax
	xorl	%ecx, %ecx
.LBB1_3:                                # %.lr.ph19
                                        # =>This Inner Loop Header: Depth=1
	leaq	1(%rcx), %rdx
	movl	%edx, (%rsi,%rcx,4)
	movl	$0, (%rdi,%rcx,4)
	movq	%rdx, %rcx
	cmpq	%rdx, %rax
	jne	.LBB1_3
.LBB1_4:                                # %._crit_edge
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z15initMSTEdgeListPiS_S_S_S_S_i, .Lfunc_end1-_Z15initMSTEdgeListPiS_S_S_S_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z10printArrayPii               # -- Begin function _Z10printArrayPii
	.type	_Z10printArrayPii,@function
_Z10printArrayPii:                      # @_Z10printArrayPii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB2_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB2_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB2_4:                                # %._crit_edge
	movl	$10, %edi
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end2:
	.size	_Z10printArrayPii, .Lfunc_end2-_Z10printArrayPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__updateMSTListiiPiS_S_S_S_S_ # -- Begin function _Z28__device_stub__updateMSTListiiPiS_S_S_S_S_
	.type	_Z28__device_stub__updateMSTListiiPiS_S_S_S_S_,@function
_Z28__device_stub__updateMSTListiiPiS_S_S_S_S_: # @_Z28__device_stub__updateMSTListiiPiS_S_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13updateMSTListiiPiS_S_S_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z28__device_stub__updateMSTListiiPiS_S_S_S_S_, .Lfunc_end3-_Z28__device_stub__updateMSTListiiPiS_S_S_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z41__device_stub__findNearestVertexKernelOnePiS_S_S_S_ii # -- Begin function _Z41__device_stub__findNearestVertexKernelOnePiS_S_S_S_ii
	.type	_Z41__device_stub__findNearestVertexKernelOnePiS_S_S_S_ii,@function
_Z41__device_stub__findNearestVertexKernelOnePiS_S_S_S_ii: # @_Z41__device_stub__findNearestVertexKernelOnePiS_S_S_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z26findNearestVertexKernelOnePiS_S_S_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z41__device_stub__findNearestVertexKernelOnePiS_S_S_S_ii, .Lfunc_end4-_Z41__device_stub__findNearestVertexKernelOnePiS_S_S_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z41__device_stub__findNearestVertexKernelTwoPiS_S_S_S_S_ # -- Begin function _Z41__device_stub__findNearestVertexKernelTwoPiS_S_S_S_S_
	.type	_Z41__device_stub__findNearestVertexKernelTwoPiS_S_S_S_S_,@function
_Z41__device_stub__findNearestVertexKernelTwoPiS_S_S_S_S_: # @_Z41__device_stub__findNearestVertexKernelTwoPiS_S_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z26findNearestVertexKernelTwoPiS_S_S_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z41__device_stub__findNearestVertexKernelTwoPiS_S_S_S_S_, .Lfunc_end5-_Z41__device_stub__findNearestVertexKernelTwoPiS_S_S_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	8(%rsp), %r14
	movl	$_ZSt3cin, %edi
	movq	%r14, %rsi
	callq	_ZNSirsERi
	leaq	12(%rsp), %rbx
	movq	%rax, %rdi
	movq	%rbx, %rsi
	callq	_ZNSirsERi
	movl	(%r14), %esi
	movq	%r14, %r15
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	(%rbx), %esi
	movq	%rax, %rdi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	(%rbx), %eax
	movl	%eax, %ebp
	shrl	$31, %ebp
	addl	%eax, %ebp
	movl	%ebp, %eax
	sarl	%eax
	movl	%eax, (%rbx)
	movslq	(%r15), %r14
	leaq	(,%r14,4), %rsi
	movl	$1, %edi
	callq	calloc@PLT
	movq	%rax, %r15
	andl	$-2, %ebp
	movslq	%ebp, %r13
	leaq	(,%r13,4), %rbx
	movl	$1, %edi
	movq	%rbx, %rsi
	callq	calloc@PLT
	movq	%rax, %rbp
	movl	$1, %edi
	movq	%rbx, %rsi
	callq	calloc@PLT
	movq	%rax, %rbx
	movl	$4, %edi
	callq	malloc
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	movl	$0, (%rax)
	leaq	-4(,%r14,4), %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%rax, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	callq	memset@PLT
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movq	%rbp, %rdx
	movl	%r13d, %ecx
	callq	_Z15initializeGraphPiS_S_ii
	leaq	8(%rsp), %rax
	movslq	(%rax), %r12
	movslq	(%r15), %rax
	movq	%r15, 104(%rsp)                 # 8-byte Spill
	movslq	4(%r15), %rcx
	cmpl	%ecx, %eax
	jge	.LBB6_1
.LBB6_22:                               # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbp,%rax,4), %edx
	movslq	(%rbx,%rax,4), %rsi
	movl	%edx, -4(%r14,%rsi,4)
	incq	%rax
	cmpq	%rax, %rcx
	jne	.LBB6_22
.LBB6_1:                                # %.preheader.i
	cmpl	$2, %r12d
	movq	56(%rsp), %rcx                  # 8-byte Reload
	jl	.LBB6_4
# %bb.2:                                # %.lr.ph19.preheader.i
	leal	-1(%r12), %r15d
	leaq	(,%r15,4), %rdx
	xorl	%r13d, %r13d
	movq	64(%rsp), %rdi                  # 8-byte Reload
	xorl	%esi, %esi
	callq	memset@PLT
	movq	56(%rsp), %rcx                  # 8-byte Reload
.LBB6_3:                                # %.lr.ph19.i
                                        # =>This Inner Loop Header: Depth=1
	leaq	1(%r13), %rax
	movl	%eax, (%rcx,%r13,4)
	movq	%rax, %r13
	cmpq	%rax, %r15
	jne	.LBB6_3
.LBB6_4:                                # %_Z15initMSTEdgeListPiS_S_S_S_S_i.exit
	shlq	$2, %r12
	leaq	144(%rsp), %rdi
	movq	%rcx, %r13
	movq	%r12, %rsi
	callq	hipMalloc
	movslq	12(%rsp), %rsi
	shlq	$3, %rsi
	leaq	128(%rsp), %rdi
	callq	hipMalloc
	movslq	12(%rsp), %rsi
	shlq	$3, %rsi
	leaq	120(%rsp), %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	movslq	8(%rsp), %rax
	leaq	-4(,%rax,4), %rsi
	leaq	48(%rsp), %rdi
	callq	hipMalloc
	movslq	8(%rsp), %rax
	leaq	-4(,%rax,4), %rsi
	leaq	32(%rsp), %rdi
	callq	hipMalloc
	movslq	8(%rsp), %rax
	leaq	-4(,%rax,4), %rsi
	leaq	24(%rsp), %rdi
	callq	hipMalloc
	leaq	80(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	leaq	72(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	leaq	112(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	144(%rsp), %rax
	movq	(%rax), %rdi
	movslq	8(%rsp), %rdx
	shlq	$2, %rdx
	movq	104(%rsp), %r12                 # 8-byte Reload
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	120(%rsp), %rax
	movq	(%rax), %rdi
	movslq	12(%rsp), %rdx
	shlq	$3, %rdx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	128(%rsp), %rax
	movq	(%rax), %rdi
	movslq	12(%rsp), %rdx
	shlq	$3, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movl	$4, %edx
	movq	96(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %rax
	movq	(%rax), %rdi
	movslq	8(%rsp), %rax
	leaq	-4(,%rax,4), %rdx
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %rax
	movq	(%rax), %rdi
	movslq	8(%rsp), %rax
	leaq	-4(,%rax,4), %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %rax
	movq	(%rax), %rdi
	movslq	8(%rsp), %rax
	leaq	-4(,%rax,4), %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	80(%rsp), %rax
	movq	(%rax), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	xorl	%esi, %esi
	callq	hipMemset
	leaq	72(%rsp), %rax
	movq	(%rax), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	xorl	%esi, %esi
	callq	hipMemset
	movl	8(%rsp), %r13d
	xorl	%ecx, %ecx
	cmpl	$1026, %r13d                    # imm = 0x402
	setge	%al
	cmpl	$3, %r13d
	jl	.LBB6_5
# %bb.10:                               # %.lr.ph.preheader
	movb	%al, %cl
	movl	%ecx, 88(%rsp)                  # 4-byte Spill
	movabsq	$4294968320, %rbp               # imm = 0x100000400
	leaq	-1023(%rbp), %rax
	movq	%rax, 136(%rsp)                 # 8-byte Spill
.LBB6_11:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_13
# %bb.12:                               #   in Loop: Header=BB6_11 Depth=1
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	80(%rsp), %rdx
	movq	72(%rsp), %rcx
	movq	16(%rsp), %r8
	movl	8(%rsp), %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	96(%rsp), %r9d                  # 4-byte Reload
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z41__device_stub__findNearestVertexKernelOnePiS_S_S_S_ii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB6_13:                               #   in Loop: Header=BB6_11 Depth=1
	cmpl	$1026, %r13d                    # imm = 0x402
	jl	.LBB6_16
# %bb.14:                               #   in Loop: Header=BB6_11 Depth=1
	movq	136(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_16
# %bb.15:                               #   in Loop: Header=BB6_11 Depth=1
	movq	48(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	80(%rsp), %rcx
	movq	72(%rsp), %r8
	movq	16(%rsp), %r9
	callq	_Z41__device_stub__findNearestVertexKernelTwoPiS_S_S_S_S_
.LBB6_16:                               #   in Loop: Header=BB6_11 Depth=1
	movq	16(%rsp), %rsi
	movl	$4, %edx
	movq	96(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movslq	(%rbx), %rax
	movl	(%r12,%rax,4), %ebx
	movl	8(%rsp), %ecx
	decl	%ecx
	cmpl	%ecx, %eax
	jne	.LBB6_18
# %bb.17:                               #   in Loop: Header=BB6_11 Depth=1
	movl	12(%rsp), %r12d
	addl	%r12d, %r12d
	jmp	.LBB6_19
.LBB6_18:                               #   in Loop: Header=BB6_11 Depth=1
	movl	4(%r12,%rax,4), %r12d
.LBB6_19:                               #   in Loop: Header=BB6_11 Depth=1
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_21
# %bb.20:                               #   in Loop: Header=BB6_11 Depth=1
	decl	%r12d
	movq	16(%rsp), %rdx
	movq	120(%rsp), %rcx
	movq	128(%rsp), %r8
	movq	48(%rsp), %r9
	movl	%ebx, %edi
	movl	%r12d, %esi
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__updateMSTListiiPiS_S_S_S_S_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB6_21:                               #   in Loop: Header=BB6_11 Depth=1
	incl	%r15d
	movl	8(%rsp), %eax
	leal	-2(%rax), %ecx
	cmpl	%ecx, %r15d
	movq	104(%rsp), %r12                 # 8-byte Reload
	jl	.LBB6_11
	jmp	.LBB6_6
.LBB6_5:
	movl	%r13d, %eax
.LBB6_6:                                # %._crit_edge
	movq	48(%rsp), %rsi
	cltq
	leaq	-4(,%rax,4), %rdx
	movq	64(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rsi
	movslq	8(%rsp), %rax
	leaq	-4(,%rax,4), %rdx
	movq	56(%rsp), %rdi                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	movslq	8(%rsp), %rax
	leaq	-4(,%rax,4), %rdx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rdi
	xorl	%ebx, %ebx
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	40(%rsp), %rdi
	callq	hipEventSynchronize
	movq	112(%rsp), %rsi
	movq	40(%rsp), %rdx
	leaq	92(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	112(%rsp), %rdi
	callq	hipEventDestroy
	movq	40(%rsp), %rdi
	callq	hipEventDestroy
	movl	$.Lstr, %edi
	callq	puts@PLT
	cmpl	$2, 8(%rsp)
	jl	.LBB6_9
# %bb.7:                                # %.lr.ph86.preheader
	xorl	%r15d, %r15d
	xorl	%ebx, %ebx
.LBB6_8:                                # %.lr.ph86
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r12,%r15,4), %esi
	incl	%esi
	movl	(%r14,%r15,4), %ecx
	leal	2(%r15), %edx
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movslq	(%r14,%r15,4), %rax
	addq	%rax, %rbx
	incq	%r15
	movslq	8(%rsp), %rax
	decq	%rax
	cmpq	%rax, %r15
	jl	.LBB6_8
.LBB6_9:                                # %._crit_edge87
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%rbx, %rsi
	callq	_ZNSo9_M_insertIlEERSoT_
	cvtss2sd	92(%rsp), %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13updateMSTListiiPiS_S_S_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z26findNearestVertexKernelOnePiS_S_S_S_ii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z26findNearestVertexKernelTwoPiS_S_S_S_S_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d\t"
	.size	.L.str, 4

	.type	_Z13updateMSTListiiPiS_S_S_S_S_,@object # @_Z13updateMSTListiiPiS_S_S_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z13updateMSTListiiPiS_S_S_S_S_
	.p2align	3, 0x0
_Z13updateMSTListiiPiS_S_S_S_S_:
	.quad	_Z28__device_stub__updateMSTListiiPiS_S_S_S_S_
	.size	_Z13updateMSTListiiPiS_S_S_S_S_, 8

	.type	_Z26findNearestVertexKernelOnePiS_S_S_S_ii,@object # @_Z26findNearestVertexKernelOnePiS_S_S_S_ii
	.globl	_Z26findNearestVertexKernelOnePiS_S_S_S_ii
	.p2align	3, 0x0
_Z26findNearestVertexKernelOnePiS_S_S_S_ii:
	.quad	_Z41__device_stub__findNearestVertexKernelOnePiS_S_S_S_ii
	.size	_Z26findNearestVertexKernelOnePiS_S_S_S_ii, 8

	.type	_Z26findNearestVertexKernelTwoPiS_S_S_S_S_,@object # @_Z26findNearestVertexKernelTwoPiS_S_S_S_S_
	.globl	_Z26findNearestVertexKernelTwoPiS_S_S_S_S_
	.p2align	3, 0x0
_Z26findNearestVertexKernelTwoPiS_S_S_S_S_:
	.quad	_Z41__device_stub__findNearestVertexKernelTwoPiS_S_S_S_S_
	.size	_Z26findNearestVertexKernelTwoPiS_S_S_S_S_, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"%d\t%d\t%d\t\n"
	.size	.L.str.3, 11

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\ncost:"
	.size	.L.str.4, 7

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"\nTime: %fms\n"
	.size	.L.str.5, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13updateMSTListiiPiS_S_S_S_S_"
	.size	.L__unnamed_1, 32

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z26findNearestVertexKernelOnePiS_S_S_S_ii"
	.size	.L__unnamed_2, 43

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z26findNearestVertexKernelTwoPiS_S_S_S_S_"
	.size	.L__unnamed_3, 43

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"u\tv\tw"
	.size	.Lstr, 6

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__updateMSTListiiPiS_S_S_S_S_
	.addrsig_sym _Z41__device_stub__findNearestVertexKernelOnePiS_S_S_S_ii
	.addrsig_sym _Z41__device_stub__findNearestVertexKernelTwoPiS_S_S_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZSt3cin
	.addrsig_sym _Z13updateMSTListiiPiS_S_S_S_S_
	.addrsig_sym _Z26findNearestVertexKernelOnePiS_S_S_S_ii
	.addrsig_sym _Z26findNearestVertexKernelTwoPiS_S_S_S_S_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13updateMSTListiiPiS_S_S_S_S_ ; -- Begin function _Z13updateMSTListiiPiS_S_S_S_S_
	.globl	_Z13updateMSTListiiPiS_S_S_S_S_
	.p2align	8
	.type	_Z13updateMSTListiiPiS_S_S_S_S_,@function
_Z13updateMSTListiiPiS_S_S_S_S_:        ; @_Z13updateMSTListiiPiS_S_S_S_S_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x0
	v_lshl_or_b32 v1, s15, 10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v0, s2, v1
	v_cmp_ge_i32_e64 s2, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_5
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x8
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_5
; %bb.2:
	s_load_b128 s[0:3], s[0:1], 0x28
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v4, v[4:5], off offset:-4
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_5
; %bb.3:
	v_add_co_u32 v4, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v6, v[4:5], off offset:-4
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v6, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_5
; %bb.4:
	v_mov_b32_e32 v3, 0
	global_store_b32 v[4:5], v2, off offset:-4
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	global_load_b32 v2, v3, s[4:5]
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off offset:-4
.LBB0_5:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13updateMSTListiiPiS_S_S_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 56
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13updateMSTListiiPiS_S_S_S_S_, .Lfunc_end0-_Z13updateMSTListiiPiS_S_S_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 304
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z26findNearestVertexKernelOnePiS_S_S_S_ii ; -- Begin function _Z26findNearestVertexKernelOnePiS_S_S_S_ii
	.globl	_Z26findNearestVertexKernelOnePiS_S_S_S_ii
	.p2align	8
	.type	_Z26findNearestVertexKernelOnePiS_S_S_S_ii,@function
_Z26findNearestVertexKernelOnePiS_S_S_S_ii: ; @_Z26findNearestVertexKernelOnePiS_S_S_S_ii
; %bb.0:
	s_load_b64 s[12:13], s[0:1], 0x28
	s_mov_b32 s2, s15
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v3, 2, v0
	v_lshl_or_b32 v1, s2, 10, v0
	v_mov_b32_e32 v4, 0x2710
	ds_store_2addr_stride64_b32 v3, v2, v4 offset1:16
	s_waitcnt lgkmcnt(0)
	s_add_i32 s3, s13, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB1_22
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	s_load_b64 s[6:7], s[0:1], 0x20
	global_load_b32 v4, v[4:5], off
	global_load_b32 v2, v[1:2], off
	v_or_b32_e32 v1, 0x1000, v3
	s_movk_i32 s1, 0x200
	s_waitcnt vmcnt(1)
	ds_store_b32 v3, v4
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB1_15
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_lshl_add_u32 v2, s1, 2, v3
	s_mov_b32 s13, 0
	s_mov_b32 s14, exec_lo
	ds_load_b32 v5, v3
	ds_load_b32 v4, v2
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	v_cmpx_ne_u32_e32 0, v5
	s_xor_b32 s14, exec_lo, s14
	s_cbranch_execz .LBB1_9
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s0, 0
                                        ; implicit-def: $vgpr2
	s_and_saveexec_b32 s13, vcc_lo
	s_cbranch_execz .LBB1_8
; %bb.5:                                ;   in Loop: Header=BB1_2 Depth=1
	v_lshl_add_u32 v2, s1, 2, v1
	s_mov_b32 s15, 0
	s_mov_b32 s16, exec_lo
	ds_load_b32 v5, v1
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 v5, v2
	s_cbranch_execz .LBB1_7
; %bb.6:                                ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s15, exec_lo
	ds_store_b32 v3, v4
.LBB1_7:                                ; %Flow59
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s15, exec_lo
.LBB1_8:                                ; %Flow58
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s13, s0, exec_lo
                                        ; implicit-def: $vgpr4
.LBB1_9:                                ; %Flow57
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_and_not1_saveexec_b32 s0, s14
	s_cbranch_execz .LBB1_13
; %bb.10:                               ; %.critedge
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s14, s13
                                        ; implicit-def: $vgpr2
	s_and_saveexec_b32 s15, vcc_lo
	s_cbranch_execz .LBB1_12
; %bb.11:                               ;   in Loop: Header=BB1_2 Depth=1
	v_lshl_add_u32 v2, s1, 2, v1
	s_or_b32 s14, s13, exec_lo
	ds_store_b32 v3, v4
	ds_load_b32 v2, v2
.LBB1_12:                               ; %Flow61
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s13, s13, exec_lo
	s_and_b32 s14, s14, exec_lo
	s_or_b32 s13, s13, s14
.LBB1_13:                               ; %Flow60
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s13
	s_cbranch_execz .LBB1_15
; %bb.14:                               ; %.critedge33.sink.split
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v1, v2
.LBB1_15:                               ; %.critedge33
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_lshr_b32 s0, s1, 1
	s_cmp_gt_u32 s1, 1
	s_mov_b32 s1, s0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_2
; %bb.16:
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_22
; %bb.17:
	v_mov_b32_e32 v1, 0
	s_cmp_lg_u32 s12, 0
	ds_load_b32 v0, v1
	s_cbranch_scc0 .LBB1_19
; %bb.18:
	ds_load_b32 v2, v1 offset:4096
	s_mov_b32 s3, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[2:3], 2
	s_add_u32 s8, s8, s0
	s_addc_u32 s9, s9, s1
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	s_waitcnt lgkmcnt(1)
	global_store_b32 v1, v0, s[8:9]
	s_waitcnt lgkmcnt(0)
	global_store_b32 v1, v2, s[0:1]
	s_branch .LBB1_20
.LBB1_19:
	s_mov_b32 s3, -1
.LBB1_20:                               ; %Flow
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB1_22
; %bb.21:
	s_waitcnt lgkmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v0
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v1, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	global_store_b32 v3, v0, s[6:7]
	global_store_b32 v[1:2], v3, off offset:-4
.LBB1_22:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z26findNearestVertexKernelOnePiS_S_S_S_ii
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 48
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z26findNearestVertexKernelOnePiS_S_S_S_ii, .Lfunc_end1-_Z26findNearestVertexKernelOnePiS_S_S_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 676
; NumSgprs: 19
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z26findNearestVertexKernelTwoPiS_S_S_S_S_ ; -- Begin function _Z26findNearestVertexKernelTwoPiS_S_S_S_S_
	.globl	_Z26findNearestVertexKernelTwoPiS_S_S_S_S_
	.p2align	8
	.type	_Z26findNearestVertexKernelTwoPiS_S_S_S_S_,@function
_Z26findNearestVertexKernelTwoPiS_S_S_S_S_: ; @_Z26findNearestVertexKernelTwoPiS_S_S_S_S_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x18
	s_load_b64 s[8:9], s[0:1], 0x28
	v_lshlrev_b32_e32 v3, 2, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s2, s4, v3
	v_add_co_ci_u32_e64 v2, null, s5, 0, s2
	v_add_co_u32 v3, s2, s6, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, null, s7, 0, s2
	s_movk_i32 s6, 0x200
.LBB2_1:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_u32_e64 s6, v0
	s_cbranch_execz .LBB2_12
; %bb.2:                                ;   in Loop: Header=BB2_1 Depth=1
	s_ashr_i32 s7, s6, 31
	s_mov_b32 s12, exec_lo
	s_lshl_b64 s[10:11], s[6:7], 2
	s_mov_b32 s7, 0
	v_add_co_u32 v5, vcc_lo, v1, s10
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v8, v[1:2], off
	global_load_b32 v7, v[5:6], off
                                        ; implicit-def: $vgpr5_vgpr6
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v7
	v_cmpx_ne_u32_e32 0, v8
	s_xor_b32 s12, exec_lo, s12
	s_cbranch_execz .LBB2_6
; %bb.3:                                ;   in Loop: Header=BB2_1 Depth=1
	s_mov_b32 s2, 0
                                        ; implicit-def: $vgpr5_vgpr6
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB2_5
; %bb.4:                                ;   in Loop: Header=BB2_1 Depth=1
	v_add_co_u32 v5, s2, v3, s10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s2, s11, v4, s2
	s_clause 0x1
	global_load_b32 v8, v[3:4], off
	global_load_b32 v9, v[5:6], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e64 s2, v8, v9
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s2, s2, exec_lo
.LBB2_5:                                ; %Flow52
                                        ;   in Loop: Header=BB2_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s7, s2, exec_lo
.LBB2_6:                                ; %Flow
                                        ;   in Loop: Header=BB2_1 Depth=1
	s_and_not1_saveexec_b32 s2, s12
	s_cbranch_execz .LBB2_10
; %bb.7:                                ; %.critedge
                                        ;   in Loop: Header=BB2_1 Depth=1
	s_mov_b32 s12, s7
                                        ; implicit-def: $vgpr5_vgpr6
	s_and_saveexec_b32 s13, vcc_lo
; %bb.8:                                ;   in Loop: Header=BB2_1 Depth=1
	v_add_co_u32 v5, vcc_lo, v3, s10
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v4, vcc_lo
	s_or_b32 s12, s7, exec_lo
; %bb.9:                                ; %Flow54
                                        ;   in Loop: Header=BB2_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s7, s7, exec_lo
	s_and_b32 s10, s12, exec_lo
	s_or_b32 s7, s7, s10
.LBB2_10:                               ; %Flow53
                                        ;   in Loop: Header=BB2_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s7
	s_cbranch_execz .LBB2_12
; %bb.11:                               ; %.critedge40.sink.split
                                        ;   in Loop: Header=BB2_1 Depth=1
	global_store_b32 v[1:2], v7, off
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[3:4], v5, off
.LBB2_12:                               ; %.critedge40
                                        ;   in Loop: Header=BB2_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_lshr_b32 s2, s6, 1
	s_cmp_lt_u32 s6, 2
	s_mov_b32 s6, s2
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB2_1
; %bb.13:
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB2_15
; %bb.14:
	v_mov_b32_e32 v3, 0
	s_load_b64 s[0:1], s[0:1], 0x8
	global_load_b32 v0, v3, s[4:5]
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_store_b32 v3, v0, s[8:9]
	global_store_b32 v[1:2], v3, off offset:-4
.LBB2_15:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z26findNearestVertexKernelTwoPiS_S_S_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 48
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 14
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z26findNearestVertexKernelTwoPiS_S_S_S_S_, .Lfunc_end2-_Z26findNearestVertexKernelTwoPiS_S_S_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 472
; NumSgprs: 16
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 56
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13updateMSTListiiPiS_S_S_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13updateMSTListiiPiS_S_S_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 48
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z26findNearestVertexKernelOnePiS_S_S_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     19
    .sgpr_spill_count: 0
    .symbol:         _Z26findNearestVertexKernelOnePiS_S_S_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 48
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z26findNearestVertexKernelTwoPiS_S_S_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z26findNearestVertexKernelTwoPiS_S_S_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
