#include<stdio.h>
#include<time.h>
__global__ void threennKernel(int b, int n, int m, int t, const float * __restrict__ xyz1, const float * __restrict__ xyz2, float * __restrict__ dist, int * __restrict__ idx) {

    for(int i=blockIdx.x;i<b;i+=gridDim.x){
        for(int j=threadIdx.x;j<n;j+=blockDim.x){
            float best1=1e20, best2=1e20, best3=1e20;
            int besti1=0, besti2 = 0, besti3 = 0;
            for(int u=0;u<m;u++){
                float t_dist = 0;
                for(int v=0;v<t;v++){
                    int tmp_idx1 = i*n*t*3 + j*t*3 + v*3;
                    int tmp_idx2 = i*m*t*3 + u*t*3 + v*3;
                    float x1 = xyz1[tmp_idx1+0];
                    float y1 = xyz1[tmp_idx1+1];
                    float z1 = xyz1[tmp_idx1+2];
                    float x2 = xyz2[tmp_idx2+0];
                    float y2 = xyz2[tmp_idx2+1];
                    float z2 = xyz2[tmp_idx2+2];
                    t_dist += max(sqrtf((x2-x1)*(x2-x1)+(y2-y1)*(y2-y1)+(z2-z1)*(z2-z1)),1e-20f);
                }
                t_dist /= t;
                
                if (t_dist<best1) {
                    best3=best2;
                    besti3=besti2;
                    best2=best1;
                    besti2=besti1;
                    best1=t_dist;
                    besti1=u;
                } else if (t_dist<best2) {
                    best3=best2;
                    besti3=besti2;
                    best2=t_dist;
                    besti2=u;
                } else if (t_dist<best3) {
                    best3=t_dist;
                    besti3=u;
                }
            }
            int tmp_idx = i*n*3+j*3;
            dist[tmp_idx+0]=best1;
            idx[tmp_idx+0]=besti1;
            dist[tmp_idx+1]=best2;
            idx[tmp_idx+1]=besti2;
            dist[tmp_idx+2]=best3;
            idx[tmp_idx+2]=besti3;
        }
    }
} 

void threennLauncher(int b,int n,int m,int t,const float *xyz1, const float *xyz2, float *dist, int *idx){
    //clock_t start,finish;
    //double totaltime;
    //start=clock();
    threennKernel<<<32,512>>>(b,n,m,t,xyz1,xyz2,dist,idx);
    //finish=clock();
    //totaltime=(double)(finish-start)/CLOCKS_PER_SEC;
    //printf("threennKernel:%f  \n",totaltime);
}



__global__ void threeinterpolateKernel(int b, int n, int m, int t,int c, const float * __restrict__ points, const int * __restrict__ idx, const float * __restrict__ weight, float * __restrict__ out) {

    for(int i=blockIdx.x;i<b;i+=gridDim.x){
        for(int j=threadIdx.x;j<n;j+=blockDim.x){
            int tmp_idx = i*n*3+j*3;
            float w1=weight[tmp_idx+0];
            float w2=weight[tmp_idx+1];
            float w3=weight[tmp_idx+2];
            int i1=idx[tmp_idx+0];
            int i2=idx[tmp_idx+1];
            int i3=idx[tmp_idx+2];
            for(int u=0;u<t;u++){
                for(int v=0;v<c;v++){
                    int tmp_idx1 = i*n*t*c + j*t*c + u*c + v;
                    int tmp_idx2 = i*m*t*c + i1*t*c + u*c + v;
                    int tmp_idx3 = i*m*t*c + i2*t*c + u*c + v;
                    int tmp_idx4 = i*m*t*c + i3*t*c + u*c + v;
                    out[tmp_idx1] = points[tmp_idx2]*w1 + points[tmp_idx3]*w2 + points[tmp_idx4]*w3;
                }
            }
        }
    }
}

void threeinterpolateLauncher(int b, int n, int m, int t, int c,const float *points, const int *idx, const float *weight, float *out){
    //clock_t start,finish;
    //double totaltime;
    //start=clock();
    threeinterpolateKernel<<<32,512>>>(b,n,m,t,c,points,idx,weight,out);
    //finish=clock();
    //totaltime=(double)(finish-start)/CLOCKS_PER_SEC;
    //printf("threeinterpolateKernel:%f  \n",totaltime);
}

// input: grad_out (b,n,c), idx (b,n,3), weight (b,n,3)
// output: grad_points (b,m,c)
__global__ void threeinterpolategradKernel(int b, int n, int m, int t, int c, const float * __restrict__ grad_out, const int * __restrict__ idx, const float * __restrict__ weight, float * __restrict__ grad_points) {



    for(int i=blockIdx.x;i<b;i+=gridDim.x){
        for(int j=threadIdx.x;j<n;j+=blockDim.x){
            int tmp_idx = i*n*3+j*3;
            float w1=weight[tmp_idx+0];
            float w2=weight[tmp_idx+1];
            float w3=weight[tmp_idx+2];
            int i1=idx[tmp_idx+0];
            int i2=idx[tmp_idx+1];
            int i3=idx[tmp_idx+2];
            for(int u=0;u<t;u++){
                for(int v=0;v<c;v++){
                    int tmp_idx1 = i*n*t*c + j*t*c + u*c + v;
                    int tmp_idx2 = i*m*t*c + i1*t*c + u*c + v;
                    int tmp_idx3 = i*m*t*c + i2*t*c + u*c + v;
                    int tmp_idx4 = i*m*t*c + i3*t*c + u*c + v;
                    atomicAdd(&grad_points[tmp_idx2],grad_out[tmp_idx1]*w1);
                    atomicAdd(&grad_points[tmp_idx3],grad_out[tmp_idx1]*w2);
                    atomicAdd(&grad_points[tmp_idx4],grad_out[tmp_idx1]*w3);
                }
            }
        }
    }
}

void threeinterpolategradLauncher(int b, int n, int m, int t, int c, const float *grad_out, const int *idx, const float *weight, float *grad_points){
    //clock_t start,finish;
    //double totaltime;
    //start=clock();
    threeinterpolategradKernel<<<32,128>>>(b,n,m,t,c,grad_out,idx,weight,grad_points);
    //finish=clock();
    //totaltime=(double)(finish-start)/CLOCKS_PER_SEC;
    //printf("threeinterpolategradKernel:%f  \n",totaltime);
}

	.file	"tmpxft_0034ae3d_00000000-6_interpolation_trajectory.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z45__device_stub__Z13threennKerneliiiiPKfS0_PfPiiiiiPKfS0_PfPi
	.type	_Z45__device_stub__Z13threennKerneliiiiPKfS0_PfPiiiiiPKfS0_PfPi, @function
_Z45__device_stub__Z13threennKerneliiiiPKfS0_PfPiiiiiPKfS0_PfPi:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movl	%edi, 12(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, (%rsp)
	leaq	64(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%r8, 24(%rsp)
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	movq	208(%rsp), %rax
	movq	%r9, 32(%rsp)
	movq	%rax, 40(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	216(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 48(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z13threennKerneliiiiPKfS0_PfPi(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z45__device_stub__Z13threennKerneliiiiPKfS0_PfPiiiiiPKfS0_PfPi, .-_Z45__device_stub__Z13threennKerneliiiiPKfS0_PfPiiiiiPKfS0_PfPi
	.globl	_Z13threennKerneliiiiPKfS0_PfPi
	.type	_Z13threennKerneliiiiPKfS0_PfPi, @function
_Z13threennKerneliiiiPKfS0_PfPi:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z13threennKerneliiiiPKfS0_PfPiiiiiPKfS0_PfPi
	.cfi_endproc
.LFE2055:
	.size	_Z13threennKerneliiiiPKfS0_PfPi, .-_Z13threennKerneliiiiPKfS0_PfPi
	.globl	_Z15threennLauncheriiiiPKfS0_PfPi
	.type	_Z15threennLauncheriiiiPKfS0_PfPi, @function
_Z15threennLauncheriiiiPKfS0_PfPi:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r9, %r15
	xorl	%r9d, %r9d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	xorl	%r8d, %r8d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%ecx, %r13d
	movl	$1, %ecx
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	movl	$8388609, %edx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	salq	$9, %rdx
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	112(%rsp), %rbx
	movq	120(%rsp), %rbp
	movl	%edi, 8(%rsp)
	movl	$134217729, %edi
	movl	%esi, 12(%rsp)
	salq	$5, %rdi
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	movq	%rbp, 120(%rsp)
	movl	12(%rsp), %esi
	movq	%r15, %r9
	movq	%r14, %r8
	movq	%rbx, 112(%rsp)
	movl	8(%rsp), %edi
	addq	$56, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movl	%r13d, %ecx
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	%r12d, %edx
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z45__device_stub__Z13threennKerneliiiiPKfS0_PfPiiiiiPKfS0_PfPi
.L8:
	.cfi_restore_state
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z15threennLauncheriiiiPKfS0_PfPi, .-_Z15threennLauncheriiiiPKfS0_PfPi
	.globl	_Z56__device_stub__Z22threeinterpolateKerneliiiiiPKfPKiS0_PfiiiiiPKfPKiS0_Pf
	.type	_Z56__device_stub__Z22threeinterpolateKerneliiiiiPKfPKiS0_PfiiiiiPKfPKiS0_Pf, @function
_Z56__device_stub__Z22threeinterpolateKerneliiiiiPKfPKiS0_PfiiiiiPKfPKiS0_Pf:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movl	%edi, 28(%rsp)
	leaq	80(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	92(%rsp), %rsi
	movl	%edx, 20(%rsp)
	leaq	64(%rsp), %rdx
	movl	%ecx, 16(%rsp)
	leaq	72(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movq	%r9, 32(%rsp)
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	224(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 40(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 176(%rsp)
	movq	232(%rsp), %rax
	movl	$1, 100(%rsp)
	movq	%rax, 48(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 184(%rsp)
	movq	240(%rsp), %rax
	movq	%rax, 56(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	72(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 240
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L11:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z56__device_stub__Z22threeinterpolateKerneliiiiiPKfPKiS0_PfiiiiiPKfPKiS0_Pf, .-_Z56__device_stub__Z22threeinterpolateKerneliiiiiPKfPKiS0_PfiiiiiPKfPKiS0_Pf
	.globl	_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf
	.type	_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf, @function
_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z56__device_stub__Z22threeinterpolateKerneliiiiiPKfPKiS0_PfiiiiiPKfPKiS0_Pf
	.cfi_endproc
.LFE2057:
	.size	_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf, .-_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf
	.globl	_Z24threeinterpolateLauncheriiiiiPKfPKiS0_Pf
	.type	_Z24threeinterpolateLauncheriiiiiPKfPKiS0_Pf, @function
_Z24threeinterpolateLauncheriiiiiPKfPKiS0_Pf:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r9, %r14
	xorl	%r9d, %r9d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r8d, %r13d
	xorl	%r8d, %r8d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	movl	$1, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	112(%rsp), %r15
	movq	120(%rsp), %rbx
	movl	%edi, 4(%rsp)
	movl	$134217729, %edi
	movl	%edx, 12(%rsp)
	movl	$8388609, %edx
	salq	$5, %rdi
	movq	128(%rsp), %rbp
	movl	%esi, 8(%rsp)
	salq	$9, %rdx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	%rbx, 120(%rsp)
	movl	12(%rsp), %edx
	movq	%r14, %r9
	movl	%r13d, %r8d
	movl	8(%rsp), %esi
	movl	4(%rsp), %edi
	movq	%r15, 112(%rsp)
	movl	%r12d, %ecx
	movq	%rbp, 128(%rsp)
	addq	$56, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z56__device_stub__Z22threeinterpolateKerneliiiiiPKfPKiS0_PfiiiiiPKfPKiS0_Pf
.L16:
	.cfi_restore_state
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z24threeinterpolateLauncheriiiiiPKfPKiS0_Pf, .-_Z24threeinterpolateLauncheriiiiiPKfPKiS0_Pf
	.globl	_Z60__device_stub__Z26threeinterpolategradKerneliiiiiPKfPKiS0_PfiiiiiPKfPKiS0_Pf
	.type	_Z60__device_stub__Z26threeinterpolategradKerneliiiiiPKfPKiS0_PfiiiiiPKfPKiS0_Pf, @function
_Z60__device_stub__Z26threeinterpolategradKerneliiiiiPKfPKiS0_PfiiiiiPKfPKiS0_Pf:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movl	%edi, 28(%rsp)
	leaq	80(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	92(%rsp), %rsi
	movl	%edx, 20(%rsp)
	leaq	64(%rsp), %rdx
	movl	%ecx, 16(%rsp)
	leaq	72(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movq	%r9, 32(%rsp)
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	224(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 40(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 176(%rsp)
	movq	232(%rsp), %rax
	movl	$1, 100(%rsp)
	movq	%rax, 48(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 184(%rsp)
	movq	240(%rsp), %rax
	movq	%rax, 56(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	72(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 240
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L19:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z60__device_stub__Z26threeinterpolategradKerneliiiiiPKfPKiS0_PfiiiiiPKfPKiS0_Pf, .-_Z60__device_stub__Z26threeinterpolategradKerneliiiiiPKfPKiS0_PfiiiiiPKfPKiS0_Pf
	.globl	_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf
	.type	_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf, @function
_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z60__device_stub__Z26threeinterpolategradKerneliiiiiPKfPKiS0_PfiiiiiPKfPKiS0_Pf
	.cfi_endproc
.LFE2059:
	.size	_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf, .-_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf
	.globl	_Z28threeinterpolategradLauncheriiiiiPKfPKiS0_Pf
	.type	_Z28threeinterpolategradLauncheriiiiiPKfPKiS0_Pf, @function
_Z28threeinterpolategradLauncheriiiiiPKfPKiS0_Pf:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r9, %r14
	xorl	%r9d, %r9d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r8d, %r13d
	xorl	%r8d, %r8d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	movl	$1, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	112(%rsp), %r15
	movq	120(%rsp), %rbx
	movl	%edi, 4(%rsp)
	movl	$134217729, %edi
	movl	%edx, 12(%rsp)
	movl	$33554433, %edx
	salq	$5, %rdi
	movq	128(%rsp), %rbp
	movl	%esi, 8(%rsp)
	salq	$7, %rdx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	movq	%rbx, 120(%rsp)
	movl	12(%rsp), %edx
	movq	%r14, %r9
	movl	%r13d, %r8d
	movl	8(%rsp), %esi
	movl	4(%rsp), %edi
	movq	%r15, 112(%rsp)
	movl	%r12d, %ecx
	movq	%rbp, 128(%rsp)
	addq	$56, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z60__device_stub__Z26threeinterpolategradKerneliiiiiPKfPKiS0_PfiiiiiPKfPKiS0_Pf
.L24:
	.cfi_restore_state
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z28threeinterpolategradLauncheriiiiiPKfPKiS0_Pf, .-_Z28threeinterpolategradLauncheriiiiiPKfPKiS0_Pf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf"
.LC1:
	.string	"_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf"
.LC2:
	.string	"_Z13threennKerneliiiiPKfS0_PfPi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2061:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13threennKerneliiiiPKfS0_PfPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2061:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<stdio.h>
#include<time.h>
__global__ void threennKernel(int b, int n, int m, int t, const float * __restrict__ xyz1, const float * __restrict__ xyz2, float * __restrict__ dist, int * __restrict__ idx) {

    for(int i=blockIdx.x;i<b;i+=gridDim.x){
        for(int j=threadIdx.x;j<n;j+=blockDim.x){
            float best1=1e20, best2=1e20, best3=1e20;
            int besti1=0, besti2 = 0, besti3 = 0;
            for(int u=0;u<m;u++){
                float t_dist = 0;
                for(int v=0;v<t;v++){
                    int tmp_idx1 = i*n*t*3 + j*t*3 + v*3;
                    int tmp_idx2 = i*m*t*3 + u*t*3 + v*3;
                    float x1 = xyz1[tmp_idx1+0];
                    float y1 = xyz1[tmp_idx1+1];
                    float z1 = xyz1[tmp_idx1+2];
                    float x2 = xyz2[tmp_idx2+0];
                    float y2 = xyz2[tmp_idx2+1];
                    float z2 = xyz2[tmp_idx2+2];
                    t_dist += max(sqrtf((x2-x1)*(x2-x1)+(y2-y1)*(y2-y1)+(z2-z1)*(z2-z1)),1e-20f);
                }
                t_dist /= t;
                
                if (t_dist<best1) {
                    best3=best2;
                    besti3=besti2;
                    best2=best1;
                    besti2=besti1;
                    best1=t_dist;
                    besti1=u;
                } else if (t_dist<best2) {
                    best3=best2;
                    besti3=besti2;
                    best2=t_dist;
                    besti2=u;
                } else if (t_dist<best3) {
                    best3=t_dist;
                    besti3=u;
                }
            }
            int tmp_idx = i*n*3+j*3;
            dist[tmp_idx+0]=best1;
            idx[tmp_idx+0]=besti1;
            dist[tmp_idx+1]=best2;
            idx[tmp_idx+1]=besti2;
            dist[tmp_idx+2]=best3;
            idx[tmp_idx+2]=besti3;
        }
    }
} 

void threennLauncher(int b,int n,int m,int t,const float *xyz1, const float *xyz2, float *dist, int *idx){
    //clock_t start,finish;
    //double totaltime;
    //start=clock();
    threennKernel<<<32,512>>>(b,n,m,t,xyz1,xyz2,dist,idx);
    //finish=clock();
    //totaltime=(double)(finish-start)/CLOCKS_PER_SEC;
    //printf("threennKernel:%f  \n",totaltime);
}



__global__ void threeinterpolateKernel(int b, int n, int m, int t,int c, const float * __restrict__ points, const int * __restrict__ idx, const float * __restrict__ weight, float * __restrict__ out) {

    for(int i=blockIdx.x;i<b;i+=gridDim.x){
        for(int j=threadIdx.x;j<n;j+=blockDim.x){
            int tmp_idx = i*n*3+j*3;
            float w1=weight[tmp_idx+0];
            float w2=weight[tmp_idx+1];
            float w3=weight[tmp_idx+2];
            int i1=idx[tmp_idx+0];
            int i2=idx[tmp_idx+1];
            int i3=idx[tmp_idx+2];
            for(int u=0;u<t;u++){
                for(int v=0;v<c;v++){
                    int tmp_idx1 = i*n*t*c + j*t*c + u*c + v;
                    int tmp_idx2 = i*m*t*c + i1*t*c + u*c + v;
                    int tmp_idx3 = i*m*t*c + i2*t*c + u*c + v;
                    int tmp_idx4 = i*m*t*c + i3*t*c + u*c + v;
                    out[tmp_idx1] = points[tmp_idx2]*w1 + points[tmp_idx3]*w2 + points[tmp_idx4]*w3;
                }
            }
        }
    }
}

void threeinterpolateLauncher(int b, int n, int m, int t, int c,const float *points, const int *idx, const float *weight, float *out){
    //clock_t start,finish;
    //double totaltime;
    //start=clock();
    threeinterpolateKernel<<<32,512>>>(b,n,m,t,c,points,idx,weight,out);
    //finish=clock();
    //totaltime=(double)(finish-start)/CLOCKS_PER_SEC;
    //printf("threeinterpolateKernel:%f  \n",totaltime);
}

// input: grad_out (b,n,c), idx (b,n,3), weight (b,n,3)
// output: grad_points (b,m,c)
__global__ void threeinterpolategradKernel(int b, int n, int m, int t, int c, const float * __restrict__ grad_out, const int * __restrict__ idx, const float * __restrict__ weight, float * __restrict__ grad_points) {



    for(int i=blockIdx.x;i<b;i+=gridDim.x){
        for(int j=threadIdx.x;j<n;j+=blockDim.x){
            int tmp_idx = i*n*3+j*3;
            float w1=weight[tmp_idx+0];
            float w2=weight[tmp_idx+1];
            float w3=weight[tmp_idx+2];
            int i1=idx[tmp_idx+0];
            int i2=idx[tmp_idx+1];
            int i3=idx[tmp_idx+2];
            for(int u=0;u<t;u++){
                for(int v=0;v<c;v++){
                    int tmp_idx1 = i*n*t*c + j*t*c + u*c + v;
                    int tmp_idx2 = i*m*t*c + i1*t*c + u*c + v;
                    int tmp_idx3 = i*m*t*c + i2*t*c + u*c + v;
                    int tmp_idx4 = i*m*t*c + i3*t*c + u*c + v;
                    atomicAdd(&grad_points[tmp_idx2],grad_out[tmp_idx1]*w1);
                    atomicAdd(&grad_points[tmp_idx3],grad_out[tmp_idx1]*w2);
                    atomicAdd(&grad_points[tmp_idx4],grad_out[tmp_idx1]*w3);
                }
            }
        }
    }
}

void threeinterpolategradLauncher(int b, int n, int m, int t, int c, const float *grad_out, const int *idx, const float *weight, float *grad_points){
    //clock_t start,finish;
    //double totaltime;
    //start=clock();
    threeinterpolategradKernel<<<32,128>>>(b,n,m,t,c,grad_out,idx,weight,grad_points);
    //finish=clock();
    //totaltime=(double)(finish-start)/CLOCKS_PER_SEC;
    //printf("threeinterpolategradKernel:%f  \n",totaltime);
}

	.text
	.file	"interpolation_trajectory.hip"
	.globl	_Z28__device_stub__threennKerneliiiiPKfS0_PfPi # -- Begin function _Z28__device_stub__threennKerneliiiiPKfS0_PfPi
	.type	_Z28__device_stub__threennKerneliiiiPKfS0_PfPi,@function
_Z28__device_stub__threennKerneliiiiPKfS0_PfPi: # @_Z28__device_stub__threennKerneliiiiPKfS0_PfPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	200(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13threennKerneliiiiPKfS0_PfPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__threennKerneliiiiPKfS0_PfPi, .Lfunc_end0-_Z28__device_stub__threennKerneliiiiPKfS0_PfPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z15threennLauncheriiiiPKfS0_PfPi # -- Begin function _Z15threennLauncheriiiiPKfS0_PfPi
	.type	_Z15threennLauncheriiiiPKfS0_PfPi,@function
_Z15threennLauncheriiiiPKfS0_PfPi:      # @_Z15threennLauncheriiiiPKfS0_PfPi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movl	%ecx, %ebp
	movl	%edx, %r15d
	movl	%esi, %r12d
	movl	%edi, %r13d
	movabsq	$4294967328, %rdi               # imm = 0x100000020
	leaq	480(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB1_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_2:
	.cfi_def_cfa_offset 64
	movl	%r13d, %edi
	movl	%r12d, %esi
	movl	%r15d, %edx
	movl	%ebp, %ecx
	movq	%r14, %r8
	movq	%rbx, %r9
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z28__device_stub__threennKerneliiiiPKfS0_PfPi # TAILCALL
.Lfunc_end1:
	.size	_Z15threennLauncheriiiiPKfS0_PfPi, .Lfunc_end1-_Z15threennLauncheriiiiPKfS0_PfPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z37__device_stub__threeinterpolateKerneliiiiiPKfPKiS0_Pf # -- Begin function _Z37__device_stub__threeinterpolateKerneliiiiiPKfPKiS0_Pf
	.type	_Z37__device_stub__threeinterpolateKerneliiiiiPKfPKiS0_Pf,@function
_Z37__device_stub__threeinterpolateKerneliiiiiPKfPKiS0_Pf: # @_Z37__device_stub__threeinterpolateKerneliiiiiPKfPKiS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z37__device_stub__threeinterpolateKerneliiiiiPKfPKiS0_Pf, .Lfunc_end2-_Z37__device_stub__threeinterpolateKerneliiiiiPKfPKiS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z24threeinterpolateLauncheriiiiiPKfPKiS0_Pf # -- Begin function _Z24threeinterpolateLauncheriiiiiPKfPKiS0_Pf
	.type	_Z24threeinterpolateLauncheriiiiiPKfPKiS0_Pf,@function
_Z24threeinterpolateLauncheriiiiiPKfPKiS0_Pf: # @_Z24threeinterpolateLauncheriiiiiPKfPKiS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movl	%r8d, %ebp
	movl	%ecx, %r14d
	movl	%edx, %r15d
	movl	%esi, %r12d
	movl	%edi, %r13d
	movabsq	$4294967328, %rdi               # imm = 0x100000020
	leaq	480(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB3_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_2:
	.cfi_def_cfa_offset 64
	movl	%r13d, %edi
	movl	%r12d, %esi
	movl	%r15d, %edx
	movl	%r14d, %ecx
	movl	%ebp, %r8d
	movq	%rbx, %r9
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z37__device_stub__threeinterpolateKerneliiiiiPKfPKiS0_Pf # TAILCALL
.Lfunc_end3:
	.size	_Z24threeinterpolateLauncheriiiiiPKfPKiS0_Pf, .Lfunc_end3-_Z24threeinterpolateLauncheriiiiiPKfPKiS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z41__device_stub__threeinterpolategradKerneliiiiiPKfPKiS0_Pf # -- Begin function _Z41__device_stub__threeinterpolategradKerneliiiiiPKfPKiS0_Pf
	.type	_Z41__device_stub__threeinterpolategradKerneliiiiiPKfPKiS0_Pf,@function
_Z41__device_stub__threeinterpolategradKerneliiiiiPKfPKiS0_Pf: # @_Z41__device_stub__threeinterpolategradKerneliiiiiPKfPKiS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z41__device_stub__threeinterpolategradKerneliiiiiPKfPKiS0_Pf, .Lfunc_end4-_Z41__device_stub__threeinterpolategradKerneliiiiiPKfPKiS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z28threeinterpolategradLauncheriiiiiPKfPKiS0_Pf # -- Begin function _Z28threeinterpolategradLauncheriiiiiPKfPKiS0_Pf
	.type	_Z28threeinterpolategradLauncheriiiiiPKfPKiS0_Pf,@function
_Z28threeinterpolategradLauncheriiiiiPKfPKiS0_Pf: # @_Z28threeinterpolategradLauncheriiiiiPKfPKiS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movl	%r8d, %ebp
	movl	%ecx, %r14d
	movl	%edx, %r15d
	movl	%esi, %r12d
	movl	%edi, %r13d
	movabsq	$4294967328, %rdi               # imm = 0x100000020
	leaq	96(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB5_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_2:
	.cfi_def_cfa_offset 64
	movl	%r13d, %edi
	movl	%r12d, %esi
	movl	%r15d, %edx
	movl	%r14d, %ecx
	movl	%ebp, %r8d
	movq	%rbx, %r9
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z41__device_stub__threeinterpolategradKerneliiiiiPKfPKiS0_Pf # TAILCALL
.Lfunc_end5:
	.size	_Z28threeinterpolategradLauncheriiiiiPKfPKiS0_Pf, .Lfunc_end5-_Z28threeinterpolategradLauncheriiiiiPKfPKiS0_Pf
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13threennKerneliiiiPKfS0_PfPi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13threennKerneliiiiPKfS0_PfPi,@object # @_Z13threennKerneliiiiPKfS0_PfPi
	.section	.rodata,"a",@progbits
	.globl	_Z13threennKerneliiiiPKfS0_PfPi
	.p2align	3, 0x0
_Z13threennKerneliiiiPKfS0_PfPi:
	.quad	_Z28__device_stub__threennKerneliiiiPKfS0_PfPi
	.size	_Z13threennKerneliiiiPKfS0_PfPi, 8

	.type	_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf,@object # @_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf
	.globl	_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf
	.p2align	3, 0x0
_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf:
	.quad	_Z37__device_stub__threeinterpolateKerneliiiiiPKfPKiS0_Pf
	.size	_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf, 8

	.type	_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf,@object # @_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf
	.globl	_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf
	.p2align	3, 0x0
_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf:
	.quad	_Z41__device_stub__threeinterpolategradKerneliiiiiPKfPKiS0_Pf
	.size	_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z13threennKerneliiiiPKfS0_PfPi"
	.size	.L__unnamed_1, 32

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf"
	.size	.L__unnamed_2, 43

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf"
	.size	.L__unnamed_3, 47

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__threennKerneliiiiPKfS0_PfPi
	.addrsig_sym _Z37__device_stub__threeinterpolateKerneliiiiiPKfPKiS0_Pf
	.addrsig_sym _Z41__device_stub__threeinterpolategradKerneliiiiiPKfPKiS0_Pf
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13threennKerneliiiiPKfS0_PfPi
	.addrsig_sym _Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf
	.addrsig_sym _Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13threennKerneliiiiPKfS0_PfPi ; -- Begin function _Z13threennKerneliiiiPKfS0_PfPi
	.globl	_Z13threennKerneliiiiPKfS0_PfPi
	.p2align	8
	.type	_Z13threennKerneliiiiPKfS0_PfPi,@function
_Z13threennKerneliiiiPKfS0_PfPi:        ; @_Z13threennKerneliiiiPKfS0_PfPi
; %bb.0:
	s_load_b128 s[16:19], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s16
	s_cbranch_scc1 .LBB0_19
; %bb.1:                                ; %.lr.ph135
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x30
	s_load_b256 s[4:11], s[0:1], 0x10
	v_mad_u64_u32 v[1:2], null, s15, s17, v[0:1]
	s_cmp_gt_i32 s18, 0
	s_mul_i32 s14, s19, 3
	s_mul_i32 s12, s15, s19
	s_cselect_b32 s22, -1, 0
	s_cmp_gt_i32 s19, 0
	s_mul_i32 s13, s12, s18
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v8, s14, v1
	s_cselect_b32 s23, -1, 0
	s_add_u32 s12, s0, 48
	v_cmp_gt_i32_e64 s2, s17, v0
	v_cvt_f32_i32_e32 v7, s19
	s_mul_i32 s24, s13, 3
	s_addc_u32 s13, s1, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s0, s3, s19
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s1, s0, s17
	s_mul_i32 s25, s0, s18
	s_mul_i32 s1, s1, 3
	s_mul_i32 s25, s25, 3
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_6 Depth 3
                                        ;         Child Loop BB0_8 Depth 4
	s_and_saveexec_b32 s26, s2
	s_cbranch_execz .LBB0_18
; %bb.3:                                ; %.preheader114.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_load_b32 s0, s[12:13], 0xc
	v_mov_b32_e32 v9, v8
	v_mov_b32_e32 v10, v0
	s_mul_i32 s28, s15, s17
	s_mov_b32 s30, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s27, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s29, s14, s27
.LBB0_4:                                ; %.preheader114
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_6 Depth 3
                                        ;         Child Loop BB0_8 Depth 4
	v_dual_mov_b32 v1, 0x60ad78ec :: v_dual_mov_b32 v4, 0
	v_dual_mov_b32 v2, 0x60ad78ec :: v_dual_mov_b32 v3, 0x60ad78ec
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v6, 0
	s_and_not1_b32 vcc_lo, exec_lo, s22
	s_cbranch_vccnz .LBB0_17
; %bb.5:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_dual_mov_b32 v11, 0x60ad78ec :: v_dual_mov_b32 v12, 0
	v_dual_mov_b32 v13, 0x60ad78ec :: v_dual_mov_b32 v14, 0
	v_dual_mov_b32 v15, 0x60ad78ec :: v_dual_mov_b32 v16, 0
	s_mov_b32 s31, s24
	s_mov_b32 s33, 0
.LBB0_6:                                ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_8 Depth 4
	v_mov_b32_e32 v3, 0
	s_and_not1_b32 vcc_lo, exec_lo, s23
	s_cbranch_vccnz .LBB0_9
; %bb.7:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_6 Depth=3
	v_mov_b32_e32 v1, v9
	s_mov_b32 s20, s31
	s_mov_b32 s34, s19
.LBB0_8:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ;       Parent Loop BB0_6 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s21, s20, 31
	s_lshl_b64 s[36:37], s[20:21], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_u32 s36, s6, s36
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_addc_u32 s37, s7, s37
	s_add_i32 s34, s34, -1
	s_add_i32 s20, s20, 3
	s_cmp_eq_u32 s34, 0
	v_add_nc_u32_e32 v1, 3, v1
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b96 v[4:6], v[4:5], off
	s_clause 0x1
	s_load_b64 s[38:39], s[36:37], 0x0
	s_load_b32 s0, s[36:37], 0x8
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_sub_f32 v2, s39, v5 :: v_dual_sub_f32 v5, s0, v6
	v_sub_f32_e32 v4, s38, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v2, v2
	v_fmac_f32_e32 v2, v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, v5, v5
	v_mul_f32_e32 v4, 0x4f800000, v2
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_sqrt_f32_e32 v4, v2
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v5, -1, v4
	v_add_nc_u32_e32 v6, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v17, -v5, v4, v2
	v_fma_f32 v18, -v6, v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s0, 0, v17
	v_cndmask_b32_e64 v4, v4, v5, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s0, 0, v18
	v_cndmask_b32_e64 v4, v4, v6, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v5, 0x37800000, v4
	v_cndmask_b32_e32 v4, v4, v5, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v2, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v4, v2, vcc_lo
	v_max_f32_e32 v2, 0x1e3ce508, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v2
	s_cbranch_scc0 .LBB0_8
.LBB0_9:                                ; %Flow163
                                        ;   in Loop: Header=BB0_6 Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_scale_f32 v1, null, v7, v7, v3
	v_div_scale_f32 v5, vcc_lo, v3, v7, v3
	s_mov_b32 s0, exec_lo
	v_rcp_f32_e32 v2, v1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v4, -v1, v2, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, v4, v2
	v_mul_f32_e32 v4, v5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, -v1, v4, v5
	v_fmac_f32_e32 v4, v6, v2
	v_mov_b32_e32 v6, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v1, -v1, v4, v5
	v_mov_b32_e32 v5, v12
	v_div_fmas_f32 v1, v1, v2, v4
	v_mov_b32_e32 v4, s33
	v_mov_b32_e32 v2, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v1, v1, v7, v3
	v_mov_b32_e32 v3, v13
	v_cmpx_nlt_f32_e32 v1, v11
	s_cbranch_execz .LBB0_15
; %bb.10:                               ;   in Loop: Header=BB0_6 Depth=3
	v_mov_b32_e32 v5, s33
	s_mov_b32 s20, exec_lo
	v_cmpx_nlt_f32_e32 v1, v13
	s_cbranch_execz .LBB0_14
; %bb.11:                               ;   in Loop: Header=BB0_6 Depth=3
	s_mov_b32 s21, exec_lo
	v_cmpx_lt_f32_e32 v1, v15
; %bb.12:                               ;   in Loop: Header=BB0_6 Depth=3
	v_dual_mov_b32 v16, s33 :: v_dual_mov_b32 v15, v1
; %bb.13:                               ; %Flow
                                        ;   in Loop: Header=BB0_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s21
	v_mov_b32_e32 v1, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mov_b32_e32 v13, v15
	v_dual_mov_b32 v5, v14 :: v_dual_mov_b32 v14, v16
.LBB0_14:                               ; %Flow161
                                        ;   in Loop: Header=BB0_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s20
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v6, v14 :: v_dual_mov_b32 v3, v13
	v_mov_b32_e32 v4, v12
	v_dual_mov_b32 v2, v1 :: v_dual_mov_b32 v1, v11
.LBB0_15:                               ;   in Loop: Header=BB0_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s33, s33, 1
	s_add_i32 s31, s31, s14
	s_cmp_eq_u32 s33, s18
	s_cbranch_scc1 .LBB0_17
; %bb.16:                               ;   in Loop: Header=BB0_6 Depth=3
	v_dual_mov_b32 v11, v1 :: v_dual_mov_b32 v12, v4
	v_dual_mov_b32 v13, v2 :: v_dual_mov_b32 v14, v5
	v_dual_mov_b32 v15, v3 :: v_dual_mov_b32 v16, v6
	s_branch .LBB0_6
.LBB0_17:                               ; %._crit_edge124
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v11, s28, v10
	v_add_nc_u32_e32 v10, s27, v10
	v_add_nc_u32_e32 v9, s29, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshl_add_u32 v11, v11, 1, v11
	v_cmp_le_i32_e32 vcc_lo, s17, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v12, 31, v11
	s_or_b32 s30, vcc_lo, s30
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v13, s0, s8, v11
	v_add_co_ci_u32_e64 v14, s0, s9, v12, s0
	v_add_co_u32 v11, s0, s10, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s0, s11, v12, s0
	global_store_b96 v[13:14], v[1:3], off
	global_store_b96 v[11:12], v[4:6], off
	s_and_not1_b32 exec_lo, exec_lo, s30
	s_cbranch_execnz .LBB0_4
.LBB0_18:                               ; %Flow167
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s26
	v_add_nc_u32_e32 v8, s1, v8
	s_add_i32 s15, s3, s15
	s_add_i32 s24, s24, s25
	s_cmp_ge_i32 s15, s16
	s_cbranch_scc0 .LBB0_2
.LBB0_19:                               ; %._crit_edge136
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13threennKerneliiiiPKfS0_PfPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 40
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13threennKerneliiiiPKfS0_PfPi, .Lfunc_end0-_Z13threennKerneliiiiPKfS0_PfPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 992
; NumSgprs: 42
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 42
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf ; -- Begin function _Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf
	.globl	_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf
	.p2align	8
	.type	_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf,@function
_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf: ; @_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf
; %bb.0:
	s_load_b128 s[16:19], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s16
	s_cbranch_scc1 .LBB1_12
; %bb.1:                                ; %.lr.ph96
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x10
	s_load_b32 s12, s[0:1], 0x38
	s_load_b256 s[4:11], s[0:1], 0x18
	v_mad_u64_u32 v[1:2], null, s15, s17, v[0:1]
	s_cmp_gt_i32 s19, 0
	v_cmp_gt_i32_e64 s2, s17, v0
	s_cselect_b32 s13, -1, 0
	s_mul_i32 s21, s15, s18
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s14, s3, s19
	s_cmp_gt_i32 s3, 0
	v_mul_lo_u32 v20, s14, v1
	s_mul_i32 s22, s14, s12
	s_cselect_b32 s20, -1, 0
	s_add_u32 s0, s0, 56
	s_addc_u32 s1, s1, 0
	s_mul_i32 s18, s12, s18
	s_mul_i32 s22, s22, s17
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_4 Depth 2
                                        ;       Child Loop BB1_6 Depth 3
                                        ;         Child Loop BB1_8 Depth 4
	s_and_saveexec_b32 s23, s2
	s_cbranch_execz .LBB1_11
; %bb.3:                                ; %.lr.ph92
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_load_b32 s24, s[0:1], 0xc
	v_mov_b32_e32 v21, v20
	v_mov_b32_e32 v22, v0
	s_mul_i32 s25, s15, s17
	s_mov_b32 s27, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s24, s24, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s26, s14, s24
.LBB1_4:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_6 Depth 3
                                        ;         Child Loop BB1_8 Depth 4
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB1_10
; %bb.5:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v10, v21 :: v_dual_add_nc_u32 v1, s25, v22
	s_mov_b32 s28, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v1, 1, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s8, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	global_load_b96 v[4:6], v[3:4], off
	global_load_b96 v[1:3], v[1:2], off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v6, s21, v6
	v_add_nc_u32_e32 v5, s21, v5
	v_add_nc_u32_e32 v7, s21, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v4, s14, v6
	v_mul_lo_u32 v6, s14, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_lo_u32 v8, s14, v7
.LBB1_6:                                ; %.preheader
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB1_8 Depth 4
	s_and_not1_b32 vcc_lo, exec_lo, s20
	s_cbranch_vccnz .LBB1_9
; %bb.7:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_6 Depth=3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_3)
	v_ashrrev_i32_e32 v9, 31, v8
	v_ashrrev_i32_e32 v11, 31, v10
	s_mov_b32 s29, s3
	v_lshlrev_b64 v[12:13], 2, v[4:5]
	v_lshlrev_b64 v[14:15], 2, v[6:7]
	v_lshlrev_b64 v[16:17], 2, v[8:9]
	v_lshlrev_b64 v[18:19], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, s4, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
	v_add_co_u32 v14, vcc_lo, s4, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s5, v15, vcc_lo
	v_add_co_u32 v16, vcc_lo, s4, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v17, vcc_lo
	v_add_co_u32 v18, vcc_lo, s10, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s11, v19, vcc_lo
.LBB1_8:                                ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ;       Parent Loop BB1_6 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	global_load_b32 v5, v[14:15], off
	global_load_b32 v7, v[16:17], off
	global_load_b32 v9, v[12:13], off
	v_add_co_u32 v12, vcc_lo, v12, 4
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
	v_add_co_u32 v14, vcc_lo, v14, 4
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v15, vcc_lo
	v_add_co_u32 v16, vcc_lo, v16, 4
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v17, vcc_lo
	s_add_i32 s29, s29, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s29, 0
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v5, v2, v5
	s_waitcnt vmcnt(1)
	v_fmac_f32_e32 v5, v1, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v5, v3, v9
	global_store_b32 v[18:19], v5, off
	v_add_co_u32 v18, vcc_lo, v18, 4
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v19, vcc_lo
	s_cbranch_scc0 .LBB1_8
.LBB1_9:                                ; %._crit_edge
                                        ;   in Loop: Header=BB1_6 Depth=3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v4, s3, v4
	v_add_nc_u32_e32 v6, s3, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v8, s3, v8
	v_add_nc_u32_e32 v10, s3, v10
	s_add_i32 s28, s28, 1
	s_cmp_eq_u32 s28, s19
	s_cbranch_scc0 .LBB1_6
.LBB1_10:                               ; %._crit_edge89
                                        ;   in Loop: Header=BB1_4 Depth=2
	v_add_nc_u32_e32 v22, s24, v22
	v_add_nc_u32_e32 v21, s26, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s17, v22
	s_or_b32 s27, vcc_lo, s27
	s_and_not1_b32 exec_lo, exec_lo, s27
	s_cbranch_execnz .LBB1_4
.LBB1_11:                               ; %Flow142
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s23
	v_add_nc_u32_e32 v20, s22, v20
	s_add_i32 s15, s12, s15
	s_add_i32 s21, s21, s18
	s_cmp_ge_i32 s15, s16
	s_cbranch_scc0 .LBB1_2
.LBB1_12:                               ; %._crit_edge97
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 23
		.amdhsa_next_free_sgpr 30
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf, .Lfunc_end1-_Z22threeinterpolateKerneliiiiiPKfPKiS0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 660
; NumSgprs: 32
; NumVgprs: 23
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 32
; NumVGPRsForWavesPerEU: 23
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf ; -- Begin function _Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf
	.globl	_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf
	.p2align	8
	.type	_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf,@function
_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf: ; @_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf
; %bb.0:
	s_load_b128 s[16:19], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s16
	s_cbranch_scc1 .LBB2_18
; %bb.1:                                ; %.lr.ph100
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x10
	s_load_b256 s[4:11], s[0:1], 0x18
	s_load_b32 s12, s[0:1], 0x38
	s_cmp_gt_i32 s19, 0
	v_cmp_gt_i32_e64 s2, s17, v0
	s_cselect_b32 s13, -1, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s3, 0
	s_cselect_b32 s14, -1, 0
	s_add_u32 s0, s0, 56
	s_addc_u32 s1, s1, 0
.LBB2_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_4 Depth 2
                                        ;       Child Loop BB2_6 Depth 3
                                        ;         Child Loop BB2_8 Depth 4
                                        ;           Child Loop BB2_9 Depth 5
                                        ;           Child Loop BB2_11 Depth 5
                                        ;           Child Loop BB2_13 Depth 5
	s_and_saveexec_b32 s20, s2
	s_cbranch_execz .LBB2_17
; %bb.3:                                ; %.lr.ph96
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_load_b32 s23, s[0:1], 0xc
	v_mov_b32_e32 v8, v0
	s_mul_i32 s21, s15, s17
	s_mul_i32 s22, s15, s18
	s_mov_b32 s24, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s23, s23, 0xffff
.LBB2_4:                                ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_6 Depth 3
                                        ;         Child Loop BB2_8 Depth 4
                                        ;           Child Loop BB2_9 Depth 5
                                        ;           Child Loop BB2_11 Depth 5
                                        ;           Child Loop BB2_13 Depth 5
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB2_16
; %bb.5:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB2_4 Depth=2
	v_add_nc_u32_e32 v7, s21, v8
	s_mov_b32 s25, 0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v1, v7, 1, v7
	v_mul_lo_u32 v9, v7, s19
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s8, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	global_load_b96 v[4:6], v[3:4], off
	global_load_b96 v[1:3], v[1:2], off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v4, s22, v4
	v_add_nc_u32_e32 v5, s22, v5
	v_add_nc_u32_e32 v6, s22, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v10, v4, s19
	v_mul_lo_u32 v11, v5, s19
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_lo_u32 v12, v6, s19
.LBB2_6:                                ; %.preheader
                                        ;   Parent Loop BB2_2 Depth=1
                                        ;     Parent Loop BB2_4 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB2_8 Depth 4
                                        ;           Child Loop BB2_9 Depth 5
                                        ;           Child Loop BB2_11 Depth 5
                                        ;           Child Loop BB2_13 Depth 5
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB2_15
; %bb.7:                                ; %.lr.ph
                                        ;   in Loop: Header=BB2_6 Depth=3
	v_add_nc_u32_e32 v4, s25, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v5, s25, v10
	v_add_nc_u32_e32 v6, s25, v11
	s_delay_alu instid0(VALU_DEP_4)
	v_add_nc_u32_e32 v7, s25, v12
	s_mov_b32 s26, 0
	v_mul_lo_u32 v13, v4, s3
	v_mul_lo_u32 v14, v5, s3
	v_mul_lo_u32 v15, v6, s3
	v_mul_lo_u32 v16, v7, s3
.LBB2_8:                                ;   Parent Loop BB2_2 Depth=1
                                        ;     Parent Loop BB2_4 Depth=2
                                        ;       Parent Loop BB2_6 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB2_9 Depth 5
                                        ;           Child Loop BB2_11 Depth 5
                                        ;           Child Loop BB2_13 Depth 5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v4, s26, v13
	v_add_nc_u32_e32 v6, s26, v14
	s_mov_b32 s27, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v17, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v18, vcc_lo, s5, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s10, v6
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v7, vcc_lo
	global_load_b32 v17, v[17:18], off
	global_load_b32 v7, v[4:5], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v18, v1, v17
.LBB2_9:                                ; %atomicrmw.start
                                        ;   Parent Loop BB2_2 Depth=1
                                        ;     Parent Loop BB2_4 Depth=2
                                        ;       Parent Loop BB2_6 Depth=3
                                        ;         Parent Loop BB2_8 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v6, v7, v18
	global_atomic_cmpswap_b32 v6, v[4:5], v[6:7], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v6, v7
	v_mov_b32_e32 v7, v6
	s_or_b32 s27, vcc_lo, s27
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s27
	s_cbranch_execnz .LBB2_9
; %bb.10:                               ; %atomicrmw.end
                                        ;   in Loop: Header=BB2_8 Depth=4
	s_or_b32 exec_lo, exec_lo, s27
	v_add_nc_u32_e32 v4, s26, v15
	v_mul_f32_e32 v18, v2, v17
	s_mov_b32 s27, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s10, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
	global_load_b32 v7, v[4:5], off
.LBB2_11:                               ; %atomicrmw.start104
                                        ;   Parent Loop BB2_2 Depth=1
                                        ;     Parent Loop BB2_4 Depth=2
                                        ;       Parent Loop BB2_6 Depth=3
                                        ;         Parent Loop BB2_8 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v6, v7, v18
	global_atomic_cmpswap_b32 v6, v[4:5], v[6:7], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v6, v7
	v_mov_b32_e32 v7, v6
	s_or_b32 s27, vcc_lo, s27
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s27
	s_cbranch_execnz .LBB2_11
; %bb.12:                               ; %atomicrmw.end103
                                        ;   in Loop: Header=BB2_8 Depth=4
	s_or_b32 exec_lo, exec_lo, s27
	v_dual_mul_f32 v17, v3, v17 :: v_dual_add_nc_u32 v4, s26, v16
	s_mov_b32 s27, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s10, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
	global_load_b32 v7, v[4:5], off
.LBB2_13:                               ; %atomicrmw.start110
                                        ;   Parent Loop BB2_2 Depth=1
                                        ;     Parent Loop BB2_4 Depth=2
                                        ;       Parent Loop BB2_6 Depth=3
                                        ;         Parent Loop BB2_8 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v6, v7, v17
	global_atomic_cmpswap_b32 v6, v[4:5], v[6:7], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v6, v7
	v_mov_b32_e32 v7, v6
	s_or_b32 s27, vcc_lo, s27
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s27
	s_cbranch_execnz .LBB2_13
; %bb.14:                               ; %atomicrmw.end109
                                        ;   in Loop: Header=BB2_8 Depth=4
	s_or_b32 exec_lo, exec_lo, s27
	s_add_i32 s26, s26, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s26, s3
	s_cbranch_scc0 .LBB2_8
.LBB2_15:                               ; %._crit_edge
                                        ;   in Loop: Header=BB2_6 Depth=3
	s_add_i32 s25, s25, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s25, s19
	s_cbranch_scc0 .LBB2_6
.LBB2_16:                               ; %._crit_edge93
                                        ;   in Loop: Header=BB2_4 Depth=2
	v_add_nc_u32_e32 v8, s23, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s17, v8
	s_or_b32 s24, vcc_lo, s24
	s_and_not1_b32 exec_lo, exec_lo, s24
	s_cbranch_execnz .LBB2_4
.LBB2_17:                               ; %Flow133
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s20
	s_add_i32 s15, s12, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s15, s16
	s_cbranch_scc0 .LBB2_2
.LBB2_18:                               ; %._crit_edge101
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 28
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf, .Lfunc_end2-_Z26threeinterpolategradKerneliiiiiPKfPKiS0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 780
; NumSgprs: 30
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 30
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .actual_access:  read_only
        .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  write_only
        .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  write_only
        .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
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  - 2
...

	.end_amdgpu_metadata
