// Matrix addition program MatrixMult.cu, Barry Wilkinson, Dec. 28, 2010.
#include <stdio.h>
#include <cuda.h>
#include <stdlib.h>

__global__ void gpu_matrixmult(int *gpu_a, int *gpu_b, int *gpu_c, int N) {

	int k, sum = 0;
	int col = threadIdx.x + blockDim.x * blockIdx.x; 
	int row = threadIdx.y + blockDim.y * blockIdx.y;

      if (col < N && row < N) {
				for (k = 0; k < N; k++) 
		        		sum += gpu_a[row * N + k] * gpu_b[k * N + col];
				gpu_c[row * N + col] = sum;
			}

}

void cpu_matrixmult(int *cpu_a, int *cpu_b, int *cpu_c, int N) {
	int row, col, k, sum;

	for (row =0; row < N; row++)   				// row of a
		for (col =0; col < N; col++) {				// column of b
			sum = 0;
			for(k = 0; k < N; k++) 
          			sum += cpu_a[row * N + k] * cpu_b[k * N + col];
			cpu_c[row * N + col] = sum;
			//d[row * N + col] = gpu_c[row *N + col];
		}
}


int main(int argc, char *argv[])  {
	int i, j; 							// loop counters
	int Grid_Dim_x=1, Grid_Dim_y=1;		//Grid structure values
	int Block_Dim_x=1, Block_Dim_y=1;		//Block structure values
	int noThreads_x, noThreads_y;			// number of threads available in device, each dimension
	int noThreads_block;					// number of threads in a block
	int N = 10;  						// size of array in each dimension
	int B;
	int T;
	int *a,*b,*c,*d;
	int *dev_a, *dev_b, *dev_c;
	int size;							// number of bytes in arrays
	cudaEvent_t start, stop;     				// using cuda events to measure time
	float elapsed_time_ms;       			// which is applicable for asynchronous code also
	cudaEventCreate(&start);		
	cudaEventCreate(&stop);
int repeat = 1;
while(repeat == 1) {
/* --------------------ENTER INPUT PARAMETERS AND ALLOCATE DATA -----------------------*/
							// keyboard input

	printf("Enter the value for N: ");
	scanf("%d", &N);
//takes in input
	int valid = 0;
	while(valid == 0) {

		printf("Enter the number of blocks: ");
		scanf("%d", &B);

		printf("Enter the number of threads: ");
		scanf("%d", &T);

		if(B > 1024 || T > 1024 || B*T < N*N) {
			printf("Invlaid input entered.");
		} else {
			valid = 1;
			Grid_Dim_x = B;
			Block_Dim_x = T;		//puts the size of blocks and thread in for the dim3
		}
	}
	
	dim3 Grid(Grid_Dim_x, Grid_Dim_x);	//Grid structure
	dim3 Block(Block_Dim_x,Block_Dim_y);	//Block structure, threads/block limited by specific device
	size = N * N * sizeof(int);				// number of bytes in total in arrays

	a = (int*) malloc(size);					//dynamically allocated memory for arrays on host
	b = (int*) malloc(size);
	c = (int*) malloc(size);					// results from GPU
	d = (int*) malloc(size);				// results from CPU
							// load arrays with some numbers

		int row, col;
		srand(2);
		for(row=0; row < N; row++) { // load arrays with some numbers
			for(col=0; col < N; col++) {
				a[row * N + col] = rand() % 10;
				b[row * N + col] = rand() % 10; 
			}
		}

	cudaMalloc((void**)&dev_a, size);			// allocate memory on device
	cudaMalloc((void**)&dev_b, size);
	cudaMalloc((void**)&dev_c, size);

	cudaMemcpy(dev_a, a , size ,cudaMemcpyHostToDevice);
	cudaMemcpy(dev_b, b , size ,cudaMemcpyHostToDevice);

	cudaEventRecord(start, 0); 			// here start time, after memcpy

	gpu_matrixmult<<<Grid,Block>>>(dev_a,dev_b,dev_c,N);
	cudaMemcpy(c, dev_c, size , cudaMemcpyDeviceToHost);

	cudaEventRecord(stop, 0);     			// measuse end time
	cudaEventSynchronize(stop);
	cudaEventElapsedTime(&elapsed_time_ms, start, stop );

	printf("Time to calculate results on GPU: %f ms.\n", elapsed_time_ms);
	double gpuTime = elapsed_time_ms; 

/* ------------- COMPUTATION DONE ON HOST CPU ----------------------------*/

	cudaEventRecord(start, 0);			// use same timing*

	cpu_matrixmult(a,b,d,N);				// do calculation on host

	cudaEventRecord(stop, 0);     		// measure end time
	cudaEventSynchronize(stop);
	cudaEventElapsedTime(&elapsed_time_ms, start, stop );

	printf("Time to calculate results on CPU: %f ms.\n", elapsed_time_ms);  // exe. time
	double cpuTime = elapsed_time_ms;

/* ------------------- check device creates correct results -----------------*/
/*
	int s;
	for(s=0;s<N*N;s++) {
		printf("%d\t", d[s]);
		if(s%N == 0 && s != 0) {
			printf("\n");
		}
	}
*/
//puts out an error is the two matricies are not the same
	printf("\n");
	int error = 0;
	int k;
	for(k=0; k<N*N; k++) {
		if(d[k] != c[k]) {
			error =1;
			break;
		} 
	}

	if(error ==1 ) 
		printf("There is an error.\n");
	else
		printf("Sequential and parallel produce the same results.\n");

	double speedupFactor;
	speedupFactor = cpuTime/gpuTime;
	printf("Speedup Factor: %lf\n", speedupFactor);

	printf("Would you like to repeat? Enter 1 for yes or 0 for no.\n");
	scanf("%d", &repeat);
}
/* --------------------- repeat program  ----------------------------------------*/
 								//  while loop to repeat calc with different parameters
/* --------------  clean up  ---------------------------------------*/
	free(a); free(b); free(c);
	cudaFree(dev_a);
	cudaFree(dev_b);
	cudaFree(dev_c);
	cudaEventDestroy(start);
	cudaEventDestroy(stop);
	return 0;
}


	.file	"tmpxft_00333a99_00000000-6_MM.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z14cpu_matrixmultPiS_S_i
	.type	_Z14cpu_matrixmultPiS_S_i, @function
_Z14cpu_matrixmultPiS_S_i:
.LFB2027:
	.cfi_startproc
	endbr64
	movq	%rsi, %r10
	movslq	%ecx, %rsi
	xorl	%r8d, %r8d
	movq	%rdi, %r9
	movq	%rsi, %rax
	movq	%rdx, %r11
	salq	$2, %rsi
	xorl	%ecx, %ecx
	cmpl	%eax, %r8d
	jl	.L11
	ret
.L11:
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
.L7:
	xorl	%edx, %edx
	leaq	(%r9,%rcx), %r13
	leaq	(%r11,%rcx), %r14
.L6:
	leaq	(%r10,%rdx,4), %rbp
	xorl	%edi, %edi
	xorl	%ebx, %ebx
.L4:
	movl	0(%r13,%rdi,4), %r12d
	imull	0(%rbp), %r12d
	incq	%rdi
	addq	%rsi, %rbp
	addl	%r12d, %ebx
	cmpl	%edi, %eax
	jg	.L4
	movl	%ebx, (%r14,%rdx,4)
	incq	%rdx
	cmpl	%edx, %eax
	jg	.L6
	incl	%r8d
	addq	%rsi, %rcx
	cmpl	%eax, %r8d
	jl	.L7
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z14cpu_matrixmultPiS_S_i, .-_Z14cpu_matrixmultPiS_S_i
	.globl	_Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i
	.type	_Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i, @function
_Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14gpu_matrixmultPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L13:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i, .-_Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i
	.globl	_Z14gpu_matrixmultPiS_S_i
	.type	_Z14gpu_matrixmultPiS_S_i, @function
_Z14gpu_matrixmultPiS_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2054:
	.size	_Z14gpu_matrixmultPiS_S_i, .-_Z14gpu_matrixmultPiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Enter the value for N: "
.LC1:
	.string	"%d"
.LC2:
	.string	"Enter the number of blocks: "
.LC3:
	.string	"Enter the number of threads: "
.LC4:
	.string	"Invlaid input entered."
.LC5:
	.string	"Time to calculate results on GPU: %f ms.\n"
.LC6:
	.string	"Time to calculate results on CPU: %f ms.\n"
.LC7:
	.string	"\n"
.LC8:
	.string	"Speedup Factor: %lf\n"
.LC9:
	.string	"Would you like to repeat? Enter 1 for yes or 0 for no.\n"
.LC10:
	.string	"There is an error.\n"
.LC11:
	.string	"Sequential and parallel produce the same results.\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	64(%rsp), %rdi
	movl	$10, 20(%rsp)
	call	cudaEventCreate@PLT
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$1, 36(%rsp)
.L19:
	cmpl	$1, 36(%rsp)
	jne	.L39
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	20(%rsp), %rsi
	xorl	%eax, %eax
	leaq	.LC1(%rip), %rdi
	call	__isoc23_scanf@PLT
	leaq	.LC2(%rip), %rbp
.L22:
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	24(%rsp), %rsi
	leaq	.LC1(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	28(%rsp), %rsi
	leaq	.LC1(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	24(%rsp), %eax
	cmpl	$1024, %eax
	jg	.L20
	movl	28(%rsp), %edx
	cmpl	$1024, %edx
	jg	.L20
	movl	20(%rsp), %ebx
	movl	%eax, %ecx
	imull	%edx, %ecx
	imull	%ebx, %ebx
	cmpl	%ebx, %ecx
	jge	.L21
.L20:
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L22
.L39:
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	72(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L21:
	movl	%eax, 80(%rsp)
	sall	$2, %ebx
	movl	$10, %r14d
	movl	%eax, 84(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 96(%rsp)
	movslq	%ebx, %rax
	xorl	%ebx, %ebx
	movq	%rax, %rdi
	movl	%edx, 92(%rsp)
	movl	$1, 88(%rsp)
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$2, %edi
	movq	%rax, %r15
	call	srand@PLT
.L31:
	cmpl	%ebx, 20(%rsp)
	jle	.L40
	xorl	%ebp, %ebp
.L24:
	cmpl	%ebp, 20(%rsp)
	jle	.L41
	call	rand@PLT
	movl	20(%rsp), %edi
	cltd
	idivl	%r14d
	movq	8(%rsp), %rax
	imull	%ebx, %edi
	addl	%ebp, %edi
	movslq	%edi, %rdi
	movl	%edx, (%rax,%rdi,4)
	call	rand@PLT
	movl	20(%rsp), %edi
	cltd
	idivl	%r14d
	imull	%ebx, %edi
	addl	%ebp, %edi
	incl	%ebp
	movslq	%edi, %rdi
	movl	%edx, (%r12,%rdi,4)
	jmp	.L24
.L41:
	incl	%ebx
	jmp	.L31
.L40:
	movq	(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	40(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	100(%rsp), %ecx
	movl	88(%rsp), %esi
	xorl	%r9d, %r9d
	movq	92(%rsp), %rdx
	movq	80(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movl	20(%rsp), %ecx
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z39__device_stub__Z14gpu_matrixmultPiS_S_iPiS_S_i
.L25:
	movq	(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	leaq	32(%rsp), %rbx
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	72(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	%rbx, %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	32(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	cvtss2sd	32(%rsp), %xmm1
	movsd	%xmm1, (%rsp)
	call	cudaEventRecord@PLT
	movl	20(%rsp), %ecx
	movq	%r15, %rdx
	movq	%r12, %rsi
	movq	8(%rsp), %rdi
	call	_Z14cpu_matrixmultPiS_S_i
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	72(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	%rbx, %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	32(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC7(%rip), %rsi
	cvtss2sd	32(%rsp), %xmm2
	movq	%xmm2, %rbx
	call	__printf_chk@PLT
	movl	20(%rsp), %eax
	imull	%eax, %eax
	movl	%eax, %edx
	xorl	%eax, %eax
.L26:
	cmpl	%eax, %edx
	jle	.L42
	movl	(%r15,%rax,4), %ecx
	incq	%rax
	cmpl	-4(%r13,%rax,4), %ecx
	je	.L26
	leaq	.LC10(%rip), %rsi
	jmp	.L38
.L42:
	leaq	.LC11(%rip), %rsi
.L38:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movq	%rbx, %xmm0
	divsd	(%rsp), %xmm0
	call	__printf_chk@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	36(%rsp), %rsi
	leaq	.LC1(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	jmp	.L19
.L33:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z14gpu_matrixmultPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14gpu_matrixmultPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// Matrix addition program MatrixMult.cu, Barry Wilkinson, Dec. 28, 2010.
#include <stdio.h>
#include <hip/hip_runtime.h>
#include <stdlib.h>

__global__ void gpu_matrixmult(int *gpu_a, int *gpu_b, int *gpu_c, int N) {

	int k, sum = 0;
	int col = threadIdx.x + blockDim.x * blockIdx.x; 
	int row = threadIdx.y + blockDim.y * blockIdx.y;

      if (col < N && row < N) {
				for (k = 0; k < N; k++) 
		        		sum += gpu_a[row * N + k] * gpu_b[k * N + col];
				gpu_c[row * N + col] = sum;
			}

}

void cpu_matrixmult(int *cpu_a, int *cpu_b, int *cpu_c, int N) {
	int row, col, k, sum;

	for (row =0; row < N; row++)   				// row of a
		for (col =0; col < N; col++) {				// column of b
			sum = 0;
			for(k = 0; k < N; k++) 
          			sum += cpu_a[row * N + k] * cpu_b[k * N + col];
			cpu_c[row * N + col] = sum;
			//d[row * N + col] = gpu_c[row *N + col];
		}
}


int main(int argc, char *argv[])  {
	int i, j; 							// loop counters
	int Grid_Dim_x=1, Grid_Dim_y=1;		//Grid structure values
	int Block_Dim_x=1, Block_Dim_y=1;		//Block structure values
	int noThreads_x, noThreads_y;			// number of threads available in device, each dimension
	int noThreads_block;					// number of threads in a block
	int N = 10;  						// size of array in each dimension
	int B;
	int T;
	int *a,*b,*c,*d;
	int *dev_a, *dev_b, *dev_c;
	int size;							// number of bytes in arrays
	hipEvent_t start, stop;     				// using cuda events to measure time
	float elapsed_time_ms;       			// which is applicable for asynchronous code also
	hipEventCreate(&start);		
	hipEventCreate(&stop);
int repeat = 1;
while(repeat == 1) {
/* --------------------ENTER INPUT PARAMETERS AND ALLOCATE DATA -----------------------*/
							// keyboard input

	printf("Enter the value for N: ");
	scanf("%d", &N);
//takes in input
	int valid = 0;
	while(valid == 0) {

		printf("Enter the number of blocks: ");
		scanf("%d", &B);

		printf("Enter the number of threads: ");
		scanf("%d", &T);

		if(B > 1024 || T > 1024 || B*T < N*N) {
			printf("Invlaid input entered.");
		} else {
			valid = 1;
			Grid_Dim_x = B;
			Block_Dim_x = T;		//puts the size of blocks and thread in for the dim3
		}
	}
	
	dim3 Grid(Grid_Dim_x, Grid_Dim_x);	//Grid structure
	dim3 Block(Block_Dim_x,Block_Dim_y);	//Block structure, threads/block limited by specific device
	size = N * N * sizeof(int);				// number of bytes in total in arrays

	a = (int*) malloc(size);					//dynamically allocated memory for arrays on host
	b = (int*) malloc(size);
	c = (int*) malloc(size);					// results from GPU
	d = (int*) malloc(size);				// results from CPU
							// load arrays with some numbers

		int row, col;
		srand(2);
		for(row=0; row < N; row++) { // load arrays with some numbers
			for(col=0; col < N; col++) {
				a[row * N + col] = rand() % 10;
				b[row * N + col] = rand() % 10; 
			}
		}

	hipMalloc((void**)&dev_a, size);			// allocate memory on device
	hipMalloc((void**)&dev_b, size);
	hipMalloc((void**)&dev_c, size);

	hipMemcpy(dev_a, a , size ,hipMemcpyHostToDevice);
	hipMemcpy(dev_b, b , size ,hipMemcpyHostToDevice);

	hipEventRecord(start, 0); 			// here start time, after memcpy

	gpu_matrixmult<<<Grid,Block>>>(dev_a,dev_b,dev_c,N);
	hipMemcpy(c, dev_c, size , hipMemcpyDeviceToHost);

	hipEventRecord(stop, 0);     			// measuse end time
	hipEventSynchronize(stop);
	hipEventElapsedTime(&elapsed_time_ms, start, stop );

	printf("Time to calculate results on GPU: %f ms.\n", elapsed_time_ms);
	double gpuTime = elapsed_time_ms; 

/* ------------- COMPUTATION DONE ON HOST CPU ----------------------------*/

	hipEventRecord(start, 0);			// use same timing*

	cpu_matrixmult(a,b,d,N);				// do calculation on host

	hipEventRecord(stop, 0);     		// measure end time
	hipEventSynchronize(stop);
	hipEventElapsedTime(&elapsed_time_ms, start, stop );

	printf("Time to calculate results on CPU: %f ms.\n", elapsed_time_ms);  // exe. time
	double cpuTime = elapsed_time_ms;

/* ------------------- check device creates correct results -----------------*/
/*
	int s;
	for(s=0;s<N*N;s++) {
		printf("%d\t", d[s]);
		if(s%N == 0 && s != 0) {
			printf("\n");
		}
	}
*/
//puts out an error is the two matricies are not the same
	printf("\n");
	int error = 0;
	int k;
	for(k=0; k<N*N; k++) {
		if(d[k] != c[k]) {
			error =1;
			break;
		} 
	}

	if(error ==1 ) 
		printf("There is an error.\n");
	else
		printf("Sequential and parallel produce the same results.\n");

	double speedupFactor;
	speedupFactor = cpuTime/gpuTime;
	printf("Speedup Factor: %lf\n", speedupFactor);

	printf("Would you like to repeat? Enter 1 for yes or 0 for no.\n");
	scanf("%d", &repeat);
}
/* --------------------- repeat program  ----------------------------------------*/
 								//  while loop to repeat calc with different parameters
/* --------------  clean up  ---------------------------------------*/
	free(a); free(b); free(c);
	hipFree(dev_a);
	hipFree(dev_b);
	hipFree(dev_c);
	hipEventDestroy(start);
	hipEventDestroy(stop);
	return 0;
}


	.text
	.file	"MM.hip"
	.globl	_Z29__device_stub__gpu_matrixmultPiS_S_i # -- Begin function _Z29__device_stub__gpu_matrixmultPiS_S_i
	.type	_Z29__device_stub__gpu_matrixmultPiS_S_i,@function
_Z29__device_stub__gpu_matrixmultPiS_S_i: # @_Z29__device_stub__gpu_matrixmultPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14gpu_matrixmultPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__gpu_matrixmultPiS_S_i, .Lfunc_end0-_Z29__device_stub__gpu_matrixmultPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z14cpu_matrixmultPiS_S_i       # -- Begin function _Z14cpu_matrixmultPiS_S_i
	.type	_Z14cpu_matrixmultPiS_S_i,@function
_Z14cpu_matrixmultPiS_S_i:              # @_Z14cpu_matrixmultPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, -8(%rsp)                  # 8-byte Spill
	testl	%ecx, %ecx
	jle	.LBB1_7
# %bb.1:                                # %.preheader26.lr.ph
	movl	%ecx, %eax
	leaq	(,%rax,4), %r8
	xorl	%edx, %edx
	xorl	%r10d, %r10d
.LBB1_2:                                # %.preheader.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
                                        #       Child Loop BB1_4 Depth 3
	movl	%edx, %r11d
	leaq	(%rdi,%r11,4), %r11
	movq	%r10, %rbx
	imulq	%rax, %rbx
	movq	-8(%rsp), %r9                   # 8-byte Reload
	leaq	(%r9,%rbx,4), %rbx
	movq	%rsi, %r14
	xorl	%r15d, %r15d
.LBB1_3:                                # %.preheader
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_4 Depth 3
	xorl	%r12d, %r12d
	movq	%r14, %r13
	xorl	%ebp, %ebp
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%r13), %r9d
	imull	(%r11,%r12,4), %r9d
	addl	%r9d, %ebp
	incq	%r12
	addq	%r8, %r13
	cmpq	%r12, %rax
	jne	.LBB1_4
# %bb.5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_3 Depth=2
	movl	%ebp, (%rbx,%r15,4)
	incq	%r15
	addq	$4, %r14
	cmpq	%rax, %r15
	jne	.LBB1_3
# %bb.6:                                # %._crit_edge30
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r10
	addl	%ecx, %edx
	cmpq	%rax, %r10
	jne	.LBB1_2
.LBB1_7:                                # %._crit_edge32
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z14cpu_matrixmultPiS_S_i, .Lfunc_end1-_Z14cpu_matrixmultPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967296, %rbx               # imm = 0x100000000
	movq	%rsp, %rax
	movl	$10, (%rax)
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	leaq	32(%rsp), %rax
	movl	$1, (%rax)
	leaq	20(%rsp), %r15
	leaq	36(%rsp), %r12
	leaq	1(%rbx), %rax
	movq	%rax, 96(%rsp)                  # 8-byte Spill
.LBB2_1:                                # %.lr.ph79
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
                                        #     Child Loop BB2_8 Depth 2
                                        #       Child Loop BB2_10 Depth 3
                                        #     Child Loop BB2_16 Depth 2
                                        #       Child Loop BB2_17 Depth 3
                                        #         Child Loop BB2_18 Depth 4
                                        #     Child Loop BB2_25 Depth 2
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movq	%rsp, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	20(%rsp), %r14d
	cmpl	$1024, %r14d                    # imm = 0x400
	jg	.LBB2_5
# %bb.3:                                #   in Loop: Header=BB2_2 Depth=2
	movl	36(%rsp), %edx
	cmpl	$1024, %edx                     # imm = 0x400
	jg	.LBB2_5
# %bb.4:                                #   in Loop: Header=BB2_2 Depth=2
	movl	%r14d, %eax
	imull	%edx, %eax
	movl	(%rsp), %ecx
	imull	%ecx, %ecx
	cmpl	%ecx, %eax
	jge	.LBB2_6
.LBB2_5:                                #   in Loop: Header=BB2_2 Depth=2
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB2_2
.LBB2_6:                                #   in Loop: Header=BB2_1 Depth=1
	movq	%rdx, 40(%rsp)                  # 8-byte Spill
	movl	(%rsp), %eax
	imull	%eax, %eax
	shll	$2, %eax
	movslq	%eax, %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %rbp
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	%r15, 48(%rsp)                  # 8-byte Spill
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	movl	$2, %edi
	callq	srand
	movl	(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB2_12
# %bb.7:                                # %.preheader.preheader
                                        #   in Loop: Header=BB2_1 Depth=1
	xorl	%r12d, %r12d
.LBB2_8:                                # %.preheader
                                        #   Parent Loop BB2_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_10 Depth 3
	testl	%eax, %eax
	jle	.LBB2_11
# %bb.9:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_8 Depth=2
	movslq	%r12d, %r13
	xorl	%r15d, %r15d
.LBB2_10:                               # %.lr.ph
                                        #   Parent Loop BB2_1 Depth=1
                                        #     Parent Loop BB2_8 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	movslq	(%rsp), %rcx
	imulq	%r13, %rcx
	addq	%r15, %rcx
	movl	%eax, (%rbp,%rcx,4)
	callq	rand
	movslq	%eax, %rcx
	imulq	$1717986919, %rcx, %rax         # imm = 0x66666667
	movq	%rax, %rdx
	shrq	$63, %rdx
	sarq	$34, %rax
	addl	%edx, %eax
	addl	%eax, %eax
	leal	(%rax,%rax,4), %eax
	subl	%eax, %ecx
	movl	(%rsp), %eax
	movl	%r12d, %edx
	imull	%eax, %edx
	movslq	%edx, %rdx
	addq	%r15, %rdx
	movl	%ecx, (%rbx,%rdx,4)
	incq	%r15
	cmpl	%eax, %r15d
	jl	.LBB2_10
.LBB2_11:                               # %._crit_edge
                                        #   in Loop: Header=BB2_8 Depth=2
	incl	%r12d
	cmpl	%eax, %r12d
	jl	.LBB2_8
.LBB2_12:                               # %._crit_edge73
                                        #   in Loop: Header=BB2_1 Depth=1
	imulq	96(%rsp), %r14                  # 8-byte Folded Reload
	movabsq	$4294967296, %rax               # imm = 0x100000000
	movq	40(%rsp), %r12                  # 8-byte Reload
	orq	%rax, %r12
	leaq	80(%rsp), %rdi
	movq	48(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	72(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	64(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	80(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	72(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_14
# %bb.13:                               #   in Loop: Header=BB2_1 Depth=1
	movq	80(%rsp), %rdi
	movq	72(%rsp), %rsi
	movq	64(%rsp), %rdx
	movl	(%rsp), %ecx
	callq	_Z29__device_stub__gpu_matrixmultPiS_S_i
.LBB2_14:                               #   in Loop: Header=BB2_1 Depth=1
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	4(%rsp), %r13
	movq	%r13, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	4(%rsp), %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	4(%rsp), %xmm0
	movsd	%xmm0, 48(%rsp)                 # 8-byte Spill
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB2_21
# %bb.15:                               # %.preheader26.lr.ph.i
                                        #   in Loop: Header=BB2_1 Depth=1
	leaq	(,%rax,4), %rcx
	xorl	%edx, %edx
	xorl	%esi, %esi
.LBB2_16:                               # %.preheader.lr.ph.i
                                        #   Parent Loop BB2_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_17 Depth 3
                                        #         Child Loop BB2_18 Depth 4
	movl	%edx, %edi
	leaq	(,%rdi,4), %rdi
	addq	%rbp, %rdi
	movq	%rsi, %r8
	imulq	%rax, %r8
	movq	88(%rsp), %r9                   # 8-byte Reload
	leaq	(%r9,%r8,4), %r8
	movq	%rbx, %r9
	xorl	%r10d, %r10d
.LBB2_17:                               # %.preheader.i
                                        #   Parent Loop BB2_1 Depth=1
                                        #     Parent Loop BB2_16 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB2_18 Depth 4
	xorl	%r11d, %r11d
	movq	%r9, %r14
	xorl	%r15d, %r15d
.LBB2_18:                               #   Parent Loop BB2_1 Depth=1
                                        #     Parent Loop BB2_16 Depth=2
                                        #       Parent Loop BB2_17 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	movl	(%r14), %r12d
	imull	(%rdi,%r11), %r12d
	addl	%r12d, %r15d
	addq	$4, %r11
	addq	%rcx, %r14
	cmpq	%r11, %rcx
	jne	.LBB2_18
# %bb.19:                               # %._crit_edge.i
                                        #   in Loop: Header=BB2_17 Depth=3
	movl	%r15d, (%r8,%r10,4)
	incq	%r10
	addq	$4, %r9
	cmpq	%rax, %r10
	jne	.LBB2_17
# %bb.20:                               # %._crit_edge30.i
                                        #   in Loop: Header=BB2_16 Depth=2
	incq	%rsi
	addl	%eax, %edx
	cmpq	%rax, %rsi
	jne	.LBB2_16
.LBB2_21:                               # %_Z14cpu_matrixmultPiS_S_i.exit
                                        #   in Loop: Header=BB2_1 Depth=1
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	%r13, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	4(%rsp), %xmm0
	movl	$.L.str.6, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	4(%rsp), %xmm0
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
	movl	$10, %edi
	callq	putchar@PLT
	movl	(%rsp), %eax
	movl	$.Lstr, %edi
	testl	%eax, %eax
	leaq	36(%rsp), %r12
	je	.LBB2_22
# %bb.24:                               # %.lr.ph75.preheader
                                        #   in Loop: Header=BB2_1 Depth=1
	imull	%eax, %eax
	cmpl	$1, %eax
	adcl	$0, %eax
	xorl	%ecx, %ecx
	leaq	20(%rsp), %r15
	movq	56(%rsp), %r14                  # 8-byte Reload
.LBB2_25:                               # %.lr.ph75
                                        #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	88(%rsp), %rdx                  # 8-byte Reload
	movl	(%rdx,%rcx,4), %edx
	cmpl	(%r14,%rcx,4), %edx
	jne	.LBB2_26
# %bb.23:                               #   in Loop: Header=BB2_25 Depth=2
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB2_25
	jmp	.LBB2_27
.LBB2_22:                               #   in Loop: Header=BB2_1 Depth=1
	leaq	20(%rsp), %r15
	movq	56(%rsp), %r14                  # 8-byte Reload
	jmp	.LBB2_27
.LBB2_26:                               #   in Loop: Header=BB2_1 Depth=1
	movl	$.Lstr.1, %edi
.LBB2_27:                               # %.critedge
                                        #   in Loop: Header=BB2_1 Depth=1
	callq	puts@PLT
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	divsd	48(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$.L.str.10, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$.L.str.1, %edi
	leaq	32(%rsp), %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	cmpl	$1, 32(%rsp)
	je	.LBB2_1
# %bb.28:                               # %._crit_edge80
	movq	%rbp, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	80(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	xorl	%eax, %eax
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14gpu_matrixmultPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14gpu_matrixmultPiS_S_i,@object # @_Z14gpu_matrixmultPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z14gpu_matrixmultPiS_S_i
	.p2align	3, 0x0
_Z14gpu_matrixmultPiS_S_i:
	.quad	_Z29__device_stub__gpu_matrixmultPiS_S_i
	.size	_Z14gpu_matrixmultPiS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Enter the value for N: "
	.size	.L.str, 24

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Enter the number of blocks: "
	.size	.L.str.2, 29

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Enter the number of threads: "
	.size	.L.str.3, 30

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Invlaid input entered."
	.size	.L.str.4, 23

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Time to calculate results on GPU: %f ms.\n"
	.size	.L.str.5, 42

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Time to calculate results on CPU: %f ms.\n"
	.size	.L.str.6, 42

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Speedup Factor: %lf\n"
	.size	.L.str.10, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14gpu_matrixmultPiS_S_i"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Sequential and parallel produce the same results."
	.size	.Lstr, 50

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"There is an error."
	.size	.Lstr.1, 19

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Would you like to repeat? Enter 1 for yes or 0 for no."
	.size	.Lstr.2, 55

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__gpu_matrixmultPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14gpu_matrixmultPiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14gpu_matrixmultPiS_S_i ; -- Begin function _Z14gpu_matrixmultPiS_S_i
	.globl	_Z14gpu_matrixmultPiS_S_i
	.p2align	8
	.type	_Z14gpu_matrixmultPiS_S_i,@function
_Z14gpu_matrixmultPiS_S_i:              ; @_Z14gpu_matrixmultPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e64 s2, v2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_lo_u32 v1, v1, s2
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s3, s2
	v_mov_b32_e32 v5, v0
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v6, 31, v5
	s_add_i32 s3, s3, -1
	s_cmp_lg_u32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	v_add_co_u32 v6, vcc_lo, s6, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	global_load_b32 v8, v[3:4], off
	global_load_b32 v9, v[6:7], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s2, v5
	s_cbranch_scc1 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v2, 0
.LBB0_5:                                ; %._crit_edge
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14gpu_matrixmultPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14gpu_matrixmultPiS_S_i, .Lfunc_end0-_Z14gpu_matrixmultPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 352
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14gpu_matrixmultPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14gpu_matrixmultPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
