#include "block.cuh"

Block::Block() {
    
}

Block::Block(AABB3 aabb, Vec3 color) {
    this->aabb = aabb;
    this->color = color;
}

AABB3* Block::get_bounding_box() {
    return &this->aabb;
}


	.file	"tmpxft_00356d35_00000000-6_block.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2028:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2028:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.globl	_ZN5BlockC2Ev
	.type	_ZN5BlockC2Ev, @function
_ZN5BlockC2Ev:
.LFB2020:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	_ZN5AABB3C1Ev@PLT
	leaq	24(%rbx), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZN4Vec3C1Ev@PLT
	.cfi_endproc
.LFE2020:
	.size	_ZN5BlockC2Ev, .-_ZN5BlockC2Ev
	.globl	_ZN5BlockC1Ev
	.set	_ZN5BlockC1Ev,_ZN5BlockC2Ev
	.align 2
	.globl	_ZN5BlockC2E5AABB34Vec3
	.type	_ZN5BlockC2E5AABB34Vec3, @function
_ZN5BlockC2E5AABB34Vec3:
.LFB2023:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	movq	%xmm0, (%rsp)
	movss	%xmm1, 8(%rsp)
	call	_ZN5AABB3C1Ev@PLT
	leaq	24(%rbx), %rdi
	call	_ZN4Vec3C1Ev@PLT
	movq	48(%rsp), %rax
	movups	32(%rsp), %xmm2
	movq	%rax, 16(%rbx)
	movq	(%rsp), %rax
	movups	%xmm2, (%rbx)
	movq	%rax, 24(%rbx)
	movl	8(%rsp), %eax
	movl	%eax, 32(%rbx)
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2023:
	.size	_ZN5BlockC2E5AABB34Vec3, .-_ZN5BlockC2E5AABB34Vec3
	.globl	_ZN5BlockC1E5AABB34Vec3
	.set	_ZN5BlockC1E5AABB34Vec3,_ZN5BlockC2E5AABB34Vec3
	.align 2
	.globl	_ZN5Block16get_bounding_boxEv
	.type	_ZN5Block16get_bounding_boxEv, @function
_ZN5Block16get_bounding_boxEv:
.LFB2025:
	.cfi_startproc
	endbr64
	movq	%rdi, %rax
	ret
	.cfi_endproc
.LFE2025:
	.size	_ZN5Block16get_bounding_boxEv, .-_ZN5Block16get_bounding_boxEv
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2051:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2051:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#ifndef HEADER_BLOCK
#define HEADER_BLOCK

#include "aabb.cuh"
#include "vector.cuh"

class Block {
public:
    __host__ __device__ Block();
    __host__ __device__ Block(AABB3 aabb, Vec3 color);

    AABB3 aabb;
    Vec3 color;

    __host__ __device__ AABB3* get_bounding_box();
};

#endif
	.text
	.file	"block.hip"
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
