#include "includes.h"

#define KERNEL_RADIUS 31
#define KERNEL_LENGTH (2 * KERNEL_RADIUS + 1)

__constant__ float c_Kernel[ KERNEL_LENGTH ];

__global__ void convolutionX_63_Kernel( float *d_Dst, float *d_Src, int imageW, int imageH, int imageD, int outofbounds, float outofboundsvalue )
{
__shared__ float s_Data[ROWS_BLOCKDIM_Y][(ROWS_RESULT_STEPS + 2 * ROWS_HALO_STEPS) * ROWS_BLOCKDIM_X];

const int baseX = (blockIdx.x * ROWS_RESULT_STEPS - ROWS_HALO_STEPS) * ROWS_BLOCKDIM_X + threadIdx.x;
const int baseY = blockIdx.y * ROWS_BLOCKDIM_Y + threadIdx.y;
const int baseZ = blockIdx.z;

const int firstPixelInLine = ROWS_BLOCKDIM_X * ROWS_HALO_STEPS - threadIdx.x;
const int lastPixelInLine = imageW - baseX - 1;

// set the input and output arrays to the right offset (actually the output is not at the right offset, but this is corrected later)
d_Src += baseZ * imageH * imageW + baseY * imageW + baseX;
d_Dst += baseZ * imageH * imageW + baseY * imageW + baseX;

// Load main data
// Start copying after the ROWS_HALO_STEPS, only the original data that will be convolved
#pragma unroll

for (int i = ROWS_HALO_STEPS; i < ROWS_HALO_STEPS + ROWS_RESULT_STEPS; i++)
{
if ( outofbounds == 0 )
s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X] = (imageW - baseX > i * ROWS_BLOCKDIM_X) ? d_Src[i * ROWS_BLOCKDIM_X] : 0;
else if ( outofbounds == 1 )
s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X] = (imageW - baseX > i * ROWS_BLOCKDIM_X) ? d_Src[i * ROWS_BLOCKDIM_X] : outofboundsvalue;
else
s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X] = (imageW - baseX > i * ROWS_BLOCKDIM_X) ? d_Src[i * ROWS_BLOCKDIM_X] : d_Src[ lastPixelInLine ];
}

// Load left halo
// If the data fetched is outside of the image (note: baseX can be <0 for the first block) , use a zero-out of bounds strategy
#pragma unroll

for (int i = 0; i < ROWS_HALO_STEPS; i++)
{
if ( outofbounds == 0 )
s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X] = (baseX >= -i * ROWS_BLOCKDIM_X) ? d_Src[i * ROWS_BLOCKDIM_X] : 0;
else if ( outofbounds == 1 )
s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X] = (baseX >= -i * ROWS_BLOCKDIM_X) ? d_Src[i * ROWS_BLOCKDIM_X] : outofboundsvalue;
else
s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X] = (baseX >= -i * ROWS_BLOCKDIM_X) ? d_Src[i * ROWS_BLOCKDIM_X] : d_Src[ firstPixelInLine ];
}

//Load right halo
#pragma unroll

for (int i = ROWS_HALO_STEPS + ROWS_RESULT_STEPS; i < ROWS_HALO_STEPS + ROWS_RESULT_STEPS + ROWS_HALO_STEPS; i++)
{
if ( outofbounds == 0 )
s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X] = (imageW - baseX > i * ROWS_BLOCKDIM_X) ? d_Src[i * ROWS_BLOCKDIM_X] : 0;
else if ( outofbounds == 1 )
s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X] = (imageW - baseX > i * ROWS_BLOCKDIM_X) ? d_Src[i * ROWS_BLOCKDIM_X] : outofboundsvalue;
else
s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X] = (imageW - baseX > i * ROWS_BLOCKDIM_X) ? d_Src[i * ROWS_BLOCKDIM_X] : d_Src[ lastPixelInLine ];
}

//Compute and store results
__syncthreads();

// this pixel is not part of the image and does not need to be convolved
if ( baseY >= imageH )
return;

#pragma unroll

for (int i = ROWS_HALO_STEPS; i < ROWS_HALO_STEPS + ROWS_RESULT_STEPS; i++)
{
if (imageW - baseX > i * ROWS_BLOCKDIM_X)
{
float sum = 0;

#pragma unroll

for (int j = -KERNEL_RADIUS; j <= KERNEL_RADIUS; j++)
{
sum += c_Kernel[KERNEL_RADIUS - j] * s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X + j];
}

d_Dst[i * ROWS_BLOCKDIM_X] = sum;
}
}
}
	.file	"tmpxft_002e2592_00000000-6_convolutionX_63_Kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z49__device_stub__Z22convolutionX_63_KernelPfS_iiiifPfS_iiiif
	.type	_Z49__device_stub__Z22convolutionX_63_KernelPfS_iiiifPfS_iiiif, @function
_Z49__device_stub__Z22convolutionX_63_KernelPfS_iiiifPfS_iiiif:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 28(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 20(%rsp)
	movl	%r9d, 16(%rsp)
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z22convolutionX_63_KernelPfS_iiiif(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z49__device_stub__Z22convolutionX_63_KernelPfS_iiiifPfS_iiiif, .-_Z49__device_stub__Z22convolutionX_63_KernelPfS_iiiifPfS_iiiif
	.globl	_Z22convolutionX_63_KernelPfS_iiiif
	.type	_Z22convolutionX_63_KernelPfS_iiiif, @function
_Z22convolutionX_63_KernelPfS_iiiif:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z22convolutionX_63_KernelPfS_iiiifPfS_iiiif
	.cfi_endproc
.LFE2033:
	.size	_Z22convolutionX_63_KernelPfS_iiiif, .-_Z22convolutionX_63_KernelPfS_iiiif
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z22convolutionX_63_KernelPfS_iiiif"
.LC1:
	.string	"c_Kernel"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z22convolutionX_63_KernelPfS_iiiif(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	movl	$252, %r9d
	leaq	_ZL8c_Kernel(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL8c_Kernel
	.comm	_ZL8c_Kernel,252,32
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"

#define KERNEL_RADIUS 31
#define KERNEL_LENGTH (2 * KERNEL_RADIUS + 1)

__constant__ float c_Kernel[ KERNEL_LENGTH ];

__global__ void convolutionX_63_Kernel( float *d_Dst, float *d_Src, int imageW, int imageH, int imageD, int outofbounds, float outofboundsvalue )
{
__shared__ float s_Data[ROWS_BLOCKDIM_Y][(ROWS_RESULT_STEPS + 2 * ROWS_HALO_STEPS) * ROWS_BLOCKDIM_X];

const int baseX = (blockIdx.x * ROWS_RESULT_STEPS - ROWS_HALO_STEPS) * ROWS_BLOCKDIM_X + threadIdx.x;
const int baseY = blockIdx.y * ROWS_BLOCKDIM_Y + threadIdx.y;
const int baseZ = blockIdx.z;

const int firstPixelInLine = ROWS_BLOCKDIM_X * ROWS_HALO_STEPS - threadIdx.x;
const int lastPixelInLine = imageW - baseX - 1;

// set the input and output arrays to the right offset (actually the output is not at the right offset, but this is corrected later)
d_Src += baseZ * imageH * imageW + baseY * imageW + baseX;
d_Dst += baseZ * imageH * imageW + baseY * imageW + baseX;

// Load main data
// Start copying after the ROWS_HALO_STEPS, only the original data that will be convolved
#pragma unroll

for (int i = ROWS_HALO_STEPS; i < ROWS_HALO_STEPS + ROWS_RESULT_STEPS; i++)
{
if ( outofbounds == 0 )
s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X] = (imageW - baseX > i * ROWS_BLOCKDIM_X) ? d_Src[i * ROWS_BLOCKDIM_X] : 0;
else if ( outofbounds == 1 )
s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X] = (imageW - baseX > i * ROWS_BLOCKDIM_X) ? d_Src[i * ROWS_BLOCKDIM_X] : outofboundsvalue;
else
s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X] = (imageW - baseX > i * ROWS_BLOCKDIM_X) ? d_Src[i * ROWS_BLOCKDIM_X] : d_Src[ lastPixelInLine ];
}

// Load left halo
// If the data fetched is outside of the image (note: baseX can be <0 for the first block) , use a zero-out of bounds strategy
#pragma unroll

for (int i = 0; i < ROWS_HALO_STEPS; i++)
{
if ( outofbounds == 0 )
s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X] = (baseX >= -i * ROWS_BLOCKDIM_X) ? d_Src[i * ROWS_BLOCKDIM_X] : 0;
else if ( outofbounds == 1 )
s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X] = (baseX >= -i * ROWS_BLOCKDIM_X) ? d_Src[i * ROWS_BLOCKDIM_X] : outofboundsvalue;
else
s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X] = (baseX >= -i * ROWS_BLOCKDIM_X) ? d_Src[i * ROWS_BLOCKDIM_X] : d_Src[ firstPixelInLine ];
}

//Load right halo
#pragma unroll

for (int i = ROWS_HALO_STEPS + ROWS_RESULT_STEPS; i < ROWS_HALO_STEPS + ROWS_RESULT_STEPS + ROWS_HALO_STEPS; i++)
{
if ( outofbounds == 0 )
s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X] = (imageW - baseX > i * ROWS_BLOCKDIM_X) ? d_Src[i * ROWS_BLOCKDIM_X] : 0;
else if ( outofbounds == 1 )
s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X] = (imageW - baseX > i * ROWS_BLOCKDIM_X) ? d_Src[i * ROWS_BLOCKDIM_X] : outofboundsvalue;
else
s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X] = (imageW - baseX > i * ROWS_BLOCKDIM_X) ? d_Src[i * ROWS_BLOCKDIM_X] : d_Src[ lastPixelInLine ];
}

//Compute and store results
__syncthreads();

// this pixel is not part of the image and does not need to be convolved
if ( baseY >= imageH )
return;

#pragma unroll

for (int i = ROWS_HALO_STEPS; i < ROWS_HALO_STEPS + ROWS_RESULT_STEPS; i++)
{
if (imageW - baseX > i * ROWS_BLOCKDIM_X)
{
float sum = 0;

#pragma unroll

for (int j = -KERNEL_RADIUS; j <= KERNEL_RADIUS; j++)
{
sum += c_Kernel[KERNEL_RADIUS - j] * s_Data[threadIdx.y][threadIdx.x + i * ROWS_BLOCKDIM_X + j];
}

d_Dst[i * ROWS_BLOCKDIM_X] = sum;
}
}
}
	.text
	.file	"convolutionX_63_Kernel.hip"
	.globl	_Z37__device_stub__convolutionX_63_KernelPfS_iiiif # -- Begin function _Z37__device_stub__convolutionX_63_KernelPfS_iiiif
	.type	_Z37__device_stub__convolutionX_63_KernelPfS_iiiif,@function
_Z37__device_stub__convolutionX_63_KernelPfS_iiiif: # @_Z37__device_stub__convolutionX_63_KernelPfS_iiiif
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	28(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	24(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	20(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	16(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	12(%rsp), %r9
	movss	%xmm0, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	40(%rsp), %r12
	leaq	32(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z22convolutionX_63_KernelPfS_iiiif, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z37__device_stub__convolutionX_63_KernelPfS_iiiif, .Lfunc_end0-_Z37__device_stub__convolutionX_63_KernelPfS_iiiif
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z22convolutionX_63_KernelPfS_iiiif, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$c_Kernel, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movl	$252, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	c_Kernel,@object                # @c_Kernel
	.local	c_Kernel
	.comm	c_Kernel,252,16
	.type	_Z22convolutionX_63_KernelPfS_iiiif,@object # @_Z22convolutionX_63_KernelPfS_iiiif
	.section	.rodata,"a",@progbits
	.globl	_Z22convolutionX_63_KernelPfS_iiiif
	.p2align	3, 0x0
_Z22convolutionX_63_KernelPfS_iiiif:
	.quad	_Z37__device_stub__convolutionX_63_KernelPfS_iiiif
	.size	_Z22convolutionX_63_KernelPfS_iiiif, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z22convolutionX_63_KernelPfS_iiiif"
	.size	.L__unnamed_1, 36

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"c_Kernel"
	.size	.L__unnamed_2, 9

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z37__device_stub__convolutionX_63_KernelPfS_iiiif
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym c_Kernel
	.addrsig_sym _Z22convolutionX_63_KernelPfS_iiiif
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z22convolutionX_63_KernelPfS_iiiif ; -- Begin function _Z22convolutionX_63_KernelPfS_iiiif
	.globl	_Z22convolutionX_63_KernelPfS_iiiif
	.p2align	8
	.type	_Z22convolutionX_63_KernelPfS_iiiif,@function
_Z22convolutionX_63_KernelPfS_iiiif:    ; @_Z22convolutionX_63_KernelPfS_iiiif
; %bb.0:
	s_load_b64 s[8:9], s[0:1], 0x10
	v_bfe_u32 v8, v0, 10, 10
	v_and_b32_e32 v11, 0x3ff, v0
	s_load_b64 s[10:11], s[0:1], 0x1c
	s_lshl_b32 s2, s13, 8
	s_mov_b32 s6, -1
	v_lshl_add_u32 v1, s14, 3, v8
	v_add3_u32 v0, v11, s2, 0xffffffe0
	s_mov_b32 s3, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s15, s9, v[1:2]
	s_load_b128 s[12:15], s[0:1], 0x0
	v_sub_nc_u32_e32 v10, s8, v0
	s_cmp_lt_i32 s10, 1
	v_add_nc_u32_e32 v9, -1, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, v4, s8, v[0:1]
	v_cmp_lt_i32_e64 s7, 32, v10
	v_ashrrev_i32_e32 v3, 31, v2
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %LeafBlock207
	s_cmp_eq_u32 s10, 1
	s_mov_b32 s6, 0
	s_cbranch_scc0 .LBB0_4
; %bb.2:
	s_mov_b32 s5, 0
	s_mov_b64 s[0:1], 32
	s_and_b32 s2, s7, exec_lo
	s_branch .LBB0_5
.LBB0_3:
	s_mov_b32 s2, 0
	s_mov_b32 s5, 0
                                        ; implicit-def: $sgpr0_sgpr1
                                        ; implicit-def: $sgpr4
	s_branch .LBB0_6
.LBB0_4:
	s_mov_b32 s5, -1
	s_mov_b32 s2, 0
                                        ; implicit-def: $sgpr0_sgpr1
.LBB0_5:                                ; %Flow310
	s_mov_b32 s4, s11
.LBB0_6:                                ; %Flow309
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_ashrrev_i32_e32 v12, 31, v9
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccz .LBB0_8
; %bb.7:                                ; %LeafBlock
	s_cmp_lg_u32 s10, 0
	s_mov_b32 s3, -1
	s_cselect_b32 s5, -1, 0
                                        ; implicit-def: $sgpr0_sgpr1
                                        ; implicit-def: $sgpr4
.LBB0_8:                                ; %Flow311
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_10
; %bb.9:
	v_cndmask_b32_e64 v7, v12, 0, s7
	v_cndmask_b32_e64 v6, v9, 32, s7
	s_mov_b32 s3, 0
	s_or_b32 s2, s2, exec_lo
                                        ; implicit-def: $sgpr4
	s_branch .LBB0_11
.LBB0_10:
	v_dual_mov_b32 v7, s1 :: v_dual_mov_b32 v6, s0
.LBB0_11:                               ; %Flow312
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s14, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s15, v3, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_13
; %bb.12:
	v_mov_b32_e32 v6, 32
	v_mov_b32_e32 v7, 0
	s_and_not1_b32 s0, s2, exec_lo
	s_and_b32 s1, s7, exec_lo
	s_mov_b32 s4, 0
	s_or_b32 s2, s0, s1
.LBB0_13:                               ; %Flow313
	v_mov_b32_e32 v13, s4
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB0_15
; %bb.14:                               ; %.sink.split
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v5, v7, vcc_lo
	global_load_b32 v13, v[6:7], off
.LBB0_15:
	s_or_b32 exec_lo, exec_lo, s0
	v_lshlrev_b32_e32 v6, 2, v11
	v_cmp_lt_i32_e64 s6, 64, v10
	s_cmp_lt_i32 s10, 1
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u32_u24 v8, 0x500, v8, v6
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v13 offset:128
	s_cbranch_scc1 .LBB0_18
; %bb.16:                               ; %LeafBlock211
	s_cmp_eq_u32 s10, 1
	s_mov_b32 s8, 0
	s_cbranch_scc0 .LBB0_19
; %bb.17:
	s_mov_b32 s5, 0
	s_mov_b64 s[0:1], 64
	s_and_b32 s2, s6, exec_lo
	s_branch .LBB0_20
.LBB0_18:
	s_mov_b32 s8, -1
	s_mov_b32 s2, 0
	s_mov_b32 s5, 0
                                        ; implicit-def: $sgpr0_sgpr1
                                        ; implicit-def: $sgpr4
	s_branch .LBB0_21
.LBB0_19:
	s_mov_b32 s5, -1
	s_mov_b32 s2, 0
                                        ; implicit-def: $sgpr0_sgpr1
.LBB0_20:                               ; %Flow305
	s_mov_b32 s4, s11
.LBB0_21:                               ; %Flow304
	s_and_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccz .LBB0_23
; %bb.22:                               ; %LeafBlock209
	s_cmp_lg_u32 s10, 0
	s_mov_b32 s3, -1
	s_cselect_b32 s5, -1, 0
                                        ; implicit-def: $sgpr0_sgpr1
                                        ; implicit-def: $sgpr4
.LBB0_23:                               ; %Flow306
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_25
; %bb.24:
	v_cndmask_b32_e64 v7, v12, 0, s6
	v_cndmask_b32_e64 v6, v9, 64, s6
	s_mov_b32 s3, 0
	s_or_b32 s2, s2, exec_lo
                                        ; implicit-def: $sgpr4
	s_branch .LBB0_26
.LBB0_25:
	v_dual_mov_b32 v7, s1 :: v_dual_mov_b32 v6, s0
.LBB0_26:                               ; %Flow307
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_28
; %bb.27:
	v_mov_b32_e32 v6, 64
	v_mov_b32_e32 v7, 0
	s_and_not1_b32 s0, s2, exec_lo
	s_and_b32 s1, s6, exec_lo
	s_mov_b32 s4, 0
	s_or_b32 s2, s0, s1
.LBB0_28:                               ; %Flow308
	v_mov_b32_e32 v13, s4
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB0_30
; %bb.29:                               ; %.sink.split158
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v5, v7, vcc_lo
	global_load_b32 v13, v[6:7], off
.LBB0_30:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_lt_i32_e64 s5, 0x60, v10
	s_cmp_lt_i32 s10, 1
	s_mov_b32 s3, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v13 offset:256
	s_cbranch_scc1 .LBB0_33
; %bb.31:                               ; %LeafBlock217
	s_cmp_eq_u32 s10, 1
	s_mov_b32 s14, 0
	s_cbranch_scc0 .LBB0_34
; %bb.32:
	s_mov_b64 s[0:1], 0x60
	s_mov_b32 s8, 0
	s_and_b32 s2, s5, exec_lo
	s_branch .LBB0_35
.LBB0_33:
	s_mov_b32 s14, -1
	s_mov_b32 s2, 0
	s_mov_b32 s8, 0
                                        ; implicit-def: $sgpr0_sgpr1
                                        ; implicit-def: $sgpr4
	s_branch .LBB0_36
.LBB0_34:
	s_mov_b32 s8, -1
	s_mov_b32 s2, 0
                                        ; implicit-def: $sgpr0_sgpr1
.LBB0_35:                               ; %Flow300
	s_mov_b32 s4, s11
.LBB0_36:                               ; %Flow299
	s_and_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccz .LBB0_38
; %bb.37:                               ; %LeafBlock215
	s_cmp_lg_u32 s10, 0
	s_mov_b32 s3, -1
	s_cselect_b32 s8, -1, 0
                                        ; implicit-def: $sgpr0_sgpr1
                                        ; implicit-def: $sgpr4
.LBB0_38:                               ; %Flow301
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB0_40
; %bb.39:
	v_cndmask_b32_e64 v7, v12, 0, s5
	v_cndmask_b32_e64 v6, v9, 0x60, s5
	s_mov_b32 s3, 0
	s_or_b32 s2, s2, exec_lo
                                        ; implicit-def: $sgpr4
	s_branch .LBB0_41
.LBB0_40:
	v_dual_mov_b32 v7, s1 :: v_dual_mov_b32 v6, s0
.LBB0_41:                               ; %Flow302
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_43
; %bb.42:
	v_mov_b32_e32 v6, 0x60
	v_mov_b32_e32 v7, 0
	s_and_not1_b32 s0, s2, exec_lo
	s_and_b32 s1, s5, exec_lo
	s_mov_b32 s4, 0
	s_or_b32 s2, s0, s1
.LBB0_43:                               ; %Flow303
	v_mov_b32_e32 v13, s4
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB0_45
; %bb.44:                               ; %.sink.split161
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v5, v7, vcc_lo
	global_load_b32 v13, v[6:7], off
.LBB0_45:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_lt_i32_e64 s4, 0x80, v10
	s_cmp_lt_i32 s10, 1
	s_mov_b32 s3, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v13 offset:384
	s_cbranch_scc1 .LBB0_48
; %bb.46:                               ; %LeafBlock223
	s_cmp_eq_u32 s10, 1
	s_mov_b32 s15, 0
	s_cbranch_scc0 .LBB0_49
; %bb.47:
	s_mov_b64 s[0:1], 0x80
	s_mov_b32 s14, 0
	s_and_b32 s2, s4, exec_lo
	s_branch .LBB0_50
.LBB0_48:
	s_mov_b32 s15, -1
	s_mov_b32 s2, 0
	s_mov_b32 s14, 0
                                        ; implicit-def: $sgpr0_sgpr1
                                        ; implicit-def: $sgpr8
	s_branch .LBB0_51
.LBB0_49:
	s_mov_b32 s14, -1
	s_mov_b32 s2, 0
                                        ; implicit-def: $sgpr0_sgpr1
.LBB0_50:                               ; %Flow295
	s_mov_b32 s8, s11
.LBB0_51:                               ; %Flow294
	s_and_b32 vcc_lo, exec_lo, s15
	s_cbranch_vccz .LBB0_53
; %bb.52:                               ; %LeafBlock221
	s_cmp_lg_u32 s10, 0
	s_mov_b32 s3, -1
	s_cselect_b32 s14, -1, 0
                                        ; implicit-def: $sgpr0_sgpr1
                                        ; implicit-def: $sgpr8
.LBB0_53:                               ; %Flow296
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB0_55
; %bb.54:
	v_cndmask_b32_e64 v7, v12, 0, s4
	v_cndmask_b32_e64 v6, v9, 0x80, s4
	s_mov_b32 s3, 0
	s_or_b32 s2, s2, exec_lo
                                        ; implicit-def: $sgpr8
	s_branch .LBB0_56
.LBB0_55:
	v_dual_mov_b32 v7, s1 :: v_dual_mov_b32 v6, s0
.LBB0_56:                               ; %Flow297
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_58
; %bb.57:
	v_mov_b32_e32 v6, 0x80
	v_mov_b32_e32 v7, 0
	s_and_not1_b32 s0, s2, exec_lo
	s_and_b32 s1, s4, exec_lo
	s_mov_b32 s8, 0
	s_or_b32 s2, s0, s1
.LBB0_58:                               ; %Flow298
	v_mov_b32_e32 v13, s8
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB0_60
; %bb.59:                               ; %.sink.split164
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v5, v7, vcc_lo
	global_load_b32 v13, v[6:7], off
.LBB0_60:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_lt_i32_e64 s3, 0xa0, v10
	s_cmp_lt_i32 s10, 1
	s_mov_b32 s8, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v13 offset:512
	s_cbranch_scc1 .LBB0_63
; %bb.61:                               ; %LeafBlock229
	s_cmp_eq_u32 s10, 1
	s_mov_b32 s16, 0
	s_cbranch_scc0 .LBB0_64
; %bb.62:
	s_mov_b64 s[0:1], 0xa0
	s_mov_b32 s15, 0
	s_and_b32 s2, s3, exec_lo
	s_branch .LBB0_65
.LBB0_63:
	s_mov_b32 s16, -1
	s_mov_b32 s2, 0
	s_mov_b32 s15, 0
                                        ; implicit-def: $sgpr0_sgpr1
                                        ; implicit-def: $sgpr14
	s_branch .LBB0_66
.LBB0_64:
	s_mov_b32 s15, -1
	s_mov_b32 s2, 0
                                        ; implicit-def: $sgpr0_sgpr1
.LBB0_65:                               ; %Flow290
	s_mov_b32 s14, s11
.LBB0_66:                               ; %Flow289
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_68
; %bb.67:                               ; %LeafBlock227
	s_cmp_lg_u32 s10, 0
	s_mov_b32 s8, -1
	s_cselect_b32 s15, -1, 0
                                        ; implicit-def: $sgpr0_sgpr1
                                        ; implicit-def: $sgpr14
.LBB0_68:                               ; %Flow291
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s15
	s_cbranch_vccnz .LBB0_70
; %bb.69:
	v_cndmask_b32_e64 v7, v12, 0, s3
	v_cndmask_b32_e64 v6, v9, 0xa0, s3
	s_mov_b32 s8, 0
	s_or_b32 s2, s2, exec_lo
                                        ; implicit-def: $sgpr14
	s_branch .LBB0_71
.LBB0_70:
	v_dual_mov_b32 v7, s1 :: v_dual_mov_b32 v6, s0
.LBB0_71:                               ; %Flow292
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB0_73
; %bb.72:
	v_mov_b32_e32 v6, 0xa0
	v_mov_b32_e32 v7, 0
	s_and_not1_b32 s0, s2, exec_lo
	s_and_b32 s1, s3, exec_lo
	s_mov_b32 s14, 0
	s_or_b32 s2, s0, s1
.LBB0_73:                               ; %Flow293
	v_mov_b32_e32 v13, s14
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB0_75
; %bb.74:                               ; %.sink.split167
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v5, v7, vcc_lo
	global_load_b32 v13, v[6:7], off
.LBB0_75:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_lt_i32_e64 s2, 0xc0, v10
	s_cmp_lt_i32 s10, 1
	s_mov_b32 s14, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v13 offset:640
	s_cbranch_scc1 .LBB0_78
; %bb.76:                               ; %LeafBlock235
	s_cmp_eq_u32 s10, 1
	s_mov_b32 s17, 0
	s_cbranch_scc0 .LBB0_79
; %bb.77:
	s_mov_b64 s[0:1], 0xc0
	s_mov_b32 s16, 0
	s_and_b32 s8, s2, exec_lo
	s_branch .LBB0_80
.LBB0_78:
	s_mov_b32 s17, -1
	s_mov_b32 s8, 0
	s_mov_b32 s16, 0
                                        ; implicit-def: $sgpr0_sgpr1
                                        ; implicit-def: $sgpr15
	s_branch .LBB0_81
.LBB0_79:
	s_mov_b32 s16, -1
	s_mov_b32 s8, 0
                                        ; implicit-def: $sgpr0_sgpr1
.LBB0_80:                               ; %Flow285
	s_mov_b32 s15, s11
.LBB0_81:                               ; %Flow284
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB0_83
; %bb.82:                               ; %LeafBlock233
	s_cmp_lg_u32 s10, 0
	s_mov_b32 s14, -1
	s_cselect_b32 s16, -1, 0
                                        ; implicit-def: $sgpr0_sgpr1
                                        ; implicit-def: $sgpr15
.LBB0_83:                               ; %Flow286
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_85
; %bb.84:
	v_cndmask_b32_e64 v7, v12, 0, s2
	v_cndmask_b32_e64 v6, v9, 0xc0, s2
	s_mov_b32 s14, 0
	s_or_b32 s8, s8, exec_lo
                                        ; implicit-def: $sgpr15
	s_branch .LBB0_86
.LBB0_85:
	v_dual_mov_b32 v7, s1 :: v_dual_mov_b32 v6, s0
.LBB0_86:                               ; %Flow287
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB0_88
; %bb.87:
	v_mov_b32_e32 v6, 0xc0
	v_mov_b32_e32 v7, 0
	s_and_not1_b32 s0, s8, exec_lo
	s_and_b32 s1, s2, exec_lo
	s_mov_b32 s15, 0
	s_or_b32 s8, s0, s1
.LBB0_88:                               ; %Flow288
	v_mov_b32_e32 v13, s15
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB0_90
; %bb.89:                               ; %.sink.split170
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v5, v7, vcc_lo
	global_load_b32 v13, v[6:7], off
.LBB0_90:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_lt_i32_e64 s1, 0xe0, v10
	s_cmp_lt_i32 s10, 1
	s_mov_b32 s8, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v13 offset:768
	s_cbranch_scc1 .LBB0_93
; %bb.91:                               ; %LeafBlock241
	s_cmp_eq_u32 s10, 1
	s_mov_b32 s18, 0
	s_cbranch_scc0 .LBB0_94
; %bb.92:
	s_mov_b64 s[14:15], 0xe0
	s_mov_b32 s17, 0
	s_and_b32 s0, s1, exec_lo
	s_branch .LBB0_95
.LBB0_93:
	s_mov_b32 s18, -1
	s_mov_b32 s0, 0
	s_mov_b32 s17, 0
                                        ; implicit-def: $sgpr14_sgpr15
                                        ; implicit-def: $sgpr16
	s_branch .LBB0_96
.LBB0_94:
	s_mov_b32 s17, -1
	s_mov_b32 s0, 0
                                        ; implicit-def: $sgpr14_sgpr15
.LBB0_95:                               ; %Flow280
	s_mov_b32 s16, s11
.LBB0_96:                               ; %Flow279
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB0_98
; %bb.97:                               ; %LeafBlock239
	s_cmp_lg_u32 s10, 0
	s_mov_b32 s8, -1
	s_cselect_b32 s17, -1, 0
                                        ; implicit-def: $sgpr14_sgpr15
                                        ; implicit-def: $sgpr16
.LBB0_98:                               ; %Flow281
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB0_100
; %bb.99:
	v_cndmask_b32_e64 v7, v12, 0, s1
	v_cndmask_b32_e64 v6, v9, 0xe0, s1
	s_mov_b32 s8, 0
	s_or_b32 s0, s0, exec_lo
                                        ; implicit-def: $sgpr16
	s_branch .LBB0_101
.LBB0_100:
	v_dual_mov_b32 v6, s14 :: v_dual_mov_b32 v7, s15
.LBB0_101:                              ; %Flow282
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB0_103
; %bb.102:
	v_mov_b32_e32 v6, 0xe0
	v_mov_b32_e32 v7, 0
	s_and_not1_b32 s0, s0, exec_lo
	s_and_b32 s8, s1, exec_lo
	s_mov_b32 s16, 0
	s_or_b32 s0, s0, s8
.LBB0_103:                              ; %Flow283
	v_mov_b32_e32 v13, s16
	s_and_saveexec_b32 s8, s0
	s_cbranch_execz .LBB0_105
; %bb.104:                              ; %.sink.split173
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v5, v7, vcc_lo
	global_load_b32 v13, v[6:7], off
.LBB0_105:
	s_or_b32 exec_lo, exec_lo, s8
	v_cmp_lt_i32_e64 s0, 0x100, v10
	s_cmp_lt_i32 s10, 1
	s_mov_b32 s16, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v13 offset:896
	s_cbranch_scc1 .LBB0_108
; %bb.106:                              ; %LeafBlock247
	s_cmp_eq_u32 s10, 1
	s_mov_b32 s19, 0
	s_cbranch_scc0 .LBB0_109
; %bb.107:
	s_mov_b64 s[14:15], 0x100
	s_mov_b32 s18, 0
	s_and_b32 s8, s0, exec_lo
	s_branch .LBB0_110
.LBB0_108:
	s_mov_b32 s19, -1
	s_mov_b32 s8, 0
	s_mov_b32 s18, 0
                                        ; implicit-def: $sgpr14_sgpr15
                                        ; implicit-def: $sgpr17
	s_branch .LBB0_111
.LBB0_109:
	s_mov_b32 s18, -1
	s_mov_b32 s8, 0
                                        ; implicit-def: $sgpr14_sgpr15
.LBB0_110:                              ; %Flow275
	s_mov_b32 s17, s11
.LBB0_111:                              ; %Flow274
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_113
; %bb.112:                              ; %LeafBlock245
	s_cmp_lg_u32 s10, 0
	s_mov_b32 s16, -1
	s_cselect_b32 s18, -1, 0
                                        ; implicit-def: $sgpr14_sgpr15
                                        ; implicit-def: $sgpr17
.LBB0_113:                              ; %Flow276
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_115
; %bb.114:
	v_cndmask_b32_e64 v7, v12, 0, s0
	v_cndmask_b32_e64 v6, v9, 0x100, s0
	s_mov_b32 s16, 0
	s_or_b32 s8, s8, exec_lo
                                        ; implicit-def: $sgpr17
	s_branch .LBB0_116
.LBB0_115:
	v_dual_mov_b32 v6, s14 :: v_dual_mov_b32 v7, s15
.LBB0_116:                              ; %Flow277
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_118
; %bb.117:
	v_mov_b32_e32 v6, 0x100
	v_mov_b32_e32 v7, 0
	s_and_not1_b32 s8, s8, exec_lo
	s_and_b32 s14, s0, exec_lo
	s_mov_b32 s17, 0
	s_or_b32 s8, s8, s14
.LBB0_118:                              ; %Flow278
	v_mov_b32_e32 v12, s17
	s_and_saveexec_b32 s14, s8
	s_cbranch_execz .LBB0_120
; %bb.119:                              ; %.sink.split176
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v5, v7, vcc_lo
	global_load_b32 v12, v[6:7], off
.LBB0_120:
	s_or_b32 exec_lo, exec_lo, s14
	s_cmp_lt_i32 s10, 1
	s_mov_b32 s14, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v12 offset:1024
	s_cbranch_scc1 .LBB0_123
; %bb.121:                              ; %LeafBlock253
	s_cmp_eq_u32 s10, 1
	s_mov_b32 s17, 0
	s_cbranch_scc0 .LBB0_124
; %bb.122:
	v_cmp_lt_i32_e32 vcc_lo, -1, v0
	s_mov_b32 s16, 0
	s_and_b32 s8, vcc_lo, exec_lo
	s_branch .LBB0_125
.LBB0_123:
	s_mov_b32 s17, -1
	s_mov_b32 s8, 0
	s_mov_b32 s16, 0
                                        ; implicit-def: $vgpr6_vgpr7
                                        ; implicit-def: $sgpr15
	s_branch .LBB0_126
.LBB0_124:
	s_mov_b32 s16, -1
	s_mov_b32 s8, 0
.LBB0_125:                              ; %Flow270
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_mov_b32 s15, s11
.LBB0_126:                              ; %Flow269
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB0_128
; %bb.127:                              ; %LeafBlock251
	s_cmp_lg_u32 s10, 0
	s_mov_b32 s14, -1
	s_cselect_b32 s16, -1, 0
                                        ; implicit-def: $vgpr6_vgpr7
                                        ; implicit-def: $sgpr15
.LBB0_128:                              ; %Flow271
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_130
; %bb.129:
	v_sub_nc_u32_e32 v6, 32, v11
	v_ashrrev_i32_e32 v7, 31, v0
	s_mov_b32 s14, 0
	s_or_b32 s8, s8, exec_lo
                                        ; implicit-def: $sgpr15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v7, v6
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, v4, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v5, v7, vcc_lo
.LBB0_130:                              ; %Flow272
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB0_132
; %bb.131:
	v_cmp_lt_i32_e32 vcc_lo, -1, v0
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_and_not1_b32 s8, s8, exec_lo
	s_mov_b32 s15, 0
	s_and_b32 s14, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s8, s8, s14
.LBB0_132:                              ; %Flow273
	v_mov_b32_e32 v0, s15
	s_and_saveexec_b32 s14, s8
	s_cbranch_execz .LBB0_134
; %bb.133:                              ; %.critedge.sink.split
	global_load_b32 v0, v[6:7], off
.LBB0_134:                              ; %.critedge
	s_or_b32 exec_lo, exec_lo, s14
	v_cmp_lt_i32_e64 s8, 0x120, v10
	s_cmp_lt_i32 s10, 1
	s_mov_b32 s17, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v0
	s_cbranch_scc1 .LBB0_137
; %bb.135:                              ; %LeafBlock259
	s_cmp_eq_u32 s10, 1
	s_mov_b32 s19, 0
	s_cbranch_scc0 .LBB0_138
; %bb.136:
	s_mov_b64 s[14:15], 0x120
	s_mov_b32 s18, 0
	s_and_b32 s16, s8, exec_lo
	s_branch .LBB0_140
.LBB0_137:
	s_mov_b32 s19, -1
	s_mov_b32 s16, 0
	s_mov_b32 s18, 0
	s_branch .LBB0_139
.LBB0_138:
	s_mov_b32 s18, -1
	s_mov_b32 s16, 0
.LBB0_139:                              ; %Flow264
                                        ; implicit-def: $sgpr14_sgpr15
.LBB0_140:                              ; %Flow264
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_142
; %bb.141:                              ; %LeafBlock257
	s_cmp_lg_u32 s10, 0
	s_mov_b32 s17, -1
	s_cselect_b32 s18, -1, 0
                                        ; implicit-def: $sgpr14_sgpr15
                                        ; implicit-def: $sgpr11
.LBB0_142:                              ; %Flow266
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_144
; %bb.143:
	v_cndmask_b32_e64 v6, v9, 0x120, s8
	s_mov_b32 s17, 0
	s_or_b32 s16, s16, exec_lo
                                        ; implicit-def: $sgpr11
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	s_branch .LBB0_145
.LBB0_144:
	v_dual_mov_b32 v6, s14 :: v_dual_mov_b32 v7, s15
.LBB0_145:                              ; %Flow267
	s_and_not1_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB0_147
; %bb.146:
	v_mov_b32_e32 v6, 0x120
	v_mov_b32_e32 v7, 0
	s_and_not1_b32 s10, s16, exec_lo
	s_and_b32 s8, s8, exec_lo
	s_mov_b32 s11, 0
	s_or_b32 s16, s10, s8
.LBB0_147:                              ; %Flow268
	v_mov_b32_e32 v0, s11
	s_and_saveexec_b32 s8, s16
	s_cbranch_execz .LBB0_149
; %bb.148:                              ; %.sink.split180
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v4, v6
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v7, vcc_lo
	global_load_b32 v0, v[4:5], off
.LBB0_149:
	s_or_b32 exec_lo, exec_lo, s8
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v0 offset:1152
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s8, exec_lo
	v_cmpx_gt_i32_e64 s9, v1
	s_cbranch_execz .LBB0_166
; %bb.150:                              ; %.preheader123.preheader
	v_add_co_u32 v0, vcc_lo, s12, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v3, vcc_lo
	s_and_saveexec_b32 s33, s7
	s_cbranch_execz .LBB0_152
; %bb.151:                              ; %.preheader
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+244
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+252
	ds_load_2addr_b32 v[2:3], v8 offset0:1 offset1:2
	ds_load_2addr_b32 v[4:5], v8 offset0:3 offset1:4
	s_load_b128 s[8:11], s[8:9], 0x0
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, c_Kernel@rel32@lo+228
	s_addc_u32 s13, s13, c_Kernel@rel32@hi+236
	ds_load_2addr_b32 v[6:7], v8 offset0:5 offset1:6
	ds_load_2addr_b32 v[9:10], v8 offset0:7 offset1:8
	s_load_b128 s[12:15], s[12:13], 0x0
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v11, s10, v2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, s9, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:9 offset1:10
	v_fmac_f32_e32 v11, s8, v4
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+196
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+204
	s_load_b256 s[24:31], s[8:9], 0x0
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+132
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+140
	v_fmac_f32_e32 v11, s15, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:11 offset1:12
	v_fmac_f32_e32 v11, s14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v7
	v_fmac_f32_e32 v11, s12, v9
	s_load_b512 s[8:23], s[8:9], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s31, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:13 offset1:14
	ds_load_2addr_b32 v[9:10], v8 offset0:15 offset1:16
	v_fmac_f32_e32 v11, s30, v2
	v_fmac_f32_e32 v11, s29, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:17 offset1:18
	v_fmac_f32_e32 v11, s28, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s27, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:19 offset1:20
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s26, v6
	v_fmac_f32_e32 v11, s25, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s24, v9
	v_fmac_f32_e32 v11, s23, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:21 offset1:22
	ds_load_2addr_b32 v[9:10], v8 offset0:23 offset1:24
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s22, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s21, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:25 offset1:26
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s20, v4
	v_fmac_f32_e32 v11, s19, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:27 offset1:28
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s17, v7
	s_waitcnt lgkmcnt(2)
	v_fmac_f32_e32 v11, s16, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s15, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:29 offset1:30
	ds_load_2addr_b32 v[9:10], v8 offset0:31 offset1:32
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s14, v2
	v_fmac_f32_e32 v11, s13, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:33 offset1:34
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s12, v4
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, c_Kernel@rel32@lo+68
	s_addc_u32 s13, s13, c_Kernel@rel32@hi+76
	s_load_b512 s[12:27], s[12:13], 0x0
	v_fmac_f32_e32 v11, s11, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:35 offset1:36
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s9, v7
	v_fmac_f32_e32 v11, s8, v9
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+4
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s27, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:37 offset1:38
	ds_load_2addr_b32 v[9:10], v8 offset0:39 offset1:40
	v_fmac_f32_e32 v11, s26, v2
	v_fmac_f32_e32 v11, s25, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:41 offset1:42
	v_fmac_f32_e32 v11, s24, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s23, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:43 offset1:44
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s22, v6
	v_fmac_f32_e32 v11, s21, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s20, v9
	v_fmac_f32_e32 v11, s19, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:45 offset1:46
	ds_load_2addr_b32 v[9:10], v8 offset0:47 offset1:48
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s17, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:49 offset1:50
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s16, v4
	s_load_b512 s[16:31], s[8:9], 0x0
	v_fmac_f32_e32 v11, s15, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:51 offset1:52
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v7
	v_fmac_f32_e32 v11, s12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s31, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:53 offset1:54
	ds_load_2addr_b32 v[9:10], v8 offset0:55 offset1:56
	v_fmac_f32_e32 v11, s30, v2
	v_fmac_f32_e32 v11, s29, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:57 offset1:58
	v_fmac_f32_e32 v11, s28, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s27, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:59 offset1:60
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s26, v6
	v_fmac_f32_e32 v11, s25, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s24, v9
	ds_load_2addr_b32 v[6:7], v8 offset0:61 offset1:62
	ds_load_b32 v9, v8 offset:252
	v_fmac_f32_e32 v11, s23, v10
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s22, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s21, v3
	s_waitcnt lgkmcnt(2)
	v_fmac_f32_e32 v11, s20, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s19, v5
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v11, s18, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s17, v7
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s16, v9
	global_store_b32 v[0:1], v11, off offset:128
.LBB0_152:                              ; %.preheader123.1
	s_or_b32 exec_lo, exec_lo, s33
	s_and_saveexec_b32 s7, s6
	s_cbranch_execz .LBB0_154
; %bb.153:                              ; %.preheader.1
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+244
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+252
	ds_load_2addr_b32 v[2:3], v8 offset0:33 offset1:34
	ds_load_2addr_b32 v[4:5], v8 offset0:35 offset1:36
	s_load_b128 s[8:11], s[8:9], 0x0
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, c_Kernel@rel32@lo+228
	s_addc_u32 s13, s13, c_Kernel@rel32@hi+236
	ds_load_2addr_b32 v[6:7], v8 offset0:37 offset1:38
	ds_load_2addr_b32 v[9:10], v8 offset0:39 offset1:40
	s_load_b128 s[12:15], s[12:13], 0x0
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v11, s10, v2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, s9, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:41 offset1:42
	v_fmac_f32_e32 v11, s8, v4
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+196
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+204
	s_load_b256 s[24:31], s[8:9], 0x0
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+132
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+140
	v_fmac_f32_e32 v11, s15, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:43 offset1:44
	v_fmac_f32_e32 v11, s14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v7
	v_fmac_f32_e32 v11, s12, v9
	s_load_b512 s[8:23], s[8:9], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s31, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:45 offset1:46
	ds_load_2addr_b32 v[9:10], v8 offset0:47 offset1:48
	v_fmac_f32_e32 v11, s30, v2
	v_fmac_f32_e32 v11, s29, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:49 offset1:50
	v_fmac_f32_e32 v11, s28, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s27, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:51 offset1:52
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s26, v6
	v_fmac_f32_e32 v11, s25, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s24, v9
	v_fmac_f32_e32 v11, s23, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:53 offset1:54
	ds_load_2addr_b32 v[9:10], v8 offset0:55 offset1:56
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s22, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s21, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:57 offset1:58
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s20, v4
	v_fmac_f32_e32 v11, s19, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:59 offset1:60
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s17, v7
	s_waitcnt lgkmcnt(2)
	v_fmac_f32_e32 v11, s16, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s15, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:61 offset1:62
	ds_load_2addr_b32 v[9:10], v8 offset0:63 offset1:64
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s14, v2
	v_fmac_f32_e32 v11, s13, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:65 offset1:66
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s12, v4
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, c_Kernel@rel32@lo+68
	s_addc_u32 s13, s13, c_Kernel@rel32@hi+76
	s_load_b512 s[12:27], s[12:13], 0x0
	v_fmac_f32_e32 v11, s11, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:67 offset1:68
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s9, v7
	v_fmac_f32_e32 v11, s8, v9
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+4
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s27, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:69 offset1:70
	ds_load_2addr_b32 v[9:10], v8 offset0:71 offset1:72
	v_fmac_f32_e32 v11, s26, v2
	v_fmac_f32_e32 v11, s25, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:73 offset1:74
	v_fmac_f32_e32 v11, s24, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s23, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:75 offset1:76
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s22, v6
	v_fmac_f32_e32 v11, s21, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s20, v9
	v_fmac_f32_e32 v11, s19, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:77 offset1:78
	ds_load_2addr_b32 v[9:10], v8 offset0:79 offset1:80
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s17, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:81 offset1:82
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s16, v4
	s_load_b512 s[16:31], s[8:9], 0x0
	v_fmac_f32_e32 v11, s15, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:83 offset1:84
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v7
	v_fmac_f32_e32 v11, s12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s31, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:85 offset1:86
	ds_load_2addr_b32 v[9:10], v8 offset0:87 offset1:88
	v_fmac_f32_e32 v11, s30, v2
	v_fmac_f32_e32 v11, s29, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:89 offset1:90
	v_fmac_f32_e32 v11, s28, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s27, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:91 offset1:92
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s26, v6
	v_fmac_f32_e32 v11, s25, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s24, v9
	ds_load_2addr_b32 v[6:7], v8 offset0:93 offset1:94
	ds_load_b32 v9, v8 offset:380
	v_fmac_f32_e32 v11, s23, v10
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s22, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s21, v3
	s_waitcnt lgkmcnt(2)
	v_fmac_f32_e32 v11, s20, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s19, v5
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v11, s18, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s17, v7
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s16, v9
	global_store_b32 v[0:1], v11, off offset:256
.LBB0_154:                              ; %.preheader123.2
	s_or_b32 exec_lo, exec_lo, s7
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB0_156
; %bb.155:                              ; %.preheader.2
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+244
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+252
	ds_load_2addr_b32 v[2:3], v8 offset0:65 offset1:66
	ds_load_2addr_b32 v[4:5], v8 offset0:67 offset1:68
	s_load_b128 s[8:11], s[8:9], 0x0
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, c_Kernel@rel32@lo+228
	s_addc_u32 s13, s13, c_Kernel@rel32@hi+236
	ds_load_2addr_b32 v[6:7], v8 offset0:69 offset1:70
	ds_load_2addr_b32 v[9:10], v8 offset0:71 offset1:72
	s_load_b128 s[12:15], s[12:13], 0x0
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v11, s10, v2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, s9, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:73 offset1:74
	v_fmac_f32_e32 v11, s8, v4
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+196
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+204
	s_load_b256 s[24:31], s[8:9], 0x0
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+132
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+140
	v_fmac_f32_e32 v11, s15, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:75 offset1:76
	v_fmac_f32_e32 v11, s14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v7
	v_fmac_f32_e32 v11, s12, v9
	s_load_b512 s[8:23], s[8:9], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s31, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:77 offset1:78
	ds_load_2addr_b32 v[9:10], v8 offset0:79 offset1:80
	v_fmac_f32_e32 v11, s30, v2
	v_fmac_f32_e32 v11, s29, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:81 offset1:82
	v_fmac_f32_e32 v11, s28, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s27, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:83 offset1:84
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s26, v6
	v_fmac_f32_e32 v11, s25, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s24, v9
	v_fmac_f32_e32 v11, s23, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:85 offset1:86
	ds_load_2addr_b32 v[9:10], v8 offset0:87 offset1:88
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s22, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s21, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:89 offset1:90
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s20, v4
	v_fmac_f32_e32 v11, s19, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:91 offset1:92
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s17, v7
	s_waitcnt lgkmcnt(2)
	v_fmac_f32_e32 v11, s16, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s15, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:93 offset1:94
	ds_load_2addr_b32 v[9:10], v8 offset0:95 offset1:96
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s14, v2
	v_fmac_f32_e32 v11, s13, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:97 offset1:98
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s12, v4
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, c_Kernel@rel32@lo+68
	s_addc_u32 s13, s13, c_Kernel@rel32@hi+76
	s_load_b512 s[12:27], s[12:13], 0x0
	v_fmac_f32_e32 v11, s11, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:99 offset1:100
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s9, v7
	v_fmac_f32_e32 v11, s8, v9
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+4
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s27, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:101 offset1:102
	ds_load_2addr_b32 v[9:10], v8 offset0:103 offset1:104
	v_fmac_f32_e32 v11, s26, v2
	v_fmac_f32_e32 v11, s25, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:105 offset1:106
	v_fmac_f32_e32 v11, s24, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s23, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:107 offset1:108
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s22, v6
	v_fmac_f32_e32 v11, s21, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s20, v9
	v_fmac_f32_e32 v11, s19, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:109 offset1:110
	ds_load_2addr_b32 v[9:10], v8 offset0:111 offset1:112
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s17, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:113 offset1:114
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s16, v4
	s_load_b512 s[16:31], s[8:9], 0x0
	v_fmac_f32_e32 v11, s15, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:115 offset1:116
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v7
	v_fmac_f32_e32 v11, s12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s31, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:117 offset1:118
	ds_load_2addr_b32 v[9:10], v8 offset0:119 offset1:120
	v_fmac_f32_e32 v11, s30, v2
	v_fmac_f32_e32 v11, s29, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:121 offset1:122
	v_fmac_f32_e32 v11, s28, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s27, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:123 offset1:124
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s26, v6
	v_fmac_f32_e32 v11, s25, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s24, v9
	ds_load_2addr_b32 v[6:7], v8 offset0:125 offset1:126
	ds_load_b32 v9, v8 offset:508
	v_fmac_f32_e32 v11, s23, v10
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s22, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s21, v3
	s_waitcnt lgkmcnt(2)
	v_fmac_f32_e32 v11, s20, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s19, v5
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v11, s18, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s17, v7
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s16, v9
	global_store_b32 v[0:1], v11, off offset:384
.LBB0_156:                              ; %.preheader123.3
	s_or_b32 exec_lo, exec_lo, s6
	s_and_saveexec_b32 s28, s4
	s_cbranch_execz .LBB0_158
; %bb.157:                              ; %.preheader.3
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_Kernel@rel32@lo+244
	s_addc_u32 s5, s5, c_Kernel@rel32@hi+252
	ds_load_2addr_b32 v[2:3], v8 offset0:97 offset1:98
	ds_load_2addr_b32 v[4:5], v8 offset0:99 offset1:100
	s_load_b128 s[4:7], s[4:5], 0x0
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+228
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+236
	ds_load_2addr_b32 v[6:7], v8 offset0:101 offset1:102
	ds_load_2addr_b32 v[9:10], v8 offset0:103 offset1:104
	s_load_b128 s[8:11], s[8:9], 0x0
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v11, s6, v2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, s5, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:105 offset1:106
	v_fmac_f32_e32 v11, s4, v4
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_Kernel@rel32@lo+196
	s_addc_u32 s5, s5, c_Kernel@rel32@hi+204
	s_load_b256 s[20:27], s[4:5], 0x0
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_Kernel@rel32@lo+132
	s_addc_u32 s5, s5, c_Kernel@rel32@hi+140
	v_fmac_f32_e32 v11, s11, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:107 offset1:108
	v_fmac_f32_e32 v11, s10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s9, v7
	v_fmac_f32_e32 v11, s8, v9
	s_load_b512 s[4:19], s[4:5], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s27, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:109 offset1:110
	ds_load_2addr_b32 v[9:10], v8 offset0:111 offset1:112
	v_fmac_f32_e32 v11, s26, v2
	v_fmac_f32_e32 v11, s25, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:113 offset1:114
	v_fmac_f32_e32 v11, s24, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s23, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:115 offset1:116
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s22, v6
	v_fmac_f32_e32 v11, s21, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s20, v9
	v_fmac_f32_e32 v11, s19, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:117 offset1:118
	ds_load_2addr_b32 v[9:10], v8 offset0:119 offset1:120
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s17, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:121 offset1:122
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s16, v4
	v_fmac_f32_e32 v11, s15, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:123 offset1:124
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v7
	s_waitcnt lgkmcnt(2)
	v_fmac_f32_e32 v11, s12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s11, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:125 offset1:126
	ds_load_2addr_b32 v[9:10], v8 offset0:127 offset1:128
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s10, v2
	v_fmac_f32_e32 v11, s9, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:129 offset1:130
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s8, v4
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+68
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+76
	s_load_b512 s[8:23], s[8:9], 0x0
	v_fmac_f32_e32 v11, s7, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:131 offset1:132
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s5, v7
	v_fmac_f32_e32 v11, s4, v9
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_Kernel@rel32@lo+4
	s_addc_u32 s5, s5, c_Kernel@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s23, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:133 offset1:134
	ds_load_2addr_b32 v[9:10], v8 offset0:135 offset1:136
	v_fmac_f32_e32 v11, s22, v2
	v_fmac_f32_e32 v11, s21, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:137 offset1:138
	v_fmac_f32_e32 v11, s20, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s19, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:139 offset1:140
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v6
	v_fmac_f32_e32 v11, s17, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s16, v9
	v_fmac_f32_e32 v11, s15, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:141 offset1:142
	ds_load_2addr_b32 v[9:10], v8 offset0:143 offset1:144
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s14, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:145 offset1:146
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s12, v4
	s_load_b512 s[12:27], s[4:5], 0x0
	v_fmac_f32_e32 v11, s11, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:147 offset1:148
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s9, v7
	v_fmac_f32_e32 v11, s8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s27, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:149 offset1:150
	ds_load_2addr_b32 v[9:10], v8 offset0:151 offset1:152
	v_fmac_f32_e32 v11, s26, v2
	v_fmac_f32_e32 v11, s25, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:153 offset1:154
	v_fmac_f32_e32 v11, s24, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s23, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:155 offset1:156
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s22, v6
	v_fmac_f32_e32 v11, s21, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s20, v9
	ds_load_2addr_b32 v[6:7], v8 offset0:157 offset1:158
	ds_load_b32 v9, v8 offset:636
	v_fmac_f32_e32 v11, s19, v10
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s17, v3
	s_waitcnt lgkmcnt(2)
	v_fmac_f32_e32 v11, s16, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s15, v5
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v11, s14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v7
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s12, v9
	global_store_b32 v[0:1], v11, off offset:512
.LBB0_158:                              ; %.preheader123.4
	s_or_b32 exec_lo, exec_lo, s28
	s_and_saveexec_b32 s28, s3
	s_cbranch_execz .LBB0_160
; %bb.159:                              ; %.preheader.4
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_Kernel@rel32@lo+244
	s_addc_u32 s5, s5, c_Kernel@rel32@hi+252
	ds_load_2addr_b32 v[2:3], v8 offset0:129 offset1:130
	ds_load_2addr_b32 v[4:5], v8 offset0:131 offset1:132
	s_load_b128 s[4:7], s[4:5], 0x0
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+228
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+236
	ds_load_2addr_b32 v[6:7], v8 offset0:133 offset1:134
	ds_load_2addr_b32 v[9:10], v8 offset0:135 offset1:136
	s_load_b128 s[8:11], s[8:9], 0x0
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v11, s6, v2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, s5, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:137 offset1:138
	v_fmac_f32_e32 v11, s4, v4
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_Kernel@rel32@lo+196
	s_addc_u32 s5, s5, c_Kernel@rel32@hi+204
	s_load_b256 s[20:27], s[4:5], 0x0
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_Kernel@rel32@lo+132
	s_addc_u32 s5, s5, c_Kernel@rel32@hi+140
	v_fmac_f32_e32 v11, s11, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:139 offset1:140
	v_fmac_f32_e32 v11, s10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s9, v7
	v_fmac_f32_e32 v11, s8, v9
	s_load_b512 s[4:19], s[4:5], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s27, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:141 offset1:142
	ds_load_2addr_b32 v[9:10], v8 offset0:143 offset1:144
	v_fmac_f32_e32 v11, s26, v2
	v_fmac_f32_e32 v11, s25, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:145 offset1:146
	v_fmac_f32_e32 v11, s24, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s23, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:147 offset1:148
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s22, v6
	v_fmac_f32_e32 v11, s21, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s20, v9
	v_fmac_f32_e32 v11, s19, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:149 offset1:150
	ds_load_2addr_b32 v[9:10], v8 offset0:151 offset1:152
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s17, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:153 offset1:154
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s16, v4
	v_fmac_f32_e32 v11, s15, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:155 offset1:156
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v7
	s_waitcnt lgkmcnt(2)
	v_fmac_f32_e32 v11, s12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s11, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:157 offset1:158
	ds_load_2addr_b32 v[9:10], v8 offset0:159 offset1:160
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s10, v2
	v_fmac_f32_e32 v11, s9, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:161 offset1:162
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s8, v4
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+68
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+76
	s_load_b512 s[8:23], s[8:9], 0x0
	v_fmac_f32_e32 v11, s7, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:163 offset1:164
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s5, v7
	v_fmac_f32_e32 v11, s4, v9
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_Kernel@rel32@lo+4
	s_addc_u32 s5, s5, c_Kernel@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s23, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:165 offset1:166
	ds_load_2addr_b32 v[9:10], v8 offset0:167 offset1:168
	v_fmac_f32_e32 v11, s22, v2
	v_fmac_f32_e32 v11, s21, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:169 offset1:170
	v_fmac_f32_e32 v11, s20, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s19, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:171 offset1:172
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v6
	v_fmac_f32_e32 v11, s17, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s16, v9
	v_fmac_f32_e32 v11, s15, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:173 offset1:174
	ds_load_2addr_b32 v[9:10], v8 offset0:175 offset1:176
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s14, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:177 offset1:178
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s12, v4
	s_load_b512 s[12:27], s[4:5], 0x0
	v_fmac_f32_e32 v11, s11, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:179 offset1:180
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s9, v7
	v_fmac_f32_e32 v11, s8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s27, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:181 offset1:182
	ds_load_2addr_b32 v[9:10], v8 offset0:183 offset1:184
	v_fmac_f32_e32 v11, s26, v2
	v_fmac_f32_e32 v11, s25, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:185 offset1:186
	v_fmac_f32_e32 v11, s24, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s23, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:187 offset1:188
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s22, v6
	v_fmac_f32_e32 v11, s21, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s20, v9
	ds_load_2addr_b32 v[6:7], v8 offset0:189 offset1:190
	ds_load_b32 v9, v8 offset:764
	v_fmac_f32_e32 v11, s19, v10
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s17, v3
	s_waitcnt lgkmcnt(2)
	v_fmac_f32_e32 v11, s16, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s15, v5
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v11, s14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v7
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s12, v9
	global_store_b32 v[0:1], v11, off offset:640
.LBB0_160:                              ; %.preheader123.5
	s_or_b32 exec_lo, exec_lo, s28
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_162
; %bb.161:                              ; %.preheader.5
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_Kernel@rel32@lo+244
	s_addc_u32 s5, s5, c_Kernel@rel32@hi+252
	ds_load_2addr_b32 v[2:3], v8 offset0:161 offset1:162
	ds_load_2addr_b32 v[4:5], v8 offset0:163 offset1:164
	s_load_b128 s[4:7], s[4:5], 0x0
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+228
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+236
	ds_load_2addr_b32 v[6:7], v8 offset0:165 offset1:166
	ds_load_2addr_b32 v[9:10], v8 offset0:167 offset1:168
	s_load_b128 s[8:11], s[8:9], 0x0
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v11, s6, v2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, s5, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:169 offset1:170
	v_fmac_f32_e32 v11, s4, v4
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_Kernel@rel32@lo+196
	s_addc_u32 s5, s5, c_Kernel@rel32@hi+204
	s_load_b256 s[20:27], s[4:5], 0x0
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_Kernel@rel32@lo+132
	s_addc_u32 s5, s5, c_Kernel@rel32@hi+140
	v_fmac_f32_e32 v11, s11, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:171 offset1:172
	v_fmac_f32_e32 v11, s10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s9, v7
	v_fmac_f32_e32 v11, s8, v9
	s_load_b512 s[4:19], s[4:5], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s27, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:173 offset1:174
	ds_load_2addr_b32 v[9:10], v8 offset0:175 offset1:176
	v_fmac_f32_e32 v11, s26, v2
	v_fmac_f32_e32 v11, s25, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:177 offset1:178
	v_fmac_f32_e32 v11, s24, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s23, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:179 offset1:180
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s22, v6
	v_fmac_f32_e32 v11, s21, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s20, v9
	v_fmac_f32_e32 v11, s19, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:181 offset1:182
	ds_load_2addr_b32 v[9:10], v8 offset0:183 offset1:184
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s17, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:185 offset1:186
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s16, v4
	v_fmac_f32_e32 v11, s15, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:187 offset1:188
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v7
	s_waitcnt lgkmcnt(2)
	v_fmac_f32_e32 v11, s12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s11, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:189 offset1:190
	ds_load_2addr_b32 v[9:10], v8 offset0:191 offset1:192
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s10, v2
	v_fmac_f32_e32 v11, s9, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:193 offset1:194
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s8, v4
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+68
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+76
	s_load_b512 s[8:23], s[8:9], 0x0
	v_fmac_f32_e32 v11, s7, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:195 offset1:196
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s5, v7
	v_fmac_f32_e32 v11, s4, v9
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_Kernel@rel32@lo+4
	s_addc_u32 s5, s5, c_Kernel@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s23, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:197 offset1:198
	ds_load_2addr_b32 v[9:10], v8 offset0:199 offset1:200
	v_fmac_f32_e32 v11, s22, v2
	v_fmac_f32_e32 v11, s21, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:201 offset1:202
	v_fmac_f32_e32 v11, s20, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s19, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:203 offset1:204
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v6
	v_fmac_f32_e32 v11, s17, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s16, v9
	v_fmac_f32_e32 v11, s15, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:205 offset1:206
	ds_load_2addr_b32 v[9:10], v8 offset0:207 offset1:208
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s14, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:209 offset1:210
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s12, v4
	s_load_b512 s[12:27], s[4:5], 0x0
	v_fmac_f32_e32 v11, s11, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:211 offset1:212
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s9, v7
	v_fmac_f32_e32 v11, s8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s27, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:213 offset1:214
	ds_load_2addr_b32 v[9:10], v8 offset0:215 offset1:216
	v_fmac_f32_e32 v11, s26, v2
	v_fmac_f32_e32 v11, s25, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:217 offset1:218
	v_fmac_f32_e32 v11, s24, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s23, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:219 offset1:220
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s22, v6
	v_fmac_f32_e32 v11, s21, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s20, v9
	ds_load_2addr_b32 v[6:7], v8 offset0:221 offset1:222
	ds_load_b32 v9, v8 offset:892
	v_fmac_f32_e32 v11, s19, v10
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s17, v3
	s_waitcnt lgkmcnt(2)
	v_fmac_f32_e32 v11, s16, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s15, v5
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v11, s14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v7
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s12, v9
	global_store_b32 v[0:1], v11, off offset:768
.LBB0_162:                              ; %.preheader123.6
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_164
; %bb.163:                              ; %.preheader.6
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_Kernel@rel32@lo+244
	s_addc_u32 s5, s5, c_Kernel@rel32@hi+252
	ds_load_2addr_b32 v[2:3], v8 offset0:193 offset1:194
	ds_load_2addr_b32 v[4:5], v8 offset0:195 offset1:196
	s_load_b128 s[4:7], s[4:5], 0x0
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+228
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+236
	ds_load_2addr_b32 v[6:7], v8 offset0:197 offset1:198
	ds_load_2addr_b32 v[9:10], v8 offset0:199 offset1:200
	s_load_b128 s[8:11], s[8:9], 0x0
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v11, s6, v2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, s5, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:201 offset1:202
	v_fmac_f32_e32 v11, s4, v4
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_Kernel@rel32@lo+196
	s_addc_u32 s5, s5, c_Kernel@rel32@hi+204
	s_load_b256 s[20:27], s[4:5], 0x0
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_Kernel@rel32@lo+132
	s_addc_u32 s5, s5, c_Kernel@rel32@hi+140
	v_fmac_f32_e32 v11, s11, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:203 offset1:204
	v_fmac_f32_e32 v11, s10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s9, v7
	v_fmac_f32_e32 v11, s8, v9
	s_load_b512 s[4:19], s[4:5], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s27, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:205 offset1:206
	ds_load_2addr_b32 v[9:10], v8 offset0:207 offset1:208
	v_fmac_f32_e32 v11, s26, v2
	v_fmac_f32_e32 v11, s25, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:209 offset1:210
	v_fmac_f32_e32 v11, s24, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s23, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:211 offset1:212
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s22, v6
	v_fmac_f32_e32 v11, s21, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s20, v9
	v_fmac_f32_e32 v11, s19, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:213 offset1:214
	ds_load_2addr_b32 v[9:10], v8 offset0:215 offset1:216
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s17, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:217 offset1:218
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s16, v4
	v_fmac_f32_e32 v11, s15, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:219 offset1:220
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v7
	s_waitcnt lgkmcnt(2)
	v_fmac_f32_e32 v11, s12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s11, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:221 offset1:222
	ds_load_2addr_b32 v[9:10], v8 offset0:223 offset1:224
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s10, v2
	v_fmac_f32_e32 v11, s9, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:225 offset1:226
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s8, v4
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, c_Kernel@rel32@lo+68
	s_addc_u32 s9, s9, c_Kernel@rel32@hi+76
	s_load_b512 s[8:23], s[8:9], 0x0
	v_fmac_f32_e32 v11, s7, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:227 offset1:228
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s5, v7
	v_fmac_f32_e32 v11, s4, v9
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_Kernel@rel32@lo+4
	s_addc_u32 s5, s5, c_Kernel@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s23, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:229 offset1:230
	ds_load_2addr_b32 v[9:10], v8 offset0:231 offset1:232
	v_fmac_f32_e32 v11, s22, v2
	v_fmac_f32_e32 v11, s21, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:233 offset1:234
	v_fmac_f32_e32 v11, s20, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s19, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:235 offset1:236
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v6
	v_fmac_f32_e32 v11, s17, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s16, v9
	v_fmac_f32_e32 v11, s15, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:237 offset1:238
	ds_load_2addr_b32 v[9:10], v8 offset0:239 offset1:240
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s14, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:241 offset1:242
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s12, v4
	s_load_b512 s[12:27], s[4:5], 0x0
	v_fmac_f32_e32 v11, s11, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:243 offset1:244
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s9, v7
	v_fmac_f32_e32 v11, s8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s27, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:245 offset1:246
	ds_load_2addr_b32 v[9:10], v8 offset0:247 offset1:248
	v_fmac_f32_e32 v11, s26, v2
	v_fmac_f32_e32 v11, s25, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:249 offset1:250
	v_fmac_f32_e32 v11, s24, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s23, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:251 offset1:252
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s22, v6
	v_fmac_f32_e32 v11, s21, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s20, v9
	ds_load_2addr_b32 v[6:7], v8 offset0:253 offset1:254
	ds_load_b32 v9, v8 offset:1020
	v_fmac_f32_e32 v11, s19, v10
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s17, v3
	s_waitcnt lgkmcnt(2)
	v_fmac_f32_e32 v11, s16, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s15, v5
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v11, s14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v7
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s12, v9
	global_store_b32 v[0:1], v11, off offset:896
.LBB0_164:                              ; %.preheader123.7
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_166
; %bb.165:                              ; %.preheader.7
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, c_Kernel@rel32@lo+244
	s_addc_u32 s1, s1, c_Kernel@rel32@hi+252
	ds_load_2addr_b32 v[2:3], v8 offset0:225 offset1:226
	ds_load_2addr_b32 v[4:5], v8 offset0:227 offset1:228
	s_load_b128 s[0:3], s[0:1], 0x0
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_Kernel@rel32@lo+228
	s_addc_u32 s5, s5, c_Kernel@rel32@hi+236
	ds_load_2addr_b32 v[6:7], v8 offset0:229 offset1:230
	ds_load_2addr_b32 v[9:10], v8 offset0:231 offset1:232
	s_load_b128 s[4:7], s[4:5], 0x0
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v11, s2, v2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, s1, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:233 offset1:234
	v_fmac_f32_e32 v11, s0, v4
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, c_Kernel@rel32@lo+196
	s_addc_u32 s1, s1, c_Kernel@rel32@hi+204
	s_load_b256 s[16:23], s[0:1], 0x0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, c_Kernel@rel32@lo+132
	s_addc_u32 s1, s1, c_Kernel@rel32@hi+140
	v_fmac_f32_e32 v11, s7, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:235 offset1:236
	v_fmac_f32_e32 v11, s6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s5, v7
	v_fmac_f32_e32 v11, s4, v9
	s_load_b512 s[0:15], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s23, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:237 offset1:238
	ds_load_2addr_b32 v[9:10], v8 offset0:239 offset1:240
	v_fmac_f32_e32 v11, s22, v2
	v_fmac_f32_e32 v11, s21, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:241 offset1:242
	v_fmac_f32_e32 v11, s20, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s19, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:243 offset1:244
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s18, v6
	v_fmac_f32_e32 v11, s17, v7
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s16, v9
	v_fmac_f32_e32 v11, s15, v10
	ds_load_2addr_b32 v[6:7], v8 offset0:245 offset1:246
	ds_load_2addr_b32 v[9:10], v8 offset0:247 offset1:248
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s14, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v3
	ds_load_2addr_b32 v[2:3], v8 offset0:249 offset1:250
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s12, v4
	v_fmac_f32_e32 v11, s11, v5
	ds_load_2addr_b32 v[4:5], v8 offset0:251 offset1:252
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s10, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, s9, v7
	ds_load_2addr_b32 v[6:7], v8 offset0:253 offset1:254
	ds_load_b32 v12, v8 offset:1148
	s_waitcnt lgkmcnt(4)
	v_fmac_f32_e32 v11, s8, v9
	v_add_nc_u32_e32 v9, 0x41c, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s7, v10
	s_waitcnt lgkmcnt(3)
	v_dual_fmac_f32 v11, s6, v2 :: v_dual_add_nc_u32 v2, 0x3fc, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, s5, v3
	ds_load_2addr_b32 v[2:3], v2 offset1:1
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s4, v4
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, c_Kernel@rel32@lo+68
	s_addc_u32 s5, s5, c_Kernel@rel32@hi+76
	v_add_nc_u32_e32 v4, 0x404, v8
	s_load_b512 s[4:19], s[4:5], 0x0
	v_fmac_f32_e32 v11, s3, v5
	ds_load_2addr_b32 v[4:5], v4 offset1:1
	s_waitcnt lgkmcnt(0)
	v_dual_fmac_f32 v11, s2, v6 :: v_dual_add_nc_u32 v6, 0x40c, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, s1, v7
	ds_load_2addr_b32 v[6:7], v6 offset1:1
	v_dual_fmac_f32 v11, s0, v2 :: v_dual_add_nc_u32 v2, 0x414, v8
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, c_Kernel@rel32@lo+4
	s_addc_u32 s1, s1, c_Kernel@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s19, v3
	ds_load_2addr_b32 v[2:3], v2 offset1:1
	ds_load_2addr_b32 v[9:10], v9 offset1:1
	v_fmac_f32_e32 v11, s18, v4
	v_dual_fmac_f32 v11, s17, v5 :: v_dual_add_nc_u32 v4, 0x424, v8
	ds_load_2addr_b32 v[4:5], v4 offset1:1
	s_waitcnt lgkmcnt(3)
	v_dual_fmac_f32 v11, s16, v6 :: v_dual_add_nc_u32 v6, 0x434, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s15, v7
	s_waitcnt lgkmcnt(2)
	v_dual_fmac_f32 v11, s14, v2 :: v_dual_add_nc_u32 v2, 0x42c, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v11, s13, v3
	ds_load_2addr_b32 v[2:3], v2 offset1:1
	s_waitcnt lgkmcnt(2)
	v_fmac_f32_e32 v11, s12, v9
	v_add_nc_u32_e32 v9, 0x43c, v8
	v_fmac_f32_e32 v11, s11, v10
	ds_load_2addr_b32 v[6:7], v6 offset1:1
	ds_load_2addr_b32 v[9:10], v9 offset1:1
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s10, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v11, s9, v5 :: v_dual_add_nc_u32 v4, 0x44c, v8
	ds_load_2addr_b32 v[4:5], v4 offset1:1
	s_waitcnt lgkmcnt(3)
	v_dual_fmac_f32 v11, s8, v2 :: v_dual_add_nc_u32 v2, 0x444, v8
	s_load_b512 s[8:23], s[0:1], 0x0
	v_fmac_f32_e32 v11, s7, v3
	ds_load_2addr_b32 v[2:3], v2 offset1:1
	s_waitcnt lgkmcnt(0)
	v_dual_fmac_f32 v11, s6, v6 :: v_dual_add_nc_u32 v6, 0x454, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s5, v7
	v_fmac_f32_e32 v11, s4, v9
	v_add_nc_u32_e32 v9, 0x45c, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s23, v10
	ds_load_2addr_b32 v[6:7], v6 offset1:1
	ds_load_2addr_b32 v[9:10], v9 offset1:1
	v_dual_fmac_f32 v11, s22, v2 :: v_dual_add_nc_u32 v2, 0x464, v8
	v_fmac_f32_e32 v11, s21, v3
	ds_load_2addr_b32 v[2:3], v2 offset1:1
	v_fmac_f32_e32 v11, s20, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v11, s19, v5 :: v_dual_add_nc_u32 v4, 0x46c, v8
	ds_load_2addr_b32 v[4:5], v4 offset1:1
	s_waitcnt lgkmcnt(3)
	v_dual_fmac_f32 v11, s18, v6 :: v_dual_add_nc_u32 v6, 0x474, v8
	v_fmac_f32_e32 v11, s17, v7
	ds_load_2addr_b32 v[6:7], v6 offset1:1
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v11, s16, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s15, v10
	s_waitcnt lgkmcnt(2)
	v_fmac_f32_e32 v11, s14, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s13, v3
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v11, s12, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s11, v5
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v11, s10, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, s9, v7
	v_fmac_f32_e32 v11, s8, v12
	global_store_b32 v[0:1], v11, off offset:1024
.LBB0_166:                              ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z22convolutionX_63_KernelPfS_iiiif
		.amdhsa_group_segment_fixed_size 10240
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 34
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z22convolutionX_63_KernelPfS_iiiif, .Lfunc_end0-_Z22convolutionX_63_KernelPfS_iiiif
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 9756
; NumSgprs: 36
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 10240 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 36
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	c_Kernel                ; @c_Kernel
	.type	c_Kernel,@object
	.section	.bss,"aw",@nobits
	.globl	c_Kernel
	.p2align	4, 0x0
c_Kernel:
	.zero	252
	.size	c_Kernel, 252

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym c_Kernel
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 10240
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z22convolutionX_63_KernelPfS_iiiif
    .private_segment_fixed_size: 0
    .sgpr_count:     36
    .sgpr_spill_count: 0
    .symbol:         _Z22convolutionX_63_KernelPfS_iiiif.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
