#include <cuda.h>
#include <cuda_runtime.h>
#include "stdio.h"

#define TILE_SIZE 64
#define WARP_SIZE 32

extern "C" void CSR_matvec(int N, int nnz, int* start, int* indices, float* data, float* x, float *y, bool bVectorized);
extern "C" void CSR_create(int N, int nnz, int* start, int * indices, float * data , float * x , float * y, int** start_d, int **indices_d, float **data_d, float **x_d, float **y_d);
extern "C" void CSR_kernel(int N, int nnz, int* start_d, int * indices_d, float * data_d , float * x_d , float * y_d, bool bVectorized);
extern "C" void CSR_destroy(int* start_d, int* indices_d, float* data_d, float* x_d, float* y_d);

extern "C" void ELL_create(int N, int num_cols_per_row, int * indices, float * data , float * x , float * y, int **indices_d, float **data_d, float **x_d, float **y_d);
extern "C" void ELL_kernel(int N, int num_cols_per_row , int * indices_d, float * data_d , float * x_d , float * y_d);
extern "C" void ELL_destroy(int* indices_d, float* data_d, float* x_d, float* y_d);

extern "C" void band_create(int N, int num_cols_per_row, float * data , float * x , float * y, float **data_d, float **x_d, float **y_d);
extern "C" void band_kernel(int N, int num_cols_per_row , float * data_d , float * x_d , float * y_d);
extern "C" void band_destroy(float* data_d, float* x_d, float* y_d);

/**
 * Custom CUDA error check wrapper.
 */
#define checkCUDAError() do {                           \
 cudaError_t error = cudaGetLastError();               \
 if (error != cudaSuccess) {                            \
   printf("(CUDA) %s", cudaGetErrorString(error)); \
   printf(" (" __FILE__ ":%d)\n", __LINE__);  \
  }\
} while (0)

/**
 * Cuda kernel for: CSR_s(A)x = y
 */
__global__ void k_csr_mat_vec_mm(const int N, int *start, int* indices, float *data, float *x, float* y) {
	int row = blockDim.x * blockIdx.x + threadIdx.x ;

	if ( row < N ){
		float dot = 0;
		int row_start = start [ row ];
		int row_end = start [ row+1];

		for ( int jj = row_start ; jj < row_end ; jj ++) {
			dot += data [ jj ] * x [ indices [ jj ]];
		}

		y[row] = dot ;
	}
}

/**
 * Cuda kernel for: CSR_v(A)x = y
 */
__global__ void k_csr2_mat_vec_mm(const int N, int *start, int* indices, float *data, float *x, float* y) {
  __shared__ float vals[TILE_SIZE];
   
  int thread_id = blockDim.x * blockIdx.x + threadIdx.x;
  int warp_id = thread_id / WARP_SIZE;
  int lane = thread_id & (WARP_SIZE - 1);
  int row = warp_id;

  if (row < N) {
    int row_start = start[row];
    int row_end = start[row + 1];

	// compute running sum per thread
	vals[threadIdx.x] = 0;

	for (int jj = row_start + lane; jj < row_end; jj += WARP_SIZE) {
	  vals[threadIdx.x] += data[jj] * x[indices[jj]];
	}

    // parallel reduction in shared memory
    for (int d = WARP_SIZE >> 1; d >= 1; d >>= 1) {
      if (lane < d) vals[threadIdx.x] += vals[threadIdx.x + d];
    }

    // first thread in a warp writes the result
    if (lane == 0) {
      y[row] = vals[threadIdx.x];
    }
  }
}

/**
 * Cuda kernel for: ELL(A)x = y
 */
__global__ void k_ell_mat_vec_mm ( const int N, const int num_cols_per_row , int * indices,
									float * data , float * x , float * y ) {
	int row = blockDim.x * blockIdx.x + threadIdx.x ;

	if ( row < N ){
		float dot = 0;
		for ( int n = 0; n < num_cols_per_row ; n ++){
			int col = indices [ N * n + row ];
			float val = data [ N * n + row ];
			if ( val != 0)
				dot += val * x [ col ];
		}
		y [ row ] = dot ;
	}
}

/**
 * Cuda kernel for: Band(A)x = y
 */
__global__ void band_matvec(int N, int k_max, 
    float* a, float* x, float* y) {

  int i = TILE_SIZE * blockIdx.x + threadIdx.x;

  if (i < N) {
    float dot = 0;

    for (int k = 0; k < 2 * k_max + 1; k++) {
      float val = a[N * k + i];
      int j = i + k - k_max;

      if (val != 0) dot += val * x[j];
    }

    y[i] = dot;
  }
}

/**
 * Perform: CSR(A)x = y
 */
void CSR_matvec(const int N, const int nnz, int* start, int * indices, float * data , float * x , float * y, const bool bVectorized) {
	int *start_d, *indices_d;
	float *data_d, *x_d, *y_d;

	CSR_create(N, nnz, start, indices, data, x, y, &start_d, &indices_d, &data_d, &x_d, &y_d);

	CSR_kernel(N, nnz, start_d, indices_d, data_d, x_d, y_d, bVectorized);

	cudaMemcpy(y, y_d, N * sizeof(float), cudaMemcpyDeviceToHost);
	checkCUDAError();

	CSR_destroy(start_d, indices_d, data_d, x_d, y_d);
}


/**
 * Create CSR matrix
 */
void CSR_create(const int N, const int nnz,
		int * start, int * indices, float * data , float * x , float * y, 
		int ** start_d, int ** indices_d, float **data_d, float **x_d, float **y_d) {

	/************************/
	/* copy to device       */
	/************************/

	cudaMalloc((void **) start_d, (N+1) * sizeof(int));
	checkCUDAError();
	cudaMemcpy(*start_d, start, (N+1) * sizeof(int), cudaMemcpyHostToDevice);
	checkCUDAError();

	cudaMalloc((void **) indices_d, nnz * sizeof(int));
	checkCUDAError();
	cudaMemcpy(*indices_d, indices, nnz * sizeof(int), cudaMemcpyHostToDevice);
	checkCUDAError();

	cudaMalloc((void **) data_d, nnz * sizeof(float));
	checkCUDAError();
	cudaMemcpy(*data_d, data, nnz * sizeof(float), cudaMemcpyHostToDevice);
	checkCUDAError();

	cudaMalloc((void **) x_d, N * sizeof(float));
	checkCUDAError();
	cudaMemcpy(*x_d, x, N * sizeof(float), cudaMemcpyHostToDevice);
	checkCUDAError();

	cudaMalloc((void **) y_d, N * sizeof(float));
	checkCUDAError();
	cudaMemcpy(*y_d, y, N * sizeof(float) , cudaMemcpyHostToDevice);
	checkCUDAError();
}

/**
 * Perform: CSR(A)x = y
 */
void CSR_kernel(const int N, const int nnz, int * start_d , int * indices_d, float * data_d , float * x_d , float * y_d, const bool bVectorized) {
	if (bVectorized) {
		//#threads = #rows * #threads per row (= N * WARP_SIZE)
		dim3 grid((N * WARP_SIZE + TILE_SIZE - 1)/TILE_SIZE, 1, 1);
		dim3 block(TILE_SIZE, 1, 1);

		k_csr2_mat_vec_mm <<< grid, block >>> (N, start_d, indices_d, data_d, x_d, y_d);
	} else {
		//#threads = #rows (= N)
		dim3 grid((N + TILE_SIZE - 1)/TILE_SIZE, 1, 1);
		dim3 block(TILE_SIZE, 1, 1);

		k_csr_mat_vec_mm <<< grid, block >>> (N, start_d, indices_d, data_d, x_d, y_d);
	}

	checkCUDAError();
}

/**
 * Destroy CSR matrix
 */
void CSR_destroy(int* start_d, int* indices_d, float* data_d, float* x_d, float* y_d) {
	cudaFree(start_d);
	cudaFree(indices_d);
	cudaFree(data_d);
	cudaFree(x_d);
	cudaFree(y_d);
}

/**
 * Create band matrix
 */
void band_create(const int N, const int num_cols_per_row,
		float * data , float * x , float * y, 
		float **data_d, float **x_d, float **y_d) {

	cudaMalloc((void **) data_d, N * num_cols_per_row * sizeof(float));
	checkCUDAError();
	cudaMemcpy(*data_d, data, N * num_cols_per_row * sizeof(float), cudaMemcpyHostToDevice);
	checkCUDAError();

	cudaMalloc((void **) x_d, N * sizeof(float));
	checkCUDAError();
	cudaMemcpy(*x_d, x, N * sizeof(float), cudaMemcpyHostToDevice);
	checkCUDAError();

	cudaMalloc((void **) y_d, N * sizeof(float));
	checkCUDAError();
	cudaMemcpy(*y_d, y, N * sizeof(float), cudaMemcpyHostToDevice);
	checkCUDAError();
}


/**
 * Perform: band(A)x = y
 */
void band_kernel(int N, int k_max , float * data_d , float * x_d , float * y_d) {
	//#threads = #rows (= N)
	dim3 grid((N + TILE_SIZE - 1)/TILE_SIZE, 1, 1);
	dim3 block(TILE_SIZE, 1, 1);

	band_matvec <<< grid, block >>> (N, k_max, data_d , x_d, y_d);

	checkCUDAError();
}


/**
 * Destroy ELL matrix
 */
void band_destroy(float* data_d, float* x_d, float* y_d) {
	cudaFree(data_d);
	cudaFree(x_d);
	cudaFree(y_d);
}

/**
 * Create ELL matrix
 */
void ELL_create(const int N, const int num_cols_per_row,
		int * indices, float * data , float * x , float * y, 
		int ** indices_d, float **data_d, float **x_d, float **y_d) {

	cudaMalloc((void **) indices_d, N * num_cols_per_row * sizeof(int));
	checkCUDAError();
	cudaMemcpy(*indices_d, indices, N * num_cols_per_row * sizeof(int), cudaMemcpyHostToDevice);
	checkCUDAError();

	cudaMalloc((void **) data_d, N * num_cols_per_row * sizeof(float));
	checkCUDAError();
	cudaMemcpy(*data_d, data, N * num_cols_per_row * sizeof(float), cudaMemcpyHostToDevice);
	checkCUDAError();

	cudaMalloc((void **) x_d, N * sizeof(float));
	checkCUDAError();
	cudaMemcpy(*x_d, x, N * sizeof(float), cudaMemcpyHostToDevice);
	checkCUDAError();

	cudaMalloc((void **) y_d, N * sizeof(float));
	checkCUDAError();
	cudaMemcpy(*y_d, y, N * sizeof(float), cudaMemcpyHostToDevice);
	checkCUDAError();
}

/**
 * Perform: ELL(A)x = y
 */
void ELL_kernel(int N, int num_cols_per_row , int * indices_d, float * data_d , float * x_d , float * y_d) {
	//round grid size N/TILE_SIZE up
	dim3 grid((N + TILE_SIZE - 1)/TILE_SIZE, 1, 1);
	dim3 block(TILE_SIZE, 1, 1);

	k_ell_mat_vec_mm <<< grid, block >>> (N, num_cols_per_row, indices_d, data_d , x_d, y_d);
	checkCUDAError();
}

/**
 * Destroy ELL matrix
 */
void ELL_destroy(int* indices_d, float* data_d, float* x_d, float* y_d) {
	cudaFree(indices_d);
	cudaFree(data_d);
	cudaFree(x_d);
	cudaFree(y_d);
}


	.file	"tmpxft_002cd5ff_00000000-6_kernels.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2039:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2039:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"(CUDA) %s"
.LC1:
	.string	" (/home/ubuntu/Datasets/stackv2/train-structured/PhuNH/hpc-aa/master/t4/kernels.cu:%d)\n"
	.text
	.globl	CSR_create
	.type	CSR_create, @function
CSR_create:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	incl	%edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movslq	%edi, %rdi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%esi, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	112(%rsp), %rax
	movq	120(%rsp), %r15
	movq	%rdx, 8(%rsp)
	movq	%rcx, 16(%rsp)
	movq	128(%rsp), %r14
	movq	%rax, 40(%rsp)
	leaq	0(,%rdi,4), %rax
	movq	%r15, %rdi
	movq	136(%rsp), %r13
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	movq	144(%rsp), %r12
	movq	%r8, 24(%rsp)
	movq	152(%rsp), %rbp
	movq	%r9, 32(%rsp)
	call	cudaMalloc@PLT
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L3
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$156, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L3:
	movq	(%r15), %rdi
	movq	(%rsp), %rdx
	movl	$1, %ecx
	movq	8(%rsp), %rsi
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L4
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$158, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L4:
	salq	$2, %rbx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L5
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$161, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L5:
	movq	(%r14), %rdi
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L6
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$163, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L6:
	movq	%r13, %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L7
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$166, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L7:
	movq	0(%r13), %rdi
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L8
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$168, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L8:
	movq	(%rsp), %rbx
	movq	%r12, %rdi
	subq	$4, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L9
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$171, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L9:
	movq	(%r12), %rdi
	movq	32(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L10
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$173, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L10:
	movq	%rbp, %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L11
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$176, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L11:
	movq	0(%rbp), %rdi
	movq	40(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L2
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	addq	$56, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movl	$178, %edx
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	leaq	.LC1(%rip), %rsi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$2, %edi
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
.L2:
	.cfi_restore_state
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	CSR_create, .-CSR_create
	.globl	CSR_destroy
	.type	CSR_destroy, @function
CSR_destroy:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%r8, %rbx
	pushq	%rax
	.cfi_def_cfa_offset 48
	call	cudaFree@PLT
	movq	%r13, %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	cudaFree@PLT
	popq	%rdx
	.cfi_def_cfa_offset 40
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2030:
	.size	CSR_destroy, .-CSR_destroy
	.globl	band_create
	.type	band_create, @function
band_create:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r9, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%edi, %rbx
	movq	%r9, %rdi
	imull	%ebx, %esi
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movslq	%esi, %rsi
	movq	%r8, 8(%rsp)
	movq	80(%rsp), %r15
	leaq	0(,%rsi,4), %rax
	movq	88(%rsp), %r14
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L45
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$221, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L45:
	movq	0(%rbp), %rdi
	movq	(%rsp), %rdx
	movl	$1, %ecx
	movq	%r13, %rsi
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L46
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$223, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L46:
	salq	$2, %rbx
	movq	%r15, %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L47
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$226, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L47:
	movq	(%r15), %rdi
	movl	$1, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L48
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$228, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L48:
	movq	%r14, %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L49
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$231, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L49:
	movq	(%r14), %rdi
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L44
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movl	$233, %edx
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	leaq	.LC1(%rip), %rsi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$2, %edi
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
.L44:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	band_create, .-band_create
	.globl	band_destroy
	.type	band_destroy, @function
band_destroy:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdx, %rbx
	pushq	%rax
	.cfi_def_cfa_offset 32
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	cudaFree@PLT
	popq	%rdx
	.cfi_def_cfa_offset 24
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2033:
	.size	band_destroy, .-band_destroy
	.globl	ELL_create
	.type	ELL_create, @function
ELL_create:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%edi, %rbx
	imull	%ebx, %esi
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movslq	%esi, %rsi
	movq	96(%rsp), %r15
	movq	%rcx, 8(%rsp)
	movq	104(%rsp), %r14
	movq	112(%rsp), %r13
	movq	%r8, 16(%rsp)
	leaq	0(,%rsi,4), %rax
	movq	%rax, %rsi
	movq	%r15, %rdi
	movq	%r9, 24(%rsp)
	movq	120(%rsp), %r12
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L70
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$268, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L70:
	movq	(%r15), %rdi
	movq	(%rsp), %rdx
	movl	$1, %ecx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L71
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$270, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L71:
	movq	(%rsp), %rsi
	movq	%r14, %rdi
	call	cudaMalloc@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L72
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$273, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L72:
	movq	(%r14), %rdi
	movq	(%rsp), %rdx
	movl	$1, %ecx
	movq	8(%rsp), %rsi
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L73
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$275, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L73:
	salq	$2, %rbx
	movq	%r13, %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L74
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$278, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L74:
	movq	0(%r13), %rdi
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L75
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$280, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L75:
	movq	%r12, %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L76
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$283, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L76:
	movq	(%r12), %rdi
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L69
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movl	$285, %edx
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	leaq	.LC1(%rip), %rsi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$2, %edi
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
.L69:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	ELL_create, .-ELL_create
	.globl	ELL_destroy
	.type	ELL_destroy, @function
ELL_destroy:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rcx, %rbx
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2036:
	.size	ELL_destroy, .-ELL_destroy
	.globl	_Z47__device_stub__Z16k_csr_mat_vec_mmiPiS_PfS0_S0_iPiS_PfS0_S0_
	.type	_Z47__device_stub__Z16k_csr_mat_vec_mmiPiS_PfS0_S0_iPiS_PfS0_S0_, @function
_Z47__device_stub__Z16k_csr_mat_vec_mmiPiS_PfS0_S0_iPiS_PfS0_S0_:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L102
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L102:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L104
	call	__stack_chk_fail@PLT
.L104:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z47__device_stub__Z16k_csr_mat_vec_mmiPiS_PfS0_S0_iPiS_PfS0_S0_, .-_Z47__device_stub__Z16k_csr_mat_vec_mmiPiS_PfS0_S0_iPiS_PfS0_S0_
	.globl	_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_
	.type	_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_, @function
_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_:
.LFB2062:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z16k_csr_mat_vec_mmiPiS_PfS0_S0_iPiS_PfS0_S0_
	.cfi_endproc
.LFE2062:
	.size	_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_, .-_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_
	.globl	_Z48__device_stub__Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_iPiS_PfS0_S0_
	.type	_Z48__device_stub__Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_iPiS_PfS0_S0_, @function
_Z48__device_stub__Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_iPiS_PfS0_S0_:
.LFB2063:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L107
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L107:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L109
	call	__stack_chk_fail@PLT
.L109:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2063:
	.size	_Z48__device_stub__Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_iPiS_PfS0_S0_, .-_Z48__device_stub__Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_iPiS_PfS0_S0_
	.globl	_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_
	.type	_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_, @function
_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_:
.LFB2064:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_iPiS_PfS0_S0_
	.cfi_endproc
.LFE2064:
	.size	_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_, .-_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_
	.globl	CSR_kernel
	.type	CSR_kernel, @function
CSR_kernel:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r9, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edi, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	cmpb	$0, 104(%rsp)
	movq	96(%rsp), %r15
	je	.L113
	movl	%edi, %eax
	movl	$64, %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	sall	$5, %eax
	movl	$1, 28(%rsp)
	addl	$63, %eax
	cltd
	idivl	%ecx
	movl	$67108865, %edx
	movl	$1, %ecx
	salq	$6, %rdx
	movq	%rdx, 20(%rsp)
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L115
	movq	%r15, %r9
	movq	%r14, %r8
	movq	%r13, %rcx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movl	%ebx, %edi
	call	_Z48__device_stub__Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_iPiS_PfS0_S0_
	jmp	.L115
.L113:
	leal	63(%rdi), %eax
	movl	$64, %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cltd
	movl	$1, 28(%rsp)
	idivl	%ecx
	movl	$67108865, %edx
	movl	$1, %ecx
	salq	$6, %rdx
	movq	%rdx, 20(%rsp)
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L115
	movq	%r15, %r9
	movq	%r14, %r8
	movq	%r13, %rcx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movl	%ebx, %edi
	call	_Z47__device_stub__Z16k_csr_mat_vec_mmiPiS_PfS0_S0_iPiS_PfS0_S0_
.L115:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L112
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movl	$199, %edx
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	leaq	.LC1(%rip), %rsi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$2, %edi
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
.L112:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	CSR_kernel, .-CSR_kernel
	.globl	CSR_matvec
	.type	CSR_matvec, @function
CSR_matvec:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%edi, %ebx
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	48(%rsp), %rax
	movq	96(%rsp), %r13
	movl	104(%rsp), %r12d
	pushq	%rax
	.cfi_def_cfa_offset 104
	movzbl	%r12b, %r12d
	leaq	48(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 112
	leaq	48(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 120
	leaq	48(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 128
	leaq	48(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 136
	pushq	%r13
	.cfi_def_cfa_offset 144
	movl	%esi, 60(%rsp)
	call	CSR_create
	addq	$48, %rsp
	.cfi_def_cfa_offset 96
	movl	%ebx, %edi
	pushq	%r12
	.cfi_def_cfa_offset 104
	pushq	56(%rsp)
	.cfi_def_cfa_offset 112
	movq	56(%rsp), %r9
	movq	48(%rsp), %r8
	movq	40(%rsp), %rcx
	movl	28(%rsp), %esi
	movq	32(%rsp), %rdx
	call	CSR_kernel
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
	movslq	%ebx, %rdx
	movq	48(%rsp), %rsi
	salq	$2, %rdx
	movl	$2, %ecx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L120
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$138, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
.L120:
	movq	48(%rsp), %r8
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	CSR_destroy
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L121
	call	__stack_chk_fail@PLT
.L121:
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	CSR_matvec, .-CSR_matvec
	.globl	_Z46__device_stub__Z16k_ell_mat_vec_mmiiPiPfS0_S0_iiPiPfS0_S0_
	.type	_Z46__device_stub__Z16k_ell_mat_vec_mmiiPiPfS0_S0_iiPiPfS0_S0_, @function
_Z46__device_stub__Z16k_ell_mat_vec_mmiiPiPfS0_S0_iiPiPfS0_S0_:
.LFB2065:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 32(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L126
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z16k_ell_mat_vec_mmiiPiPfS0_S0_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L126:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L128
	call	__stack_chk_fail@PLT
.L128:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2065:
	.size	_Z46__device_stub__Z16k_ell_mat_vec_mmiiPiPfS0_S0_iiPiPfS0_S0_, .-_Z46__device_stub__Z16k_ell_mat_vec_mmiiPiPfS0_S0_iiPiPfS0_S0_
	.globl	_Z16k_ell_mat_vec_mmiiPiPfS0_S0_
	.type	_Z16k_ell_mat_vec_mmiiPiPfS0_S0_, @function
_Z16k_ell_mat_vec_mmiiPiPfS0_S0_:
.LFB2066:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z16k_ell_mat_vec_mmiiPiPfS0_S0_iiPiPfS0_S0_
	.cfi_endproc
.LFE2066:
	.size	_Z16k_ell_mat_vec_mmiiPiPfS0_S0_, .-_Z16k_ell_mat_vec_mmiiPiPfS0_S0_
	.globl	ELL_kernel
	.type	ELL_kernel, @function
ELL_kernel:
.LFB2035:
	.cfi_startproc
	endbr64
	leal	63(%rdi), %eax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r9, %r15
	xorl	%r9d, %r9d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	xorl	%r8d, %r8d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	movl	$64, %ecx
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	cltd
	idivl	%ecx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	%edi, %ebx
	movl	%esi, %ebp
	movl	$67108865, %edx
	salq	$6, %rdx
	movl	$1, %ecx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L132
	movq	%r15, %r9
	movq	%r14, %r8
	movq	%r13, %rcx
	movq	%r12, %rdx
	movl	%ebp, %esi
	movl	%ebx, %edi
	call	_Z46__device_stub__Z16k_ell_mat_vec_mmiiPiPfS0_S0_iiPiPfS0_S0_
.L132:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L131
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movl	$297, %edx
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	leaq	.LC1(%rip), %rsi
	popq	%rbp
	.cfi_def_cfa_offset 40
	movl	$2, %edi
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
.L131:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	ELL_kernel, .-ELL_kernel
	.globl	_Z37__device_stub__Z11band_matveciiPfS_S_iiPfS_S_
	.type	_Z37__device_stub__Z11band_matveciiPfS_S_iiPfS_S_, @function
_Z37__device_stub__Z11band_matveciiPfS_S_iiPfS_S_:
.LFB2067:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L135
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11band_matveciiPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L135:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L137
	call	__stack_chk_fail@PLT
.L137:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2067:
	.size	_Z37__device_stub__Z11band_matveciiPfS_S_iiPfS_S_, .-_Z37__device_stub__Z11band_matveciiPfS_S_iiPfS_S_
	.globl	_Z11band_matveciiPfS_S_
	.type	_Z11band_matveciiPfS_S_, @function
_Z11band_matveciiPfS_S_:
.LFB2068:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z11band_matveciiPfS_S_iiPfS_S_
	.cfi_endproc
.LFE2068:
	.size	_Z11band_matveciiPfS_S_, .-_Z11band_matveciiPfS_S_
	.globl	band_kernel
	.type	band_kernel, @function
band_kernel:
.LFB2032:
	.cfi_startproc
	endbr64
	leal	63(%rdi), %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	xorl	%r9d, %r9d
	movq	%r8, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rcx, %r13
	movl	$64, %ecx
	xorl	%r8d, %r8d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdx, %r12
	cltd
	idivl	%ecx
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movl	%edi, %ebx
	movl	%esi, %ebp
	movl	$67108865, %edx
	salq	$6, %rdx
	movl	$1, %ecx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L141
	movq	%r14, %r8
	movq	%r13, %rcx
	movq	%r12, %rdx
	movl	%ebp, %esi
	movl	%ebx, %edi
	call	_Z37__device_stub__Z11band_matveciiPfS_S_iiPfS_S_
.L141:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L140
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	addq	$32, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	movl	$247, %edx
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	leaq	.LC1(%rip), %rsi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
.L140:
	.cfi_restore_state
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	band_kernel, .-band_kernel
	.section	.rodata.str1.1
.LC2:
	.string	"_Z11band_matveciiPfS_S_"
.LC3:
	.string	"_Z16k_ell_mat_vec_mmiiPiPfS0_S0_"
.LC4:
	.string	"_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_"
.LC5:
	.string	"_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2070:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11band_matveciiPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16k_ell_mat_vec_mmiiPiPfS0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2070:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>

#include "stdio.h"

#define TILE_SIZE 64
#define WARP_SIZE 32

extern "C" void CSR_matvec(int N, int nnz, int* start, int* indices, float* data, float* x, float *y, bool bVectorized);
extern "C" void CSR_create(int N, int nnz, int* start, int * indices, float * data , float * x , float * y, int** start_d, int **indices_d, float **data_d, float **x_d, float **y_d);
extern "C" void CSR_kernel(int N, int nnz, int* start_d, int * indices_d, float * data_d , float * x_d , float * y_d, bool bVectorized);
extern "C" void CSR_destroy(int* start_d, int* indices_d, float* data_d, float* x_d, float* y_d);

extern "C" void ELL_create(int N, int num_cols_per_row, int * indices, float * data , float * x , float * y, int **indices_d, float **data_d, float **x_d, float **y_d);
extern "C" void ELL_kernel(int N, int num_cols_per_row , int * indices_d, float * data_d , float * x_d , float * y_d);
extern "C" void ELL_destroy(int* indices_d, float* data_d, float* x_d, float* y_d);

extern "C" void band_create(int N, int num_cols_per_row, float * data , float * x , float * y, float **data_d, float **x_d, float **y_d);
extern "C" void band_kernel(int N, int num_cols_per_row , float * data_d , float * x_d , float * y_d);
extern "C" void band_destroy(float* data_d, float* x_d, float* y_d);

/**
 * Custom CUDA error check wrapper.
 */
#define checkCUDAError() do {                           \
 hipError_t error = hipGetLastError();               \
 if (error != hipSuccess) {                            \
   printf("(CUDA) %s", hipGetErrorString(error)); \
   printf(" (" __FILE__ ":%d)\n", __LINE__);  \
  }\
} while (0)

/**
 * Cuda kernel for: CSR_s(A)x = y
 */
__global__ void k_csr_mat_vec_mm(const int N, int *start, int* indices, float *data, float *x, float* y) {
	int row = blockDim.x * blockIdx.x + threadIdx.x ;

	if ( row < N ){
		float dot = 0;
		int row_start = start [ row ];
		int row_end = start [ row+1];

		for ( int jj = row_start ; jj < row_end ; jj ++) {
			dot += data [ jj ] * x [ indices [ jj ]];
		}

		y[row] = dot ;
	}
}

/**
 * Cuda kernel for: CSR_v(A)x = y
 */
__global__ void k_csr2_mat_vec_mm(const int N, int *start, int* indices, float *data, float *x, float* y) {
  __shared__ float vals[TILE_SIZE];
   
  int thread_id = blockDim.x * blockIdx.x + threadIdx.x;
  int warp_id = thread_id / WARP_SIZE;
  int lane = thread_id & (WARP_SIZE - 1);
  int row = warp_id;

  if (row < N) {
    int row_start = start[row];
    int row_end = start[row + 1];

	// compute running sum per thread
	vals[threadIdx.x] = 0;

	for (int jj = row_start + lane; jj < row_end; jj += WARP_SIZE) {
	  vals[threadIdx.x] += data[jj] * x[indices[jj]];
	}

    // parallel reduction in shared memory
    for (int d = WARP_SIZE >> 1; d >= 1; d >>= 1) {
      if (lane < d) vals[threadIdx.x] += vals[threadIdx.x + d];
    }

    // first thread in a warp writes the result
    if (lane == 0) {
      y[row] = vals[threadIdx.x];
    }
  }
}

/**
 * Cuda kernel for: ELL(A)x = y
 */
__global__ void k_ell_mat_vec_mm ( const int N, const int num_cols_per_row , int * indices,
									float * data , float * x , float * y ) {
	int row = blockDim.x * blockIdx.x + threadIdx.x ;

	if ( row < N ){
		float dot = 0;
		for ( int n = 0; n < num_cols_per_row ; n ++){
			int col = indices [ N * n + row ];
			float val = data [ N * n + row ];
			if ( val != 0)
				dot += val * x [ col ];
		}
		y [ row ] = dot ;
	}
}

/**
 * Cuda kernel for: Band(A)x = y
 */
__global__ void band_matvec(int N, int k_max, 
    float* a, float* x, float* y) {

  int i = TILE_SIZE * blockIdx.x + threadIdx.x;

  if (i < N) {
    float dot = 0;

    for (int k = 0; k < 2 * k_max + 1; k++) {
      float val = a[N * k + i];
      int j = i + k - k_max;

      if (val != 0) dot += val * x[j];
    }

    y[i] = dot;
  }
}

/**
 * Perform: CSR(A)x = y
 */
void CSR_matvec(const int N, const int nnz, int* start, int * indices, float * data , float * x , float * y, const bool bVectorized) {
	int *start_d, *indices_d;
	float *data_d, *x_d, *y_d;

	CSR_create(N, nnz, start, indices, data, x, y, &start_d, &indices_d, &data_d, &x_d, &y_d);

	CSR_kernel(N, nnz, start_d, indices_d, data_d, x_d, y_d, bVectorized);

	hipMemcpy(y, y_d, N * sizeof(float), hipMemcpyDeviceToHost);
	checkCUDAError();

	CSR_destroy(start_d, indices_d, data_d, x_d, y_d);
}


/**
 * Create CSR matrix
 */
void CSR_create(const int N, const int nnz,
		int * start, int * indices, float * data , float * x , float * y, 
		int ** start_d, int ** indices_d, float **data_d, float **x_d, float **y_d) {

	/************************/
	/* copy to device       */
	/************************/

	hipMalloc((void **) start_d, (N+1) * sizeof(int));
	checkCUDAError();
	hipMemcpy(*start_d, start, (N+1) * sizeof(int), hipMemcpyHostToDevice);
	checkCUDAError();

	hipMalloc((void **) indices_d, nnz * sizeof(int));
	checkCUDAError();
	hipMemcpy(*indices_d, indices, nnz * sizeof(int), hipMemcpyHostToDevice);
	checkCUDAError();

	hipMalloc((void **) data_d, nnz * sizeof(float));
	checkCUDAError();
	hipMemcpy(*data_d, data, nnz * sizeof(float), hipMemcpyHostToDevice);
	checkCUDAError();

	hipMalloc((void **) x_d, N * sizeof(float));
	checkCUDAError();
	hipMemcpy(*x_d, x, N * sizeof(float), hipMemcpyHostToDevice);
	checkCUDAError();

	hipMalloc((void **) y_d, N * sizeof(float));
	checkCUDAError();
	hipMemcpy(*y_d, y, N * sizeof(float) , hipMemcpyHostToDevice);
	checkCUDAError();
}

/**
 * Perform: CSR(A)x = y
 */
void CSR_kernel(const int N, const int nnz, int * start_d , int * indices_d, float * data_d , float * x_d , float * y_d, const bool bVectorized) {
	if (bVectorized) {
		//#threads = #rows * #threads per row (= N * WARP_SIZE)
		dim3 grid((N * WARP_SIZE + TILE_SIZE - 1)/TILE_SIZE, 1, 1);
		dim3 block(TILE_SIZE, 1, 1);

		k_csr2_mat_vec_mm <<< grid, block >>> (N, start_d, indices_d, data_d, x_d, y_d);
	} else {
		//#threads = #rows (= N)
		dim3 grid((N + TILE_SIZE - 1)/TILE_SIZE, 1, 1);
		dim3 block(TILE_SIZE, 1, 1);

		k_csr_mat_vec_mm <<< grid, block >>> (N, start_d, indices_d, data_d, x_d, y_d);
	}

	checkCUDAError();
}

/**
 * Destroy CSR matrix
 */
void CSR_destroy(int* start_d, int* indices_d, float* data_d, float* x_d, float* y_d) {
	hipFree(start_d);
	hipFree(indices_d);
	hipFree(data_d);
	hipFree(x_d);
	hipFree(y_d);
}

/**
 * Create band matrix
 */
void band_create(const int N, const int num_cols_per_row,
		float * data , float * x , float * y, 
		float **data_d, float **x_d, float **y_d) {

	hipMalloc((void **) data_d, N * num_cols_per_row * sizeof(float));
	checkCUDAError();
	hipMemcpy(*data_d, data, N * num_cols_per_row * sizeof(float), hipMemcpyHostToDevice);
	checkCUDAError();

	hipMalloc((void **) x_d, N * sizeof(float));
	checkCUDAError();
	hipMemcpy(*x_d, x, N * sizeof(float), hipMemcpyHostToDevice);
	checkCUDAError();

	hipMalloc((void **) y_d, N * sizeof(float));
	checkCUDAError();
	hipMemcpy(*y_d, y, N * sizeof(float), hipMemcpyHostToDevice);
	checkCUDAError();
}


/**
 * Perform: band(A)x = y
 */
void band_kernel(int N, int k_max , float * data_d , float * x_d , float * y_d) {
	//#threads = #rows (= N)
	dim3 grid((N + TILE_SIZE - 1)/TILE_SIZE, 1, 1);
	dim3 block(TILE_SIZE, 1, 1);

	band_matvec <<< grid, block >>> (N, k_max, data_d , x_d, y_d);

	checkCUDAError();
}


/**
 * Destroy ELL matrix
 */
void band_destroy(float* data_d, float* x_d, float* y_d) {
	hipFree(data_d);
	hipFree(x_d);
	hipFree(y_d);
}

/**
 * Create ELL matrix
 */
void ELL_create(const int N, const int num_cols_per_row,
		int * indices, float * data , float * x , float * y, 
		int ** indices_d, float **data_d, float **x_d, float **y_d) {

	hipMalloc((void **) indices_d, N * num_cols_per_row * sizeof(int));
	checkCUDAError();
	hipMemcpy(*indices_d, indices, N * num_cols_per_row * sizeof(int), hipMemcpyHostToDevice);
	checkCUDAError();

	hipMalloc((void **) data_d, N * num_cols_per_row * sizeof(float));
	checkCUDAError();
	hipMemcpy(*data_d, data, N * num_cols_per_row * sizeof(float), hipMemcpyHostToDevice);
	checkCUDAError();

	hipMalloc((void **) x_d, N * sizeof(float));
	checkCUDAError();
	hipMemcpy(*x_d, x, N * sizeof(float), hipMemcpyHostToDevice);
	checkCUDAError();

	hipMalloc((void **) y_d, N * sizeof(float));
	checkCUDAError();
	hipMemcpy(*y_d, y, N * sizeof(float), hipMemcpyHostToDevice);
	checkCUDAError();
}

/**
 * Perform: ELL(A)x = y
 */
void ELL_kernel(int N, int num_cols_per_row , int * indices_d, float * data_d , float * x_d , float * y_d) {
	//round grid size N/TILE_SIZE up
	dim3 grid((N + TILE_SIZE - 1)/TILE_SIZE, 1, 1);
	dim3 block(TILE_SIZE, 1, 1);

	k_ell_mat_vec_mm <<< grid, block >>> (N, num_cols_per_row, indices_d, data_d , x_d, y_d);
	checkCUDAError();
}

/**
 * Destroy ELL matrix
 */
void ELL_destroy(int* indices_d, float* data_d, float* x_d, float* y_d) {
	hipFree(indices_d);
	hipFree(data_d);
	hipFree(x_d);
	hipFree(y_d);
}


	.text
	.file	"kernels.hip"
	.globl	_Z31__device_stub__k_csr_mat_vec_mmiPiS_PfS0_S0_ # -- Begin function _Z31__device_stub__k_csr_mat_vec_mmiPiS_PfS0_S0_
	.type	_Z31__device_stub__k_csr_mat_vec_mmiPiS_PfS0_S0_,@function
_Z31__device_stub__k_csr_mat_vec_mmiPiS_PfS0_S0_: # @_Z31__device_stub__k_csr_mat_vec_mmiPiS_PfS0_S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__k_csr_mat_vec_mmiPiS_PfS0_S0_, .Lfunc_end0-_Z31__device_stub__k_csr_mat_vec_mmiPiS_PfS0_S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__k_csr2_mat_vec_mmiPiS_PfS0_S0_ # -- Begin function _Z32__device_stub__k_csr2_mat_vec_mmiPiS_PfS0_S0_
	.type	_Z32__device_stub__k_csr2_mat_vec_mmiPiS_PfS0_S0_,@function
_Z32__device_stub__k_csr2_mat_vec_mmiPiS_PfS0_S0_: # @_Z32__device_stub__k_csr2_mat_vec_mmiPiS_PfS0_S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z32__device_stub__k_csr2_mat_vec_mmiPiS_PfS0_S0_, .Lfunc_end1-_Z32__device_stub__k_csr2_mat_vec_mmiPiS_PfS0_S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__k_ell_mat_vec_mmiiPiPfS0_S0_ # -- Begin function _Z31__device_stub__k_ell_mat_vec_mmiiPiPfS0_S0_
	.type	_Z31__device_stub__k_ell_mat_vec_mmiiPiPfS0_S0_,@function
_Z31__device_stub__k_ell_mat_vec_mmiiPiPfS0_S0_: # @_Z31__device_stub__k_ell_mat_vec_mmiiPiPfS0_S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16k_ell_mat_vec_mmiiPiPfS0_S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z31__device_stub__k_ell_mat_vec_mmiiPiPfS0_S0_, .Lfunc_end2-_Z31__device_stub__k_ell_mat_vec_mmiiPiPfS0_S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__band_matveciiPfS_S_ # -- Begin function _Z26__device_stub__band_matveciiPfS_S_
	.type	_Z26__device_stub__band_matveciiPfS_S_,@function
_Z26__device_stub__band_matveciiPfS_S_: # @_Z26__device_stub__band_matveciiPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11band_matveciiPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z26__device_stub__band_matveciiPfS_S_, .Lfunc_end3-_Z26__device_stub__band_matveciiPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	CSR_matvec                      # -- Begin function CSR_matvec
	.type	CSR_matvec,@function
CSR_matvec:                             # @CSR_matvec
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edi, %ebp
	movq	%rsp, %r14
	leaq	8(%rsp), %r12
	leaq	16(%rsp), %r13
	leaq	24(%rsp), %r15
	leaq	32(%rsp), %rbx
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	136(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	CSR_create
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
	movq	(%rbx), %rdx
	movq	(%r15), %rcx
	movq	(%r13), %r8
	movq	(%r12), %r9
	movzbl	104(%rsp), %eax
	movl	%ebp, %edi
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	(%r14)
	.cfi_adjust_cfa_offset 8
	callq	CSR_kernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movq	(%r14), %rsi
	movslq	%ebp, %rdx
	shlq	$2, %rdx
	movq	96(%rsp), %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB4_2
# %bb.1:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$138, %esi
	xorl	%eax, %eax
	callq	printf
.LBB4_2:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	movq	(%rsp), %r8
	callq	CSR_destroy
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	CSR_matvec, .Lfunc_end4-CSR_matvec
	.cfi_endproc
                                        # -- End function
	.globl	CSR_create                      # -- Begin function CSR_create
	.type	CSR_create,@function
CSR_create:                             # @CSR_create
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 32(%rsp)                   # 8-byte Spill
	movq	%r8, 16(%rsp)                   # 8-byte Spill
	movq	%rcx, (%rsp)                    # 8-byte Spill
	movq	%rdx, %r13
	movl	%esi, %ebp
	movq	152(%rsp), %rax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movq	144(%rsp), %rax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	136(%rsp), %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	128(%rsp), %rbx
	movq	120(%rsp), %r15
	movq	112(%rsp), %rax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movslq	%edi, %r14
	leaq	4(,%r14,4), %r12
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB5_2
# %bb.1:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$156, %esi
	xorl	%eax, %eax
	callq	printf
.LBB5_2:
	movq	(%r15), %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB5_4
# %bb.3:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$158, %esi
	xorl	%eax, %eax
	callq	printf
.LBB5_4:
	movslq	%ebp, %rbp
	shlq	$2, %rbp
	movq	%rbx, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	callq	hipGetLastError
	testl	%eax, %eax
	movq	24(%rsp), %r15                  # 8-byte Reload
	movq	8(%rsp), %r12                   # 8-byte Reload
	je	.LBB5_6
# %bb.5:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$161, %esi
	xorl	%eax, %eax
	callq	printf
.LBB5_6:
	movq	(%rbx), %rdi
	movq	(%rsp), %rsi                    # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB5_8
# %bb.7:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$163, %esi
	xorl	%eax, %eax
	callq	printf
.LBB5_8:
	movq	%r12, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	callq	hipGetLastError
	testl	%eax, %eax
	movq	48(%rsp), %rbx                  # 8-byte Reload
	je	.LBB5_10
# %bb.9:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$166, %esi
	xorl	%eax, %eax
	callq	printf
.LBB5_10:
	movq	(%r12), %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB5_12
# %bb.11:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$168, %esi
	xorl	%eax, %eax
	callq	printf
.LBB5_12:
	shlq	$2, %r14
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB5_14
# %bb.13:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$171, %esi
	xorl	%eax, %eax
	callq	printf
.LBB5_14:
	movq	(%r15), %rdi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB5_16
# %bb.15:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$173, %esi
	xorl	%eax, %eax
	callq	printf
.LBB5_16:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB5_18
# %bb.17:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$176, %esi
	xorl	%eax, %eax
	callq	printf
.LBB5_18:
	movq	(%rbx), %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB5_19
# %bb.20:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$178, %esi
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.LBB5_19:
	.cfi_def_cfa_offset 112
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	CSR_create, .Lfunc_end5-CSR_create
	.cfi_endproc
                                        # -- End function
	.globl	CSR_kernel                      # -- Begin function CSR_kernel
	.type	CSR_kernel,@function
CSR_kernel:                             # @CSR_kernel
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r12
	movq	%rdx, %r13
	movl	%edi, %ebp
	movq	64(%rsp), %r15
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	cmpb	$0, 72(%rsp)
	je	.LBB6_3
# %bb.1:
	movl	%ebp, %edi
	shll	$5, %edi
	leal	63(%rdi), %eax
	addl	$126, %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$6, %edi
	orq	%rdx, %rdi
	addq	$64, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_5
# %bb.2:
	movl	%ebp, %edi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movq	%r14, %rcx
	movq	%rbx, %r8
	movq	%r15, %r9
	callq	_Z32__device_stub__k_csr2_mat_vec_mmiPiS_PfS0_S0_
	jmp	.LBB6_5
.LBB6_3:
	leal	63(%rbp), %eax
	leal	126(%rbp), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$6, %edi
	orq	%rdx, %rdi
	addq	$64, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_5
# %bb.4:
	movl	%ebp, %edi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movq	%r14, %rcx
	movq	%rbx, %r8
	movq	%r15, %r9
	callq	_Z31__device_stub__k_csr_mat_vec_mmiPiS_PfS0_S0_
.LBB6_5:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB6_6
# %bb.7:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$199, %esi
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.LBB6_6:
	.cfi_def_cfa_offset 64
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	CSR_kernel, .Lfunc_end6-CSR_kernel
	.cfi_endproc
                                        # -- End function
	.globl	CSR_destroy                     # -- Begin function CSR_destroy
	.type	CSR_destroy,@function
CSR_destroy:                            # @CSR_destroy
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r8, %rbx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	%rsi, %r12
	callq	hipFree
	movq	%r12, %rdi
	callq	hipFree
	movq	%r15, %rdi
	callq	hipFree
	movq	%r14, %rdi
	callq	hipFree
	movq	%rbx, %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end7:
	.size	CSR_destroy, .Lfunc_end7-CSR_destroy
	.cfi_endproc
                                        # -- End function
	.globl	band_create                     # -- Begin function band_create
	.type	band_create,@function
band_create:                            # @band_create
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, 16(%rsp)                   # 8-byte Spill
	movq	%rcx, 8(%rsp)                   # 8-byte Spill
	movq	%rdx, %r13
	movl	%edi, %ebp
	movq	88(%rsp), %r14
	movq	80(%rsp), %r12
	imull	%edi, %esi
	movslq	%esi, %r15
	shlq	$2, %r15
	movq	%r9, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB8_2
# %bb.1:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$221, %esi
	xorl	%eax, %eax
	callq	printf
.LBB8_2:
	movq	(%rbx), %rdi
	movq	%r13, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB8_4
# %bb.3:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$223, %esi
	xorl	%eax, %eax
	callq	printf
.LBB8_4:
	movslq	%ebp, %r13
	shlq	$2, %r13
	movq	%r12, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB8_6
# %bb.5:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$226, %esi
	xorl	%eax, %eax
	callq	printf
.LBB8_6:
	movq	(%r12), %rdi
	movq	8(%rsp), %rsi                   # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB8_8
# %bb.7:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$228, %esi
	xorl	%eax, %eax
	callq	printf
.LBB8_8:
	movq	%r14, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB8_10
# %bb.9:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$231, %esi
	xorl	%eax, %eax
	callq	printf
.LBB8_10:
	movq	(%r14), %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB8_11
# %bb.12:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$233, %esi
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.LBB8_11:
	.cfi_def_cfa_offset 80
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	band_create, .Lfunc_end8-band_create
	.cfi_endproc
                                        # -- End function
	.globl	band_kernel                     # -- Begin function band_kernel
	.type	band_kernel,@function
band_kernel:                            # @band_kernel
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %rbx
	movq	%rcx, %r14
	movq	%rdx, %r15
	movl	%esi, %ebp
	movl	%edi, %r12d
	leal	63(%r12), %eax
	leal	126(%r12), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$6, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$64, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_2
# %bb.1:
	movl	%r12d, %edi
	movl	%ebp, %esi
	movq	%r15, %rdx
	movq	%r14, %rcx
	movq	%rbx, %r8
	callq	_Z26__device_stub__band_matveciiPfS_S_
.LBB9_2:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB9_3
# %bb.4:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$247, %esi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.LBB9_3:
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	band_kernel, .Lfunc_end9-band_kernel
	.cfi_endproc
                                        # -- End function
	.globl	band_destroy                    # -- Begin function band_destroy
	.type	band_destroy,@function
band_destroy:                           # @band_destroy
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	callq	hipFree
	movq	%r14, %rdi
	callq	hipFree
	movq	%rbx, %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end10:
	.size	band_destroy, .Lfunc_end10-band_destroy
	.cfi_endproc
                                        # -- End function
	.globl	ELL_create                      # -- Begin function ELL_create
	.type	ELL_create,@function
ELL_create:                             # @ELL_create
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 32(%rsp)                   # 8-byte Spill
	movq	%r8, 24(%rsp)                   # 8-byte Spill
	movq	%rcx, 8(%rsp)                   # 8-byte Spill
	movq	%rdx, %r14
	movl	%edi, %ebp
	movq	120(%rsp), %r12
	movq	112(%rsp), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	104(%rsp), %r15
	movq	96(%rsp), %r13
	imull	%edi, %esi
	movslq	%esi, %rbx
	shlq	$2, %rbx
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB11_2
# %bb.1:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$268, %esi                      # imm = 0x10C
	xorl	%eax, %eax
	callq	printf
.LBB11_2:
	movq	(%r13), %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB11_4
# %bb.3:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$270, %esi                      # imm = 0x10E
	xorl	%eax, %eax
	callq	printf
.LBB11_4:
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB11_6
# %bb.5:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$273, %esi                      # imm = 0x111
	xorl	%eax, %eax
	callq	printf
.LBB11_6:
	movq	(%r15), %rdi
	movq	8(%rsp), %rsi                   # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB11_8
# %bb.7:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$275, %esi                      # imm = 0x113
	xorl	%eax, %eax
	callq	printf
.LBB11_8:
	movslq	%ebp, %rbx
	shlq	$2, %rbx
	movq	16(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB11_10
# %bb.9:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$278, %esi                      # imm = 0x116
	xorl	%eax, %eax
	callq	printf
.LBB11_10:
	movq	(%r15), %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB11_12
# %bb.11:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$280, %esi                      # imm = 0x118
	xorl	%eax, %eax
	callq	printf
.LBB11_12:
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB11_14
# %bb.13:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$283, %esi                      # imm = 0x11B
	xorl	%eax, %eax
	callq	printf
.LBB11_14:
	movq	(%r12), %rdi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB11_15
# %bb.16:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$285, %esi                      # imm = 0x11D
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.LBB11_15:
	.cfi_def_cfa_offset 96
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	ELL_create, .Lfunc_end11-ELL_create
	.cfi_endproc
                                        # -- End function
	.globl	ELL_kernel                      # -- Begin function ELL_kernel
	.type	ELL_kernel,@function
ELL_kernel:                             # @ELL_kernel
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movl	%esi, %ebp
	movl	%edi, %r13d
	leal	63(%r13), %eax
	leal	126(%r13), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$6, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$64, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_2
# %bb.1:
	movl	%r13d, %edi
	movl	%ebp, %esi
	movq	%r12, %rdx
	movq	%r15, %rcx
	movq	%r14, %r8
	movq	%rbx, %r9
	callq	_Z31__device_stub__k_ell_mat_vec_mmiiPiPfS0_S0_
.LBB12_2:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB12_3
# %bb.4:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$297, %esi                      # imm = 0x129
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.LBB12_3:
	.cfi_def_cfa_offset 64
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	ELL_kernel, .Lfunc_end12-ELL_kernel
	.cfi_endproc
                                        # -- End function
	.globl	ELL_destroy                     # -- Begin function ELL_destroy
	.type	ELL_destroy,@function
ELL_destroy:                            # @ELL_destroy
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rsi, %r15
	callq	hipFree
	movq	%r15, %rdi
	callq	hipFree
	movq	%r14, %rdi
	callq	hipFree
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end13:
	.size	ELL_destroy, .Lfunc_end13-ELL_destroy
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB14_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB14_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16k_ell_mat_vec_mmiiPiPfS0_S0_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11band_matveciiPfS_S_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end14:
	.size	__hip_module_ctor, .Lfunc_end14-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB15_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB15_2:
	retq
.Lfunc_end15:
	.size	__hip_module_dtor, .Lfunc_end15-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_,@object # @_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_
	.section	.rodata,"a",@progbits
	.globl	_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_
	.p2align	3, 0x0
_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_:
	.quad	_Z31__device_stub__k_csr_mat_vec_mmiPiS_PfS0_S0_
	.size	_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_, 8

	.type	_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_,@object # @_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_
	.globl	_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_
	.p2align	3, 0x0
_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_:
	.quad	_Z32__device_stub__k_csr2_mat_vec_mmiPiS_PfS0_S0_
	.size	_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_, 8

	.type	_Z16k_ell_mat_vec_mmiiPiPfS0_S0_,@object # @_Z16k_ell_mat_vec_mmiiPiPfS0_S0_
	.globl	_Z16k_ell_mat_vec_mmiiPiPfS0_S0_
	.p2align	3, 0x0
_Z16k_ell_mat_vec_mmiiPiPfS0_S0_:
	.quad	_Z31__device_stub__k_ell_mat_vec_mmiiPiPfS0_S0_
	.size	_Z16k_ell_mat_vec_mmiiPiPfS0_S0_, 8

	.type	_Z11band_matveciiPfS_S_,@object # @_Z11band_matveciiPfS_S_
	.globl	_Z11band_matveciiPfS_S_
	.p2align	3, 0x0
_Z11band_matveciiPfS_S_:
	.quad	_Z26__device_stub__band_matveciiPfS_S_
	.size	_Z11band_matveciiPfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"(CUDA) %s"
	.size	.L.str, 10

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" (/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/PhuNH/hpc-aa/master/t4/kernels.hip:%d)\n"
	.size	.L.str.1, 104

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_"
	.size	.L__unnamed_1, 34

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_"
	.size	.L__unnamed_2, 35

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z16k_ell_mat_vec_mmiiPiPfS0_S0_"
	.size	.L__unnamed_3, 33

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z11band_matveciiPfS_S_"
	.size	.L__unnamed_4, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__k_csr_mat_vec_mmiPiS_PfS0_S0_
	.addrsig_sym _Z32__device_stub__k_csr2_mat_vec_mmiPiS_PfS0_S0_
	.addrsig_sym _Z31__device_stub__k_ell_mat_vec_mmiiPiPfS0_S0_
	.addrsig_sym _Z26__device_stub__band_matveciiPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16k_csr_mat_vec_mmiPiS_PfS0_S0_
	.addrsig_sym _Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_
	.addrsig_sym _Z16k_ell_mat_vec_mmiiPiPfS0_S0_
	.addrsig_sym _Z11band_matveciiPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_ ; -- Begin function _Z16k_csr_mat_vec_mmiPiS_PfS0_S0_
	.globl	_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_
	.p2align	8
	.type	_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_,@function
_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_:      ; @_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b32 s3, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[2:3], s[0:1], 0x28
	v_mov_b32_e32 v8, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v2, v3
	s_cbranch_execz .LBB0_5
; %bb.2:                                ; %.lr.ph.preheader
	v_ashrrev_i32_e32 v5, 31, v2
	v_mov_b32_e32 v4, v2
	v_mov_b32_e32 v8, 0
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, s8, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v7, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v9, v[6:7], off
	v_add_nc_u32_e32 v2, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e64 s0, v2, v3
	s_or_b32 s4, s0, s4
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, vcc_lo, s10, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo
	global_load_b32 v11, v[4:5], off
	global_load_b32 v9, v[9:10], off
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, v6, 4
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v8, v11, v9
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB0_3
; %bb.4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_5:                                ; %Flow47
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v8, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16k_csr_mat_vec_mmiPiS_PfS0_S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_, .Lfunc_end0-_Z16k_csr_mat_vec_mmiPiS_PfS0_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 364
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_ ; -- Begin function _Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_
	.globl	_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_
	.p2align	8
	.type	_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_,@function
_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_:     ; @_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_
; %bb.0:
	s_load_b32 s12, s[0:1], 0x3c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s12, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, s15, s2, v[0:1]
	s_load_b32 s2, s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v1, 27, v1
	v_add_nc_u32_e32 v1, v5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 5, v1
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB1_12
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[2:3], s[0:1], 0x28
	v_and_b32_e32 v9, 31, v5
	v_lshlrev_b32_e32 v10, 2, v0
	s_mov_b32 s1, exec_lo
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_mov_b32_e32 v11, 0
	ds_store_b32 v10, v11
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v12, v3, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e64 v12, v4
	s_cbranch_execz .LBB1_5
; %bb.2:                                ; %.lr.ph.preheader
	v_mad_u16 v0, s15, s12, v0
	v_ashrrev_i32_e32 v6, 31, v3
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v11, 0 :: v_dual_and_b32 v0, 31, v0
	v_add_co_u32 v5, vcc_lo, v3, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	v_lshlrev_b64 v[7:8], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v8, vcc_lo
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
.LBB1_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v13, v[7:8], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v14, 31, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[13:14], 2, v[13:14]
	v_add_co_u32 v13, vcc_lo, s10, v13
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v14, vcc_lo, s11, v14, vcc_lo
	global_load_b32 v0, v[5:6], off
	global_load_b32 v3, v[13:14], off
	v_add_nc_u32_e32 v12, 32, v12
	v_add_co_u32 v5, vcc_lo, 0x80, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	v_add_co_u32 v7, vcc_lo, 0x80, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v11, v0, v3
	v_cmp_ge_i32_e64 s0, v12, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s4, s0, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB1_3
; %bb.4:                                ; %..preheader_crit_edge
	s_or_b32 exec_lo, exec_lo, s4
	ds_store_b32 v10, v11
.LBB1_5:                                ; %Flow60
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s0, 16
.LBB1_6:                                ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v9
	s_cbranch_execz .LBB1_8
; %bb.7:                                ;   in Loop: Header=BB1_6 Depth=1
	v_lshl_add_u32 v0, s0, 2, v10
	ds_load_b32 v0, v0
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v11, v0, v11
	ds_store_b32 v10, v11
.LBB1_8:                                ;   in Loop: Header=BB1_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_lshr_b32 s1, s0, 1
	s_cmp_lt_u32 s0, 2
	s_cbranch_scc1 .LBB1_10
; %bb.9:                                ;   in Loop: Header=BB1_6 Depth=1
	s_mov_b32 s0, s1
	s_branch .LBB1_6
.LBB1_10:
	v_cmp_eq_u32_e32 vcc_lo, 0, v9
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_12
; %bb.11:
	v_add_co_u32 v0, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v2, vcc_lo
	global_store_b32 v[0:1], v11, off
.LBB1_12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_
		.amdhsa_group_segment_fixed_size 256
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_, .Lfunc_end1-_Z17k_csr2_mat_vec_mmiPiS_PfS0_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 524
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 256 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16k_ell_mat_vec_mmiiPiPfS0_S0_ ; -- Begin function _Z16k_ell_mat_vec_mmiiPiPfS0_S0_
	.globl	_Z16k_ell_mat_vec_mmiiPiPfS0_S0_
	.p2align	8
	.type	_Z16k_ell_mat_vec_mmiiPiPfS0_S0_,@function
_Z16k_ell_mat_vec_mmiiPiPfS0_S0_:       ; @_Z16k_ell_mat_vec_mmiiPiPfS0_S0_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[8:9], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB2_7
; %bb.1:                                ; %.preheader
	s_load_b256 s[0:7], s[0:1], 0x8
	v_mov_b32_e32 v0, 0
	s_cmp_lt_i32 s9, 1
	s_cbranch_scc1 .LBB2_6
; %bb.2:                                ; %.lr.ph.preheader
	v_mov_b32_e32 v2, v1
.LBB2_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	s_mov_b32 s10, exec_lo
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v4, vcc_lo
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f32_e32 0, v5
	s_cbranch_execz .LBB2_5
; %bb.4:                                ;   in Loop: Header=BB2_3 Depth=1
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v0, v5, v3
.LBB2_5:                                ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	v_add_nc_u32_e32 v2, s8, v2
	s_add_i32 s9, s9, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s9, 0
	s_cbranch_scc0 .LBB2_3
.LBB2_6:                                ; %Flow49
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB2_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16k_ell_mat_vec_mmiiPiPfS0_S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z16k_ell_mat_vec_mmiiPiPfS0_S0_, .Lfunc_end2-_Z16k_ell_mat_vec_mmiiPiPfS0_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 296
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11band_matveciiPfS_S_ ; -- Begin function _Z11band_matveciiPfS_S_
	.globl	_Z11band_matveciiPfS_S_
	.p2align	8
	.type	_Z11band_matveciiPfS_S_,@function
_Z11band_matveciiPfS_S_:                ; @_Z11band_matveciiPfS_S_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x0
	v_lshl_add_u32 v0, s15, 6, v0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v0
	s_cbranch_execz .LBB3_7
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x18
	v_mov_b32_e32 v5, 0
	s_cmp_lt_i32 s3, 0
	s_cbranch_scc1 .LBB3_6
; %bb.2:                                ; %.lr.ph
	s_lshl_b32 s8, s3, 1
	v_subrev_nc_u32_e32 v1, s3, v0
	v_mov_b32_e32 v5, 0
	v_mov_b32_e32 v3, v0
	s_max_i32 s3, s8, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s3, s3, 1
.LBB3_3:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	s_mov_b32 s8, exec_lo
	v_lshlrev_b64 v[6:7], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v4, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f32_e32 0, v4
	s_cbranch_execz .LBB3_5
; %bb.4:                                ;   in Loop: Header=BB3_3 Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_add_co_u32 v6, vcc_lo, s6, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	global_load_b32 v2, v[6:7], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v4, v2
.LBB3_5:                                ;   in Loop: Header=BB3_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	v_add_nc_u32_e32 v3, s2, v3
	v_add_nc_u32_e32 v1, 1, v1
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc0 .LBB3_3
.LBB3_6:                                ; %Flow47
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v5, off
.LBB3_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11band_matveciiPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z11band_matveciiPfS_S_, .Lfunc_end3-_Z11band_matveciiPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 292
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16k_csr_mat_vec_mmiPiS_PfS0_S0_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16k_csr_mat_vec_mmiPiS_PfS0_S0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
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        .size:           8
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
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...

	.end_amdgpu_metadata
