//#include <thrust/host_vector.h>
//#include <thrust/device_vector.h>
#include <iostream>
#include "diffraction.cuh"
#include <cuda.h>
#include <cuda_runtime.h>
#include <stdio.h>
#include <math_constants.h>

//#define THREADS_PER_BLOCK 200

/*
double cuda_func(double ang) {
	// H has storage for 4 integers
    thrust::host_vector<int> H(4);
	
    // H and D are automatically deleted when the function returns
    return ang;
}

int cuda_func1(int *raw_ptr, int N) {
	// wrap raw pointer with a device_ptr 
	thrust::device_ptr<int> dev_ptr(raw_ptr);
	// use device_ptr in thrust algorithms
	thrust::fill(dev_ptr, dev_ptr + N, (int) 9);
	// access device memory through device_ptr
	dev_ptr[0] = 1;
    return dev_ptr[2];
}
*/

__global__ void addVec(int *a, int *b, int *c) {
	c[blockIdx.x] = a[blockIdx.x] + b[blockIdx.x];
}

__global__ void addMat(float *a, float *b, float *c) {
	c[blockIdx.x] = a[blockIdx.x] + b[blockIdx.x];
}

__global__ void addCube(float *a, float *b, float *c) { // colume-wise access
	c[blockIdx.x] = a[blockIdx.x] + b[blockIdx.x];
}

__global__ void matAmp(float *F,float *Fim, int numPix){
	int index = ((blockIdx.y*blockDim.y + threadIdx.y)*gridDim.x + blockIdx.x )*blockDim.x + threadIdx.x;
	if (index<numPix){
		F[index]=F[index]*F[index]+Fim[index]*Fim[index];
	}
}

/*
__global__ void structureFactor(float *F, float *f, float *q, float *p, int numPix, int numAtoms){
	//int index = blockIdx.x;
	int index = ((blockIdx.y*blockDim.y + threadIdx.y)*gridDim.x + blockIdx.x )*blockDim.x + threadIdx.x;
	if (index < numPix) {
		float sf_real = 0;
		float sf_imag = 0;
		// p (Nx3)
		// q (py x px x 3)
		float map = 0;
		int f_ind = 0;
		for (int n = 0; n < numAtoms; n++) {
			map = 6.283185307F * (p[n]*q[index] + p[n+numAtoms]*q[index+numPix] + p[n+(2*numAtoms)]*q[index+(2*numPix)]);
			f_ind = index+(n*numPix);
			sf_real += f[f_ind] * cos(map);
			sf_imag += f[f_ind] * sin(map);
		}
		F[index] = sf_real * sf_real + sf_imag * sf_imag;
	}
}
*/
	
//structureFactor<<<dim3(0x6,1),dim3(0xB,1)>>>(d_F,d_f,d_q,d_p,d_i,numPix,chunkSize);
__global__ void structureFactor(float *Fre, float *Fim, float *f, float *q, \
                                float *p, int *i, int numPix, int chunkSize) {
	int index = ( (blockIdx.y * blockDim.y + threadIdx.y) * gridDim.x \
	            + blockIdx.x ) * blockDim.x + threadIdx.x;
	if (index<numPix){
		// F (py x px) [re & im]
		// f (py x px x numAtomTypes)
		// q (py x px x 3)
		// i (1 x chunkSize)
		// p (chunkSize x 3)
		float map = 0;
		int f_ind = 0;
		for (int n = 0; n < chunkSize; n++) {
			map = 6.283185307F * (p[n] * q[index] + p[n+chunkSize] \
			      * q[index+(numPix)] + p[n+(2*chunkSize)]*q[index+(2*numPix)]);
			f_ind = index + i[n]*numPix;
			Fre[index] += f[f_ind] * cos(map);
			Fim[index] += f[f_ind] * sin(map);
		}
	}
}

/*
__global__ void structureFactorChunk(float *sf_real, float *sf_imag, float *f, float *q, int *i, float *p, int numAtomTypes, int numPix, int chunkSize){
	int index = ((blockIdx.y*blockDim.y + threadIdx.y)*gridDim.x + blockIdx.x )*blockDim.x + threadIdx.x;
	if (index<numPix){
		// F (py x px)
		// f (py x px x numAtomTypes)
		// q (py x px x 3)
		// i (1 x chunkSize)
		// p (chunkSize x 3)
		float map = 0;
		int f_ind = 0;
		for (int n = 0; n < chunkSize; n++) {
			map = 6.283185307F * (p[n]*q[index] + p[n+chunkSize]*q[index+(numPix)] + p[n+(2*chunkSize)]*q[index+(2*numPix)]);
			f_ind = index + i[n]*numPix;
			sf_real[index] += f[f_ind] * cos(map);
			sf_imag[index] += f[f_ind] * sin(map);
		}
	}
}

__global__ void structureFactorChunkParallel(float *pad_real, float *pad_imag, float *f, float *q, int *i, float *p, int numAtomTypes, int numPix, int chunkSize){
	int pixelId = blockIdx.x + blockIdx.y * gridDim.x;
	int chunkId = threadIdx.x;
	int index = pixelId + chunkId * numPix;
	if (pixelId < numPix && chunkId < chunkSize) {
		// F (py x px)
		// f (py x px x numAtomTypes)
		// q (py x px x 3)
		// i (1 x chunkSize)
		// p (chunkSize x 3)
		float map = 6.283185307F * (p[chunkId]*q[pixelId] + p[chunkId+chunkSize]*q[pixelId+(numPix)] + p[chunkId+(2*chunkSize)]*q[pixelId+(2*numPix)]);
		int f_ind = pixelId + i[chunkId]*numPix;
		pad_real[index] = f[f_ind] * cos(map);
		pad_imag[index] = f[f_ind] * sin(map);
	}
}
*/

void random_ints(int* a, int N)
{
   int i;
   for (i = 0; i < N; ++i)
    a[i] = rand() % 100; // between 0 and 100
}

void cuda_funcVec(int *a, int *b, int *c, int N) {
  int *d_a, *d_b, *d_c;
  int size = N*sizeof(int);
  // Allocate space for device copies of a, b, c
  cudaMalloc((void **)&d_a, size);
  cudaMalloc((void **)&d_b, size);
  cudaMalloc((void **)&d_c, size);
  // Copy inputs to device
  cudaMemcpy(d_a, a, size, cudaMemcpyHostToDevice);
  cudaMemcpy(d_b, b, size, cudaMemcpyHostToDevice);
  // Launch add() kernel on GPU
  addVec<<<N,1>>>(d_a, d_b, d_c);
  // Copy result back to host
  cudaMemcpy(c, d_c, size, cudaMemcpyDeviceToHost);
  // Cleanup
  cudaFree(d_a); cudaFree(d_b); cudaFree(d_c);
}

void cuda_funcMat(float *a, float *b, float *c, int H, int W) {
  float *d_a, *d_b, *d_c;
  int size = H*W*sizeof(int);
  // Allocate space for device copies of a, b, c
  cudaMalloc((void **)&d_a, size);
  cudaMalloc((void **)&d_b, size);
  cudaMalloc((void **)&d_c, size);
  // Copy inputs to device
  cudaMemcpy(d_a, a, size, cudaMemcpyHostToDevice);
  cudaMemcpy(d_b, b, size, cudaMemcpyHostToDevice);
  // Launch add() kernel on GPU
  addMat<<<H*W,1>>>(d_a, d_b, d_c);
  // Copy result back to host
  cudaMemcpy(c, d_c, size, cudaMemcpyDeviceToHost);
  // Cleanup
  cudaFree(d_a); cudaFree(d_b); cudaFree(d_c);
}

void cuda_funcCube(float *a, float *b, float *c, int H, int W, int Z) {
  float *d_a, *d_b, *d_c;
  int size = H*W*Z*sizeof(int);
  // Allocate space for device copies of a, b, c
  cudaMalloc((void **)&d_a, size);
  cudaMalloc((void **)&d_b, size);
  cudaMalloc((void **)&d_c, size);
  // Copy inputs to device
  cudaMemcpy(d_a, a, size, cudaMemcpyHostToDevice);
  cudaMemcpy(d_b, b, size, cudaMemcpyHostToDevice);
  // Launch add() kernel on GPU
  addCube<<<H*W*Z,1>>>(d_a, d_b, d_c);
  // Copy result back to host
  cudaMemcpy(c, d_c, size, cudaMemcpyDeviceToHost);
  // Cleanup
  cudaFree(d_a); cudaFree(d_b); cudaFree(d_c);
}

/*
void cuda_structureFactor(float *F, float *f, float *q, float *p, int py, int px, int numAtoms) {
	float *d_f, *d_q, *d_p;
	float *d_F;//, *d_F_real, *d_F_imag;
	int size_f = py*px*numAtoms*sizeof(float);
	int size_q = py*px*3*sizeof(float);
	int size_p = numAtoms*3*sizeof(float);
	int size_F = py*px*sizeof(float);
	// Malloc
	//float *F_real = (float *)malloc(size_F);
	//float *F_imag = (float *)malloc(size_F);
	// Allocate space for device copies of a, b, c
  	cudaMalloc((void **)&d_f, size_f);
  	cudaMalloc((void **)&d_q, size_q);
  	cudaMalloc((void **)&d_p, size_p);
	cudaMalloc((void **)&d_F, size_F);
	//cudaMalloc((void **)&d_F_imag, size_F);
	// Copy inputs to device
  	cudaMemcpy(d_f, f, size_f, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_q, q, size_q, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_p, p, size_p, cudaMemcpyHostToDevice);
  	// Launch add() kernel on GPU
  	structureFactor<<<py*px,1>>>(d_F, d_f, d_q, d_p, py, px, numAtoms);
  	// Copy result back to host
  	cudaMemcpy(F, d_F, size_F, cudaMemcpyDeviceToHost);
  	//cudaMemcpy(F_imag, d_F_imag, size_F, cudaMemcpyDeviceToHost);
	// Cleanup
  	cudaFree(d_f); cudaFree(d_q); cudaFree(d_p), cudaFree(d_F); //cudaFree(d_F_imag);
	//free(F_real); free(F_imag);
}
*/

/*
void cuda_structureFactor(float *F, float *f, float *q, float *p, int numPix, int numAtoms) {
	float *d_F, *d_f, *d_q, *d_p;
	int size_F = numPix*sizeof(float);
	int size_f = numPix*numAtoms*sizeof(float);
	int size_q = numPix*3*sizeof(float);
	int size_p = numAtoms*3*sizeof(float);
	// Allocate space for device copies of a, b, c
	cudaMalloc((void **)&d_F, size_F);
  	cudaMalloc((void **)&d_f, size_f);
  	cudaMalloc((void **)&d_q, size_q);
  	cudaMalloc((void **)&d_p, size_p);
	// Copy inputs to device
  	cudaMemcpy(d_f, f, size_f, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_q, q, size_q, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_p, p, size_p, cudaMemcpyHostToDevice);
  	// Launch add() kernel on GPU
	dim3 threads_per_block(20,10); // Maximum number of threads per block
	dim3 number_of_blocks(20,10,1);
  	structureFactor<<<number_of_blocks,threads_per_block>>>(d_F, d_f, d_q, d_p, numPix, numAtoms);
	//cudaThreadSynchronize();
  	//structureFactor<<<py*px,1>>>(d_F, d_f, d_q, d_p, py, px, numAtoms);
  	// Copy result back to host
  	cudaMemcpy(F, d_F, size_F, cudaMemcpyDeviceToHost);
	// Cleanup
  	cudaFree(d_F); cudaFree(d_f); cudaFree(d_q); cudaFree(d_p);
}
*/

void cuda_structureFactor(float *F, float *f, float *q, float *p, int *i, \
                          int numPix, int numAtoms, int numAtomTypes, \
                          int deviceID){
	int device,numBlocks;
	size_t size_F,size_f,size_q,size_i,size_p;
	size_t globalMem,fixedMem;
	int chunk,chunkSize,chunkSizeMax;
	float *d_F,*d_f,*d_p,*d_q,*d_Fim;
	int *d_i;
	struct cudaDeviceProp prop; 
	dim3 dimG,dimB;
	size_F = sizeof(float) * numPix;
	size_f = sizeof(float) * numPix * numAtomTypes;
	size_q = sizeof(float) * numPix * 3;
	fixedMem = size_F*2 + size_f + size_q;
	dimB.x = CUDA_BLOCK_SIZE;
	dimG.x = numBlocks = (numPix+dimB.x-1)/dimB.x;
	if (dimG.x > CUDA_GROUP_LIMIT){
		dimG.y = (numBlocks + CUDA_GROUP_LIMIT -1) / CUDA_GROUP_LIMIT;
		dimG.x = (numBlocks + dimG.y -1) / dimG.y;
	}
	//cudaGetDevice(&device);
	device = deviceID;
	cudaSetDevice(device);
	cudaGetDeviceProperties(&prop,device);
	
	globalMem = prop.totalGlobalMem  - CUDA_RESERVE_MEM;
	if (globalMem <= fixedMem){
		printf("Device memory[%lu] not enough to hold all data[>%lu]!\n", \
		       globalMem,fixedMem);
		exit(EXIT_FAILURE);
	}	
	chunkSizeMax = (globalMem - fixedMem) / (3 * sizeof(float) + sizeof(int));
	if (chunkSizeMax>numAtoms)
		chunkSizeMax=numAtoms;

	size_p = sizeof(float) * chunkSizeMax * 3;
	size_i = sizeof(int)   * chunkSizeMax;

	cudaMalloc((void **)&d_F, size_F);
	cudaMalloc((void **)&d_Fim, size_F);
  	cudaMalloc((void **)&d_f, size_f);
  	cudaMalloc((void **)&d_q, size_q);
  	cudaMalloc((void **)&d_p, size_p);
  	cudaMalloc((void **)&d_i, size_i);
  	cudaMemcpy(d_f, f, size_f, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_q, q, size_q, cudaMemcpyHostToDevice);
  	cudaMemset(d_F,0,size_F);
  	cudaMemset(d_Fim,0,size_F);
 	
  	chunkSize=chunkSizeMax;
  	for(chunk=0;chunk<numAtoms;chunk+=chunkSizeMax){
		
		if (chunkSize+chunk>=numAtoms)
			chunkSize=numAtoms-chunk;
		cudaMemcpy(d_i, i + chunk, sizeof(int)*	chunkSize, \
		           cudaMemcpyHostToDevice);
		cudaMemcpy(d_p, p + chunk, sizeof(float)*chunkSize, \
		           cudaMemcpyHostToDevice);
		cudaMemcpy(d_p + chunkSize, p + chunk + numAtoms, \
		           sizeof(float)*chunkSize, cudaMemcpyHostToDevice);
		cudaMemcpy(d_p + 2*chunkSize, p + chunk + 2*numAtoms, \
		           sizeof(float)*chunkSize, cudaMemcpyHostToDevice);
		structureFactor<<<dimG,dimB>>>(d_F, d_Fim, d_f, d_q, d_p, d_i, numPix, \
		                               chunkSize);
	}
  	matAmp<<<dimG,dimB>>>(d_F,d_Fim,numPix);
  	cudaMemcpy(F, d_F, size_F, cudaMemcpyDeviceToHost);
  	cudaFree(d_F);
  	cudaFree(d_Fim);
  	cudaFree(d_f);
  	cudaFree(d_q);
  	cudaFree(d_p);
  	cudaFree(d_i);
}

int cuda_getDeviceCount(){
	int tmp;
	if (cudaSuccess != cudaGetDeviceCount(&tmp))
		return 0;
	return tmp;
}

/*	
void cuda_structureFactorChunk(float *sf_real, float *sf_imag, float *f, float *q, int *i, float *p, int numAtomTypes, int numPix, int chunkSize) {
	float *d_sf_real, *d_sf_imag, *d_f, *d_q, *d_p; // Pointer to device memory
	int *d_i;
	int size_sf = numPix*sizeof(float);
	int size_f = numPix*numAtomTypes*sizeof(float);
	int size_q = numPix*3*sizeof(float);
	int size_i = chunkSize*sizeof(int);
	int size_p = chunkSize*3*sizeof(float);
	// Allocate space for device copies
	cudaMalloc((void **)&d_sf_real, size_sf);
	cudaMalloc((void **)&d_sf_imag, size_sf);
  	cudaMalloc((void **)&d_f, size_f);
  	cudaMalloc((void **)&d_q, size_q);
	cudaMalloc((void **)&d_i, size_i);
  	cudaMalloc((void **)&d_p, size_p);
	// Copy inputs to device
  	cudaMemcpy(d_sf_real, sf_real, size_sf, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_sf_imag, sf_imag, size_sf, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_f, f, size_f, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_q, q, size_q, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_i, i, size_i, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_p, p, size_p, cudaMemcpyHostToDevice);
  	// Launch kernel on GPU
	dim3 threads_per_block(512); // Maximum number of threads per block
	dim3 number_of_blocks(2048,2048,1);
  	//structureFactorChunk<<<number_of_blocks,threads_per_block>>>(d_sf_real, d_sf_imag, d_f, d_q, d_i, d_p, numAtomTypes, numPix, chunkSize);
	structureFactorChunkParallel<<<number_of_blocks,threads_per_block>>>(d_sf_real, d_sf_imag, d_f, d_q, d_i, d_p, numAtomTypes, numPix, chunkSize);
	//cudaThreadSynchronize();
  	// Copy result back to host
  	cudaMemcpy(sf_real, d_sf_real, size_sf, cudaMemcpyDeviceToHost);
  	cudaMemcpy(sf_imag, d_sf_imag, size_sf, cudaMemcpyDeviceToHost);
	// Cleanup
  	cudaFree(d_sf_real); cudaFree(d_sf_imag); cudaFree(d_f); cudaFree(d_q); cudaFree(d_i); cudaFree(d_p);
}

void cuda_structureFactorChunkParallel(float *pad_real, float *pad_imag, float *f, float *q, int *i, float *p, int numAtomTypes, int numPix, int chunkSize) {
	float *d_pad_real, *d_pad_imag, *d_f, *d_q, *d_p; // Pointer to device memory
	int *d_i;
	int size_pad = numPix*chunkSize*sizeof(float);
	int size_f = numPix*numAtomTypes*sizeof(float);
	int size_q = numPix*3*sizeof(float);
	int size_i = chunkSize*sizeof(int);
	int size_p = chunkSize*3*sizeof(float);
	// Allocate space for device copies
  	cudaMalloc((void **)&d_pad_real, size_pad);
  	cudaMalloc((void **)&d_pad_imag, size_pad);
  	cudaMalloc((void **)&d_f, size_f);
  	cudaMalloc((void **)&d_q, size_q);
	cudaMalloc((void **)&d_i, size_i);
  	cudaMalloc((void **)&d_p, size_p);
	// Copy inputs to device
  	cudaMemcpy(d_f, f, size_f, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_q, q, size_q, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_i, i, size_i, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_p, p, size_p, cudaMemcpyHostToDevice);
  	// Launch kernel on GPU
	dim3 threads_per_block(chunkSize); // Maximum number of threads per block
	dim3 number_of_blocks(numPix);
	structureFactorChunkParallel<<<number_of_blocks,threads_per_block>>>(d_pad_real, d_pad_imag, d_f, d_q, d_i, d_p, numAtomTypes, numPix, chunkSize);
  	// Copy result back to host
  	cudaMemcpy(pad_real, d_pad_real, size_pad, cudaMemcpyDeviceToHost);
  	cudaMemcpy(pad_imag, d_pad_imag, size_pad, cudaMemcpyDeviceToHost);
	// Cleanup
  	cudaFree(d_pad_real); cudaFree(d_pad_imag); cudaFree(d_f); cudaFree(d_q); cudaFree(d_i); cudaFree(d_p);
}
*/


	.file	"tmpxft_002ef277_00000000-6_diffraction.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3643:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3643:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z11random_intsPii
	.type	_Z11random_intsPii, @function
_Z11random_intsPii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$100, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L3:
	cmpl	%ebx, %ebp
	jle	.L7
	call	rand@PLT
	cltd
	idivl	%r13d
	movl	%edx, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L3
.L7:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z11random_intsPii, .-_Z11random_intsPii
	.globl	cuda_getDeviceCount
	.type	cuda_getDeviceCount, @function
cuda_getDeviceCount:
.LFB3640:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	4(%rsp), %rdi
	call	cudaGetDeviceCount@PLT
	movl	%eax, %edx
	xorl	%eax, %eax
	testl	%edx, %edx
	jne	.L8
	movl	4(%rsp), %eax
.L8:
	movq	8(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3640:
	.size	cuda_getDeviceCount, .-cuda_getDeviceCount
	.globl	_Z29__device_stub__Z6addVecPiS_S_PiS_S_
	.type	_Z29__device_stub__Z6addVecPiS_S_PiS_S_, @function
_Z29__device_stub__Z6addVecPiS_S_PiS_S_:
.LFB3665:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6addVecPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L14:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3665:
	.size	_Z29__device_stub__Z6addVecPiS_S_PiS_S_, .-_Z29__device_stub__Z6addVecPiS_S_PiS_S_
	.globl	_Z6addVecPiS_S_
	.type	_Z6addVecPiS_S_, @function
_Z6addVecPiS_S_:
.LFB3666:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z6addVecPiS_S_PiS_S_
	.cfi_endproc
.LFE3666:
	.size	_Z6addVecPiS_S_, .-_Z6addVecPiS_S_
	.globl	cuda_funcVec
	.type	cuda_funcVec, @function
cuda_funcVec:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	leal	0(,%rcx,4), %ebx
	movslq	%ebx, %rbx
	movq	%rbx, %rsi
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebp, 32(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rdx
	movl	$1, %ecx
	movq	%rdx, 36(%rsp)
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z29__device_stub__Z6addVecPiS_S_PiS_S_
.L20:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	cuda_funcVec, .-cuda_funcVec
	.globl	_Z29__device_stub__Z6addMatPfS_S_PfS_S_
	.type	_Z29__device_stub__Z6addMatPfS_S_PfS_S_, @function
_Z29__device_stub__Z6addMatPfS_S_PfS_S_:
.LFB3667:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6addMatPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L23:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3667:
	.size	_Z29__device_stub__Z6addMatPfS_S_PfS_S_, .-_Z29__device_stub__Z6addMatPfS_S_PfS_S_
	.globl	_Z6addMatPfS_S_
	.type	_Z6addMatPfS_S_, @function
_Z6addMatPfS_S_:
.LFB3668:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z6addMatPfS_S_PfS_S_
	.cfi_endproc
.LFE3668:
	.size	_Z6addMatPfS_S_, .-_Z6addMatPfS_S_
	.globl	cuda_funcMat
	.type	cuda_funcMat, @function
cuda_funcMat:
.LFB3637:
	.cfi_startproc
	endbr64
	imull	%r8d, %ecx
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	leal	0(,%rcx,4), %ebx
	movslq	%ebx, %rbx
	movq	%rbx, %rsi
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebp, 32(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rdx
	movl	$1, %ecx
	movq	%rdx, 36(%rsp)
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z29__device_stub__Z6addMatPfS_S_PfS_S_
.L29:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	cuda_funcMat, .-cuda_funcMat
	.globl	_Z30__device_stub__Z7addCubePfS_S_PfS_S_
	.type	_Z30__device_stub__Z7addCubePfS_S_PfS_S_, @function
_Z30__device_stub__Z7addCubePfS_S_PfS_S_:
.LFB3669:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z7addCubePfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L32:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3669:
	.size	_Z30__device_stub__Z7addCubePfS_S_PfS_S_, .-_Z30__device_stub__Z7addCubePfS_S_PfS_S_
	.globl	_Z7addCubePfS_S_
	.type	_Z7addCubePfS_S_, @function
_Z7addCubePfS_S_:
.LFB3670:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z7addCubePfS_S_PfS_S_
	.cfi_endproc
.LFE3670:
	.size	_Z7addCubePfS_S_, .-_Z7addCubePfS_S_
	.globl	cuda_funcCube
	.type	cuda_funcCube, @function
cuda_funcCube:
.LFB3638:
	.cfi_startproc
	endbr64
	imull	%r8d, %ecx
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdx, %r12
	imull	%r9d, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	leal	0(,%rcx,4), %ebx
	movl	%ecx, %ebp
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movslq	%ebx, %rbx
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebp, 32(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rdx
	movl	$1, %ecx
	movq	%rdx, 36(%rsp)
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z30__device_stub__Z7addCubePfS_S_PfS_S_
.L38:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	cuda_funcCube, .-cuda_funcCube
	.globl	_Z28__device_stub__Z6matAmpPfS_iPfS_i
	.type	_Z28__device_stub__Z6matAmpPfS_iPfS_i, @function
_Z28__device_stub__Z6matAmpPfS_iPfS_i:
.LFB3671:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6matAmpPfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L41:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L43
	call	__stack_chk_fail@PLT
.L43:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3671:
	.size	_Z28__device_stub__Z6matAmpPfS_iPfS_i, .-_Z28__device_stub__Z6matAmpPfS_iPfS_i
	.globl	_Z6matAmpPfS_i
	.type	_Z6matAmpPfS_i, @function
_Z6matAmpPfS_i:
.LFB3672:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z6matAmpPfS_iPfS_i
	.cfi_endproc
.LFE3672:
	.size	_Z6matAmpPfS_i, .-_Z6matAmpPfS_i
	.globl	_Z47__device_stub__Z15structureFactorPfS_S_S_S_PiiiPfS_S_S_S_Piii
	.type	_Z47__device_stub__Z15structureFactorPfS_S_S_S_PiiiPfS_S_S_S_Piii, @function
_Z47__device_stub__Z15structureFactorPfS_S_S_S_PiiiPfS_S_S_S_Piii:
.LFB3673:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z15structureFactorPfS_S_S_S_Piii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L46:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L48
	call	__stack_chk_fail@PLT
.L48:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3673:
	.size	_Z47__device_stub__Z15structureFactorPfS_S_S_S_PiiiPfS_S_S_S_Piii, .-_Z47__device_stub__Z15structureFactorPfS_S_S_S_PiiiPfS_S_S_S_Piii
	.globl	_Z15structureFactorPfS_S_S_S_Piii
	.type	_Z15structureFactorPfS_S_S_S_Piii, @function
_Z15structureFactorPfS_S_S_S_Piii:
.LFB3674:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z15structureFactorPfS_S_S_S_PiiiPfS_S_S_S_Piii
	.cfi_endproc
.LFE3674:
	.size	_Z15structureFactorPfS_S_S_S_Piii, .-_Z15structureFactorPfS_S_S_S_Piii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Device memory[%lu] not enough to hold all data[>%lu]!\n"
	.text
	.globl	cuda_structureFactor
	.type	cuda_structureFactor, @function
cuda_structureFactor:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	$1, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1208, %rsp
	.cfi_def_cfa_offset 1264
	movq	%rdi, 72(%rsp)
	movslq	1272(%rsp), %r14
	movq	%rsi, 40(%rsp)
	movl	1264(%rsp), %r15d
	movq	%rdx, 48(%rsp)
	movq	%r8, 56(%rsp)
	movl	%r9d, 20(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 1192(%rsp)
	xorl	%eax, %eax
	movabsq	$4294967297, %rax
	movl	$1, 144(%rsp)
	movq	%rax, 152(%rsp)
	movslq	%r9d, %rax
	imulq	%rax, %r14
	leaq	0(,%rax,4), %rbx
	movq	%rbx, 8(%rsp)
	leaq	0(,%r14,4), %rbx
	movq	%rbx, (%rsp)
	imulq	$12, %rax, %rbx
	imulq	$20, %rax, %rax
	movq	%rbx, 24(%rsp)
	movq	(%rsp), %rbx
	addq	%rax, %rbx
	movl	%r9d, %eax
	addl	$511, %eax
	movl	%eax, %r13d
	shrl	$9, %r13d
	cmpl	$33554431, %eax
	jbe	.L52
	leal	65534(%r13), %eax
	movl	$65535, %ecx
	cltd
	idivl	%ecx
	xorl	%edx, %edx
	movl	%eax, %ebp
	leal	-1(%r13,%rax), %eax
	divl	%ebp
	movl	%eax, %r13d
.L52:
	movl	1280(%rsp), %edi
	call	cudaSetDevice@PLT
	movl	1280(%rsp), %esi
	leaq	160(%rsp), %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movq	448(%rsp), %rax
	leaq	-134217728(%rax), %rdx
	cmpq	%rdx, %rbx
	jb	.L53
	movl	$2, %edi
	movq	%rbx, %rcx
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L53:
	subq	%rbx, %rdx
	movq	8(%rsp), %rsi
	leaq	88(%rsp), %rdi
	shrq	$4, %rdx
	cmpl	%edx, %r15d
	movl	%edx, %ebx
	cmovle	%r15d, %ebx
	movslq	%ebx, %r14
	leaq	0(,%r14,4), %rax
	movq	%rax, 32(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	120(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	96(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rsi
	leaq	112(%rsp), %rdi
	call	cudaMalloc@PLT
	imulq	$12, %r14, %rsi
	leaq	104(%rsp), %rdi
	movl	%ebx, %r14d
	call	cudaMalloc@PLT
	movq	32(%rsp), %rsi
	leaq	128(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	$1, %ecx
	movq	96(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	$1, %ecx
	movq	112(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	8(%rsp), %rdx
	movq	120(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	56(%rsp), %rax
	xorl	%ecx, %ecx
	movl	%r15d, 40(%rsp)
	movl	%ecx, 24(%rsp)
	movq	%rax, 48(%rsp)
	movslq	%r15d, %rax
	salq	$2, %rax
	movq	%rax, 56(%rsp)
	leal	(%r15,%r15), %eax
	cltq
	salq	$2, %rax
	movq	%rax, 64(%rsp)
.L54:
	cmpl	%r15d, 24(%rsp)
	jge	.L63
	movl	24(%rsp), %eax
	movq	48(%rsp), %rsi
	movl	$1, %ecx
	movq	128(%rsp), %rdi
	addl	%r14d, %eax
	cmpl	%r15d, %eax
	cmovge	40(%rsp), %r14d
	movslq	%r14d, %rax
	salq	$2, %rax
	movq	%rax, %rdx
	movq	%rax, (%rsp)
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	104(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rax
	movq	(%rsp), %rdx
	movl	$1, %ecx
	movq	(%rsp), %rdi
	addq	104(%rsp), %rdi
	leaq	(%r12,%rax), %rsi
	call	cudaMemcpy@PLT
	movq	64(%rsp), %rax
	movq	104(%rsp), %rdx
	movl	$1, %ecx
	leaq	(%r12,%rax), %rsi
	leal	(%r14,%r14), %eax
	cltq
	leaq	(%rdx,%rax,4), %rdi
	movq	(%rsp), %rdx
	call	cudaMemcpy@PLT
	movl	%r13d, 136(%rsp)
	xorl	%r9d, %r9d
	movl	156(%rsp), %ecx
	movl	%ebp, 140(%rsp)
	movl	144(%rsp), %esi
	xorl	%r8d, %r8d
	movl	$512, 148(%rsp)
	movq	136(%rsp), %rdi
	movq	148(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	pushq	%r14
	.cfi_def_cfa_offset 1272
	movl	28(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 1280
	movq	144(%rsp), %r9
	movq	120(%rsp), %r8
	movq	128(%rsp), %rcx
	movq	112(%rsp), %rdx
	movq	136(%rsp), %rsi
	movq	104(%rsp), %rdi
	call	_Z47__device_stub__Z15structureFactorPfS_S_S_S_PiiiPfS_S_S_S_Piii
	popq	%rax
	.cfi_def_cfa_offset 1272
	popq	%rdx
	.cfi_def_cfa_offset 1264
.L56:
	movq	32(%rsp), %rcx
	addl	%ebx, 24(%rsp)
	subl	%ebx, 40(%rsp)
	addq	%rcx, 48(%rsp)
	addq	%rcx, %r12
	jmp	.L54
.L63:
	movl	%r13d, 136(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	156(%rsp), %ecx
	movl	%ebp, 140(%rsp)
	movl	144(%rsp), %esi
	movl	$512, 148(%rsp)
	movq	136(%rsp), %rdi
	movq	148(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L58
	movl	20(%rsp), %edx
	movq	120(%rsp), %rsi
	movq	88(%rsp), %rdi
	call	_Z28__device_stub__Z6matAmpPfS_iPfS_i
.L58:
	movq	8(%rsp), %rdx
	movq	88(%rsp), %rsi
	movl	$2, %ecx
	movq	72(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movq	1192(%rsp), %rax
	subq	%fs:40, %rax
	je	.L59
	call	__stack_chk_fail@PLT
.L59:
	addq	$1208, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3639:
	.size	cuda_structureFactor, .-cuda_structureFactor
	.section	.rodata.str1.1
.LC1:
	.string	"_Z15structureFactorPfS_S_S_S_Piii"
.LC2:
	.string	"_Z6matAmpPfS_i"
.LC3:
	.string	"_Z7addCubePfS_S_"
.LC4:
	.string	"_Z6addMatPfS_S_"
.LC5:
	.string	"_Z6addVecPiS_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3676:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15structureFactorPfS_S_S_S_Piii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6matAmpPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7addCubePfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6addMatPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6addVecPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3676:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//#include <thrust/host_vector.h>
//#include <thrust/device_vector.h>
#include <iostream>
#include "diffraction.cuh"
#include <hip/hip_runtime.h>

#include <stdio.h>
#include <hip/hip_math_constants.h>

//#define THREADS_PER_BLOCK 200

/*
double cuda_func(double ang) {
	// H has storage for 4 integers
    thrust::host_vector<int> H(4);
	
    // H and D are automatically deleted when the function returns
    return ang;
}

int cuda_func1(int *raw_ptr, int N) {
	// wrap raw pointer with a device_ptr 
	thrust::device_ptr<int> dev_ptr(raw_ptr);
	// use device_ptr in thrust algorithms
	thrust::fill(dev_ptr, dev_ptr + N, (int) 9);
	// access device memory through device_ptr
	dev_ptr[0] = 1;
    return dev_ptr[2];
}
*/

__global__ void addVec(int *a, int *b, int *c) {
	c[blockIdx.x] = a[blockIdx.x] + b[blockIdx.x];
}

__global__ void addMat(float *a, float *b, float *c) {
	c[blockIdx.x] = a[blockIdx.x] + b[blockIdx.x];
}

__global__ void addCube(float *a, float *b, float *c) { // colume-wise access
	c[blockIdx.x] = a[blockIdx.x] + b[blockIdx.x];
}

__global__ void matAmp(float *F,float *Fim, int numPix){
	int index = ((blockIdx.y*blockDim.y + threadIdx.y)*gridDim.x + blockIdx.x )*blockDim.x + threadIdx.x;
	if (index<numPix){
		F[index]=F[index]*F[index]+Fim[index]*Fim[index];
	}
}

/*
__global__ void structureFactor(float *F, float *f, float *q, float *p, int numPix, int numAtoms){
	//int index = blockIdx.x;
	int index = ((blockIdx.y*blockDim.y + threadIdx.y)*gridDim.x + blockIdx.x )*blockDim.x + threadIdx.x;
	if (index < numPix) {
		float sf_real = 0;
		float sf_imag = 0;
		// p (Nx3)
		// q (py x px x 3)
		float map = 0;
		int f_ind = 0;
		for (int n = 0; n < numAtoms; n++) {
			map = 6.283185307F * (p[n]*q[index] + p[n+numAtoms]*q[index+numPix] + p[n+(2*numAtoms)]*q[index+(2*numPix)]);
			f_ind = index+(n*numPix);
			sf_real += f[f_ind] * cos(map);
			sf_imag += f[f_ind] * sin(map);
		}
		F[index] = sf_real * sf_real + sf_imag * sf_imag;
	}
}
*/
	
//structureFactor<<<dim3(0x6,1),dim3(0xB,1)>>>(d_F,d_f,d_q,d_p,d_i,numPix,chunkSize);
__global__ void structureFactor(float *Fre, float *Fim, float *f, float *q, \
                                float *p, int *i, int numPix, int chunkSize) {
	int index = ( (blockIdx.y * blockDim.y + threadIdx.y) * gridDim.x \
	            + blockIdx.x ) * blockDim.x + threadIdx.x;
	if (index<numPix){
		// F (py x px) [re & im]
		// f (py x px x numAtomTypes)
		// q (py x px x 3)
		// i (1 x chunkSize)
		// p (chunkSize x 3)
		float map = 0;
		int f_ind = 0;
		for (int n = 0; n < chunkSize; n++) {
			map = 6.283185307F * (p[n] * q[index] + p[n+chunkSize] \
			      * q[index+(numPix)] + p[n+(2*chunkSize)]*q[index+(2*numPix)]);
			f_ind = index + i[n]*numPix;
			Fre[index] += f[f_ind] * cos(map);
			Fim[index] += f[f_ind] * sin(map);
		}
	}
}

/*
__global__ void structureFactorChunk(float *sf_real, float *sf_imag, float *f, float *q, int *i, float *p, int numAtomTypes, int numPix, int chunkSize){
	int index = ((blockIdx.y*blockDim.y + threadIdx.y)*gridDim.x + blockIdx.x )*blockDim.x + threadIdx.x;
	if (index<numPix){
		// F (py x px)
		// f (py x px x numAtomTypes)
		// q (py x px x 3)
		// i (1 x chunkSize)
		// p (chunkSize x 3)
		float map = 0;
		int f_ind = 0;
		for (int n = 0; n < chunkSize; n++) {
			map = 6.283185307F * (p[n]*q[index] + p[n+chunkSize]*q[index+(numPix)] + p[n+(2*chunkSize)]*q[index+(2*numPix)]);
			f_ind = index + i[n]*numPix;
			sf_real[index] += f[f_ind] * cos(map);
			sf_imag[index] += f[f_ind] * sin(map);
		}
	}
}

__global__ void structureFactorChunkParallel(float *pad_real, float *pad_imag, float *f, float *q, int *i, float *p, int numAtomTypes, int numPix, int chunkSize){
	int pixelId = blockIdx.x + blockIdx.y * gridDim.x;
	int chunkId = threadIdx.x;
	int index = pixelId + chunkId * numPix;
	if (pixelId < numPix && chunkId < chunkSize) {
		// F (py x px)
		// f (py x px x numAtomTypes)
		// q (py x px x 3)
		// i (1 x chunkSize)
		// p (chunkSize x 3)
		float map = 6.283185307F * (p[chunkId]*q[pixelId] + p[chunkId+chunkSize]*q[pixelId+(numPix)] + p[chunkId+(2*chunkSize)]*q[pixelId+(2*numPix)]);
		int f_ind = pixelId + i[chunkId]*numPix;
		pad_real[index] = f[f_ind] * cos(map);
		pad_imag[index] = f[f_ind] * sin(map);
	}
}
*/

void random_ints(int* a, int N)
{
   int i;
   for (i = 0; i < N; ++i)
    a[i] = rand() % 100; // between 0 and 100
}

void cuda_funcVec(int *a, int *b, int *c, int N) {
  int *d_a, *d_b, *d_c;
  int size = N*sizeof(int);
  // Allocate space for device copies of a, b, c
  hipMalloc((void **)&d_a, size);
  hipMalloc((void **)&d_b, size);
  hipMalloc((void **)&d_c, size);
  // Copy inputs to device
  hipMemcpy(d_a, a, size, hipMemcpyHostToDevice);
  hipMemcpy(d_b, b, size, hipMemcpyHostToDevice);
  // Launch add() kernel on GPU
  addVec<<<N,1>>>(d_a, d_b, d_c);
  // Copy result back to host
  hipMemcpy(c, d_c, size, hipMemcpyDeviceToHost);
  // Cleanup
  hipFree(d_a); hipFree(d_b); hipFree(d_c);
}

void cuda_funcMat(float *a, float *b, float *c, int H, int W) {
  float *d_a, *d_b, *d_c;
  int size = H*W*sizeof(int);
  // Allocate space for device copies of a, b, c
  hipMalloc((void **)&d_a, size);
  hipMalloc((void **)&d_b, size);
  hipMalloc((void **)&d_c, size);
  // Copy inputs to device
  hipMemcpy(d_a, a, size, hipMemcpyHostToDevice);
  hipMemcpy(d_b, b, size, hipMemcpyHostToDevice);
  // Launch add() kernel on GPU
  addMat<<<H*W,1>>>(d_a, d_b, d_c);
  // Copy result back to host
  hipMemcpy(c, d_c, size, hipMemcpyDeviceToHost);
  // Cleanup
  hipFree(d_a); hipFree(d_b); hipFree(d_c);
}

void cuda_funcCube(float *a, float *b, float *c, int H, int W, int Z) {
  float *d_a, *d_b, *d_c;
  int size = H*W*Z*sizeof(int);
  // Allocate space for device copies of a, b, c
  hipMalloc((void **)&d_a, size);
  hipMalloc((void **)&d_b, size);
  hipMalloc((void **)&d_c, size);
  // Copy inputs to device
  hipMemcpy(d_a, a, size, hipMemcpyHostToDevice);
  hipMemcpy(d_b, b, size, hipMemcpyHostToDevice);
  // Launch add() kernel on GPU
  addCube<<<H*W*Z,1>>>(d_a, d_b, d_c);
  // Copy result back to host
  hipMemcpy(c, d_c, size, hipMemcpyDeviceToHost);
  // Cleanup
  hipFree(d_a); hipFree(d_b); hipFree(d_c);
}

/*
void cuda_structureFactor(float *F, float *f, float *q, float *p, int py, int px, int numAtoms) {
	float *d_f, *d_q, *d_p;
	float *d_F;//, *d_F_real, *d_F_imag;
	int size_f = py*px*numAtoms*sizeof(float);
	int size_q = py*px*3*sizeof(float);
	int size_p = numAtoms*3*sizeof(float);
	int size_F = py*px*sizeof(float);
	// Malloc
	//float *F_real = (float *)malloc(size_F);
	//float *F_imag = (float *)malloc(size_F);
	// Allocate space for device copies of a, b, c
  	cudaMalloc((void **)&d_f, size_f);
  	cudaMalloc((void **)&d_q, size_q);
  	cudaMalloc((void **)&d_p, size_p);
	cudaMalloc((void **)&d_F, size_F);
	//cudaMalloc((void **)&d_F_imag, size_F);
	// Copy inputs to device
  	cudaMemcpy(d_f, f, size_f, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_q, q, size_q, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_p, p, size_p, cudaMemcpyHostToDevice);
  	// Launch add() kernel on GPU
  	structureFactor<<<py*px,1>>>(d_F, d_f, d_q, d_p, py, px, numAtoms);
  	// Copy result back to host
  	cudaMemcpy(F, d_F, size_F, cudaMemcpyDeviceToHost);
  	//cudaMemcpy(F_imag, d_F_imag, size_F, cudaMemcpyDeviceToHost);
	// Cleanup
  	cudaFree(d_f); cudaFree(d_q); cudaFree(d_p), cudaFree(d_F); //cudaFree(d_F_imag);
	//free(F_real); free(F_imag);
}
*/

/*
void cuda_structureFactor(float *F, float *f, float *q, float *p, int numPix, int numAtoms) {
	float *d_F, *d_f, *d_q, *d_p;
	int size_F = numPix*sizeof(float);
	int size_f = numPix*numAtoms*sizeof(float);
	int size_q = numPix*3*sizeof(float);
	int size_p = numAtoms*3*sizeof(float);
	// Allocate space for device copies of a, b, c
	cudaMalloc((void **)&d_F, size_F);
  	cudaMalloc((void **)&d_f, size_f);
  	cudaMalloc((void **)&d_q, size_q);
  	cudaMalloc((void **)&d_p, size_p);
	// Copy inputs to device
  	cudaMemcpy(d_f, f, size_f, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_q, q, size_q, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_p, p, size_p, cudaMemcpyHostToDevice);
  	// Launch add() kernel on GPU
	dim3 threads_per_block(20,10); // Maximum number of threads per block
	dim3 number_of_blocks(20,10,1);
  	structureFactor<<<number_of_blocks,threads_per_block>>>(d_F, d_f, d_q, d_p, numPix, numAtoms);
	//cudaThreadSynchronize();
  	//structureFactor<<<py*px,1>>>(d_F, d_f, d_q, d_p, py, px, numAtoms);
  	// Copy result back to host
  	cudaMemcpy(F, d_F, size_F, cudaMemcpyDeviceToHost);
	// Cleanup
  	cudaFree(d_F); cudaFree(d_f); cudaFree(d_q); cudaFree(d_p);
}
*/

void cuda_structureFactor(float *F, float *f, float *q, float *p, int *i, \
                          int numPix, int numAtoms, int numAtomTypes, \
                          int deviceID){
	int device,numBlocks;
	size_t size_F,size_f,size_q,size_i,size_p;
	size_t globalMem,fixedMem;
	int chunk,chunkSize,chunkSizeMax;
	float *d_F,*d_f,*d_p,*d_q,*d_Fim;
	int *d_i;
	struct hipDeviceProp_t prop; 
	dim3 dimG,dimB;
	size_F = sizeof(float) * numPix;
	size_f = sizeof(float) * numPix * numAtomTypes;
	size_q = sizeof(float) * numPix * 3;
	fixedMem = size_F*2 + size_f + size_q;
	dimB.x = CUDA_BLOCK_SIZE;
	dimG.x = numBlocks = (numPix+dimB.x-1)/dimB.x;
	if (dimG.x > CUDA_GROUP_LIMIT){
		dimG.y = (numBlocks + CUDA_GROUP_LIMIT -1) / CUDA_GROUP_LIMIT;
		dimG.x = (numBlocks + dimG.y -1) / dimG.y;
	}
	//cudaGetDevice(&device);
	device = deviceID;
	hipSetDevice(device);
	hipGetDeviceProperties(&prop,device);
	
	globalMem = prop.totalGlobalMem  - CUDA_RESERVE_MEM;
	if (globalMem <= fixedMem){
		printf("Device memory[%lu] not enough to hold all data[>%lu]!\n", \
		       globalMem,fixedMem);
		exit(EXIT_FAILURE);
	}	
	chunkSizeMax = (globalMem - fixedMem) / (3 * sizeof(float) + sizeof(int));
	if (chunkSizeMax>numAtoms)
		chunkSizeMax=numAtoms;

	size_p = sizeof(float) * chunkSizeMax * 3;
	size_i = sizeof(int)   * chunkSizeMax;

	hipMalloc((void **)&d_F, size_F);
	hipMalloc((void **)&d_Fim, size_F);
  	hipMalloc((void **)&d_f, size_f);
  	hipMalloc((void **)&d_q, size_q);
  	hipMalloc((void **)&d_p, size_p);
  	hipMalloc((void **)&d_i, size_i);
  	hipMemcpy(d_f, f, size_f, hipMemcpyHostToDevice);
  	hipMemcpy(d_q, q, size_q, hipMemcpyHostToDevice);
  	hipMemset(d_F,0,size_F);
  	hipMemset(d_Fim,0,size_F);
 	
  	chunkSize=chunkSizeMax;
  	for(chunk=0;chunk<numAtoms;chunk+=chunkSizeMax){
		
		if (chunkSize+chunk>=numAtoms)
			chunkSize=numAtoms-chunk;
		hipMemcpy(d_i, i + chunk, sizeof(int)*	chunkSize, \
		           hipMemcpyHostToDevice);
		hipMemcpy(d_p, p + chunk, sizeof(float)*chunkSize, \
		           hipMemcpyHostToDevice);
		hipMemcpy(d_p + chunkSize, p + chunk + numAtoms, \
		           sizeof(float)*chunkSize, hipMemcpyHostToDevice);
		hipMemcpy(d_p + 2*chunkSize, p + chunk + 2*numAtoms, \
		           sizeof(float)*chunkSize, hipMemcpyHostToDevice);
		structureFactor<<<dimG,dimB>>>(d_F, d_Fim, d_f, d_q, d_p, d_i, numPix, \
		                               chunkSize);
	}
  	matAmp<<<dimG,dimB>>>(d_F,d_Fim,numPix);
  	hipMemcpy(F, d_F, size_F, hipMemcpyDeviceToHost);
  	hipFree(d_F);
  	hipFree(d_Fim);
  	hipFree(d_f);
  	hipFree(d_q);
  	hipFree(d_p);
  	hipFree(d_i);
}

int cuda_getDeviceCount(){
	int tmp;
	if (hipSuccess != hipGetDeviceCount(&tmp))
		return 0;
	return tmp;
}

/*	
void cuda_structureFactorChunk(float *sf_real, float *sf_imag, float *f, float *q, int *i, float *p, int numAtomTypes, int numPix, int chunkSize) {
	float *d_sf_real, *d_sf_imag, *d_f, *d_q, *d_p; // Pointer to device memory
	int *d_i;
	int size_sf = numPix*sizeof(float);
	int size_f = numPix*numAtomTypes*sizeof(float);
	int size_q = numPix*3*sizeof(float);
	int size_i = chunkSize*sizeof(int);
	int size_p = chunkSize*3*sizeof(float);
	// Allocate space for device copies
	cudaMalloc((void **)&d_sf_real, size_sf);
	cudaMalloc((void **)&d_sf_imag, size_sf);
  	cudaMalloc((void **)&d_f, size_f);
  	cudaMalloc((void **)&d_q, size_q);
	cudaMalloc((void **)&d_i, size_i);
  	cudaMalloc((void **)&d_p, size_p);
	// Copy inputs to device
  	cudaMemcpy(d_sf_real, sf_real, size_sf, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_sf_imag, sf_imag, size_sf, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_f, f, size_f, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_q, q, size_q, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_i, i, size_i, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_p, p, size_p, cudaMemcpyHostToDevice);
  	// Launch kernel on GPU
	dim3 threads_per_block(512); // Maximum number of threads per block
	dim3 number_of_blocks(2048,2048,1);
  	//structureFactorChunk<<<number_of_blocks,threads_per_block>>>(d_sf_real, d_sf_imag, d_f, d_q, d_i, d_p, numAtomTypes, numPix, chunkSize);
	structureFactorChunkParallel<<<number_of_blocks,threads_per_block>>>(d_sf_real, d_sf_imag, d_f, d_q, d_i, d_p, numAtomTypes, numPix, chunkSize);
	//cudaThreadSynchronize();
  	// Copy result back to host
  	cudaMemcpy(sf_real, d_sf_real, size_sf, cudaMemcpyDeviceToHost);
  	cudaMemcpy(sf_imag, d_sf_imag, size_sf, cudaMemcpyDeviceToHost);
	// Cleanup
  	cudaFree(d_sf_real); cudaFree(d_sf_imag); cudaFree(d_f); cudaFree(d_q); cudaFree(d_i); cudaFree(d_p);
}

void cuda_structureFactorChunkParallel(float *pad_real, float *pad_imag, float *f, float *q, int *i, float *p, int numAtomTypes, int numPix, int chunkSize) {
	float *d_pad_real, *d_pad_imag, *d_f, *d_q, *d_p; // Pointer to device memory
	int *d_i;
	int size_pad = numPix*chunkSize*sizeof(float);
	int size_f = numPix*numAtomTypes*sizeof(float);
	int size_q = numPix*3*sizeof(float);
	int size_i = chunkSize*sizeof(int);
	int size_p = chunkSize*3*sizeof(float);
	// Allocate space for device copies
  	cudaMalloc((void **)&d_pad_real, size_pad);
  	cudaMalloc((void **)&d_pad_imag, size_pad);
  	cudaMalloc((void **)&d_f, size_f);
  	cudaMalloc((void **)&d_q, size_q);
	cudaMalloc((void **)&d_i, size_i);
  	cudaMalloc((void **)&d_p, size_p);
	// Copy inputs to device
  	cudaMemcpy(d_f, f, size_f, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_q, q, size_q, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_i, i, size_i, cudaMemcpyHostToDevice);
  	cudaMemcpy(d_p, p, size_p, cudaMemcpyHostToDevice);
  	// Launch kernel on GPU
	dim3 threads_per_block(chunkSize); // Maximum number of threads per block
	dim3 number_of_blocks(numPix);
	structureFactorChunkParallel<<<number_of_blocks,threads_per_block>>>(d_pad_real, d_pad_imag, d_f, d_q, d_i, d_p, numAtomTypes, numPix, chunkSize);
  	// Copy result back to host
  	cudaMemcpy(pad_real, d_pad_real, size_pad, cudaMemcpyDeviceToHost);
  	cudaMemcpy(pad_imag, d_pad_imag, size_pad, cudaMemcpyDeviceToHost);
	// Cleanup
  	cudaFree(d_pad_real); cudaFree(d_pad_imag); cudaFree(d_f); cudaFree(d_q); cudaFree(d_i); cudaFree(d_p);
}
*/


	.text
	.file	"diffraction.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__addVecPiS_S_ # -- Begin function _Z21__device_stub__addVecPiS_S_
	.type	_Z21__device_stub__addVecPiS_S_,@function
_Z21__device_stub__addVecPiS_S_:        # @_Z21__device_stub__addVecPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6addVecPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__addVecPiS_S_, .Lfunc_end0-_Z21__device_stub__addVecPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__addMatPfS_S_ # -- Begin function _Z21__device_stub__addMatPfS_S_
	.type	_Z21__device_stub__addMatPfS_S_,@function
_Z21__device_stub__addMatPfS_S_:        # @_Z21__device_stub__addMatPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6addMatPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z21__device_stub__addMatPfS_S_, .Lfunc_end1-_Z21__device_stub__addMatPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__addCubePfS_S_ # -- Begin function _Z22__device_stub__addCubePfS_S_
	.type	_Z22__device_stub__addCubePfS_S_,@function
_Z22__device_stub__addCubePfS_S_:       # @_Z22__device_stub__addCubePfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7addCubePfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z22__device_stub__addCubePfS_S_, .Lfunc_end2-_Z22__device_stub__addCubePfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__matAmpPfS_i  # -- Begin function _Z21__device_stub__matAmpPfS_i
	.type	_Z21__device_stub__matAmpPfS_i,@function
_Z21__device_stub__matAmpPfS_i:         # @_Z21__device_stub__matAmpPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6matAmpPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z21__device_stub__matAmpPfS_i, .Lfunc_end3-_Z21__device_stub__matAmpPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__structureFactorPfS_S_S_S_Piii # -- Begin function _Z30__device_stub__structureFactorPfS_S_S_S_Piii
	.type	_Z30__device_stub__structureFactorPfS_S_S_S_Piii,@function
_Z30__device_stub__structureFactorPfS_S_S_S_Piii: # @_Z30__device_stub__structureFactorPfS_S_S_S_Piii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15structureFactorPfS_S_S_S_Piii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z30__device_stub__structureFactorPfS_S_S_S_Piii, .Lfunc_end4-_Z30__device_stub__structureFactorPfS_S_S_S_Piii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11random_intsPii              # -- Begin function _Z11random_intsPii
	.type	_Z11random_intsPii,@function
_Z11random_intsPii:                     # @_Z11random_intsPii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB5_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB5_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB5_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB5_4:                                # %._crit_edge
	retq
.Lfunc_end5:
	.size	_Z11random_intsPii, .Lfunc_end5-_Z11random_intsPii
	.cfi_endproc
                                        # -- End function
	.globl	cuda_funcVec                    # -- Begin function cuda_funcVec
	.type	cuda_funcVec,@function
cuda_funcVec:                           # @cuda_funcVec
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %r15d
	movq	%rdx, 32(%rsp)                  # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %r13
	leal	(,%r15,4), %eax
	movslq	%eax, %r14
	leaq	24(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	%r13, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movq	%r12, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%r15d, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$1, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z21__device_stub__addVecPiS_S_
.LBB6_2:
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	cuda_funcVec, .Lfunc_end6-cuda_funcVec
	.cfi_endproc
                                        # -- End function
	.globl	cuda_funcMat                    # -- Begin function cuda_funcMat
	.type	cuda_funcMat,@function
cuda_funcMat:                           # @cuda_funcMat
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %r15d
	movq	%rdx, 32(%rsp)                  # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %r13
	imull	%r8d, %r15d
	leal	(,%r15,4), %eax
	movslq	%eax, %r14
	leaq	24(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	%r13, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movq	%r12, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	btsq	$32, %r15
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$1, %rdx
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z21__device_stub__addMatPfS_S_
.LBB7_2:
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	cuda_funcMat, .Lfunc_end7-cuda_funcMat
	.cfi_endproc
                                        # -- End function
	.globl	cuda_funcCube                   # -- Begin function cuda_funcCube
	.type	cuda_funcCube,@function
cuda_funcCube:                          # @cuda_funcCube
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %r15d
	movq	%rdx, 32(%rsp)                  # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %r13
	imull	%r8d, %r15d
	imull	%r9d, %r15d
	leal	(,%r15,4), %eax
	movslq	%eax, %r14
	leaq	24(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	%r13, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movq	%r12, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	btsq	$32, %r15
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$1, %rdx
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z22__device_stub__addCubePfS_S_
.LBB8_2:
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	cuda_funcCube, .Lfunc_end8-cuda_funcCube
	.cfi_endproc
                                        # -- End function
	.globl	cuda_structureFactor            # -- Begin function cuda_structureFactor
	.type	cuda_structureFactor,@function
cuda_structureFactor:                   # @cuda_structureFactor
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1624, %rsp                     # imm = 0x658
	.cfi_def_cfa_offset 1680
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $r9d killed $r9d def $r9
	movq	%rcx, 72(%rsp)                  # 8-byte Spill
	movq	%rdx, %rbp
	movl	1696(%rsp), %ebx
	movslq	1688(%rsp), %r14
	movabsq	$4294967808, %rdx               # imm = 0x100000200
	movq	%r9, 112(%rsp)                  # 8-byte Spill
	movslq	%r9d, %rcx
	leaq	(,%rcx,4), %r13
	imulq	%r13, %r14
	leaq	(%rcx,%rcx,4), %rax
	leaq	(%r14,%rax,4), %r15
	addl	$511, %ecx                      # imm = 0x1FF
	movl	%ecx, %eax
	shrl	$9, %eax
	cmpl	$33554432, %ecx                 # imm = 0x2000000
	movq	%rdi, 128(%rsp)                 # 8-byte Spill
	movq	%r8, 80(%rsp)                   # 8-byte Spill
	movq	%rsi, 56(%rsp)                  # 8-byte Spill
	movq	%rbp, 48(%rsp)                  # 8-byte Spill
	jb	.LBB9_1
# %bb.2:
	leal	65534(%rax), %ecx
	imulq	$16777473, %rcx, %rcx           # imm = 0x1000101
	shrq	$40, %rcx
	addl	%ecx, %eax
	decl	%eax
	xorl	%edx, %edx
	divl	%ecx
                                        # kill: def $eax killed $eax def $rax
	shlq	$32, %rcx
	orq	%rcx, %rax
	jmp	.LBB9_3
.LBB9_1:
	addq	%rdx, %rax
	addq	$-512, %rax                     # imm = 0xFE00
.LBB9_3:
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movl	%ebx, %edi
	callq	hipSetDevice
	leaq	152(%rsp), %r12
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	hipGetDevicePropertiesR0600
	movq	$-134217728, %rsi               # imm = 0xF8000000
	addq	288(%r12), %rsi
	movq	%rsi, %rbx
	subq	%r15, %rbx
	jbe	.LBB9_12
# %bb.4:
	movl	1680(%rsp), %r15d
	shrq	$4, %rbx
	cmpl	%r15d, %ebx
	movl	%r15d, %eax
	cmovll	%ebx, %eax
	leaq	(,%r13,2), %rbp
	addq	%r13, %rbp
	movl	%eax, 28(%rsp)                  # 4-byte Spill
	movslq	%eax, %r12
	shlq	$2, %r12
	leaq	(%r12,%r12,2), %rax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	leaq	16(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	104(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	96(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	callq	hipMalloc
	leaq	88(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	104(%rsp), %rax
	movq	(%rax), %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	96(%rsp), %rax
	movq	(%rax), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	movq	%r13, %rdx
	callq	hipMemset
	leaq	32(%rsp), %rax
	movq	(%rax), %rdi
	xorl	%esi, %esi
	movq	%r13, 120(%rsp)                 # 8-byte Spill
	movq	%r13, %rdx
	callq	hipMemset
	testl	%r15d, %r15d
	movq	80(%rsp), %rsi                  # 8-byte Reload
	movq	72(%rsp), %r13                  # 8-byte Reload
	jle	.LBB9_9
# %bb.5:                                # %.lr.ph
	movl	1680(%rsp), %eax
	leal	(%rax,%rax), %ecx
	movl	%eax, %edx
	movslq	%ebx, %rdi
	cmpq	%rdi, %rdx
	cmovlq	%rdx, %rdi
	movq	%rdi, 40(%rsp)                  # 8-byte Spill
	leaq	(,%rdi,4), %rdi
	movq	%rdi, 144(%rsp)                 # 8-byte Spill
	shlq	$2, %rcx
	movq	%rcx, 56(%rsp)                  # 8-byte Spill
	movq	%rdx, 48(%rsp)                  # 8-byte Spill
	leaq	(,%rdx,4), %rcx
	movq	%rcx, 136(%rsp)                 # 8-byte Spill
	movl	%eax, %r15d
	xorl	%ebx, %ebx
	movl	28(%rsp), %eax                  # 4-byte Reload
	movl	%eax, %r14d
.LBB9_6:                                # =>This Inner Loop Header: Depth=1
	movq	%rsi, 80(%rsp)                  # 8-byte Spill
	leal	(%r14,%r12), %eax
	movl	1680(%rsp), %ecx
	cmpl	%ecx, %eax
	cmovgel	%r15d, %r14d
	movq	%r14, 72(%rsp)                  # 8-byte Spill
	movq	88(%rsp), %rdi
	movslq	%r14d, %rbp
	leaq	(,%rbp,4), %r14
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movq	%r13, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	addq	%r14, %rdi
	movq	136(%rsp), %rax                 # 8-byte Reload
	leaq	(%rax,%r13), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	addl	%ebp, %ebp
	movslq	%ebp, %rdi
	shlq	$2, %rdi
	addq	8(%rsp), %rdi
	movq	56(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%r13), %rsi
	movq	%r14, %rdx
	movq	72(%rsp), %r14                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movabsq	$4294967808, %rdx               # imm = 0x100000200
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_8
# %bb.7:                                #   in Loop: Header=BB9_6 Depth=1
	movq	16(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	104(%rsp), %rdx
	movq	96(%rsp), %rcx
	movq	8(%rsp), %r8
	movq	88(%rsp), %r9
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	120(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z30__device_stub__structureFactorPfS_S_S_S_Piii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB9_8:                                #   in Loop: Header=BB9_6 Depth=1
	movq	40(%rsp), %rax                  # 8-byte Reload
	addq	%rax, %rbx
	addl	28(%rsp), %r12d                 # 4-byte Folded Reload
	subl	%eax, %r15d
	movq	144(%rsp), %rax                 # 8-byte Reload
	movq	80(%rsp), %rsi                  # 8-byte Reload
	addq	%rax, %rsi
	addq	%rax, %r13
	cmpq	48(%rsp), %rbx                  # 8-byte Folded Reload
	jl	.LBB9_6
.LBB9_9:                                # %._crit_edge
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movabsq	$4294967808, %rdx               # imm = 0x100000200
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_11
# %bb.10:
	movq	16(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	112(%rsp), %rdx                 # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	callq	_Z21__device_stub__matAmpPfS_i
.LBB9_11:
	movq	16(%rsp), %rsi
	movq	128(%rsp), %rdi                 # 8-byte Reload
	movq	120(%rsp), %rdx                 # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	104(%rsp), %rdi
	callq	hipFree
	movq	96(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	88(%rsp), %rdi
	callq	hipFree
	addq	$1624, %rsp                     # imm = 0x658
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB9_12:
	.cfi_def_cfa_offset 1680
	movl	$.L.str, %edi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end9:
	.size	cuda_structureFactor, .Lfunc_end9-cuda_structureFactor
	.cfi_endproc
                                        # -- End function
	.globl	cuda_getDeviceCount             # -- Begin function cuda_getDeviceCount
	.type	cuda_getDeviceCount,@function
cuda_getDeviceCount:                    # @cuda_getDeviceCount
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	4(%rsp), %rdi
	callq	hipGetDeviceCount
	movl	%eax, %ecx
	xorl	%eax, %eax
	testl	%ecx, %ecx
	jne	.LBB10_2
# %bb.1:
	movl	4(%rsp), %eax
.LBB10_2:
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	cuda_getDeviceCount, .Lfunc_end10-cuda_getDeviceCount
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB11_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB11_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6addVecPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6addMatPfS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7addCubePfS_S_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6matAmpPfS_i, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15structureFactorPfS_S_S_S_Piii, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end11:
	.size	__hip_module_ctor, .Lfunc_end11-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB12_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB12_2:
	retq
.Lfunc_end12:
	.size	__hip_module_dtor, .Lfunc_end12-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6addVecPiS_S_,@object         # @_Z6addVecPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z6addVecPiS_S_
	.p2align	3, 0x0
_Z6addVecPiS_S_:
	.quad	_Z21__device_stub__addVecPiS_S_
	.size	_Z6addVecPiS_S_, 8

	.type	_Z6addMatPfS_S_,@object         # @_Z6addMatPfS_S_
	.globl	_Z6addMatPfS_S_
	.p2align	3, 0x0
_Z6addMatPfS_S_:
	.quad	_Z21__device_stub__addMatPfS_S_
	.size	_Z6addMatPfS_S_, 8

	.type	_Z7addCubePfS_S_,@object        # @_Z7addCubePfS_S_
	.globl	_Z7addCubePfS_S_
	.p2align	3, 0x0
_Z7addCubePfS_S_:
	.quad	_Z22__device_stub__addCubePfS_S_
	.size	_Z7addCubePfS_S_, 8

	.type	_Z6matAmpPfS_i,@object          # @_Z6matAmpPfS_i
	.globl	_Z6matAmpPfS_i
	.p2align	3, 0x0
_Z6matAmpPfS_i:
	.quad	_Z21__device_stub__matAmpPfS_i
	.size	_Z6matAmpPfS_i, 8

	.type	_Z15structureFactorPfS_S_S_S_Piii,@object # @_Z15structureFactorPfS_S_S_S_Piii
	.globl	_Z15structureFactorPfS_S_S_S_Piii
	.p2align	3, 0x0
_Z15structureFactorPfS_S_S_S_Piii:
	.quad	_Z30__device_stub__structureFactorPfS_S_S_S_Piii
	.size	_Z15structureFactorPfS_S_S_S_Piii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Device memory[%lu] not enough to hold all data[>%lu]!\n"
	.size	.L.str, 55

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6addVecPiS_S_"
	.size	.L__unnamed_1, 16

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z6addMatPfS_S_"
	.size	.L__unnamed_2, 16

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z7addCubePfS_S_"
	.size	.L__unnamed_3, 17

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z6matAmpPfS_i"
	.size	.L__unnamed_4, 15

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z15structureFactorPfS_S_S_S_Piii"
	.size	.L__unnamed_5, 34

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__addVecPiS_S_
	.addrsig_sym _Z21__device_stub__addMatPfS_S_
	.addrsig_sym _Z22__device_stub__addCubePfS_S_
	.addrsig_sym _Z21__device_stub__matAmpPfS_i
	.addrsig_sym _Z30__device_stub__structureFactorPfS_S_S_S_Piii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6addVecPiS_S_
	.addrsig_sym _Z6addMatPfS_S_
	.addrsig_sym _Z7addCubePfS_S_
	.addrsig_sym _Z6matAmpPfS_i
	.addrsig_sym _Z15structureFactorPfS_S_S_S_Piii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6addVecPiS_S_         ; -- Begin function _Z6addVecPiS_S_
	.globl	_Z6addVecPiS_S_
	.p2align	8
	.type	_Z6addVecPiS_S_,@function
_Z6addVecPiS_S_:                        ; @_Z6addVecPiS_S_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s2, s15
	s_mov_b32 s3, 0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_lshl_b64 s[2:3], s[2:3], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s4, s4, s2
	s_addc_u32 s5, s5, s3
	s_add_u32 s6, s6, s2
	s_addc_u32 s7, s7, s3
	s_load_b32 s4, s[4:5], 0x0
	s_load_b32 s5, s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s4, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s4
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6addVecPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6addVecPiS_S_, .Lfunc_end0-_Z6addVecPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 112
; NumSgprs: 16
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6addMatPfS_S_         ; -- Begin function _Z6addMatPfS_S_
	.globl	_Z6addMatPfS_S_
	.p2align	8
	.type	_Z6addMatPfS_S_,@function
_Z6addMatPfS_S_:                        ; @_Z6addMatPfS_S_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s2, s15
	s_mov_b32 s3, 0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_lshl_b64 s[2:3], s[2:3], 2
	v_mov_b32_e32 v1, 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s4, s4, s2
	s_addc_u32 s5, s5, s3
	s_add_u32 s6, s6, s2
	s_addc_u32 s7, s7, s3
	s_load_b32 s4, s[4:5], 0x0
	s_load_b32 s5, s[6:7], 0x0
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	s_waitcnt lgkmcnt(0)
	v_add_f32_e64 v0, s4, s5
	global_store_b32 v1, v0, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6addMatPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z6addMatPfS_S_, .Lfunc_end1-_Z6addMatPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 108
; NumSgprs: 16
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7addCubePfS_S_        ; -- Begin function _Z7addCubePfS_S_
	.globl	_Z7addCubePfS_S_
	.p2align	8
	.type	_Z7addCubePfS_S_,@function
_Z7addCubePfS_S_:                       ; @_Z7addCubePfS_S_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s2, s15
	s_mov_b32 s3, 0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_lshl_b64 s[2:3], s[2:3], 2
	v_mov_b32_e32 v1, 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s4, s4, s2
	s_addc_u32 s5, s5, s3
	s_add_u32 s6, s6, s2
	s_addc_u32 s7, s7, s3
	s_load_b32 s4, s[4:5], 0x0
	s_load_b32 s5, s[6:7], 0x0
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	s_waitcnt lgkmcnt(0)
	v_add_f32_e64 v0, s4, s5
	global_store_b32 v1, v0, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7addCubePfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z7addCubePfS_S_, .Lfunc_end2-_Z7addCubePfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 108
; NumSgprs: 16
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6matAmpPfS_i          ; -- Begin function _Z6matAmpPfS_i
	.globl	_Z6matAmpPfS_i
	.p2align	8
	.type	_Z6matAmpPfS_i,@function
_Z6matAmpPfS_i:                         ; @_Z6matAmpPfS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
	s_load_b32 s4, s[0:1], 0x10
	v_mad_u64_u32 v[3:4], null, v2, s3, s[14:15]
	v_and_b32_e32 v2, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, v3, s2, v[2:3]
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s4, v0
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v2, v2, v2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v2, v3, v3
	global_store_b32 v[0:1], v2, off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6matAmpPfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z6matAmpPfS_i, .Lfunc_end3-_Z6matAmpPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 224
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z15structureFactorPfS_S_S_S_Piii ; -- Begin function _Z15structureFactorPfS_S_S_S_Piii
	.globl	_Z15structureFactorPfS_S_S_S_Piii
	.p2align	8
	.type	_Z15structureFactorPfS_S_S_S_Piii,@function
_Z15structureFactorPfS_S_S_S_Piii:      ; @_Z15structureFactorPfS_S_S_S_Piii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b32 s3, s[0:1], 0x38
	v_bfe_u32 v1, v0, 10, 10
	s_load_b64 s[16:17], s[0:1], 0x30
	s_mov_b32 s19, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
	s_cmp_gt_i32 s17, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v2, s3, s[14:15]
	v_and_b32_e32 v2, 0x3ff, v0
	v_mad_u64_u32 v[0:1], null, v3, s2, v[2:3]
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s16, v0
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB4_11
; %bb.1:                                ; %.lr.ph
	s_load_b256 s[4:11], s[0:1], 0x0
	v_add3_u32 v2, s16, s16, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_load_b128 s[12:15], s[0:1], 0x20
	s_ashr_i32 s3, s16, 31
	s_mov_b32 s2, s16
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[9:10], 2, v[0:1]
	s_lshl_b64 s[0:1], s[2:3], 2
	v_mov_b32_e32 v12, 0
	s_lshl_b32 s18, s17, 1
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	s_mov_b32 s3, 0x7fffff
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s10, v9
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, s4, v9
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v10, vcc_lo
	v_add_co_u32 v7, vcc_lo, v1, s0
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v2, vcc_lo
	v_add_co_u32 v9, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	s_ashr_i32 s1, s17, 31
	s_mov_b32 s0, s17
	s_mov_b32 s10, 0xb94c1982
	s_lshl_b64 s[4:5], s[0:1], 2
	s_mov_b32 s11, 0x37d75334
	s_mov_b64 s[6:7], s[12:13]
.LBB4_2:                                ; =>This Inner Loop Header: Depth=1
	s_load_b32 s2, s[14:15], 0x0
	s_add_u32 s0, s6, s4
	s_addc_u32 s1, s7, s5
	global_load_b32 v11, v12, s[0:1]
	s_clause 0x2
	global_load_b32 v15, v[7:8], off
	global_load_b32 v16, v[1:2], off
	global_load_b32 v17, v[3:4], off
	s_lshl_b64 s[0:1], s[18:19], 2
	global_load_b32 v18, v12, s[6:7]
	s_add_u32 s0, s12, s0
	s_addc_u32 s1, s13, s1
                                        ; implicit-def: $vgpr21
	global_load_b32 v20, v12, s[0:1]
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[13:14], null, s2, s16, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v14, 31, v13
	v_lshlrev_b64 v[13:14], 2, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, s8, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s9, v14, vcc_lo
	global_load_b32 v19, v[13:14], off
	s_waitcnt vmcnt(5)
	v_mul_f32_e32 v11, v11, v15
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v18, v16
	s_waitcnt vmcnt(1)
	v_fmac_f32_e32 v11, v20, v17
                                        ; implicit-def: $vgpr20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, 0x40c90fdb, v11
	v_and_b32_e32 v16, 0x7fffffff, v15
	v_cmp_ngt_f32_e64 s2, 0x48000000, |v15|
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v11, 23, v16
	v_and_or_b32 v17, v16, s3, 0x800000
	v_add_nc_u32_e32 v18, 0xffffff88, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s2
	s_xor_b32 s20, exec_lo, s0
	s_cbranch_execz .LBB4_4
; %bb.3:                                ;   in Loop: Header=BB4_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e32 vcc_lo, 63, v18
	v_mad_u64_u32 v[20:21], null, 0xfe5163ab, v17, 0
	v_cndmask_b32_e64 v26, 0, 0xffffffc0, vcc_lo
	v_add_nc_u32_e32 v27, v26, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e64 s0, 31, v27
	v_cndmask_b32_e64 v28, 0, 0xffffffe0, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v11, v21 :: v_dual_add_nc_u32 v28, v28, v27
	v_mad_u64_u32 v[21:22], null, 0x3c439041, v17, v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s1, 31, v28
	v_mov_b32_e32 v11, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[22:23], null, 0xdb629599, v17, v[11:12]
	v_dual_mov_b32 v11, v23 :: v_dual_cndmask_b32 v20, v22, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[23:24], null, 0xf534ddc0, v17, v[11:12]
	v_mov_b32_e32 v11, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v21, v23, v21, vcc_lo
	v_mad_u64_u32 v[24:25], null, 0xfc2757d1, v17, v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v20, v21, v20, s0
	v_mov_b32_e32 v11, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[25:26], null, 0x4e441529, v17, v[11:12]
	v_mov_b32_e32 v11, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v29, v25, v23, vcc_lo
	v_mad_u64_u32 v[26:27], null, 0xa2f9836e, v17, v[11:12]
	v_cndmask_b32_e64 v11, 0, 0xffffffe0, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v11, v11, v28
	v_dual_cndmask_b32 v26, v26, v24 :: v_dual_cndmask_b32 v25, v27, v25
	v_cndmask_b32_e32 v24, v24, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v27, 32, v11
	v_cndmask_b32_e64 v23, v26, v29, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v25, v25, v26, s0
	v_cndmask_b32_e64 v26, v29, v24, s0
	v_cndmask_b32_e64 v24, v24, v21, s0
	v_cmp_eq_u32_e32 vcc_lo, 0, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v25, v25, v23, s1
	v_cndmask_b32_e64 v23, v23, v26, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v26, v26, v24, s1
	v_cndmask_b32_e64 v20, v24, v20, s1
	v_alignbit_b32 v28, v25, v23, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_alignbit_b32 v22, v23, v26, v27
	v_cndmask_b32_e32 v11, v28, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v21, v22, v23, vcc_lo
	v_alignbit_b32 v25, v26, v20, v27
	v_bfe_u32 v22, v11, 29, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v23, v11, v21, 30
	v_cndmask_b32_e32 v25, v25, v26, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v24, 0, v22
	v_alignbit_b32 v21, v21, v25, 30
	v_alignbit_b32 v20, v25, v20, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v23, v23, v24
	v_xor_b32_e32 v21, v21, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v20, v20, v24
	v_lshrrev_b32_e32 v24, 29, v11
	v_clz_i32_u32_e32 v26, v23
	v_lshrrev_b32_e32 v11, 30, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v24, 31, v24
	v_min_u32_e32 v26, 32, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v27, 0.5, v24
	v_sub_nc_u32_e32 v25, 31, v26
	v_lshlrev_b32_e32 v28, 23, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_alignbit_b32 v23, v23, v21, v25
	v_alignbit_b32 v20, v21, v20, v25
	v_sub_nc_u32_e32 v27, v27, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v21, v23, v20, 9
	v_lshrrev_b32_e32 v23, 9, v23
	v_clz_i32_u32_e32 v25, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v25, 32, v25
	v_sub_nc_u32_e32 v29, 31, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_alignbit_b32 v20, v21, v20, v29
	v_or_b32_e32 v21, v23, v27
	v_add_lshl_u32 v23, v25, v26, 23
	v_lshrrev_b32_e32 v20, 9, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v25, 0x3fc90fda, v21
	v_sub_nc_u32_e32 v20, v20, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v23, 0x3fc90fda, v21, -v25
	v_add_nc_u32_e32 v20, 0x33000000, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v23, 0x33a22168, v21
	v_add_nc_u32_e32 v21, v22, v11
	v_or_b32_e32 v20, v20, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, 0x3fc90fda, v20
	v_add_f32_e32 v20, v25, v23
.LBB4_4:                                ; %Flow86
                                        ;   in Loop: Header=BB4_2 Depth=1
	s_or_saveexec_b32 s0, s20
	v_mul_f32_e64 v11, 0x3f22f983, |v15|
	s_delay_alu instid0(VALU_DEP_1)
	v_rndne_f32_e32 v11, v11
	s_xor_b32 exec_lo, exec_lo, s0
; %bb.5:                                ;   in Loop: Header=BB4_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v20, 0xbfc90fda, v11, |v15|
	v_cvt_i32_f32_e32 v21, v11
	v_fmac_f32_e32 v20, 0xb3a22168, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v20, 0xa7c234c4, v11
; %bb.6:                                ; %_ZL3cosf.exit
                                        ;   in Loop: Header=BB4_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	global_load_b32 v22, v[5:6], off
	v_mul_f32_e32 v23, v20, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v24, s10, v23, 0x3c0881c4
	v_fmaak_f32 v24, v23, v24, 0xbe2aaa9d
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v24, v23, v24
	v_fmac_f32_e32 v20, v20, v24
	v_dual_fmaak_f32 v25, s11, v23, 0xbab64f3b :: v_dual_and_b32 v24, 1, v21
	v_lshlrev_b32_e32 v21, 30, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v24
	v_fmaak_f32 v25, v23, v25, 0x3d2aabf7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v21, 0x80000000, v21
	v_fmaak_f32 v25, v23, v25, 0xbf000004
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v23, v23, v25, 1.0
	v_cndmask_b32_e64 v20, -v20, v23, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v15, 0x1f8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v20, v21, v20
	v_cndmask_b32_e32 v20, 0x7fc00000, v20, vcc_lo
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_fmac_f32_e32 v22, v19, v20
                                        ; implicit-def: $vgpr19
	global_store_b32 v[5:6], v22, off
	global_load_b32 v13, v[13:14], off
                                        ; implicit-def: $vgpr14
	s_and_saveexec_b32 s0, s2
	s_xor_b32 s20, exec_lo, s0
	s_cbranch_execz .LBB4_8
; %bb.7:                                ;   in Loop: Header=BB4_2 Depth=1
	v_mad_u64_u32 v[19:20], null, 0xfe5163ab, v17, 0
	v_cmp_lt_u32_e64 s0, 63, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v14, 0, 0xffffffc0, s0
	v_dual_mov_b32 v11, v20 :: v_dual_add_nc_u32 v14, v14, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[20:21], null, 0x3c439041, v17, v[11:12]
	v_cmp_lt_u32_e64 s1, 31, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v18, 0, 0xffffffe0, s1
	v_dual_mov_b32 v11, v21 :: v_dual_add_nc_u32 v14, v18, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[21:22], null, 0xdb629599, v17, v[11:12]
	v_cmp_lt_u32_e64 s2, 31, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mov_b32_e32 v11, v22
	v_cndmask_b32_e64 v19, v21, v19, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[22:23], null, 0xf534ddc0, v17, v[11:12]
	v_mov_b32_e32 v11, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[23:24], null, 0xfc2757d1, v17, v[11:12]
	v_mov_b32_e32 v11, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[24:25], null, 0x4e441529, v17, v[11:12]
	v_mov_b32_e32 v11, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[25:26], null, 0xa2f9836e, v17, v[11:12]
	v_cndmask_b32_e64 v11, 0, 0xffffffe0, s2
	v_cndmask_b32_e64 v17, v24, v22, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v11, v11, v14
	v_cndmask_b32_e64 v18, v25, v23, s0
	v_cndmask_b32_e64 v24, v26, v24, s0
	v_cndmask_b32_e64 v23, v23, v21, s0
	v_cndmask_b32_e64 v14, v22, v20, s0
	v_sub_nc_u32_e32 v22, 32, v11
	v_cndmask_b32_e64 v20, v18, v17, s1
	v_cndmask_b32_e64 v18, v24, v18, s1
	v_cndmask_b32_e64 v17, v17, v23, s1
	v_cndmask_b32_e64 v23, v23, v14, s1
	v_cmp_eq_u32_e64 s0, 0, v11
	v_cndmask_b32_e64 v14, v14, v19, s1
	v_cndmask_b32_e64 v18, v18, v20, s2
	v_cndmask_b32_e64 v20, v20, v17, s2
	v_cndmask_b32_e64 v17, v17, v23, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v14, v23, v14, s2
	v_alignbit_b32 v24, v18, v20, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v21, v20, v17, v22
	v_alignbit_b32 v22, v17, v14, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v11, v24, v18, s0
	v_cndmask_b32_e64 v18, v21, v20, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v17, v22, v17, s0
	v_bfe_u32 v19, v11, 29, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v20, v11, v18, 30
	v_alignbit_b32 v18, v18, v17, 30
	v_alignbit_b32 v14, v17, v14, 30
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v21, 0, v19
	v_xor_b32_e32 v20, v20, v21
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v17, v18, v21
	v_xor_b32_e32 v14, v14, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v22, v20
	v_min_u32_e32 v22, 32, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v18, 31, v22
	v_lshlrev_b32_e32 v24, 23, v22
	v_alignbit_b32 v20, v20, v17, v18
	v_alignbit_b32 v14, v17, v14, v18
	v_lshrrev_b32_e32 v18, 29, v11
	v_lshrrev_b32_e32 v11, 30, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v17, v20, v14, 9
	v_lshlrev_b32_e32 v18, 31, v18
	v_lshrrev_b32_e32 v20, 9, v20
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v19, v19, v11
                                        ; implicit-def: $vgpr11
	v_clz_i32_u32_e32 v21, v17
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v23, 0.5, v18
	v_min_u32_e32 v21, 32, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v23, v23, v24
	v_sub_nc_u32_e32 v25, 31, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v14, v17, v14, v25
	v_or_b32_e32 v17, v20, v23
	v_add_lshl_u32 v20, v21, v22, 23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v14, 9, v14
	v_sub_nc_u32_e32 v14, v14, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v14, 0x33000000, v14
	v_or_b32_e32 v14, v14, v18
	v_mul_f32_e32 v21, 0x3fc90fda, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v20, 0x3fc90fda, v17, -v21
	v_fmac_f32_e32 v20, 0x33a22168, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v20, 0x3fc90fda, v14
	v_add_f32_e32 v14, v21, v20
.LBB4_8:                                ; %Flow
                                        ;   in Loop: Header=BB4_2 Depth=1
	s_and_not1_saveexec_b32 s0, s20
; %bb.9:                                ;   in Loop: Header=BB4_2 Depth=1
	v_fma_f32 v14, 0xbfc90fda, v11, |v15|
	v_cvt_i32_f32_e32 v19, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v14, 0xb3a22168, v11
	v_fmac_f32_e32 v14, 0xa7c234c4, v11
; %bb.10:                               ; %_ZL3sinf.exit
                                        ;   in Loop: Header=BB4_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	global_load_b32 v11, v[9:10], off
	v_and_b32_e32 v21, 1, v19
	v_lshlrev_b32_e32 v19, 30, v19
	v_mul_f32_e32 v17, v14, v14
	v_xor_b32_e32 v15, v16, v15
	s_add_i32 s17, s17, -1
	s_add_i32 s18, s18, 1
	v_and_b32_e32 v16, 0x80000000, v19
	v_fmaak_f32 v18, s10, v17, 0x3c0881c4
	v_fmaak_f32 v20, s11, v17, 0xbab64f3b
	s_add_u32 s6, s6, 4
	s_addc_u32 s7, s7, 0
	s_add_u32 s14, s14, 4
	v_fmaak_f32 v18, v17, v18, 0xbe2aaa9d
	v_fmaak_f32 v20, v17, v20, 0x3d2aabf7
	s_addc_u32 s15, s15, 0
	s_cmp_lg_u32 s17, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v18, v17, v18
	v_fmaak_f32 v20, v17, v20, 0xbf000004
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v14, v14, v18
	v_fma_f32 v17, v17, v20, 1.0
	v_cmp_eq_u32_e64 s0, 0, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v14, v17, v14, s0
	v_xor3_b32 v14, v15, v16, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v14, 0x7fc00000, v14, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v11, v13, v14
	global_store_b32 v[9:10], v11, off
	s_cbranch_scc1 .LBB4_2
.LBB4_11:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15structureFactorPfS_S_S_S_Piii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 30
		.amdhsa_next_free_sgpr 21
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z15structureFactorPfS_S_S_S_Piii, .Lfunc_end4-_Z15structureFactorPfS_S_S_S_Piii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2356
; NumSgprs: 23
; NumVgprs: 30
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 23
; NumVGPRsForWavesPerEU: 30
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6addVecPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z6addVecPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
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amdhsa.version:
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...

	.end_amdgpu_metadata
