#include <stdio.h>
#include <algorithm>
#include <fstream> 
#include <iostream>
#include <vector>
#include <math.h>
#include <string>
#include <stdlib.h>

// qsub -I -q coc-ice -l nodes=1:ppn=1:nvidiagpu,walltime=2:00:00,pmem=2gb
// qsub -I -q coc-ice -l nodes=1:ppn=1:nvidiagpu:teslap100,walltime=2:00:00,pmem=2gb
// ssh -x nolivares3@coc-ice.pace.gatech.edu
using namespace std;

// global code runs on the device
// need to have one thread correspond to multiple gridpoints
__global__ void gpuIt(float *tNew,float *tOld,float *tOrig,int x,int y,int z,float k,float st) {

    int i = threadIdx.x + blockIdx.x * blockDim.x;
    // may want an if(i < x*y*z) to prevent overflowing, likea thisa
    if(i < x*y*z){

    if(i == 0){ // top left corner
        tNew[i] = tOld[i] + k*(tOld[i+1] + tOld[i] + tOld[i] + tOld[i+x] - 4*tOld[i]);
        //tNew[i] = 1;
    }
    else if(i == x-1){ // top right corner
        tNew[i] = tOld[i] + k*(tOld[i] + tOld[i-1] + tOld[i] + tOld[i+x] - 4*tOld[i]);
        //tNew[i] = 3;
    }
    else if(i == x*y - 1){ // bottom right corner
        tNew[i] = tOld[i] + k*(tOld[i] + tOld[i-1] + tOld[i-x] + tOld[i] - 4*tOld[i]);
        //tNew[i] = 5;
    }
    else if(i == x*y - x){ // bottom left corner
        tNew[i] = tOld[i] + k*(tOld[i+1] + tOld[i] + tOld[i-x] + tOld[i] - 4*tOld[i]);
        //tNew[i] = 7;
    }
    else if(i%x == 0){ // left side
        tNew[i] = tOld[i] + k*(tOld[i+1] + tOld[i] + tOld[i-x] + tOld[i+x] - 4*tOld[i]);
        //tNew[i] = 8;
    }
    else if(i%x == x-1){ // right side
        tNew[i] = tOld[i] + k*(tOld[i] + tOld[i-1] + tOld[i-x] + tOld[i+x] - 4*tOld[i]);
        //tNew[i] = 4;
    }
    else if(i - x < 0){ // top row
        tNew[i] = tOld[i] + k*(tOld[i+1] + tOld[i-1] + tOld[i] + tOld[i+x] - 4*tOld[i]);
        //tNew[i] = 2;
    }
    else if(i + x > x*y){ // bottom row
        tNew[i] = tOld[i] + k*(tOld[i+1] + tOld[i-1] + tOld[i-x] + tOld[i] - 4*tOld[i]);
        //tNew[i] = 6;
    }
    else{
        tNew[i] = tOld[i] + k*(tOld[i+1] + tOld[i-1] + tOld[i-x] + tOld[i+x] - 4*tOld[i]);
        //tNew[i] = 9;
    }
    //tNew[i] = i; // for debugging
    // replace heaters
    if(tOrig[i] != st){
        tNew[i] = tOrig[i];
    }
    //tNew[i] = i%x;
    }
}

// thisll work for 3d, less if/elses this way
__global__ void gpuIt3(float *tNew,float *tOld,float *tOrig,int x,int y,int z,float k,float st) {
    int i = threadIdx.x + blockIdx.x * blockDim.x;
if(i < x*y*z){

    if(i == 0){ // front upper left corner
        tNew[i] = tOld[i]+k*(tOld[i]+tOld[i+(x*y)]+tOld[i]+tOld[i+x]+tOld[i]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 0;
    }
    else if(i == x-1){ // front upper right corner
        tNew[i] = tOld[i]+k*(tOld[i]+tOld[i+(x*y)]+tOld[i]+tOld[i+x]+tOld[i-1]+tOld[i]-6*tOld[i]);
        //tNew[i] = .1;
    }
    else if(i == x*y-1){ // front lower right corner
        tNew[i] = tOld[i]+k*(tOld[i]+tOld[i+(x*y)]+tOld[i-x]+tOld[i]+tOld[i-1]+tOld[i]-6*tOld[i]);
        //tNew[i] = .2;
    }
    else if(i == x*y-x){ // front lower left corner
        tNew[i] = tOld[i]+k*(tOld[i]+tOld[i+(x*y)]+tOld[i-x]+tOld[i]+tOld[i]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = .3;
    }
    else if(i == x*y*(z-1) ){ // back upper left corner
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i]+tOld[i]+tOld[i+x]+tOld[i]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = .4;
    }
    else if(i == x*y*(z-1) + x-1){ // back upper right corner
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i]+tOld[i]+tOld[i+x]+tOld[i-1]+tOld[i]-6*tOld[i]);
        //tNew[i] = .5;
    }
    else if(i == x*y*z-1){ // back lower right corner
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i]+tOld[i-x]+tOld[i]+tOld[i-1]+tOld[i]-6*tOld[i]);
        //tNew[i] = .6;
    }
    else if(i == x*y*z - x){ // back lower left corner
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i]+tOld[i-x]+tOld[i]+tOld[i]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = .7;
    }

    else if(i - x < 0){ // front top edge
        tNew[i] = tOld[i]+k*(tOld[i]+tOld[i+(x*y)]+tOld[i]+tOld[i+x]+tOld[i-1]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = .8;
    }
    else if(i%x == x-1 && i<x*y){ // front right edge
        tNew[i] = tOld[i]+k*(tOld[i]+tOld[i+(x*y)]+tOld[i-x]+tOld[i+x]+tOld[i-1]+tOld[i]-6*tOld[i]);
        //tNew[i] = .9;
    }
    else if(i+x > x*y && i < (x*y)){ // front bottom edge
        tNew[i] = tOld[i]+k*(tOld[i]+tOld[i+(x*y)]+tOld[i-x]+tOld[i]+tOld[i-1]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 1;
    }
    else if(i%x == 0 && i<x*y){ // front left edge
        tNew[i] = tOld[i]+k*(tOld[i]+tOld[i+(x*y)]+tOld[i-x]+tOld[i+x]+tOld[i]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 2;
    }

    else if(i > (x*y*z - x*y) && i < (x*y*z - (x-1)*y)){ // back top edge
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i]+tOld[i]+tOld[i+x]+tOld[i-1]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 3;
    }
    else if(i%x == x-1 && i > (x*y*(z-1))){ // back right edge
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i]+tOld[i-x]+tOld[i+x]+tOld[i-1]+tOld[i]-6*tOld[i]);
        //tNew[i] = 4;
    }
    else if(i+x > x*y*z){ // back bottom edge
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i]+tOld[i-x]+tOld[i]+tOld[i-1]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 5;
    }
    else if(i%x == 0 && i > x*y*(z-1)){ // back left edge
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i]+tOld[i-x]+tOld[i+x]+tOld[i]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 6;
    }

    // the corner sides going front to back
    else if(i%(x*y) == 0){ // upper left edge
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i+(x*y)]+tOld[i]+tOld[i+x]+tOld[i]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 7;
    }
    else if(i%(x*y) == x-1){ // upper right edge
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i+(x*y)]+tOld[i]+tOld[i+x]+tOld[i-1]+tOld[i]-6*tOld[i]);
        //tNew[i] = 8;
    }
    else if(i%(x*y) == x*y-1){ // lower right edge
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i+(x*y)]+tOld[i-x]+tOld[i]+tOld[i-1]+tOld[i]-6*tOld[i]);
        //tNew[i] = 9;
    }
    else if(i%(x*y) == x*y-x){ // lower left edge
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i+(x*y)]+tOld[i-x]+tOld[i]+tOld[i]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 9.1;
    }

    // else ifs here are vague because other options already completed
    else if(i < x*y){ // front face
        tNew[i] = tOld[i]+k*(tOld[i]+tOld[i+(x*y)]+tOld[i-x]+tOld[i+x]+tOld[i-1]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 1.1;
    }
    else if(i > x*y*(z-1)){ // back face
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i]+tOld[i-x]+tOld[i+x]+tOld[i-1]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 1.2;
    }
    else if(i%(x*y) < x){ // top face
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i+(x*y)]+tOld[i]+tOld[i+x]+tOld[i-1]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 1.3;
    }
    else if(i%(x*y) > x*(y-1)){ // bottom face
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i+(x*y)]+tOld[i-x]+tOld[i]+tOld[i-1]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 1.4;
    }
    else if(i%(x) == x-1){ // right face
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i+(x*y)]+tOld[i-x]+tOld[i+x]+tOld[i-1]+tOld[i]-6*tOld[i]);
        //tNew[i] = 1.5;
    }
    else if(i%(x) == 0){ // left face
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i+(x*y)]+tOld[i-x]+tOld[i+x]+tOld[i]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 1.6;
    }
    else{ // all in the middle
        //                       front        back         top       bottom     left     right 
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i+(x*y)]+tOld[i-x]+tOld[i+x]+tOld[i-1]+tOld[i+1]-6*tOld[i]);
    }


//tNew[i] = i%(x*y);
// replace heaters
if(tOrig[i] != st){
    tNew[i] = tOrig[i];
}

}
}


// blockIdx.x for blocks, threadIdx.x for threads
// name<<<blocks,threads per block>>>
// 


// host is cpu




int main(int argc, char** argv) {
    //cout<<argv[1]<<endl;
    int dim;
    ifstream inFile(argv[1]);

    string line;
    string dims;
    //string heaters;
    getline(inFile,line);
    if(argv[1]==NULL){
        cout<<"Error, no config file specified."<<endl;
    }
    // move to next nums
    while(line[0] == '#' || line.length() == 1){getline(inFile,line);}
    // gets 2d/3d as an int of 2 or 3
    if(line[0] != '#' && line.length() != 1){
        dim = line[0] - 48; // ascii starts at 48
        //cout<<"dim  "<<dim<<endl;
    }
    getline(inFile,line);

    // k value
    while(line[0] == '#' || line.length() == 1){getline(inFile,line);}
    int delimPos = line.find('\n');
    string kstring = line.substr(0,delimPos);
    float K = strtof(&kstring[0],NULL);
    //cout<<"K "<<K<<endl;

    // timesteps
    getline(inFile,line);
    while(line[0] == '#' || line.length() == 1){getline(inFile,line);}
    delimPos = line.find('\n');
    string ts = line.substr(0,delimPos);
    float TS = strtof(&ts[0],NULL);
    //cout<<"TS  "<<TS<<endl;

    // dims
    getline(inFile,line);
    while(line[0] == '#' || line.length() == 1){getline(inFile,line);}
    delimPos = line.find(',');
    string xd = line.substr(0,delimPos);
    float XD = strtof(&xd[0],NULL);
    //cout<<"XD  "<<XD<<endl;
    float YD, ZD;
    if(dim == 3){
        int delimPos2 = line.find(',',delimPos+1);
        string yd = line.substr(delimPos+1,delimPos2);
        YD = strtof(&yd[0],NULL);
        //cout<<"YD  "<<YD<<endl;

        string zd = line.substr(delimPos2+1,line.length());
        ZD = strtof(&zd[0],NULL);
        //cout<<"ZD  "<<ZD<<endl;
        //cout<<"d1  "<<delimPos<<"  d2  "<<delimPos2<<endl;

    }else if (dim == 2){ // 2d only needs y
        string yd = line.substr(delimPos+1,line.length());
        YD = strtof(&yd[0],NULL);
        //cout<<"YD  "<<YD<<endl;
        ZD = 1;
    }else{
        if(argv[1]!=NULL){
            cout<<"Config file read error"<<endl;
        }
    }
    
    // starting temp
    getline(inFile,line);
    while(line[0] == '#' || line.length() == 1){getline(inFile,line);}
    delimPos = line.find('\n');
    string startstring = line.substr(0,delimPos);
    float StTmp = strtof(&startstring[0],NULL);
    //cout<<"StTmp "<<StTmp<<endl;

    // heaters

    int hDims[300];
    float hTemps[75];
    char*dup; // get around line being annoying

    int count = 0;
    while(getline(inFile,line)){
        if(line[0] != '#' && line.length() > 1){
            if(dim == 2){
                dup = new char[line.size() + 1];
                copy(line.begin(),line.end(),dup);
                dup[line.size()] = '\0';
                hDims[0+count*4] = atoi(strtok(dup,","));
                //cout<<"this boi"<<hDims[0+count*4]<<endl;
                for(int i = 1; i < 4; i++){
                    hDims[i+count*4] = atoi(strtok(NULL,","));
                }
                hTemps[count] = atof(strtok(NULL,","));
                delete dup;

                count++;
            }else{ // for 3d
                dup = new char[line.size() + 1];
                copy(line.begin(),line.end(),dup);
                dup[line.size()] = '\0';
                hDims[0+count*6] = atoi(strtok(dup,","));
                //cout<<"this boi"<<hDims[0+count*4]<<endl;
                for(int i = 1; i < 6; i++){
                    hDims[i+count*6] = atoi(strtok(NULL,","));
                }
                hTemps[count] = atof(strtok(NULL,","));
                delete dup;

                count++;
            }
            
        }
    }
    //for(int i = 0; i < count*4; i++){
    //    cout<<hDims[i]<<endl;
    //}
    //cout<<"htemps 0 and 1  "<<hTemps[0]<<" "<<hTemps[1]<<endl;

    // use count to figure out how many heaters there are
    inFile.close();




    // k can be from 0 to 1/(number of neighbors)
    float k = K;
    int xDim = XD;
    int yDim = YD;
    int zDim = ZD;
    int timeSteps = TS;
    int gSize = xDim*yDim*zDim; // -1 for zero indexing
    float tOrig[gSize];
    float tOld[gSize];
    float tNew[gSize];
    //cout<<"StTmp "<<StTmp<<endl;
    // sets starting temp for nodes
    for(int i = 0; i < gSize; i++){
        tOrig[i] = StTmp + 0.0;
    }

    // place heaters
    int hLoc; // as one coord
    int hWidth,hHeight,hDepth;
    if(zDim == 1){
        for(int i = 0; i < count; i++){
            hLoc = hDims[0 + 4*i] + hDims[1 + 4*i]*xDim;
            hWidth = hDims[2 + 4*i];
            hHeight = hDims[3 + 4*i];
            for(int j = 0; j < hHeight; j++){
                for(int k = 0; k < hWidth; k++){
                    //cout<<"k "<<k<<"  j  "<<j<<"  hTemps[c]  "<<hTemps[i]<<endl;
                    tOrig[hLoc+k + xDim*j] = hTemps[i];
                    //cout<<"tOrig[]"<<tOrig[hLoc+k + xDim*j]<<endl;
                }
            }
        }
    }if(zDim > 1){ // 3d
        for(int i = 0; i < count; i++){
            hLoc = hDims[0 + 6*i] + hDims[1 + 6*i]*xDim + hDims[2 + 6*i]*xDim*yDim;
            hWidth = hDims[3 + 6*i];
            hHeight = hDims[4 + 6*i];
            hDepth = hDims[5 + 6*i];
            for(int h = 0; h < hDepth; h++){
                for(int j = 0; j < hHeight; j++){
                    for(int k = 0; k < hWidth; k++){
                        //cout<<"k "<<k<<"  j  "<<j<<"  hTemps[c]  "<<hTemps[i]<<endl;
                        tOrig[hLoc+k + xDim*j + xDim*yDim*h] = hTemps[i];
                        //cout<<"tOrig[]"<<tOrig[hLoc+k + xDim*j]<<endl;
                    }
                }
            }
            
        }
    }
    


    memcpy(tNew,tOrig, sizeof(tOld));
    memcpy(tOld,tNew, sizeof(tOld));

    // gets block count with maxed threads
    // each thread should handle one gridpoint at a time
    float gS = gSize;
    int BLOCKS = ceil(gS/1024);
    //cout<<"BLOCKS  "<<BLOCKS<<endl;

    float *d_new, *d_old, *d_orig;// *d_temp;

    cudaMalloc((void**)&d_new, gSize*sizeof(float)); // may need to be sizeof(gSize)
    cudaMalloc((void**)&d_old, gSize*sizeof(float)); // but I don't think so
    cudaMalloc((void**)&d_orig, gSize*sizeof(float)); 

    cudaMemcpy(d_new, tNew, gSize*sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_old, tOld, gSize*sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_orig, tOrig, gSize*sizeof(float), cudaMemcpyHostToDevice);

    // have to alternate calls, d_old = d_new doesn't work anymore for some reason
    // cout<<"timeSteps/2  "<<timeSteps/2<<endl;
    if(zDim == 1){
        for(int i = 0; i < timeSteps; i++){
            gpuIt<<<BLOCKS,1024>>>(d_new,d_old,d_orig,xDim,yDim,zDim,k,StTmp);
            cudaDeviceSynchronize(); // blocks all CPU until GPU done, TA says correct
            //cout<<"2d Call "<<i<<endl;
            i++;
            if(i < timeSteps){
                gpuIt<<<BLOCKS,1024>>>(d_old,d_new,d_orig,xDim,yDim,zDim,k,StTmp);
                cudaDeviceSynchronize();
                //cout<<"2d Call "<<i<<endl;
            }
        }
    }
    if(zDim > 1){
        for(int i = 0; i < timeSteps; i++){
            gpuIt3<<<BLOCKS,1024>>>(d_new,d_old,d_orig,xDim,yDim,zDim,k,StTmp);
            cudaDeviceSynchronize(); // blocks all CPU until GPU done, TA says correct
            //cout<<"3d Call "<<i<<endl;
            i++;
            if(i < timeSteps){
                gpuIt3<<<BLOCKS,1024>>>(d_old,d_new,d_orig,xDim,yDim,zDim,k,StTmp);
                cudaDeviceSynchronize();
                //cout<<"3d Call "<<i<<endl;
            }
            
        }
    }
    // since d_new and d_old alternate, get the most recent one
    if(timeSteps%2 == 1){
        cudaMemcpy(tNew, d_new, gSize*sizeof(float), cudaMemcpyDeviceToHost);
    }else{
        cudaMemcpy(tNew, d_old, gSize*sizeof(float), cudaMemcpyDeviceToHost);
    }

    // outputs to terminal for easy viewing
    //for(int h = 0; h < zDim; h++){
    //    for(int i = 0; i < yDim; i++){
    //    	for(int j = 0; j < xDim; j++){
    //    		cout<<tNew[j + i*xDim + h*xDim*yDim]<<" ";
    //    }
    //        cout<<endl;
    //        }
    //    cout<<endl;
    //}



    ofstream outFile;
    outFile.open("heatDoutput.csv");
    for(int h = 0; h < zDim; h++){
        for(int i = 0; i < yDim; i++){
            for(int j = 0; j < xDim; j++){
                outFile<<tNew[j + i*xDim + h*xDim*yDim]<<", ";
            }
            outFile<<endl;
        }
        outFile<<endl;
    }
    
    outFile.close();

    cudaFree(d_new);
    cudaFree(d_old);
    cudaFree(d_orig);
}

	.file	"tmpxft_00319b86_00000000-6_main.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4387:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4387:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z33__device_stub__Z5gpuItPfS_S_iiiffPfS_S_iiiff
	.type	_Z33__device_stub__Z5gpuItPfS_S_iiiffPfS_S_iiiff, @function
_Z33__device_stub__Z5gpuItPfS_S_iiiffPfS_S_iiiff:
.LFB4409:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movss	%xmm0, 8(%rsp)
	movss	%xmm1, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z5gpuItPfS_S_iiiff(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4409:
	.size	_Z33__device_stub__Z5gpuItPfS_S_iiiffPfS_S_iiiff, .-_Z33__device_stub__Z5gpuItPfS_S_iiiffPfS_S_iiiff
	.globl	_Z5gpuItPfS_S_iiiff
	.type	_Z5gpuItPfS_S_iiiff, @function
_Z5gpuItPfS_S_iiiff:
.LFB4410:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z5gpuItPfS_S_iiiffPfS_S_iiiff
	.cfi_endproc
.LFE4410:
	.size	_Z5gpuItPfS_S_iiiff, .-_Z5gpuItPfS_S_iiiff
	.globl	_Z34__device_stub__Z6gpuIt3PfS_S_iiiffPfS_S_iiiff
	.type	_Z34__device_stub__Z6gpuIt3PfS_S_iiiffPfS_S_iiiff, @function
_Z34__device_stub__Z6gpuIt3PfS_S_iiiffPfS_S_iiiff:
.LFB4411:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movss	%xmm0, 8(%rsp)
	movss	%xmm1, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z6gpuIt3PfS_S_iiiff(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L8:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4411:
	.size	_Z34__device_stub__Z6gpuIt3PfS_S_iiiffPfS_S_iiiff, .-_Z34__device_stub__Z6gpuIt3PfS_S_iiiffPfS_S_iiiff
	.globl	_Z6gpuIt3PfS_S_iiiff
	.type	_Z6gpuIt3PfS_S_iiiff, @function
_Z6gpuIt3PfS_S_iiiff:
.LFB4412:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z6gpuIt3PfS_S_iiiffPfS_S_iiiff
	.cfi_endproc
.LFE4412:
	.size	_Z6gpuIt3PfS_S_iiiff, .-_Z6gpuIt3PfS_S_iiiff
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z6gpuIt3PfS_S_iiiff"
.LC1:
	.string	"_Z5gpuItPfS_S_iiiff"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4414:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z6gpuIt3PfS_S_iiiff(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z5gpuItPfS_S_iiiff(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4414:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC3:
	.string	"Error, no config file specified."
.LC4:
	.string	"Config file read error"
.LC5:
	.string	","
.LC8:
	.string	"heatDoutput.csv"
.LC9:
	.string	", "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4383:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4383
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$8, %edx
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	movq	%rsi, %r13
	pushq	%r12
	pushq	%rbx
	subq	$2872, %rsp
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movq	8(%rsi), %rsi
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	leaq	-1776(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2848(%rbp)
.LEHB0:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE0:
	leaq	-2784(%rbp), %rax
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	movq	%rax, -2840(%rbp)
	movq	-2848(%rbp), %rdi
	leaq	-2768(%rbp), %rax
	movq	-2840(%rbp), %rsi
	movq	%rax, -2784(%rbp)
	leaq	-2736(%rbp), %rax
	movq	%rdx, -2776(%rbp)
	movb	$0, -2768(%rbp)
	movq	%rax, -2752(%rbp)
	movq	%rcx, -2744(%rbp)
	movb	$0, -2736(%rbp)
.LEHB1:
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE@PLT
	cmpq	$0, 8(%r13)
	jne	.L19
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L19:
	movq	-2784(%rbp), %rax
	movsbl	(%rax), %r12d
	cmpb	$35, %r12b
	je	.L17
	cmpq	$1, -2776(%rbp)
	jne	.L18
.L17:
	movq	-2840(%rbp), %rsi
	movq	-2848(%rbp), %rdi
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE@PLT
	jmp	.L19
.L18:
	leal	-48(%r12), %eax
	movl	%eax, -2852(%rbp)
.L136:
	movq	-2840(%rbp), %rsi
	movq	-2848(%rbp), %rdi
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE@PLT
	movq	-2784(%rbp), %rax
	cmpb	$35, (%rax)
	je	.L136
	cmpq	$1, -2776(%rbp)
	je	.L136
	movq	-2840(%rbp), %rdi
	xorl	%edx, %edx
	movl	$10, %esi
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcm@PLT
	movq	-2840(%rbp), %rsi
	leaq	-2720(%rbp), %rdi
	xorl	%edx, %edx
	movslq	%eax, %rcx
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6substrEmm@PLT
.LEHE1:
	movq	-2720(%rbp), %rdi
	xorl	%esi, %esi
	call	strtof@PLT
	movss	%xmm0, -2872(%rbp)
.L138:
	movq	-2840(%rbp), %rsi
	movq	-2848(%rbp), %rdi
.LEHB2:
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE@PLT
	movq	-2784(%rbp), %rax
	cmpb	$35, (%rax)
	je	.L138
	cmpq	$1, -2776(%rbp)
	je	.L138
	movq	-2840(%rbp), %rdi
	xorl	%edx, %edx
	movl	$10, %esi
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcm@PLT
	movq	-2840(%rbp), %rsi
	leaq	-2688(%rbp), %rdi
	xorl	%edx, %edx
	movslq	%eax, %rcx
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6substrEmm@PLT
.LEHE2:
	movq	-2688(%rbp), %rdi
	xorl	%esi, %esi
	call	strtof@PLT
	movss	%xmm0, -2884(%rbp)
.L140:
	movq	-2840(%rbp), %rsi
	movq	-2848(%rbp), %rdi
.LEHB3:
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE@PLT
	movq	-2784(%rbp), %rax
	cmpb	$35, (%rax)
	je	.L140
	cmpq	$1, -2776(%rbp)
	je	.L140
	movq	-2840(%rbp), %rdi
	xorl	%edx, %edx
	movl	$44, %esi
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcm@PLT
	movq	-2840(%rbp), %rsi
	leaq	-2656(%rbp), %rdi
	xorl	%edx, %edx
	movslq	%eax, %rcx
	movq	%rax, %rbx
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6substrEmm@PLT
.LEHE3:
	movq	-2656(%rbp), %rdi
	xorl	%esi, %esi
	call	strtof@PLT
	cmpl	$3, -2852(%rbp)
	movss	%xmm0, -2888(%rbp)
	jne	.L29
	incl	%ebx
	movq	-2840(%rbp), %rdi
	movl	$44, %esi
	leaq	-2288(%rbp), %r13
	movslq	%ebx, %r14
	movq	%r14, %rdx
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcm@PLT
	movq	-2840(%rbp), %rsi
	movq	%r14, %rdx
	movq	%r13, %rdi
	movslq	%eax, %rcx
	movq	%rax, %rbx
.LEHB4:
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6substrEmm@PLT
.LEHE4:
	movq	-2288(%rbp), %rdi
	xorl	%esi, %esi
	leaq	-1256(%rbp), %r14
	call	strtof@PLT
	leal	1(%rbx), %edx
	movq	-2776(%rbp), %rcx
	movq	%r14, %rdi
	movq	-2840(%rbp), %rsi
	movslq	%edx, %rdx
	movss	%xmm0, -2864(%rbp)
.LEHB5:
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6substrEmm@PLT
.LEHE5:
	movq	-1256(%rbp), %rdi
	xorl	%esi, %esi
	call	strtof@PLT
	movq	%r14, %rdi
	movss	%xmm0, -2880(%rbp)
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%r13, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L30
.L29:
	cmpl	$2, -2852(%rbp)
	jne	.L31
	leaq	-1256(%rbp), %r13
	leal	1(%rbx), %edx
	movq	-2776(%rbp), %rcx
	movq	-2840(%rbp), %rsi
	movslq	%edx, %rdx
	movq	%r13, %rdi
.LEHB6:
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6substrEmm@PLT
	movq	-1256(%rbp), %rdi
	xorl	%esi, %esi
	call	strtof@PLT
	movq	%r13, %rdi
	movss	%xmm0, -2864(%rbp)
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movss	.LC2(%rip), %xmm2
	movss	%xmm2, -2880(%rbp)
	jmp	.L30
.L31:
	cmpq	$0, 8(%r13)
	je	.L30
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L30:
	movq	-2840(%rbp), %rsi
	movq	-2848(%rbp), %rdi
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE@PLT
	movq	-2784(%rbp), %rax
	cmpb	$35, (%rax)
	je	.L30
	cmpq	$1, -2776(%rbp)
	je	.L30
	movq	-2840(%rbp), %rdi
	xorl	%edx, %edx
	movl	$10, %esi
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcm@PLT
	movq	-2840(%rbp), %rsi
	leaq	-2624(%rbp), %rdi
	xorl	%edx, %edx
	movslq	%eax, %rcx
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6substrEmm@PLT
.LEHE6:
	movq	-2624(%rbp), %rdi
	xorl	%esi, %esi
	xorl	%r12d, %r12d
	call	strtof@PLT
	movss	%xmm0, -2856(%rbp)
.L36:
	movq	-2840(%rbp), %rsi
	movq	-2848(%rbp), %rdi
.LEHB7:
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE@PLT
	movq	(%rax), %rdx
	movq	-24(%rdx), %rdx
	testb	$5, 32(%rax,%rdx)
	jne	.L146
	movq	-2784(%rbp), %rax
	cmpb	$35, (%rax)
	je	.L36
	movq	-2776(%rbp), %rdi
	cmpq	$1, %rdi
	jbe	.L36
	incq	%rdi
	cmpl	$2, -2852(%rbp)
	leaq	-1256(%rbp), %r15
	movslq	%r12d, %rbx
	jne	.L38
	call	_Znam@PLT
	movq	-2776(%rbp), %r14
	movq	-2784(%rbp), %rsi
	movq	%rax, %r13
	cmpq	$1, %r14
	jle	.L39
	movq	%r14, %rdx
	movq	%rax, %rdi
	call	memmove@PLT
	jmp	.L40
.L39:
	jne	.L40
	movb	(%rsi), %al
	movb	%al, 0(%r13)
.L40:
	movb	$0, 0(%r13,%r14)
	leaq	.LC5(%rip), %rsi
	movq	%r13, %rdi
	salq	$4, %rbx
	addq	%r15, %rbx
	movl	$1, %r15d
	call	strtok@PLT
	movq	%rax, %rdi
	call	atoi@PLT
	movl	%eax, %edx
	leal	0(,%r12,4), %eax
	cltq
	movl	%edx, -1256(%rbp,%rax,4)
.L41:
	leaq	.LC5(%rip), %rsi
	xorl	%edi, %edi
	call	strtok@PLT
	movq	%rax, %rdi
	call	atoi@PLT
	movl	%eax, (%rbx,%r15,4)
	incq	%r15
	cmpq	$4, %r15
	jne	.L41
	jmp	.L142
.L38:
	call	_Znam@PLT
	movq	-2776(%rbp), %r14
	movq	-2784(%rbp), %rsi
	movq	%rax, %r13
	cmpq	$1, %r14
	jle	.L42
	movq	%r14, %rdx
	movq	%rax, %rdi
	call	memmove@PLT
	jmp	.L43
.L42:
	jne	.L43
	movb	(%rsi), %al
	movb	%al, 0(%r13)
.L43:
	movb	$0, 0(%r13,%r14)
	leaq	.LC5(%rip), %rsi
	movq	%r13, %rdi
	imulq	$24, %rbx, %rbx
	call	strtok@PLT
	movq	%rax, %rdi
	addq	%r15, %rbx
	movl	$1, %r15d
	call	atoi@PLT
	movl	%eax, %edx
	imull	$6, %r12d, %eax
	cltq
	movl	%edx, -1256(%rbp,%rax,4)
.L44:
	leaq	.LC5(%rip), %rsi
	xorl	%edi, %edi
	call	strtok@PLT
	movq	%rax, %rdi
	call	atoi@PLT
	movl	%eax, (%rbx,%r15,4)
	incq	%r15
	cmpq	$6, %r15
	jne	.L44
.L142:
	leaq	.LC5(%rip), %rsi
	xorl	%edi, %edi
	call	strtok@PLT
	movq	%rax, %rdi
	call	atof@PLT
	movslq	%r12d, %rax
	movl	$1, %esi
	movq	%r13, %rdi
	cvtsd2ss	%xmm0, %xmm0
	incl	%r12d
	movss	%xmm0, -2588(%rbp,%rax,4)
	call	_ZdlPvm@PLT
	jmp	.L36
.L146:
	movq	-2848(%rbp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv@PLT
	cvttss2sil	-2864(%rbp), %eax
	movq	%rsp, %rcx
	cvttss2sil	-2888(%rbp), %r15d
	cvttss2sil	-2884(%rbp), %r14d
	movl	%eax, -2848(%rbp)
	cvttss2sil	-2880(%rbp), %eax
	movl	-2848(%rbp), %r10d
	imull	%r15d, %r10d
	movl	%eax, %r13d
	movl	%eax, -2852(%rbp)
	imull	%r10d, %r13d
	movslq	%r13d, %rax
	salq	$2, %rax
	movq	%rax, -2840(%rbp)
	addq	$15, %rax
	movq	%rax, %rsi
	movq	%rax, %rdx
	andq	$-4096, %rsi
	andq	$-16, %rdx
	subq	%rsi, %rcx
.L46:
	cmpq	%rcx, %rsp
	je	.L47
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L46
.L47:
	andl	$4095, %edx
	subq	%rdx, %rsp
	testq	%rdx, %rdx
	je	.L48
	orq	$0, -8(%rsp,%rdx)
.L48:
	movq	%rax, %rsi
	movq	%rax, %rdx
	movq	%rsp, %rcx
	movq	%rsp, %rbx
	andq	$-4096, %rsi
	andq	$-16, %rdx
	subq	%rsi, %rcx
.L49:
	cmpq	%rcx, %rsp
	je	.L50
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L49
.L50:
	andl	$4095, %edx
	subq	%rdx, %rsp
	testq	%rdx, %rdx
	je	.L51
	orq	$0, -8(%rsp,%rdx)
.L51:
	movq	%rsp, -2880(%rbp)
	movq	%rax, %rdx
	movq	%rsp, %rcx
	andq	$-4096, %rax
	andq	$-16, %rdx
	subq	%rax, %rcx
.L52:
	cmpq	%rcx, %rsp
	je	.L53
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L52
.L53:
	movq	%rdx, %rax
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L54
	orq	$0, -8(%rsp,%rax)
.L54:
	movq	%rsp, -2864(%rbp)
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
.L55:
	cmpl	%eax, %r13d
	jle	.L147
	movss	-2856(%rbp), %xmm1
	addss	%xmm0, %xmm1
	movss	%xmm1, (%rbx,%rax,4)
	incq	%rax
	jmp	.L55
.L147:
	cmpl	$1, -2852(%rbp)
	jne	.L57
	leaq	-1256(%rbp), %rax
	xorl	%edx, %edx
	jmp	.L58
.L57:
	jle	.L59
	leaq	-1256(%rbp), %rax
	xorl	%edx, %edx
	jmp	.L60
.L63:
	incq	%rdx
	addq	$16, %rax
.L58:
	cmpl	%edx, %r12d
	jle	.L59
	movl	4(%rax), %edi
	movl	8(%rax), %r10d
	xorl	%esi, %esi
	xorl	%r8d, %r8d
	movl	12(%rax), %r11d
	imull	%r15d, %edi
	addl	(%rax), %edi
.L61:
	cmpl	%r11d, %r8d
	jge	.L63
	leal	(%rdi,%rsi), %ecx
	movslq	%ecx, %rcx
	leaq	(%rbx,%rcx,4), %r9
	xorl	%ecx, %ecx
.L64:
	cmpl	%ecx, %r10d
	jle	.L148
	movss	-2588(%rbp,%rdx,4), %xmm0
	movss	%xmm0, (%r9,%rcx,4)
	incq	%rcx
	jmp	.L64
.L148:
	incl	%r8d
	addl	%r15d, %esi
	jmp	.L61
.L59:
	movq	-2840(%rbp), %rcx
	movq	-2864(%rbp), %rdi
	movq	%rbx, %rsi
	movq	%rcx, %rdx
	call	__memcpy_chk@PLT
	movq	-2840(%rbp), %rcx
	movq	-2864(%rbp), %rsi
	movq	-2880(%rbp), %rdi
	movq	%rcx, %rdx
	call	__memcpy_chk@PLT
	cvtsi2ssl	%r13d, %xmm0
	mulss	.LC7(%rip), %xmm0
	call	ceilf@PLT
	movq	-2840(%rbp), %rsi
	leaq	-2832(%rbp), %rdi
	cvttss2sil	%xmm0, %r12d
	call	cudaMalloc@PLT
	jmp	.L149
.L71:
	incq	%rdx
	addq	$24, %rax
.L60:
	cmpl	%edx, %r12d
	jle	.L59
	movl	8(%rax), %ecx
	movl	-2848(%rbp), %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	4(%rax), %esi
	imull	%r15d, %ecx
	imull	%r15d, %esi
	addl	(%rax), %esi
	imull	%edi, %ecx
	addl	%esi, %ecx
	movl	%ecx, -2884(%rbp)
	movl	12(%rax), %ecx
	movl	%ecx, -2888(%rbp)
	movl	16(%rax), %ecx
	movl	%ecx, -2892(%rbp)
	movl	20(%rax), %ecx
	movl	%ecx, -2896(%rbp)
.L67:
	movl	-2896(%rbp), %ecx
	cmpl	%ecx, %r8d
	jge	.L71
	xorl	%edi, %edi
	xorl	%esi, %esi
.L72:
	movl	-2892(%rbp), %ecx
	cmpl	%ecx, %esi
	jge	.L69
	movl	-2884(%rbp), %ecx
	addl	%edi, %ecx
	addl	%r9d, %ecx
	movslq	%ecx, %rcx
	leaq	(%rbx,%rcx,4), %rcx
	movq	%rcx, -2904(%rbp)
	xorl	%ecx, %ecx
.L70:
	cmpl	%ecx, -2888(%rbp)
	jle	.L150
	movss	-2588(%rbp,%rdx,4), %xmm0
	movq	-2904(%rbp), %r11
	movss	%xmm0, (%r11,%rcx,4)
	incq	%rcx
	jmp	.L70
.L150:
	incl	%esi
	addl	%r15d, %edi
	jmp	.L72
.L69:
	incl	%r8d
	addl	%r10d, %r9d
	jmp	.L67
.L149:
	movq	-2840(%rbp), %rsi
	leaq	-2824(%rbp), %rdi
	call	cudaMalloc@PLT
	movq	-2840(%rbp), %rsi
	leaq	-2816(%rbp), %rdi
	call	cudaMalloc@PLT
	movq	-2840(%rbp), %rdx
	movq	-2864(%rbp), %rsi
	movl	$1, %ecx
	movq	-2832(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-2840(%rbp), %rdx
	movq	-2880(%rbp), %rsi
	movl	$1, %ecx
	movq	-2824(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-2840(%rbp), %rdx
	movq	-2816(%rbp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movabsq	$4294968320, %r13
	xorl	%ebx, %ebx
	cmpl	$1, -2852(%rbp)
	je	.L74
	jg	.L75
	jmp	.L76
.L80:
	movl	%r12d, -2808(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, %rdx
	movabsq	$4294967297, %rax
	movl	$1, %ecx
	movq	%r13, -2796(%rbp)
	movq	%rax, -2804(%rbp)
	movl	-2800(%rbp), %esi
	movq	-2808(%rbp), %rdi
	movl	$1, -2788(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L151
.L77:
	call	cudaDeviceSynchronize@PLT
	leal	1(%rbx), %eax
	cmpl	%eax, %r14d
	jg	.L152
.L78:
	addl	$2, %ebx
.L74:
	cmpl	%r14d, %ebx
	jl	.L80
	jmp	.L76
.L151:
	movss	-2856(%rbp), %xmm1
	movss	-2872(%rbp), %xmm0
	movl	$1, %r9d
	movl	%r15d, %ecx
	movl	-2848(%rbp), %r8d
	movq	-2816(%rbp), %rdx
	movq	-2824(%rbp), %rsi
	movq	-2832(%rbp), %rdi
	call	_Z33__device_stub__Z5gpuItPfS_S_iiiffPfS_S_iiiff
	jmp	.L77
.L152:
	movl	%r12d, -2808(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, %rdx
	movabsq	$4294967297, %rax
	movl	$1, %ecx
	movq	%r13, -2796(%rbp)
	movq	%rax, -2804(%rbp)
	movl	-2800(%rbp), %esi
	movq	-2808(%rbp), %rdi
	movl	$1, -2788(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L79
	movss	-2856(%rbp), %xmm1
	movss	-2872(%rbp), %xmm0
	movl	$1, %r9d
	movl	%r15d, %ecx
	movl	-2848(%rbp), %r8d
	movq	-2816(%rbp), %rdx
	movq	-2832(%rbp), %rsi
	movq	-2824(%rbp), %rdi
	call	_Z33__device_stub__Z5gpuItPfS_S_iiiffPfS_S_iiiff
.L79:
	call	cudaDeviceSynchronize@PLT
	jmp	.L78
.L86:
	movl	%r12d, -2808(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, %rdx
	movabsq	$4294967297, %rax
	movl	$1, %ecx
	movq	%r13, -2796(%rbp)
	movq	%rax, -2804(%rbp)
	movl	-2800(%rbp), %esi
	movq	-2808(%rbp), %rdi
	movl	$1, -2788(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L153
.L83:
	call	cudaDeviceSynchronize@PLT
	leal	1(%rbx), %eax
	cmpl	%eax, %r14d
	jg	.L154
.L84:
	addl	$2, %ebx
.L75:
	cmpl	%r14d, %ebx
	jl	.L86
.L76:
	movl	%r14d, %eax
	movl	$2, %ecx
	cltd
	idivl	%ecx
	decl	%edx
	jne	.L132
	movq	-2840(%rbp), %rdx
	movq	-2832(%rbp), %rsi
	movl	$2, %ecx
	jmp	.L144
.L153:
	movss	-2856(%rbp), %xmm1
	movss	-2872(%rbp), %xmm0
	movl	%r15d, %ecx
	movl	-2852(%rbp), %r9d
	movl	-2848(%rbp), %r8d
	movq	-2816(%rbp), %rdx
	movq	-2824(%rbp), %rsi
	movq	-2832(%rbp), %rdi
	call	_Z34__device_stub__Z6gpuIt3PfS_S_iiiffPfS_S_iiiff
	jmp	.L83
.L154:
	movl	%r12d, -2808(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, %rdx
	movabsq	$4294967297, %rax
	movl	$1, %ecx
	movq	%r13, -2796(%rbp)
	movq	%rax, -2804(%rbp)
	movl	-2800(%rbp), %esi
	movq	-2808(%rbp), %rdi
	movl	$1, -2788(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L85
	movss	-2856(%rbp), %xmm1
	movss	-2872(%rbp), %xmm0
	movl	%r15d, %ecx
	movl	-2852(%rbp), %r9d
	movl	-2848(%rbp), %r8d
	movq	-2816(%rbp), %rdx
	movq	-2832(%rbp), %rsi
	movq	-2824(%rbp), %rdi
	call	_Z34__device_stub__Z6gpuIt3PfS_S_iiiffPfS_S_iiiff
.L85:
	call	cudaDeviceSynchronize@PLT
	jmp	.L84
.L132:
	movq	-2840(%rbp), %rdx
	movq	-2824(%rbp), %rsi
	movl	$2, %ecx
.L144:
	movq	-2864(%rbp), %rdi
	call	cudaMemcpy@PLT
	leaq	-2288(%rbp), %rax
	movq	%rax, %rdi
	movq	%rax, -2840(%rbp)
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE7:
	movq	-2840(%rbp), %rdi
	movl	$16, %edx
	leaq	.LC8(%rip), %rsi
.LEHB8:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	movl	-2848(%rbp), %eax
	xorl	%r13d, %r13d
	xorl	%r12d, %r12d
	imull	%r15d, %eax
	movl	%eax, -2880(%rbp)
.L88:
	movl	-2852(%rbp), %eax
	cmpl	%eax, %r12d
	jge	.L155
	xorl	%eax, %eax
	xorl	%r14d, %r14d
	movl	%eax, -2856(%rbp)
.L92:
	movl	-2848(%rbp), %ebx
	cmpl	%ebx, -2856(%rbp)
	jge	.L90
	movq	-2864(%rbp), %rbx
	leal	(%r14,%r13), %eax
	cltq
	leaq	(%rbx,%rax,4), %rax
	xorl	%ebx, %ebx
	movq	%rax, -2872(%rbp)
.L91:
	cmpl	%ebx, %r15d
	jle	.L156
	movq	-2872(%rbp), %rax
	movq	-2840(%rbp), %rdi
	cvtss2sd	(%rax,%rbx,4), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	leaq	.LC9(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	incq	%rbx
	jmp	.L91
.L156:
	movq	-2840(%rbp), %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	incl	-2856(%rbp)
	addl	%r15d, %r14d
	jmp	.L92
.L90:
	movq	-2840(%rbp), %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	-2880(%rbp), %eax
	incl	%r12d
	addl	%eax, %r13d
	jmp	.L88
.L155:
	movq	-2840(%rbp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
	movq	-2832(%rbp), %rdi
	call	cudaFree@PLT
	movq	-2824(%rbp), %rdi
	call	cudaFree@PLT
	movq	-2816(%rbp), %rdi
	call	cudaFree@PLT
.LEHE8:
	movq	-2840(%rbp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	leaq	-2624(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	leaq	-2656(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	leaq	-2688(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	leaq	-2720(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	leaq	-2752(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	leaq	-2784(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	leaq	-1776(%rbp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L101
	jmp	.L133
.L109:
	endbr64
	movq	%rax, %rbx
.L93:
	movq	%r13, %rdi
	jmp	.L145
.L111:
	endbr64
	movq	%rax, %rbx
.L95:
	movq	-2840(%rbp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	jmp	.L96
.L110:
	endbr64
	movq	%rax, %rbx
.L96:
	leaq	-2624(%rbp), %rdi
.L145:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L94
.L108:
	endbr64
	movq	%rax, %rbx
.L94:
	leaq	-2656(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L97
.L107:
	endbr64
	movq	%rax, %rbx
.L97:
	leaq	-2688(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L98
.L106:
	endbr64
	movq	%rax, %rbx
.L98:
	leaq	-2720(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L99
.L105:
	endbr64
	movq	%rax, %rbx
.L99:
	leaq	-2752(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	leaq	-2784(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	leaq	-1776(%rbp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L133
	movq	%rbx, %rdi
.LEHB9:
	call	_Unwind_Resume@PLT
.LEHE9:
.L133:
	call	__stack_chk_fail@PLT
.L101:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4383:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4383:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4383-.LLSDACSB4383
.LLSDACSB4383:
	.uleb128 .LEHB0-.LFB4383
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4383
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L105-.LFB4383
	.uleb128 0
	.uleb128 .LEHB2-.LFB4383
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L106-.LFB4383
	.uleb128 0
	.uleb128 .LEHB3-.LFB4383
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L107-.LFB4383
	.uleb128 0
	.uleb128 .LEHB4-.LFB4383
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L108-.LFB4383
	.uleb128 0
	.uleb128 .LEHB5-.LFB4383
	.uleb128 .LEHE5-.LEHB5
	.uleb128 .L109-.LFB4383
	.uleb128 0
	.uleb128 .LEHB6-.LFB4383
	.uleb128 .LEHE6-.LEHB6
	.uleb128 .L108-.LFB4383
	.uleb128 0
	.uleb128 .LEHB7-.LFB4383
	.uleb128 .LEHE7-.LEHB7
	.uleb128 .L110-.LFB4383
	.uleb128 0
	.uleb128 .LEHB8-.LFB4383
	.uleb128 .LEHE8-.LEHB8
	.uleb128 .L111-.LFB4383
	.uleb128 0
	.uleb128 .LEHB9-.LFB4383
	.uleb128 .LEHE9-.LEHB9
	.uleb128 0
	.uleb128 0
.LLSDACSE4383:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1065353216
	.align 4
.LC7:
	.long	981467136
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <algorithm>
#include <fstream> 
#include <iostream>
#include <vector>
#include <math.h>
#include <string>
#include <stdlib.h>

// qsub -I -q coc-ice -l nodes=1:ppn=1:nvidiagpu,walltime=2:00:00,pmem=2gb
// qsub -I -q coc-ice -l nodes=1:ppn=1:nvidiagpu:teslap100,walltime=2:00:00,pmem=2gb
// ssh -x nolivares3@coc-ice.pace.gatech.edu
using namespace std;

// global code runs on the device
// need to have one thread correspond to multiple gridpoints
__global__ void gpuIt(float *tNew,float *tOld,float *tOrig,int x,int y,int z,float k,float st) {

    int i = threadIdx.x + blockIdx.x * blockDim.x;
    // may want an if(i < x*y*z) to prevent overflowing, likea thisa
    if(i < x*y*z){

    if(i == 0){ // top left corner
        tNew[i] = tOld[i] + k*(tOld[i+1] + tOld[i] + tOld[i] + tOld[i+x] - 4*tOld[i]);
        //tNew[i] = 1;
    }
    else if(i == x-1){ // top right corner
        tNew[i] = tOld[i] + k*(tOld[i] + tOld[i-1] + tOld[i] + tOld[i+x] - 4*tOld[i]);
        //tNew[i] = 3;
    }
    else if(i == x*y - 1){ // bottom right corner
        tNew[i] = tOld[i] + k*(tOld[i] + tOld[i-1] + tOld[i-x] + tOld[i] - 4*tOld[i]);
        //tNew[i] = 5;
    }
    else if(i == x*y - x){ // bottom left corner
        tNew[i] = tOld[i] + k*(tOld[i+1] + tOld[i] + tOld[i-x] + tOld[i] - 4*tOld[i]);
        //tNew[i] = 7;
    }
    else if(i%x == 0){ // left side
        tNew[i] = tOld[i] + k*(tOld[i+1] + tOld[i] + tOld[i-x] + tOld[i+x] - 4*tOld[i]);
        //tNew[i] = 8;
    }
    else if(i%x == x-1){ // right side
        tNew[i] = tOld[i] + k*(tOld[i] + tOld[i-1] + tOld[i-x] + tOld[i+x] - 4*tOld[i]);
        //tNew[i] = 4;
    }
    else if(i - x < 0){ // top row
        tNew[i] = tOld[i] + k*(tOld[i+1] + tOld[i-1] + tOld[i] + tOld[i+x] - 4*tOld[i]);
        //tNew[i] = 2;
    }
    else if(i + x > x*y){ // bottom row
        tNew[i] = tOld[i] + k*(tOld[i+1] + tOld[i-1] + tOld[i-x] + tOld[i] - 4*tOld[i]);
        //tNew[i] = 6;
    }
    else{
        tNew[i] = tOld[i] + k*(tOld[i+1] + tOld[i-1] + tOld[i-x] + tOld[i+x] - 4*tOld[i]);
        //tNew[i] = 9;
    }
    //tNew[i] = i; // for debugging
    // replace heaters
    if(tOrig[i] != st){
        tNew[i] = tOrig[i];
    }
    //tNew[i] = i%x;
    }
}

// thisll work for 3d, less if/elses this way
__global__ void gpuIt3(float *tNew,float *tOld,float *tOrig,int x,int y,int z,float k,float st) {
    int i = threadIdx.x + blockIdx.x * blockDim.x;
if(i < x*y*z){

    if(i == 0){ // front upper left corner
        tNew[i] = tOld[i]+k*(tOld[i]+tOld[i+(x*y)]+tOld[i]+tOld[i+x]+tOld[i]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 0;
    }
    else if(i == x-1){ // front upper right corner
        tNew[i] = tOld[i]+k*(tOld[i]+tOld[i+(x*y)]+tOld[i]+tOld[i+x]+tOld[i-1]+tOld[i]-6*tOld[i]);
        //tNew[i] = .1;
    }
    else if(i == x*y-1){ // front lower right corner
        tNew[i] = tOld[i]+k*(tOld[i]+tOld[i+(x*y)]+tOld[i-x]+tOld[i]+tOld[i-1]+tOld[i]-6*tOld[i]);
        //tNew[i] = .2;
    }
    else if(i == x*y-x){ // front lower left corner
        tNew[i] = tOld[i]+k*(tOld[i]+tOld[i+(x*y)]+tOld[i-x]+tOld[i]+tOld[i]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = .3;
    }
    else if(i == x*y*(z-1) ){ // back upper left corner
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i]+tOld[i]+tOld[i+x]+tOld[i]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = .4;
    }
    else if(i == x*y*(z-1) + x-1){ // back upper right corner
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i]+tOld[i]+tOld[i+x]+tOld[i-1]+tOld[i]-6*tOld[i]);
        //tNew[i] = .5;
    }
    else if(i == x*y*z-1){ // back lower right corner
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i]+tOld[i-x]+tOld[i]+tOld[i-1]+tOld[i]-6*tOld[i]);
        //tNew[i] = .6;
    }
    else if(i == x*y*z - x){ // back lower left corner
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i]+tOld[i-x]+tOld[i]+tOld[i]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = .7;
    }

    else if(i - x < 0){ // front top edge
        tNew[i] = tOld[i]+k*(tOld[i]+tOld[i+(x*y)]+tOld[i]+tOld[i+x]+tOld[i-1]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = .8;
    }
    else if(i%x == x-1 && i<x*y){ // front right edge
        tNew[i] = tOld[i]+k*(tOld[i]+tOld[i+(x*y)]+tOld[i-x]+tOld[i+x]+tOld[i-1]+tOld[i]-6*tOld[i]);
        //tNew[i] = .9;
    }
    else if(i+x > x*y && i < (x*y)){ // front bottom edge
        tNew[i] = tOld[i]+k*(tOld[i]+tOld[i+(x*y)]+tOld[i-x]+tOld[i]+tOld[i-1]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 1;
    }
    else if(i%x == 0 && i<x*y){ // front left edge
        tNew[i] = tOld[i]+k*(tOld[i]+tOld[i+(x*y)]+tOld[i-x]+tOld[i+x]+tOld[i]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 2;
    }

    else if(i > (x*y*z - x*y) && i < (x*y*z - (x-1)*y)){ // back top edge
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i]+tOld[i]+tOld[i+x]+tOld[i-1]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 3;
    }
    else if(i%x == x-1 && i > (x*y*(z-1))){ // back right edge
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i]+tOld[i-x]+tOld[i+x]+tOld[i-1]+tOld[i]-6*tOld[i]);
        //tNew[i] = 4;
    }
    else if(i+x > x*y*z){ // back bottom edge
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i]+tOld[i-x]+tOld[i]+tOld[i-1]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 5;
    }
    else if(i%x == 0 && i > x*y*(z-1)){ // back left edge
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i]+tOld[i-x]+tOld[i+x]+tOld[i]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 6;
    }

    // the corner sides going front to back
    else if(i%(x*y) == 0){ // upper left edge
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i+(x*y)]+tOld[i]+tOld[i+x]+tOld[i]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 7;
    }
    else if(i%(x*y) == x-1){ // upper right edge
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i+(x*y)]+tOld[i]+tOld[i+x]+tOld[i-1]+tOld[i]-6*tOld[i]);
        //tNew[i] = 8;
    }
    else if(i%(x*y) == x*y-1){ // lower right edge
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i+(x*y)]+tOld[i-x]+tOld[i]+tOld[i-1]+tOld[i]-6*tOld[i]);
        //tNew[i] = 9;
    }
    else if(i%(x*y) == x*y-x){ // lower left edge
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i+(x*y)]+tOld[i-x]+tOld[i]+tOld[i]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 9.1;
    }

    // else ifs here are vague because other options already completed
    else if(i < x*y){ // front face
        tNew[i] = tOld[i]+k*(tOld[i]+tOld[i+(x*y)]+tOld[i-x]+tOld[i+x]+tOld[i-1]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 1.1;
    }
    else if(i > x*y*(z-1)){ // back face
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i]+tOld[i-x]+tOld[i+x]+tOld[i-1]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 1.2;
    }
    else if(i%(x*y) < x){ // top face
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i+(x*y)]+tOld[i]+tOld[i+x]+tOld[i-1]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 1.3;
    }
    else if(i%(x*y) > x*(y-1)){ // bottom face
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i+(x*y)]+tOld[i-x]+tOld[i]+tOld[i-1]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 1.4;
    }
    else if(i%(x) == x-1){ // right face
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i+(x*y)]+tOld[i-x]+tOld[i+x]+tOld[i-1]+tOld[i]-6*tOld[i]);
        //tNew[i] = 1.5;
    }
    else if(i%(x) == 0){ // left face
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i+(x*y)]+tOld[i-x]+tOld[i+x]+tOld[i]+tOld[i+1]-6*tOld[i]);
        //tNew[i] = 1.6;
    }
    else{ // all in the middle
        //                       front        back         top       bottom     left     right 
        tNew[i] = tOld[i]+k*(tOld[i-(x*y)]+tOld[i+(x*y)]+tOld[i-x]+tOld[i+x]+tOld[i-1]+tOld[i+1]-6*tOld[i]);
    }


//tNew[i] = i%(x*y);
// replace heaters
if(tOrig[i] != st){
    tNew[i] = tOrig[i];
}

}
}


// blockIdx.x for blocks, threadIdx.x for threads
// name<<<blocks,threads per block>>>
// 


// host is cpu




int main(int argc, char** argv) {
    //cout<<argv[1]<<endl;
    int dim;
    ifstream inFile(argv[1]);

    string line;
    string dims;
    //string heaters;
    getline(inFile,line);
    if(argv[1]==NULL){
        cout<<"Error, no config file specified."<<endl;
    }
    // move to next nums
    while(line[0] == '#' || line.length() == 1){getline(inFile,line);}
    // gets 2d/3d as an int of 2 or 3
    if(line[0] != '#' && line.length() != 1){
        dim = line[0] - 48; // ascii starts at 48
        //cout<<"dim  "<<dim<<endl;
    }
    getline(inFile,line);

    // k value
    while(line[0] == '#' || line.length() == 1){getline(inFile,line);}
    int delimPos = line.find('\n');
    string kstring = line.substr(0,delimPos);
    float K = strtof(&kstring[0],NULL);
    //cout<<"K "<<K<<endl;

    // timesteps
    getline(inFile,line);
    while(line[0] == '#' || line.length() == 1){getline(inFile,line);}
    delimPos = line.find('\n');
    string ts = line.substr(0,delimPos);
    float TS = strtof(&ts[0],NULL);
    //cout<<"TS  "<<TS<<endl;

    // dims
    getline(inFile,line);
    while(line[0] == '#' || line.length() == 1){getline(inFile,line);}
    delimPos = line.find(',');
    string xd = line.substr(0,delimPos);
    float XD = strtof(&xd[0],NULL);
    //cout<<"XD  "<<XD<<endl;
    float YD, ZD;
    if(dim == 3){
        int delimPos2 = line.find(',',delimPos+1);
        string yd = line.substr(delimPos+1,delimPos2);
        YD = strtof(&yd[0],NULL);
        //cout<<"YD  "<<YD<<endl;

        string zd = line.substr(delimPos2+1,line.length());
        ZD = strtof(&zd[0],NULL);
        //cout<<"ZD  "<<ZD<<endl;
        //cout<<"d1  "<<delimPos<<"  d2  "<<delimPos2<<endl;

    }else if (dim == 2){ // 2d only needs y
        string yd = line.substr(delimPos+1,line.length());
        YD = strtof(&yd[0],NULL);
        //cout<<"YD  "<<YD<<endl;
        ZD = 1;
    }else{
        if(argv[1]!=NULL){
            cout<<"Config file read error"<<endl;
        }
    }
    
    // starting temp
    getline(inFile,line);
    while(line[0] == '#' || line.length() == 1){getline(inFile,line);}
    delimPos = line.find('\n');
    string startstring = line.substr(0,delimPos);
    float StTmp = strtof(&startstring[0],NULL);
    //cout<<"StTmp "<<StTmp<<endl;

    // heaters

    int hDims[300];
    float hTemps[75];
    char*dup; // get around line being annoying

    int count = 0;
    while(getline(inFile,line)){
        if(line[0] != '#' && line.length() > 1){
            if(dim == 2){
                dup = new char[line.size() + 1];
                copy(line.begin(),line.end(),dup);
                dup[line.size()] = '\0';
                hDims[0+count*4] = atoi(strtok(dup,","));
                //cout<<"this boi"<<hDims[0+count*4]<<endl;
                for(int i = 1; i < 4; i++){
                    hDims[i+count*4] = atoi(strtok(NULL,","));
                }
                hTemps[count] = atof(strtok(NULL,","));
                delete dup;

                count++;
            }else{ // for 3d
                dup = new char[line.size() + 1];
                copy(line.begin(),line.end(),dup);
                dup[line.size()] = '\0';
                hDims[0+count*6] = atoi(strtok(dup,","));
                //cout<<"this boi"<<hDims[0+count*4]<<endl;
                for(int i = 1; i < 6; i++){
                    hDims[i+count*6] = atoi(strtok(NULL,","));
                }
                hTemps[count] = atof(strtok(NULL,","));
                delete dup;

                count++;
            }
            
        }
    }
    //for(int i = 0; i < count*4; i++){
    //    cout<<hDims[i]<<endl;
    //}
    //cout<<"htemps 0 and 1  "<<hTemps[0]<<" "<<hTemps[1]<<endl;

    // use count to figure out how many heaters there are
    inFile.close();




    // k can be from 0 to 1/(number of neighbors)
    float k = K;
    int xDim = XD;
    int yDim = YD;
    int zDim = ZD;
    int timeSteps = TS;
    int gSize = xDim*yDim*zDim; // -1 for zero indexing
    float tOrig[gSize];
    float tOld[gSize];
    float tNew[gSize];
    //cout<<"StTmp "<<StTmp<<endl;
    // sets starting temp for nodes
    for(int i = 0; i < gSize; i++){
        tOrig[i] = StTmp + 0.0;
    }

    // place heaters
    int hLoc; // as one coord
    int hWidth,hHeight,hDepth;
    if(zDim == 1){
        for(int i = 0; i < count; i++){
            hLoc = hDims[0 + 4*i] + hDims[1 + 4*i]*xDim;
            hWidth = hDims[2 + 4*i];
            hHeight = hDims[3 + 4*i];
            for(int j = 0; j < hHeight; j++){
                for(int k = 0; k < hWidth; k++){
                    //cout<<"k "<<k<<"  j  "<<j<<"  hTemps[c]  "<<hTemps[i]<<endl;
                    tOrig[hLoc+k + xDim*j] = hTemps[i];
                    //cout<<"tOrig[]"<<tOrig[hLoc+k + xDim*j]<<endl;
                }
            }
        }
    }if(zDim > 1){ // 3d
        for(int i = 0; i < count; i++){
            hLoc = hDims[0 + 6*i] + hDims[1 + 6*i]*xDim + hDims[2 + 6*i]*xDim*yDim;
            hWidth = hDims[3 + 6*i];
            hHeight = hDims[4 + 6*i];
            hDepth = hDims[5 + 6*i];
            for(int h = 0; h < hDepth; h++){
                for(int j = 0; j < hHeight; j++){
                    for(int k = 0; k < hWidth; k++){
                        //cout<<"k "<<k<<"  j  "<<j<<"  hTemps[c]  "<<hTemps[i]<<endl;
                        tOrig[hLoc+k + xDim*j + xDim*yDim*h] = hTemps[i];
                        //cout<<"tOrig[]"<<tOrig[hLoc+k + xDim*j]<<endl;
                    }
                }
            }
            
        }
    }
    


    memcpy(tNew,tOrig, sizeof(tOld));
    memcpy(tOld,tNew, sizeof(tOld));

    // gets block count with maxed threads
    // each thread should handle one gridpoint at a time
    float gS = gSize;
    int BLOCKS = ceil(gS/1024);
    //cout<<"BLOCKS  "<<BLOCKS<<endl;

    float *d_new, *d_old, *d_orig;// *d_temp;

    hipMalloc((void**)&d_new, gSize*sizeof(float)); // may need to be sizeof(gSize)
    hipMalloc((void**)&d_old, gSize*sizeof(float)); // but I don't think so
    hipMalloc((void**)&d_orig, gSize*sizeof(float)); 

    hipMemcpy(d_new, tNew, gSize*sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_old, tOld, gSize*sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_orig, tOrig, gSize*sizeof(float), hipMemcpyHostToDevice);

    // have to alternate calls, d_old = d_new doesn't work anymore for some reason
    // cout<<"timeSteps/2  "<<timeSteps/2<<endl;
    if(zDim == 1){
        for(int i = 0; i < timeSteps; i++){
            gpuIt<<<BLOCKS,1024>>>(d_new,d_old,d_orig,xDim,yDim,zDim,k,StTmp);
            hipDeviceSynchronize(); // blocks all CPU until GPU done, TA says correct
            //cout<<"2d Call "<<i<<endl;
            i++;
            if(i < timeSteps){
                gpuIt<<<BLOCKS,1024>>>(d_old,d_new,d_orig,xDim,yDim,zDim,k,StTmp);
                hipDeviceSynchronize();
                //cout<<"2d Call "<<i<<endl;
            }
        }
    }
    if(zDim > 1){
        for(int i = 0; i < timeSteps; i++){
            gpuIt3<<<BLOCKS,1024>>>(d_new,d_old,d_orig,xDim,yDim,zDim,k,StTmp);
            hipDeviceSynchronize(); // blocks all CPU until GPU done, TA says correct
            //cout<<"3d Call "<<i<<endl;
            i++;
            if(i < timeSteps){
                gpuIt3<<<BLOCKS,1024>>>(d_old,d_new,d_orig,xDim,yDim,zDim,k,StTmp);
                hipDeviceSynchronize();
                //cout<<"3d Call "<<i<<endl;
            }
            
        }
    }
    // since d_new and d_old alternate, get the most recent one
    if(timeSteps%2 == 1){
        hipMemcpy(tNew, d_new, gSize*sizeof(float), hipMemcpyDeviceToHost);
    }else{
        hipMemcpy(tNew, d_old, gSize*sizeof(float), hipMemcpyDeviceToHost);
    }

    // outputs to terminal for easy viewing
    //for(int h = 0; h < zDim; h++){
    //    for(int i = 0; i < yDim; i++){
    //    	for(int j = 0; j < xDim; j++){
    //    		cout<<tNew[j + i*xDim + h*xDim*yDim]<<" ";
    //    }
    //        cout<<endl;
    //        }
    //    cout<<endl;
    //}



    ofstream outFile;
    outFile.open("heatDoutput.csv");
    for(int h = 0; h < zDim; h++){
        for(int i = 0; i < yDim; i++){
            for(int j = 0; j < xDim; j++){
                outFile<<tNew[j + i*xDim + h*xDim*yDim]<<", ";
            }
            outFile<<endl;
        }
        outFile<<endl;
    }
    
    outFile.close();

    hipFree(d_new);
    hipFree(d_old);
    hipFree(d_orig);
}

	.text
	.file	"main.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z20__device_stub__gpuItPfS_S_iiiff # -- Begin function _Z20__device_stub__gpuItPfS_S_iiiff
	.type	_Z20__device_stub__gpuItPfS_S_iiiff,@function
_Z20__device_stub__gpuItPfS_S_iiiff:    # @_Z20__device_stub__gpuItPfS_S_iiiff
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	8(%rsp), %r9
	movss	%xmm0, (%r9)
	leaq	4(%rsp), %r10
	movss	%xmm1, (%r10)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	movq	%r10, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5gpuItPfS_S_iiiff, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z20__device_stub__gpuItPfS_S_iiiff, .Lfunc_end0-_Z20__device_stub__gpuItPfS_S_iiiff
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__gpuIt3PfS_S_iiiff # -- Begin function _Z21__device_stub__gpuIt3PfS_S_iiiff
	.type	_Z21__device_stub__gpuIt3PfS_S_iiiff,@function
_Z21__device_stub__gpuIt3PfS_S_iiiff:   # @_Z21__device_stub__gpuIt3PfS_S_iiiff
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	8(%rsp), %r9
	movss	%xmm0, (%r9)
	leaq	4(%rsp), %r10
	movss	%xmm1, (%r10)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	movq	%r10, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6gpuIt3PfS_S_iiiff, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z21__device_stub__gpuIt3PfS_S_iiiff, .Lfunc_end1-_Z21__device_stub__gpuIt3PfS_S_iiiff
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x3f800000                      # float 1
.LCPI2_1:
	.long	0x3a800000                      # float 9.765625E-4
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$2840, %rsp                     # imm = 0xB18
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movq	8(%rsi), %rsi
	leaq	-856(%rbp), %r14
	movq	%r14, %rdi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
	leaq	-96(%rbp), %rcx
	movq	%rcx, -16(%rcx)
	xorl	%eax, %eax
	movq	%rax, -8(%rcx)
	movb	%al, (%rcx)
	leaq	-192(%rbp), %rcx
	movq	%rcx, -16(%rcx)
	movq	%rax, -8(%rcx)
	movb	%al, (%rcx)
	movq	(%r14), %rax
	addq	-24(%rax), %r14
.Ltmp0:
	movq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp1:
# %bb.1:                                # %.noexc
.Ltmp2:
	movsbl	%al, %edx
	leaq	-856(%rbp), %r14
	leaq	-112(%rbp), %rsi
	movq	%r14, %rdi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp3:
# %bb.2:                                # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit
	cmpq	$0, 8(%rbx)
	jne	.LBB2_7
# %bb.3:
.Ltmp4:
	movl	$_ZSt4cout, %r15d
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp5:
# %bb.4:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %r15
.Ltmp6:
	movq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp7:
# %bb.5:                                # %.noexc364
.Ltmp8:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp9:
# %bb.6:                                # %.noexc365
.Ltmp10:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp11:
.LBB2_7:                                # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit279
                                        # =>This Inner Loop Header: Depth=1
	movq	-112(%rbp), %rax
	movzbl	(%rax), %r12d
	movq	-856(%rbp), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	cmpl	$35, %r12d
	je	.LBB2_9
# %bb.8:                                # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit279
                                        #   in Loop: Header=BB2_7 Depth=1
	cmpq	$1, -104(%rbp)
	jne	.LBB2_11
.LBB2_9:                                # %.critedge
                                        #   in Loop: Header=BB2_7 Depth=1
.Ltmp168:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp169:
# %bb.10:                               # %.noexc277
                                        #   in Loop: Header=BB2_7 Depth=1
.Ltmp170:
	movsbl	%al, %edx
	leaq	-856(%rbp), %rdi
	leaq	-112(%rbp), %rsi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp171:
	jmp	.LBB2_7
.LBB2_11:
.Ltmp12:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp13:
# %bb.12:                               # %.noexc280
.Ltmp14:
	movsbl	%al, %edx
	leaq	-856(%rbp), %r14
	leaq	-112(%rbp), %rsi
	movq	%r14, %rdi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp15:
# %bb.13:                               # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit282.preheader
	leaq	-112(%rbp), %r15
.LBB2_14:                               # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit282
                                        # =>This Inner Loop Header: Depth=1
	movq	-112(%rbp), %rax
	cmpb	$35, (%rax)
	je	.LBB2_16
# %bb.15:                               # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit282
                                        #   in Loop: Header=BB2_14 Depth=1
	cmpq	$1, -104(%rbp)
	jne	.LBB2_18
.LBB2_16:                               # %.critedge2
                                        #   in Loop: Header=BB2_14 Depth=1
	movq	-856(%rbp), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
.Ltmp163:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp164:
# %bb.17:                               # %.noexc283
                                        #   in Loop: Header=BB2_14 Depth=1
.Ltmp165:
	movsbl	%al, %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp166:
	jmp	.LBB2_14
.LBB2_18:
	leaq	-112(%rbp), %r15
	movq	%r15, %rdi
	movl	$10, %esi
	xorl	%edx, %edx
	callq	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcm
	movslq	%eax, %rcx
.Ltmp17:
	leaq	-336(%rbp), %rdi
	movq	%r15, %rsi
	xorl	%edx, %edx
	callq	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6substrEmm
.Ltmp18:
# %bb.19:
	movq	-336(%rbp), %rdi
	xorl	%esi, %esi
	callq	strtof
	movss	%xmm0, -48(%rbp)                # 4-byte Spill
	movq	-856(%rbp), %rax
	addq	-24(%rax), %r14
.Ltmp20:
	movq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp21:
# %bb.20:                               # %.noexc286
.Ltmp22:
	movsbl	%al, %edx
	leaq	-856(%rbp), %r14
	leaq	-112(%rbp), %rsi
	movq	%r14, %rdi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp23:
.LBB2_21:                               # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit288
                                        # =>This Inner Loop Header: Depth=1
	movq	-112(%rbp), %rax
	cmpb	$35, (%rax)
	je	.LBB2_23
# %bb.22:                               # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit288
                                        #   in Loop: Header=BB2_21 Depth=1
	cmpq	$1, -104(%rbp)
	jne	.LBB2_25
.LBB2_23:                               # %.critedge4
                                        #   in Loop: Header=BB2_21 Depth=1
	movq	-856(%rbp), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
.Ltmp158:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp159:
# %bb.24:                               # %.noexc289
                                        #   in Loop: Header=BB2_21 Depth=1
.Ltmp160:
	movsbl	%al, %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp161:
	jmp	.LBB2_21
.LBB2_25:
	leaq	-112(%rbp), %r15
	movq	%r15, %rdi
	movl	$10, %esi
	xorl	%edx, %edx
	callq	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcm
	movslq	%eax, %rcx
.Ltmp25:
	leaq	-304(%rbp), %rdi
	movq	%r15, %rsi
	xorl	%edx, %edx
	callq	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6substrEmm
.Ltmp26:
# %bb.26:
	movq	-304(%rbp), %rdi
	xorl	%esi, %esi
	callq	strtof
	movss	%xmm0, -172(%rbp)               # 4-byte Spill
	movq	-856(%rbp), %rax
	addq	-24(%rax), %r14
.Ltmp28:
	movq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp29:
# %bb.27:                               # %.noexc292
.Ltmp30:
	movsbl	%al, %edx
	leaq	-856(%rbp), %r14
	leaq	-112(%rbp), %rsi
	movq	%r14, %rdi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp31:
.LBB2_28:                               # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit294
                                        # =>This Inner Loop Header: Depth=1
	movq	-112(%rbp), %rax
	cmpb	$35, (%rax)
	je	.LBB2_30
# %bb.29:                               # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit294
                                        #   in Loop: Header=BB2_28 Depth=1
	cmpq	$1, -104(%rbp)
	jne	.LBB2_32
.LBB2_30:                               # %.critedge6
                                        #   in Loop: Header=BB2_28 Depth=1
	movq	-856(%rbp), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
.Ltmp153:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp154:
# %bb.31:                               # %.noexc295
                                        #   in Loop: Header=BB2_28 Depth=1
.Ltmp155:
	movsbl	%al, %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp156:
	jmp	.LBB2_28
.LBB2_32:
	movl	%r12d, -128(%rbp)               # 4-byte Spill
	leaq	-112(%rbp), %r12
	movq	%r12, %rdi
	movl	$44, %esi
	xorl	%edx, %edx
	callq	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcm
	movq	%rax, %r15
	movslq	%r15d, %rcx
.Ltmp33:
	leaq	-272(%rbp), %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6substrEmm
.Ltmp34:
# %bb.33:
	shlq	$32, %r15
	movabsq	$4294967296, %r13               # imm = 0x100000000
	movq	-272(%rbp), %rdi
	xorl	%esi, %esi
	callq	strtof
	movss	%xmm0, -76(%rbp)                # 4-byte Spill
	movl	-128(%rbp), %eax                # 4-byte Reload
	cmpl	$50, %eax
	je	.LBB2_41
# %bb.34:
	cmpl	$51, %eax
	jne	.LBB2_45
# %bb.35:
	addq	%r13, %r15
	sarq	$32, %r15
	movq	%r12, %rdi
	movl	$44, %esi
	movq	%r15, %rdx
	callq	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcm
	movq	%rax, %rbx
	movslq	%ebx, %rcx
.Ltmp39:
	leaq	-2576(%rbp), %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	callq	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6substrEmm
.Ltmp40:
# %bb.36:
	shlq	$32, %rbx
	movq	-2576(%rbp), %rdi
	xorl	%esi, %esi
	callq	strtof
	movss	%xmm0, -44(%rbp)                # 4-byte Spill
	addq	%r13, %rbx
	sarq	$32, %rbx
	leaq	-112(%rbp), %rsi
	movq	8(%rsi), %rcx
.Ltmp42:
	leaq	-1368(%rbp), %rdi
	movq	%rbx, %rdx
	callq	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6substrEmm
.Ltmp43:
# %bb.37:
	leaq	-1352(%rbp), %rbx
	movq	-16(%rbx), %rdi
	xorl	%esi, %esi
	callq	strtof
	movss	%xmm0, -168(%rbp)               # 4-byte Spill
	movq	-16(%rbx), %rdi
	cmpq	%rbx, %rdi
	je	.LBB2_39
# %bb.38:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB2_39:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	leaq	-2560(%rbp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB2_51
# %bb.40:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i298
	callq	_ZdlPv
	jmp	.LBB2_51
.LBB2_41:
	addq	%r13, %r15
	sarq	$32, %r15
	leaq	-112(%rbp), %rsi
	movq	8(%rsi), %rcx
.Ltmp36:
	leaq	-2576(%rbp), %rdi
	movq	%r15, %rdx
	callq	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6substrEmm
.Ltmp37:
# %bb.42:
	leaq	-2560(%rbp), %rbx
	movq	-16(%rbx), %rdi
	xorl	%esi, %esi
	callq	strtof
	movss	%xmm0, -44(%rbp)                # 4-byte Spill
	movq	-16(%rbx), %rdi
	cmpq	%rbx, %rdi
	je	.LBB2_44
# %bb.43:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i304
	callq	_ZdlPv
.LBB2_44:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit306
	movss	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, -168(%rbp)               # 4-byte Spill
	jmp	.LBB2_51
.LBB2_45:
	cmpq	$0, 8(%rbx)
	je	.LBB2_50
# %bb.46:
.Ltmp45:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp46:
# %bb.47:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit308
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %rbx
.Ltmp47:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp48:
# %bb.48:                               # %.noexc367
.Ltmp49:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp50:
# %bb.49:                               # %.noexc368
.Ltmp51:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp52:
                                        # implicit-def: $xmm0
                                        # kill: killed $xmm0
                                        # implicit-def: $xmm0
                                        # kill: killed $xmm0
	jmp	.LBB2_51
.LBB2_50:
                                        # implicit-def: $xmm0
                                        # kill: killed $xmm0
                                        # implicit-def: $xmm0
                                        # kill: killed $xmm0
.LBB2_51:                               # %_ZNSolsEPFRSoS_E.exit310
	movq	-856(%rbp), %rax
	addq	-24(%rax), %r14
.Ltmp53:
	movq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp54:
# %bb.52:                               # %.noexc311
.Ltmp55:
	movsbl	%al, %edx
	leaq	-856(%rbp), %rbx
	leaq	-112(%rbp), %rsi
	movq	%rbx, %rdi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp56:
# %bb.53:                               # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit313.preheader
	leaq	-112(%rbp), %r14
.LBB2_54:                               # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit313
                                        # =>This Inner Loop Header: Depth=1
	movq	-112(%rbp), %rax
	cmpb	$35, (%rax)
	je	.LBB2_56
# %bb.55:                               # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit313
                                        #   in Loop: Header=BB2_54 Depth=1
	cmpq	$1, -104(%rbp)
	jne	.LBB2_58
.LBB2_56:                               # %.critedge8
                                        #   in Loop: Header=BB2_54 Depth=1
	movq	-856(%rbp), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp148:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp149:
# %bb.57:                               # %.noexc314
                                        #   in Loop: Header=BB2_54 Depth=1
.Ltmp150:
	movsbl	%al, %edx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp151:
	jmp	.LBB2_54
.LBB2_58:
	xorl	%r15d, %r15d
	leaq	-112(%rbp), %r14
	movq	%r14, %rdi
	movl	$10, %esi
	xorl	%edx, %edx
	callq	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcm
	movslq	%eax, %rcx
.Ltmp58:
	leaq	-240(%rbp), %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6substrEmm
.Ltmp59:
# %bb.59:
	movq	-240(%rbp), %rdi
	xorl	%esi, %esi
	callq	strtof
	movss	%xmm0, -120(%rbp)               # 4-byte Spill
	xorl	%r12d, %r12d
	xorl	%eax, %eax
	movq	%rax, -56(%rbp)                 # 8-byte Spill
.LBB2_60:                               # %.outer
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_61 Depth 2
                                        #     Child Loop BB2_76 Depth 2
                                        #     Child Loop BB2_71 Depth 2
	movq	%r15, -72(%rbp)                 # 8-byte Spill
	movl	%r15d, %eax
	leaq	-2576(,%rax,4), %r15
	addq	%rbp, %r15
	movl	%r12d, -60(%rbp)                # 4-byte Spill
	movl	%r12d, %eax
	leaq	-2576(,%rax,4), %r14
	addq	%rbp, %r14
.LBB2_61:                               #   Parent Loop BB2_60 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	-856(%rbp), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp61:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp62:
# %bb.62:                               # %.noexc317
                                        #   in Loop: Header=BB2_61 Depth=2
.Ltmp63:
	movsbl	%al, %edx
	movq	%rbx, %rdi
	leaq	-112(%rbp), %rsi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp64:
# %bb.63:                               #   in Loop: Header=BB2_61 Depth=2
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	testb	$5, 32(%rax,%rcx)
	jne	.LBB2_78
# %bb.64:                               #   in Loop: Header=BB2_61 Depth=2
	movq	-112(%rbp), %r13
	cmpb	$35, (%r13)
	je	.LBB2_61
# %bb.65:                               #   in Loop: Header=BB2_61 Depth=2
	movq	-104(%rbp), %r12
	cmpq	$2, %r12
	jb	.LBB2_61
# %bb.66:                               #   in Loop: Header=BB2_60 Depth=1
	leaq	1(%r12), %rdi
	cmpl	$50, -128(%rbp)                 # 4-byte Folded Reload
	jne	.LBB2_72
# %bb.67:                               #   in Loop: Header=BB2_60 Depth=1
.Ltmp145:
	callq	_Znam
.Ltmp146:
# %bb.68:                               #   in Loop: Header=BB2_60 Depth=1
	cmpq	$2, %r12
	movq	%rax, -152(%rbp)                # 8-byte Spill
	jl	.LBB2_70
# %bb.69:                               #   in Loop: Header=BB2_60 Depth=1
	movq	%rax, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
	movq	-152(%rbp), %rax                # 8-byte Reload
.LBB2_70:                               # %_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPcNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEES2_ET0_T_SB_SA_.exit
                                        #   in Loop: Header=BB2_60 Depth=1
	movb	$0, (%rax,%r12)
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	strtok
	movq	%rax, %rdi
	callq	atoi
	movq	-56(%rbp), %rcx                 # 8-byte Reload
	leal	(,%rcx,4), %ecx
	movl	%eax, -2576(%rbp,%rcx,4)
	movl	$1, %r14d
.LBB2_71:                               #   Parent Loop BB2_60 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$.L.str.2, %esi
	xorl	%edi, %edi
	callq	strtok
	movq	%rax, %rdi
	callq	atoi
	movl	%eax, (%r15,%r14,4)
	incq	%r14
	cmpq	$4, %r14
	jne	.LBB2_71
	jmp	.LBB2_77
.LBB2_72:                               #   in Loop: Header=BB2_60 Depth=1
.Ltmp143:
	callq	_Znam
.Ltmp144:
# %bb.73:                               #   in Loop: Header=BB2_60 Depth=1
	cmpq	$2, %r12
	movq	%rax, -152(%rbp)                # 8-byte Spill
	jl	.LBB2_75
# %bb.74:                               #   in Loop: Header=BB2_60 Depth=1
	movq	%rax, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
	movq	-152(%rbp), %rax                # 8-byte Reload
.LBB2_75:                               # %_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPcNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEES2_ET0_T_SB_SA_.exit320
                                        #   in Loop: Header=BB2_60 Depth=1
	movb	$0, (%rax,%r12)
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	strtok
	movq	%rax, %rdi
	callq	atoi
	movq	-56(%rbp), %rcx                 # 8-byte Reload
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,2), %ecx
	movl	%eax, -2576(%rbp,%rcx,4)
	movl	$1, %r15d
.LBB2_76:                               #   Parent Loop BB2_60 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$.L.str.2, %esi
	xorl	%edi, %edi
	callq	strtok
	movq	%rax, %rdi
	callq	atoi
	movl	%eax, (%r14,%r15,4)
	incq	%r15
	cmpq	$6, %r15
	jne	.LBB2_76
.LBB2_77:                               #   in Loop: Header=BB2_60 Depth=1
	movq	-72(%rbp), %r15                 # 8-byte Reload
	movl	-60(%rbp), %r12d                # 4-byte Reload
	movl	$.L.str.2, %esi
	xorl	%edi, %edi
	callq	strtok
	movq	%rax, %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movq	-56(%rbp), %r14                 # 8-byte Reload
	movl	%r14d, %eax
	movss	%xmm0, -2880(%rbp,%rax,4)
	movq	-152(%rbp), %rdi                # 8-byte Reload
	callq	_ZdlPv
	incl	%r14d
	movq	%r14, -56(%rbp)                 # 8-byte Spill
	addl	$6, %r12d
	addl	$4, %r15d
	jmp	.LBB2_60
.LBB2_78:
.Ltmp66:
	leaq	-856(%rbp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv
.Ltmp67:
# %bb.79:
	movq	%rsp, -152(%rbp)                # 8-byte Spill
	cvttss2si	-76(%rbp), %ebx         # 4-byte Folded Reload
	cvttss2si	-44(%rbp), %eax         # 4-byte Folded Reload
	cvttss2si	-168(%rbp), %ecx        # 4-byte Folded Reload
	movl	%eax, -72(%rbp)                 # 4-byte Spill
	imull	%ebx, %eax
	movl	%eax, -60(%rbp)                 # 4-byte Spill
	movl	%eax, %r12d
	movl	%ecx, -44(%rbp)                 # 4-byte Spill
	imull	%ecx, %r12d
	leaq	15(,%r12,4), %rax
	andq	$-16, %rax
	movq	%rsp, %r13
	subq	%rax, %r13
	movq	%r13, %rsp
	movq	%rsp, %r15
	subq	%rax, %r15
	movq	%r15, %rsp
	movq	%rsp, %rcx
	subq	%rax, %rcx
	movq	%rcx, -128(%rbp)                # 8-byte Spill
	movq	%rcx, %rsp
	testl	%r12d, %r12d
	jle	.LBB2_82
# %bb.80:                               # %.lr.ph
	xorps	%xmm1, %xmm1
	movss	-120(%rbp), %xmm0               # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	%xmm1, %xmm0
	xorl	%eax, %eax
.LBB2_81:                               # =>This Inner Loop Header: Depth=1
	movss	%xmm0, (%r13,%rax,4)
	incq	%rax
	cmpq	%rax, %r12
	jne	.LBB2_81
.LBB2_82:                               # %._crit_edge
	cmpl	$1, -44(%rbp)                   # 4-byte Folded Reload
	jne	.LBB2_92
# %bb.83:                               # %._crit_edge
	cmpl	$0, -56(%rbp)                   # 4-byte Folded Reload
	je	.LBB2_92
# %bb.84:                               # %.lr.ph461.preheader
	movl	-56(%rbp), %eax                 # 4-byte Reload
	xorl	%ecx, %ecx
.LBB2_85:                               # %.lr.ph461
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_87 Depth 2
                                        #       Child Loop BB2_89 Depth 3
	movq	%rcx, %r8
	shlq	$4, %r8
	movl	-2564(%rbp,%r8), %edx
	testl	%edx, %edx
	jle	.LBB2_91
# %bb.86:                               # %.preheader423.lr.ph
                                        #   in Loop: Header=BB2_85 Depth=1
	leaq	(,%rcx,4), %rsi
	movl	-2568(%rbp,%rsi,4), %esi
	movl	-2572(%rbp,%r8), %edi
	imull	%ebx, %edi
	addl	-2576(%rbp,%r8), %edi
	xorl	%r8d, %r8d
.LBB2_87:                               # %.preheader423
                                        #   Parent Loop BB2_85 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_89 Depth 3
	testl	%esi, %esi
	jle	.LBB2_90
# %bb.88:                               # %.lr.ph456
                                        #   in Loop: Header=BB2_87 Depth=2
	movss	-2880(%rbp,%rcx,4), %xmm0       # xmm0 = mem[0],zero,zero,zero
	movq	%rsi, %r9
	movl	%edi, %r10d
.LBB2_89:                               #   Parent Loop BB2_85 Depth=1
                                        #     Parent Loop BB2_87 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movslq	%r10d, %r10
	movss	%xmm0, (%r13,%r10,4)
	incl	%r10d
	decq	%r9
	jne	.LBB2_89
.LBB2_90:                               # %._crit_edge457
                                        #   in Loop: Header=BB2_87 Depth=2
	incl	%r8d
	addl	%ebx, %edi
	cmpl	%edx, %r8d
	jne	.LBB2_87
.LBB2_91:                               # %._crit_edge459
                                        #   in Loop: Header=BB2_85 Depth=1
	incq	%rcx
	cmpq	%rax, %rcx
	jne	.LBB2_85
.LBB2_92:                               # %.loopexit425
	cmpl	$2, -44(%rbp)                   # 4-byte Folded Reload
	movl	%ebx, -76(%rbp)                 # 4-byte Spill
	jl	.LBB2_105
# %bb.93:                               # %.loopexit425
	cmpl	$0, -56(%rbp)                   # 4-byte Folded Reload
	je	.LBB2_105
# %bb.94:                               # %.lr.ph470.preheader
	movl	-56(%rbp), %eax                 # 4-byte Reload
	xorl	%ecx, %ecx
.LBB2_95:                               # %.lr.ph470
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_97 Depth 2
                                        #       Child Loop BB2_99 Depth 3
                                        #         Child Loop BB2_101 Depth 4
	leaq	(%rcx,%rcx), %rdx
	leaq	(%rdx,%rdx,2), %r9
	movl	-2556(%rbp,%r9,4), %edx
	testl	%edx, %edx
	jle	.LBB2_104
# %bb.96:                               # %.preheader420.lr.ph
                                        #   in Loop: Header=BB2_95 Depth=1
	movl	-2560(%rbp,%r9,4), %esi
	movl	-2564(%rbp,%r9,4), %edi
	movl	-2568(%rbp,%r9,4), %r8d
	imull	-72(%rbp), %r8d                 # 4-byte Folded Reload
	addl	-2572(%rbp,%r9,4), %r8d
	imull	%ebx, %r8d
	addl	-2576(%rbp,%r9,4), %r8d
	xorl	%r9d, %r9d
.LBB2_97:                               # %.preheader420
                                        #   Parent Loop BB2_95 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_99 Depth 3
                                        #         Child Loop BB2_101 Depth 4
	testl	%esi, %esi
	jle	.LBB2_103
# %bb.98:                               # %.preheader419.lr.ph
                                        #   in Loop: Header=BB2_97 Depth=2
	xorl	%r10d, %r10d
	movl	%r8d, %r11d
.LBB2_99:                               # %.preheader419
                                        #   Parent Loop BB2_95 Depth=1
                                        #     Parent Loop BB2_97 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB2_101 Depth 4
	testl	%edi, %edi
	jle	.LBB2_102
# %bb.100:                              # %.lr.ph463
                                        #   in Loop: Header=BB2_99 Depth=3
	movss	-2880(%rbp,%rcx,4), %xmm0       # xmm0 = mem[0],zero,zero,zero
	movq	%rdi, %rbx
	movl	%r11d, %r14d
.LBB2_101:                              #   Parent Loop BB2_95 Depth=1
                                        #     Parent Loop BB2_97 Depth=2
                                        #       Parent Loop BB2_99 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	movslq	%r14d, %r14
	movss	%xmm0, (%r13,%r14,4)
	incl	%r14d
	decq	%rbx
	jne	.LBB2_101
.LBB2_102:                              # %._crit_edge464
                                        #   in Loop: Header=BB2_99 Depth=3
	incl	%r10d
	movl	-76(%rbp), %ebx                 # 4-byte Reload
	addl	%ebx, %r11d
	cmpl	%esi, %r10d
	jne	.LBB2_99
.LBB2_103:                              # %._crit_edge466
                                        #   in Loop: Header=BB2_97 Depth=2
	incl	%r9d
	addl	-60(%rbp), %r8d                 # 4-byte Folded Reload
	cmpl	%edx, %r9d
	jne	.LBB2_97
.LBB2_104:                              # %._crit_edge468
                                        #   in Loop: Header=BB2_95 Depth=1
	incq	%rcx
	cmpq	%rax, %rcx
	jne	.LBB2_95
.LBB2_105:                              # %.loopexit422
	leaq	(,%r12,4), %r14
	movq	-128(%rbp), %rdi                # 8-byte Reload
	movq	%r13, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
	movq	%r15, %rdi
	movq	%r13, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r12d, %xmm0
	mulss	.LCPI2_1(%rip), %xmm0
	callq	ceilf@PLT
	movss	%xmm0, -56(%rbp)                # 4-byte Spill
	movslq	%r12d, %r12
	shlq	$2, %r12
.Ltmp69:
	leaq	-144(%rbp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
.Ltmp70:
# %bb.106:
.Ltmp71:
	leaq	-136(%rbp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
.Ltmp72:
# %bb.107:
.Ltmp73:
	leaq	-160(%rbp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
.Ltmp74:
# %bb.108:
	movq	-144(%rbp), %rdi
.Ltmp75:
	movq	-128(%rbp), %rsi                # 8-byte Reload
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp76:
# %bb.109:
	movq	-136(%rbp), %rdi
.Ltmp77:
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp78:
# %bb.110:
	movq	-160(%rbp), %rdi
.Ltmp79:
	movq	%r13, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp80:
# %bb.111:
	movq	%r12, -168(%rbp)                # 8-byte Spill
	cvttss2si	-172(%rbp), %r13d       # 4-byte Folded Reload
	cvttss2si	-56(%rbp), %r14d        # 4-byte Folded Reload
	cmpl	$1, -44(%rbp)                   # 4-byte Folded Reload
	jne	.LBB2_124
# %bb.112:
	testl	%r13d, %r13d
	jle	.LBB2_124
# %bb.113:                              # %.lr.ph472
	movl	%r14d, %r12d
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %r12
	xorl	%r15d, %r15d
.LBB2_114:                              # =>This Inner Loop Header: Depth=1
.Ltmp81:
	movq	%r12, %rdi
	movl	$1, %esi
	movabsq	$4294968320, %rdx               # imm = 0x100000400
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp82:
# %bb.115:                              #   in Loop: Header=BB2_114 Depth=1
	testl	%eax, %eax
	jne	.LBB2_117
# %bb.116:                              #   in Loop: Header=BB2_114 Depth=1
	movq	-144(%rbp), %rdi
	movq	-136(%rbp), %rsi
	movq	-160(%rbp), %rdx
.Ltmp83:
	movl	%ebx, %ecx
	movl	-72(%rbp), %r8d                 # 4-byte Reload
	movl	$1, %r9d
	movss	-48(%rbp), %xmm0                # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	-120(%rbp), %xmm1               # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	callq	_Z20__device_stub__gpuItPfS_S_iiiff
.Ltmp84:
.LBB2_117:                              #   in Loop: Header=BB2_114 Depth=1
.Ltmp85:
	callq	hipDeviceSynchronize
.Ltmp86:
# %bb.118:                              #   in Loop: Header=BB2_114 Depth=1
	leal	1(%r15), %eax
	cmpl	%r13d, %eax
	jge	.LBB2_123
# %bb.119:                              #   in Loop: Header=BB2_114 Depth=1
.Ltmp87:
	movq	%r12, %rdi
	movl	$1, %esi
	movabsq	$4294968320, %rdx               # imm = 0x100000400
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp88:
# %bb.120:                              #   in Loop: Header=BB2_114 Depth=1
	testl	%eax, %eax
	jne	.LBB2_122
# %bb.121:                              #   in Loop: Header=BB2_114 Depth=1
	movq	-136(%rbp), %rdi
	movq	-144(%rbp), %rsi
	movq	-160(%rbp), %rdx
.Ltmp89:
	movl	%ebx, %ecx
	movl	-72(%rbp), %r8d                 # 4-byte Reload
	movl	$1, %r9d
	movss	-48(%rbp), %xmm0                # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	-120(%rbp), %xmm1               # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	callq	_Z20__device_stub__gpuItPfS_S_iiiff
.Ltmp90:
.LBB2_122:                              #   in Loop: Header=BB2_114 Depth=1
.Ltmp91:
	callq	hipDeviceSynchronize
.Ltmp92:
.LBB2_123:                              #   in Loop: Header=BB2_114 Depth=1
	addl	$2, %r15d
	cmpl	%r13d, %r15d
	jl	.LBB2_114
.LBB2_124:                              # %.loopexit418
	cmpl	$2, -44(%rbp)                   # 4-byte Folded Reload
	jl	.LBB2_137
# %bb.125:                              # %.loopexit418
	testl	%r13d, %r13d
	jle	.LBB2_137
# %bb.126:                              # %.lr.ph474
	movl	%r14d, %r15d
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %r15
	xorl	%r14d, %r14d
	movabsq	$4294968320, %r12               # imm = 0x100000400
.LBB2_127:                              # =>This Inner Loop Header: Depth=1
.Ltmp94:
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp95:
# %bb.128:                              #   in Loop: Header=BB2_127 Depth=1
	testl	%eax, %eax
	jne	.LBB2_130
# %bb.129:                              #   in Loop: Header=BB2_127 Depth=1
	movq	-144(%rbp), %rdi
	movq	-136(%rbp), %rsi
	movq	-160(%rbp), %rdx
.Ltmp96:
	movl	%ebx, %ecx
	movl	-72(%rbp), %r8d                 # 4-byte Reload
	movl	-44(%rbp), %r9d                 # 4-byte Reload
	movss	-48(%rbp), %xmm0                # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	-120(%rbp), %xmm1               # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	callq	_Z21__device_stub__gpuIt3PfS_S_iiiff
.Ltmp97:
.LBB2_130:                              #   in Loop: Header=BB2_127 Depth=1
.Ltmp98:
	callq	hipDeviceSynchronize
.Ltmp99:
# %bb.131:                              #   in Loop: Header=BB2_127 Depth=1
	leal	1(%r14), %eax
	cmpl	%r13d, %eax
	jge	.LBB2_136
# %bb.132:                              #   in Loop: Header=BB2_127 Depth=1
.Ltmp100:
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp101:
# %bb.133:                              #   in Loop: Header=BB2_127 Depth=1
	testl	%eax, %eax
	jne	.LBB2_135
# %bb.134:                              #   in Loop: Header=BB2_127 Depth=1
	movq	-136(%rbp), %rdi
	movq	-144(%rbp), %rsi
	movq	-160(%rbp), %rdx
.Ltmp102:
	movl	%ebx, %ecx
	movl	-72(%rbp), %r8d                 # 4-byte Reload
	movl	-44(%rbp), %r9d                 # 4-byte Reload
	movss	-48(%rbp), %xmm0                # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	-120(%rbp), %xmm1               # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	callq	_Z21__device_stub__gpuIt3PfS_S_iiiff
.Ltmp103:
.LBB2_135:                              #   in Loop: Header=BB2_127 Depth=1
.Ltmp104:
	callq	hipDeviceSynchronize
.Ltmp105:
.LBB2_136:                              #   in Loop: Header=BB2_127 Depth=1
	addl	$2, %r14d
	cmpl	%r13d, %r14d
	jl	.LBB2_127
.LBB2_137:                              # %.loopexit
	andl	$-2147483647, %r13d             # imm = 0x80000001
	cmpl	$1, %r13d
	leaq	-144(%rbp), %rax
	leaq	-136(%rbp), %rcx
	cmoveq	%rax, %rcx
	movq	(%rcx), %rsi
.Ltmp107:
	movq	-128(%rbp), %rdi                # 8-byte Reload
	movq	-168(%rbp), %rdx                # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp108:
# %bb.138:
.Ltmp110:
	leaq	-1368(%rbp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
.Ltmp111:
# %bb.139:
.Ltmp113:
	leaq	-1368(%rbp), %r13
	movl	$.L.str.3, %esi
	movq	%r13, %rdi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp114:
# %bb.140:                              # %.preheader415
	cmpl	$0, -44(%rbp)                   # 4-byte Folded Reload
	jle	.LBB2_156
# %bb.141:                              # %.preheader414.lr.ph
	movl	%ebx, %eax
	movq	%rax, -120(%rbp)                # 8-byte Spill
	movl	$0, -48(%rbp)                   # 4-byte Folded Spill
	xorl	%r14d, %r14d
.LBB2_142:                              # %.preheader414
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_144 Depth 2
                                        #       Child Loop BB2_145 Depth 3
	movl	%r14d, -56(%rbp)                # 4-byte Spill
	cmpl	$0, -72(%rbp)                   # 4-byte Folded Reload
	jle	.LBB2_152
# %bb.143:                              # %.preheader.lr.ph
                                        #   in Loop: Header=BB2_142 Depth=1
	xorl	%r14d, %r14d
	movl	-48(%rbp), %r12d                # 4-byte Reload
.LBB2_144:                              # %.preheader
                                        #   Parent Loop BB2_142 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_145 Depth 3
	movl	%ebx, %eax
	movq	-120(%rbp), %rbx                # 8-byte Reload
	movl	%r12d, %r15d
	testl	%eax, %eax
	jle	.LBB2_148
.LBB2_145:                              #   Parent Loop BB2_142 Depth=1
                                        #     Parent Loop BB2_144 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movslq	%r15d, %rax
	movq	-128(%rbp), %rcx                # 8-byte Reload
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rcx,%rax,4), %xmm0
.Ltmp115:
	movq	%r13, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp116:
# %bb.146:                              # %_ZNSolsEf.exit
                                        #   in Loop: Header=BB2_145 Depth=3
.Ltmp117:
	movl	$.L.str.4, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp118:
# %bb.147:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit327
                                        #   in Loop: Header=BB2_145 Depth=3
	incl	%r15d
	decq	%rbx
	jne	.LBB2_145
.LBB2_148:                              # %._crit_edge477
                                        #   in Loop: Header=BB2_144 Depth=2
	movq	-1368(%rbp), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
.Ltmp120:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp121:
# %bb.149:                              # %.noexc375
                                        #   in Loop: Header=BB2_144 Depth=2
.Ltmp122:
	movsbl	%al, %esi
	movq	%r13, %rdi
	callq	_ZNSo3putEc
.Ltmp123:
# %bb.150:                              # %.noexc376
                                        #   in Loop: Header=BB2_144 Depth=2
.Ltmp124:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp125:
# %bb.151:                              # %_ZNSolsEPFRSoS_E.exit324
                                        #   in Loop: Header=BB2_144 Depth=2
	incl	%r14d
	movl	-76(%rbp), %ebx                 # 4-byte Reload
	addl	%ebx, %r12d
	cmpl	-72(%rbp), %r14d                # 4-byte Folded Reload
	jne	.LBB2_144
.LBB2_152:                              # %._crit_edge479
                                        #   in Loop: Header=BB2_142 Depth=1
	movq	-1368(%rbp), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
.Ltmp127:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp128:
	movl	-56(%rbp), %r14d                # 4-byte Reload
# %bb.153:                              # %.noexc371
                                        #   in Loop: Header=BB2_142 Depth=1
.Ltmp129:
	movsbl	%al, %esi
	movq	%r13, %rdi
	callq	_ZNSo3putEc
.Ltmp130:
# %bb.154:                              # %.noexc372
                                        #   in Loop: Header=BB2_142 Depth=1
.Ltmp131:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp132:
# %bb.155:                              # %_ZNSolsEPFRSoS_E.exit322
                                        #   in Loop: Header=BB2_142 Depth=1
	incl	%r14d
	movl	-48(%rbp), %eax                 # 4-byte Reload
	addl	-60(%rbp), %eax                 # 4-byte Folded Reload
	movl	%eax, -48(%rbp)                 # 4-byte Spill
	cmpl	-44(%rbp), %r14d                # 4-byte Folded Reload
	jne	.LBB2_142
.LBB2_156:                              # %._crit_edge481
.Ltmp134:
	leaq	-1368(%rbp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp135:
# %bb.157:
	movq	-144(%rbp), %rdi
.Ltmp136:
	callq	hipFree
.Ltmp137:
# %bb.158:
	movq	-136(%rbp), %rdi
.Ltmp138:
	callq	hipFree
.Ltmp139:
# %bb.159:
	movq	-160(%rbp), %rdi
.Ltmp140:
	callq	hipFree
.Ltmp141:
# %bb.160:
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
	leaq	-1360(%rbp), %rdi
	movq	%rax, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rcx
	movq	-24(%rax), %rax
	movq	%rcx, -1368(%rbp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	-1120(%rbp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	movq	-152(%rbp), %rsp                # 8-byte Reload
	leaq	-224(%rbp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB2_162
# %bb.161:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i328
	callq	_ZdlPv
.LBB2_162:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit330
	leaq	-256(%rbp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB2_164
# %bb.163:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i331
	callq	_ZdlPv
.LBB2_164:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit333
	leaq	-288(%rbp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB2_166
# %bb.165:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i334
	callq	_ZdlPv
.LBB2_166:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit336
	leaq	-320(%rbp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB2_168
# %bb.167:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i337
	callq	_ZdlPv
.LBB2_168:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit339
	movq	-208(%rbp), %rdi
	leaq	-192(%rbp), %rax
	cmpq	%rax, %rdi
	je	.LBB2_170
# %bb.169:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i340
	callq	_ZdlPv
.LBB2_170:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit342
	movq	-112(%rbp), %rdi
	leaq	-96(%rbp), %rax
	cmpq	%rax, %rdi
	je	.LBB2_172
# %bb.171:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i343
	callq	_ZdlPv
.LBB2_172:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit345
	leaq	-856(%rbp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	xorl	%eax, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.LBB2_173:
	.cfi_def_cfa %rbp, 16
.Ltmp38:
	jmp	.LBB2_176
.LBB2_174:
.Ltmp44:
	movq	%rax, %rbx
	leaq	-2560(%rbp), %rax
	jmp	.LBB2_207
.LBB2_175:
.Ltmp41:
	jmp	.LBB2_176
.LBB2_177:                              # %.loopexit426.loopexit.split-lp
.Ltmp147:
	jmp	.LBB2_202
.LBB2_178:
.Ltmp112:
	jmp	.LBB2_202
.LBB2_179:                              # %.loopexit.split-lp
.Ltmp68:
	jmp	.LBB2_202
.LBB2_180:
.Ltmp60:
	jmp	.LBB2_176
.LBB2_181:
.Ltmp35:
	jmp	.LBB2_195
.LBB2_182:
.Ltmp27:
	jmp	.LBB2_197
.LBB2_183:
.Ltmp19:
	jmp	.LBB2_200
.LBB2_184:                              # %.loopexit.split-lp433
.Ltmp32:
	jmp	.LBB2_195
.LBB2_185:                              # %.loopexit.split-lp438
.Ltmp24:
	jmp	.LBB2_197
.LBB2_186:                              # %.loopexit.split-lp428
.Ltmp57:
	jmp	.LBB2_176
.LBB2_187:
.Ltmp142:
	jmp	.LBB2_205
.LBB2_188:                              # %.loopexit.split-lp443.loopexit.split-lp
.Ltmp16:
	jmp	.LBB2_200
.LBB2_189:
.Ltmp109:
	jmp	.LBB2_202
.LBB2_190:
.Ltmp106:
	jmp	.LBB2_202
.LBB2_191:
.Ltmp93:
	jmp	.LBB2_202
.LBB2_192:
.Ltmp133:
	jmp	.LBB2_205
.LBB2_193:                              # %.loopexit427
.Ltmp152:
.LBB2_176:
	movq	%rax, %rbx
	jmp	.LBB2_209
.LBB2_194:                              # %.loopexit432
.Ltmp157:
.LBB2_195:
	movq	%rax, %rbx
	jmp	.LBB2_211
.LBB2_196:                              # %.loopexit437
.Ltmp162:
.LBB2_197:
	movq	%rax, %rbx
	jmp	.LBB2_213
.LBB2_198:                              # %.loopexit442
.Ltmp167:
	jmp	.LBB2_200
.LBB2_199:                              # %.loopexit.split-lp443.loopexit
.Ltmp172:
.LBB2_200:                              # %.loopexit.split-lp443
	movq	%rax, %rbx
	jmp	.LBB2_215
.LBB2_201:                              # %.loopexit426.loopexit
.Ltmp65:
.LBB2_202:                              # %.loopexit426
	movq	%rax, %rbx
	jmp	.LBB2_206
.LBB2_203:
.Ltmp126:
	jmp	.LBB2_205
.LBB2_204:
.Ltmp119:
.LBB2_205:
	movq	%rax, %rbx
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
	leaq	-1360(%rbp), %rdi
	movq	%rax, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rcx
	movq	-24(%rax), %rax
	movq	%rcx, -1368(%rbp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	-1120(%rbp), %rdi
	callq	_ZNSt8ios_baseD2Ev
.LBB2_206:                              # %.loopexit426
	leaq	-224(%rbp), %rax
.LBB2_207:                              # %.loopexit426
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB2_209
# %bb.208:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i346
	callq	_ZdlPv
.LBB2_209:
	leaq	-256(%rbp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB2_211
# %bb.210:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i349
	callq	_ZdlPv
.LBB2_211:
	leaq	-288(%rbp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB2_213
# %bb.212:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i352
	callq	_ZdlPv
.LBB2_213:
	leaq	-320(%rbp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB2_215
# %bb.214:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i355
	callq	_ZdlPv
.LBB2_215:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit357
	leaq	-192(%rbp), %rax
	movq	-208(%rbp), %rdi
	cmpq	%rax, %rdi
	je	.LBB2_217
# %bb.216:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i358
	callq	_ZdlPv
.LBB2_217:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit360
	movq	-112(%rbp), %rdi
	leaq	-96(%rbp), %rax
	cmpq	%rax, %rdi
	je	.LBB2_219
# %bb.218:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i361
	callq	_ZdlPv
.LBB2_219:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit363
	leaq	-856(%rbp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table2:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp11-.Ltmp0                 #   Call between .Ltmp0 and .Ltmp11
	.uleb128 .Ltmp16-.Lfunc_begin0          #     jumps to .Ltmp16
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp168-.Lfunc_begin0         # >> Call Site 3 <<
	.uleb128 .Ltmp171-.Ltmp168              #   Call between .Ltmp168 and .Ltmp171
	.uleb128 .Ltmp172-.Lfunc_begin0         #     jumps to .Ltmp172
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp15-.Ltmp12                #   Call between .Ltmp12 and .Ltmp15
	.uleb128 .Ltmp16-.Lfunc_begin0          #     jumps to .Ltmp16
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp163-.Lfunc_begin0         # >> Call Site 5 <<
	.uleb128 .Ltmp166-.Ltmp163              #   Call between .Ltmp163 and .Ltmp166
	.uleb128 .Ltmp167-.Lfunc_begin0         #     jumps to .Ltmp167
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp17-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp18-.Ltmp17                #   Call between .Ltmp17 and .Ltmp18
	.uleb128 .Ltmp19-.Lfunc_begin0          #     jumps to .Ltmp19
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp20-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp23-.Ltmp20                #   Call between .Ltmp20 and .Ltmp23
	.uleb128 .Ltmp24-.Lfunc_begin0          #     jumps to .Ltmp24
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp158-.Lfunc_begin0         # >> Call Site 8 <<
	.uleb128 .Ltmp161-.Ltmp158              #   Call between .Ltmp158 and .Ltmp161
	.uleb128 .Ltmp162-.Lfunc_begin0         #     jumps to .Ltmp162
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp25-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp26-.Ltmp25                #   Call between .Ltmp25 and .Ltmp26
	.uleb128 .Ltmp27-.Lfunc_begin0          #     jumps to .Ltmp27
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp28-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp31-.Ltmp28                #   Call between .Ltmp28 and .Ltmp31
	.uleb128 .Ltmp32-.Lfunc_begin0          #     jumps to .Ltmp32
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp153-.Lfunc_begin0         # >> Call Site 11 <<
	.uleb128 .Ltmp156-.Ltmp153              #   Call between .Ltmp153 and .Ltmp156
	.uleb128 .Ltmp157-.Lfunc_begin0         #     jumps to .Ltmp157
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp33-.Lfunc_begin0          # >> Call Site 12 <<
	.uleb128 .Ltmp34-.Ltmp33                #   Call between .Ltmp33 and .Ltmp34
	.uleb128 .Ltmp35-.Lfunc_begin0          #     jumps to .Ltmp35
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp39-.Lfunc_begin0          # >> Call Site 13 <<
	.uleb128 .Ltmp40-.Ltmp39                #   Call between .Ltmp39 and .Ltmp40
	.uleb128 .Ltmp41-.Lfunc_begin0          #     jumps to .Ltmp41
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp42-.Lfunc_begin0          # >> Call Site 14 <<
	.uleb128 .Ltmp43-.Ltmp42                #   Call between .Ltmp42 and .Ltmp43
	.uleb128 .Ltmp44-.Lfunc_begin0          #     jumps to .Ltmp44
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp36-.Lfunc_begin0          # >> Call Site 15 <<
	.uleb128 .Ltmp37-.Ltmp36                #   Call between .Ltmp36 and .Ltmp37
	.uleb128 .Ltmp38-.Lfunc_begin0          #     jumps to .Ltmp38
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp45-.Lfunc_begin0          # >> Call Site 16 <<
	.uleb128 .Ltmp56-.Ltmp45                #   Call between .Ltmp45 and .Ltmp56
	.uleb128 .Ltmp57-.Lfunc_begin0          #     jumps to .Ltmp57
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp148-.Lfunc_begin0         # >> Call Site 17 <<
	.uleb128 .Ltmp151-.Ltmp148              #   Call between .Ltmp148 and .Ltmp151
	.uleb128 .Ltmp152-.Lfunc_begin0         #     jumps to .Ltmp152
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp58-.Lfunc_begin0          # >> Call Site 18 <<
	.uleb128 .Ltmp59-.Ltmp58                #   Call between .Ltmp58 and .Ltmp59
	.uleb128 .Ltmp60-.Lfunc_begin0          #     jumps to .Ltmp60
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp61-.Lfunc_begin0          # >> Call Site 19 <<
	.uleb128 .Ltmp64-.Ltmp61                #   Call between .Ltmp61 and .Ltmp64
	.uleb128 .Ltmp65-.Lfunc_begin0          #     jumps to .Ltmp65
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp145-.Lfunc_begin0         # >> Call Site 20 <<
	.uleb128 .Ltmp146-.Ltmp145              #   Call between .Ltmp145 and .Ltmp146
	.uleb128 .Ltmp147-.Lfunc_begin0         #     jumps to .Ltmp147
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp146-.Lfunc_begin0         # >> Call Site 21 <<
	.uleb128 .Ltmp143-.Ltmp146              #   Call between .Ltmp146 and .Ltmp143
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp143-.Lfunc_begin0         # >> Call Site 22 <<
	.uleb128 .Ltmp144-.Ltmp143              #   Call between .Ltmp143 and .Ltmp144
	.uleb128 .Ltmp147-.Lfunc_begin0         #     jumps to .Ltmp147
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp144-.Lfunc_begin0         # >> Call Site 23 <<
	.uleb128 .Ltmp66-.Ltmp144               #   Call between .Ltmp144 and .Ltmp66
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp66-.Lfunc_begin0          # >> Call Site 24 <<
	.uleb128 .Ltmp67-.Ltmp66                #   Call between .Ltmp66 and .Ltmp67
	.uleb128 .Ltmp68-.Lfunc_begin0          #     jumps to .Ltmp68
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp67-.Lfunc_begin0          # >> Call Site 25 <<
	.uleb128 .Ltmp69-.Ltmp67                #   Call between .Ltmp67 and .Ltmp69
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp69-.Lfunc_begin0          # >> Call Site 26 <<
	.uleb128 .Ltmp80-.Ltmp69                #   Call between .Ltmp69 and .Ltmp80
	.uleb128 .Ltmp109-.Lfunc_begin0         #     jumps to .Ltmp109
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp81-.Lfunc_begin0          # >> Call Site 27 <<
	.uleb128 .Ltmp92-.Ltmp81                #   Call between .Ltmp81 and .Ltmp92
	.uleb128 .Ltmp93-.Lfunc_begin0          #     jumps to .Ltmp93
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp94-.Lfunc_begin0          # >> Call Site 28 <<
	.uleb128 .Ltmp105-.Ltmp94               #   Call between .Ltmp94 and .Ltmp105
	.uleb128 .Ltmp106-.Lfunc_begin0         #     jumps to .Ltmp106
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp107-.Lfunc_begin0         # >> Call Site 29 <<
	.uleb128 .Ltmp108-.Ltmp107              #   Call between .Ltmp107 and .Ltmp108
	.uleb128 .Ltmp109-.Lfunc_begin0         #     jumps to .Ltmp109
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp110-.Lfunc_begin0         # >> Call Site 30 <<
	.uleb128 .Ltmp111-.Ltmp110              #   Call between .Ltmp110 and .Ltmp111
	.uleb128 .Ltmp112-.Lfunc_begin0         #     jumps to .Ltmp112
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp113-.Lfunc_begin0         # >> Call Site 31 <<
	.uleb128 .Ltmp114-.Ltmp113              #   Call between .Ltmp113 and .Ltmp114
	.uleb128 .Ltmp142-.Lfunc_begin0         #     jumps to .Ltmp142
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp115-.Lfunc_begin0         # >> Call Site 32 <<
	.uleb128 .Ltmp118-.Ltmp115              #   Call between .Ltmp115 and .Ltmp118
	.uleb128 .Ltmp119-.Lfunc_begin0         #     jumps to .Ltmp119
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp120-.Lfunc_begin0         # >> Call Site 33 <<
	.uleb128 .Ltmp125-.Ltmp120              #   Call between .Ltmp120 and .Ltmp125
	.uleb128 .Ltmp126-.Lfunc_begin0         #     jumps to .Ltmp126
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp127-.Lfunc_begin0         # >> Call Site 34 <<
	.uleb128 .Ltmp132-.Ltmp127              #   Call between .Ltmp127 and .Ltmp132
	.uleb128 .Ltmp133-.Lfunc_begin0         #     jumps to .Ltmp133
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp134-.Lfunc_begin0         # >> Call Site 35 <<
	.uleb128 .Ltmp141-.Ltmp134              #   Call between .Ltmp134 and .Ltmp141
	.uleb128 .Ltmp142-.Lfunc_begin0         #     jumps to .Ltmp142
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp141-.Lfunc_begin0         # >> Call Site 36 <<
	.uleb128 .Lfunc_end2-.Ltmp141           #   Call between .Ltmp141 and .Lfunc_end2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5gpuItPfS_S_iiiff, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6gpuIt3PfS_S_iiiff, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z5gpuItPfS_S_iiiff,@object     # @_Z5gpuItPfS_S_iiiff
	.section	.rodata,"a",@progbits
	.globl	_Z5gpuItPfS_S_iiiff
	.p2align	3, 0x0
_Z5gpuItPfS_S_iiiff:
	.quad	_Z20__device_stub__gpuItPfS_S_iiiff
	.size	_Z5gpuItPfS_S_iiiff, 8

	.type	_Z6gpuIt3PfS_S_iiiff,@object    # @_Z6gpuIt3PfS_S_iiiff
	.globl	_Z6gpuIt3PfS_S_iiiff
	.p2align	3, 0x0
_Z6gpuIt3PfS_S_iiiff:
	.quad	_Z21__device_stub__gpuIt3PfS_S_iiiff
	.size	_Z6gpuIt3PfS_S_iiiff, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error, no config file specified."
	.size	.L.str, 33

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Config file read error"
	.size	.L.str.1, 23

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	","
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"heatDoutput.csv"
	.size	.L.str.3, 16

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	", "
	.size	.L.str.4, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z5gpuItPfS_S_iiiff"
	.size	.L__unnamed_1, 20

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z6gpuIt3PfS_S_iiiff"
	.size	.L__unnamed_2, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z20__device_stub__gpuItPfS_S_iiiff
	.addrsig_sym _Z21__device_stub__gpuIt3PfS_S_iiiff
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z5gpuItPfS_S_iiiff
	.addrsig_sym _Z6gpuIt3PfS_S_iiiff
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z5gpuItPfS_S_iiiff     ; -- Begin function _Z5gpuItPfS_S_iiiff
	.globl	_Z5gpuItPfS_S_iiiff
	.p2align	8
	.type	_Z5gpuItPfS_S_iiiff,@function
_Z5gpuItPfS_S_iiiff:                    ; @_Z5gpuItPfS_S_iiiff
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[8:11], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_mul_i32 s16, s9, s8
	v_mad_u64_u32 v[3:4], null, s15, s2, v[0:1]
	s_mul_i32 s2, s16, s10
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v3
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_35
; %bb.1:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x28
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_mov_b32 s3, exec_lo
	v_cmpx_ne_u32_e32 0, v3
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB0_31
; %bb.2:
	s_add_i32 s15, s8, -1
	s_mov_b32 s9, exec_lo
	v_cmpx_ne_u32_e64 s15, v3
	s_xor_b32 s10, exec_lo, s9
	s_cbranch_execz .LBB0_28
; %bb.3:
	s_add_i32 s9, s16, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, s9, v3
	s_and_saveexec_b32 s9, vcc_lo
	s_xor_b32 s12, exec_lo, s9
	s_cbranch_execz .LBB0_25
; %bb.4:
	s_sub_i32 s9, s16, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, s9, v3
	s_and_saveexec_b32 s9, vcc_lo
	s_xor_b32 s13, exec_lo, s9
	s_cbranch_execz .LBB0_22
; %bb.5:
	s_ashr_i32 s9, s8, 31
	v_ashrrev_i32_e32 v4, 31, v3
	s_add_i32 s14, s8, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_xor_b32 s14, s14, s9
	v_add_nc_u32_e32 v2, v3, v4
	v_cvt_f32_u32_e32 v0, s14
	s_sub_i32 s17, 0, s14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v2, v2, v4
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v1, s17, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v1, v0, v1
	v_add_nc_u32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v0, v2, v0
	v_mul_lo_u32 v0, v0, s14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v2, v0
	v_subrev_nc_u32_e32 v1, s14, v0
	v_cmp_le_u32_e32 vcc_lo, s14, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v1, vcc_lo
	v_subrev_nc_u32_e32 v1, s14, v0
	v_cmp_le_u32_e32 vcc_lo, s14, v0
	s_mov_b32 s14, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v1, vcc_lo
	v_xor_b32_e32 v0, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v4
	v_cmpx_ne_u32_e32 0, v0
	s_xor_b32 s14, exec_lo, s14
	s_cbranch_execz .LBB0_19
; %bb.6:
	v_cmp_ne_u32_e32 vcc_lo, s15, v0
	s_and_saveexec_b32 s15, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s15, exec_lo, s15
	s_cbranch_execz .LBB0_16
; %bb.7:
	v_subrev_nc_u32_e32 v0, s8, v3
	s_mov_b32 s17, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e32 -1, v0
	s_xor_b32 s17, exec_lo, s17
	s_cbranch_execz .LBB0_13
; %bb.8:
	v_mov_b32_e32 v1, 0
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v9, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v1, vcc_lo
	s_clause 0x1
	global_load_b96 v[0:2], v[7:8], off offset:-4
	global_load_b32 v9, v[9:10], off
	v_add_nc_u32_e32 v10, s8, v3
	v_cmp_ge_i32_e32 vcc_lo, s16, v10
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v2, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_f32_e32 v0, v0, v9
	s_and_saveexec_b32 s16, vcc_lo
	s_xor_b32 s16, exec_lo, s16
	s_cbranch_execz .LBB0_10
; %bb.9:
	s_lshl_b64 s[18:19], s[8:9], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v7, vcc_lo, v7, s18
	v_add_co_ci_u32_e32 v8, vcc_lo, s19, v8, vcc_lo
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_load_b32 v2, v[7:8], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, -4.0, v1
	v_fmac_f32_e32 v1, s11, v0
	global_store_b32 v[5:6], v1, off
                                        ; implicit-def: $vgpr0_vgpr1_vgpr2
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr5_vgpr6
.LBB0_10:                               ; %Flow209
	s_and_not1_saveexec_b32 s16, s16
	s_cbranch_execz .LBB0_12
; %bb.11:
	v_add_f32_e32 v0, v1, v0
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, -4.0, v1
	v_fmac_f32_e32 v1, s11, v0
	global_store_b32 v[5:6], v1, off
.LBB0_12:                               ; %Flow210
	s_or_b32 exec_lo, exec_lo, s16
.LBB0_13:                               ; %Flow211
	s_and_not1_saveexec_b32 s16, s17
	s_cbranch_execz .LBB0_15
; %bb.14:
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	s_lshl_b64 s[18:19], s[8:9], 2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v6, vcc_lo
	global_load_b96 v[0:2], v[7:8], off offset:-4
	v_add_co_u32 v7, vcc_lo, v7, s18
	v_add_co_ci_u32_e32 v8, vcc_lo, s19, v8, vcc_lo
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v1, v0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v7, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, -4.0, v1
	v_fmac_f32_e32 v1, s11, v0
	global_store_b32 v[5:6], v1, off
.LBB0_15:                               ; %Flow212
	s_or_b32 exec_lo, exec_lo, s16
.LBB0_16:                               ; %Flow213
	s_and_not1_saveexec_b32 s15, s15
	s_cbranch_execz .LBB0_18
; %bb.17:
	v_subrev_nc_u32_e32 v0, s8, v3
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	s_lshl_b64 s[16:17], s[8:9], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v6, vcc_lo
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	global_load_b64 v[9:10], v[7:8], off offset:-4
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v7, vcc_lo, v7, s16
	v_add_co_ci_u32_e32 v8, vcc_lo, s17, v8, vcc_lo
	s_clause 0x1
	global_load_b32 v0, v[0:1], off
	global_load_b32 v1, v[7:8], off
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v2, v10, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v2, v0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, -4.0, v10
	v_fmac_f32_e32 v10, s11, v0
	v_add_co_u32 v0, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v6, vcc_lo
	global_store_b32 v[0:1], v10, off
.LBB0_18:                               ; %Flow214
	s_or_b32 exec_lo, exec_lo, s15
.LBB0_19:                               ; %Flow215
	s_and_not1_saveexec_b32 s14, s14
	s_cbranch_execz .LBB0_21
; %bb.20:
	v_subrev_nc_u32_e32 v0, s8, v3
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	s_lshl_b64 s[16:17], s[8:9], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v6, vcc_lo
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	global_load_b64 v[9:10], v[7:8], off
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v7, vcc_lo, v7, s16
	v_add_co_ci_u32_e32 v8, vcc_lo, s17, v8, vcc_lo
	s_clause 0x1
	global_load_b32 v0, v[0:1], off
	global_load_b32 v1, v[7:8], off
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v2, v9, v10
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v2, v0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, -4.0, v9
	v_fmac_f32_e32 v9, s11, v0
	v_add_co_u32 v0, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v6, vcc_lo
	global_store_b32 v[0:1], v9, off
.LBB0_21:                               ; %Flow216
	s_or_b32 exec_lo, exec_lo, s14
.LBB0_22:                               ; %Flow217
	s_and_not1_saveexec_b32 s9, s13
	s_cbranch_execz .LBB0_24
; %bb.23:
	v_subrev_nc_u32_e32 v0, s8, v3
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_clause 0x1
	global_load_b64 v[7:8], v[7:8], off
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v1, v7, v8
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v1, v0
	v_add_f32_e32 v0, v7, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, -4.0, v7
	v_fmac_f32_e32 v7, s11, v0
	v_add_co_u32 v0, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v6, vcc_lo
	global_store_b32 v[0:1], v7, off
.LBB0_24:                               ; %Flow218
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_25:                               ; %Flow219
	s_and_not1_saveexec_b32 s9, s12
	s_cbranch_execz .LBB0_27
; %bb.26:
	v_subrev_nc_u32_e32 v0, s8, v3
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_clause 0x1
	global_load_b64 v[7:8], v[7:8], off offset:-4
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v1, v8, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v1, v0
	v_add_f32_e32 v0, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, -4.0, v8
	v_fmac_f32_e32 v8, s11, v0
	v_add_co_u32 v0, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v6, vcc_lo
	global_store_b32 v[0:1], v8, off
.LBB0_27:                               ; %Flow220
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_28:                               ; %Flow221
	s_and_not1_saveexec_b32 s10, s10
	s_cbranch_execz .LBB0_30
; %bb.29:
	v_ashrrev_i32_e32 v4, 31, v3
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[12:13], s[8:9], 2
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v1, vcc_lo
	global_load_b64 v[7:8], v[5:6], off offset:-4
	v_add_co_u32 v5, vcc_lo, v5, s12
	v_add_co_ci_u32_e32 v6, vcc_lo, s13, v6, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[5:6], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v5, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, v8, v5
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, -4.0, v8
	v_fmac_f32_e32 v8, s11, v2
	global_store_b32 v[0:1], v8, off
.LBB0_30:                               ; %Flow222
	s_or_b32 exec_lo, exec_lo, s10
.LBB0_31:                               ; %Flow223
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB0_33
; %bb.32:
	v_mov_b32_e32 v2, 0
	s_ashr_i32 s9, s8, 31
	v_mov_b32_e32 v3, 0
	s_lshl_b64 s[8:9], s[8:9], 2
	v_mov_b32_e32 v4, 0
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[0:1], v2, s[6:7]
	s_add_u32 s6, s6, s8
	s_addc_u32 s7, s7, s9
	s_load_b32 s6, s[6:7], 0x0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v0, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v1, s6, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v1, -4.0, v0
	v_fmac_f32_e32 v0, s11, v1
	global_store_b32 v2, v0, s[4:5]
.LBB0_33:
	s_or_b32 exec_lo, exec_lo, s3
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_neq_f32_e32 vcc_lo, s2, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_35
; %bb.34:
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_35:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5gpuItPfS_S_iiiff
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z5gpuItPfS_S_iiiff, .Lfunc_end0-_Z5gpuItPfS_S_iiiff
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1764
; NumSgprs: 22
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6gpuIt3PfS_S_iiiff    ; -- Begin function _Z6gpuIt3PfS_S_iiiff
	.globl	_Z6gpuIt3PfS_S_iiiff
	.p2align	8
	.type	_Z6gpuIt3PfS_S_iiiff,@function
_Z6gpuIt3PfS_S_iiiff:                   ; @_Z6gpuIt3PfS_S_iiiff
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[16:19], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_mul_i32 s12, s17, s16
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mul_i32 s13, s12, s18
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s13, v1
	s_cbranch_execz .LBB1_109
; %bb.1:
	s_clause 0x2
	s_load_b32 s14, s[0:1], 0x28
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[6:7], s[0:1], 0x10
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u32_e32 0, v1
	s_xor_b32 s15, exec_lo, s0
	s_cbranch_execz .LBB1_105
; %bb.2:
	s_add_i32 s35, s16, -1
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u32_e64 s35, v1
	s_xor_b32 s18, exec_lo, s0
	s_cbranch_execz .LBB1_102
; %bb.3:
	s_add_i32 s36, s12, -1
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u32_e64 s36, v1
	s_xor_b32 s20, exec_lo, s0
	s_cbranch_execz .LBB1_99
; %bb.4:
	s_sub_i32 s37, s12, s16
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u32_e64 s37, v1
	s_xor_b32 s21, exec_lo, s0
	s_cbranch_execz .LBB1_96
; %bb.5:
	s_sub_i32 s5, s13, s12
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u32_e64 s5, v1
	s_xor_b32 s22, exec_lo, s0
	s_cbranch_execz .LBB1_93
; %bb.6:
	s_add_i32 s0, s35, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, s0, v1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s23, exec_lo, s0
	s_cbranch_execz .LBB1_90
; %bb.7:
	s_add_i32 s0, s13, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, s0, v1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s24, exec_lo, s0
	s_cbranch_execz .LBB1_87
; %bb.8:
	s_sub_i32 s0, s13, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, s0, v1
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s25, exec_lo, s0
	s_cbranch_execz .LBB1_84
; %bb.9:
	v_subrev_nc_u32_e32 v3, s16, v1
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e32 -1, v3
	s_xor_b32 s26, exec_lo, s0
	s_cbranch_execz .LBB1_81
; %bb.10:
	s_ashr_i32 s27, s16, 31
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s0, s16, s27
	v_cmp_gt_i32_e64 s4, s12, v1
	s_xor_b32 s0, s0, s27
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v0, s0
	s_sub_i32 s1, 0, s0
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v4, v0
	v_mul_lo_u32 v0, s1, v4
	v_cmp_le_i32_e64 s1, s12, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v4, v0
	v_add_nc_u32_e32 v0, v1, v2
	v_xor_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v4, v5
	v_mul_hi_u32 v4, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, v4, s0
	v_sub_nc_u32_e32 v4, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s0, v4
	v_cmp_le_u32_e32 vcc_lo, s0, v4
	v_cndmask_b32_e32 v4, v4, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s0, v4
	v_cmp_le_u32_e32 vcc_lo, s0, v4
	v_cndmask_b32_e32 v4, v4, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v4, v4, v2
	v_sub_nc_u32_e32 v5, v4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s2, s35, v5
	v_cmp_ne_u32_e32 vcc_lo, s35, v5
	s_and_b32 s0, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s0, s0, -1
	s_and_saveexec_b32 s3, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s28, exec_lo, s3
	s_cbranch_execz .LBB1_78
; %bb.11:
	v_add_nc_u32_e32 v4, s16, v1
	s_xor_b32 s3, s4, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e64 s0, s12, v4
	s_or_b32 s0, s3, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s0
	s_xor_b32 s29, exec_lo, s3
	s_cbranch_execz .LBB1_75
; %bb.12:
	v_cmp_eq_u32_e64 s3, 0, v5
	v_cmp_ne_u32_e64 s0, 0, v5
	s_mov_b32 s31, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, s3
	s_xor_b32 s4, s4, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s30, s4
	s_xor_b32 s30, exec_lo, s30
	s_cbranch_execz .LBB1_72
; %bb.13:
	v_cmp_ge_i32_e64 s38, s5, v1
	v_cmp_lt_i32_e64 s4, s5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s5, s38
	s_and_saveexec_b32 s33, s4
; %bb.14:
	s_mul_i32 s5, s35, s17
	s_and_not1_b32 s34, s38, exec_lo
	s_sub_i32 s5, s13, s5
	s_mov_b32 s31, exec_lo
	v_cmp_le_i32_e64 s5, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, s5, exec_lo
	s_or_b32 s5, s34, s5
; %bb.15:                               ; %Flow826
	s_or_b32 exec_lo, exec_lo, s33
	s_and_saveexec_b32 s33, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s5, exec_lo, s33
	s_cbranch_execz .LBB1_69
; %bb.16:
	s_and_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s2, s2, -1
	s_and_saveexec_b32 s33, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s33, exec_lo, s33
	s_cbranch_execz .LBB1_66
; %bb.17:
	v_cmp_ge_i32_e64 s2, s13, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s13, s2
	s_xor_b32 s34, exec_lo, s13
	s_cbranch_execz .LBB1_63
; %bb.18:
	s_and_b32 s2, s4, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s2, s2, -1
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB1_60
; %bb.19:
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s12, s13
	s_xor_b32 s4, s2, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v4, s4
	s_sub_i32 s2, 0, s4
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v4, v4
	v_mul_lo_u32 v5, s2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v4, v5
	v_add_nc_u32_e32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v0, v4
	v_mul_lo_u32 v4, v4, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v4
	v_subrev_nc_u32_e32 v4, s4, v0
	v_cmp_le_u32_e64 s2, s4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v0, v0, v4, s2
	v_subrev_nc_u32_e32 v4, s4, v0
	v_cmp_le_u32_e64 s2, s4, v0
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v0, v0, v4, s2
	v_xor_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v7, v0, v2
	v_cmpx_ne_u32_e32 0, v7
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB1_57
; %bb.20:
	v_cmp_ne_u32_e64 s2, s35, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s35, s2
	s_xor_b32 s35, exec_lo, s35
	s_cbranch_execz .LBB1_54
; %bb.21:
	v_cmp_ne_u32_e64 s2, s36, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s36, s2
	s_xor_b32 s36, exec_lo, s36
	s_cbranch_execz .LBB1_51
; %bb.22:
	v_cmp_ne_u32_e64 s2, s37, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s37, s2
	s_xor_b32 s2, exec_lo, s37
	s_cbranch_execz .LBB1_48
; %bb.23:
	s_and_saveexec_b32 s37, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s37, exec_lo, s37
	s_cbranch_execz .LBB1_45
; %bb.24:
	s_and_saveexec_b32 s1, s38
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s38, exec_lo, s1
	s_cbranch_execz .LBB1_42
; %bb.25:
	s_mov_b32 s39, exec_lo
	v_cmpx_le_i32_e64 s16, v7
	s_xor_b32 s39, exec_lo, s39
	s_cbranch_execz .LBB1_39
; %bb.26:
	v_subrev_nc_u32_e32 v8, s12, v1
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_mov_b32_e32 v4, 0
	s_lshl_b64 s[40:41], s[12:13], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[10:11], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, s1, s10, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_ci_u32_e64 v4, s1, s11, v6, s1
	v_add_co_u32 v8, s1, s10, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s1, s11, v9, s1
	v_add_co_u32 v12, s1, v3, s40
	v_add_co_ci_u32_e64 v13, s1, s41, v4, s1
	v_add_co_u32 v10, s1, s10, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s1, s11, v11, s1
	s_clause 0x3
	global_load_b32 v8, v[8:9], off
	global_load_b32 v9, v[12:13], off
	global_load_b32 v10, v[10:11], off
	global_load_b32 v0, v[3:4], off
	s_add_i32 s1, s17, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s1, s1, s16
	v_cmp_ge_i32_e64 s1, s1, v7
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v8, v8, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_f32_e32 v7, v8, v10
	s_and_saveexec_b32 s17, s1
	s_xor_b32 s40, exec_lo, s17
	s_cbranch_execz .LBB1_36
; %bb.27:
	s_mov_b32 s17, s27
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[42:43], s[16:17], 2
	v_add_co_u32 v8, s1, v3, s42
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v9, s1, s43, v4, s1
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v7, v7, v8
	s_and_saveexec_b32 s1, vcc_lo
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB1_33
; %bb.28:
	s_and_saveexec_b32 s17, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s17
	s_cbranch_execz .LBB1_30
; %bb.29:
	s_clause 0x1
	global_load_b32 v8, v[3:4], off offset:-4
	global_load_b32 v3, v[3:4], off offset:4
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v4, v7, v8
                                        ; implicit-def: $vgpr7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v4, v3
	v_fmamk_f32 v3, v0, 0xc0c00000, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v0, s19, v3
	v_add_co_u32 v3, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v6, vcc_lo
                                        ; implicit-def: $vgpr5_vgpr6
	global_store_b32 v[3:4], v0, off
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr3_vgpr4
.LBB1_30:                               ; %Flow789
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB1_32
; %bb.31:
	global_load_b32 v3, v[3:4], off offset:4
	v_add_f32_e32 v4, v0, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v4
	v_fmamk_f32 v3, v0, 0xc0c00000, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v0, s19, v3
	v_add_co_u32 v3, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v6, vcc_lo
	global_store_b32 v[3:4], v0, off
.LBB1_32:                               ; %Flow790
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr3_vgpr4
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr5_vgpr6
.LBB1_33:                               ; %Flow792
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_35
; %bb.34:
	global_load_b32 v3, v[3:4], off offset:-4
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v3, v7, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v0, v3
	v_fmamk_f32 v3, v0, 0xc0c00000, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v0, s19, v3
	v_add_co_u32 v3, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v6, vcc_lo
	global_store_b32 v[3:4], v0, off
.LBB1_35:                               ; %Flow793
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr3_vgpr4
                                        ; implicit-def: $vgpr5_vgpr6
.LBB1_36:                               ; %Flow795
	s_and_not1_saveexec_b32 s0, s40
	s_cbranch_execz .LBB1_38
; %bb.37:
	s_clause 0x1
	global_load_b32 v8, v[3:4], off offset:-4
	global_load_b32 v3, v[3:4], off offset:4
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v4, v0, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v8, v4
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v3, v0, 0xc0c00000, v3
	v_fmac_f32_e32 v0, s19, v3
	v_add_co_u32 v3, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v6, vcc_lo
	global_store_b32 v[3:4], v0, off
.LBB1_38:                               ; %Flow796
	s_or_b32 exec_lo, exec_lo, s0
.LBB1_39:                               ; %Flow798
	s_and_not1_saveexec_b32 s0, s39
	s_cbranch_execz .LBB1_41
; %bb.40:
	v_subrev_nc_u32_e32 v3, s12, v1
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	s_lshl_b64 s[40:41], s[12:13], 2
	s_mov_b32 s17, s27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, vcc_lo, s10, v6
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v10, vcc_lo, s10, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v4, vcc_lo
	v_add_co_u32 v12, vcc_lo, v8, s40
	v_add_co_ci_u32_e32 v13, vcc_lo, s41, v9, vcc_lo
	s_clause 0x2
	global_load_b96 v[3:5], v[8:9], off offset:-4
	global_load_b32 v0, v[10:11], off
	global_load_b32 v10, v[12:13], off
	s_lshl_b64 s[40:41], s[16:17], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, vcc_lo, v8, s40
	v_add_co_ci_u32_e32 v9, vcc_lo, s41, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v0, v10
	v_add_f32_e32 v0, v4, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v8, v0
	v_add_f32_e32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v0, v5, v0
	v_add_co_u32 v5, vcc_lo, s8, v6
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v7, vcc_lo
	v_fmamk_f32 v0, v4, 0xc0c00000, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v4, s19, v0
	global_store_b32 v[5:6], v4, off
.LBB1_41:                               ; %Flow799
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr3
.LBB1_42:                               ; %Flow801
	s_and_not1_saveexec_b32 s0, s38
	s_cbranch_execz .LBB1_44
; %bb.43:
	v_subrev_nc_u32_e32 v5, s12, v1
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_mov_b32_e32 v4, 0
	s_mov_b32 s17, s27
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	s_lshl_b64 s[38:39], s[16:17], 2
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v9, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v8, vcc_lo
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v12, vcc_lo, s11, v6, vcc_lo
	v_add_co_u32 v13, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v14, vcc_lo, s11, v4, vcc_lo
	s_clause 0x1
	global_load_b96 v[3:5], v[9:10], off offset:-4
	global_load_b32 v0, v[11:12], off
	v_add_co_u32 v9, vcc_lo, v9, s38
	v_add_co_ci_u32_e32 v10, vcc_lo, s39, v10, vcc_lo
	s_clause 0x1
	global_load_b32 v6, v[13:14], off
	global_load_b32 v9, v[9:10], off
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v0, v4, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v0, v6
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v0, v3
	v_add_f32_e32 v0, v0, v5
	v_add_co_u32 v5, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v4, 0xc0c00000, v0
	v_fmac_f32_e32 v4, s19, v0
	global_store_b32 v[5:6], v4, off
.LBB1_44:                               ; %Flow802
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr3
.LBB1_45:                               ; %Flow804
	s_and_not1_saveexec_b32 s0, s37
	s_cbranch_execz .LBB1_47
; %bb.46:
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_mov_b32_e32 v4, 0
	s_lshl_b64 s[38:39], s[12:13], 2
	s_mov_b32 s17, s27
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[12:13], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, vcc_lo, s10, v6
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v7, vcc_lo
	v_add_co_u32 v10, vcc_lo, v8, s38
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s39, v9, vcc_lo
	s_lshl_b64 s[38:39], s[16:17], 2
	s_clause 0x1
	global_load_b96 v[3:5], v[8:9], off offset:-4
	global_load_b32 v0, v[10:11], off
	v_add_co_u32 v10, vcc_lo, s10, v12
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v13, vcc_lo
	v_add_co_u32 v8, vcc_lo, v8, s38
	v_add_co_ci_u32_e32 v9, vcc_lo, s39, v9, vcc_lo
	s_clause 0x1
	global_load_b32 v10, v[10:11], off
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v0, v4, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v0, v10
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v0, v3
	v_add_f32_e32 v0, v0, v5
	v_add_co_u32 v5, vcc_lo, s8, v6
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v4, 0xc0c00000, v0
	v_fmac_f32_e32 v4, s19, v0
	global_store_b32 v[5:6], v4, off
.LBB1_47:                               ; %Flow805
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr3
.LBB1_48:                               ; %Flow807
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB1_50
; %bb.49:
	v_subrev_nc_u32_e32 v5, s12, v1
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_mov_b32_e32 v4, 0
	s_lshl_b64 s[38:39], s[12:13], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v6, 31, v5
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v9, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v5, vcc_lo, s10, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
	v_add_co_u32 v11, vcc_lo, v9, s38
	v_add_co_ci_u32_e32 v12, vcc_lo, s39, v10, vcc_lo
	v_add_co_u32 v3, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	s_clause 0x3
	global_load_b32 v0, v[5:6], off
	global_load_b32 v5, v[11:12], off
	global_load_b32 v6, v[3:4], off
	global_load_b64 v[3:4], v[9:10], off
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v0, v0, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v0, v6
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v3, v0
	v_add_f32_e32 v0, v4, v0
	v_add_co_u32 v4, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v3, 0xc0c00000, v0
	v_fmac_f32_e32 v3, s19, v0
	global_store_b32 v[4:5], v3, off
.LBB1_50:                               ; %Flow808
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr3
.LBB1_51:                               ; %Flow810
	s_and_not1_saveexec_b32 s0, s36
	s_cbranch_execz .LBB1_53
; %bb.52:
	v_subrev_nc_u32_e32 v5, s12, v1
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_mov_b32_e32 v4, 0
	s_lshl_b64 s[36:37], s[12:13], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v6, 31, v5
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v9, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v5, vcc_lo, s10, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
	v_add_co_u32 v11, vcc_lo, v9, s36
	v_add_co_ci_u32_e32 v12, vcc_lo, s37, v10, vcc_lo
	v_add_co_u32 v3, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	s_clause 0x3
	global_load_b32 v0, v[5:6], off
	global_load_b32 v5, v[11:12], off
	global_load_b32 v6, v[3:4], off
	global_load_b64 v[3:4], v[9:10], off offset:-4
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v0, v0, v5
	v_add_co_u32 v5, vcc_lo, s8, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f32_e32 v0, v0, v6
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v8, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v3, v0
	v_add_f32_e32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v4, 0xc0c00000, v0
	v_fmac_f32_e32 v4, s19, v0
	global_store_b32 v[5:6], v4, off
.LBB1_53:                               ; %Flow811
	s_or_b32 exec_lo, exec_lo, s0
.LBB1_54:                               ; %Flow813
	s_and_not1_saveexec_b32 s0, s35
	s_cbranch_execz .LBB1_56
; %bb.55:
	v_subrev_nc_u32_e32 v3, s12, v1
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_lshl_b64 s[36:37], s[12:13], 2
	s_mov_b32 s17, s27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s10, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	v_add_co_u32 v9, vcc_lo, v7, s36
	v_add_co_ci_u32_e32 v10, vcc_lo, s37, v8, vcc_lo
	s_clause 0x2
	global_load_b64 v[11:12], v[7:8], off offset:-4
	global_load_b32 v0, v[3:4], off
	global_load_b32 v9, v[9:10], off
	s_lshl_b64 s[36:37], s[16:17], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, vcc_lo, v7, s36
	v_add_co_ci_u32_e32 v4, vcc_lo, s37, v8, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v0, v9
	v_add_f32_e32 v0, v12, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v0, v3, v0
	v_add_co_u32 v3, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v6, vcc_lo
	v_add_f32_e32 v0, v11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v12, v0
	v_fmamk_f32 v0, v12, 0xc0c00000, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v12, s19, v0
	global_store_b32 v[3:4], v12, off
.LBB1_56:                               ; %Flow814
	s_or_b32 exec_lo, exec_lo, s0
.LBB1_57:                               ; %Flow816
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB1_59
; %bb.58:
	v_subrev_nc_u32_e32 v3, s12, v1
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_lshl_b64 s[36:37], s[12:13], 2
	s_mov_b32 s17, s27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s10, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	v_add_co_u32 v9, vcc_lo, v7, s36
	v_add_co_ci_u32_e32 v10, vcc_lo, s37, v8, vcc_lo
	s_clause 0x2
	global_load_b64 v[11:12], v[7:8], off
	global_load_b32 v0, v[3:4], off
	global_load_b32 v9, v[9:10], off
	s_lshl_b64 s[36:37], s[16:17], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, vcc_lo, v7, s36
	v_add_co_ci_u32_e32 v4, vcc_lo, s37, v8, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v0, v9
	v_add_f32_e32 v0, v11, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v0, v3, v0
	v_add_co_u32 v3, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v6, vcc_lo
	v_add_f32_e32 v0, v11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v12, v0
	v_fmamk_f32 v0, v11, 0xc0c00000, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v11, s19, v0
	global_store_b32 v[3:4], v11, off
.LBB1_59:                               ; %Flow817
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr3
.LBB1_60:                               ; %Flow818
	s_and_not1_saveexec_b32 s0, s3
	s_cbranch_execz .LBB1_62
; %bb.61:
	v_subrev_nc_u32_e32 v5, s12, v1
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	s_mov_b32 s17, s27
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_lshl_b64 s[2:3], s[16:17], 2
	v_ashrrev_i32_e32 v6, 31, v5
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v8, vcc_lo
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
	s_clause 0x1
	global_load_b64 v[11:12], v[9:10], off
	global_load_b32 v0, v[5:6], off
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s10, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v10, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[5:6], off
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v0, v11, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f32_e32 v0, v0, v3
	v_add_co_u32 v3, vcc_lo, s8, v7
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v4
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v11, v0
	v_add_f32_e32 v0, v12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v11, 0xc0c00000, v0
	v_fmac_f32_e32 v11, s19, v0
	global_store_b32 v[3:4], v11, off
.LBB1_62:                               ; %Flow819
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr3
.LBB1_63:                               ; %Flow821
	s_and_not1_saveexec_b32 s0, s34
	s_cbranch_execz .LBB1_65
; %bb.64:
	v_subrev_nc_u32_e32 v5, s12, v1
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, s10, v7
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v12, vcc_lo, s11, v6, vcc_lo
	v_add_co_u32 v13, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v14, vcc_lo, s11, v4, vcc_lo
	s_clause 0x2
	global_load_b96 v[3:5], v[9:10], off offset:-4
	global_load_b32 v0, v[11:12], off
	global_load_b32 v6, v[13:14], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v4, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v0, v6
	v_add_f32_e32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v3, v0
	v_add_f32_e32 v0, v5, v0
	v_add_co_u32 v5, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v4, 0xc0c00000, v0
	v_fmac_f32_e32 v4, s19, v0
	global_store_b32 v[5:6], v4, off
.LBB1_65:                               ; %Flow822
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr3
.LBB1_66:                               ; %Flow823
	s_and_not1_saveexec_b32 s0, s33
	s_cbranch_execz .LBB1_68
; %bb.67:
	v_subrev_nc_u32_e32 v5, s12, v1
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_mov_b32_e32 v4, 0
	s_mov_b32 s17, s27
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	s_lshl_b64 s[2:3], s[16:17], 2
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v9, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v8, vcc_lo
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
	v_add_co_u32 v3, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	s_clause 0x1
	global_load_b64 v[11:12], v[9:10], off offset:-4
	global_load_b32 v0, v[5:6], off
	v_add_co_u32 v5, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v10, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[5:6], off
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v0, v12, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f32_e32 v0, v0, v3
	v_add_co_u32 v3, vcc_lo, s8, v7
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v4
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v0, v11
	v_add_f32_e32 v0, v12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v12, 0xc0c00000, v0
	v_fmac_f32_e32 v12, s19, v0
	global_store_b32 v[3:4], v12, off
.LBB1_68:                               ; %Flow824
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s31, s31, exec_lo
.LBB1_69:                               ; %Flow827
	s_or_b32 exec_lo, exec_lo, s5
	s_and_saveexec_b32 s0, s31
	s_cbranch_execz .LBB1_71
; %bb.70:
	v_subrev_nc_u32_e32 v3, s12, v1
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	s_mov_b32 s17, s27
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_lshl_b64 s[2:3], s[16:17], 2
	v_ashrrev_i32_e32 v4, 31, v3
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, s10, v6
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v7, vcc_lo
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v4, vcc_lo
	s_clause 0x1
	global_load_b96 v[3:5], v[8:9], off offset:-4
	global_load_b32 v0, v[10:11], off
	v_add_co_u32 v8, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v4, v0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v3, v0
	v_add_f32_e32 v0, v5, v0
	v_add_co_u32 v5, vcc_lo, s8, v6
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v4, 0xc0c00000, v0
	v_fmac_f32_e32 v4, s19, v0
	global_store_b32 v[5:6], v4, off
.LBB1_71:                               ; %Flow828
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr3
.LBB1_72:                               ; %Flow829
	s_and_not1_saveexec_b32 s0, s30
	s_cbranch_execz .LBB1_74
; %bb.73:
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_ashr_i32 s13, s12, 31
	s_mov_b32 s17, s27
	s_lshl_b64 s[2:3], s[12:13], 2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v6, vcc_lo
	v_add_co_u32 v9, vcc_lo, v7, s2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v8, vcc_lo
	s_lshl_b64 s[2:3], s[16:17], 2
	s_clause 0x1
	global_load_b64 v[11:12], v[7:8], off
	global_load_b32 v0, v[9:10], off
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s10, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, v7, s2
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[7:8], off
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v0, v11, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f32_e32 v0, v0, v3
	v_add_co_u32 v3, vcc_lo, s8, v5
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v4
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v11, v0
	v_add_f32_e32 v0, v12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v11, 0xc0c00000, v0
	v_fmac_f32_e32 v11, s19, v0
	global_store_b32 v[3:4], v11, off
.LBB1_74:                               ; %Flow830
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr3
.LBB1_75:                               ; %Flow831
	s_and_not1_saveexec_b32 s0, s29
	s_cbranch_execz .LBB1_77
; %bb.76:
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_mov_b32_e32 v4, 0
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[2:3], s[12:13], 2
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, vcc_lo, s10, v6
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v11, vcc_lo, s3, v9, vcc_lo
	v_add_co_u32 v12, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v4, vcc_lo
	s_clause 0x2
	global_load_b96 v[3:5], v[8:9], off offset:-4
	global_load_b32 v0, v[10:11], off
	global_load_b32 v8, v[12:13], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v4, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v0, v8
	v_add_f32_e32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v3, v0
	v_add_f32_e32 v0, v5, v0
	v_add_co_u32 v5, vcc_lo, s8, v6
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v4, 0xc0c00000, v0
	v_fmac_f32_e32 v4, s19, v0
	global_store_b32 v[5:6], v4, off
.LBB1_77:                               ; %Flow832
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr3
.LBB1_78:                               ; %Flow833
	s_and_not1_saveexec_b32 s0, s28
	s_cbranch_execz .LBB1_80
; %bb.79:
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_mov_b32_e32 v4, 0
	s_ashr_i32 s13, s12, 31
	s_mov_b32 s17, s27
	s_lshl_b64 s[2:3], s[12:13], 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v6, vcc_lo
	v_add_co_u32 v9, vcc_lo, v7, s2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v8, vcc_lo
	v_add_co_u32 v3, vcc_lo, s10, v3
	s_lshl_b64 s[2:3], s[16:17], 2
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	s_clause 0x1
	global_load_b64 v[11:12], v[7:8], off offset:-4
	global_load_b32 v0, v[9:10], off
	v_add_co_u32 v7, vcc_lo, v7, s2
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[7:8], off
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v0, v12, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f32_e32 v0, v0, v3
	v_add_co_u32 v3, vcc_lo, s8, v5
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v4
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v0, v11
	v_add_f32_e32 v0, v12, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v12, 0xc0c00000, v0
	v_fmac_f32_e32 v12, s19, v0
	global_store_b32 v[3:4], v12, off
.LBB1_80:                               ; %Flow834
	s_or_b32 exec_lo, exec_lo, s0
.LBB1_81:                               ; %Flow836
	s_and_not1_saveexec_b32 s0, s26
	s_cbranch_execz .LBB1_83
; %bb.82:
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s13, s12, 31
	s_ashr_i32 s17, s16, 31
	s_lshl_b64 s[2:3], s[12:13], 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, vcc_lo, s10, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v7, vcc_lo
	v_add_co_u32 v10, vcc_lo, v8, s2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s3, v9, vcc_lo
	s_lshl_b64 s[2:3], s[16:17], 2
	s_clause 0x1
	global_load_b96 v[3:5], v[8:9], off offset:-4
	global_load_b32 v0, v[10:11], off
	v_add_co_u32 v8, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v4, v0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v3, v0
	v_add_f32_e32 v0, v5, v0
	v_add_co_u32 v5, vcc_lo, s8, v6
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v4, 0xc0c00000, v0
	v_fmac_f32_e32 v4, s19, v0
	global_store_b32 v[5:6], v4, off
.LBB1_83:                               ; %Flow837
	s_or_b32 exec_lo, exec_lo, s0
.LBB1_84:                               ; %Flow839
	s_and_not1_saveexec_b32 s0, s25
	s_cbranch_execz .LBB1_86
; %bb.85:
	v_subrev_nc_u32_e32 v3, s12, v1
	v_ashrrev_i32_e32 v2, 31, v1
	v_subrev_nc_u32_e32 v5, s16, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v9, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
	s_clause 0x2
	global_load_b64 v[9:10], v[9:10], off
	global_load_b32 v0, v[3:4], off
	global_load_b32 v3, v[5:6], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v9, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v0, v0, v3
	v_add_co_u32 v3, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v8, vcc_lo
	v_add_f32_e32 v0, v9, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v9, v0
	v_add_f32_e32 v0, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v9, 0xc0c00000, v0
	v_fmac_f32_e32 v9, s19, v0
	global_store_b32 v[3:4], v9, off
.LBB1_86:                               ; %Flow840
	s_or_b32 exec_lo, exec_lo, s0
.LBB1_87:                               ; %Flow842
	s_and_not1_saveexec_b32 s0, s24
	s_cbranch_execz .LBB1_89
; %bb.88:
	v_subrev_nc_u32_e32 v3, s12, v1
	v_ashrrev_i32_e32 v2, 31, v1
	v_subrev_nc_u32_e32 v5, s16, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v9, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo
	s_clause 0x2
	global_load_b64 v[9:10], v[9:10], off offset:-4
	global_load_b32 v0, v[3:4], off
	global_load_b32 v3, v[5:6], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v10, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v0, v0, v3
	v_add_co_u32 v3, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v8, vcc_lo
	v_add_f32_e32 v0, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v9, v0
	v_add_f32_e32 v0, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v10, 0xc0c00000, v0
	v_fmac_f32_e32 v10, s19, v0
	global_store_b32 v[3:4], v10, off
.LBB1_89:                               ; %Flow843
	s_or_b32 exec_lo, exec_lo, s0
.LBB1_90:                               ; %Flow845
	s_and_not1_saveexec_b32 s0, s23
	s_cbranch_execz .LBB1_92
; %bb.91:
	v_subrev_nc_u32_e32 v3, s12, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s17, s16, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_lshl_b64 s[2:3], s[16:17], 2
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	s_clause 0x1
	global_load_b64 v[9:10], v[7:8], off offset:-4
	global_load_b32 v0, v[3:4], off
	v_add_co_u32 v3, vcc_lo, v7, s2
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v8, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v10, v0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v3, v0
	v_add_co_u32 v3, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v9, v0
	v_add_f32_e32 v0, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v10, 0xc0c00000, v0
	v_fmac_f32_e32 v10, s19, v0
	global_store_b32 v[3:4], v10, off
.LBB1_92:                               ; %Flow846
	s_or_b32 exec_lo, exec_lo, s0
.LBB1_93:                               ; %Flow848
	s_and_not1_saveexec_b32 s0, s22
	s_cbranch_execz .LBB1_95
; %bb.94:
	v_subrev_nc_u32_e32 v3, s12, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s17, s16, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_lshl_b64 s[2:3], s[16:17], 2
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	s_clause 0x1
	global_load_b64 v[9:10], v[7:8], off
	global_load_b32 v0, v[3:4], off
	v_add_co_u32 v3, vcc_lo, v7, s2
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v8, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v9, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v9, v0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v3, v0
	v_add_co_u32 v3, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v9, v0
	v_add_f32_e32 v0, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v9, 0xc0c00000, v0
	v_fmac_f32_e32 v9, s19, v0
	global_store_b32 v[3:4], v9, off
.LBB1_95:                               ; %Flow849
	s_or_b32 exec_lo, exec_lo, s0
.LBB1_96:                               ; %Flow851
	s_and_not1_saveexec_b32 s0, s21
	s_cbranch_execz .LBB1_98
; %bb.97:
	v_ashrrev_i32_e32 v2, 31, v1
	v_subrev_nc_u32_e32 v3, s16, v1
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_lshl_b64 s[2:3], s[12:13], 2
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v7, s2
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v8, vcc_lo
	v_add_co_u32 v3, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	s_clause 0x2
	global_load_b64 v[7:8], v[7:8], off
	global_load_b32 v0, v[9:10], off
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v7, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v0, v0, v3
	v_add_co_u32 v3, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v6, vcc_lo
	v_add_f32_e32 v0, v7, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v7, v0
	v_add_f32_e32 v0, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v7, 0xc0c00000, v0
	v_fmac_f32_e32 v7, s19, v0
	global_store_b32 v[3:4], v7, off
.LBB1_98:                               ; %Flow852
	s_or_b32 exec_lo, exec_lo, s0
.LBB1_99:                               ; %Flow854
	s_and_not1_saveexec_b32 s0, s20
	s_cbranch_execz .LBB1_101
; %bb.100:
	v_ashrrev_i32_e32 v2, 31, v1
	v_subrev_nc_u32_e32 v3, s16, v1
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_lshl_b64 s[2:3], s[12:13], 2
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v7, s2
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v8, vcc_lo
	v_add_co_u32 v3, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	s_clause 0x2
	global_load_b64 v[7:8], v[7:8], off offset:-4
	global_load_b32 v0, v[9:10], off
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v8, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v0, v0, v3
	v_add_co_u32 v3, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v6, vcc_lo
	v_add_f32_e32 v0, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v7, v0
	v_add_f32_e32 v0, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v8, 0xc0c00000, v0
	v_fmac_f32_e32 v8, s19, v0
	global_store_b32 v[3:4], v8, off
.LBB1_101:                              ; %Flow855
	s_or_b32 exec_lo, exec_lo, s0
.LBB1_102:                              ; %Flow857
	s_and_not1_saveexec_b32 s0, s18
	s_cbranch_execz .LBB1_104
; %bb.103:
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s13, s12, 31
	s_ashr_i32 s17, s16, 31
	s_lshl_b64 s[2:3], s[12:13], 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s10, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, v5, s2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v6, vcc_lo
	s_lshl_b64 s[2:3], s[16:17], 2
	s_clause 0x1
	global_load_b64 v[9:10], v[5:6], off offset:-4
	global_load_b32 v0, v[7:8], off
	v_add_co_u32 v5, vcc_lo, v5, s2
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	v_add_co_u32 v3, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v10, v0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v0, v9, v0
	v_add_f32_e32 v0, v10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v0, v10, 0xc0c00000, v0
	v_fmac_f32_e32 v10, s19, v0
	global_store_b32 v[3:4], v10, off
.LBB1_104:                              ; %Flow858
	s_or_b32 exec_lo, exec_lo, s0
.LBB1_105:                              ; %Flow860
	s_and_not1_saveexec_b32 s0, s15
	s_cbranch_execz .LBB1_107
; %bb.106:
	v_mov_b32_e32 v3, 0
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[12:13], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s10, s2
	global_load_b64 v[0:1], v3, s[10:11]
	s_addc_u32 s3, s11, s3
	s_ashr_i32 s17, s16, 31
	s_load_b32 s1, s[2:3], 0x0
	s_lshl_b64 s[2:3], s[16:17], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_add_u32 s2, s10, s2
	s_addc_u32 s3, s11, s3
	s_load_b32 s2, s[2:3], 0x0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v2, s1, v0
	v_add_f32_e32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, s2, v2
	v_add_f32_e32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v2
	v_fmamk_f32 v1, v0, 0xc0c00000, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_fmac_f32 v0, s19, v1 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v2, 0
	global_store_b32 v3, v0, s[8:9]
.LBB1_107:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(0)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_neq_f32_e32 vcc_lo, s14, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_109
; %bb.108:
	v_add_co_u32 v0, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB1_109:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6gpuIt3PfS_S_iiiff
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 44
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z6gpuIt3PfS_S_iiiff, .Lfunc_end1-_Z6gpuIt3PfS_S_iiiff
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 6648
; NumSgprs: 46
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 46
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5gpuItPfS_S_iiiff
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z5gpuItPfS_S_iiiff.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6gpuIt3PfS_S_iiiff
    .private_segment_fixed_size: 0
    .sgpr_count:     46
    .sgpr_spill_count: 0
    .symbol:         _Z6gpuIt3PfS_S_iiiff.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
