// Corresponding header file: /include/square_ops.h
#include <cuda_runtime.h>
#include <float.h>

float *d_x, *d_y, *d_logY;

__global__
void separateChannels(const uchar4* const inputImageRGBA,
                      int numRows,
                      int numCols,
                      float* const redChannel,
                      float* const greenChannel,
                      float* const blueChannel)
{
  int absolute_image_position_x = blockDim.x * blockIdx.x + threadIdx.x;
  int absolute_image_position_y = blockDim.y * blockIdx.y + threadIdx.y;

  if ( absolute_image_position_x >= numCols || absolute_image_position_y >= numRows )
  	return ;

  int thread_1D_pos = absolute_image_position_y * numCols + absolute_image_position_x;

  redChannel[thread_1D_pos] = inputImageRGBA[thread_1D_pos].x;
  greenChannel[thread_1D_pos] = inputImageRGBA[thread_1D_pos].y;
  blueChannel[thread_1D_pos] = inputImageRGBA[thread_1D_pos].z;
}

__global__
void rgb_to_xyY(
    float* d_r,
    float* d_g,
    float* d_b,
    float* d_x,
    float* d_y,
    float* d_log_Y,
    float  delta,
    int num_pixels_y,
    int num_pixels_x )
{
	int  ny = num_pixels_y;
  int  nx = num_pixels_x;
  int2 image_index_2d = make_int2( ( blockIdx.x * blockDim.x ) + threadIdx.x, ( blockIdx.y * blockDim.y ) + threadIdx.y );
  int  image_index_1d = ( nx * image_index_2d.y ) + image_index_2d.x;

  if ( image_index_2d.x < nx && image_index_2d.y < ny )
  {
    float r = d_r[ image_index_1d ];
    float g = d_g[ image_index_1d ];
    float b = d_b[ image_index_1d ];

    float X = ( r * 0.4124f ) + ( g * 0.3576f ) + ( b * 0.1805f );
    float Y = ( r * 0.2126f ) + ( g * 0.7152f ) + ( b * 0.0722f );
    float Z = ( r * 0.0193f ) + ( g * 0.1192f ) + ( b * 0.9505f );

    float L = X + Y + Z;
    float x = X / L;
    float y = Y / L;

    float log_Y = log10f( delta + Y );

    d_x[ image_index_1d ]     = x;
    d_y[ image_index_1d ]     = y;
    d_log_Y[ image_index_1d ] = log_Y;
  }
}

__global__ void kernel_scan(int* d_bins, int size)
{
    int index = blockDim.x*blockIdx.x+threadIdx.x;
    
    if(index >= size)
      return;
    int temp;
    if(index > 0)
    {
      temp = d_bins[index - 1];
    }
    else
    {
      temp = 0;
    }
    __syncthreads();
    
    d_bins[index] = temp;
    __syncthreads();
    
    int val = 0;
    for(int s=1; s<=size; s*=2)
    {
        int a = index-s;
        val = 0; 
        if(a>=0)
             val = d_bins[a];
        __syncthreads();
        
        if(a>=0)
            d_bins[index] += val;
        __syncthreads();
    }
}

__global__ void kernel_histo(const float* d_in, int* d_bins, float min,float max,int size, int numBins)
{
	int index = blockDim.x*blockIdx.x+threadIdx.x;
  if(index<size)
  {
      int a = ((d_in[index] - min)/(max-min))* numBins;
      atomicAdd(&d_bins[a], 1);
  }
}

__global__ void kernel_maxmin(float* d_in, float*d_out, int size, int maxmin)
{
    int tid = threadIdx.x;
    int x = blockDim.x * blockIdx.x + threadIdx.x;
    
    extern __shared__ float shared[];
    
    if(x>=size)
      return ;
    
    if(x<size)
    	shared[tid] = d_in[x];
    else
    {
        if(maxmin == 0)
            shared[tid] = FLT_MAX;
        else
            shared[tid] = -FLT_MAX;
    }
    __syncthreads();
    
    for(int s=1; s<blockDim.x; s++)
    {
      if(tid % (2*s) == 0)
      {
        if(s+tid < blockDim.x)
            if(maxmin == 0)
              shared[tid] = min(shared[tid], shared[tid+s]);
            else
              shared[tid] = max(shared[tid], shared[tid+s]);
        
      }
        __syncthreads();
    }
    __syncthreads();
    
    if(tid == 0)
        d_out[blockIdx.x] = shared[0];
}


__global__ void tonemap(
    float* d_x,
    float* d_y,
    float* d_log_Y,
    float* d_cdf_norm,
    float* d_r_new,
    float* d_g_new,
    float* d_b_new,
    float  min_log_Y,
    float  max_log_Y,
    float  log_Y_range,
    int    num_bins,
    int    num_pixels_y,
    int    num_pixels_x )
{
  int  ny             = num_pixels_y;
  int  nx             = num_pixels_x;
  int2 image_index_2d = make_int2( ( blockIdx.x * blockDim.x ) + threadIdx.x, ( blockIdx.y * blockDim.y ) + threadIdx.y );
  int  image_index_1d = ( nx * image_index_2d.y ) + image_index_2d.x;

  if ( image_index_2d.x < nx && image_index_2d.y < ny )
  {
    float x         = d_x[ image_index_1d ];
    float y         = d_y[ image_index_1d ];
    float log_Y     = d_log_Y[ image_index_1d ];
    int   bin_index = min( num_bins - 1, int( (num_bins * ( log_Y - min_log_Y ) ) / log_Y_range ) );
    float Y_new     = d_cdf_norm[ bin_index ];

    float X_new = x * ( Y_new / y );
    float Z_new = ( 1 - x - y ) * ( Y_new / y );

    float r_new = ( X_new *  3.2406f ) + ( Y_new * -1.5372f ) + ( Z_new * -0.4986f );
    float g_new = ( X_new * -0.9689f ) + ( Y_new *  1.8758f ) + ( Z_new *  0.0415f );
    float b_new = ( X_new *  0.0557f ) + ( Y_new * -0.2040f ) + ( Z_new *  1.0570f );

    d_r_new[ image_index_1d ] = r_new;
    d_g_new[ image_index_1d ] = g_new;
    d_b_new[ image_index_1d ] = b_new;
  }
}

__global__
void recombineChannels(const float* const redChannel,
                       const float* const greenChannel,
                       const float* const blueChannel,
                       uchar4* const outputImageRGBA,
                       int numRows,
                       int numCols)
{
  const int2 thread_2D_pos = make_int2( blockIdx.x * blockDim.x + threadIdx.x,
                                        blockIdx.y * blockDim.y + threadIdx.y);

  const int thread_1D_pos = thread_2D_pos.y * numCols + thread_2D_pos.x;

  if (thread_2D_pos.x >= numCols || thread_2D_pos.y >= numRows)
    return;

  unsigned char red   = redChannel[thread_1D_pos];
  unsigned char green = greenChannel[thread_1D_pos];
  unsigned char blue  = blueChannel[thread_1D_pos];

  //Alpha should be 255 for no transparency
  uchar4 outputPixel = make_uchar4(red, green, blue, 255);

  outputImageRGBA[thread_1D_pos] = outputPixel;
}

__global__ void normalize_cdf(
    unsigned int* d_input_cdf,
    float*        d_output_cdf,
    int           n
    )
{
  const float normalization_constant = 1.f / d_input_cdf[n - 1];

  int global_index_1d = ( blockIdx.x * blockDim.x ) + threadIdx.x;

  if ( global_index_1d < n )
  {
    unsigned int input_value  = d_input_cdf[ global_index_1d ];
    float        output_value = input_value * normalization_constant;

    d_output_cdf[ global_index_1d ] = output_value;
  }
}



void findmaxmin(const float* d_in, float &ans,int size, int maxmin)
{

  int block_size = 1024;
  int curr_size = size;
  float *d_curr_in;
  cudaMalloc(&d_curr_in, size * sizeof(float));
  cudaMemcpy(d_curr_in, d_in, size*sizeof(float), cudaMemcpyDeviceToDevice);
  float *d_out;
  while(1)
  {
    int newSize = curr_size/block_size +1;
    cudaMalloc(&d_out, sizeof(float) * newSize); 
    dim3 threads(block_size);
    dim3 blocks(newSize);
    
    if(maxmin == 0)
        kernel_maxmin<<<blocks, threads, sizeof(float)*block_size>>>(d_curr_in, d_out, curr_size, 0);
    else
        kernel_maxmin<<<blocks, threads, sizeof(float)*block_size >>>(d_curr_in, d_out, curr_size, 1);
        
    cudaMalloc(&d_curr_in, sizeof(float)*newSize);
    cudaMemcpy(d_curr_in, d_out, sizeof(float)* newSize, cudaMemcpyDeviceToDevice);
    
    if(newSize == 1)
    break;
    curr_size = newSize;
  }
  cudaMemcpy(&ans, d_out, sizeof(float), cudaMemcpyDeviceToHost);
}

void preprocess(uchar4* d_image, float** d_luminance, unsigned int** d_cdf, size_t &numRows, size_t &numCols, unsigned int *numberOfBins)
{
	float *d_red, *d_blue, *d_green;
	int numBins = 1024;

	dim3 blockSize(32,32,1);
	const dim3 gridSize(numRows/blockSize.x+1, numCols/blockSize.y+1,1);  

	cudaMalloc(&d_red, sizeof( float) * numRows * numCols);
	cudaMalloc(&d_blue, sizeof(float) * numRows * numCols);
	cudaMalloc(&d_green, sizeof( float) * numRows * numCols);
	separateChannels<<<gridSize, blockSize>>>(d_image, numRows, numCols, d_red, d_blue, d_green);

	cudaMalloc(&d_x, sizeof( float) * numRows * numCols);
	cudaMalloc(&d_y, sizeof(float) * numRows * numCols);
	cudaMalloc(&d_logY, sizeof(float) * numRows * numCols);
	rgb_to_xyY<<<gridSize, blockSize>>>(d_red, d_blue, d_green, d_x, d_y, d_logY, .0001f, numRows, numCols) ;

	*d_luminance = d_logY;

	//allocate memory for the cdf of the histogram
  *numberOfBins = numBins;
  (cudaMalloc(&d_cdf, sizeof(unsigned int) * numBins));
  (cudaMemset(d_cdf, 0, sizeof(unsigned int) * numBins));
}

void toneMap(const float* const d_logLuminance,
            unsigned int* const d_cdf,
            float &min_logLum,
            float &max_logLum,
            const size_t numRows,
            const size_t numCols,
            const size_t numBins)
{
	findmaxmin(d_logLuminance, min_logLum, numRows*numCols, 0);
  findmaxmin(d_logLuminance, max_logLum, numRows*numCols, 1);

  int *d_bins;
  cudaMalloc(&d_bins, sizeof(int)*numBins);
  cudaMemset(d_bins, 0, sizeof(int)*numBins);
  
  int size = numRows*numCols;
  dim3 threads(1024,1,1);
  dim3 blocks((size/threads.x)+1,1,1);
  
  kernel_histo<<<blocks, threads>>>(d_logLuminance, d_bins, min_logLum, max_logLum, size, numBins);
  
  dim3 scan_blocks(numBins/threads.x +1);
  kernel_scan<<<scan_blocks, threads>>>(d_bins, numBins);
  cudaMemcpy(d_cdf, d_bins, sizeof(int) * numBins, cudaMemcpyDeviceToDevice);
}

void postProcess(uchar4* d_out, const float* const d_logLuminance,
                unsigned int* const d_cdf,
                size_t numRows, size_t numCols,
	              float min_log_Y, float max_log_Y)
	{
	int numBins = 1024;
	const int numPixels = numRows * numCols;

  const int numThreads = 192;

  float *d_cdf_normalized;

 	cudaMalloc(&d_cdf_normalized, sizeof(float) * numBins);

  normalize_cdf<<< (numBins + numThreads - 1) / numThreads,
                    numThreads>>>(d_cdf,
                                  d_cdf_normalized,
                                  numBins);
  float log_Y_range = max_log_Y - min_log_Y;

  const dim3 blockSize(32, 16, 1);
  const dim3 gridSize( (numCols + blockSize.x - 1) / blockSize.x,
                       (numRows + blockSize.y - 1) / blockSize.y );

  //next perform the actual tone-mapping
  //we map each luminance value to its new value
  //and then transform back to RGB space
  float *d_red, *d_blue, *d_green;
  cudaMalloc(&d_red, sizeof( float) * numRows * numCols);
	cudaMalloc(&d_blue, sizeof(float) * numRows * numCols);
	cudaMalloc(&d_green, sizeof(float) * numRows * numCols);
  tonemap<<<gridSize, blockSize>>>(d_x, d_y, d_logY,
                                   d_cdf_normalized,
                                   d_red, d_green, d_blue,
                                   min_log_Y, max_log_Y,
                                   log_Y_range, numBins,
                                   numRows, numCols);

  recombineChannels<<<gridSize, blockSize>>>(d_red, d_blue, d_green, d_out, numRows, numCols);

}

uchar4* hdr_ops(uchar4* d_image, size_t numRows, size_t numCols)
{
	float *d_luminance;
  unsigned int *d_cdf;
  unsigned int numBins;
 	float min_logLum, max_logLum;
  min_logLum = 0.f;
  max_logLum = 1.f;

  preprocess(d_image, &d_luminance, &d_cdf, numRows, numCols, &numBins);

  toneMap(d_luminance, d_cdf, min_logLum, max_logLum, numRows, numCols, numBins);

  uchar4* d_out;
  cudaMalloc(&d_out, sizeof(uchar4) * numRows * numCols);
  postProcess(d_out, d_luminance, d_cdf, numRows, numCols, min_logLum, max_logLum);

  return d_out;

}

	.file	"tmpxft_002b5c47_00000000-6_hdr_ops.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2015:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2015:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0, @function
_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0:
.LFB2174:
	.cfi_startproc
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE2174:
	.size	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0, .-_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	.globl	_Z53__device_stub__Z16separateChannelsPK6uchar4iiPfS2_S2_PK6uchar4iiPfS2_S2_
	.type	_Z53__device_stub__Z16separateChannelsPK6uchar4iiPfS2_S2_PK6uchar4iiPfS2_S2_, @function
_Z53__device_stub__Z16separateChannelsPK6uchar4iiPfS2_S2_PK6uchar4iiPfS2_S2_:
.LFB2037:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 36(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 32(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z16separateChannelsPK6uchar4iiPfS2_S2_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L3:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2037:
	.size	_Z53__device_stub__Z16separateChannelsPK6uchar4iiPfS2_S2_PK6uchar4iiPfS2_S2_, .-_Z53__device_stub__Z16separateChannelsPK6uchar4iiPfS2_S2_PK6uchar4iiPfS2_S2_
	.globl	_Z16separateChannelsPK6uchar4iiPfS2_S2_
	.type	_Z16separateChannelsPK6uchar4iiPfS2_S2_, @function
_Z16separateChannelsPK6uchar4iiPfS2_S2_:
.LFB2038:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__Z16separateChannelsPK6uchar4iiPfS2_S2_PK6uchar4iiPfS2_S2_
	.cfi_endproc
.LFE2038:
	.size	_Z16separateChannelsPK6uchar4iiPfS2_S2_, .-_Z16separateChannelsPK6uchar4iiPfS2_S2_
	.globl	_Z43__device_stub__Z10rgb_to_xyYPfS_S_S_S_S_fiiPfS_S_S_S_S_fii
	.type	_Z43__device_stub__Z10rgb_to_xyYPfS_S_S_S_S_fiiPfS_S_S_S_S_fii, @function
_Z43__device_stub__Z10rgb_to_xyYPfS_S_S_S_S_fiiPfS_S_S_S_S_fii:
.LFB2039:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	72(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z10rgb_to_xyYPfS_S_S_S_S_fii(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 240
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L9:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2039:
	.size	_Z43__device_stub__Z10rgb_to_xyYPfS_S_S_S_S_fiiPfS_S_S_S_S_fii, .-_Z43__device_stub__Z10rgb_to_xyYPfS_S_S_S_S_fiiPfS_S_S_S_S_fii
	.globl	_Z10rgb_to_xyYPfS_S_S_S_S_fii
	.type	_Z10rgb_to_xyYPfS_S_S_S_S_fii, @function
_Z10rgb_to_xyYPfS_S_S_S_S_fii:
.LFB2040:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z10rgb_to_xyYPfS_S_S_S_S_fiiPfS_S_S_S_S_fii
	.cfi_endproc
.LFE2040:
	.size	_Z10rgb_to_xyYPfS_S_S_S_S_fii, .-_Z10rgb_to_xyYPfS_S_S_S_S_fii
	.globl	_Z10preprocessP6uchar4PPfPPjRmS5_S3_
	.type	_Z10preprocessP6uchar4PPfPPjRmS5_S3_, @function
_Z10preprocessP6uchar4PPfPPjRmS5_S3_:
.LFB2009:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%r9, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%r8, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rcx, %rbx
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	movq	(%r8), %rsi
	movq	%rdx, 8(%rsp)
	movq	(%rcx), %rdx
	leaq	24(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	movq	%rdx, %rax
	movl	$1, 68(%rsp)
	shrq	$5, %rax
	incl	%eax
	movl	%eax, 60(%rsp)
	movq	%rsi, %rax
	imulq	%rdx, %rsi
	shrq	$5, %rax
	incl	%eax
	salq	$2, %rsi
	movl	%eax, 64(%rsp)
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	(%rbx), %rsi
	imulq	0(%rbp), %rsi
	leaq	32(%rsp), %rdi
	salq	$2, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	(%rbx), %rsi
	imulq	0(%rbp), %rsi
	leaq	40(%rsp), %rdi
	salq	$2, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	60(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	68(%rsp), %esi
	movl	$1, %ecx
	movabsq	$137438953504, %rdx
	movl	$1, 56(%rsp)
	movq	%rdx, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	40(%rsp), %r9
	movq	32(%rsp), %r8
	movq	%r14, %rdi
	movq	24(%rsp), %rcx
	movl	0(%rbp), %edx
	movl	(%rbx), %esi
	call	_Z53__device_stub__Z16separateChannelsPK6uchar4iiPfS2_S2_PK6uchar4iiPfS2_S2_
.L15:
	movq	(%rbx), %rsi
	imulq	0(%rbp), %rsi
	leaq	d_x(%rip), %rdi
	salq	$2, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	(%rbx), %rsi
	imulq	0(%rbp), %rsi
	leaq	d_y(%rip), %rdi
	salq	$2, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	(%rbx), %rsi
	imulq	0(%rbp), %rsi
	leaq	d_logY(%rip), %rdi
	salq	$2, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movl	56(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	movq	48(%rsp), %rdx
	movq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	0(%rbp), %rax
	movss	.LC0(%rip), %xmm0
	movq	d_logY(%rip), %r9
	movq	d_y(%rip), %r8
	pushq	%rax
	.cfi_def_cfa_offset 136
	movq	(%rbx), %rax
	movq	d_x(%rip), %rcx
	pushq	%rax
	.cfi_def_cfa_offset 144
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z43__device_stub__Z10rgb_to_xyYPfS_S_S_S_S_fiiPfS_S_S_S_S_fii
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L16:
	movq	d_logY(%rip), %rax
	leaq	8(%rsp), %rdi
	movl	$4096, %esi
	movq	%rax, 0(%r13)
	movl	$1024, (%r12)
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	movl	$4096, %edx
	call	cudaMemset@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$80, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2009:
	.size	_Z10preprocessP6uchar4PPfPPjRmS5_S3_, .-_Z10preprocessP6uchar4PPfPPjRmS5_S3_
	.globl	_Z32__device_stub__Z11kernel_scanPiiPii
	.type	_Z32__device_stub__Z11kernel_scanPiiPii, @function
_Z32__device_stub__Z11kernel_scanPiiPii:
.LFB2041:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11kernel_scanPii(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L19:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2041:
	.size	_Z32__device_stub__Z11kernel_scanPiiPii, .-_Z32__device_stub__Z11kernel_scanPiiPii
	.globl	_Z11kernel_scanPii
	.type	_Z11kernel_scanPii, @function
_Z11kernel_scanPii:
.LFB2042:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z11kernel_scanPiiPii
	.cfi_endproc
.LFE2042:
	.size	_Z11kernel_scanPii, .-_Z11kernel_scanPii
	.globl	_Z39__device_stub__Z12kernel_histoPKfPiffiiPKfPiffii
	.type	_Z39__device_stub__Z12kernel_histoPKfPiffiiPKfPiffii, @function
_Z39__device_stub__Z12kernel_histoPKfPiffiiPKfPiffii:
.LFB2043:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, (%rsp)
	leaq	48(%rsp), %rcx
	movss	%xmm0, 12(%rsp)
	movss	%xmm1, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z12kernel_histoPKfPiffii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L24:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2043:
	.size	_Z39__device_stub__Z12kernel_histoPKfPiffiiPKfPiffii, .-_Z39__device_stub__Z12kernel_histoPKfPiffiiPKfPiffii
	.globl	_Z12kernel_histoPKfPiffii
	.type	_Z12kernel_histoPKfPiffii, @function
_Z12kernel_histoPKfPiffii:
.LFB2044:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z12kernel_histoPKfPiffiiPKfPiffii
	.cfi_endproc
.LFE2044:
	.size	_Z12kernel_histoPKfPiffii, .-_Z12kernel_histoPKfPiffii
	.globl	_Z37__device_stub__Z13kernel_maxminPfS_iiPfS_ii
	.type	_Z37__device_stub__Z13kernel_maxminPfS_iiPfS_ii, @function
_Z37__device_stub__Z13kernel_maxminPfS_iiPfS_ii:
.LFB2045:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z13kernel_maxminPfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L29:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2045:
	.size	_Z37__device_stub__Z13kernel_maxminPfS_iiPfS_ii, .-_Z37__device_stub__Z13kernel_maxminPfS_iiPfS_ii
	.globl	_Z13kernel_maxminPfS_ii
	.type	_Z13kernel_maxminPfS_ii, @function
_Z13kernel_maxminPfS_ii:
.LFB2046:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z13kernel_maxminPfS_iiPfS_ii
	.cfi_endproc
.LFE2046:
	.size	_Z13kernel_maxminPfS_ii, .-_Z13kernel_maxminPfS_ii
	.globl	_Z10findmaxminPKfRfii
	.type	_Z10findmaxminPKfRfii, @function
_Z10findmaxminPKfRfii:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%ecx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movslq	%edx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rbp, %rbx
	salq	$2, %rbp
	movq	%rbp, %rsi
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %r14
	movq	%r14, %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	16(%rsp), %rdi
	movq	%r15, %rsi
	movq	%rbp, %rdx
	movabsq	$4294968320, %r15
	movl	$3, %ecx
	call	cudaMemcpy@PLT
.L40:
	movl	%ebx, %eax
	movl	$1024, %ecx
	leaq	24(%rsp), %rdi
	cltd
	idivl	%ecx
	leal	1(%rax), %ebp
	movslq	%ebp, %rax
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	xorl	%r9d, %r9d
	testl	%r13d, %r13d
	movl	%ebp, 44(%rsp)
	movl	$4096, %r8d
	movq	%r15, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	44(%rsp), %rdi
	movl	52(%rsp), %esi
	jne	.L35
	call	__cudaPushCallConfiguration@PLT
	xorl	%ecx, %ecx
	testl	%eax, %eax
	jne	.L37
	jmp	.L43
.L35:
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	movl	$1, %ecx
.L43:
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %edx
	call	_Z37__device_stub__Z13kernel_maxminPfS_iiPfS_ii
.L37:
	movq	8(%rsp), %rsi
	movq	%r14, %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$3, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	cmpl	$1, %ebp
	je	.L39
	movl	%ebp, %ebx
	jmp	.L40
.L39:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L41
	call	__stack_chk_fail@PLT
.L41:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2008:
	.size	_Z10findmaxminPKfRfii, .-_Z10findmaxminPKfRfii
	.globl	_Z7toneMapPKfPjRfS2_mmm
	.type	_Z7toneMapPKfPjRfS2_mmm, @function
_Z7toneMapPKfPjRfS2_mmm:
.LFB2010:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rcx, %r15
	xorl	%ecx, %ecx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r8d, %ebp
	movq	%r12, %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	imull	%r9d, %ebp
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movl	%ebp, %edx
	movq	%rdi, 8(%rsp)
	movq	144(%rsp), %rbx
	leaq	0(,%rbx,4), %r14
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	_Z10findmaxminPKfRfii
	movq	8(%rsp), %rdi
	movl	%ebp, %edx
	movq	%r15, %rsi
	movl	$1, %ecx
	call	_Z10findmaxminPKfRfii
	leaq	24(%rsp), %rdi
	movq	%r14, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	movq	%r14, %rdx
	call	cudaMemset@PLT
	movl	%ebp, %eax
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	shrl	$10, %eax
	salq	$10, %rdx
	xorl	%r8d, %r8d
	movl	$1, %ecx
	incl	%eax
	movq	%rdx, 36(%rsp)
	movl	%eax, 48(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 52(%rsp)
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	movl	$1, 44(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L45
	movss	(%r15), %xmm1
	movss	(%r12), %xmm0
	movl	%ebx, %ecx
	movl	%ebp, %edx
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z39__device_stub__Z12kernel_histoPKfPiffiiPKfPiffii
.L45:
	movq	%rbx, %rax
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	xorl	%r9d, %r9d
	shrq	$10, %rax
	xorl	%r8d, %r8d
	incl	%eax
	movl	%eax, 60(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	60(%rsp), %rdi
	movl	68(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	movq	24(%rsp), %rdi
	movl	%ebx, %esi
	call	_Z32__device_stub__Z11kernel_scanPiiPii
.L46:
	movq	24(%rsp), %rsi
	movl	$3, %ecx
	movq	%r14, %rdx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L47
	call	__stack_chk_fail@PLT
.L47:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2010:
	.size	_Z7toneMapPKfPjRfS2_mmm, .-_Z7toneMapPKfPjRfS2_mmm
	.globl	_Z44__device_stub__Z7tonemapPfS_S_S_S_S_S_fffiiiPfS_S_S_S_S_S_fffiii
	.type	_Z44__device_stub__Z7tonemapPfS_S_S_S_S_S_fffiiiPfS_S_S_S_S_S_fffiii, @function
_Z44__device_stub__Z7tonemapPfS_S_S_S_S_S_fffiiiPfS_S_S_S_S_S_fffiii:
.LFB2047:
	.cfi_startproc
	endbr64
	subq	$264, %rsp
	.cfi_def_cfa_offset 272
	movq	272(%rsp), %rax
	movq	%rdi, 72(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	108(%rsp), %rsi
	movq	%rdx, 56(%rsp)
	leaq	80(%rsp), %rdx
	movq	%rcx, 48(%rsp)
	leaq	88(%rsp), %rcx
	movq	%r8, 40(%rsp)
	movq	%r9, 32(%rsp)
	movq	%rax, 24(%rsp)
	movss	%xmm0, 20(%rsp)
	movss	%xmm1, 16(%rsp)
	movss	%xmm2, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 248(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movl	$1, 104(%rsp)
	movq	%rax, 144(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	280(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	288(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	296(%rsp), %rax
	movq	%rax, 240(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 96(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	pushq	88(%rsp)
	.cfi_def_cfa_offset 280
	leaq	_Z7tonemapPfS_S_S_S_S_S_fffiii(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 288
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	160(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 280
	popq	%rdx
	.cfi_def_cfa_offset 272
.L49:
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	je	.L51
	call	__stack_chk_fail@PLT
.L51:
	addq	$264, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2047:
	.size	_Z44__device_stub__Z7tonemapPfS_S_S_S_S_S_fffiiiPfS_S_S_S_S_S_fffiii, .-_Z44__device_stub__Z7tonemapPfS_S_S_S_S_S_fffiiiPfS_S_S_S_S_S_fffiii
	.globl	_Z7tonemapPfS_S_S_S_S_S_fffiii
	.type	_Z7tonemapPfS_S_S_S_S_S_fffiii, @function
_Z7tonemapPfS_S_S_S_S_S_fffiii:
.LFB2048:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z7tonemapPfS_S_S_S_S_S_fffiiiPfS_S_S_S_S_S_fffiii
	.cfi_endproc
.LFE2048:
	.size	_Z7tonemapPfS_S_S_S_S_S_fffiii, .-_Z7tonemapPfS_S_S_S_S_S_fffiii
	.globl	_Z54__device_stub__Z17recombineChannelsPKfS0_S0_P6uchar4iiPKfS0_S0_P6uchar4ii
	.type	_Z54__device_stub__Z17recombineChannelsPKfS0_S0_P6uchar4iiPKfS0_S0_P6uchar4ii, @function
_Z54__device_stub__Z17recombineChannelsPKfS0_S0_P6uchar4iiPKfS0_S0_P6uchar4ii:
.LFB2049:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z17recombineChannelsPKfS0_S0_P6uchar4ii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L54:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L56
	call	__stack_chk_fail@PLT
.L56:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2049:
	.size	_Z54__device_stub__Z17recombineChannelsPKfS0_S0_P6uchar4iiPKfS0_S0_P6uchar4ii, .-_Z54__device_stub__Z17recombineChannelsPKfS0_S0_P6uchar4iiPKfS0_S0_P6uchar4ii
	.globl	_Z17recombineChannelsPKfS0_S0_P6uchar4ii
	.type	_Z17recombineChannelsPKfS0_S0_P6uchar4ii, @function
_Z17recombineChannelsPKfS0_S0_P6uchar4ii:
.LFB2050:
	.cfi_startproc
	endbr64
	jmp	_Z54__device_stub__Z17recombineChannelsPKfS0_S0_P6uchar4iiPKfS0_S0_P6uchar4ii
	.cfi_endproc
.LFE2050:
	.size	_Z17recombineChannelsPKfS0_S0_P6uchar4ii, .-_Z17recombineChannelsPKfS0_S0_P6uchar4ii
	.globl	_Z36__device_stub__Z13normalize_cdfPjPfiPjPfi
	.type	_Z36__device_stub__Z13normalize_cdfPjPfiPjPfi, @function
_Z36__device_stub__Z13normalize_cdfPjPfiPjPfi:
.LFB2051:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L59
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z13normalize_cdfPjPfi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L59:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L61
	call	__stack_chk_fail@PLT
.L61:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2051:
	.size	_Z36__device_stub__Z13normalize_cdfPjPfiPjPfi, .-_Z36__device_stub__Z13normalize_cdfPjPfiPjPfi
	.globl	_Z13normalize_cdfPjPfi
	.type	_Z13normalize_cdfPjPfi, @function
_Z13normalize_cdfPjPfi:
.LFB2052:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z13normalize_cdfPjPfiPjPfi
	.cfi_endproc
.LFE2052:
	.size	_Z13normalize_cdfPjPfi, .-_Z13normalize_cdfPjPfi
	.globl	_Z11postProcessP6uchar4PKfPjmmff
	.type	_Z11postProcessP6uchar4PKfPjmmff, @function
_Z11postProcessP6uchar4PKfPjmmff:
.LFB2011:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$4096, %esi
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%r8, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rcx, %rbx
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	movss	%xmm1, 12(%rsp)
	leaq	16(%rsp), %rdi
	movss	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movl	$67108867, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$2147483651, %edi
	salq	$6, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	addq	%rdi, %rdi
	movq	%rdx, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm1
	testl	%eax, %eax
	jne	.L65
	movq	16(%rsp), %rsi
	movl	$1024, %edx
	movq	%r12, %rdi
	call	_Z36__device_stub__Z13normalize_cdfPjPfiPjPfi
	movss	12(%rsp), %xmm1
.L65:
	movq	%rbx, %r12
	leaq	31(%rbp), %rax
	leaq	24(%rsp), %rdi
	movss	%xmm1, 12(%rsp)
	imulq	%rbp, %r12
	shrq	$5, %rax
	movl	$1, 68(%rsp)
	movl	%eax, 60(%rsp)
	leaq	15(%rbx), %rax
	shrq	$4, %rax
	salq	$2, %r12
	movl	%eax, 64(%rsp)
	movq	%r12, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	32(%rsp), %rdi
	movq	%r12, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	40(%rsp), %rdi
	movq	%r12, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	60(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	68(%rsp), %esi
	movl	$2147483649, %edx
	movl	$1, %ecx
	movl	$1, 56(%rsp)
	salq	$5, %rdx
	movq	%rdx, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm1
	testl	%eax, %eax
	jne	.L66
	pushq	%rbp
	.cfi_def_cfa_offset 136
	movaps	%xmm1, %xmm2
	movq	d_logY(%rip), %rdx
	movq	d_y(%rip), %rsi
	movq	d_x(%rip), %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 144
	pushq	$1024
	.cfi_def_cfa_offset 152
	pushq	56(%rsp)
	.cfi_def_cfa_offset 160
	subss	40(%rsp), %xmm2
	movss	40(%rsp), %xmm0
	movq	72(%rsp), %r9
	movq	56(%rsp), %r8
	movq	48(%rsp), %rcx
	call	_Z44__device_stub__Z7tonemapPfS_S_S_S_S_S_fffiiiPfS_S_S_S_S_S_fffiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 128
.L66:
	movl	56(%rsp), %ecx
	movq	48(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	60(%rsp), %rdi
	movl	68(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L64
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%ebp, %r9d
	movl	%ebx, %r8d
	movq	24(%rsp), %rdi
	movq	%r13, %rcx
	call	_Z54__device_stub__Z17recombineChannelsPKfS0_S0_P6uchar4iiPKfS0_S0_P6uchar4ii
.L64:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L68
	call	__stack_chk_fail@PLT
.L68:
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2011:
	.size	_Z11postProcessP6uchar4PKfPjmmff, .-_Z11postProcessP6uchar4PKfPjmmff
	.globl	_Z7hdr_opsP6uchar4mm
	.type	_Z7hdr_opsP6uchar4mm, @function
_Z7hdr_opsP6uchar4mm:
.LFB2012:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	movq	%rsi, 8(%rsp)
	leaq	8(%rsp), %rcx
	leaq	32(%rsp), %rsi
	movq	%rsp, %r8
	movq	%rdx, (%rsp)
	leaq	20(%rsp), %r9
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	movl	$0x00000000, 24(%rsp)
	movl	$0x3f800000, 28(%rsp)
	call	_Z10preprocessP6uchar4PPfPPjRmS5_S3_
	movq	(%rsp), %rbp
	movq	8(%rsp), %rbx
	leaq	28(%rsp), %rcx
	movq	32(%rsp), %r12
	leaq	24(%rsp), %rdx
	movq	%rbp, %r9
	movq	%rbx, %r8
	movq	%r12, %rdi
	pushq	%rax
	.cfi_def_cfa_offset 104
	movl	28(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 112
	movq	56(%rsp), %rsi
	call	_Z7toneMapPKfPjRfS2_mmm
	movq	%rbp, %rsi
	popq	%rdx
	.cfi_def_cfa_offset 104
	popq	%rcx
	.cfi_def_cfa_offset 96
	imulq	%rbx, %rsi
	leaq	48(%rsp), %rdi
	salq	$2, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	40(%rsp), %rdx
	movq	%rbp, %r8
	movq	%rbx, %rcx
	movss	28(%rsp), %xmm1
	movss	24(%rsp), %xmm0
	movq	%r12, %rsi
	movq	48(%rsp), %rdi
	call	_Z11postProcessP6uchar4PKfPjmmff
	movq	48(%rsp), %rax
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L71
	call	__stack_chk_fail@PLT
.L71:
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2012:
	.size	_Z7hdr_opsP6uchar4mm, .-_Z7hdr_opsP6uchar4mm
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"_Z13normalize_cdfPjPfi"
.LC4:
	.string	"_Z17recombineChannelsPKfS0_S0_P6uchar4ii"
.LC5:
	.string	"_Z7tonemapPfS_S_S_S_S_S_fffiii"
.LC6:
	.string	"_Z13kernel_maxminPfS_ii"
.LC7:
	.string	"_Z12kernel_histoPKfPiffii"
.LC8:
	.string	"_Z11kernel_scanPii"
.LC9:
	.string	"_Z10rgb_to_xyYPfS_S_S_S_S_fii"
.LC10:
	.string	"_Z16separateChannelsPK6uchar4iiPfS2_S2_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13normalize_cdfPjPfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17recombineChannelsPKfS0_S0_P6uchar4ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z7tonemapPfS_S_S_S_S_S_fffiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13kernel_maxminPfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12kernel_histoPKfPiffii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11kernel_scanPii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10rgb_to_xyYPfS_S_S_S_S_fii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16separateChannelsPK6uchar4iiPfS2_S2_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2054:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	d_logY
	.bss
	.align 8
	.type	d_logY, @object
	.size	d_logY, 8
d_logY:
	.zero	8
	.globl	d_y
	.align 8
	.type	d_y, @object
	.size	d_y, 8
d_y:
	.zero	8
	.globl	d_x
	.align 8
	.type	d_x, @object
	.size	d_x, 8
d_x:
	.zero	8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	953267991
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// Corresponding header file: /include/square_ops.h
#include <hip/hip_runtime.h>
#include <float.h>

float *d_x, *d_y, *d_logY;

__global__
void separateChannels(const uchar4* const inputImageRGBA,
                      int numRows,
                      int numCols,
                      float* const redChannel,
                      float* const greenChannel,
                      float* const blueChannel)
{
  int absolute_image_position_x = blockDim.x * blockIdx.x + threadIdx.x;
  int absolute_image_position_y = blockDim.y * blockIdx.y + threadIdx.y;

  if ( absolute_image_position_x >= numCols || absolute_image_position_y >= numRows )
  	return ;

  int thread_1D_pos = absolute_image_position_y * numCols + absolute_image_position_x;

  redChannel[thread_1D_pos] = inputImageRGBA[thread_1D_pos].x;
  greenChannel[thread_1D_pos] = inputImageRGBA[thread_1D_pos].y;
  blueChannel[thread_1D_pos] = inputImageRGBA[thread_1D_pos].z;
}

__global__
void rgb_to_xyY(
    float* d_r,
    float* d_g,
    float* d_b,
    float* d_x,
    float* d_y,
    float* d_log_Y,
    float  delta,
    int num_pixels_y,
    int num_pixels_x )
{
	int  ny = num_pixels_y;
  int  nx = num_pixels_x;
  int2 image_index_2d = make_int2( ( blockIdx.x * blockDim.x ) + threadIdx.x, ( blockIdx.y * blockDim.y ) + threadIdx.y );
  int  image_index_1d = ( nx * image_index_2d.y ) + image_index_2d.x;

  if ( image_index_2d.x < nx && image_index_2d.y < ny )
  {
    float r = d_r[ image_index_1d ];
    float g = d_g[ image_index_1d ];
    float b = d_b[ image_index_1d ];

    float X = ( r * 0.4124f ) + ( g * 0.3576f ) + ( b * 0.1805f );
    float Y = ( r * 0.2126f ) + ( g * 0.7152f ) + ( b * 0.0722f );
    float Z = ( r * 0.0193f ) + ( g * 0.1192f ) + ( b * 0.9505f );

    float L = X + Y + Z;
    float x = X / L;
    float y = Y / L;

    float log_Y = log10f( delta + Y );

    d_x[ image_index_1d ]     = x;
    d_y[ image_index_1d ]     = y;
    d_log_Y[ image_index_1d ] = log_Y;
  }
}

__global__ void kernel_scan(int* d_bins, int size)
{
    int index = blockDim.x*blockIdx.x+threadIdx.x;
    
    if(index >= size)
      return;
    int temp;
    if(index > 0)
    {
      temp = d_bins[index - 1];
    }
    else
    {
      temp = 0;
    }
    __syncthreads();
    
    d_bins[index] = temp;
    __syncthreads();
    
    int val = 0;
    for(int s=1; s<=size; s*=2)
    {
        int a = index-s;
        val = 0; 
        if(a>=0)
             val = d_bins[a];
        __syncthreads();
        
        if(a>=0)
            d_bins[index] += val;
        __syncthreads();
    }
}

__global__ void kernel_histo(const float* d_in, int* d_bins, float min,float max,int size, int numBins)
{
	int index = blockDim.x*blockIdx.x+threadIdx.x;
  if(index<size)
  {
      int a = ((d_in[index] - min)/(max-min))* numBins;
      atomicAdd(&d_bins[a], 1);
  }
}

__global__ void kernel_maxmin(float* d_in, float*d_out, int size, int maxmin)
{
    int tid = threadIdx.x;
    int x = blockDim.x * blockIdx.x + threadIdx.x;
    
    extern __shared__ float shared[];
    
    if(x>=size)
      return ;
    
    if(x<size)
    	shared[tid] = d_in[x];
    else
    {
        if(maxmin == 0)
            shared[tid] = FLT_MAX;
        else
            shared[tid] = -FLT_MAX;
    }
    __syncthreads();
    
    for(int s=1; s<blockDim.x; s++)
    {
      if(tid % (2*s) == 0)
      {
        if(s+tid < blockDim.x)
            if(maxmin == 0)
              shared[tid] = min(shared[tid], shared[tid+s]);
            else
              shared[tid] = max(shared[tid], shared[tid+s]);
        
      }
        __syncthreads();
    }
    __syncthreads();
    
    if(tid == 0)
        d_out[blockIdx.x] = shared[0];
}


__global__ void tonemap(
    float* d_x,
    float* d_y,
    float* d_log_Y,
    float* d_cdf_norm,
    float* d_r_new,
    float* d_g_new,
    float* d_b_new,
    float  min_log_Y,
    float  max_log_Y,
    float  log_Y_range,
    int    num_bins,
    int    num_pixels_y,
    int    num_pixels_x )
{
  int  ny             = num_pixels_y;
  int  nx             = num_pixels_x;
  int2 image_index_2d = make_int2( ( blockIdx.x * blockDim.x ) + threadIdx.x, ( blockIdx.y * blockDim.y ) + threadIdx.y );
  int  image_index_1d = ( nx * image_index_2d.y ) + image_index_2d.x;

  if ( image_index_2d.x < nx && image_index_2d.y < ny )
  {
    float x         = d_x[ image_index_1d ];
    float y         = d_y[ image_index_1d ];
    float log_Y     = d_log_Y[ image_index_1d ];
    int   bin_index = min( num_bins - 1, int( (num_bins * ( log_Y - min_log_Y ) ) / log_Y_range ) );
    float Y_new     = d_cdf_norm[ bin_index ];

    float X_new = x * ( Y_new / y );
    float Z_new = ( 1 - x - y ) * ( Y_new / y );

    float r_new = ( X_new *  3.2406f ) + ( Y_new * -1.5372f ) + ( Z_new * -0.4986f );
    float g_new = ( X_new * -0.9689f ) + ( Y_new *  1.8758f ) + ( Z_new *  0.0415f );
    float b_new = ( X_new *  0.0557f ) + ( Y_new * -0.2040f ) + ( Z_new *  1.0570f );

    d_r_new[ image_index_1d ] = r_new;
    d_g_new[ image_index_1d ] = g_new;
    d_b_new[ image_index_1d ] = b_new;
  }
}

__global__
void recombineChannels(const float* const redChannel,
                       const float* const greenChannel,
                       const float* const blueChannel,
                       uchar4* const outputImageRGBA,
                       int numRows,
                       int numCols)
{
  const int2 thread_2D_pos = make_int2( blockIdx.x * blockDim.x + threadIdx.x,
                                        blockIdx.y * blockDim.y + threadIdx.y);

  const int thread_1D_pos = thread_2D_pos.y * numCols + thread_2D_pos.x;

  if (thread_2D_pos.x >= numCols || thread_2D_pos.y >= numRows)
    return;

  unsigned char red   = redChannel[thread_1D_pos];
  unsigned char green = greenChannel[thread_1D_pos];
  unsigned char blue  = blueChannel[thread_1D_pos];

  //Alpha should be 255 for no transparency
  uchar4 outputPixel = make_uchar4(red, green, blue, 255);

  outputImageRGBA[thread_1D_pos] = outputPixel;
}

__global__ void normalize_cdf(
    unsigned int* d_input_cdf,
    float*        d_output_cdf,
    int           n
    )
{
  const float normalization_constant = 1.f / d_input_cdf[n - 1];

  int global_index_1d = ( blockIdx.x * blockDim.x ) + threadIdx.x;

  if ( global_index_1d < n )
  {
    unsigned int input_value  = d_input_cdf[ global_index_1d ];
    float        output_value = input_value * normalization_constant;

    d_output_cdf[ global_index_1d ] = output_value;
  }
}



void findmaxmin(const float* d_in, float &ans,int size, int maxmin)
{

  int block_size = 1024;
  int curr_size = size;
  float *d_curr_in;
  hipMalloc(&d_curr_in, size * sizeof(float));
  hipMemcpy(d_curr_in, d_in, size*sizeof(float), hipMemcpyDeviceToDevice);
  float *d_out;
  while(1)
  {
    int newSize = curr_size/block_size +1;
    hipMalloc(&d_out, sizeof(float) * newSize); 
    dim3 threads(block_size);
    dim3 blocks(newSize);
    
    if(maxmin == 0)
        kernel_maxmin<<<blocks, threads, sizeof(float)*block_size>>>(d_curr_in, d_out, curr_size, 0);
    else
        kernel_maxmin<<<blocks, threads, sizeof(float)*block_size >>>(d_curr_in, d_out, curr_size, 1);
        
    hipMalloc(&d_curr_in, sizeof(float)*newSize);
    hipMemcpy(d_curr_in, d_out, sizeof(float)* newSize, hipMemcpyDeviceToDevice);
    
    if(newSize == 1)
    break;
    curr_size = newSize;
  }
  hipMemcpy(&ans, d_out, sizeof(float), hipMemcpyDeviceToHost);
}

void preprocess(uchar4* d_image, float** d_luminance, unsigned int** d_cdf, size_t &numRows, size_t &numCols, unsigned int *numberOfBins)
{
	float *d_red, *d_blue, *d_green;
	int numBins = 1024;

	dim3 blockSize(32,32,1);
	const dim3 gridSize(numRows/blockSize.x+1, numCols/blockSize.y+1,1);  

	hipMalloc(&d_red, sizeof( float) * numRows * numCols);
	hipMalloc(&d_blue, sizeof(float) * numRows * numCols);
	hipMalloc(&d_green, sizeof( float) * numRows * numCols);
	separateChannels<<<gridSize, blockSize>>>(d_image, numRows, numCols, d_red, d_blue, d_green);

	hipMalloc(&d_x, sizeof( float) * numRows * numCols);
	hipMalloc(&d_y, sizeof(float) * numRows * numCols);
	hipMalloc(&d_logY, sizeof(float) * numRows * numCols);
	rgb_to_xyY<<<gridSize, blockSize>>>(d_red, d_blue, d_green, d_x, d_y, d_logY, .0001f, numRows, numCols) ;

	*d_luminance = d_logY;

	//allocate memory for the cdf of the histogram
  *numberOfBins = numBins;
  (hipMalloc(&d_cdf, sizeof(unsigned int) * numBins));
  (hipMemset(d_cdf, 0, sizeof(unsigned int) * numBins));
}

void toneMap(const float* const d_logLuminance,
            unsigned int* const d_cdf,
            float &min_logLum,
            float &max_logLum,
            const size_t numRows,
            const size_t numCols,
            const size_t numBins)
{
	findmaxmin(d_logLuminance, min_logLum, numRows*numCols, 0);
  findmaxmin(d_logLuminance, max_logLum, numRows*numCols, 1);

  int *d_bins;
  hipMalloc(&d_bins, sizeof(int)*numBins);
  hipMemset(d_bins, 0, sizeof(int)*numBins);
  
  int size = numRows*numCols;
  dim3 threads(1024,1,1);
  dim3 blocks((size/threads.x)+1,1,1);
  
  kernel_histo<<<blocks, threads>>>(d_logLuminance, d_bins, min_logLum, max_logLum, size, numBins);
  
  dim3 scan_blocks(numBins/threads.x +1);
  kernel_scan<<<scan_blocks, threads>>>(d_bins, numBins);
  hipMemcpy(d_cdf, d_bins, sizeof(int) * numBins, hipMemcpyDeviceToDevice);
}

void postProcess(uchar4* d_out, const float* const d_logLuminance,
                unsigned int* const d_cdf,
                size_t numRows, size_t numCols,
	              float min_log_Y, float max_log_Y)
	{
	int numBins = 1024;
	const int numPixels = numRows * numCols;

  const int numThreads = 192;

  float *d_cdf_normalized;

 	hipMalloc(&d_cdf_normalized, sizeof(float) * numBins);

  normalize_cdf<<< (numBins + numThreads - 1) / numThreads,
                    numThreads>>>(d_cdf,
                                  d_cdf_normalized,
                                  numBins);
  float log_Y_range = max_log_Y - min_log_Y;

  const dim3 blockSize(32, 16, 1);
  const dim3 gridSize( (numCols + blockSize.x - 1) / blockSize.x,
                       (numRows + blockSize.y - 1) / blockSize.y );

  //next perform the actual tone-mapping
  //we map each luminance value to its new value
  //and then transform back to RGB space
  float *d_red, *d_blue, *d_green;
  hipMalloc(&d_red, sizeof( float) * numRows * numCols);
	hipMalloc(&d_blue, sizeof(float) * numRows * numCols);
	hipMalloc(&d_green, sizeof(float) * numRows * numCols);
  tonemap<<<gridSize, blockSize>>>(d_x, d_y, d_logY,
                                   d_cdf_normalized,
                                   d_red, d_green, d_blue,
                                   min_log_Y, max_log_Y,
                                   log_Y_range, numBins,
                                   numRows, numCols);

  recombineChannels<<<gridSize, blockSize>>>(d_red, d_blue, d_green, d_out, numRows, numCols);

}

uchar4* hdr_ops(uchar4* d_image, size_t numRows, size_t numCols)
{
	float *d_luminance;
  unsigned int *d_cdf;
  unsigned int numBins;
 	float min_logLum, max_logLum;
  min_logLum = 0.f;
  max_logLum = 1.f;

  preprocess(d_image, &d_luminance, &d_cdf, numRows, numCols, &numBins);

  toneMap(d_luminance, d_cdf, min_logLum, max_logLum, numRows, numCols, numBins);

  uchar4* d_out;
  hipMalloc(&d_out, sizeof(uchar4) * numRows * numCols);
  postProcess(d_out, d_luminance, d_cdf, numRows, numCols, min_logLum, max_logLum);

  return d_out;

}

	.text
	.file	"hdr_ops.hip"
	.globl	_Z31__device_stub__separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_ # -- Begin function _Z31__device_stub__separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_
	.type	_Z31__device_stub__separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_,@function
_Z31__device_stub__separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_: # @_Z31__device_stub__separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_, .Lfunc_end0-_Z31__device_stub__separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__rgb_to_xyYPfS_S_S_S_S_fii # -- Begin function _Z25__device_stub__rgb_to_xyYPfS_S_S_S_S_fii
	.type	_Z25__device_stub__rgb_to_xyYPfS_S_S_S_S_fii,@function
_Z25__device_stub__rgb_to_xyYPfS_S_S_S_S_fii: # @_Z25__device_stub__rgb_to_xyYPfS_S_S_S_S_fii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	12(%rsp), %r9
	movss	%xmm0, (%r9)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10rgb_to_xyYPfS_S_S_S_S_fii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__rgb_to_xyYPfS_S_S_S_S_fii, .Lfunc_end1-_Z25__device_stub__rgb_to_xyYPfS_S_S_S_S_fii
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__kernel_scanPii # -- Begin function _Z26__device_stub__kernel_scanPii
	.type	_Z26__device_stub__kernel_scanPii,@function
_Z26__device_stub__kernel_scanPii:      # @_Z26__device_stub__kernel_scanPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kernel_scanPii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z26__device_stub__kernel_scanPii, .Lfunc_end2-_Z26__device_stub__kernel_scanPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__kernel_histoPKfPiffii # -- Begin function _Z27__device_stub__kernel_histoPKfPiffii
	.type	_Z27__device_stub__kernel_histoPKfPiffii,@function
_Z27__device_stub__kernel_histoPKfPiffii: # @_Z27__device_stub__kernel_histoPKfPiffii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	8(%rsp), %r8
	movss	%xmm1, (%r8)
	leaq	4(%rsp), %r9
	movl	%edx, (%r9)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%r8, 24(%rbx)
	movq	%r9, 32(%rbx)
	movq	%rdx, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12kernel_histoPKfPiffii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z27__device_stub__kernel_histoPKfPiffii, .Lfunc_end3-_Z27__device_stub__kernel_histoPKfPiffii
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__kernel_maxminPfS_ii # -- Begin function _Z28__device_stub__kernel_maxminPfS_ii
	.type	_Z28__device_stub__kernel_maxminPfS_ii,@function
_Z28__device_stub__kernel_maxminPfS_ii: # @_Z28__device_stub__kernel_maxminPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13kernel_maxminPfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z28__device_stub__kernel_maxminPfS_ii, .Lfunc_end4-_Z28__device_stub__kernel_maxminPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__tonemapPfS_S_S_S_S_S_fffiii # -- Begin function _Z22__device_stub__tonemapPfS_S_S_S_S_S_fffiii
	.type	_Z22__device_stub__tonemapPfS_S_S_S_S_S_fffiii,@function
_Z22__device_stub__tonemapPfS_S_S_S_S_S_fffiii: # @_Z22__device_stub__tonemapPfS_S_S_S_S_S_fffiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$224, %rsp
	.cfi_def_cfa_offset 272
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	12(%rsp), %r9
	movss	%xmm0, (%r9)
	leaq	8(%rsp), %r10
	movss	%xmm1, (%r10)
	leaq	4(%rsp), %r11
	movss	%xmm2, (%r11)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 48(%rbx)
	movq	%r9, 56(%rbx)
	movq	%r10, 64(%rbx)
	movq	%r11, 72(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7tonemapPfS_S_S_S_S_S_fffiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$240, %rsp
	.cfi_adjust_cfa_offset -240
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z22__device_stub__tonemapPfS_S_S_S_S_S_fffiii, .Lfunc_end5-_Z22__device_stub__tonemapPfS_S_S_S_S_S_fffiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii # -- Begin function _Z32__device_stub__recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii
	.type	_Z32__device_stub__recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii,@function
_Z32__device_stub__recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii: # @_Z32__device_stub__recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z32__device_stub__recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii, .Lfunc_end6-_Z32__device_stub__recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__normalize_cdfPjPfi # -- Begin function _Z28__device_stub__normalize_cdfPjPfi
	.type	_Z28__device_stub__normalize_cdfPjPfi,@function
_Z28__device_stub__normalize_cdfPjPfi:  # @_Z28__device_stub__normalize_cdfPjPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13normalize_cdfPjPfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z28__device_stub__normalize_cdfPjPfi, .Lfunc_end7-_Z28__device_stub__normalize_cdfPjPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z10findmaxminPKfRfii           # -- Begin function _Z10findmaxminPKfRfii
	.type	_Z10findmaxminPKfRfii,@function
_Z10findmaxminPKfRfii:                  # @_Z10findmaxminPKfRfii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movl	%edx, %r14d
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	movq	%rdi, %rbx
	movabsq	$4294967296, %r12               # imm = 0x100000000
	movslq	%edx, %r15
	shlq	$2, %r15
	leaq	8(%rsp), %r13
	movq	%r13, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	%rbx, %rsi
	movq	%r15, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	leaq	1024(%r12), %r13
.LBB8_1:                                # =>This Inner Loop Header: Depth=1
	movl	%r14d, %r15d
	leal	1023(%r15), %r12d
	testl	%r14d, %r14d
	cmovsl	%r12d, %r14d
	sarl	$10, %r14d
	movslq	%r14d, %rax
	incl	%r14d
	leaq	4(,%rax,4), %rbx
	movq	%rsp, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%r14, %rdi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	movl	$4096, %r8d                     # imm = 0x1000
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%ebp, %ebp
	je	.LBB8_2
# %bb.4:                                #   in Loop: Header=BB8_1 Depth=1
	testl	%eax, %eax
	jne	.LBB8_7
# %bb.5:                                #   in Loop: Header=BB8_1 Depth=1
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	%r15d, %edx
	movl	$1, %ecx
	jmp	.LBB8_6
.LBB8_2:                                #   in Loop: Header=BB8_1 Depth=1
	testl	%eax, %eax
	jne	.LBB8_7
# %bb.3:                                #   in Loop: Header=BB8_1 Depth=1
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	%r15d, %edx
	xorl	%ecx, %ecx
.LBB8_6:                                #   in Loop: Header=BB8_1 Depth=1
	callq	_Z28__device_stub__kernel_maxminPfS_ii
.LBB8_7:                                #   in Loop: Header=BB8_1 Depth=1
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movq	%rbx, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	cmpl	$2046, %r12d                    # imm = 0x7FE
	ja	.LBB8_1
# %bb.8:
	movq	(%rsp), %rsi
	movl	$4, %edx
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z10findmaxminPKfRfii, .Lfunc_end8-_Z10findmaxminPKfRfii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z10preprocessP15HIP_vector_typeIhLj4EEPPfPPjRmS6_S4_
.LCPI9_0:
	.long	0x38d1b717                      # float 9.99999974E-5
	.text
	.globl	_Z10preprocessP15HIP_vector_typeIhLj4EEPPfPPjRmS6_S4_
	.type	_Z10preprocessP15HIP_vector_typeIhLj4EEPPfPPjRmS6_S4_,@function
_Z10preprocessP15HIP_vector_typeIhLj4EEPPfPPjRmS6_S4_: # @_Z10preprocessP15HIP_vector_typeIhLj4EEPPfPPjRmS6_S4_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 40(%rsp)                   # 8-byte Spill
	movq	%r8, %r15
	movq	%rcx, %r12
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	movq	%rdi, %r13
	movabsq	$137438953504, %rbx             # imm = 0x2000000020
	movq	%rdx, 48(%rsp)
	movq	(%rcx), %rsi
	movq	%rsi, %rax
	shrq	$5, %rax
	incl	%eax
	movq	(%r8), %rcx
	imulq	%rcx, %rsi
	andq	$-32, %rcx
	shlq	$27, %rcx
	orq	%rax, %rcx
	movabsq	$4294967296, %rbp               # imm = 0x100000000
	addq	%rcx, %rbp
	shlq	$2, %rsi
	leaq	24(%rsp), %rdi
	callq	hipMalloc
	movq	(%r12), %rsi
	imulq	(%r15), %rsi
	shlq	$2, %rsi
	leaq	16(%rsp), %rdi
	callq	hipMalloc
	movq	(%r12), %rsi
	imulq	(%r15), %rsi
	shlq	$2, %rsi
	leaq	8(%rsp), %rdi
	callq	hipMalloc
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, %r14
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_2
# %bb.1:
	movl	(%r12), %esi
	movl	(%r15), %edx
	movq	24(%rsp), %rcx
	movq	16(%rsp), %r8
	movq	8(%rsp), %r9
	movq	%r13, %rdi
	callq	_Z31__device_stub__separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_
.LBB9_2:
	movq	(%r12), %rsi
	imulq	(%r15), %rsi
	shlq	$2, %rsi
	movl	$d_x, %edi
	callq	hipMalloc
	movq	(%r12), %rsi
	imulq	(%r15), %rsi
	shlq	$2, %rsi
	movl	$d_y, %edi
	callq	hipMalloc
	movq	(%r12), %rsi
	imulq	(%r15), %rsi
	shlq	$2, %rsi
	movl	$d_logY, %edi
	callq	hipMalloc
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	d_x(%rip), %rcx
	movq	d_y(%rip), %r8
	movq	d_logY(%rip), %r9
	movl	(%r12), %eax
	movl	(%r15), %r10d
	movss	.LCPI9_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z25__device_stub__rgb_to_xyYPfS_S_S_S_S_fii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB9_4:
	movq	d_logY(%rip), %rax
	movq	32(%rsp), %rcx                  # 8-byte Reload
	movq	%rax, (%rcx)
	movq	40(%rsp), %rax                  # 8-byte Reload
	movl	$1024, (%rax)                   # imm = 0x400
	leaq	48(%rsp), %rbx
	movl	$4096, %esi                     # imm = 0x1000
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	xorl	%esi, %esi
	callq	hipMemset
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z10preprocessP15HIP_vector_typeIhLj4EEPPfPPjRmS6_S4_, .Lfunc_end9-_Z10preprocessP15HIP_vector_typeIhLj4EEPPfPPjRmS6_S4_
	.cfi_endproc
                                        # -- End function
	.globl	_Z7toneMapPKfPjRfS2_mmm         # -- Begin function _Z7toneMapPKfPjRfS2_mmm
	.type	_Z7toneMapPKfPjRfS2_mmm,@function
_Z7toneMapPKfPjRfS2_mmm:                # @_Z7toneMapPKfPjRfS2_mmm
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %r13
	movq	%rcx, %r14
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	movq	%rdi, %rbp
	movq	96(%rsp), %rbx
	movabsq	$4294967296, %r12               # imm = 0x100000000
	imull	%r8d, %r13d
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
	movq	%rdx, %rsi
	movl	%r13d, %edx
	xorl	%ecx, %ecx
	callq	_Z10findmaxminPKfRfii
	movq	%rbp, %rdi
	movq	%r14, 24(%rsp)                  # 8-byte Spill
	movq	%r14, %rsi
	movl	%r13d, %edx
	movl	$1, %ecx
	callq	_Z10findmaxminPKfRfii
	leaq	(,%rbx,4), %r15
	leaq	8(%rsp), %r14
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%r14), %rdi
	xorl	%esi, %esi
	movq	%r15, %rdx
	callq	hipMemset
	movl	%r13d, %edi
	shrl	$10, %edi
	incl	%edi
	btsq	$32, %rdi
	leaq	1024(%r12), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_2
# %bb.1:
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rax                  # 8-byte Reload
	movss	(%rax), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movq	24(%rsp), %rax                  # 8-byte Reload
	movss	(%rax), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	movq	%rbp, %rdi
	movl	%r13d, %edx
	movl	%ebx, %ecx
	callq	_Z27__device_stub__kernel_histoPKfPiffii
.LBB10_2:
	movq	%rbx, %rdi
	shrq	$10, %rdi
	incl	%edi
	orq	%r12, %rdi
	addq	$1024, %r12                     # imm = 0x400
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_4
# %bb.3:
	movq	8(%rsp), %rdi
	movl	%ebx, %esi
	callq	_Z26__device_stub__kernel_scanPii
.LBB10_4:
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z7toneMapPKfPjRfS2_mmm, .Lfunc_end10-_Z7toneMapPKfPjRfS2_mmm
	.cfi_endproc
                                        # -- End function
	.globl	_Z11postProcessP15HIP_vector_typeIhLj4EEPKfPjmmff # -- Begin function _Z11postProcessP15HIP_vector_typeIhLj4EEPKfPjmmff
	.type	_Z11postProcessP15HIP_vector_typeIhLj4EEPKfPjmmff,@function
_Z11postProcessP15HIP_vector_typeIhLj4EEPKfPjmmff: # @_Z11postProcessP15HIP_vector_typeIhLj4EEPKfPjmmff
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
	movss	%xmm0, (%rsp)                   # 4-byte Spill
	movq	%r8, %rbx
	movq	%rcx, %r14
	movq	%rdx, %r12
	movq	%rdi, %r15
	movl	$4026531840, %r13d              # imm = 0xF0000000
	leaq	32(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	leaq	268435462(%r13), %rdi
	leaq	268435648(%r13), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB11_2
# %bb.1:
	movq	32(%rsp), %rsi
	movq	%r12, %rdi
	movl	$1024, %edx                     # imm = 0x400
	callq	_Z28__device_stub__normalize_cdfPjPfi
.LBB11_2:
	movabsq	$68719476768, %r12              # imm = 0x1000000020
	leaq	31(%rbx), %rax
	shrq	$5, %rax
	movl	%eax, %eax
	movq	%r14, %rcx
	shlq	$28, %rcx
	addq	%r13, %rcx
	movabsq	$-4294967296, %r13              # imm = 0xFFFFFFFF00000000
	andq	%rcx, %r13
	orq	%rax, %r13
	movq	%r14, %rbp
	imulq	%rbx, %rbp
	shlq	$2, %rbp
	leaq	24(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB11_4
# %bb.3:
	movss	4(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movaps	%xmm1, %xmm2
	movss	(%rsp), %xmm0                   # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	subss	%xmm0, %xmm2
	movq	d_x(%rip), %rdi
	movq	d_y(%rip), %rsi
	movq	d_logY(%rip), %rdx
	movq	32(%rsp), %rcx
	movq	24(%rsp), %r8
	movq	8(%rsp), %r9
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	$1024                           # imm = 0x400
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z22__device_stub__tonemapPfS_S_S_S_S_S_fffiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB11_4:
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB11_6
# %bb.5:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	%r15, %rcx
	movl	%r14d, %r8d
	movl	%ebx, %r9d
	callq	_Z32__device_stub__recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii
.LBB11_6:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z11postProcessP15HIP_vector_typeIhLj4EEPKfPjmmff, .Lfunc_end11-_Z11postProcessP15HIP_vector_typeIhLj4EEPKfPjmmff
	.cfi_endproc
                                        # -- End function
	.globl	_Z7hdr_opsP15HIP_vector_typeIhLj4EEmm # -- Begin function _Z7hdr_opsP15HIP_vector_typeIhLj4EEmm
	.type	_Z7hdr_opsP15HIP_vector_typeIhLj4EEmm,@function
_Z7hdr_opsP15HIP_vector_typeIhLj4EEmm:  # @_Z7hdr_opsP15HIP_vector_typeIhLj4EEmm
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	leaq	64(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	56(%rsp), %r8
	movq	%rdx, (%r8)
	leaq	20(%rsp), %rax
	movl	$0, (%rax)
	leaq	24(%rsp), %r12
	movl	$1065353216, (%r12)             # imm = 0x3F800000
	leaq	48(%rsp), %rbp
	leaq	40(%rsp), %r13
	leaq	28(%rsp), %r15
	movq	%rbp, %rsi
	movq	%r13, %rdx
	movq	%r15, %r9
	callq	_Z10preprocessP15HIP_vector_typeIhLj4EEPPfPPjRmS6_S4_
	movq	(%rbp), %rdi
	movq	(%r13), %rsi
	movl	(%r15), %eax
	movq	%rax, (%rsp)
	leaq	20(%rsp), %rdx
	movq	%r12, %rcx
	movq	%r14, %r8
	movq	%rbx, %r9
	callq	_Z7toneMapPKfPjRfS2_mmm
	movq	%r14, %rsi
	imulq	%rbx, %rsi
	shlq	$2, %rsi
	leaq	32(%rsp), %r15
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	movq	(%r13), %rdx
	leaq	20(%rsp), %rax
	movss	(%rax), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	(%r12), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	movq	%r14, %rcx
	movq	%rbx, %r8
	callq	_Z11postProcessP15HIP_vector_typeIhLj4EEPKfPjmmff
	movq	(%r15), %rax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z7hdr_opsP15HIP_vector_typeIhLj4EEmm, .Lfunc_end12-_Z7hdr_opsP15HIP_vector_typeIhLj4EEmm
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB13_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB13_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10rgb_to_xyYPfS_S_S_S_S_fii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kernel_scanPii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12kernel_histoPKfPiffii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13kernel_maxminPfS_ii, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7tonemapPfS_S_S_S_S_S_fffiii, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13normalize_cdfPjPfi, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end13:
	.size	__hip_module_ctor, .Lfunc_end13-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB14_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB14_2:
	retq
.Lfunc_end14:
	.size	__hip_module_dtor, .Lfunc_end14-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	d_x,@object                     # @d_x
	.bss
	.globl	d_x
	.p2align	3, 0x0
d_x:
	.quad	0
	.size	d_x, 8

	.type	d_y,@object                     # @d_y
	.globl	d_y
	.p2align	3, 0x0
d_y:
	.quad	0
	.size	d_y, 8

	.type	d_logY,@object                  # @d_logY
	.globl	d_logY
	.p2align	3, 0x0
d_logY:
	.quad	0
	.size	d_logY, 8

	.type	_Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_,@object # @_Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_
	.section	.rodata,"a",@progbits
	.globl	_Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_
	.p2align	3, 0x0
_Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_:
	.quad	_Z31__device_stub__separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_
	.size	_Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_, 8

	.type	_Z10rgb_to_xyYPfS_S_S_S_S_fii,@object # @_Z10rgb_to_xyYPfS_S_S_S_S_fii
	.globl	_Z10rgb_to_xyYPfS_S_S_S_S_fii
	.p2align	3, 0x0
_Z10rgb_to_xyYPfS_S_S_S_S_fii:
	.quad	_Z25__device_stub__rgb_to_xyYPfS_S_S_S_S_fii
	.size	_Z10rgb_to_xyYPfS_S_S_S_S_fii, 8

	.type	_Z11kernel_scanPii,@object      # @_Z11kernel_scanPii
	.globl	_Z11kernel_scanPii
	.p2align	3, 0x0
_Z11kernel_scanPii:
	.quad	_Z26__device_stub__kernel_scanPii
	.size	_Z11kernel_scanPii, 8

	.type	_Z12kernel_histoPKfPiffii,@object # @_Z12kernel_histoPKfPiffii
	.globl	_Z12kernel_histoPKfPiffii
	.p2align	3, 0x0
_Z12kernel_histoPKfPiffii:
	.quad	_Z27__device_stub__kernel_histoPKfPiffii
	.size	_Z12kernel_histoPKfPiffii, 8

	.type	_Z13kernel_maxminPfS_ii,@object # @_Z13kernel_maxminPfS_ii
	.globl	_Z13kernel_maxminPfS_ii
	.p2align	3, 0x0
_Z13kernel_maxminPfS_ii:
	.quad	_Z28__device_stub__kernel_maxminPfS_ii
	.size	_Z13kernel_maxminPfS_ii, 8

	.type	_Z7tonemapPfS_S_S_S_S_S_fffiii,@object # @_Z7tonemapPfS_S_S_S_S_S_fffiii
	.globl	_Z7tonemapPfS_S_S_S_S_S_fffiii
	.p2align	3, 0x0
_Z7tonemapPfS_S_S_S_S_S_fffiii:
	.quad	_Z22__device_stub__tonemapPfS_S_S_S_S_S_fffiii
	.size	_Z7tonemapPfS_S_S_S_S_S_fffiii, 8

	.type	_Z17recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii,@object # @_Z17recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii
	.globl	_Z17recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii
	.p2align	3, 0x0
_Z17recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii:
	.quad	_Z32__device_stub__recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii
	.size	_Z17recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii, 8

	.type	_Z13normalize_cdfPjPfi,@object  # @_Z13normalize_cdfPjPfi
	.globl	_Z13normalize_cdfPjPfi
	.p2align	3, 0x0
_Z13normalize_cdfPjPfi:
	.quad	_Z28__device_stub__normalize_cdfPjPfi
	.size	_Z13normalize_cdfPjPfi, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_"
	.size	.L__unnamed_1, 57

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10rgb_to_xyYPfS_S_S_S_S_fii"
	.size	.L__unnamed_2, 30

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z11kernel_scanPii"
	.size	.L__unnamed_3, 19

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z12kernel_histoPKfPiffii"
	.size	.L__unnamed_4, 26

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z13kernel_maxminPfS_ii"
	.size	.L__unnamed_5, 24

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z7tonemapPfS_S_S_S_S_S_fffiii"
	.size	.L__unnamed_6, 31

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z17recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii"
	.size	.L__unnamed_7, 58

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z13normalize_cdfPjPfi"
	.size	.L__unnamed_8, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_
	.addrsig_sym _Z25__device_stub__rgb_to_xyYPfS_S_S_S_S_fii
	.addrsig_sym _Z26__device_stub__kernel_scanPii
	.addrsig_sym _Z27__device_stub__kernel_histoPKfPiffii
	.addrsig_sym _Z28__device_stub__kernel_maxminPfS_ii
	.addrsig_sym _Z22__device_stub__tonemapPfS_S_S_S_S_S_fffiii
	.addrsig_sym _Z32__device_stub__recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii
	.addrsig_sym _Z28__device_stub__normalize_cdfPjPfi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym d_x
	.addrsig_sym d_y
	.addrsig_sym d_logY
	.addrsig_sym _Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_
	.addrsig_sym _Z10rgb_to_xyYPfS_S_S_S_S_fii
	.addrsig_sym _Z11kernel_scanPii
	.addrsig_sym _Z12kernel_histoPKfPiffii
	.addrsig_sym _Z13kernel_maxminPfS_ii
	.addrsig_sym _Z7tonemapPfS_S_S_S_S_S_fffiii
	.addrsig_sym _Z17recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii
	.addrsig_sym _Z13normalize_cdfPjPfi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_ ; -- Begin function _Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_
	.globl	_Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_
	.p2align	8
	.type	_Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_,@function
_Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_: ; @_Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x34
	s_load_b64 s[2:3], s[0:1], 0x8
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s4, 16
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s5, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s3, v0
	v_cmp_gt_i32_e64 s2, s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_clause 0x1
	s_load_b64 s[8:9], s[0:1], 0x0
	s_load_b128 s[4:7], s[0:1], 0x10
	v_mad_u64_u32 v[2:3], null, v1, s3, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
	global_load_u8 v6, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v6, v6
	global_store_b32 v[4:5], v6, off
	global_load_u8 v6, v[2:3], off offset:1
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v6, v6
	global_store_b32 v[4:5], v6, off
	global_load_u8 v2, v[2:3], off offset:2
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v2, v2
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_, .Lfunc_end0-_Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 296
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z10rgb_to_xyYPfS_S_S_S_S_fii ; -- Begin function _Z10rgb_to_xyYPfS_S_S_S_S_fii
	.globl	_Z10rgb_to_xyYPfS_S_S_S_S_fii
	.p2align	8
	.type	_Z10rgb_to_xyYPfS_S_S_S_S_fii,@function
_Z10rgb_to_xyYPfS_S_S_S_S_fii:          ; @_Z10rgb_to_xyYPfS_S_S_S_S_fii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b128 s[16:19], s[0:1], 0x30
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s18, v0
	v_cmp_gt_i32_e64 s2, s17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s18, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v6, v[2:3], off
	v_add_co_u32 v2, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo
	global_load_b32 v4, v[4:5], off
	global_load_b32 v2, v[2:3], off
	s_load_b128 s[4:7], s[0:1], 0x20
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v5, 0x3f371759, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmamk_f32 v5, v4, 0x3e59b3d0, v5
	s_waitcnt vmcnt(0)
	v_fmamk_f32 v7, v2, 0x3d93dd98, v5
	v_mul_f32_e32 v3, 0x3eb71759, v6
	v_mul_f32_e32 v6, 0x3df41f21, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmamk_f32 v3, v4, 0x3ed32618, v3
	v_fmamk_f32 v4, v4, 0x3c9e1b09, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v6, v2, 0x3e38d4fe, v3
	v_add_f32_e32 v3, v6, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v2, v2, 0x3f7353f8, v4
	v_add_f32_e32 v8, v2, v3
	v_add_f32_e32 v2, s16, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v10, null, v8, v8, v7
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v12, v10
	v_cndmask_b32_e64 v3, 1.0, 0x4f800000, vcc_lo
	v_mul_f32_e32 v2, v2, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v3, -v10, v12, 1.0
	v_log_f32_e32 v13, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, v3, v12
	v_div_scale_f32 v15, s1, v7, v8, v7
	v_mul_f32_e32 v17, v15, v12
	v_div_scale_f32 v9, null, v8, v8, v6
	v_div_scale_f32 v14, s0, v6, v8, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v19, -v10, v17, v15
	v_rcp_f32_e32 v11, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v17, v19, v12
	v_cndmask_b32_e64 v19, 0, 0x411a209b, vcc_lo
	v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v13|
	v_fma_f32 v10, -v10, v17, v15
	s_waitcnt_depctr 0xfff
	v_fma_f32 v2, -v9, v11, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v11, v2, v11 :: v_dual_mul_f32 v2, 0x3e9a209a, v13
	v_mul_f32_e32 v16, v14, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v4, 0x3e9a209a, v13, -v2
	v_add_co_u32 v2, s2, s10, v0
	v_add_co_ci_u32_e64 v3, s2, s11, v1, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v5, -v9, v16, v14
	v_fmamk_f32 v18, v13, 0x3284fbcf, v4
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, s2, s4, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v16, v5, v11
	v_fmac_f32_e32 v18, 0x3e9a209a, v13
	v_add_co_ci_u32_e64 v5, s2, s5, v1, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v9, -v9, v16, v14
	v_cndmask_b32_e32 v13, v13, v18, vcc_lo
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v9, v9, v11, v16
	s_mov_b32 vcc_lo, s1
	v_div_fmas_f32 v10, v10, v12, v17
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_div_fixup_f32 v6, v9, v8, v6
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_div_fixup_f32 v7, v10, v8, v7
	v_sub_f32_e32 v8, v13, v19
	global_store_b32 v[2:3], v6, off
	global_store_b32 v[4:5], v7, off
	global_store_b32 v[0:1], v8, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10rgb_to_xyYPfS_S_S_S_S_fii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 20
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10rgb_to_xyYPfS_S_S_S_S_fii, .Lfunc_end1-_Z10rgb_to_xyYPfS_S_S_S_S_fii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 712
; NumSgprs: 22
; NumVgprs: 20
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 20
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z11kernel_scanPii      ; -- Begin function _Z11kernel_scanPii
	.globl	_Z11kernel_scanPii
	.p2align	8
	.type	_Z11kernel_scanPii,@function
_Z11kernel_scanPii:                     ; @_Z11kernel_scanPii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s4, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB2_10
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x0
	v_mov_b32_e32 v0, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e32 0, v1
	s_cbranch_execz .LBB2_3
; %bb.2:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v0, v[2:3], off offset:-4
.LBB2_3:
	s_or_b32 exec_lo, exec_lo, s0
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 1
	s_cmp_lt_i32 s4, 1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_barrier
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	buffer_gl0_inv
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_store_b32 v[2:3], v0, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB2_10
; %bb.4:                                ; %.lr.ph.preheader
	v_mov_b32_e32 v5, 0
.LBB2_5:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_subrev_nc_u32_e32 v4, s1, v1
	v_mov_b32_e32 v0, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_lt_i32_e32 vcc_lo, -1, v4
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB2_7
; %bb.6:                                ;   in Loop: Header=BB2_5 Depth=1
	v_lshlrev_b64 v[6:7], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, s0, s2, v6
	v_add_co_ci_u32_e64 v7, s0, s3, v7, s0
	global_load_b32 v0, v[6:7], off
.LBB2_7:                                ;   in Loop: Header=BB2_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB2_9
; %bb.8:                                ;   in Loop: Header=BB2_5 Depth=1
	global_load_b32 v4, v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v4, v0
	global_store_b32 v[2:3], v0, off
.LBB2_9:                                ;   in Loop: Header=BB2_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_lshl_b32 s1, s1, 1
	s_waitcnt_vscnt null, 0x0
	s_cmp_le_i32 s1, s4
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB2_5
.LBB2_10:                               ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kernel_scanPii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z11kernel_scanPii, .Lfunc_end2-_Z11kernel_scanPii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 360
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12kernel_histoPKfPiffii ; -- Begin function _Z12kernel_histoPKfPiffii
	.globl	_Z12kernel_histoPKfPiffii
	.p2align	8
	.type	_Z12kernel_histoPKfPiffii,@function
_Z12kernel_histoPKfPiffii:              ; @_Z12kernel_histoPKfPiffii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s6, v1
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v0, v[0:1], off
	v_sub_f32_e64 v1, s5, s4
	s_waitcnt vmcnt(0)
	v_subrev_f32_e32 v0, s4, v0
	v_div_scale_f32 v2, null, v1, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v4, -v2, v3, 1.0
	v_fmac_f32_e32 v3, v4, v3
	v_div_scale_f32 v5, vcc_lo, v0, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v5, v3
	v_fma_f32 v6, -v2, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v6, v3
	v_fma_f32 v2, -v2, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v2, v2, v3, v4
	v_cvt_f32_i32_e32 v3, s7
	v_div_fixup_f32 v0, v2, v1, v0
	v_mov_b32_e32 v2, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v0, v0, v3
	v_cvt_i32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_atomic_add_u32 v[0:1], v2, off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12kernel_histoPKfPiffii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z12kernel_histoPKfPiffii, .Lfunc_end3-_Z12kernel_histoPKfPiffii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 292
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13kernel_maxminPfS_ii ; -- Begin function _Z13kernel_maxminPfS_ii
	.globl	_Z13kernel_maxminPfS_ii
	.p2align	8
	.type	_Z13kernel_maxminPfS_ii,@function
_Z13kernel_maxminPfS_ii:                ; @_Z13kernel_maxminPfS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[6:7], s[0:1], 0x10
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_mov_b32 s2, exec_lo
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s6, v1
	s_cbranch_execz .LBB4_8
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s6, 2
	s_cmp_lt_u32 s5, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v2, v[1:2], off
	v_lshl_add_u32 v1, v0, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB4_6
; %bb.2:                                ; %.lr.ph
	v_lshlrev_b32_e32 v2, 2, v0
	v_add_nc_u32_e32 v3, 1, v0
	s_cmp_eq_u32 s7, 0
	s_mov_b32 s8, -2
	s_cselect_b32 vcc_lo, -1, 0
	v_add3_u32 v2, v2, 0, 4
	s_lshl_b32 s7, s5, 1
.LBB4_3:                                ; =>This Inner Loop Header: Depth=1
	v_cvt_f32_u32_e32 v4, s6
	v_cmp_gt_u32_e64 s1, s5, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	v_cvt_u32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v5, s8, v4
	v_mul_hi_u32 v5, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v4, v5
	v_mul_hi_u32 v4, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, v4, s6
	v_sub_nc_u32_e32 v4, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v5, s6, v4
	v_cmp_le_u32_e64 s0, s6, v4
	v_cndmask_b32_e64 v4, v4, v5, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, s8, v4
	v_cmp_le_u32_e64 s0, s6, v4
	v_cndmask_b32_e64 v4, v4, v5, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, 0, v4
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB4_5
; %bb.4:                                ; %.sink.split
                                        ;   in Loop: Header=BB4_3 Depth=1
	ds_load_b32 v4, v2
	ds_load_b32 v5, v1
	s_waitcnt lgkmcnt(0)
	v_dual_max_f32 v4, v4, v4 :: v_dual_max_f32 v5, v5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_max_f32_e32 v6, v5, v4
	v_min_f32_e32 v4, v5, v4
	v_cndmask_b32_e32 v4, v6, v4, vcc_lo
	ds_store_b32 v1, v4
.LBB4_5:                                ;   in Loop: Header=BB4_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v2, 4, v2
	v_add_nc_u32_e32 v3, 1, v3
	s_add_i32 s6, s6, 2
	s_add_i32 s8, s8, -2
	s_cmp_eq_u32 s7, s6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB4_3
.LBB4_6:                                ; %._crit_edge
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_barrier
	buffer_gl0_inv
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB4_8
; %bb.7:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[4:5], 2
	s_add_u32 s0, s2, s0
	ds_load_b32 v1, v0
	s_addc_u32 s1, s3, s1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB4_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13kernel_maxminPfS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z13kernel_maxminPfS_ii, .Lfunc_end4-_Z13kernel_maxminPfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 536
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7tonemapPfS_S_S_S_S_S_fffiii ; -- Begin function _Z7tonemapPfS_S_S_S_S_S_fffiii
	.globl	_Z7tonemapPfS_S_S_S_S_S_fffiii
	.p2align	8
	.type	_Z7tonemapPfS_S_S_S_S_S_fffiii,@function
_Z7tonemapPfS_S_S_S_S_S_fffiii:         ; @_Z7tonemapPfS_S_S_S_S_S_fffiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x5c
	s_load_b128 s[16:19], s[0:1], 0x40
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s19, v0
	v_cmp_gt_i32_e64 s2, s18, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB5_2
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s19, v[0:1]
	s_load_b32 s2, s[0:1], 0x38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	v_cvt_f32_i32_e32 v3, s17
	s_waitcnt vmcnt(0)
	v_subrev_f32_e32 v2, s2, v2
	s_add_i32 s2, s17, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v2, v3
	v_div_scale_f32 v3, null, s16, s16, v2
	v_div_scale_f32 v6, vcc_lo, v2, s16, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v3, v4, 1.0
	v_fmac_f32_e32 v4, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v5, v6, v4
	v_fma_f32 v7, -v3, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v7, v4
	v_fma_f32 v3, -v3, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v3, v3, v4, v5
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_div_fixup_f32 v2, v3, s16, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v2, v2
	v_min_i32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	global_load_b32 v4, v[4:5], off
	global_load_b32 v6, v[2:3], off
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	s_load_b256 s[0:7], s[0:1], 0x20
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(1)
	v_div_scale_f32 v3, null, v4, v4, v6
	v_div_scale_f32 v8, vcc_lo, v6, v4, v6
	v_mul_f32_e32 v11, 0xbe50e560, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v3
	v_mul_f32_e32 v10, 0xbfc4c2f8, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v3, v5, 1.0
	v_fmac_f32_e32 v5, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v8, v5
	v_fma_f32 v9, -v3, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v9, v5
	v_fma_f32 v3, -v3, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v3, v3, v5, v7
	v_div_fixup_f32 v7, v3, v4, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v5, 1.0, v2 :: v_dual_mul_f32 v8, v2, v7
	v_sub_f32_e32 v9, v5, v4
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v12, 0xbf7809d5, v8 :: v_dual_mul_f32 v7, v9, v7
	v_fmamk_f32 v9, v8, 0x404f65fe, v10
	v_add_co_u32 v4, vcc_lo, s2, v0
	v_fmamk_f32 v6, v6, 0x3ff01a37, v12
	v_fmamk_f32 v8, v8, 0x3d6425af, v11
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_fmamk_f32 v9, v7, 0xbeff4880, v9
	v_fmamk_f32 v6, v7, 0x3d29fbe7, v6
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	v_fmamk_f32 v7, v7, 0x3f874bc7, v8
	global_store_b32 v[2:3], v9, off
	global_store_b32 v[4:5], v6, off
	global_store_b32 v[0:1], v7, off
.LBB5_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7tonemapPfS_S_S_S_S_S_fffiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z7tonemapPfS_S_S_S_S_S_fffiii, .Lfunc_end5-_Z7tonemapPfS_S_S_S_S_S_fffiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 660
; NumSgprs: 22
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z17recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii ; -- Begin function _Z17recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii
	.globl	_Z17recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii
	.p2align	8
	.type	_Z17recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii,@function
_Z17recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii: ; @_Z17recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x34
	s_load_b64 s[2:3], s[0:1], 0x20
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s4, 16
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s5, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s3, v0
	v_cmp_gt_i32_e64 s2, s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB6_2
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	global_load_b32 v4, v[4:5], off
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[6:7], off
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_waitcnt vmcnt(2)
	v_cvt_i32_f32_e32 v4, v4
	s_waitcnt vmcnt(1)
	v_cvt_i32_f32_e32 v2, v2
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v3, v3
	v_lshlrev_b16 v4, 8, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v3, 0xffffff00, v3
	v_or_b32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v3, 16, v3
	v_and_b32_e32 v2, 0xffff, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_or_b32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB6_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z17recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii, .Lfunc_end6-_Z17recombineChannelsPKfS0_S0_P15HIP_vector_typeIhLj4EEii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 308
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z13normalize_cdfPjPfi  ; -- Begin function _Z13normalize_cdfPjPfi
	.globl	_Z13normalize_cdfPjPfi
	.p2align	8
	.type	_Z13normalize_cdfPjPfi,@function
_Z13normalize_cdfPjPfi:                 ; @_Z13normalize_cdfPjPfi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s4, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB7_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[4:5], s[4:5], 2
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	s_add_u32 s0, s0, s4
	s_addc_u32 s1, s1, s5
	s_add_u32 s0, s0, -4
	global_load_b32 v2, v[2:3], off
	s_addc_u32 s1, s1, -1
	s_load_b32 s0, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_u32_e32 v3, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v4, null, v3, v3, 1.0
	v_div_scale_f32 v7, vcc_lo, 1.0, v3, 1.0
	v_rcp_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v4, v5, 1.0
	s_waitcnt vmcnt(0)
	v_cvt_f32_u32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v6, v5
	v_mul_f32_e32 v6, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v8, -v4, v6, v7
	v_fmac_f32_e32 v6, v8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v4, -v4, v6, v7
	v_div_fmas_f32 v4, v4, v5, v6
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v3, v4, v3, 1.0
	v_mul_f32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB7_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13normalize_cdfPjPfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	_Z13normalize_cdfPjPfi, .Lfunc_end7-_Z13normalize_cdfPjPfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 292
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16separateChannelsPK15HIP_vector_typeIhLj4EEiiPfS3_S3_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         52
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10rgb_to_xyYPfS_S_S_S_S_fii
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z10rgb_to_xyYPfS_S_S_S_S_fii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     20
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11kernel_scanPii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11kernel_scanPii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
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...

	.end_amdgpu_metadata
