#include <iostream>
#include <cmath>
#include <vector>
#include <fstream>

#include <curand.h>
#include <curand_kernel.h>

#define Ndmsq   1000
#define Nssq2th 1000
#define Ngrid   Ndmsq*Nssq2th
#define Nfexp   500

#define Bkgd    100

__global__ void fakeexps(unsigned int, double*, double*, double*);
__device__ double oscprob(double, double, double);
__device__ double chisquare(double*, double*, double*, double*);

__global__ void fakeexps(unsigned int seed, double* dmsq, double* ssq2th, double* chisq) {
  // Intra-block indexing
  unsigned int blockID   = blockIdx.y * gridDim.x + blockIdx.x;

  // Random generator initiation
  curandState_t state;
  curand_init(seed, 0, 0, &state);

  // cacheChisq with length equals to number of threads (or number of fake experiments)
  __shared__ double cacheChisq[Nfexp];

  // cache Ebin
  __shared__ double ebin[5];
  if (threadIdx.x == 0) {
    for (int k = 0; k < 5; k++) {
      ebin[k] = 15 + k*10;
    }
  }

  double en[5];
  double bkgd[5];
  double mu[5];
  double n[5];
  double mubf[5];
  for (int i = 0; i < 5; i++) {
    en[i]   = ebin[i] + (curand_uniform(&state) - 0.5) * 10;
    bkgd[i] = (double) Bkgd;
    mu[i]   = oscprob(dmsq[blockIdx.y], ssq2th[blockIdx.x], en[i]) * 10000.;
    n[i]    = (double) curand_poisson(&state, mu[i] + bkgd[i]);
    mubf[i] = fmax(0., n[i] - bkgd[i]);
  }

  cacheChisq[threadIdx.x] = chisquare(bkgd, mu, n, mubf);
  __syncthreads();

  if (threadIdx.x == 1) {
    chisq[blockID] = cacheChisq[90];
  }
}

__device__ double oscprob(double dmsq, double ssq2th, double en) {
  return 2*ssq2th*(0.2+0.197*(en/dmsq)*(sin(1.5228*(dmsq/en))-sin(2.538*(dmsq/en))));
}

__device__ double chisquare(double* b, double* mu, double* n, double* mubf) {
  double temp = 0;
  for (int i = 0; i < 5; i++) {
    temp += 2*(mu[i] - mubf[i] + n[i]*log((mubf[i] + b[i]) / (mu[i] + b[i])));
  }
  return temp;
}

int main() {
  // chisq array to save the chi square values at every point on the grid
  double* chisq = new double[Ngrid];

  // Device pointers
  double* dev_dmsq;
  double* dev_ssq2th;
  double* dev_chisq;

  cudaMalloc((void**)&dev_dmsq, Ndmsq*sizeof(double));
  cudaMalloc((void**)&dev_ssq2th, Nssq2th*sizeof(double));
  cudaMalloc((void**)&dev_chisq, Nfexp*Ngrid*sizeof(double));

  // Initiate input values for kernel (grid)
  double dmsqmin = 1;
  double dmsqmax = 1000;
  double ssq2thmin = 0.0001;
  double ssq2thmax = 1;
  double* dmsq = new double[Ndmsq];
  double* ssq2th = new double[Nssq2th];
  for (unsigned int i = 0; i < Ndmsq; i++) {
    dmsq[i] = std::exp(std::log10(dmsqmin) + i*(std::log10(dmsqmax) - std::log10(dmsqmin))/Ndmsq);
  }
  for (unsigned int i = 0; i < Nssq2th; i++) {
    ssq2th[i] = std::exp(std::log10(ssq2thmin) + i*(std::log10(ssq2thmax) - std::log10(ssq2thmin))/Nssq2th);
  }

  cudaMemcpy(dev_dmsq, dmsq, Ndmsq*sizeof(double), cudaMemcpyHostToDevice);
  cudaMemcpy(dev_ssq2th, ssq2th, Nssq2th*sizeof(double), cudaMemcpyHostToDevice);

  // Call kernel (using grid of deltamsq and ssq2th)
  dim3 grid(Nssq2th, Ndmsq);
  fakeexps<<<grid,Nfexp>>>(time(NULL), dev_dmsq, dev_ssq2th, dev_chisq);
  cudaMemcpy(chisq, dev_chisq, Ngrid*sizeof(double), cudaMemcpyDeviceToHost);

  // Output chisq to file
  std::ofstream ofs;
  ofs.open ("chi.dat", std::ofstream::out | std::ofstream::app);
  for (int i = 0; i < Ndmsq; i++) {
    for (int j = 0; j < Nssq2th; j++) {
      ofs << dmsq[i] << "\t\t"<< ssq2th[j] << "\t\t" << chisq[j + i*Ndmsq] << std::endl;
    }
  }
  ofs.close();

  return 0;
}

	.file	"tmpxft_00264325_00000000-6_FeldmanCousins.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4348:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4348:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z7oscprobddd
	.type	_Z7oscprobddd, @function
_Z7oscprobddd:
.LFB4343:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4343:
	.size	_Z7oscprobddd, .-_Z7oscprobddd
	.globl	_Z9chisquarePdS_S_S_
	.type	_Z9chisquarePdS_S_S_, @function
_Z9chisquarePdS_S_S_:
.LFB4344:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4344:
	.size	_Z9chisquarePdS_S_S_, .-_Z9chisquarePdS_S_S_
	.globl	_Z32__device_stub__Z8fakeexpsjPdS_S_jPdS_S_
	.type	_Z32__device_stub__Z8fakeexpsjPdS_S_jPdS_S_, @function
_Z32__device_stub__Z8fakeexpsjPdS_S_jPdS_S_:
.LFB4370:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8fakeexpsjPdS_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L6:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4370:
	.size	_Z32__device_stub__Z8fakeexpsjPdS_S_jPdS_S_, .-_Z32__device_stub__Z8fakeexpsjPdS_S_jPdS_S_
	.globl	_Z8fakeexpsjPdS_S_
	.type	_Z8fakeexpsjPdS_S_, @function
_Z8fakeexpsjPdS_S_:
.LFB4371:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z8fakeexpsjPdS_S_jPdS_S_
	.cfi_endproc
.LFE4371:
	.size	_Z8fakeexpsjPdS_S_, .-_Z8fakeexpsjPdS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z8fakeexpsjPdS_S_"
.LC1:
	.string	"precalc_xorwow_matrix"
.LC2:
	.string	"precalc_xorwow_offset_matrix"
.LC3:
	.string	"mrg32k3aM1"
.LC4:
	.string	"mrg32k3aM2"
.LC5:
	.string	"mrg32k3aM1SubSeq"
.LC6:
	.string	"mrg32k3aM2SubSeq"
.LC7:
	.string	"mrg32k3aM1Seq"
.LC8:
	.string	"mrg32k3aM2Seq"
.LC9:
	.string	"__cr_lgamma_table"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4373:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8fakeexpsjPdS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4373:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC14:
	.string	"chi.dat"
.LC15:
	.string	"\t\t"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4345:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4345
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$8000000, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$600, %rsp
	.cfi_def_cfa_offset 656
	movq	%fs:40, %rax
	movq	%rax, 584(%rsp)
	xorl	%eax, %eax
.LEHB0:
	call	_Znam@PLT
	leaq	24(%rsp), %rdi
	movl	$8000, %esi
	movq	%rax, %r14
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$8000, %esi
	call	cudaMalloc@PLT
	movl	$4000000000, %esi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$8000, %edi
	call	_Znam@PLT
	movl	$8000, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movq	%rax, %r13
.L15:
	cvtsi2sdl	%ebx, %xmm0
	mulsd	.LC10(%rip), %xmm0
	xorps	%xmm1, %xmm1
	divsd	.LC11(%rip), %xmm0
	addsd	%xmm1, %xmm0
	call	exp@PLT
	movsd	%xmm0, (%r12,%rbx,8)
	incq	%rbx
	cmpq	$1000, %rbx
	jne	.L15
	xorl	%ebx, %ebx
.L16:
	cvtsi2sdl	%ebx, %xmm0
	mulsd	.LC13(%rip), %xmm0
	divsd	.LC11(%rip), %xmm0
	subsd	.LC13(%rip), %xmm0
	call	exp@PLT
	movsd	%xmm0, 0(%r13,%rbx,8)
	incq	%rbx
	cmpq	$1000, %rbx
	jne	.L16
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$8000, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$8000, %edx
	call	cudaMemcpy@PLT
	movl	$1073741949, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$2, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297000, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	40(%rsp), %r15
	movq	32(%rsp), %rbp
	xorl	%edi, %edi
	movq	24(%rsp), %rbx
	call	time@PLT
	movq	%r15, %rcx
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z32__device_stub__Z8fakeexpsjPdS_S_jPdS_S_
.L17:
	movq	40(%rsp), %rsi
	movl	$8000000, %edx
	movl	$2, %ecx
	movq	%r14, %rdi
	call	cudaMemcpy@PLT
	leaq	72(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE0:
	movq	8(%rsp), %rdi
	movl	$17, %edx
	leaq	.LC14(%rip), %rsi
.LEHB1:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	xorl	%ebp, %ebp
.L18:
	imulq	$8000, %rbp, %r15
	xorl	%ebx, %ebx
	addq	%r14, %r15
.L19:
	movsd	(%r12,%rbp,8), %xmm0
	movq	8(%rsp), %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	leaq	.LC15(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	0(%r13,%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	leaq	.LC15(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	(%r15,%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	addq	$8, %rbx
	cmpq	$8000, %rbx
	jne	.L19
	incq	%rbp
	cmpq	$1000, %rbp
	jne	.L18
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
.LEHE1:
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	584(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	jmp	.L30
.L25:
	endbr64
	movq	%rax, %rbx
.L21:
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	584(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L30
	movq	%rbx, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L30:
	call	__stack_chk_fail@PLT
.L23:
	addq	$600, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4345:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4345:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4345-.LLSDACSB4345
.LLSDACSB4345:
	.uleb128 .LEHB0-.LFB4345
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4345
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L25-.LFB4345
	.uleb128 0
	.uleb128 .LEHB2-.LFB4345
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE4345:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC10:
	.long	0
	.long	1074266112
	.align 8
.LC11:
	.long	0
	.long	1083129856
	.align 8
.LC13:
	.long	0
	.long	1074790400
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <cmath>
#include <vector>
#include <fstream>

#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>

#define Ndmsq   1000
#define Nssq2th 1000
#define Ngrid   Ndmsq*Nssq2th
#define Nfexp   500

#define Bkgd    100

__global__ void fakeexps(unsigned int, double*, double*, double*);
__device__ double oscprob(double, double, double);
__device__ double chisquare(double*, double*, double*, double*);

__global__ void fakeexps(unsigned int seed, double* dmsq, double* ssq2th, double* chisq) {
  // Intra-block indexing
  unsigned int blockID   = blockIdx.y * gridDim.x + blockIdx.x;

  // Random generator initiation
  hiprandState_t state;
  hiprand_init(seed, 0, 0, &state);

  // cacheChisq with length equals to number of threads (or number of fake experiments)
  __shared__ double cacheChisq[Nfexp];

  // cache Ebin
  __shared__ double ebin[5];
  if (threadIdx.x == 0) {
    for (int k = 0; k < 5; k++) {
      ebin[k] = 15 + k*10;
    }
  }

  double en[5];
  double bkgd[5];
  double mu[5];
  double n[5];
  double mubf[5];
  for (int i = 0; i < 5; i++) {
    en[i]   = ebin[i] + (hiprand_uniform(&state) - 0.5) * 10;
    bkgd[i] = (double) Bkgd;
    mu[i]   = oscprob(dmsq[blockIdx.y], ssq2th[blockIdx.x], en[i]) * 10000.;
    n[i]    = (double) hiprand_poisson(&state, mu[i] + bkgd[i]);
    mubf[i] = fmax(0., n[i] - bkgd[i]);
  }

  cacheChisq[threadIdx.x] = chisquare(bkgd, mu, n, mubf);
  __syncthreads();

  if (threadIdx.x == 1) {
    chisq[blockID] = cacheChisq[90];
  }
}

__device__ double oscprob(double dmsq, double ssq2th, double en) {
  return 2*ssq2th*(0.2+0.197*(en/dmsq)*(sin(1.5228*(dmsq/en))-sin(2.538*(dmsq/en))));
}

__device__ double chisquare(double* b, double* mu, double* n, double* mubf) {
  double temp = 0;
  for (int i = 0; i < 5; i++) {
    temp += 2*(mu[i] - mubf[i] + n[i]*log((mubf[i] + b[i]) / (mu[i] + b[i])));
  }
  return temp;
}

int main() {
  // chisq array to save the chi square values at every point on the grid
  double* chisq = new double[Ngrid];

  // Device pointers
  double* dev_dmsq;
  double* dev_ssq2th;
  double* dev_chisq;

  hipMalloc((void**)&dev_dmsq, Ndmsq*sizeof(double));
  hipMalloc((void**)&dev_ssq2th, Nssq2th*sizeof(double));
  hipMalloc((void**)&dev_chisq, Nfexp*Ngrid*sizeof(double));

  // Initiate input values for kernel (grid)
  double dmsqmin = 1;
  double dmsqmax = 1000;
  double ssq2thmin = 0.0001;
  double ssq2thmax = 1;
  double* dmsq = new double[Ndmsq];
  double* ssq2th = new double[Nssq2th];
  for (unsigned int i = 0; i < Ndmsq; i++) {
    dmsq[i] = std::exp(std::log10(dmsqmin) + i*(std::log10(dmsqmax) - std::log10(dmsqmin))/Ndmsq);
  }
  for (unsigned int i = 0; i < Nssq2th; i++) {
    ssq2th[i] = std::exp(std::log10(ssq2thmin) + i*(std::log10(ssq2thmax) - std::log10(ssq2thmin))/Nssq2th);
  }

  hipMemcpy(dev_dmsq, dmsq, Ndmsq*sizeof(double), hipMemcpyHostToDevice);
  hipMemcpy(dev_ssq2th, ssq2th, Nssq2th*sizeof(double), hipMemcpyHostToDevice);

  // Call kernel (using grid of deltamsq and ssq2th)
  dim3 grid(Nssq2th, Ndmsq);
  fakeexps<<<grid,Nfexp>>>(time(NULL), dev_dmsq, dev_ssq2th, dev_chisq);
  hipMemcpy(chisq, dev_chisq, Ngrid*sizeof(double), hipMemcpyDeviceToHost);

  // Output chisq to file
  std::ofstream ofs;
  ofs.open ("chi.dat", std::ofstream::out | std::ofstream::app);
  for (int i = 0; i < Ndmsq; i++) {
    for (int j = 0; j < Nssq2th; j++) {
      ofs << dmsq[i] << "\t\t"<< ssq2th[j] << "\t\t" << chisq[j + i*Ndmsq] << std::endl;
    }
  }
  ofs.close();

  return 0;
}

	.text
	.file	"FeldmanCousins.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z23__device_stub__fakeexpsjPdS_S_ # -- Begin function _Z23__device_stub__fakeexpsjPdS_S_
	.type	_Z23__device_stub__fakeexpsjPdS_S_,@function
_Z23__device_stub__fakeexpsjPdS_S_:     # @_Z23__device_stub__fakeexpsjPdS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8fakeexpsjPdS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z23__device_stub__fakeexpsjPdS_S_, .Lfunc_end0-_Z23__device_stub__fakeexpsjPdS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x4008000000000000              # double 3
.LCPI1_1:
	.quad	0x408f400000000000              # double 1000
.LCPI1_2:
	.quad	0x4010000000000000              # double 4
.LCPI1_3:
	.quad	0xc010000000000000              # double -4
.LCPI1_4:
	.quad	0x0000000000000000              # double 0
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$536, %rsp                      # imm = 0x218
	.cfi_def_cfa_offset 592
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4000000000, %r12d              # imm = 0xEE6B2800
	movl	$8000000, %edi                  # imm = 0x7A1200
	callq	_Znam
	movq	%rax, %rbx
	leaq	16(%rsp), %rdi
	movl	$8000, %esi                     # imm = 0x1F40
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$8000, %esi                     # imm = 0x1F40
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$4000000000, %esi               # imm = 0xEE6B2800
	callq	hipMalloc
	movl	$8000, %edi                     # imm = 0x1F40
	callq	_Znam
	movq	%rax, %r13
	movl	$8000, %edi                     # imm = 0x1F40
	callq	_Znam
	movq	%rax, %r15
	xorl	%r14d, %r14d
	movsd	.LCPI1_1(%rip), %xmm1           # xmm1 = mem[0],zero
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%r14d, %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	mulsd	.LCPI1_0(%rip), %xmm0
	divsd	%xmm1, %xmm0
	addsd	.LCPI1_4(%rip), %xmm0
	callq	exp
	movsd	.LCPI1_1(%rip), %xmm1           # xmm1 = mem[0],zero
	movsd	%xmm0, (%r13,%r14,8)
	incq	%r14
	cmpq	$1000, %r14                     # imm = 0x3E8
	jne	.LBB1_1
# %bb.2:                                # %.preheader49.preheader
	xorl	%r14d, %r14d
.LBB1_3:                                # %.preheader49
                                        # =>This Inner Loop Header: Depth=1
	movl	%r14d, %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	mulsd	.LCPI1_2(%rip), %xmm0
	divsd	%xmm1, %xmm0
	addsd	.LCPI1_3(%rip), %xmm0
	callq	exp
	movsd	.LCPI1_1(%rip), %xmm1           # xmm1 = mem[0],zero
	movsd	%xmm0, (%r15,%r14,8)
	incq	%r14
	cmpq	$1000, %r14                     # imm = 0x3E8
	jne	.LBB1_3
# %bb.4:
	movq	16(%rsp), %rdi
	movl	$8000, %edx                     # imm = 0x1F40
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movl	$8000, %edx                     # imm = 0x1F40
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	addq	$294967796, %r12                # imm = 0x1194D9F4
	movabsq	$4294967297000, %rdi            # imm = 0x3E8000003E8
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:
	xorl	%edi, %edi
	callq	time
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	(%rsp), %rcx
	movl	%eax, %edi
	callq	_Z23__device_stub__fakeexpsjPdS_S_
.LBB1_6:
	movq	(%rsp), %rsi
	movl	$8000000, %edx                  # imm = 0x7A1200
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %r12
	movq	%r12, %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
.Ltmp0:
	movl	$.L.str, %esi
	movq	%r12, %rdi
	movl	$17, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp1:
# %bb.7:                                # %.preheader.preheader
	xorl	%ebp, %ebp
.LBB1_8:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_9 Depth 2
	xorl	%r14d, %r14d
.LBB1_9:                                #   Parent Loop BB1_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%r13, %r12
	movsd	(%r13,%rbp,8), %xmm0            # xmm0 = mem[0],zero
.Ltmp2:
	leaq	24(%rsp), %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp3:
# %bb.10:                               # %_ZNSolsEd.exit
                                        #   in Loop: Header=BB1_9 Depth=2
.Ltmp4:
	movq	%rax, %r13
	movl	$.L.str.1, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp5:
# %bb.11:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
                                        #   in Loop: Header=BB1_9 Depth=2
	movsd	(%r15,%r14,8), %xmm0            # xmm0 = mem[0],zero
.Ltmp6:
	movq	%r13, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp7:
# %bb.12:                               # %_ZNSolsEd.exit42
                                        #   in Loop: Header=BB1_9 Depth=2
.Ltmp8:
	movq	%rax, %r13
	movl	$.L.str.1, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp9:
# %bb.13:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit43
                                        #   in Loop: Header=BB1_9 Depth=2
	movsd	(%rbx,%r14,8), %xmm0            # xmm0 = mem[0],zero
.Ltmp10:
	movq	%r13, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp11:
# %bb.14:                               # %_ZNSolsEd.exit44
                                        #   in Loop: Header=BB1_9 Depth=2
	movq	%rax, %r13
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
.Ltmp12:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp13:
# %bb.15:                               # %.noexc
                                        #   in Loop: Header=BB1_9 Depth=2
.Ltmp14:
	movsbl	%al, %esi
	movq	%r13, %rdi
	callq	_ZNSo3putEc
.Ltmp15:
# %bb.16:                               # %.noexc45
                                        #   in Loop: Header=BB1_9 Depth=2
.Ltmp16:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp17:
# %bb.17:                               # %_ZNSolsEPFRSoS_E.exit
                                        #   in Loop: Header=BB1_9 Depth=2
	incq	%r14
	cmpq	$1000, %r14                     # imm = 0x3E8
	movq	%r12, %r13
	jne	.LBB1_9
# %bb.18:                               #   in Loop: Header=BB1_8 Depth=1
	incq	%rbp
	addq	$8000, %rbx                     # imm = 0x1F40
	cmpq	$1000, %rbp                     # imm = 0x3E8
	jne	.LBB1_8
# %bb.19:
.Ltmp19:
	leaq	24(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp20:
# %bb.20:
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
	leaq	32(%rsp), %rdi
	movq	%rax, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rcx
	movq	-24(%rax), %rax
	movq	%rcx, 24(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	272(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	xorl	%eax, %eax
	addq	$536, %rsp                      # imm = 0x218
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_21:
	.cfi_def_cfa_offset 592
.Ltmp21:
	jmp	.LBB1_22
.LBB1_23:
.Ltmp18:
.LBB1_22:
	movq	%rax, %rbx
	leaq	24(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp21-.Lfunc_begin0          #     jumps to .Ltmp21
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp2-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp17-.Ltmp2                 #   Call between .Ltmp2 and .Ltmp17
	.uleb128 .Ltmp18-.Lfunc_begin0          #     jumps to .Ltmp18
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp19-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp20-.Ltmp19                #   Call between .Ltmp19 and .Ltmp20
	.uleb128 .Ltmp21-.Lfunc_begin0          #     jumps to .Ltmp21
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp20-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Lfunc_end1-.Ltmp20            #   Call between .Ltmp20 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8fakeexpsjPdS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8fakeexpsjPdS_S_,@object      # @_Z8fakeexpsjPdS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z8fakeexpsjPdS_S_
	.p2align	3, 0x0
_Z8fakeexpsjPdS_S_:
	.quad	_Z23__device_stub__fakeexpsjPdS_S_
	.size	_Z8fakeexpsjPdS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"chi.dat"
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\t\t"
	.size	.L.str.1, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8fakeexpsjPdS_S_"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__fakeexpsjPdS_S_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z8fakeexpsjPdS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8fakeexpsjPdS_S_      ; -- Begin function _Z8fakeexpsjPdS_S_
	.globl	_Z8fakeexpsjPdS_S_
	.p2align	8
	.type	_Z8fakeexpsjPdS_S_,@function
_Z8fakeexpsjPdS_S_:                     ; @_Z8fakeexpsjPdS_S_
; %bb.0:
	s_mov_b32 s8, s15
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_2
; %bb.1:                                ; %.preheader49.preheader
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, 0x402e0000
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v4, 0x40390000 :: v_dual_mov_b32 v3, v1
	ds_store_b128 v1, v[1:4] offset:4000
	v_mov_b32_e32 v2, 0x40418000
	v_mov_b32_e32 v4, 0x40468000
	ds_store_b128 v1, v[1:4] offset:4016
	v_mov_b32_e32 v2, 0x404b8000
	ds_store_b64 v1, v[1:2] offset:4032
.LBB0_2:                                ; %.loopexit
	s_or_b32 exec_lo, exec_lo, s2
	s_clause 0x3
	s_load_b32 s2, s[0:1], 0x0
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b32 s3, s[0:1], 0x20
	s_load_b64 s[0:1], s[0:1], 0x18
                                        ; implicit-def: $vgpr71 : SGPR spill to VGPR lane
	s_mov_b32 s10, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s9, s10
	s_mov_b32 s15, s10
	s_mov_b32 s98, 0x54442d18
	s_mov_b32 s22, 0x55555555
	s_mov_b32 s16, 0x6b47b09a
	s_mov_b32 s26, 0xbf559e2b
	s_mov_b32 s42, 0xd7f4df2e
	s_mov_b32 s60, 0x16291751
	s_mov_b32 s102, 0x9b27acf1
	s_mov_b32 s10, 0x998ef7b6
	s_mov_b32 s94, 0xfefa39ef
	s_mov_b32 s96, 0x3b39803f
	s_mov_b32 s24, 0xa96f9d04
	s_mov_b32 s33, 0x8f14727c
	s_mov_b32 s19, 0x3c91a626
	s_mov_b32 s88, 0x33145c07
	s_waitcnt lgkmcnt(0)
	v_writelane_b32 v71, s3, 0
	s_mov_b32 s99, 0xbff921fb
	s_mov_b32 s23, 0x3fe55555
	s_mov_b32 s17, 0x3fc38538
	s_mov_b32 s27, 0x3fc3ab76
	v_writelane_b32 v71, s0, 1
	s_mov_b32 s43, 0x3fc7474d
	s_mov_b32 s61, 0x3fcc71c0
	s_mov_b32 s103, 0x3fd24924
	s_mov_b32 s11, 0x3fd99999
	v_writelane_b32 v71, s1, 2
	s_mov_b32 s0, 0
	s_mov_b32 s95, 0xbfe62e42
	s_mov_b32 s97, 0xbc7abc9e
	s_mov_b32 s101, 0
	v_writelane_b32 v71, s0, 3
	s_mov_b32 s86, 0x55555780
	s_mov_b32 s73, 0x3fe62e42
	s_mov_b32 s65, 0x3c7abc9e
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $sgpr28_sgpr29
                                        ; implicit-def: $sgpr30_sgpr31
                                        ; implicit-def: $sgpr34_sgpr35
                                        ; implicit-def: $sgpr38_sgpr39
                                        ; implicit-def: $sgpr40_sgpr41
                                        ; implicit-def: $sgpr44_sgpr45
                                        ; implicit-def: $sgpr46_sgpr47
                                        ; implicit-def: $sgpr48_sgpr49
                                        ; implicit-def: $sgpr50_sgpr51
                                        ; implicit-def: $sgpr52_sgpr53
                                        ; implicit-def: $sgpr54_sgpr55
                                        ; implicit-def: $sgpr56_sgpr57
                                        ; implicit-def: $sgpr58_sgpr59
                                        ; implicit-def: $sgpr62_sgpr63
                                        ; implicit-def: $sgpr66_sgpr67
                                        ; implicit-def: $sgpr70_sgpr71
                                        ; implicit-def: $sgpr74_sgpr75
                                        ; implicit-def: $sgpr78_sgpr79
                                        ; implicit-def: $sgpr82_sgpr83
	v_writelane_b32 v71, s1, 4
	s_xor_b32 s0, s2, 0x2c7f967f
	s_lshl_b64 s[2:3], s[8:9], 3
	s_mul_i32 s1, s0, 0x493c4aa1
	s_mov_b32 s0, s8
	s_mov_b32 s9, 0x3ff921fb
	v_writelane_b32 v71, s0, 5
	s_xor_b32 s85, s1, 0x159a55e5
	s_add_i32 s104, s1, 0x583f19
	s_add_i32 s100, s1, 0x8ac25218
	v_writelane_b32 v71, s1, 6
	s_add_i32 s0, s1, 0x75bcd15
	s_add_u32 s2, s4, s2
	s_mov_b32 s4, s14
	s_addc_u32 s3, s5, s3
	v_writelane_b32 v71, s4, 7
	s_load_b64 s[2:3], s[2:3], 0x0
	s_mov_b32 s1, 0xbfc55555
	v_writelane_b32 v71, s5, 8
	s_lshl_b64 s[4:5], s[14:15], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s4, s6, s4
	s_addc_u32 s5, s7, s5
	s_mov_b32 s6, 0x11110bb3
	s_load_b64 s[4:5], s[4:5], 0x0
	v_writelane_b32 v71, s6, 9
	v_writelane_b32 v71, s7, 10
                                        ; implicit-def: $sgpr6_sgpr7
	v_writelane_b32 v71, s0, 11
	v_writelane_b32 v71, s1, 12
	s_mov_b32 s1, 0x400921fb
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], s[4:5], s[4:5]
	v_writelane_b32 v71, s2, 13
	v_writelane_b32 v71, s3, 14
	v_writelane_b32 v71, s0, 15
	v_writelane_b32 v71, s1, 16
	s_mov_b32 s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_writelane_b32 v71, s1, 17
	s_mov_b32 s1, 0xbff71547
	v_writelane_b32 v71, s0, 18
	v_writelane_b32 v71, s1, 19
.LBB0_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_16 Depth 2
                                        ;     Child Loop BB0_35 Depth 2
	s_lshr_b32 s1, s0, 2
	v_writelane_b32 v71, s100, 20
	s_xor_b32 s0, s1, s0
	s_lshl_b32 s1, s104, 4
	s_lshl_b32 s2, s0, 1
	s_add_i32 s100, s100, 0x587c5
	s_xor_b32 s1, s2, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s0, s1, s0
	s_xor_b32 s5, s0, s104
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s5, s100
	v_cvt_f32_u32_e32 v4, s0
	s_lshl_b32 s0, s101, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v4, 0x2f800000, v4, 0x2f800000
	v_cvt_f64_f32_e32 v[7:8], v4
	v_mov_b32_e32 v4, s0
	v_readlane_b32 s0, v71, 13
	v_readlane_b32 s1, v71, 14
	ds_load_b64 v[9:10], v4 offset:4000
	v_add_f64 v[7:8], v[7:8], -0.5
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], 0x40240000, v[7:8], v[9:10]
	v_div_scale_f64 v[9:10], null, v[7:8], v[7:8], s[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[11:12], v[9:10]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[13:14], -v[9:10], v[11:12], 1.0
	v_fma_f64 v[11:12], v[11:12], v[13:14], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], -v[9:10], v[11:12], 1.0
	v_fma_f64 v[11:12], v[11:12], v[13:14], v[11:12]
	v_div_scale_f64 v[13:14], vcc_lo, s[0:1], v[7:8], s[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[15:16], v[13:14], v[11:12]
	v_fma_f64 v[9:10], -v[9:10], v[15:16], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[9:10], v[9:10], v[11:12], v[15:16]
	v_div_fixup_f64 v[13:14], v[9:10], v[7:8], s[0:1]
	s_mov_b32 s0, 0x886594af
	s_mov_b32 s1, 0x3ff85d63
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_f64 v[9:10], v[13:14], s[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s0, 0x41d00000, |v[9:10]|
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	v_ldexp_f64 v[11:12], |v[9:10]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[9:10]|
	v_trig_preop_f64 v[15:16], |v[9:10]|, 0
	v_and_b32_e32 v4, 0x7fffffff, v10
	v_trig_preop_f64 v[17:18], |v[9:10]|, 1
	v_trig_preop_f64 v[23:24], |v[9:10]|, 2
	s_mov_b32 s8, s98
	s_mov_b32 s89, s19
	v_dual_cndmask_b32 v11, v9, v11 :: v_dual_cndmask_b32 v12, v4, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[19:20], v[15:16], v[11:12]
	v_mul_f64 v[21:22], v[17:18], v[11:12]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[25:26], v[23:24], v[11:12]
	v_fma_f64 v[15:16], v[15:16], v[11:12], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[17:18], v[17:18], v[11:12], -v[21:22]
	v_fma_f64 v[11:12], v[23:24], v[11:12], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[21:22], v[15:16]
	v_add_f64 v[27:28], v[23:24], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[15:16], v[15:16], -v[27:28]
	v_add_f64 v[27:28], v[23:24], -v[27:28]
	v_add_f64 v[21:22], v[21:22], -v[27:28]
	v_add_f64 v[27:28], v[19:20], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[15:16], v[21:22]
	v_add_f64 v[19:20], v[27:28], -v[19:20]
	v_add_f64 v[21:22], v[25:26], v[17:18]
	v_ldexp_f64 v[27:28], v[27:28], -2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[23:24], -v[19:20]
	v_add_f64 v[23:24], v[21:22], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[27:28]|
	v_fract_f64_e32 v[27:28], v[27:28]
	v_add_f64 v[17:18], v[17:18], -v[23:24]
	v_add_f64 v[23:24], v[21:22], -v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v27, 0, v27 :: v_dual_cndmask_b32 v28, 0, v28
	v_add_f64 v[23:24], v[25:26], -v[23:24]
	v_add_f64 v[25:26], v[21:22], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], v[23:24]
	v_add_f64 v[29:30], v[25:26], -v[21:22]
	v_add_f64 v[23:24], v[19:20], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[15:16], v[15:16], -v[29:30]
	v_add_f64 v[29:30], v[25:26], -v[29:30]
	v_add_f64 v[19:20], v[23:24], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[21:22], -v[29:30]
	v_add_f64 v[19:20], v[25:26], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[15:16], v[21:22]
	v_ldexp_f64 v[21:22], v[27:28], 2
	v_add_f64 v[15:16], v[17:18], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[23:24], v[21:22]
	v_add_f64 v[11:12], v[11:12], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[27:28]
	v_add_f64 v[11:12], v[19:20], v[11:12]
	s_and_b32 s0, vcc_lo, exec_lo
	v_readlane_b32 s0, v71, 3
	s_cselect_b32 s3, 0x40100000, 0
	v_readlane_b32 s1, v71, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mov_b32 s2, s0
	v_add_f64 v[17:18], v[21:22], s[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[23:24], v[17:18]
	v_cvt_i32_f64_e32 v4, v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_i32_e32 v[21:22], v4
	v_add_f64 v[17:18], v[17:18], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[15:16], v[23:24], v[17:18]
	v_add_f64 v[17:18], v[15:16], -v[17:18]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[15:16]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[17:18], v[23:24], -v[17:18]
	s_and_b32 s0, vcc_lo, exec_lo
	s_cselect_b32 s3, 0x3ff00000, 0
	s_mov_b32 s0, s2
	v_add_f64 v[15:16], v[15:16], -s[2:3]
	v_writelane_b32 v71, s0, 3
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	v_writelane_b32 v71, s1, 4
	s_mov_b32 s0, 0
	v_add_f64 v[11:12], v[11:12], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[15:16], v[11:12]
	v_mul_f64 v[19:20], v[17:18], s[8:9]
	v_add_f64 v[15:16], v[17:18], -v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[21:22], v[17:18], s[8:9], -v[19:20]
	v_add_f64 v[11:12], v[11:12], -v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[15:16], v[17:18], s[88:89], v[21:22]
	v_fma_f64 v[15:16], v[11:12], s[8:9], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[19:20], v[15:16]
	v_add_f64 v[17:18], v[11:12], -v[19:20]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[15:16], v[15:16], -v[17:18]
	s_branch .LBB0_6
.LBB0_5:                                ;   in Loop: Header=BB0_3 Depth=1
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr11_vgpr12
                                        ; implicit-def: $vgpr15_vgpr16
.LBB0_6:                                ; %Flow227
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_3 Depth=1
	s_mov_b32 s0, 0x6dc9c883
	s_mov_b32 s1, 0x3fe45f30
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_f64 v[11:12], |v[9:10]|, s[0:1]
	s_mov_b32 s0, 0x33145c00
	s_mov_b32 s1, 0xbc91a626
	s_mov_b32 s18, s0
	v_rndne_f64_e32 v[17:18], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[11:12], v[17:18], s[98:99], |v[9:10]|
	v_mul_f64 v[15:16], v[17:18], s[0:1]
	v_cvt_i32_f64_e32 v4, v[17:18]
	v_fma_f64 v[21:22], v[17:18], s[0:1], v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[11:12], v[15:16]
	s_mov_b32 s0, 0x252049c0
	s_mov_b32 s1, 0xb97b839a
	v_add_f64 v[11:12], v[11:12], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[19:20], -v[21:22]
	v_add_f64 v[11:12], v[11:12], v[15:16]
	v_fma_f64 v[15:16], v[17:18], s[18:19], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[19:20], v[11:12]
	v_add_f64 v[11:12], v[11:12], -v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[15:16], v[17:18], s[0:1], v[11:12]
	v_add_f64 v[11:12], v[21:22], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[11:12], -v[21:22]
	v_add_f64 v[15:16], v[15:16], -v[19:20]
.LBB0_8:                                ; %_ZL3sind.exit.i
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_mov_b32 s0, 0xf1a9fbe7
	s_mov_b32 s1, 0x40044dd2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[13:14], v[13:14], s[0:1]
	v_cmp_ngt_f64_e64 s0, 0x41d00000, |v[13:14]|
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_3 Depth=1
	v_ldexp_f64 v[17:18], |v[13:14]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[13:14]|
	v_trig_preop_f64 v[19:20], |v[13:14]|, 0
	v_and_b32_e32 v23, 0x7fffffff, v14
	v_trig_preop_f64 v[21:22], |v[13:14]|, 1
	v_trig_preop_f64 v[27:28], |v[13:14]|, 2
	s_mov_b32 s8, s98
	s_mov_b32 s89, s19
	v_dual_cndmask_b32 v18, v23, v18 :: v_dual_cndmask_b32 v17, v13, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[23:24], v[19:20], v[17:18]
	v_mul_f64 v[25:26], v[21:22], v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[29:30], v[27:28], v[17:18]
	v_fma_f64 v[19:20], v[19:20], v[17:18], -v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[21:22], v[21:22], v[17:18], -v[25:26]
	v_fma_f64 v[17:18], v[27:28], v[17:18], -v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[27:28], v[25:26], v[19:20]
	v_add_f64 v[31:32], v[27:28], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[19:20], -v[31:32]
	v_add_f64 v[31:32], v[27:28], -v[31:32]
	v_add_f64 v[25:26], v[25:26], -v[31:32]
	v_add_f64 v[31:32], v[23:24], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[19:20], v[25:26]
	v_add_f64 v[23:24], v[31:32], -v[23:24]
	v_add_f64 v[25:26], v[29:30], v[21:22]
	v_ldexp_f64 v[31:32], v[31:32], -2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[27:28], -v[23:24]
	v_add_f64 v[27:28], v[25:26], -v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[31:32]|
	v_fract_f64_e32 v[31:32], v[31:32]
	v_add_f64 v[21:22], v[21:22], -v[27:28]
	v_add_f64 v[27:28], v[25:26], -v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v32, 0, v32 :: v_dual_cndmask_b32 v31, 0, v31
	v_add_f64 v[27:28], v[29:30], -v[27:28]
	v_add_f64 v[29:30], v[25:26], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[21:22], v[27:28]
	v_add_f64 v[33:34], v[29:30], -v[25:26]
	v_add_f64 v[27:28], v[23:24], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[19:20], -v[33:34]
	v_add_f64 v[33:34], v[29:30], -v[33:34]
	v_add_f64 v[23:24], v[27:28], -v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], -v[33:34]
	v_add_f64 v[23:24], v[29:30], -v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[19:20], v[25:26]
	v_ldexp_f64 v[25:26], v[31:32], 2
	v_add_f64 v[19:20], v[21:22], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[27:28], v[25:26]
	v_add_f64 v[17:18], v[17:18], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[31:32]
	v_add_f64 v[17:18], v[23:24], v[17:18]
	s_and_b32 s0, vcc_lo, exec_lo
	v_readlane_b32 s0, v71, 3
	s_cselect_b32 s3, 0x40100000, 0
	v_readlane_b32 s1, v71, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mov_b32 s2, s0
	v_add_f64 v[21:22], v[25:26], s[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[27:28], v[21:22]
	v_cvt_i32_f64_e32 v31, v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_i32_e32 v[25:26], v31
	v_add_f64 v[21:22], v[21:22], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[27:28], v[21:22]
	v_add_f64 v[21:22], v[19:20], -v[21:22]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[19:20]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[21:22], v[27:28], -v[21:22]
	s_and_b32 s0, vcc_lo, exec_lo
	s_cselect_b32 s3, 0x3ff00000, 0
	s_mov_b32 s0, s2
	v_add_f64 v[19:20], v[19:20], -s[2:3]
	v_writelane_b32 v71, s0, 3
	v_writelane_b32 v71, s1, 4
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[17:18], v[21:22]
	v_add_f64 v[21:22], v[19:20], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[23:24], v[21:22], s[8:9]
	v_add_f64 v[19:20], v[21:22], -v[19:20]
	v_fma_f64 v[25:26], v[21:22], s[8:9], -v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], -v[19:20]
	v_fma_f64 v[19:20], v[21:22], s[88:89], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[19:20], v[17:18], s[8:9], v[19:20]
	v_add_f64 v[17:18], v[23:24], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[17:18], -v[23:24]
	v_add_f64 v[19:20], v[19:20], -v[21:22]
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v31, vcc_lo
	s_branch .LBB0_11
.LBB0_10:                               ;   in Loop: Header=BB0_3 Depth=1
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $vgpr17_vgpr18
                                        ; implicit-def: $vgpr19_vgpr20
.LBB0_11:                               ; %Flow226
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_mov_b32 s92, 0x555502a1
	s_mov_b32 s93, 0x3fa55555
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_3 Depth=1
	s_mov_b32 s0, 0x6dc9c883
	s_mov_b32 s1, 0x3fe45f30
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_f64 v[17:18], |v[13:14]|, s[0:1]
	s_mov_b32 s0, 0x33145c00
	s_mov_b32 s1, 0xbc91a626
	s_mov_b32 s18, s0
	v_rndne_f64_e32 v[21:22], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], v[21:22], s[98:99], |v[13:14]|
	v_mul_f64 v[19:20], v[21:22], s[0:1]
	v_fma_f64 v[25:26], v[21:22], s[0:1], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[17:18], v[19:20]
	s_mov_b32 s0, 0x252049c0
	s_mov_b32 s1, 0xb97b839a
	v_add_f64 v[17:18], v[17:18], -v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	v_add_f64 v[17:18], v[17:18], v[19:20]
	v_fma_f64 v[19:20], v[21:22], s[18:19], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[23:24], v[17:18]
	v_add_f64 v[17:18], v[17:18], -v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[19:20], v[21:22], s[0:1], v[17:18]
	v_cvt_i32_f64_e32 v21, v[21:22]
	v_add_f64 v[17:18], v[25:26], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[17:18], -v[25:26]
	v_add_f64 v[19:20], v[19:20], -v[23:24]
.LBB0_13:                               ; %_Z7oscprobddd.exit
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_mul_f64 v[22:23], v[11:12], v[11:12]
	v_writelane_b32 v71, s18, 21
	s_mov_b32 s2, 0xb42fdfa7
	s_mov_b32 s3, 0xbe5ae600
	s_mov_b32 s80, 0x796cde01
	s_mov_b32 s81, 0x3ec71de3
	v_writelane_b32 v71, s19, 22
	s_mov_b32 s18, 0xf9a43bb8
	s_mov_b32 s19, 0x3de5e0b2
	s_mov_b32 s14, 0x19e83e5c
	s_mov_b32 s15, 0xbf2a01a0
	s_mov_b32 s0, 0x11122322
	v_readlane_b32 s12, v71, 9
	s_mov_b32 s1, 0x3f811111
	v_readlane_b32 s13, v71, 10
	s_mov_b32 s13, s1
	v_mul_f64 v[30:31], v[15:16], 0.5
	s_mov_b32 s36, 0x9037ab78
	s_mov_b32 s20, 0x46cc5e42
	s_mov_b32 s37, 0x3e21eeb6
	s_mov_b32 s21, 0xbda907db
	s_mov_b32 s68, 0xa17f65f6
	s_mov_b32 s69, 0xbe927e4f
	s_mov_b32 s76, 0x19f4ec90
	s_mov_b32 s77, 0x3efa01a0
	s_mov_b32 s90, 0x16c16967
	s_mov_b32 s91, 0xbf56c16c
	s_mov_b32 s0, s22
	s_mov_b32 s1, s93
	v_mul_f64 v[36:37], v[19:20], 0.5
	v_mul_f64 v[24:25], v[22:23], 0.5
	v_mul_f64 v[32:33], v[11:12], -v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], -v[24:25], 1.0
	v_add_f64 v[28:29], -v[26:27], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[28:29], -v[24:25]
	v_fma_f64 v[28:29], v[22:23], s[18:19], s[2:3]
	v_fma_f64 v[24:25], v[11:12], -v[15:16], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[28:29], v[22:23], v[28:29], s[80:81]
	v_fma_f64 v[28:29], v[22:23], v[28:29], s[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[28:29], v[22:23], v[28:29], s[12:13]
	v_fma_f64 v[28:29], v[32:33], v[28:29], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[15:16], v[22:23], v[28:29], -v[15:16]
	v_fma_f64 v[28:29], v[22:23], s[20:21], s[36:37]
	v_fma_f64 v[28:29], v[22:23], v[28:29], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[28:29], v[22:23], v[28:29], s[76:77]
	v_fma_f64 v[28:29], v[22:23], v[28:29], s[90:91]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[28:29], v[22:23], v[28:29], s[0:1]
	v_mul_f64 v[22:23], v[22:23], v[22:23]
	v_fma_f64 v[22:23], v[22:23], v[28:29], v[24:25]
	v_mul_f64 v[24:25], v[17:18], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[26:27], v[22:23]
	v_mul_f64 v[28:29], v[24:25], 0.5
	v_mul_f64 v[38:39], v[17:18], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[30:31], -v[28:29], 1.0
	v_add_f64 v[34:35], -v[30:31], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[28:29], v[34:35], -v[28:29]
	v_fma_f64 v[34:35], v[24:25], s[18:19], s[2:3]
	s_mov_b32 s2, s12
	v_writelane_b32 v71, s2, 9
	v_writelane_b32 v71, s3, 10
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[28:29], v[17:18], -v[19:20], v[28:29]
	v_fma_f64 v[34:35], v[24:25], v[34:35], s[80:81]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[34:35], v[24:25], v[34:35], s[14:15]
	v_fma_f64 v[34:35], v[24:25], v[34:35], s[12:13]
	v_readlane_b32 s12, v71, 13
	v_readlane_b32 s13, v71, 14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[34:35], v[38:39], v[34:35], v[36:37]
	v_fma_f64 v[19:20], v[24:25], v[34:35], -v[19:20]
	v_fma_f64 v[34:35], v[24:25], s[20:21], s[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[34:35], v[24:25], v[34:35], s[68:69]
	v_fma_f64 v[34:35], v[24:25], v[34:35], s[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[34:35], v[24:25], v[34:35], s[90:91]
	v_fma_f64 v[34:35], v[24:25], v[34:35], s[0:1]
	v_mul_f64 v[24:25], v[24:25], v[24:25]
	v_readlane_b32 s0, v71, 11
	v_readlane_b32 s1, v71, 12
	s_mov_b32 s0, s22
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[15:16], v[32:33], s[0:1], v[15:16]
	s_mov_b32 s3, s1
	v_writelane_b32 v71, s2, 11
	v_writelane_b32 v71, s3, 12
	v_writelane_b32 v71, s88, 23
	v_writelane_b32 v71, s89, 24
	v_fma_f64 v[24:25], v[24:25], v[34:35], v[28:29]
	v_div_scale_f64 v[28:29], null, s[12:13], s[12:13], v[7:8]
	v_add_f64 v[11:12], v[11:12], -v[15:16]
	v_and_b32_e32 v15, 1, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[34:35], v[28:29]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[36:37], -v[28:29], v[34:35], 1.0
	v_fma_f64 v[34:35], v[34:35], v[36:37], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], -v[28:29], v[34:35], 1.0
	v_fma_f64 v[34:35], v[34:35], v[36:37], v[34:35]
	v_div_scale_f64 v[36:37], vcc_lo, v[7:8], s[12:13], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[40:41], v[36:37], v[34:35]
	v_fma_f64 v[28:29], -v[28:29], v[40:41], v[36:37]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fmas_f64 v[28:29], v[28:29], v[34:35], v[40:41]
	v_cmp_eq_u32_e32 vcc_lo, 0, v15
	v_add_f64 v[15:16], v[30:31], v[24:25]
	v_dual_cndmask_b32 v22, v22, v11 :: v_dual_cndmask_b32 v23, v23, v12
	v_fma_f64 v[11:12], v[38:39], s[0:1], v[19:20]
	v_cmp_class_f64_e64 vcc_lo, v[9:10], 0x1f8
	v_cmp_class_f64_e64 s0, v[13:14], 0x1f8
	v_lshlrev_b32_e32 v4, 30, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, v4, v10
	v_and_b32_e32 v10, 1, v21
	v_and_b32_e32 v4, 0x80000000, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s1, 0, v10
	v_xor_b32_e32 v4, v23, v4
	v_lshlrev_b32_e32 v9, 30, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v9, v9, v14
	v_and_b32_e32 v9, 0x80000000, v9
	v_div_fixup_f64 v[7:8], v[28:29], s[12:13], v[7:8]
	v_add_f64 v[11:12], v[17:18], -v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v10, v16, v12, s1
	v_cndmask_b32_e64 v11, v15, v11, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v12, v10, v9
	v_cndmask_b32_e32 v10, 0x7ff80000, v4, vcc_lo
	v_cndmask_b32_e32 v9, 0, v22, vcc_lo
	v_cndmask_b32_e64 v11, 0, v11, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v12, 0x7ff80000, v12, s0
	s_mov_b32 s0, 0xc6a7ef9e
	s_mov_b32 s1, 0x3fc9374b
	v_mul_f64 v[7:8], v[7:8], s[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	s_mov_b32 s0, 0x9999999a
	s_mov_b32 s1, 0x3fc99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[7:8], v[7:8], v[9:10], s[0:1]
	s_mov_b32 s0, 0
	s_mov_b32 s1, 0x40590000
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[1:2], v[7:8]
	v_fma_f64 v[7:8], 0x40c38800, v[9:10], s[0:1]
	v_mul_f64 v[9:10], 0x40c38800, v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ngt_f64_e32 vcc_lo, 0x40500000, v[7:8]
	v_readfirstlane_b32 s13, v9
	s_delay_alu instid0(VALU_DEP_3)
	v_readfirstlane_b32 s18, v10
	s_cbranch_vccz .LBB0_22
; %bb.14:                               ;   in Loop: Header=BB0_3 Depth=1
	v_cmp_nge_f64_e32 vcc_lo, 0x40af4000, v[7:8]
	v_writelane_b32 v71, s100, 25
	s_cbranch_vccnz .LBB0_23
; %bb.15:                               ;   in Loop: Header=BB0_3 Depth=1
	v_mul_f64 v[9:10], 0x40080000, v[7:8]
	s_mov_b32 s2, 0xae147ae1
	s_mov_b32 s3, 0xc00ae147
	v_writelane_b32 v71, s13, 26
	v_div_scale_f64 v[17:18], null, v[7:8], v[7:8], s[2:3]
	s_mov_b32 s80, s96
	s_mov_b32 s81, s65
	v_writelane_b32 v71, s8, 27
	v_cmp_ngt_f64_e64 s4, 0, v[7:8]
	s_mov_b32 s20, 0x555502a1
	s_mov_b32 s89, s5
	s_mov_b32 s84, s24
	v_writelane_b32 v71, s9, 28
	s_mov_b32 s8, s94
	s_mov_b32 s9, s73
	s_mov_b32 s21, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_1)
	v_readlane_b32 s14, v71, 15
	v_readlane_b32 s15, v71, 16
	s_mov_b32 s14, s98
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[9:10]
	v_cndmask_b32_e64 v4, 0, 1, vcc_lo
	s_and_b32 s0, vcc_lo, exec_lo
	s_cselect_b32 s0, 0xffffff80, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 8, v4
	v_ldexp_f64 v[9:10], v[9:10], v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[11:12], v[9:10]
	v_cmp_class_f64_e64 vcc_lo, v[9:10], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[13:14], v[9:10], v[11:12]
	v_mul_f64 v[11:12], v[11:12], 0.5
	v_fma_f64 v[15:16], -v[11:12], v[13:14], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[13:14], v[13:14], v[15:16], v[13:14]
	v_fma_f64 v[11:12], v[11:12], v[15:16], v[11:12]
	v_fma_f64 v[15:16], -v[13:14], v[13:14], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[15:16], v[11:12], v[13:14]
	v_fma_f64 v[15:16], -v[13:14], v[13:14], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[15:16], v[11:12], v[13:14]
	v_rcp_f64_e32 v[13:14], v[17:18]
	v_ldexp_f64 v[11:12], v[11:12], s0
	s_mov_b32 s0, 0x95810625
	s_mov_b32 s1, 0x3fe88b43
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[15:16], -v[17:18], v[13:14], 1.0
	v_dual_cndmask_b32 v9, v11, v9 :: v_dual_cndmask_b32 v10, v12, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[13:14], v[13:14], v[15:16], v[13:14]
	v_div_scale_f64 v[15:16], vcc_lo, s[2:3], v[7:8], s[2:3]
	v_fma_f64 v[11:12], -v[17:18], v[13:14], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[13:14], v[11:12], v[13:14]
	v_mul_f64 v[13:14], v[15:16], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[15:16], -v[17:18], v[13:14], v[15:16]
	v_div_scale_f64 v[17:18], null, v[9:10], v[9:10], s[14:15]
	v_div_fmas_f64 v[13:14], v[15:16], v[11:12], v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[11:12], v[17:18]
	v_div_fixup_f64 v[13:14], v[13:14], v[7:8], s[2:3]
	v_cmp_class_f64_e64 s3, v[7:8], 0x204
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[15:16], -v[17:18], v[11:12], 1.0
	v_add_f64 v[13:14], v[13:14], s[0:1]
	s_mov_b32 s1, s15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[11:12], v[15:16], v[11:12]
	v_fma_f64 v[15:16], -v[17:18], v[11:12], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[11:12], v[15:16], v[11:12]
	v_div_scale_f64 v[15:16], vcc_lo, s[14:15], v[9:10], s[14:15]
	v_mul_f64 v[19:20], v[15:16], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[15:16], -v[17:18], v[19:20], v[15:16]
	v_div_fmas_f64 v[11:12], v[15:16], v[11:12], v[19:20]
	v_frexp_mant_f64_e32 v[15:16], v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[9:10], v[11:12], v[9:10], s[14:15]
	v_cmp_gt_f64_e32 vcc_lo, s[22:23], v[15:16]
	s_mov_b32 s14, s86
	s_mov_b32 s15, s23
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_class_f64_e64 s2, v[9:10], 0x204
	v_cndmask_b32_e64 v4, 0, 1, vcc_lo
	v_ldexp_f64 v[15:16], v[15:16], v4
	v_frexp_exp_i32_f64_e32 v4, v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[15:16], 1.0
	v_subrev_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[19:20], v[17:18]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[21:22], -v[17:18], v[19:20], 1.0
	v_fma_f64 v[19:20], v[21:22], v[19:20], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[21:22], -v[17:18], v[19:20], 1.0
	v_fma_f64 v[19:20], v[21:22], v[19:20], v[19:20]
	v_add_f64 v[21:22], v[17:18], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[15:16], -v[21:22]
	v_add_f64 v[15:16], v[15:16], -1.0
	v_mul_f64 v[23:24], v[15:16], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[25:26], v[17:18], v[23:24]
	v_fma_f64 v[17:18], v[23:24], v[17:18], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], v[23:24], v[21:22], v[17:18]
	v_cvt_f64_i32_e32 v[21:22], v4
	v_frexp_exp_i32_f64_e32 v4, v[13:14]
	v_mul_f64 v[27:28], v[21:22], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[29:30], v[21:22], s[8:9], -v[27:28]
	v_fma_f64 v[21:22], v[21:22], s[80:81], v[29:30]
	v_add_f64 v[29:30], v[25:26], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[29:30], -v[25:26]
	v_add_f64 v[17:18], v[25:26], -v[17:18]
	v_add_f64 v[25:26], v[15:16], -v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[15:16], v[15:16], -v[25:26]
	v_add_f64 v[15:16], v[15:16], -v[29:30]
	v_add_f64 v[29:30], v[27:28], v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[15:16], v[17:18], v[15:16]
	v_frexp_mant_f64_e32 v[17:18], v[13:14]
	v_add_f64 v[27:28], v[29:30], -v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[15:16], v[25:26], v[15:16]
	v_cmp_gt_f64_e32 vcc_lo, s[22:23], v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[21:22], v[21:22], -v[27:28]
	v_mul_f64 v[15:16], v[19:20], v[15:16]
	v_subrev_co_ci_u32_e64 v4, s0, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_writelane_b32 v71, s0, 15
	v_cvt_f64_i32_e32 v[27:28], v4
	v_cndmask_b32_e64 v4, 0, 1, vcc_lo
	v_writelane_b32 v71, s1, 16
	v_cmp_neq_f64_e64 s1, 0, v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[17:18], v[17:18], v4
	v_frexp_exp_i32_f64_e32 v4, v[9:10]
	v_mul_f64 v[31:32], v[27:28], s[8:9]
	v_add_f64 v[25:26], v[17:18], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[33:34], v[27:28], s[8:9], -v[31:32]
	v_add_f64 v[11:12], v[25:26], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[27:28], v[27:28], s[80:81], v[33:34]
	v_rcp_f64_e32 v[33:34], v[25:26]
	v_add_f64 v[11:12], v[17:18], -v[11:12]
	v_add_f64 v[17:18], v[17:18], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[31:32], v[27:28]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[35:36], -v[25:26], v[33:34], 1.0
	v_add_f64 v[31:32], v[19:20], -v[31:32]
	v_fma_f64 v[33:34], v[35:36], v[33:34], v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[27:28], -v[31:32]
	v_fma_f64 v[31:32], -v[25:26], v[33:34], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[31:32], v[31:32], v[33:34], v[33:34]
	v_mul_f64 v[33:34], v[17:18], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[35:36], v[25:26], v[33:34]
	v_fma_f64 v[25:26], v[33:34], v[25:26], -v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[33:34], v[11:12], v[25:26]
	v_add_f64 v[25:26], v[23:24], v[15:16]
	v_add_f64 v[23:24], v[25:26], -v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[15:16], v[15:16], -v[23:24]
	v_add_f64 v[23:24], v[35:36], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[15:16], v[15:16], 1
	v_add_f64 v[35:36], v[23:24], -v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[35:36], -v[11:12]
	v_add_f64 v[35:36], v[17:18], -v[23:24]
	v_add_f64 v[17:18], v[17:18], -v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], -v[23:24]
	v_frexp_mant_f64_e32 v[23:24], v[9:10]
	v_add_f64 v[11:12], v[11:12], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[22:23], v[23:24]
	v_add_f64 v[11:12], v[35:36], v[11:12]
	v_subrev_co_ci_u32_e64 v4, s0, 0, v4, vcc_lo
	v_mul_f64 v[35:36], v[25:26], v[25:26]
	v_cmp_nge_f64_e64 s0, 0, v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[37:38], v4
	v_cndmask_b32_e64 v4, 0, 1, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[13:14], 0x204
	v_ldexp_f64 v[17:18], v[23:24], v4
	v_mul_f64 v[11:12], v[31:32], v[11:12]
	v_mul_f64 v[39:40], v[37:38], s[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[17:18], 1.0
	v_fma_f64 v[41:42], v[37:38], s[8:9], -v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[37:38], v[37:38], s[80:81], v[41:42]
	v_rcp_f64_e32 v[41:42], v[23:24]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[43:44], -v[23:24], v[41:42], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[43:44], v[41:42], v[41:42]
	v_fma_f64 v[43:44], v[35:36], s[26:27], s[16:17]
	v_fma_f64 v[31:32], -v[23:24], v[41:42], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[43:44], v[35:36], v[43:44], s[42:43]
	v_fma_f64 v[31:32], v[31:32], v[41:42], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[43:44], v[35:36], v[43:44], s[60:61]
	v_fma_f64 v[43:44], v[35:36], v[43:44], s[102:103]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[43:44], v[35:36], v[43:44], s[10:11]
	v_fma_f64 v[43:44], v[35:36], v[43:44], s[14:15]
	v_mul_f64 v[35:36], v[25:26], v[35:36]
	v_ldexp_f64 v[25:26], v[25:26], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[35:36], v[35:36], v[43:44]
	v_add_f64 v[41:42], v[25:26], v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[41:42], -v[25:26]
	v_add_f64 v[25:26], v[35:36], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[15:16], v[15:16], v[25:26]
	v_add_f64 v[25:26], v[23:24], -1.0
	v_add_f64 v[25:26], v[17:18], -v[25:26]
	v_add_f64 v[17:18], v[17:18], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[35:36], v[17:18], v[31:32]
	v_mul_f64 v[43:44], v[23:24], v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[23:24], v[35:36], v[23:24], -v[43:44]
	v_fma_f64 v[23:24], v[35:36], v[25:26], v[23:24]
	v_add_f64 v[25:26], v[33:34], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[33:34], v[25:26], -v[33:34]
	v_add_f64 v[11:12], v[11:12], -v[33:34]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[33:34], v[43:44], v[23:24]
	v_ldexp_f64 v[11:12], v[11:12], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[33:34], -v[43:44]
	v_add_f64 v[23:24], v[43:44], -v[23:24]
	v_add_f64 v[43:44], v[17:18], -v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[17:18], -v[43:44]
	v_add_f64 v[17:18], v[17:18], -v[33:34]
	v_add_f64 v[33:34], v[41:42], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[23:24], v[17:18]
	v_add_f64 v[45:46], v[29:30], v[33:34]
	v_add_f64 v[41:42], v[33:34], -v[41:42]
	v_mul_f64 v[23:24], v[25:26], v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[17:18], v[43:44], v[17:18]
	v_add_f64 v[47:48], v[45:46], -v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[15:16], v[15:16], -v[41:42]
	v_mul_f64 v[17:18], v[31:32], v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[33:34], v[33:34], -v[47:48]
	v_add_f64 v[47:48], v[45:46], -v[47:48]
	v_add_f64 v[29:30], v[29:30], -v[47:48]
	v_fma_f64 v[47:48], v[23:24], s[26:27], s[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[29:30], v[33:34], v[29:30]
	v_fma_f64 v[47:48], v[23:24], v[47:48], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[47:48], v[23:24], v[47:48], s[60:61]
	v_fma_f64 v[47:48], v[23:24], v[47:48], s[102:103]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[47:48], v[23:24], v[47:48], s[10:11]
	v_fma_f64 v[47:48], v[23:24], v[47:48], s[14:15]
	v_mul_f64 v[23:24], v[25:26], v[23:24]
	v_ldexp_f64 v[25:26], v[25:26], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[23:24], v[23:24], v[47:48]
	v_add_f64 v[43:44], v[25:26], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[43:44], -v[25:26]
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[23:24]
	v_add_f64 v[23:24], v[39:40], v[37:38]
	v_add_f64 v[31:32], v[43:44], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[23:24], -v[39:40]
	v_add_f64 v[33:34], v[31:32], -v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[37:38], -v[25:26]
	v_add_f64 v[11:12], v[11:12], -v[33:34]
	v_add_f64 v[33:34], v[19:20], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[37:38], v[33:34], -v[19:20]
	v_add_f64 v[31:32], v[31:32], -v[37:38]
	v_add_f64 v[37:38], v[33:34], -v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[19:20], -v[37:38]
	v_add_f64 v[37:38], v[35:36], v[17:18]
	v_add_f64 v[19:20], v[31:32], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[35:36], v[37:38], -v[35:36]
	v_add_f64 v[31:32], v[27:28], v[11:12]
	v_add_f64 v[17:18], v[17:18], -v[35:36]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[35:36], v[31:32], -v[27:28]
	v_add_f64 v[19:20], v[31:32], v[19:20]
	v_ldexp_f64 v[17:18], v[17:18], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[11:12], -v[35:36]
	v_add_f64 v[35:36], v[31:32], -v[35:36]
	v_add_f64 v[27:28], v[27:28], -v[35:36]
	v_mul_f64 v[35:36], v[37:38], v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[27:28]
	v_fma_f64 v[39:40], v[35:36], s[26:27], s[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[39:40], v[35:36], v[39:40], s[42:43]
	v_fma_f64 v[39:40], v[35:36], v[39:40], s[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[39:40], v[35:36], v[39:40], s[102:103]
	v_fma_f64 v[39:40], v[35:36], v[39:40], s[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[39:40], v[35:36], v[39:40], s[14:15]
	v_mul_f64 v[35:36], v[37:38], v[35:36]
	v_ldexp_f64 v[37:38], v[37:38], 1
	v_mul_f64 v[35:36], v[35:36], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[37:38], v[35:36]
	v_add_f64 v[37:38], v[39:40], -v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[35:36], -v[37:38]
	v_add_f64 v[17:18], v[17:18], v[35:36]
	v_add_f64 v[35:36], v[21:22], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[39:40], v[17:18]
	v_add_f64 v[37:38], v[35:36], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[27:28], -v[39:40]
	v_add_f64 v[15:16], v[15:16], -v[37:38]
	v_add_f64 v[37:38], v[35:36], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[17:18], v[17:18], -v[31:32]
	v_add_f64 v[31:32], v[23:24], v[27:28]
	v_add_f64 v[21:22], v[21:22], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[37:38], v[31:32], -v[23:24]
	v_add_f64 v[15:16], v[15:16], v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[27:28], v[27:28], -v[37:38]
	v_add_f64 v[37:38], v[31:32], -v[37:38]
	v_add_f64 v[23:24], v[23:24], -v[37:38]
	v_add_f64 v[37:38], v[33:34], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[27:28], v[23:24]
	v_add_f64 v[33:34], v[37:38], -v[33:34]
	v_add_f64 v[27:28], v[25:26], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[19:20], -v[33:34]
	v_add_f64 v[23:24], v[27:28], v[23:24]
	v_add_f64 v[33:34], v[27:28], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[11:12], v[19:20]
	v_add_f64 v[19:20], v[31:32], v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_add_f64 v[17:18], v[17:18], -v[33:34]
	v_add_f64 v[33:34], v[27:28], -v[33:34]
	v_add_f64 v[27:28], v[35:36], v[29:30]
	v_add_f64 v[11:12], v[37:38], v[11:12]
	v_add_f64 v[21:22], v[19:20], -v[31:32]
	v_add_f64 v[25:26], v[25:26], -v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v4, v11, v13, vcc_lo
	v_add_f64 v[21:22], v[23:24], -v[21:22]
	v_add_f64 v[23:24], v[45:46], v[27:28]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], v[25:26]
	v_add_f64 v[25:26], v[23:24], -v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[17:18], v[17:18], v[21:22]
	v_cndmask_b32_e32 v21, v12, v14, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[13:14]
	v_add_f64 v[25:26], v[27:28], -v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[13:14], v[19:20], v[17:18]
	v_add_f64 v[11:12], v[15:16], v[25:26]
	v_cndmask_b32_e32 v16, 0x7ff80000, v21, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[9:10]
	v_cndmask_b32_e64 v15, 0, v4, s0
	v_cmp_nge_f64_e64 s0, 0, v[9:10]
	v_cndmask_b32_e64 v4, v14, v10, s2
	v_cndmask_b32_e64 v16, 0xfff00000, v16, s1
	v_cmp_neq_f64_e64 s1, 0, v[9:10]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[15:16], v[15:16], -v[7:8]
	v_add_f64 v[17:18], v[23:24], v[11:12]
	v_cndmask_b32_e64 v11, v13, v9, s2
	v_cndmask_b32_e32 v4, 0x7ff80000, v4, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[7:8]
	v_cmp_neq_f64_e64 s2, 0, v[7:8]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v13, 0, v11, s0
	v_cndmask_b32_e64 v14, 0xfff00000, v4, s1
	v_mul_f64 v[11:12], v[7:8], v[9:10]
	s_mov_b32 s0, s85
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_f64 v[13:14], v[15:16], -v[13:14]
	v_cndmask_b32_e64 v4, v18, v8, s3
	v_cndmask_b32_e64 v15, v17, v7, s3
	s_mov_b32 s3, s104
	v_cndmask_b32_e64 v4, 0x7ff80000, v4, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v15, 0, v15, vcc_lo
	s_mov_b32 s4, s33
	v_cndmask_b32_e64 v16, 0xfff00000, v4, s2
                                        ; implicit-def: $vgpr4
.LBB0_16:                               ; %.backedge.i.i.i.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_lshr_b32 s1, s0, 2
	s_add_i32 s19, s100, 0xb0f8a
	s_xor_b32 s0, s1, s0
	s_lshl_b32 s1, s89, 4
	s_lshl_b32 s2, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, s1, s2
	s_lshr_b32 s2, s84, 2
	s_xor_b32 s1, s1, s89
	s_xor_b32 s2, s2, s84
	s_xor_b32 s84, s1, s0
	s_lshl_b32 s0, s2, 1
	s_lshl_b32 s1, s84, 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s0, s0, s1
	s_xor_b32 s0, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s25, s0, s84
	s_add_i32 s0, s25, s19
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s0, s0, 11
	v_cvt_f64_u32_e32 v[17:18], s0
	s_add_i32 s0, s100, s84
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, 0x587c5
	v_cvt_f64_u32_e32 v[19:20], s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[17:18], v[17:18], 32
	v_add_f64 v[17:18], v[17:18], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], 0x3ca00000, v[17:18], 0x3ca00000
	v_add_f64 v[19:20], -v[17:18], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[21:22], null, v[17:18], v[17:18], v[19:20]
	v_rcp_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[25:26], -v[21:22], v[23:24], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[23:24], v[23:24], v[25:26], v[23:24]
	v_fma_f64 v[25:26], -v[21:22], v[23:24], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[23:24], v[23:24], v[25:26], v[23:24]
	v_div_scale_f64 v[25:26], vcc_lo, v[19:20], v[17:18], v[19:20]
	v_mul_f64 v[27:28], v[25:26], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[21:22], -v[21:22], v[27:28], v[25:26]
	v_div_fmas_f64 v[21:22], v[21:22], v[23:24], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[17:18], v[21:22], v[17:18], v[19:20]
	v_frexp_mant_f64_e32 v[19:20], v[17:18]
	v_cmp_ngt_f64_e64 s0, 0, v[17:18]
	v_cmp_nge_f64_e64 s1, 0, v[17:18]
	v_cmp_neq_f64_e64 s2, 0, v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[22:23], v[19:20]
	v_cndmask_b32_e64 v21, 0, 1, vcc_lo
	v_ldexp_f64 v[19:20], v[19:20], v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[19:20], 1.0
	v_rcp_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[25:26], -v[21:22], v[23:24], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[23:24], v[25:26], v[23:24], v[23:24]
	v_fma_f64 v[25:26], -v[21:22], v[23:24], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[23:24], v[25:26], v[23:24], v[23:24]
	v_add_f64 v[25:26], v[21:22], -1.0
	v_add_f64 v[25:26], v[19:20], -v[25:26]
	v_add_f64 v[19:20], v[19:20], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[27:28], v[19:20], v[23:24]
	v_mul_f64 v[29:30], v[21:22], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[21:22], v[27:28], v[21:22], -v[29:30]
	v_fma_f64 v[21:22], v[27:28], v[25:26], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[29:30], v[21:22]
	v_add_f64 v[29:30], v[25:26], -v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[29:30], -v[21:22]
	v_add_f64 v[29:30], v[19:20], -v[25:26]
	v_add_f64 v[19:20], v[19:20], -v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[19:20], -v[25:26]
	v_add_f64 v[19:20], v[21:22], v[19:20]
	v_frexp_exp_i32_f64_e32 v21, v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[29:30], v[19:20]
	v_subrev_co_ci_u32_e32 v21, vcc_lo, 0, v21, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[17:18], 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_f64_i32_e32 v[21:22], v21
	v_mul_f64 v[19:20], v[23:24], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[23:24], v[21:22], s[8:9]
	v_fma_f64 v[25:26], v[21:22], s[8:9], -v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[21:22], v[21:22], s[80:81], v[25:26]
	v_add_f64 v[25:26], v[27:28], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[27:28], v[25:26], -v[27:28]
	v_add_f64 v[19:20], v[19:20], -v[27:28]
	v_mul_f64 v[27:28], v[25:26], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[19:20], v[19:20], 1
	v_fma_f64 v[29:30], v[27:28], s[26:27], s[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[29:30], v[27:28], v[29:30], s[42:43]
	v_fma_f64 v[29:30], v[27:28], v[29:30], s[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[29:30], v[27:28], v[29:30], s[102:103]
	v_fma_f64 v[29:30], v[27:28], v[29:30], s[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[29:30], v[27:28], v[29:30], s[14:15]
	v_mul_f64 v[27:28], v[25:26], v[27:28]
	v_ldexp_f64 v[25:26], v[25:26], 1
	v_mul_f64 v[27:28], v[27:28], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[29:30], v[25:26], v[27:28]
	v_add_f64 v[25:26], v[29:30], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[27:28], -v[25:26]
	v_add_f64 v[19:20], v[19:20], v[25:26]
	v_add_f64 v[25:26], v[23:24], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[25:26], -v[23:24]
	v_add_f64 v[21:22], v[21:22], -v[23:24]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[29:30], v[19:20]
	v_add_f64 v[27:28], v[23:24], -v[29:30]
	v_add_f64 v[29:30], v[25:26], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[19:20], -v[27:28]
	v_add_f64 v[31:32], v[29:30], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[23:24], -v[31:32]
	v_add_f64 v[31:32], v[29:30], -v[31:32]
	v_add_f64 v[25:26], v[25:26], -v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[23:24], v[25:26]
	v_add_f64 v[25:26], v[21:22], v[19:20]
	v_add_f64 v[27:28], v[25:26], -v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[25:26], v[23:24]
	v_add_f64 v[19:20], v[19:20], -v[27:28]
	v_add_f64 v[27:28], v[25:26], -v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[21:22], -v[27:28]
	v_add_f64 v[19:20], v[19:20], v[21:22]
	v_add_f64 v[21:22], v[29:30], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[21:22], -v[29:30]
	v_add_f64 v[23:24], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[19:20], v[23:24]
	v_add_f64 v[19:20], v[21:22], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v18, v20, v18 :: v_dual_cndmask_b32 v17, v19, v17
	v_cndmask_b32_e64 v18, 0x7ff80000, v18, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v17, 0, v17, s1
	s_mov_b32 s1, 2
	v_cndmask_b32_e64 v18, 0xfff00000, v18, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[11:12], -v[17:18]
	v_div_scale_f64 v[19:20], null, v[9:10], v[9:10], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[21:22], v[19:20]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[23:24], -v[19:20], v[21:22], 1.0
	v_fma_f64 v[21:22], v[21:22], v[23:24], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[23:24], -v[19:20], v[21:22], 1.0
	v_fma_f64 v[21:22], v[21:22], v[23:24], v[21:22]
	v_div_scale_f64 v[23:24], vcc_lo, v[17:18], v[9:10], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[25:26], v[23:24], v[21:22]
	v_fma_f64 v[19:20], -v[19:20], v[25:26], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[19:20], v[19:20], v[21:22], v[25:26]
	v_div_fixup_f64 v[19:20], v[19:20], v[9:10], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[19:20], 0.5
	v_floor_f64_e32 v[17:18], v[17:18]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[17:18]
	s_cbranch_vccnz .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_16 Depth=2
	s_lshr_b32 s0, s4, 2
	s_lshl_b32 s1, s25, 4
	s_xor_b32 s0, s0, s4
	v_fma_f64 v[19:20], -v[9:10], v[19:20], v[11:12]
	s_lshl_b32 s2, s0, 1
	s_mov_b32 s36, 0x3b39803f
	s_xor_b32 s1, s2, s1
	s_lshr_b32 s2, s3, 2
	s_xor_b32 s0, s1, s0
	s_xor_b32 s1, s2, s3
	s_xor_b32 s19, s0, s25
	s_lshl_b32 s0, s1, 1
	s_lshl_b32 s2, s19, 4
	s_mov_b32 s37, 0xbc7abc9e
	s_xor_b32 s0, s0, s2
	s_add_i32 s2, s100, s19
	s_xor_b32 s0, s0, s1
	s_add_i32 s100, s100, 0x161f14
	s_xor_b32 s88, s0, s19
	s_add_i32 s2, s2, 0x10974f
	s_add_i32 s0, s88, s100
	v_cvt_f64_u32_e32 v[23:24], s2
	s_lshr_b32 s0, s0, 11
	s_mov_b32 s2, 0xfefa39ef
	v_cvt_f64_u32_e32 v[21:22], s0
	s_mov_b32 s0, 0x652b82fe
	s_mov_b32 s1, 0x3ff71547
	s_mov_b32 s3, 0xbfe62e42
	s_mov_b32 s68, 0x6a5dcb37
	s_mov_b32 s69, 0x3e5ade15
	s_mov_b32 s76, 0x992b2855
	s_mov_b32 s77, 0xbfc1bcb2
	s_mov_b32 s90, 0x7f8b9c81
	s_mov_b32 s91, 0x402903c2
	s_mov_b32 s92, 0x51a32f5d
	s_mov_b32 s93, 0xc06613ae
	s_mov_b32 s94, 0x61d3b4d8
	s_mov_b32 s95, 0x40881a96
	s_mov_b32 s96, 0x8ed4171b
	s_mov_b32 s97, 0xc093ac8e
	s_mov_b32 s98, 0xb6c30b05
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[19:20]
	s_mov_b32 s99, 0x40852429
	s_mov_b32 s12, 0x8b145769
	s_mov_b32 s13, 0x4005bf0a
	s_mov_b32 s87, s23
	s_mov_b32 s72, s2
	s_mov_b32 s64, s36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[21:22], v[21:22], 32
	v_add_f64 v[21:22], v[21:22], v[23:24]
	v_mul_f64 v[23:24], v[19:20], s[0:1]
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[23:24], v[23:24]
	v_fma_f64 v[25:26], v[23:24], s[2:3], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[25:26], v[23:24], s[36:37], v[25:26]
	v_cvt_i32_f64_e32 v23, v[23:24]
	v_fma_f64 v[27:28], v[25:26], s[68:69], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	s_mov_b32 s68, 0x4e4e324f
	s_mov_b32 s69, 0x3ee4f051
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[27:28], v[25:26], v[27:28], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[27:28], v[25:26], v[27:28], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[27:28], v[25:26], v[27:28], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[27:28], v[25:26], v[27:28], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[27:28], v[25:26], v[27:28], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[27:28], v[25:26], v[27:28], s[20:21]
	v_fma_f64 v[27:28], v[25:26], v[27:28], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[27:28], v[25:26], v[27:28], s[0:1]
	v_cmp_ngt_f64_e64 s0, 0xc090cc00, v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[27:28], v[25:26], v[27:28], 1.0
	s_and_b32 s1, s0, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[25:26], v[27:28], 1.0
	v_ldexp_f64 v[23:24], v[25:26], v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[23:24], 1.0
	v_cndmask_b32_e32 v24, 0x7ff00000, v24, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v25, 0, v23, s1
	v_cndmask_b32_e64 v26, 0x3ff00000, v24, s0
	v_fma_f64 v[23:24], 0x3ca00000, v[21:22], 0x3ca00000
	s_mov_b32 s0, 0x8f3faeef
	s_mov_b32 s1, 0x3e843550
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[25:26], v[25:26], v[25:26]
	v_div_scale_f64 v[21:22], null, v[25:26], v[25:26], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[27:28], v[21:22]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[29:30], -v[21:22], v[27:28], 1.0
	v_fma_f64 v[27:28], v[27:28], v[29:30], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[29:30], -v[21:22], v[27:28], 1.0
	v_fma_f64 v[27:28], v[27:28], v[29:30], v[27:28]
	v_div_scale_f64 v[29:30], vcc_lo, v[23:24], v[25:26], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[31:32], v[29:30], v[27:28]
	v_fma_f64 v[21:22], -v[21:22], v[31:32], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[27:28], v[21:22], v[27:28], v[31:32]
	v_add_f64 v[21:22], v[17:18], 1.0
	v_div_fixup_f64 v[23:24], v[27:28], v[25:26], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[21:22], -1.0
	v_add_f64 v[29:30], 0x40200000, v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[31:32], null, v[29:30], v[29:30], s[0:1]
	v_rcp_f64_e32 v[33:34], v[31:32]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[35:36], -v[31:32], v[33:34], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[33:34], v[33:34], v[35:36], v[33:34]
	v_fma_f64 v[35:36], -v[31:32], v[33:34], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[33:34], v[33:34], v[35:36], v[33:34]
	v_div_scale_f64 v[35:36], vcc_lo, s[0:1], v[29:30], s[0:1]
	v_mul_f64 v[37:38], v[35:36], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[31:32], -v[31:32], v[37:38], v[35:36]
	v_div_fmas_f64 v[31:32], v[31:32], v[33:34], v[37:38]
	v_add_f64 v[33:34], 0x401c0000, v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[25:26], v[31:32], v[29:30], s[0:1]
	v_div_scale_f64 v[35:36], null, v[33:34], v[33:34], s[68:69]
	s_movk_i32 s0, 0xf950
	s_mov_b32 s1, 0x3fefffff
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], 0
	v_rcp_f64_e32 v[37:38], v[35:36]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[39:40], -v[35:36], v[37:38], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[37:38], v[37:38], v[39:40], v[37:38]
	v_fma_f64 v[39:40], -v[35:36], v[37:38], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[37:38], v[37:38], v[39:40], v[37:38]
	v_div_scale_f64 v[39:40], vcc_lo, s[68:69], v[33:34], s[68:69]
	v_mul_f64 v[41:42], v[39:40], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[35:36], -v[35:36], v[41:42], v[39:40]
	v_div_fmas_f64 v[35:36], v[35:36], v[37:38], v[41:42]
	v_add_f64 v[37:38], 0x40180000, v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[27:28], v[35:36], v[33:34], s[68:69]
	v_div_scale_f64 v[39:40], null, v[37:38], v[37:38], s[76:77]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[27:28], v[25:26]
	v_rcp_f64_e32 v[41:42], v[39:40]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[43:44], -v[39:40], v[41:42], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[41:42], v[43:44], v[41:42]
	v_fma_f64 v[43:44], -v[39:40], v[41:42], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[41:42], v[43:44], v[41:42]
	v_div_scale_f64 v[43:44], vcc_lo, s[76:77], v[37:38], s[76:77]
	v_mul_f64 v[45:46], v[43:44], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[39:40], -v[39:40], v[45:46], v[43:44]
	v_div_fmas_f64 v[39:40], v[39:40], v[41:42], v[45:46]
	v_add_f64 v[41:42], 0x40140000, v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[29:30], v[39:40], v[37:38], s[76:77]
	v_div_scale_f64 v[43:44], null, v[41:42], v[41:42], s[90:91]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], v[29:30]
	v_rcp_f64_e32 v[45:46], v[43:44]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[47:48], -v[43:44], v[45:46], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[45:46], v[45:46], v[47:48], v[45:46]
	v_fma_f64 v[47:48], -v[43:44], v[45:46], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[45:46], v[45:46], v[47:48], v[45:46]
	v_div_scale_f64 v[47:48], vcc_lo, s[90:91], v[41:42], s[90:91]
	v_mul_f64 v[49:50], v[47:48], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[43:44], -v[43:44], v[49:50], v[47:48]
	v_div_fmas_f64 v[43:44], v[43:44], v[45:46], v[49:50]
	v_add_f64 v[45:46], v[21:22], 4.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[27:28], v[43:44], v[41:42], s[90:91]
	v_div_scale_f64 v[47:48], null, v[45:46], v[45:46], s[92:93]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[27:28], v[25:26]
	v_rcp_f64_e32 v[49:50], v[47:48]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[51:52], -v[47:48], v[49:50], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], v[49:50], v[51:52], v[49:50]
	v_fma_f64 v[51:52], -v[47:48], v[49:50], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], v[49:50], v[51:52], v[49:50]
	v_div_scale_f64 v[51:52], vcc_lo, s[92:93], v[45:46], s[92:93]
	v_mul_f64 v[53:54], v[51:52], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[47:48], -v[47:48], v[53:54], v[51:52]
	v_div_fmas_f64 v[47:48], v[47:48], v[49:50], v[53:54]
	v_add_f64 v[49:50], 0x40080000, v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[29:30], v[47:48], v[45:46], s[92:93]
	v_div_scale_f64 v[51:52], null, v[49:50], v[49:50], s[94:95]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], v[29:30]
	v_rcp_f64_e32 v[53:54], v[51:52]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[55:56], -v[51:52], v[53:54], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[53:54], v[53:54], v[55:56], v[53:54]
	v_fma_f64 v[55:56], -v[51:52], v[53:54], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[53:54], v[53:54], v[55:56], v[53:54]
	v_div_scale_f64 v[55:56], vcc_lo, s[94:95], v[49:50], s[94:95]
	v_mul_f64 v[57:58], v[55:56], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], -v[51:52], v[57:58], v[55:56]
	v_div_fmas_f64 v[51:52], v[51:52], v[53:54], v[57:58]
	v_add_f64 v[53:54], v[21:22], 2.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[27:28], v[51:52], v[49:50], s[94:95]
	v_div_scale_f64 v[55:56], null, v[53:54], v[53:54], s[96:97]
	s_mov_b32 s94, 0xfefa39ef
	s_mov_b32 s95, 0xbfe62e42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[27:28], v[25:26]
	v_rcp_f64_e32 v[57:58], v[55:56]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[59:60], -v[55:56], v[57:58], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[57:58], v[57:58], v[59:60], v[57:58]
	v_fma_f64 v[59:60], -v[55:56], v[57:58], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[57:58], v[57:58], v[59:60], v[57:58]
	v_div_scale_f64 v[59:60], vcc_lo, s[96:97], v[53:54], s[96:97]
	v_mul_f64 v[61:62], v[59:60], v[57:58]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[55:56], -v[55:56], v[61:62], v[59:60]
	v_div_fmas_f64 v[55:56], v[55:56], v[57:58], v[61:62]
	v_add_f64 v[57:58], v[21:22], 1.0
	v_add_f64 v[21:22], v[21:22], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[29:30], v[55:56], v[53:54], s[96:97]
	v_div_scale_f64 v[59:60], null, v[57:58], v[57:58], s[98:99]
	s_mov_b32 s96, 0x3b39803f
	s_mov_b32 s97, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[27:28], v[29:30]
	v_rcp_f64_e32 v[61:62], v[59:60]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[63:64], -v[59:60], v[61:62], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[61:62], v[61:62], v[63:64], v[61:62]
	v_fma_f64 v[63:64], -v[59:60], v[61:62], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[61:62], v[61:62], v[63:64], v[61:62]
	v_div_scale_f64 v[63:64], vcc_lo, s[98:99], v[57:58], s[98:99]
	v_mul_f64 v[65:66], v[63:64], v[61:62]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[59:60], -v[59:60], v[65:66], v[63:64]
	v_div_fmas_f64 v[59:60], v[59:60], v[61:62], v[65:66]
	v_add_f64 v[61:62], v[33:34], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[31:32], v[59:60], v[57:58], s[98:99]
	v_div_scale_f64 v[63:64], null, s[12:13], s[12:13], v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[31:32], v[27:28]
	v_rcp_f64_e32 v[65:66], v[63:64]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[27:28], v[27:28], s[0:1]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[67:68], -v[63:64], v[65:66], 1.0
	v_cmp_class_f64_e64 s2, v[27:28], 0x204
	v_cmp_nge_f64_e64 s3, 0, v[27:28]
	v_cmp_neq_f64_e64 s4, 0, v[27:28]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[65:66], v[65:66], v[67:68], v[65:66]
	v_fma_f64 v[67:68], -v[63:64], v[65:66], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[65:66], v[65:66], v[67:68], v[65:66]
	v_div_scale_f64 v[67:68], vcc_lo, v[61:62], s[12:13], v[61:62]
	v_mul_f64 v[69:70], v[67:68], v[65:66]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[63:64], -v[63:64], v[69:70], v[67:68]
	v_div_fmas_f64 v[63:64], v[63:64], v[65:66], v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[25:26], v[63:64], s[12:13], v[61:62]
	v_frexp_mant_f64_e32 v[29:30], v[25:26]
	v_cmp_neq_f64_e64 s1, 0, v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[22:23], v[29:30]
	v_cndmask_b32_e64 v33, 0, 1, vcc_lo
	v_ldexp_f64 v[29:30], v[29:30], v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[33:34], v[29:30], 1.0
	v_rcp_f64_e32 v[35:36], v[33:34]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[37:38], -v[33:34], v[35:36], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[35:36], v[37:38], v[35:36], v[35:36]
	v_fma_f64 v[31:32], -v[33:34], v[35:36], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[31:32], v[31:32], v[35:36], v[35:36]
	v_add_f64 v[35:36], v[33:34], -1.0
	v_add_f64 v[35:36], v[29:30], -v[35:36]
	v_add_f64 v[29:30], v[29:30], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[37:38], v[29:30], v[31:32]
	v_mul_f64 v[39:40], v[33:34], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[33:34], v[37:38], v[33:34], -v[39:40]
	v_fma_f64 v[33:34], v[37:38], v[35:36], v[33:34]
	v_frexp_mant_f64_e32 v[35:36], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s0, s[22:23], v[35:36]
	v_cndmask_b32_e64 v41, 0, 1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[35:36], v[35:36], v41
	v_add_f64 v[41:42], v[35:36], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[43:44], v[41:42]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[45:46], -v[41:42], v[43:44], 1.0
	v_fma_f64 v[43:44], v[45:46], v[43:44], v[43:44]
	v_add_f64 v[45:46], v[39:40], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[45:46], -v[39:40]
	v_add_f64 v[33:34], v[39:40], -v[33:34]
	v_add_f64 v[39:40], v[29:30], -v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[29:30], v[29:30], -v[39:40]
	v_add_f64 v[29:30], v[29:30], -v[45:46]
	v_fma_f64 v[45:46], -v[41:42], v[43:44], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[33:34], v[29:30]
	v_add_f64 v[33:34], v[41:42], -1.0
	v_fma_f64 v[43:44], v[45:46], v[43:44], v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[39:40], v[29:30]
	v_add_f64 v[33:34], v[35:36], -v[33:34]
	v_add_f64 v[35:36], v[35:36], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[29:30], v[31:32], v[29:30]
	v_mul_f64 v[45:46], v[35:36], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[47:48], v[41:42], v[45:46]
	v_fma_f64 v[41:42], v[45:46], v[41:42], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[33:34], v[45:46], v[33:34], v[41:42]
	v_frexp_exp_i32_f64_e32 v41, v[25:26]
	v_add_f64 v[39:40], v[47:48], v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e32 v41, vcc_lo, 0, v41, vcc_lo
	v_cvt_f64_i32_e32 v[41:42], v41
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[47:48], v[39:40], -v[47:48]
	v_mul_f64 v[49:50], v[41:42], s[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[33:34], v[47:48], -v[33:34]
	v_add_f64 v[47:48], v[35:36], -v[39:40]
	v_fma_f64 v[51:52], v[41:42], s[72:73], -v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[35:36], v[35:36], -v[47:48]
	v_fma_f64 v[41:42], v[41:42], s[64:65], v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[35:36], v[35:36], -v[39:40]
	v_add_f64 v[39:40], v[49:50], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[33:34], v[35:36]
	v_frexp_exp_i32_f64_e32 v33, v[27:28]
	v_add_f64 v[49:50], v[39:40], -v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[31:32], v[47:48], v[31:32]
	v_add_f64 v[47:48], v[37:38], v[29:30]
	v_subrev_co_ci_u32_e64 v33, vcc_lo, 0, v33, s0
	v_cmp_class_f64_e64 vcc_lo, v[25:26], 0x204
	v_add_f64 v[41:42], v[41:42], -v[49:50]
	v_cmp_nge_f64_e64 s0, 0, v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[33:34], v33
	v_mul_f64 v[31:32], v[43:44], v[31:32]
	v_add_f64 v[37:38], v[47:48], -v[37:38]
	v_mul_f64 v[35:36], v[33:34], s[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[29:30], -v[37:38]
	v_mul_f64 v[37:38], v[47:48], v[47:48]
	v_fma_f64 v[49:50], v[33:34], s[72:73], -v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[29:30], v[29:30], 1
	v_fma_f64 v[43:44], v[37:38], s[26:27], s[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[33:34], v[33:34], s[64:65], v[49:50]
	v_fma_f64 v[43:44], v[37:38], v[43:44], s[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[43:44], v[37:38], v[43:44], s[60:61]
	v_fma_f64 v[43:44], v[37:38], v[43:44], s[102:103]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[43:44], v[37:38], v[43:44], s[10:11]
	v_fma_f64 v[43:44], v[37:38], v[43:44], s[86:87]
	v_mul_f64 v[37:38], v[47:48], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[37:38], v[37:38], v[43:44]
	v_ldexp_f64 v[43:44], v[47:48], 1
	v_add_f64 v[47:48], v[43:44], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[47:48], -v[43:44]
	v_add_f64 v[37:38], v[37:38], -v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[29:30], v[29:30], v[37:38]
	v_add_f64 v[37:38], v[45:46], v[31:32]
	v_add_f64 v[43:44], v[37:38], -v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[31:32], v[31:32], -v[43:44]
	v_add_f64 v[43:44], v[47:48], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[31:32], v[31:32], 1
	v_add_f64 v[45:46], v[43:44], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[29:30], v[29:30], -v[45:46]
	v_add_f64 v[45:46], v[39:40], v[43:44]
	v_add_f64 v[47:48], v[45:46], -v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[43:44], -v[47:48]
	v_add_f64 v[47:48], v[45:46], -v[47:48]
	v_add_f64 v[39:40], v[39:40], -v[47:48]
	v_mul_f64 v[47:48], v[37:38], v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[43:44], v[39:40]
	v_fma_f64 v[49:50], v[47:48], s[26:27], s[16:17]
	v_add_f64 v[43:44], v[41:42], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], v[47:48], v[49:50], s[42:43]
	v_fma_f64 v[49:50], v[47:48], v[49:50], s[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], v[47:48], v[49:50], s[102:103]
	v_fma_f64 v[49:50], v[47:48], v[49:50], s[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[47:48], v[49:50], s[86:87]
	v_mul_f64 v[47:48], v[37:38], v[47:48]
	v_ldexp_f64 v[37:38], v[37:38], 1
	v_mul_f64 v[47:48], v[47:48], v[49:50]
	v_add_f64 v[49:50], v[43:44], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[29:30], v[29:30], -v[49:50]
	v_add_f64 v[49:50], v[43:44], -v[49:50]
	v_add_f64 v[41:42], v[41:42], -v[49:50]
	v_add_f64 v[49:50], v[37:38], v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[29:30], v[29:30], v[41:42]
	v_add_f64 v[37:38], v[49:50], -v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[37:38], v[47:48], -v[37:38]
	v_add_f64 v[31:32], v[31:32], v[37:38]
	v_add_f64 v[37:38], v[35:36], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[37:38], -v[35:36]
	v_add_f64 v[33:34], v[33:34], -v[35:36]
	v_add_f64 v[35:36], v[43:44], v[39:40]
	v_add_f64 v[39:40], v[49:50], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[39:40], -v[49:50]
	v_add_f64 v[31:32], v[31:32], -v[41:42]
	v_add_f64 v[41:42], v[37:38], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[41:42], -v[37:38]
	v_add_f64 v[39:40], v[39:40], -v[43:44]
	v_add_f64 v[43:44], v[41:42], -v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[37:38], v[37:38], -v[43:44]
	v_add_f64 v[43:44], v[45:46], v[35:36]
	v_add_f64 v[37:38], v[39:40], v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[43:44], -v[45:46]
	v_add_f64 v[39:40], v[33:34], v[31:32]
	v_add_f64 v[35:36], v[35:36], -v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[39:40], -v[33:34]
	v_add_f64 v[37:38], v[39:40], v[37:38]
	v_add_f64 v[29:30], v[29:30], v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[31:32], -v[45:46]
	v_add_f64 v[45:46], v[39:40], -v[45:46]
	v_add_f64 v[29:30], v[43:44], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[33:34], v[33:34], -v[45:46]
	v_dual_cndmask_b32 v29, v29, v25 :: v_dual_cndmask_b32 v30, v30, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[31:32], v[33:34]
	v_add_f64 v[33:34], v[41:42], v[37:38]
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[25:26]
	v_add_f64 v[35:36], v[33:34], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[37:38], -v[35:36]
	v_add_f64 v[31:32], v[31:32], v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[33:34], v[31:32]
	v_cndmask_b32_e64 v26, v26, v28, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v25, v25, v27, s2
	v_cmp_ngt_f64_e64 s2, 0, v[27:28]
	v_cndmask_b32_e32 v28, 0x7ff80000, v30, vcc_lo
	v_cndmask_b32_e64 v27, 0, v29, s0
	v_cndmask_b32_e64 v28, 0xfff00000, v28, s1
	s_mov_b32 s0, 0xc864beb5
	s_mov_b32 s1, 0x3fed67f1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[25:26], s[0:1]
	v_cmp_nge_f64_e64 s0, 0, v[23:24]
	v_cmp_neq_f64_e64 s1, 0, v[23:24]
	v_add_f64 v[25:26], 0xc01c0000, v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v26, 0x7ff80000, v26, s2
	v_cndmask_b32_e64 v25, 0, v25, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v26, 0xfff00000, v26, s4
	v_fma_f64 v[21:22], v[21:22], v[27:28], v[25:26]
	v_frexp_mant_f64_e32 v[25:26], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[22:23], v[25:26]
	v_cndmask_b32_e64 v27, 0, 1, vcc_lo
	v_ldexp_f64 v[25:26], v[25:26], v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[27:28], v[25:26], 1.0
	v_rcp_f64_e32 v[29:30], v[27:28]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[31:32], -v[27:28], v[29:30], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[29:30], v[31:32], v[29:30], v[29:30]
	v_fma_f64 v[31:32], -v[27:28], v[29:30], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[29:30], v[31:32], v[29:30], v[29:30]
	v_add_f64 v[31:32], v[27:28], -1.0
	v_add_f64 v[31:32], v[25:26], -v[31:32]
	v_add_f64 v[25:26], v[25:26], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[33:34], v[25:26], v[29:30]
	v_mul_f64 v[35:36], v[27:28], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[27:28], v[33:34], v[27:28], -v[35:36]
	v_fma_f64 v[27:28], v[33:34], v[31:32], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[35:36], v[27:28]
	v_add_f64 v[35:36], v[31:32], -v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[27:28], v[35:36], -v[27:28]
	v_add_f64 v[35:36], v[25:26], -v[31:32]
	v_add_f64 v[25:26], v[25:26], -v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[25:26], -v[31:32]
	v_add_f64 v[25:26], v[27:28], v[25:26]
	v_frexp_exp_i32_f64_e32 v27, v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[35:36], v[25:26]
	v_subrev_co_ci_u32_e32 v27, vcc_lo, 0, v27, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[23:24], 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_f64_i32_e32 v[27:28], v27
	v_mul_f64 v[25:26], v[29:30], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[29:30], v[27:28], s[72:73]
	v_fma_f64 v[31:32], v[27:28], s[72:73], -v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[27:28], v[27:28], s[64:65], v[31:32]
	v_add_f64 v[31:32], v[33:34], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[33:34], v[31:32], -v[33:34]
	v_add_f64 v[25:26], v[25:26], -v[33:34]
	v_mul_f64 v[33:34], v[31:32], v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[25:26], v[25:26], 1
	v_fma_f64 v[35:36], v[33:34], s[26:27], s[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[35:36], v[33:34], v[35:36], s[42:43]
	v_fma_f64 v[35:36], v[33:34], v[35:36], s[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[35:36], v[33:34], v[35:36], s[102:103]
	v_fma_f64 v[35:36], v[33:34], v[35:36], s[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[35:36], v[33:34], v[35:36], s[86:87]
	v_mul_f64 v[33:34], v[31:32], v[33:34]
	v_ldexp_f64 v[31:32], v[31:32], 1
	v_mul_f64 v[33:34], v[33:34], v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[31:32], v[33:34]
	v_add_f64 v[31:32], v[35:36], -v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[33:34], -v[31:32]
	v_add_f64 v[25:26], v[25:26], v[31:32]
	v_add_f64 v[31:32], v[29:30], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[29:30], v[31:32], -v[29:30]
	v_add_f64 v[27:28], v[27:28], -v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[29:30], v[35:36], v[25:26]
	v_add_f64 v[33:34], v[29:30], -v[35:36]
	v_add_f64 v[35:36], v[31:32], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], -v[33:34]
	v_add_f64 v[37:38], v[35:36], -v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[29:30], v[29:30], -v[37:38]
	v_add_f64 v[37:38], v[35:36], -v[37:38]
	v_add_f64 v[31:32], v[31:32], -v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[29:30], v[29:30], v[31:32]
	v_add_f64 v[31:32], v[27:28], v[25:26]
	v_add_f64 v[33:34], v[31:32], -v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[29:30], v[31:32], v[29:30]
	v_add_f64 v[25:26], v[25:26], -v[33:34]
	v_add_f64 v[33:34], v[31:32], -v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[27:28], v[27:28], -v[33:34]
	v_add_f64 v[25:26], v[25:26], v[27:28]
	v_add_f64 v[27:28], v[35:36], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[27:28], -v[35:36]
	v_add_f64 v[29:30], v[29:30], -v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[25:26], v[29:30]
	v_add_f64 v[25:26], v[27:28], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v25, v25, v23 :: v_dual_cndmask_b32 v26, v26, v24
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[23:24]
	v_cndmask_b32_e64 v23, 0, v25, s0
	s_mov_b32 s0, s89
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v24, 0x7ff80000, v26, vcc_lo
	v_cndmask_b32_e64 v24, 0xfff00000, v24, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[19:20], v[23:24]
	v_fma_f64 v[23:24], v[15:16], v[17:18], v[13:14]
	v_cvt_u32_f64_e32 v17, v[17:18]
	v_add_f64 v[21:22], v[23:24], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_le_f64_e32 vcc_lo, v[19:20], v[21:22]
	v_cndmask_b32_e64 v18, 0, 1, vcc_lo
	v_cndmask_b32_e32 v4, v4, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_readfirstlane_b32 s1, v18
	s_branch .LBB0_19
.LBB0_18:                               ;   in Loop: Header=BB0_16 Depth=2
	s_mov_b32 s100, s19
	s_mov_b32 s88, s25
	s_mov_b32 s19, s84
	s_mov_b32 s25, s89
	s_mov_b32 s84, s3
	s_mov_b32 s0, s4
.LBB0_19:                               ; %NodeBlock
                                        ;   in Loop: Header=BB0_16 Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_gt_i32 s1, 1
	s_cbranch_scc1 .LBB0_21
; %bb.20:                               ; %LeafBlock
                                        ;   in Loop: Header=BB0_16 Depth=2
	s_cmp_lg_u32 s1, 0
	s_cbranch_scc1 .LBB0_24
.LBB0_21:                               ;   in Loop: Header=BB0_16 Depth=2
	s_mov_b32 s89, s88
	s_mov_b32 s3, s19
	s_mov_b32 s4, s25
	s_branch .LBB0_16
.LBB0_22:                               ;   in Loop: Header=BB0_3 Depth=1
	s_mov_b32 s20, 0x555502a1
	s_mov_b32 s2, -1
	s_mov_b32 s21, 0x3fa55555
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $sgpr100
                                        ; implicit-def: $sgpr88
                                        ; implicit-def: $sgpr1
                                        ; implicit-def: $sgpr19
                                        ; implicit-def: $vgpr9_vgpr10
                                        ; implicit-def: $sgpr0
                                        ; implicit-def: $sgpr84
                                        ; implicit-def: $sgpr25
	s_branch .LBB0_33
.LBB0_23:                               ;   in Loop: Header=BB0_3 Depth=1
	s_mov_b32 s20, 0x555502a1
	s_mov_b32 s1, -1
	s_mov_b32 s21, 0x3fa55555
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $sgpr100
                                        ; implicit-def: $sgpr88
                                        ; implicit-def: $sgpr19
                                        ; implicit-def: $sgpr0
                                        ; implicit-def: $sgpr84
                                        ; implicit-def: $sgpr25
	s_branch .LBB0_25
.LBB0_24:                               ; %_Z15hiprand_poissonI12hiprandStateEjPT_d.exit.loopexit190
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_readlane_b32 s8, v71, 27
	s_mov_b32 s98, 0x54442d18
	s_mov_b32 s1, 0
	v_readlane_b32 s9, v71, 28
	s_mov_b32 s99, 0xbff921fb
	v_readlane_b32 s13, v71, 26
.LBB0_25:                               ; %Flow221
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_and_b32 vcc_lo, exec_lo, s1
	v_dual_mov_b32 v10, v6 :: v_dual_mov_b32 v9, v5
	v_readlane_b32 s1, v71, 17
	s_cbranch_vccz .LBB0_32
; %bb.26:                               ;   in Loop: Header=BB0_3 Depth=1
	v_readlane_b32 s0, v71, 17
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s0, 0
	s_cbranch_scc0 .LBB0_28
; %bb.27:                               ;   in Loop: Header=BB0_3 Depth=1
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr11_vgpr12
                                        ; implicit-def: $sgpr1
                                        ; implicit-def: $sgpr100
	s_branch .LBB0_29
.LBB0_28:                               ;   in Loop: Header=BB0_3 Depth=1
	v_cvt_f32_f64_e32 v4, v[5:6]
	v_readlane_b32 s100, v71, 25
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_cvt_f64_f32_e32 v[11:12], v4
.LBB0_29:                               ; %Flow
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_dual_mov_b32 v10, v6 :: v_dual_mov_b32 v9, v5
	s_mov_b32 s25, s33
	s_mov_b32 s84, s24
	s_mov_b32 s0, s85
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_mov_b32 s19, s104
	s_mov_b32 s88, s5
	s_cbranch_vccnz .LBB0_31
; %bb.30:                               ;   in Loop: Header=BB0_3 Depth=1
	s_lshr_b32 s0, s85, 2
	s_lshl_b32 s1, s5, 4
	s_xor_b32 s0, s0, s85
	v_readlane_b32 s12, v71, 20
	s_lshl_b32 s2, s0, 1
	s_mov_b32 s72, s94
	s_xor_b32 s1, s2, s1
	s_lshr_b32 s2, s24, 2
	s_xor_b32 s0, s1, s0
	s_xor_b32 s1, s2, s24
	s_xor_b32 s84, s0, s5
	s_lshl_b32 s0, s1, 1
	s_lshl_b32 s2, s84, 4
	s_add_i32 s4, s12, s84
	s_xor_b32 s0, s0, s2
	v_readlane_b32 s2, v71, 3
	s_xor_b32 s0, s0, s1
	v_readlane_b32 s3, v71, 4
	s_xor_b32 s25, s0, s84
	s_mov_b32 s64, s96
	s_add_i32 s0, s12, s25
	s_mov_b32 s8, s2
	s_mov_b32 s1, s2
	s_mov_b32 s3, s2
	s_add_i32 s2, s0, 0x10974f
	s_add_i32 s0, s4, 0xb0f8a
	s_lshl_b64 s[2:3], s[2:3], 21
	s_mov_b32 s87, s23
	s_xor_b64 s[0:1], s[2:3], s[0:1]
	s_lshl_b32 s2, s25, 4
	v_cvt_f64_u32_e32 v[9:10], s1
	v_cvt_f64_u32_e32 v[11:12], s0
	s_add_i32 s100, s12, 0x1ba6d9
	s_mov_b32 s3, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[9:10], v[9:10], 32
	v_add_f64 v[9:10], v[9:10], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], 0x3ca00000, v[9:10], 0x3ca00000
	v_frexp_mant_f64_e32 v[11:12], v[9:10]
	v_cmp_nge_f64_e64 s0, 0, v[9:10]
	v_cmp_neq_f64_e64 s1, 0, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[22:23], v[11:12]
	v_cndmask_b32_e64 v4, 0, 1, vcc_lo
	v_ldexp_f64 v[11:12], v[11:12], v4
	v_frexp_exp_i32_f64_e32 v4, v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[13:14], v[11:12], 1.0
	v_subrev_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[15:16], v[13:14]
	v_add_f64 v[19:20], v[13:14], -1.0
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[17:18], -v[13:14], v[15:16], 1.0
	v_fma_f64 v[15:16], v[17:18], v[15:16], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], -v[13:14], v[15:16], 1.0
	v_fma_f64 v[15:16], v[17:18], v[15:16], v[15:16]
	v_add_f64 v[17:18], v[11:12], -1.0
	v_add_f64 v[11:12], v[11:12], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[19:20], v[17:18], v[15:16]
	v_mul_f64 v[21:22], v[13:14], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[19:20], v[13:14], -v[21:22]
	v_fma_f64 v[11:12], v[19:20], v[11:12], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[13:14], v[21:22], v[11:12]
	v_add_f64 v[21:22], v[13:14], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[21:22], -v[11:12]
	v_add_f64 v[21:22], v[17:18], -v[13:14]
	v_add_f64 v[17:18], v[17:18], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[13:14], v[17:18], -v[13:14]
	v_add_f64 v[11:12], v[11:12], v[13:14]
	v_cvt_f64_i32_e32 v[13:14], v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[21:22], v[11:12]
	v_mul_f64 v[17:18], v[13:14], s[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[11:12], v[15:16], v[11:12]
	v_fma_f64 v[15:16], v[13:14], s[72:73], -v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[13:14], s[64:65], v[15:16]
	v_add_f64 v[15:16], v[19:20], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[15:16], -v[19:20]
	v_add_f64 v[11:12], v[11:12], -v[19:20]
	v_mul_f64 v[19:20], v[15:16], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[11:12], v[11:12], 1
	v_fma_f64 v[21:22], v[19:20], s[26:27], s[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[21:22], v[19:20], v[21:22], s[42:43]
	v_fma_f64 v[21:22], v[19:20], v[21:22], s[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[21:22], v[19:20], v[21:22], s[102:103]
	v_fma_f64 v[21:22], v[19:20], v[21:22], s[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[21:22], v[19:20], v[21:22], s[86:87]
	v_mul_f64 v[19:20], v[15:16], v[19:20]
	v_ldexp_f64 v[15:16], v[15:16], 1
	v_mul_f64 v[19:20], v[19:20], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[15:16], v[19:20]
	v_add_f64 v[15:16], v[21:22], -v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[15:16], v[19:20], -v[15:16]
	v_add_f64 v[11:12], v[11:12], v[15:16]
	v_add_f64 v[15:16], v[17:18], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[15:16], -v[17:18]
	v_add_f64 v[13:14], v[13:14], -v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[21:22], v[11:12]
	v_add_f64 v[19:20], v[17:18], -v[21:22]
	v_add_f64 v[21:22], v[15:16], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], -v[19:20]
	v_add_f64 v[23:24], v[21:22], -v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[17:18], -v[23:24]
	v_add_f64 v[23:24], v[21:22], -v[23:24]
	v_add_f64 v[15:16], v[15:16], -v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[15:16], v[17:18], v[15:16]
	v_add_f64 v[17:18], v[13:14], v[11:12]
	v_add_f64 v[19:20], v[17:18], -v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[17:18], v[15:16]
	v_add_f64 v[17:18], v[17:18], -v[19:20]
	v_add_f64 v[11:12], v[11:12], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[13:14], v[13:14], -v[17:18]
	v_add_f64 v[17:18], v[21:22], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[13:14]
	v_add_f64 v[19:20], v[17:18], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[13:14], v[15:16], -v[19:20]
	v_add_f64 v[11:12], v[11:12], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[17:18], v[11:12]
	v_dual_cndmask_b32 v12, v12, v10 :: v_dual_cndmask_b32 v11, v11, v9
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[11:12], v[11:12], -2.0
	v_cndmask_b32_e32 v4, 0x7ff80000, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v9, 0, v11, s0
	s_lshr_b32 s0, s33, 2
	s_xor_b32 s0, s0, s33
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v10, 0x7ff00000, v4, s1
	s_lshl_b32 s1, s0, 1
	s_xor_b32 s1, s1, s2
	s_lshr_b32 s2, s104, 2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[9:10]
	s_xor_b32 s0, s1, s0
	s_xor_b32 s2, s2, s104
	s_xor_b32 s19, s0, s25
	s_lshl_b32 s0, s2, 1
	s_lshl_b32 s1, s19, 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_xor_b32 s0, s0, s1
	s_mov_b32 s1, s8
	s_xor_b32 s0, s0, s2
	s_xor_b32 s88, s0, s19
	s_add_i32 s0, s12, s19
	s_add_i32 s2, s88, s100
	s_add_i32 s0, s0, 0x161f14
	s_lshl_b64 s[2:3], s[2:3], 21
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b64 s[0:1], s[2:3], s[0:1]
	s_mov_b32 s2, 0xf99eb0bb
	v_cvt_f64_u32_e32 v[13:14], s1
	v_cvt_f64_u32_e32 v[15:16], s0
	s_mov_b32 s3, 0x3f3e357e
	v_cndmask_b32_e64 v4, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 8, v4
	v_ldexp_f64 v[9:10], v[9:10], v4
	v_ldexp_f64 v[13:14], v[13:14], 32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[11:12], v[9:10]
	v_add_f64 v[13:14], v[13:14], v[15:16]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[17:18], v[9:10], v[11:12]
	v_mul_f64 v[11:12], v[11:12], 0.5
	v_fma_f64 v[13:14], 0x3cb00000, v[13:14], 0x3cb00000
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[19:20], -v[11:12], v[17:18], 0.5
	v_cmp_lt_f64_e64 s1, 1.0, v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[15:16], v[17:18], v[19:20], v[17:18]
	v_fma_f64 v[11:12], v[11:12], v[19:20], v[11:12]
	v_mul_f64 v[19:20], v[13:14], 0.5
	v_fma_f64 v[17:18], -v[15:16], v[15:16], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_neq_f64_e64 s0, 0x7ff00000, v[19:20]
	v_fma_f64 v[15:16], v[17:18], v[11:12], v[15:16]
	v_fract_f64_e32 v[17:18], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[19:20], -v[15:16], v[15:16], v[9:10]
	v_add_f64 v[17:18], v[17:18], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[11:12], v[19:20], v[11:12], v[15:16]
	v_cndmask_b32_e64 v4, 0, v18, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v17, 0, v17, s0
	v_cndmask_b32_e64 v18, v14, v4, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v17, v13, v17, s1
	s_mov_b32 s0, 0x6fdffd2b
	s_mov_b32 s1, 0xbf7e2fe7
	v_add_f64 v[15:16], v[17:18], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[15:16], v[15:16]
	v_fma_f64 v[17:18], v[15:16], -0.5, v[17:18]
	v_cvt_i32_f64_e32 v4, v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[19:20], v[17:18], v[17:18]
	v_fma_f64 v[21:22], v[19:20], s[2:3], s[0:1]
	s_mov_b32 s0, 0xd5f14825
	s_mov_b32 s1, 0x3fb50782
	v_mul_f64 v[23:24], v[17:18], v[19:20]
	s_mov_b32 s2, s98
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[21:22], v[19:20], v[21:22], s[0:1]
	s_mov_b32 s0, 0xcdfe9424
	s_mov_b32 s1, 0xbfe32d2c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[21:22], v[19:20], v[21:22], s[0:1]
	s_mov_b32 s0, 0x67754fff
	s_mov_b32 s1, 0x400466bc
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[21:22], v[19:20], v[21:22], s[0:1]
	s_mov_b32 s0, 0xe625be09
	s_mov_b32 s1, 0xc014abbc
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[21:22], v[19:20], v[21:22], s[0:1]
	v_readlane_b32 s0, v71, 15
	v_readlane_b32 s1, v71, 16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_mov_b32 s3, s1
	v_writelane_b32 v71, s0, 15
	v_writelane_b32 v71, s1, 16
	s_mov_b32 s0, 0xca1d4f33
	s_mov_b32 s1, 0x3f5f9c89
	v_mul_f64 v[21:22], v[23:24], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[15:16], v[17:18], s[2:3], v[21:22]
	s_mov_b32 s2, 0x2e21c33
	s_mov_b32 s3, 0xbf1b1673
	v_fma_f64 v[17:18], v[19:20], s[2:3], s[0:1]
	s_mov_b32 s0, 0x7294bff9
	s_mov_b32 s1, 0xbf9a6d1e
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[17:18], v[19:20], v[17:18], s[0:1]
	s_mov_b32 s0, 0x67b90b37
	s_mov_b32 s1, 0x3fce1f50
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[17:18], v[19:20], v[17:18], s[0:1]
	s_mov_b32 s0, 0x7e3c325b
	s_mov_b32 s1, 0xbff55d3c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[17:18], v[19:20], v[17:18], s[0:1]
	s_mov_b32 s0, 0x81b5a67
	s_mov_b32 s1, 0x40103c1f
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[17:18], v[19:20], v[17:18], s[0:1]
	s_mov_b32 s0, 0xc9be45de
	s_mov_b32 s1, 0xc013bd3c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[17:18], v[19:20], v[17:18], s[0:1]
	s_and_b32 s1, vcc_lo, exec_lo
	s_cselect_b32 s1, 0xffffff80, 0
	v_cmp_class_f64_e64 vcc_lo, v[9:10], 0x260
	v_ldexp_f64 v[11:12], v[11:12], s1
	v_cmp_lg_f64_e64 s0, 0x7ff00000, v[13:14]
	v_lshlrev_b32_e32 v13, 30, v4
	v_and_b32_e32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e64 s1, 0, v4
	v_xor_b32_e32 v4, 0x80000000, v16
	v_fma_f64 v[17:18], v[19:20], v[17:18], 1.0
	v_cndmask_b32_e32 v10, v12, v10, vcc_lo
	v_xor_b32_e32 v14, v13, v14
	v_and_b32_e32 v19, 0x80000000, v13
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v9, v11, v9 :: v_dual_and_b32 v14, 0x80000000, v14
	v_cndmask_b32_e64 v16, v18, v16, s1
	v_cndmask_b32_e64 v4, v4, v18, s1
	v_cndmask_b32_e64 v13, v17, v15, s1
	v_cndmask_b32_e64 v15, v15, v17, s1
	s_mov_b32 s1, 1
	v_xor_b32_e32 v14, v16, v14
	v_xor_b32_e32 v4, v4, v19
	v_cndmask_b32_e64 v13, 0, v13, s0
	v_cndmask_b32_e64 v15, 0, v15, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v14, 0x7ff80000, v14, s0
	v_cndmask_b32_e64 v16, 0x7ff80000, v4, s0
	s_mov_b32 s0, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[11:12], v[9:10], v[13:14]
	v_mul_f64 v[9:10], v[9:10], v[15:16]
.LBB0_31:                               ; %_ZN14rocrand_device6detail25poisson_distribution_hugeIPNS_13xorwow_engineEjEET0_RT_d.exit.i.i.i
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[7:8]
	v_cndmask_b32_e64 v4, 0, 1, vcc_lo
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s2, 0xffffff80, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 8, v4
	v_ldexp_f64 v[13:14], v[7:8], v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[15:16], v[13:14]
	v_cmp_class_f64_e64 vcc_lo, v[13:14], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[17:18], v[13:14], v[15:16]
	v_mul_f64 v[15:16], v[15:16], 0.5
	v_fma_f64 v[19:20], -v[15:16], v[17:18], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], v[17:18], v[19:20], v[17:18]
	v_fma_f64 v[15:16], v[15:16], v[19:20], v[15:16]
	v_fma_f64 v[19:20], -v[17:18], v[17:18], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], v[19:20], v[15:16], v[17:18]
	v_fma_f64 v[19:20], -v[17:18], v[17:18], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[15:16], v[19:20], v[15:16], v[17:18]
	v_ldexp_f64 v[15:16], v[15:16], s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v15, v13 :: v_dual_cndmask_b32 v14, v16, v14
	v_fma_f64 v[11:12], v[13:14], v[11:12], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_trunc_f64_e32 v[13:14], v[11:12]
	v_add_f64 v[15:16], v[11:12], -v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f64_e64 s2, |v[15:16]|, 0.5
	s_and_b32 s2, s2, exec_lo
	s_cselect_b32 s2, 0x3ff00000, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v4, 0x7fffffff, s2, v12
	v_add_f64 v[11:12], v[13:14], v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_u32_f64_e32 v4, v[11:12]
.LBB0_32:                               ; %Flow222
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_mov_b32 s2, 0
.LBB0_33:                               ; %Flow224
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_37
; %bb.34:                               ;   in Loop: Header=BB0_3 Depth=1
	v_readlane_b32 s2, v71, 18
	v_readlane_b32 s3, v71, 19
	s_mov_b32 s0, 0x652b82fe
	s_mov_b32 s1, 0x3ff71547
	v_cmp_ngt_f64_e32 vcc_lo, 0xc0900000, v[7:8]
	s_delay_alu instid0(VALU_DEP_2)
	s_mov_b32 s1, s3
	v_writelane_b32 v71, s2, 18
	v_mul_f64 v[9:10], v[7:8], s[0:1]
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	v_writelane_b32 v71, s3, 19
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[9:10], v[9:10]
	v_fma_f64 v[11:12], v[9:10], s[94:95], -v[7:8]
	v_cvt_i32_f64_e32 v4, v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[9:10], s[96:97], v[11:12]
	v_fma_f64 v[13:14], v[11:12], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[20:21]
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[0:1]
	v_cmp_nlt_f64_e64 s0, 0x4090cc00, v[7:8]
	v_mov_b32_e32 v7, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[11:12], v[13:14], 1.0
	v_fma_f64 v[9:10], v[11:12], v[13:14], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[9:10], v[9:10], v4
	v_cndmask_b32_e32 v4, 0x7ff00000, v10, vcc_lo
	s_and_b32 vcc_lo, s0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v8, 0x3ff00000 :: v_dual_cndmask_b32 v9, 0, v9
	v_cndmask_b32_e64 v10, 0, v4, s0
	v_readlane_b32 s0, v71, 20
	s_delay_alu instid0(VALU_DEP_1)
	s_add_i32 s1, s0, 0x10974f
	s_mov_b32 s0, -1
.LBB0_35:                               ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_mov_b32 s2, s85
	s_mov_b32 s85, s33
	s_lshr_b32 s4, s2, 2
	s_mov_b32 s33, s5
	s_xor_b32 s2, s4, s2
	s_lshl_b32 s4, s5, 4
	s_lshl_b32 s5, s2, 1
	s_mov_b32 s3, s24
	s_xor_b32 s4, s4, s5
	s_lshr_b32 s5, s3, 2
	s_xor_b32 s4, s4, s33
	s_mov_b32 s24, s104
	s_xor_b32 s3, s5, s3
	s_xor_b32 s104, s4, s2
	s_lshl_b32 s2, s3, 1
	s_lshl_b32 s4, s104, 4
	s_mov_b32 s100, s1
	s_xor_b32 s2, s2, s4
	s_add_i32 s0, s0, 1
	s_xor_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s5, s2, s104
	s_add_i32 s1, s1, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s1, s1, 11
	v_cvt_f64_u32_e32 v[11:12], s1
	s_add_i32 s1, s100, s104
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s1, s1, 0xfffa783b
	v_cvt_f64_u32_e32 v[13:14], s1
	s_add_i32 s1, s100, 0xb0f8a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[11:12], v[11:12], 32
	v_add_f64 v[11:12], v[11:12], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], 0x3ca00000, v[11:12], 0x3ca00000
	v_mul_f64 v[7:8], v[7:8], v[11:12]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e32 vcc_lo, v[7:8], v[9:10]
	s_cbranch_vccz .LBB0_35
; %bb.36:                               ; %Flow223
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_mov_b32_e32 v10, v6
	v_dual_mov_b32 v4, s0 :: v_dual_mov_b32 v9, v5
	v_readlane_b32 s1, v71, 17
	s_mov_b32 s88, s5
	s_mov_b32 s19, s104
	s_mov_b32 s0, s85
	s_mov_b32 s84, s24
	s_mov_b32 s25, s33
.LBB0_37:                               ; %_Z15hiprand_poissonI12hiprandStateEjPT_d.exit
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f64_u32_e32 v[4:5], v4
	s_cmp_eq_u32 s101, 2
	v_writelane_b32 v71, s1, 17
	s_cselect_b32 s46, s13, s46
	s_cselect_b32 s47, s18, s47
	s_cselect_b32 s31, 0x40590000, s31
	s_cselect_b32 s30, 0, s30
	s_mov_b32 s33, s19
	s_mov_b32 s104, s88
	v_readlane_b32 s88, v71, 23
	s_mov_b32 s85, s84
	s_mov_b32 s24, s25
	v_readlane_b32 s89, v71, 24
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], 0xc0590000, v[4:5]
	v_readfirstlane_b32 s2, v5
	v_readfirstlane_b32 s3, v4
	s_cselect_b32 s57, s2, s57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	s_cselect_b32 s56, s3, s56
	v_max_f64 v[6:7], v[6:7], 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s4, v7
	v_readfirstlane_b32 s5, v6
	v_dual_mov_b32 v5, v9 :: v_dual_mov_b32 v6, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cselect_b32 s75, s4, s75
	s_cselect_b32 s74, s5, s74
	s_cmp_eq_u32 s101, 3
	s_cselect_b32 s49, s18, s49
	s_cselect_b32 s48, s13, s48
	s_cselect_b32 s34, 0, s34
	s_cselect_b32 s35, 0x40590000, s35
	s_cselect_b32 s58, s3, s58
	s_cselect_b32 s59, s2, s59
	s_cselect_b32 s78, s5, s78
	s_cselect_b32 s79, s4, s79
	s_cmp_eq_u32 s101, 1
	s_cselect_b32 s44, s13, s44
	s_cselect_b32 s45, s18, s45
	s_cselect_b32 s29, 0x40590000, s29
	s_cselect_b32 s28, 0, s28
	s_cselect_b32 s55, s2, s55
	s_cselect_b32 s54, s3, s54
	s_cselect_b32 s71, s4, s71
	s_cselect_b32 s70, s5, s70
	s_cmp_eq_u32 s101, 4
	s_cselect_b32 s51, s18, s51
	s_cselect_b32 s50, s13, s50
	s_cselect_b32 s38, 0, s38
	s_cselect_b32 s39, 0x40590000, s39
	s_cselect_b32 s62, s3, s62
	s_cselect_b32 s63, s2, s63
	s_cselect_b32 s82, s5, s82
	s_cselect_b32 s83, s4, s83
	s_cmp_eq_u32 s101, 0
	s_cselect_b32 s41, s18, s41
	v_readlane_b32 s18, v71, 21
	v_readlane_b32 s19, v71, 22
	s_cselect_b32 s40, s13, s40
	s_cselect_b32 s7, 0x40590000, s7
	s_cselect_b32 s6, 0, s6
	s_cselect_b32 s53, s2, s53
	s_cselect_b32 s52, s3, s52
	s_cselect_b32 s67, s4, s67
	s_cselect_b32 s66, s5, s66
	s_add_i32 s101, s101, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s101, 5
	s_cbranch_scc1 .LBB0_3
; %bb.38:                               ; %.preheader.preheader
	v_mov_b32_e32 v1, 0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s0, 0x55555555
	s_mov_b32 s2, 0x6b47b09a
	s_mov_b32 s4, 0xbf559e2b
	s_mov_b32 s8, 0xd7f4df2e
	s_mov_b32 s10, 0x16291751
	s_mov_b32 s12, 0x9b27acf1
	s_mov_b32 s14, 0x998ef7b6
	s_mov_b32 s16, 0xfefa39ef
	s_mov_b32 s18, 0x3b39803f
	s_mov_b32 s1, 0x3fe55555
	s_mov_b32 s3, 0x3fc38538
	s_mov_b32 s5, 0x3fc3ab76
	s_mov_b32 s9, 0x3fc7474d
	s_mov_b32 s11, 0x3fcc71c0
	s_mov_b32 s13, 0x3fd24924
	s_mov_b32 s15, 0x3fd99999
	s_mov_b32 s17, 0x3fe62e42
	s_mov_b32 s19, 0x3c7abc9e
	s_mov_b64 s[20:21], 0
	s_mov_b32 s22, 0x55555780
.LBB0_39:                               ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	s_cmp_eq_u32 s20, 1
	s_cselect_b32 s23, s44, s40
	s_cselect_b32 s24, s45, s41
	s_cselect_b32 s25, s70, s66
	s_cselect_b32 s26, s71, s67
	s_cselect_b32 s27, s54, s52
	s_cselect_b32 s33, s55, s53
	s_cselect_b32 s36, s28, s6
	s_cselect_b32 s37, s29, s7
	s_cmp_eq_u32 s20, 2
	s_cselect_b32 s24, s47, s24
	s_cselect_b32 s23, s46, s23
	s_cselect_b32 s26, s75, s26
	s_cselect_b32 s25, s74, s25
	s_cselect_b32 s33, s57, s33
	s_cselect_b32 s27, s56, s27
	s_cselect_b32 s37, s31, s37
	s_cselect_b32 s36, s30, s36
	s_cmp_eq_u32 s20, 3
	s_cselect_b32 s23, s48, s23
	s_cselect_b32 s24, s49, s24
	s_cselect_b32 s42, s78, s25
	s_cselect_b32 s26, s79, s26
	s_cselect_b32 s43, s58, s27
	s_cselect_b32 s33, s59, s33
	s_cselect_b32 s36, s34, s36
	s_cselect_b32 s37, s35, s37
	s_cmp_eq_u32 s20, 4
	s_cselect_b32 s25, s51, s24
	s_cselect_b32 s27, s83, s26
	s_cselect_b32 s26, s82, s42
	s_cselect_b32 s37, s39, s37
	s_cselect_b32 s36, s38, s36
	s_cselect_b32 s24, s50, s23
	v_add_f64 v[3:4], s[26:27], s[36:37]
	v_add_f64 v[5:6], s[24:25], s[36:37]
	s_mov_b32 s23, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[7:8], null, v[5:6], v[5:6], v[3:4]
	v_div_scale_f64 v[13:14], vcc_lo, v[3:4], v[5:6], v[3:4]
	v_rcp_f64_e32 v[9:10], v[7:8]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	v_mul_f64 v[11:12], v[13:14], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], -v[7:8], v[11:12], v[13:14]
	v_div_fmas_f64 v[7:8], v[7:8], v[9:10], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[3:4], v[7:8], v[5:6], v[3:4]
	v_frexp_mant_f64_e32 v[5:6], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[0:1], v[5:6]
	v_cndmask_b32_e64 v7, 0, 1, vcc_lo
	v_ldexp_f64 v[5:6], v[5:6], v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[5:6], 1.0
	v_add_f64 v[13:14], v[5:6], -1.0
	v_rcp_f64_e32 v[9:10], v[7:8]
	v_add_f64 v[15:16], v[7:8], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], -v[15:16]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
	v_fma_f64 v[9:10], v[11:12], v[9:10], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
	v_fma_f64 v[9:10], v[11:12], v[9:10], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[11:12], v[13:14], v[9:10]
	v_mul_f64 v[17:18], v[7:8], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[11:12], v[7:8], -v[17:18]
	v_fma_f64 v[5:6], v[11:12], v[5:6], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[17:18], v[5:6]
	v_add_f64 v[15:16], v[13:14], -v[7:8]
	v_add_f64 v[17:18], v[7:8], -v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[13:14], v[13:14], -v[15:16]
	v_add_f64 v[5:6], v[17:18], -v[5:6]
	v_frexp_exp_i32_f64_e32 v17, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[13:14], -v[7:8]
	v_add_f64 v[5:6], v[5:6], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[15:16], v[5:6]
	v_mul_f64 v[5:6], v[9:10], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[11:12], v[5:6]
	v_mul_f64 v[9:10], v[7:8], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[13:14], v[9:10], s[4:5], s[2:3]
	v_mul_f64 v[15:16], v[7:8], v[9:10]
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[10:11]
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[14:15]
	v_fma_f64 v[9:10], v[9:10], v[13:14], s[22:23]
	v_ldexp_f64 v[13:14], v[7:8], 1
	v_add_f64 v[7:8], v[7:8], -v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[9:10], v[15:16], v[9:10]
	v_subrev_co_ci_u32_e32 v15, vcc_lo, 0, v17, vcc_lo
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	v_cmp_class_f64_e64 vcc_lo, v[3:4], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cvt_f64_i32_e32 v[15:16], v15
	v_add_f64 v[11:12], v[13:14], v[9:10]
	v_ldexp_f64 v[5:6], v[5:6], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[17:18], v[15:16], s[16:17]
	v_add_f64 v[7:8], v[11:12], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[13:14], v[15:16], s[16:17], -v[17:18]
	v_add_f64 v[7:8], v[9:10], -v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[9:10], v[15:16], s[18:19], v[13:14]
	v_add_f64 v[5:6], v[5:6], v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[17:18], v[9:10]
	v_add_f64 v[13:14], v[11:12], v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[7:8], -v[17:18]
	v_add_f64 v[15:16], v[7:8], v[13:14]
	v_add_f64 v[11:12], v[13:14], -v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], -v[17:18]
	v_add_f64 v[19:20], v[15:16], -v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], -v[11:12]
	v_add_f64 v[21:22], v[15:16], -v[19:20]
	v_add_f64 v[11:12], v[13:14], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[13:14], v[9:10], v[5:6]
	v_add_f64 v[7:8], v[7:8], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[7:8], v[11:12], v[7:8]
	v_add_f64 v[11:12], v[13:14], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[13:14], v[7:8]
	v_add_f64 v[13:14], v[13:14], -v[11:12]
	v_add_f64 v[5:6], v[5:6], -v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[17:18], v[15:16], v[7:8]
	v_add_f64 v[9:10], v[9:10], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[17:18], -v[15:16]
	v_add_f64 v[5:6], v[5:6], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[11:12]
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_add_f64 v[7:8], s[24:25], -s[26:27]
	s_cselect_b32 s25, s63, s33
	s_cselect_b32 s24, s62, s43
	s_add_u32 s20, s20, 1
	s_addc_u32 s21, s21, 0
	s_cmp_lg_u32 s20, 5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[17:18], v[5:6]
	v_dual_cndmask_b32 v5, v5, v3 :: v_dual_cndmask_b32 v6, v6, v4
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v6, 0x7ff80000, v6, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[3:4]
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[3:4]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v6, 0xfff00000, v6, vcc_lo
	v_fma_f64 v[3:4], s[24:25], v[5:6], v[7:8]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[1:2], v[3:4], 2.0, v[1:2]
	s_cbranch_scc1 .LBB0_39
; %bb.40:                               ; %_Z9chisquarePdS_S_S_.exit
	v_lshlrev_b32_e32 v3, 3, v0
	s_mov_b32 s0, exec_lo
	ds_store_b64 v3, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB0_42
; %bb.41:
	v_mov_b32_e32 v2, 0
	v_readlane_b32 s0, v71, 5
	v_readlane_b32 s1, v71, 6
	v_readlane_b32 s1, v71, 0
	v_readlane_b32 s2, v71, 7
	ds_load_b64 v[0:1], v2 offset:720
	v_readlane_b32 s3, v71, 8
	s_mul_i32 s0, s1, s0
	s_mov_b32 s1, 0
	s_add_i32 s0, s0, s2
	v_readlane_b32 s2, v71, 1
	v_readlane_b32 s3, v71, 2
	s_lshl_b64 s[0:1], s[0:1], 3
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_delay_alu instid0(VALU_DEP_1)
	s_addc_u32 s1, s3, s1
	s_waitcnt lgkmcnt(0)
	global_store_b64 v2, v[0:1], s[0:1]
.LBB0_42:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8fakeexpsjPdS_S_
		.amdhsa_group_segment_fixed_size 4040
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 72
		.amdhsa_next_free_sgpr 105
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8fakeexpsjPdS_S_, .Lfunc_end0-_Z8fakeexpsjPdS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 17540
; NumSgprs: 107
; NumVgprs: 72
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4040 bytes/workgroup (compile time only)
; SGPRBlocks: 13
; VGPRBlocks: 8
; NumSGPRsForWavesPerEU: 107
; NumVGPRsForWavesPerEU: 72
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 4040
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8fakeexpsjPdS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     107
    .sgpr_spill_count: 44
    .symbol:         _Z8fakeexpsjPdS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     72
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
