/* Lab2Matrix.cu
 *
 *  Created on: 29 Feb 2020
 *      Author: sc01716
 */
#include <stdio.h>
#include <stdlib.h>

#include <cuda.h>
#define BLOCK_SIZE 16

// Matrices are stored in row-major order
typedef struct {
	int width;
	int height;
	float* elements;
} Matrix;

__global__ void MatrixMultKern(const Matrix A, const Matrix B, const Matrix C) {
	// Calculate the column index of C and B
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	// Calculate the row index of C and of A
	int row = blockIdx.y * blockDim.y + threadIdx.y;

	if ((row < A.height) && (col < B.width)) {
		float Cvalue = 0;
		// each thread computes one element of the block sub-matrix
		for (int k = 0; k < A.width; ++k) {
			Cvalue += A.elements[row * A.width + k]
					* B.elements[k * B.width + col];
		}
		C.elements[row * C.width + col] = Cvalue;
	}
}

// Matrix multiplication -Host Code
//Matrix dimensions are assumed to be multiples of BLOCK_SIZE
void MatrixMult(const Matrix h_A, const Matrix h_B, Matrix h_C) {
	cudaEvent_t start, stop;
	cudaEventCreate(&start);
	cudaEventCreate(&stop);

	// Load A and B into device memory
	Matrix d_A;
	d_A.width = h_A.width;
	d_A.height = h_A.height;
	size_t size = h_A.width * h_A.height * sizeof(float);
	cudaMalloc(&d_A.elements, size);
	cudaMemcpy(d_A.elements, h_A.elements, size, cudaMemcpyHostToDevice);

	Matrix d_B;
	d_B.width = h_B.width;
	d_B.height = h_B.height;
	size = h_B.width * h_B.height * sizeof(float);
	cudaMalloc(&d_B.elements, size);
	cudaMemcpy(d_B.elements, h_B.elements, size, cudaMemcpyHostToDevice);

	// Allocate C in Device memory
	Matrix d_C;
	d_C.width = h_C.width;
	d_C.height = h_C.height;
	size = h_C.width * h_C.height * sizeof(float);
	cudaMalloc(&d_C.elements, size);

	// Invoke Kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid(d_B.width / dimBlock.x, d_A.height / dimBlock.y);
	cudaEventRecord(start);
	MatrixMultKern<<<dimGrid, dimBlock>>>(d_A, d_B, d_C);
	cudaEventRecord(stop);

	// Read C from Device to Host
	cudaMemcpy(h_C.elements, d_C.elements, size, cudaMemcpyDeviceToHost);
	//printf("Copy h_C off device: %s\n", cudaGetErrorString(err));
	cudaEventSynchronize(stop);
	float milliseconds = 0;
	cudaEventElapsedTime(&milliseconds, start, stop);
	printf("Elapsed time was: %f\n milliseconds", milliseconds);
	// Free Device Memory
	cudaFree(d_A.elements);
	cudaFree(d_B.elements);
	cudaFree(d_C.elements);
}

int main(int argc, char* argv[]) {
	Matrix A, B, C;
	// Read Dimensions of A and B
	A.height = atoi(argv[1]);
	A.width = atoi(argv[2]);
	B.height = A.width;
	B.width = atoi(argv[3]);

	A.elements = (float*) malloc(A.width * A.height * sizeof(float));
	B.elements = (float*) malloc(B.width * B.height * sizeof(float));
	C.height = A.height;
	C.width = B.width;
	C.elements = (float*) malloc(C.width * C.height * sizeof(float));

	for (int i = 0; i < A.height; i++)
		for (int j = 0; j < A.width; j++)
			A.elements[i * A.width + j] = (float) (rand() % 3);
	for (int i = 0; i < B.height; i++)
		for (int j = 0; j < B.width; j++)
			B.elements[i * B.width + j] = (float) (rand() % 2);
	MatrixMult(A, B, C);
	//printing full matrix
	/*
	 for (int i = 0; i < A.height; i++) {
	 for (int j = 0; j < A.width; j++)
	 printf("%f ", A.elements[i * A.width + j]);
	 printf("\n");
	 }
	 printf("\n");
	 for (int i = 0; i < B.height; i++) {
	 for (int j = 0; j < B.width; j++)
	 printf("%f ", B.elements[i * B.width + j]);
	 printf("\n");
	 }
	 printf("\n");
	 for (int i = 0; i < C.height; i++) {
	 for (int j = 0; j < C.width; j++)
	 printf("%f ", C.elements[i * C.width + j]);
	 printf("\n");
	 }

	 printf("\n");
	 */
	//printing only part of the matrix
	for (int i = 0; i < 16; i++) {
		for (int j = 0; j < 16; j++)
			printf("%f ", A.elements[i * A.width + j]);
		printf("\n");
	}
	printf("\n");
	for (int i = 0; i < 16; i++) {
		for (int j = 0; j < 16; j++)
			printf("%f ", B.elements[i * B.width + j]);
		printf("\n");
	}
	printf("\n");
	for (int i = 0; i < 16; i++) {
		for (int j = 0; j < 16; j++)
			printf("%f ", C.elements[i * C.width + j]);
		printf("\n");

	}

	printf("\n");
	printf("%d ",C.width);
	return 0;
}

	.file	"tmpxft_0039140f_00000000-6_Lab2Test.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z43__device_stub__Z14MatrixMultKern6MatrixS_S_RK6MatrixS1_S1_
	.type	_Z43__device_stub__Z14MatrixMultKern6MatrixS_S_RK6MatrixS1_S1_, @function
_Z43__device_stub__Z14MatrixMultKern6MatrixS_S_RK6MatrixS1_S1_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rdi, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 72(%rsp)
	leaq	16(%rsp), %rdi
	leaq	28(%rsp), %rsi
	movq	%rdx, 80(%rsp)
	movq	%rsp, %rdx
	movq	%rax, 16(%rsp)
	movl	$1, 24(%rsp)
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	8(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z14MatrixMultKern6MatrixS_S_(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 128
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L2:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z43__device_stub__Z14MatrixMultKern6MatrixS_S_RK6MatrixS1_S1_, .-_Z43__device_stub__Z14MatrixMultKern6MatrixS_S_RK6MatrixS1_S1_
	.globl	_Z14MatrixMultKern6MatrixS_S_
	.type	_Z14MatrixMultKern6MatrixS_S_, @function
_Z14MatrixMultKern6MatrixS_S_:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$56, %rsp
	.cfi_def_cfa_offset 64
	movq	%rdi, 32(%rsp)
	leaq	32(%rsp), %rdi
	movq	%rsi, 40(%rsp)
	leaq	16(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	movq	%rsp, %rdx
	movq	%rcx, 24(%rsp)
	movq	%r8, (%rsp)
	movq	%r9, 8(%rsp)
	call	_Z43__device_stub__Z14MatrixMultKern6MatrixS_S_RK6MatrixS1_S1_
	addq	$56, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z14MatrixMultKern6MatrixS_S_, .-_Z14MatrixMultKern6MatrixS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Elapsed time was: %f\n milliseconds"
	.text
	.globl	_Z10MatrixMult6MatrixS_S_
	.type	_Z10MatrixMult6MatrixS_S_, @function
_Z10MatrixMult6MatrixS_S_:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r8, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	movq	%rdi, %rdx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	sarq	$32, %rdx
	movq	%r12, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%r8, %rbx
	sarq	$32, %rbp
	sarq	$32, %rbx
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	movq	%r9, 16(%rsp)
	leaq	32(%rsp), %rdi
	movq	%rsi, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	movq	%rdx, 24(%rsp)
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	24(%rsp), %rdx
	movl	%r14d, 72(%rsp)
	leaq	80(%rsp), %rdi
	movl	%edx, 76(%rsp)
	imull	%r14d, %edx
	movslq	%edx, %r14
	salq	$2, %r14
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	movq	80(%rsp), %rdi
	movq	%r14, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebp, 92(%rsp)
	imull	%r12d, %ebp
	leaq	96(%rsp), %rdi
	movl	%r12d, 88(%rsp)
	movslq	%ebp, %rbp
	salq	$2, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movq	96(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	leaq	152(%rsp), %rbp
	call	cudaMemcpy@PLT
	movl	%ebx, 108(%rsp)
	imull	%r15d, %ebx
	leaq	112(%rsp), %rdi
	movl	%r15d, 104(%rsp)
	movslq	%ebx, %rbx
	salq	$2, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movl	76(%rsp), %eax
	movl	88(%rsp), %edx
	xorl	%esi, %esi
	movq	32(%rsp), %rdi
	movl	$1, 68(%rsp)
	shrl	$4, %edx
	shrl	$4, %eax
	movl	%edx, 60(%rsp)
	movl	%eax, 64(%rsp)
	call	cudaEventRecord@PLT
	movq	60(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	68(%rsp), %esi
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movups	72(%rsp), %xmm1
	movups	88(%rsp), %xmm2
	movq	%rbp, %rdx
	leaq	136(%rsp), %rsi
	movups	104(%rsp), %xmm3
	leaq	120(%rsp), %rdi
	movups	%xmm1, 120(%rsp)
	movups	%xmm2, 136(%rsp)
	movups	%xmm3, 152(%rsp)
	call	_Z43__device_stub__Z14MatrixMultKern6MatrixS_S_RK6MatrixS1_S1_
.L10:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	112(%rsp), %rsi
	movq	16(%rsp), %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	%rbp, %rdi
	movl	$0x00000000, 152(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	152(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z10MatrixMult6MatrixS_S_, .-_Z10MatrixMult6MatrixS_S_
	.section	.rodata.str1.1
.LC2:
	.string	"%f "
.LC3:
	.string	"\n"
.LC4:
	.string	"%d "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %r14d
	call	atoi@PLT
	movq	24(%rbp), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	movl	%r14d, %edi
	imull	%ebx, %edi
	movl	%eax, %ebp
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movl	%ebx, %edi
	imull	%ebp, %edi
	movq	%rax, %r13
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movl	%r14d, %edi
	imull	%ebp, %edi
	movq	%rax, %r12
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	xorl	%esi, %esi
	xorl	%edi, %edi
	movq	%rax, 8(%rsp)
.L14:
	cmpl	%edi, %r14d
	jle	.L16
	movslq	%esi, %rax
	xorl	%r15d, %r15d
	leaq	0(%r13,%rax,4), %r8
.L17:
	cmpl	%r15d, %ebx
	jle	.L35
	movl	%esi, 28(%rsp)
	movq	%r8, 16(%rsp)
	movl	%edi, 24(%rsp)
	call	rand@PLT
	movl	$3, %ecx
	movq	16(%rsp), %r8
	movl	28(%rsp), %esi
	cltd
	movl	24(%rsp), %edi
	idivl	%ecx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%r8,%r15,4)
	incq	%r15
	jmp	.L17
.L35:
	incl	%edi
	addl	%ebx, %esi
	jmp	.L14
.L16:
	xorl	%esi, %esi
	xorl	%edi, %edi
.L18:
	cmpl	%edi, %ebx
	jle	.L20
	movslq	%esi, %rax
	xorl	%r15d, %r15d
	leaq	(%r12,%rax,4), %r8
.L21:
	cmpl	%r15d, %ebp
	jle	.L36
	movl	%esi, 28(%rsp)
	movq	%r8, 16(%rsp)
	movl	%edi, 24(%rsp)
	call	rand@PLT
	movl	$2, %ecx
	movq	16(%rsp), %r8
	movl	28(%rsp), %esi
	cltd
	movl	24(%rsp), %edi
	idivl	%ecx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%r8,%r15,4)
	incq	%r15
	jmp	.L21
.L36:
	incl	%edi
	addl	%ebp, %esi
	jmp	.L18
.L20:
	movq	%rbx, %rax
	salq	$32, %r14
	movl	%ebx, %edi
	movq	8(%rsp), %r9
	salq	$32, %rax
	movl	%ebp, %edx
	movl	%ebp, %r8d
	orq	%r14, %rdi
	orq	%r14, %r8
	orq	%rax, %rdx
	movq	%r12, %rcx
	movq	%r13, %rsi
	call	_Z10MatrixMult6MatrixS_S_
	movslq	%ebx, %rbx
	movl	$16, %r14d
	salq	$2, %rbx
.L22:
	xorl	%r15d, %r15d
.L23:
	cvtss2sd	0(%r13,%r15,4), %xmm0
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%r15
	cmpq	$16, %r15
	jne	.L23
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	%rbx, %r13
	call	__printf_chk@PLT
	decl	%r14d
	jne	.L22
	movl	$2, %edi
	xorl	%eax, %eax
	movslq	%ebp, %rbx
	movl	$16, %r13d
	leaq	.LC3(%rip), %rsi
	salq	$2, %rbx
	call	__printf_chk@PLT
.L25:
	xorl	%r14d, %r14d
.L26:
	cvtss2sd	(%r12,%r14,4), %xmm0
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%r14
	cmpq	$16, %r14
	jne	.L26
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	%rbx, %r12
	call	__printf_chk@PLT
	decl	%r13d
	jne	.L25
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movl	$16, %r13d
	call	__printf_chk@PLT
	movq	8(%rsp), %r12
.L28:
	xorl	%r14d, %r14d
.L29:
	cvtss2sd	(%r12,%r14,4), %xmm0
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%r14
	cmpq	$16, %r14
	jne	.L29
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	%rbx, %r12
	call	__printf_chk@PLT
	decl	%r13d
	jne	.L28
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebp, %edx
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z14MatrixMultKern6MatrixS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14MatrixMultKern6MatrixS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/* Lab2Matrix.cu
 *
 *  Created on: 29 Feb 2020
 *      Author: sc01716
 */
#include <stdio.h>
#include <stdlib.h>

#include <hip/hip_runtime.h>
#define BLOCK_SIZE 16

// Matrices are stored in row-major order
typedef struct {
	int width;
	int height;
	float* elements;
} Matrix;

__global__ void MatrixMultKern(const Matrix A, const Matrix B, const Matrix C) {
	// Calculate the column index of C and B
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	// Calculate the row index of C and of A
	int row = blockIdx.y * blockDim.y + threadIdx.y;

	if ((row < A.height) && (col < B.width)) {
		float Cvalue = 0;
		// each thread computes one element of the block sub-matrix
		for (int k = 0; k < A.width; ++k) {
			Cvalue += A.elements[row * A.width + k]
					* B.elements[k * B.width + col];
		}
		C.elements[row * C.width + col] = Cvalue;
	}
}

// Matrix multiplication -Host Code
//Matrix dimensions are assumed to be multiples of BLOCK_SIZE
void MatrixMult(const Matrix h_A, const Matrix h_B, Matrix h_C) {
	hipEvent_t start, stop;
	hipEventCreate(&start);
	hipEventCreate(&stop);

	// Load A and B into device memory
	Matrix d_A;
	d_A.width = h_A.width;
	d_A.height = h_A.height;
	size_t size = h_A.width * h_A.height * sizeof(float);
	hipMalloc(&d_A.elements, size);
	hipMemcpy(d_A.elements, h_A.elements, size, hipMemcpyHostToDevice);

	Matrix d_B;
	d_B.width = h_B.width;
	d_B.height = h_B.height;
	size = h_B.width * h_B.height * sizeof(float);
	hipMalloc(&d_B.elements, size);
	hipMemcpy(d_B.elements, h_B.elements, size, hipMemcpyHostToDevice);

	// Allocate C in Device memory
	Matrix d_C;
	d_C.width = h_C.width;
	d_C.height = h_C.height;
	size = h_C.width * h_C.height * sizeof(float);
	hipMalloc(&d_C.elements, size);

	// Invoke Kernel
	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid(d_B.width / dimBlock.x, d_A.height / dimBlock.y);
	hipEventRecord(start);
	MatrixMultKern<<<dimGrid, dimBlock>>>(d_A, d_B, d_C);
	hipEventRecord(stop);

	// Read C from Device to Host
	hipMemcpy(h_C.elements, d_C.elements, size, hipMemcpyDeviceToHost);
	//printf("Copy h_C off device: %s\n", cudaGetErrorString(err));
	hipEventSynchronize(stop);
	float milliseconds = 0;
	hipEventElapsedTime(&milliseconds, start, stop);
	printf("Elapsed time was: %f\n milliseconds", milliseconds);
	// Free Device Memory
	hipFree(d_A.elements);
	hipFree(d_B.elements);
	hipFree(d_C.elements);
}

int main(int argc, char* argv[]) {
	Matrix A, B, C;
	// Read Dimensions of A and B
	A.height = atoi(argv[1]);
	A.width = atoi(argv[2]);
	B.height = A.width;
	B.width = atoi(argv[3]);

	A.elements = (float*) malloc(A.width * A.height * sizeof(float));
	B.elements = (float*) malloc(B.width * B.height * sizeof(float));
	C.height = A.height;
	C.width = B.width;
	C.elements = (float*) malloc(C.width * C.height * sizeof(float));

	for (int i = 0; i < A.height; i++)
		for (int j = 0; j < A.width; j++)
			A.elements[i * A.width + j] = (float) (rand() % 3);
	for (int i = 0; i < B.height; i++)
		for (int j = 0; j < B.width; j++)
			B.elements[i * B.width + j] = (float) (rand() % 2);
	MatrixMult(A, B, C);
	//printing full matrix
	/*
	 for (int i = 0; i < A.height; i++) {
	 for (int j = 0; j < A.width; j++)
	 printf("%f ", A.elements[i * A.width + j]);
	 printf("\n");
	 }
	 printf("\n");
	 for (int i = 0; i < B.height; i++) {
	 for (int j = 0; j < B.width; j++)
	 printf("%f ", B.elements[i * B.width + j]);
	 printf("\n");
	 }
	 printf("\n");
	 for (int i = 0; i < C.height; i++) {
	 for (int j = 0; j < C.width; j++)
	 printf("%f ", C.elements[i * C.width + j]);
	 printf("\n");
	 }

	 printf("\n");
	 */
	//printing only part of the matrix
	for (int i = 0; i < 16; i++) {
		for (int j = 0; j < 16; j++)
			printf("%f ", A.elements[i * A.width + j]);
		printf("\n");
	}
	printf("\n");
	for (int i = 0; i < 16; i++) {
		for (int j = 0; j < 16; j++)
			printf("%f ", B.elements[i * B.width + j]);
		printf("\n");
	}
	printf("\n");
	for (int i = 0; i < 16; i++) {
		for (int j = 0; j < 16; j++)
			printf("%f ", C.elements[i * C.width + j]);
		printf("\n");

	}

	printf("\n");
	printf("%d ",C.width);
	return 0;
}

	.text
	.file	"Lab2Test.hip"
	.globl	_Z29__device_stub__MatrixMultKern6MatrixS_S_ # -- Begin function _Z29__device_stub__MatrixMultKern6MatrixS_S_
	.type	_Z29__device_stub__MatrixMultKern6MatrixS_S_,@function
_Z29__device_stub__MatrixMultKern6MatrixS_S_: # @_Z29__device_stub__MatrixMultKern6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsi, 8(%rax)
	leaq	64(%rsp), %rsi
	movq	%rdx, (%rsi)
	movq	%rcx, 8(%rsi)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	movq	%r9, 8(%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rsi, 8(%rbx)
	movq	%rcx, 16(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14MatrixMultKern6MatrixS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__MatrixMultKern6MatrixS_S_, .Lfunc_end0-_Z29__device_stub__MatrixMultKern6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z10MatrixMult6MatrixS_S_       # -- Begin function _Z10MatrixMult6MatrixS_S_
	.type	_Z10MatrixMult6MatrixS_S_,@function
_Z10MatrixMult6MatrixS_S_:              # @_Z10MatrixMult6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 72(%rsp)                   # 8-byte Spill
	movq	%r8, %r12
	movq	%rcx, 64(%rsp)                  # 8-byte Spill
	movq	%rdx, %r13
	movq	%rsi, 56(%rsp)                  # 8-byte Spill
	movq	%rdi, %rbx
	movq	%rdi, %r14
	shrq	$32, %r14
	movq	%rdx, %rbp
	shrq	$32, %rbp
	movq	%r8, %r15
	shrq	$32, %r15
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	leaq	48(%rsp), %rdi
	movq	%rbx, -8(%rdi)
	imull	%ebx, %r14d
	movslq	%r14d, %r14
	shlq	$2, %r14
	movq	%rdi, %rbx
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	88(%rsp), %rbx
	movq	%r13, -8(%rbx)
	imull	%r13d, %ebp
	movslq	%ebp, %r14
	shlq	$2, %r14
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %rdi
	movq	%r12, -8(%rdi)
	imull	%r12d, %r15d
	movslq	%r15d, %r15
	shlq	$2, %r15
	movq	%r15, %rsi
	callq	hipMalloc
	movl	-8(%rbx), %eax
	shrl	$4, %eax
	leaq	48(%rsp), %rcx
	movl	-4(%rcx), %ebx
	shrl	$4, %ebx
	shlq	$32, %rbx
	orq	%rax, %rbx
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	40(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	80(%rsp), %rdx
	movq	88(%rsp), %rcx
	movq	24(%rsp), %r8
	movq	32(%rsp), %r9
	callq	_Z29__device_stub__MatrixMultKern6MatrixS_S_
.LBB1_2:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	32(%rsp), %rsi
	movq	72(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	100(%rsp), %rbx
	movl	$0, (%rbx)
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	88(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z10MatrixMult6MatrixS_S_, .Lfunc_end1-_Z10MatrixMult6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r13d
	movl	%eax, %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	shlq	$32, %rax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %r14d
	movl	%eax, %ebp
	movq	%rbp, %rax
	shlq	$32, %rax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movq	24(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebx
	movl	%eax, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%r14d, %eax
	imull	%r13d, %eax
	movslq	%eax, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, %r12
	imull	%ebx, %r14d
	movslq	%r14d, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, %r15
	imull	%r13d, %ebx
	movslq	%ebx, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, %r14
	testl	%r13d, %r13d
	jle	.LBB2_6
# %bb.1:                                # %.preheader92.lr.ph
	xorl	%eax, %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	xorl	%ecx, %ecx
.LBB2_2:                                # %.preheader92
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	movq	%rcx, 40(%rsp)                  # 8-byte Spill
	testl	%ebp, %ebp
	jle	.LBB2_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	8(%rsp), %eax                   # 4-byte Reload
	leaq	(%r12,%rax,4), %r13
	xorl	%ebx, %ebx
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1431655766, %rax, %rcx         # imm = 0x55555556
	movq	%rcx, %rdx
	shrq	$63, %rdx
	shrq	$32, %rcx
	addl	%edx, %ecx
	leal	(%rcx,%rcx,2), %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r13,%rbx,4)
	incq	%rbx
	cmpq	%rbx, %rbp
	jne	.LBB2_4
.LBB2_5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	40(%rsp), %rcx                  # 8-byte Reload
	incq	%rcx
	movq	8(%rsp), %rax                   # 8-byte Reload
	addl	%ebp, %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	cmpq	32(%rsp), %rcx                  # 8-byte Folded Reload
	jne	.LBB2_2
.LBB2_6:                                # %.preheader91
	movq	24(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rbp), %rcx
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	movq	16(%rsp), %rdx                  # 8-byte Reload
	addq	%rdx, 48(%rsp)                  # 8-byte Folded Spill
	orq	%rdx, %rax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	testl	%ebp, %ebp
	jle	.LBB2_12
# %bb.7:                                # %.preheader90.lr.ph
	xorl	%eax, %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	xorl	%ecx, %ecx
.LBB2_8:                                # %.preheader90
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_10 Depth 2
	movq	%rcx, 40(%rsp)                  # 8-byte Spill
	testl	%edx, %edx
	jle	.LBB2_11
# %bb.9:                                # %.lr.ph96
                                        #   in Loop: Header=BB2_8 Depth=1
	movl	8(%rsp), %eax                   # 4-byte Reload
	leaq	(%r15,%rax,4), %rbx
	xorl	%r13d, %r13d
.LBB2_10:                               #   Parent Loop BB2_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	andl	$-2, %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbx,%r13,4)
	incq	%r13
	cmpq	%r13, %rdx
	jne	.LBB2_10
.LBB2_11:                               # %._crit_edge97
                                        #   in Loop: Header=BB2_8 Depth=1
	movq	40(%rsp), %rcx                  # 8-byte Reload
	incq	%rcx
	movq	8(%rsp), %rax                   # 8-byte Reload
	addl	%edx, %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	cmpq	%rbp, %rcx
	jne	.LBB2_8
.LBB2_12:                               # %._crit_edge99
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r12, %rsi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movq	%r15, %rcx
	movq	24(%rsp), %r8                   # 8-byte Reload
	movq	%r14, %r9
	callq	_Z10MatrixMult6MatrixS_S_
	movslq	%ebp, %rbx
	shlq	$2, %rbx
	xorl	%r13d, %r13d
.LBB2_13:                               # %.preheader89
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_14 Depth 2
	xorl	%ebp, %ebp
.LBB2_14:                               #   Parent Loop BB2_13 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12,%rbp,4), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	incq	%rbp
	cmpq	$16, %rbp
	jne	.LBB2_14
# %bb.15:                               #   in Loop: Header=BB2_13 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r13
	addq	%rbx, %r12
	cmpq	$16, %r13
	jne	.LBB2_13
# %bb.16:
	movl	$10, %edi
	callq	putchar@PLT
	movslq	16(%rsp), %r12                  # 4-byte Folded Reload
	shlq	$2, %r12
	xorl	%ebx, %ebx
.LBB2_17:                               # %.preheader88
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_18 Depth 2
	xorl	%r13d, %r13d
.LBB2_18:                               #   Parent Loop BB2_17 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15,%r13,4), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	incq	%r13
	cmpq	$16, %r13
	jne	.LBB2_18
# %bb.19:                               #   in Loop: Header=BB2_17 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%rbx
	addq	%r12, %r15
	cmpq	$16, %rbx
	jne	.LBB2_17
# %bb.20:
	movl	$10, %edi
	callq	putchar@PLT
	xorl	%ebx, %ebx
.LBB2_21:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_22 Depth 2
	xorl	%r15d, %r15d
.LBB2_22:                               #   Parent Loop BB2_21 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r15,4), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	$16, %r15
	jne	.LBB2_22
# %bb.23:                               #   in Loop: Header=BB2_21 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%rbx
	addq	%r12, %r14
	cmpq	$16, %rbx
	jne	.LBB2_21
# %bb.24:
	movl	$10, %edi
	callq	putchar@PLT
	movl	$.L.str.3, %edi
	movq	16(%rsp), %rsi                  # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	xorl	%eax, %eax
	callq	printf
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14MatrixMultKern6MatrixS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14MatrixMultKern6MatrixS_S_,@object # @_Z14MatrixMultKern6MatrixS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z14MatrixMultKern6MatrixS_S_
	.p2align	3, 0x0
_Z14MatrixMultKern6MatrixS_S_:
	.quad	_Z29__device_stub__MatrixMultKern6MatrixS_S_
	.size	_Z14MatrixMultKern6MatrixS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Elapsed time was: %f\n milliseconds"
	.size	.L.str, 35

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%f "
	.size	.L.str.1, 4

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%d "
	.size	.L.str.3, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14MatrixMultKern6MatrixS_S_"
	.size	.L__unnamed_1, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__MatrixMultKern6MatrixS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14MatrixMultKern6MatrixS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14MatrixMultKern6MatrixS_S_ ; -- Begin function _Z14MatrixMultKern6MatrixS_S_
	.globl	_Z14MatrixMultKern6MatrixS_S_
	.p2align	8
	.type	_Z14MatrixMultKern6MatrixS_S_,@function
_Z14MatrixMultKern6MatrixS_S_:          ; @_Z14MatrixMultKern6MatrixS_S_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b64 s[4:5], s[0:1], 0x0
	s_load_b32 s8, s[0:1], 0x10
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s6, s0, 16
	s_addc_u32 s7, s1, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	v_cmp_gt_i32_e64 s2, s8, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_load_b64 s[2:3], s[0:1], 0x28
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph
	s_clause 0x1
	s_load_b64 s[10:11], s[0:1], 0x8
	s_load_b64 s[6:7], s[6:7], 0x8
	v_mul_lo_u32 v2, v0, s4
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s4, s4, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s4, 0
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_add_nc_u32_e32 v4, s8, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b32 v5, v[2:3], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v5, v7
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v6, 0
.LBB0_5:                                ; %Flow35
	s_load_b32 s0, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[2:3], null, v0, s0, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14MatrixMultKern6MatrixS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14MatrixMultKern6MatrixS_S_, .Lfunc_end0-_Z14MatrixMultKern6MatrixS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 368
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           16
        .value_kind:     by_value
      - .offset:         16
        .size:           16
        .value_kind:     by_value
      - .offset:         32
        .size:           16
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14MatrixMultKern6MatrixS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14MatrixMultKern6MatrixS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
