#include <stdio.h>
#include <cuda.h>
#include <time.h>
#include <stdlib.h>
#include <string.h>

__global__ void mul( float *Ad, float *Bd, float *Cd, int msize, int tile, int task);

int main( int argc, char **argv){

	// argv[0]: name, argv[1]: msize, argv[2]: tile_width/ per block, argv[3]: task per thread, argv[4]: isVerification
	clock_t start = clock();
	int i, j;
	int msize = atoi(argv[1]);
	int tile = atoi(argv[2]);
	int task = atoi(argv[3]);

	float *A, *B, *C;
	float *Ad, *Bd, *Cd;

	A = (float*)malloc(msize * msize * sizeof(float));
	B = (float*)malloc(msize * msize * sizeof(float));
	C = (float*)malloc(msize * msize * sizeof(float));

	// for verification
	if( argc == 5){
		for( i = 0; i < msize; i++){
			for( j = 0; j < msize; j++){
				A[i * msize + j] = (float)1;
				B[i * msize + j] = (float)1;
			}
		}
	}
	else{
		for( i = 0; i < msize; i++){
			for ( j = 0; j < msize; j++){
				srand(time(NULL));
				A[ i * msize + j] = (float)(rand()%2);
				srand(time(NULL));
				B[ i * msize + j] = (float)(rand()%2);
			}
		}
	}

	cudaMalloc((void**)&Ad, msize * msize * sizeof(float));
	cudaMalloc((void**)&Bd, msize * msize * sizeof(float));
	cudaMalloc((void**)&Cd, msize * msize * sizeof(float));
	
	cudaMemcpy(Ad, A, msize * msize * sizeof(float), cudaMemcpyHostToDevice);
	cudaMemcpy(Bd, B, msize * msize * sizeof(float), cudaMemcpyHostToDevice);

	dim3 dimGrid((msize/tile), (msize/tile));
	dim3 dimBlock((tile/task), (tile/task));

	mul<<<dimGrid, dimBlock>>> (Ad, Bd, Cd, msize, tile, task);

	cudaMemcpy(C, Cd, msize * msize * sizeof(float), cudaMemcpyDeviceToHost);

	//print out the verification result
	int hoosh = 0;
	if( argc == 5){
		printf("\n=================== V =========================\n");
		for ( i = 0; i < msize; i++){
			printf("\n");
			for( j = 0; j < msize; j++){
				printf("%.2f ", C[i * msize + j]);
				if ( C[i * msize + j] != msize)
					hoosh++;
			}
		}

		printf("\n hoosh = %d \n", hoosh);
		if( hoosh != 0 )
			printf("\n YOU JUST DRIVING ME CRAZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZY\n");
		else
			printf("\n GOOD! ONLY ONE MORE TO GO!!! BIG BIG : ) \n");

	}

	free(A); free(B); free(C);
	cudaFree(Ad);cudaFree(Bd);cudaFree(Cd);

	printf( " \n msize: %d\t tilewidth: %d\t task: %d\t timeElapsed: %f\n", msize, tile, task, ((double)(clock()-start)/CLOCKS_PER_SEC));
	return 1;
}

__global__ void mul( float *Ad, float *Bd, float *Cd, int msize, int tile, int task){

	int tx, ty;
	int r, c;
	float Cv;
	int m;

	for ( tx = 0; tx < task; tx++){
		for ( ty = 0; ty < task; ty++){
			r = blockIdx.y * tile + threadIdx.y * task + ty;
			c = blockIdx.x * tile + threadIdx.x * task + tx;
			Cv = (float)0;
			for ( m = 0; m < msize; m++){
				Cv += Ad[ r * msize + m] * Bd[ m * msize + c];
			}
			Cd[ r * msize + c] = Cv;
		}
	}
}	

	.file	"tmpxft_002e8b3e_00000000-6_gpu3.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z29__device_stub__Z3mulPfS_S_iiiPfS_S_iii
	.type	_Z29__device_stub__Z3mulPfS_S_iiiPfS_S_iii, @function
_Z29__device_stub__Z3mulPfS_S_iiiPfS_S_iii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z3mulPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z29__device_stub__Z3mulPfS_S_iiiPfS_S_iii, .-_Z29__device_stub__Z3mulPfS_S_iiiPfS_S_iii
	.globl	_Z3mulPfS_S_iii
	.type	_Z3mulPfS_S_iii, @function
_Z3mulPfS_S_iii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z3mulPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2053:
	.size	_Z3mulPfS_S_iii, .-_Z3mulPfS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"\n=================== V =========================\n"
.LC2:
	.string	"\n"
.LC3:
	.string	"%.2f "
.LC4:
	.string	"\n hoosh = %d \n"
.LC5:
	.string	"\n YOU JUST DRIVING ME CRAZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZY\n"
.LC6:
	.string	"\n GOOD! ONLY ONE MORE TO GO!!! BIG BIG : ) \n"
.LC8:
	.string	" \n msize: %d\t tilewidth: %d\t task: %d\t timeElapsed: %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%edi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	call	clock@PLT
	movq	8(%rbp), %rdi
	movq	%rax, 40(%rsp)
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	movq	24(%rbp), %rdi
	movl	%eax, 24(%rsp)
	call	atoi@PLT
	movl	%eax, 28(%rsp)
	movl	%ebx, %eax
	imull	%ebx, %eax
	cltq
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r15
	call	malloc@PLT
	cmpl	$5, %r13d
	movq	%rax, 32(%rsp)
	movslq	%ebx, %rax
	je	.L9
	salq	$2, %rax
	xorl	%esi, %esi
	xorl	%r14d, %r14d
	movq	%rax, 48(%rsp)
	jmp	.L10
.L9:
	movss	.LC0(%rip), %xmm0
	salq	$2, %rax
	xorl	%esi, %esi
	xorl	%ecx, %ecx
.L11:
	cmpl	%ebx, %ecx
	jge	.L16
	movq	%rsi, %rdx
	xorl	%edi, %edi
.L12:
	movq	16(%rsp), %r10
	incl	%edi
	movss	%xmm0, (%r15,%rdx)
	movss	%xmm0, (%r10,%rdx)
	addq	$4, %rdx
	cmpl	%edi, %ebx
	jne	.L12
	incl	%ecx
	addq	%rax, %rsi
	jmp	.L11
.L16:
	movq	8(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	80(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	88(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	72(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	80(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebx, %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cltd
	movl	$1, %ecx
	movl	$1, %esi
	idivl	24(%rsp)
	movl	%eax, 96(%rsp)
	movl	%eax, 100(%rsp)
	movl	24(%rsp), %eax
	movq	96(%rsp), %rdi
	cltd
	idivl	28(%rsp)
	movl	%eax, 108(%rsp)
	movl	%eax, 112(%rsp)
	movq	108(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	movl	28(%rsp), %r9d
	movl	24(%rsp), %r8d
	movl	%ebx, %ecx
	movq	88(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	72(%rsp), %rdi
	call	_Z29__device_stub__Z3mulPfS_S_iiiPfS_S_iii
	jmp	.L13
.L15:
	xorl	%edi, %edi
	movq	%rsi, 56(%rsp)
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	call	rand@PLT
	movl	$2, %ecx
	xorl	%edi, %edi
	cltd
	idivl	%ecx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%r12,%rbp,4)
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	call	rand@PLT
	movl	$2, %ecx
	movq	56(%rsp), %rsi
	cltd
	idivl	%ecx
	leaq	(%r15,%rsi), %rdi
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%rdi,%rbp,4)
	incq	%rbp
	cmpl	%ebp, %ebx
	jg	.L15
	movq	48(%rsp), %rax
	incl	%r14d
	addq	%rax, %rsi
.L10:
	cmpl	%ebx, %r14d
	jge	.L16
	movq	16(%rsp), %rax
	xorl	%ebp, %ebp
	leaq	(%rax,%rsi), %r12
	jmp	.L15
.L13:
	movq	8(%rsp), %rdx
	movq	88(%rsp), %rsi
	movl	$2, %ecx
	movq	32(%rsp), %rdi
	call	cudaMemcpy@PLT
	cmpl	$5, %r13d
	jne	.L17
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebp, %ebp
	call	__printf_chk@PLT
	movslq	%ebx, %r13
	movq	32(%rsp), %r14
	xorl	%r12d, %r12d
	leaq	0(,%r13,4), %rax
	movq	%rax, 8(%rsp)
.L18:
	cmpl	%ebx, %r12d
	jge	.L34
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r13d, %r13d
	call	__printf_chk@PLT
	movq	%r14, %rdx
.L21:
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC3(%rip), %rsi
	cvtss2sd	(%rdx), %xmm0
	movq	%rdx, 48(%rsp)
	call	__printf_chk@PLT
	movq	48(%rsp), %rdx
	cvtsi2ssl	%ebx, %xmm0
	ucomiss	(%rdx), %xmm0
	jp	.L27
	je	.L19
.L27:
	incl	%ebp
.L19:
	incl	%r13d
	addq	$4, %rdx
	cmpl	%r13d, %ebx
	jne	.L21
	movq	8(%rsp), %rax
	incl	%r12d
	addq	%rax, %r14
	jmp	.L18
.L34:
	leaq	.LC4(%rip), %rsi
	movl	%ebp, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC5(%rip), %rsi
	testl	%ebp, %ebp
	jne	.L33
	leaq	.LC6(%rip), %rsi
.L33:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L17:
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	%r15, %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	free@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	call	clock@PLT
	movq	40(%rsp), %rcx
	movl	%ebx, %edx
	movl	28(%rsp), %r8d
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	subq	%rcx, %rax
	movl	24(%rsp), %ecx
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC7(%rip), %xmm0
	call	__printf_chk@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	movl	$1, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z3mulPfS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z3mulPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC7:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>
#include <time.h>
#include <stdlib.h>
#include <string.h>

__global__ void mul( float *Ad, float *Bd, float *Cd, int msize, int tile, int task);

int main( int argc, char **argv){

	// argv[0]: name, argv[1]: msize, argv[2]: tile_width/ per block, argv[3]: task per thread, argv[4]: isVerification
	clock_t start = clock();
	int i, j;
	int msize = atoi(argv[1]);
	int tile = atoi(argv[2]);
	int task = atoi(argv[3]);

	float *A, *B, *C;
	float *Ad, *Bd, *Cd;

	A = (float*)malloc(msize * msize * sizeof(float));
	B = (float*)malloc(msize * msize * sizeof(float));
	C = (float*)malloc(msize * msize * sizeof(float));

	// for verification
	if( argc == 5){
		for( i = 0; i < msize; i++){
			for( j = 0; j < msize; j++){
				A[i * msize + j] = (float)1;
				B[i * msize + j] = (float)1;
			}
		}
	}
	else{
		for( i = 0; i < msize; i++){
			for ( j = 0; j < msize; j++){
				srand(time(NULL));
				A[ i * msize + j] = (float)(rand()%2);
				srand(time(NULL));
				B[ i * msize + j] = (float)(rand()%2);
			}
		}
	}

	hipMalloc((void**)&Ad, msize * msize * sizeof(float));
	hipMalloc((void**)&Bd, msize * msize * sizeof(float));
	hipMalloc((void**)&Cd, msize * msize * sizeof(float));
	
	hipMemcpy(Ad, A, msize * msize * sizeof(float), hipMemcpyHostToDevice);
	hipMemcpy(Bd, B, msize * msize * sizeof(float), hipMemcpyHostToDevice);

	dim3 dimGrid((msize/tile), (msize/tile));
	dim3 dimBlock((tile/task), (tile/task));

	mul<<<dimGrid, dimBlock>>> (Ad, Bd, Cd, msize, tile, task);

	hipMemcpy(C, Cd, msize * msize * sizeof(float), hipMemcpyDeviceToHost);

	//print out the verification result
	int hoosh = 0;
	if( argc == 5){
		printf("\n=================== V =========================\n");
		for ( i = 0; i < msize; i++){
			printf("\n");
			for( j = 0; j < msize; j++){
				printf("%.2f ", C[i * msize + j]);
				if ( C[i * msize + j] != msize)
					hoosh++;
			}
		}

		printf("\n hoosh = %d \n", hoosh);
		if( hoosh != 0 )
			printf("\n YOU JUST DRIVING ME CRAZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZY\n");
		else
			printf("\n GOOD! ONLY ONE MORE TO GO!!! BIG BIG : ) \n");

	}

	free(A); free(B); free(C);
	hipFree(Ad);hipFree(Bd);hipFree(Cd);

	printf( " \n msize: %d\t tilewidth: %d\t task: %d\t timeElapsed: %f\n", msize, tile, task, ((double)(clock()-start)/CLOCKS_PER_SEC));
	return 1;
}

__global__ void mul( float *Ad, float *Bd, float *Cd, int msize, int tile, int task){

	int tx, ty;
	int r, c;
	float Cv;
	int m;

	for ( tx = 0; tx < task; tx++){
		for ( ty = 0; ty < task; ty++){
			r = blockIdx.y * tile + threadIdx.y * task + ty;
			c = blockIdx.x * tile + threadIdx.x * task + tx;
			Cv = (float)0;
			for ( m = 0; m < msize; m++){
				Cv += Ad[ r * msize + m] * Bd[ m * msize + c];
			}
			Cd[ r * msize + c] = Cv;
		}
	}
}	

	.text
	.file	"gpu3.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI0_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movl	%edi, %r15d
	callq	clock
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movq	8(%r14), %rdi
	callq	atoi
	movl	%eax, %r13d
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	24(%r14), %rdi
	callq	atoi
	movl	%eax, %ebp
	movl	%r13d, %r14d
	imull	%r14d, %r14d
	shlq	$2, %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r14, 72(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movl	%r15d, 8(%rsp)                  # 4-byte Spill
	cmpl	$5, %r15d
	movl	%r13d, 20(%rsp)                 # 4-byte Spill
	movl	%ebx, 16(%rsp)                  # 4-byte Spill
	movl	%ebp, 12(%rsp)                  # 4-byte Spill
	jne	.LBB0_1
# %bb.6:                                # %.preheader108
	testl	%r13d, %r13d
	jle	.LBB0_11
# %bb.7:                                # %.preheader.lr.ph
	movl	%r13d, %eax
	xorl	%ecx, %ecx
	movl	$1065353216, %edx               # imm = 0x3F800000
	xorl	%esi, %esi
.LBB0_8:                                # %.lr.ph115
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_9 Depth 2
	movl	%ecx, %r8d
	leaq	(%r12,%r8,4), %rdi
	movq	24(%rsp), %r9                   # 8-byte Reload
	leaq	(%r9,%r8,4), %r8
	xorl	%r9d, %r9d
.LBB0_9:                                #   Parent Loop BB0_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%edx, (%r8,%r9,4)
	movl	%edx, (%rdi,%r9,4)
	incq	%r9
	cmpq	%r9, %rax
	jne	.LBB0_9
# %bb.10:                               # %._crit_edge116
                                        #   in Loop: Header=BB0_8 Depth=1
	incq	%rsi
	addl	%r13d, %ecx
	cmpq	%rax, %rsi
	jne	.LBB0_8
	jmp	.LBB0_11
.LBB0_1:                                # %.preheader110
	testl	%r13d, %r13d
	jle	.LBB0_11
# %bb.2:                                # %.preheader109.lr.ph
	movl	%r13d, %ebp
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
	movq	%r12, 32(%rsp)                  # 8-byte Spill
.LBB0_3:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
	movl	%r14d, %eax
	leaq	(%r12,%rax,4), %r12
	movq	24(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r13
	xorl	%ebx, %ebx
.LBB0_4:                                #   Parent Loop BB0_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	callq	rand
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	andl	$-2, %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r13,%rbx,4)
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	callq	rand
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	andl	$-2, %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	cmpq	%rbx, %rbp
	jne	.LBB0_4
# %bb.5:                                # %._crit_edge
                                        #   in Loop: Header=BB0_3 Depth=1
	incq	%r15
	movl	20(%rsp), %r13d                 # 4-byte Reload
	addl	%r13d, %r14d
	cmpq	%rbp, %r15
	movq	32(%rsp), %r12                  # 8-byte Reload
	jne	.LBB0_3
.LBB0_11:                               # %.loopexit
	leaq	64(%rsp), %rbp
	movq	%rbp, %rdi
	movq	72(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	56(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movq	%r12, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%r13d, %eax
	cltd
	movl	16(%rsp), %ebx                  # 4-byte Reload
	idivl	%ebx
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, %rdi
	shlq	$32, %rdi
	orq	%rax, %rdi
	movl	%ebx, %eax
	cltd
	movl	12(%rsp), %ebp                  # 4-byte Reload
	idivl	%ebp
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, %rdx
	shlq	$32, %rdx
	orq	%rax, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_13
# %bb.12:
	movq	64(%rsp), %rdi
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdx
	movl	%r13d, %ecx
	movl	%ebx, %r8d
	movl	%ebp, %r9d
	callq	_Z18__device_stub__mulPfS_S_iii
.LBB0_13:
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$5, 8(%rsp)                     # 4-byte Folded Reload
	jne	.LBB0_23
# %bb.14:
	movl	$.Lstr, %edi
	callq	puts@PLT
	testl	%r13d, %r13d
	jle	.LBB0_15
# %bb.16:                               # %.lr.ph126
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	cvtsi2ss	%r13d, %xmm0
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	movl	%r13d, %r14d
	xorl	%ebx, %ebx
	xorl	%r12d, %r12d
	xorl	%r15d, %r15d
.LBB0_17:                               # %.lr.ph121
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_18 Depth 2
	movl	%ebx, %eax
	movq	40(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r13
	movl	$10, %edi
	callq	putchar@PLT
	xorl	%ebp, %ebp
.LBB0_18:                               #   Parent Loop BB0_17 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13,%rbp,4), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movss	(%r13,%rbp,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	cmpneqss	8(%rsp), %xmm0                  # 4-byte Folded Reload
	movd	%xmm0, %eax
	subl	%eax, %r15d
	incq	%rbp
	cmpq	%rbp, %r14
	jne	.LBB0_18
# %bb.19:                               # %._crit_edge122
                                        #   in Loop: Header=BB0_17 Depth=1
	incq	%r12
	movl	20(%rsp), %r13d                 # 4-byte Reload
	addl	%r13d, %ebx
	cmpq	%r14, %r12
	jne	.LBB0_17
# %bb.20:                               # %._crit_edge127
	movl	$.L.str.3, %edi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.2, %edi
	testl	%r15d, %r15d
	movl	16(%rsp), %ebx                  # 4-byte Reload
	movl	12(%rsp), %ebp                  # 4-byte Reload
	movq	32(%rsp), %r12                  # 8-byte Reload
	jne	.LBB0_22
	jmp	.LBB0_21
.LBB0_15:                               # %._crit_edge127.thread
	movl	$.L.str.3, %edi
	xorl	%esi, %esi
	xorl	%eax, %eax
	callq	printf
.LBB0_21:
	movl	$.Lstr.1, %edi
.LBB0_22:                               # %.sink.split
	callq	puts@PLT
.LBB0_23:
	movq	24(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	40(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	callq	clock
	subq	80(%rsp), %rax                  # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI0_0(%rip), %xmm0
	movl	$.L.str.6, %edi
	movl	%r13d, %esi
	movl	%ebx, %edx
	movl	%ebp, %ecx
	movb	$1, %al
	callq	printf
	movl	$1, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__mulPfS_S_iii # -- Begin function _Z18__device_stub__mulPfS_S_iii
	.type	_Z18__device_stub__mulPfS_S_iii,@function
_Z18__device_stub__mulPfS_S_iii:        # @_Z18__device_stub__mulPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3mulPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z18__device_stub__mulPfS_S_iii, .Lfunc_end1-_Z18__device_stub__mulPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3mulPfS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z3mulPfS_S_iii,@object         # @_Z3mulPfS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z3mulPfS_S_iii
	.p2align	3, 0x0
_Z3mulPfS_S_iii:
	.quad	_Z18__device_stub__mulPfS_S_iii
	.size	_Z3mulPfS_S_iii, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"%.2f "
	.size	.L.str.2, 6

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\n hoosh = %d \n"
	.size	.L.str.3, 15

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	" \n msize: %d\t tilewidth: %d\t task: %d\t timeElapsed: %f\n"
	.size	.L.str.6, 56

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3mulPfS_S_iii"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\n=================== V ========================="
	.size	.Lstr, 49

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\n GOOD! ONLY ONE MORE TO GO!!! BIG BIG : ) "
	.size	.Lstr.1, 44

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"\n YOU JUST DRIVING ME CRAZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZY"
	.size	.Lstr.2, 72

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__mulPfS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3mulPfS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3mulPfS_S_iii         ; -- Begin function _Z3mulPfS_S_iii
	.globl	_Z3mulPfS_S_iii
	.p2align	8
	.type	_Z3mulPfS_S_iii,@function
_Z3mulPfS_S_iii:                        ; @_Z3mulPfS_S_iii
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB0_9
; %bb.1:                                ; %.preheader.lr.ph
	v_bfe_u32 v2, v0, 10, 10
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_mul_i32 s0, s15, s5
	v_and_b32_e32 v3, 0x3ff, v0
	s_cmp_gt_i32 s4, 0
	v_mad_u64_u32 v[0:1], null, v2, s6, s[0:1]
	s_mul_i32 s0, s14, s5
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, v3, s6, s[0:1]
	s_cselect_b32 s0, -1, 0
	s_ashr_i32 s5, s4, 31
	v_cndmask_b32_e64 v2, 0, 1, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v11, s4, v0
	s_mov_b32 s1, 0
	s_lshl_b64 s[12:13], s[4:5], 2
	v_cmp_ne_u32_e64 s0, 1, v2
	v_mov_b32_e32 v2, v1
.LBB0_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;       Child Loop BB0_5 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v3, 31, v2
	s_mov_b32 s5, 0
	v_mov_b32_e32 v6, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	v_add_nc_u32_e32 v3, s1, v1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s10, v4
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_5 Depth 3
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_6
; %bb.4:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_3 Depth=2
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mov_b32_e32 v10, v5
	v_dual_mov_b32 v12, 0 :: v_dual_mov_b32 v9, v4
	s_mov_b32 s7, s4
	v_lshlrev_b64 v[7:8], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
.LBB0_5:                                ; %.lr.ph
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v13, v[7:8], off
	global_load_b32 v14, v[9:10], off
	v_add_co_u32 v9, vcc_lo, v9, s12
	v_add_co_ci_u32_e32 v10, vcc_lo, s13, v10, vcc_lo
	v_add_co_u32 v7, vcc_lo, v7, 4
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	s_add_i32 s7, s7, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s7, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v12, v13, v14
	s_cbranch_scc1 .LBB0_5
	s_branch .LBB0_7
.LBB0_6:                                ;   in Loop: Header=BB0_3 Depth=2
	v_mov_b32_e32 v12, 0
.LBB0_7:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_3 Depth=2
	v_add_nc_u32_e32 v9, s5, v0
	v_add_nc_u32_e32 v6, s4, v6
	s_add_i32 s5, s5, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_lg_u32 s5, s6
	v_mad_u64_u32 v[7:8], null, v9, s4, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s2, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo
	global_store_b32 v[7:8], v12, off
	s_cbranch_scc1 .LBB0_3
; %bb.8:                                ; %._crit_edge40
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v2, 1, v2
	s_add_i32 s1, s1, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s1, s6
	s_cbranch_scc1 .LBB0_2
.LBB0_9:                                ; %._crit_edge42
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3mulPfS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3mulPfS_S_iii, .Lfunc_end0-_Z3mulPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 420
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3mulPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3mulPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
