 /*
 module load cudatoolkit
qsub -q gpu -l nodes=1:ppn=1,walltime=00:20:00 -I
nvcc matrixTranspose.cu
*/


#include <stdio.h>
#define DIM 32 

__global__ void transposeNaive(double *odata, const double *idata,int BLOCK_ROWS)
{
  int x = blockIdx.x * DIM + threadIdx.x;
  int y = blockIdx.y * DIM + threadIdx.y;
  int width = gridDim.x * DIM;

  for (int j = 0; j < DIM; j+= BLOCK_ROWS)
    odata[x*width + (y+j)] = idata[(y+j)*width + x];
}

__global__ void transposeFast(double *odata, double *idata, int size_x, int size_y, int BLOCK_ROWS)
{
  __shared__ double tile[DIM][DIM];

  int xIndex = blockIdx.x * DIM + threadIdx.x;
  int yIndex = blockIdx.y * DIM + threadIdx.y;
  int index_in = xIndex + (yIndex) * size_x;

  xIndex = blockIdx.y * DIM + threadIdx.x;
  yIndex = blockIdx.x * DIM + threadIdx.y;
  int index_out = xIndex + (yIndex)* size_y;

  for (int i = 0; i < DIM; i+=BLOCK_ROWS) {
    tile[threadIdx.y+i][threadIdx.x] = idata[index_in+i*size_x];
  }
  __syncthreads();

  for (int  i = 0; i < DIM; i+=BLOCK_ROWS) {
    odata[index_out+i*size_y] = tile[threadIdx.x][threadIdx.y+i];
  }
}

int main(int argc, char const *argv[]) {

  const int size_x = 8192;
  const int size_y = 8192;

  int BLOCK_ROWS = argc>=2 ? atoi(argv[1]) : 2; // default case: 2 --> 64 threads

  //execution configuration parameters
  dim3 grid(size_x/DIM, size_y/DIM);
  dim3 block (DIM, BLOCK_ROWS);

  //size of memory required to store the matrix
  const int mem_size = sizeof(double) * size_x*size_y;

  //allocate host memory
  double *h_idata = (double*) malloc(mem_size);
  double *h_odata = (double*) malloc(mem_size);

  //allocate device memory
  double *d_idata;
  double *d_odata;
  cudaMalloc((void**) &d_idata, mem_size);
  cudaMalloc((void**) &d_odata, mem_size);

  // objects to timing
  cudaEvent_t start, stop;
  cudaEventCreate(&start);
  cudaEventCreate(&stop);

  //initialize host data
  for (int i = 0; i < (size_x*size_y); i++)
    h_idata[i] = (double) i;

  //copy host data to device
  cudaMemcpy(d_idata, h_idata, mem_size, cudaMemcpyHostToDevice);

  printf("\nMatrix size: %dx%d, block: %dx%d, nthreads: %d\n",size_x,size_y, DIM, BLOCK_ROWS, BLOCK_ROWS*DIM );

  /****** Naive transpose ******/
  cudaEventRecord(start, 0);
  transposeNaive<<<grid,block>>>(d_idata, d_odata, BLOCK_ROWS);
  cudaEventRecord(stop, 0);
  cudaEventSynchronize(stop);
  float elapsTimeNaive;
  cudaEventElapsedTime(&elapsTimeNaive, start, stop);
  cudaMemcpy(h_odata, d_odata, mem_size, cudaMemcpyDeviceToHost);

  //the bandwidth is twice the size of the matrix divided by the time execution
  float bandNaive = (2 * mem_size) / elapsTimeNaive/1e6;
  printf("Naive bandwidth = %f, time = %f\n",bandNaive,elapsTimeNaive );

  /****** Fast transpose ******/
  cudaEventRecord(start, 0);
  transposeFast<<<grid,block>>>(d_idata, d_odata, size_x,size_y,BLOCK_ROWS);
  cudaEventRecord(stop, 0);
  cudaEventSynchronize(stop);
  float elapsTimeFast;
  cudaEventElapsedTime(&elapsTimeFast, start, stop);
  cudaMemcpy(h_odata, d_odata, mem_size, cudaMemcpyDeviceToHost);

  //the bandwidth is twice the size of the matrix divided by the time execution
  float bandFast = (2 * mem_size) / elapsTimeFast/1e6;
  printf("Fast bandwidth = %f, time = %f\n",bandFast,elapsTimeFast );

  //free memory
  free(h_idata);
  free(h_odata);
  cudaFree(d_idata);
  cudaFree(d_odata);

  return 0;
}

	.file	"tmpxft_002cc27e_00000000-6_matrixTranspose.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z38__device_stub__Z14transposeNaivePdPKdiPdPKdi
	.type	_Z38__device_stub__Z14transposeNaivePdPKdiPdPKdi, @function
_Z38__device_stub__Z14transposeNaivePdPKdiPdPKdi:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z14transposeNaivePdPKdi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z38__device_stub__Z14transposeNaivePdPKdiPdPKdi, .-_Z38__device_stub__Z14transposeNaivePdPKdiPdPKdi
	.globl	_Z14transposeNaivePdPKdi
	.type	_Z14transposeNaivePdPKdi, @function
_Z14transposeNaivePdPKdi:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z14transposeNaivePdPKdiPdPKdi
	.cfi_endproc
.LFE2053:
	.size	_Z14transposeNaivePdPKdi, .-_Z14transposeNaivePdPKdi
	.globl	_Z38__device_stub__Z13transposeFastPdS_iiiPdS_iii
	.type	_Z38__device_stub__Z13transposeFastPdS_iiiPdS_iii, @function
_Z38__device_stub__Z13transposeFastPdS_iiiPdS_iii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z13transposeFastPdS_iii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z38__device_stub__Z13transposeFastPdS_iiiPdS_iii, .-_Z38__device_stub__Z13transposeFastPdS_iiiPdS_iii
	.globl	_Z13transposeFastPdS_iii
	.type	_Z13transposeFastPdS_iii, @function
_Z13transposeFastPdS_iii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z13transposeFastPdS_iiiPdS_iii
	.cfi_endproc
.LFE2055:
	.size	_Z13transposeFastPdS_iii, .-_Z13transposeFastPdS_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\nMatrix size: %dx%d, block: %dx%d, nthreads: %d\n"
.LC3:
	.string	"Naive bandwidth = %f, time = %f\n"
.LC4:
	.string	"Fast bandwidth = %f, time = %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	$2, %ebx
	subq	$80, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	decl	%edi
	jle	.L14
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movl	%eax, %ebx
.L14:
	movabsq	$1099511628032, %rax
	movl	$536870912, %edi
	movl	%ebx, 64(%rsp)
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movl	$32, 60(%rsp)
	movl	$1, 68(%rsp)
	call	malloc@PLT
	movl	$536870912, %edi
	movq	%rax, %r12
	call	malloc@PLT
	leaq	16(%rsp), %rdi
	movl	$536870912, %esi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	movl	$536870912, %esi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	xorl	%eax, %eax
.L15:
	cvtsi2sdl	%eax, %xmm0
	movsd	%xmm0, (%r12,%rax,8)
	incq	%rax
	cmpq	$67108864, %rax
	jne	.L15
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movl	$536870912, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	%ebx, %r9d
	movl	$32, %r8d
	movl	$8192, %ecx
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	%ebx, %eax
	movl	$8192, %edx
	leaq	.LC0(%rip), %rsi
	sall	$5, %eax
	movl	$2, %edi
	pushq	%rax
	.cfi_def_cfa_offset 128
	xorl	%eax, %eax
	call	__printf_chk@PLT
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
	xorl	%esi, %esi
	movq	32(%rsp), %rdi
	call	cudaEventRecord@PLT
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %edx
	call	_Z38__device_stub__Z14transposeNaivePdPKdiPdPKdi
.L16:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	8(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$536870912, %edx
	call	cudaMemcpy@PLT
	movss	8(%rsp), %xmm1
	movl	$2, %edi
	movb	$2, %al
	movss	.LC1(%rip), %xmm0
	leaq	.LC3(%rip), %rsi
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm1, %xmm1
	divss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	xorl	%esi, %esi
	movq	32(%rsp), %rdi
	call	cudaEventRecord@PLT
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebx, %r8d
	movl	$8192, %ecx
	movl	$8192, %edx
	call	_Z38__device_stub__Z13transposeFastPdS_iiiPdS_iii
.L17:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	12(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$536870912, %edx
	call	cudaMemcpy@PLT
	movss	12(%rsp), %xmm1
	movl	$2, %edi
	movb	$2, %al
	movss	.LC1(%rip), %xmm0
	leaq	.LC4(%rip), %rsi
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm1, %xmm1
	divss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$80, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z13transposeFastPdS_iii"
.LC6:
	.string	"_Z14transposeNaivePdPKdi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13transposeFastPdS_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14transposeNaivePdPKdi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1317011456
	.align 4
.LC2:
	.long	1232348160
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

 /*
 module load cudatoolkit
qsub -q gpu -l nodes=1:ppn=1,walltime=00:20:00 -I
nvcc matrixTranspose.cu
*/



#include <hip/hip_runtime.h>
#include <stdio.h>
#define DIM 32 

__global__ void transposeNaive(double *odata, const double *idata,int BLOCK_ROWS)
{
  int x = blockIdx.x * DIM + threadIdx.x;
  int y = blockIdx.y * DIM + threadIdx.y;
  int width = gridDim.x * DIM;

  for (int j = 0; j < DIM; j+= BLOCK_ROWS)
    odata[x*width + (y+j)] = idata[(y+j)*width + x];
}

__global__ void transposeFast(double *odata, double *idata, int size_x, int size_y, int BLOCK_ROWS)
{
  __shared__ double tile[DIM][DIM];

  int xIndex = blockIdx.x * DIM + threadIdx.x;
  int yIndex = blockIdx.y * DIM + threadIdx.y;
  int index_in = xIndex + (yIndex) * size_x;

  xIndex = blockIdx.y * DIM + threadIdx.x;
  yIndex = blockIdx.x * DIM + threadIdx.y;
  int index_out = xIndex + (yIndex)* size_y;

  for (int i = 0; i < DIM; i+=BLOCK_ROWS) {
    tile[threadIdx.y+i][threadIdx.x] = idata[index_in+i*size_x];
  }
  __syncthreads();

  for (int  i = 0; i < DIM; i+=BLOCK_ROWS) {
    odata[index_out+i*size_y] = tile[threadIdx.x][threadIdx.y+i];
  }
}

int main(int argc, char const *argv[]) {

  const int size_x = 8192;
  const int size_y = 8192;

  int BLOCK_ROWS = argc>=2 ? atoi(argv[1]) : 2; // default case: 2 --> 64 threads

  //execution configuration parameters
  dim3 grid(size_x/DIM, size_y/DIM);
  dim3 block (DIM, BLOCK_ROWS);

  //size of memory required to store the matrix
  const int mem_size = sizeof(double) * size_x*size_y;

  //allocate host memory
  double *h_idata = (double*) malloc(mem_size);
  double *h_odata = (double*) malloc(mem_size);

  //allocate device memory
  double *d_idata;
  double *d_odata;
  hipMalloc((void**) &d_idata, mem_size);
  hipMalloc((void**) &d_odata, mem_size);

  // objects to timing
  hipEvent_t start, stop;
  hipEventCreate(&start);
  hipEventCreate(&stop);

  //initialize host data
  for (int i = 0; i < (size_x*size_y); i++)
    h_idata[i] = (double) i;

  //copy host data to device
  hipMemcpy(d_idata, h_idata, mem_size, hipMemcpyHostToDevice);

  printf("\nMatrix size: %dx%d, block: %dx%d, nthreads: %d\n",size_x,size_y, DIM, BLOCK_ROWS, BLOCK_ROWS*DIM );

  /****** Naive transpose ******/
  hipEventRecord(start, 0);
  transposeNaive<<<grid,block>>>(d_idata, d_odata, BLOCK_ROWS);
  hipEventRecord(stop, 0);
  hipEventSynchronize(stop);
  float elapsTimeNaive;
  hipEventElapsedTime(&elapsTimeNaive, start, stop);
  hipMemcpy(h_odata, d_odata, mem_size, hipMemcpyDeviceToHost);

  //the bandwidth is twice the size of the matrix divided by the time execution
  float bandNaive = (2 * mem_size) / elapsTimeNaive/1e6;
  printf("Naive bandwidth = %f, time = %f\n",bandNaive,elapsTimeNaive );

  /****** Fast transpose ******/
  hipEventRecord(start, 0);
  transposeFast<<<grid,block>>>(d_idata, d_odata, size_x,size_y,BLOCK_ROWS);
  hipEventRecord(stop, 0);
  hipEventSynchronize(stop);
  float elapsTimeFast;
  hipEventElapsedTime(&elapsTimeFast, start, stop);
  hipMemcpy(h_odata, d_odata, mem_size, hipMemcpyDeviceToHost);

  //the bandwidth is twice the size of the matrix divided by the time execution
  float bandFast = (2 * mem_size) / elapsTimeFast/1e6;
  printf("Fast bandwidth = %f, time = %f\n",bandFast,elapsTimeFast );

  //free memory
  free(h_idata);
  free(h_odata);
  hipFree(d_idata);
  hipFree(d_odata);

  return 0;
}

	.text
	.file	"matrixTranspose.hip"
	.globl	_Z29__device_stub__transposeNaivePdPKdi # -- Begin function _Z29__device_stub__transposeNaivePdPKdi
	.type	_Z29__device_stub__transposeNaivePdPKdi,@function
_Z29__device_stub__transposeNaivePdPKdi: # @_Z29__device_stub__transposeNaivePdPKdi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14transposeNaivePdPKdi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__transposeNaivePdPKdi, .Lfunc_end0-_Z29__device_stub__transposeNaivePdPKdi
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__transposeFastPdS_iii # -- Begin function _Z28__device_stub__transposeFastPdS_iii
	.type	_Z28__device_stub__transposeFastPdS_iii,@function
_Z28__device_stub__transposeFastPdS_iii: # @_Z28__device_stub__transposeFastPdS_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13transposeFastPdS_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z28__device_stub__transposeFastPdS_iii, .Lfunc_end1-_Z28__device_stub__transposeFastPdS_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x4e800000                      # float 1.07374182E+9
.LCPI2_1:
	.long	0x49742400                      # float 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$2, %r15d
	cmpl	$2, %edi
	jl	.LBB2_2
# %bb.1:
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r15d
.LBB2_2:
	movq	%r15, %r12
	shlq	$32, %r12
	movl	$536870912, %edi                # imm = 0x20000000
	callq	malloc
	movq	%rax, %rbx
	movl	$536870912, %edi                # imm = 0x20000000
	callq	malloc
	movq	%rax, %r14
	leaq	24(%rsp), %rdi
	movl	$536870912, %esi                # imm = 0x20000000
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$536870912, %esi                # imm = 0x20000000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	xorl	%eax, %eax
.LBB2_3:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	%xmm0, (%rbx,%rax,8)
	incq	%rax
	cmpq	$67108864, %rax                 # imm = 0x4000000
	jne	.LBB2_3
# %bb.4:
	movabsq	$1099511628032, %r13            # imm = 0x10000000100
	orq	$32, %r12
	movq	24(%rsp), %rdi
	movl	$536870912, %edx                # imm = 0x20000000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%r15d, %r9d
	shll	$5, %r9d
	movl	$.L.str, %edi
	movl	$8192, %esi                     # imm = 0x2000
	movl	$8192, %edx                     # imm = 0x2000
	movl	$32, %ecx
	movl	%r15d, %r8d
	xorl	%eax, %eax
	callq	printf
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	24(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	%r15d, %edx
	callq	_Z29__device_stub__transposeNaivePdPKdi
.LBB2_6:
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	36(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipEventElapsedTime
	movq	8(%rsp), %rsi
	movl	$536870912, %edx                # imm = 0x20000000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movss	(%rbp), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	movss	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	divss	%xmm1, %xmm0
	divss	.LCPI2_1(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	movl	$.L.str.1, %edi
	movb	$2, %al
	callq	printf
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.7:
	movq	24(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$8192, %edx                     # imm = 0x2000
	movl	$8192, %ecx                     # imm = 0x2000
	movl	%r15d, %r8d
	callq	_Z28__device_stub__transposeFastPdS_iii
.LBB2_8:
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	32(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	movq	8(%rsp), %rsi
	movl	$536870912, %edx                # imm = 0x20000000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movss	(%r15), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	movss	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	divss	%xmm1, %xmm0
	divss	.LCPI2_1(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	movl	$.L.str.2, %edi
	movb	$2, %al
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14transposeNaivePdPKdi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13transposeFastPdS_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14transposeNaivePdPKdi,@object # @_Z14transposeNaivePdPKdi
	.section	.rodata,"a",@progbits
	.globl	_Z14transposeNaivePdPKdi
	.p2align	3, 0x0
_Z14transposeNaivePdPKdi:
	.quad	_Z29__device_stub__transposeNaivePdPKdi
	.size	_Z14transposeNaivePdPKdi, 8

	.type	_Z13transposeFastPdS_iii,@object # @_Z13transposeFastPdS_iii
	.globl	_Z13transposeFastPdS_iii
	.p2align	3, 0x0
_Z13transposeFastPdS_iii:
	.quad	_Z28__device_stub__transposeFastPdS_iii
	.size	_Z13transposeFastPdS_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\nMatrix size: %dx%d, block: %dx%d, nthreads: %d\n"
	.size	.L.str, 49

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Naive bandwidth = %f, time = %f\n"
	.size	.L.str.1, 33

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Fast bandwidth = %f, time = %f\n"
	.size	.L.str.2, 32

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14transposeNaivePdPKdi"
	.size	.L__unnamed_1, 25

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13transposeFastPdS_iii"
	.size	.L__unnamed_2, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__transposeNaivePdPKdi
	.addrsig_sym _Z28__device_stub__transposeFastPdS_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14transposeNaivePdPKdi
	.addrsig_sym _Z13transposeFastPdS_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14transposeNaivePdPKdi ; -- Begin function _Z14transposeNaivePdPKdi
	.globl	_Z14transposeNaivePdPKdi
	.p2align	8
	.type	_Z14transposeNaivePdPKdi,@function
_Z14transposeNaivePdPKdi:               ; @_Z14transposeNaivePdPKdi
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x18
	s_load_b32 s4, s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_lshl_b32 s6, s14, 5
	s_lshl_b32 s7, s15, 5
	s_load_b128 s[0:3], s[0:1], 0x0
	v_add_nc_u32_e32 v2, s6, v1
	v_add_nc_u32_e32 v3, s7, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, s5, v2
	v_mul_lo_u32 v3, s5, v3
	s_mul_i32 s5, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_lshl_b32 s5, s5, 5
	v_lshlrev_b32_e32 v2, 5, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v3, 5, v3
	v_add3_u32 v2, v0, v2, s7
	s_delay_alu instid0(VALU_DEP_2)
	v_add3_u32 v0, v1, v3, s6
	s_mov_b32 s6, 0
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_nc_u32_e32 v5, s6, v2
	s_add_i32 s6, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_gt_i32 s6, 31
	v_lshlrev_b64 v[3:4], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	v_add_nc_u32_e32 v0, s5, v0
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, s0, v5
	global_load_b64 v[3:4], v[3:4], off
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[5:6], v[3:4], off
	s_cbranch_scc0 .LBB0_1
; %bb.2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14transposeNaivePdPKdi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14transposeNaivePdPKdi, .Lfunc_end0-_Z14transposeNaivePdPKdi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 248
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z13transposeFastPdS_iii ; -- Begin function _Z13transposeFastPdS_iii
	.globl	_Z13transposeFastPdS_iii
	.p2align	8
	.type	_Z13transposeFastPdS_iii,@function
_Z13transposeFastPdS_iii:               ; @_Z13transposeFastPdS_iii
; %bb.0:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_bfe_u32 v2, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshl_b32 s7, s15, 5
	v_and_b32_e32 v3, 0x3ff, v0
	s_lshl_b32 s8, s14, 5
	s_mov_b32 s10, 0
	v_add_nc_u32_e32 v1, s7, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, s4, v1
	v_lshlrev_b32_e32 v1, 3, v3
	s_lshl_b32 s9, s6, 8
	s_mul_i32 s4, s6, s4
	v_lshl_add_u32 v4, v2, 8, v1
	s_delay_alu instid0(VALU_DEP_3)
	v_add3_u32 v0, v3, v0, s8
.LBB1_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s10, s10, s6
	s_cmp_gt_i32 s10, 31
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 3, v[0:1]
	v_add_nc_u32_e32 v0, s4, v0
	v_add_co_u32 v5, vcc_lo, s2, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v4, v[5:6]
	v_add_nc_u32_e32 v4, s9, v4
	s_cbranch_scc0 .LBB1_1
; %bb.2:
	v_add_nc_u32_e32 v0, s8, v2
	v_lshlrev_b32_e32 v1, 3, v2
	s_mul_i32 s2, s6, s5
	s_lshl_b32 s3, s6, 3
	s_mov_b32 s4, 0
	v_mul_lo_u32 v0, s5, v0
	v_lshl_add_u32 v2, v3, 8, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add3_u32 v0, v3, v0, s7
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	ds_load_b64 v[3:4], v2
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_nc_u32_e32 v2, s3, v2
	s_add_i32 s4, s4, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_gt_i32 s4, 31
	v_lshlrev_b64 v[5:6], 3, v[0:1]
	v_add_nc_u32_e32 v0, s2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b64 v[5:6], v[3:4], off
	s_cbranch_scc0 .LBB1_3
; %bb.4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13transposeFastPdS_iii
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13transposeFastPdS_iii, .Lfunc_end1-_Z13transposeFastPdS_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 308
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14transposeNaivePdPKdi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14transposeNaivePdPKdi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13transposeFastPdS_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13transposeFastPdS_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
