// calculate neural weights in real time. 
// serial in 50 mins, pytorch 5 mins 
// parallel target, solve in less than 10 ms - real time 
// compile with 
//  nvcc -arch=sm_60 -o mapping neural.cu -rdc=true -lcudadevrt

#include <iostream>
#include <stdlib.h>
#include <cmath>
#include <ctime>
#include <cuda.h>
#include <float.h>
#include <algorithm>
#include <stdio.h>
#define THREADS_PER_DIM 32
using namespace std;



// struct RT
// {
// 	int idx;
//     double ele;
// };

// __device__
// RT router(double *dA, int *dB, int g_idx){
// 	// @b_ele: element value in b, which is also C index
// 	int c_index = dB[g_idx];

// 	RT result = {c_index, dA[g_idx]};
// 	return result; 
// }

__global__
void mapping(double *d_A, int *d_B, double *d_C,int m){
	int block_total = blockDim.x * blockDim.y; 
	// int grid_row_one = block_total * gridDim.y; 
	int total_block_row_above = blockIdx.x* gridDim.y;
	int total_block_prev = total_block_row_above +blockIdx.y+1; //id counting from 0

	int total_threads_prev_blocks = block_total * total_block_prev;

	// int row_prev_total = blockIdx.y * block_total;  
	int g_idx = total_threads_prev_blocks + threadIdx.x * blockDim.y + threadIdx.y;

	if(g_idx<m){
		int c_index = d_B[g_idx];
		//get route info 
		// RT result = router(d_A, d_B, g_idx); 
		atomicAdd(d_C+c_index, d_A[g_idx]);
	}
	__syncthreads();
}

int main(int argc, char** argv){
	int m= atoi(argv[1]);
	// int m =1000000;
	//n = atoi(argv[2]);
	double *A,*C;
	int *B; // index
	int size_a = m*sizeof(double);
	int size_b = m*sizeof(int);

	A = (double *)malloc(size_a);
	B = (int *)malloc(size_b);


	// init below 
	for(int i =0; i<m; i++){
		A[i] = rand()%1000000;
		B[i] = rand()%15000;
	}

	int len_c = *std::max_element(B,B+m);
	printf("m: %d\n",m);
	printf("len_C %d\n",len_c);
	int size_c =  len_c *sizeof(double);
	C = (double *)malloc(size_c);

	// clock_t startTime = clock();
	for(int j=0; j<len_c;j++){
		C[j]=0; // init C
	}
	double *dA, *dC;
	int *dB; 

	// allocate memory on device
    cudaMalloc((void **)&dA, size_a);
    cudaMalloc((void **)&dB, size_b);
    cudaMalloc((void **)&dC, size_c);
    // Copy inputs to device
    cudaMemcpy(dA, A, size_a, cudaMemcpyHostToDevice);
    cudaMemcpy(dB, B, size_b, cudaMemcpyHostToDevice);
    cudaMemcpy(dC, C, size_c, cudaMemcpyHostToDevice);
    int n_ele = m;

    dim3 dimBlock(THREADS_PER_DIM, THREADS_PER_DIM);
    dim3 dimGrid(ceil(((double)sqrt(n_ele))/dimBlock.x), ceil(((double)sqrt(n_ele))/ dimBlock.y));

    //timer 
    cudaEvent_t start, stop;
    float time;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);    
    cudaEventRecord(start, 0);

    // launch kernal on GPU
    mapping<<<dimGrid,dimBlock>>>(dA,dB,dC,m); 
    //cudaDeviceSynchronize();
    cudaEventRecord(stop, 0);
    cudaDeviceSynchronize();
    cudaEventElapsedTime(&time, start, stop);
    cudaMemcpy(C,dC, size_c, cudaMemcpyDeviceToHost);
    printf("runtime for parallel algorithm:%f ms\n", time);
	free(A);
	free(B);
	free(C);

	cudaFree(dA);
	cudaFree(dB);
	cudaFree(dC);
	return 0;


}

	.file	"tmpxft_0037bb63_00000000-6_neural.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3892:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3892:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z31__device_stub__Z7mappingPdPiS_iPdPiS_i
	.type	_Z31__device_stub__Z7mappingPdPiS_iPdPiS_i, @function
_Z31__device_stub__Z7mappingPdPiS_iPdPiS_i:
.LFB3914:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7mappingPdPiS_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3914:
	.size	_Z31__device_stub__Z7mappingPdPiS_iPdPiS_i, .-_Z31__device_stub__Z7mappingPdPiS_iPdPiS_i
	.globl	_Z7mappingPdPiS_i
	.type	_Z7mappingPdPiS_i, @function
_Z7mappingPdPiS_i:
.LFB3915:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z7mappingPdPiS_iPdPiS_i
	.cfi_endproc
.LFE3915:
	.size	_Z7mappingPdPiS_i, .-_Z7mappingPdPiS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"m: %d\n"
.LC1:
	.string	"len_C %d\n"
.LC4:
	.string	"runtime for parallel algorithm:%f ms\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3889:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	$1000000, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	8(%rsi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	atoi@PLT
	movslq	%eax, %r15
	leal	0(,%r15,8), %r14d
	movq	%r15, %rbp
	movslq	%r14d, %rax
	xorl	%r14d, %r14d
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	%rax, %r13
	leal	0(,%r15,4), %eax
	cltq
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	%rax, %rbx
.L9:
	cmpl	%r14d, %ebp
	jle	.L22
	call	rand@PLT
	cltd
	idivl	%r12d
	cvtsi2sdl	%edx, %xmm0
	movsd	%xmm0, 0(%r13,%r14,8)
	call	rand@PLT
	movl	$15000, %esi
	cltd
	idivl	%esi
	movl	%edx, (%rbx,%r14,4)
	incq	%r14
	jmp	.L9
.L22:
	leaq	(%rbx,%r15,4), %rcx
	movq	%rbx, %rax
	movq	%rbx, %rdx
	cmpq	%rbx, %rcx
	je	.L11
.L12:
	addq	$4, %rdx
	movl	(%rax), %esi
	cmpq	%rdx, %rcx
	je	.L11
	cmpl	%esi, (%rdx)
	cmovg	%rdx, %rax
	jmp	.L12
.L11:
	movl	(%rax), %r15d
	movl	%ebp, %edx
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	%r15d, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC1(%rip), %rsi
	call	__printf_chk@PLT
	leal	0(,%r15,8), %eax
	cltq
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	%rax, %r12
	xorl	%eax, %eax
.L15:
	cmpl	%eax, %r15d
	jle	.L23
	movq	$0x000000000, (%r12,%rax,8)
	incq	%rax
	jmp	.L15
.L23:
	movq	16(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdx
	movq	56(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	cvtsi2sdl	%ebp, %xmm1
	movaps	%xmm1, %xmm0
	movq	%xmm1, %r14
	call	sqrt@PLT
	mulsd	.LC3(%rip), %xmm0
	call	ceil@PLT
	movq	%xmm0, %r15
	movq	%r14, %xmm0
	call	sqrt@PLT
	mulsd	.LC3(%rip), %xmm0
	call	ceil@PLT
	movq	%r15, %xmm2
	leaq	64(%rsp), %rdi
	movl	$1, 100(%rsp)
	cvttsd2siq	%xmm0, %rax
	movl	%eax, 92(%rsp)
	cvttsd2siq	%xmm2, %rax
	movl	%eax, 96(%rsp)
	call	cudaEventCreate@PLT
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	92(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	100(%rsp), %esi
	movl	$1, %ecx
	movabsq	$137438953504, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	48(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	%ebp, %ecx
	movq	40(%rsp), %rdi
	call	_Z31__device_stub__Z7mappingPdPiS_iPdPiS_i
.L17:
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	call	cudaDeviceSynchronize@PLT
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	leaq	36(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	%r12, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	36(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3889:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z7mappingPdPiS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3917:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7mappingPdPiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3917:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	0
	.long	1067450368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// calculate neural weights in real time. 
// serial in 50 mins, pytorch 5 mins 
// parallel target, solve in less than 10 ms - real time 
// compile with 
//  nvcc -arch=sm_60 -o mapping neural.cu -rdc=true -lcudadevrt

#include <iostream>
#include <stdlib.h>
#include <cmath>
#include <ctime>
#include <hip/hip_runtime.h>
#include <float.h>
#include <algorithm>
#include <stdio.h>
#define THREADS_PER_DIM 32
using namespace std;



// struct RT
// {
// 	int idx;
//     double ele;
// };

// __device__
// RT router(double *dA, int *dB, int g_idx){
// 	// @b_ele: element value in b, which is also C index
// 	int c_index = dB[g_idx];

// 	RT result = {c_index, dA[g_idx]};
// 	return result; 
// }

__global__
void mapping(double *d_A, int *d_B, double *d_C,int m){
	int block_total = blockDim.x * blockDim.y; 
	// int grid_row_one = block_total * gridDim.y; 
	int total_block_row_above = blockIdx.x* gridDim.y;
	int total_block_prev = total_block_row_above +blockIdx.y+1; //id counting from 0

	int total_threads_prev_blocks = block_total * total_block_prev;

	// int row_prev_total = blockIdx.y * block_total;  
	int g_idx = total_threads_prev_blocks + threadIdx.x * blockDim.y + threadIdx.y;

	if(g_idx<m){
		int c_index = d_B[g_idx];
		//get route info 
		// RT result = router(d_A, d_B, g_idx); 
		atomicAdd(d_C+c_index, d_A[g_idx]);
	}
	__syncthreads();
}

int main(int argc, char** argv){
	int m= atoi(argv[1]);
	// int m =1000000;
	//n = atoi(argv[2]);
	double *A,*C;
	int *B; // index
	int size_a = m*sizeof(double);
	int size_b = m*sizeof(int);

	A = (double *)malloc(size_a);
	B = (int *)malloc(size_b);


	// init below 
	for(int i =0; i<m; i++){
		A[i] = rand()%1000000;
		B[i] = rand()%15000;
	}

	int len_c = *std::max_element(B,B+m);
	printf("m: %d\n",m);
	printf("len_C %d\n",len_c);
	int size_c =  len_c *sizeof(double);
	C = (double *)malloc(size_c);

	// clock_t startTime = clock();
	for(int j=0; j<len_c;j++){
		C[j]=0; // init C
	}
	double *dA, *dC;
	int *dB; 

	// allocate memory on device
    hipMalloc((void **)&dA, size_a);
    hipMalloc((void **)&dB, size_b);
    hipMalloc((void **)&dC, size_c);
    // Copy inputs to device
    hipMemcpy(dA, A, size_a, hipMemcpyHostToDevice);
    hipMemcpy(dB, B, size_b, hipMemcpyHostToDevice);
    hipMemcpy(dC, C, size_c, hipMemcpyHostToDevice);
    int n_ele = m;

    dim3 dimBlock(THREADS_PER_DIM, THREADS_PER_DIM);
    dim3 dimGrid(ceil(((double)sqrt(n_ele))/dimBlock.x), ceil(((double)sqrt(n_ele))/ dimBlock.y));

    //timer 
    hipEvent_t start, stop;
    float time;
    hipEventCreate(&start);
    hipEventCreate(&stop);    
    hipEventRecord(start, 0);

    // launch kernal on GPU
    mapping<<<dimGrid,dimBlock>>>(dA,dB,dC,m); 
    //cudaDeviceSynchronize();
    hipEventRecord(stop, 0);
    hipDeviceSynchronize();
    hipEventElapsedTime(&time, start, stop);
    hipMemcpy(C,dC, size_c, hipMemcpyDeviceToHost);
    printf("runtime for parallel algorithm:%f ms\n", time);
	free(A);
	free(B);
	free(C);

	hipFree(dA);
	hipFree(dB);
	hipFree(dC);
	return 0;


}

	.text
	.file	"neural.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z22__device_stub__mappingPdPiS_i # -- Begin function _Z22__device_stub__mappingPdPiS_i
	.type	_Z22__device_stub__mappingPdPiS_i,@function
_Z22__device_stub__mappingPdPiS_i:      # @_Z22__device_stub__mappingPdPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7mappingPdPiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__mappingPdPiS_i, .Lfunc_end0-_Z22__device_stub__mappingPdPiS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x3fa0000000000000              # double 0.03125
.LCPI1_1:
	.quad	0x0000000000000000              # double 0
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r15d
	leal	(,%r15,8), %eax
	leal	(,%r15,4), %ebp
	movslq	%eax, %rdi
	movq	%rdi, 24(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %rbx
	movslq	%ebp, %rdi
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	callq	malloc
	movq	%rax, %r14
	testl	%r15d, %r15d
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%r15d, %r12d
	xorl	%r13d, %r13d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1125899907, %rax, %rcx         # imm = 0x431BDE83
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$50, %rcx
	addl	%edx, %ecx
	imull	$1000000, %ecx, %ecx            # imm = 0xF4240
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	%xmm0, (%rbx,%r13,8)
	callq	rand
	cltq
	imulq	$1172812403, %rax, %rcx         # imm = 0x45E7B273
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$44, %rcx
	addl	%edx, %ecx
	imull	$15000, %ecx, %ecx              # imm = 0x3A98
	subl	%ecx, %eax
	movl	%eax, (%r14,%r13,4)
	incq	%r13
	cmpq	%r13, %r12
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	movq	%r14, %rcx
	cmpl	$2, %r15d
	jb	.LBB1_6
# %bb.4:                                # %.lr.ph.preheader.i.i
	movslq	%r15d, %rcx
	movq	%r14, %rax
	addq	$4, %rax
	movl	(%r14), %edx
	leaq	-4(,%rcx,4), %rsi
	movq	%r14, %rcx
.LBB1_5:                                # %.lr.ph.i.i
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rax), %edi
	cmpl	%edi, %edx
	cmovlel	%edi, %edx
	cmovlq	%rax, %rcx
	addq	$4, %rax
	addq	$-4, %rsi
	jne	.LBB1_5
.LBB1_6:                                # %_ZSt11max_elementIPiET_S1_S1_.exit
	movl	(%rcx), %ebp
	movl	$.L.str, %edi
	movq	%r15, 56(%rsp)                  # 8-byte Spill
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	leal	(,%rbp,8), %eax
	movslq	%eax, %rdi
	movq	%rdi, 48(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %r15
	testl	%ebp, %ebp
	jle	.LBB1_8
# %bb.7:                                # %.lr.ph53.preheader
	shlq	$3, %rbp
	movq	%r15, %rdi
	xorl	%esi, %esi
	movq	%rbp, %rdx
	callq	memset@PLT
.LBB1_8:                                # %._crit_edge54
	leaq	40(%rsp), %rdi
	movq	24(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	8(%rsp), %r12                   # 8-byte Reload
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	48(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %rax
	movq	(%rax), %rdi
	movq	%rbx, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r15, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	cvtsi2sdl	56(%rsp), %xmm1         # 4-byte Folded Reload
	sqrtsd	%xmm1, %xmm0
	xorpd	%xmm2, %xmm2
	movsd	%xmm1, 8(%rsp)                  # 8-byte Spill
	ucomisd	%xmm2, %xmm1
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movq	%r15, %rbp
	jae	.LBB1_10
# %bb.9:                                # %call.sqrt
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	sqrt
.LBB1_10:                               # %._crit_edge54.split
	mulsd	.LCPI1_0(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %r13
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	ucomisd	.LCPI1_1(%rip), %xmm0
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	jae	.LBB1_12
# %bb.11:                               # %call.sqrt61
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	sqrt
.LBB1_12:                               # %._crit_edge54.split.split
	mulsd	.LCPI1_0(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %r12
	movl	%r13d, %eax
	shlq	$32, %r12
	orq	%rax, %r12
	leaq	72(%rsp), %r13
	movq	%r13, %rdi
	callq	hipEventCreate
	leaq	64(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r13), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movq	%r12, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	56(%rsp), %rcx                  # 8-byte Reload
	jne	.LBB1_14
# %bb.13:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdx
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z22__device_stub__mappingPdPiS_i
.LBB1_14:
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	callq	hipDeviceSynchronize
	movq	72(%rsp), %rsi
	movq	64(%rsp), %rdx
	leaq	84(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	movq	16(%rsp), %rsi
	movq	%rbp, %rdi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%rbp, %rdi
	callq	free
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7mappingPdPiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7mappingPdPiS_i,@object       # @_Z7mappingPdPiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z7mappingPdPiS_i
	.p2align	3, 0x0
_Z7mappingPdPiS_i:
	.quad	_Z22__device_stub__mappingPdPiS_i
	.size	_Z7mappingPdPiS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"m: %d\n"
	.size	.L.str, 7

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"len_C %d\n"
	.size	.L.str.1, 10

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"runtime for parallel algorithm:%f ms\n"
	.size	.L.str.2, 38

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7mappingPdPiS_i"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__mappingPdPiS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7mappingPdPiS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7mappingPdPiS_i       ; -- Begin function _Z7mappingPdPiS_i
	.globl	_Z7mappingPdPiS_i
	.p2align	8
	.type	_Z7mappingPdPiS_i,@function
_Z7mappingPdPiS_i:                      ; @_Z7mappingPdPiS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s4, s[0:1], 0x18
	v_and_b32_e32 v1, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s14
	s_and_b32 s5, s3, 0xffff
	s_add_i32 s2, s15, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, 1
	v_mad_u64_u32 v[2:3], null, s2, s5, v[1:2]
	v_bfe_u32 v3, v0, 10, 10
	s_lshr_b32 s2, s3, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, v2, s2, v[3:4]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s4, v0
	s_cbranch_execz .LBB0_3
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
	s_mov_b32 s0, 0
	global_load_b64 v[6:7], v[0:1], off
	global_load_b64 v[2:3], v[4:5], off
.LBB0_2:                                ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_add_f64 v[0:1], v[2:3], v[6:7]
	global_atomic_cmpswap_b64 v[0:1], v[4:5], v[0:3], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow28
	s_or_b32 exec_lo, exec_lo, s2
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7mappingPdPiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7mappingPdPiS_i, .Lfunc_end0-_Z7mappingPdPiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 324
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7mappingPdPiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7mappingPdPiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
