
#include <stdio.h>
#include <stdlib.h>
#include <fcntl.h>
#include "string.h"
#include <math.h>



#define DEFAULT_FILENAME "small-zibra-unsplash.ppm"

#define MAX_VALUE 256  //max value of the pic luminance
#define NUM_BINS 256 //num of bins equals to the max value
__constant__ double PARAMS[4];

void write_ppm( char const *filename, int xsize, int ysize, int maxval, unsigned int *pic);
unsigned int *read_ppm( char *filename, int * xsize, int * ysize, int *maxval );
void write_CSV(char const *filename,int width, int height, unsigned int *input);
void matrixRotation(unsigned int *input, unsigned int *output, int width, int height, double angle);
void computerGoldHisto(unsigned int* input, unsigned int* histo, int width, int height);
void getNewXY(int inputX, int inputY, int width, int height,double angle, int *outputX, int *outputY);

__global__ void rotation_kernel_naive(unsigned int *input,unsigned int *output,int width, int height,double angle);
__global__ void rotation_kernel_2(unsigned int *input,unsigned int *output,int width, int height,double angle);
__global__ void rotation_kernel_3(unsigned int *input,unsigned int *output,int width,int height);

__global__ void histo_kernel_naive(unsigned int *input,unsigned int *histo,int width, int height);
__global__ void histo_kernel_2(unsigned int *input,unsigned int *histo,int width, int height);


int main( int argc, char **argv )
{
	double ang ;
	char *filename;
	filename = strdup( DEFAULT_FILENAME);
	ang = 45.0;
	if (argc > 1) {
		if (argc == 3)  { //angle and filename

			ang = atoi( argv[1] );
			filename = strdup( argv[2]);
		}
		if (argc == 2) { // angle
			ang = atoi( argv[1] );
		}

	}
		fprintf(stderr, "file %s , rotation angle: %f\n", filename, ang);
  //initialization paramters
  int xsize, ysize,maxval;

  unsigned int *h_histoCPU;
  unsigned int *h_Input;
  unsigned int *h_rotated;

  //read input from image
  unsigned int *pic = read_ppm( filename, &xsize, &ysize, &maxval );


  int diaLen = (unsigned int) (sqrt(xsize * xsize + ysize* ysize) + 3);//paddle extra 3 for safer non-cropped rotation
  printf("width:%d, height:%d,maxVal: %d, diagonal size: %d \n",xsize,ysize,maxval,diaLen );
  //decide memory size
  size_t histo_size = MAX_VALUE * diaLen * 3 * sizeof(int);
  size_t rotate_size = diaLen * diaLen * 3 * sizeof(int);

  //allocate memory

  h_histoCPU = (unsigned int*)malloc(histo_size);
  h_rotated= (unsigned int*)malloc(rotate_size);
  h_Input = (unsigned int*)malloc(rotate_size);

  if (!h_Input || !h_histoCPU || !h_rotated) {
		fprintf(stderr, " unable to malloc \n");
		exit(-1); // fail
	}

  //decide rotate angle， rotation is done swirlly along the image center.
 double angle = - ang / 360 * M_PI * 2;
//paddle data for h_Input, make it squre with side length as the input diagonal length
    int deltaX = diaLen - xsize ;
    int deltaY = diaLen - ysize ;

    for(int i=0;i<diaLen;i++){
      for(int j = 0; j< diaLen;j++){
        if(i>=deltaY / 2 && i< (ysize + deltaY/2) && j >= deltaX/2 && j < (xsize + deltaX/2)){
          h_Input[i*diaLen+j]=pic[(i-deltaY/2)*xsize + (j-deltaX/2)];
        }else{
          h_Input[i*diaLen+j] = 0;
        }
      }
    }
//calculate new coordinate

int outputX, outputY;
double realAngle = -angle;
int originX = 0;
int originY = 200;
getNewXY(originX,originY, xsize, ysize, realAngle, &outputX, &outputY);
printf("(%d, %d) rotated to newX: %d, newY: %d \n", originX,originY,outputX, outputY);
//output the paddledInput
write_ppm( "paddledInput.ppm", diaLen, diaLen, 255, h_Input);
//timer for cpu rotation------------------------
cudaEvent_t start, stop;
float time;
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start,0);
//run rotation on cpu
matrixRotation( h_Input, h_rotated, diaLen, diaLen, angle);

cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&time,start,stop);

printf("cpu rotation time: %f milliseconds\n",time);
cudaEventDestroy(start);
cudaEventDestroy(stop);
//output rotated image
write_ppm( "rotated_gold.ppm", diaLen, diaLen, 255, h_rotated);
write_CSV("rotated_gold.csv",diaLen,diaLen, h_rotated);
//write_CSV("picture.csv",xsize,ysize, pic);

//initialization h_BinsCPU
for(int i = 0;i<NUM_BINS;i++){
  for(int j = 0;j<MAX_VALUE;j++){
    h_histoCPU[i*MAX_VALUE+j] = 0;
  }
}
//timer for CPU histogram
float time2;
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start,0);

//run histo on CPU
computerGoldHisto(h_rotated,h_histoCPU,diaLen,diaLen);

cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&time2,start,stop);
cudaEventDestroy(start);
cudaEventDestroy(stop);
printf("cpu histo time: %f milliseconds\n",time2);

//output histo result to CSV file
write_CSV("histoBinCPU.csv",diaLen,MAX_VALUE, h_histoCPU);

//cudaMalloc for rotation kernel
unsigned int *h_histoGPU;
unsigned int *h_rotatedGPU;
unsigned int *h_rotatedGPU2;
unsigned int *h_rotatedGPU3;
unsigned int *d_Input;
unsigned int *d_rotated;
unsigned int *d_rotated_naive;
unsigned int *d_histo;


//memory allocate in the host
h_rotatedGPU = (unsigned int*)malloc(rotate_size);
h_rotatedGPU2 = (unsigned int*)malloc(rotate_size);
h_rotatedGPU3 = (unsigned int*)malloc(rotate_size);
h_histoGPU = (unsigned int*)malloc(histo_size);
if (!h_rotatedGPU ||!h_histoGPU||!h_rotatedGPU2||!h_rotatedGPU3) {
  fprintf(stderr, " unable to malloc \n");
  exit(-1); // fail
}

cudaMalloc((void**)&d_Input,rotate_size);
cudaMalloc((void**)&d_rotated,rotate_size);
cudaMalloc((void**)&d_rotated_naive,rotate_size);

//cudaMemcpy
cudaMemcpy(d_Input,h_Input,rotate_size,cudaMemcpyHostToDevice);

//kernel dimension
int blockSize = 8;
dim3 blockDim(blockSize,blockSize,1);
int gridSize = (diaLen + blockSize -1)/blockSize;
dim3 gridDim(gridSize,gridSize,1);
float time3;
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start,0);

//launch kernel 100 times and take average time
for(int i = 0;i<100;i++){
	rotation_kernel_naive<<<gridDim,blockDim>>>(d_Input,d_rotated_naive,diaLen,diaLen,angle);
}
cudaEventRecord(stop,0);
cudaMemcpy(h_rotatedGPU,d_rotated_naive,rotate_size,cudaMemcpyDeviceToHost);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&time3,start,stop);
cudaEventDestroy(start);
cudaEventDestroy(stop);
printf("GPU rotation_kernel_naive time: %f milliseconds\n",time3 / 100);
//output GPU rotate result
write_ppm( "rotated_GPU_naive.ppm", diaLen, diaLen, 255, h_rotatedGPU);
//GPU rotation with optimization, using registers to store pre-calculated values

cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start,0);
//launch kernel 100 times and take average time
for(int i = 0;i<100;i++){
rotation_kernel_2<<<gridDim,blockDim>>>(d_Input,d_rotated,diaLen,diaLen,angle);
}
cudaEventRecord(stop,0);
cudaMemcpy(h_rotatedGPU2,d_rotated,rotate_size,cudaMemcpyDeviceToHost);
cudaEventSynchronize(stop);
float time3_2;
cudaEventElapsedTime(&time3_2,start,stop);
cudaEventDestroy(start);
cudaEventDestroy(stop);
printf("GPU rotation_kernel_2 time: %f milliseconds\n",time3_2 / 100);

//output GPU rotate result
write_ppm( "rotated_GPU2.ppm", diaLen, diaLen, 255, h_rotatedGPU2);
//rotation kernel_3 using constant memory---------------------------------
double *P;
P = (double*) malloc(4 * sizeof(double));
P[0] = (double)diaLen / 2; //xCenter
P[1] = (double)diaLen / 2; //yCenter
P[2] = sin(angle);
P[3] = cos(angle);

//load data to constant memory
cudaMemcpyToSymbol(PARAMS, P, 4 * sizeof(double));
//timer
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start,0);
//launch kernel 100 times and take average time
for(int i = 0;i<100;i++){
rotation_kernel_3<<<gridDim,blockDim>>>(d_Input,d_rotated,diaLen,diaLen);
}
cudaEventRecord(stop,0);
cudaMemcpy(h_rotatedGPU3,d_rotated,rotate_size,cudaMemcpyDeviceToHost);
cudaEventSynchronize(stop);
float time3_3;
cudaEventElapsedTime(&time3_3,start,stop);
cudaEventDestroy(start);
cudaEventDestroy(stop);
printf("GPU rotation kernel_3 tiem: %f milliseconds\n",time3_3 / 100);

//output GPU rotate result
write_ppm( "rotated_GPU3.ppm", diaLen, diaLen, 255, h_rotatedGPU3);
//-------end of rotation kernel-----------------------------------------------
//cudaFree part 1
cudaFree(d_Input);
cudaFree(d_rotated_naive);

//------GPU histo start----------------------------------------

// //cudaMalloc for histoGPU
cudaMalloc((void**)&d_histo,histo_size);
//------naive histo kernel-----------------------------------------
float time4;
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start,0);

//launch kernel 100 times and take average time
int blockSize2 = 32;
int gridSize2 = ceil((float)diaLen/blockSize2);
dim3 blockDim2 (blockSize2,blockSize2,1);
dim3 gridDim2 (gridSize2,gridSize2,1);

histo_kernel_naive<<<gridDim2,blockDim2>>>(d_rotated,d_histo,diaLen,diaLen);

cudaEventRecord(stop,0);
cudaMemcpy(h_histoGPU,d_histo,histo_size,cudaMemcpyDeviceToHost);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&time4,start,stop);
cudaEventDestroy(start);
cudaEventDestroy(stop);
printf("GPU histo_naive time: %f milliseconds\n",time4 );

// //output histo result to CSV file
 write_CSV("histoBinGPU_kernel_naive.csv",diaLen,MAX_VALUE, h_histoGPU);
//----------end---------------------------------------------------------------

//------histo kernel 2, one thread work with one input----------------------------
unsigned int *h_histoGPU2;
h_histoGPU2 = (unsigned int*)malloc(histo_size);
if (!h_histoGPU2) {
  fprintf(stderr, " unable to malloc \n");
  exit(-1); // fail
}
unsigned int *d_histo2;
cudaMalloc((void**)&d_histo2,histo_size);

float time5;
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start,0);
//launch kernel 100 times and take average time
for(int i = 0;i<100;i++){
histo_kernel_2<<<diaLen,256>>>(d_rotated,d_histo2,diaLen,diaLen);
}
cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaMemcpy(h_histoGPU2,d_histo2,histo_size,cudaMemcpyDeviceToHost);

cudaEventElapsedTime(&time5,start,stop);
cudaEventDestroy(start);
cudaEventDestroy(stop);
printf("GPU histo_kernel_2 time: %f milliseconds\n",time5 / 100);

// //output histo result to CSV file
 write_CSV("histoBinGPU_kernel_2.csv",diaLen,MAX_VALUE, h_histoGPU2);
//----------end---------------------------------------------------------------



//cudaFREE part 2
cudaFree(d_rotated);
cudaFree(d_histo);
cudaFree(d_histo2);


//Free host memory
free(h_Input);
free(h_rotated);
free(h_rotatedGPU);
free(h_rotatedGPU2);
free(h_rotatedGPU3);
free(h_histoCPU);
free(h_histoGPU);
free(h_histoGPU2);



fprintf(stderr, "done\n");

}
//--------rotation kernel naive----------------------------------------
__global__ void rotation_kernel_naive(unsigned int *input,unsigned int *output,int width, int height,double angle){
  //TO DO
  double xCenter = (double)width / 2;
  double yCenter = (double)height / 2;
  int x = blockIdx.x * blockDim.x + threadIdx.x;
  int y = blockIdx.y * blockDim.y + threadIdx.y;
  int index = y * width + x;
  int orgX = 0;
  int orgY = 0;
  //boundary check
  if(x >=0 && x < width && y >=0 && y < height){
    orgX = (int)(cos(angle) * ((double)x - xCenter)- sin(angle) * ((double)y - yCenter) + xCenter);
    orgY = (int)(sin(angle) * ((double)x - xCenter) + cos(angle) * ((double)y - yCenter) + yCenter);
  }

  if(orgX>=0 && orgX < width && orgY>=0 && orgY<height){
    output[index] = input[ orgY * width + orgX];
  }
}
//--------rotation kernel 2----------------------------------------
__global__ void rotation_kernel_2(unsigned int *input,unsigned int *output,int width, int height,double angle){
  //TO DO
  double xCenter = (double)width / 2;  // x center of image
  double yCenter = (double)height / 2; // y center of image
  int x = blockIdx.x * blockDim.x + threadIdx.x;
  int y = blockIdx.y * blockDim.y + threadIdx.y;
  int index = y * width + x;
  double sinA = sin(angle);
  double cosA = cos(angle);
  double shiftX = (double)x - xCenter;
  double shiftY = (double)y - yCenter;
  int orgX = 0;
  int orgY = 0;
  //boundary check
  if(x >=0 && x < width && y >=0 && y < height){
    orgX = (int)(cosA * shiftX - sinA * shiftY + xCenter);
    orgY = (int)(sinA * shiftX + cosA * shiftY + yCenter);
  }

  if(orgX>=0 && orgX < width && orgY>=0 && orgY<height){
    output[index] = input[ orgY * width + orgX];
  }

}

//--------rotation kernel 3 using constant memory----------------------------------------
__global__ void rotation_kernel_3(unsigned int *input,unsigned int *output,int width, int height){

  int x = blockIdx.x * blockDim.x + threadIdx.x;
  int y = blockIdx.y * blockDim.y + threadIdx.y;
  int index = y * width + x;

  double shiftX = (double)x - PARAMS[0];
  double shiftY = (double)y - PARAMS[1];
  int orgX = 0;
  int orgY = 0;
  //boundary check
  if(x >=0 && x < width && y >=0 && y < height){
    orgX = (int)(PARAMS[3] * shiftX - PARAMS[2] * shiftY + PARAMS[0]);
    orgY = (int)(PARAMS[2] * shiftX + PARAMS[3] * shiftY + PARAMS[1]);
  }

  if(orgX>=0 && orgX < width && orgY>=0 && orgY<height){
    output[index] = input[ orgY * width + orgX];
  }

}

//----------cpu for matrix rotation--------------------------
//rotate as a swirl from , from the center
void matrixRotation(unsigned int *input, unsigned int *output, int width, int height, double angle){
   double xCenter = (double)width / 2;
   double yCenter = (double)height / 2;
  //for non-crop rotation put both the height and width of the output the diagonal length of the origin input
  for(int y = 0;y<height;y++){
    for(int x = 0;x<width;x++){
      int orgX = (int)(cos(angle) * ((double)x -xCenter) - sin(angle) * ((double)y - yCenter) + xCenter ) ;
      int orgY = (int)(sin(angle) * ((double)x -xCenter) + cos(angle) * ((double)y - yCenter) + yCenter );
      if(orgX>=0 && orgX < width && orgY>=0 && orgY < height){
        output[y*width+x] = input[orgY * width +orgX];
      }
    }
  }
}


//----------histo kernel naive: using global memory--------------------------------------
__global__ void histo_kernel_naive(unsigned int *input,unsigned int *histo,int width, int height){

	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;

if(x >=0 && x < width && y >=0 && y < height){
		atomicAdd(&histo[input[y*width+x]*width+x],1);
	}

}
//histo_kernel_2<<<diaLen,256>>>(d_rotated,d_histo2,diaLen,diaLen);
//----------histo kernel 2: with shared memory,each threads deal with one input
__global__ void histo_kernel_2(unsigned int *input,unsigned int *histo,int width, int height){
 __shared__ unsigned int H[NUM_BINS];// one column of the output bin
 int tx = threadIdx.x;
 int col = blockIdx.x;//col number of input
 int bd = blockDim.x;
	H[tx] = 0;
 __syncthreads();
  for(int t =0;t<(height+bd-1)/bd;t++){ //when height is bigger than blockDim
		 int row = t*bd+tx;
		 if(row<height){
			 int value = input[row*width+col];
				atomicAdd(&H[value],1);
		 }
	}
	__syncthreads();
		histo[tx*width+col] = H[tx];
}
//histo_kernel_3<<<diaLen,256>>>,
//----------histo kernel 3: with shared memory for input, each thread collecting one bin
__global__ void histo_kernel_3(unsigned int *input,unsigned int *histo,int width, int height){

 __shared__ unsigned int IN[NUM_BINS]; //use to storing input
 int tx = threadIdx.x;
 int col = blockIdx.x;//col number of input

	int h = 0;
  for(int t =0;t<(height+NUM_BINS-1)/NUM_BINS;t++){ //when height is bigger than NUM_BINS
		 int row = t*NUM_BINS+tx;
		 if(row<height){
			 IN[tx] = input[row*width+col];
		 }else{
			 IN[tx] = 300;  // padding nonsense value to avoid addition
		 }
			 __syncthreads();
			 for(int i = 0;i<NUM_BINS;i++){//each thread loop through the input
				 int value = IN[i];
				 if(tx == value){
					 h++;
				 }
			 }
	}

   histo[tx*width+col] = h;
}



//----------cpu for histo along y direction-------------------
void computerGoldHisto(unsigned int* input, unsigned int* histo, int width, int height){

  for(int i = 0; i<height;i++){
    for(int j = 0;j<width;j++){
        int data = input[i*width+j];
        histo[data*width+j]++;
    }
  }
}


//-----------read image to array-----------------------------------------------------------------
unsigned int *read_ppm( char *filename, int * xsize, int * ysize, int *maxval ){

	if ( !filename || filename[0] == '\0') {
		fprintf(stderr, "read_ppm but no file name\n");
		return NULL;  // fail
	}

	FILE *fp;

	fprintf(stderr, "read_ppm( %s )\n", filename);
	fp = fopen( filename, "rb");
	if (!fp)
	{
		fprintf(stderr, "read_ppm()    ERROR  file '%s' cannot be opened for reading\n", filename);
		return NULL; // fail
	}

	char chars[1024];
	//int num = read(fd, chars, 1000);
	int num = fread(chars, sizeof(char), 1000, fp);

	if (chars[0] != 'P' || chars[1] != '6')
	{
		fprintf(stderr, "Texture::Texture()    ERROR  file '%s' does not start with \"P6\"  I am expecting a binary PPM file\n", filename);
		return NULL;
	}

	unsigned int width, height, maxvalue;


	char *ptr = chars+3; // P 6 newline
	if (*ptr == '#') // comment line!
	{
		ptr = 1 + strstr(ptr, "\n");
	}

	num = sscanf(ptr, "%d\n%d\n%d",  &width, &height, &maxvalue);
	fprintf(stderr, "read %d things   width %d  height %d  maxval %d\n", num, width, height, maxvalue);
	*xsize = width;
	*ysize = height;
	*maxval = maxvalue;

	unsigned int *pic = (unsigned int *)malloc( width * height * sizeof(unsigned int));
	if (!pic) {
		fprintf(stderr, "read_ppm()  unable to allocate %d x %d unsigned ints for the picture\n", width, height);
		return NULL; // fail but return
	}

	// allocate buffer to read the rest of the file into
	int bufsize =  3 * width * height * sizeof(unsigned char);
	if ((*maxval) > 255) bufsize *= 2;
	unsigned char *buf = (unsigned char *)malloc( bufsize );
	if (!buf) {
		fprintf(stderr, "read_ppm()  unable to allocate %d bytes of read buffer\n", bufsize);
		return NULL; // fail but return
	}

	// really read
	char duh[80];
	char *line = chars;

	// find the start of the pixel data.
	sprintf(duh, "%d\0", *xsize);
	line = strstr(line, duh);
	//fprintf(stderr, "%s found at offset %d\n", duh, line-chars);
	line += strlen(duh) + 1;

	sprintf(duh, "%d\0", *ysize);
	line = strstr(line, duh);
	//fprintf(stderr, "%s found at offset %d\n", duh, line-chars);
	line += strlen(duh) + 1;

	sprintf(duh, "%d\0", *maxval);
	line = strstr(line, duh);

	fprintf(stderr, "%s found at offset %d\n", duh, line - chars);
	line += strlen(duh) + 1;

	long offset = line - chars;
	//lseek(fd, offset, SEEK_SET); // move to the correct offset
	fseek(fp, offset, SEEK_SET); // move to the correct offset
	//long numread = read(fd, buf, bufsize);
	long numread = fread(buf, sizeof(char), bufsize, fp);
	fprintf(stderr, "Texture %s   read %ld of %ld bytes\n", filename, numread, bufsize);

	fclose(fp);

	int pixels = (*xsize) * (*ysize);
	for (int i=0; i<pixels; i++)
		pic[i] = (int) buf[3*i];  // red channel

	return pic; // success
}



//--------------wiret array to a image-------------------------------------------------------------------
void write_ppm( char const *filename, int xsize, int ysize, int maxval,unsigned int *pic)
{
	FILE *fp;
// 	int x,y;

	fp = fopen(filename, "wb");
	if (!fp)
	{
		fprintf(stderr, "FAILED TO OPEN FILE '%s' for writing\n");
		exit(-1);
	}

	fprintf(fp, "P6\n");
	fprintf(fp,"%d %d\n%d\n", xsize, ysize, maxval);

	int numpix = xsize * ysize;
	for (int i=0; i<numpix; i++) {
		unsigned char uc = (unsigned char) pic[i];
		fprintf(fp, "%c%c%c", uc, uc, uc);
	}

	fclose(fp);
}

//write histoBin result to excel  diaLen, MAX_VALUE
void write_CSV(char const *filename,int width, int height, unsigned int *input){
  FILE *fp;
  fp = fopen(filename, "w+");
  if (!fp)
  {
    fprintf(stderr, "FAILED TO OPEN FILE '%s' for writing\n");
    exit(-1);
  }
 for(int i = 0;i< height;i++){
   for(int j = 0;j<width;j++){
     fprintf(fp,"%d,",input[i*width+j]);
   }
   fprintf(fp,"\n");
 }
 fclose(fp);

}
// calculate newX newY after padding and rotation
void getNewXY(int inputX, int inputY, int width, int height,double angle, int *outputX, int *outputY){
  double diaLen = (int)(sqrt(width * width + height * height) + 3);
	double deltaX = diaLen - width ;
	double deltaY = diaLen - height;
//  printf("deltaX: %f, deltaY: %f\n",deltaX,deltaY);
  double x = (double)inputX - deltaX / 2;
  double y = (double)inputY - deltaY/ 2;
//  printf("paddled x and y are: %f, %f\n", x, y);
  double xCenter = -diaLen / 2;
  double yCenter = -diaLen / 2;
//	printf("deltaX: %f, deltaY: %f\n",xCenter,yCenter);

  *outputX = -1 * (int)(cos(angle) * (x -xCenter) - sin(angle) * (y - yCenter) + xCenter ) ;
  *outputY = -1 * (int)(sin(angle) * (x -xCenter) + cos(angle) * (y - yCenter) + yCenter );


}

	.file	"tmpxft_0021e2c3_00000000-6_histo.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2040:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2040:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z14matrixRotationPjS_iid
	.type	_Z14matrixRotationPjS_iid, @function
_Z14matrixRotationPjS_iid:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	cvtsi2sdl	%ecx, %xmm3
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	cvtsi2sdl	%edx, %xmm2
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	xorl	%ecx, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movsd	%xmm0, 8(%rsp)
	movsd	.LC0(%rip), %xmm0
	leaq	56(%rsp), %rax
	movq	%rax, 16(%rsp)
	mulsd	%xmm0, %xmm2
	mulsd	%xmm0, %xmm3
.L3:
	cmpl	%r12d, %ebx
	jge	.L16
	xorl	%r13d, %r13d
.L6:
	cmpl	%ebp, %r13d
	jge	.L17
	movsd	8(%rsp), %xmm0
	movq	16(%rsp), %rdi
	leaq	48(%rsp), %rsi
	movl	%ecx, 44(%rsp)
	movsd	%xmm3, 32(%rsp)
	movsd	%xmm2, 24(%rsp)
	call	sincos@PLT
	cvtsi2sdl	%r13d, %xmm0
	movl	44(%rsp), %ecx
	movsd	24(%rsp), %xmm2
	cvtsi2sdl	%ebx, %xmm5
	movsd	32(%rsp), %xmm3
	movsd	48(%rsp), %xmm4
	movsd	56(%rsp), %xmm6
	movaps	%xmm4, %xmm1
	subsd	%xmm2, %xmm0
	movaps	%xmm6, %xmm7
	subsd	%xmm3, %xmm5
	mulsd	%xmm0, %xmm1
	mulsd	%xmm5, %xmm7
	subsd	%xmm7, %xmm1
	addsd	%xmm2, %xmm1
	cvttsd2sil	%xmm1, %esi
	testl	%esi, %esi
	js	.L4
	cmpl	%esi, %ebp
	jle	.L4
	mulsd	%xmm6, %xmm0
	mulsd	%xmm5, %xmm4
	addsd	%xmm4, %xmm0
	addsd	%xmm3, %xmm0
	cvttsd2sil	%xmm0, %eax
	testl	%eax, %eax
	js	.L4
	cmpl	%eax, %r12d
	jle	.L4
	imull	%ebp, %eax
	addl	%esi, %eax
	cltq
	movl	(%r14,%rax,4), %esi
	leal	0(%r13,%rcx), %eax
	cltq
	movl	%esi, (%r15,%rax,4)
.L4:
	incl	%r13d
	jmp	.L6
.L17:
	incl	%ebx
	addl	%ebp, %ecx
	jmp	.L3
.L16:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z14matrixRotationPjS_iid, .-_Z14matrixRotationPjS_iid
	.globl	_Z17computerGoldHistoPjS_ii
	.type	_Z17computerGoldHistoPjS_ii, @function
_Z17computerGoldHistoPjS_ii:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	%rdi, %r8
	xorl	%r9d, %r9d
	movq	%rsi, %rdi
	xorl	%r10d, %r10d
.L19:
	cmpl	%ecx, %r10d
	jge	.L18
	movslq	%r9d, %rax
	xorl	%esi, %esi
	leaq	(%r8,%rax,4), %r11
.L22:
	cmpl	%esi, %edx
	jle	.L23
	movl	(%r11,%rsi,4), %eax
	imull	%edx, %eax
	addl	%esi, %eax
	incq	%rsi
	cltq
	incl	(%rdi,%rax,4)
	jmp	.L22
.L23:
	incl	%r10d
	addl	%edx, %r9d
	jmp	.L19
.L18:
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z17computerGoldHistoPjS_ii, .-_Z17computerGoldHistoPjS_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"read_ppm but no file name\n"
.LC2:
	.string	"read_ppm( %s )\n"
.LC3:
	.string	"rb"
.LC4:
	.string	"read_ppm()    ERROR  file '%s' cannot be opened for reading\n"
.LC5:
	.string	"Texture::Texture()    ERROR  file '%s' does not start with \"P6\"  I am expecting a binary PPM file\n"
.LC6:
	.string	"%d\n%d\n%d"
.LC7:
	.string	"read %d things   width %d  height %d  maxval %d\n"
.LC8:
	.string	"read_ppm()  unable to allocate %d x %d unsigned ints for the picture\n"
.LC9:
	.string	"read_ppm()  unable to allocate %d bytes of read buffer\n"
	.section	.rodata
.LC10:
	.string	"%d"
	.string	""
	.section	.rodata.str1.1
.LC11:
	.string	"%s found at offset %d\n"
.LC12:
	.string	"Texture %s   read %ld of %ld bytes\n"
	.text
	.globl	_Z8read_ppmPcPiS0_S0_
	.type	_Z8read_ppmPcPiS0_S0_, @function
_Z8read_ppmPcPiS0_S0_:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1208, %rsp
	.cfi_def_cfa_offset 1264
	movq	%rdi, 16(%rsp)
	movq	stderr(%rip), %rdi
	movq	%fs:40, %rax
	movq	%rax, 1192(%rsp)
	xorl	%eax, %eax
	cmpq	$0, 16(%rsp)
	je	.L25
	movq	16(%rsp), %rax
	cmpb	$0, (%rax)
	jne	.L26
.L25:
	leaq	.LC1(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L27
.L26:
	movq	%rcx, %r14
	movq	16(%rsp), %rcx
	movq	%rsi, %r13
	movq	%rdx, %r12
	movl	$2, %esi
	leaq	.LC2(%rip), %rdx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movq	16(%rsp), %rdi
	leaq	.LC3(%rip), %rsi
	call	fopen@PLT
	movq	%rax, 24(%rsp)
	testq	%rax, %rax
	jne	.L28
	movq	16(%rsp), %rcx
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC4(%rip), %rdx
.L44:
	call	__fprintf_chk@PLT
.L27:
	xorl	%ebx, %ebx
	jmp	.L24
.L28:
	movq	24(%rsp), %r8
	movl	$1000, %ecx
	movl	$1, %edx
	leaq	168(%rsp), %rdi
	movl	$1024, %esi
	call	__fread_chk@PLT
	cmpb	$80, 168(%rsp)
	jne	.L30
	cmpb	$54, 169(%rsp)
	je	.L31
.L30:
	movq	16(%rsp), %rcx
	movq	stderr(%rip), %rdi
	leaq	.LC5(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	jmp	.L44
.L31:
	cmpb	$35, 171(%rsp)
	leaq	171(%rsp), %rdi
	jne	.L32
	movl	$10, %esi
	call	strchr@PLT
	leaq	1(%rax), %rdi
.L32:
	leaq	80(%rsp), %rcx
	leaq	76(%rsp), %rdx
	xorl	%eax, %eax
	leaq	84(%rsp), %r8
	leaq	.LC6(%rip), %rsi
	call	__isoc23_sscanf@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC7(%rip), %rdx
	movl	%eax, %ecx
	pushq	%rax
	.cfi_def_cfa_offset 1272
	movl	92(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 1280
	movl	96(%rsp), %r9d
	xorl	%eax, %eax
	movl	92(%rsp), %r8d
	call	__fprintf_chk@PLT
	movl	92(%rsp), %ebp
	movl	96(%rsp), %r8d
	movl	100(%rsp), %eax
	movl	%ebp, %r15d
	movl	%ebp, 0(%r13)
	imull	%r8d, %r15d
	movl	%r8d, (%r12)
	movl	%eax, (%r14)
	movl	%r8d, 24(%rsp)
	movl	%r15d, %edi
	salq	$2, %rdi
	call	malloc@PLT
	popq	%rdx
	.cfi_def_cfa_offset 1272
	popq	%rcx
	.cfi_def_cfa_offset 1264
	testq	%rax, %rax
	movl	8(%rsp), %r8d
	movq	%rax, %rbx
	jne	.L33
	movq	stderr(%rip), %rdi
	movl	%ebp, %ecx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC8(%rip), %rdx
	call	__fprintf_chk@PLT
	jmp	.L27
.L33:
	cmpl	$255, (%r14)
	leal	(%r15,%r15,2), %r9d
	jle	.L34
	addl	%r9d, %r9d
.L34:
	movslq	%r9d, %rax
	movl	%r9d, 8(%rsp)
	movq	%rax, %rdi
	movq	%rax, 32(%rsp)
	call	malloc@PLT
	movl	8(%rsp), %r9d
	testq	%rax, %rax
	movq	%rax, %rbp
	jne	.L35
	movq	stderr(%rip), %rdi
	movl	%r9d, %ecx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC9(%rip), %rdx
	call	__fprintf_chk@PLT
	jmp	.L27
.L35:
	movl	0(%r13), %r8d
	leaq	88(%rsp), %rax
	movl	$80, %edx
	leaq	.LC10(%rip), %rcx
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movl	$2, %esi
	movl	%r9d, 60(%rsp)
	leaq	168(%rsp), %r15
	call	__sprintf_chk@PLT
	movq	8(%rsp), %rsi
	movq	%r15, %rdi
	call	strstr@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 48(%rsp)
	call	strlen@PLT
	movl	(%r12), %r8d
	movq	8(%rsp), %rdi
	leaq	.LC10(%rip), %rcx
	movl	$80, %edx
	movq	%rax, 40(%rsp)
	movl	$2, %esi
	xorl	%eax, %eax
	call	__sprintf_chk@PLT
	movq	40(%rsp), %r10
	movq	48(%rsp), %r11
	movq	8(%rsp), %rsi
	leaq	1(%r11,%r10), %rdi
	call	strstr@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 48(%rsp)
	call	strlen@PLT
	movl	(%r14), %r8d
	movq	8(%rsp), %rdi
	leaq	.LC10(%rip), %rcx
	movl	$80, %edx
	movq	%rax, 40(%rsp)
	movl	$2, %esi
	xorl	%eax, %eax
	call	__sprintf_chk@PLT
	movq	40(%rsp), %r10
	movq	48(%rsp), %r11
	movq	8(%rsp), %rsi
	leaq	1(%r11,%r10), %rdi
	call	strstr@PLT
	movq	8(%rsp), %rcx
	movl	$2, %esi
	movq	stderr(%rip), %rdi
	movq	%rax, %r8
	leaq	.LC11(%rip), %rdx
	movq	%rax, %r14
	xorl	%eax, %eax
	subq	%r15, %r8
	call	__fprintf_chk@PLT
	movq	8(%rsp), %rdi
	call	strlen@PLT
	movq	24(%rsp), %rdi
	xorl	%edx, %edx
	leaq	1(%r14,%rax), %rsi
	subq	%r15, %rsi
	call	fseek@PLT
	movq	32(%rsp), %rcx
	movq	24(%rsp), %r8
	movq	%rbp, %rdi
	movl	$1, %edx
	movq	%rcx, %rsi
	call	__fread_chk@PLT
	movl	60(%rsp), %r9d
	movq	16(%rsp), %rcx
	leaq	.LC12(%rip), %rdx
	movq	stderr(%rip), %rdi
	movq	%rax, %r8
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movq	24(%rsp), %rdi
	call	fclose@PLT
	movl	0(%r13), %edx
	imull	(%r12), %edx
	xorl	%eax, %eax
.L36:
	cmpl	%eax, %edx
	jle	.L24
	leaq	(%rax,%rax,2), %rcx
	movzbl	0(%rbp,%rcx), %ecx
	movl	%ecx, (%rbx,%rax,4)
	incq	%rax
	jmp	.L36
.L24:
	movq	1192(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$1208, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z8read_ppmPcPiS0_S0_, .-_Z8read_ppmPcPiS0_S0_
	.section	.rodata.str1.1
.LC13:
	.string	"wb"
.LC14:
	.string	"FAILED TO OPEN FILE '%s' for writing\n"
.LC15:
	.string	"P6\n"
.LC16:
	.string	"%d %d\n%d\n"
.LC17:
	.string	"%c%c%c"
	.text
	.globl	_Z9write_ppmPKciiiPj
	.type	_Z9write_ppmPKciiiPj, @function
_Z9write_ppmPKciiiPj:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%ecx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%esi, %ebp
	leaq	.LC13(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	call	fopen@PLT
	testq	%rax, %rax
	jne	.L46
	movq	stderr(%rip), %rdi
	leaq	.LC14(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L46:
	movq	%rax, %rdi
	movq	%rax, %rbx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC15(%rip), %rdx
	call	__fprintf_chk@PLT
	movl	%r14d, %r9d
	movl	%r12d, %r8d
	movl	%ebp, %ecx
	leaq	.LC16(%rip), %rdx
	movl	$2, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	imull	%r12d, %ebp
	leaq	.LC17(%rip), %r14
	xorl	%r12d, %r12d
.L47:
	cmpl	%r12d, %ebp
	jle	.L50
	movzbl	0(%r13,%r12,4), %ecx
	movq	%r14, %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	movq	%rbx, %rdi
	incq	%r12
	movl	%ecx, %r9d
	movl	%ecx, %r8d
	call	__fprintf_chk@PLT
	jmp	.L47
.L50:
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	fclose@PLT
	.cfi_endproc
.LFE2035:
	.size	_Z9write_ppmPKciiiPj, .-_Z9write_ppmPKciiiPj
	.section	.rodata.str1.1
.LC18:
	.string	"w+"
.LC19:
	.string	"%d,"
.LC20:
	.string	"\n"
	.text
	.globl	_Z9write_CSVPKciiPj
	.type	_Z9write_CSVPKciiPj, @function
_Z9write_CSVPKciiPj:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%edx, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%esi, %ebp
	leaq	.LC18(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	call	fopen@PLT
	testq	%rax, %rax
	je	.L52
	movq	%rax, %rbx
	xorl	%r13d, %r13d
	xorl	%r14d, %r14d
	jmp	.L53
.L52:
	movq	stderr(%rip), %rdi
	leaq	.LC14(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L58:
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%eax, %eax
	incl	%r14d
	movl	$2, %esi
	addl	%ebp, %r13d
	call	__fprintf_chk@PLT
.L53:
	cmpl	%r15d, %r14d
	jge	.L55
	movslq	%r13d, %rax
	xorl	%r8d, %r8d
	leaq	(%r12,%rax,4), %r9
.L56:
	cmpl	%r8d, %ebp
	jle	.L58
	movl	(%r9,%r8,4), %ecx
	leaq	.LC19(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%eax, %eax
	movl	$2, %esi
	movq	%r9, 8(%rsp)
	movq	%r8, (%rsp)
	call	__fprintf_chk@PLT
	movq	(%rsp), %r8
	movq	8(%rsp), %r9
	incq	%r8
	jmp	.L56
.L55:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	fclose@PLT
	.cfi_endproc
.LFE2036:
	.size	_Z9write_CSVPKciiPj, .-_Z9write_CSVPKciiPj
	.globl	_Z8getNewXYiiiidPiS_
	.type	_Z8getNewXYiiiidPiS_, @function
_Z8getNewXYiiiidPiS_:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%edi, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%esi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r9, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	leaq	24(%rsp), %rdi
	leaq	16(%rsp), %rsi
	call	sincos@PLT
	movl	%ebp, %eax
	movl	%ebx, %edx
	movsd	16(%rsp), %xmm4
	imull	%ebx, %edx
	movsd	24(%rsp), %xmm5
	imull	%ebp, %eax
	movsd	%xmm4, 8(%rsp)
	movsd	%xmm5, (%rsp)
	addl	%edx, %eax
	cvtsi2sdl	%eax, %xmm0
	call	sqrt@PLT
	cvtsi2sdl	%ebp, %xmm7
	movsd	(%rsp), %xmm5
	addsd	.LC21(%rip), %xmm0
	movsd	.LC0(%rip), %xmm6
	movsd	8(%rsp), %xmm4
	cvttsd2sil	%xmm0, %eax
	cvtsi2sdl	%r15d, %xmm0
	cvtsi2sdl	%eax, %xmm1
	movaps	%xmm1, %xmm3
	movaps	%xmm1, %xmm2
	xorps	.LC22(%rip), %xmm2
	subsd	%xmm7, %xmm3
	cvtsi2sdl	%ebx, %xmm7
	mulsd	%xmm6, %xmm2
	mulsd	%xmm6, %xmm3
	subsd	%xmm7, %xmm1
	mulsd	%xmm6, %xmm1
	subsd	%xmm3, %xmm0
	movaps	%xmm5, %xmm6
	cvtsi2sdl	%r14d, %xmm3
	subsd	%xmm2, %xmm0
	subsd	%xmm1, %xmm3
	movaps	%xmm3, %xmm1
	movaps	%xmm4, %xmm3
	subsd	%xmm2, %xmm1
	mulsd	%xmm0, %xmm3
	mulsd	%xmm5, %xmm0
	mulsd	%xmm1, %xmm6
	mulsd	%xmm1, %xmm4
	subsd	%xmm6, %xmm3
	addsd	%xmm4, %xmm0
	addsd	%xmm2, %xmm3
	addsd	%xmm2, %xmm0
	cvttsd2sil	%xmm3, %eax
	negl	%eax
	movl	%eax, 0(%r13)
	cvttsd2sil	%xmm0, %eax
	negl	%eax
	movl	%eax, (%r12)
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2037:
	.size	_Z8getNewXYiiiidPiS_, .-_Z8getNewXYiiiidPiS_
	.globl	_Z46__device_stub__Z21rotation_kernel_naivePjS_iidPjS_iid
	.type	_Z46__device_stub__Z21rotation_kernel_naivePjS_iidPjS_iid, @function
_Z46__device_stub__Z21rotation_kernel_naivePjS_iidPjS_iid:
.LFB2062:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movsd	%xmm0, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L61
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z21rotation_kernel_naivePjS_iid(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L61:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L63
	call	__stack_chk_fail@PLT
.L63:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2062:
	.size	_Z46__device_stub__Z21rotation_kernel_naivePjS_iidPjS_iid, .-_Z46__device_stub__Z21rotation_kernel_naivePjS_iidPjS_iid
	.globl	_Z21rotation_kernel_naivePjS_iid
	.type	_Z21rotation_kernel_naivePjS_iid, @function
_Z21rotation_kernel_naivePjS_iid:
.LFB2063:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z21rotation_kernel_naivePjS_iidPjS_iid
	.cfi_endproc
.LFE2063:
	.size	_Z21rotation_kernel_naivePjS_iid, .-_Z21rotation_kernel_naivePjS_iid
	.globl	_Z42__device_stub__Z17rotation_kernel_2PjS_iidPjS_iid
	.type	_Z42__device_stub__Z17rotation_kernel_2PjS_iidPjS_iid, @function
_Z42__device_stub__Z17rotation_kernel_2PjS_iidPjS_iid:
.LFB2064:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movsd	%xmm0, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L66
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z17rotation_kernel_2PjS_iid(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L66:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L68
	call	__stack_chk_fail@PLT
.L68:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2064:
	.size	_Z42__device_stub__Z17rotation_kernel_2PjS_iidPjS_iid, .-_Z42__device_stub__Z17rotation_kernel_2PjS_iidPjS_iid
	.globl	_Z17rotation_kernel_2PjS_iid
	.type	_Z17rotation_kernel_2PjS_iid, @function
_Z17rotation_kernel_2PjS_iid:
.LFB2065:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z17rotation_kernel_2PjS_iidPjS_iid
	.cfi_endproc
.LFE2065:
	.size	_Z17rotation_kernel_2PjS_iid, .-_Z17rotation_kernel_2PjS_iid
	.globl	_Z41__device_stub__Z17rotation_kernel_3PjS_iiPjS_ii
	.type	_Z41__device_stub__Z17rotation_kernel_3PjS_iiPjS_ii, @function
_Z41__device_stub__Z17rotation_kernel_3PjS_iiPjS_ii:
.LFB2066:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L71
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z17rotation_kernel_3PjS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L71:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L73
	call	__stack_chk_fail@PLT
.L73:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2066:
	.size	_Z41__device_stub__Z17rotation_kernel_3PjS_iiPjS_ii, .-_Z41__device_stub__Z17rotation_kernel_3PjS_iiPjS_ii
	.globl	_Z17rotation_kernel_3PjS_ii
	.type	_Z17rotation_kernel_3PjS_ii, @function
_Z17rotation_kernel_3PjS_ii:
.LFB2067:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z17rotation_kernel_3PjS_iiPjS_ii
	.cfi_endproc
.LFE2067:
	.size	_Z17rotation_kernel_3PjS_ii, .-_Z17rotation_kernel_3PjS_ii
	.globl	_Z42__device_stub__Z18histo_kernel_naivePjS_iiPjS_ii
	.type	_Z42__device_stub__Z18histo_kernel_naivePjS_iiPjS_ii, @function
_Z42__device_stub__Z18histo_kernel_naivePjS_iiPjS_ii:
.LFB2068:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L76
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z18histo_kernel_naivePjS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L76:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L78
	call	__stack_chk_fail@PLT
.L78:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2068:
	.size	_Z42__device_stub__Z18histo_kernel_naivePjS_iiPjS_ii, .-_Z42__device_stub__Z18histo_kernel_naivePjS_iiPjS_ii
	.globl	_Z18histo_kernel_naivePjS_ii
	.type	_Z18histo_kernel_naivePjS_ii, @function
_Z18histo_kernel_naivePjS_ii:
.LFB2069:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z18histo_kernel_naivePjS_iiPjS_ii
	.cfi_endproc
.LFE2069:
	.size	_Z18histo_kernel_naivePjS_ii, .-_Z18histo_kernel_naivePjS_ii
	.globl	_Z38__device_stub__Z14histo_kernel_2PjS_iiPjS_ii
	.type	_Z38__device_stub__Z14histo_kernel_2PjS_iiPjS_ii, @function
_Z38__device_stub__Z14histo_kernel_2PjS_iiPjS_ii:
.LFB2070:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L81
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14histo_kernel_2PjS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L81:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L83
	call	__stack_chk_fail@PLT
.L83:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2070:
	.size	_Z38__device_stub__Z14histo_kernel_2PjS_iiPjS_ii, .-_Z38__device_stub__Z14histo_kernel_2PjS_iiPjS_ii
	.globl	_Z14histo_kernel_2PjS_ii
	.type	_Z14histo_kernel_2PjS_ii, @function
_Z14histo_kernel_2PjS_ii:
.LFB2071:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z14histo_kernel_2PjS_iiPjS_ii
	.cfi_endproc
.LFE2071:
	.size	_Z14histo_kernel_2PjS_ii, .-_Z14histo_kernel_2PjS_ii
	.section	.rodata.str1.1
.LC24:
	.string	"small-zibra-unsplash.ppm"
.LC25:
	.string	"file %s , rotation angle: %f\n"
.LC26:
	.string	"width:%d, height:%d,maxVal: %d, diagonal size: %d \n"
.LC27:
	.string	" unable to malloc \n"
.LC30:
	.string	"(%d, %d) rotated to newX: %d, newY: %d \n"
.LC31:
	.string	"paddledInput.ppm"
.LC32:
	.string	"cpu rotation time: %f milliseconds\n"
.LC33:
	.string	"rotated_gold.ppm"
.LC34:
	.string	"rotated_gold.csv"
.LC35:
	.string	"cpu histo time: %f milliseconds\n"
.LC36:
	.string	"histoBinCPU.csv"
.LC38:
	.string	"GPU rotation_kernel_naive time: %f milliseconds\n"
.LC39:
	.string	"rotated_GPU_naive.ppm"
.LC40:
	.string	"GPU rotation_kernel_2 time: %f milliseconds\n"
.LC41:
	.string	"rotated_GPU2.ppm"
.LC42:
	.string	"GPU rotation kernel_3 tiem: %f milliseconds\n"
.LC43:
	.string	"rotated_GPU3.ppm"
.LC45:
	.string	"GPU histo_naive time: %f milliseconds\n"
.LC46:
	.string	"histoBinGPU_kernel_naive.csv"
.LC47:
	.string	"GPU histo_kernel_2 time: %f milliseconds\n"
.LC48:
	.string	"histoBinGPU_kernel_2.csv"
.LC49:
	.string	"done\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edi, %r12d
	leaq	.LC24(%rip), %rdi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$296, %rsp
	.cfi_def_cfa_offset 352
	movq	%fs:40, %rax
	movq	%rax, 280(%rsp)
	xorl	%eax, %eax
	call	strdup@PLT
	movsd	.LC23(%rip), %xmm1
	movq	%rax, %rbx
	cmpl	$1, %r12d
	jle	.L87
	cmpl	$3, %r12d
	jne	.L88
	movq	8(%rbp), %rdi
	call	atoi@PLT
	movq	16(%rbp), %rdi
	cvtsi2sdl	%eax, %xmm1
	movsd	%xmm1, 8(%rsp)
	call	strdup@PLT
	movsd	8(%rsp), %xmm1
	movq	%rax, %rbx
	jmp	.L87
.L88:
	movsd	.LC23(%rip), %xmm1
	cmpl	$2, %r12d
	jne	.L87
	movq	8(%rbp), %rdi
	call	atoi@PLT
	cvtsi2sdl	%eax, %xmm1
.L87:
	movq	stderr(%rip), %rdi
	movaps	%xmm1, %xmm0
	movq	%rbx, %rcx
	movb	$1, %al
	leaq	.LC25(%rip), %rdx
	movl	$2, %esi
	movsd	%xmm1, 48(%rsp)
	call	__fprintf_chk@PLT
	movq	%rbx, %rdi
	leaq	116(%rsp), %rcx
	leaq	108(%rsp), %rsi
	leaq	112(%rsp), %rdx
	call	_Z8read_ppmPcPiS0_S0_
	movl	108(%rsp), %r12d
	movl	112(%rsp), %r13d
	movq	%rax, %r14
	movl	%r13d, %edx
	movl	%r12d, %eax
	imull	%r13d, %edx
	imull	%r12d, %eax
	addl	%edx, %eax
	cvtsi2sdl	%eax, %xmm0
	call	sqrt@PLT
	movl	116(%rsp), %r8d
	movl	%r12d, %edx
	movl	%r13d, %ecx
	addsd	.LC21(%rip), %xmm0
	leaq	.LC26(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	cvttsd2siq	%xmm0, %rbx
	movl	%ebx, %r9d
	movl	%ebx, 76(%rsp)
	movl	%ebx, 8(%rsp)
	call	__printf_chk@PLT
	imull	$768, %ebx, %eax
	cltq
	salq	$2, %rax
	movq	%rax, 24(%rsp)
	movl	%ebx, %eax
	movq	24(%rsp), %rdi
	imull	%ebx, %eax
	leal	(%rax,%rax,2), %eax
	cltq
	salq	$2, %rax
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	16(%rsp), %rdi
	movq	%rax, 40(%rsp)
	call	malloc@PLT
	movq	16(%rsp), %rdi
	movq	%rax, 32(%rsp)
	call	malloc@PLT
	testq	%rax, %rax
	movq	%rax, %rbp
	sete	%al
	cmpq	$0, 40(%rsp)
	sete	%dl
	orb	%dl, %al
	jne	.L119
	cmpq	$0, 32(%rsp)
	movsd	48(%rsp), %xmm1
	je	.L119
	movl	%ebx, %eax
	movl	$2, %ecx
	xorl	%r8d, %r8d
	xorl	%edi, %edi
	subl	%r13d, %eax
	movq	.LC22(%rip), %xmm0
	cltd
	idivl	%ecx
	xorps	%xmm0, %xmm1
	divsd	.LC28(%rip), %xmm1
	mulsd	.LC29(%rip), %xmm1
	addsd	%xmm1, %xmm1
	movsd	%xmm1, 48(%rsp)
	movl	%eax, %esi
	leal	0(%r13,%rax), %r10d
	movl	%ebx, %eax
	subl	%r12d, %eax
	cltd
	idivl	%ecx
	movl	%esi, %ecx
	imull	%r12d, %ecx
	negl	%ecx
	leal	(%r12,%rax), %r11d
	subl	%eax, %ecx
.L91:
	movl	8(%rsp), %edx
	cmpl	%edx, %edi
	jge	.L120
	xorl	%edx, %edx
.L94:
	cmpl	%edi, %esi
	jg	.L92
	cmpl	%edi, %r10d
	jle	.L92
	cmpl	%edx, %eax
	jg	.L92
	cmpl	%edx, %r11d
	jle	.L92
	leal	(%rcx,%rdx), %r9d
	movslq	%r9d, %r9
	movl	(%r14,%r9,4), %r15d
	leal	(%r8,%rdx), %r9d
	movslq	%r9d, %r9
	movl	%r15d, 0(%rbp,%r9,4)
	jmp	.L93
.L92:
	leal	(%rdx,%r8), %r9d
	xorl	%r15d, %r15d
	movslq	%r9d, %r9
	movl	%r15d, 0(%rbp,%r9,4)
.L93:
	incl	%edx
	cmpl	%edx, 8(%rsp)
	jg	.L94
	movl	76(%rsp), %edx
	incl	%edi
	addl	%r12d, %ecx
	addl	%edx, %r8d
	jmp	.L91
.L120:
	movsd	48(%rsp), %xmm2
	movl	%r13d, %ecx
	movl	%r12d, %edx
	xorl	%edi, %edi
	leaq	124(%rsp), %r9
	leaq	120(%rsp), %r8
	movl	$200, %esi
	xorps	%xmm2, %xmm0
	leaq	152(%rsp), %r14
	leaq	160(%rsp), %r13
	call	_Z8getNewXYiiiidPiS_
	movl	124(%rsp), %r9d
	xorl	%edx, %edx
	xorl	%eax, %eax
	movl	120(%rsp), %r8d
	movl	$200, %ecx
	movl	$2, %edi
	leaq	.LC30(%rip), %rsi
	call	__printf_chk@PLT
	movl	8(%rsp), %edx
	movq	%rbp, %r8
	movl	$255, %ecx
	leaq	.LC31(%rip), %rdi
	movl	%edx, %esi
	call	_Z9write_ppmPKciiiPj
	movq	%r14, %rdi
	call	cudaEventCreate@PLT
	movq	%r13, %rdi
	call	cudaEventCreate@PLT
	movq	152(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	8(%rsp), %ecx
	movq	32(%rsp), %rsi
	movq	%rbp, %rdi
	movsd	48(%rsp), %xmm0
	movl	%ecx, %edx
	call	_Z14matrixRotationPjS_iid
	movq	160(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	160(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	160(%rsp), %rdx
	movq	152(%rsp), %rsi
	leaq	128(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC32(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	128(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	152(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	160(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movl	8(%rsp), %edx
	movq	32(%rsp), %r8
	movl	$255, %ecx
	leaq	.LC33(%rip), %rdi
	movl	%edx, %esi
	call	_Z9write_ppmPKciiiPj
	movl	8(%rsp), %edx
	movq	32(%rsp), %rcx
	leaq	.LC34(%rip), %rdi
	movl	%edx, %esi
	call	_Z9write_CSVPKciiPj
	movq	40(%rsp), %rdi
	xorl	%eax, %eax
	movl	$65536, %ecx
	rep stosl
	movq	%r14, %rdi
	call	cudaEventCreate@PLT
	movq	%r13, %rdi
	call	cudaEventCreate@PLT
	movq	152(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	8(%rsp), %ecx
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	%ecx, %edx
	call	_Z17computerGoldHistoPjS_ii
	movq	160(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	160(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	160(%rsp), %rdx
	movq	152(%rsp), %rsi
	leaq	132(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	152(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	160(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC35(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	132(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	40(%rsp), %rcx
	movl	8(%rsp), %esi
	movl	$256, %edx
	leaq	.LC36(%rip), %rdi
	call	_Z9write_CSVPKciiPj
	movq	16(%rsp), %rdi
	call	malloc@PLT
	movq	16(%rsp), %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movq	16(%rsp), %rdi
	movq	%rax, %r15
	call	malloc@PLT
	movq	24(%rsp), %rdi
	movq	%rax, 56(%rsp)
	call	malloc@PLT
	movq	%rax, 64(%rsp)
	testq	%r12, %r12
	je	.L119
	testq	%rax, %rax
	je	.L119
	testq	%r15, %r15
	je	.L119
	cmpq	$0, 56(%rsp)
	je	.L119
	movq	16(%rsp), %rsi
	leaq	168(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rsi
	leaq	176(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rsi
	leaq	184(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdx
	movq	%rbp, %rsi
	movq	168(%rsp), %rdi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$8, %ecx
	movq	%r14, %rdi
	movabsq	$34359738376, %rax
	movq	%rax, 208(%rsp)
	leal	7(%rbx), %eax
	movl	$1, 216(%rsp)
	cltd
	idivl	%ecx
	movl	$1, 228(%rsp)
	movl	%eax, 220(%rsp)
	movl	%eax, 224(%rsp)
	call	cudaEventCreate@PLT
	movq	%r13, %rdi
	movl	$100, %r13d
	call	cudaEventCreate@PLT
	movq	152(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
.L99:
	movl	216(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	208(%rsp), %rdx
	movq	220(%rsp), %rdi
	movl	228(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L98
	movl	8(%rsp), %ecx
	movsd	48(%rsp), %xmm0
	movq	184(%rsp), %rsi
	movq	168(%rsp), %rdi
	movl	%ecx, %edx
	call	_Z46__device_stub__Z21rotation_kernel_naivePjS_iidPjS_iid
.L98:
	decl	%r13d
	jne	.L99
	movq	160(%rsp), %rdi
	xorl	%esi, %esi
	movl	$100, %r13d
	call	cudaEventRecord@PLT
	movq	16(%rsp), %rdx
	movl	$2, %ecx
	movq	%r12, %rdi
	movq	184(%rsp), %rsi
	call	cudaMemcpy@PLT
	movq	160(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	160(%rsp), %rdx
	movq	152(%rsp), %rsi
	leaq	136(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	152(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	160(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC38(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	136(%rsp), %xmm0
	divss	.LC37(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	8(%rsp), %edx
	movq	%r12, %r8
	movl	$255, %ecx
	leaq	.LC39(%rip), %rdi
	movl	%edx, %esi
	call	_Z9write_ppmPKciiiPj
	leaq	152(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	160(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	152(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
.L101:
	movl	216(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	208(%rsp), %rdx
	movq	220(%rsp), %rdi
	movl	228(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L100
	movl	8(%rsp), %ecx
	movsd	48(%rsp), %xmm0
	movq	176(%rsp), %rsi
	movq	168(%rsp), %rdi
	movl	%ecx, %edx
	call	_Z42__device_stub__Z17rotation_kernel_2PjS_iidPjS_iid
.L100:
	decl	%r13d
	jne	.L101
	movsd	48(%rsp), %xmm0
	leaq	88(%rsp), %rdi
	leaq	80(%rsp), %rsi
	call	sincos@PLT
	movq	160(%rsp), %rdi
	xorl	%esi, %esi
	movq	80(%rsp), %r13
	movq	88(%rsp), %r14
	call	cudaEventRecord@PLT
	movq	16(%rsp), %rdx
	movl	$2, %ecx
	movq	%r15, %rdi
	movq	176(%rsp), %rsi
	call	cudaMemcpy@PLT
	movq	160(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	160(%rsp), %rdx
	movq	152(%rsp), %rsi
	leaq	140(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	152(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	160(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC40(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	140(%rsp), %xmm0
	divss	.LC37(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	8(%rsp), %edx
	movq	%r15, %r8
	movl	$255, %ecx
	leaq	.LC41(%rip), %rdi
	movl	%edx, %esi
	call	_Z9write_ppmPKciiiPj
	movl	$32, %edi
	call	malloc@PLT
	cvtsi2sdl	%ebx, %xmm0
	xorl	%ecx, %ecx
	movl	$32, %edx
	mulsd	.LC0(%rip), %xmm0
	movq	%r13, 24(%rax)
	movq	%rax, %rsi
	movl	$1, %r8d
	movq	%r14, 16(%rax)
	leaq	_ZL6PARAMS(%rip), %rdi
	movl	$100, %r13d
	movsd	%xmm0, (%rax)
	movsd	%xmm0, 8(%rax)
	call	cudaMemcpyToSymbol@PLT
	leaq	152(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	160(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	152(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
.L103:
	movl	216(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	208(%rsp), %rdx
	movq	220(%rsp), %rdi
	movl	228(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L102
	movl	8(%rsp), %ecx
	movq	176(%rsp), %rsi
	movq	168(%rsp), %rdi
	movl	%ecx, %edx
	call	_Z41__device_stub__Z17rotation_kernel_3PjS_iiPjS_ii
.L102:
	decl	%r13d
	jne	.L103
	movq	160(%rsp), %rdi
	xorl	%esi, %esi
	leaq	152(%rsp), %r13
	call	cudaEventRecord@PLT
	movq	16(%rsp), %rdx
	movq	56(%rsp), %rdi
	movl	$2, %ecx
	movq	176(%rsp), %rsi
	call	cudaMemcpy@PLT
	movq	160(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	160(%rsp), %rdx
	movq	152(%rsp), %rsi
	leaq	144(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	152(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	160(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC42(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	144(%rsp), %xmm0
	divss	.LC37(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	8(%rsp), %edx
	movq	56(%rsp), %r8
	movl	$255, %ecx
	leaq	.LC43(%rip), %rdi
	movl	%edx, %esi
	call	_Z9write_ppmPKciiiPj
	movq	168(%rsp), %rdi
	call	cudaFree@PLT
	movq	184(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rsi
	leaq	192(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	%r13, %rdi
	call	cudaEventCreate@PLT
	leaq	160(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	152(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	cvtsi2ssl	%ebx, %xmm0
	mulss	.LC44(%rip), %xmm0
	call	ceilf@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	cvttss2sil	%xmm0, %eax
	movl	$1, %esi
	movabsq	$137438953504, %rdx
	movl	%eax, 244(%rsp)
	movl	%eax, 248(%rsp)
	movq	244(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L104
	movl	8(%rsp), %ecx
	movq	192(%rsp), %rsi
	movq	176(%rsp), %rdi
	movl	%ecx, %edx
	call	_Z42__device_stub__Z18histo_kernel_naivePjS_iiPjS_ii
.L104:
	movq	160(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdx
	movq	64(%rsp), %rdi
	movl	$2, %ecx
	movq	192(%rsp), %rsi
	call	cudaMemcpy@PLT
	movq	160(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	160(%rsp), %rdx
	movq	152(%rsp), %rsi
	leaq	148(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	152(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	160(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC45(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	148(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	64(%rsp), %rcx
	movl	8(%rsp), %esi
	movl	$256, %edx
	leaq	.LC46(%rip), %rdi
	call	_Z9write_CSVPKciiPj
	movq	24(%rsp), %rdi
	call	malloc@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.L105
.L119:
	movq	stderr(%rip), %rdi
	leaq	.LC27(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L105:
	movq	24(%rsp), %rsi
	leaq	200(%rsp), %rdi
	movabsq	$4294967552, %r14
	call	cudaMalloc@PLT
	movq	%r13, %rdi
	movl	$100, %r13d
	call	cudaEventCreate@PLT
	leaq	160(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	152(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
.L107:
	movl	76(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, %rdx
	movl	$1, %ecx
	movq	%r14, 268(%rsp)
	movl	%eax, 256(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 260(%rsp)
	movq	256(%rsp), %rdi
	movl	264(%rsp), %esi
	movl	$1, 276(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L106
	movl	8(%rsp), %ecx
	movq	200(%rsp), %rsi
	movq	176(%rsp), %rdi
	movl	%ecx, %edx
	call	_Z38__device_stub__Z14histo_kernel_2PjS_iiPjS_ii
.L106:
	decl	%r13d
	jne	.L107
	movq	160(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	160(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movl	$2, %ecx
	movq	%rbx, %rdi
	movq	200(%rsp), %rsi
	call	cudaMemcpy@PLT
	movq	160(%rsp), %rdx
	movq	152(%rsp), %rsi
	leaq	268(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	152(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	160(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC47(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	268(%rsp), %xmm0
	divss	.LC37(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	8(%rsp), %esi
	movq	%rbx, %rcx
	movl	$256, %edx
	leaq	.LC48(%rip), %rdi
	call	_Z9write_CSVPKciiPj
	movq	176(%rsp), %rdi
	call	cudaFree@PLT
	movq	192(%rsp), %rdi
	call	cudaFree@PLT
	movq	200(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%r15, %rdi
	call	free@PLT
	movq	56(%rsp), %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	free@PLT
	movq	64(%rsp), %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	stderr(%rip), %rdi
	xorl	%eax, %eax
	leaq	.LC49(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movq	280(%rsp), %rax
	subq	%fs:40, %rax
	je	.L108
	call	__stack_chk_fail@PLT
.L108:
	addq	$296, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.text
	.globl	_Z38__device_stub__Z14histo_kernel_3PjS_iiPjS_ii
	.type	_Z38__device_stub__Z14histo_kernel_3PjS_iiPjS_ii, @function
_Z38__device_stub__Z14histo_kernel_3PjS_iiPjS_ii:
.LFB2072:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L121
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14histo_kernel_3PjS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L121:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L123
	call	__stack_chk_fail@PLT
.L123:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2072:
	.size	_Z38__device_stub__Z14histo_kernel_3PjS_iiPjS_ii, .-_Z38__device_stub__Z14histo_kernel_3PjS_iiPjS_ii
	.globl	_Z14histo_kernel_3PjS_ii
	.type	_Z14histo_kernel_3PjS_ii, @function
_Z14histo_kernel_3PjS_ii:
.LFB2073:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z14histo_kernel_3PjS_iiPjS_ii
	.cfi_endproc
.LFE2073:
	.size	_Z14histo_kernel_3PjS_ii, .-_Z14histo_kernel_3PjS_ii
	.section	.rodata.str1.1
.LC50:
	.string	"_Z14histo_kernel_3PjS_ii"
.LC51:
	.string	"_Z14histo_kernel_2PjS_ii"
.LC52:
	.string	"_Z18histo_kernel_naivePjS_ii"
.LC53:
	.string	"_Z17rotation_kernel_3PjS_ii"
.LC54:
	.string	"_Z17rotation_kernel_2PjS_iid"
.LC55:
	.string	"_Z21rotation_kernel_naivePjS_iid"
.LC56:
	.string	"PARAMS"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2075:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC50(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z14histo_kernel_3PjS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC51(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14histo_kernel_2PjS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC52(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z18histo_kernel_naivePjS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC53(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17rotation_kernel_3PjS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC54(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17rotation_kernel_2PjS_iid(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC55(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z21rotation_kernel_naivePjS_iid(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC56(%rip), %rdx
	movl	$32, %r9d
	leaq	_ZL6PARAMS(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2075:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL6PARAMS
	.comm	_ZL6PARAMS,32,32
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1071644672
	.align 8
.LC21:
	.long	0
	.long	1074266112
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC22:
	.long	0
	.long	-2147483648
	.long	0
	.long	0
	.section	.rodata.cst8
	.align 8
.LC23:
	.long	0
	.long	1078362112
	.align 8
.LC28:
	.long	0
	.long	1081507840
	.align 8
.LC29:
	.long	1413754136
	.long	1074340347
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC37:
	.long	1120403456
	.align 4
.LC44:
	.long	1023410176
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:



#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <fcntl.h>
#include "string.h"
#include <math.h>



#define DEFAULT_FILENAME "small-zibra-unsplash.ppm"

#define MAX_VALUE 256  //max value of the pic luminance
#define NUM_BINS 256 //num of bins equals to the max value
__constant__ double PARAMS[4];

void write_ppm( char const *filename, int xsize, int ysize, int maxval, unsigned int *pic);
unsigned int *read_ppm( char *filename, int * xsize, int * ysize, int *maxval );
void write_CSV(char const *filename,int width, int height, unsigned int *input);
void matrixRotation(unsigned int *input, unsigned int *output, int width, int height, double angle);
void computerGoldHisto(unsigned int* input, unsigned int* histo, int width, int height);
void getNewXY(int inputX, int inputY, int width, int height,double angle, int *outputX, int *outputY);

__global__ void rotation_kernel_naive(unsigned int *input,unsigned int *output,int width, int height,double angle);
__global__ void rotation_kernel_2(unsigned int *input,unsigned int *output,int width, int height,double angle);
__global__ void rotation_kernel_3(unsigned int *input,unsigned int *output,int width,int height);

__global__ void histo_kernel_naive(unsigned int *input,unsigned int *histo,int width, int height);
__global__ void histo_kernel_2(unsigned int *input,unsigned int *histo,int width, int height);


int main( int argc, char **argv )
{
	double ang ;
	char *filename;
	filename = strdup( DEFAULT_FILENAME);
	ang = 45.0;
	if (argc > 1) {
		if (argc == 3)  { //angle and filename

			ang = atoi( argv[1] );
			filename = strdup( argv[2]);
		}
		if (argc == 2) { // angle
			ang = atoi( argv[1] );
		}

	}
		fprintf(stderr, "file %s , rotation angle: %f\n", filename, ang);
  //initialization paramters
  int xsize, ysize,maxval;

  unsigned int *h_histoCPU;
  unsigned int *h_Input;
  unsigned int *h_rotated;

  //read input from image
  unsigned int *pic = read_ppm( filename, &xsize, &ysize, &maxval );


  int diaLen = (unsigned int) (sqrt(xsize * xsize + ysize* ysize) + 3);//paddle extra 3 for safer non-cropped rotation
  printf("width:%d, height:%d,maxVal: %d, diagonal size: %d \n",xsize,ysize,maxval,diaLen );
  //decide memory size
  size_t histo_size = MAX_VALUE * diaLen * 3 * sizeof(int);
  size_t rotate_size = diaLen * diaLen * 3 * sizeof(int);

  //allocate memory

  h_histoCPU = (unsigned int*)malloc(histo_size);
  h_rotated= (unsigned int*)malloc(rotate_size);
  h_Input = (unsigned int*)malloc(rotate_size);

  if (!h_Input || !h_histoCPU || !h_rotated) {
		fprintf(stderr, " unable to malloc \n");
		exit(-1); // fail
	}

  //decide rotate angle， rotation is done swirlly along the image center.
 double angle = - ang / 360 * M_PI * 2;
//paddle data for h_Input, make it squre with side length as the input diagonal length
    int deltaX = diaLen - xsize ;
    int deltaY = diaLen - ysize ;

    for(int i=0;i<diaLen;i++){
      for(int j = 0; j< diaLen;j++){
        if(i>=deltaY / 2 && i< (ysize + deltaY/2) && j >= deltaX/2 && j < (xsize + deltaX/2)){
          h_Input[i*diaLen+j]=pic[(i-deltaY/2)*xsize + (j-deltaX/2)];
        }else{
          h_Input[i*diaLen+j] = 0;
        }
      }
    }
//calculate new coordinate

int outputX, outputY;
double realAngle = -angle;
int originX = 0;
int originY = 200;
getNewXY(originX,originY, xsize, ysize, realAngle, &outputX, &outputY);
printf("(%d, %d) rotated to newX: %d, newY: %d \n", originX,originY,outputX, outputY);
//output the paddledInput
write_ppm( "paddledInput.ppm", diaLen, diaLen, 255, h_Input);
//timer for cpu rotation------------------------
hipEvent_t start, stop;
float time;
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start,0);
//run rotation on cpu
matrixRotation( h_Input, h_rotated, diaLen, diaLen, angle);

hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipEventElapsedTime(&time,start,stop);

printf("cpu rotation time: %f milliseconds\n",time);
hipEventDestroy(start);
hipEventDestroy(stop);
//output rotated image
write_ppm( "rotated_gold.ppm", diaLen, diaLen, 255, h_rotated);
write_CSV("rotated_gold.csv",diaLen,diaLen, h_rotated);
//write_CSV("picture.csv",xsize,ysize, pic);

//initialization h_BinsCPU
for(int i = 0;i<NUM_BINS;i++){
  for(int j = 0;j<MAX_VALUE;j++){
    h_histoCPU[i*MAX_VALUE+j] = 0;
  }
}
//timer for CPU histogram
float time2;
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start,0);

//run histo on CPU
computerGoldHisto(h_rotated,h_histoCPU,diaLen,diaLen);

hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipEventElapsedTime(&time2,start,stop);
hipEventDestroy(start);
hipEventDestroy(stop);
printf("cpu histo time: %f milliseconds\n",time2);

//output histo result to CSV file
write_CSV("histoBinCPU.csv",diaLen,MAX_VALUE, h_histoCPU);

//cudaMalloc for rotation kernel
unsigned int *h_histoGPU;
unsigned int *h_rotatedGPU;
unsigned int *h_rotatedGPU2;
unsigned int *h_rotatedGPU3;
unsigned int *d_Input;
unsigned int *d_rotated;
unsigned int *d_rotated_naive;
unsigned int *d_histo;


//memory allocate in the host
h_rotatedGPU = (unsigned int*)malloc(rotate_size);
h_rotatedGPU2 = (unsigned int*)malloc(rotate_size);
h_rotatedGPU3 = (unsigned int*)malloc(rotate_size);
h_histoGPU = (unsigned int*)malloc(histo_size);
if (!h_rotatedGPU ||!h_histoGPU||!h_rotatedGPU2||!h_rotatedGPU3) {
  fprintf(stderr, " unable to malloc \n");
  exit(-1); // fail
}

hipMalloc((void**)&d_Input,rotate_size);
hipMalloc((void**)&d_rotated,rotate_size);
hipMalloc((void**)&d_rotated_naive,rotate_size);

//cudaMemcpy
hipMemcpy(d_Input,h_Input,rotate_size,hipMemcpyHostToDevice);

//kernel dimension
int blockSize = 8;
dim3 blockDim(blockSize,blockSize,1);
int gridSize = (diaLen + blockSize -1)/blockSize;
dim3 gridDim(gridSize,gridSize,1);
float time3;
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start,0);

//launch kernel 100 times and take average time
for(int i = 0;i<100;i++){
	rotation_kernel_naive<<<gridDim,blockDim>>>(d_Input,d_rotated_naive,diaLen,diaLen,angle);
}
hipEventRecord(stop,0);
hipMemcpy(h_rotatedGPU,d_rotated_naive,rotate_size,hipMemcpyDeviceToHost);
hipEventSynchronize(stop);
hipEventElapsedTime(&time3,start,stop);
hipEventDestroy(start);
hipEventDestroy(stop);
printf("GPU rotation_kernel_naive time: %f milliseconds\n",time3 / 100);
//output GPU rotate result
write_ppm( "rotated_GPU_naive.ppm", diaLen, diaLen, 255, h_rotatedGPU);
//GPU rotation with optimization, using registers to store pre-calculated values

hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start,0);
//launch kernel 100 times and take average time
for(int i = 0;i<100;i++){
rotation_kernel_2<<<gridDim,blockDim>>>(d_Input,d_rotated,diaLen,diaLen,angle);
}
hipEventRecord(stop,0);
hipMemcpy(h_rotatedGPU2,d_rotated,rotate_size,hipMemcpyDeviceToHost);
hipEventSynchronize(stop);
float time3_2;
hipEventElapsedTime(&time3_2,start,stop);
hipEventDestroy(start);
hipEventDestroy(stop);
printf("GPU rotation_kernel_2 time: %f milliseconds\n",time3_2 / 100);

//output GPU rotate result
write_ppm( "rotated_GPU2.ppm", diaLen, diaLen, 255, h_rotatedGPU2);
//rotation kernel_3 using constant memory---------------------------------
double *P;
P = (double*) malloc(4 * sizeof(double));
P[0] = (double)diaLen / 2; //xCenter
P[1] = (double)diaLen / 2; //yCenter
P[2] = sin(angle);
P[3] = cos(angle);

//load data to constant memory
hipMemcpyToSymbol(HIP_SYMBOL(PARAMS), P, 4 * sizeof(double));
//timer
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start,0);
//launch kernel 100 times and take average time
for(int i = 0;i<100;i++){
rotation_kernel_3<<<gridDim,blockDim>>>(d_Input,d_rotated,diaLen,diaLen);
}
hipEventRecord(stop,0);
hipMemcpy(h_rotatedGPU3,d_rotated,rotate_size,hipMemcpyDeviceToHost);
hipEventSynchronize(stop);
float time3_3;
hipEventElapsedTime(&time3_3,start,stop);
hipEventDestroy(start);
hipEventDestroy(stop);
printf("GPU rotation kernel_3 tiem: %f milliseconds\n",time3_3 / 100);

//output GPU rotate result
write_ppm( "rotated_GPU3.ppm", diaLen, diaLen, 255, h_rotatedGPU3);
//-------end of rotation kernel-----------------------------------------------
//cudaFree part 1
hipFree(d_Input);
hipFree(d_rotated_naive);

//------GPU histo start----------------------------------------

// //cudaMalloc for histoGPU
hipMalloc((void**)&d_histo,histo_size);
//------naive histo kernel-----------------------------------------
float time4;
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start,0);

//launch kernel 100 times and take average time
int blockSize2 = 32;
int gridSize2 = ceil((float)diaLen/blockSize2);
dim3 blockDim2 (blockSize2,blockSize2,1);
dim3 gridDim2 (gridSize2,gridSize2,1);

histo_kernel_naive<<<gridDim2,blockDim2>>>(d_rotated,d_histo,diaLen,diaLen);

hipEventRecord(stop,0);
hipMemcpy(h_histoGPU,d_histo,histo_size,hipMemcpyDeviceToHost);
hipEventSynchronize(stop);
hipEventElapsedTime(&time4,start,stop);
hipEventDestroy(start);
hipEventDestroy(stop);
printf("GPU histo_naive time: %f milliseconds\n",time4 );

// //output histo result to CSV file
 write_CSV("histoBinGPU_kernel_naive.csv",diaLen,MAX_VALUE, h_histoGPU);
//----------end---------------------------------------------------------------

//------histo kernel 2, one thread work with one input----------------------------
unsigned int *h_histoGPU2;
h_histoGPU2 = (unsigned int*)malloc(histo_size);
if (!h_histoGPU2) {
  fprintf(stderr, " unable to malloc \n");
  exit(-1); // fail
}
unsigned int *d_histo2;
hipMalloc((void**)&d_histo2,histo_size);

float time5;
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start,0);
//launch kernel 100 times and take average time
for(int i = 0;i<100;i++){
histo_kernel_2<<<diaLen,256>>>(d_rotated,d_histo2,diaLen,diaLen);
}
hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipMemcpy(h_histoGPU2,d_histo2,histo_size,hipMemcpyDeviceToHost);

hipEventElapsedTime(&time5,start,stop);
hipEventDestroy(start);
hipEventDestroy(stop);
printf("GPU histo_kernel_2 time: %f milliseconds\n",time5 / 100);

// //output histo result to CSV file
 write_CSV("histoBinGPU_kernel_2.csv",diaLen,MAX_VALUE, h_histoGPU2);
//----------end---------------------------------------------------------------



//cudaFREE part 2
hipFree(d_rotated);
hipFree(d_histo);
hipFree(d_histo2);


//Free host memory
free(h_Input);
free(h_rotated);
free(h_rotatedGPU);
free(h_rotatedGPU2);
free(h_rotatedGPU3);
free(h_histoCPU);
free(h_histoGPU);
free(h_histoGPU2);



fprintf(stderr, "done\n");

}
//--------rotation kernel naive----------------------------------------
__global__ void rotation_kernel_naive(unsigned int *input,unsigned int *output,int width, int height,double angle){
  //TO DO
  double xCenter = (double)width / 2;
  double yCenter = (double)height / 2;
  int x = blockIdx.x * blockDim.x + threadIdx.x;
  int y = blockIdx.y * blockDim.y + threadIdx.y;
  int index = y * width + x;
  int orgX = 0;
  int orgY = 0;
  //boundary check
  if(x >=0 && x < width && y >=0 && y < height){
    orgX = (int)(cos(angle) * ((double)x - xCenter)- sin(angle) * ((double)y - yCenter) + xCenter);
    orgY = (int)(sin(angle) * ((double)x - xCenter) + cos(angle) * ((double)y - yCenter) + yCenter);
  }

  if(orgX>=0 && orgX < width && orgY>=0 && orgY<height){
    output[index] = input[ orgY * width + orgX];
  }
}
//--------rotation kernel 2----------------------------------------
__global__ void rotation_kernel_2(unsigned int *input,unsigned int *output,int width, int height,double angle){
  //TO DO
  double xCenter = (double)width / 2;  // x center of image
  double yCenter = (double)height / 2; // y center of image
  int x = blockIdx.x * blockDim.x + threadIdx.x;
  int y = blockIdx.y * blockDim.y + threadIdx.y;
  int index = y * width + x;
  double sinA = sin(angle);
  double cosA = cos(angle);
  double shiftX = (double)x - xCenter;
  double shiftY = (double)y - yCenter;
  int orgX = 0;
  int orgY = 0;
  //boundary check
  if(x >=0 && x < width && y >=0 && y < height){
    orgX = (int)(cosA * shiftX - sinA * shiftY + xCenter);
    orgY = (int)(sinA * shiftX + cosA * shiftY + yCenter);
  }

  if(orgX>=0 && orgX < width && orgY>=0 && orgY<height){
    output[index] = input[ orgY * width + orgX];
  }

}

//--------rotation kernel 3 using constant memory----------------------------------------
__global__ void rotation_kernel_3(unsigned int *input,unsigned int *output,int width, int height){

  int x = blockIdx.x * blockDim.x + threadIdx.x;
  int y = blockIdx.y * blockDim.y + threadIdx.y;
  int index = y * width + x;

  double shiftX = (double)x - PARAMS[0];
  double shiftY = (double)y - PARAMS[1];
  int orgX = 0;
  int orgY = 0;
  //boundary check
  if(x >=0 && x < width && y >=0 && y < height){
    orgX = (int)(PARAMS[3] * shiftX - PARAMS[2] * shiftY + PARAMS[0]);
    orgY = (int)(PARAMS[2] * shiftX + PARAMS[3] * shiftY + PARAMS[1]);
  }

  if(orgX>=0 && orgX < width && orgY>=0 && orgY<height){
    output[index] = input[ orgY * width + orgX];
  }

}

//----------cpu for matrix rotation--------------------------
//rotate as a swirl from , from the center
void matrixRotation(unsigned int *input, unsigned int *output, int width, int height, double angle){
   double xCenter = (double)width / 2;
   double yCenter = (double)height / 2;
  //for non-crop rotation put both the height and width of the output the diagonal length of the origin input
  for(int y = 0;y<height;y++){
    for(int x = 0;x<width;x++){
      int orgX = (int)(cos(angle) * ((double)x -xCenter) - sin(angle) * ((double)y - yCenter) + xCenter ) ;
      int orgY = (int)(sin(angle) * ((double)x -xCenter) + cos(angle) * ((double)y - yCenter) + yCenter );
      if(orgX>=0 && orgX < width && orgY>=0 && orgY < height){
        output[y*width+x] = input[orgY * width +orgX];
      }
    }
  }
}


//----------histo kernel naive: using global memory--------------------------------------
__global__ void histo_kernel_naive(unsigned int *input,unsigned int *histo,int width, int height){

	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;

if(x >=0 && x < width && y >=0 && y < height){
		atomicAdd(&histo[input[y*width+x]*width+x],1);
	}

}
//histo_kernel_2<<<diaLen,256>>>(d_rotated,d_histo2,diaLen,diaLen);
//----------histo kernel 2: with shared memory,each threads deal with one input
__global__ void histo_kernel_2(unsigned int *input,unsigned int *histo,int width, int height){
 __shared__ unsigned int H[NUM_BINS];// one column of the output bin
 int tx = threadIdx.x;
 int col = blockIdx.x;//col number of input
 int bd = blockDim.x;
	H[tx] = 0;
 __syncthreads();
  for(int t =0;t<(height+bd-1)/bd;t++){ //when height is bigger than blockDim
		 int row = t*bd+tx;
		 if(row<height){
			 int value = input[row*width+col];
				atomicAdd(&H[value],1);
		 }
	}
	__syncthreads();
		histo[tx*width+col] = H[tx];
}
//histo_kernel_3<<<diaLen,256>>>,
//----------histo kernel 3: with shared memory for input, each thread collecting one bin
__global__ void histo_kernel_3(unsigned int *input,unsigned int *histo,int width, int height){

 __shared__ unsigned int IN[NUM_BINS]; //use to storing input
 int tx = threadIdx.x;
 int col = blockIdx.x;//col number of input

	int h = 0;
  for(int t =0;t<(height+NUM_BINS-1)/NUM_BINS;t++){ //when height is bigger than NUM_BINS
		 int row = t*NUM_BINS+tx;
		 if(row<height){
			 IN[tx] = input[row*width+col];
		 }else{
			 IN[tx] = 300;  // padding nonsense value to avoid addition
		 }
			 __syncthreads();
			 for(int i = 0;i<NUM_BINS;i++){//each thread loop through the input
				 int value = IN[i];
				 if(tx == value){
					 h++;
				 }
			 }
	}

   histo[tx*width+col] = h;
}



//----------cpu for histo along y direction-------------------
void computerGoldHisto(unsigned int* input, unsigned int* histo, int width, int height){

  for(int i = 0; i<height;i++){
    for(int j = 0;j<width;j++){
        int data = input[i*width+j];
        histo[data*width+j]++;
    }
  }
}


//-----------read image to array-----------------------------------------------------------------
unsigned int *read_ppm( char *filename, int * xsize, int * ysize, int *maxval ){

	if ( !filename || filename[0] == '\0') {
		fprintf(stderr, "read_ppm but no file name\n");
		return NULL;  // fail
	}

	FILE *fp;

	fprintf(stderr, "read_ppm( %s )\n", filename);
	fp = fopen( filename, "rb");
	if (!fp)
	{
		fprintf(stderr, "read_ppm()    ERROR  file '%s' cannot be opened for reading\n", filename);
		return NULL; // fail
	}

	char chars[1024];
	//int num = read(fd, chars, 1000);
	int num = fread(chars, sizeof(char), 1000, fp);

	if (chars[0] != 'P' || chars[1] != '6')
	{
		fprintf(stderr, "Texture::Texture()    ERROR  file '%s' does not start with \"P6\"  I am expecting a binary PPM file\n", filename);
		return NULL;
	}

	unsigned int width, height, maxvalue;


	char *ptr = chars+3; // P 6 newline
	if (*ptr == '#') // comment line!
	{
		ptr = 1 + strstr(ptr, "\n");
	}

	num = sscanf(ptr, "%d\n%d\n%d",  &width, &height, &maxvalue);
	fprintf(stderr, "read %d things   width %d  height %d  maxval %d\n", num, width, height, maxvalue);
	*xsize = width;
	*ysize = height;
	*maxval = maxvalue;

	unsigned int *pic = (unsigned int *)malloc( width * height * sizeof(unsigned int));
	if (!pic) {
		fprintf(stderr, "read_ppm()  unable to allocate %d x %d unsigned ints for the picture\n", width, height);
		return NULL; // fail but return
	}

	// allocate buffer to read the rest of the file into
	int bufsize =  3 * width * height * sizeof(unsigned char);
	if ((*maxval) > 255) bufsize *= 2;
	unsigned char *buf = (unsigned char *)malloc( bufsize );
	if (!buf) {
		fprintf(stderr, "read_ppm()  unable to allocate %d bytes of read buffer\n", bufsize);
		return NULL; // fail but return
	}

	// really read
	char duh[80];
	char *line = chars;

	// find the start of the pixel data.
	sprintf(duh, "%d\0", *xsize);
	line = strstr(line, duh);
	//fprintf(stderr, "%s found at offset %d\n", duh, line-chars);
	line += strlen(duh) + 1;

	sprintf(duh, "%d\0", *ysize);
	line = strstr(line, duh);
	//fprintf(stderr, "%s found at offset %d\n", duh, line-chars);
	line += strlen(duh) + 1;

	sprintf(duh, "%d\0", *maxval);
	line = strstr(line, duh);

	fprintf(stderr, "%s found at offset %d\n", duh, line - chars);
	line += strlen(duh) + 1;

	long offset = line - chars;
	//lseek(fd, offset, SEEK_SET); // move to the correct offset
	fseek(fp, offset, SEEK_SET); // move to the correct offset
	//long numread = read(fd, buf, bufsize);
	long numread = fread(buf, sizeof(char), bufsize, fp);
	fprintf(stderr, "Texture %s   read %ld of %ld bytes\n", filename, numread, bufsize);

	fclose(fp);

	int pixels = (*xsize) * (*ysize);
	for (int i=0; i<pixels; i++)
		pic[i] = (int) buf[3*i];  // red channel

	return pic; // success
}



//--------------wiret array to a image-------------------------------------------------------------------
void write_ppm( char const *filename, int xsize, int ysize, int maxval,unsigned int *pic)
{
	FILE *fp;
// 	int x,y;

	fp = fopen(filename, "wb");
	if (!fp)
	{
		fprintf(stderr, "FAILED TO OPEN FILE '%s' for writing\n");
		exit(-1);
	}

	fprintf(fp, "P6\n");
	fprintf(fp,"%d %d\n%d\n", xsize, ysize, maxval);

	int numpix = xsize * ysize;
	for (int i=0; i<numpix; i++) {
		unsigned char uc = (unsigned char) pic[i];
		fprintf(fp, "%c%c%c", uc, uc, uc);
	}

	fclose(fp);
}

//write histoBin result to excel  diaLen, MAX_VALUE
void write_CSV(char const *filename,int width, int height, unsigned int *input){
  FILE *fp;
  fp = fopen(filename, "w+");
  if (!fp)
  {
    fprintf(stderr, "FAILED TO OPEN FILE '%s' for writing\n");
    exit(-1);
  }
 for(int i = 0;i< height;i++){
   for(int j = 0;j<width;j++){
     fprintf(fp,"%d,",input[i*width+j]);
   }
   fprintf(fp,"\n");
 }
 fclose(fp);

}
// calculate newX newY after padding and rotation
void getNewXY(int inputX, int inputY, int width, int height,double angle, int *outputX, int *outputY){
  double diaLen = (int)(sqrt(width * width + height * height) + 3);
	double deltaX = diaLen - width ;
	double deltaY = diaLen - height;
//  printf("deltaX: %f, deltaY: %f\n",deltaX,deltaY);
  double x = (double)inputX - deltaX / 2;
  double y = (double)inputY - deltaY/ 2;
//  printf("paddled x and y are: %f, %f\n", x, y);
  double xCenter = -diaLen / 2;
  double yCenter = -diaLen / 2;
//	printf("deltaX: %f, deltaY: %f\n",xCenter,yCenter);

  *outputX = -1 * (int)(cos(angle) * (x -xCenter) - sin(angle) * (y - yCenter) + xCenter ) ;
  *outputY = -1 * (int)(sin(angle) * (x -xCenter) + cos(angle) * (y - yCenter) + yCenter );


}

	.text
	.file	"histo.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI0_0:
	.quad	0x4046800000000000              # double 45
.LCPI0_1:
	.quad	0x4008000000000000              # double 3
.LCPI0_2:
	.quad	0xc076800000000000              # double -360
.LCPI0_3:
	.quad	0x400921fb54442d18              # double 3.1415926535897931
.LCPI0_6:
	.quad	0x3fe0000000000000              # double 0.5
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI0_4:
	.quad	0x8000000000000000              # double -0
	.quad	0x8000000000000000              # double -0
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI0_5:
	.long	0x42c80000                      # float 100
.LCPI0_7:
	.long	0x3d000000                      # float 0.03125
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movl	%edi, %ebp
	movl	$.L.str, %edi
	callq	strdup
	movq	%rax, %rbx
	movsd	.LCPI0_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movapd	%xmm0, 32(%rsp)                 # 16-byte Spill
	cmpl	$2, %ebp
	jl	.LBB0_5
# %bb.1:
	je	.LBB0_4
# %bb.2:
	cmpl	$3, %ebp
	jne	.LBB0_5
# %bb.3:                                # %.thread
	movq	8(%r14), %rdi
	callq	atoi
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movapd	%xmm0, 32(%rsp)                 # 16-byte Spill
	movq	16(%r14), %rdi
	callq	strdup
	movq	%rax, %rbx
	jmp	.LBB0_5
.LBB0_4:
	movq	8(%r14), %rdi
	callq	atoi
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movapd	%xmm0, 32(%rsp)                 # 16-byte Spill
.LBB0_5:
	movq	stderr(%rip), %rdi
	movl	$.L.str.1, %esi
	movq	%rbx, %rdx
	movaps	32(%rsp), %xmm0                 # 16-byte Reload
	movb	$1, %al
	callq	fprintf
	leaq	180(%rsp), %r14
	leaq	176(%rsp), %r15
	leaq	116(%rsp), %rcx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	callq	_Z8read_ppmPcPiS0_S0_
	movl	(%r14), %ecx
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
                                        # kill: def $ecx killed $ecx killed $rcx
	imull	%ecx, %ecx
	movl	(%r15), %ebx
	movl	%ebx, %edx
	imull	%ebx, %edx
	addl	%ecx, %edx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%edx, %xmm0
	movq	%rax, %rbp
	xorpd	%xmm1, %xmm1
	ucomisd	%xmm1, %xmm0
	jb	.LBB0_7
# %bb.6:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB0_8
.LBB0_7:                                # %call.sqrt
	callq	sqrt
.LBB0_8:                                # %.split
	addsd	.LCPI0_1(%rip), %xmm0
	cvttsd2si	%xmm0, %r14
	movl	116(%rsp), %ecx
	movl	$.L.str.2, %edi
	movq	16(%rsp), %rsi                  # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movq	%rbx, 48(%rsp)                  # 8-byte Spill
	movl	%ebx, %edx
	movl	%r14d, %r8d
	xorl	%eax, %eax
	callq	printf
	movl	%r14d, %eax
	shll	$8, %eax
	leal	(%rax,%rax,2), %eax
	movslq	%eax, %rdi
	shlq	$2, %rdi
	movl	%r14d, %eax
	imull	%eax, %eax
	leal	(%rax,%rax,2), %r12d
	shlq	$2, %r12
	movq	%rdi, 144(%rsp)                 # 8-byte Spill
	callq	malloc
	movq	%rax, %rbx
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r12, 64(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	%r15, 136(%rsp)                 # 8-byte Spill
	testq	%r15, %r15
	je	.LBB0_49
# %bb.9:                                # %.split
	testq	%rbx, %rbx
	je	.LBB0_49
# %bb.10:                               # %.split
	cmpq	$0, 56(%rsp)                    # 8-byte Folded Reload
	je	.LBB0_49
# %bb.11:
	movapd	32(%rsp), %xmm0                 # 16-byte Reload
	divsd	.LCPI0_2(%rip), %xmm0
	mulsd	.LCPI0_3(%rip), %xmm0
	addsd	%xmm0, %xmm0
	movapd	%xmm0, 32(%rsp)                 # 16-byte Spill
	movl	%r14d, %r15d
	testl	%r14d, %r14d
	jle	.LBB0_20
# %bb.12:                               # %.preheader268.lr.ph
	movl	%r14d, %eax
	movq	48(%rsp), %rdx                  # 8-byte Reload
	subl	%edx, %eax
	movl	%r14d, %ecx
	movq	16(%rsp), %r9                   # 8-byte Reload
	subl	%r9d, %ecx
	movl	%eax, %esi
	shrl	$31, %esi
	addl	%eax, %esi
	sarl	%esi
	addl	%esi, %edx
	movl	%ecx, %edi
	shrl	$31, %edi
	addl	%ecx, %edi
	sarl	%edi
	leal	(%rdi,%r9), %eax
	cltq
	movslq	%edi, %rcx
	movslq	%edx, %rdx
	movslq	%esi, %rsi
	leaq	(,%r15,4), %rdi
	movl	%esi, %r8d
	imull	%r9d, %r8d
	addl	%ecx, %r8d
	negl	%r8d
	xorl	%r9d, %r9d
	movq	56(%rsp), %r10                  # 8-byte Reload
.LBB0_13:                               # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_14 Depth 2
	cmpq	%rsi, %r9
	setge	%r12b
	cmpq	%rdx, %r9
	setl	%r11b
	andb	%r12b, %r11b
	xorl	%r13d, %r13d
.LBB0_14:                               #   Parent Loop BB0_13 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorl	%r12d, %r12d
	testb	%r11b, %r11b
	je	.LBB0_18
# %bb.15:                               #   in Loop: Header=BB0_14 Depth=2
	cmpq	%rcx, %r13
	jl	.LBB0_18
# %bb.16:                               #   in Loop: Header=BB0_14 Depth=2
	cmpq	%rax, %r13
	jge	.LBB0_18
# %bb.17:                               #   in Loop: Header=BB0_14 Depth=2
	leal	(%r8,%r13), %r12d
	movslq	%r12d, %r12
	movl	(%rbp,%r12,4), %r12d
.LBB0_18:                               #   in Loop: Header=BB0_14 Depth=2
	movl	%r12d, (%r10,%r13,4)
	incq	%r13
	cmpq	%r13, %r15
	jne	.LBB0_14
# %bb.19:                               # %._crit_edge
                                        #   in Loop: Header=BB0_13 Depth=1
	incq	%r9
	addq	%rdi, %r10
	addq	16(%rsp), %r8                   # 8-byte Folded Reload
	cmpq	%r15, %r9
	jne	.LBB0_13
.LBB0_20:                               # %._crit_edge272
	movaps	.LCPI0_4(%rip), %xmm0           # xmm0 = [-0.0E+0,-0.0E+0]
	xorps	32(%rsp), %xmm0                 # 16-byte Folded Reload
	xorl	%r13d, %r13d
	leaq	172(%rsp), %rbp
	leaq	168(%rsp), %r12
	xorl	%edi, %edi
	movl	$200, %esi
	movq	16(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	movq	48(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movq	%rbp, %r8
	movq	%r12, %r9
	callq	_Z8getNewXYiiiidPiS_
	movl	(%rbp), %ecx
	movl	(%r12), %r8d
	movl	$.L.str.4, %edi
	xorl	%esi, %esi
	movl	$200, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.5, %edi
	movl	%r14d, %esi
	movl	%r14d, %edx
	movl	$255, %ecx
	movq	56(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %r8
	callq	_Z9write_ppmPKciiiPj
	leaq	8(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r12, %rdi
	movq	136(%rsp), %rbp                 # 8-byte Reload
	movq	%rbp, %rsi
	movl	%r14d, %edx
	movl	%r14d, %ecx
	movaps	32(%rsp), %xmm0                 # 16-byte Reload
	callq	_Z14matrixRotationPjS_iid
	movq	%rsp, %rax
	movq	(%rax), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%rsp, %rax
	movq	(%rax), %rdi
	movq	%rax, %r12
	callq	hipEventSynchronize
	leaq	8(%rsp), %rax
	movq	(%rax), %rsi
	movq	(%r12), %rdx
	leaq	164(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12), %xmm0
	movl	$.L.str.6, %edi
	movb	$1, %al
	callq	printf
	leaq	8(%rsp), %r12
	movq	(%r12), %rdi
	callq	hipEventDestroy
	movq	%rsp, %rax
	movq	(%rax), %rdi
	callq	hipEventDestroy
	movl	$.L.str.7, %edi
	movl	%r14d, %esi
	movl	%r14d, %edx
	movl	$255, %ecx
	movq	%rbp, %r8
	callq	_Z9write_ppmPKciiiPj
	movl	$.L.str.8, %edi
	movl	%r14d, %esi
	movl	%r14d, %edx
	movq	%rbp, %rcx
	callq	_Z9write_CSVPKciiPj
	movl	$262144, %edx                   # imm = 0x40000
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	%r12, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%r14d, %r14d
	jle	.LBB0_25
# %bb.21:                               # %.preheader.lr.ph.i
	movslq	%r14d, %rax
	xorl	%ecx, %ecx
.LBB0_22:                               # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_23 Depth 2
	movl	%r13d, %edx
	leaq	(,%rdx,4), %rdx
	addq	%rbp, %rdx
	xorl	%esi, %esi
.LBB0_23:                               #   Parent Loop BB0_22 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	(%rdx,%rsi,4), %rdi
	imulq	%rax, %rdi
	addq	%rsi, %rdi
	incl	(%rbx,%rdi,4)
	incq	%rsi
	cmpq	%rsi, %r15
	jne	.LBB0_23
# %bb.24:                               # %._crit_edge.i
                                        #   in Loop: Header=BB0_22 Depth=1
	incq	%rcx
	addl	%r14d, %r13d
	cmpq	%r15, %rcx
	jne	.LBB0_22
.LBB0_25:                               # %_Z17computerGoldHistoPjS_ii.exit
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	160(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	movq	(%rsp), %rdi
	callq	hipEventDestroy
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12), %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.10, %edi
	movl	%r14d, %esi
	movl	$256, %edx                      # imm = 0x100
	movq	%rbx, %rcx
	callq	_Z9write_CSVPKciiPj
	movq	64(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r13
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %rbp
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	144(%rsp), %rdi                 # 8-byte Reload
	callq	malloc
	movq	%r12, 128(%rsp)                 # 8-byte Spill
	testq	%r12, %r12
	je	.LBB0_49
# %bb.26:                               # %_Z17computerGoldHistoPjS_ii.exit
	testq	%rbp, %rbp
	je	.LBB0_49
# %bb.27:                               # %_Z17computerGoldHistoPjS_ii.exit
	testq	%r13, %r13
	je	.LBB0_49
# %bb.28:                               # %_Z17computerGoldHistoPjS_ii.exit
	testq	%rax, %rax
	je	.LBB0_49
# %bb.29:
	movq	%rbp, 48(%rsp)                  # 8-byte Spill
	movq	%r13, 16(%rsp)                  # 8-byte Spill
	movq	%rax, 120(%rsp)                 # 8-byte Spill
	movabsq	$34359738376, %r13              # imm = 0x800000008
	leaq	72(%rsp), %rbp
	movq	%rbp, %rdi
	movq	64(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	96(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leal	7(%r14), %eax
	leal	14(%r14), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$3, %ecx
	movq	%rcx, %rbp
	shlq	$32, %rbp
	orq	%rcx, %rbp
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$100, %r12d
.LBB0_30:                               # =>This Inner Loop Header: Depth=1
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_32
# %bb.31:                               #   in Loop: Header=BB0_30 Depth=1
	movq	72(%rsp), %rdi
	movq	96(%rsp), %rsi
	movl	%r14d, %edx
	movl	%r14d, %ecx
	movaps	32(%rsp), %xmm0                 # 16-byte Reload
	callq	_Z36__device_stub__rotation_kernel_naivePjS_iid
.LBB0_32:                               #   in Loop: Header=BB0_30 Depth=1
	decl	%r12d
	jne	.LBB0_30
# %bb.33:
	movq	%rsp, %rax
	movq	(%rax), %rdi
	movq	%rax, %r12
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	96(%rsp), %rsi
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	callq	hipEventSynchronize
	leaq	8(%rsp), %r12
	movq	(%r12), %rsi
	movq	%rsp, %rax
	movq	(%rax), %rdx
	leaq	112(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	(%r12), %rdi
	callq	hipEventDestroy
	movq	%rsp, %rax
	movq	(%rax), %rdi
	callq	hipEventDestroy
	leaq	112(%rsp), %rax
	movss	(%rax), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI0_5(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.11, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.12, %edi
	movl	%r14d, %esi
	movl	%r14d, %edx
	movl	$255, %ecx
	movq	16(%rsp), %r8                   # 8-byte Reload
	callq	_Z9write_ppmPKciiiPj
	movq	%r12, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$100, %r12d
.LBB0_34:                               # =>This Inner Loop Header: Depth=1
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_36
# %bb.35:                               #   in Loop: Header=BB0_34 Depth=1
	movq	72(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	%r14d, %edx
	movl	%r14d, %ecx
	movaps	32(%rsp), %xmm0                 # 16-byte Reload
	callq	_Z32__device_stub__rotation_kernel_2PjS_iid
.LBB0_36:                               #   in Loop: Header=BB0_34 Depth=1
	decl	%r12d
	jne	.LBB0_34
# %bb.37:
	movq	%rsp, %rax
	movq	(%rax), %rdi
	movq	%rax, %r12
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rsi
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	callq	hipEventSynchronize
	leaq	8(%rsp), %r12
	movq	(%r12), %rsi
	movq	%rsp, %rax
	movq	(%rax), %rdx
	leaq	108(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	(%r12), %rdi
	callq	hipEventDestroy
	movq	%rsp, %rax
	movq	(%rax), %rdi
	callq	hipEventDestroy
	leaq	108(%rsp), %rax
	movss	(%rax), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI0_5(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.13, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.14, %edi
	movl	%r14d, %esi
	movl	%r14d, %edx
	movl	$255, %ecx
	movq	48(%rsp), %r8                   # 8-byte Reload
	callq	_Z9write_ppmPKciiiPj
	movl	$32, %edi
	callq	malloc
	movq	%rax, %r12
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r14d, %xmm0
	mulsd	.LCPI0_6(%rip), %xmm0
	movsd	%xmm0, (%rax)
	movsd	%xmm0, 8(%rax)
	movaps	32(%rsp), %xmm0                 # 16-byte Reload
	callq	sin
	movsd	%xmm0, 16(%r12)
	movaps	32(%rsp), %xmm0                 # 16-byte Reload
	callq	cos
	movsd	%xmm0, 24(%r12)
	movl	$PARAMS, %edi
	movl	$32, %edx
	movq	%r12, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$100, %r12d
.LBB0_38:                               # =>This Inner Loop Header: Depth=1
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_40
# %bb.39:                               #   in Loop: Header=BB0_38 Depth=1
	movq	72(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	%r14d, %edx
	movl	%r14d, %ecx
	callq	_Z32__device_stub__rotation_kernel_3PjS_ii
.LBB0_40:                               #   in Loop: Header=BB0_38 Depth=1
	decl	%r12d
	jne	.LBB0_38
# %bb.41:
	movq	%rsp, %r13
	movq	(%r13), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rsi
	movq	128(%rsp), %r12                 # 8-byte Reload
	movq	%r12, %rdi
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	callq	hipEventSynchronize
	leaq	8(%rsp), %rbp
	movq	(%rbp), %rsi
	movq	(%r13), %rdx
	leaq	104(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	(%rbp), %rdi
	callq	hipEventDestroy
	movq	(%r13), %rdi
	callq	hipEventDestroy
	leaq	104(%rsp), %rax
	movss	(%rax), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI0_5(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.15, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.16, %edi
	movl	%r14d, %esi
	movl	%r14d, %edx
	movl	$255, %ecx
	movq	%r12, %r8
	callq	_Z9write_ppmPKciiiPj
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	96(%rsp), %rdi
	callq	hipFree
	leaq	88(%rsp), %rdi
	movq	144(%rsp), %r12                 # 8-byte Reload
	movq	%r12, %rsi
	callq	hipMalloc
	movq	%rbp, %rdi
	callq	hipEventCreate
	movq	%r13, %rdi
	callq	hipEventCreate
	movq	(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r14d, %xmm0
	mulss	.LCPI0_7(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %edi
	movabsq	$4294967297, %rax               # imm = 0x100000001
	imulq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_43
# %bb.42:
	movq	24(%rsp), %rdi
	movq	88(%rsp), %rsi
	movl	%r14d, %edx
	movl	%r14d, %ecx
	callq	_Z33__device_stub__histo_kernel_naivePjS_ii
.LBB0_43:
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	88(%rsp), %rsi
	movq	120(%rsp), %rbp                 # 8-byte Reload
	movq	%rbp, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	156(%rsp), %r13
	movq	%r13, %rdi
	callq	hipEventElapsedTime
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	movq	(%rsp), %rdi
	callq	hipEventDestroy
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13), %xmm0
	movl	$.L.str.17, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.18, %edi
	movl	%r14d, %esi
	movl	$256, %edx                      # imm = 0x100
	movq	%rbp, %rcx
	callq	_Z9write_CSVPKciiPj
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	testq	%rax, %rax
	je	.LBB0_49
# %bb.44:
	leaq	80(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$4294967297, %r13               # imm = 0x100000001
	leaq	(%r15,%r13), %rbp
	decq	%rbp
	movl	$100, %r15d
	addq	$255, %r13
.LBB0_45:                               # =>This Inner Loop Header: Depth=1
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_47
# %bb.46:                               #   in Loop: Header=BB0_45 Depth=1
	movq	24(%rsp), %rdi
	movq	80(%rsp), %rsi
	movl	%r14d, %edx
	movl	%r14d, %ecx
	callq	_Z29__device_stub__histo_kernel_2PjS_ii
.LBB0_47:                               #   in Loop: Header=BB0_45 Depth=1
	decl	%r15d
	jne	.LBB0_45
# %bb.48:
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	80(%rsp), %rsi
	movq	32(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	152(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	movq	(%rsp), %rdi
	callq	hipEventDestroy
	movss	(%r12), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI0_5(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.19, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.20, %edi
	movl	%r14d, %esi
	movl	$256, %edx                      # imm = 0x100
	movq	%r15, %rcx
	callq	_Z9write_CSVPKciiPj
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	88(%rsp), %rdi
	callq	hipFree
	movq	80(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	136(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movq	16(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	48(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	128(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movq	%rbx, %rdi
	callq	free
	movq	120(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	stderr(%rip), %rcx
	movl	$.L.str.21, %edi
	movl	$5, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	xorl	%eax, %eax
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB0_49:
	.cfi_def_cfa_offset 240
	movq	stderr(%rip), %rcx
	movl	$.L.str.3, %edi
	movl	$19, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	movl	$-1, %edi
	callq	exit
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z8read_ppmPcPiS0_S0_           # -- Begin function _Z8read_ppmPcPiS0_S0_
	.type	_Z8read_ppmPcPiS0_S0_,@function
_Z8read_ppmPcPiS0_S0_:                  # @_Z8read_ppmPcPiS0_S0_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1160, %rsp                     # imm = 0x488
	.cfi_def_cfa_offset 1216
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	testq	%rdi, %rdi
	je	.LBB1_2
# %bb.1:
	movq	%rdi, %rbx
	cmpb	$0, (%rdi)
	jne	.LBB1_3
.LBB1_2:
	movq	stderr(%rip), %rcx
	movl	$.L.str.22, %edi
	movl	$26, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	xorl	%r12d, %r12d
.LBB1_18:
	movq	%r12, %rax
	addq	$1160, %rsp                     # imm = 0x488
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_3:
	.cfi_def_cfa_offset 1216
	movq	%rcx, %rbp
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	stderr(%rip), %rdi
	movl	$.L.str.23, %esi
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	fprintf
	movl	$.L.str.24, %esi
	movq	%rbx, %rdi
	callq	fopen
	testq	%rax, %rax
	jne	.LBB1_6
# %bb.4:
	movq	stderr(%rip), %rdi
	xorl	%r12d, %r12d
	movl	$.L.str.25, %esi
	jmp	.LBB1_5
.LBB1_6:
	movq	%rax, %r12
	leaq	128(%rsp), %r13
	movl	$1, %esi
	movl	$1000, %edx                     # imm = 0x3E8
	movq	%r13, %rdi
	movq	%rax, %rcx
	callq	fread
	cmpb	$80, (%r13)
	jne	.LBB1_8
# %bb.7:
	cmpb	$54, 129(%rsp)
	jne	.LBB1_8
# %bb.9:
	leaq	131(%rsp), %rdi
	cmpb	$35, (%rdi)
	movq	%r14, 8(%rsp)                   # 8-byte Spill
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	jne	.LBB1_11
# %bb.10:
	movl	$10, %esi
	callq	strchr@PLT
	movq	%rax, %rdi
	incq	%rdi
.LBB1_11:
	leaq	44(%rsp), %r14
	leaq	40(%rsp), %r12
	leaq	20(%rsp), %r13
	movl	$.L.str.28, %esi
	movq	%r14, %rdx
	movq	%r12, %rcx
	movq	%r13, %r8
	xorl	%eax, %eax
	callq	__isoc23_sscanf
	movq	stderr(%rip), %rdi
	movl	(%r14), %ecx
	movl	(%r12), %r8d
	movl	(%r13), %r9d
	movl	$.L.str.29, %esi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	fprintf
	movl	(%r14), %r13d
	movq	%r15, 24(%rsp)                  # 8-byte Spill
	movl	%r13d, (%r15)
	movl	(%r12), %r14d
	movq	8(%rsp), %rax                   # 8-byte Reload
	movl	%r14d, (%rax)
	leaq	20(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, (%rsp)                    # 4-byte Spill
	movl	%eax, (%rbp)
	movl	%r14d, %r15d
	imull	%r13d, %r15d
	leaq	(,%r15,4), %rdi
	callq	malloc
	testq	%rax, %rax
	jne	.LBB1_13
# %bb.12:
	movq	stderr(%rip), %rdi
	xorl	%r12d, %r12d
	movl	$.L.str.30, %esi
	movl	%r13d, %edx
	movl	%r14d, %ecx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB1_18
.LBB1_8:
	movq	stderr(%rip), %rdi
	xorl	%r12d, %r12d
	movl	$.L.str.26, %esi
.LBB1_5:
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB1_18
.LBB1_13:
	movq	%rax, %r12
	leal	(%r15,%r15,2), %r14d
	cmpl	$256, (%rsp)                    # 4-byte Folded Reload
                                        # imm = 0x100
	setge	%cl
	shll	%cl, %r14d
	movslq	%r14d, %r15
	movq	%r15, %rdi
	callq	malloc
	testq	%rax, %rax
	jne	.LBB1_15
# %bb.14:
	movq	stderr(%rip), %rdi
	xorl	%r12d, %r12d
	movl	$.L.str.31, %esi
	movl	%r14d, %edx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB1_18
.LBB1_15:
	movq	%rax, %r13
	movq	24(%rsp), %rax                  # 8-byte Reload
	movl	(%rax), %edx
	leaq	48(%rsp), %r14
	movl	$.L.str.32, %esi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	sprintf
	movq	%r15, (%rsp)                    # 8-byte Spill
	leaq	128(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r14, %r15
	callq	strstr
	movq	%rax, %r14
	movq	%r15, %rdi
	callq	strlen
	addq	%rax, %r14
	incq	%r14
	movq	8(%rsp), %rax                   # 8-byte Reload
	movl	(%rax), %edx
	movl	$.L.str.32, %esi
	movq	%r15, %rdi
	xorl	%eax, %eax
	callq	sprintf
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	strstr
	movq	%rax, %r14
	movq	%r15, %rdi
	callq	strlen
	addq	%rax, %r14
	incq	%r14
	movl	(%rbp), %edx
	movl	$.L.str.32, %esi
	movq	%r15, %rdi
	xorl	%eax, %eax
	callq	sprintf
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r15, %rbp
	callq	strstr
	movq	%rax, %r14
	movq	stderr(%rip), %rdi
	movq	%rax, %rcx
	leaq	128(%rsp), %r15
	subq	%r15, %rcx
	movl	$.L.str.33, %esi
	movq	%rbp, %rdx
	xorl	%eax, %eax
	callq	fprintf
	movq	%rbp, %rdi
	callq	strlen
	addq	%rax, %r14
	subq	%r15, %r14
	incq	%r14
	movq	32(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	fseek
	movl	$1, %esi
	movq	%r13, %rdi
	movq	(%rsp), %r14                    # 8-byte Reload
	movq	%r14, %rdx
	movq	%rbp, %rcx
	callq	fread
	movq	stderr(%rip), %rdi
	movl	$.L.str.34, %esi
	movq	%rbx, %rdx
	movq	%rax, %rcx
	movl	%r14d, %r8d
	xorl	%eax, %eax
	callq	fprintf
	movq	%rbp, %rdi
	callq	fclose
	movq	8(%rsp), %rax                   # 8-byte Reload
	movl	(%rax), %eax
	movq	24(%rsp), %rcx                  # 8-byte Reload
	imull	(%rcx), %eax
	testl	%eax, %eax
	jle	.LBB1_18
# %bb.16:                               # %.lr.ph.preheader
	movl	%eax, %eax
	xorl	%ecx, %ecx
.LBB1_17:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movzbl	(%r13), %edx
	movl	%edx, (%r12,%rcx,4)
	incq	%rcx
	addq	$3, %r13
	cmpq	%rcx, %rax
	jne	.LBB1_17
	jmp	.LBB1_18
.Lfunc_end1:
	.size	_Z8read_ppmPcPiS0_S0_, .Lfunc_end1-_Z8read_ppmPcPiS0_S0_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z8getNewXYiiiidPiS_
.LCPI2_0:
	.quad	0x4008000000000000              # double 3
.LCPI2_1:
	.quad	0xbfe0000000000000              # double -0.5
	.text
	.globl	_Z8getNewXYiiiidPiS_
	.type	_Z8getNewXYiiiidPiS_,@function
_Z8getNewXYiiiidPiS_:                   # @_Z8getNewXYiiiidPiS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movl	%ecx, %r15d
	movl	%edx, %r12d
	movl	%esi, %ebp
	movl	%edx, %eax
	imull	%edx, %eax
	imull	%ecx, %ecx
	addl	%eax, %ecx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ecx, %xmm0
	movl	%edi, %r13d
	xorpd	%xmm1, %xmm1
	ucomisd	%xmm1, %xmm0
	jb	.LBB2_2
# %bb.1:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB2_3
.LBB2_2:                                # %call.sqrt
	callq	sqrt
.LBB2_3:                                # %.split
	addsd	.LCPI2_0(%rip), %xmm0
	cvttpd2dq	%xmm0, %xmm0
	cvtdq2pd	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r12d, %xmm0
	movapd	%xmm1, %xmm5
	subsd	%xmm0, %xmm5
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r15d, %xmm0
	movapd	%xmm1, %xmm3
	movapd	%xmm1, %xmm4
	subsd	%xmm0, %xmm3
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r13d, %xmm0
	movsd	.LCPI2_1(%rip), %xmm1           # xmm1 = mem[0],zero
	mulsd	%xmm1, %xmm5
	cvtsi2sd	%ebp, %xmm2
	addsd	%xmm0, %xmm5
	movapd	%xmm5, 16(%rsp)                 # 16-byte Spill
	mulsd	%xmm1, %xmm3
	addsd	%xmm2, %xmm3
	movapd	%xmm3, 32(%rsp)                 # 16-byte Spill
	mulsd	%xmm1, %xmm4
	movapd	%xmm4, 48(%rsp)                 # 16-byte Spill
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	cos
	movapd	16(%rsp), %xmm1                 # 16-byte Reload
	subsd	48(%rsp), %xmm1                 # 16-byte Folded Reload
	movapd	%xmm1, 16(%rsp)                 # 16-byte Spill
	mulsd	%xmm1, %xmm0
	movsd	%xmm0, 64(%rsp)                 # 8-byte Spill
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	sin
	movapd	48(%rsp), %xmm1                 # 16-byte Reload
	movapd	32(%rsp), %xmm2                 # 16-byte Reload
	subsd	%xmm1, %xmm2
	movapd	%xmm2, 32(%rsp)                 # 16-byte Spill
	mulsd	%xmm2, %xmm0
	movsd	64(%rsp), %xmm2                 # 8-byte Reload
                                        # xmm2 = mem[0],zero
	subsd	%xmm0, %xmm2
	addsd	%xmm1, %xmm2
	cvttsd2si	%xmm2, %eax
	negl	%eax
	movl	%eax, (%r14)
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	sin
	mulsd	16(%rsp), %xmm0                 # 16-byte Folded Reload
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	cos
	mulsd	32(%rsp), %xmm0                 # 16-byte Folded Reload
	addsd	16(%rsp), %xmm0                 # 8-byte Folded Reload
	addsd	48(%rsp), %xmm0                 # 16-byte Folded Reload
	cvttsd2si	%xmm0, %eax
	negl	%eax
	movl	%eax, (%rbx)
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z8getNewXYiiiidPiS_, .Lfunc_end2-_Z8getNewXYiiiidPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z9write_ppmPKciiiPj            # -- Begin function _Z9write_ppmPKciiiPj
	.type	_Z9write_ppmPKciiiPj,@function
_Z9write_ppmPKciiiPj:                   # @_Z9write_ppmPKciiiPj
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %rbx
	movl	%ecx, %r12d
	movl	%edx, %ebp
	movl	%esi, %r15d
	movl	$.L.str.35, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB3_5
# %bb.1:
	movq	%rax, %r14
	movl	$.L.str.37, %edi
	movl	$3, %esi
	movl	$1, %edx
	movq	%rax, %rcx
	callq	fwrite@PLT
	movl	$.L.str.38, %esi
	movq	%r14, %rdi
	movl	%r15d, %edx
	movl	%ebp, %ecx
	movl	%r12d, %r8d
	xorl	%eax, %eax
	callq	fprintf
	imull	%r15d, %ebp
	testl	%ebp, %ebp
	jle	.LBB3_4
# %bb.2:                                # %.lr.ph.preheader
	movl	%ebp, %r15d
	xorl	%r12d, %r12d
.LBB3_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movzbl	(%rbx,%r12,4), %ecx
	movl	$.L.str.39, %esi
	movq	%r14, %rdi
	movl	%ecx, %edx
	movl	%ecx, %r8d
	xorl	%eax, %eax
	callq	fprintf
	incq	%r12
	cmpq	%r12, %r15
	jne	.LBB3_3
.LBB3_4:                                # %._crit_edge
	movq	%r14, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.LBB3_5:
	.cfi_def_cfa_offset 48
	movq	stderr(%rip), %rdi
	movl	$.L.str.36, %esi
	xorl	%eax, %eax
	callq	fprintf
	movl	$-1, %edi
	callq	exit
.Lfunc_end3:
	.size	_Z9write_ppmPKciiiPj, .Lfunc_end3-_Z9write_ppmPKciiiPj
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z14matrixRotationPjS_iid
.LCPI4_0:
	.quad	0x3fe0000000000000              # double 0.5
	.text
	.globl	_Z14matrixRotationPjS_iid
	.type	_Z14matrixRotationPjS_iid,@function
_Z14matrixRotationPjS_iid:              # @_Z14matrixRotationPjS_iid
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movsd	%xmm0, (%rsp)                   # 8-byte Spill
	movq	%rsi, 56(%rsp)                  # 8-byte Spill
	movq	%rdi, 72(%rsp)                  # 8-byte Spill
	testl	%ecx, %ecx
	jle	.LBB4_11
# %bb.1:                                # %.preheader.lr.ph
	movl	%ecx, %ebx
	cvtsi2sd	%edx, %xmm1
	movsd	.LCPI4_0(%rip), %xmm0           # xmm0 = mem[0],zero
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, 48(%rsp)                 # 8-byte Spill
	xorps	%xmm1, %xmm1
	cvtsi2sd	%ecx, %xmm1
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, 32(%rsp)                 # 8-byte Spill
	movl	%edx, %r12d
	movl	%ecx, %eax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	xorl	%eax, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%eax, %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
.LBB4_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_4 Depth 2
	movl	%edx, %r13d
	testl	%edx, %edx
	jle	.LBB4_10
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB4_2 Depth=1
	movl	16(%rsp), %eax                  # 4-byte Reload
	movq	56(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r15
	xorps	%xmm0, %xmm0
	cvtsi2sdl	8(%rsp), %xmm0          # 4-byte Folded Reload
	subsd	32(%rsp), %xmm0                 # 8-byte Folded Reload
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
	xorl	%r14d, %r14d
.LBB4_4:                                #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%rsp), %xmm0                   # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	cos
	xorps	%xmm1, %xmm1
	cvtsi2sd	%r14d, %xmm1
	subsd	48(%rsp), %xmm1                 # 8-byte Folded Reload
	movsd	%xmm1, 80(%rsp)                 # 8-byte Spill
	mulsd	%xmm1, %xmm0
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movsd	(%rsp), %xmm0                   # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	sin
	mulsd	40(%rsp), %xmm0                 # 8-byte Folded Reload
	movsd	24(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	subsd	%xmm0, %xmm1
	addsd	48(%rsp), %xmm1                 # 8-byte Folded Reload
	cvttsd2si	%xmm1, %ebp
	movsd	(%rsp), %xmm0                   # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	sin
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movsd	(%rsp), %xmm0                   # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	cos
	testl	%ebp, %ebp
	js	.LBB4_9
# %bb.5:                                #   in Loop: Header=BB4_4 Depth=2
	cmpl	%r12d, %ebp
	jge	.LBB4_9
# %bb.6:                                #   in Loop: Header=BB4_4 Depth=2
	movsd	80(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	mulsd	24(%rsp), %xmm1                 # 8-byte Folded Reload
	mulsd	40(%rsp), %xmm0                 # 8-byte Folded Reload
	addsd	%xmm1, %xmm0
	addsd	32(%rsp), %xmm0                 # 8-byte Folded Reload
	cvttsd2si	%xmm0, %eax
	testl	%eax, %eax
	js	.LBB4_9
# %bb.7:                                #   in Loop: Header=BB4_4 Depth=2
	cmpl	%ebx, %eax
	jge	.LBB4_9
# %bb.8:                                #   in Loop: Header=BB4_4 Depth=2
	imull	%r13d, %eax
	addl	%ebp, %eax
	cltq
	movq	72(%rsp), %rcx                  # 8-byte Reload
	movl	(%rcx,%rax,4), %eax
	movl	%eax, (%r15,%r14,4)
.LBB4_9:                                #   in Loop: Header=BB4_4 Depth=2
	incq	%r14
	cmpq	%r14, %r12
	jne	.LBB4_4
.LBB4_10:                               # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	movq	8(%rsp), %rcx                   # 8-byte Reload
	incq	%rcx
	movl	%r13d, %edx
	movq	16(%rsp), %rax                  # 8-byte Reload
	addl	%r13d, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	%rcx, %rax
	movq	%rcx, 8(%rsp)                   # 8-byte Spill
	cmpq	64(%rsp), %rcx                  # 8-byte Folded Reload
	jne	.LBB4_2
.LBB4_11:                               # %._crit_edge44
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z14matrixRotationPjS_iid, .Lfunc_end4-_Z14matrixRotationPjS_iid
	.cfi_endproc
                                        # -- End function
	.globl	_Z9write_CSVPKciiPj             # -- Begin function _Z9write_CSVPKciiPj
	.type	_Z9write_CSVPKciiPj,@function
_Z9write_CSVPKciiPj:                    # @_Z9write_CSVPKciiPj
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 8(%rsp)                   # 8-byte Spill
	movl	%edx, %r15d
	movl	%esi, %ebp
	movl	$.L.str.40, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB5_8
# %bb.1:                                # %.preheader17
	movq	%rax, %r14
	testl	%r15d, %r15d
	jle	.LBB5_7
# %bb.2:                                # %.preheader.lr.ph
	movl	%r15d, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%ebp, %r12d
	xorl	%r13d, %r13d
	xorl	%ebx, %ebx
	movl	%ebp, 4(%rsp)                   # 4-byte Spill
.LBB5_3:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_5 Depth 2
	testl	%ebp, %ebp
	jle	.LBB5_6
# %bb.4:                                # %.lr.ph
                                        #   in Loop: Header=BB5_3 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r15
	xorl	%ebp, %ebp
.LBB5_5:                                #   Parent Loop BB5_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r15,%rbp,4), %edx
	movl	$.L.str.41, %esi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	fprintf
	incq	%rbp
	cmpq	%rbp, %r12
	jne	.LBB5_5
.LBB5_6:                                # %._crit_edge
                                        #   in Loop: Header=BB5_3 Depth=1
	movl	$10, %edi
	movq	%r14, %rsi
	callq	fputc@PLT
	incq	%rbx
	movl	4(%rsp), %ebp                   # 4-byte Reload
	addl	%ebp, %r13d
	cmpq	16(%rsp), %rbx                  # 8-byte Folded Reload
	jne	.LBB5_3
.LBB5_7:                                # %._crit_edge20
	movq	%r14, %rdi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.LBB5_8:
	.cfi_def_cfa_offset 80
	movq	stderr(%rip), %rdi
	movl	$.L.str.36, %esi
	xorl	%eax, %eax
	callq	fprintf
	movl	$-1, %edi
	callq	exit
.Lfunc_end5:
	.size	_Z9write_CSVPKciiPj, .Lfunc_end5-_Z9write_CSVPKciiPj
	.cfi_endproc
                                        # -- End function
	.globl	_Z17computerGoldHistoPjS_ii     # -- Begin function _Z17computerGoldHistoPjS_ii
	.type	_Z17computerGoldHistoPjS_ii,@function
_Z17computerGoldHistoPjS_ii:            # @_Z17computerGoldHistoPjS_ii
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB6_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%ecx, %eax
	movl	%edx, %ecx
	xorl	%r8d, %r8d
	movslq	%edx, %r9
	xorl	%r10d, %r10d
.LBB6_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_4 Depth 2
	testl	%edx, %edx
	jle	.LBB6_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB6_2 Depth=1
	movl	%r8d, %r11d
	leaq	(%rdi,%r11,4), %r11
	xorl	%ebx, %ebx
.LBB6_4:                                #   Parent Loop BB6_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	(%r11,%rbx,4), %r14
	imulq	%r9, %r14
	addq	%rbx, %r14
	incl	(%rsi,%r14,4)
	incq	%rbx
	cmpq	%rbx, %rcx
	jne	.LBB6_4
.LBB6_5:                                # %._crit_edge
                                        #   in Loop: Header=BB6_2 Depth=1
	incq	%r10
	addl	%edx, %r8d
	cmpq	%rax, %r10
	jne	.LBB6_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
.LBB6_7:                                # %._crit_edge17
	retq
.Lfunc_end6:
	.size	_Z17computerGoldHistoPjS_ii, .Lfunc_end6-_Z17computerGoldHistoPjS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z36__device_stub__rotation_kernel_naivePjS_iid # -- Begin function _Z36__device_stub__rotation_kernel_naivePjS_iid
	.type	_Z36__device_stub__rotation_kernel_naivePjS_iid,@function
_Z36__device_stub__rotation_kernel_naivePjS_iid: # @_Z36__device_stub__rotation_kernel_naivePjS_iid
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	24(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21rotation_kernel_naivePjS_iid, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z36__device_stub__rotation_kernel_naivePjS_iid, .Lfunc_end7-_Z36__device_stub__rotation_kernel_naivePjS_iid
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__rotation_kernel_2PjS_iid # -- Begin function _Z32__device_stub__rotation_kernel_2PjS_iid
	.type	_Z32__device_stub__rotation_kernel_2PjS_iid,@function
_Z32__device_stub__rotation_kernel_2PjS_iid: # @_Z32__device_stub__rotation_kernel_2PjS_iid
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	24(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17rotation_kernel_2PjS_iid, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z32__device_stub__rotation_kernel_2PjS_iid, .Lfunc_end8-_Z32__device_stub__rotation_kernel_2PjS_iid
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__rotation_kernel_3PjS_ii # -- Begin function _Z32__device_stub__rotation_kernel_3PjS_ii
	.type	_Z32__device_stub__rotation_kernel_3PjS_ii,@function
_Z32__device_stub__rotation_kernel_3PjS_ii: # @_Z32__device_stub__rotation_kernel_3PjS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17rotation_kernel_3PjS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z32__device_stub__rotation_kernel_3PjS_ii, .Lfunc_end9-_Z32__device_stub__rotation_kernel_3PjS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__histo_kernel_naivePjS_ii # -- Begin function _Z33__device_stub__histo_kernel_naivePjS_ii
	.type	_Z33__device_stub__histo_kernel_naivePjS_ii,@function
_Z33__device_stub__histo_kernel_naivePjS_ii: # @_Z33__device_stub__histo_kernel_naivePjS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18histo_kernel_naivePjS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z33__device_stub__histo_kernel_naivePjS_ii, .Lfunc_end10-_Z33__device_stub__histo_kernel_naivePjS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__histo_kernel_2PjS_ii # -- Begin function _Z29__device_stub__histo_kernel_2PjS_ii
	.type	_Z29__device_stub__histo_kernel_2PjS_ii,@function
_Z29__device_stub__histo_kernel_2PjS_ii: # @_Z29__device_stub__histo_kernel_2PjS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14histo_kernel_2PjS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z29__device_stub__histo_kernel_2PjS_ii, .Lfunc_end11-_Z29__device_stub__histo_kernel_2PjS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__histo_kernel_3PjS_ii # -- Begin function _Z29__device_stub__histo_kernel_3PjS_ii
	.type	_Z29__device_stub__histo_kernel_3PjS_ii,@function
_Z29__device_stub__histo_kernel_3PjS_ii: # @_Z29__device_stub__histo_kernel_3PjS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14histo_kernel_3PjS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z29__device_stub__histo_kernel_3PjS_ii, .Lfunc_end12-_Z29__device_stub__histo_kernel_3PjS_ii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB13_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB13_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21rotation_kernel_naivePjS_iid, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17rotation_kernel_2PjS_iid, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17rotation_kernel_3PjS_ii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18histo_kernel_naivePjS_ii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14histo_kernel_2PjS_ii, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14histo_kernel_3PjS_ii, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$PARAMS, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movl	$32, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end13:
	.size	__hip_module_ctor, .Lfunc_end13-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB14_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB14_2:
	retq
.Lfunc_end14:
	.size	__hip_module_dtor, .Lfunc_end14-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	PARAMS,@object                  # @PARAMS
	.local	PARAMS
	.comm	PARAMS,32,16
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"small-zibra-unsplash.ppm"
	.size	.L.str, 25

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"file %s , rotation angle: %f\n"
	.size	.L.str.1, 30

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"width:%d, height:%d,maxVal: %d, diagonal size: %d \n"
	.size	.L.str.2, 52

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" unable to malloc \n"
	.size	.L.str.3, 20

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"(%d, %d) rotated to newX: %d, newY: %d \n"
	.size	.L.str.4, 41

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"paddledInput.ppm"
	.size	.L.str.5, 17

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"cpu rotation time: %f milliseconds\n"
	.size	.L.str.6, 36

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"rotated_gold.ppm"
	.size	.L.str.7, 17

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"rotated_gold.csv"
	.size	.L.str.8, 17

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"cpu histo time: %f milliseconds\n"
	.size	.L.str.9, 33

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"histoBinCPU.csv"
	.size	.L.str.10, 16

	.type	_Z21rotation_kernel_naivePjS_iid,@object # @_Z21rotation_kernel_naivePjS_iid
	.section	.rodata,"a",@progbits
	.globl	_Z21rotation_kernel_naivePjS_iid
	.p2align	3, 0x0
_Z21rotation_kernel_naivePjS_iid:
	.quad	_Z36__device_stub__rotation_kernel_naivePjS_iid
	.size	_Z21rotation_kernel_naivePjS_iid, 8

	.type	.L.str.11,@object               # @.str.11
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.11:
	.asciz	"GPU rotation_kernel_naive time: %f milliseconds\n"
	.size	.L.str.11, 49

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"rotated_GPU_naive.ppm"
	.size	.L.str.12, 22

	.type	_Z17rotation_kernel_2PjS_iid,@object # @_Z17rotation_kernel_2PjS_iid
	.section	.rodata,"a",@progbits
	.globl	_Z17rotation_kernel_2PjS_iid
	.p2align	3, 0x0
_Z17rotation_kernel_2PjS_iid:
	.quad	_Z32__device_stub__rotation_kernel_2PjS_iid
	.size	_Z17rotation_kernel_2PjS_iid, 8

	.type	.L.str.13,@object               # @.str.13
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.13:
	.asciz	"GPU rotation_kernel_2 time: %f milliseconds\n"
	.size	.L.str.13, 45

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"rotated_GPU2.ppm"
	.size	.L.str.14, 17

	.type	_Z17rotation_kernel_3PjS_ii,@object # @_Z17rotation_kernel_3PjS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z17rotation_kernel_3PjS_ii
	.p2align	3, 0x0
_Z17rotation_kernel_3PjS_ii:
	.quad	_Z32__device_stub__rotation_kernel_3PjS_ii
	.size	_Z17rotation_kernel_3PjS_ii, 8

	.type	.L.str.15,@object               # @.str.15
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.15:
	.asciz	"GPU rotation kernel_3 tiem: %f milliseconds\n"
	.size	.L.str.15, 45

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"rotated_GPU3.ppm"
	.size	.L.str.16, 17

	.type	_Z18histo_kernel_naivePjS_ii,@object # @_Z18histo_kernel_naivePjS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z18histo_kernel_naivePjS_ii
	.p2align	3, 0x0
_Z18histo_kernel_naivePjS_ii:
	.quad	_Z33__device_stub__histo_kernel_naivePjS_ii
	.size	_Z18histo_kernel_naivePjS_ii, 8

	.type	.L.str.17,@object               # @.str.17
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.17:
	.asciz	"GPU histo_naive time: %f milliseconds\n"
	.size	.L.str.17, 39

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"histoBinGPU_kernel_naive.csv"
	.size	.L.str.18, 29

	.type	_Z14histo_kernel_2PjS_ii,@object # @_Z14histo_kernel_2PjS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z14histo_kernel_2PjS_ii
	.p2align	3, 0x0
_Z14histo_kernel_2PjS_ii:
	.quad	_Z29__device_stub__histo_kernel_2PjS_ii
	.size	_Z14histo_kernel_2PjS_ii, 8

	.type	.L.str.19,@object               # @.str.19
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.19:
	.asciz	"GPU histo_kernel_2 time: %f milliseconds\n"
	.size	.L.str.19, 42

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"histoBinGPU_kernel_2.csv"
	.size	.L.str.20, 25

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"done\n"
	.size	.L.str.21, 6

	.type	_Z14histo_kernel_3PjS_ii,@object # @_Z14histo_kernel_3PjS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z14histo_kernel_3PjS_ii
	.p2align	3, 0x0
_Z14histo_kernel_3PjS_ii:
	.quad	_Z29__device_stub__histo_kernel_3PjS_ii
	.size	_Z14histo_kernel_3PjS_ii, 8

	.type	.L.str.22,@object               # @.str.22
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.22:
	.asciz	"read_ppm but no file name\n"
	.size	.L.str.22, 27

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"read_ppm( %s )\n"
	.size	.L.str.23, 16

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"rb"
	.size	.L.str.24, 3

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"read_ppm()    ERROR  file '%s' cannot be opened for reading\n"
	.size	.L.str.25, 61

	.type	.L.str.26,@object               # @.str.26
.L.str.26:
	.asciz	"Texture::Texture()    ERROR  file '%s' does not start with \"P6\"  I am expecting a binary PPM file\n"
	.size	.L.str.26, 99

	.type	.L.str.28,@object               # @.str.28
.L.str.28:
	.asciz	"%d\n%d\n%d"
	.size	.L.str.28, 9

	.type	.L.str.29,@object               # @.str.29
.L.str.29:
	.asciz	"read %d things   width %d  height %d  maxval %d\n"
	.size	.L.str.29, 49

	.type	.L.str.30,@object               # @.str.30
.L.str.30:
	.asciz	"read_ppm()  unable to allocate %d x %d unsigned ints for the picture\n"
	.size	.L.str.30, 70

	.type	.L.str.31,@object               # @.str.31
.L.str.31:
	.asciz	"read_ppm()  unable to allocate %d bytes of read buffer\n"
	.size	.L.str.31, 56

	.type	.L.str.32,@object               # @.str.32
	.section	.rodata.cst4,"aM",@progbits,4
.L.str.32:
	.asciz	"%d\000"
	.size	.L.str.32, 4

	.type	.L.str.33,@object               # @.str.33
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.33:
	.asciz	"%s found at offset %d\n"
	.size	.L.str.33, 23

	.type	.L.str.34,@object               # @.str.34
.L.str.34:
	.asciz	"Texture %s   read %ld of %ld bytes\n"
	.size	.L.str.34, 36

	.type	.L.str.35,@object               # @.str.35
.L.str.35:
	.asciz	"wb"
	.size	.L.str.35, 3

	.type	.L.str.36,@object               # @.str.36
.L.str.36:
	.asciz	"FAILED TO OPEN FILE '%s' for writing\n"
	.size	.L.str.36, 38

	.type	.L.str.37,@object               # @.str.37
.L.str.37:
	.asciz	"P6\n"
	.size	.L.str.37, 4

	.type	.L.str.38,@object               # @.str.38
.L.str.38:
	.asciz	"%d %d\n%d\n"
	.size	.L.str.38, 10

	.type	.L.str.39,@object               # @.str.39
.L.str.39:
	.asciz	"%c%c%c"
	.size	.L.str.39, 7

	.type	.L.str.40,@object               # @.str.40
.L.str.40:
	.asciz	"w+"
	.size	.L.str.40, 3

	.type	.L.str.41,@object               # @.str.41
.L.str.41:
	.asciz	"%d,"
	.size	.L.str.41, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z21rotation_kernel_naivePjS_iid"
	.size	.L__unnamed_1, 33

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z17rotation_kernel_2PjS_iid"
	.size	.L__unnamed_2, 29

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z17rotation_kernel_3PjS_ii"
	.size	.L__unnamed_3, 28

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z18histo_kernel_naivePjS_ii"
	.size	.L__unnamed_4, 29

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z14histo_kernel_2PjS_ii"
	.size	.L__unnamed_5, 25

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z14histo_kernel_3PjS_ii"
	.size	.L__unnamed_6, 25

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"PARAMS"
	.size	.L__unnamed_7, 7

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z36__device_stub__rotation_kernel_naivePjS_iid
	.addrsig_sym _Z32__device_stub__rotation_kernel_2PjS_iid
	.addrsig_sym _Z32__device_stub__rotation_kernel_3PjS_ii
	.addrsig_sym _Z33__device_stub__histo_kernel_naivePjS_ii
	.addrsig_sym _Z29__device_stub__histo_kernel_2PjS_ii
	.addrsig_sym _Z29__device_stub__histo_kernel_3PjS_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym PARAMS
	.addrsig_sym _Z21rotation_kernel_naivePjS_iid
	.addrsig_sym _Z17rotation_kernel_2PjS_iid
	.addrsig_sym _Z17rotation_kernel_3PjS_ii
	.addrsig_sym _Z18histo_kernel_naivePjS_ii
	.addrsig_sym _Z14histo_kernel_2PjS_ii
	.addrsig_sym _Z14histo_kernel_3PjS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z21rotation_kernel_naivePjS_iid ; -- Begin function _Z21rotation_kernel_naivePjS_iid
	.globl	_Z21rotation_kernel_naivePjS_iid
	.p2align	8
	.type	_Z21rotation_kernel_naivePjS_iid,@function
_Z21rotation_kernel_naivePjS_iid:       ; @_Z21rotation_kernel_naivePjS_iid
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b64 s[6:7], s[0:1], 0x10
	v_and_b32_e32 v3, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_mov_b32 s10, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_lshr_b32 s2, s2, 16
	v_mad_u64_u32 v[1:2], null, s14, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v3, 0
	v_cmpx_lt_i32_e32 -1, v1
	s_cbranch_execz .LBB0_24
; %bb.1:
	v_cmp_gt_i32_e32 vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e64 s2, s7, v2
	v_cmp_lt_i32_e64 s3, -1, v2
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v0, 0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s11, s2
	s_cbranch_execz .LBB0_23
; %bb.2:
	s_load_b64 s[4:5], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	v_cmp_ngt_f64_e64 s13, 0x41d00000, |s[4:5]|
	v_trig_preop_f64 v[15:16], |s[4:5]|, 0
	v_trig_preop_f64 v[13:14], |s[4:5]|, 1
	v_cmp_le_f64_e64 s2, 0x7b000000, |s[4:5]|
	v_ldexp_f64 v[17:18], |s[4:5]|, 0xffffff80
	v_trig_preop_f64 v[11:12], |s[4:5]|, 2
	s_and_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccz .LBB0_4
; %bb.3:
	s_and_b32 s3, s5, 0x7fffffff
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v3, s4, v17, s2
	v_cndmask_b32_e64 v4, s3, v18, s2
	s_mov_b32 s8, 0
	s_mov_b32 s14, 0x33145c07
	s_mov_b32 s15, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[5:6], v[15:16], v[3:4]
	v_mul_f64 v[7:8], v[13:14], v[3:4]
	v_mul_f64 v[27:28], v[11:12], v[3:4]
	v_fma_f64 v[9:10], v[15:16], v[3:4], -v[5:6]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[29:30], v[13:14], v[3:4], -v[7:8]
	v_fma_f64 v[3:4], v[11:12], v[3:4], -v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[7:8], v[9:10]
	v_add_f64 v[21:22], v[19:20], -v[7:8]
	v_add_f64 v[25:26], v[5:6], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[19:20], -v[21:22]
	v_add_f64 v[9:10], v[9:10], -v[21:22]
	v_ldexp_f64 v[21:22], v[25:26], -2
	v_add_f64 v[5:6], v[25:26], -v[5:6]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[7:8], v[7:8], -v[23:24]
	v_add_f64 v[23:24], v[27:28], v[29:30]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[21:22]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[5:6], v[19:20], -v[5:6]
	v_add_f64 v[7:8], v[9:10], v[7:8]
	v_fract_f64_e32 v[9:10], v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[23:24], v[7:8]
	v_dual_cndmask_b32 v10, 0, v10 :: v_dual_cndmask_b32 v9, 0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[9:10], v[9:10], 2
	v_add_f64 v[21:22], v[5:6], v[19:20]
	v_add_f64 v[31:32], v[19:20], -v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[21:22], v[9:10]
	v_add_f64 v[37:38], v[19:20], -v[31:32]
	v_add_f64 v[7:8], v[7:8], -v[31:32]
	v_add_f64 v[5:6], v[21:22], -v[5:6]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[25:26]
	v_add_f64 v[25:26], v[23:24], -v[27:28]
	v_add_f64 v[5:6], v[19:20], -v[5:6]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s9, 0x40100000, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_f64 v[35:36], v[23:24], -v[25:26]
	v_add_f64 v[9:10], v[9:10], s[8:9]
	v_add_f64 v[25:26], v[29:30], -v[25:26]
	v_add_f64 v[23:24], v[23:24], -v[37:38]
	v_add_f64 v[29:30], v[27:28], -v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[33:34], v[21:22], v[9:10]
	v_add_f64 v[7:8], v[7:8], v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[25:26], v[29:30]
	v_cvt_i32_f64_e32 v0, v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[25:26], v[7:8]
	v_cvt_f64_i32_e32 v[31:32], v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[3:4], v[3:4], v[7:8]
	v_add_f64 v[9:10], v[9:10], -v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[3:4], v[5:6], v[3:4]
	v_add_f64 v[23:24], v[21:22], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[23:24], -v[9:10]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[23:24]
	v_add_f64 v[5:6], v[21:22], -v[7:8]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s9, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v0, s2, 0, v0, vcc_lo
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[3:4], v[3:4], v[5:6]
	v_add_f64 v[5:6], v[23:24], -s[8:9]
	v_add_f64 v[7:8], v[5:6], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[9:10], v[7:8], s[2:3]
	v_add_f64 v[5:6], v[7:8], -v[5:6]
	v_fma_f64 v[19:20], v[7:8], s[2:3], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[3:4], v[3:4], -v[5:6]
	v_fma_f64 v[5:6], v[7:8], s[14:15], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], v[3:4], s[2:3], v[5:6]
	v_add_f64 v[3:4], v[9:10], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[3:4], -v[9:10]
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	s_branch .LBB0_5
.LBB0_4:
	s_mov_b32 s8, -1
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr3_vgpr4
                                        ; implicit-def: $vgpr5_vgpr6
.LBB0_5:                                ; %Flow79
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB0_7
; %bb.6:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s9, 0xbc91a626
	v_mul_f64 v[3:4], |s[4:5]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s8, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[7:8], v[3:4]
	v_fma_f64 v[3:4], v[7:8], s[2:3], |s[4:5]|
	v_mul_f64 v[5:6], v[7:8], s[8:9]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	v_cvt_i32_f64_e32 v0, v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[7:8], s[8:9], v[3:4]
	v_add_f64 v[9:10], v[3:4], v[5:6]
	s_mov_b32 s9, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[3:4], v[3:4], -v[9:10]
	v_add_f64 v[9:10], v[9:10], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[3:4], v[3:4], v[5:6]
	v_fma_f64 v[5:6], v[7:8], s[8:9], v[5:6]
	v_add_f64 v[3:4], v[9:10], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[3:4], v[3:4], -v[5:6]
	v_fma_f64 v[5:6], v[7:8], s[2:3], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[3:4], v[19:20], v[5:6]
	v_add_f64 v[9:10], v[3:4], -v[19:20]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], -v[9:10]
.LBB0_7:                                ; %_ZL3cosd.exit
	s_and_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccz .LBB0_9
; %bb.8:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |s[4:5]|
	s_and_b32 s2, s5, 0x7fffffff
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s14, 0x33145c07
	s_mov_b32 s15, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v8, s2, v18, vcc_lo
	v_cndmask_b32_e32 v7, s4, v17, vcc_lo
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[9:10], v[15:16], v[7:8]
	v_mul_f64 v[19:20], v[13:14], v[7:8]
	v_mul_f64 v[31:32], v[11:12], v[7:8]
	v_fma_f64 v[21:22], v[15:16], v[7:8], -v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[33:34], v[13:14], v[7:8], -v[19:20]
	v_fma_f64 v[7:8], v[11:12], v[7:8], -v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[19:20], v[21:22]
	v_add_f64 v[25:26], v[23:24], -v[19:20]
	v_add_f64 v[29:30], v[9:10], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[27:28], v[23:24], -v[25:26]
	v_add_f64 v[21:22], v[21:22], -v[25:26]
	v_ldexp_f64 v[25:26], v[29:30], -2
	v_add_f64 v[9:10], v[29:30], -v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[19:20], v[19:20], -v[27:28]
	v_add_f64 v[27:28], v[31:32], v[33:34]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[25:26]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[9:10], v[23:24], -v[9:10]
	v_add_f64 v[19:20], v[21:22], v[19:20]
	v_fract_f64_e32 v[21:22], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[27:28], v[19:20]
	v_dual_cndmask_b32 v22, 0, v22 :: v_dual_cndmask_b32 v21, 0, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[21:22], v[21:22], 2
	v_add_f64 v[25:26], v[9:10], v[23:24]
	v_add_f64 v[35:36], v[23:24], -v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[29:30], v[25:26], v[21:22]
	v_add_f64 v[41:42], v[23:24], -v[35:36]
	v_add_f64 v[19:20], v[19:20], -v[35:36]
	v_add_f64 v[9:10], v[25:26], -v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[29:30]
	v_add_f64 v[29:30], v[27:28], -v[31:32]
	v_add_f64 v[9:10], v[23:24], -v[9:10]
	s_and_b32 s3, vcc_lo, exec_lo
	s_cselect_b32 s3, 0x40100000, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_f64 v[39:40], v[27:28], -v[29:30]
	v_add_f64 v[21:22], v[21:22], s[2:3]
	v_add_f64 v[29:30], v[33:34], -v[29:30]
	v_add_f64 v[27:28], v[27:28], -v[41:42]
	v_add_f64 v[33:34], v[31:32], -v[39:40]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[37:38], v[25:26], v[21:22]
	v_add_f64 v[19:20], v[19:20], v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[29:30], v[33:34]
	v_cvt_i32_f64_e32 v37, v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[29:30], v[19:20]
	v_cvt_f64_i32_e32 v[35:36], v37
	v_readfirstlane_b32 s3, v37
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[7:8], v[7:8], v[19:20]
	v_add_f64 v[21:22], v[21:22], -v[35:36]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[9:10], v[7:8]
	v_add_f64 v[27:28], v[25:26], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[27:28], -v[21:22]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[27:28]
	v_add_f64 v[9:10], v[25:26], -v[19:20]
	s_cmp_lg_u32 vcc_lo, 0
	s_addc_u32 s12, s3, 0
	s_and_b32 s3, vcc_lo, exec_lo
	s_cselect_b32 s3, 0x3ff00000, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], v[9:10]
	v_add_f64 v[9:10], v[27:28], -s[2:3]
	v_add_f64 v[19:20], v[9:10], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[21:22], v[19:20], s[8:9]
	v_add_f64 v[9:10], v[19:20], -v[9:10]
	v_fma_f64 v[23:24], v[19:20], s[8:9], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[7:8], -v[9:10]
	v_fma_f64 v[9:10], v[19:20], s[14:15], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[7:8], s[8:9], v[9:10]
	v_add_f64 v[7:8], v[21:22], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[7:8], -v[21:22]
	v_add_f64 v[9:10], v[9:10], -v[19:20]
	s_branch .LBB0_10
.LBB0_9:
	s_mov_b32 s2, -1
                                        ; implicit-def: $sgpr12
                                        ; implicit-def: $vgpr7_vgpr8
                                        ; implicit-def: $vgpr9_vgpr10
.LBB0_10:                               ; %Flow78
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_12
; %bb.11:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s9, 0xbc91a626
	v_mul_f64 v[7:8], |s[4:5]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s8, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[9:10], v[7:8]
	v_fma_f64 v[7:8], v[9:10], s[2:3], |s[4:5]|
	v_mul_f64 v[19:20], v[9:10], s[8:9]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[25:26], v[9:10], s[8:9], v[7:8]
	v_add_f64 v[21:22], v[7:8], v[19:20]
	s_mov_b32 s9, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[7:8], -v[21:22]
	v_add_f64 v[21:22], v[21:22], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[7:8], v[23:24], v[19:20]
	v_fma_f64 v[19:20], v[9:10], s[8:9], v[19:20]
	v_cvt_i32_f64_e32 v23, v[9:10]
	v_add_f64 v[7:8], v[21:22], v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s12, v23
	v_add_f64 v[7:8], v[7:8], -v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[19:20], v[9:10], s[2:3], v[7:8]
	v_add_f64 v[7:8], v[25:26], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[7:8], -v[25:26]
	v_add_f64 v[9:10], v[19:20], -v[21:22]
.LBB0_12:                               ; %_ZL3sind.exit
	s_and_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccz .LBB0_14
; %bb.13:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |s[4:5]|
	s_and_b32 s2, s5, 0x7fffffff
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s16, 0x33145c07
	s_mov_b32 s17, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v20, s2, v18, vcc_lo
	v_cndmask_b32_e32 v19, s4, v17, vcc_lo
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[21:22], v[15:16], v[19:20]
	v_mul_f64 v[23:24], v[13:14], v[19:20]
	v_mul_f64 v[35:36], v[11:12], v[19:20]
	v_fma_f64 v[25:26], v[15:16], v[19:20], -v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[37:38], v[13:14], v[19:20], -v[23:24]
	v_fma_f64 v[19:20], v[11:12], v[19:20], -v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[27:28], v[23:24], v[25:26]
	v_add_f64 v[29:30], v[27:28], -v[23:24]
	v_add_f64 v[33:34], v[21:22], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[27:28], -v[29:30]
	v_add_f64 v[25:26], v[25:26], -v[29:30]
	v_ldexp_f64 v[29:30], v[33:34], -2
	v_add_f64 v[21:22], v[33:34], -v[21:22]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[23:24], v[23:24], -v[31:32]
	v_add_f64 v[31:32], v[35:36], v[37:38]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[29:30]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[21:22], v[27:28], -v[21:22]
	v_add_f64 v[23:24], v[25:26], v[23:24]
	v_fract_f64_e32 v[25:26], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[31:32], v[23:24]
	v_dual_cndmask_b32 v26, 0, v26 :: v_dual_cndmask_b32 v25, 0, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[25:26], v[25:26], 2
	v_add_f64 v[29:30], v[21:22], v[27:28]
	v_add_f64 v[39:40], v[27:28], -v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[33:34], v[29:30], v[25:26]
	v_add_f64 v[45:46], v[27:28], -v[39:40]
	v_add_f64 v[23:24], v[23:24], -v[39:40]
	v_add_f64 v[21:22], v[29:30], -v[21:22]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[33:34]
	v_add_f64 v[33:34], v[31:32], -v[35:36]
	v_add_f64 v[21:22], v[27:28], -v[21:22]
	s_and_b32 s3, vcc_lo, exec_lo
	s_cselect_b32 s3, 0x40100000, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_f64 v[43:44], v[31:32], -v[33:34]
	v_add_f64 v[25:26], v[25:26], s[2:3]
	v_add_f64 v[33:34], v[37:38], -v[33:34]
	v_add_f64 v[31:32], v[31:32], -v[45:46]
	v_add_f64 v[37:38], v[35:36], -v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[29:30], v[25:26]
	v_add_f64 v[23:24], v[23:24], v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[33:34], v[33:34], v[37:38]
	v_cvt_i32_f64_e32 v41, v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[33:34], v[23:24]
	v_cvt_f64_i32_e32 v[39:40], v41
	v_readfirstlane_b32 s3, v41
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[19:20], v[23:24]
	v_add_f64 v[25:26], v[25:26], -v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[21:22], v[19:20]
	v_add_f64 v[31:32], v[29:30], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[31:32], -v[25:26]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[31:32]
	v_add_f64 v[21:22], v[29:30], -v[23:24]
	s_cmp_lg_u32 vcc_lo, 0
	s_addc_u32 s14, s3, 0
	s_and_b32 s3, vcc_lo, exec_lo
	s_cselect_b32 s3, 0x3ff00000, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[19:20], v[21:22]
	v_add_f64 v[21:22], v[31:32], -s[2:3]
	v_add_f64 v[23:24], v[21:22], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[25:26], v[23:24], s[8:9]
	v_add_f64 v[21:22], v[23:24], -v[21:22]
	v_fma_f64 v[27:28], v[23:24], s[8:9], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[19:20], -v[21:22]
	v_fma_f64 v[21:22], v[23:24], s[16:17], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[21:22], v[19:20], s[8:9], v[21:22]
	v_add_f64 v[19:20], v[25:26], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[19:20], -v[25:26]
	v_add_f64 v[21:22], v[21:22], -v[23:24]
	s_branch .LBB0_15
.LBB0_14:
	s_mov_b32 s2, -1
                                        ; implicit-def: $sgpr14
                                        ; implicit-def: $vgpr19_vgpr20
                                        ; implicit-def: $vgpr21_vgpr22
.LBB0_15:                               ; %Flow77
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_17
; %bb.16:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s9, 0xbc91a626
	v_mul_f64 v[19:20], |s[4:5]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s8, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[21:22], v[19:20]
	v_fma_f64 v[19:20], v[21:22], s[2:3], |s[4:5]|
	v_mul_f64 v[23:24], v[21:22], s[8:9]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[29:30], v[21:22], s[8:9], v[19:20]
	v_add_f64 v[25:26], v[19:20], v[23:24]
	s_mov_b32 s9, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[27:28], v[19:20], -v[25:26]
	v_add_f64 v[25:26], v[25:26], -v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[27:28], v[23:24]
	v_fma_f64 v[23:24], v[21:22], s[8:9], v[23:24]
	v_cvt_i32_f64_e32 v27, v[21:22]
	v_add_f64 v[19:20], v[25:26], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s14, v27
	v_add_f64 v[19:20], v[19:20], -v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[23:24], v[21:22], s[2:3], v[19:20]
	v_add_f64 v[19:20], v[29:30], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[19:20], -v[29:30]
	v_add_f64 v[21:22], v[23:24], -v[25:26]
.LBB0_17:                               ; %_ZL3sind.exit56
	s_and_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccz .LBB0_19
; %bb.18:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |s[4:5]|
	s_and_b32 s2, s5, 0x7fffffff
	s_mov_b32 s8, 0
	s_mov_b32 s16, 0x33145c07
	s_mov_b32 s17, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v18, s2, v18, vcc_lo
	v_cndmask_b32_e32 v17, s4, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[23:24], v[15:16], v[17:18]
	v_mul_f64 v[25:26], v[13:14], v[17:18]
	v_mul_f64 v[35:36], v[11:12], v[17:18]
	v_fma_f64 v[15:16], v[15:16], v[17:18], -v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[13:14], v[17:18], -v[25:26]
	v_fma_f64 v[11:12], v[11:12], v[17:18], -v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[27:28], v[25:26], v[15:16]
	v_add_f64 v[29:30], v[27:28], -v[25:26]
	v_add_f64 v[33:34], v[23:24], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[27:28], -v[29:30]
	v_add_f64 v[15:16], v[15:16], -v[29:30]
	v_ldexp_f64 v[29:30], v[33:34], -2
	v_add_f64 v[23:24], v[33:34], -v[23:24]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[25:26], v[25:26], -v[31:32]
	v_add_f64 v[31:32], v[35:36], v[13:14]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[29:30]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[23:24], v[27:28], -v[23:24]
	v_add_f64 v[15:16], v[15:16], v[25:26]
	v_fract_f64_e32 v[25:26], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[31:32], v[15:16]
	v_dual_cndmask_b32 v26, 0, v26 :: v_dual_cndmask_b32 v25, 0, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[25:26], v[25:26], 2
	v_add_f64 v[29:30], v[23:24], v[27:28]
	v_add_f64 v[37:38], v[27:28], -v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[33:34], v[29:30], v[25:26]
	v_add_f64 v[43:44], v[27:28], -v[37:38]
	v_add_f64 v[15:16], v[15:16], -v[37:38]
	v_add_f64 v[17:18], v[29:30], -v[23:24]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[33:34]
	v_add_f64 v[33:34], v[31:32], -v[35:36]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s9, 0x40100000, 0
	v_add_f64 v[41:42], v[31:32], -v[33:34]
	v_add_f64 v[25:26], v[25:26], s[8:9]
	v_add_f64 v[13:14], v[13:14], -v[33:34]
	v_add_f64 v[31:32], v[31:32], -v[43:44]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[33:34], v[35:36], -v[41:42]
	v_add_f64 v[39:40], v[29:30], v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[15:16], v[15:16], v[31:32]
	v_add_f64 v[13:14], v[13:14], v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v39, v[39:40]
	v_add_f64 v[13:14], v[13:14], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[37:38], v39
	v_add_f64 v[15:16], v[27:28], -v[17:18]
	v_add_f64 v[11:12], v[11:12], v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], -v[37:38]
	v_add_f64 v[11:12], v[15:16], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[29:30], v[25:26]
	v_add_f64 v[13:14], v[23:24], -v[25:26]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[23:24]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[13:14], v[29:30], -v[13:14]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s9, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v15, s2, 0, v39, vcc_lo
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[11:12], v[13:14]
	v_add_f64 v[13:14], v[23:24], -s[8:9]
	v_add_f64 v[16:17], v[13:14], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[23:24], v[16:17], s[2:3]
	v_add_f64 v[13:14], v[16:17], -v[13:14]
	v_fma_f64 v[25:26], v[16:17], s[2:3], -v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], -v[13:14]
	v_fma_f64 v[13:14], v[16:17], s[16:17], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[11:12], s[2:3], v[13:14]
	v_add_f64 v[11:12], v[23:24], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[11:12], -v[23:24]
	v_add_f64 v[13:14], v[13:14], -v[16:17]
	s_branch .LBB0_20
.LBB0_19:
	s_mov_b32 s8, -1
                                        ; implicit-def: $vgpr15
                                        ; implicit-def: $vgpr11_vgpr12
                                        ; implicit-def: $vgpr13_vgpr14
.LBB0_20:                               ; %Flow
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB0_22
; %bb.21:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s9, 0xbc91a626
	v_mul_f64 v[11:12], |s[4:5]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s8, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[15:16], v[11:12]
	v_fma_f64 v[11:12], v[15:16], s[2:3], |s[4:5]|
	v_mul_f64 v[13:14], v[15:16], s[8:9]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[23:24], v[15:16], s[8:9], v[11:12]
	v_add_f64 v[17:18], v[11:12], v[13:14]
	s_mov_b32 s9, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[11:12], -v[17:18]
	v_add_f64 v[17:18], v[17:18], -v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[13:14]
	v_fma_f64 v[13:14], v[15:16], s[8:9], v[13:14]
	v_add_f64 v[11:12], v[17:18], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[11:12], -v[13:14]
	v_fma_f64 v[13:14], v[15:16], s[2:3], v[11:12]
	v_cvt_i32_f64_e32 v15, v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[23:24], v[13:14]
	v_add_f64 v[17:18], v[11:12], -v[23:24]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[13:14], v[13:14], -v[17:18]
.LBB0_22:                               ; %_ZL3cosd.exit61
	v_mul_f64 v[16:17], v[19:20], v[19:20]
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[23:24], v[11:12], v[11:12]
	v_mul_f64 v[25:26], v[7:8], v[7:8]
	s_mov_b32 s2, 0xb42fdfa7
	s_mov_b32 s8, 0xf9a43bb8
	s_mov_b32 s3, 0xbe5ae600
	s_mov_b32 s9, 0x3de5e0b2
	v_mul_f64 v[29:30], v[3:4], v[3:4]
	s_mov_b32 s16, 0x9037ab78
	s_mov_b32 s18, 0x46cc5e42
	s_mov_b32 s20, 0x796cde01
	s_mov_b32 s17, 0x3e21eeb6
	s_mov_b32 s19, 0xbda907db
	s_mov_b32 s21, 0x3ec71de3
	v_mul_f64 v[59:60], v[21:22], 0.5
	v_mul_f64 v[69:70], v[13:14], 0.5
	v_mul_f64 v[67:68], v[9:10], 0.5
	s_bitcmp0_b32 s14, 0
	s_cselect_b32 vcc_lo, -1, 0
	v_fma_f64 v[27:28], v[16:17], s[8:9], s[2:3]
	v_fma_f64 v[31:32], v[23:24], s[8:9], s[2:3]
	v_fma_f64 v[33:34], v[25:26], s[8:9], s[2:3]
	v_fma_f64 v[35:36], v[16:17], s[18:19], s[16:17]
	v_mul_f64 v[37:38], v[16:17], -0.5
	v_fma_f64 v[41:42], v[25:26], s[18:19], s[16:17]
	v_mul_f64 v[43:44], v[25:26], -0.5
	v_fma_f64 v[39:40], v[29:30], s[8:9], s[2:3]
	v_fma_f64 v[45:46], v[23:24], s[18:19], s[16:17]
	v_mul_f64 v[47:48], v[23:24], -0.5
	s_mov_b32 s2, 0xa17f65f6
	s_mov_b32 s8, 0x19e83e5c
	s_mov_b32 s3, 0xbe927e4f
	s_mov_b32 s9, 0xbf2a01a0
	v_fma_f64 v[51:52], v[29:30], s[18:19], s[16:17]
	v_mul_f64 v[53:54], v[29:30], -0.5
	s_mov_b32 s16, 0x19f4ec90
	s_mov_b32 s18, 0x11110bb3
	s_mov_b32 s17, 0x3efa01a0
	s_mov_b32 s19, 0x3f811111
	v_mul_f64 v[61:62], v[19:20], -v[16:17]
	v_mul_f64 v[73:74], v[11:12], -v[23:24]
	v_mul_f64 v[71:72], v[7:8], -v[25:26]
	v_mul_f64 v[79:80], v[3:4], -v[29:30]
	v_fma_f64 v[27:28], v[16:17], v[27:28], s[20:21]
	v_fma_f64 v[31:32], v[23:24], v[31:32], s[20:21]
	v_fma_f64 v[33:34], v[25:26], v[33:34], s[20:21]
	v_fma_f64 v[35:36], v[16:17], v[35:36], s[2:3]
	v_add_f64 v[49:50], v[37:38], 1.0
	v_fma_f64 v[41:42], v[25:26], v[41:42], s[2:3]
	v_add_f64 v[55:56], v[43:44], 1.0
	v_fma_f64 v[39:40], v[29:30], v[39:40], s[20:21]
	v_fma_f64 v[45:46], v[23:24], v[45:46], s[2:3]
	v_add_f64 v[57:58], v[47:48], 1.0
	v_fma_f64 v[51:52], v[29:30], v[51:52], s[2:3]
	v_add_f64 v[65:66], v[53:54], 1.0
	s_mov_b32 s2, 0x16c16967
	s_mov_b32 s3, 0xbf56c16c
	v_fma_f64 v[27:28], v[16:17], v[27:28], s[8:9]
	v_fma_f64 v[31:32], v[23:24], v[31:32], s[8:9]
	v_fma_f64 v[33:34], v[25:26], v[33:34], s[8:9]
	v_fma_f64 v[35:36], v[16:17], v[35:36], s[16:17]
	v_add_f64 v[63:64], -v[49:50], 1.0
	v_fma_f64 v[41:42], v[25:26], v[41:42], s[16:17]
	v_add_f64 v[75:76], -v[55:56], 1.0
	v_fma_f64 v[39:40], v[29:30], v[39:40], s[8:9]
	v_fma_f64 v[45:46], v[23:24], v[45:46], s[16:17]
	v_add_f64 v[77:78], -v[57:58], 1.0
	s_mov_b32 s8, 0x55555555
	s_mov_b32 s9, 0x3fa55555
	v_fma_f64 v[51:52], v[29:30], v[51:52], s[16:17]
	v_fma_f64 v[27:28], v[16:17], v[27:28], s[18:19]
	v_fma_f64 v[31:32], v[23:24], v[31:32], s[18:19]
	v_fma_f64 v[33:34], v[25:26], v[33:34], s[18:19]
	v_fma_f64 v[35:36], v[16:17], v[35:36], s[2:3]
	v_add_f64 v[37:38], v[63:64], v[37:38]
	v_add_f64 v[63:64], -v[65:66], 1.0
	v_fma_f64 v[41:42], v[25:26], v[41:42], s[2:3]
	v_fma_f64 v[39:40], v[29:30], v[39:40], s[18:19]
	v_add_f64 v[43:44], v[75:76], v[43:44]
	v_fma_f64 v[45:46], v[23:24], v[45:46], s[2:3]
	v_add_f64 v[47:48], v[77:78], v[47:48]
	v_fma_f64 v[27:28], v[61:62], v[27:28], v[59:60]
	v_mul_f64 v[59:60], v[5:6], 0.5
	v_fma_f64 v[31:32], v[73:74], v[31:32], v[69:70]
	v_fma_f64 v[33:34], v[71:72], v[33:34], v[67:68]
	v_mul_f64 v[67:68], v[16:17], v[16:17]
	v_fma_f64 v[35:36], v[16:17], v[35:36], s[8:9]
	v_fma_f64 v[37:38], v[19:20], -v[21:22], v[37:38]
	v_fma_f64 v[41:42], v[25:26], v[41:42], s[8:9]
	v_fma_f64 v[43:44], v[7:8], -v[9:10], v[43:44]
	v_fma_f64 v[16:17], v[16:17], v[27:28], -v[21:22]
	v_fma_f64 v[21:22], v[29:30], v[51:52], s[2:3]
	v_add_f64 v[27:28], v[63:64], v[53:54]
	v_fma_f64 v[39:40], v[79:80], v[39:40], v[59:60]
	v_fma_f64 v[31:32], v[23:24], v[31:32], -v[13:14]
	v_mul_f64 v[51:52], v[25:26], v[25:26]
	v_fma_f64 v[9:10], v[25:26], v[33:34], -v[9:10]
	v_mul_f64 v[53:54], v[23:24], v[23:24]
	v_fma_f64 v[23:24], v[23:24], v[45:46], s[8:9]
	v_fma_f64 v[13:14], v[11:12], -v[13:14], v[47:48]
	s_mov_b32 s3, 0xbfc55555
	s_mov_b32 s2, s8
	v_fma_f64 v[25:26], v[67:68], v[35:36], v[37:38]
	v_mul_f64 v[33:34], v[29:30], v[29:30]
	v_fma_f64 v[16:17], v[61:62], s[2:3], v[16:17]
	v_fma_f64 v[21:22], v[29:30], v[21:22], s[8:9]
	v_fma_f64 v[27:28], v[3:4], -v[5:6], v[27:28]
	v_fma_f64 v[5:6], v[29:30], v[39:40], -v[5:6]
	v_fma_f64 v[29:30], v[73:74], s[2:3], v[31:32]
	v_fma_f64 v[31:32], v[51:52], v[41:42], v[43:44]
	v_fma_f64 v[9:10], v[71:72], s[2:3], v[9:10]
	v_fma_f64 v[13:14], v[53:54], v[23:24], v[13:14]
	v_add_f64 v[23:24], v[49:50], v[25:26]
	v_cvt_f64_i32_e32 v[25:26], v2
	v_add_f64 v[16:17], v[19:20], -v[16:17]
	v_cvt_f64_i32_e32 v[18:19], s7
	v_fma_f64 v[20:21], v[33:34], v[21:22], v[27:28]
	v_fma_f64 v[5:6], v[79:80], s[2:3], v[5:6]
	v_add_f64 v[11:12], v[11:12], -v[29:30]
	v_add_f64 v[27:28], v[55:56], v[31:32]
	v_add_f64 v[7:8], v[7:8], -v[9:10]
	v_cmp_class_f64_e64 s2, s[4:5], 0x1f8
	s_lshl_b32 s3, s14, 30
	v_add_f64 v[9:10], v[57:58], v[13:14]
	v_cvt_f64_i32_e32 v[13:14], s6
	v_and_b32_e32 v30, 1, v15
	s_xor_b32 s3, s3, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_and_b32 s8, s3, 0x80000000
	s_bitcmp0_b32 s12, 0
	v_cmp_eq_u32_e64 s3, 0, v30
	s_cselect_b32 s4, -1, 0
	s_lshl_b32 s9, s12, 30
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s5, s9, s5
	v_dual_cndmask_b32 v29, v23, v16 :: v_dual_lshlrev_b32 v16, 30, v15
	v_fma_f64 v[25:26], v[18:19], -0.5, v[25:26]
	v_cvt_f64_i32_e32 v[22:23], v1
	v_add_f64 v[3:4], v[3:4], -v[5:6]
	v_xor_b32_e32 v5, 0x80000000, v12
	v_cndmask_b32_e64 v6, v27, v7, s4
	v_cndmask_b32_e64 v7, v28, v8, s4
	v_and_b32_e32 v31, 0x80000000, v16
	v_cndmask_b32_e64 v8, v11, v9, s3
	v_cndmask_b32_e64 v5, v5, v10, s3
	s_and_b32 s3, s5, 0x80000000
	v_cndmask_b32_e64 v6, 0, v6, s2
	v_xor_b32_e32 v7, s3, v7
	v_add_f64 v[15:16], v[65:66], v[20:21]
	v_cndmask_b32_e64 v8, 0, v8, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v7, 0x7ff80000, v7, s2
	v_mul_f64 v[20:21], v[25:26], v[6:7]
	v_and_b32_e32 v6, 1, v0
	v_fma_f64 v[10:11], v[13:14], -0.5, v[22:23]
	v_lshlrev_b32_e32 v0, 30, v0
	v_xor_b32_e32 v4, 0x80000000, v4
	s_delay_alu instid0(VALU_DEP_4)
	v_cmp_eq_u32_e64 s3, 0, v6
	v_cndmask_b32_e32 v6, v24, v17, vcc_lo
	v_xor_b32_e32 v9, v5, v31
	v_and_b32_e32 v0, 0x80000000, v0
	v_cndmask_b32_e64 v5, 0, v29, s2
	v_cndmask_b32_e64 v4, v4, v16, s3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v9, 0x7ff80000, v9, s2
	v_cndmask_b32_e64 v3, v3, v15, s3
	v_xor_b32_e32 v6, s8, v6
	v_xor_b32_e32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[7:8], v[25:26], v[8:9]
	v_cndmask_b32_e64 v3, 0, v3, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v6, 0x7ff80000, v6, s2
	v_cndmask_b32_e64 v4, 0x7ff80000, v0, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[3:4], v[10:11], v[3:4], -v[20:21]
	v_fma_f64 v[5:6], v[10:11], v[5:6], v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[3:4], v[13:14], 0.5, v[3:4]
	v_fma_f64 v[5:6], v[18:19], 0.5, v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v0, v[3:4]
	v_cvt_i32_f64_e32 v3, v[5:6]
.LBB0_23:                               ; %Flow80
	s_or_b32 exec_lo, exec_lo, s11
.LBB0_24:
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s10
	v_cmp_gt_i32_e32 vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e64 s2, s7, v3
	v_cmp_lt_i32_e64 s3, -1, v3
	v_cmp_lt_i32_e64 s4, -1, v0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_26
; %bb.25:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mad_u64_u32 v[4:5], null, v3, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v5, v[3:4], off
	v_mad_u64_u32 v[3:4], null, v2, s6, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v5, off
.LBB0_26:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21rotation_kernel_naivePjS_iid
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 81
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z21rotation_kernel_naivePjS_iid, .Lfunc_end0-_Z21rotation_kernel_naivePjS_iid
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 5460
; NumSgprs: 24
; NumVgprs: 81
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 10
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 81
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z17rotation_kernel_2PjS_iid ; -- Begin function _Z17rotation_kernel_2PjS_iid
	.globl	_Z17rotation_kernel_2PjS_iid
	.p2align	8
	.type	_Z17rotation_kernel_2PjS_iid,@function
_Z17rotation_kernel_2PjS_iid:           ; @_Z17rotation_kernel_2PjS_iid
; %bb.0:
	s_load_b64 s[4:5], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	v_cmp_ngt_f64_e64 s6, 0x41d00000, |s[4:5]|
	v_trig_preop_f64 v[9:10], |s[4:5]|, 0
	v_trig_preop_f64 v[7:8], |s[4:5]|, 1
	v_cmp_le_f64_e64 s2, 0x7b000000, |s[4:5]|
	v_ldexp_f64 v[11:12], |s[4:5]|, 0xffffff80
	v_trig_preop_f64 v[5:6], |s[4:5]|, 2
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccz .LBB1_2
; %bb.1:
	s_and_b32 s3, s5, 0x7fffffff
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v1, s4, v11, s2
	v_cndmask_b32_e64 v2, s3, v12, s2
	s_mov_b32 s2, 0
	s_mov_b32 s10, 0x54442d18
	s_mov_b32 s11, 0x3ff921fb
	s_mov_b32 s12, 0x33145c07
	v_mul_f64 v[3:4], v[9:10], v[1:2]
	v_mul_f64 v[13:14], v[7:8], v[1:2]
	v_mul_f64 v[25:26], v[5:6], v[1:2]
	s_mov_b32 s13, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[15:16], v[9:10], v[1:2], -v[3:4]
	v_fma_f64 v[27:28], v[7:8], v[1:2], -v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[1:2], v[5:6], v[1:2], -v[25:26]
	v_add_f64 v[17:18], v[13:14], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[17:18], -v[13:14]
	v_add_f64 v[23:24], v[3:4], v[17:18]
	v_add_f64 v[21:22], v[17:18], -v[19:20]
	v_add_f64 v[15:16], v[15:16], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[19:20], v[23:24], -2
	v_add_f64 v[3:4], v[23:24], -v[3:4]
	v_add_f64 v[13:14], v[13:14], -v[21:22]
	v_add_f64 v[21:22], v[25:26], v[27:28]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[19:20]|
	v_add_f64 v[3:4], v[17:18], -v[3:4]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[13:14], v[15:16], v[13:14]
	v_fract_f64_e32 v[15:16], v[19:20]
	v_add_f64 v[17:18], v[21:22], v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v16, 0, v16 :: v_dual_cndmask_b32 v15, 0, v15
	v_ldexp_f64 v[15:16], v[15:16], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[3:4], v[17:18]
	v_add_f64 v[29:30], v[17:18], -v[21:22]
	v_add_f64 v[23:24], v[19:20], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[35:36], v[17:18], -v[29:30]
	v_add_f64 v[13:14], v[13:14], -v[29:30]
	v_add_f64 v[3:4], v[19:20], -v[3:4]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[23:24]
	v_add_f64 v[23:24], v[21:22], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[3:4], v[17:18], -v[3:4]
	s_and_b32 s3, vcc_lo, exec_lo
	s_cselect_b32 s3, 0x40100000, 0
	v_add_f64 v[33:34], v[21:22], -v[23:24]
	v_add_f64 v[15:16], v[15:16], s[2:3]
	v_add_f64 v[23:24], v[27:28], -v[23:24]
	v_add_f64 v[21:22], v[21:22], -v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[27:28], v[25:26], -v[33:34]
	v_add_f64 v[31:32], v[19:20], v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[13:14], v[13:14], v[21:22]
	v_add_f64 v[23:24], v[23:24], v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v31, v[31:32]
	v_add_f64 v[13:14], v[23:24], v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[29:30], v31
	v_readfirstlane_b32 s3, v31
	v_add_f64 v[1:2], v[1:2], v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[15:16], -v[29:30]
	v_add_f64 v[1:2], v[3:4], v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[19:20], v[15:16]
	v_add_f64 v[13:14], v[21:22], -v[15:16]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_f64 v[3:4], v[19:20], -v[13:14]
	s_cmp_lg_u32 vcc_lo, 0
	s_addc_u32 s8, s3, 0
	s_and_b32 s3, vcc_lo, exec_lo
	s_cselect_b32 s3, 0x3ff00000, 0
	v_add_f64 v[1:2], v[1:2], v[3:4]
	v_add_f64 v[3:4], v[21:22], -s[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[13:14], v[3:4], v[1:2]
	v_mul_f64 v[15:16], v[13:14], s[10:11]
	v_add_f64 v[3:4], v[13:14], -v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], v[13:14], s[10:11], -v[15:16]
	v_add_f64 v[1:2], v[1:2], -v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[3:4], v[13:14], s[12:13], v[17:18]
	v_fma_f64 v[3:4], v[1:2], s[10:11], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[15:16], v[3:4]
	v_add_f64 v[13:14], v[1:2], -v[15:16]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[3:4], v[3:4], -v[13:14]
	s_branch .LBB1_3
.LBB1_2:
	s_mov_b32 s2, -1
                                        ; implicit-def: $sgpr8
                                        ; implicit-def: $vgpr1_vgpr2
                                        ; implicit-def: $vgpr3_vgpr4
.LBB1_3:                                ; %Flow70
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB1_5
; %bb.4:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s9, 0xbc91a626
	v_mul_f64 v[1:2], |s[4:5]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s8, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[3:4], v[1:2]
	v_fma_f64 v[1:2], v[3:4], s[2:3], |s[4:5]|
	v_mul_f64 v[13:14], v[3:4], s[8:9]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[19:20], v[3:4], s[8:9], v[1:2]
	v_add_f64 v[15:16], v[1:2], v[13:14]
	s_mov_b32 s9, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[17:18], v[1:2], -v[15:16]
	v_add_f64 v[15:16], v[15:16], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[1:2], v[17:18], v[13:14]
	v_fma_f64 v[13:14], v[3:4], s[8:9], v[13:14]
	v_cvt_i32_f64_e32 v17, v[3:4]
	v_add_f64 v[1:2], v[15:16], v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s8, v17
	v_add_f64 v[1:2], v[1:2], -v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[3:4], s[2:3], v[1:2]
	v_add_f64 v[1:2], v[19:20], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[15:16], v[1:2], -v[19:20]
	v_add_f64 v[3:4], v[13:14], -v[15:16]
.LBB1_5:                                ; %_ZL3sind.exit
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccz .LBB1_7
; %bb.6:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |s[4:5]|
	s_and_b32 s2, s5, 0x7fffffff
	s_mov_b32 s6, 0
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v12, s2, v12, vcc_lo
	v_cndmask_b32_e32 v11, s4, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[13:14], v[9:10], v[11:12]
	v_mul_f64 v[15:16], v[7:8], v[11:12]
	v_mul_f64 v[25:26], v[5:6], v[11:12]
	v_fma_f64 v[9:10], v[9:10], v[11:12], -v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[7:8], v[7:8], v[11:12], -v[15:16]
	v_fma_f64 v[5:6], v[5:6], v[11:12], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[15:16], v[9:10]
	v_add_f64 v[19:20], v[17:18], -v[15:16]
	v_add_f64 v[23:24], v[13:14], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[21:22], v[17:18], -v[19:20]
	v_add_f64 v[9:10], v[9:10], -v[19:20]
	v_ldexp_f64 v[19:20], v[23:24], -2
	v_add_f64 v[13:14], v[23:24], -v[13:14]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[15:16], v[15:16], -v[21:22]
	v_add_f64 v[21:22], v[25:26], v[7:8]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[19:20]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[13:14], v[17:18], -v[13:14]
	v_add_f64 v[9:10], v[9:10], v[15:16]
	v_fract_f64_e32 v[15:16], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[21:22], v[9:10]
	v_dual_cndmask_b32 v16, 0, v16 :: v_dual_cndmask_b32 v15, 0, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[15:16], v[15:16], 2
	v_add_f64 v[19:20], v[13:14], v[17:18]
	v_add_f64 v[27:28], v[17:18], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[19:20], v[15:16]
	v_add_f64 v[33:34], v[17:18], -v[27:28]
	v_add_f64 v[9:10], v[9:10], -v[27:28]
	v_add_f64 v[11:12], v[19:20], -v[13:14]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[23:24]
	v_add_f64 v[23:24], v[21:22], -v[25:26]
	v_add_f64 v[11:12], v[17:18], -v[11:12]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s7, 0x40100000, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_f64 v[31:32], v[21:22], -v[23:24]
	v_add_f64 v[15:16], v[15:16], s[6:7]
	v_add_f64 v[7:8], v[7:8], -v[23:24]
	v_add_f64 v[21:22], v[21:22], -v[33:34]
	v_add_f64 v[23:24], v[25:26], -v[31:32]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[19:20], v[15:16]
	v_add_f64 v[9:10], v[9:10], v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[7:8], v[7:8], v[23:24]
	v_cvt_i32_f64_e32 v29, v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[7:8], v[9:10]
	v_cvt_f64_i32_e32 v[27:28], v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_add_f64 v[15:16], v[15:16], -v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[11:12], v[5:6]
	v_add_f64 v[9:10], v[19:20], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[9:10], -v[15:16]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[9:10]
	v_add_f64 v[7:8], v[19:20], -v[7:8]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s7, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v12, s2, 0, v29, vcc_lo
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_add_f64 v[7:8], v[9:10], -s[6:7]
	v_add_f64 v[9:10], v[7:8], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[13:14], v[9:10], s[2:3]
	v_add_f64 v[7:8], v[9:10], -v[7:8]
	v_fma_f64 v[15:16], v[9:10], s[2:3], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	v_fma_f64 v[7:8], v[9:10], s[10:11], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], v[5:6], s[2:3], v[7:8]
	v_add_f64 v[8:9], v[13:14], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[8:9], -v[13:14]
	v_add_f64 v[10:11], v[5:6], -v[10:11]
	s_branch .LBB1_8
.LBB1_7:
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr8_vgpr9
                                        ; implicit-def: $vgpr10_vgpr11
.LBB1_8:                                ; %Flow69
	s_load_b32 s2, s[0:1], 0x2c
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_10
; %bb.9:
	s_mov_b32 s6, 0x6dc9c883
	s_mov_b32 s7, 0x3fe45f30
	s_mov_b32 s11, 0xbc91a626
	v_mul_f64 v[5:6], |s[4:5]|, s[6:7]
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0xbff921fb
	s_mov_b32 s10, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[5:6], v[5:6]
	v_fma_f64 v[7:8], v[5:6], s[6:7], |s[4:5]|
	v_mul_f64 v[9:10], v[5:6], s[10:11]
	s_mov_b32 s6, 0x252049c0
	s_mov_b32 s7, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[13:14], v[5:6], s[10:11], v[7:8]
	v_add_f64 v[11:12], v[7:8], v[9:10]
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[7:8], v[7:8], -v[11:12]
	v_add_f64 v[11:12], v[11:12], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[7:8], v[9:10]
	v_fma_f64 v[9:10], v[5:6], s[10:11], v[9:10]
	v_add_f64 v[7:8], v[11:12], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[9:10]
	v_fma_f64 v[10:11], v[5:6], s[6:7], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[13:14], v[10:11]
	v_add_f64 v[12:13], v[8:9], -v[13:14]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	v_cvt_i32_f64_e32 v12, v[5:6]
.LBB1_10:                               ; %_ZL3cosd.exit
	s_load_b64 s[6:7], s[0:1], 0x10
	v_and_b32_e32 v7, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_lshr_b32 s2, s2, 16
	s_mov_b32 s9, exec_lo
	v_mad_u64_u32 v[5:6], null, s14, s3, v[7:8]
	v_mad_u64_u32 v[6:7], null, s15, s2, v[0:1]
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v7, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_lt_i32_e32 -1, v5
	s_cbranch_execz .LBB1_14
; %bb.11:
	v_cmp_gt_i32_e32 vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e64 s2, s7, v6
	v_cmp_lt_i32_e64 s3, -1, v6
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v0, 0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s10, s2
	s_cbranch_execz .LBB1_13
; %bb.12:
	v_mul_f64 v[13:14], v[8:9], v[8:9]
	v_mul_f64 v[15:16], v[1:2], v[1:2]
	s_mov_b32 s2, 0xb42fdfa7
	s_mov_b32 s12, 0xf9a43bb8
	s_mov_b32 s3, 0xbe5ae600
	s_mov_b32 s13, 0x3de5e0b2
	s_mov_b32 s14, 0x796cde01
	s_mov_b32 s15, 0x3ec71de3
	v_mul_f64 v[33:34], v[10:11], 0.5
	v_mul_f64 v[39:40], v[3:4], 0.5
	s_bitcmp0_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[17:18], v[13:14], s[12:13], s[2:3]
	v_fma_f64 v[19:20], v[15:16], s[12:13], s[2:3]
	v_mul_f64 v[23:24], v[13:14], -0.5
	s_mov_b32 s2, 0x9037ab78
	s_mov_b32 s12, 0x46cc5e42
	s_mov_b32 s3, 0x3e21eeb6
	s_mov_b32 s13, 0xbda907db
	v_mul_f64 v[27:28], v[15:16], -0.5
	v_fma_f64 v[21:22], v[13:14], s[12:13], s[2:3]
	v_fma_f64 v[25:26], v[15:16], s[12:13], s[2:3]
	s_mov_b32 s12, 0x19e83e5c
	s_mov_b32 s13, 0xbf2a01a0
	s_mov_b32 s2, 0xa17f65f6
	s_mov_b32 s3, 0xbe927e4f
	v_mul_f64 v[35:36], v[8:9], -v[13:14]
	v_mul_f64 v[41:42], v[1:2], -v[15:16]
	v_fma_f64 v[17:18], v[13:14], v[17:18], s[14:15]
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[14:15]
	v_add_f64 v[29:30], v[23:24], 1.0
	v_add_f64 v[31:32], v[27:28], 1.0
	v_fma_f64 v[21:22], v[13:14], v[21:22], s[2:3]
	v_fma_f64 v[25:26], v[15:16], v[25:26], s[2:3]
	s_mov_b32 s2, 0x19f4ec90
	s_mov_b32 s3, 0x3efa01a0
	v_fma_f64 v[17:18], v[13:14], v[17:18], s[12:13]
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[12:13]
	s_mov_b32 s12, 0x11110bb3
	s_mov_b32 s13, 0x3f811111
	v_add_f64 v[37:38], -v[29:30], 1.0
	v_add_f64 v[43:44], -v[31:32], 1.0
	v_fma_f64 v[21:22], v[13:14], v[21:22], s[2:3]
	v_fma_f64 v[25:26], v[15:16], v[25:26], s[2:3]
	s_mov_b32 s2, 0x16c16967
	s_mov_b32 s3, 0xbf56c16c
	v_fma_f64 v[17:18], v[13:14], v[17:18], s[12:13]
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[12:13]
	v_add_f64 v[23:24], v[37:38], v[23:24]
	v_add_f64 v[27:28], v[43:44], v[27:28]
	v_fma_f64 v[21:22], v[13:14], v[21:22], s[2:3]
	v_fma_f64 v[25:26], v[15:16], v[25:26], s[2:3]
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s3, 0x3fa55555
	v_fma_f64 v[17:18], v[35:36], v[17:18], v[33:34]
	v_fma_f64 v[19:20], v[41:42], v[19:20], v[39:40]
	v_mul_f64 v[33:34], v[13:14], v[13:14]
	v_fma_f64 v[23:24], v[8:9], -v[10:11], v[23:24]
	v_fma_f64 v[21:22], v[13:14], v[21:22], s[2:3]
	v_fma_f64 v[10:11], v[13:14], v[17:18], -v[10:11]
	v_mul_f64 v[13:14], v[15:16], v[15:16]
	v_fma_f64 v[17:18], v[15:16], v[25:26], s[2:3]
	v_fma_f64 v[25:26], v[1:2], -v[3:4], v[27:28]
	v_fma_f64 v[3:4], v[15:16], v[19:20], -v[3:4]
	s_mov_b32 s3, 0xbfc55555
	v_cvt_f64_i32_e32 v[19:20], v5
	v_fma_f64 v[15:16], v[33:34], v[21:22], v[23:24]
	v_fma_f64 v[10:11], v[35:36], s[2:3], v[10:11]
	v_fma_f64 v[13:14], v[13:14], v[17:18], v[25:26]
	v_fma_f64 v[3:4], v[41:42], s[2:3], v[3:4]
	v_cvt_f64_i32_e32 v[17:18], v6
	v_cmp_class_f64_e64 s2, s[4:5], 0x1f8
	s_cselect_b32 s3, -1, 0
	v_add_f64 v[15:16], v[29:30], v[15:16]
	s_lshl_b32 s4, s8, 30
	v_add_f64 v[7:8], v[8:9], -v[10:11]
	v_cvt_f64_i32_e32 v[9:10], s7
	v_add_f64 v[13:14], v[31:32], v[13:14]
	v_add_f64 v[0:1], v[1:2], -v[3:4]
	v_and_b32_e32 v2, 1, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	v_cvt_f64_i32_e32 v[2:3], s6
	v_dual_cndmask_b32 v4, v7, v15 :: v_dual_lshlrev_b32 v7, 30, v12
	v_fma_f64 v[17:18], v[9:10], -0.5, v[17:18]
	v_xor_b32_e32 v8, 0x80000000, v8
	v_cndmask_b32_e64 v11, v13, v0, s3
	v_cndmask_b32_e64 v0, v14, v1, s3
	v_and_b32_e32 v7, 0x80000000, v7
	s_xor_b32 s3, s4, s5
	v_cndmask_b32_e32 v1, v8, v16, vcc_lo
	s_and_b32 s3, s3, 0x80000000
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v8, s3, v0
	v_cndmask_b32_e64 v0, 0, v4, s2
	v_xor_b32_e32 v1, v1, v7
	v_cndmask_b32_e64 v7, 0, v11, s2
	v_fma_f64 v[11:12], v[2:3], -0.5, v[19:20]
	v_cndmask_b32_e64 v8, 0x7ff80000, v8, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v1, 0x7ff80000, v1, s2
	v_mul_f64 v[13:14], v[17:18], v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[15:16], v[17:18], v[0:1]
	v_fma_f64 v[0:1], v[11:12], v[0:1], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[7:8], v[11:12], v[7:8], v[15:16]
	v_fma_f64 v[0:1], v[2:3], 0.5, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[9:10], 0.5, v[7:8]
	v_cvt_i32_f64_e32 v0, v[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_cvt_i32_f64_e32 v7, v[2:3]
.LBB1_13:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s10
.LBB1_14:
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s9
	v_cmp_gt_i32_e32 vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e64 s2, s7, v7
	v_cmp_lt_i32_e64 s3, -1, v7
	v_cmp_lt_i32_e64 s4, -1, v0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_16
; %bb.15:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mad_u64_u32 v[1:2], null, v7, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[0:1], off
	v_mad_u64_u32 v[0:1], null, v6, s6, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB1_16:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17rotation_kernel_2PjS_iid
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 45
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z17rotation_kernel_2PjS_iid, .Lfunc_end1-_Z17rotation_kernel_2PjS_iid
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3072
; NumSgprs: 18
; NumVgprs: 45
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 45
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z17rotation_kernel_3PjS_ii ; -- Begin function _Z17rotation_kernel_3PjS_ii
	.globl	_Z17rotation_kernel_3PjS_ii
	.p2align	8
	.type	_Z17rotation_kernel_3PjS_ii,@function
_Z17rotation_kernel_3PjS_ii:            ; @_Z17rotation_kernel_3PjS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[6:7], s[0:1], 0x10
	v_and_b32_e32 v3, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_lshr_b32 s2, s2, 16
	v_mad_u64_u32 v[1:2], null, s14, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v3, 0
	v_cmpx_lt_i32_e32 -1, v1
	s_cbranch_execz .LBB2_4
; %bb.1:
	v_cmp_gt_i32_e32 vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e64 s2, s7, v2
	v_cmp_lt_i32_e64 s3, -1, v2
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v0, 0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB2_3
; %bb.2:
	v_cvt_f64_i32_e32 v[3:4], v2
	v_cvt_f64_i32_e32 v[5:6], v1
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, PARAMS@rel32@lo+4
	s_addc_u32 s9, s9, PARAMS@rel32@hi+12
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, PARAMS@rel32@lo+20
	s_addc_u32 s13, s13, PARAMS@rel32@hi+28
	s_clause 0x1
	s_load_b128 s[8:11], s[8:9], 0x0
	s_load_b128 s[12:15], s[12:13], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[3:4], v[3:4], -s[10:11]
	v_add_f64 v[5:6], v[5:6], -s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[7:8], v[3:4], s[12:13]
	v_mul_f64 v[9:10], v[5:6], s[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[5:6], v[5:6], s[14:15], -v[7:8]
	v_fma_f64 v[3:4], v[3:4], s[14:15], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], s[8:9], v[5:6]
	v_add_f64 v[3:4], s[10:11], v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v0, v[5:6]
	v_cvt_i32_f64_e32 v3, v[3:4]
.LBB2_3:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_4:
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s4
	v_cmp_gt_i32_e32 vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e64 s2, s7, v3
	v_cmp_lt_i32_e64 s3, -1, v3
	v_cmp_lt_i32_e64 s4, -1, v0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_6
; %bb.5:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mad_u64_u32 v[4:5], null, v3, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v5, v[3:4], off
	v_mad_u64_u32 v[3:4], null, v2, s6, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v5, off
.LBB2_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17rotation_kernel_3PjS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z17rotation_kernel_3PjS_ii, .Lfunc_end2-_Z17rotation_kernel_3PjS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 512
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z18histo_kernel_naivePjS_ii ; -- Begin function _Z18histo_kernel_naivePjS_ii
	.globl	_Z18histo_kernel_naivePjS_ii
	.p2align	8
	.type	_Z18histo_kernel_naivePjS_ii,@function
_Z18histo_kernel_naivePjS_ii:           ; @_Z18histo_kernel_naivePjS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[6:7], s[0:1], 0x10
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s6, v0
	v_cmp_lt_i32_e64 s4, -1, v0
	v_cmp_gt_i32_e64 s2, s7, v1
	v_cmp_lt_i32_e64 s3, -1, v1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s4, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[1:2], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v3, v[1:2], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[1:2], null, v3, s6, v[0:1]
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_mov_b32_e32 v2, 1
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_atomic_add_u32 v[0:1], v2, off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18histo_kernel_naivePjS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z18histo_kernel_naivePjS_ii, .Lfunc_end3-_Z18histo_kernel_naivePjS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 264
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z14histo_kernel_2PjS_ii ; -- Begin function _Z14histo_kernel_2PjS_ii
	.globl	_Z14histo_kernel_2PjS_ii
	.p2align	8
	.type	_Z14histo_kernel_2PjS_ii,@function
_Z14histo_kernel_2PjS_ii:               ; @_Z14histo_kernel_2PjS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[6:7], s[0:1], 0x10
	v_lshlrev_b32_e32 v3, 2, v0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_cvt_f32_u32_e32 v1, s5
	s_add_i32 s2, s7, s5
	s_sub_i32 s8, 0, s5
	s_add_i32 s2, s2, -1
	s_ashr_i32 s9, s2, 31
	v_rcp_iflag_f32_e32 v1, v1
	s_add_i32 s2, s2, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_xor_b32 s10, s2, s9
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s3, v1
	v_mov_b32_e32 v1, 0
	s_mul_i32 s8, s8, s3
	ds_store_b32 v3, v1
	s_mul_hi_u32 s8, s3, s8
	s_waitcnt lgkmcnt(0)
	s_add_i32 s3, s3, s8
	s_barrier
	s_mul_hi_u32 s8, s10, s3
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s11, s8, s5
	s_waitcnt lgkmcnt(0)
	buffer_gl0_inv
	s_sub_i32 s10, s10, s11
	s_add_i32 s11, s8, 1
	s_sub_i32 s12, s10, s5
	s_cmp_ge_u32 s10, s5
	s_cselect_b32 s8, s11, s8
	s_cselect_b32 s10, s12, s10
	s_add_i32 s11, s8, 1
	s_cmp_ge_u32 s10, s5
	s_cselect_b32 s8, s11, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s8, s8, s9
	s_sub_i32 s8, s8, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s8, 1
	s_cbranch_scc1 .LBB4_5
; %bb.1:                                ; %.lr.ph.preheader
	v_mad_u64_u32 v[1:2], null, v0, s6, s[4:5]
	v_dual_mov_b32 v4, 1 :: v_dual_mov_b32 v5, v0
	s_mul_i32 s9, s6, s5
.LBB4_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s7, v5
	s_cbranch_execz .LBB4_4
; %bb.3:                                ;   in Loop: Header=BB4_2 Depth=1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	global_load_b32 v2, v[6:7], off
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v2, 2, v2
	ds_add_u32 v2, v4
.LBB4_4:                                ;   in Loop: Header=BB4_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v1, s9, v1
	v_add_nc_u32_e32 v5, s5, v5
	s_add_i32 s8, s8, -1
	s_cmp_eq_u32 s8, 0
	s_cbranch_scc0 .LBB4_2
.LBB4_5:                                ; %._crit_edge
	v_mad_u64_u32 v[1:2], null, v0, s6, s[4:5]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v3, v3
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v3, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14histo_kernel_2PjS_ii
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z14histo_kernel_2PjS_ii, .Lfunc_end4-_Z14histo_kernel_2PjS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 436
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14histo_kernel_3PjS_ii ; -- Begin function _Z14histo_kernel_3PjS_ii
	.globl	_Z14histo_kernel_3PjS_ii
	.p2align	8
	.type	_Z14histo_kernel_3PjS_ii,@function
_Z14histo_kernel_3PjS_ii:               ; @_Z14histo_kernel_3PjS_ii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[6:7], s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s7, 1
	s_cbranch_scc1 .LBB5_7
; %bb.1:                                ; %.lr.ph
	v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v2, 2, v0
	s_add_i32 s5, s7, 0xff
	s_mov_b32 s8, 0
	s_lshr_b32 s5, s5, 8
.LBB5_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB5_5 Depth 2
	v_lshl_add_u32 v4, s8, 8, v0
	v_mov_b32_e32 v3, 0x12c
	s_mov_b32 s9, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_i32_e64 s7, v4
	s_cbranch_execz .LBB5_4
; %bb.3:                                ;   in Loop: Header=BB5_2 Depth=1
	v_mad_u64_u32 v[5:6], null, v4, s6, s[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[3:4], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
.LBB5_4:                                ;   in Loop: Header=BB5_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_mov_b32 s9, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB5_5:                                ;   Parent Loop BB5_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v3, s9
	s_add_i32 s9, s9, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_eq_i32 s9, 0x400
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_cbranch_scc0 .LBB5_5
; %bb.6:                                ;   in Loop: Header=BB5_2 Depth=1
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s8, s5
	s_cbranch_scc0 .LBB5_2
	s_branch .LBB5_8
.LBB5_7:
	v_mov_b32_e32 v1, 0
.LBB5_8:                                ; %Flow44
	v_mad_u64_u32 v[2:3], null, v0, s6, s[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_store_b32 v[2:3], v1, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14histo_kernel_3PjS_ii
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z14histo_kernel_3PjS_ii, .Lfunc_end5-_Z14histo_kernel_3PjS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 304
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	PARAMS                  ; @PARAMS
	.type	PARAMS,@object
	.section	.bss,"aw",@nobits
	.globl	PARAMS
	.p2align	4, 0x0
PARAMS:
	.zero	32
	.size	PARAMS, 32

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym PARAMS
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
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        .value_kind:     hidden_block_count_x
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        .value_kind:     hidden_block_count_y
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        .value_kind:     hidden_block_count_z
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        .size:           2
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        .size:           2
        .value_kind:     hidden_group_size_y
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        .value_kind:     hidden_remainder_y
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        .size:           2
        .value_kind:     hidden_remainder_z
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        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21rotation_kernel_naivePjS_iid
    .private_segment_fixed_size: 0
    .sgpr_count:     24
    .sgpr_spill_count: 0
    .symbol:         _Z21rotation_kernel_naivePjS_iid.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     81
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
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        .value_kind:     global_buffer
      - .address_space:  global
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        .value_kind:     global_buffer
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        .size:           4
        .value_kind:     by_value
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        .size:           4
        .value_kind:     by_value
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        .size:           8
        .value_kind:     by_value
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        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
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        .size:           2
        .value_kind:     hidden_group_size_y
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        .size:           2
        .value_kind:     hidden_group_size_z
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        .size:           2
        .value_kind:     hidden_remainder_x
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        .size:           2
        .value_kind:     hidden_remainder_y
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        .size:           2
        .value_kind:     hidden_remainder_z
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        .value_kind:     hidden_global_offset_x
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        .size:           8
        .value_kind:     hidden_global_offset_y
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        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17rotation_kernel_2PjS_iid
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17rotation_kernel_2PjS_iid.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     45
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
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        .value_kind:     global_buffer
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        .value_kind:     global_buffer
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        .value_kind:     hidden_block_count_x
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        .value_kind:     hidden_block_count_y
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        .value_kind:     hidden_group_size_x
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        .size:           2
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        .size:           2
        .value_kind:     hidden_group_size_z
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        .value_kind:     hidden_remainder_x
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        .size:           2
        .value_kind:     hidden_remainder_y
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        .size:           2
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        .size:           8
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        .size:           8
        .value_kind:     hidden_global_offset_z
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        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17rotation_kernel_3PjS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17rotation_kernel_3PjS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
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        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
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      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
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        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
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        .size:           4
        .value_kind:     hidden_block_count_z
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        .value_kind:     hidden_group_size_x
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        .size:           2
        .value_kind:     hidden_group_size_y
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        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
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        .size:           2
        .value_kind:     hidden_remainder_y
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        .size:           2
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        .size:           8
        .value_kind:     hidden_global_offset_y
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        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18histo_kernel_naivePjS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18histo_kernel_naivePjS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
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        .value_kind:     hidden_block_count_y
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        .size:           4
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        .value_kind:     hidden_group_size_x
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        .size:           2
        .value_kind:     hidden_group_size_y
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        .size:           2
        .value_kind:     hidden_group_size_z
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        .size:           2
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        .size:           2
        .value_kind:     hidden_remainder_y
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        .size:           2
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      - .offset:         80
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        .value_kind:     hidden_global_offset_z
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        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14histo_kernel_2PjS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14histo_kernel_2PjS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
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        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
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      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14histo_kernel_3PjS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14histo_kernel_3PjS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
