#include <stdio.h>
#include <time.h>
#include <cuda.h>

__host__ cudaEvent_t get_time(void) {
	cudaEvent_t time;
	cudaEventCreate(&time);
	cudaEventRecord(time);
	return time;
}

// Pulled from module 6 assignment
__host__ void generate_rand_data(int * host_data_ptr, const int num_elem)
{
	// Generate random values from 0-19
    for(unsigned int i=0; i < num_elem; i++)
    	host_data_ptr[i] = (int) (rand()%20);
}

__global__ void gpuKernel(int *A, int *B, int *C, const int num_elem) {
    int idx = threadIdx.x + blockIdx.x*blockDim.x;
	if(idx < (num_elem)) {
		// Load data from global memory into registers
		int a = A[idx];
		int b = B[idx];
		int c = 0;
		
		// Perform some math on the array values
		c = (a*b) + a + b;
		c = c*c;
		C[idx] = c;
	}
}


__host__ float execute_concurrent_streamed_kernel(int arraySize, int N, int tpb) {    
    const int h_byteSize = arraySize*sizeof(int);
    const int d_byteSize = N*sizeof(int);
    
    
    cudaDeviceProp prop;
    int whichDevice;
    
    // Following taken from the book "CUDA by Example"
    cudaGetDevice(&whichDevice);
    cudaGetDeviceProperties(&prop, whichDevice);
    // "A GPU supporting device overlap possesses the capacity to simultaneously
    // execute a CUDA C kernel while performing a copy between device and host memory."
    if(!prop.deviceOverlap) {
        printf("Device will not handle overlaps, so no speedup from streams\n");
        return 0;
    }
    

    cudaStream_t stream0, stream1;
    cudaStreamCreate(&stream0);
    cudaStreamCreate(&stream1);
    
    int *h_a, *h_b, *h_c;
    // Create two sets of GPU buffers
    int *d_a0, *d_b0, *d_c0;    // Buffers used in stream0
    int *d_a1, *d_b1, *d_c1;    // Buffers used in stream1
    
    // Allocate pinned memory, cudaMemcpyAsync requires host memory be page-locked
    cudaHostAlloc((void **)&h_a, h_byteSize, cudaHostAllocDefault);
    cudaHostAlloc((void **)&h_b, h_byteSize, cudaHostAllocDefault);
    cudaHostAlloc((void **)&h_c, h_byteSize, cudaHostAllocDefault);
    
    // Used in stream0
    cudaMalloc((void**) &d_a0, d_byteSize);
    cudaMalloc((void**) &d_b0, d_byteSize);
    cudaMalloc((void**) &d_c0, d_byteSize);
    // Used in stream1
    cudaMalloc((void**) &d_a1, d_byteSize);
    cudaMalloc((void**) &d_b1, d_byteSize);
    cudaMalloc((void**) &d_c1, d_byteSize);
    
    // Fill host arrays with random data
	generate_rand_data(h_a, arraySize);
	generate_rand_data(h_b, arraySize);
	
	// Timers
    cudaEvent_t startT, stopT;
    float deltaT;
    
    startT = get_time();
    
    /* =================================================================================
     * We are only copying part of full data each time. Queueing in a ping-pong fashion
     * like shown below optimizes the execution timeline. Trying to queue all stream0
     * operations and then queue all stream1 operations will cause the copy back to host
     * memory in stream0 to block the copy to device for stream1. Now copies can start
     * in stream1 while stream0's kernel is executing.
     * =================================================================================
     */
	for(int i=0; i<arraySize; i+=N*2) {
        // Queue up copy of data for a array in both streams
        cudaMemcpyAsync(d_a0, h_a+i,    d_byteSize, cudaMemcpyHostToDevice, stream0);
        cudaMemcpyAsync(d_a1, h_a+i+N,  d_byteSize, cudaMemcpyHostToDevice, stream1);
        // Queue up copy of data for b array in both streams
        cudaMemcpyAsync(d_b0, h_b+i,    d_byteSize, cudaMemcpyHostToDevice, stream0);
        cudaMemcpyAsync(d_b1, h_b+i+N,  d_byteSize, cudaMemcpyHostToDevice, stream1);
        // Queue up running of gpu kernel
        gpuKernel<<<N/tpb, tpb, 0, stream0>>>(d_a0, d_b0, d_c0, N);
        gpuKernel<<<N/tpb, tpb, 0, stream1>>>(d_a1, d_b1, d_c1, N);
        // Queue up copy of data from device to pinned memory
        cudaMemcpyAsync(h_c+i,      d_c0, d_byteSize, cudaMemcpyDeviceToHost, stream0);
        cudaMemcpyAsync(h_c+i+N,    d_c1, d_byteSize, cudaMemcpyDeviceToHost, stream1);
	    
	}
	
	cudaStreamSynchronize(stream0);
	cudaStreamSynchronize(stream1);
	
	stopT = get_time();
	cudaEventSynchronize(stopT);
	
	cudaEventElapsedTime(&deltaT, startT, stopT);
	
	
	// Cleanup memory
	cudaFreeHost(h_a);
	cudaFreeHost(h_b);
	cudaFreeHost(h_c);
	cudaFree(d_a0);
	cudaFree(d_b0);
	cudaFree(d_c0);
	cudaFree(d_a1);
	cudaFree(d_b1);
	cudaFree(d_c1);
	cudaEventDestroy(startT);
	cudaEventDestroy(stopT);
	
	cudaStreamDestroy(stream0);
	cudaStreamDestroy(stream1);
	return deltaT;
}

__host__ float execute_kernel(int arraySize, int tpb) {    
    const int h_byteSize = arraySize*sizeof(int);    
    
    
    int *h_a, *h_b, *h_c;
    // Create two sets of GPU buffers
    int *d_a, *d_b, *d_c;    // Buffers used in stream1
    
    // Allocate pinned memory, cudaMemcpyAsync requires host memory be page-locked
    cudaHostAlloc((void **)&h_a, h_byteSize, cudaHostAllocDefault);
    cudaHostAlloc((void **)&h_b, h_byteSize, cudaHostAllocDefault);
    cudaHostAlloc((void **)&h_c, h_byteSize, cudaHostAllocDefault);
    
    cudaMalloc((void**) &d_a, h_byteSize);
    cudaMalloc((void**) &d_b, h_byteSize);
    cudaMalloc((void**) &d_c, h_byteSize);
    
    // Fill host arrays with random data
	generate_rand_data(h_a, arraySize);
	generate_rand_data(h_b, arraySize);
	
	// Timers
    cudaEvent_t startT, stopT;
    float deltaT;
    
    startT = get_time();
    
	// Copy data to device
    cudaMemcpy(d_a, h_a, h_byteSize, cudaMemcpyHostToDevice);
    cudaMemcpy(d_b, h_b, h_byteSize, cudaMemcpyHostToDevice);
    
    gpuKernel<<<arraySize/tpb, tpb>>>(d_a, d_b, d_c, arraySize);
	
	cudaMemcpy(h_c, d_c, h_byteSize, cudaMemcpyDeviceToHost);
	
	stopT = get_time();
	cudaEventSynchronize(stopT);
	
	cudaEventElapsedTime(&deltaT, startT, stopT);
	
	
	// Cleanup memory
	cudaFreeHost(h_a);
	cudaFreeHost(h_b);
	cudaFreeHost(h_c);
	cudaFree(d_a);
	cudaFree(d_b);
	cudaFree(d_c);
	cudaEventDestroy(startT);
	cudaEventDestroy(stopT);

	return deltaT;
}


int main(int argc, char **argv) {
    int arraySize = 4096;     // Total number of elements to process.
    int N = 256;              // Number of elements to pass to GPU at one time.
    int tpb = 128;
    
    if(argc >= 2)
    	arraySize = atoi(argv[1]);
	if(argc >= 3)
		N = atoi(argv[2]);
	if(argc >= 4)
		tpb = atoi(argv[3]);
    
    if(arraySize % N !=0 || N%tpb!=0) {
    	printf("Number of total threads is not divisible by number of elements to process in each stream iteration.\n");
    	return 0;
    }

	float delta_concurrent = execute_concurrent_streamed_kernel(arraySize, N, tpb);
	float delta_normal = execute_kernel(arraySize, tpb);

	printf("========================\n");
	printf("Summary\n");
	printf("Total Threads: %d\n", arraySize);
	printf("Number of concurrent kernel instances: %d\n", N);
	printf("Thread Size: %d\n", tpb);
	printf("========================\n");
	printf("Time to copy memory and execute kernel with two streams running concurrently.\n");
	printf("duration: %fms\n",delta_concurrent);
	printf("========================\n");
	printf("Time to copy memory and execute kernel running using a normal kernel execution.\n");
	printf("duration: %fms\n\n\n",delta_normal);
    
}



	.file	"tmpxft_00294e13_00000000-6_assignment.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8get_timev
	.type	_Z8get_timev, @function
_Z8get_timev:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaEventCreate@PLT
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	(%rsp), %rax
	movq	8(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z8get_timev, .-_Z8get_timev
	.globl	_Z18generate_rand_dataPii
	.type	_Z18generate_rand_dataPii, @function
_Z18generate_rand_dataPii:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$20, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L7:
	cmpl	%ebp, %ebx
	jnb	.L10
	call	rand@PLT
	cltd
	idivl	%r13d
	movl	%edx, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L7
.L10:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z18generate_rand_dataPii, .-_Z18generate_rand_dataPii
	.globl	_Z33__device_stub__Z9gpuKernelPiS_S_iPiS_S_i
	.type	_Z33__device_stub__Z9gpuKernelPiS_S_iPiS_S_i, @function
_Z33__device_stub__Z9gpuKernelPiS_S_iPiS_S_i:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9gpuKernelPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L11:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z33__device_stub__Z9gpuKernelPiS_S_iPiS_S_i, .-_Z33__device_stub__Z9gpuKernelPiS_S_iPiS_S_i
	.globl	_Z9gpuKernelPiS_S_i
	.type	_Z9gpuKernelPiS_S_i, @function
_Z9gpuKernelPiS_S_i:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z9gpuKernelPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2057:
	.size	_Z9gpuKernelPiS_S_i, .-_Z9gpuKernelPiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Device will not handle overlaps, so no speedup from streams\n"
	.text
	.globl	_Z34execute_concurrent_streamed_kerneliii
	.type	_Z34execute_concurrent_streamed_kerneliii, @function
_Z34execute_concurrent_streamed_kerneliii:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%edi, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$1224, %rsp
	.cfi_def_cfa_offset 1280
	movq	%fs:40, %rax
	movq	%rax, 1208(%rsp)
	xorl	%eax, %eax
	leaq	60(%rsp), %rdi
	call	cudaGetDevice@PLT
	movl	60(%rsp), %esi
	leaq	176(%rsp), %rdi
	call	cudaGetDeviceProperties_v2@PLT
	cmpl	$0, 560(%rsp)
	jne	.L17
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorps	%xmm0, %xmm0
	jmp	.L16
.L17:
	leaq	64(%rsp), %rdi
	movslq	%ebx, %rbp
	leal	0(,%r15,4), %r13d
	movabsq	$4294967297, %r14
	call	cudaStreamCreate@PLT
	movslq	%r13d, %r13
	leaq	72(%rsp), %rdi
	call	cudaStreamCreate@PLT
	leaq	80(%rsp), %rdi
	xorl	%edx, %edx
	movq	%r13, %rsi
	call	cudaHostAlloc@PLT
	leaq	88(%rsp), %rdi
	xorl	%edx, %edx
	movq	%r13, %rsi
	call	cudaHostAlloc@PLT
	xorl	%edx, %edx
	leaq	96(%rsp), %rdi
	movq	%r13, %rsi
	call	cudaHostAlloc@PLT
	leal	0(,%rbx,4), %eax
	leaq	104(%rsp), %rdi
	cltq
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	112(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	120(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	128(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	136(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	144(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	80(%rsp), %rdi
	movl	%r15d, %esi
	call	_Z18generate_rand_dataPii
	movq	88(%rsp), %rdi
	movl	%r15d, %esi
	call	_Z18generate_rand_dataPii
	call	_Z8get_timev
	movq	%rax, 16(%rsp)
	leal	(%rbx,%rbx), %eax
	movl	%eax, 12(%rsp)
	cltq
	salq	$2, %rax
	movq	%rax, 32(%rsp)
	leaq	0(,%rbp,4), %rax
	xorl	%ebp, %ebp
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movl	%eax, 24(%rsp)
.L19:
	movq	64(%rsp), %r8
	cmpl	%r15d, 24(%rsp)
	jge	.L25
	movq	80(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	$1, %ecx
	movq	104(%rsp), %rdi
	addq	%rbp, %rsi
	call	cudaMemcpyAsync@PLT
	movq	40(%rsp), %rax
	movq	80(%rsp), %rsi
	movl	$1, %ecx
	movq	72(%rsp), %r8
	movq	(%rsp), %rdx
	leaq	0(%rbp,%rax), %r13
	movq	128(%rsp), %rdi
	addq	%r13, %rsi
	call	cudaMemcpyAsync@PLT
	movq	88(%rsp), %rsi
	movq	64(%rsp), %r8
	movl	$1, %ecx
	movq	(%rsp), %rdx
	movq	112(%rsp), %rdi
	addq	%rbp, %rsi
	call	cudaMemcpyAsync@PLT
	movq	88(%rsp), %rsi
	movq	72(%rsp), %r8
	movl	$1, %ecx
	movq	(%rsp), %rdx
	movq	136(%rsp), %rdi
	addq	%r13, %rsi
	call	cudaMemcpyAsync@PLT
	movl	%ebx, %eax
	movq	64(%rsp), %r9
	xorl	%r8d, %r8d
	cltd
	movq	%r14, 168(%rsp)
	movl	172(%rsp), %ecx
	idivl	%r12d
	movq	%r14, 156(%rsp)
	movl	160(%rsp), %esi
	movl	%r12d, 164(%rsp)
	movq	164(%rsp), %rdx
	movl	%eax, 152(%rsp)
	movq	152(%rsp), %rdi
	movl	%eax, 28(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	120(%rsp), %rdx
	movq	112(%rsp), %rsi
	movl	%ebx, %ecx
	movq	104(%rsp), %rdi
	call	_Z33__device_stub__Z9gpuKernelPiS_S_iPiS_S_i
.L20:
	movl	28(%rsp), %eax
	movq	72(%rsp), %r9
	xorl	%r8d, %r8d
	movq	%r14, 168(%rsp)
	movq	%r14, 156(%rsp)
	movl	172(%rsp), %ecx
	movl	%r12d, 164(%rsp)
	movl	160(%rsp), %esi
	movl	%eax, 152(%rsp)
	movq	164(%rsp), %rdx
	movq	152(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movq	144(%rsp), %rdx
	movq	136(%rsp), %rsi
	movl	%ebx, %ecx
	movq	128(%rsp), %rdi
	call	_Z33__device_stub__Z9gpuKernelPiS_S_iPiS_S_i
.L21:
	movq	96(%rsp), %rdi
	movq	64(%rsp), %r8
	movl	$2, %ecx
	movq	(%rsp), %rdx
	movq	120(%rsp), %rsi
	addq	%rbp, %rdi
	call	cudaMemcpyAsync@PLT
	movq	96(%rsp), %rdi
	movq	72(%rsp), %r8
	movl	$2, %ecx
	movq	(%rsp), %rdx
	movq	144(%rsp), %rsi
	addq	%r13, %rdi
	call	cudaMemcpyAsync@PLT
	movq	32(%rsp), %rax
	movl	12(%rsp), %ecx
	addl	%ecx, 24(%rsp)
	addq	%rax, %rbp
	jmp	.L19
.L25:
	movq	%r8, %rdi
	call	cudaStreamSynchronize@PLT
	movq	72(%rsp), %rdi
	call	cudaStreamSynchronize@PLT
	call	_Z8get_timev
	movq	%rax, %rdi
	movq	%rax, %rbx
	call	cudaEventSynchronize@PLT
	movq	16(%rsp), %rsi
	movq	%rbx, %rdx
	leaq	164(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	80(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	88(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	96(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movq	144(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	%rbx, %rdi
	call	cudaEventDestroy@PLT
	movq	64(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movq	72(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movss	164(%rsp), %xmm0
.L16:
	movq	1208(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$1224, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z34execute_concurrent_streamed_kerneliii, .-_Z34execute_concurrent_streamed_kerneliii
	.globl	_Z14execute_kernelii
	.type	_Z14execute_kernelii, @function
_Z14execute_kernelii:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xorl	%edx, %edx
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	leal	0(,%rdi,4), %ebx
	movslq	%ebx, %rbx
	movq	%rbx, %rsi
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaHostAlloc@PLT
	xorl	%edx, %edx
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaHostAlloc@PLT
	xorl	%edx, %edx
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaHostAlloc@PLT
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	%ebp, %esi
	call	_Z18generate_rand_dataPii
	movq	8(%rsp), %rdi
	movl	%ebp, %esi
	call	_Z18generate_rand_dataPii
	call	_Z8get_timev
	movq	(%rsp), %rsi
	movq	24(%rsp), %rdi
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rax, %r13
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi
	movq	%rbx, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebp, %eax
	movl	%r12d, 60(%rsp)
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rcx
	cltd
	xorl	%r8d, %r8d
	idivl	%r12d
	movq	%rcx, 52(%rsp)
	movl	56(%rsp), %esi
	movq	%rcx, 64(%rsp)
	movl	68(%rsp), %ecx
	movq	60(%rsp), %rdx
	movl	%eax, 48(%rsp)
	movq	48(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%ebp, %ecx
	movq	24(%rsp), %rdi
	call	_Z33__device_stub__Z9gpuKernelPiS_S_iPiS_S_i
.L27:
	movq	40(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$2, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	call	_Z8get_timev
	movq	%rax, %rbx
	movq	%rax, %rdi
	call	cudaEventSynchronize@PLT
	movq	%rbx, %rdx
	movq	%r13, %rsi
	leaq	60(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	8(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	16(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r13, %rdi
	call	cudaEventDestroy@PLT
	movq	%rbx, %rdi
	call	cudaEventDestroy@PLT
	movss	60(%rsp), %xmm0
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z14execute_kernelii, .-_Z14execute_kernelii
	.section	.rodata.str1.1
.LC2:
	.string	"Number of total threads is not divisible by number of elements to process in each stream iteration.\n"
.LC3:
	.string	"========================\n"
.LC4:
	.string	"Summary\n"
.LC5:
	.string	"Total Threads: %d\n"
.LC6:
	.string	"Number of concurrent kernel instances: %d\n"
.LC7:
	.string	"Thread Size: %d\n"
.LC8:
	.string	"Time to copy memory and execute kernel with two streams running concurrently.\n"
.LC9:
	.string	"duration: %fms\n"
.LC10:
	.string	"Time to copy memory and execute kernel running using a normal kernel execution.\n"
.LC11:
	.string	"duration: %fms\n\n\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	cmpl	$1, %edi
	jle	.L35
	movl	%edi, %r14d
	movq	8(%rsi), %rdi
	movq	%rsi, %r13
	call	atoi@PLT
	movl	%eax, %r12d
	cmpl	$2, %r14d
	je	.L36
	movq	16(%r13), %rdi
	movl	$128, %ebx
	call	atoi@PLT
	movl	%eax, %ebp
	cmpl	$3, %r14d
	je	.L31
	movq	24(%r13), %rdi
	call	atoi@PLT
	movl	%eax, %ebx
	jmp	.L31
.L35:
	movl	$256, %ebp
	movl	$4096, %r12d
	jmp	.L39
.L36:
	movl	$256, %ebp
.L39:
	movl	$128, %ebx
.L31:
	movl	%r12d, %eax
	cltd
	idivl	%ebp
	testl	%edx, %edx
	jne	.L32
	movl	%ebp, %eax
	cltd
	idivl	%ebx
	testl	%edx, %edx
	je	.L33
.L32:
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L34
.L33:
	movl	%ebx, %edx
	movl	%ebp, %esi
	leaq	.LC3(%rip), %r13
	movl	%r12d, %edi
	call	_Z34execute_concurrent_streamed_kerneliii
	movl	%ebx, %esi
	movl	%r12d, %edi
	movss	%xmm0, 12(%rsp)
	call	_Z14execute_kernelii
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movss	%xmm0, 8(%rsp)
	call	__printf_chk@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%r12d, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC5(%rip), %rsi
	call	__printf_chk@PLT
	movl	%ebp, %edx
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	%ebx, %edx
	leaq	.LC7(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movss	12(%rsp), %xmm2
	leaq	.LC9(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	cvtss2sd	%xmm2, %xmm0
	call	__printf_chk@PLT
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movss	8(%rsp), %xmm1
	leaq	.LC11(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	cvtss2sd	%xmm1, %xmm0
	call	__printf_chk@PLT
.L34:
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z9gpuKernelPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9gpuKernelPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <time.h>
#include <hip/hip_runtime.h>

__host__ hipEvent_t get_time(void) {
	hipEvent_t time;
	hipEventCreate(&time);
	hipEventRecord(time);
	return time;
}

// Pulled from module 6 assignment
__host__ void generate_rand_data(int * host_data_ptr, const int num_elem)
{
	// Generate random values from 0-19
    for(unsigned int i=0; i < num_elem; i++)
    	host_data_ptr[i] = (int) (rand()%20);
}

__global__ void gpuKernel(int *A, int *B, int *C, const int num_elem) {
    int idx = threadIdx.x + blockIdx.x*blockDim.x;
	if(idx < (num_elem)) {
		// Load data from global memory into registers
		int a = A[idx];
		int b = B[idx];
		int c = 0;
		
		// Perform some math on the array values
		c = (a*b) + a + b;
		c = c*c;
		C[idx] = c;
	}
}


__host__ float execute_concurrent_streamed_kernel(int arraySize, int N, int tpb) {    
    const int h_byteSize = arraySize*sizeof(int);
    const int d_byteSize = N*sizeof(int);
    
    
    hipDeviceProp_t prop;
    int whichDevice;
    
    // Following taken from the book "CUDA by Example"
    hipGetDevice(&whichDevice);
    hipGetDeviceProperties(&prop, whichDevice);
    // "A GPU supporting device overlap possesses the capacity to simultaneously
    // execute a CUDA C kernel while performing a copy between device and host memory."
    if(!prop.deviceOverlap) {
        printf("Device will not handle overlaps, so no speedup from streams\n");
        return 0;
    }
    

    hipStream_t stream0, stream1;
    hipStreamCreate(&stream0);
    hipStreamCreate(&stream1);
    
    int *h_a, *h_b, *h_c;
    // Create two sets of GPU buffers
    int *d_a0, *d_b0, *d_c0;    // Buffers used in stream0
    int *d_a1, *d_b1, *d_c1;    // Buffers used in stream1
    
    // Allocate pinned memory, cudaMemcpyAsync requires host memory be page-locked
    hipHostAlloc((void **)&h_a, h_byteSize, hipHostMallocDefault);
    hipHostAlloc((void **)&h_b, h_byteSize, hipHostMallocDefault);
    hipHostAlloc((void **)&h_c, h_byteSize, hipHostMallocDefault);
    
    // Used in stream0
    hipMalloc((void**) &d_a0, d_byteSize);
    hipMalloc((void**) &d_b0, d_byteSize);
    hipMalloc((void**) &d_c0, d_byteSize);
    // Used in stream1
    hipMalloc((void**) &d_a1, d_byteSize);
    hipMalloc((void**) &d_b1, d_byteSize);
    hipMalloc((void**) &d_c1, d_byteSize);
    
    // Fill host arrays with random data
	generate_rand_data(h_a, arraySize);
	generate_rand_data(h_b, arraySize);
	
	// Timers
    hipEvent_t startT, stopT;
    float deltaT;
    
    startT = get_time();
    
    /* =================================================================================
     * We are only copying part of full data each time. Queueing in a ping-pong fashion
     * like shown below optimizes the execution timeline. Trying to queue all stream0
     * operations and then queue all stream1 operations will cause the copy back to host
     * memory in stream0 to block the copy to device for stream1. Now copies can start
     * in stream1 while stream0's kernel is executing.
     * =================================================================================
     */
	for(int i=0; i<arraySize; i+=N*2) {
        // Queue up copy of data for a array in both streams
        hipMemcpyAsync(d_a0, h_a+i,    d_byteSize, hipMemcpyHostToDevice, stream0);
        hipMemcpyAsync(d_a1, h_a+i+N,  d_byteSize, hipMemcpyHostToDevice, stream1);
        // Queue up copy of data for b array in both streams
        hipMemcpyAsync(d_b0, h_b+i,    d_byteSize, hipMemcpyHostToDevice, stream0);
        hipMemcpyAsync(d_b1, h_b+i+N,  d_byteSize, hipMemcpyHostToDevice, stream1);
        // Queue up running of gpu kernel
        gpuKernel<<<N/tpb, tpb, 0, stream0>>>(d_a0, d_b0, d_c0, N);
        gpuKernel<<<N/tpb, tpb, 0, stream1>>>(d_a1, d_b1, d_c1, N);
        // Queue up copy of data from device to pinned memory
        hipMemcpyAsync(h_c+i,      d_c0, d_byteSize, hipMemcpyDeviceToHost, stream0);
        hipMemcpyAsync(h_c+i+N,    d_c1, d_byteSize, hipMemcpyDeviceToHost, stream1);
	    
	}
	
	hipStreamSynchronize(stream0);
	hipStreamSynchronize(stream1);
	
	stopT = get_time();
	hipEventSynchronize(stopT);
	
	hipEventElapsedTime(&deltaT, startT, stopT);
	
	
	// Cleanup memory
	hipHostFree(h_a);
	hipHostFree(h_b);
	hipHostFree(h_c);
	hipFree(d_a0);
	hipFree(d_b0);
	hipFree(d_c0);
	hipFree(d_a1);
	hipFree(d_b1);
	hipFree(d_c1);
	hipEventDestroy(startT);
	hipEventDestroy(stopT);
	
	hipStreamDestroy(stream0);
	hipStreamDestroy(stream1);
	return deltaT;
}

__host__ float execute_kernel(int arraySize, int tpb) {    
    const int h_byteSize = arraySize*sizeof(int);    
    
    
    int *h_a, *h_b, *h_c;
    // Create two sets of GPU buffers
    int *d_a, *d_b, *d_c;    // Buffers used in stream1
    
    // Allocate pinned memory, cudaMemcpyAsync requires host memory be page-locked
    hipHostAlloc((void **)&h_a, h_byteSize, hipHostMallocDefault);
    hipHostAlloc((void **)&h_b, h_byteSize, hipHostMallocDefault);
    hipHostAlloc((void **)&h_c, h_byteSize, hipHostMallocDefault);
    
    hipMalloc((void**) &d_a, h_byteSize);
    hipMalloc((void**) &d_b, h_byteSize);
    hipMalloc((void**) &d_c, h_byteSize);
    
    // Fill host arrays with random data
	generate_rand_data(h_a, arraySize);
	generate_rand_data(h_b, arraySize);
	
	// Timers
    hipEvent_t startT, stopT;
    float deltaT;
    
    startT = get_time();
    
	// Copy data to device
    hipMemcpy(d_a, h_a, h_byteSize, hipMemcpyHostToDevice);
    hipMemcpy(d_b, h_b, h_byteSize, hipMemcpyHostToDevice);
    
    gpuKernel<<<arraySize/tpb, tpb>>>(d_a, d_b, d_c, arraySize);
	
	hipMemcpy(h_c, d_c, h_byteSize, hipMemcpyDeviceToHost);
	
	stopT = get_time();
	hipEventSynchronize(stopT);
	
	hipEventElapsedTime(&deltaT, startT, stopT);
	
	
	// Cleanup memory
	hipHostFree(h_a);
	hipHostFree(h_b);
	hipHostFree(h_c);
	hipFree(d_a);
	hipFree(d_b);
	hipFree(d_c);
	hipEventDestroy(startT);
	hipEventDestroy(stopT);

	return deltaT;
}


int main(int argc, char **argv) {
    int arraySize = 4096;     // Total number of elements to process.
    int N = 256;              // Number of elements to pass to GPU at one time.
    int tpb = 128;
    
    if(argc >= 2)
    	arraySize = atoi(argv[1]);
	if(argc >= 3)
		N = atoi(argv[2]);
	if(argc >= 4)
		tpb = atoi(argv[3]);
    
    if(arraySize % N !=0 || N%tpb!=0) {
    	printf("Number of total threads is not divisible by number of elements to process in each stream iteration.\n");
    	return 0;
    }

	float delta_concurrent = execute_concurrent_streamed_kernel(arraySize, N, tpb);
	float delta_normal = execute_kernel(arraySize, tpb);

	printf("========================\n");
	printf("Summary\n");
	printf("Total Threads: %d\n", arraySize);
	printf("Number of concurrent kernel instances: %d\n", N);
	printf("Thread Size: %d\n", tpb);
	printf("========================\n");
	printf("Time to copy memory and execute kernel with two streams running concurrently.\n");
	printf("duration: %fms\n",delta_concurrent);
	printf("========================\n");
	printf("Time to copy memory and execute kernel running using a normal kernel execution.\n");
	printf("duration: %fms\n\n\n",delta_normal);
    
}



	.text
	.file	"assignment.hip"
	.globl	_Z8get_timev                    # -- Begin function _Z8get_timev
	.type	_Z8get_timev,@function
_Z8get_timev:                           # @_Z8get_timev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	leaq	8(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rbx), %rax
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z8get_timev, .Lfunc_end0-_Z8get_timev
	.cfi_endproc
                                        # -- End function
	.globl	_Z18generate_rand_dataPii       # -- Begin function _Z18generate_rand_dataPii
	.type	_Z18generate_rand_dataPii,@function
_Z18generate_rand_dataPii:              # @_Z18generate_rand_dataPii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	je	.LBB1_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$35, %rcx
	addl	%edx, %ecx
	shll	$2, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB1_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB1_4:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z18generate_rand_dataPii, .Lfunc_end1-_Z18generate_rand_dataPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__gpuKernelPiS_S_i # -- Begin function _Z24__device_stub__gpuKernelPiS_S_i
	.type	_Z24__device_stub__gpuKernelPiS_S_i,@function
_Z24__device_stub__gpuKernelPiS_S_i:    # @_Z24__device_stub__gpuKernelPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9gpuKernelPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z24__device_stub__gpuKernelPiS_S_i, .Lfunc_end2-_Z24__device_stub__gpuKernelPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z34execute_concurrent_streamed_kerneliii # -- Begin function _Z34execute_concurrent_streamed_kerneliii
	.type	_Z34execute_concurrent_streamed_kerneliii,@function
_Z34execute_concurrent_streamed_kerneliii: # @_Z34execute_concurrent_streamed_kerneliii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1624, %rsp                     # imm = 0x658
	.cfi_def_cfa_offset 1680
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, 20(%rsp)                  # 4-byte Spill
	movl	%esi, %ebx
	movl	%edi, %r13d
	leaq	148(%rsp), %r15
	movq	%r15, %rdi
	callq	hipGetDevice
	movl	(%r15), %esi
	leaq	152(%rsp), %r15
	movq	%r15, %rdi
	callq	hipGetDevicePropertiesR0600
	cmpl	$0, 384(%r15)
	je	.LBB3_1
# %bb.2:
	movq	%rbx, 40(%rsp)                  # 8-byte Spill
	leal	(,%rbx,4), %ebx
	leal	(,%r13,4), %ebp
	leaq	8(%rsp), %rdi
	callq	hipStreamCreate
	movq	%rsp, %rdi
	callq	hipStreamCreate
	movslq	%ebp, %r15
	leaq	32(%rsp), %rdi
	movq	%r15, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	leaq	24(%rsp), %rdi
	movq	%r15, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	leaq	96(%rsp), %rdi
	movq	%r15, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	movslq	%ebx, %r15
	leaq	88(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	80(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	72(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	64(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movl	%r13d, %r12d
	testl	%r13d, %r13d
	je	.LBB3_7
# %bb.3:                                # %.lr.ph.preheader.i
	movq	32(%rsp), %rbx
	xorl	%r14d, %r14d
.LBB3_4:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$35, %rcx
	addl	%edx, %ecx
	shll	$2, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r14,4)
	incq	%r14
	cmpq	%r14, %r12
	jne	.LBB3_4
# %bb.5:                                # %_Z18generate_rand_dataPii.exit
	movq	24(%rsp), %rbx
	xorl	%r14d, %r14d
.LBB3_6:                                # %.lr.ph.i57
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$35, %rcx
	addl	%edx, %ecx
	shll	$2, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r14,4)
	incq	%r14
	cmpq	%r14, %r12
	jne	.LBB3_6
.LBB3_7:                                # %_Z18generate_rand_dataPii.exit61
	movq	%r12, 136(%rsp)                 # 8-byte Spill
	leaq	104(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipEventCreate
	movq	(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rbp), %rax
	movq	%rax, 112(%rsp)                 # 8-byte Spill
	testl	%r13d, %r13d
	movq	40(%rsp), %rbp                  # 8-byte Reload
	jle	.LBB3_14
# %bb.8:                                # %.lr.ph
	movslq	%ebp, %rbx
	movl	20(%rsp), %r13d                 # 4-byte Reload
	btsq	$32, %r13
	leal	(,%rbp,2), %eax
	cltq
	movq	%rax, 128(%rsp)                 # 8-byte Spill
	leaq	(,%rax,4), %rax
	movq	%rax, 120(%rsp)                 # 8-byte Spill
	shlq	$2, %rbx
	xorl	%r14d, %r14d
	xorl	%r12d, %r12d
.LBB3_9:                                # =>This Inner Loop Header: Depth=1
	movq	88(%rsp), %rdi
	movq	32(%rsp), %rsi
	addq	%r14, %rsi
	movq	8(%rsp), %r8
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	64(%rsp), %rdi
	movq	32(%rsp), %rsi
	addq	%rbx, %rsi
	addq	%r14, %rsi
	movq	(%rsp), %r8
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	80(%rsp), %rdi
	movq	24(%rsp), %rsi
	addq	%r14, %rsi
	movq	8(%rsp), %r8
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	56(%rsp), %rdi
	movq	24(%rsp), %rsi
	addq	%rbx, %rsi
	addq	%r14, %rsi
	movq	(%rsp), %r8
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movl	%ebp, %eax
	cltd
	idivl	20(%rsp)                        # 4-byte Folded Reload
	movl	%eax, %ebp
	movq	8(%rsp), %r9
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rbp
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_11
# %bb.10:                               #   in Loop: Header=BB3_9 Depth=1
	movq	88(%rsp), %rdi
	movq	80(%rsp), %rsi
	movq	72(%rsp), %rdx
	movq	40(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z24__device_stub__gpuKernelPiS_S_i
.LBB3_11:                               #   in Loop: Header=BB3_9 Depth=1
	movq	(%rsp), %r9
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	40(%rsp), %rbp                  # 8-byte Reload
	jne	.LBB3_13
# %bb.12:                               #   in Loop: Header=BB3_9 Depth=1
	movq	64(%rsp), %rdi
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdx
	movl	%ebp, %ecx
	callq	_Z24__device_stub__gpuKernelPiS_S_i
.LBB3_13:                               #   in Loop: Header=BB3_9 Depth=1
	movq	96(%rsp), %rdi
	addq	%r14, %rdi
	movq	72(%rsp), %rsi
	movq	8(%rsp), %r8
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movq	96(%rsp), %rdi
	addq	%rbx, %rdi
	addq	%r14, %rdi
	movq	48(%rsp), %rsi
	movq	(%rsp), %r8
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpyAsync
	addq	128(%rsp), %r12                 # 8-byte Folded Reload
	addq	120(%rsp), %r14                 # 8-byte Folded Reload
	cmpq	136(%rsp), %r12                 # 8-byte Folded Reload
	jl	.LBB3_9
.LBB3_14:                               # %._crit_edge
	movq	8(%rsp), %rdi
	callq	hipStreamSynchronize
	movq	(%rsp), %rdi
	callq	hipStreamSynchronize
	leaq	104(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rbx), %r14
	movq	%r14, %rdi
	callq	hipEventSynchronize
	leaq	104(%rsp), %rbx
	movq	%rbx, %rdi
	movq	112(%rsp), %r15                 # 8-byte Reload
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	hipEventElapsedTime
	movq	32(%rsp), %rdi
	callq	hipHostFree
	movq	24(%rsp), %rdi
	callq	hipHostFree
	movq	96(%rsp), %rdi
	callq	hipHostFree
	movq	88(%rsp), %rdi
	callq	hipFree
	movq	80(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	%r15, %rdi
	callq	hipEventDestroy
	movq	%r14, %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipStreamDestroy
	movq	(%rsp), %rdi
	callq	hipStreamDestroy
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	jmp	.LBB3_15
.LBB3_1:
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorps	%xmm0, %xmm0
.LBB3_15:
	addq	$1624, %rsp                     # imm = 0x658
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z34execute_concurrent_streamed_kerneliii, .Lfunc_end3-_Z34execute_concurrent_streamed_kerneliii
	.cfi_endproc
                                        # -- End function
	.globl	_Z14execute_kernelii            # -- Begin function _Z14execute_kernelii
	.type	_Z14execute_kernelii,@function
_Z14execute_kernelii:                   # @_Z14execute_kernelii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movl	%edi, %r14d
	leal	(,%r14,4), %eax
	movslq	%eax, %rbx
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	leaq	40(%rsp), %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	hipHostAlloc
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rsp, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%r14d, %r14d
	je	.LBB4_5
# %bb.1:                                # %.lr.ph.preheader.i
	movq	32(%rsp), %r12
	movl	%r14d, %r15d
	xorl	%r13d, %r13d
.LBB4_2:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$35, %rcx
	addl	%edx, %ecx
	shll	$2, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	movl	%eax, (%r12,%r13,4)
	incq	%r13
	cmpq	%r13, %r15
	jne	.LBB4_2
# %bb.3:                                # %_Z18generate_rand_dataPii.exit
	movq	24(%rsp), %r12
	xorl	%r13d, %r13d
.LBB4_4:                                # %.lr.ph.i25
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$35, %rcx
	addl	%edx, %ecx
	shll	$2, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	movl	%eax, (%r12,%r13,4)
	incq	%r13
	cmpq	%r13, %r15
	jne	.LBB4_4
.LBB4_5:                                # %_Z18generate_rand_dataPii.exit29
	leaq	48(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventCreate
	movq	(%r15), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r15), %r15
	movq	16(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%r14d, %eax
	cltd
	idivl	%ebp
                                        # kill: def $eax killed $eax def $rax
	btsq	$32, %rax
	movl	%ebp, %edx
	btsq	$32, %rdx
	movq	%rax, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_7
# %bb.6:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	%r14d, %ecx
	callq	_Z24__device_stub__gpuKernelPiS_S_i
.LBB4_7:
	movq	40(%rsp), %rdi
	movq	(%rsp), %rsi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rbx), %rbx
	movq	%rbx, %rdi
	callq	hipEventSynchronize
	leaq	48(%rsp), %r14
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rbx, %rdx
	callq	hipEventElapsedTime
	movq	32(%rsp), %rdi
	callq	hipHostFree
	movq	24(%rsp), %rdi
	callq	hipHostFree
	movq	40(%rsp), %rdi
	callq	hipHostFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%r15, %rdi
	callq	hipEventDestroy
	movq	%rbx, %rdi
	callq	hipEventDestroy
	movss	(%r14), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z14execute_kernelii, .Lfunc_end4-_Z14execute_kernelii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$128, %ebx
	movl	$4096, %r14d                    # imm = 0x1000
	movl	$256, %ebp                      # imm = 0x100
	cmpl	$2, %edi
	jl	.LBB5_4
# %bb.1:
	movq	%rsi, %r15
	movl	%edi, %r12d
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r14d
	cmpl	$2, %r12d
	je	.LBB5_4
# %bb.2:
	movq	16(%r15), %rdi
	callq	atoi
	movl	%eax, %ebp
	cmpl	$4, %r12d
	jb	.LBB5_4
# %bb.3:
	movq	24(%r15), %rdi
	callq	atoi
	movl	%eax, %ebx
.LBB5_4:                                # %.thread32
	movl	%r14d, %eax
	cltd
	idivl	%ebp
	testl	%edx, %edx
	jne	.LBB5_6
# %bb.5:
	movl	%ebp, %eax
	cltd
	idivl	%ebx
	testl	%edx, %edx
	je	.LBB5_7
.LBB5_6:
	movl	$.Lstr.7, %edi
	callq	puts@PLT
.LBB5_8:
	xorl	%eax, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_7:
	.cfi_def_cfa_offset 64
	movl	%r14d, %edi
	movl	%ebp, %esi
	movl	%ebx, %edx
	callq	_Z34execute_concurrent_streamed_kerneliii
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	movl	%r14d, %edi
	movl	%ebx, %esi
	callq	_Z14execute_kernelii
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$.L.str.4, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.5, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.6, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	xorps	%xmm0, %xmm0
	cvtss2sd	8(%rsp), %xmm0                  # 4-byte Folded Reload
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movl	$.Lstr.6, %edi
	callq	puts@PLT
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$.L.str.10, %edi
	movb	$1, %al
	callq	printf
	jmp	.LBB5_8
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9gpuKernelPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9gpuKernelPiS_S_i,@object     # @_Z9gpuKernelPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z9gpuKernelPiS_S_i
	.p2align	3, 0x0
_Z9gpuKernelPiS_S_i:
	.quad	_Z24__device_stub__gpuKernelPiS_S_i
	.size	_Z9gpuKernelPiS_S_i, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"Total Threads: %d\n"
	.size	.L.str.4, 19

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Number of concurrent kernel instances: %d\n"
	.size	.L.str.5, 43

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Thread Size: %d\n"
	.size	.L.str.6, 17

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"duration: %fms\n"
	.size	.L.str.8, 16

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"duration: %fms\n\n\n"
	.size	.L.str.10, 18

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9gpuKernelPiS_S_i"
	.size	.L__unnamed_1, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Device will not handle overlaps, so no speedup from streams"
	.size	.Lstr, 60

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Summary"
	.size	.Lstr.2, 8

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Time to copy memory and execute kernel with two streams running concurrently."
	.size	.Lstr.4, 78

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"========================"
	.size	.Lstr.5, 25

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"Time to copy memory and execute kernel running using a normal kernel execution."
	.size	.Lstr.6, 80

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"Number of total threads is not divisible by number of elements to process in each stream iteration."
	.size	.Lstr.7, 100

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__gpuKernelPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9gpuKernelPiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9gpuKernelPiS_S_i     ; -- Begin function _Z9gpuKernelPiS_S_i
	.globl	_Z9gpuKernelPiS_S_i
	.p2align	8
	.type	_Z9gpuKernelPiS_S_i,@function
_Z9gpuKernelPiS_S_i:                    ; @_Z9gpuKernelPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v4, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v2, v4, v2, v3
	v_mul_lo_u32 v2, v2, v2
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9gpuKernelPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9gpuKernelPiS_S_i, .Lfunc_end0-_Z9gpuKernelPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 204
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9gpuKernelPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9gpuKernelPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
