#include <iostream>
#include <cmath>
#include <algorithm>
#include <fstream>

#define N       1000
#define nrange  20
#define bkgd    3
#define CL      0.9

__global__ void   kernel(double*, int*, double*);
__device__ double poissonP(double, double);
__device__ double factorial(double n);

__global__ void kernel(double* mu, int* n, double* P) {
  int thId = threadIdx.x;
  int blId = blockIdx.x;
  int atId = threadIdx.x + blockIdx.x * blockDim.x;

  __shared__ double cacheR[nrange];
  __shared__ double cacheP[nrange];
  __shared__ int    cacheI[nrange];

  cacheR[thId] = poissonP(mu[blId], thId)/poissonP(max(0, thId - bkgd), thId);
  cacheP[thId] = poissonP(mu[blId], thId);
  cacheI[thId] = thId;
  __syncthreads();

  if (thId == 0) {
    for (int i = 0; i < nrange; i++) {
      double  rpRValTemp = cacheR[i];
      double  rpPValTemp = cacheP[i];
      int     rpIValTemp = cacheI[i];
      double  maxValTemp = cacheR[i];
      int     maxIdxTemp = i;
      for (int j = i + 1; j < nrange; j++) {
        if (cacheR[j] > maxValTemp) {
          maxValTemp = cacheR[j];
          maxIdxTemp = j;
        }
      }
      cacheR[i] = cacheR[maxIdxTemp];
      cacheP[i] = cacheP[maxIdxTemp];
      cacheI[i] = cacheI[maxIdxTemp];
      cacheR[maxIdxTemp] = rpRValTemp;
      cacheP[maxIdxTemp] = rpPValTemp;
      cacheI[maxIdxTemp] = rpIValTemp;
    }
  }
  __syncthreads();

  n[atId] = cacheI[thId];
  double sumPTemp = 0.;
  for (int i = 0; i < thId; i++) {
    sumPTemp += cacheP[i];
  }
  if (sumPTemp <= CL) {
    P[atId] = 1;
  } else {
    P[atId] = 0;
  }
}

__device__ double poissonP(double mu, double n) {
  return pow(mu + 3., n)*exp(-(mu + 3.))/factorial(n);
}

__device__ double factorial(double n) {
  double fn = 1.;
  if (n == 0) {
    return 1.;
  } else {
    for (int i = 1; i < n + 1; i++) {
      fn *= (double)i;
    }
  }
  return fn;
}

int main() {

  double* mu    = new double[N];
  double* P     = new double[N*nrange];
  int*    n     = new int[N*nrange];
  double* dev_mu;
  double* dev_P;
  int*    dev_n;
  cudaMalloc((void**)&dev_mu,   N*sizeof(double));
  cudaMalloc((void**)&dev_P,    N*nrange*sizeof(double));
  cudaMalloc((void**)&dev_n,    N*nrange*sizeof(int));

  double muMax = 10;
  double muMin = 0;
  double step  = (muMax - muMin)/N;
  for (int i = 0; i < N; i++) {
    mu[i] = muMin + (double)i * step;
  }
  cudaMemcpy(dev_mu, mu, N*sizeof(double), cudaMemcpyHostToDevice);

  kernel<<<N,nrange>>>(dev_mu, dev_n, dev_P);
  cudaMemcpy(P, dev_P, N*nrange*sizeof(int), cudaMemcpyDeviceToHost);
  cudaMemcpy(n, dev_n, N*nrange*sizeof(int), cudaMemcpyDeviceToHost);

  std::ofstream ofs;
  ofs.open ("ulUL.dat", std::ofstream::out | std::ofstream::app);
  for (int i = 0; i < N; i++) {
    ofs << mu[i];
    for (int j = 0; j < nrange; j++) {
      ofs << "," << n[j + i*nrange] << "," << P[j + i * nrange];
    }
    ofs << std::endl;
  }
  ofs.close();

  cudaFree(dev_mu);
  cudaFree(dev_n);
  cudaFree(dev_P);

  return 0;
}

	.file	"tmpxft_00371f76_00000000-6_FeldmanCousinsPoissonUL.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4025:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4025:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8poissonPdd
	.type	_Z8poissonPdd, @function
_Z8poissonPdd:
.LFB4020:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4020:
	.size	_Z8poissonPdd, .-_Z8poissonPdd
	.globl	_Z9factoriald
	.type	_Z9factoriald, @function
_Z9factoriald:
.LFB4021:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4021:
	.size	_Z9factoriald, .-_Z9factoriald
	.globl	_Z29__device_stub__Z6kernelPdPiS_PdPiS_
	.type	_Z29__device_stub__Z6kernelPdPiS_PdPiS_, @function
_Z29__device_stub__Z6kernelPdPiS_PdPiS_:
.LFB4047:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6kernelPdPiS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L6:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4047:
	.size	_Z29__device_stub__Z6kernelPdPiS_PdPiS_, .-_Z29__device_stub__Z6kernelPdPiS_PdPiS_
	.globl	_Z6kernelPdPiS_
	.type	_Z6kernelPdPiS_, @function
_Z6kernelPdPiS_:
.LFB4048:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z6kernelPdPiS_PdPiS_
	.cfi_endproc
.LFE4048:
	.size	_Z6kernelPdPiS_, .-_Z6kernelPdPiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z6kernelPdPiS_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4050:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6kernelPdPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4050:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC3:
	.string	"ulUL.dat"
.LC4:
	.string	","
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4022:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4022
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$8000, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$600, %rsp
	.cfi_def_cfa_offset 656
	movq	%fs:40, %rax
	movq	%rax, 584(%rsp)
	xorl	%eax, %eax
.LEHB0:
	call	_Znam@PLT
	movl	$160000, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movl	$80000, %edi
	movq	%rax, 8(%rsp)
	call	_Znam@PLT
	leaq	24(%rsp), %rdi
	movl	$8000, %esi
	movq	%rax, %r13
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$160000, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$80000, %esi
	call	cudaMalloc@PLT
	movsd	.LC1(%rip), %xmm2
	xorl	%eax, %eax
	xorps	%xmm1, %xmm1
.L15:
	cvtsi2sdl	%eax, %xmm0
	mulsd	%xmm2, %xmm0
	addsd	%xmm1, %xmm0
	movsd	%xmm0, 0(%rbp,%rax,8)
	incq	%rax
	cmpq	$1000, %rax
	jne	.L15
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$8000, %edx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	movl	$1073741829, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$536871037, %edi
	salq	$2, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$3, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	32(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z29__device_stub__Z6kernelPdPiS_PdPiS_
.L16:
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movl	$80000, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rsi
	movl	$80000, %edx
	movq	%r13, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	leaq	72(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE0:
	movq	(%rsp), %rdi
	movl	$17, %edx
	leaq	.LC3(%rip), %rsi
.LEHB1:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	xorl	%ebx, %ebx
.L18:
	movsd	0(%rbp,%rbx,8), %xmm0
	movq	(%rsp), %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	imulq	$80, %rbx, %r15
	movq	8(%rsp), %rax
	xorl	%r12d, %r12d
	imulq	$160, %rbx, %r14
	addq	%r13, %r15
	addq	%rax, %r14
.L17:
	movq	(%rsp), %rdi
	leaq	.LC4(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	(%r15,%r12,4), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	leaq	.LC4(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	(%r14,%r12,8), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	incq	%r12
	cmpq	$20, %r12
	jne	.L17
	movq	(%rsp), %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	incq	%rbx
	cmpq	$1000, %rbx
	jne	.L18
	movq	(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
.LEHE1:
	movq	(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	584(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	jmp	.L26
.L22:
	endbr64
	movq	%rax, %rbx
.L19:
	movq	(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	584(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L26
	movq	%rbx, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L26:
	call	__stack_chk_fail@PLT
.L21:
	addq	$600, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4022:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4022:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4022-.LLSDACSB4022
.LLSDACSB4022:
	.uleb128 .LEHB0-.LFB4022
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4022
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L22-.LFB4022
	.uleb128 0
	.uleb128 .LEHB2-.LFB4022
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE4022:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	1202590843
	.long	1065646817
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <cmath>
#include <algorithm>
#include <fstream>

#define N       1000
#define nrange  20
#define bkgd    3
#define CL      0.9

__global__ void   kernel(double*, int*, double*);
__device__ double poissonP(double, double);
__device__ double factorial(double n);

__global__ void kernel(double* mu, int* n, double* P) {
  int thId = threadIdx.x;
  int blId = blockIdx.x;
  int atId = threadIdx.x + blockIdx.x * blockDim.x;

  __shared__ double cacheR[nrange];
  __shared__ double cacheP[nrange];
  __shared__ int    cacheI[nrange];

  cacheR[thId] = poissonP(mu[blId], thId)/poissonP(max(0, thId - bkgd), thId);
  cacheP[thId] = poissonP(mu[blId], thId);
  cacheI[thId] = thId;
  __syncthreads();

  if (thId == 0) {
    for (int i = 0; i < nrange; i++) {
      double  rpRValTemp = cacheR[i];
      double  rpPValTemp = cacheP[i];
      int     rpIValTemp = cacheI[i];
      double  maxValTemp = cacheR[i];
      int     maxIdxTemp = i;
      for (int j = i + 1; j < nrange; j++) {
        if (cacheR[j] > maxValTemp) {
          maxValTemp = cacheR[j];
          maxIdxTemp = j;
        }
      }
      cacheR[i] = cacheR[maxIdxTemp];
      cacheP[i] = cacheP[maxIdxTemp];
      cacheI[i] = cacheI[maxIdxTemp];
      cacheR[maxIdxTemp] = rpRValTemp;
      cacheP[maxIdxTemp] = rpPValTemp;
      cacheI[maxIdxTemp] = rpIValTemp;
    }
  }
  __syncthreads();

  n[atId] = cacheI[thId];
  double sumPTemp = 0.;
  for (int i = 0; i < thId; i++) {
    sumPTemp += cacheP[i];
  }
  if (sumPTemp <= CL) {
    P[atId] = 1;
  } else {
    P[atId] = 0;
  }
}

__device__ double poissonP(double mu, double n) {
  return pow(mu + 3., n)*exp(-(mu + 3.))/factorial(n);
}

__device__ double factorial(double n) {
  double fn = 1.;
  if (n == 0) {
    return 1.;
  } else {
    for (int i = 1; i < n + 1; i++) {
      fn *= (double)i;
    }
  }
  return fn;
}

int main() {

  double* mu    = new double[N];
  double* P     = new double[N*nrange];
  int*    n     = new int[N*nrange];
  double* dev_mu;
  double* dev_P;
  int*    dev_n;
  hipMalloc((void**)&dev_mu,   N*sizeof(double));
  hipMalloc((void**)&dev_P,    N*nrange*sizeof(double));
  hipMalloc((void**)&dev_n,    N*nrange*sizeof(int));

  double muMax = 10;
  double muMin = 0;
  double step  = (muMax - muMin)/N;
  for (int i = 0; i < N; i++) {
    mu[i] = muMin + (double)i * step;
  }
  hipMemcpy(dev_mu, mu, N*sizeof(double), hipMemcpyHostToDevice);

  kernel<<<N,nrange>>>(dev_mu, dev_n, dev_P);
  hipMemcpy(P, dev_P, N*nrange*sizeof(int), hipMemcpyDeviceToHost);
  hipMemcpy(n, dev_n, N*nrange*sizeof(int), hipMemcpyDeviceToHost);

  std::ofstream ofs;
  ofs.open ("ulUL.dat", std::ofstream::out | std::ofstream::app);
  for (int i = 0; i < N; i++) {
    ofs << mu[i];
    for (int j = 0; j < nrange; j++) {
      ofs << "," << n[j + i*nrange] << "," << P[j + i * nrange];
    }
    ofs << std::endl;
  }
  ofs.close();

  hipFree(dev_mu);
  hipFree(dev_n);
  hipFree(dev_P);

  return 0;
}

	.text
	.file	"FeldmanCousinsPoissonUL.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__kernelPdPiS_ # -- Begin function _Z21__device_stub__kernelPdPiS_
	.type	_Z21__device_stub__kernelPdPiS_,@function
_Z21__device_stub__kernelPdPiS_:        # @_Z21__device_stub__kernelPdPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelPdPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__kernelPdPiS_, .Lfunc_end0-_Z21__device_stub__kernelPdPiS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x3f847ae147ae147b              # double 0.01
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$552, %rsp                      # imm = 0x228
	.cfi_def_cfa_offset 608
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$8000, %edi                     # imm = 0x1F40
	callq	_Znam
	movq	%rax, %rbx
	movl	$160000, %edi                   # imm = 0x27100
	callq	_Znam
	movq	%rax, %r14
	movl	$80000, %edi                    # imm = 0x13880
	callq	_Znam
	movq	%rax, %r15
	leaq	24(%rsp), %rdi
	movl	$8000, %esi                     # imm = 0x1F40
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$160000, %esi                   # imm = 0x27100
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$80000, %esi                    # imm = 0x13880
	callq	hipMalloc
	xorl	%eax, %eax
	movsd	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero
	xorpd	%xmm1, %xmm1
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm2, %xmm2
	cvtsi2sd	%eax, %xmm2
	mulsd	%xmm0, %xmm2
	addsd	%xmm1, %xmm2
	movsd	%xmm2, (%rbx,%rax,8)
	incq	%rax
	cmpq	$1000, %rax                     # imm = 0x3E8
	jne	.LBB1_1
# %bb.2:
	movq	24(%rsp), %rdi
	movl	$8000, %edx                     # imm = 0x1F40
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967316, %rdx               # imm = 0x100000014
	leaq	980(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdx
	callq	_Z21__device_stub__kernelPdPiS_
.LBB1_4:
	movq	16(%rsp), %rsi
	movl	$80000, %edx                    # imm = 0x13880
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	movl	$80000, %edx                    # imm = 0x13880
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	40(%rsp), %r12
	movq	%r12, %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
.Ltmp0:
	movl	$.L.str, %esi
	movq	%r12, %rdi
	movl	$17, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp1:
# %bb.5:                                # %.preheader.preheader
	xorl	%ebp, %ebp
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
.LBB1_6:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_8 Depth 2
	movsd	(%rbx,%rbp,8), %xmm0            # xmm0 = mem[0],zero
.Ltmp2:
	movq	%r12, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp3:
# %bb.7:                                # %_ZNSolsEd.exit.preheader
                                        #   in Loop: Header=BB1_6 Depth=1
	xorl	%ebx, %ebx
.LBB1_8:                                #   Parent Loop BB1_6 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
.Ltmp4:
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%r12, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp5:
# %bb.9:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
                                        #   in Loop: Header=BB1_8 Depth=2
	movl	(%r15,%rbx,4), %esi
.Ltmp6:
	movq	%r12, %rdi
	callq	_ZNSolsEi
.Ltmp7:
# %bb.10:                               #   in Loop: Header=BB1_8 Depth=2
.Ltmp8:
	movq	%rax, %r13
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp9:
# %bb.11:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit35
                                        #   in Loop: Header=BB1_8 Depth=2
	movsd	(%r14,%rbx,8), %xmm0            # xmm0 = mem[0],zero
.Ltmp10:
	movq	%r13, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp11:
# %bb.12:                               # %_ZNSolsEd.exit36
                                        #   in Loop: Header=BB1_8 Depth=2
	incq	%rbx
	cmpq	$20, %rbx
	jne	.LBB1_8
# %bb.13:                               #   in Loop: Header=BB1_6 Depth=1
	movq	40(%rsp), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
.Ltmp13:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp14:
# %bb.14:                               # %.noexc
                                        #   in Loop: Header=BB1_6 Depth=1
.Ltmp15:
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
.Ltmp16:
# %bb.15:                               # %.noexc37
                                        #   in Loop: Header=BB1_6 Depth=1
.Ltmp17:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp18:
# %bb.16:                               # %_ZNSolsEPFRSoS_E.exit
                                        #   in Loop: Header=BB1_6 Depth=1
	incq	%rbp
	addq	$160, %r14
	addq	$80, %r15
	cmpq	$1000, %rbp                     # imm = 0x3E8
	movq	32(%rsp), %rbx                  # 8-byte Reload
	jne	.LBB1_6
# %bb.17:
.Ltmp20:
	leaq	40(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp21:
# %bb.18:
	movq	24(%rsp), %rdi
.Ltmp22:
	callq	hipFree
.Ltmp23:
# %bb.19:
	movq	8(%rsp), %rdi
.Ltmp24:
	callq	hipFree
.Ltmp25:
# %bb.20:
	movq	16(%rsp), %rdi
.Ltmp26:
	callq	hipFree
.Ltmp27:
# %bb.21:
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
	leaq	48(%rsp), %rdi
	movq	%rax, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rcx
	movq	-24(%rax), %rax
	movq	%rcx, 40(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	288(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	xorl	%eax, %eax
	addq	$552, %rsp                      # imm = 0x228
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_24:
	.cfi_def_cfa_offset 608
.Ltmp28:
	jmp	.LBB1_25
.LBB1_22:
.Ltmp19:
	jmp	.LBB1_25
.LBB1_23:
.Ltmp12:
.LBB1_25:
	movq	%rax, %rbx
	leaq	40(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp28-.Lfunc_begin0          #     jumps to .Ltmp28
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp2-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp3-.Ltmp2                  #   Call between .Ltmp2 and .Ltmp3
	.uleb128 .Ltmp19-.Lfunc_begin0          #     jumps to .Ltmp19
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp4-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp11-.Ltmp4                 #   Call between .Ltmp4 and .Ltmp11
	.uleb128 .Ltmp12-.Lfunc_begin0          #     jumps to .Ltmp12
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp13-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp18-.Ltmp13                #   Call between .Ltmp13 and .Ltmp18
	.uleb128 .Ltmp19-.Lfunc_begin0          #     jumps to .Ltmp19
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp20-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp27-.Ltmp20                #   Call between .Ltmp20 and .Ltmp27
	.uleb128 .Ltmp28-.Lfunc_begin0          #     jumps to .Ltmp28
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp27-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Lfunc_end1-.Ltmp27            #   Call between .Ltmp27 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelPdPiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6kernelPdPiS_,@object         # @_Z6kernelPdPiS_
	.section	.rodata,"a",@progbits
	.globl	_Z6kernelPdPiS_
	.p2align	3, 0x0
_Z6kernelPdPiS_:
	.quad	_Z21__device_stub__kernelPdPiS_
	.size	_Z6kernelPdPiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"ulUL.dat"
	.size	.L.str, 9

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	","
	.size	.L.str.1, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6kernelPdPiS_"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__kernelPdPiS_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z6kernelPdPiS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.p2align	2                               ; -- Begin function _Z8poissonPdd
	.type	_Z8poissonPdd,@function
_Z8poissonPdd:                          ; @_Z8poissonPdd
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0x3ff00000
	s_mov_b32 s0, exec_lo
	v_cmpx_neq_f64_e32 0, v[2:3]
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader.i
	v_add_f64 v[6:7], v[2:3], 1.0
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0x3ff00000
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_lt_f64_e32 1.0, v[6:7]
	s_cbranch_execz .LBB0_5
; %bb.2:                                ; %.lr.ph.i.preheader
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0x3ff00000
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v4, v8
	s_mov_b32 s3, 2
	s_mov_b32 s2, 0
	v_mov_b32_e32 v5, v9
.LBB0_3:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[8:9], v[4:5]
	v_cvt_f64_i32_e32 v[8:9], s3
	s_add_i32 s3, s3, 1
	v_cmp_ngt_f64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_3
; %bb.4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_5:                                ; %Flow4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_6:                                ; %_Z9factoriald.exit
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
	v_add_f64 v[6:7], 0x40080000, v[0:1]
	s_mov_b32 s1, 0x3fe55555
	s_mov_b32 s0, 0x55555555
	s_mov_b32 s2, 0x968915a9
	s_mov_b32 s4, 0x4222de17
	s_mov_b32 s3, 0x3fba6564
	s_mov_b32 s5, 0x3fbdee67
	s_mov_b32 s6, 0xfca7ab0c
	s_mov_b32 s8, 0x6a5dcb37
	s_mov_b32 s7, 0x3e928af3
	s_mov_b32 s9, 0x3e5ade15
	s_mov_b32 s10, 0x623fde64
	s_mov_b32 s11, 0x3ec71dee
	s_mov_b32 s12, 0x14761f6e
	s_mov_b32 s13, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_neq_f64_e32 vcc_lo, 1.0, v[6:7]
	v_cndmask_b32_e32 v1, 0x3ff00000, v3, vcc_lo
	v_cndmask_b32_e32 v0, 0, v2, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[0:1]
	v_cndmask_b32_e32 v3, 0x3ff00000, v7, vcc_lo
	v_cndmask_b32_e32 v2, 0, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e64 v[8:9], |v[2:3]|
	v_cmp_gt_f64_e32 vcc_lo, s[0:1], v[8:9]
	v_cndmask_b32_e64 v10, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[8:9], v[8:9], v10
	v_add_f64 v[10:11], v[8:9], 1.0
	v_add_f64 v[16:17], v[8:9], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[12:13], v[10:11]
	v_add_f64 v[18:19], v[10:11], -1.0
	v_add_f64 v[8:9], v[8:9], -v[18:19]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[14:15], v[12:13], v[12:13]
	v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[14:15], v[12:13], v[12:13]
	v_mul_f64 v[14:15], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[20:21], v[10:11], v[14:15]
	v_fma_f64 v[10:11], v[14:15], v[10:11], -v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[14:15], v[8:9], v[10:11]
	v_add_f64 v[10:11], v[20:21], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[16:17], -v[10:11]
	v_add_f64 v[20:21], v[10:11], -v[20:21]
	v_add_f64 v[16:17], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[20:21], -v[8:9]
	v_add_f64 v[10:11], v[16:17], -v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], v[10:11]
	v_add_f64 v[8:9], v[18:19], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[12:13], v[8:9]
	v_add_f64 v[10:11], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[10:11], -v[14:15]
	v_mul_f64 v[14:15], v[10:11], v[10:11]
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[10:11], v[10:11], -v[14:15]
	v_add_f64 v[16:17], v[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], v[16:17], v[12:13]
	v_add_f64 v[16:17], v[14:15], v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[18:19], v[16:17], s[4:5], s[2:3]
	s_mov_b32 s2, 0x3abe935a
	s_mov_b32 s3, 0x3fbe25e4
	v_add_f64 v[14:15], v[16:17], -v[14:15]
	v_mul_f64 v[24:25], v[10:11], v[16:17]
	s_mov_b32 s5, 0x3ff71547
	s_mov_b32 s4, 0x652b82fe
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[2:3]
	s_mov_b32 s2, 0x47e6c9c2
	s_mov_b32 s3, 0x3fc110ef
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], v[16:17], v[10:11], -v[24:25]
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[2:3]
	s_mov_b32 s2, 0xcfa74449
	s_mov_b32 s3, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[2:3]
	s_mov_b32 s2, 0x71bf3c30
	s_mov_b32 s3, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[2:3]
	s_mov_b32 s2, 0x1c7792ce
	s_mov_b32 s3, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[2:3]
	s_mov_b32 s2, 0x924920da
	s_mov_b32 s3, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[2:3]
	s_mov_b32 s2, 0x9999999c
	s_mov_b32 s3, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[2:3]
	s_mov_b32 s3, 0x3c7abc9e
	s_mov_b32 s2, 0x3b39803f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[20:21], v[16:17], v[18:19]
	v_fma_f64 v[14:15], v[16:17], v[18:19], -v[20:21]
	v_fma_f64 v[16:17], v[16:17], v[8:9], v[26:27]
	v_ldexp_f64 v[8:9], v[8:9], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[12:13], v[18:19], v[14:15]
	v_fma_f64 v[12:13], v[12:13], v[10:11], v[16:17]
	v_ldexp_f64 v[10:11], v[10:11], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[20:21], v[14:15]
	v_add_f64 v[20:21], v[18:19], -v[20:21]
	v_add_f64 v[22:23], v[18:19], s[0:1]
	s_mov_b32 s1, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_add_f64 v[20:21], v[22:23], s[0:1]
	s_mov_b32 s0, 0xd5df274d
	s_mov_b32 s1, 0x3c8543b0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[14:15], v[14:15], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[18:19], -v[20:21]
	s_mov_b32 s1, 0x3fe62e42
	s_mov_b32 s0, 0xfefa39ef
	v_add_f64 v[14:15], v[14:15], v[18:19]
	v_add_f64 v[18:19], v[24:25], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[22:23], v[14:15]
	v_add_f64 v[24:25], v[18:19], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[22:23], -v[16:17]
	v_mul_f64 v[22:23], v[18:19], v[16:17]
	v_add_f64 v[12:13], v[12:13], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], v[20:21]
	v_fma_f64 v[20:21], v[18:19], v[16:17], -v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[18:19], v[14:15], v[20:21]
	v_fma_f64 v[12:13], v[12:13], v[16:17], v[14:15]
	v_frexp_exp_i32_f64_e32 v16, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[22:23], v[12:13]
	v_subrev_co_ci_u32_e32 v16, vcc_lo, 0, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[16:17], v16
	v_add_f64 v[18:19], v[14:15], -v[22:23]
	v_add_f64 v[20:21], v[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[22:23], v[16:17], s[0:1]
	v_add_f64 v[12:13], v[12:13], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[20:21], -v[10:11]
	v_fma_f64 v[18:19], v[16:17], s[0:1], -v[22:23]
	s_mov_b32 s1, 0xbfe62e42
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[8:9], v[12:13]
	v_add_f64 v[10:11], v[14:15], -v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[16:17], s[2:3], v[18:19]
	s_mov_b32 s3, 0xbc7abc9e
	v_add_f64 v[8:9], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[22:23], v[12:13]
	v_add_f64 v[14:15], v[20:21], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[10:11], -v[22:23]
	v_add_f64 v[16:17], v[10:11], v[14:15]
	v_add_f64 v[20:21], v[14:15], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], -v[22:23]
	v_add_f64 v[18:19], v[16:17], -v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], -v[20:21]
	v_add_f64 v[24:25], v[16:17], -v[18:19]
	v_add_f64 v[14:15], v[14:15], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[12:13], v[8:9]
	v_add_f64 v[10:11], v[10:11], -v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[14:15], v[10:11]
	v_add_f64 v[14:15], v[18:19], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[18:19], v[10:11]
	v_add_f64 v[18:19], v[18:19], -v[14:15]
	v_add_f64 v[8:9], v[8:9], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[16:17], v[10:11]
	v_add_f64 v[12:13], v[12:13], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[20:21], -v[16:17]
	v_add_f64 v[8:9], v[8:9], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], -v[14:15]
	v_add_f64 v[8:9], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[20:21], v[8:9]
	v_add_f64 v[12:13], v[10:11], -v[20:21]
	v_mul_f64 v[14:15], v[0:1], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	v_fma_f64 v[10:11], v[0:1], v[10:11], -v[14:15]
	v_cmp_class_f64_e64 vcc_lo, v[14:15], 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[0:1], v[8:9], v[10:11]
	v_add_f64 v[10:11], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v13, v11, v15 :: v_dual_cndmask_b32 v12, v10, v14
	v_add_f64 v[10:11], v[10:11], -v[14:15]
	v_mul_f64 v[16:17], v[12:13], s[4:5]
	s_mov_b32 s5, 0xbff71547
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[12:13]|
	v_mul_f64 v[22:23], v[6:7], s[4:5]
	s_mov_b32 s4, 0x7c89e6b0
	s_mov_b32 s5, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_mul_f64 v[10:11], v[0:1], 0.5
	v_rndne_f64_e32 v[16:17], v[16:17]
	v_rndne_f64_e32 v[22:23], v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v9, 0, v9 :: v_dual_cndmask_b32 v8, 0, v8
	v_fma_f64 v[18:19], v[16:17], s[0:1], v[12:13]
	v_cvt_i32_f64_e32 v28, v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[24:25], v[22:23], s[0:1], -v[6:7]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	v_fma_f64 v[18:19], v[16:17], s[2:3], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], v[22:23], s[2:3], v[24:25]
	s_mov_b32 s2, 0x11122322
	s_mov_b32 s3, 0x3f811111
	v_fma_f64 v[20:21], v[18:19], s[8:9], s[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], v[24:25], s[8:9], s[6:7]
	s_mov_b32 s6, 0x555502a1
	s_mov_b32 s7, 0x3fa55555
	s_mov_b32 s8, 0x55555511
	s_mov_b32 s9, 0x3fc55555
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], v[24:25], v[26:27], s[10:11]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], v[24:25], v[26:27], s[4:5]
	s_mov_b32 s4, 11
	s_mov_b32 s5, 0x3fe00000
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], v[24:25], v[26:27], s[12:13]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[26:27], v[24:25], v[26:27], s[0:1]
	v_cmp_nlt_f64_e64 s0, 0x40900000, v[12:13]
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[12:13]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_b32 vcc_lo, s1, s0
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[8:9]
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], v[18:19], v[20:21], 1.0
	v_fma_f64 v[16:17], v[18:19], v[20:21], 1.0
	v_fma_f64 v[18:19], v[24:25], v[26:27], s[2:3]
	v_cmp_neq_f64_e64 s2, v[0:1], |v[0:1]|
	v_cmp_lt_f64_e64 s3, |v[2:3]|, 1.0
	v_cvt_i32_f64_e32 v20, v[22:23]
	v_ldexp_f64 v[14:15], v[16:17], v28
	v_fma_f64 v[16:17], v[24:25], v[18:19], s[6:7]
	v_trunc_f64_e32 v[18:19], v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v15, 0x7ff00000, v15, s0
	v_fma_f64 v[12:13], v[24:25], v[16:17], s[8:9]
	v_trunc_f64_e32 v[16:17], v[10:11]
	v_cndmask_b32_e32 v14, 0, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v15, 0, v15, s1
	v_cmp_eq_f64_e64 s1, v[18:19], v[0:1]
	v_fma_f64 v[8:9], v[14:15], v[8:9], v[14:15]
	v_cmp_class_f64_e64 s0, v[14:15], 0x204
	v_fma_f64 v[12:13], v[24:25], v[12:13], s[4:5]
	v_cmp_neq_f64_e32 vcc_lo, v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e64 v14, v8, v14, s0
	v_cndmask_b32_e64 v8, v9, v15, s0
	v_and_b32_e32 v15, 0x7fffffff, v1
	s_xor_b32 s0, s2, s3
	v_cmp_eq_f64_e64 s2, 0, v[2:3]
	v_cndmask_b32_e64 v18, v0, 0, s0
	v_cmp_class_f64_e64 s3, v[2:3], 0x204
	v_cndmask_b32_e64 v15, v15, 0, s0
	v_cmp_gt_f64_e64 s0, 0, v[2:3]
	v_fma_f64 v[10:11], v[24:25], v[12:13], 1.0
	s_and_b32 vcc_lo, s1, vcc_lo
	v_cndmask_b32_e64 v12, 0, v14, s1
	v_cndmask_b32_e32 v13, 0, v3, vcc_lo
	v_cndmask_b32_e32 v9, 0x3ff00000, v3, vcc_lo
	v_cmp_eq_f64_e64 vcc_lo, |v[2:3]|, 1.0
	v_and_b32_e32 v16, 0x7fffffff, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v17, 0x7fffffff, v8, v9
	v_cndmask_b32_e64 v19, 0x7ff80000, v17, s1
	v_cmp_gt_f64_e64 s1, 0, v[0:1]
	v_cndmask_b32_e64 v12, v14, v12, s0
	v_fma_f64 v[8:9], v[24:25], v[10:11], 1.0
	v_dual_cndmask_b32 v11, v18, v2 :: v_dual_cndmask_b32 v10, v15, v16
	v_cmp_class_f64_e64 vcc_lo, v[0:1], 0x204
	v_cndmask_b32_e64 v15, v17, v19, s0
	s_xor_b32 s0, s1, s2
	s_or_b32 s1, s2, s3
	v_cndmask_b32_e64 v14, 0x7ff00000, 0, s0
	v_cmp_nlt_f64_e64 s0, 0x4090cc00, v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_bfi_b32 v13, 0x7fffffff, v14, v13
	v_ldexp_f64 v[8:9], v[8:9], v20
	v_dual_cndmask_b32 v11, v12, v11 :: v_dual_cndmask_b32 v10, v15, v10
	v_cmp_ngt_f64_e32 vcc_lo, 0xc0900000, v[6:7]
	v_cndmask_b32_e64 v7, v11, 0, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v10, v13, s1
	v_cmp_o_f64_e64 s1, v[2:3], v[0:1]
	v_cndmask_b32_e32 v9, 0x7ff00000, v9, vcc_lo
	s_and_b32 vcc_lo, s0, vcc_lo
	v_cndmask_b32_e32 v0, 0, v8, vcc_lo
	v_cndmask_b32_e64 v1, 0, v9, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v2, 0, v7, s1
	v_cndmask_b32_e64 v3, 0x7ff80000, v6, s1
	v_mul_f64 v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[2:3], null, v[4:5], v[4:5], v[0:1]
	v_div_scale_f64 v[10:11], vcc_lo, v[0:1], v[4:5], v[0:1]
	v_rcp_f64_e32 v[6:7], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[2:3], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_fma_f64 v[8:9], -v[2:3], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_mul_f64 v[8:9], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], -v[2:3], v[8:9], v[10:11]
	v_div_fmas_f64 v[2:3], v[2:3], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[0:1], v[2:3], v[4:5], v[0:1]
	s_setpc_b64 s[30:31]
.Lfunc_end0:
	.size	_Z8poissonPdd, .Lfunc_end0-_Z8poissonPdd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 2660
; NumSgprs: 34
; NumVgprs: 29
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	_Z6kernelPdPiS_         ; -- Begin function _Z6kernelPdPiS_
	.globl	_Z6kernelPdPiS_
	.p2align	8
	.type	_Z6kernelPdPiS_,@function
_Z6kernelPdPiS_:                        ; @_Z6kernelPdPiS_
; %bb.0:
	v_mov_b32_e32 v29, v0
	s_load_b128 s[16:19], s[0:1], 0x0
	s_mov_b32 s20, s15
	s_ashr_i32 s21, s15, 31
	s_load_b64 s[14:15], s[0:1], 0x10
	v_cvt_f64_i32_e32 v[30:31], v29
	s_lshl_b64 s[2:3], s[20:21], 3
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s16, s2
	s_addc_u32 s3, s17, s3
	s_load_b64 s[2:3], s[2:3], 0x0
	s_load_b32 s16, s[0:1], 0x24
	s_getpc_b64 s[22:23]
	s_add_u32 s22, s22, _Z8poissonPdd@rel32@lo+4
	s_addc_u32 s23, s23, _Z8poissonPdd@rel32@hi+12
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v2, v30 :: v_dual_mov_b32 v3, v31
	s_swappc_b64 s[30:31], s[22:23]
	v_dual_mov_b32 v32, v0 :: v_dual_mov_b32 v33, v1
	v_max_i32_e32 v0, 3, v29
	v_dual_mov_b32 v2, v30 :: v_dual_mov_b32 v3, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, -3, v0
	v_cvt_f64_i32_e32 v[0:1], v0
	s_swappc_b64 s[30:31], s[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_div_scale_f64 v[2:3], null, v[0:1], v[0:1], v[32:33]
	v_div_scale_f64 v[8:9], vcc_lo, v[32:33], v[0:1], v[32:33]
	v_lshlrev_b32_e32 v10, 2, v29
	s_mov_b32 s1, 0
	s_mov_b32 s2, exec_lo
	v_rcp_f64_e32 v[4:5], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	v_mul_f64 v[6:7], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], -v[2:3], v[6:7], v[8:9]
	v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[6:7]
	v_cmp_ne_u32_e32 vcc_lo, 0, v29
	s_delay_alu instid0(VALU_DEP_2)
	v_div_fixup_f64 v[0:1], v[2:3], v[0:1], v[32:33]
	v_lshlrev_b32_e32 v2, 3, v29
	ds_store_b32 v10, v29 offset:320
	ds_store_2addr_b64 v2, v[32:33], v[0:1] offset1:20
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_eq_u32_e32 0, v29
	s_cbranch_execz .LBB1_6
; %bb.1:                                ; %.preheader.preheader
	s_movk_i32 s3, 0xa8
.LBB1_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_3 Depth 2
	s_lshl_b32 s4, s1, 3
	s_lshl_b32 s5, s1, 2
	v_mov_b32_e32 v0, s4
	v_mov_b32_e32 v4, s5
	s_cmp_gt_u32 s1, 18
	s_mov_b32 s6, s1
	s_mov_b32 s7, s3
	ds_load_2addr_b64 v[0:3], v0 offset1:20
	ds_load_b32 v11, v4 offset:320
	s_mov_b32 s8, s1
	s_waitcnt lgkmcnt(1)
	v_mov_b32_e32 v9, v3
	v_dual_mov_b32 v7, v3 :: v_dual_mov_b32 v6, v2
	v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v12, v11
	v_mov_b32_e32 v8, v2
	s_cbranch_scc1 .LBB1_5
.LBB1_3:                                ; %.lr.ph
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v4, s7
	s_add_i32 s8, s8, 1
	ds_load_b64 v[4:5], v4
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_f64_e64 s0, v[4:5], v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v9, v9, v5, s0
	v_cndmask_b32_e64 v8, v8, v4, s0
	s_and_b32 s0, s0, exec_lo
	s_cselect_b32 s6, s8, s6
	s_add_i32 s7, s7, 8
	s_cmp_gt_u32 s8, 18
	s_cbranch_scc0 .LBB1_3
; %bb.4:                                ; %._crit_edge.loopexit
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_lshl_b32 s0, s6, 3
	s_lshl_b32 s7, s6, 2
	v_mov_b32_e32 v4, s0
	v_mov_b32_e32 v8, s7
	ds_load_2addr_b64 v[4:7], v4 offset1:20
	ds_load_b32 v12, v8 offset:320
.LBB1_5:                                ; %Flow92
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s7, s4, 0xa0
	s_add_i32 s0, s5, 0x140
	s_lshl_b32 s5, s6, 3
	v_dual_mov_b32 v8, s7 :: v_dual_mov_b32 v9, s4
	s_lshl_b32 s4, s6, 2
	v_dual_mov_b32 v13, s0 :: v_dual_mov_b32 v14, s5
	s_add_i32 s1, s1, 1
	v_mov_b32_e32 v15, s4
	s_add_i32 s3, s3, 8
	s_cmp_eq_u32 s1, 20
	s_waitcnt lgkmcnt(1)
	ds_store_b64 v8, v[6:7]
	ds_store_b64 v9, v[4:5]
	s_waitcnt lgkmcnt(2)
	ds_store_b32 v13, v12
	ds_store_2addr_b64 v14, v[0:1], v[2:3] offset1:20
	ds_store_b32 v15, v11 offset:320
	s_cbranch_scc0 .LBB1_2
.LBB1_6:                                ; %Flow94
	s_or_b32 exec_lo, exec_lo, s2
	s_and_b32 s0, 0xffff, s16
	v_add_nc_u32_e32 v2, 0x140, v10
	v_mad_u64_u32 v[0:1], null, s20, s0, v[29:30]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v6, v2
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0x3ff00000
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	v_add_co_u32 v2, s0, s18, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s19, v3, s0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[2:3], v6, off
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB1_10
; %bb.7:                                ; %.lr.ph68.preheader
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s2, 0
	s_mov_b32 s1, 0
.LBB1_8:                                ; %.lr.ph68
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v4, s2 :: v_dual_add_nc_u32 v29, -1, v29
	s_add_i32 s2, s2, 8
	ds_load_b64 v[4:5], v4
	v_cmp_eq_u32_e32 vcc_lo, 0, v29
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_8
; %bb.9:                                ; %._crit_edge69.loopexit
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s2, 0xcccccccd
	s_mov_b32 s3, 0x3feccccc
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_nge_f64_e32 vcc_lo, s[2:3], v[2:3]
	v_cndmask_b32_e64 v5, 0x3ff00000, 0, vcc_lo
.LBB1_10:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s0
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s14, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s15, v1, vcc_lo
	global_store_b64 v[0:1], v[4:5], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelPdPiS_
		.amdhsa_group_segment_fixed_size 400
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 34
		.amdhsa_next_free_sgpr 33
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z6kernelPdPiS_, .Lfunc_end1-_Z6kernelPdPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 900
; NumSgprs: 35
; NumVgprs: 34
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 400 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 35
; NumVGPRsForWavesPerEU: 34
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 400
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelPdPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     35
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelPdPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     34
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
