#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <math.h>
#include <cuda_runtime.h>
#include <sys/time.h>
#include <time.h>

#define NUM_THREADS 	743511 	// length of calculation
#define BLOCK_SIZE 	256	// number of threads per block used in gpu calc
#define EPS		0.00005 // Epsilon for tolerance of diffs between cpu and gpu calculations
#define INCLUDE_MEMTIME false	// Decides whether to include memory transfers to and from gpu in gpu timing
#define PRINTLINES	0	// Number of lines to print in output during validation

__global__ void calcKernel(float* d_in, float *d_out) {
	const unsigned int lid = threadIdx.x;			// local id inside a block
	const unsigned int gid = blockIdx.x*blockDim.x + lid; 	// global id
	d_out[gid] = pow((d_in[gid] / ( d_in[gid] - 2.3 )),3);	// do computation
}


int timeval_subtract(  struct timeval* result, 
                       struct timeval* t2,
                       struct timeval* t1) {
	unsigned int resolution = 1000000;
	long int diff = (t2->tv_usec + resolution * t2->tv_sec) -
                        (t1->tv_usec + resolution * t1->tv_sec);
	result->tv_sec = diff / resolution;
	result->tv_usec = diff % resolution;
	return (diff<0);
}

unsigned int long gpucalc(float* h_in, float* h_out, unsigned int mem_size, unsigned int num_threads) {
	struct timeval t_start, t_end, t_diff;
	struct timeval t_startmem, t_endmem, t_diffmem;

	// device configuration
	unsigned int block_size   = BLOCK_SIZE;
	unsigned int num_blocks   = ((num_threads + (block_size - 1)) / block_size);
	
	// allocate device memory
	float* d_in;
	float* d_out;
	cudaMalloc((void**)&d_in,  mem_size);
	cudaMalloc((void**)&d_out, mem_size);

	gettimeofday(&t_startmem, NULL);
	// copy host memory to device
	cudaMemcpy(d_in, h_in, mem_size, cudaMemcpyHostToDevice);

	// time and execute the kernel
	gettimeofday(&t_start, NULL);
	calcKernel<<< num_blocks, block_size >>>(d_in, d_out);
	cudaThreadSynchronize();
	gettimeofday(&t_end, NULL);

	// copy result from device to host
	cudaMemcpy(h_out, d_out, sizeof(float)*num_threads, cudaMemcpyDeviceToHost );
	gettimeofday(&t_endmem, NULL);

	// clean up memory
	cudaFree(d_in);	cudaFree(d_out);

	timeval_subtract(&t_diff, &t_end, &t_start);
	timeval_subtract(&t_diffmem, &t_endmem, &t_startmem);

	if (INCLUDE_MEMTIME) {
		return (t_diffmem.tv_sec*1e6+t_diffmem.tv_usec);	// microseconds
	} else {
		return (t_diff.tv_sec*1e6+t_diff.tv_usec); 	// microseconds
	}
}

unsigned long int cpucalc(float* h_in, float* h_out, unsigned int calcsize) {
	struct timeval t_start, t_end, t_diff;

	gettimeofday(&t_start, NULL);	
	for(unsigned int i=0; i<calcsize; i++) {
		h_out[i] = pow((h_in[i] / (h_in[i] - 2.3)),3);
	}
	gettimeofday(&t_end, NULL);

	timeval_subtract(&t_diff, &t_end, &t_start);	
	return  t_diff.tv_sec*1e6+t_diff.tv_usec;	// microseconds
}

int main(int argc, char** argv) {
	unsigned int num_threads = NUM_THREADS;
	unsigned int mem_size    = num_threads*sizeof(float);

	unsigned long int cputime, gputime;

	float        maxdev    = 0;
	unsigned int maxdevidx = 0;

	// allocate host memory
	float* h_in     = (float*) malloc(mem_size);
	float* h_outgpu = (float*) malloc(mem_size);
	float* h_outcpu = (float*) malloc(mem_size);
	
	// initialize the memory
	for(unsigned int i = 0; i < num_threads; i++) {
		h_in[i] = (float)i+1;
	}

	// prepare timing and get the calculations done
	gputime = gpucalc(h_in, h_outgpu, mem_size, num_threads);

	cputime = cpucalc(h_in, h_outcpu, num_threads);


	// print and validate result
	int printevry = 1;
	if (PRINTLINES>0) {
		printevry = (NUM_THREADS / PRINTLINES);		
		printf("cpu\t\tgpu\n");
	}
	for(unsigned int i=0; i<num_threads; i++) {
		if (i % printevry == 1) {printf("%.6f\t%.6f\n", h_outcpu[i], h_outgpu[i]);}
		if (maxdev < abs(h_outcpu[i] - h_outgpu[i])) {
			maxdev = abs(h_outcpu[i]-h_outgpu[i]);
			maxdevidx = i;
		}
	}
	if (maxdev < EPS) {printf("VALID, max deviation: %.6f at calculation no. %d\n", maxdev, maxdevidx);}
	else {printf("INVALID, max deviation: %.6f\t at %d\n", maxdev, maxdevidx);}

	printf("Time for cpu calculation: %d microseconds (%.2f ms)\n",cputime, cputime/1000.0);
	printf("Time for gpu calculation: %d microseconds (%.2f ms)\n",gputime, gputime/1000.0);
	

	// clean up memory
	free(h_in);	free(h_outgpu);	free(h_outcpu);
	
}

	.file	"tmpxft_0039f5f8_00000000-6_ass1.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z16timeval_subtractP7timevalS0_S0_
	.type	_Z16timeval_subtractP7timevalS0_S0_, @function
_Z16timeval_subtractP7timevalS0_S0_:
.LFB2027:
	.cfi_startproc
	endbr64
	imulq	$1000000, (%rsi), %rcx
	addq	8(%rsi), %rcx
	movl	$1000000, %esi
	imulq	$1000000, (%rdx), %rax
	addq	8(%rdx), %rax
	subq	%rax, %rcx
	movq	%rcx, %rax
	shrq	$63, %rcx
	cqto
	idivq	%rsi
	movq	%rax, (%rdi)
	movq	%rcx, %rax
	movq	%rdx, 8(%rdi)
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z16timeval_subtractP7timevalS0_S0_, .-_Z16timeval_subtractP7timevalS0_S0_
	.globl	_Z7cpucalcPfS_j
	.type	_Z7cpucalcPfS_j, @function
_Z7cpucalcPfS_j:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rsi, %r13
	xorl	%esi, %esi
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%edx, %ebx
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %r14
	movq	%r14, %rdi
	call	gettimeofday@PLT
.L4:
	cmpq	%rbx, %rbp
	je	.L11
	cvtss2sd	(%r12,%rbp,4), %xmm0
	movaps	%xmm0, %xmm1
	subsd	.LC1(%rip), %xmm1
	divsd	%xmm1, %xmm0
	movsd	.LC0(%rip), %xmm1
	call	pow@PLT
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 0(%r13,%rbp,4)
	incq	%rbp
	jmp	.L4
.L11:
	leaq	24(%rsp), %rbx
	xorl	%esi, %esi
	movq	%rbx, %rdi
	call	gettimeofday@PLT
	leaq	40(%rsp), %rdi
	movq	%r14, %rdx
	movq	%rbx, %rsi
	call	_Z16timeval_subtractP7timevalS0_S0_
	cvtsi2sdq	40(%rsp), %xmm0
	mulsd	.LC2(%rip), %xmm0
	cvtsi2sdq	48(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movsd	.LC3(%rip), %xmm1
	comisd	%xmm1, %xmm0
	jnb	.L6
	cvttsd2siq	%xmm0, %rax
	jmp	.L7
.L6:
	subsd	%xmm1, %xmm0
	cvttsd2siq	%xmm0, %rax
	btcq	$63, %rax
.L7:
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z7cpucalcPfS_j, .-_Z7cpucalcPfS_j
	.globl	_Z32__device_stub__Z10calcKernelPfS_PfS_
	.type	_Z32__device_stub__Z10calcKernelPfS_PfS_, @function
_Z32__device_stub__Z10calcKernelPfS_PfS_:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10calcKernelPfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L12:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z32__device_stub__Z10calcKernelPfS_PfS_, .-_Z32__device_stub__Z10calcKernelPfS_PfS_
	.globl	_Z10calcKernelPfS_
	.type	_Z10calcKernelPfS_, @function
_Z10calcKernelPfS_:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z10calcKernelPfS_PfS_
	.cfi_endproc
.LFE2056:
	.size	_Z10calcKernelPfS_, .-_Z10calcKernelPfS_
	.globl	_Z7gpucalcPfS_jj
	.type	_Z7gpucalcPfS_jj, @function
_Z7gpucalcPfS_jj:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rbp, %rsi
	movl	%ecx, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	%rbp, %rsi
	leaq	16(%rsp), %rdi
	call	cudaMalloc@PLT
	xorl	%esi, %esi
	leaq	72(%rsp), %rdi
	call	gettimeofday@PLT
	movq	8(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	leaq	24(%rsp), %rbp
	call	cudaMemcpy@PLT
	xorl	%esi, %esi
	movq	%rbp, %rdi
	call	gettimeofday@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	leal	255(%rbx), %eax
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, 96(%rsp)
	shrl	$8, %eax
	movq	%rdx, 88(%rsp)
	movl	%eax, 56(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 60(%rsp)
	movq	56(%rsp), %rdi
	movl	64(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z32__device_stub__Z10calcKernelPfS_PfS_
.L18:
	call	cudaThreadSynchronize@PLT
	leaq	40(%rsp), %r13
	xorl	%esi, %esi
	movq	%r13, %rdi
	call	gettimeofday@PLT
	movq	16(%rsp), %rsi
	movl	%ebx, %edx
	movq	%r12, %rdi
	salq	$2, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	xorl	%esi, %esi
	leaq	88(%rsp), %rdi
	call	gettimeofday@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	leaq	56(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r13, %rsi
	call	_Z16timeval_subtractP7timevalS0_S0_
	cvtsi2sdq	56(%rsp), %xmm0
	mulsd	.LC2(%rip), %xmm0
	cvtsi2sdq	64(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movsd	.LC3(%rip), %xmm1
	comisd	%xmm1, %xmm0
	jnb	.L19
	cvttsd2siq	%xmm0, %rax
	jmp	.L20
.L19:
	subsd	%xmm1, %xmm0
	cvttsd2siq	%xmm0, %rax
	btcq	$63, %rax
.L20:
	movq	104(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$120, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z7gpucalcPfS_jj, .-_Z7gpucalcPfS_jj
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC8:
	.string	"VALID, max deviation: %.6f at calculation no. %d\n"
.LC9:
	.string	"INVALID, max deviation: %.6f\t at %d\n"
.LC11:
	.string	"Time for cpu calculation: %d microseconds (%.2f ms)\n"
.LC12:
	.string	"Time for gpu calculation: %d microseconds (%.2f ms)\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$2974044, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	call	malloc@PLT
	movl	$2974044, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$2974044, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movss	.LC5(%rip), %xmm1
	movq	%rax, %r12
	xorl	%eax, %eax
.L24:
	cvtsi2ssl	%eax, %xmm0
	addss	%xmm1, %xmm0
	movss	%xmm0, 0(%rbp,%rax,4)
	incq	%rax
	cmpq	$743511, %rax
	jne	.L24
	movl	$743511, %ecx
	movl	$2974044, %edx
	movq	%r13, %rsi
	movq	%rbp, %rdi
	call	_Z7gpucalcPfS_jj
	movl	$743511, %edx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	movq	%rax, %rbx
	call	_Z7cpucalcPfS_j
	xorl	%edx, %edx
	xorps	%xmm0, %xmm0
	movss	.LC6(%rip), %xmm2
	movq	%rax, %r14
	xorl	%eax, %eax
.L27:
	movss	(%r12,%rax,4), %xmm1
	subss	0(%r13,%rax,4), %xmm1
	andps	%xmm2, %xmm1
	comiss	%xmm0, %xmm1
	maxss	%xmm0, %xmm1
	cmova	%eax, %edx
	incq	%rax
	movaps	%xmm1, %xmm0
	cmpq	$743511, %rax
	jne	.L27
	cvtss2sd	%xmm1, %xmm0
	movsd	.LC7(%rip), %xmm1
	leaq	.LC8(%rip), %rsi
	comisd	%xmm0, %xmm1
	ja	.L41
	leaq	.LC9(%rip), %rsi
.L41:
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	testq	%r14, %r14
	js	.L31
	cvtsi2sdq	%r14, %xmm0
	jmp	.L32
.L31:
	movq	%r14, %rax
	movq	%r14, %rdx
	shrq	%rax
	andl	$1, %edx
	orq	%rdx, %rax
	cvtsi2sdq	%rax, %xmm0
	addsd	%xmm0, %xmm0
.L32:
	movq	%r14, %rdx
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	divsd	.LC10(%rip), %xmm0
	call	__printf_chk@PLT
	testq	%rbx, %rbx
	js	.L33
	cvtsi2sdq	%rbx, %xmm0
	jmp	.L34
.L33:
	movq	%rbx, %rax
	movq	%rbx, %rdx
	shrq	%rax
	andl	$1, %edx
	orq	%rdx, %rax
	cvtsi2sdq	%rax, %xmm0
	addsd	%xmm0, %xmm0
.L34:
	movq	%rbx, %rdx
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	divsd	.LC10(%rip), %xmm0
	call	__printf_chk@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	popq	%rbx
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC13:
	.string	"_Z10calcKernelPfS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10calcKernelPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1074266112
	.align 8
.LC1:
	.long	1717986918
	.long	1073899110
	.align 8
.LC2:
	.long	0
	.long	1093567616
	.align 8
.LC3:
	.long	0
	.long	1138753536
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC5:
	.long	1065353216
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC6:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8
	.align 8
.LC7:
	.long	-350469331
	.long	1057634018
	.align 8
.LC10:
	.long	0
	.long	1083129856
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <math.h>
#include <hip/hip_runtime.h>
#include <sys/time.h>
#include <time.h>

#define NUM_THREADS 	743511 	// length of calculation
#define BLOCK_SIZE 	256	// number of threads per block used in gpu calc
#define EPS		0.00005 // Epsilon for tolerance of diffs between cpu and gpu calculations
#define INCLUDE_MEMTIME false	// Decides whether to include memory transfers to and from gpu in gpu timing
#define PRINTLINES	0	// Number of lines to print in output during validation

__global__ void calcKernel(float* d_in, float *d_out) {
	const unsigned int lid = threadIdx.x;			// local id inside a block
	const unsigned int gid = blockIdx.x*blockDim.x + lid; 	// global id
	d_out[gid] = pow((d_in[gid] / ( d_in[gid] - 2.3 )),3);	// do computation
}


int timeval_subtract(  struct timeval* result, 
                       struct timeval* t2,
                       struct timeval* t1) {
	unsigned int resolution = 1000000;
	long int diff = (t2->tv_usec + resolution * t2->tv_sec) -
                        (t1->tv_usec + resolution * t1->tv_sec);
	result->tv_sec = diff / resolution;
	result->tv_usec = diff % resolution;
	return (diff<0);
}

unsigned int long gpucalc(float* h_in, float* h_out, unsigned int mem_size, unsigned int num_threads) {
	struct timeval t_start, t_end, t_diff;
	struct timeval t_startmem, t_endmem, t_diffmem;

	// device configuration
	unsigned int block_size   = BLOCK_SIZE;
	unsigned int num_blocks   = ((num_threads + (block_size - 1)) / block_size);
	
	// allocate device memory
	float* d_in;
	float* d_out;
	hipMalloc((void**)&d_in,  mem_size);
	hipMalloc((void**)&d_out, mem_size);

	gettimeofday(&t_startmem, NULL);
	// copy host memory to device
	hipMemcpy(d_in, h_in, mem_size, hipMemcpyHostToDevice);

	// time and execute the kernel
	gettimeofday(&t_start, NULL);
	calcKernel<<< num_blocks, block_size >>>(d_in, d_out);
	hipDeviceSynchronize();
	gettimeofday(&t_end, NULL);

	// copy result from device to host
	hipMemcpy(h_out, d_out, sizeof(float)*num_threads, hipMemcpyDeviceToHost );
	gettimeofday(&t_endmem, NULL);

	// clean up memory
	hipFree(d_in);	hipFree(d_out);

	timeval_subtract(&t_diff, &t_end, &t_start);
	timeval_subtract(&t_diffmem, &t_endmem, &t_startmem);

	if (INCLUDE_MEMTIME) {
		return (t_diffmem.tv_sec*1e6+t_diffmem.tv_usec);	// microseconds
	} else {
		return (t_diff.tv_sec*1e6+t_diff.tv_usec); 	// microseconds
	}
}

unsigned long int cpucalc(float* h_in, float* h_out, unsigned int calcsize) {
	struct timeval t_start, t_end, t_diff;

	gettimeofday(&t_start, NULL);	
	for(unsigned int i=0; i<calcsize; i++) {
		h_out[i] = pow((h_in[i] / (h_in[i] - 2.3)),3);
	}
	gettimeofday(&t_end, NULL);

	timeval_subtract(&t_diff, &t_end, &t_start);	
	return  t_diff.tv_sec*1e6+t_diff.tv_usec;	// microseconds
}

int main(int argc, char** argv) {
	unsigned int num_threads = NUM_THREADS;
	unsigned int mem_size    = num_threads*sizeof(float);

	unsigned long int cputime, gputime;

	float        maxdev    = 0;
	unsigned int maxdevidx = 0;

	// allocate host memory
	float* h_in     = (float*) malloc(mem_size);
	float* h_outgpu = (float*) malloc(mem_size);
	float* h_outcpu = (float*) malloc(mem_size);
	
	// initialize the memory
	for(unsigned int i = 0; i < num_threads; i++) {
		h_in[i] = (float)i+1;
	}

	// prepare timing and get the calculations done
	gputime = gpucalc(h_in, h_outgpu, mem_size, num_threads);

	cputime = cpucalc(h_in, h_outcpu, num_threads);


	// print and validate result
	int printevry = 1;
	if (PRINTLINES>0) {
		printevry = (NUM_THREADS / PRINTLINES);		
		printf("cpu\t\tgpu\n");
	}
	for(unsigned int i=0; i<num_threads; i++) {
		if (i % printevry == 1) {printf("%.6f\t%.6f\n", h_outcpu[i], h_outgpu[i]);}
		if (maxdev < abs(h_outcpu[i] - h_outgpu[i])) {
			maxdev = abs(h_outcpu[i]-h_outgpu[i]);
			maxdevidx = i;
		}
	}
	if (maxdev < EPS) {printf("VALID, max deviation: %.6f at calculation no. %d\n", maxdev, maxdevidx);}
	else {printf("INVALID, max deviation: %.6f\t at %d\n", maxdev, maxdevidx);}

	printf("Time for cpu calculation: %d microseconds (%.2f ms)\n",cputime, cputime/1000.0);
	printf("Time for gpu calculation: %d microseconds (%.2f ms)\n",gputime, gputime/1000.0);
	

	// clean up memory
	free(h_in);	free(h_outgpu);	free(h_outcpu);
	
}

	.text
	.file	"ass1.hip"
	.globl	_Z25__device_stub__calcKernelPfS_ # -- Begin function _Z25__device_stub__calcKernelPfS_
	.type	_Z25__device_stub__calcKernelPfS_,@function
_Z25__device_stub__calcKernelPfS_:      # @_Z25__device_stub__calcKernelPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10calcKernelPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__calcKernelPfS_, .Lfunc_end0-_Z25__device_stub__calcKernelPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z16timeval_subtractP7timevalS0_S0_ # -- Begin function _Z16timeval_subtractP7timevalS0_S0_
	.type	_Z16timeval_subtractP7timevalS0_S0_,@function
_Z16timeval_subtractP7timevalS0_S0_:    # @_Z16timeval_subtractP7timevalS0_S0_
	.cfi_startproc
# %bb.0:
	movq	(%rsi), %rax
	movq	8(%rsi), %rcx
	subq	(%rdx), %rax
	imulq	$1000000, %rax, %rax            # imm = 0xF4240
	subq	8(%rdx), %rcx
	addq	%rax, %rcx
	movabsq	$4835703278458516699, %rdx      # imm = 0x431BDE82D7B634DB
	movq	%rcx, %rax
	imulq	%rdx
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$18, %rdx
	addq	%rax, %rdx
	movq	%rdx, (%rdi)
	imulq	$1000000, %rdx, %rax            # imm = 0xF4240
	movq	%rcx, %rdx
	subq	%rax, %rdx
	movq	%rdx, 8(%rdi)
	shrq	$63, %rcx
	movl	%ecx, %eax
	retq
.Lfunc_end1:
	.size	_Z16timeval_subtractP7timevalS0_S0_, .Lfunc_end1-_Z16timeval_subtractP7timevalS0_S0_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z7gpucalcPfS_jj
.LCPI2_0:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI2_1:
	.quad	0x43e0000000000000              # double 9.2233720368547758E+18
	.text
	.globl	_Z7gpucalcPfS_jj
	.type	_Z7gpucalcPfS_jj,@function
_Z7gpucalcPfS_jj:                       # @_Z7gpucalcPfS_jj
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %r14d
	movq	%rsi, %rbx
	movq	%rdi, %r12
	leal	255(%r14), %r15d
	shrl	$8, %r15d
	movl	%edx, %r13d
	leaq	16(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%rbp), %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	btsq	$32, %r15
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z25__device_stub__calcKernelPfS_
.LBB2_2:
	callq	hipDeviceSynchronize
	leaq	72(%rsp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	8(%rsp), %rsi
	movl	%r14d, %edx
	shlq	$2, %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%r15), %rax
	movq	8(%r15), %rcx
	subq	24(%rsp), %rax
	imulq	$1000000, %rax, %rax            # imm = 0xF4240
	subq	32(%rsp), %rcx
	addq	%rax, %rcx
	movabsq	$4835703278458516699, %rdx      # imm = 0x431BDE82D7B634DB
	movq	%rcx, %rax
	imulq	%rdx
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$18, %rdx
	addq	%rax, %rdx
	imulq	$1000000, %rdx, %rax            # imm = 0xF4240
	subq	%rax, %rcx
	cvtsi2sd	%rdx, %xmm0
	mulsd	.LCPI2_0(%rip), %xmm0
	cvtsi2sd	%rcx, %xmm1
	addsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %rcx
	movq	%rcx, %rdx
	subsd	.LCPI2_1(%rip), %xmm1
	cvttsd2si	%xmm1, %rax
	sarq	$63, %rdx
	andq	%rdx, %rax
	orq	%rcx, %rax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z7gpucalcPfS_jj, .Lfunc_end2-_Z7gpucalcPfS_jj
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z7cpucalcPfS_j
.LCPI3_0:
	.quad	0xc002666666666666              # double -2.2999999999999998
.LCPI3_1:
	.quad	0x4008000000000000              # double 3
.LCPI3_2:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI3_3:
	.quad	0x43e0000000000000              # double 9.2233720368547758E+18
	.text
	.globl	_Z7cpucalcPfS_j
	.type	_Z7cpucalcPfS_j,@function
_Z7cpucalcPfS_j:                        # @_Z7cpucalcPfS_j
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	%rsp, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	testl	%ebp, %ebp
	je	.LBB3_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebp, %r15d
	xorl	%r12d, %r12d
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r12,4), %xmm0
	movaps	%xmm0, %xmm1
	addsd	.LCPI3_0(%rip), %xmm1
	divsd	%xmm1, %xmm0
	movsd	.LCPI3_1(%rip), %xmm1           # xmm1 = mem[0],zero
	callq	pow
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbx,%r12,4)
	incq	%r12
	cmpq	%r12, %r15
	jne	.LBB3_2
.LBB3_3:                                # %._crit_edge
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%rbx), %rax
	movq	8(%rbx), %rcx
	subq	(%rsp), %rax
	imulq	$1000000, %rax, %rax            # imm = 0xF4240
	subq	8(%rsp), %rcx
	addq	%rax, %rcx
	movabsq	$4835703278458516699, %rdx      # imm = 0x431BDE82D7B634DB
	movq	%rcx, %rax
	imulq	%rdx
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$18, %rdx
	addq	%rax, %rdx
	imulq	$1000000, %rdx, %rax            # imm = 0xF4240
	subq	%rax, %rcx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rdx, %xmm0
	mulsd	.LCPI3_2(%rip), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rcx, %xmm1
	addsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %rcx
	movq	%rcx, %rdx
	subsd	.LCPI3_3(%rip), %xmm1
	cvttsd2si	%xmm1, %rax
	sarq	$63, %rdx
	andq	%rdx, %rax
	orq	%rcx, %rax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z7cpucalcPfS_j, .Lfunc_end3-_Z7cpucalcPfS_j
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI4_0:
	.long	0x3f800000                      # float 1
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI4_1:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
.LCPI4_3:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI4_4:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI4_2:
	.quad	0x3f0a36e2eb1c432d              # double 5.0000000000000002E-5
.LCPI4_5:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$2974044, %edi                  # imm = 0x2D615C
	callq	malloc
	movq	%rax, %rbx
	movl	$2974044, %edi                  # imm = 0x2D615C
	callq	malloc
	movq	%rax, %r14
	movl	$2974044, %edi                  # imm = 0x2D615C
	callq	malloc
	movq	%rax, %r15
	xorl	%eax, %eax
	movss	.LCPI4_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, %ecx
	xorps	%xmm1, %xmm1
	cvtsi2ss	%rcx, %xmm1
	addss	%xmm0, %xmm1
	movss	%xmm1, (%rbx,%rax,4)
	incq	%rax
	cmpq	$743511, %rax                   # imm = 0xB5857
	jne	.LBB4_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	$2974044, %edx                  # imm = 0x2D615C
	movl	$743511, %ecx                   # imm = 0xB5857
	callq	_Z7gpucalcPfS_jj
	movq	%rax, %r12
	movq	%rbx, %rdi
	movq	%r15, %rsi
	movl	$743511, %edx                   # imm = 0xB5857
	callq	_Z7cpucalcPfS_j
	movq	%rax, %r13
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
	movaps	.LCPI4_1(%rip), %xmm1           # xmm1 = [NaN,NaN,NaN,NaN]
	xorl	%esi, %esi
.LBB4_3:                                # =>This Inner Loop Header: Depth=1
	movaps	%xmm0, %xmm2
	movss	(%r15,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	subss	(%r14,%rax,4), %xmm0
	andps	%xmm1, %xmm0
	ucomiss	%xmm2, %xmm0
	cmoval	%eax, %esi
	maxss	%xmm2, %xmm0
	incq	%rax
	cmpq	$743511, %rax                   # imm = 0xB5857
	jne	.LBB4_3
# %bb.4:
	cvtss2sd	%xmm0, %xmm0
	movsd	.LCPI4_2(%rip), %xmm1           # xmm1 = mem[0],zero
	ucomisd	%xmm0, %xmm1
	movl	$.L.str.1, %eax
	movl	$.L.str.2, %edi
	cmovaq	%rax, %rdi
	movb	$1, %al
	callq	printf
	movq	%r13, %xmm1
	punpckldq	.LCPI4_3(%rip), %xmm1   # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
	subpd	.LCPI4_4(%rip), %xmm1
	movapd	%xmm1, %xmm0
	unpckhpd	%xmm1, %xmm0                    # xmm0 = xmm0[1],xmm1[1]
	addsd	%xmm1, %xmm0
	divsd	.LCPI4_5(%rip), %xmm0
	movl	$.L.str.3, %edi
	movq	%r13, %rsi
	movb	$1, %al
	callq	printf
	movq	%r12, %xmm1
	punpckldq	.LCPI4_3(%rip), %xmm1   # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
	subpd	.LCPI4_4(%rip), %xmm1
	movapd	%xmm1, %xmm0
	unpckhpd	%xmm1, %xmm0                    # xmm0 = xmm0[1],xmm1[1]
	addsd	%xmm1, %xmm0
	divsd	.LCPI4_5(%rip), %xmm0
	movl	$.L.str.4, %edi
	movq	%r12, %rsi
	movb	$1, %al
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10calcKernelPfS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10calcKernelPfS_,@object      # @_Z10calcKernelPfS_
	.section	.rodata,"a",@progbits
	.globl	_Z10calcKernelPfS_
	.p2align	3, 0x0
_Z10calcKernelPfS_:
	.quad	_Z25__device_stub__calcKernelPfS_
	.size	_Z10calcKernelPfS_, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"VALID, max deviation: %.6f at calculation no. %d\n"
	.size	.L.str.1, 50

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"INVALID, max deviation: %.6f\t at %d\n"
	.size	.L.str.2, 37

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Time for cpu calculation: %d microseconds (%.2f ms)\n"
	.size	.L.str.3, 53

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Time for gpu calculation: %d microseconds (%.2f ms)\n"
	.size	.L.str.4, 53

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10calcKernelPfS_"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__calcKernelPfS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10calcKernelPfS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10calcKernelPfS_      ; -- Begin function _Z10calcKernelPfS_
	.globl	_Z10calcKernelPfS_
	.p2align	8
	.type	_Z10calcKernelPfS_,@function
_Z10calcKernelPfS_:                     ; @_Z10calcKernelPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s6, 0x4222de17
	s_mov_b32 s7, 0x3fbdee67
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_mov_b32_e32 v2, 0
	s_mov_b32 s4, 0x968915a9
	s_mov_b32 s5, 0x3fba6564
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	s_mov_b32 s0, 0x66666666
	s_mov_b32 s1, 0xc0026666
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[2:3], v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[2:3], s[0:1]
	s_mov_b32 s1, 0x3fe55555
	s_mov_b32 s0, 0x55555555
	v_div_scale_f64 v[6:7], null, v[4:5], v[4:5], v[2:3]
	v_div_scale_f64 v[12:13], vcc_lo, v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[8:9], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[10:11], v[12:13], v[8:9]
	v_fma_f64 v[6:7], -v[6:7], v[10:11], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[10:11]
	v_div_fixup_f64 v[2:3], v[6:7], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e64 v[4:5], |v[2:3]|
	v_cmp_gt_f64_e32 vcc_lo, s[0:1], v[4:5]
	v_cndmask_b32_e64 v6, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[4:5], v[4:5], v6
	v_add_f64 v[6:7], v[4:5], 1.0
	v_add_f64 v[12:13], v[4:5], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[8:9], v[6:7]
	v_add_f64 v[14:15], v[6:7], -1.0
	v_add_f64 v[4:5], v[4:5], -v[14:15]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[10:11], v[8:9], v[8:9]
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[10:11], v[8:9], v[8:9]
	v_mul_f64 v[10:11], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[16:17], v[6:7], v[10:11]
	v_fma_f64 v[6:7], v[10:11], v[6:7], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[10:11], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[16:17], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[12:13], -v[6:7]
	v_add_f64 v[16:17], v[6:7], -v[16:17]
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[16:17], -v[4:5]
	v_add_f64 v[6:7], v[12:13], -v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[4:5], v[14:15], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[8:9], v[4:5]
	v_add_f64 v[6:7], v[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[6:7], -v[10:11]
	v_mul_f64 v[10:11], v[6:7], v[6:7]
	v_add_f64 v[4:5], v[4:5], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[6:7], v[6:7], -v[10:11]
	v_add_f64 v[12:13], v[4:5], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[6:7], v[12:13], v[8:9]
	v_add_f64 v[12:13], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[14:15], v[12:13], s[6:7], s[4:5]
	s_mov_b32 s4, 0x3abe935a
	s_mov_b32 s5, 0x3fbe25e4
	v_add_f64 v[10:11], v[12:13], -v[10:11]
	v_mul_f64 v[20:21], v[6:7], v[12:13]
	s_mov_b32 s6, 0x652b82fe
	s_mov_b32 s7, 0x3ff71547
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[4:5]
	s_mov_b32 s4, 0x47e6c9c2
	s_mov_b32 s5, 0x3fc110ef
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[4:5]
	s_mov_b32 s4, 0xcfa74449
	s_mov_b32 s5, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[4:5]
	s_mov_b32 s4, 0x71bf3c30
	s_mov_b32 s5, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[4:5]
	s_mov_b32 s4, 0x1c7792ce
	s_mov_b32 s5, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[4:5]
	s_mov_b32 s4, 0x924920da
	s_mov_b32 s5, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[4:5]
	s_mov_b32 s4, 0x9999999c
	s_mov_b32 s5, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[4:5]
	s_mov_b32 s5, 0x3c7abc9e
	s_mov_b32 s4, 0x3b39803f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[16:17], v[12:13], v[14:15]
	v_fma_f64 v[10:11], v[12:13], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[8:9], v[14:15], v[10:11]
	v_add_f64 v[14:15], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[18:19], v[14:15], s[0:1]
	v_add_f64 v[16:17], v[14:15], -v[16:17]
	s_mov_b32 s1, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[22:23], v[18:19], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	v_fma_f64 v[16:17], v[12:13], v[6:7], -v[20:21]
	s_mov_b32 s0, 0xd5df274d
	s_mov_b32 s1, 0x3c8543b0
	v_add_f64 v[14:15], v[14:15], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], s[0:1]
	v_fma_f64 v[12:13], v[12:13], v[4:5], v[16:17]
	s_mov_b32 s1, 0x3fe62e42
	s_mov_b32 s0, 0xfefa39ef
	v_ldexp_f64 v[4:5], v[4:5], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], v[14:15]
	v_fma_f64 v[8:9], v[8:9], v[6:7], v[12:13]
	v_ldexp_f64 v[6:7], v[6:7], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[18:19], v[10:11]
	v_add_f64 v[14:15], v[20:21], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[18:19], -v[12:13]
	v_mul_f64 v[18:19], v[14:15], v[12:13]
	v_add_f64 v[20:21], v[14:15], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], v[16:17]
	v_fma_f64 v[16:17], v[14:15], v[12:13], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], -v[20:21]
	v_fma_f64 v[10:11], v[14:15], v[10:11], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[8:9], v[12:13], v[10:11]
	v_frexp_exp_i32_f64_e32 v12, v[2:3]
	v_add_f64 v[10:11], v[18:19], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e32 v12, vcc_lo, 0, v12, vcc_lo
	v_cvt_f64_i32_e32 v[12:13], v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[6:7], v[10:11]
	v_add_f64 v[16:17], v[10:11], -v[18:19]
	v_mul_f64 v[18:19], v[12:13], s[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[14:15], -v[6:7]
	v_add_f64 v[8:9], v[8:9], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[12:13], s[0:1], -v[18:19]
	s_mov_b32 s1, 0xbfe62e42
	v_add_f64 v[6:7], v[10:11], -v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], v[8:9]
	v_fma_f64 v[8:9], v[12:13], s[4:5], v[16:17]
	s_mov_b32 s5, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[18:19], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[14:15], v[4:5]
	v_add_f64 v[18:19], v[6:7], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[6:7], v[10:11]
	v_add_f64 v[14:15], v[10:11], -v[14:15]
	v_add_f64 v[8:9], v[8:9], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[12:13], -v[6:7]
	v_add_f64 v[4:5], v[4:5], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[12:13], -v[16:17]
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	v_add_f64 v[14:15], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], -v[20:21]
	v_add_f64 v[6:7], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[14:15], -v[8:9]
	v_add_f64 v[6:7], v[14:15], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], -v[10:11]
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	v_add_f64 v[16:17], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], -v[14:15]
	v_add_f64 v[10:11], v[16:17], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[16:17], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[6:7], -v[16:17]
	v_mul_f64 v[10:11], 0x40080000, v[6:7]
	v_add_f64 v[4:5], v[4:5], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], 0x40080000, v[6:7], -v[10:11]
	v_cmp_class_f64_e64 vcc_lo, v[10:11], 0x204
	v_fma_f64 v[4:5], 0x40080000, v[4:5], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[10:11], v[4:5]
	v_dual_cndmask_b32 v9, v7, v11 :: v_dual_cndmask_b32 v8, v6, v10
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[8:9]|
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	v_mul_f64 v[12:13], v[8:9], s[6:7]
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[12:13], v[12:13]
	v_fma_f64 v[14:15], v[12:13], s[0:1], v[8:9]
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	v_cvt_i32_f64_e32 v18, v[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[14:15], v[12:13], s[4:5], v[14:15]
	s_mov_b32 s4, 0x6a5dcb37
	s_mov_b32 s5, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], s[4:5], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[0:1]
	v_cmp_nlt_f64_e64 s0, 0x40900000, v[8:9]
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[14:15], v[16:17], 1.0
	s_and_b32 vcc_lo, s1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[14:15], v[16:17], 1.0
	v_ldexp_f64 v[10:11], v[12:13], v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, 0x7ff00000, v11, s0
	v_cmp_eq_f64_e64 s0, 0, v[2:3]
	v_cndmask_b32_e64 v7, 0, v6, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v6, 0, v10, vcc_lo
	v_cmp_class_f64_e64 s1, v[2:3], 0x204
	v_fma_f64 v[4:5], v[6:7], v[4:5], v[6:7]
	v_cmp_class_f64_e64 vcc_lo, v[6:7], 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v4, v6, vcc_lo
	v_cndmask_b32_e32 v4, v5, v7, vcc_lo
	v_cndmask_b32_e64 v5, 0x7ff00000, 0, s0
	s_or_b32 vcc_lo, s0, s1
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v2, v2, 0, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfi_b32 v4, 0x7fffffff, v4, v3
	v_bfi_b32 v3, 0x7fffffff, v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v3, v4, v3, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_cvt_f32_f64_e32 v2, v[2:3]
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10calcKernelPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10calcKernelPfS_, .Lfunc_end0-_Z10calcKernelPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2208
; NumSgprs: 18
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10calcKernelPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10calcKernelPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     24
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
