/****************************************************************************************************
 * Tyler Griffith                                                                                   *
 * October 25th, 2018                                                                               *
 * Project 7: Matrix Mult on GPU                                                                    *
 * CSC-4310-01 PROF: R. Shore                                                                       *
 * Desc: Use one thread to compute each element of the solution                                     *
         matrix                                                                                     *
 * To Compile: nvcc p6.cu -o cuda_mult_v1                                                           *
 * To Run: ./cuda_mult_v1 <device #> <tile width> <matrix A file> <matrix B file> <matrix A*B file> *
 ****************************************************************************************************/
 #include <stdio.h>
 #include <stdlib.h>

int getN(char* fileName);
int* readMatrix(char* fileName);
void writeMatrix(int *x, int n, char* fileName);

__global__ 
void MatrixMultKernel(int *a, int *b, int *ab, int size){
        int row = blockIdx.y * blockDim.y + threadIdx.y;
        int col = blockIdx.x * blockDim.x + threadIdx.x;
        int prod = 0;
        if(col < size && row < size){
                for(int i=0; i<size; i++){
                        prod += a[row*size+i] * b[i*size+col];
                }
                ab[row*size+col] = prod;
        }
}

 int main(int argc, char *argv[]){
   //reading in the matrix
   int n;

   //make sure correct syntax is used
   if(argc != 6){
      printf("Error! You do not have 5 elements to your command!\n");
      printf("To multiply 2 matricies please use the following syntax:\n");
      printf("./cuda_mult_v1 <device #> <tile width> <matrix A file> <matrix B file> <matrix A*B file>\n");
      exit(1);
   }

   //variable declaration
   long dNum = strtol(argv[1], NULL, 10);
   int deviceNum = int(dNum);
   long width = strtol(argv[2], NULL, 10);
   const int tileWidth = (int)width;
   int *matrixA, *matrixB, *matrixC, *d_a, *d_b, *d_c;

   //set device
   cudaSetDevice(deviceNum);
   
   //get n
   n = getN(argv[3]);

   //file I/O
   matrixA = readMatrix(argv[3]);
   matrixB = readMatrix(argv[4]);

   //allocate and initialize result
   matrixC = new int[n*n];
   for (int i = 0; i < n*n; ++i) {
      matrixC[i] = 0;
   }

   //cuda timing
   cudaEvent_t start, stop;
   cudaEventCreate(&start);
   cudaEventCreate(&stop);

   int size = n*n*sizeof(int);
   //allocate cuda memory and copy to global memory
   cudaMalloc((void **)&d_a, size);
   cudaMemcpy(d_a, matrixA, size, cudaMemcpyHostToDevice);
   cudaMalloc((void **)&d_b, size);
   cudaMemcpy(d_b, matrixB, size, cudaMemcpyHostToDevice);
   
   //allocate memory for result
   cudaMalloc((void **)&d_c, size);
   cudaMemset(d_c, 0, size);

   dim3 dimGrid(tileWidth, tileWidth);
   dim3 dimBlock(tileWidth>>1, tileWidth>>1);


   //start cuda timing
   cudaEventRecord(start);
   //kernel call
   MatrixMultKernel<<<dimGrid, dimBlock>>>(d_a, d_b, d_c, n);
   //end cuda timing
   cudaEventRecord(stop);

   //copy answer back to CPU
   cudaMemcpy(matrixC, d_c, n*n*sizeof(int), cudaMemcpyDeviceToHost);
   
   //stop timing
   cudaEventSynchronize(stop);
   float ms = 0;
   cudaEventElapsedTime(&ms, start, stop);
   //check for error
   cudaError_t error = cudaGetLastError();
   if(error != cudaSuccess){
      //print the CUDA error message and exit
      printf("CUDA error: %s\n", cudaGetErrorString(error));
      exit(-1);
   }

   //print timing
   printf("Computation completed in %fms", ms);
   writeMatrix(matrixC, n, argv[5]);

   cudaFree(d_a);
   cudaFree(d_b);
   cudaFree(d_c);
   
   return 0;
}

int getN(char* fileName){
    int n;
    FILE *inFile;
    inFile = fopen(fileName, "r");

   fscanf(inFile, "%d", &n);
   fclose(inFile);
   return n;
}

int* readMatrix(char* fileName){
   int n;
   FILE *inFile;
   inFile = fopen(fileName, "r");

   fscanf(inFile, "%d", &n);

   //allocate memory
   int *x = (int*)malloc(n*n*sizeof(int));

   //read in matrix
   for(int row=0; row<n; row++){
      for(int col=0; col<n; col++){
         fscanf(inFile, "%d", &x[row*n+col]);
      }
   }
   fclose(inFile);
   return x;
}

void writeMatrix(int *x, int n, char* fileName){
   FILE *outFile;
   outFile = fopen(fileName, "w");
   for(int row=0; row<n; row++){
      for(int col=0; col<n; col++)
         fprintf(outFile, "%d ", x[row*n+col]);
      fprintf(outFile, "\n");
   }
   fclose(outFile);
}
	.file	"tmpxft_003155fa_00000000-6_p7.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"r"
.LC1:
	.string	"%d"
	.text
	.globl	_Z4getNPc
	.type	_Z4getNPc, @function
_Z4getNPc:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	.LC0(%rip), %rsi
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	leaq	4(%rsp), %rdx
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movq	%rbx, %rdi
	call	fclose@PLT
	movl	4(%rsp), %eax
	movq	8(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z4getNPc, .-_Z4getNPc
	.globl	_Z10readMatrixPc
	.type	_Z10readMatrixPc, @function
_Z10readMatrixPc:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC0(%rip), %rsi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	leaq	.LC1(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	leaq	4(%rsp), %rdx
	movq	%r12, %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movl	4(%rsp), %edi
	imull	%edi, %edi
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movq	%rax, %rbp
.L7:
	cmpl	%r13d, 4(%rsp)
	jle	.L13
	xorl	%r14d, %r14d
.L9:
	movl	4(%rsp), %eax
	cmpl	%r14d, %eax
	jle	.L14
	imull	%r13d, %eax
	movq	%r12, %rsi
	movq	%rbx, %rdi
	addl	%r14d, %eax
	incl	%r14d
	cltq
	leaq	0(%rbp,%rax,4), %rdx
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	jmp	.L9
.L14:
	incl	%r13d
	jmp	.L7
.L13:
	movq	%rbx, %rdi
	call	fclose@PLT
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	movq	%rbp, %rax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z10readMatrixPc, .-_Z10readMatrixPc
	.section	.rodata.str1.1
.LC2:
	.string	"w"
.LC3:
	.string	"%d "
.LC4:
	.string	"\n"
	.text
	.globl	_Z11writeMatrixPiiPc
	.type	_Z11writeMatrixPiiPc, @function
_Z11writeMatrixPiiPc:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movslq	%esi, %r13
	leaq	.LC2(%rip), %rsi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	0(,%r13,4), %r14
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r13, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	movq	%rdx, %rdi
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	call	fopen@PLT
	movq	%rax, 8(%rsp)
.L16:
	cmpl	%ebp, %r12d
	jge	.L21
	xorl	%r15d, %r15d
.L17:
	movl	(%rbx,%r15,4), %ecx
	movq	8(%rsp), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rdx
	incq	%r15
	call	__fprintf_chk@PLT
	cmpq	%r13, %r15
	jne	.L17
	movq	8(%rsp), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	incl	%r12d
	leaq	.LC4(%rip), %rdx
	addq	%r14, %rbx
	call	__fprintf_chk@PLT
	jmp	.L16
.L21:
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	fclose@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z11writeMatrixPiiPc, .-_Z11writeMatrixPiiPc
	.globl	_Z41__device_stub__Z16MatrixMultKernelPiS_S_iPiS_S_i
	.type	_Z41__device_stub__Z16MatrixMultKernelPiS_S_iPiS_S_i, @function
_Z41__device_stub__Z16MatrixMultKernelPiS_S_iPiS_S_i:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16MatrixMultKernelPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L22:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z41__device_stub__Z16MatrixMultKernelPiS_S_iPiS_S_i, .-_Z41__device_stub__Z16MatrixMultKernelPiS_S_iPiS_S_i
	.globl	_Z16MatrixMultKernelPiS_S_i
	.type	_Z16MatrixMultKernelPiS_S_i, @function
_Z16MatrixMultKernelPiS_S_i:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z16MatrixMultKernelPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2056:
	.size	_Z16MatrixMultKernelPiS_S_i, .-_Z16MatrixMultKernelPiS_S_i
	.section	.rodata.str1.1
.LC5:
	.string	"Error! You do not have 5 elements to your command!\n"
.LC6:
	.string	"To multiply 2 matricies please use the following syntax:\n"
.LC7:
	.string	"./cuda_mult_v1 <device #> <tile width> <matrix A file> <matrix B file> <matrix A*B file>\n"
.LC9:
	.string	"CUDA error: %s\n"
.LC10:
	.string	"Computation completed in %fms"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	cmpl	$6, %edi
	je	.L28
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$2, %edi
	leaq	.LC7(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	jmp	.L35
.L28:
	movq	8(%rsi), %rdi
	movq	%rsi, %rbx
	movl	$10, %edx
	xorl	%esi, %esi
	call	__isoc23_strtol@PLT
	movq	16(%rbx), %rdi
	movl	$10, %edx
	xorl	%esi, %esi
	movq	%rax, %r12
	call	__isoc23_strtol@PLT
	movl	%r12d, %edi
	movq	%rax, %rbp
	call	cudaSetDevice@PLT
	movq	24(%rbx), %rdi
	call	_Z4getNPc
	movq	24(%rbx), %rdi
	movl	%eax, %r12d
	call	_Z10readMatrixPc
	movl	%r12d, %r14d
	movq	32(%rbx), %rdi
	imull	%r12d, %r14d
	movq	%rax, %r15
	call	_Z10readMatrixPc
	movq	%rax, 8(%rsp)
	movslq	%r14d, %rax
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	_Znam@PLT
	movq	%rax, %r13
	xorl	%eax, %eax
.L29:
	cmpl	%eax, %r14d
	jle	.L36
	xorl	%edx, %edx
	movl	%edx, 0(%r13,%rax,4)
	incq	%rax
	jmp	.L29
.L36:
	leaq	48(%rsp), %rdi
	sall	$2, %r14d
	call	cudaEventCreate@PLT
	movslq	%r14d, %r14
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	24(%rsp), %rdi
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movq	%r14, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	32(%rsp), %rdi
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi
	movq	%r14, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	40(%rsp), %rdi
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	movq	40(%rsp), %rdi
	movq	%r14, %rdx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	movl	%ebp, 64(%rsp)
	movl	%ebp, 68(%rsp)
	sarl	%ebp
	movl	$1, 72(%rsp)
	movl	%ebp, 76(%rsp)
	movl	%ebp, 80(%rsp)
	movl	$1, 84(%rsp)
	call	cudaEventRecord@PLT
	movl	84(%rsp), %ecx
	movl	72(%rsp), %esi
	xorl	%r9d, %r9d
	movq	76(%rsp), %rdx
	movq	64(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%r12d, %ecx
	movq	24(%rsp), %rdi
	call	_Z41__device_stub__Z16MatrixMultKernelPiS_S_iPiS_S_i
.L31:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	%r13, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	20(%rsp), %rdi
	movl	$0x00000000, 20(%rsp)
	call	cudaEventElapsedTime@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L32
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	leaq	.LC9(%rip), %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	orl	$-1, %edi
.L35:
	call	exit@PLT
.L32:
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	20(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	40(%rbx), %rdx
	movl	%r12d, %esi
	movq	%r13, %rdi
	call	_Z11writeMatrixPiiPc
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z16MatrixMultKernelPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z16MatrixMultKernelPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/****************************************************************************************************
 * Tyler Griffith                                                                                   *
 * October 25th, 2018                                                                               *
 * Project 7: Matrix Mult on GPU                                                                    *
 * CSC-4310-01 PROF: R. Shore                                                                       *
 * Desc: Use one thread to compute each element of the solution                                     *
         matrix                                                                                     *
 * To Compile: nvcc p6.cu -o cuda_mult_v1                                                           *
 * To Run: ./cuda_mult_v1 <device #> <tile width> <matrix A file> <matrix B file> <matrix A*B file> *
 ****************************************************************************************************/
 
#include <hip/hip_runtime.h>
#include <stdio.h>
 #include <stdlib.h>

int getN(char* fileName);
int* readMatrix(char* fileName);
void writeMatrix(int *x, int n, char* fileName);

__global__ 
void MatrixMultKernel(int *a, int *b, int *ab, int size){
        int row = blockIdx.y * blockDim.y + threadIdx.y;
        int col = blockIdx.x * blockDim.x + threadIdx.x;
        int prod = 0;
        if(col < size && row < size){
                for(int i=0; i<size; i++){
                        prod += a[row*size+i] * b[i*size+col];
                }
                ab[row*size+col] = prod;
        }
}

 int main(int argc, char *argv[]){
   //reading in the matrix
   int n;

   //make sure correct syntax is used
   if(argc != 6){
      printf("Error! You do not have 5 elements to your command!\n");
      printf("To multiply 2 matricies please use the following syntax:\n");
      printf("./cuda_mult_v1 <device #> <tile width> <matrix A file> <matrix B file> <matrix A*B file>\n");
      exit(1);
   }

   //variable declaration
   long dNum = strtol(argv[1], NULL, 10);
   int deviceNum = int(dNum);
   long width = strtol(argv[2], NULL, 10);
   const int tileWidth = (int)width;
   int *matrixA, *matrixB, *matrixC, *d_a, *d_b, *d_c;

   //set device
   hipSetDevice(deviceNum);
   
   //get n
   n = getN(argv[3]);

   //file I/O
   matrixA = readMatrix(argv[3]);
   matrixB = readMatrix(argv[4]);

   //allocate and initialize result
   matrixC = new int[n*n];
   for (int i = 0; i < n*n; ++i) {
      matrixC[i] = 0;
   }

   //cuda timing
   hipEvent_t start, stop;
   hipEventCreate(&start);
   hipEventCreate(&stop);

   int size = n*n*sizeof(int);
   //allocate cuda memory and copy to global memory
   hipMalloc((void **)&d_a, size);
   hipMemcpy(d_a, matrixA, size, hipMemcpyHostToDevice);
   hipMalloc((void **)&d_b, size);
   hipMemcpy(d_b, matrixB, size, hipMemcpyHostToDevice);
   
   //allocate memory for result
   hipMalloc((void **)&d_c, size);
   hipMemset(d_c, 0, size);

   dim3 dimGrid(tileWidth, tileWidth);
   dim3 dimBlock(tileWidth>>1, tileWidth>>1);


   //start cuda timing
   hipEventRecord(start);
   //kernel call
   MatrixMultKernel<<<dimGrid, dimBlock>>>(d_a, d_b, d_c, n);
   //end cuda timing
   hipEventRecord(stop);

   //copy answer back to CPU
   hipMemcpy(matrixC, d_c, n*n*sizeof(int), hipMemcpyDeviceToHost);
   
   //stop timing
   hipEventSynchronize(stop);
   float ms = 0;
   hipEventElapsedTime(&ms, start, stop);
   //check for error
   hipError_t error = hipGetLastError();
   if(error != hipSuccess){
      //print the CUDA error message and exit
      printf("CUDA error: %s\n", hipGetErrorString(error));
      exit(-1);
   }

   //print timing
   printf("Computation completed in %fms", ms);
   writeMatrix(matrixC, n, argv[5]);

   hipFree(d_a);
   hipFree(d_b);
   hipFree(d_c);
   
   return 0;
}

int getN(char* fileName){
    int n;
    FILE *inFile;
    inFile = fopen(fileName, "r");

   fscanf(inFile, "%d", &n);
   fclose(inFile);
   return n;
}

int* readMatrix(char* fileName){
   int n;
   FILE *inFile;
   inFile = fopen(fileName, "r");

   fscanf(inFile, "%d", &n);

   //allocate memory
   int *x = (int*)malloc(n*n*sizeof(int));

   //read in matrix
   for(int row=0; row<n; row++){
      for(int col=0; col<n; col++){
         fscanf(inFile, "%d", &x[row*n+col]);
      }
   }
   fclose(inFile);
   return x;
}

void writeMatrix(int *x, int n, char* fileName){
   FILE *outFile;
   outFile = fopen(fileName, "w");
   for(int row=0; row<n; row++){
      for(int col=0; col<n; col++)
         fprintf(outFile, "%d ", x[row*n+col]);
      fprintf(outFile, "\n");
   }
   fclose(outFile);
}
	.text
	.file	"p7.hip"
	.globl	_Z31__device_stub__MatrixMultKernelPiS_S_i # -- Begin function _Z31__device_stub__MatrixMultKernelPiS_S_i
	.type	_Z31__device_stub__MatrixMultKernelPiS_S_i,@function
_Z31__device_stub__MatrixMultKernelPiS_S_i: # @_Z31__device_stub__MatrixMultKernelPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16MatrixMultKernelPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__MatrixMultKernelPiS_S_i, .Lfunc_end0-_Z31__device_stub__MatrixMultKernelPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$6, %edi
	jne	.LBB1_7
# %bb.1:
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	xorl	%esi, %esi
	movl	$10, %edx
	callq	__isoc23_strtol
	movq	%rax, %r14
	movq	16(%rbx), %rdi
	xorl	%esi, %esi
	movl	$10, %edx
	callq	__isoc23_strtol
	movq	%rax, %r12
	movl	%r14d, %edi
	callq	hipSetDevice
	movq	24(%rbx), %rdi
	callq	_Z4getNPc
	movl	%eax, %ebp
	movq	24(%rbx), %rdi
	callq	_Z10readMatrixPc
	movq	%rax, %r14
	movq	32(%rbx), %rdi
	callq	_Z10readMatrixPc
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movl	%ebp, %r13d
	imull	%r13d, %r13d
	leaq	(,%r13,4), %rdi
	movq	%rdi, 56(%rsp)                  # 8-byte Spill
	callq	_Znam
	movq	%rax, %r15
	movl	%ebp, 16(%rsp)                  # 4-byte Spill
	testl	%ebp, %ebp
	je	.LBB1_3
# %bb.2:                                # %.lr.ph.preheader
	cmpq	$1, %r13
	movq	%r13, %rdx
	adcq	$0, %rdx
	shlq	$2, %rdx
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB1_3:                                # %._crit_edge
	movq	%r15, 64(%rsp)                  # 8-byte Spill
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	shlq	$34, %r13
	sarq	$32, %r13
	leaq	40(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	%r14, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %r14
	movq	%r14, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	(%r14), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %r14
	movq	%r14, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	(%r14), %rdi
	xorl	%esi, %esi
	movq	%r13, %rdx
	callq	hipMemset
	movl	%r12d, %eax
	movq	%r12, %r14
	shlq	$32, %r14
	orq	%rax, %r14
	sarl	%r12d
	movq	%r12, %r15
	shlq	$32, %r15
	orq	%r12, %r15
	leaq	24(%rsp), %rax
	movq	(%rax), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movl	16(%rsp), %ebp                  # 4-byte Reload
	jne	.LBB1_5
# %bb.4:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	%ebp, %ecx
	callq	_Z31__device_stub__MatrixMultKernelPiS_S_i
.LBB1_5:
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rsi
	movq	64(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rdi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	20(%rsp), %rdi
	movl	$0, (%rdi)
	movq	24(%rsp), %rsi
	movq	(%rsp), %rdx
	callq	hipEventElapsedTime
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.6:
	cvtss2sd	20(%rsp), %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	movq	40(%rbx), %rdx
	movq	%r14, %rdi
	movl	%ebp, %esi
	callq	_Z11writeMatrixPiiPc
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_7:
	.cfi_def_cfa_offset 128
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$1, %edi
	callq	exit
.LBB1_8:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$-1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z4getNPc                       # -- Begin function _Z4getNPc
	.type	_Z4getNPc,@function
_Z4getNPc:                              # @_Z4getNPc
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	$.L.str.5, %esi
	callq	fopen
	movq	%rax, %rbx
	leaq	4(%rsp), %r14
	movl	$.L.str.6, %esi
	movq	%rax, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movq	%rbx, %rdi
	callq	fclose
	movl	(%r14), %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z4getNPc, .Lfunc_end2-_Z4getNPc
	.cfi_endproc
                                        # -- End function
	.globl	_Z10readMatrixPc                # -- Begin function _Z10readMatrixPc
	.type	_Z10readMatrixPc,@function
_Z10readMatrixPc:                       # @_Z10readMatrixPc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.L.str.5, %esi
	callq	fopen
	movq	%rax, %rbx
	leaq	12(%rsp), %r14
	movl	$.L.str.6, %esi
	movq	%rax, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	(%r14), %ebp
	movl	%ebp, %edi
	imull	%edi, %edi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, %r14
	testl	%ebp, %ebp
	jle	.LBB3_6
# %bb.1:                                # %.preheader.preheader
	xorl	%r15d, %r15d
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	testl	%ebp, %ebp
	jle	.LBB3_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB3_2 Depth=1
	xorl	%r12d, %r12d
.LBB3_4:                                # %.lr.ph
                                        #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	%r15d, %ebp
	movslq	%ebp, %rax
	addq	%r12, %rax
	leaq	(%r14,%rax,4), %rdx
	movl	$.L.str.6, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	12(%rsp), %ebp
	incq	%r12
	cmpl	%ebp, %r12d
	jl	.LBB3_4
.LBB3_5:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	incl	%r15d
	cmpl	%ebp, %r15d
	jl	.LBB3_2
.LBB3_6:                                # %._crit_edge15
	movq	%rbx, %rdi
	callq	fclose
	movq	%r14, %rax
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z10readMatrixPc, .Lfunc_end3-_Z10readMatrixPc
	.cfi_endproc
                                        # -- End function
	.globl	_Z11writeMatrixPiiPc            # -- Begin function _Z11writeMatrixPiiPc
	.type	_Z11writeMatrixPiiPc,@function
_Z11writeMatrixPiiPc:                   # @_Z11writeMatrixPiiPc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	movl	$.L.str.7, %esi
	movq	%rdx, %rdi
	callq	fopen
	movq	%rax, %r15
	movl	%ebx, 12(%rsp)                  # 4-byte Spill
	testl	%ebx, %ebx
	jle	.LBB4_5
# %bb.1:                                # %.preheader.lr.ph
	movl	12(%rsp), %r12d                 # 4-byte Reload
	xorl	%ebp, %ebp
	xorl	%r13d, %r13d
.LBB4_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_3 Depth 2
	movl	%ebp, %eax
	movq	16(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%ebx, %ebx
.LBB4_3:                                #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r14,%rbx,4), %edx
	movl	$.L.str.8, %esi
	movq	%r15, %rdi
	xorl	%eax, %eax
	callq	fprintf
	incq	%rbx
	cmpq	%rbx, %r12
	jne	.LBB4_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	movl	$10, %edi
	movq	%r15, %rsi
	callq	fputc@PLT
	incq	%r13
	addl	12(%rsp), %ebp                  # 4-byte Folded Reload
	cmpq	%r12, %r13
	jne	.LBB4_2
.LBB4_5:                                # %._crit_edge17
	movq	%r15, %rdi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.Lfunc_end4:
	.size	_Z11writeMatrixPiiPc, .Lfunc_end4-_Z11writeMatrixPiiPc
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16MatrixMultKernelPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16MatrixMultKernelPiS_S_i,@object # @_Z16MatrixMultKernelPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z16MatrixMultKernelPiS_S_i
	.p2align	3, 0x0
_Z16MatrixMultKernelPiS_S_i:
	.quad	_Z31__device_stub__MatrixMultKernelPiS_S_i
	.size	_Z16MatrixMultKernelPiS_S_i, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"CUDA error: %s\n"
	.size	.L.str.3, 16

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Computation completed in %fms"
	.size	.L.str.4, 30

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"r"
	.size	.L.str.5, 2

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"%d"
	.size	.L.str.6, 3

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"w"
	.size	.L.str.7, 2

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"%d "
	.size	.L.str.8, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16MatrixMultKernelPiS_S_i"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Error! You do not have 5 elements to your command!"
	.size	.Lstr, 51

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"To multiply 2 matricies please use the following syntax:"
	.size	.Lstr.1, 57

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"./cuda_mult_v1 <device #> <tile width> <matrix A file> <matrix B file> <matrix A*B file>"
	.size	.Lstr.2, 89

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__MatrixMultKernelPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16MatrixMultKernelPiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16MatrixMultKernelPiS_S_i ; -- Begin function _Z16MatrixMultKernelPiS_S_i
	.globl	_Z16MatrixMultKernelPiS_S_i
	.p2align	8
	.type	_Z16MatrixMultKernelPiS_S_i,@function
_Z16MatrixMultKernelPiS_S_i:            ; @_Z16MatrixMultKernelPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
	v_mad_u64_u32 v[0:1], null, s14, s3, v[4:5]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v1, v2, v0
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_lo_u32 v1, v2, s2
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s3, s2
	v_mov_b32_e32 v5, v0
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v6, 31, v5
	s_add_i32 s3, s3, -1
	s_cmp_eq_u32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	v_add_co_u32 v6, vcc_lo, s6, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	global_load_b32 v8, v[3:4], off
	global_load_b32 v9, v[6:7], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s2, v5
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v2, 0
.LBB0_5:                                ; %Flow46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16MatrixMultKernelPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16MatrixMultKernelPiS_S_i, .Lfunc_end0-_Z16MatrixMultKernelPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 348
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16MatrixMultKernelPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16MatrixMultKernelPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
