//This file contains a cuda code implementing 2d convolution
//Author: Ajay Singh
#include<stdio.h>
#include<cuda.h>
#include<stdlib.h>

#define mask_width (3)
#define mat_size (5)

__constant__ float mask[mask_width];

__global__
void covolution_2d_kernel(float *Mat, float *Ans)
{
	int col=threadIdx.x+blockIdx.x*blockDim.x;
	int row=threadIdx.y+blockIdx.y*blockDim.y;

	float pvalue=0;
	for(int j=0, i=row; j<mask_width; j++, i++){
		for(int k=col, l=0; l<mask_width; l++, k++){
			pvalue+=Mat[i*mask_width+k]*mask[j*mask_width+l];
		}
	}
	Ans[row*mask_width+col]=pvalue;
	return;
}
	

int main()
{
float *M, *ans, *h_mask;
float *d_M, *d_ans;
int k=mat_size-(mask_width-1);

	h_mask=(float *)malloc(sizeof(float)*mask_width*mask_width);
	M=(float *)malloc(sizeof(float)*mat_size*mat_size);
	ans=(float *)malloc(sizeof(float)*k*k);
	dim3 grid(mask_width, mask_width);	

	if(M==NULL || mask==NULL || ans==NULL){
		printf(" Error while allocating memory in host for mask or the matrix");
		return 0;
	}
	printf("Printing matrix\n");

	for(int i=0; i<mat_size*mat_size; i++){
		M[i]=i+1;
		printf("%lf ", M[i]);
		if(i%mat_size==0 && i!=0)
			putchar('\n');

	}
	printf("\nPrinting Mask\n");
	for(int j=0; j<mask_width*mask_width; j++){
		h_mask[j]=j+1;
		printf("%lf ",h_mask[j]);
		if((j+1)%mask_width==0 && j!=0)
			putchar('\n');
	}
	
	
	if(cudaMalloc( (void **)&d_M, sizeof(float)*mat_size*mat_size)!=cudaSuccess){
		printf("error while allocating memory for matrix on device\n");
	}


	if(cudaMalloc((void **)&d_ans, sizeof(float)*k*k)!=cudaSuccess){
		printf("error while allocating memory for the mask on device\n");
	}

	if(cudaMemcpyToSymbol(mask, h_mask, sizeof(float)*mask_width)!=cudaSuccess){
		printf("error while copying mask from host to constant memory in device\n");
	}

	if(cudaMemcpy(d_M, M, sizeof(float)*mat_size*mat_size, cudaMemcpyHostToDevice)!=cudaSuccess){
		printf("error while copying matrix to device\n");
	}


	covolution_2d_kernel<<< grid, 1>>>(d_M, d_ans);

	if(cudaMemcpy( ans, d_ans, sizeof(float)*k*k, cudaMemcpyDeviceToHost)!=cudaSuccess){
		printf("error while copying mask to device\n");
	}
	printf("\nPrinting ans\n");
	for(int i=0; i<k*k; i++){
		printf("%lf \t",ans[i]);
		if(i%k==0 && i!=0)
			putchar('\n');
	}
	cudaFree(d_M);
	cudaFree(d_ans);
return 0;
}
	


	.file	"tmpxft_003313bc_00000000-6_2dconv_with_constantmemory.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z42__device_stub__Z20covolution_2d_kernelPfS_PfS_
	.type	_Z42__device_stub__Z20covolution_2d_kernelPfS_PfS_, @function
_Z42__device_stub__Z20covolution_2d_kernelPfS_PfS_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z20covolution_2d_kernelPfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z42__device_stub__Z20covolution_2d_kernelPfS_PfS_, .-_Z42__device_stub__Z20covolution_2d_kernelPfS_PfS_
	.globl	_Z20covolution_2d_kernelPfS_
	.type	_Z20covolution_2d_kernelPfS_, @function
_Z20covolution_2d_kernelPfS_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z20covolution_2d_kernelPfS_PfS_
	.cfi_endproc
.LFE2053:
	.size	_Z20covolution_2d_kernelPfS_, .-_Z20covolution_2d_kernelPfS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	" Error while allocating memory in host for mask or the matrix"
.LC1:
	.string	"Printing matrix\n"
.LC2:
	.string	"%lf "
.LC3:
	.string	"\nPrinting Mask\n"
.LC4:
	.string	"error while allocating memory for matrix on device\n"
.LC5:
	.string	"error while allocating memory for the mask on device\n"
.LC6:
	.string	"error while copying mask from host to constant memory in device\n"
.LC7:
	.string	"error while copying matrix to device\n"
.LC8:
	.string	"error while copying mask to device\n"
.LC9:
	.string	"\nPrinting ans\n"
.LC10:
	.string	"%lf \t"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$36, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$100, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$36, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$1, 24(%rsp)
	movq	%rax, %rbp
	movabsq	$12884901891, %rax
	movq	%rax, 16(%rsp)
	testq	%r12, %r12
	je	.L33
	testq	%rbp, %rbp
	jne	.L9
.L33:
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L11
.L9:
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
.L16:
	leal	1(%rbx), %r15d
	movslq	%ebx, %rax
	movl	$2, %edi
	cvtsi2ssl	%r15d, %xmm0
	leaq	.LC2(%rip), %rsi
	movss	%xmm0, (%r12,%rax,4)
	movb	$1, %al
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	%ebx, %eax
	movl	$5, %ecx
	cltd
	idivl	%ecx
	testl	%edx, %edx
	je	.L12
.L15:
	cmpl	$25, %r15d
	jne	.L13
	jmp	.L59
.L12:
	testl	%ebx, %ebx
	je	.L31
	movl	$10, %edi
	call	putchar@PLT
	jmp	.L15
.L31:
	movl	$1, %r15d
.L13:
	movl	%r15d, %ebx
	jmp	.L16
.L59:
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r14d, %r14d
	movl	$3, %r15d
	leaq	.LC3(%rip), %rsi
	call	__printf_chk@PLT
.L21:
	leal	1(%r14), %ebx
	movslq	%r14d, %rax
	movl	$2, %edi
	cvtsi2ssl	%ebx, %xmm0
	leaq	.LC2(%rip), %rsi
	movss	%xmm0, 0(%r13,%rax,4)
	movb	$1, %al
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	%ebx, %eax
	cltd
	idivl	%r15d
	testl	%edx, %edx
	je	.L17
.L20:
	cmpl	$9, %ebx
	jne	.L18
	jmp	.L60
.L17:
	testl	%r14d, %r14d
	je	.L32
	movl	$10, %edi
	call	putchar@PLT
	jmp	.L20
.L32:
	movl	$1, %ebx
.L18:
	movl	%ebx, %r14d
	jmp	.L21
.L60:
	movq	%rsp, %rdi
	movl	$100, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L22
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L22:
	leaq	8(%rsp), %rdi
	movl	$36, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L23
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L23:
	xorl	%ecx, %ecx
	movl	$1, %r8d
	movl	$12, %edx
	movq	%r13, %rsi
	leaq	_ZL4mask(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	testl	%eax, %eax
	je	.L24
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L24:
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movl	$100, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L25
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L25:
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rdx
	movl	$1, %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z42__device_stub__Z20covolution_2d_kernelPfS_PfS_
.L26:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$36, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L27
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L27:
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
	leaq	.LC10(%rip), %r12
.L29:
	movq	%r12, %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	0(%rbp,%rbx,4), %xmm0
	call	__printf_chk@PLT
	imull	$-1431655765, %ebx, %eax
	cmpl	$1431655765, %eax
	ja	.L28
	testl	%ebx, %ebx
	je	.L28
	movl	$10, %edi
	call	putchar@PLT
.L28:
	incq	%rbx
	cmpq	$9, %rbx
	jne	.L29
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
.L11:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z20covolution_2d_kernelPfS_"
.LC12:
	.string	"mask"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z20covolution_2d_kernelPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	movl	$12, %r9d
	leaq	_ZL4mask(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL4mask
	.comm	_ZL4mask,12,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//This file contains a cuda code implementing 2d convolution
//Author: Ajay Singh
#include<stdio.h>
#include<hip/hip_runtime.h>
#include<stdlib.h>

#define mask_width (3)
#define mat_size (5)

__constant__ float mask[mask_width];

__global__
void covolution_2d_kernel(float *Mat, float *Ans)
{
	int col=threadIdx.x+blockIdx.x*blockDim.x;
	int row=threadIdx.y+blockIdx.y*blockDim.y;

	float pvalue=0;
	for(int j=0, i=row; j<mask_width; j++, i++){
		for(int k=col, l=0; l<mask_width; l++, k++){
			pvalue+=Mat[i*mask_width+k]*mask[j*mask_width+l];
		}
	}
	Ans[row*mask_width+col]=pvalue;
	return;
}
	

int main()
{
float *M, *ans, *h_mask;
float *d_M, *d_ans;
int k=mat_size-(mask_width-1);

	h_mask=(float *)malloc(sizeof(float)*mask_width*mask_width);
	M=(float *)malloc(sizeof(float)*mat_size*mat_size);
	ans=(float *)malloc(sizeof(float)*k*k);
	dim3 grid(mask_width, mask_width);	

	if(M==NULL || mask==NULL || ans==NULL){
		printf(" Error while allocating memory in host for mask or the matrix");
		return 0;
	}
	printf("Printing matrix\n");

	for(int i=0; i<mat_size*mat_size; i++){
		M[i]=i+1;
		printf("%lf ", M[i]);
		if(i%mat_size==0 && i!=0)
			putchar('\n');

	}
	printf("\nPrinting Mask\n");
	for(int j=0; j<mask_width*mask_width; j++){
		h_mask[j]=j+1;
		printf("%lf ",h_mask[j]);
		if((j+1)%mask_width==0 && j!=0)
			putchar('\n');
	}
	
	
	if(hipMalloc( (void **)&d_M, sizeof(float)*mat_size*mat_size)!=hipSuccess){
		printf("error while allocating memory for matrix on device\n");
	}


	if(hipMalloc((void **)&d_ans, sizeof(float)*k*k)!=hipSuccess){
		printf("error while allocating memory for the mask on device\n");
	}

	if(hipMemcpyToSymbol(HIP_SYMBOL(mask), h_mask, sizeof(float)*mask_width)!=hipSuccess){
		printf("error while copying mask from host to constant memory in device\n");
	}

	if(hipMemcpy(d_M, M, sizeof(float)*mat_size*mat_size, hipMemcpyHostToDevice)!=hipSuccess){
		printf("error while copying matrix to device\n");
	}


	covolution_2d_kernel<<< grid, 1>>>(d_M, d_ans);

	if(hipMemcpy( ans, d_ans, sizeof(float)*k*k, hipMemcpyDeviceToHost)!=hipSuccess){
		printf("error while copying mask to device\n");
	}
	printf("\nPrinting ans\n");
	for(int i=0; i<k*k; i++){
		printf("%lf \t",ans[i]);
		if(i%k==0 && i!=0)
			putchar('\n');
	}
	hipFree(d_M);
	hipFree(d_ans);
return 0;
}
	


	.text
	.file	"2dconv_with_constantmemory.hip"
	.globl	_Z35__device_stub__covolution_2d_kernelPfS_ # -- Begin function _Z35__device_stub__covolution_2d_kernelPfS_
	.type	_Z35__device_stub__covolution_2d_kernelPfS_,@function
_Z35__device_stub__covolution_2d_kernelPfS_: # @_Z35__device_stub__covolution_2d_kernelPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20covolution_2d_kernelPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z35__device_stub__covolution_2d_kernelPfS_, .Lfunc_end0-_Z35__device_stub__covolution_2d_kernelPfS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$36, %edi
	callq	malloc
	movq	%rax, %r15
	movl	$100, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$36, %edi
	callq	malloc
	testq	%r14, %r14
	je	.LBB1_2
# %bb.1:
	testq	%rax, %rax
	je	.LBB1_2
# %bb.3:
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%r12d, %r12d
	xorl	%ebx, %ebx
.LBB1_4:                                # =>This Inner Loop Header: Depth=1
	movq	%rbx, %r13
	incq	%rbx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebx, %xmm0
	movss	%xmm0, (%r14,%r13,4)
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ebx, %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	testq	%r13, %r13
	je	.LBB1_7
# %bb.5:                                #   in Loop: Header=BB1_4 Depth=1
	movzbl	%r13b, %eax
	imull	$205, %eax, %eax
	shrl	$10, %eax
	leal	(%rax,%rax,4), %eax
	addb	%r12b, %al
	jne	.LBB1_7
# %bb.6:                                #   in Loop: Header=BB1_4 Depth=1
	movl	$10, %edi
	callq	putchar
.LBB1_7:                                #   in Loop: Header=BB1_4 Depth=1
	decb	%r12b
	cmpq	$25, %rbx
	jne	.LBB1_4
# %bb.8:
	movq	%r14, 24(%rsp)                  # 8-byte Spill
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$1, %r12d
	xorl	%r14d, %r14d
	movabsq	$-6148914691236517205, %rbp     # imm = 0xAAAAAAAAAAAAAAAB
.LBB1_9:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rbx
	incq	%r14
	movq	%r12, %rax
	mulq	%rbp
	movq	%rdx, %r13
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r14d, %xmm0
	shrl	%r13d
	movss	%xmm0, (%r15,%rbx,4)
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r14d, %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	leal	(%r13,%r13,2), %eax
	decb	%al
	cmpb	%bl, %al
	jne	.LBB1_11
# %bb.10:                               #   in Loop: Header=BB1_9 Depth=1
	movl	$10, %edi
	callq	putchar
.LBB1_11:                               #   in Loop: Header=BB1_9 Depth=1
	incq	%r12
	cmpq	$9, %r14
	jne	.LBB1_9
# %bb.12:
	leaq	16(%rsp), %rdi
	movl	$100, %esi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_14
# %bb.13:
	movl	$.Lstr.2, %edi
	callq	puts@PLT
.LBB1_14:
	leaq	8(%rsp), %rdi
	movl	$36, %esi
	callq	hipMalloc
	testl	%eax, %eax
	movq	32(%rsp), %r12                  # 8-byte Reload
	movq	24(%rsp), %rbx                  # 8-byte Reload
	je	.LBB1_16
# %bb.15:
	movl	$.Lstr.3, %edi
	callq	puts@PLT
.LBB1_16:
	movl	$mask, %edi
	movl	$12, %edx
	movq	%r15, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	testl	%eax, %eax
	je	.LBB1_18
# %bb.17:
	movl	$.Lstr.4, %edi
	callq	puts@PLT
.LBB1_18:
	movq	16(%rsp), %rdi
	movl	$100, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_20
# %bb.19:
	movl	$.Lstr.5, %edi
	callq	puts@PLT
.LBB1_20:
	movabsq	$12884901891, %rdi              # imm = 0x300000003
	movabsq	$4294967297, %rdx               # imm = 0x100000001
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_22
# %bb.21:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z35__device_stub__covolution_2d_kernelPfS_
.LBB1_22:
	movq	8(%rsp), %rsi
	movl	$36, %edx
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_24
# %bb.23:
	movl	$.Lstr.6, %edi
	callq	puts@PLT
.LBB1_24:
	movl	$.Lstr.7, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB1_25:                               # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12,%r14,4), %xmm0
	movl	$.L.str.10, %edi
	movb	$1, %al
	callq	printf
	testq	%r14, %r14
	je	.LBB1_28
# %bb.26:                               #   in Loop: Header=BB1_25 Depth=1
	movzbl	%r14b, %eax
	imull	$171, %eax, %eax
	shrl	$9, %eax
	leal	(%rax,%rax,2), %eax
	addb	%bl, %al
	jne	.LBB1_28
# %bb.27:                               #   in Loop: Header=BB1_25 Depth=1
	movl	$10, %edi
	callq	putchar
.LBB1_28:                               #   in Loop: Header=BB1_25 Depth=1
	incq	%r14
	decb	%bl
	cmpq	$9, %r14
	jne	.LBB1_25
# %bb.29:
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	jmp	.LBB1_30
.LBB1_2:
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
.LBB1_30:
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20covolution_2d_kernelPfS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$mask, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movl	$12, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	mask,@object                    # @mask
	.local	mask
	.comm	mask,12,4
	.type	_Z20covolution_2d_kernelPfS_,@object # @_Z20covolution_2d_kernelPfS_
	.section	.rodata,"a",@progbits
	.globl	_Z20covolution_2d_kernelPfS_
	.p2align	3, 0x0
_Z20covolution_2d_kernelPfS_:
	.quad	_Z35__device_stub__covolution_2d_kernelPfS_
	.size	_Z20covolution_2d_kernelPfS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" Error while allocating memory in host for mask or the matrix"
	.size	.L.str, 62

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%lf "
	.size	.L.str.2, 5

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"%lf \t"
	.size	.L.str.10, 6

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z20covolution_2d_kernelPfS_"
	.size	.L__unnamed_1, 29

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"mask"
	.size	.L__unnamed_2, 5

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Printing matrix"
	.size	.Lstr, 16

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\nPrinting Mask"
	.size	.Lstr.1, 15

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"error while allocating memory for matrix on device"
	.size	.Lstr.2, 51

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"error while allocating memory for the mask on device"
	.size	.Lstr.3, 53

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"error while copying mask from host to constant memory in device"
	.size	.Lstr.4, 64

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"error while copying matrix to device"
	.size	.Lstr.5, 37

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"error while copying mask to device"
	.size	.Lstr.6, 35

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"\nPrinting ans"
	.size	.Lstr.7, 14

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z35__device_stub__covolution_2d_kernelPfS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym mask
	.addrsig_sym _Z20covolution_2d_kernelPfS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z20covolution_2d_kernelPfS_ ; -- Begin function _Z20covolution_2d_kernelPfS_
	.globl	_Z20covolution_2d_kernelPfS_
	.p2align	8
	.type	_Z20covolution_2d_kernelPfS_,@function
_Z20covolution_2d_kernelPfS_:           ; @_Z20covolution_2d_kernelPfS_
; %bb.0:
	s_load_b32 s4, s[0:1], 0x1c
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_mov_b32 s8, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s2, s4, 16
	s_and_b32 s4, s4, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s2, v[1:2]
	v_mov_b32_e32 v3, 0
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s14, s14, s4
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, mask@rel32@lo+4
	s_addc_u32 s5, s5, mask@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, v2, 1, v2
	v_add3_u32 v0, s14, v0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v1, v0
.LBB0_1:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_2 Depth 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b64 s[6:7], 0
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v5, vcc_lo
.LBB0_2:                                ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, v2, s6
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
	s_add_u32 s10, s4, s6
	s_addc_u32 s11, s5, s7
	s_add_u32 s6, s6, 4
	global_load_b32 v5, v[5:6], off
	s_load_b32 s9, s[10:11], 0x0
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s6, 12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v3, s9, v5
	s_cbranch_scc0 .LBB0_2
; %bb.3:                                ;   in Loop: Header=BB0_1 Depth=1
	s_add_i32 s8, s8, 1
	v_add_nc_u32_e32 v1, 3, v1
	s_add_u32 s4, s4, 12
	s_addc_u32 s5, s5, 0
	s_cmp_eq_u32 s8, 3
	s_cbranch_scc0 .LBB0_1
; %bb.4:
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v3, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20covolution_2d_kernelPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z20covolution_2d_kernelPfS_, .Lfunc_end0-_Z20covolution_2d_kernelPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 296
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	mask                    ; @mask
	.type	mask,@object
	.section	.bss,"aw",@nobits
	.globl	mask
	.p2align	2, 0x0
mask:
	.zero	12
	.size	mask, 12

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym mask
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20covolution_2d_kernelPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20covolution_2d_kernelPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
