#include <stdio.h>
#include <math.h>
#include <time.h>


void add(int n, float* x, float* y) {
  for(int i = 0; i < n; ++i)
    y[i] += x[i]; 
}

void add(int x_size, int y_size, int z_size, float*** t1, float*** t2) {
  for(int x = 0; x < x_size; ++x)
    for(int y = 0; y < y_size; ++y)
      for(int z = 0; z < z_size; ++z)
        t1[x][y][z] += t2[x][y][z]; 
}

__global__
void add_gpu(int n, float* x, float* y) {
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;  
  for(int i = index; i < n; i+=stride)
    y[i] += x[i];
}

int main(void) {
  int X = 500;
  int Y = 500;
  int Z = 500;
  int N = X*Y*Z;

  float *v1, *v2;
  cudaMallocManaged(&v1, N*sizeof(float));
  cudaMallocManaged(&v2, N*sizeof(float)); 
  
  float ***t1, ***t2;
  t1 = new float**[X];
  t2 = new float**[X];
  for(int x = 0; x < X; ++x) {
    t1[x] = new float*[Y];
    t2[x] = new float*[Y];
    for(int y = 0; y < Y; ++y) {
      t1[x][y] = new float[Z];
      t2[x][y] = new float[Z];      
    }
  }

  for(int x = 0; x < X; ++x)
    for(int y = 0; y < Y; ++y)
      for(int z = 0; z < Z; ++z) {
        v1[x + y*X + z*X*Y] = 1.0f;
        v2[x + y*X + z*X*Y] = 2.0f;
        t1[x][y][z] = 1.0f;
        t2[x][y][z] = 2.0f;
      }

  // sum
  clock_t t;
  t = clock();
  add(X*Y*Z, v1, v2);
  t = clock() - t;
  printf ("It took me %d clicks (%f seconds).\n",t,((float)t)/CLOCKS_PER_SEC);
  t = clock();
  add(X, Y, Z, t1, t2);
  t = clock() - t;
  printf ("It took me %d clicks (%f seconds).\n",t,((float)t)/CLOCKS_PER_SEC);  

  int blockSize = 256;
  int numBlocks = (N + blockSize-1) / blockSize;
  t = clock();
  add_gpu<<< numBlocks, blockSize >>>(N, v1, v2);
  // Wait for GPU to finish before accessing on host
  cudaDeviceSynchronize();
  t = clock() - t;
  printf ("It took me %d clicks (%f seconds).\n",t,((float)t)/CLOCKS_PER_SEC);  
  
  
  cudaFree(v1);
  cudaFree(v2);
  
  return 0;
}
  

	.file	"tmpxft_0038638f_00000000-6_tensor_ops.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z3addiPfS_
	.type	_Z3addiPfS_, @function
_Z3addiPfS_:
.LFB2027:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L3:
	cmpl	%eax, %edi
	jle	.L6
	movss	(%rdx,%rax,4), %xmm0
	addss	(%rsi,%rax,4), %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	jmp	.L3
.L6:
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z3addiPfS_, .-_Z3addiPfS_
	.globl	_Z3addiiiPPPfS1_
	.type	_Z3addiiiPPPfS1_, @function
_Z3addiiiPPPfS1_:
.LFB2028:
	.cfi_startproc
	endbr64
	movl	%edx, %r9d
	movq	%rcx, %r10
	xorl	%eax, %eax
.L15:
	cmpl	%eax, %edi
	jle	.L24
	xorl	%ecx, %ecx
.L17:
	cmpl	%ecx, %esi
	jle	.L25
	xorl	%edx, %edx
	leaq	0(,%rcx,8), %r11
	cmpl	%edx, %r9d
	jg	.L22
	incq	%rcx
	jmp	.L17
.L25:
	incq	%rax
	jmp	.L15
.L24:
	ret
.L22:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
.L9:
	movq	(%r10,%rax,8), %rbx
	movq	(%r8,%rax,8), %rbp
	movq	(%rbx,%r11), %rbx
	movq	0(%rbp,%r11), %rbp
	leaq	(%rbx,%rdx,4), %rbx
	movss	(%rbx), %xmm0
	addss	0(%rbp,%rdx,4), %xmm0
	incq	%rdx
	movss	%xmm0, (%rbx)
.L11:
	cmpl	%edx, %r9d
	jg	.L9
	incq	%rcx
.L12:
	cmpl	%ecx, %esi
	jle	.L10
	leaq	0(,%rcx,8), %r11
	xorl	%edx, %edx
	jmp	.L11
.L10:
	incq	%rax
	cmpl	%eax, %edi
	jle	.L26
	xorl	%ecx, %ecx
	jmp	.L12
.L26:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z3addiiiPPPfS1_, .-_Z3addiiiPPPfS1_
	.globl	_Z29__device_stub__Z7add_gpuiPfS_iPfS_
	.type	_Z29__device_stub__Z7add_gpuiPfS_iPfS_, @function
_Z29__device_stub__Z7add_gpuiPfS_iPfS_:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z7add_gpuiPfS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L27:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z29__device_stub__Z7add_gpuiPfS_iPfS_, .-_Z29__device_stub__Z7add_gpuiPfS_iPfS_
	.globl	_Z7add_gpuiPfS_
	.type	_Z7add_gpuiPfS_, @function
_Z7add_gpuiPfS_:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z7add_gpuiPfS_iPfS_
	.cfi_endproc
.LFE2055:
	.size	_Z7add_gpuiPfS_, .-_Z7add_gpuiPfS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"It took me %d clicks (%f seconds).\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$1, %edx
	movl	$500000000, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaMallocManaged@PLT
	movl	$1, %edx
	movl	$500000000, %esi
	leaq	8(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movl	$4000, %edi
	call	_Znam@PLT
	movl	$4000, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movq	%rax, %r12
.L34:
	movl	$4000, %edi
	xorl	%r13d, %r13d
	call	_Znam@PLT
	movl	$4000, %edi
	movq	%rax, 0(%rbp,%rbx)
	movq	%rax, %r15
	call	_Znam@PLT
	movq	%rax, (%r12,%rbx)
	movq	%rax, %r14
.L33:
	movl	$2000, %edi
	call	_Znam@PLT
	movl	$2000, %edi
	movq	%rax, (%r15,%r13)
	call	_Znam@PLT
	movq	%rax, (%r14,%r13)
	addq	$8, %r13
	cmpq	$4000, %r13
	jne	.L33
	addq	$8, %rbx
	cmpq	$4000, %rbx
	jne	.L34
	movq	(%rsp), %r10
	movq	8(%rsp), %r11
	xorl	%eax, %eax
	movss	.LC0(%rip), %xmm0
	movss	.LC1(%rip), %xmm1
.L35:
	movq	0(%rbp,%rax,8), %r9
	movq	(%r12,%rax,8), %r8
	leaq	0(,%rax,4), %rdi
	xorl	%edx, %edx
.L39:
	movq	(%r9,%rdx,8), %r13
	movq	(%r8,%rdx,8), %rbx
	movq	%rdi, %rsi
	xorl	%ecx, %ecx
.L36:
	movss	%xmm0, (%r10,%rsi)
	movss	%xmm1, (%r11,%rsi)
	addq	$1000000, %rsi
	movss	%xmm0, 0(%r13,%rcx)
	movss	%xmm1, (%rbx,%rcx)
	addq	$4, %rcx
	cmpq	$2000, %rcx
	jne	.L36
	incq	%rdx
	addq	$2000, %rdi
	cmpq	$500, %rdx
	jne	.L39
	incq	%rax
	cmpq	$500, %rax
	jne	.L35
	call	clock@PLT
	movq	8(%rsp), %rdx
	movq	(%rsp), %rsi
	movl	$125000000, %edi
	movq	%rax, %rbx
	call	_Z3addiPfS_
	call	clock@PLT
	movl	$2, %edi
	subq	%rbx, %rax
	leaq	.LC3(%rip), %rbx
	movq	%rax, %rdx
	cvtsi2ssq	%rax, %xmm0
	movq	%rbx, %rsi
	movb	$1, %al
	divss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	call	clock@PLT
	movq	%rbp, %rcx
	movq	%r12, %r8
	movl	$500, %edx
	movl	$500, %esi
	movl	$500, %edi
	movq	%rax, %r13
	call	_Z3addiiiPPPfS1_
	call	clock@PLT
	movq	%rbx, %rsi
	movl	$2, %edi
	subq	%r13, %rax
	movq	%rax, %rdx
	cvtsi2ssq	%rax, %xmm0
	movb	$1, %al
	divss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	call	clock@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$2147727789, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movq	%rax, %rbp
	addq	%rdi, %rdi
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	movq	8(%rsp), %rdx
	movq	(%rsp), %rsi
	movl	$125000000, %edi
	call	_Z29__device_stub__Z7add_gpuiPfS_iPfS_
.L40:
	call	cudaDeviceSynchronize@PLT
	call	clock@PLT
	movq	%rbx, %rsi
	movl	$2, %edi
	subq	%rbp, %rax
	movq	%rax, %rdx
	cvtsi2ssq	%rax, %xmm0
	movb	$1, %al
	divss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L41
	call	__stack_chk_fail@PLT
.L41:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z7add_gpuiPfS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7add_gpuiPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.align 4
.LC1:
	.long	1073741824
	.align 4
.LC2:
	.long	1232348160
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>
#include <time.h>


void add(int n, float* x, float* y) {
  for(int i = 0; i < n; ++i)
    y[i] += x[i]; 
}

void add(int x_size, int y_size, int z_size, float*** t1, float*** t2) {
  for(int x = 0; x < x_size; ++x)
    for(int y = 0; y < y_size; ++y)
      for(int z = 0; z < z_size; ++z)
        t1[x][y][z] += t2[x][y][z]; 
}

__global__
void add_gpu(int n, float* x, float* y) {
  int index = blockIdx.x * blockDim.x + threadIdx.x;
  int stride = blockDim.x * gridDim.x;  
  for(int i = index; i < n; i+=stride)
    y[i] += x[i];
}

int main(void) {
  int X = 500;
  int Y = 500;
  int Z = 500;
  int N = X*Y*Z;

  float *v1, *v2;
  hipMallocManaged(&v1, N*sizeof(float));
  hipMallocManaged(&v2, N*sizeof(float)); 
  
  float ***t1, ***t2;
  t1 = new float**[X];
  t2 = new float**[X];
  for(int x = 0; x < X; ++x) {
    t1[x] = new float*[Y];
    t2[x] = new float*[Y];
    for(int y = 0; y < Y; ++y) {
      t1[x][y] = new float[Z];
      t2[x][y] = new float[Z];      
    }
  }

  for(int x = 0; x < X; ++x)
    for(int y = 0; y < Y; ++y)
      for(int z = 0; z < Z; ++z) {
        v1[x + y*X + z*X*Y] = 1.0f;
        v2[x + y*X + z*X*Y] = 2.0f;
        t1[x][y][z] = 1.0f;
        t2[x][y][z] = 2.0f;
      }

  // sum
  clock_t t;
  t = clock();
  add(X*Y*Z, v1, v2);
  t = clock() - t;
  printf ("It took me %d clicks (%f seconds).\n",t,((float)t)/CLOCKS_PER_SEC);
  t = clock();
  add(X, Y, Z, t1, t2);
  t = clock() - t;
  printf ("It took me %d clicks (%f seconds).\n",t,((float)t)/CLOCKS_PER_SEC);  

  int blockSize = 256;
  int numBlocks = (N + blockSize-1) / blockSize;
  t = clock();
  add_gpu<<< numBlocks, blockSize >>>(N, v1, v2);
  // Wait for GPU to finish before accessing on host
  hipDeviceSynchronize();
  t = clock() - t;
  printf ("It took me %d clicks (%f seconds).\n",t,((float)t)/CLOCKS_PER_SEC);  
  
  
  hipFree(v1);
  hipFree(v2);
  
  return 0;
}
  

	.text
	.file	"tensor_ops.hip"
	.globl	_Z3addiPfS_                     # -- Begin function _Z3addiPfS_
	.type	_Z3addiPfS_,@function
_Z3addiPfS_:                            # @_Z3addiPfS_
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jle	.LBB0_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%edi, %eax
	xorl	%ecx, %ecx
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rsi,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%rdx,%rcx,4), %xmm0
	movss	%xmm0, (%rdx,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB0_2
.LBB0_3:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z3addiPfS_, .Lfunc_end0-_Z3addiPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z3addiiiPPPfS1_                # -- Begin function _Z3addiiiPPPfS1_
	.type	_Z3addiiiPPPfS1_,@function
_Z3addiiiPPPfS1_:                       # @_Z3addiiiPPPfS1_
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jle	.LBB1_10
# %bb.1:                                # %.preheader18.lr.ph
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%edi, %eax
	movl	%esi, %edi
	movl	%edx, %r9d
	xorl	%r10d, %r10d
.LBB1_2:                                # %.preheader18
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
                                        #       Child Loop BB1_6 Depth 3
	testl	%esi, %esi
	jle	.LBB1_8
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	xorl	%r11d, %r11d
.LBB1_4:                                # %.preheader
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_6 Depth 3
	testl	%edx, %edx
	jle	.LBB1_7
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB1_4 Depth=2
	movq	(%r8,%r10,8), %rbx
	movq	(%rbx,%r11,8), %rbx
	movq	(%rcx,%r10,8), %r14
	movq	(%r14,%r11,8), %r14
	xorl	%r15d, %r15d
.LBB1_6:                                #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rbx,%r15,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%r14,%r15,4), %xmm0
	movss	%xmm0, (%r14,%r15,4)
	incq	%r15
	cmpq	%r15, %r9
	jne	.LBB1_6
.LBB1_7:                                # %._crit_edge
                                        #   in Loop: Header=BB1_4 Depth=2
	incq	%r11
	cmpq	%rdi, %r11
	jne	.LBB1_4
.LBB1_8:                                # %._crit_edge21
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r10
	cmpq	%rax, %r10
	jne	.LBB1_2
# %bb.9:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB1_10:                               # %._crit_edge23
	retq
.Lfunc_end1:
	.size	_Z3addiiiPPPfS1_, .Lfunc_end1-_Z3addiiiPPPfS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__add_gpuiPfS_ # -- Begin function _Z22__device_stub__add_gpuiPfS_
	.type	_Z22__device_stub__add_gpuiPfS_,@function
_Z22__device_stub__add_gpuiPfS_:        # @_Z22__device_stub__add_gpuiPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7add_gpuiPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z22__device_stub__add_gpuiPfS_, .Lfunc_end2-_Z22__device_stub__add_gpuiPfS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	0x49742400                      # float 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	16(%rsp), %rdi
	movl	$500000000, %esi                # imm = 0x1DCD6500
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	8(%rsp), %rdi
	movl	$500000000, %esi                # imm = 0x1DCD6500
	movl	$1, %edx
	callq	hipMallocManaged
	movl	$4000, %edi                     # imm = 0xFA0
	callq	_Znam
	movq	%rax, %rbx
	movl	$4000, %edi                     # imm = 0xFA0
	callq	_Znam
	movq	%rax, %r14
	xorl	%r13d, %r13d
.LBB3_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
	movl	$4000, %edi                     # imm = 0xFA0
	callq	_Znam
	movq	%rax, %r15
	movq	%rax, (%rbx,%r13,8)
	movl	$4000, %edi                     # imm = 0xFA0
	callq	_Znam
	movq	%rax, %r12
	movq	%rax, (%r14,%r13,8)
	xorl	%ebp, %ebp
.LBB3_2:                                #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$2000, %edi                     # imm = 0x7D0
	callq	_Znam
	movq	%rax, (%r15,%rbp,8)
	movl	$2000, %edi                     # imm = 0x7D0
	callq	_Znam
	movq	%rax, (%r12,%rbp,8)
	incq	%rbp
	cmpq	$500, %rbp                      # imm = 0x1F4
	jne	.LBB3_2
# %bb.3:                                #   in Loop: Header=BB3_1 Depth=1
	incq	%r13
	cmpq	$500, %r13                      # imm = 0x1F4
	jne	.LBB3_1
# %bb.4:                                # %.preheader93
	movq	16(%rsp), %rax
	movq	8(%rsp), %rcx
	xorl	%edx, %edx
	movl	$1065353216, %esi               # imm = 0x3F800000
	movl	$1073741824, %edi               # imm = 0x40000000
	movl	$2000, %r8d                     # imm = 0x7D0
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	movq	%r14, 24(%rsp)                  # 8-byte Spill
.LBB3_5:                                # %.preheader92
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_6 Depth 2
                                        #       Child Loop BB3_7 Depth 3
	movq	(%rbx,%rdx,8), %r9
	movq	(%r14,%rdx,8), %r10
	movq	%rax, %r11
	movq	%rcx, %r15
	xorl	%r12d, %r12d
.LBB3_6:                                # %.preheader
                                        #   Parent Loop BB3_5 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_7 Depth 3
	movq	(%r9,%r12,8), %r13
	movq	(%r10,%r12,8), %rbp
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB3_7:                                #   Parent Loop BB3_5 Depth=1
                                        #     Parent Loop BB3_6 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	%esi, (%r11,%rbx)
	movl	%edi, (%r15,%rbx)
	movl	%esi, (%r13,%r14,4)
	movl	%edi, (%rbp,%r14,4)
	incq	%r14
	addq	$1000000, %rbx                  # imm = 0xF4240
	cmpq	$500, %r14                      # imm = 0x1F4
	jne	.LBB3_7
# %bb.8:                                #   in Loop: Header=BB3_6 Depth=2
	incq	%r12
	addq	%r8, %r15
	addq	%r8, %r11
	cmpq	$500, %r12                      # imm = 0x1F4
	jne	.LBB3_6
# %bb.9:                                #   in Loop: Header=BB3_5 Depth=1
	incq	%rdx
	addq	$4, %rcx
	addq	$4, %rax
	cmpq	$500, %rdx                      # imm = 0x1F4
	movq	32(%rsp), %rbx                  # 8-byte Reload
	movq	24(%rsp), %r14                  # 8-byte Reload
	jne	.LBB3_5
# %bb.10:
	callq	clock
	movq	%rax, %r15
	movq	16(%rsp), %rax
	xorl	%ecx, %ecx
	movq	8(%rsp), %rdx
.LBB3_11:                               # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rax,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%rdx,%rcx,4), %xmm0
	movss	%xmm0, (%rdx,%rcx,4)
	incq	%rcx
	cmpq	$125000000, %rcx                # imm = 0x7735940
	jne	.LBB3_11
# %bb.12:                               # %_Z3addiPfS_.exit
	callq	clock
	subq	%r15, %rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI3_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movq	%rax, %rsi
	movb	$1, %al
	callq	printf
	xorl	%r12d, %r12d
	callq	clock
	movq	%rax, %r15
.LBB3_13:                               # %.preheader18.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_14 Depth 2
                                        #       Child Loop BB3_15 Depth 3
	movq	(%r14,%r12,8), %rax
	movq	(%rbx,%r12,8), %rcx
	xorl	%edx, %edx
.LBB3_14:                               # %.preheader.i
                                        #   Parent Loop BB3_13 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_15 Depth 3
	movq	(%rax,%rdx,8), %rsi
	movq	(%rcx,%rdx,8), %rdi
	xorl	%r8d, %r8d
.LBB3_15:                               #   Parent Loop BB3_13 Depth=1
                                        #     Parent Loop BB3_14 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rsi,%r8,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	addss	(%rdi,%r8,4), %xmm0
	movss	%xmm0, (%rdi,%r8,4)
	incq	%r8
	cmpq	$500, %r8                       # imm = 0x1F4
	jne	.LBB3_15
# %bb.16:                               # %._crit_edge.i
                                        #   in Loop: Header=BB3_14 Depth=2
	incq	%rdx
	cmpq	$500, %rdx                      # imm = 0x1F4
	jne	.LBB3_14
# %bb.17:                               # %._crit_edge21.i
                                        #   in Loop: Header=BB3_13 Depth=1
	incq	%r12
	cmpq	$500, %r12                      # imm = 0x1F4
	jne	.LBB3_13
# %bb.18:                               # %_Z3addiiiPPPfS1_.exit
	callq	clock
	subq	%r15, %rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI3_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movq	%rax, %rsi
	movb	$1, %al
	callq	printf
	callq	clock
	movq	%rax, %rbx
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	leaq	488026(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_20
# %bb.19:
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$125000000, %edi                # imm = 0x7735940
	callq	_Z22__device_stub__add_gpuiPfS_
.LBB3_20:
	callq	hipDeviceSynchronize
	callq	clock
	subq	%rbx, %rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI3_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str, %edi
	movq	%rax, %rsi
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7add_gpuiPfS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7add_gpuiPfS_,@object         # @_Z7add_gpuiPfS_
	.section	.rodata,"a",@progbits
	.globl	_Z7add_gpuiPfS_
	.p2align	3, 0x0
_Z7add_gpuiPfS_:
	.quad	_Z22__device_stub__add_gpuiPfS_
	.size	_Z7add_gpuiPfS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"It took me %d clicks (%f seconds).\n"
	.size	.L.str, 36

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7add_gpuiPfS_"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__add_gpuiPfS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7add_gpuiPfS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7add_gpuiPfS_         ; -- Begin function _Z7add_gpuiPfS_
	.globl	_Z7add_gpuiPfS_
	.p2align	8
	.type	_Z7add_gpuiPfS_,@function
_Z7add_gpuiPfS_:                        ; @_Z7add_gpuiPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b32 s10, s[0:1], 0x0
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s10, v1
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s2, s[2:3], 0x0
	s_load_b128 s[4:7], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s8
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[8:9], s[2:3], 2
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s8
	global_load_b32 v0, v[4:5], off
	global_load_b32 v4, v[6:7], off
	v_add_nc_u32_e32 v1, s2, v1
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e64 s0, s10, v1
	global_store_b32 v[6:7], v0, off
	s_or_b32 s1, s0, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow19
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7add_gpuiPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7add_gpuiPfS_, .Lfunc_end0-_Z7add_gpuiPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 236
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7add_gpuiPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7add_gpuiPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
