#include <cuda.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <limits.h>
#include <math.h>
#include <float.h>
#include <iostream>
#include <vector>
#include <unordered_map>
#include <string>
#include <algorithm>




/***all macros**/
#define E_INIT  5            // in joules
#define E_ELEC  50e-9          //in nj = 1e-9j
#define E_AMP   100e-12          // in pj = 1e-12j
#define ALPHA   0.7     
#define BETA    0.3
#define DELTA   0.0 


#define  MAX_NODE  100000000
#define  DEBUG 1




#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
   if (code != cudaSuccess) 
   {
      fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}

/**all type declaration***/

using namespace std;

class Node{
public:
    unsigned int val;
    vector<unsigned int> weights;
    vector<Node*> Edges;

    Node(int val){
        this->val = val;
    }

    void addEdge(Node* v,unsigned int w){
        this->Edges.push_back(v);
        this->weights.push_back(w);
    }

};

//all fn declarations here
void calc_hx(int* offset,int* edges,float* hx,float* cord_x,float* cord_y,int N,int E,int sink);

void update_energy(int* parent,float* res_energy,int* Nt,int* Nr,float* cord_x,float* cord_y,int N,int sink);

void check_failure(float* res_energy,int N, int* flag);

void computeTime(float& time,cudaEvent_t start, cudaEvent_t stop);

/**** device Code *******/

// __device__ volatile int Cx[MAX_NODE];
__device__ volatile int PQ[MAX_NODE];


//K in parallel
__global__ void extractMin(int* PQ_size, int* expandNodes,int* expandNodes_size,float* Cx,int* openList,int N,int K){
    
    int id = blockIdx.x*blockDim.x+threadIdx.x;
    
    if(id<K && PQ_size[id]>0){

        //extract min from PQ
        int front = id* ( (N+K-1)/K );
        int node = PQ[front];

        // restructure the heap
        PQ[front]=PQ[front+PQ_size[id]-1];
        PQ_size[id]-=1;
        int pqIndex = 0;

        while(2*pqIndex+1 < PQ_size[id]){
            if(2*pqIndex+2 >= PQ_size[id]){
                if( Cx[PQ[front+pqIndex]] > Cx[PQ[front+2*pqIndex+1]]){
                    int swap = PQ[front + 2*pqIndex+1];
                    PQ[front + 2*pqIndex+1] = PQ[front +pqIndex];
                    PQ[front + pqIndex] = swap;
                    pqIndex = 2*pqIndex+1;
                }
                else
                    break;
            }
            else{
                if( Cx[PQ[front+pqIndex]] > Cx[PQ[front+2*pqIndex+1]] && Cx[PQ[front+2*pqIndex+1]] <= Cx[PQ[front+2*pqIndex+2]] ){
                    int swap = PQ[front + 2*pqIndex+1];
                    PQ[front + 2*pqIndex+1] = PQ[front +pqIndex];
                    PQ[front + pqIndex] = swap;
                    pqIndex = 2*pqIndex+1;
                }
                else if(Cx[PQ[front+pqIndex]] > Cx[PQ[front+2*pqIndex+2]] && Cx[PQ[front+2*pqIndex+2]] <= Cx[PQ[front+2*pqIndex+1]] ){
                    int swap = PQ[front + 2*pqIndex+2];
                    PQ[front + 2*pqIndex+2] = PQ[front +pqIndex];
                    PQ[front + pqIndex] = swap;
                    pqIndex = 2*pqIndex+2;                    
                } 
                else{
                    break;
                }
            }
            
        }

        //removed from openList
        openList[node] = -1;

        //added to expand next
        int len = atomicAdd(expandNodes_size,1);
        expandNodes[len]=node;
    }

}

//for K in parallel
__global__ void A_star_expand(int* off,int* edge,float* Hx,int* parent,volatile float* Cx,
    int* expandNodes,int* expandNodes_size, int* lock,int* openList,
    int N,int E, int K,int* nVFlag,int* PQ_size,
    float* res_energy,int* Nt,int* Nr){
       
    int id = blockIdx.x*blockDim.x+threadIdx.x;
    
    if(id< *expandNodes_size ){

        int node = expandNodes[id];

        // expand
        int start = off[node];
        int end = E;
        if(node!=N-1)
            end = off[node+1];
        
        while(start < end){ 
            int child = edge[start];
            
            //deleted edges
            if(child<0){
                start++;
                continue;
            }

            //array L initilaized with 0
            //get the lock for child to update C(x)
            //loop till acquire the lock
            bool leaveLoop = false;

            while(leaveLoop==false){

                if(atomicCAS(&lock[child],0,1)==0){
                    //critical section
                    float exp_weight = 1 ;
                   
                    if( Cx[child] > (Cx[node] - Hx[node])+ exp_weight + Hx[child] ){
                        Cx[child]  = (Cx[node] - Hx[node])+ exp_weight + Hx[child];
                        __threadfence();
                        parent[child] = node;
        
                        if(openList[child]==-1){
                            nVFlag[child]=1;
                            //add only once
                        }
                    }

                    //end critical section
                    leaveLoop = true;

                    atomicCAS(&lock[child],1,0);

                }

                __syncthreads();

            }

            start++;
        }
        
    }//end 

}

//K in parallel -- O(N)
__global__ void keepHeapPQ(int* PQ_size,float* Cx,int N,int K){
    int id = blockIdx.x*blockDim.x+threadIdx.x;
    if(id < K && PQ_size[id] > 0){
        int front  = id*( (N+K-1)/K );
        int size = PQ_size[id];
        
        for(int i=front;i<front+size;i++){
            if(2*i+2 < front+size){
                int cost = Cx[PQ[i]];
                int costLeft = Cx[PQ[2*i+1]];
                int costRight = Cx[PQ[2*i+2]]; 

                if( cost > costLeft  ||  cost > costRight  ){
                    int index ;
                    if(costLeft <= costRight)
                        index = 2*i+1;
                    else
                        index = 2*i+2;
                    
                    while(index > front){
                        if( Cx[PQ[(index-1)/2]] > Cx[PQ[index]] ){
                            int swap = PQ[index];
                            PQ[index] = PQ[(index-1)/2];
                            PQ[(index-1)/2] = swap;
                            index = (index-1)/2;
                        }
                        else
                            break;
                    }
                }
            }
            else if(2*i+1 < front+size){
                if(Cx[PQ[i]] > Cx[PQ[2*i+1]]){
                    int index = 2*i+1;
                    while(index > front){
                        if( Cx[PQ[(index-1)/2]] > Cx[PQ[index]] ){
                            int swap = PQ[index];
                            PQ[index] = PQ[(index-1)/2];
                            PQ[(index-1)/2] = swap;
                            index = (index-1)/2;
                        }
                        else
                            break;
                    }
                }
            }
        }
    }
}

//N threads
__global__ void setNV(int* nextFlag,int* nextV,int* nvSize,int N){
    int id = blockIdx.x*blockDim.x+threadIdx.x;
    if(id < N){
        if(nextFlag[id]==1){
            int index = atomicAdd(nvSize,1);
            nextV[index]=id;
        }
    }
}


//for K in parallel
__global__ void insertPQ(int* PQS,int* nextV,int* nVsize,float* Cx,int K,int N,int* openList){
    int id = blockIdx.x*blockDim.x+threadIdx.x;
    if(id < K){

        int front = id*( (N+K-1)/K );
        int i = id;
        
        while(i<*nVsize){            
            //if not already present
            if(openList[nextV[i]]!=-1){
                i+=K;
                continue;
            }

            PQ[front+PQS[id]]= nextV[i];
            PQS[id]+=1;

            //add in openList
            openList[nextV[i]] = id;

            if(PQS[id]>1){
                int index = PQS[id]-1;
                while(index>0){
                    if(Cx[PQ[front+ (index-1)/2]] > Cx[PQ[front+index]]){
                        int swap = PQ[front+index];
                        PQ[front+index]=PQ[front+ (index-1)/2];
                        PQ[front+ (index-1)/2] = swap;
                        index = (index-1)/2;
                    }
                    else
                        break;
                }
            }
            i += K;
        }
    }
}


int main(){

    //seed
    srand(42);

    //the K PQ
    int K ;
    scanf("%d",&K);

    FILE* fgraph = fopen("graph_op.txt","r");
    FILE* fgraph_rev = fopen("graph.txt","r");
    int N,E;
   
    fscanf(fgraph,"%d %d\n",&N,&E);
    fscanf(fgraph_rev,"%d %d\n",&N,&E);

    int startNode = N-1;

    int* H_offset = (int*)malloc(sizeof(int)*N);
    int* H_edges  = (int*)malloc(sizeof(int)*E);

    //rev graph
    int* H_rev_offset  = (int*)malloc(sizeof(int)*N);
    int* H_rev_edges = (int*)malloc(sizeof(int)*E);

    //weight is hop count =1
    
    float* H_hx = (float*)malloc(sizeof(float)*N);
    float* H_cx = (float*)malloc(sizeof(float)*N);

    int* H_parent = (int*)malloc(sizeof(int)*N);

    int* H_openList = (int*)malloc(sizeof(int)*N);
    int* H_PQ_size = (int*)malloc(sizeof(int)*K);


    //to compute distance
    float* H_cord_x = (float*)malloc(sizeof(float)*N);
    float* H_cord_y = (float*)malloc(sizeof(float)*N);

    float* H_res_energy = (float*)malloc(sizeof(float)*N);

    int* H_packet_recv =  (int*)malloc(sizeof(int)*N);
    int* H_packet_sent = (int*)malloc(sizeof(int)*N);

    memset(H_PQ_size,0,sizeof(int)*K);
    memset(H_openList,-1,sizeof(int)*N);
    
    memset(H_parent,-1,sizeof(int)*N);

    for(int i=0;i<N;i++){
        H_cx[i] = FLT_MAX;
        H_res_energy[i] = E_INIT;
    }

    for(int i=0;i<E;i++){
        fscanf(fgraph,"%d",&H_edges[i]);  
        fscanf(fgraph_rev,"%d",&H_rev_edges[i]);
    }

    for(int i=0;i<N;i++){
        fscanf(fgraph,"%d",&H_offset[i]);
        fscanf(fgraph_rev,"%d",&H_rev_offset[i]);
    }

    fclose(fgraph_rev);
    fclose(fgraph);

    FILE* f_cord = fopen("Cord.txt","r");
    for(int i=0;i<N;i++){
        float x,y; 
        fscanf(f_cord,"%f %f\n",&x,&y);
        H_cord_x[i]= x;
        H_cord_y[i] = y;
    }
    fclose(f_cord);

    calc_hx(H_rev_offset,H_rev_edges,H_hx,H_cord_x,H_cord_y,N,E,startNode);

    printf("[INFO] completed taking input\n");

    
    //init Host var
    int* H_flagEnd = (int*)malloc(sizeof(int));
    int* H_flagfound = (int*)malloc(sizeof(int));
    int* H_a0 = (int*)malloc(sizeof(int));

    int* H_nV_size = (int*)malloc(sizeof(int));
    int* H_nV = (int*)malloc(sizeof(int)*N);

    //required coz if many tries to add same in diff threads high low lower
    int* H_nVFlag = (int*)malloc(sizeof(int)*N);
    memset(H_nVFlag,-1,sizeof(int)*N);    

    *H_flagEnd = 0;
    *H_flagfound = 0;
    *H_a0 = 0;

    int* H_end_A_star = (int*)malloc(sizeof(int));
    *H_end_A_star = 0;

    //device var
    //graph struture
    float run_time = 0;
    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);
    int* D_offset;
    int* D_edges ;
    float* D_hx;
    float* D_Cx;
    
    int* D_parent;

    //Priority queue size
    int* D_PQ_size;

    //flag if in openList(contains which PQ)
    int* D_openList;
    //lock for nodes
    int* D_lock;
    //next nodes flag
    int* D_nVFlag;
    //next nodes array to insert PQ
    int* D_nV;
    int* D_nV_size;
    
    //nodes to be expanded ( extracted from PQ )
    int* D_expandNodes;
    int* D_expandNodes_size;
    
    //flag to end while loop and found the destination
    int* D_flagEnd;
    int* D_flagfound;

    float* D_cord_x;
    float* D_cord_y;

    float* D_res_energy;
    int* D_packet_recv;
    int* D_packet_sent;

    gpuErrchk ( cudaMalloc(&D_offset,sizeof(int)*N) );
    gpuErrchk ( cudaMalloc(&D_edges,sizeof(int)*E) );

    gpuErrchk ( cudaMalloc(&D_hx,sizeof(float)*N) );
    gpuErrchk ( cudaMalloc(&D_Cx,sizeof(float)*N) );
   
    gpuErrchk ( cudaMalloc(&D_parent,sizeof(int)*N) );
    
    gpuErrchk ( cudaMalloc(&D_PQ_size,sizeof(int)*K) );
    
    gpuErrchk ( cudaMalloc(&D_openList,sizeof(int)*N) );
    gpuErrchk ( cudaMalloc(&D_lock,sizeof(int)*N) );

    //for next set of vertices to add in PQ
    gpuErrchk ( cudaMalloc(&D_nV,sizeof(int)*N) );
    gpuErrchk ( cudaMalloc(&D_nV_size,sizeof(int)) );
    gpuErrchk ( cudaMalloc(&D_nVFlag,sizeof(int)*N) );

    //next nodes to expand
    gpuErrchk ( cudaMalloc(&D_expandNodes,sizeof(int)*K) );  //changed to K
    gpuErrchk ( cudaMalloc(&D_expandNodes_size,sizeof(int)) );

    //flag to end search
    gpuErrchk( cudaMalloc(&D_flagEnd,sizeof(int)) );
    gpuErrchk( cudaMalloc(&D_flagfound,sizeof(int)) );
    
    //energy and cords
    gpuErrchk ( cudaMalloc(&D_res_energy,sizeof(float)*N) );
    gpuErrchk ( cudaMalloc(&D_cord_x,sizeof(float)*N) );
    gpuErrchk ( cudaMalloc(&D_cord_y,sizeof(float)*N) );
    gpuErrchk( cudaMalloc(&D_packet_recv,sizeof(int)*N) );
    gpuErrchk( cudaMalloc(&D_packet_sent,sizeof(int)*N) );

    //copy
    gpuErrchk ( cudaMemcpy(D_offset,H_offset,sizeof(int)*N,cudaMemcpyHostToDevice) );
    gpuErrchk ( cudaMemcpy(D_edges,H_edges,sizeof(int)*E,cudaMemcpyHostToDevice) );
    gpuErrchk ( cudaMemcpy(D_hx,H_hx,sizeof(float)*N,cudaMemcpyHostToDevice) );
    gpuErrchk ( cudaMemcpy(D_Cx,H_cx,sizeof(float)*N,cudaMemcpyHostToDevice) );
    
    gpuErrchk ( cudaMemset(D_lock,0,sizeof(int)*N) );

    gpuErrchk ( cudaMemcpy(D_res_energy,H_res_energy,sizeof(float)*N,cudaMemcpyHostToDevice) );
    gpuErrchk ( cudaMemcpy(D_cord_x,H_cord_x,sizeof(float)*N,cudaMemcpyHostToDevice) );
    gpuErrchk ( cudaMemcpy(D_cord_y,H_cord_y,sizeof(float)*N,cudaMemcpyHostToDevice) );
    
    //1 TO EVADE DIVIDE BY 0 ERROR
    gpuErrchk ( cudaMemset(D_packet_recv,1,sizeof(int)*N) );
    gpuErrchk ( cudaMemset(D_packet_sent,1,sizeof(int)*N) );


    int count_round = 0;

    int numThreads = 512;
    int numBlocks = (K+numThreads-1)/numThreads;
    int N_numBlocks = (N+numThreads-1)/numThreads;



        //A* algo
        H_cx[startNode]=H_hx[startNode];
        // H_PQ[0]=startNode;
        H_PQ_size[0]=1;
        H_openList[startNode]=0;

        //reset
        gpuErrchk ( cudaMemcpy(D_Cx,H_cx,sizeof(float)*N,cudaMemcpyHostToDevice) );          
        gpuErrchk ( cudaMemcpyToSymbol(PQ,&startNode, sizeof(int), 0, cudaMemcpyHostToDevice) );

        gpuErrchk ( cudaMemcpy(D_parent,H_parent,sizeof(int)*N,cudaMemcpyHostToDevice) );
        gpuErrchk ( cudaMemcpy(D_openList,H_openList,sizeof(int)*N,cudaMemcpyHostToDevice) );
        gpuErrchk ( cudaMemcpy(D_PQ_size,H_PQ_size,sizeof(int)*K,cudaMemcpyHostToDevice) );
    
        
        gpuErrchk ( cudaMemcpy(D_nVFlag,H_nVFlag,sizeof(int)*N,cudaMemcpyHostToDevice) );
    
        gpuErrchk ( cudaMemcpy(D_nV_size,H_a0,sizeof(int),cudaMemcpyHostToDevice) );
        gpuErrchk ( cudaMemcpy(D_expandNodes_size,H_a0,sizeof(int),cudaMemcpyHostToDevice) );
        
        int flag_PQ_not_empty = 0;
        for(int i=0;i<K;i++){
            if(H_PQ_size[i]>0)
                flag_PQ_not_empty=1;
        }

        //DO A* initailly on whole graph
        while(flag_PQ_not_empty == 1){
            
            //extract min
            cudaEventRecord(start);
            extractMin<<<numBlocks,numThreads>>>(D_PQ_size, D_expandNodes,D_expandNodes_size,D_Cx,D_openList,N,K);
            
            gpuErrchk(cudaPeekAtLastError() );
            cudaDeviceSynchronize();
            cudaEventRecord(stop);
            cudaEventSynchronize(stop);
            computeTime(run_time,start,stop);
            

            cudaEventRecord(start);
            A_star_expand<<<numBlocks,numThreads>>>(D_offset,D_edges,D_hx,D_parent,D_Cx,
                D_expandNodes,D_expandNodes_size, D_lock,D_openList,
                N,E,K,D_nVFlag,D_PQ_size,
                D_res_energy,D_packet_sent,D_packet_recv);
            
            gpuErrchk(cudaPeekAtLastError() );
            cudaDeviceSynchronize();
            cudaEventRecord(stop);
            cudaEventSynchronize(stop);
            computeTime(run_time,start,stop);


            cudaEventRecord(start);
            keepHeapPQ<<<numBlocks,numThreads>>>(D_PQ_size,D_Cx,N,K);
            gpuErrchk(cudaPeekAtLastError() );
            cudaDeviceSynchronize();
            cudaEventRecord(stop);
            cudaEventSynchronize(stop);
            computeTime(run_time,start,stop);
            
            //gen from flag D_nV
            //for N in parallel
            cudaEventRecord(start);
            setNV<<<N_numBlocks,numThreads>>>(D_nVFlag,D_nV,D_nV_size,N);
            gpuErrchk(cudaPeekAtLastError() );
            cudaDeviceSynchronize();
            cudaEventRecord(stop);
            cudaEventSynchronize(stop);
            computeTime(run_time,start,stop);
            

            cudaEventRecord(start);
            insertPQ<<<numBlocks,numThreads>>>(D_PQ_size,D_nV,D_nV_size,D_Cx,K,N,D_openList);
            
            gpuErrchk(cudaPeekAtLastError() );
            cudaDeviceSynchronize();
            cudaEventRecord(stop);
            cudaEventSynchronize(stop);
            computeTime(run_time,start,stop);
        
            //cpy flagend and flagEmpty
            gpuErrchk( cudaMemcpy(H_PQ_size,D_PQ_size, sizeof(int)*K,cudaMemcpyDeviceToHost) );
            
            //reset nVFlag
            gpuErrchk( cudaMemcpy(D_nVFlag,H_nVFlag,sizeof(int)*N,cudaMemcpyHostToDevice) );

            //reset next insert array
            gpuErrchk( cudaMemcpy(D_nV_size,H_a0,sizeof(int),cudaMemcpyHostToDevice) );
            gpuErrchk( cudaMemcpy(D_expandNodes_size,H_a0,sizeof(int),cudaMemcpyHostToDevice) );
            

            flag_PQ_not_empty = 0;
            for(int i=0;i<K;i++){
                if(H_PQ_size[i]>0)
                    flag_PQ_not_empty=1;
            }
 
            gpuErrchk( cudaMemcpy(H_parent,D_parent, sizeof(int)*N,cudaMemcpyDeviceToHost) );
            
        }

        //broadcasted sol

        // for(int i=0;i<N;i++){
        //     int p = i;
        //     printf("PATH: %d ",i);
        //     while(H_parent[p]!=-1){
        //         p = H_parent[p];
        //         printf("%d ",p);
        //         if(p==startNode)
        //             break;
        //     }
        //     printf("\n");
        // }

        // update energy
    update_energy(H_parent,H_res_energy,H_packet_sent,H_packet_recv,H_cord_x,H_cord_y,N,startNode);        

    gpuErrchk ( cudaMemcpy(D_packet_recv,H_packet_recv,sizeof(int)*N,cudaMemcpyHostToDevice) );
    gpuErrchk ( cudaMemcpy(D_packet_sent,H_packet_sent,sizeof(int)*N,cudaMemcpyHostToDevice) );

    gpuErrchk ( cudaMemcpy(D_res_energy,H_res_energy,sizeof(float)*N,cudaMemcpyHostToDevice) );

    //check for end
    check_failure(H_res_energy,N,H_end_A_star);
    count_round++;

    while(*H_end_A_star==0){
        update_energy(H_parent,H_res_energy,H_packet_sent,H_packet_recv,H_cord_x,H_cord_y,N,startNode);
        check_failure(H_res_energy,N,H_end_A_star);
        count_round++;
    }
    

    printf("rounds: %d\n",count_round);
    printf("time: %f\n",run_time);

    return 0;
}

void calc_hx(int* offset,int* edges,float* hx,float* cord_x,float* cord_y,int N,int E,int sink){
    float dx,dy;
    dx = cord_x[sink];
    dy = cord_y[sink];

    for(int i=0;i<N;i++){
        float x,y;
        x = cord_x[i];
        y = cord_y[i];    

        int start = offset[i];
        int end = N;
        if(i!=N-1)
            end = offset[i+1];
        
        float sum = 0;
        int count = 0;

        while(start < end){
            int child = edges[start];
            sum+= sqrtf( (x-cord_x[child])*(x-cord_x[child]) + (y-cord_y[child])*(y-cord_y[child]) );
            start++;
            count++;
        }

        float dist = sqrtf( (x-dx)*(x-dx) + (y-dy)*(y-dy) );
        //hop counts 
        if(dist!=0){
            hx[i] =  (dist * count )/sum ;
        }
        else
            hx[i] = 0;
    }

}

void update_energy(int* parent,float* res_energy,int* Nt,int* Nr,float* cord_x,float* cord_y,int N,int sink){

    int k = 2048;    //256 bit packet length
    int round = rand()%N;
    for(int j=0;j<round;j++){
        int start = rand()%N;
        while(parent[start]!=-1){
            int node = parent[start];
            Nr[node]+=1;
            res_energy[node]-= k*E_ELEC;
            
            Nt[start]+=1;
            float dist_sq = (cord_x[start]-cord_x[node])*(cord_x[start]-cord_x[node]) +(cord_y[start]-cord_y[node])*(cord_y[start]-cord_y[node]);
            float energy = k*(E_ELEC + E_AMP*dist_sq);
            res_energy[start]-=energy*100;
           
            start = node;
            
        }

        // if(start != sink)
        //     printf("ERROR; invalid path\n");

    }

}

void check_failure(float* res_energy,int N, int* flag){
    for(int i=0;i<N;i++){
       // printf("%d:%f\n",i,res_energy[i]);
        if(res_energy[i]<0){
            *flag =1;
            printf("dead: %d\n",i);
            break;
        }       
    }
}

void computeTime(float& time,cudaEvent_t start, cudaEvent_t stop){
    float milliseconds = 0;
    cudaEventElapsedTime(&milliseconds, start, stop);
    time+= milliseconds;
    //printf("time:%f\n",milliseconds);
}
	.file	"tmpxft_002e7092_00000000-6_wsn_min.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4775:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4775:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPUassert: %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
	.weak	_Z9gpuAssert9cudaErrorPKcib
	.type	_Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB4743:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L8
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movq	stderr(%rip), %rdi
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	testb	%bpl, %bpl
	je	.L2
	movl	%ebx, %edi
	call	exit@PLT
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L8:
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE4743:
	.size	_Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
	.text
	.globl	_Z7calc_hxPiS_PfS0_S0_iii
	.type	_Z7calc_hxPiS_PfS0_S0_iii, @function
_Z7calc_hxPiS_PfS0_S0_iii:
.LFB4769:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rcx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%r9d, %ebx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movslq	136(%rsp), %rax
	movq	%rsi, 16(%rsp)
	movq	%rdx, 24(%rsp)
	movss	(%rcx,%rax,4), %xmm4
	movss	(%r8,%rax,4), %xmm5
	leal	-1(%r9), %eax
	movl	%eax, 36(%rsp)
	movss	%xmm4, 12(%rsp)
	movss	%xmm5, 32(%rsp)
.L13:
	cmpl	%r13d, %ebx
	jle	.L24
	movss	(%r14,%r13,4), %xmm1
	movss	(%r8,%r13,4), %xmm2
	movl	%ebx, %r12d
	movl	0(%rbp,%r13,4), %r15d
	cmpl	%r13d, 36(%rsp)
	je	.L14
	movl	4(%rbp,%r13,4), %r12d
.L14:
	movl	$0x00000000, 8(%rsp)
	movslq	%r15d, %rcx
.L15:
	cmpl	%ecx, %r12d
	jle	.L25
	movq	16(%rsp), %rax
	movaps	%xmm1, %xmm0
	movaps	%xmm2, %xmm3
	movq	%rcx, 56(%rsp)
	movq	%r8, 40(%rsp)
	movslq	(%rax,%rcx,4), %rsi
	movss	%xmm1, 52(%rsp)
	movss	%xmm2, 48(%rsp)
	subss	(%r8,%rsi,4), %xmm3
	subss	(%r14,%rsi,4), %xmm0
	mulss	%xmm3, %xmm3
	mulss	%xmm0, %xmm0
	addss	%xmm3, %xmm0
	call	sqrtf@PLT
	addss	8(%rsp), %xmm0
	movq	56(%rsp), %rcx
	movss	52(%rsp), %xmm1
	movss	48(%rsp), %xmm2
	movq	40(%rsp), %r8
	incq	%rcx
	movss	%xmm0, 8(%rsp)
	jmp	.L15
.L25:
	subss	12(%rsp), %xmm1
	subss	32(%rsp), %xmm2
	movq	%r8, 40(%rsp)
	movaps	%xmm1, %xmm0
	movaps	%xmm2, %xmm1
	mulss	%xmm2, %xmm1
	mulss	%xmm0, %xmm0
	addss	%xmm1, %xmm0
	call	sqrtf@PLT
	xorps	%xmm1, %xmm1
	movq	40(%rsp), %r8
	ucomiss	%xmm1, %xmm0
	jp	.L22
	je	.L17
.L22:
	movl	%r12d, %ecx
	xorl	%esi, %esi
	subl	%r15d, %ecx
	cmpl	%r15d, %r12d
	cmovl	%esi, %ecx
	cvtsi2ssl	%ecx, %xmm1
	mulss	%xmm0, %xmm1
	divss	8(%rsp), %xmm1
.L17:
	movq	24(%rsp), %rax
	movss	%xmm1, (%rax,%r13,4)
	incq	%r13
	jmp	.L13
.L24:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4769:
	.size	_Z7calc_hxPiS_PfS0_S0_iii, .-_Z7calc_hxPiS_PfS0_S0_iii
	.globl	_Z13update_energyPiPfS_S_S0_S0_ii
	.type	_Z13update_energyPiPfS_S_S0_S0_ii, @function
_Z13update_energyPiPfS_S_S0_S0_ii:
.LFB4770:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	%rdi, (%rsp)
	call	rand@PLT
	cltd
	idivl	80(%rsp)
	movl	%edx, 12(%rsp)
.L27:
	movl	12(%rsp), %eax
	cmpl	%eax, %r15d
	jge	.L32
	call	rand@PLT
	movsd	.LC3(%rip), %xmm2
	movsd	.LC4(%rip), %xmm3
	cltd
	movsd	.LC5(%rip), %xmm4
	movss	.LC6(%rip), %xmm5
	idivl	80(%rsp)
.L28:
	movq	(%rsp), %rcx
	movslq	%edx, %r9
	movl	(%rcx,%r9,4), %edx
	leaq	0(,%r9,4), %rax
	cmpl	$-1, %edx
	je	.L33
	movslq	%edx, %rdi
	leaq	0(,%rdi,4), %rsi
	incl	(%r12,%rsi)
	addq	%rbx, %rsi
	cvtss2sd	(%rsi), %xmm0
	subsd	.LC2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rsi)
	movss	(%r14,%r9,4), %xmm0
	movss	0(%r13,%r9,4), %xmm1
	subss	(%r14,%rdi,4), %xmm0
	subss	0(%r13,%rdi,4), %xmm1
	incl	0(%rbp,%rax)
	addq	%rbx, %rax
	mulss	%xmm1, %xmm1
	mulss	%xmm0, %xmm0
	addss	%xmm1, %xmm0
	movss	(%rax), %xmm1
	cvtss2sd	%xmm0, %xmm0
	mulsd	%xmm2, %xmm0
	addsd	%xmm3, %xmm0
	mulsd	%xmm4, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	mulss	%xmm5, %xmm0
	subss	%xmm0, %xmm1
	movss	%xmm1, (%rax)
	jmp	.L28
.L33:
	incl	%r15d
	jmp	.L27
.L32:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4770:
	.size	_Z13update_energyPiPfS_S_S0_S0_ii, .-_Z13update_energyPiPfS_S_S0_S0_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC7:
	.string	"dead: %d\n"
	.text
	.globl	_Z13check_failurePfiPi
	.type	_Z13check_failurePfiPi, @function
_Z13check_failurePfiPi:
.LFB4771:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
.L35:
	cmpl	%eax, %esi
	jle	.L41
	comiss	(%rdi,%rax,4), %xmm0
	leaq	1(%rax), %rcx
	jbe	.L40
	movl	$1, (%rdx)
	leaq	.LC7(%rip), %rsi
	movl	%eax, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	jmp	__printf_chk@PLT
.L40:
	movq	%rcx, %rax
	jmp	.L35
.L41:
	ret
	.cfi_endproc
.LFE4771:
	.size	_Z13check_failurePfiPi, .-_Z13check_failurePfiPi
	.globl	_Z11computeTimeRfP10CUevent_stS1_
	.type	_Z11computeTimeRfP10CUevent_stS1_, @function
_Z11computeTimeRfP10CUevent_stS1_:
.LFB4772:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	4(%rsp), %rdi
	movl	$0x00000000, 4(%rsp)
	call	cudaEventElapsedTime@PLT
	movss	(%rbx), %xmm0
	addss	4(%rsp), %xmm0
	movss	%xmm0, (%rbx)
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L43
	call	__stack_chk_fail@PLT
.L43:
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4772:
	.size	_Z11computeTimeRfP10CUevent_stS1_, .-_Z11computeTimeRfP10CUevent_stS1_
	.globl	_Z40__device_stub__Z10extractMinPiS_S_PfS_iiPiS_S_PfS_ii
	.type	_Z40__device_stub__Z10extractMinPiS_S_PfS_iiPiS_S_PfS_ii, @function
_Z40__device_stub__Z10extractMinPiS_S_PfS_iiPiS_S_PfS_ii:
.LFB4797:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L45
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z10extractMinPiS_S_PfS_ii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L45:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L47
	call	__stack_chk_fail@PLT
.L47:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4797:
	.size	_Z40__device_stub__Z10extractMinPiS_S_PfS_iiPiS_S_PfS_ii, .-_Z40__device_stub__Z10extractMinPiS_S_PfS_iiPiS_S_PfS_ii
	.globl	_Z10extractMinPiS_S_PfS_ii
	.type	_Z10extractMinPiS_S_PfS_ii, @function
_Z10extractMinPiS_S_PfS_ii:
.LFB4798:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z10extractMinPiS_S_PfS_iiPiS_S_PfS_ii
	.cfi_endproc
.LFE4798:
	.size	_Z10extractMinPiS_S_PfS_ii, .-_Z10extractMinPiS_S_PfS_ii
	.globl	_Z64__device_stub__Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_PiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
	.type	_Z64__device_stub__Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_PiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_, @function
_Z64__device_stub__Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_PiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_:
.LFB4799:
	.cfi_startproc
	endbr64
	subq	$328, %rsp
	.cfi_def_cfa_offset 336
	movq	336(%rsp), %rax
	movq	%rdi, 104(%rsp)
	leaq	128(%rsp), %rdi
	movq	%rsi, 96(%rsp)
	leaq	140(%rsp), %rsi
	movq	%rax, 56(%rsp)
	movq	344(%rsp), %rax
	movq	%rdx, 88(%rsp)
	leaq	112(%rsp), %rdx
	movq	%rax, 48(%rsp)
	movq	352(%rsp), %rax
	movq	%rcx, 80(%rsp)
	leaq	120(%rsp), %rcx
	movq	%rax, 40(%rsp)
	movq	384(%rsp), %rax
	movq	%r8, 72(%rsp)
	movq	%rax, 32(%rsp)
	movq	392(%rsp), %rax
	movq	%r9, 64(%rsp)
	movq	%rax, 24(%rsp)
	movq	400(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	408(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	416(%rsp), %rax
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 312(%rsp)
	xorl	%eax, %eax
	leaq	104(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	360(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	368(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	376(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 296(%rsp)
	movq	%rsp, %rax
	movq	%rax, 304(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 128(%rsp)
	movl	$1, 136(%rsp)
	movq	%rax, 140(%rsp)
	movl	$1, 148(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L50
	pushq	120(%rsp)
	.cfi_def_cfa_offset 344
	leaq	_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_(%rip), %rdi
	pushq	120(%rsp)
	.cfi_def_cfa_offset 352
	movq	156(%rsp), %rcx
	movl	164(%rsp), %r8d
	movq	144(%rsp), %rsi
	movl	152(%rsp), %edx
	leaq	192(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 344
	popq	%rdx
	.cfi_def_cfa_offset 336
.L50:
	movq	312(%rsp), %rax
	subq	%fs:40, %rax
	je	.L52
	call	__stack_chk_fail@PLT
.L52:
	addq	$328, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4799:
	.size	_Z64__device_stub__Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_PiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_, .-_Z64__device_stub__Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_PiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
	.globl	_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
	.type	_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_, @function
_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_:
.LFB4800:
	.cfi_startproc
	endbr64
	jmp	_Z64__device_stub__Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_PiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
	.cfi_endproc
.LFE4800:
	.size	_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_, .-_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
	.globl	_Z34__device_stub__Z10keepHeapPQPiPfiiPiPfii
	.type	_Z34__device_stub__Z10keepHeapPQPiPfiiPiPfii, @function
_Z34__device_stub__Z10keepHeapPQPiPfiiPiPfii:
.LFB4801:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L55
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10keepHeapPQPiPfii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L55:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L57
	call	__stack_chk_fail@PLT
.L57:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4801:
	.size	_Z34__device_stub__Z10keepHeapPQPiPfiiPiPfii, .-_Z34__device_stub__Z10keepHeapPQPiPfiiPiPfii
	.globl	_Z10keepHeapPQPiPfii
	.type	_Z10keepHeapPQPiPfii, @function
_Z10keepHeapPQPiPfii:
.LFB4802:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z10keepHeapPQPiPfiiPiPfii
	.cfi_endproc
.LFE4802:
	.size	_Z10keepHeapPQPiPfii, .-_Z10keepHeapPQPiPfii
	.globl	_Z29__device_stub__Z5setNVPiS_S_iPiS_S_i
	.type	_Z29__device_stub__Z5setNVPiS_S_iPiS_S_i, @function
_Z29__device_stub__Z5setNVPiS_S_iPiS_S_i:
.LFB4803:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L60
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z5setNVPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L60:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L62
	call	__stack_chk_fail@PLT
.L62:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4803:
	.size	_Z29__device_stub__Z5setNVPiS_S_iPiS_S_i, .-_Z29__device_stub__Z5setNVPiS_S_iPiS_S_i
	.globl	_Z5setNVPiS_S_i
	.type	_Z5setNVPiS_S_i, @function
_Z5setNVPiS_S_i:
.LFB4804:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z5setNVPiS_S_iPiS_S_i
	.cfi_endproc
.LFE4804:
	.size	_Z5setNVPiS_S_i, .-_Z5setNVPiS_S_i
	.globl	_Z37__device_stub__Z8insertPQPiS_S_PfiiS_PiS_S_PfiiS_
	.type	_Z37__device_stub__Z8insertPQPiS_S_PfiiS_PiS_S_PfiiS_, @function
_Z37__device_stub__Z8insertPQPiS_S_PfiiS_PiS_S_PfiiS_:
.LFB4805:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L65
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z8insertPQPiS_S_PfiiS_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L65:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L67
	call	__stack_chk_fail@PLT
.L67:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4805:
	.size	_Z37__device_stub__Z8insertPQPiS_S_PfiiS_PiS_S_PfiiS_, .-_Z37__device_stub__Z8insertPQPiS_S_PfiiS_PiS_S_PfiiS_
	.globl	_Z8insertPQPiS_S_PfiiS_
	.type	_Z8insertPQPiS_S_PfiiS_, @function
_Z8insertPQPiS_S_PfiiS_:
.LFB4806:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z8insertPQPiS_S_PfiiS_PiS_S_PfiiS_
	.cfi_endproc
.LFE4806:
	.size	_Z8insertPQPiS_S_PfiiS_, .-_Z8insertPQPiS_S_PfiiS_
	.section	.rodata.str1.1
.LC8:
	.string	"%d"
.LC9:
	.string	"r"
.LC10:
	.string	"graph_op.txt"
.LC11:
	.string	"graph.txt"
.LC12:
	.string	"%d %d\n"
.LC15:
	.string	"Cord.txt"
.LC16:
	.string	"%f %f\n"
.LC17:
	.string	"[INFO] completed taking input\n"
.LC18:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/lkoshale/DDP/master/WSN/wsn_min.cu"
.LC19:
	.string	"rounds: %d\n"
.LC20:
	.string	"time: %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB4768:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$42, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	.LC12(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	leaq	.LC9(%rip), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$360, %rsp
	.cfi_def_cfa_offset 416
	movq	%fs:40, %rax
	movq	%rax, 344(%rsp)
	xorl	%eax, %eax
	leaq	132(%rsp), %r14
	leaq	128(%rsp), %r13
	call	srand@PLT
	leaq	124(%rsp), %rsi
	leaq	.LC8(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movq	%rbp, %rsi
	leaq	.LC10(%rip), %rdi
	call	fopen@PLT
	movq	%rbp, %rsi
	leaq	.LC11(%rip), %rdi
	movq	%rax, 40(%rsp)
	call	fopen@PLT
	movq	40(%rsp), %rdi
	movq	%r14, %rcx
	movq	%r13, %rdx
	movq	%r12, %rsi
	movq	%rax, 48(%rsp)
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movq	48(%rsp), %rdi
	movq	%r14, %rcx
	movq	%r13, %rdx
	movq	%r12, %rsi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movslq	128(%rsp), %r14
	leal	-1(%r14), %eax
	movq	%r14, %rbx
	salq	$2, %r14
	movq	%r14, %rdi
	movl	%eax, 136(%rsp)
	call	malloc@PLT
	movslq	132(%rsp), %r13
	movq	%rax, 88(%rsp)
	salq	$2, %r13
	movq	%r13, %rdi
	call	malloc@PLT
	movq	%r14, %rdi
	movq	%rax, 96(%rsp)
	call	malloc@PLT
	movq	%r13, %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movq	%r14, %rdi
	movq	%rax, 104(%rsp)
	call	malloc@PLT
	movq	%r14, %rdi
	movq	%rax, 56(%rsp)
	call	malloc@PLT
	movq	%r14, %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movq	%r14, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movslq	124(%rsp), %r15
	movq	%rax, 64(%rsp)
	salq	$2, %r15
	movq	%r15, %rdi
	call	malloc@PLT
	movq	%r14, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	%r14, %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	%r14, %rdi
	movq	%rax, 32(%rsp)
	call	malloc@PLT
	movq	%r14, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	%r14, %rdi
	movq	%rax, 72(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	movq	%r15, %rcx
	movq	%r15, %rdx
	movq	%rax, 80(%rsp)
	call	__memset_chk@PLT
	movq	64(%rsp), %rdi
	movq	%r14, %rcx
	movq	%r14, %rdx
	orl	$-1, %esi
	call	__memset_chk@PLT
	movq	16(%rsp), %rdi
	orl	$-1, %esi
	movq	%r14, %rcx
	movq	%r14, %rdx
	call	__memset_chk@PLT
	movss	.LC13(%rip), %xmm0
	movss	.LC14(%rip), %xmm1
	xorl	%eax, %eax
.L71:
	cmpl	%eax, %ebx
	jle	.L98
	movq	(%rsp), %rcx
	movss	%xmm0, 0(%r13,%rax,4)
	movss	%xmm1, (%rcx,%rax,4)
	incq	%rax
	jmp	.L71
.L98:
	movq	96(%rsp), %rbp
	movq	104(%rsp), %r14
	xorl	%ebx, %ebx
	leaq	.LC8(%rip), %r15
.L73:
	cmpl	%ebx, 132(%rsp)
	jle	.L99
	movq	40(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r15, %rsi
	xorl	%eax, %eax
	incl	%ebx
	addq	$4, %rbp
	call	__isoc23_fscanf@PLT
	movq	48(%rsp), %rdi
	movq	%r14, %rdx
	movq	%r15, %rsi
	xorl	%eax, %eax
	addq	$4, %r14
	call	__isoc23_fscanf@PLT
	jmp	.L73
.L99:
	movq	88(%rsp), %rbp
	movq	%r12, %r14
	xorl	%ebx, %ebx
	leaq	.LC8(%rip), %r15
.L75:
	cmpl	%ebx, 128(%rsp)
	jle	.L100
	movq	40(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r15, %rsi
	xorl	%eax, %eax
	incl	%ebx
	addq	$4, %rbp
	call	__isoc23_fscanf@PLT
	movq	48(%rsp), %rdi
	movq	%r14, %rdx
	movq	%r15, %rsi
	xorl	%eax, %eax
	addq	$4, %r14
	call	__isoc23_fscanf@PLT
	jmp	.L75
.L100:
	movq	48(%rsp), %rdi
	xorl	%ebp, %ebp
	leaq	.LC16(%rip), %rbx
	call	fclose@PLT
	movq	40(%rsp), %rdi
	call	fclose@PLT
	leaq	.LC9(%rip), %rsi
	leaq	.LC15(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %r14
.L77:
	cmpl	%ebp, 128(%rsp)
	jle	.L101
	leaq	332(%rsp), %rcx
	movq	%rbx, %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	leaq	320(%rsp), %rdx
	call	__isoc23_fscanf@PLT
	movq	24(%rsp), %rax
	movss	320(%rsp), %xmm0
	movss	%xmm0, (%rax,%rbp,4)
	movq	32(%rsp), %rax
	movss	332(%rsp), %xmm0
	movss	%xmm0, (%rax,%rbp,4)
	incq	%rbp
	jmp	.L77
.L101:
	movq	%r14, %rdi
	leaq	.LC18(%rip), %r14
	call	fclose@PLT
	movl	136(%rsp), %eax
	movq	%r12, %rdi
	pushq	%rax
	.cfi_def_cfa_offset 424
	movl	140(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 432
	movl	144(%rsp), %r9d
	movq	48(%rsp), %r8
	movq	40(%rsp), %rcx
	movq	120(%rsp), %rsi
	movq	72(%rsp), %rdx
	call	_Z7calc_hxPiS_PfS0_S0_iii
	popq	%rax
	.cfi_def_cfa_offset 424
	movl	$2, %edi
	popq	%rdx
	.cfi_def_cfa_offset 416
	leaq	.LC17(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$4, %edi
	call	malloc@PLT
	movl	$4, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$4, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movslq	128(%rsp), %rbx
	movq	%rax, %r15
	salq	$2, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdx
	orl	$-1, %esi
	movq	%rbx, %rcx
	movq	%rax, %rdi
	movq	%rax, 40(%rsp)
	call	__memset_chk@PLT
	xorl	%ecx, %ecx
	movl	$4, %edi
	movl	%ecx, (%r12)
	movl	%ecx, 0(%rbp)
	movl	%ecx, (%r15)
	call	malloc@PLT
	xorl	%esi, %esi
	leaq	144(%rsp), %rdi
	movl	$0x00000000, 140(%rsp)
	movl	%esi, (%rax)
	movq	%rax, %rbp
	call	cudaEventCreate@PLT
	leaq	152(%rsp), %rdi
	call	cudaEventCreate@PLT
	movslq	128(%rsp), %rsi
	leaq	160(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$447, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	132(%rsp), %rsi
	leaq	168(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$448, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	128(%rsp), %rsi
	leaq	176(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$450, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	128(%rsp), %rsi
	leaq	184(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$451, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	128(%rsp), %rsi
	leaq	192(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$453, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	124(%rsp), %rsi
	leaq	200(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$455, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	128(%rsp), %rsi
	leaq	208(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$457, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	128(%rsp), %rsi
	leaq	216(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$458, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	128(%rsp), %rsi
	leaq	232(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$461, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	240(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$462, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	128(%rsp), %rsi
	leaq	224(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$463, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	124(%rsp), %rsi
	leaq	248(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$466, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	256(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$467, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	264(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$470, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	272(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$471, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	128(%rsp), %rsi
	leaq	296(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$474, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	128(%rsp), %rsi
	leaq	280(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$475, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	128(%rsp), %rsi
	leaq	288(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$476, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	128(%rsp), %rsi
	leaq	304(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$477, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	128(%rsp), %rsi
	leaq	312(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$478, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	88(%rsp), %rsi
	movl	$1, %ecx
	movslq	128(%rsp), %rdx
	movq	160(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$481, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	96(%rsp), %rsi
	movl	$1, %ecx
	movslq	132(%rsp), %rdx
	movq	168(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$482, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	56(%rsp), %rsi
	movl	$1, %ecx
	movslq	128(%rsp), %rdx
	movq	176(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$483, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	128(%rsp), %rdx
	movl	$1, %ecx
	movq	%r13, %rsi
	movq	184(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$484, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	128(%rsp), %rdx
	movq	216(%rsp), %rdi
	xorl	%esi, %esi
	salq	$2, %rdx
	call	cudaMemset@PLT
	movl	$1, %ecx
	movl	$486, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	(%rsp), %rsi
	movl	$1, %ecx
	movslq	128(%rsp), %rdx
	movq	296(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$488, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movslq	128(%rsp), %rdx
	movq	280(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$489, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	32(%rsp), %rsi
	movl	$1, %ecx
	movslq	128(%rsp), %rdx
	movq	288(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$490, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	128(%rsp), %rdx
	movl	$1, %esi
	movq	304(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemset@PLT
	movl	$1, %ecx
	movl	$493, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	128(%rsp), %rdx
	movl	$1, %esi
	movq	312(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemset@PLT
	movl	$1, %ecx
	movl	$494, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	124(%rsp), %eax
	movl	$512, %esi
	xorl	%edi, %edi
	movl	128(%rsp), %ecx
	addl	$511, %eax
	cltd
	idivl	%esi
	movl	%eax, %ebx
	leal	511(%rcx), %eax
	cltd
	idivl	%esi
	movq	56(%rsp), %rdx
	movq	%r13, %rsi
	movl	%eax, %r12d
	movslq	136(%rsp), %rax
	movss	(%rdx,%rax,4), %xmm0
	movq	8(%rsp), %rdx
	movss	%xmm0, 0(%r13,%rax,4)
	movl	$1, (%rdx)
	movq	64(%rsp), %rdx
	movl	%edi, (%rdx,%rax,4)
	movq	184(%rsp), %rdi
	movslq	%ecx, %rdx
	movl	$1, %ecx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$512, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	$1, %r8d
	xorl	%ecx, %ecx
	leaq	136(%rsp), %rsi
	movl	$4, %edx
	leaq	_ZL2PQ(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	$1, %ecx
	movl	$513, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movslq	128(%rsp), %rdx
	movq	192(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$515, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	64(%rsp), %rsi
	movl	$1, %ecx
	movslq	128(%rsp), %rdx
	movq	208(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$516, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	124(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	200(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$517, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	40(%rsp), %rsi
	movl	$1, %ecx
	movslq	128(%rsp), %rdx
	movq	224(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$520, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	240(%rsp), %rdi
	movl	$1, %ecx
	movq	%r15, %rsi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$522, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	256(%rsp), %rdi
	movl	$1, %ecx
	movq	%r15, %rsi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$523, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	124(%rsp), %ecx
	xorl	%edx, %edx
	xorl	%eax, %eax
	movl	$1, %esi
.L79:
	cmpl	%edx, %ecx
	jle	.L102
	movq	8(%rsp), %rdi
	cmpl	$0, (%rdi,%rdx,4)
	cmovg	%esi, %eax
	incq	%rdx
	jmp	.L79
.L102:
	movabsq	$4294967808, %r13
.L82:
	decl	%eax
	jne	.L103
	movq	144(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, %rdx
	movabsq	$4294967297, %rax
	movl	%ebx, 320(%rsp)
	movl	$1, %ecx
	movq	%rax, 324(%rsp)
	movq	320(%rsp), %rdi
	movl	328(%rsp), %esi
	movq	%r13, 332(%rsp)
	movl	$1, 340(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L83
	pushq	%r11
	.cfi_def_cfa_offset 424
	movl	132(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 432
	movl	144(%rsp), %r9d
	movq	224(%rsp), %r8
	movq	200(%rsp), %rcx
	movq	272(%rsp), %rdx
	movq	264(%rsp), %rsi
	movq	216(%rsp), %rdi
	call	_Z40__device_stub__Z10extractMinPiS_S_PfS_iiPiS_S_PfS_ii
	popq	%r14
	.cfi_def_cfa_offset 424
	popq	%rax
	.cfi_def_cfa_offset 416
.L83:
	call	cudaPeekAtLastError@PLT
	movl	$1, %ecx
	movl	$538, %edx
	leaq	.LC18(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movq	152(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	152(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	152(%rsp), %rdx
	movq	144(%rsp), %rsi
	leaq	140(%rsp), %rdi
	call	_Z11computeTimeRfP10CUevent_stS1_
	movq	144(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, %rdx
	movabsq	$4294967297, %rax
	movl	%ebx, 320(%rsp)
	movl	$1, %ecx
	movq	%rax, 324(%rsp)
	movq	320(%rsp), %rdi
	movl	328(%rsp), %esi
	movq	%r13, 332(%rsp)
	movl	$1, 340(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L84
	pushq	%r10
	.cfi_def_cfa_offset 424
	pushq	312(%rsp)
	.cfi_def_cfa_offset 432
	pushq	328(%rsp)
	.cfi_def_cfa_offset 440
	pushq	320(%rsp)
	.cfi_def_cfa_offset 448
	pushq	232(%rsp)
	.cfi_def_cfa_offset 456
	pushq	264(%rsp)
	.cfi_def_cfa_offset 464
	movl	172(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 472
	movl	188(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 480
	movl	192(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 488
	pushq	280(%rsp)
	.cfi_def_cfa_offset 496
	pushq	296(%rsp)
	.cfi_def_cfa_offset 504
	pushq	344(%rsp)
	.cfi_def_cfa_offset 512
	movq	344(%rsp), %r9
	movq	280(%rsp), %r8
	movq	288(%rsp), %rcx
	movq	272(%rsp), %rdx
	movq	264(%rsp), %rsi
	movq	256(%rsp), %rdi
	call	_Z64__device_stub__Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_PiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
	addq	$96, %rsp
	.cfi_def_cfa_offset 416
.L84:
	call	cudaPeekAtLastError@PLT
	movl	$1, %ecx
	movl	$551, %edx
	leaq	.LC18(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movq	152(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	152(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	152(%rsp), %rdx
	movq	144(%rsp), %rsi
	leaq	140(%rsp), %rdi
	call	_Z11computeTimeRfP10CUevent_stS1_
	movq	144(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, %rdx
	movabsq	$4294967297, %rax
	movl	%ebx, 320(%rsp)
	movl	$1, %ecx
	movq	%rax, 324(%rsp)
	movq	320(%rsp), %rdi
	movl	328(%rsp), %esi
	movq	%r13, 332(%rsp)
	movl	$1, 340(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L85
	movl	124(%rsp), %ecx
	movl	128(%rsp), %edx
	movq	184(%rsp), %rsi
	movq	200(%rsp), %rdi
	call	_Z34__device_stub__Z10keepHeapPQPiPfiiPiPfii
.L85:
	call	cudaPeekAtLastError@PLT
	movl	$1, %ecx
	movl	$560, %edx
	leaq	.LC18(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movq	152(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	152(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	152(%rsp), %rdx
	movq	144(%rsp), %rsi
	leaq	140(%rsp), %rdi
	call	_Z11computeTimeRfP10CUevent_stS1_
	movq	144(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, %rdx
	movabsq	$4294967297, %rax
	movl	%r12d, 320(%rsp)
	movl	$1, %ecx
	movq	%rax, 324(%rsp)
	movq	320(%rsp), %rdi
	movl	328(%rsp), %esi
	movq	%r13, 332(%rsp)
	movl	$1, 340(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L86
	movl	128(%rsp), %ecx
	movq	240(%rsp), %rdx
	movq	232(%rsp), %rsi
	movq	224(%rsp), %rdi
	call	_Z29__device_stub__Z5setNVPiS_S_iPiS_S_i
.L86:
	call	cudaPeekAtLastError@PLT
	movl	$1, %ecx
	movl	$570, %edx
	leaq	.LC18(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movq	152(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	152(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	152(%rsp), %rdx
	movq	144(%rsp), %rsi
	leaq	140(%rsp), %rdi
	call	_Z11computeTimeRfP10CUevent_stS1_
	movq	144(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, %rdx
	movabsq	$4294967297, %rax
	movl	%ebx, 320(%rsp)
	movl	$1, %ecx
	movq	%rax, 324(%rsp)
	movq	320(%rsp), %rdi
	movl	328(%rsp), %esi
	movq	%r13, 332(%rsp)
	movl	$1, 340(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L87
	pushq	%rdi
	.cfi_def_cfa_offset 424
	pushq	216(%rsp)
	.cfi_def_cfa_offset 432
	movl	144(%rsp), %r9d
	movl	140(%rsp), %r8d
	movq	200(%rsp), %rcx
	movq	256(%rsp), %rdx
	movq	248(%rsp), %rsi
	movq	216(%rsp), %rdi
	call	_Z37__device_stub__Z8insertPQPiS_S_PfiiS_PiS_S_PfiiS_
	popq	%r8
	.cfi_def_cfa_offset 424
	popq	%r9
	.cfi_def_cfa_offset 416
.L87:
	call	cudaPeekAtLastError@PLT
	movl	$1, %ecx
	movl	$580, %edx
	leaq	.LC18(%rip), %r14
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movq	152(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	152(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	152(%rsp), %rdx
	movq	144(%rsp), %rsi
	leaq	140(%rsp), %rdi
	call	_Z11computeTimeRfP10CUevent_stS1_
	movslq	124(%rsp), %rdx
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movq	200(%rsp), %rsi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	%r14, %rsi
	movl	$1, %ecx
	movl	$587, %edx
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	40(%rsp), %rsi
	movl	$1, %ecx
	movslq	128(%rsp), %rdx
	movq	224(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	%r14, %rsi
	movl	$1, %ecx
	movl	$590, %edx
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	240(%rsp), %rdi
	movl	$1, %ecx
	movq	%r15, %rsi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movq	%r14, %rsi
	movl	$1, %ecx
	movl	$593, %edx
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	256(%rsp), %rdi
	movl	$1, %ecx
	movq	%r15, %rsi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$594, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	xorl	%r14d, %r14d
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	124(%rsp), %edx
	xorl	%eax, %eax
	movl	$1, %ecx
.L88:
	cmpl	%eax, %edx
	jle	.L104
	movq	8(%rsp), %rsi
	cmpl	$0, (%rsi,%rax,4)
	cmovg	%ecx, %r14d
	incq	%rax
	jmp	.L88
.L104:
	movslq	128(%rsp), %rdx
	movq	16(%rsp), %rdi
	movl	$2, %ecx
	movq	192(%rsp), %rsi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$603, %edx
	leaq	.LC18(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	%r14d, %eax
	jmp	.L82
.L103:
	movl	136(%rsp), %eax
	leaq	.LC18(%rip), %rbx
	pushq	%rax
	.cfi_def_cfa_offset 424
	movl	136(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 432
	movq	48(%rsp), %r9
	movq	40(%rsp), %r8
	movq	96(%rsp), %rdx
	movq	32(%rsp), %rdi
	movq	88(%rsp), %rcx
	movq	16(%rsp), %rsi
	call	_Z13update_energyPiPfS_S_S0_S0_ii
	popq	%rcx
	.cfi_def_cfa_offset 424
	popq	%rsi
	.cfi_def_cfa_offset 416
	movl	$1, %ecx
	movslq	128(%rsp), %rdx
	movq	72(%rsp), %rsi
	movq	304(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$624, %edx
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	80(%rsp), %rsi
	movl	$1, %ecx
	movslq	128(%rsp), %rdx
	movq	312(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$625, %edx
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	(%rsp), %rsi
	movl	$1, %ecx
	movslq	128(%rsp), %rdx
	movq	296(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$627, %edx
	movl	%eax, %edi
	movl	$1, %ebx
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	128(%rsp), %esi
	movq	(%rsp), %rdi
	movq	%rbp, %rdx
	call	_Z13check_failurePfiPi
.L92:
	cmpl	$0, 0(%rbp)
	jne	.L105
	movl	136(%rsp), %eax
	incl	%ebx
	pushq	%rax
	.cfi_def_cfa_offset 424
	movl	136(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 432
	movq	48(%rsp), %r9
	movq	40(%rsp), %r8
	movq	88(%rsp), %rcx
	movq	16(%rsp), %rsi
	movq	32(%rsp), %rdi
	movq	96(%rsp), %rdx
	call	_Z13update_energyPiPfS_S_S0_S0_ii
	popq	%rax
	.cfi_def_cfa_offset 424
	popq	%rdx
	.cfi_def_cfa_offset 416
	movq	%rbp, %rdx
	movl	128(%rsp), %esi
	movq	(%rsp), %rdi
	call	_Z13check_failurePfiPi
	jmp	.L92
.L105:
	leaq	.LC19(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movl	%ebx, %edx
	call	__printf_chk@PLT
	leaq	.LC20(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	140(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	344(%rsp), %rax
	subq	%fs:40, %rax
	je	.L94
	call	__stack_chk_fail@PLT
.L94:
	addq	$360, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4768:
	.size	main, .-main
	.section	.rodata.str1.1
.LC21:
	.string	"_Z8insertPQPiS_S_PfiiS_"
.LC22:
	.string	"_Z5setNVPiS_S_i"
.LC23:
	.string	"_Z10keepHeapPQPiPfii"
.LC24:
	.string	"_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_"
.LC25:
	.string	"_Z10extractMinPiS_S_PfS_ii"
.LC26:
	.string	"PQ"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4808:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC21(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8insertPQPiS_S_PfiiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC22(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z5setNVPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC23(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10keepHeapPQPiPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC24(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC25(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10extractMinPiS_S_PfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC26(%rip), %rdx
	movl	$400000000, %r9d
	leaq	_ZL2PQ(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4808:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL2PQ
	.comm	_ZL2PQ,400000000,32
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	-1698910392
	.long	1058723826
	.align 8
.LC3:
	.long	-640172613
	.long	1037794527
	.align 8
.LC4:
	.long	-1698910392
	.long	1047189490
	.align 8
.LC5:
	.long	0
	.long	1084227584
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC6:
	.long	1120403456
	.align 4
.LC13:
	.long	2139095039
	.set	.LC14,.LC5+4
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <limits.h>
#include <math.h>
#include <float.h>
#include <iostream>
#include <vector>
#include <unordered_map>
#include <string>
#include <algorithm>




/***all macros**/
#define E_INIT  5            // in joules
#define E_ELEC  50e-9          //in nj = 1e-9j
#define E_AMP   100e-12          // in pj = 1e-12j
#define ALPHA   0.7     
#define BETA    0.3
#define DELTA   0.0 


#define  MAX_NODE  100000000
#define  DEBUG 1




#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
   if (code != hipSuccess) 
   {
      fprintf(stderr,"GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}

/**all type declaration***/

using namespace std;

class Node{
public:
    unsigned int val;
    vector<unsigned int> weights;
    vector<Node*> Edges;

    Node(int val){
        this->val = val;
    }

    void addEdge(Node* v,unsigned int w){
        this->Edges.push_back(v);
        this->weights.push_back(w);
    }

};

//all fn declarations here
void calc_hx(int* offset,int* edges,float* hx,float* cord_x,float* cord_y,int N,int E,int sink);

void update_energy(int* parent,float* res_energy,int* Nt,int* Nr,float* cord_x,float* cord_y,int N,int sink);

void check_failure(float* res_energy,int N, int* flag);

void computeTime(float& time,hipEvent_t start, hipEvent_t stop);

/**** device Code *******/

// __device__ volatile int Cx[MAX_NODE];
__device__ volatile int PQ[MAX_NODE];


//K in parallel
__global__ void extractMin(int* PQ_size, int* expandNodes,int* expandNodes_size,float* Cx,int* openList,int N,int K){
    
    int id = blockIdx.x*blockDim.x+threadIdx.x;
    
    if(id<K && PQ_size[id]>0){

        //extract min from PQ
        int front = id* ( (N+K-1)/K );
        int node = PQ[front];

        // restructure the heap
        PQ[front]=PQ[front+PQ_size[id]-1];
        PQ_size[id]-=1;
        int pqIndex = 0;

        while(2*pqIndex+1 < PQ_size[id]){
            if(2*pqIndex+2 >= PQ_size[id]){
                if( Cx[PQ[front+pqIndex]] > Cx[PQ[front+2*pqIndex+1]]){
                    int swap = PQ[front + 2*pqIndex+1];
                    PQ[front + 2*pqIndex+1] = PQ[front +pqIndex];
                    PQ[front + pqIndex] = swap;
                    pqIndex = 2*pqIndex+1;
                }
                else
                    break;
            }
            else{
                if( Cx[PQ[front+pqIndex]] > Cx[PQ[front+2*pqIndex+1]] && Cx[PQ[front+2*pqIndex+1]] <= Cx[PQ[front+2*pqIndex+2]] ){
                    int swap = PQ[front + 2*pqIndex+1];
                    PQ[front + 2*pqIndex+1] = PQ[front +pqIndex];
                    PQ[front + pqIndex] = swap;
                    pqIndex = 2*pqIndex+1;
                }
                else if(Cx[PQ[front+pqIndex]] > Cx[PQ[front+2*pqIndex+2]] && Cx[PQ[front+2*pqIndex+2]] <= Cx[PQ[front+2*pqIndex+1]] ){
                    int swap = PQ[front + 2*pqIndex+2];
                    PQ[front + 2*pqIndex+2] = PQ[front +pqIndex];
                    PQ[front + pqIndex] = swap;
                    pqIndex = 2*pqIndex+2;                    
                } 
                else{
                    break;
                }
            }
            
        }

        //removed from openList
        openList[node] = -1;

        //added to expand next
        int len = atomicAdd(expandNodes_size,1);
        expandNodes[len]=node;
    }

}

//for K in parallel
__global__ void A_star_expand(int* off,int* edge,float* Hx,int* parent,volatile float* Cx,
    int* expandNodes,int* expandNodes_size, int* lock,int* openList,
    int N,int E, int K,int* nVFlag,int* PQ_size,
    float* res_energy,int* Nt,int* Nr){
       
    int id = blockIdx.x*blockDim.x+threadIdx.x;
    
    if(id< *expandNodes_size ){

        int node = expandNodes[id];

        // expand
        int start = off[node];
        int end = E;
        if(node!=N-1)
            end = off[node+1];
        
        while(start < end){ 
            int child = edge[start];
            
            //deleted edges
            if(child<0){
                start++;
                continue;
            }

            //array L initilaized with 0
            //get the lock for child to update C(x)
            //loop till acquire the lock
            bool leaveLoop = false;

            while(leaveLoop==false){

                if(atomicCAS(&lock[child],0,1)==0){
                    //critical section
                    float exp_weight = 1 ;
                   
                    if( Cx[child] > (Cx[node] - Hx[node])+ exp_weight + Hx[child] ){
                        Cx[child]  = (Cx[node] - Hx[node])+ exp_weight + Hx[child];
                        __threadfence();
                        parent[child] = node;
        
                        if(openList[child]==-1){
                            nVFlag[child]=1;
                            //add only once
                        }
                    }

                    //end critical section
                    leaveLoop = true;

                    atomicCAS(&lock[child],1,0);

                }

                __syncthreads();

            }

            start++;
        }
        
    }//end 

}

//K in parallel -- O(N)
__global__ void keepHeapPQ(int* PQ_size,float* Cx,int N,int K){
    int id = blockIdx.x*blockDim.x+threadIdx.x;
    if(id < K && PQ_size[id] > 0){
        int front  = id*( (N+K-1)/K );
        int size = PQ_size[id];
        
        for(int i=front;i<front+size;i++){
            if(2*i+2 < front+size){
                int cost = Cx[PQ[i]];
                int costLeft = Cx[PQ[2*i+1]];
                int costRight = Cx[PQ[2*i+2]]; 

                if( cost > costLeft  ||  cost > costRight  ){
                    int index ;
                    if(costLeft <= costRight)
                        index = 2*i+1;
                    else
                        index = 2*i+2;
                    
                    while(index > front){
                        if( Cx[PQ[(index-1)/2]] > Cx[PQ[index]] ){
                            int swap = PQ[index];
                            PQ[index] = PQ[(index-1)/2];
                            PQ[(index-1)/2] = swap;
                            index = (index-1)/2;
                        }
                        else
                            break;
                    }
                }
            }
            else if(2*i+1 < front+size){
                if(Cx[PQ[i]] > Cx[PQ[2*i+1]]){
                    int index = 2*i+1;
                    while(index > front){
                        if( Cx[PQ[(index-1)/2]] > Cx[PQ[index]] ){
                            int swap = PQ[index];
                            PQ[index] = PQ[(index-1)/2];
                            PQ[(index-1)/2] = swap;
                            index = (index-1)/2;
                        }
                        else
                            break;
                    }
                }
            }
        }
    }
}

//N threads
__global__ void setNV(int* nextFlag,int* nextV,int* nvSize,int N){
    int id = blockIdx.x*blockDim.x+threadIdx.x;
    if(id < N){
        if(nextFlag[id]==1){
            int index = atomicAdd(nvSize,1);
            nextV[index]=id;
        }
    }
}


//for K in parallel
__global__ void insertPQ(int* PQS,int* nextV,int* nVsize,float* Cx,int K,int N,int* openList){
    int id = blockIdx.x*blockDim.x+threadIdx.x;
    if(id < K){

        int front = id*( (N+K-1)/K );
        int i = id;
        
        while(i<*nVsize){            
            //if not already present
            if(openList[nextV[i]]!=-1){
                i+=K;
                continue;
            }

            PQ[front+PQS[id]]= nextV[i];
            PQS[id]+=1;

            //add in openList
            openList[nextV[i]] = id;

            if(PQS[id]>1){
                int index = PQS[id]-1;
                while(index>0){
                    if(Cx[PQ[front+ (index-1)/2]] > Cx[PQ[front+index]]){
                        int swap = PQ[front+index];
                        PQ[front+index]=PQ[front+ (index-1)/2];
                        PQ[front+ (index-1)/2] = swap;
                        index = (index-1)/2;
                    }
                    else
                        break;
                }
            }
            i += K;
        }
    }
}


int main(){

    //seed
    srand(42);

    //the K PQ
    int K ;
    scanf("%d",&K);

    FILE* fgraph = fopen("graph_op.txt","r");
    FILE* fgraph_rev = fopen("graph.txt","r");
    int N,E;
   
    fscanf(fgraph,"%d %d\n",&N,&E);
    fscanf(fgraph_rev,"%d %d\n",&N,&E);

    int startNode = N-1;

    int* H_offset = (int*)malloc(sizeof(int)*N);
    int* H_edges  = (int*)malloc(sizeof(int)*E);

    //rev graph
    int* H_rev_offset  = (int*)malloc(sizeof(int)*N);
    int* H_rev_edges = (int*)malloc(sizeof(int)*E);

    //weight is hop count =1
    
    float* H_hx = (float*)malloc(sizeof(float)*N);
    float* H_cx = (float*)malloc(sizeof(float)*N);

    int* H_parent = (int*)malloc(sizeof(int)*N);

    int* H_openList = (int*)malloc(sizeof(int)*N);
    int* H_PQ_size = (int*)malloc(sizeof(int)*K);


    //to compute distance
    float* H_cord_x = (float*)malloc(sizeof(float)*N);
    float* H_cord_y = (float*)malloc(sizeof(float)*N);

    float* H_res_energy = (float*)malloc(sizeof(float)*N);

    int* H_packet_recv =  (int*)malloc(sizeof(int)*N);
    int* H_packet_sent = (int*)malloc(sizeof(int)*N);

    memset(H_PQ_size,0,sizeof(int)*K);
    memset(H_openList,-1,sizeof(int)*N);
    
    memset(H_parent,-1,sizeof(int)*N);

    for(int i=0;i<N;i++){
        H_cx[i] = FLT_MAX;
        H_res_energy[i] = E_INIT;
    }

    for(int i=0;i<E;i++){
        fscanf(fgraph,"%d",&H_edges[i]);  
        fscanf(fgraph_rev,"%d",&H_rev_edges[i]);
    }

    for(int i=0;i<N;i++){
        fscanf(fgraph,"%d",&H_offset[i]);
        fscanf(fgraph_rev,"%d",&H_rev_offset[i]);
    }

    fclose(fgraph_rev);
    fclose(fgraph);

    FILE* f_cord = fopen("Cord.txt","r");
    for(int i=0;i<N;i++){
        float x,y; 
        fscanf(f_cord,"%f %f\n",&x,&y);
        H_cord_x[i]= x;
        H_cord_y[i] = y;
    }
    fclose(f_cord);

    calc_hx(H_rev_offset,H_rev_edges,H_hx,H_cord_x,H_cord_y,N,E,startNode);

    printf("[INFO] completed taking input\n");

    
    //init Host var
    int* H_flagEnd = (int*)malloc(sizeof(int));
    int* H_flagfound = (int*)malloc(sizeof(int));
    int* H_a0 = (int*)malloc(sizeof(int));

    int* H_nV_size = (int*)malloc(sizeof(int));
    int* H_nV = (int*)malloc(sizeof(int)*N);

    //required coz if many tries to add same in diff threads high low lower
    int* H_nVFlag = (int*)malloc(sizeof(int)*N);
    memset(H_nVFlag,-1,sizeof(int)*N);    

    *H_flagEnd = 0;
    *H_flagfound = 0;
    *H_a0 = 0;

    int* H_end_A_star = (int*)malloc(sizeof(int));
    *H_end_A_star = 0;

    //device var
    //graph struture
    float run_time = 0;
    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);
    int* D_offset;
    int* D_edges ;
    float* D_hx;
    float* D_Cx;
    
    int* D_parent;

    //Priority queue size
    int* D_PQ_size;

    //flag if in openList(contains which PQ)
    int* D_openList;
    //lock for nodes
    int* D_lock;
    //next nodes flag
    int* D_nVFlag;
    //next nodes array to insert PQ
    int* D_nV;
    int* D_nV_size;
    
    //nodes to be expanded ( extracted from PQ )
    int* D_expandNodes;
    int* D_expandNodes_size;
    
    //flag to end while loop and found the destination
    int* D_flagEnd;
    int* D_flagfound;

    float* D_cord_x;
    float* D_cord_y;

    float* D_res_energy;
    int* D_packet_recv;
    int* D_packet_sent;

    gpuErrchk ( hipMalloc(&D_offset,sizeof(int)*N) );
    gpuErrchk ( hipMalloc(&D_edges,sizeof(int)*E) );

    gpuErrchk ( hipMalloc(&D_hx,sizeof(float)*N) );
    gpuErrchk ( hipMalloc(&D_Cx,sizeof(float)*N) );
   
    gpuErrchk ( hipMalloc(&D_parent,sizeof(int)*N) );
    
    gpuErrchk ( hipMalloc(&D_PQ_size,sizeof(int)*K) );
    
    gpuErrchk ( hipMalloc(&D_openList,sizeof(int)*N) );
    gpuErrchk ( hipMalloc(&D_lock,sizeof(int)*N) );

    //for next set of vertices to add in PQ
    gpuErrchk ( hipMalloc(&D_nV,sizeof(int)*N) );
    gpuErrchk ( hipMalloc(&D_nV_size,sizeof(int)) );
    gpuErrchk ( hipMalloc(&D_nVFlag,sizeof(int)*N) );

    //next nodes to expand
    gpuErrchk ( hipMalloc(&D_expandNodes,sizeof(int)*K) );  //changed to K
    gpuErrchk ( hipMalloc(&D_expandNodes_size,sizeof(int)) );

    //flag to end search
    gpuErrchk( hipMalloc(&D_flagEnd,sizeof(int)) );
    gpuErrchk( hipMalloc(&D_flagfound,sizeof(int)) );
    
    //energy and cords
    gpuErrchk ( hipMalloc(&D_res_energy,sizeof(float)*N) );
    gpuErrchk ( hipMalloc(&D_cord_x,sizeof(float)*N) );
    gpuErrchk ( hipMalloc(&D_cord_y,sizeof(float)*N) );
    gpuErrchk( hipMalloc(&D_packet_recv,sizeof(int)*N) );
    gpuErrchk( hipMalloc(&D_packet_sent,sizeof(int)*N) );

    //copy
    gpuErrchk ( hipMemcpy(D_offset,H_offset,sizeof(int)*N,hipMemcpyHostToDevice) );
    gpuErrchk ( hipMemcpy(D_edges,H_edges,sizeof(int)*E,hipMemcpyHostToDevice) );
    gpuErrchk ( hipMemcpy(D_hx,H_hx,sizeof(float)*N,hipMemcpyHostToDevice) );
    gpuErrchk ( hipMemcpy(D_Cx,H_cx,sizeof(float)*N,hipMemcpyHostToDevice) );
    
    gpuErrchk ( hipMemset(D_lock,0,sizeof(int)*N) );

    gpuErrchk ( hipMemcpy(D_res_energy,H_res_energy,sizeof(float)*N,hipMemcpyHostToDevice) );
    gpuErrchk ( hipMemcpy(D_cord_x,H_cord_x,sizeof(float)*N,hipMemcpyHostToDevice) );
    gpuErrchk ( hipMemcpy(D_cord_y,H_cord_y,sizeof(float)*N,hipMemcpyHostToDevice) );
    
    //1 TO EVADE DIVIDE BY 0 ERROR
    gpuErrchk ( hipMemset(D_packet_recv,1,sizeof(int)*N) );
    gpuErrchk ( hipMemset(D_packet_sent,1,sizeof(int)*N) );


    int count_round = 0;

    int numThreads = 512;
    int numBlocks = (K+numThreads-1)/numThreads;
    int N_numBlocks = (N+numThreads-1)/numThreads;



        //A* algo
        H_cx[startNode]=H_hx[startNode];
        // H_PQ[0]=startNode;
        H_PQ_size[0]=1;
        H_openList[startNode]=0;

        //reset
        gpuErrchk ( hipMemcpy(D_Cx,H_cx,sizeof(float)*N,hipMemcpyHostToDevice) );          
        gpuErrchk ( hipMemcpyToSymbol(HIP_SYMBOL(PQ),&startNode, sizeof(int), 0, hipMemcpyHostToDevice) );

        gpuErrchk ( hipMemcpy(D_parent,H_parent,sizeof(int)*N,hipMemcpyHostToDevice) );
        gpuErrchk ( hipMemcpy(D_openList,H_openList,sizeof(int)*N,hipMemcpyHostToDevice) );
        gpuErrchk ( hipMemcpy(D_PQ_size,H_PQ_size,sizeof(int)*K,hipMemcpyHostToDevice) );
    
        
        gpuErrchk ( hipMemcpy(D_nVFlag,H_nVFlag,sizeof(int)*N,hipMemcpyHostToDevice) );
    
        gpuErrchk ( hipMemcpy(D_nV_size,H_a0,sizeof(int),hipMemcpyHostToDevice) );
        gpuErrchk ( hipMemcpy(D_expandNodes_size,H_a0,sizeof(int),hipMemcpyHostToDevice) );
        
        int flag_PQ_not_empty = 0;
        for(int i=0;i<K;i++){
            if(H_PQ_size[i]>0)
                flag_PQ_not_empty=1;
        }

        //DO A* initailly on whole graph
        while(flag_PQ_not_empty == 1){
            
            //extract min
            hipEventRecord(start);
            extractMin<<<numBlocks,numThreads>>>(D_PQ_size, D_expandNodes,D_expandNodes_size,D_Cx,D_openList,N,K);
            
            gpuErrchk(hipPeekAtLastError() );
            hipDeviceSynchronize();
            hipEventRecord(stop);
            hipEventSynchronize(stop);
            computeTime(run_time,start,stop);
            

            hipEventRecord(start);
            A_star_expand<<<numBlocks,numThreads>>>(D_offset,D_edges,D_hx,D_parent,D_Cx,
                D_expandNodes,D_expandNodes_size, D_lock,D_openList,
                N,E,K,D_nVFlag,D_PQ_size,
                D_res_energy,D_packet_sent,D_packet_recv);
            
            gpuErrchk(hipPeekAtLastError() );
            hipDeviceSynchronize();
            hipEventRecord(stop);
            hipEventSynchronize(stop);
            computeTime(run_time,start,stop);


            hipEventRecord(start);
            keepHeapPQ<<<numBlocks,numThreads>>>(D_PQ_size,D_Cx,N,K);
            gpuErrchk(hipPeekAtLastError() );
            hipDeviceSynchronize();
            hipEventRecord(stop);
            hipEventSynchronize(stop);
            computeTime(run_time,start,stop);
            
            //gen from flag D_nV
            //for N in parallel
            hipEventRecord(start);
            setNV<<<N_numBlocks,numThreads>>>(D_nVFlag,D_nV,D_nV_size,N);
            gpuErrchk(hipPeekAtLastError() );
            hipDeviceSynchronize();
            hipEventRecord(stop);
            hipEventSynchronize(stop);
            computeTime(run_time,start,stop);
            

            hipEventRecord(start);
            insertPQ<<<numBlocks,numThreads>>>(D_PQ_size,D_nV,D_nV_size,D_Cx,K,N,D_openList);
            
            gpuErrchk(hipPeekAtLastError() );
            hipDeviceSynchronize();
            hipEventRecord(stop);
            hipEventSynchronize(stop);
            computeTime(run_time,start,stop);
        
            //cpy flagend and flagEmpty
            gpuErrchk( hipMemcpy(H_PQ_size,D_PQ_size, sizeof(int)*K,hipMemcpyDeviceToHost) );
            
            //reset nVFlag
            gpuErrchk( hipMemcpy(D_nVFlag,H_nVFlag,sizeof(int)*N,hipMemcpyHostToDevice) );

            //reset next insert array
            gpuErrchk( hipMemcpy(D_nV_size,H_a0,sizeof(int),hipMemcpyHostToDevice) );
            gpuErrchk( hipMemcpy(D_expandNodes_size,H_a0,sizeof(int),hipMemcpyHostToDevice) );
            

            flag_PQ_not_empty = 0;
            for(int i=0;i<K;i++){
                if(H_PQ_size[i]>0)
                    flag_PQ_not_empty=1;
            }
 
            gpuErrchk( hipMemcpy(H_parent,D_parent, sizeof(int)*N,hipMemcpyDeviceToHost) );
            
        }

        //broadcasted sol

        // for(int i=0;i<N;i++){
        //     int p = i;
        //     printf("PATH: %d ",i);
        //     while(H_parent[p]!=-1){
        //         p = H_parent[p];
        //         printf("%d ",p);
        //         if(p==startNode)
        //             break;
        //     }
        //     printf("\n");
        // }

        // update energy
    update_energy(H_parent,H_res_energy,H_packet_sent,H_packet_recv,H_cord_x,H_cord_y,N,startNode);        

    gpuErrchk ( hipMemcpy(D_packet_recv,H_packet_recv,sizeof(int)*N,hipMemcpyHostToDevice) );
    gpuErrchk ( hipMemcpy(D_packet_sent,H_packet_sent,sizeof(int)*N,hipMemcpyHostToDevice) );

    gpuErrchk ( hipMemcpy(D_res_energy,H_res_energy,sizeof(float)*N,hipMemcpyHostToDevice) );

    //check for end
    check_failure(H_res_energy,N,H_end_A_star);
    count_round++;

    while(*H_end_A_star==0){
        update_energy(H_parent,H_res_energy,H_packet_sent,H_packet_recv,H_cord_x,H_cord_y,N,startNode);
        check_failure(H_res_energy,N,H_end_A_star);
        count_round++;
    }
    

    printf("rounds: %d\n",count_round);
    printf("time: %f\n",run_time);

    return 0;
}

void calc_hx(int* offset,int* edges,float* hx,float* cord_x,float* cord_y,int N,int E,int sink){
    float dx,dy;
    dx = cord_x[sink];
    dy = cord_y[sink];

    for(int i=0;i<N;i++){
        float x,y;
        x = cord_x[i];
        y = cord_y[i];    

        int start = offset[i];
        int end = N;
        if(i!=N-1)
            end = offset[i+1];
        
        float sum = 0;
        int count = 0;

        while(start < end){
            int child = edges[start];
            sum+= sqrtf( (x-cord_x[child])*(x-cord_x[child]) + (y-cord_y[child])*(y-cord_y[child]) );
            start++;
            count++;
        }

        float dist = sqrtf( (x-dx)*(x-dx) + (y-dy)*(y-dy) );
        //hop counts 
        if(dist!=0){
            hx[i] =  (dist * count )/sum ;
        }
        else
            hx[i] = 0;
    }

}

void update_energy(int* parent,float* res_energy,int* Nt,int* Nr,float* cord_x,float* cord_y,int N,int sink){

    int k = 2048;    //256 bit packet length
    int round = rand()%N;
    for(int j=0;j<round;j++){
        int start = rand()%N;
        while(parent[start]!=-1){
            int node = parent[start];
            Nr[node]+=1;
            res_energy[node]-= k*E_ELEC;
            
            Nt[start]+=1;
            float dist_sq = (cord_x[start]-cord_x[node])*(cord_x[start]-cord_x[node]) +(cord_y[start]-cord_y[node])*(cord_y[start]-cord_y[node]);
            float energy = k*(E_ELEC + E_AMP*dist_sq);
            res_energy[start]-=energy*100;
           
            start = node;
            
        }

        // if(start != sink)
        //     printf("ERROR; invalid path\n");

    }

}

void check_failure(float* res_energy,int N, int* flag){
    for(int i=0;i<N;i++){
       // printf("%d:%f\n",i,res_energy[i]);
        if(res_energy[i]<0){
            *flag =1;
            printf("dead: %d\n",i);
            break;
        }       
    }
}

void computeTime(float& time,hipEvent_t start, hipEvent_t stop){
    float milliseconds = 0;
    hipEventElapsedTime(&milliseconds, start, stop);
    time+= milliseconds;
    //printf("time:%f\n",milliseconds);
}
	.text
	.file	"wsn_min.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z25__device_stub__extractMinPiS_S_PfS_ii # -- Begin function _Z25__device_stub__extractMinPiS_S_PfS_ii
	.type	_Z25__device_stub__extractMinPiS_S_PfS_ii,@function
_Z25__device_stub__extractMinPiS_S_PfS_ii: # @_Z25__device_stub__extractMinPiS_S_PfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10extractMinPiS_S_PfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__extractMinPiS_S_PfS_ii, .Lfunc_end0-_Z25__device_stub__extractMinPiS_S_PfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_ # -- Begin function _Z28__device_stub__A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
	.type	_Z28__device_stub__A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_,@function
_Z28__device_stub__A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_: # @_Z28__device_stub__A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$240, %rsp
	.cfi_def_cfa_offset 288
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	344(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	352(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	360(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	368(%rsp), %rax
	movq	%rax, 128(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$256, %rsp                      # imm = 0x100
	.cfi_adjust_cfa_offset -256
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z28__device_stub__A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_, .Lfunc_end1-_Z28__device_stub__A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__keepHeapPQPiPfii # -- Begin function _Z25__device_stub__keepHeapPQPiPfii
	.type	_Z25__device_stub__keepHeapPQPiPfii,@function
_Z25__device_stub__keepHeapPQPiPfii:    # @_Z25__device_stub__keepHeapPQPiPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10keepHeapPQPiPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25__device_stub__keepHeapPQPiPfii, .Lfunc_end2-_Z25__device_stub__keepHeapPQPiPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__setNVPiS_S_i # -- Begin function _Z20__device_stub__setNVPiS_S_i
	.type	_Z20__device_stub__setNVPiS_S_i,@function
_Z20__device_stub__setNVPiS_S_i:        # @_Z20__device_stub__setNVPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5setNVPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z20__device_stub__setNVPiS_S_i, .Lfunc_end3-_Z20__device_stub__setNVPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__insertPQPiS_S_PfiiS_ # -- Begin function _Z23__device_stub__insertPQPiS_S_PfiiS_
	.type	_Z23__device_stub__insertPQPiS_S_PfiiS_,@function
_Z23__device_stub__insertPQPiS_S_PfiiS_: # @_Z23__device_stub__insertPQPiS_S_PfiiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8insertPQPiS_S_PfiiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z23__device_stub__insertPQPiS_S_PfiiS_, .Lfunc_end4-_Z23__device_stub__insertPQPiS_S_PfiiS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$328, %rsp                      # imm = 0x148
	.cfi_def_cfa_offset 384
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$42, %edi
	callq	srand
	leaq	16(%rsp), %r13
	movl	$.L.str, %edi
	movq	%r13, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %r12
	movl	$.L.str.3, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %rbp
	leaq	12(%rsp), %rbx
	leaq	48(%rsp), %r14
	movl	$.L.str.4, %esi
	movq	%r12, %rdi
	movq	%rbx, %rdx
	movq	%r14, %rcx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$.L.str.4, %esi
	movq	%rbp, %rdi
	movq	%rbx, %rdx
	movq	%r14, %rcx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movslq	(%rbx), %rcx
	movq	%rcx, 280(%rsp)                 # 8-byte Spill
	leal	-1(%rcx), %eax
	movl	%eax, 52(%rsp)
	leaq	(,%rcx,4), %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 192(%rsp)                 # 8-byte Spill
	movslq	(%r14), %rax
	movq	%rax, 288(%rsp)                 # 8-byte Spill
	leaq	(,%rax,4), %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, 184(%rsp)                 # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, 104(%rsp)                 # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r14
	movslq	(%r13), %rsi
	shlq	$2, %rsi
	movl	$1, %edi
	callq	calloc@PLT
	movq	%rax, %r13
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 200(%rsp)                 # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 144(%rsp)                 # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 264(%rsp)                 # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 256(%rsp)                 # 8-byte Spill
	movq	%r14, 272(%rsp)                 # 8-byte Spill
	movq	%r14, %rdi
	movl	$255, %esi
	movq	%rbx, %rdx
	callq	memset@PLT
	movq	96(%rsp), %rdi                  # 8-byte Reload
	movl	$255, %esi
	movq	%rbx, %rdx
	callq	memset@PLT
	movq	280(%rsp), %rsi                 # 8-byte Reload
	movq	80(%rsp), %rdx                  # 8-byte Reload
	testq	%rsi, %rsi
	jle	.LBB5_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%esi, %eax
	xorl	%ecx, %ecx
.LBB5_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$2139095039, (%rdx,%rcx,4)      # imm = 0x7F7FFFFF
	movl	$1084227584, (%r15,%rcx,4)      # imm = 0x40A00000
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB5_2
.LBB5_3:                                # %.preheader286
	movq	%r15, 72(%rsp)                  # 8-byte Spill
	cmpl	$0, 288(%rsp)                   # 4-byte Folded Reload
	jle	.LBB5_7
# %bb.4:                                # %.lr.ph355.preheader
	movq	184(%rsp), %rbx                 # 8-byte Reload
	movq	104(%rsp), %r14                 # 8-byte Reload
	xorl	%r15d, %r15d
.LBB5_5:                                # %.lr.ph355
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str, %esi
	movq	%r12, %rdi
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$.L.str, %esi
	movq	%rbp, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incq	%r15
	movslq	48(%rsp), %rax
	addq	$4, %r14
	addq	$4, %rbx
	cmpq	%rax, %r15
	jl	.LBB5_5
# %bb.6:                                # %.preheader.loopexit
	movl	12(%rsp), %esi
.LBB5_7:                                # %.preheader
	testl	%esi, %esi
	jle	.LBB5_10
# %bb.8:                                # %.lr.ph357.preheader
	movq	192(%rsp), %rbx                 # 8-byte Reload
	movq	88(%rsp), %r14                  # 8-byte Reload
	xorl	%r15d, %r15d
.LBB5_9:                                # %.lr.ph357
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str, %esi
	movq	%r12, %rdi
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$.L.str, %esi
	movq	%rbp, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incq	%r15
	movslq	12(%rsp), %rax
	addq	$4, %r14
	addq	$4, %rbx
	cmpq	%rax, %r15
	jl	.LBB5_9
.LBB5_10:                               # %._crit_edge
	movq	%rbp, %rdi
	callq	fclose
	movq	%r12, %rdi
	callq	fclose
	movl	$.L.str.5, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %rbx
	cmpl	$0, 12(%rsp)
	movq	200(%rsp), %rbp                 # 8-byte Reload
	movq	144(%rsp), %r12                 # 8-byte Reload
	jle	.LBB5_13
# %bb.11:                               # %.lr.ph360.preheader
	leaq	24(%rsp), %r14
	xorl	%r15d, %r15d
.LBB5_12:                               # %.lr.ph360
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.6, %esi
	movq	%rbx, %rdi
	leaq	40(%rsp), %rdx
	movq	%r14, %rcx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movss	40(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rbp,%r15,4)
	movss	24(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r12,%r15,4)
	incq	%r15
	movslq	12(%rsp), %rax
	cmpq	%rax, %r15
	jl	.LBB5_12
.LBB5_13:                               # %._crit_edge361
	movq	%rbx, %rdi
	callq	fclose
	movl	12(%rsp), %r9d
	movl	52(%rsp), %eax
	subq	$16, %rsp
	.cfi_adjust_cfa_offset 16
	movl	%eax, 8(%rsp)
	movq	104(%rsp), %rdi                 # 8-byte Reload
	movq	120(%rsp), %rsi                 # 8-byte Reload
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movq	%rbp, %r14
	movq	%rbp, %rcx
	movq	%r12, %r8
	callq	_Z7calc_hxPiS_PfS0_S0_iii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$4, %edi
	callq	malloc
	movq	%rax, %r15
	movslq	12(%rsp), %rbx
	shlq	$2, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	movq	%rax, %rdi
	movl	$255, %esi
	movq	%rbx, %rdx
	callq	memset@PLT
	movl	$0, (%r15)
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	movslq	12(%rsp), %rsi
	shlq	$2, %rsi
	leaq	248(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_14
# %bb.16:                               # %_Z9gpuAssert10hipError_tPKcib.exit
	movslq	48(%rsp), %rsi
	shlq	$2, %rsi
	leaq	240(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	movq	272(%rsp), %r12                 # 8-byte Reload
	jne	.LBB5_17
# %bb.18:                               # %_Z9gpuAssert10hipError_tPKcib.exit146
	movslq	12(%rsp), %rsi
	shlq	$2, %rsi
	leaq	232(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_19
# %bb.20:                               # %_Z9gpuAssert10hipError_tPKcib.exit148
	movslq	12(%rsp), %rsi
	shlq	$2, %rsi
	leaq	64(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_21
# %bb.22:                               # %_Z9gpuAssert10hipError_tPKcib.exit150
	movslq	12(%rsp), %rsi
	shlq	$2, %rsi
	leaq	176(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_23
# %bb.24:                               # %_Z9gpuAssert10hipError_tPKcib.exit152
	movslq	16(%rsp), %rsi
	shlq	$2, %rsi
	leaq	56(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_25
# %bb.26:                               # %_Z9gpuAssert10hipError_tPKcib.exit154
	movslq	12(%rsp), %rsi
	shlq	$2, %rsi
	leaq	136(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_27
# %bb.28:                               # %_Z9gpuAssert10hipError_tPKcib.exit156
	movslq	12(%rsp), %rsi
	shlq	$2, %rsi
	leaq	224(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_29
# %bb.30:                               # %_Z9gpuAssert10hipError_tPKcib.exit158
	movslq	12(%rsp), %rsi
	shlq	$2, %rsi
	leaq	216(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_31
# %bb.32:                               # %_Z9gpuAssert10hipError_tPKcib.exit160
	leaq	120(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_33
# %bb.34:                               # %_Z9gpuAssert10hipError_tPKcib.exit162
	movslq	12(%rsp), %rsi
	shlq	$2, %rsi
	leaq	128(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_35
# %bb.36:                               # %_Z9gpuAssert10hipError_tPKcib.exit164
	movslq	16(%rsp), %rsi
	shlq	$2, %rsi
	leaq	208(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_37
# %bb.38:                               # %_Z9gpuAssert10hipError_tPKcib.exit166
	leaq	112(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_39
# %bb.40:                               # %_Z9gpuAssert10hipError_tPKcib.exit168
	leaq	320(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_41
# %bb.42:                               # %_Z9gpuAssert10hipError_tPKcib.exit170
	leaq	312(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_43
# %bb.44:                               # %_Z9gpuAssert10hipError_tPKcib.exit172
	movslq	12(%rsp), %rsi
	shlq	$2, %rsi
	leaq	168(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_45
# %bb.46:                               # %_Z9gpuAssert10hipError_tPKcib.exit174
	movslq	12(%rsp), %rsi
	shlq	$2, %rsi
	leaq	304(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_47
# %bb.48:                               # %_Z9gpuAssert10hipError_tPKcib.exit176
	movslq	12(%rsp), %rsi
	shlq	$2, %rsi
	leaq	296(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_49
# %bb.50:                               # %_Z9gpuAssert10hipError_tPKcib.exit178
	movslq	12(%rsp), %rsi
	shlq	$2, %rsi
	leaq	160(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_51
# %bb.52:                               # %_Z9gpuAssert10hipError_tPKcib.exit180
	movslq	12(%rsp), %rsi
	shlq	$2, %rsi
	leaq	152(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_53
# %bb.54:                               # %_Z9gpuAssert10hipError_tPKcib.exit182
	movq	248(%rsp), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	192(%rsp), %rsi                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_55
# %bb.56:                               # %_Z9gpuAssert10hipError_tPKcib.exit184
	movq	240(%rsp), %rdi
	movslq	48(%rsp), %rdx
	shlq	$2, %rdx
	movq	184(%rsp), %rsi                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_57
# %bb.58:                               # %_Z9gpuAssert10hipError_tPKcib.exit186
	movq	232(%rsp), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_59
# %bb.60:                               # %_Z9gpuAssert10hipError_tPKcib.exit188
	movq	64(%rsp), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	80(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_61
# %bb.62:                               # %_Z9gpuAssert10hipError_tPKcib.exit190
	movq	224(%rsp), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	xorl	%esi, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB5_63
# %bb.64:                               # %_Z9gpuAssert10hipError_tPKcib.exit192
	movq	168(%rsp), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	72(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_65
# %bb.66:                               # %_Z9gpuAssert10hipError_tPKcib.exit194
	movq	304(%rsp), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_67
# %bb.68:                               # %_Z9gpuAssert10hipError_tPKcib.exit196
	movq	296(%rsp), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	144(%rsp), %rsi                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_69
# %bb.70:                               # %_Z9gpuAssert10hipError_tPKcib.exit198
	movq	160(%rsp), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movl	$1, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB5_71
# %bb.72:                               # %_Z9gpuAssert10hipError_tPKcib.exit200
	movq	152(%rsp), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movl	$1, %esi
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB5_73
# %bb.74:                               # %_Z9gpuAssert10hipError_tPKcib.exit202
	movl	16(%rsp), %r14d
	movl	$511, %eax                      # imm = 0x1FF
	leal	(%r14,%rax), %ecx
	movl	$1022, %ebp                     # imm = 0x3FE
	addl	%ebp, %r14d
	testl	%ecx, %ecx
	cmovnsl	%ecx, %r14d
	movslq	12(%rsp), %rdx
	addl	%edx, %eax
	addl	%edx, %ebp
	testl	%eax, %eax
	cmovnsl	%eax, %ebp
	movslq	52(%rsp), %rax
	movq	32(%rsp), %rcx                  # 8-byte Reload
	movss	(%rcx,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movq	80(%rsp), %rsi                  # 8-byte Reload
	movss	%xmm0, (%rsi,%rax,4)
	movl	$1, (%r13)
	movl	$0, (%r12,%rax,4)
	movq	64(%rsp), %rdi
	shlq	$2, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_75
# %bb.76:                               # %_Z9gpuAssert10hipError_tPKcib.exit204
	leaq	52(%rsp), %rsi
	movl	$PQ, %edi
	movl	$4, %edx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	testl	%eax, %eax
	jne	.LBB5_77
# %bb.78:                               # %_Z9gpuAssert10hipError_tPKcib.exit206
	movq	176(%rsp), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	96(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_79
# %bb.80:                               # %_Z9gpuAssert10hipError_tPKcib.exit208
	movq	136(%rsp), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_81
# %bb.82:                               # %_Z9gpuAssert10hipError_tPKcib.exit210
	movq	56(%rsp), %rdi
	movslq	16(%rsp), %rdx
	shlq	$2, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_83
# %bb.84:                               # %_Z9gpuAssert10hipError_tPKcib.exit212
	movq	128(%rsp), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	88(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_85
# %bb.86:                               # %_Z9gpuAssert10hipError_tPKcib.exit214
	movq	120(%rsp), %rdi
	movl	$4, %edx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_87
# %bb.88:                               # %_Z9gpuAssert10hipError_tPKcib.exit216
	movq	112(%rsp), %rdi
	movl	$4, %edx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_91
# %bb.89:                               # %_Z9gpuAssert10hipError_tPKcib.exit218.preheader
	movq	%r15, 80(%rsp)                  # 8-byte Spill
	sarl	$9, %r14d
	sarl	$9, %ebp
	movl	16(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB5_90
# %bb.92:                               # %_Z9gpuAssert10hipError_tPKcib.exit218.preheader376
	xorl	%ecx, %ecx
	movl	$1, %edx
	xorl	%r15d, %r15d
.LBB5_93:                               # %_Z9gpuAssert10hipError_tPKcib.exit218
                                        # =>This Inner Loop Header: Depth=1
	cmpl	$0, (%r13,%rcx,4)
	cmovgl	%edx, %r15d
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB5_93
	jmp	.LBB5_94
.LBB5_90:
	xorl	%r15d, %r15d
.LBB5_94:                               # %_Z9gpuAssert10hipError_tPKcib.exit238.preheader
	movabsq	$4294967808, %rcx               # imm = 0x100000200
	movl	%r14d, %eax
	leaq	(%rax,%rcx), %rbx
	addq	$-512, %rbx                     # imm = 0xFE00
	movl	%ebp, %eax
	leaq	-512(%rax,%rcx), %rax
	movq	%rax, 104(%rsp)                 # 8-byte Spill
	xorps	%xmm0, %xmm0
	movss	%xmm0, 32(%rsp)                 # 4-byte Spill
	movl	$1, %r14d
	leaq	20(%rsp), %r12
.LBB5_95:                               # %_Z9gpuAssert10hipError_tPKcib.exit238
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_129 Depth 2
	cmpl	$1, %r15d
	jne	.LBB5_130
# %bb.96:                               #   in Loop: Header=BB5_95 Depth=1
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%rbx, %rdi
	movl	$1, %esi
	movabsq	$4294967808, %rdx               # imm = 0x100000200
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_98
# %bb.97:                               #   in Loop: Header=BB5_95 Depth=1
	movq	56(%rsp), %rdi
	movq	208(%rsp), %rsi
	movq	112(%rsp), %rdx
	movq	64(%rsp), %rcx
	movq	136(%rsp), %r8
	movl	12(%rsp), %r9d
	movl	16(%rsp), %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z25__device_stub__extractMinPiS_S_PfS_ii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB5_98:                               #   in Loop: Header=BB5_95 Depth=1
	callq	hipPeekAtLastError
	testl	%eax, %eax
	movq	80(%rsp), %r15                  # 8-byte Reload
	jne	.LBB5_99
# %bb.101:                              # %_Z9gpuAssert10hipError_tPKcib.exit220
                                        #   in Loop: Header=BB5_95 Depth=1
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	movq	40(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	$0, 20(%rsp)
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	movss	32(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	20(%rsp), %xmm0
	movss	%xmm0, 32(%rsp)                 # 4-byte Spill
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%rbx, %rdi
	movl	$1, %esi
	movabsq	$4294967808, %rdx               # imm = 0x100000200
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_103
# %bb.102:                              #   in Loop: Header=BB5_95 Depth=1
	movq	248(%rsp), %rdi
	movq	240(%rsp), %rsi
	movq	232(%rsp), %rdx
	movq	176(%rsp), %rcx
	movq	64(%rsp), %r8
	movq	208(%rsp), %r9
	movl	12(%rsp), %eax
	movl	48(%rsp), %r10d
	movl	16(%rsp), %r11d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	192(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	88(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	208(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	304(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	200(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
.LBB5_103:                              #   in Loop: Header=BB5_95 Depth=1
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB5_104
# %bb.105:                              # %_Z9gpuAssert10hipError_tPKcib.exit222
                                        #   in Loop: Header=BB5_95 Depth=1
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	movq	40(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	$0, 20(%rsp)
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	movss	32(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	20(%rsp), %xmm0
	movss	%xmm0, 32(%rsp)                 # 4-byte Spill
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%rbx, %rdi
	movl	$1, %esi
	movabsq	$4294967808, %rdx               # imm = 0x100000200
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_107
# %bb.106:                              #   in Loop: Header=BB5_95 Depth=1
	movq	56(%rsp), %rdi
	movq	64(%rsp), %rsi
	movl	12(%rsp), %edx
	movl	16(%rsp), %ecx
	callq	_Z25__device_stub__keepHeapPQPiPfii
.LBB5_107:                              #   in Loop: Header=BB5_95 Depth=1
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB5_108
# %bb.109:                              # %_Z9gpuAssert10hipError_tPKcib.exit224
                                        #   in Loop: Header=BB5_95 Depth=1
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	movq	40(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	$0, 20(%rsp)
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	movss	32(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	20(%rsp), %xmm0
	movss	%xmm0, 32(%rsp)                 # 4-byte Spill
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	104(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movabsq	$4294967808, %rdx               # imm = 0x100000200
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_111
# %bb.110:                              #   in Loop: Header=BB5_95 Depth=1
	movq	128(%rsp), %rdi
	movq	216(%rsp), %rsi
	movq	120(%rsp), %rdx
	movl	12(%rsp), %ecx
	callq	_Z20__device_stub__setNVPiS_S_i
.LBB5_111:                              #   in Loop: Header=BB5_95 Depth=1
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB5_112
# %bb.113:                              # %_Z9gpuAssert10hipError_tPKcib.exit226
                                        #   in Loop: Header=BB5_95 Depth=1
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	movq	40(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	$0, 20(%rsp)
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	movss	32(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	20(%rsp), %xmm0
	movss	%xmm0, 32(%rsp)                 # 4-byte Spill
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%rbx, %rdi
	movl	$1, %esi
	movabsq	$4294967808, %rdx               # imm = 0x100000200
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_115
# %bb.114:                              #   in Loop: Header=BB5_95 Depth=1
	movq	56(%rsp), %rdi
	movq	216(%rsp), %rsi
	movq	120(%rsp), %rdx
	movq	64(%rsp), %rcx
	movl	16(%rsp), %r8d
	movl	12(%rsp), %r9d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z23__device_stub__insertPQPiS_S_PfiiS_
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB5_115:                              #   in Loop: Header=BB5_95 Depth=1
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB5_116
# %bb.117:                              # %_Z9gpuAssert10hipError_tPKcib.exit228
                                        #   in Loop: Header=BB5_95 Depth=1
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	movq	40(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	$0, 20(%rsp)
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	movss	32(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	20(%rsp), %xmm0
	movss	%xmm0, 32(%rsp)                 # 4-byte Spill
	movq	56(%rsp), %rsi
	movslq	16(%rsp), %rdx
	shlq	$2, %rdx
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_118
# %bb.119:                              # %_Z9gpuAssert10hipError_tPKcib.exit230
                                        #   in Loop: Header=BB5_95 Depth=1
	movq	128(%rsp), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	88(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_120
# %bb.121:                              # %_Z9gpuAssert10hipError_tPKcib.exit232
                                        #   in Loop: Header=BB5_95 Depth=1
	movq	120(%rsp), %rdi
	movl	$4, %edx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_122
# %bb.123:                              # %_Z9gpuAssert10hipError_tPKcib.exit234
                                        #   in Loop: Header=BB5_95 Depth=1
	movq	112(%rsp), %rdi
	movl	$4, %edx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_149
# %bb.124:                              # %_Z9gpuAssert10hipError_tPKcib.exit236.preheader
                                        #   in Loop: Header=BB5_95 Depth=1
	movl	16(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB5_125
# %bb.128:                              # %_Z9gpuAssert10hipError_tPKcib.exit236.preheader375
                                        #   in Loop: Header=BB5_95 Depth=1
	xorl	%ecx, %ecx
	xorl	%r15d, %r15d
.LBB5_129:                              # %_Z9gpuAssert10hipError_tPKcib.exit236
                                        #   Parent Loop BB5_95 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpl	$0, (%r13,%rcx,4)
	cmovgl	%r14d, %r15d
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB5_129
	jmp	.LBB5_126
.LBB5_125:                              #   in Loop: Header=BB5_95 Depth=1
	xorl	%r15d, %r15d
.LBB5_126:                              # %_Z9gpuAssert10hipError_tPKcib.exit236._crit_edge
                                        #   in Loop: Header=BB5_95 Depth=1
	movq	176(%rsp), %rsi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	96(%rsp), %rdi                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB5_95
# %bb.127:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$603, %r8d                      # imm = 0x25B
	jmp	.LBB5_100
.LBB5_130:
	movl	12(%rsp), %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	104(%rsp), %rdi                 # 8-byte Reload
	movq	80(%rsp), %rsi                  # 8-byte Reload
	movq	264(%rsp), %r13                 # 8-byte Reload
	movq	%r13, %rdx
	movq	272(%rsp), %r12                 # 8-byte Reload
	movq	%r12, %rcx
	movq	208(%rsp), %r14                 # 8-byte Reload
	movq	%r14, %r8
	movq	152(%rsp), %r15                 # 8-byte Reload
	movq	%r15, %r9
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z13update_energyPiPfS_S_S0_S0_ii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movq	160(%rsp), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_131
# %bb.132:                              # %_Z9gpuAssert10hipError_tPKcib.exit240
	movq	152(%rsp), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_133
# %bb.134:                              # %_Z9gpuAssert10hipError_tPKcib.exit242
	movq	168(%rsp), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	72(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_135
# %bb.136:                              # %_Z9gpuAssert10hipError_tPKcib.exit244
	movl	12(%rsp), %eax
	testl	%eax, %eax
	movq	72(%rsp), %rcx                  # 8-byte Reload
	jle	.LBB5_137
# %bb.143:                              # %.lr.ph.preheader.i
	xorl	%esi, %esi
	xorps	%xmm0, %xmm0
.LBB5_144:                              # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	ucomiss	(%rcx,%rsi,4), %xmm0
	ja	.LBB5_146
# %bb.145:                              #   in Loop: Header=BB5_144 Depth=1
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB5_144
.LBB5_137:                              # %.lr.ph371.preheader
	movl	$1, %ebx
.LBB5_138:                              # %.lr.ph371
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_140 Depth 2
	movl	12(%rsp), %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	104(%rsp), %rdi                 # 8-byte Reload
	movq	%rcx, %rsi
	movq	%r13, %rdx
	movq	%r12, %rcx
	movq	%r14, %r8
	movq	%r15, %r9
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z13update_energyPiPfS_S_S0_S0_ii
	movq	88(%rsp), %rcx                  # 8-byte Reload
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	12(%rsp), %eax
	testl	%eax, %eax
	xorps	%xmm0, %xmm0
	jle	.LBB5_142
# %bb.139:                              # %.lr.ph.preheader.i245
                                        #   in Loop: Header=BB5_138 Depth=1
	xorl	%esi, %esi
.LBB5_140:                              # %.lr.ph.i247
                                        #   Parent Loop BB5_138 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	ucomiss	(%rcx,%rsi,4), %xmm0
	ja	.LBB5_147
# %bb.141:                              #   in Loop: Header=BB5_140 Depth=2
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB5_140
.LBB5_142:                              # %_Z13check_failurePfiPi.exit251
                                        #   in Loop: Header=BB5_138 Depth=1
	incl	%ebx
	jmp	.LBB5_138
.LBB5_147:                              # %._crit_edge372.loopexit
	movl	$.L.str.11, %edi
                                        # kill: def $esi killed $esi killed $rsi
	xorl	%eax, %eax
	callq	printf
	incl	%ebx
	jmp	.LBB5_148
.LBB5_146:                              # %_Z13check_failurePfiPi.exit
	movl	$.L.str.11, %edi
                                        # kill: def $esi killed $esi killed $rsi
	xorl	%eax, %eax
	callq	printf
	movl	$1, %ebx
.LBB5_148:                              # %._crit_edge372
	movl	$.L.str.9, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	32(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$.L.str.10, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$328, %rsp                      # imm = 0x148
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_99:
	.cfi_def_cfa_offset 384
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$538, %r8d                      # imm = 0x21A
	jmp	.LBB5_100
.LBB5_118:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$587, %r8d                      # imm = 0x24B
	jmp	.LBB5_100
.LBB5_122:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$593, %r8d                      # imm = 0x251
	jmp	.LBB5_100
.LBB5_108:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$560, %r8d                      # imm = 0x230
	jmp	.LBB5_100
.LBB5_120:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$590, %r8d                      # imm = 0x24E
	jmp	.LBB5_100
.LBB5_149:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$594, %r8d                      # imm = 0x252
	jmp	.LBB5_100
.LBB5_104:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$551, %r8d                      # imm = 0x227
	jmp	.LBB5_100
.LBB5_112:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$570, %r8d                      # imm = 0x23A
	jmp	.LBB5_100
.LBB5_116:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$580, %r8d                      # imm = 0x244
.LBB5_100:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.LBB5_14:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$447, %r8d                      # imm = 0x1BF
	jmp	.LBB5_15
.LBB5_17:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$448, %r8d                      # imm = 0x1C0
	jmp	.LBB5_15
.LBB5_19:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$450, %r8d                      # imm = 0x1C2
	jmp	.LBB5_15
.LBB5_21:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$451, %r8d                      # imm = 0x1C3
	jmp	.LBB5_15
.LBB5_23:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$453, %r8d                      # imm = 0x1C5
	jmp	.LBB5_15
.LBB5_25:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$455, %r8d                      # imm = 0x1C7
	jmp	.LBB5_15
.LBB5_27:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$457, %r8d                      # imm = 0x1C9
	jmp	.LBB5_15
.LBB5_29:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$458, %r8d                      # imm = 0x1CA
	jmp	.LBB5_15
.LBB5_31:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$461, %r8d                      # imm = 0x1CD
	jmp	.LBB5_15
.LBB5_33:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$462, %r8d                      # imm = 0x1CE
	jmp	.LBB5_15
.LBB5_35:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$463, %r8d                      # imm = 0x1CF
	jmp	.LBB5_15
.LBB5_37:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$466, %r8d                      # imm = 0x1D2
	jmp	.LBB5_15
.LBB5_39:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$467, %r8d                      # imm = 0x1D3
	jmp	.LBB5_15
.LBB5_41:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$470, %r8d                      # imm = 0x1D6
	jmp	.LBB5_15
.LBB5_43:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$471, %r8d                      # imm = 0x1D7
	jmp	.LBB5_15
.LBB5_45:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$474, %r8d                      # imm = 0x1DA
	jmp	.LBB5_15
.LBB5_47:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$475, %r8d                      # imm = 0x1DB
	jmp	.LBB5_15
.LBB5_49:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$476, %r8d                      # imm = 0x1DC
	jmp	.LBB5_15
.LBB5_51:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$477, %r8d                      # imm = 0x1DD
	jmp	.LBB5_15
.LBB5_53:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$478, %r8d                      # imm = 0x1DE
	jmp	.LBB5_15
.LBB5_55:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$481, %r8d                      # imm = 0x1E1
	jmp	.LBB5_15
.LBB5_57:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$482, %r8d                      # imm = 0x1E2
	jmp	.LBB5_15
.LBB5_59:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$483, %r8d                      # imm = 0x1E3
	jmp	.LBB5_15
.LBB5_61:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$484, %r8d                      # imm = 0x1E4
	jmp	.LBB5_15
.LBB5_63:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$486, %r8d                      # imm = 0x1E6
	jmp	.LBB5_15
.LBB5_65:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$488, %r8d                      # imm = 0x1E8
	jmp	.LBB5_15
.LBB5_67:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$489, %r8d                      # imm = 0x1E9
	jmp	.LBB5_15
.LBB5_69:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$490, %r8d                      # imm = 0x1EA
	jmp	.LBB5_15
.LBB5_71:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$493, %r8d                      # imm = 0x1ED
	jmp	.LBB5_15
.LBB5_73:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$494, %r8d                      # imm = 0x1EE
	jmp	.LBB5_15
.LBB5_75:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$512, %r8d                      # imm = 0x200
	jmp	.LBB5_15
.LBB5_77:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$513, %r8d                      # imm = 0x201
	jmp	.LBB5_15
.LBB5_79:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$515, %r8d                      # imm = 0x203
	jmp	.LBB5_15
.LBB5_81:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$516, %r8d                      # imm = 0x204
	jmp	.LBB5_15
.LBB5_83:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$517, %r8d                      # imm = 0x205
	jmp	.LBB5_15
.LBB5_85:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$520, %r8d                      # imm = 0x208
	jmp	.LBB5_15
.LBB5_87:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$522, %r8d                      # imm = 0x20A
	jmp	.LBB5_15
.LBB5_91:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$523, %r8d                      # imm = 0x20B
	jmp	.LBB5_15
.LBB5_131:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$624, %r8d                      # imm = 0x270
	jmp	.LBB5_15
.LBB5_133:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$625, %r8d                      # imm = 0x271
	jmp	.LBB5_15
.LBB5_135:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.8, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$627, %r8d                      # imm = 0x273
.LBB5_15:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z7calc_hxPiS_PfS0_S0_iii       # -- Begin function _Z7calc_hxPiS_PfS0_S0_iii
	.type	_Z7calc_hxPiS_PfS0_S0_iii,@function
_Z7calc_hxPiS_PfS0_S0_iii:              # @_Z7calc_hxPiS_PfS0_S0_iii
	.cfi_startproc
# %bb.0:
                                        # kill: def $r9d killed $r9d def $r9
	testl	%r9d, %r9d
	jle	.LBB6_11
# %bb.1:                                # %.lr.ph65
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movslq	56(%rsp), %rax
	movss	(%rcx,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	(%r8,%rax,4), %xmm1             # xmm1 = mem[0],zero,zero,zero
	leal	-1(%r9), %eax
	movl	%r9d, %r10d
	xorl	%r11d, %r11d
	xorps	%xmm2, %xmm2
.LBB6_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_7 Depth 2
	movl	%r9d, %ebx
	cmpq	%rax, %r11
	je	.LBB6_4
# %bb.3:                                #   in Loop: Header=BB6_2 Depth=1
	movl	4(%rdi,%r11,4), %ebx
.LBB6_4:                                #   in Loop: Header=BB6_2 Depth=1
	movss	(%rcx,%r11,4), %xmm4            # xmm4 = mem[0],zero,zero,zero
	movss	(%r8,%r11,4), %xmm3             # xmm3 = mem[0],zero,zero,zero
	movslq	(%rdi,%r11,4), %r14
	cmpl	%r14d, %ebx
	jle	.LBB6_5
# %bb.6:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB6_2 Depth=1
	movslq	%ebx, %r15
	xorps	%xmm5, %xmm5
	movq	%r14, %r12
.LBB6_7:                                # %.lr.ph
                                        #   Parent Loop BB6_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	(%rsi,%r12,4), %r13
	movaps	%xmm4, %xmm6
	subss	(%rcx,%r13,4), %xmm6
	mulss	%xmm6, %xmm6
	movaps	%xmm3, %xmm7
	subss	(%r8,%r13,4), %xmm7
	mulss	%xmm7, %xmm7
	addss	%xmm6, %xmm7
	xorps	%xmm6, %xmm6
	sqrtss	%xmm7, %xmm6
	addss	%xmm6, %xmm5
	incq	%r12
	cmpq	%r12, %r15
	jne	.LBB6_7
# %bb.8:                                # %._crit_edge.loopexit
                                        #   in Loop: Header=BB6_2 Depth=1
	subl	%r14d, %ebx
	jmp	.LBB6_9
.LBB6_5:                                #   in Loop: Header=BB6_2 Depth=1
	xorl	%ebx, %ebx
	xorps	%xmm5, %xmm5
.LBB6_9:                                # %._crit_edge
                                        #   in Loop: Header=BB6_2 Depth=1
	subss	%xmm0, %xmm4
	mulss	%xmm4, %xmm4
	subss	%xmm1, %xmm3
	mulss	%xmm3, %xmm3
	addss	%xmm4, %xmm3
	xorps	%xmm4, %xmm4
	cvtsi2ss	%ebx, %xmm4
	sqrtss	%xmm3, %xmm3
	mulss	%xmm3, %xmm4
	divss	%xmm5, %xmm4
	cmpneqss	%xmm2, %xmm3
	andps	%xmm4, %xmm3
	movss	%xmm3, (%rdx,%r11,4)
	incq	%r11
	cmpq	%r10, %r11
	jne	.LBB6_2
# %bb.10:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
.LBB6_11:                               # %._crit_edge66
	retq
.Lfunc_end6:
	.size	_Z7calc_hxPiS_PfS0_S0_iii, .Lfunc_end6-_Z7calc_hxPiS_PfS0_S0_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11computeTimeRfP11ihipEvent_tS1_ # -- Begin function _Z11computeTimeRfP11ihipEvent_tS1_
	.type	_Z11computeTimeRfP11ihipEvent_tS1_,@function
_Z11computeTimeRfP11ihipEvent_tS1_:     # @_Z11computeTimeRfP11ihipEvent_tS1_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	leaq	4(%rsp), %r14
	movl	$0, (%r14)
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	movss	(%r14), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	addss	(%rbx), %xmm0
	movss	%xmm0, (%rbx)
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z11computeTimeRfP11ihipEvent_tS1_, .Lfunc_end7-_Z11computeTimeRfP11ihipEvent_tS1_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z13update_energyPiPfS_S_S0_S0_ii
.LCPI8_0:
	.quad	0xbf1ad7f29abcaf48              # double -1.024E-4
.LCPI8_1:
	.quad	0x3ddb7cdfd9d7bdbb              # double 1.0E-10
.LCPI8_2:
	.quad	0x3e6ad7f29abcaf48              # double 4.9999999999999998E-8
.LCPI8_3:
	.quad	0xc0a0000000000000              # double -2048
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI8_4:
	.long	0x42c80000                      # float 100
	.text
	.globl	_Z13update_energyPiPfS_S_S0_S0_ii
	.type	_Z13update_energyPiPfS_S_S0_S0_ii,@function
_Z13update_energyPiPfS_S_S0_S0_ii:      # @_Z13update_energyPiPfS_S_S0_S0_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbp
	callq	rand
	cltd
	idivl	64(%rsp)
	movl	%edx, (%rsp)                    # 4-byte Spill
	testl	%edx, %edx
	jle	.LBB8_6
# %bb.1:                                # %.lr.ph42.preheader
	xorl	%eax, %eax
.LBB8_2:                                # %.lr.ph42
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_4 Depth 2
	movl	%eax, 4(%rsp)                   # 4-byte Spill
	callq	rand
	movss	.LCPI8_4(%rip), %xmm6           # xmm6 = mem[0],zero,zero,zero
	movsd	.LCPI8_3(%rip), %xmm5           # xmm5 = mem[0],zero
	movsd	.LCPI8_2(%rip), %xmm4           # xmm4 = mem[0],zero
	movsd	.LCPI8_1(%rip), %xmm3           # xmm3 = mem[0],zero
	movsd	.LCPI8_0(%rip), %xmm2           # xmm2 = mem[0],zero
	cltd
	idivl	64(%rsp)
	movslq	%edx, %rax
	movl	(%rbp,%rax,4), %edx
.LBB8_4:                                # %.lr.ph
                                        #   Parent Loop BB8_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpl	$-1, %edx
	je	.LBB8_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB8_4 Depth=2
	movslq	%edx, %rcx
	incl	(%r15,%rcx,4)
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13,%rcx,4), %xmm0
	addsd	%xmm2, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r13,%rcx,4)
	incl	(%r12,%rax,4)
	movss	(%r14,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	subss	(%r14,%rcx,4), %xmm0
	mulss	%xmm0, %xmm0
	movss	(%rbx,%rax,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	subss	(%rbx,%rcx,4), %xmm1
	mulss	%xmm1, %xmm1
	addss	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	mulsd	%xmm3, %xmm0
	addsd	%xmm4, %xmm0
	mulsd	%xmm5, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	mulss	%xmm6, %xmm0
	addss	(%r13,%rax,4), %xmm0
	movss	%xmm0, (%r13,%rax,4)
	movl	(%rbp,%rcx,4), %edx
	movq	%rcx, %rax
	jmp	.LBB8_4
.LBB8_5:                                # %._crit_edge
                                        #   in Loop: Header=BB8_2 Depth=1
	movl	4(%rsp), %eax                   # 4-byte Reload
	incl	%eax
	cmpl	(%rsp), %eax                    # 4-byte Folded Reload
	jne	.LBB8_2
.LBB8_6:                                # %._crit_edge43
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z13update_energyPiPfS_S_S0_S0_ii, .Lfunc_end8-_Z13update_energyPiPfS_S_S0_S0_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13check_failurePfiPi          # -- Begin function _Z13check_failurePfiPi
	.type	_Z13check_failurePfiPi,@function
_Z13check_failurePfiPi:                 # @_Z13check_failurePfiPi
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB9_4
# %bb.1:                                # %.lr.ph.preheader
	movl	%esi, %eax
	xorl	%esi, %esi
	xorps	%xmm0, %xmm0
.LBB9_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	ucomiss	(%rdi,%rsi,4), %xmm0
	ja	.LBB9_5
# %bb.3:                                #   in Loop: Header=BB9_2 Depth=1
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB9_2
.LBB9_4:                                # %.loopexit
	retq
.LBB9_5:
	movl	$1, (%rdx)
	movl	$.L.str.11, %edi
                                        # kill: def $esi killed $esi killed $rsi
	xorl	%eax, %eax
	jmp	printf                          # TAILCALL
.Lfunc_end9:
	.size	_Z13check_failurePfiPi, .Lfunc_end9-_Z13check_failurePfiPi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB10_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB10_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10extractMinPiS_S_PfS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10keepHeapPQPiPfii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5setNVPiS_S_i, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8insertPQPiS_S_PfiiS_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$0, (%rsp)
	movl	$PQ, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movl	$400000000, %r9d                # imm = 0x17D78400
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end10:
	.size	__hip_module_ctor, .Lfunc_end10-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB11_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB11_2:
	retq
.Lfunc_end11:
	.size	__hip_module_dtor, .Lfunc_end11-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	PQ,@object                      # @PQ
	.local	PQ
	.comm	PQ,400000000,16
	.type	_Z10extractMinPiS_S_PfS_ii,@object # @_Z10extractMinPiS_S_PfS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z10extractMinPiS_S_PfS_ii
	.p2align	3, 0x0
_Z10extractMinPiS_S_PfS_ii:
	.quad	_Z25__device_stub__extractMinPiS_S_PfS_ii
	.size	_Z10extractMinPiS_S_PfS_ii, 8

	.type	_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_,@object # @_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
	.globl	_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
	.p2align	3, 0x0
_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_:
	.quad	_Z28__device_stub__A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
	.size	_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_, 8

	.type	_Z10keepHeapPQPiPfii,@object    # @_Z10keepHeapPQPiPfii
	.globl	_Z10keepHeapPQPiPfii
	.p2align	3, 0x0
_Z10keepHeapPQPiPfii:
	.quad	_Z25__device_stub__keepHeapPQPiPfii
	.size	_Z10keepHeapPQPiPfii, 8

	.type	_Z5setNVPiS_S_i,@object         # @_Z5setNVPiS_S_i
	.globl	_Z5setNVPiS_S_i
	.p2align	3, 0x0
_Z5setNVPiS_S_i:
	.quad	_Z20__device_stub__setNVPiS_S_i
	.size	_Z5setNVPiS_S_i, 8

	.type	_Z8insertPQPiS_S_PfiiS_,@object # @_Z8insertPQPiS_S_PfiiS_
	.globl	_Z8insertPQPiS_S_PfiiS_
	.p2align	3, 0x0
_Z8insertPQPiS_S_PfiiS_:
	.quad	_Z23__device_stub__insertPQPiS_S_PfiiS_
	.size	_Z8insertPQPiS_S_PfiiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d"
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"graph_op.txt"
	.size	.L.str.1, 13

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"r"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"graph.txt"
	.size	.L.str.3, 10

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%d %d\n"
	.size	.L.str.4, 7

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Cord.txt"
	.size	.L.str.5, 9

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"%f %f\n"
	.size	.L.str.6, 7

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/lkoshale/DDP/master/WSN/wsn_min.hip"
	.size	.L.str.8, 98

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"rounds: %d\n"
	.size	.L.str.9, 12

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"time: %f\n"
	.size	.L.str.10, 10

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"dead: %d\n"
	.size	.L.str.11, 10

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"GPUassert: %s %s %d\n"
	.size	.L.str.12, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10extractMinPiS_S_PfS_ii"
	.size	.L__unnamed_1, 27

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_"
	.size	.L__unnamed_2, 51

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z10keepHeapPQPiPfii"
	.size	.L__unnamed_3, 21

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z5setNVPiS_S_i"
	.size	.L__unnamed_4, 16

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z8insertPQPiS_S_PfiiS_"
	.size	.L__unnamed_5, 24

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"PQ"
	.size	.L__unnamed_6, 3

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"[INFO] completed taking input"
	.size	.Lstr, 30

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__extractMinPiS_S_PfS_ii
	.addrsig_sym _Z28__device_stub__A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
	.addrsig_sym _Z25__device_stub__keepHeapPQPiPfii
	.addrsig_sym _Z20__device_stub__setNVPiS_S_i
	.addrsig_sym _Z23__device_stub__insertPQPiS_S_PfiiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym PQ
	.addrsig_sym _Z10extractMinPiS_S_PfS_ii
	.addrsig_sym _Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
	.addrsig_sym _Z10keepHeapPQPiPfii
	.addrsig_sym _Z5setNVPiS_S_i
	.addrsig_sym _Z8insertPQPiS_S_PfiiS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10extractMinPiS_S_PfS_ii ; -- Begin function _Z10extractMinPiS_S_PfS_ii
	.globl	_Z10extractMinPiS_S_PfS_ii
	.p2align	8
	.type	_Z10extractMinPiS_S_PfS_ii,@function
_Z10extractMinPiS_S_PfS_ii:             ; @_Z10extractMinPiS_S_PfS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x3c
	s_load_b64 s[2:3], s[0:1], 0x28
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s4, v[0:1]
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_i32_e64 s3, v2
	s_cbranch_execz .LBB0_22
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v4, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, 0, v4
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_22
; %bb.2:
	s_ashr_i32 s4, s3, 31
	s_add_i32 s2, s2, s3
	s_add_i32 s5, s3, s4
	s_add_i32 s2, s2, -1
	s_xor_b32 s5, s5, s4
	s_ashr_i32 s13, s2, 31
	v_cvt_f32_u32_e32 v3, s5
	s_sub_i32 s12, 0, s5
	s_add_i32 s2, s2, s13
	s_xor_b32 s4, s13, s4
	s_xor_b32 s2, s2, s13
	v_rcp_iflag_f32_e32 v3, v3
	s_load_b64 s[0:1], s[0:1], 0x20
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x4f7ffffe, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v3, v3
	v_readfirstlane_b32 s3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s12, s12, s3
	s_mul_hi_u32 s12, s3, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s3, s12
	s_mul_hi_u32 s3, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s12, s3, s5
	s_sub_i32 s2, s2, s12
	s_add_i32 s12, s3, 1
	s_sub_i32 s13, s2, s5
	s_cmp_ge_u32 s2, s5
	s_cselect_b32 s3, s12, s3
	s_cselect_b32 s2, s13, s2
	s_add_i32 s12, s3, 1
	s_cmp_ge_u32 s2, s5
	s_cselect_b32 s2, s12, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s2, s2, s4
	s_sub_i32 s2, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, s2, v2
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, PQ@rel32@lo+4
	s_addc_u32 s3, s3, PQ@rel32@hi+12
	v_add3_u32 v5, v4, v3, -1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[9:10], 2, v[5:6]
	v_add_co_u32 v4, vcc_lo, v7, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v8, vcc_lo
	v_add_co_u32 v6, vcc_lo, v9, s2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v10, vcc_lo
	s_mov_b32 s2, exec_lo
	flat_load_b32 v2, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[6:7] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[4:5], v6 dlc
	s_waitcnt_vscnt null, 0x0
	global_load_b32 v6, v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v11, -1, v6
	global_store_b32 v[0:1], v11, off
	v_cmpx_lt_i32_e32 2, v6
	s_cbranch_execz .LBB0_19
; %bb.3:                                ; %.lr.ph
	v_dual_mov_b32 v15, 1 :: v_dual_add_nc_u32 v14, 1, v3
	v_mov_b32_e32 v10, 0
	v_mov_b32_e32 v6, 0
	s_mov_b32 s3, 0
.LBB0_4:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v7, 31, v6
	v_add_nc_u32_e32 v16, 2, v10
	s_mov_b32 s4, 0
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v5, v7, vcc_lo
	flat_load_b32 v8, v[6:7] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s10, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v9, vcc_lo
	global_load_b32 v17, v[8:9], off
                                        ; implicit-def: $vgpr8_vgpr9
	v_cmpx_ge_i32_e64 v16, v11
	s_xor_b32 s5, exec_lo, s5
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	v_add_nc_u32_e32 v8, v14, v10
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, PQ@rel32@lo+4
	s_addc_u32 s13, s13, PQ@rel32@hi+12
                                        ; implicit-def: $vgpr16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v8, s12
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v9, vcc_lo
	flat_load_b32 v10, v[8:9] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	v_add_co_u32 v10, vcc_lo, s10, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v11, vcc_lo
	global_load_b32 v10, v[10:11], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, v17, v10
                                        ; implicit-def: $vgpr10
                                        ; implicit-def: $vgpr17
	s_and_b32 s4, vcc_lo, exec_lo
.LBB0_6:                                ; %Flow
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_and_not1_saveexec_b32 s5, s5
	s_cbranch_execz .LBB0_16
; %bb.7:                                ;   in Loop: Header=BB0_4 Depth=1
	v_ashrrev_i32_e32 v11, 31, v10
	s_mov_b32 s14, 0
	s_mov_b32 s12, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[10:11]
	v_add_co_u32 v12, vcc_lo, v4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v13, vcc_lo, v5, v9, vcc_lo
	flat_load_b32 v8, v[12:13] offset:4 glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s10, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	v_add_nc_u32_e32 v9, v10, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v10, 2, v9
	v_ashrrev_i32_e32 v11, 31, v10
	s_waitcnt vmcnt(0)
	v_cmpx_ngt_f32_e32 v17, v8
	s_xor_b32 s12, exec_lo, s12
; %bb.8:                                ; %._crit_edge100
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_mov_b32 s14, exec_lo
                                        ; implicit-def: $vgpr15
; %bb.9:                                ; %Flow129
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_saveexec_b32 s13, s12
	v_add_co_u32 v8, vcc_lo, v12, 4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v13, vcc_lo
	s_mov_b32 s12, s4
	s_xor_b32 exec_lo, exec_lo, s13
	s_cbranch_execz .LBB0_11
; %bb.10:                               ;   in Loop: Header=BB0_4 Depth=1
	flat_load_b32 v17, v[12:13] offset:4 glc dlc
	s_waitcnt vmcnt(0)
	s_and_not1_b32 s14, s14, exec_lo
	s_or_b32 s12, s4, exec_lo
	s_waitcnt lgkmcnt(0)
	v_ashrrev_i32_e32 v18, 31, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	v_add_co_u32 v17, vcc_lo, s10, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v18, vcc_lo, s11, v18, vcc_lo
	global_load_b32 v17, v[17:18], off
	flat_load_b32 v12, v[12:13] offset:8 glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v13, 31, v12
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, s10, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v13, vcc_lo
	global_load_b32 v12, v[12:13], off
	s_waitcnt vmcnt(0)
	v_cmp_nle_f32_e32 vcc_lo, v17, v12
	s_and_b32 s15, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s14, s14, s15
.LBB0_11:                               ; %Flow130
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_and_saveexec_b32 s13, s14
	s_cbranch_execz .LBB0_15
; %bb.12:                               ;   in Loop: Header=BB0_4 Depth=1
	flat_load_b32 v12, v[6:7] glc dlc
	s_waitcnt vmcnt(0)
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_getpc_b64 s[14:15]
	s_add_u32 s14, s14, PQ@rel32@lo+4
	s_addc_u32 s15, s15, PQ@rel32@hi+12
	s_waitcnt lgkmcnt(0)
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_u32 v12, vcc_lo, s10, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v13, vcc_lo
	v_add_co_u32 v10, vcc_lo, v10, s14
	v_add_co_ci_u32_e32 v11, vcc_lo, s15, v11, vcc_lo
	s_mov_b32 s15, 0
	global_load_b32 v15, v[12:13], off
	flat_load_b32 v12, v[10:11] glc dlc
	s_waitcnt vmcnt(0)
	s_mov_b32 s14, exec_lo
	s_waitcnt lgkmcnt(0)
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_u32 v12, vcc_lo, s10, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v13, vcc_lo
	global_load_b32 v12, v[12:13], off
	s_waitcnt vmcnt(0)
	v_cmpx_gt_f32_e32 v15, v12
	s_cbranch_execz .LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_4 Depth=1
	flat_load_b32 v12, v[10:11] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_u32 v12, vcc_lo, s10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v13, vcc_lo
	global_load_b32 v12, v[12:13], off
	flat_load_b32 v8, v[8:9] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s10, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_cmp_le_f32_e32 vcc_lo, v12, v8
	s_and_b32 s15, vcc_lo, exec_lo
.LBB0_14:                               ; %Flow132
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_dual_mov_b32 v15, v16 :: v_dual_mov_b32 v8, v10
	v_mov_b32_e32 v9, v11
	s_and_not1_b32 s12, s12, exec_lo
	s_and_b32 s14, s15, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s12, s12, s14
.LBB0_15:                               ; %Flow131
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s12, s12, exec_lo
	s_or_b32 s4, s4, s12
.LBB0_16:                               ; %Flow128
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s5, -1
                                        ; implicit-def: $vgpr10
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr11
	s_and_saveexec_b32 s12, s4
	s_cbranch_execz .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_4 Depth=1
	flat_load_b32 v10, v[8:9] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v11, v[6:7] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b32 v[8:9], v11 dlc
	s_waitcnt_vscnt null, 0x0
	flat_store_b32 v[6:7], v10 dlc
	s_waitcnt_vscnt null, 0x0
	global_load_b32 v11, v[0:1], off
	v_lshlrev_b32_e32 v10, 1, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_or_b32_e32 v12, 1, v10
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v12, v11
	s_or_not1_b32 s5, vcc_lo, exec_lo
.LBB0_18:                               ; %Flow133
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	v_dual_mov_b32 v6, v15 :: v_dual_mov_b32 v15, v12
	s_and_b32 s4, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s4, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_4
.LBB0_19:                               ; %Flow135
	s_or_b32 exec_lo, exec_lo, s2
	v_ashrrev_i32_e32 v3, 31, v2
	s_mov_b32 s2, exec_lo
	v_mov_b32_e32 v1, -1
	v_mbcnt_lo_u32_b32 v0, s2, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_mov_b32 s0, exec_lo
	global_store_b32 v[3:4], v1, off
                                        ; implicit-def: $vgpr1
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_21
; %bb.20:
	s_bcnt1_i32_b32 s1, s2
	v_mov_b32_e32 v1, 0
	v_mov_b32_e32 v3, s1
	global_atomic_add_u32 v1, v1, v3, s[8:9] glc
.LBB0_21:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, s0, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_22:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10extractMinPiS_S_PfS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10extractMinPiS_S_PfS_ii, .Lfunc_end0-_Z10extractMinPiS_S_PfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1644
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_ ; -- Begin function _Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
	.globl	_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
	.p2align	8
	.type	_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_,@function
_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_: ; @_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
; %bb.0:
	s_clause 0x1
	s_load_b512 s[16:31], s[0:1], 0x0
	s_load_b32 s2, s[0:1], 0x8c
	s_waitcnt lgkmcnt(0)
	s_load_b32 s3, s[28:29], 0x0
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB1_14
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[2:3], s[0:1], 0x48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s26, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s27, v1, vcc_lo
	global_load_b32 v0, v[0:1], off
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s2, -1
	v_mov_b32_e32 v21, s3
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_add_co_u32 v2, vcc_lo, s16, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v6, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, s2, v0
	global_load_b32 v1, v[2:3], off
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB1_3
; %bb.2:
	global_load_b32 v21, v[2:3], off offset:4
.LBB1_3:
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v1, v21
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_14
; %bb.4:                                ; %.lr.ph
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x40
	s_load_b64 s[4:5], s[0:1], 0x58
	v_add_co_u32 v3, vcc_lo, s24, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, s25, v6, vcc_lo
	v_add_co_u32 v5, vcc_lo, s20, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s21, v6, vcc_lo
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v7, 1
	s_mov_b32 s1, 0
.LBB1_5:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_7 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[1:2]
	v_add_co_u32 v9, vcc_lo, s18, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s19, v10, vcc_lo
	global_load_b32 v9, v[9:10], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 -1, v9
	s_cbranch_execz .LBB1_13
; %bb.6:                                ; %.critedge.preheader
                                        ;   in Loop: Header=BB1_5 Depth=1
	v_mov_b32_e32 v10, v8
	s_mov_b32 s7, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 2, v[9:10]
	v_add_co_u32 v9, vcc_lo, s30, v19
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s31, v20, vcc_lo
	v_add_co_u32 v11, vcc_lo, s24, v19
	v_add_co_ci_u32_e32 v12, vcc_lo, s25, v20, vcc_lo
	v_add_co_u32 v13, vcc_lo, s20, v19
	v_add_co_ci_u32_e32 v14, vcc_lo, s21, v20, vcc_lo
	v_add_co_u32 v15, vcc_lo, s22, v19
	v_add_co_ci_u32_e32 v16, vcc_lo, s23, v20, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v17, vcc_lo, s2, v19
	v_add_co_ci_u32_e32 v18, vcc_lo, s3, v20, vcc_lo
	v_add_co_u32 v19, vcc_lo, s4, v19
	v_add_co_ci_u32_e32 v20, vcc_lo, s5, v20, vcc_lo
.LBB1_7:                                ; %.critedge
                                        ;   Parent Loop BB1_5 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_atomic_cmpswap_b32 v2, v[9:10], v[7:8], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_and_saveexec_b32 s8, vcc_lo
	s_cbranch_execz .LBB1_12
; %bb.8:                                ;   in Loop: Header=BB1_7 Depth=2
	flat_load_b32 v23, v[11:12] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v24, v[3:4] glc dlc
	s_waitcnt vmcnt(0)
	s_clause 0x1
	global_load_b32 v2, v[5:6], off
	global_load_b32 v22, v[13:14], off
	s_mov_b32 s9, exec_lo
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_sub_f32_e32 v24, v24, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v24, 1.0, v24
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v24, v22, v24
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_f32_e32 v23, v24
	s_cbranch_execz .LBB1_11
; %bb.9:                                ;   in Loop: Header=BB1_7 Depth=2
	flat_load_b32 v23, v[3:4] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_f32_e32 v2, v23, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, 1.0, v2
	v_add_f32_e32 v2, v22, v2
	flat_store_b32 v[11:12], v2 dlc
	s_waitcnt_vscnt null, 0x0
	s_waitcnt lgkmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	global_store_b32 v[15:16], v0, off
	global_load_b32 v2, v[17:18], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s0, -1, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_11
; %bb.10:                               ;   in Loop: Header=BB1_7 Depth=2
	global_store_b32 v[19:20], v7, off
.LBB1_11:                               ;   in Loop: Header=BB1_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	v_dual_mov_b32 v22, v8 :: v_dual_mov_b32 v23, v7
	global_atomic_cmpswap_b32 v[9:10], v[22:23], off
.LBB1_12:                               ; %Flow103
                                        ;   in Loop: Header=BB1_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, vcc_lo
	s_waitcnt_vscnt null, 0x0
	s_or_b32 s7, s0, s7
	s_barrier
	buffer_gl0_inv
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_7
.LBB1_13:                               ; %Flow105
                                        ;   in Loop: Header=BB1_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_add_nc_u32_e32 v1, 1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v1, v21
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_5
.LBB1_14:                               ; %.loopexit68
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 384
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 32
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_, .Lfunc_end1-_Z13A_star_expandPiS_PfS_PVfS_S_S_S_iiiS_S_S0_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 736
; NumSgprs: 34
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 34
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10keepHeapPQPiPfii    ; -- Begin function _Z10keepHeapPQPiPfii
	.globl	_Z10keepHeapPQPiPfii
	.p2align	8
	.type	_Z10keepHeapPQPiPfii,@function
_Z10keepHeapPQPiPfii:                   ; @_Z10keepHeapPQPiPfii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB2_20
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_mov_b32 s1, 0
	global_load_b32 v0, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, 0, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_20
; %bb.2:
	s_ashr_i32 s0, s5, 31
	s_add_i32 s4, s4, s5
	s_add_i32 s6, s5, s0
	s_add_i32 s4, s4, -1
	s_xor_b32 s6, s6, s0
	s_ashr_i32 s8, s4, 31
	v_cvt_f32_u32_e32 v2, s6
	s_sub_i32 s7, 0, s6
	s_add_i32 s4, s4, s8
	s_xor_b32 s0, s8, s0
	s_xor_b32 s4, s4, s8
	v_rcp_iflag_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v2, 0x4f7ffffe, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v2, v2
	v_readfirstlane_b32 s5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s7, s7, s5
	s_mul_hi_u32 s7, s5, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s5, s5, s7
	s_mul_hi_u32 s5, s4, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s7, s5, s6
	s_sub_i32 s4, s4, s7
	s_add_i32 s7, s5, 1
	s_sub_i32 s8, s4, s6
	s_cmp_ge_u32 s4, s6
	s_cselect_b32 s5, s7, s5
	s_cselect_b32 s4, s8, s4
	s_add_i32 s7, s5, 1
	s_cmp_ge_u32 s4, s6
	s_cselect_b32 s4, s7, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s4, s4, s0
	s_sub_i32 s0, s4, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, s0, v1
	v_add_nc_u32_e32 v8, v7, v0
	v_mov_b32_e32 v0, v7
.LBB2_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_7 Depth 2
                                        ;     Child Loop BB2_15 Depth 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 1, v0
	s_mov_b32 s0, exec_lo
	v_add_nc_u32_e32 v2, 2, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ge_i32_e64 v2, v8
	s_xor_b32 s4, exec_lo, s0
	s_cbranch_execz .LBB2_11
; %bb.4:                                ;   in Loop: Header=BB2_3 Depth=1
	v_or_b32_e32 v2, 1, v3
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e64 v2, v8
	s_cbranch_execz .LBB2_10
; %bb.5:                                ;   in Loop: Header=BB2_3 Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, PQ@rel32@lo+4
	s_addc_u32 s7, s7, PQ@rel32@hi+12
	v_cmp_ge_i32_e64 s0, v3, v7
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v4, s6
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v5, vcc_lo
	flat_load_b32 v11, v[9:10] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v12, 31, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_u32 v11, vcc_lo, s2, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v12, vcc_lo
	v_add_co_u32 v4, vcc_lo, v9, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, v10, v5, vcc_lo
	global_load_b32 v1, v[11:12], off
	flat_load_b32 v4, v[4:5] offset:4 glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, s2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, v1, v4
	s_and_b32 s0, vcc_lo, s0
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB2_10
; %bb.6:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_mov_b32 s0, 0
                                        ; implicit-def: $sgpr6
.LBB2_7:                                ; %.lr.ph
                                        ;   Parent Loop BB2_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v1, -1, v2
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, PQ@rel32@lo+4
	s_addc_u32 s9, s9, PQ@rel32@hi+12
	s_or_b32 s6, s6, exec_lo
	s_mov_b32 s7, exec_lo
	v_lshrrev_b32_e32 v3, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v1, v3
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v4, 1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[2:3]
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[4:5]
	v_add_co_u32 v5, vcc_lo, v5, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v6, vcc_lo
	flat_load_b32 v9, v[5:6] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s2, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
	v_add_co_u32 v1, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	global_load_b32 v3, v[9:10], off
	flat_load_b32 v9, v[1:2] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, vcc_lo, s2, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
	global_load_b32 v9, v[9:10], off
	s_waitcnt vmcnt(0)
	v_cmpx_gt_f32_e32 v3, v9
	s_cbranch_execz .LBB2_9
; %bb.8:                                ;   in Loop: Header=BB2_7 Depth=2
	flat_load_b32 v3, v[1:2] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v9, v[5:6] glc dlc
	s_waitcnt vmcnt(0)
	v_cmp_le_i32_e32 vcc_lo, v4, v7
	s_and_not1_b32 s6, s6, exec_lo
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[1:2], v9 dlc
	s_waitcnt_vscnt null, 0x0
	flat_store_b32 v[5:6], v3 dlc
	s_waitcnt_vscnt null, 0x0
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s6, s6, s8
.LBB2_9:                                ; %Flow
                                        ;   in Loop: Header=BB2_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v2, v4
	s_and_b32 s7, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s7, s0
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_7
.LBB2_10:                               ; %Flow100
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr2
.LBB2_11:                               ; %Flow105
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB2_19
; %bb.12:                               ;   in Loop: Header=BB2_3 Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, PQ@rel32@lo+4
	s_addc_u32 s5, s5, PQ@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	v_add_co_u32 v9, vcc_lo, v4, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v5, vcc_lo
	s_mov_b32 s4, exec_lo
	flat_load_b32 v11, v[9:10] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v12, 31, v11
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s2, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v12, vcc_lo
	v_add_co_u32 v4, vcc_lo, v9, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, v10, v5, vcc_lo
	global_load_b32 v6, v[11:12], off
	flat_load_b32 v9, v[4:5] offset:4 glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, vcc_lo, s2, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
	global_load_b32 v1, v[9:10], off
	flat_load_b32 v4, v[4:5] offset:8 glc dlc
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, s2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	v_cvt_i32_f32_e32 v5, v6
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v4, v4
	v_min_i32_e32 v6, v1, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e64 v6, v5
	s_cbranch_execz .LBB2_18
; %bb.13:                               ;   in Loop: Header=BB2_3 Depth=1
	v_or_b32_e32 v3, 1, v3
	v_cmp_gt_i32_e32 vcc_lo, v1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v4, v3, v2, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, v4, v7
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_18
; %bb.14:                               ; %.lr.ph79.preheader
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_mov_b32 s5, 0
                                        ; implicit-def: $sgpr6
.LBB2_15:                               ; %.lr.ph79
                                        ;   Parent Loop BB2_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v1, -1, v4
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, PQ@rel32@lo+4
	s_addc_u32 s9, s9, PQ@rel32@hi+12
	v_ashrrev_i32_e32 v5, 31, v4
	s_or_b32 s6, s6, exec_lo
	s_mov_b32 s7, exec_lo
	v_lshrrev_b32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_nc_u32_e32 v1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 1, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, v2, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	flat_load_b32 v9, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s2, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
	v_add_co_u32 v4, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
	global_load_b32 v6, v[9:10], off
	flat_load_b32 v9, v[4:5] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, vcc_lo, s2, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
	global_load_b32 v9, v[9:10], off
	s_waitcnt vmcnt(0)
	v_cmpx_gt_f32_e32 v6, v9
	s_cbranch_execz .LBB2_17
; %bb.16:                               ;   in Loop: Header=BB2_15 Depth=2
	flat_load_b32 v6, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v9, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_cmp_le_i32_e32 vcc_lo, v1, v7
	s_and_not1_b32 s6, s6, exec_lo
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[4:5], v9 dlc
	s_waitcnt_vscnt null, 0x0
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s6, s6, s8
.LBB2_17:                               ; %Flow101
                                        ;   in Loop: Header=BB2_15 Depth=2
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v4, v1
	s_and_b32 s7, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s7, s5
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB2_15
.LBB2_18:                               ; %Flow104
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
.LBB2_19:                               ; %.loopexit
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v0, 1, v0
	v_cmp_ge_i32_e32 vcc_lo, v0, v8
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB2_3
.LBB2_20:                               ; %.loopexit75
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10keepHeapPQPiPfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z10keepHeapPQPiPfii, .Lfunc_end2-_Z10keepHeapPQPiPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1544
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z5setNVPiS_S_i         ; -- Begin function _Z5setNVPiS_S_i
	.globl	_Z5setNVPiS_S_i
	.p2align	8
	.type	_Z5setNVPiS_S_i,@function
_Z5setNVPiS_S_i:                        ; @_Z5setNVPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB3_5
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v0, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 1, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_5
; %bb.2:
	s_load_b64 s[0:1], s[0:1], 0x10
	s_mov_b32 s3, exec_lo
	s_mov_b32 s2, exec_lo
	v_mbcnt_lo_u32_b32 v0, s3, 0
                                        ; implicit-def: $vgpr2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB3_4
; %bb.3:
	s_bcnt1_i32_b32 s3, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, s3
	s_waitcnt lgkmcnt(0)
	global_atomic_add_u32 v2, v2, v3, s[0:1] glc
.LBB3_4:
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_readfirstlane_b32 s0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, s0, v0
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	global_store_b32 v[2:3], v1, off
.LBB3_5:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5setNVPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z5setNVPiS_S_i, .Lfunc_end3-_Z5setNVPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 264
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8insertPQPiS_S_PfiiS_ ; -- Begin function _Z8insertPQPiS_S_PfiiS_
	.globl	_Z8insertPQPiS_S_PfiiS_
	.p2align	8
	.type	_Z8insertPQPiS_S_PfiiS_,@function
_Z8insertPQPiS_S_PfiiS_:                ; @_Z8insertPQPiS_S_PfiiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x3c
	s_load_b64 s[2:3], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB4_11
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_load_b32 s12, s[8:9], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, s12, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB4_11
; %bb.2:                                ; %.lr.ph60
	s_ashr_i32 s13, s2, 31
	s_add_i32 s3, s2, s3
	s_add_i32 s14, s2, s13
	s_add_i32 s3, s3, -1
	s_xor_b32 s14, s14, s13
	s_ashr_i32 s17, s3, 31
	v_cvt_f32_u32_e32 v0, s14
	s_sub_i32 s16, 0, s14
	s_add_i32 s3, s3, s17
	s_xor_b32 s13, s17, s13
	s_xor_b32 s3, s3, s17
	v_rcp_iflag_f32_e32 v0, v0
	s_load_b64 s[0:1], s[0:1], 0x28
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v10, s12
	v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v9, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_cvt_u32_f32_e32 v0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s15, v0
	s_mul_i32 s16, s16, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s16, s15, s16
	s_add_i32 s15, s15, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s15, s3, s15
	s_mul_i32 s16, s15, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s3, s3, s16
	s_add_i32 s16, s15, 1
	s_sub_i32 s17, s3, s14
	s_cmp_ge_u32 s3, s14
	s_cselect_b32 s15, s16, s15
	s_cselect_b32 s3, s17, s3
	s_add_i32 s16, s15, 1
	s_cmp_ge_u32 s3, s14
	s_cselect_b32 s3, s16, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s3, s13
	s_sub_i32 s3, s3, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mul_lo_u32 v0, s3, v1
	s_mov_b32 s3, 0
.LBB4_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB4_6 Depth 2
	v_ashrrev_i32_e32 v5, 31, v4
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[4:5]
	v_add_co_u32 v5, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	global_load_b32 v7, v[5:6], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[11:12], 2, v[7:8]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s0, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s1, v12, vcc_lo
	global_load_b32 v8, v[11:12], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 -1, v8
	s_cbranch_execz .LBB4_10
; %bb.4:                                ;   in Loop: Header=BB4_3 Depth=1
	global_load_b32 v8, v[2:3], off
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, PQ@rel32@lo+4
	s_addc_u32 s13, s13, PQ@rel32@hi+12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v10, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v10, s12
	v_add_co_ci_u32_e32 v11, vcc_lo, s13, v11, vcc_lo
	flat_store_b32 v[10:11], v7 dlc
	s_waitcnt_vscnt null, 0x0
	global_load_b32 v7, v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v7, 1, v7
	global_store_b32 v[2:3], v7, off
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_u32 v5, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	global_store_b32 v[5:6], v1, off
	global_load_b32 v5, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 1, v5
	s_cbranch_execz .LBB4_9
; %bb.5:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB4_3 Depth=1
	v_add_nc_u32_e32 v7, -1, v5
	s_mov_b32 s12, 0
                                        ; implicit-def: $sgpr13
.LBB4_6:                                ; %.lr.ph
                                        ;   Parent Loop BB4_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v11, -1, v7
	s_getpc_b64 s[14:15]
	s_add_u32 s14, s14, PQ@rel32@lo+4
	s_addc_u32 s15, s15, PQ@rel32@hi+12
	v_add_nc_u32_e32 v7, v7, v0
	s_or_b32 s13, s13, exec_lo
	v_lshrrev_b32_e32 v10, 1, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_add_nc_u32_e32 v5, v10, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_u32 v5, vcc_lo, v5, s14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v6, vcc_lo, s15, v6, vcc_lo
	flat_load_b32 v12, v[5:6] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v13, 31, v12
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, s10, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v13, vcc_lo
	v_add_co_u32 v7, vcc_lo, v7, s14
	v_add_co_ci_u32_e32 v8, vcc_lo, s15, v8, vcc_lo
	s_mov_b32 s14, exec_lo
	global_load_b32 v14, v[12:13], off
	flat_load_b32 v12, v[7:8] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_u32 v12, vcc_lo, s10, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v13, vcc_lo
	global_load_b32 v12, v[12:13], off
	s_waitcnt vmcnt(0)
	v_cmpx_gt_f32_e32 v14, v12
	s_cbranch_execz .LBB4_8
; %bb.7:                                ;   in Loop: Header=BB4_6 Depth=2
	flat_load_b32 v12, v[7:8] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v13, v[5:6] glc dlc
	s_waitcnt vmcnt(0)
	v_cmp_gt_u32_e32 vcc_lo, 2, v11
	s_and_not1_b32 s13, s13, exec_lo
	s_waitcnt lgkmcnt(0)
	flat_store_b32 v[7:8], v13 dlc
	s_waitcnt_vscnt null, 0x0
	flat_store_b32 v[5:6], v12 dlc
	s_waitcnt_vscnt null, 0x0
	s_and_b32 s15, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s13, s13, s15
.LBB4_8:                                ; %Flow
                                        ;   in Loop: Header=BB4_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s14
	v_mov_b32_e32 v7, v10
	s_and_b32 s14, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s12, s14, s12
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB4_6
.LBB4_9:                                ; %Flow83
                                        ;   in Loop: Header=BB4_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b32 v10, v9, s[8:9]
.LBB4_10:                               ; %Flow84
                                        ;   in Loop: Header=BB4_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v4, s2, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v4, v10
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB4_3
.LBB4_11:                               ; %.loopexit56
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8insertPQPiS_S_PfiiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z8insertPQPiS_S_PfiiS_, .Lfunc_end4-_Z8insertPQPiS_S_PfiiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 980
; NumSgprs: 20
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	PQ                      ; @PQ
	.type	PQ,@object
	.section	.bss,"aw",@nobits
	.globl	PQ
	.p2align	4, 0x0
PQ:
	.zero	400000000
	.size	PQ, 400000000

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym PQ
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10extractMinPiS_S_PfS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10extractMinPiS_S_PfS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
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...

	.end_amdgpu_metadata
