#include <stdio.h>
#include <assert.h>

#define N 2048 * 2048 // Number of elements in each vector

inline cudaError_t checkCuda(cudaError_t result) {
    if (result != cudaSuccess) {
        printf("Error: %s\n", cudaGetErrorString(result));
        assert(result == cudaSuccess);
    }
    return result;
}

// Initialize memory
__global__ void initVectors(int * a, int * b, int * c) {
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    int stride = blockDim.x * gridDim.x;
    
    for(; i < N; i += stride) {
        a[i] = 2;
        b[i] = 1;
        c[i] = 0;
    }
}

/*
 * Optimize this already-accelerated codebase. Work iteratively,
 * and use nsys to support your work.
 *
 * Aim to profile `saxpy` (without modifying `N`) running under
 * 20us.
 *
 * EDIT: I made it run under 77 us :)
 *
 * Some bugs have been placed in this codebase for your edification.
 */

__global__ void saxpy(int * a, int * b, int * c)
{
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    int stride = gridDim.x * blockDim.x;
    
    for (; i < N; i += stride)
        c[i] = 2 * a[i] + b[i];
}

int main()
{
    int *a, *b, *c;
    int size = N * sizeof (int); // The total number of bytes per vector
    
    int deviceId;
    cudaDeviceProp props;
    
    cudaGetDevice(&deviceId);
    cudaGetDeviceProperties(&props, deviceId);

    checkCuda(cudaMallocManaged(&a, size));
    checkCuda(cudaMallocManaged(&b, size));
    checkCuda(cudaMallocManaged(&c, size));

    int threads_per_block = props.warpSize * 8;
    int number_of_blocks = props.multiProcessorCount * 32; // using stride is better than arbitrary blocks
    
    // prefetch to gpu
    checkCuda(cudaMemPrefetchAsync(a, size, deviceId));
    checkCuda(cudaMemPrefetchAsync(b, size, deviceId));
    checkCuda(cudaMemPrefetchAsync(c, size, deviceId));
    
    initVectors <<< number_of_blocks, threads_per_block >>>( a, b, c );
    checkCuda(cudaGetLastError());
    checkCuda(cudaDeviceSynchronize());
    
    saxpy <<< number_of_blocks, threads_per_block >>> ( a, b, c );
    checkCuda(cudaGetLastError());
    checkCuda(cudaDeviceSynchronize());

    // Print out the first and last 5 values of c for a quality check
    for( int i = 0; i < 5; ++i )
        printf("c[%d] = %d, ", i, c[i]);
    printf ("\n");
    for( int i = N-5; i < N; ++i )
        printf("c[%d] = %d, ", i, c[i]);
    printf ("\n");

    cudaFree( a ); cudaFree( b ); cudaFree( c );
}

	.file	"tmpxft_002d061b_00000000-6_04.challenge.saxpy.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Error: %s\n"
	.text
	.type	_Z9checkCuda9cudaError.isra.0, @function
_Z9checkCuda9cudaError.isra.0:
.LFB2176:
	.cfi_startproc
	testl	%edi, %edi
	je	.L2
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	popq	%rcx
	.cfi_def_cfa_offset 8
	movq	%rax, %rdx
	xorl	%eax, %eax
	jmp	__printf_chk@PLT
.L2:
	ret
	.cfi_endproc
.LFE2176:
	.size	_Z9checkCuda9cudaError.isra.0, .-_Z9checkCuda9cudaError.isra.0
	.globl	_Z35__device_stub__Z11initVectorsPiS_S_PiS_S_
	.type	_Z35__device_stub__Z11initVectorsPiS_S_PiS_S_, @function
_Z35__device_stub__Z11initVectorsPiS_S_PiS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z11initVectorsPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L8:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z35__device_stub__Z11initVectorsPiS_S_PiS_S_, .-_Z35__device_stub__Z11initVectorsPiS_S_PiS_S_
	.globl	_Z11initVectorsPiS_S_
	.type	_Z11initVectorsPiS_S_, @function
_Z11initVectorsPiS_S_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z11initVectorsPiS_S_PiS_S_
	.cfi_endproc
.LFE2054:
	.size	_Z11initVectorsPiS_S_, .-_Z11initVectorsPiS_S_
	.globl	_Z28__device_stub__Z5saxpyPiS_S_PiS_S_
	.type	_Z28__device_stub__Z5saxpyPiS_S_PiS_S_, @function
_Z28__device_stub__Z5saxpyPiS_S_PiS_S_:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z5saxpyPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L13:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z28__device_stub__Z5saxpyPiS_S_PiS_S_, .-_Z28__device_stub__Z5saxpyPiS_S_PiS_S_
	.globl	_Z5saxpyPiS_S_
	.type	_Z5saxpyPiS_S_, @function
_Z5saxpyPiS_S_:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z5saxpyPiS_S_PiS_S_
	.cfi_endproc
.LFE2056:
	.size	_Z5saxpyPiS_S_, .-_Z5saxpyPiS_S_
	.section	.rodata.str1.1
.LC1:
	.string	"c[%d] = %d, "
.LC2:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$1112, %rsp
	.cfi_def_cfa_offset 1152
	movq	%fs:40, %rax
	movq	%rax, 1096(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rdi
	call	cudaGetDevice@PLT
	movl	12(%rsp), %esi
	leaq	64(%rsp), %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movl	$1, %edx
	movl	$16777216, %esi
	leaq	16(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movl	$1, %edx
	movl	$16777216, %esi
	leaq	24(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movl	$1, %edx
	movl	$16777216, %esi
	leaq	32(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movl	12(%rsp), %edx
	movq	16(%rsp), %rdi
	xorl	%ecx, %ecx
	movl	372(%rsp), %eax
	movl	$16777216, %esi
	movl	452(%rsp), %ebx
	leal	0(,%rax,8), %ebp
	sall	$5, %ebx
	call	cudaMemPrefetchAsync@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movl	12(%rsp), %edx
	movq	24(%rsp), %rdi
	xorl	%ecx, %ecx
	movl	$16777216, %esi
	call	cudaMemPrefetchAsync@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movl	12(%rsp), %edx
	movq	32(%rsp), %rdi
	xorl	%ecx, %ecx
	movl	$16777216, %esi
	call	cudaMemPrefetchAsync@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movl	%ebp, 52(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%ebx, 40(%rsp)
	movq	%rax, 56(%rsp)
	movl	60(%rsp), %ecx
	movq	%rax, 44(%rsp)
	movq	52(%rsp), %rdx
	movq	40(%rsp), %rdi
	movl	48(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z35__device_stub__Z11initVectorsPiS_S_PiS_S_
.L19:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	movl	%ebp, 52(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%ebx, 40(%rsp)
	movq	%rax, 56(%rsp)
	movl	60(%rsp), %ecx
	movq	%rax, 44(%rsp)
	movq	52(%rsp), %rdx
	movq	40(%rsp), %rdi
	movl	48(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z28__device_stub__Z5saxpyPiS_S_PiS_S_
.L20:
	call	cudaGetLastError@PLT
	xorl	%ebx, %ebx
	leaq	.LC1(%rip), %r13
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	call	_Z9checkCuda9cudaError.isra.0
.L21:
	movq	32(%rsp), %rax
	movl	%ebx, %edx
	movq	%r13, %rsi
	movl	$2, %edi
	movl	(%rax,%rbx,4), %ecx
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$5, %rbx
	jne	.L21
	leaq	.LC2(%rip), %r12
	movl	$2, %edi
	xorl	%eax, %eax
	movl	$16777196, %ebp
	movq	%r12, %rsi
	movl	$4194299, %ebx
	call	__printf_chk@PLT
.L22:
	movq	32(%rsp), %rax
	movl	%ebx, %edx
	movq	%r13, %rsi
	movl	$2, %edi
	incl	%ebx
	movl	(%rax,%rbp), %ecx
	xorl	%eax, %eax
	addq	$4, %rbp
	call	__printf_chk@PLT
	cmpl	$4194304, %ebx
	jne	.L22
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	1096(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$1112, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z5saxpyPiS_S_"
.LC4:
	.string	"_Z11initVectorsPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z5saxpyPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11initVectorsPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <assert.h>

#define N 2048 * 2048 // Number of elements in each vector

inline hipError_t checkCuda(hipError_t result) {
    if (result != hipSuccess) {
        printf("Error: %s\n", hipGetErrorString(result));
        assert(result == hipSuccess);
    }
    return result;
}

// Initialize memory
__global__ void initVectors(int * a, int * b, int * c) {
    int i = blockDim.x * blockIdx.x + threadIdx.x;
    int stride = blockDim.x * gridDim.x;
    
    for(; i < N; i += stride) {
        a[i] = 2;
        b[i] = 1;
        c[i] = 0;
    }
}

/*
 * Optimize this already-accelerated codebase. Work iteratively,
 * and use nsys to support your work.
 *
 * Aim to profile `saxpy` (without modifying `N`) running under
 * 20us.
 *
 * EDIT: I made it run under 77 us :)
 *
 * Some bugs have been placed in this codebase for your edification.
 */

__global__ void saxpy(int * a, int * b, int * c)
{
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    int stride = gridDim.x * blockDim.x;
    
    for (; i < N; i += stride)
        c[i] = 2 * a[i] + b[i];
}

int main()
{
    int *a, *b, *c;
    int size = N * sizeof (int); // The total number of bytes per vector
    
    int deviceId;
    hipDeviceProp_t props;
    
    hipGetDevice(&deviceId);
    hipGetDeviceProperties(&props, deviceId);

    checkCuda(hipMallocManaged(&a, size));
    checkCuda(hipMallocManaged(&b, size));
    checkCuda(hipMallocManaged(&c, size));

    int threads_per_block = props.warpSize * 8;
    int number_of_blocks = props.multiProcessorCount * 32; // using stride is better than arbitrary blocks
    
    // prefetch to gpu
    checkCuda(hipMemPrefetchAsync(a, size, deviceId));
    checkCuda(hipMemPrefetchAsync(b, size, deviceId));
    checkCuda(hipMemPrefetchAsync(c, size, deviceId));
    
    initVectors <<< number_of_blocks, threads_per_block >>>( a, b, c );
    checkCuda(hipGetLastError());
    checkCuda(hipDeviceSynchronize());
    
    saxpy <<< number_of_blocks, threads_per_block >>> ( a, b, c );
    checkCuda(hipGetLastError());
    checkCuda(hipDeviceSynchronize());

    // Print out the first and last 5 values of c for a quality check
    for( int i = 0; i < 5; ++i )
        printf("c[%d] = %d, ", i, c[i]);
    printf ("\n");
    for( int i = N-5; i < N; ++i )
        printf("c[%d] = %d, ", i, c[i]);
    printf ("\n");

    hipFree( a ); hipFree( b ); hipFree( c );
}

	.text
	.file	"04.challenge.saxpy.hip"
	.globl	_Z26__device_stub__initVectorsPiS_S_ # -- Begin function _Z26__device_stub__initVectorsPiS_S_
	.type	_Z26__device_stub__initVectorsPiS_S_,@function
_Z26__device_stub__initVectorsPiS_S_:   # @_Z26__device_stub__initVectorsPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11initVectorsPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__initVectorsPiS_S_, .Lfunc_end0-_Z26__device_stub__initVectorsPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__saxpyPiS_S_  # -- Begin function _Z20__device_stub__saxpyPiS_S_
	.type	_Z20__device_stub__saxpyPiS_S_,@function
_Z20__device_stub__saxpyPiS_S_:         # @_Z20__device_stub__saxpyPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5saxpyPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z20__device_stub__saxpyPiS_S_, .Lfunc_end1-_Z20__device_stub__saxpyPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$1504, %rsp                     # imm = 0x5E0
	.cfi_def_cfa_offset 1536
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	leaq	4(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDevice
	movl	(%rbx), %esi
	leaq	32(%rsp), %rdi
	callq	hipGetDevicePropertiesR0600
	leaq	24(%rsp), %rdi
	movl	$16777216, %esi                 # imm = 0x1000000
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	je	.LBB2_2
# %bb.1:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_2:                                # %_Z9checkCuda10hipError_t.exit
	leaq	16(%rsp), %rdi
	movl	$16777216, %esi                 # imm = 0x1000000
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	je	.LBB2_4
# %bb.3:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_4:                                # %_Z9checkCuda10hipError_t.exit29
	leaq	8(%rsp), %rdi
	movl	$16777216, %esi                 # imm = 0x1000000
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	je	.LBB2_6
# %bb.5:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_6:                                # %_Z9checkCuda10hipError_t.exit31
	movl	340(%rsp), %ebp
	movl	420(%rsp), %ebx
	movq	24(%rsp), %rdi
	movl	4(%rsp), %edx
	movl	$16777216, %esi                 # imm = 0x1000000
	xorl	%ecx, %ecx
	callq	hipMemPrefetchAsync
	testl	%eax, %eax
	je	.LBB2_8
# %bb.7:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_8:                                # %_Z9checkCuda10hipError_t.exit33
	movq	16(%rsp), %rdi
	movl	4(%rsp), %edx
	movl	$16777216, %esi                 # imm = 0x1000000
	xorl	%ecx, %ecx
	callq	hipMemPrefetchAsync
	testl	%eax, %eax
	je	.LBB2_10
# %bb.9:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_10:                               # %_Z9checkCuda10hipError_t.exit35
	shll	$3, %ebp
	shll	$5, %ebx
	movq	8(%rsp), %rdi
	movl	4(%rsp), %edx
	movl	$16777216, %esi                 # imm = 0x1000000
	xorl	%ecx, %ecx
	callq	hipMemPrefetchAsync
	testl	%eax, %eax
	je	.LBB2_12
# %bb.11:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_12:                               # %_Z9checkCuda10hipError_t.exit37
	movl	%ebx, %ebx
	btsq	$32, %rbx
	movl	%ebp, %r14d
	btsq	$32, %r14
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_14
# %bb.13:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z26__device_stub__initVectorsPiS_S_
.LBB2_14:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB2_16
# %bb.15:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_16:                               # %_Z9checkCuda10hipError_t.exit39
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	je	.LBB2_18
# %bb.17:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_18:                               # %_Z9checkCuda10hipError_t.exit41
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_20
# %bb.19:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z20__device_stub__saxpyPiS_S_
.LBB2_20:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB2_22
# %bb.21:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_22:                               # %_Z9checkCuda10hipError_t.exit43
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	je	.LBB2_24
# %bb.23:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_24:                               # %_Z9checkCuda10hipError_t.exit45.preheader
	xorl	%ebx, %ebx
.LBB2_25:                               # %_Z9checkCuda10hipError_t.exit45
                                        # =>This Inner Loop Header: Depth=1
	movq	8(%rsp), %rax
	movl	(%rax,%rbx,4), %edx
	movl	$.L.str, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$5, %rbx
	jne	.LBB2_25
# %bb.26:
	movl	$10, %edi
	callq	putchar@PLT
	movl	$4194299, %ebx                  # imm = 0x3FFFFB
.LBB2_27:                               # =>This Inner Loop Header: Depth=1
	movq	8(%rsp), %rax
	movl	(%rax,%rbx,4), %edx
	movl	$.L.str, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$4194304, %rbx                  # imm = 0x400000
	jne	.LBB2_27
# %bb.28:
	movl	$10, %edi
	callq	putchar@PLT
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$1504, %rsp                     # imm = 0x5E0
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11initVectorsPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5saxpyPiS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11initVectorsPiS_S_,@object   # @_Z11initVectorsPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z11initVectorsPiS_S_
	.p2align	3, 0x0
_Z11initVectorsPiS_S_:
	.quad	_Z26__device_stub__initVectorsPiS_S_
	.size	_Z11initVectorsPiS_S_, 8

	.type	_Z5saxpyPiS_S_,@object          # @_Z5saxpyPiS_S_
	.globl	_Z5saxpyPiS_S_
	.p2align	3, 0x0
_Z5saxpyPiS_S_:
	.quad	_Z20__device_stub__saxpyPiS_S_
	.size	_Z5saxpyPiS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"c[%d] = %d, "
	.size	.L.str, 13

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Error: %s\n"
	.size	.L.str.2, 11

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11initVectorsPiS_S_"
	.size	.L__unnamed_1, 22

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z5saxpyPiS_S_"
	.size	.L__unnamed_2, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__initVectorsPiS_S_
	.addrsig_sym _Z20__device_stub__saxpyPiS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11initVectorsPiS_S_
	.addrsig_sym _Z5saxpyPiS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11initVectorsPiS_S_   ; -- Begin function _Z11initVectorsPiS_S_
	.globl	_Z11initVectorsPiS_S_
	.p2align	8
	.type	_Z11initVectorsPiS_S_,@function
_Z11initVectorsPiS_S_:                  ; @_Z11initVectorsPiS_S_
; %bb.0:
	s_load_b32 s4, s[0:1], 0x24
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 0x400000, v1
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s9, s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	v_dual_mov_b32 v0, 2 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v4, 1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s9, s8
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[8:9], 2
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v8, vcc_lo, s6, v2
	v_add_nc_u32_e32 v1, s8, v1
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v10, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v11, vcc_lo, s3, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, 0x3fffff, v1
	v_add_co_u32 v2, s0, v2, s10
	v_add_co_ci_u32_e64 v3, s0, s11, v3, s0
	s_or_b32 s1, vcc_lo, s1
	global_store_b32 v[6:7], v0, off
	global_store_b32 v[8:9], v4, off
	global_store_b32 v[10:11], v5, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11initVectorsPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11initVectorsPiS_S_, .Lfunc_end0-_Z11initVectorsPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 256
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z5saxpyPiS_S_          ; -- Begin function _Z5saxpyPiS_S_
	.globl	_Z5saxpyPiS_S_
	.p2align	8
	.type	_Z5saxpyPiS_S_,@function
_Z5saxpyPiS_S_:                         ; @_Z5saxpyPiS_S_
; %bb.0:
	s_load_b32 s4, s[0:1], 0x24
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 0x400000, v1
	s_cbranch_execz .LBB1_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s9, s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s9, s8
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[8:9], 2
.LBB1_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	v_add_nc_u32_e32 v1, s8, v1
	global_load_b32 v0, v[4:5], off
	global_load_b32 v6, v[6:7], off
	v_add_co_u32 v4, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s10
	v_cmp_lt_i32_e64 s0, 0x3fffff, v1
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	s_or_b32 s1, s0, s1
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v0, v0, 1, v6
	global_store_b32 v[4:5], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_2
.LBB1_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5saxpyPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z5saxpyPiS_S_, .Lfunc_end1-_Z5saxpyPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 256
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11initVectorsPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11initVectorsPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5saxpyPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z5saxpyPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
