#include<stdio.h>
#include<stdlib.h>
#include<math.h>
#include<time.h>

#define N   10000000 	//job size = 1K, 10K, 100K, 1M and 10M
#define M   128 	//Threads per block =128
#define R   16 		//radius = 2,4,8,16

// CUDA API error checking macro
static void handleError( cudaError_t err,
                         const char *file,
                         int line ) {
    if (err != cudaSuccess) {
        printf( "%s in %s at line %d\n", cudaGetErrorString( err ),
                file, line );
        exit( EXIT_FAILURE );
    }
}
#define cudaCheck( err ) (handleError( err, __FILE__, __LINE__ ))

__global__ void stencil_1d(int *in, int *out) 
{
	__shared__ int temp[M + 2 * R];
	int gindex = threadIdx.x + blockIdx.x * blockDim.x;
	int lindex = threadIdx.x + R;
	temp[lindex] = in[gindex]; // Read input elements into shared memory
	
	if (threadIdx.x < R) 
	{
	temp[lindex - R] = in[gindex - R];
	temp[lindex + M] = in[gindex + M];
	}
	
	// Synchronize (ensure all the data is available)
	__syncthreads();
	int result = 0;
	
	// Apply the stencil
	for (int offset = -R ; offset <= R ; offset++)
	{
		result += temp[lindex + offset];
	}
	
	// Store the result
	out[gindex] = result;
}	

int main()
{
	unsigned int i;
	int h_in[N + 2 * R], h_out[N];
	int *d_in, *d_out;

	//time start and stop
	cudaEvent_t start, stop;
	float time;

	cudaEventCreate(&start);
	cudaEventCreate(&stop);

	for( i = 0; i < (N + 2*R); ++i )
	h_in[i] = 1; 

	// Allocate device memory
	cudaCheck( cudaMalloc( &d_in, (N + 2*R) * sizeof(int)) );
	cudaCheck( cudaMalloc( &d_out, N * sizeof(int)) );

	//copy fro CPU to GPU memory
	cudaCheck( cudaMemcpy( d_in, h_in, (N + 2*R) * sizeof(int), cudaMemcpyHostToDevice) );
	cudaEventRecord( start, 0 );

	//Call stencil kernel
	stencil_1d<<< (N + M - 1)/M, M >>> (d_in, d_out);

	cudaEventRecord( stop, 0 );
	cudaEventSynchronize(stop);
	cudaEventElapsedTime( &time, start, stop );
	cudaEventDestroy( start );
	cudaEventDestroy( stop );
	printf("GPU Execution Time = %f\n",time);

	//copy from device to host
	cudaCheck( cudaMemcpy( h_out, d_out, N * sizeof(int), cudaMemcpyDeviceToHost) );

	// Cleanup
	cudaFree(d_in);
	cudaFree(d_out);

  return 0;
}


	.file	"tmpxft_003ac27c_00000000-6_Shared_1D.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/SumukhRaghuramBhat/Heterogeneous_Computing/master/HW0/Shared_1D.cu"
.LC1:
	.string	"%s in %s at line %d\n"
	.text
	.type	_ZL11handleError9cudaErrorPKci.constprop.0, @function
_ZL11handleError9cudaErrorPKci.constprop.0:
.LFB2174:
	.cfi_startproc
	testl	%edi, %edi
	je	.L2
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%esi, 12(%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r8d
	movl	$2, %edi
	leaq	.LC0(%rip), %rcx
	movq	%rax, %rdx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2174:
	.size	_ZL11handleError9cudaErrorPKci.constprop.0, .-_ZL11handleError9cudaErrorPKci.constprop.0
	.globl	_Z32__device_stub__Z10stencil_1dPiS_PiS_
	.type	_Z32__device_stub__Z10stencil_1dPiS_PiS_, @function
_Z32__device_stub__Z10stencil_1dPiS_PiS_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10stencil_1dPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L8:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z32__device_stub__Z10stencil_1dPiS_PiS_, .-_Z32__device_stub__Z10stencil_1dPiS_PiS_
	.globl	_Z10stencil_1dPiS_
	.type	_Z10stencil_1dPiS_, @function
_Z10stencil_1dPiS_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z10stencil_1dPiS_PiS_
	.cfi_endproc
.LFE2054:
	.size	_Z10stencil_1dPiS_, .-_Z10stencil_1dPiS_
	.section	.rodata.str1.1
.LC2:
	.string	"GPU Execution Time = %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	-79998976(%rsp), %r11
	.cfi_def_cfa 11, 79998992
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$1216, %rsp
	.cfi_def_cfa_offset 80000208
	movq	%fs:40, %rax
	movq	%rax, 80000184(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	24(%rsp), %rdi
	call	cudaEventCreate@PLT
	xorl	%eax, %eax
.L14:
	leaq	40000056(%rsp), %rbx
	movl	$1, (%rbx,%rax,4)
	incq	%rax
	cmpq	$10000032, %rax
	jne	.L14
	movq	%rsp, %rdi
	movl	$40000128, %esi
	call	cudaMalloc@PLT
	movl	$66, %esi
	movl	%eax, %edi
	call	_ZL11handleError9cudaErrorPKci.constprop.0
	leaq	8(%rsp), %rdi
	movl	$40000000, %esi
	call	cudaMalloc@PLT
	movl	$67, %esi
	movl	%eax, %edi
	call	_ZL11handleError9cudaErrorPKci.constprop.0
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$40000128, %edx
	call	cudaMemcpy@PLT
	movl	$70, %esi
	movl	%eax, %edi
	call	_ZL11handleError9cudaErrorPKci.constprop.0
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$33554433, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$7, %rdx
	movl	$1, %ecx
	movabsq	$4295045421, %rdi
	movl	$1, %esi
	movq	%rdx, 44(%rsp)
	movl	$1, 52(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z32__device_stub__Z10stencil_1dPiS_PiS_
.L15:
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	leaq	44(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	16(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	24(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	44(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$40000000, %edx
	leaq	56(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$84, %esi
	movl	%eax, %edi
	call	_ZL11handleError9cudaErrorPKci.constprop.0
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	80000184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$80000192, %rsp
	.cfi_def_cfa_offset 16
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z10stencil_1dPiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10stencil_1dPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<stdio.h>
#include<stdlib.h>
#include<math.h>
#include<time.h>

#define N   10000000 	//job size = 1K, 10K, 100K, 1M and 10M
#define M   128 	//Threads per block =128
#define R   16 		//radius = 2,4,8,16

// CUDA API error checking macro
static void handleError( hipError_t err,
                         const char *file,
                         int line ) {
    if (err != hipSuccess) {
        printf( "%s in %s at line %d\n", hipGetErrorString( err ),
                file, line );
        exit( EXIT_FAILURE );
    }
}
#define cudaCheck( err ) (handleError( err, __FILE__, __LINE__ ))

__global__ void stencil_1d(int *in, int *out) 
{
	__shared__ int temp[M + 2 * R];
	int gindex = threadIdx.x + blockIdx.x * blockDim.x;
	int lindex = threadIdx.x + R;
	temp[lindex] = in[gindex]; // Read input elements into shared memory
	
	if (threadIdx.x < R) 
	{
	temp[lindex - R] = in[gindex - R];
	temp[lindex + M] = in[gindex + M];
	}
	
	// Synchronize (ensure all the data is available)
	__syncthreads();
	int result = 0;
	
	// Apply the stencil
	for (int offset = -R ; offset <= R ; offset++)
	{
		result += temp[lindex + offset];
	}
	
	// Store the result
	out[gindex] = result;
}	

int main()
{
	unsigned int i;
	int h_in[N + 2 * R], h_out[N];
	int *d_in, *d_out;

	//time start and stop
	hipEvent_t start, stop;
	float time;

	hipEventCreate(&start);
	hipEventCreate(&stop);

	for( i = 0; i < (N + 2*R); ++i )
	h_in[i] = 1; 

	// Allocate device memory
	cudaCheck( hipMalloc( &d_in, (N + 2*R) * sizeof(int)) );
	cudaCheck( hipMalloc( &d_out, N * sizeof(int)) );

	//copy fro CPU to GPU memory
	cudaCheck( hipMemcpy( d_in, h_in, (N + 2*R) * sizeof(int), hipMemcpyHostToDevice) );
	hipEventRecord( start, 0 );

	//Call stencil kernel
	stencil_1d<<< (N + M - 1)/M, M >>> (d_in, d_out);

	hipEventRecord( stop, 0 );
	hipEventSynchronize(stop);
	hipEventElapsedTime( &time, start, stop );
	hipEventDestroy( start );
	hipEventDestroy( stop );
	printf("GPU Execution Time = %f\n",time);

	//copy from device to host
	cudaCheck( hipMemcpy( h_out, d_out, N * sizeof(int), hipMemcpyDeviceToHost) );

	// Cleanup
	hipFree(d_in);
	hipFree(d_out);

  return 0;
}


	.text
	.file	"Shared_1D.hip"
	.globl	_Z25__device_stub__stencil_1dPiS_ # -- Begin function _Z25__device_stub__stencil_1dPiS_
	.type	_Z25__device_stub__stencil_1dPiS_,@function
_Z25__device_stub__stencil_1dPiS_:      # @_Z25__device_stub__stencil_1dPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10stencil_1dPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__stencil_1dPiS_, .Lfunc_end0-_Z25__device_stub__stencil_1dPiS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$80000176, %rsp                 # imm = 0x4C4B4B0
	.cfi_def_cfa_offset 80000192
	.cfi_offset %rbx, -16
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1, 48(%rsp,%rax,4)
	incq	%rax
	cmpq	$10000032, %rax                 # imm = 0x9896A0
	jne	.LBB1_1
# %bb.2:
	leaq	32(%rsp), %rbx
	movl	$40000128, %esi                 # imm = 0x2625A80
	movq	%rbx, %rdi
	callq	hipMalloc
	movl	%eax, %edi
	movl	$68, %esi
	callq	_ZL11handleError10hipError_tPKci
	leaq	24(%rsp), %rdi
	movl	$40000000, %esi                 # imm = 0x2625A00
	callq	hipMalloc
	movl	%eax, %edi
	movl	$69, %esi
	callq	_ZL11handleError10hipError_tPKci
	movq	(%rbx), %rdi
	leaq	48(%rsp), %rsi
	movl	$40000128, %edx                 # imm = 0x2625A80
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	movl	$72, %esi
	callq	_ZL11handleError10hipError_tPKci
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$4294967424, %rdx               # imm = 0x100000080
	leaq	77997(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	callq	_Z25__device_stub__stencil_1dPiS_
.LBB1_4:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	44(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movq	24(%rsp), %rsi
	leaq	40000176(%rsp), %rdi
	movl	$40000000, %edx                 # imm = 0x2625A00
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	movl	$86, %esi
	callq	_ZL11handleError10hipError_tPKci
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$80000176, %rsp                 # imm = 0x4C4B4B0
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.type	_ZL11handleError10hipError_tPKci,@function # -- Begin function _ZL11handleError10hipError_tPKci
_ZL11handleError10hipError_tPKci:       # @_ZL11handleError10hipError_tPKci
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB2_2
# %bb.1:
	retq
.LBB2_2:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%esi, %ebx
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	%ebx, %ecx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	_ZL11handleError10hipError_tPKci, .Lfunc_end2-_ZL11handleError10hipError_tPKci
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10stencil_1dPiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10stencil_1dPiS_,@object      # @_Z10stencil_1dPiS_
	.section	.rodata,"a",@progbits
	.globl	_Z10stencil_1dPiS_
	.p2align	3, 0x0
_Z10stencil_1dPiS_:
	.quad	_Z25__device_stub__stencil_1dPiS_
	.size	_Z10stencil_1dPiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/SumukhRaghuramBhat/Heterogeneous_Computing/master/HW0/Shared_1D.hip"
	.size	.L.str, 130

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"GPU Execution Time = %f\n"
	.size	.L.str.1, 25

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%s in %s at line %d\n"
	.size	.L.str.2, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10stencil_1dPiS_"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__stencil_1dPiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10stencil_1dPiS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10stencil_1dPiS_      ; -- Begin function _Z10stencil_1dPiS_
	.globl	_Z10stencil_1dPiS_
	.p2align	8
	.type	_Z10stencil_1dPiS_,@function
_Z10stencil_1dPiS_:                     ; @_Z10stencil_1dPiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v5, 2, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
	s_mov_b32 s0, exec_lo
	global_load_b32 v6, v[3:4], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v6 offset:64
	v_cmpx_gt_u32_e32 16, v0
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_clause 0x1
	global_load_b32 v0, v[3:4], off offset:-64
	global_load_b32 v3, v[3:4], off offset:512
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v5, v0, v3 offset1:144
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v0, 0
	s_movk_i32 s0, 0xff7c
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v3, s0, v5
	s_add_i32 s0, s0, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 0
	ds_load_b32 v3, v3 offset:132
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v0, v3, v0
	s_cbranch_scc0 .LBB0_3
; %bb.4:
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10stencil_1dPiS_
		.amdhsa_group_segment_fixed_size 640
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10stencil_1dPiS_, .Lfunc_end0-_Z10stencil_1dPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 240
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 640 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 640
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10stencil_1dPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10stencil_1dPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
