#include "includes.h"
__global__ void Corrector_gpu(double GTIME, double *local_time, double *step, int *next, unsigned long nextsize, double4 *pos_CH, double4 *vel_CH, double4 *a_tot_D, double4 *a1_tot_D, double4 *a2_tot_D, double4 *a_H0, double4 *a3_H, double ETA6, double ETA4, double DTMAX, double DTMIN, unsigned int N){

unsigned int gtid = blockIdx.x*blockDim.x + threadIdx.x;

double dt;
int who = next[gtid];
int who1 = gtid + nextsize;
int who2 = who1 + nextsize;

if(gtid >= nextsize )
return;

a_H0[gtid].w = a_H0[gtid].x * a_H0[gtid].x +
a_H0[gtid].y * a_H0[gtid].y +
a_H0[gtid].z * a_H0[gtid].z ;

a_H0[who1].w = a_H0[who1].x * a_H0[who1].x +
a_H0[who1].y * a_H0[who1].y +
a_H0[who1].z * a_H0[who1].z ;

a_H0[who2].w =  a_H0[who2].x * a_H0[who2].x +
a_H0[who2].y * a_H0[who2].y +
a_H0[who2].z * a_H0[who2].z ;

double h = GTIME-local_time[who];
local_time[who] = GTIME;

double h1 = 0.5*h;
double h2 = h1*h1;
double h3 = 0.75/(h1*h1*h1);
double h4 = 1.5/(h2*h2);
double h5 = 7.5/(h2*h2*h1);

double Amin = a_H0[gtid].x - a_tot_D[who].x;
double Aplu = a_H0[gtid].x + a_tot_D[who].x;
double Jmin = h1 * (a_H0[who1].x - a1_tot_D[who].x);
double Jplu = h1 * (a_H0[who1].x + a1_tot_D[who].x);
double Smin = h1 * h1 * (a_H0[who2].x - a2_tot_D[who].x);
double Splu = h1 * h1 * (a_H0[who2].x + a2_tot_D[who].x);

double over= 1.0/15.0;

pos_CH[who].x = pos_CH[who].x + h1*vel_CH[who].x - 0.4*h2*Amin + over*h2*Jplu;
vel_CH[who].x = vel_CH[who].x + h1*Aplu          - 0.4*h1*Jmin + over*h1*Splu;
pos_CH[who].x += h1*vel_CH[who].x;

a3_H[who].x = h3*(-5.0*Amin + 5.0*Jplu - Smin);
double a4halfx = h4*(-Jmin + Splu);
double a5halfx = h5*(3.0*Amin - 3.0*Jplu + Smin);
a3_H[who].x += h1*a4halfx + 0.5*h2*a5halfx;
a4halfx += h1*a5halfx;

Amin = a_H0[gtid].y - a_tot_D[who].y;
Aplu = a_H0[gtid].y + a_tot_D[who].y;
Jmin = h1 * (a_H0[who1].y - a1_tot_D[who].y);
Jplu = h1 * (a_H0[who1].y + a1_tot_D[who].y);
Smin = h1 * h1 * (a_H0[who2].y - a2_tot_D[who].y);
Splu = h1 * h1 * (a_H0[who2].y + a2_tot_D[who].y);

pos_CH[who].y = pos_CH[who].y + h1*vel_CH[who].y - 0.4*h2*Amin + over*h2*Jplu;
vel_CH[who].y = vel_CH[who].y + h1*Aplu          - 0.4*h1*Jmin + over*h1*Splu;
pos_CH[who].y += h1*vel_CH[who].y;

a3_H[who].y = h3*(-5.0*Amin + 5.0*Jplu - Smin);
double a4halfy = h4*(-Jmin + Splu);
double a5halfy = h5*(3.0*Amin - 3.0*Jplu + Smin);
a3_H[who].y += h1*a4halfy + 0.5*h2*a5halfy;
a4halfy += h1*a5halfy;

Amin = a_H0[gtid].z - a_tot_D[who].z;
Aplu = a_H0[gtid].z + a_tot_D[who].z;
Jmin = h1 * (a_H0[who1].z - a1_tot_D[who].z);
Jplu = h1 * (a_H0[who1].z + a1_tot_D[who].z);
Smin = h1 * h1 * (a_H0[who2].z - a2_tot_D[who].z);
Splu = h1 * h1 * (a_H0[who2].z + a2_tot_D[who].z);

pos_CH[who].z = pos_CH[who].z + h1*vel_CH[who].z - 0.4*h2*Amin + over*h2*Jplu;
vel_CH[who].z = vel_CH[who].z + h1*Aplu          - 0.4*h1*Jmin + over*h1*Splu;
pos_CH[who].z += h1*vel_CH[who].z;

a3_H[who].z = h3*(-5.0*Amin + 5.0*Jplu - Smin);
double a4halfz = h4*(-Jmin + Splu);
double a5halfz = h5*(3.0*Amin - 3.0*Jplu + Smin);
a3_H[who].z += h1*a4halfz + 0.5*h2*a5halfz;
a4halfz += h1*a5halfz;

a3_H[who].w = sqrt(a3_H[who].x*a3_H[who].x + a3_H[who].y*a3_H[who].y + a3_H[who].z*a3_H[who].z);
double a4mod = sqrt(a4halfx*a4halfx + a4halfy*a4halfy + a4halfz*a4halfz);
double a5mod = sqrt(a5halfx*a5halfx + a5halfy*a5halfy + a5halfz*a5halfz);

double    dt6 = (sqrt(a_H0[gtid].w*a_H0[who2].w) + a_H0[who1].w) / (a5mod*a3_H[who].w + a4mod*a4mod);
dt6 = ETA6 * pow(dt6,1.0/6.0);

double stp = h;
double overh3 = 1.0/(stp*stp*stp);
double overh2 = 1.0/(stp*stp);

double a2dx = overh2 * (-6.0 * (a_tot_D[who].x - a_H0[gtid].x) -
stp * (4.0 * a_H0[who1].x + 2.0 * a1_tot_D[who].x));
double a2dy = overh2 * (-6.0 * (a_tot_D[who].y - a_H0[gtid].y) -
stp * (4.0 * a_H0[who1].y + 2.0 * a1_tot_D[who].y));
double a2dz = overh2 * (-6.0 * (a_tot_D[who].z - a_H0[gtid].z) -
stp * (4.0 * a_H0[who1].z + 2.0 * a1_tot_D[who].z));

double a3dx = overh3 * (12.0 * (a_tot_D[who].x - a_H0[gtid].x) +
6.0 * stp * (a_H0[who1].x + a1_tot_D[who].x));
double a3dy = overh3 * (12.0 * (a_tot_D[who].y - a_H0[gtid].y) +
6.0 * stp * (a_H0[who1].y + a1_tot_D[who].y));
double a3dz = overh3 * (12.0 * (a_tot_D[who].z - a_H0[gtid].z) +
6.0 * stp * (a_H0[who1].z + a1_tot_D[who].z));

a2dx += h*a3dx;
a2dy += h*a3dy;
a2dx += h*a3dz;

a_H0[who2].w =  a2dx*a2dx + a2dy*a2dy + a2dz*a2dz;
a3_H[who].w = a3dx*a3dx + a3dy*a3dy + a3dz*a3dz;

double dt4 = sqrt(ETA4*(sqrt(a_H0[gtid].w*a_H0[who2].w) + a_H0[who1].w) / (sqrt(a_H0[who1].w*a3_H[who].w) + a_H0[who2].w));

dt = 0.5*dt4+0.5*dt6;

double rest = GTIME / (2.0 * step[who]);
rest = (double)((int)(rest)) - rest;

//	return;
//	pos_CH[who].x = step[who];
//	return;

if(dt > 2.0*step[who] && rest == 0.0 && 2.0*step[who] <= DTMAX)
step[who] *= 2.0;
else if (dt < 0.5*step[who])
step[who] *= 0.25;
else if (dt < step[who])
step[who]*=0.5;

if(step[who] < DTMIN)
step[who] = DTMIN;

a_tot_D[who] = a_H0[gtid];
a1_tot_D[who] = a_H0[who1];
a2_tot_D[who] = a_H0[who2];

}
	.file	"tmpxft_0026ad54_00000000-6_Corrector_gpu.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z71__device_stub__Z13Corrector_gpudPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddjdPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddj
	.type	_Z71__device_stub__Z13Corrector_gpudPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddjdPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddj, @function
_Z71__device_stub__Z13Corrector_gpudPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddjdPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddj:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$344, %rsp
	.cfi_def_cfa_offset 352
	movq	352(%rsp), %rax
	movq	%rdi, 112(%rsp)
	leaq	144(%rsp), %rdi
	movq	%rsi, 104(%rsp)
	leaq	156(%rsp), %rsi
	movq	%rax, 64(%rsp)
	movq	360(%rsp), %rax
	movq	%rdx, 96(%rsp)
	leaq	128(%rsp), %rdx
	movq	%rax, 56(%rsp)
	movq	368(%rsp), %rax
	movq	%rcx, 88(%rsp)
	leaq	136(%rsp), %rcx
	movq	%rax, 48(%rsp)
	movq	376(%rsp), %rax
	movq	%r8, 80(%rsp)
	movq	%rax, 40(%rsp)
	movq	384(%rsp), %rax
	movq	%r9, 72(%rsp)
	movq	%rax, 32(%rsp)
	movsd	%xmm0, 120(%rsp)
	movsd	%xmm1, 24(%rsp)
	movsd	%xmm2, 16(%rsp)
	movsd	%xmm3, 8(%rsp)
	movsd	%xmm4, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 328(%rsp)
	xorl	%eax, %eax
	leaq	120(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 304(%rsp)
	movq	%rsp, %rax
	movq	%rax, 312(%rsp)
	leaq	392(%rsp), %rax
	movq	%rax, 320(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 144(%rsp)
	movl	$1, 152(%rsp)
	movq	%rax, 156(%rsp)
	movl	$1, 164(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	136(%rsp)
	.cfi_def_cfa_offset 360
	leaq	_Z13Corrector_gpudPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddj(%rip), %rdi
	pushq	136(%rsp)
	.cfi_def_cfa_offset 368
	movq	172(%rsp), %rcx
	movl	180(%rsp), %r8d
	movq	160(%rsp), %rsi
	movl	168(%rsp), %edx
	leaq	208(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 360
	popq	%rdx
	.cfi_def_cfa_offset 352
.L2:
	movq	328(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$344, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z71__device_stub__Z13Corrector_gpudPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddjdPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddj, .-_Z71__device_stub__Z13Corrector_gpudPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddjdPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddj
	.globl	_Z13Corrector_gpudPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddj
	.type	_Z13Corrector_gpudPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddj, @function
_Z13Corrector_gpudPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddj:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z71__device_stub__Z13Corrector_gpudPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddjdPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddj
	.cfi_endproc
.LFE2033:
	.size	_Z13Corrector_gpudPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddj, .-_Z13Corrector_gpudPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddj
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z13Corrector_gpudPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddj"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z13Corrector_gpudPdS_PimP7double4S2_S2_S2_S2_S2_S2_ddddj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__global__ void Corrector_gpu(double GTIME, double *local_time, double *step, int *next, unsigned long nextsize, double4 *pos_CH, double4 *vel_CH, double4 *a_tot_D, double4 *a1_tot_D, double4 *a2_tot_D, double4 *a_H0, double4 *a3_H, double ETA6, double ETA4, double DTMAX, double DTMIN, unsigned int N){

unsigned int gtid = blockIdx.x*blockDim.x + threadIdx.x;

double dt;
int who = next[gtid];
int who1 = gtid + nextsize;
int who2 = who1 + nextsize;

if(gtid >= nextsize )
return;

a_H0[gtid].w = a_H0[gtid].x * a_H0[gtid].x +
a_H0[gtid].y * a_H0[gtid].y +
a_H0[gtid].z * a_H0[gtid].z ;

a_H0[who1].w = a_H0[who1].x * a_H0[who1].x +
a_H0[who1].y * a_H0[who1].y +
a_H0[who1].z * a_H0[who1].z ;

a_H0[who2].w =  a_H0[who2].x * a_H0[who2].x +
a_H0[who2].y * a_H0[who2].y +
a_H0[who2].z * a_H0[who2].z ;

double h = GTIME-local_time[who];
local_time[who] = GTIME;

double h1 = 0.5*h;
double h2 = h1*h1;
double h3 = 0.75/(h1*h1*h1);
double h4 = 1.5/(h2*h2);
double h5 = 7.5/(h2*h2*h1);

double Amin = a_H0[gtid].x - a_tot_D[who].x;
double Aplu = a_H0[gtid].x + a_tot_D[who].x;
double Jmin = h1 * (a_H0[who1].x - a1_tot_D[who].x);
double Jplu = h1 * (a_H0[who1].x + a1_tot_D[who].x);
double Smin = h1 * h1 * (a_H0[who2].x - a2_tot_D[who].x);
double Splu = h1 * h1 * (a_H0[who2].x + a2_tot_D[who].x);

double over= 1.0/15.0;

pos_CH[who].x = pos_CH[who].x + h1*vel_CH[who].x - 0.4*h2*Amin + over*h2*Jplu;
vel_CH[who].x = vel_CH[who].x + h1*Aplu          - 0.4*h1*Jmin + over*h1*Splu;
pos_CH[who].x += h1*vel_CH[who].x;

a3_H[who].x = h3*(-5.0*Amin + 5.0*Jplu - Smin);
double a4halfx = h4*(-Jmin + Splu);
double a5halfx = h5*(3.0*Amin - 3.0*Jplu + Smin);
a3_H[who].x += h1*a4halfx + 0.5*h2*a5halfx;
a4halfx += h1*a5halfx;

Amin = a_H0[gtid].y - a_tot_D[who].y;
Aplu = a_H0[gtid].y + a_tot_D[who].y;
Jmin = h1 * (a_H0[who1].y - a1_tot_D[who].y);
Jplu = h1 * (a_H0[who1].y + a1_tot_D[who].y);
Smin = h1 * h1 * (a_H0[who2].y - a2_tot_D[who].y);
Splu = h1 * h1 * (a_H0[who2].y + a2_tot_D[who].y);

pos_CH[who].y = pos_CH[who].y + h1*vel_CH[who].y - 0.4*h2*Amin + over*h2*Jplu;
vel_CH[who].y = vel_CH[who].y + h1*Aplu          - 0.4*h1*Jmin + over*h1*Splu;
pos_CH[who].y += h1*vel_CH[who].y;

a3_H[who].y = h3*(-5.0*Amin + 5.0*Jplu - Smin);
double a4halfy = h4*(-Jmin + Splu);
double a5halfy = h5*(3.0*Amin - 3.0*Jplu + Smin);
a3_H[who].y += h1*a4halfy + 0.5*h2*a5halfy;
a4halfy += h1*a5halfy;

Amin = a_H0[gtid].z - a_tot_D[who].z;
Aplu = a_H0[gtid].z + a_tot_D[who].z;
Jmin = h1 * (a_H0[who1].z - a1_tot_D[who].z);
Jplu = h1 * (a_H0[who1].z + a1_tot_D[who].z);
Smin = h1 * h1 * (a_H0[who2].z - a2_tot_D[who].z);
Splu = h1 * h1 * (a_H0[who2].z + a2_tot_D[who].z);

pos_CH[who].z = pos_CH[who].z + h1*vel_CH[who].z - 0.4*h2*Amin + over*h2*Jplu;
vel_CH[who].z = vel_CH[who].z + h1*Aplu          - 0.4*h1*Jmin + over*h1*Splu;
pos_CH[who].z += h1*vel_CH[who].z;

a3_H[who].z = h3*(-5.0*Amin + 5.0*Jplu - Smin);
double a4halfz = h4*(-Jmin + Splu);
double a5halfz = h5*(3.0*Amin - 3.0*Jplu + Smin);
a3_H[who].z += h1*a4halfz + 0.5*h2*a5halfz;
a4halfz += h1*a5halfz;

a3_H[who].w = sqrt(a3_H[who].x*a3_H[who].x + a3_H[who].y*a3_H[who].y + a3_H[who].z*a3_H[who].z);
double a4mod = sqrt(a4halfx*a4halfx + a4halfy*a4halfy + a4halfz*a4halfz);
double a5mod = sqrt(a5halfx*a5halfx + a5halfy*a5halfy + a5halfz*a5halfz);

double    dt6 = (sqrt(a_H0[gtid].w*a_H0[who2].w) + a_H0[who1].w) / (a5mod*a3_H[who].w + a4mod*a4mod);
dt6 = ETA6 * pow(dt6,1.0/6.0);

double stp = h;
double overh3 = 1.0/(stp*stp*stp);
double overh2 = 1.0/(stp*stp);

double a2dx = overh2 * (-6.0 * (a_tot_D[who].x - a_H0[gtid].x) -
stp * (4.0 * a_H0[who1].x + 2.0 * a1_tot_D[who].x));
double a2dy = overh2 * (-6.0 * (a_tot_D[who].y - a_H0[gtid].y) -
stp * (4.0 * a_H0[who1].y + 2.0 * a1_tot_D[who].y));
double a2dz = overh2 * (-6.0 * (a_tot_D[who].z - a_H0[gtid].z) -
stp * (4.0 * a_H0[who1].z + 2.0 * a1_tot_D[who].z));

double a3dx = overh3 * (12.0 * (a_tot_D[who].x - a_H0[gtid].x) +
6.0 * stp * (a_H0[who1].x + a1_tot_D[who].x));
double a3dy = overh3 * (12.0 * (a_tot_D[who].y - a_H0[gtid].y) +
6.0 * stp * (a_H0[who1].y + a1_tot_D[who].y));
double a3dz = overh3 * (12.0 * (a_tot_D[who].z - a_H0[gtid].z) +
6.0 * stp * (a_H0[who1].z + a1_tot_D[who].z));

a2dx += h*a3dx;
a2dy += h*a3dy;
a2dx += h*a3dz;

a_H0[who2].w =  a2dx*a2dx + a2dy*a2dy + a2dz*a2dz;
a3_H[who].w = a3dx*a3dx + a3dy*a3dy + a3dz*a3dz;

double dt4 = sqrt(ETA4*(sqrt(a_H0[gtid].w*a_H0[who2].w) + a_H0[who1].w) / (sqrt(a_H0[who1].w*a3_H[who].w) + a_H0[who2].w));

dt = 0.5*dt4+0.5*dt6;

double rest = GTIME / (2.0 * step[who]);
rest = (double)((int)(rest)) - rest;

//	return;
//	pos_CH[who].x = step[who];
//	return;

if(dt > 2.0*step[who] && rest == 0.0 && 2.0*step[who] <= DTMAX)
step[who] *= 2.0;
else if (dt < 0.5*step[who])
step[who] *= 0.25;
else if (dt < step[who])
step[who]*=0.5;

if(step[who] < DTMIN)
step[who] = DTMIN;

a_tot_D[who] = a_H0[gtid];
a1_tot_D[who] = a_H0[who1];
a2_tot_D[who] = a_H0[who2];

}
	.text
	.file	"Corrector_gpu.hip"
	.globl	_Z28__device_stub__Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj # -- Begin function _Z28__device_stub__Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj
	.type	_Z28__device_stub__Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj,@function
_Z28__device_stub__Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj: # @_Z28__device_stub__Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$288, %rsp                      # imm = 0x120
	.cfi_def_cfa_offset 336
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	104(%rsp), %rax
	movsd	%xmm0, (%rax)
	leaq	96(%rsp), %r10
	movq	%rdi, (%r10)
	leaq	88(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	80(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	72(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	64(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	56(%rsp), %r8
	movq	%r9, (%r8)
	leaq	48(%rsp), %r9
	movsd	%xmm1, (%r9)
	leaq	40(%rsp), %r11
	movsd	%xmm2, (%r11)
	leaq	32(%rsp), %r14
	movsd	%xmm3, (%r14)
	leaq	24(%rsp), %r15
	movsd	%xmm4, (%r15)
	leaq	144(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%r10, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%rcx, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	344(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	352(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	360(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	368(%rsp), %rax
	movq	%rax, 88(%rbx)
	movq	%r9, 96(%rbx)
	movq	%r11, 104(%rbx)
	movq	%r14, 112(%rbx)
	movq	%r15, 120(%rbx)
	leaq	376(%rsp), %rax
	movq	%rax, 128(%rbx)
	leaq	128(%rsp), %r14
	leaq	112(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$304, %rsp                      # imm = 0x130
	.cfi_adjust_cfa_offset -304
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj, .Lfunc_end0-_Z28__device_stub__Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj,@object # @_Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj
	.section	.rodata,"a",@progbits
	.globl	_Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj
	.p2align	3, 0x0
_Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj:
	.quad	_Z28__device_stub__Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj
	.size	_Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj"
	.size	.L__unnamed_1, 74

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj ; -- Begin function _Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj
	.globl	_Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj
	.p2align	8
	.type	_Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj,@function
_Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj: ; @_Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x94
	s_load_b512 s[16:31], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u64_e64 s[24:25], v[1:2]
	s_cbranch_execz .LBB0_12
; %bb.1:
	s_load_b512 s[0:15], s[0:1], 0x40
	v_add_nc_u32_e32 v3, s24, v1
	v_lshlrev_b64 v[7:8], 5, v[1:2]
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, s24, v3
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 5, v[3:4]
	v_lshlrev_b64 v[5:6], 5, v[5:6]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v20, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v21, vcc_lo, s5, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v18, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v16, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v6, vcc_lo
	s_clause 0x5
	global_load_b128 v[3:6], v[20:21], off
	global_load_b128 v[7:10], v[18:19], off
	global_load_b128 v[11:14], v[16:17], off
	global_load_b64 v[22:23], v[20:21], off offset:16
	global_load_b64 v[24:25], v[18:19], off offset:16
	global_load_b64 v[26:27], v[16:17], off offset:16
	v_add_co_u32 v0, vcc_lo, s22, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s23, v1, vcc_lo
	s_mov_b32 s5, 0x3fd99999
	s_mov_b32 s4, 0x9999999a
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(6)
	v_mul_f64 v[1:2], v[5:6], v[5:6]
	s_waitcnt vmcnt(5)
	v_mul_f64 v[5:6], v[9:10], v[9:10]
	s_waitcnt vmcnt(4)
	v_mul_f64 v[9:10], v[13:14], v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[1:2], v[3:4], v[3:4], v[1:2]
	v_fma_f64 v[3:4], v[7:8], v[7:8], v[5:6]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[5:6], v[11:12], v[11:12], v[9:10]
	s_waitcnt vmcnt(3)
	v_fma_f64 v[7:8], v[22:23], v[22:23], v[1:2]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[2:3], v[24:25], v[24:25], v[3:4]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[4:5], v[26:27], v[26:27], v[5:6]
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v0
	s_clause 0x2
	global_store_b64 v[20:21], v[7:8], off offset:24
	global_store_b64 v[18:19], v[2:3], off offset:24
	global_store_b64 v[16:17], v[4:5], off offset:24
	v_lshlrev_b64 v[28:29], 3, v[0:1]
	v_lshlrev_b64 v[0:1], 5, v[0:1]
	v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s18, v28
	v_add_co_ci_u32_e32 v10, vcc_lo, s19, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v22, vcc_lo, s30, v0
	v_add_co_ci_u32_e32 v23, vcc_lo, s31, v1, vcc_lo
	global_load_b64 v[2:3], v[9:10], off
	v_add_co_u32 v24, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v25, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s26, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s27, v1, vcc_lo
	v_add_co_u32 v11, vcc_lo, s28, v0
	global_store_b64 v[9:10], v[4:5], off
	v_add_co_ci_u32_e32 v12, vcc_lo, s29, v1, vcc_lo
	global_load_b64 v[4:5], v[22:23], off
	global_load_b64 v[8:9], v[24:25], off
	global_load_b64 v[13:14], v[6:7], off
	s_clause 0x1
	global_load_b64 v[32:33], v[20:21], off
	global_load_b64 v[34:35], v[18:19], off
	global_load_b64 v[26:27], v[11:12], off
	s_mov_b32 s0, 0x11111111
	s_mov_b32 s1, 0x3fb11111
	s_mov_b32 s18, 0x4222de17
	s_mov_b32 s19, 0x3fbdee67
	s_waitcnt vmcnt(6)
	v_add_f64 v[30:31], s[16:17], -v[2:3]
	global_load_b64 v[2:3], v[16:17], off
	s_waitcnt vmcnt(3)
	v_add_f64 v[40:41], v[32:33], -v[4:5]
	s_waitcnt vmcnt(2)
	v_add_f64 v[42:43], v[34:35], v[8:9]
	v_add_f64 v[8:9], v[34:35], -v[8:9]
	v_add_f64 v[4:5], v[32:33], v[4:5]
	v_mul_f64 v[36:37], v[30:31], 0.5
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[38:39], v[36:37], v[36:37]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[13:14], v[36:37], v[26:27], v[13:14]
	v_mul_f64 v[42:43], v[36:37], v[42:43]
	v_add_co_u32 v26, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v27, vcc_lo, s3, v1, vcc_lo
	v_mul_f64 v[8:9], v[36:37], v[8:9]
	v_mul_f64 v[66:67], v[36:37], s[4:5]
	v_mul_f64 v[72:73], v[36:37], s[0:1]
	global_load_b64 v[48:49], v[26:27], off
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s3, 0x3fe55555
	v_mul_f64 v[44:45], v[38:39], s[4:5]
	v_mul_f64 v[46:47], v[38:39], s[0:1]
	v_mul_f64 v[50:51], v[38:39], v[38:39]
	v_mul_f64 v[52:53], v[36:37], v[38:39]
	v_mul_f64 v[82:83], 0x40080000, v[42:43]
	s_mov_b32 s4, 0x9999999c
	v_fma_f64 v[13:14], -v[44:45], v[40:41], v[13:14]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[54:55], v[36:37], v[50:51]
	v_div_scale_f64 v[56:57], null, v[52:53], v[52:53], 0x3fe80000
	v_div_scale_f64 v[58:59], null, v[50:51], v[50:51], 0x3ff80000
	v_div_scale_f64 v[76:77], vcc_lo, 0x3fe80000, v[52:53], 0x3fe80000
	v_fma_f64 v[13:14], v[46:47], v[42:43], v[13:14]
	v_div_scale_f64 v[60:61], null, v[54:55], v[54:55], 0x401e0000
	v_rcp_f64_e32 v[32:33], v[56:57]
	s_delay_alu instid0(VALU_DEP_4)
	v_rcp_f64_e32 v[34:35], v[58:59]
	global_store_b64 v[6:7], v[13:14], off
	global_load_b64 v[13:14], v[11:12], off
	v_rcp_f64_e32 v[62:63], v[60:61]
	v_fma_f64 v[68:69], -v[58:59], v[34:35], 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[70:71], -v[60:61], v[62:63], 1.0
	s_waitcnt vmcnt(1)
	v_add_f64 v[64:65], v[2:3], v[48:49]
	v_add_f64 v[2:3], v[2:3], -v[48:49]
	v_fma_f64 v[48:49], 0x40080000, v[40:41], -v[82:83]
	v_mul_f64 v[40:41], 0x40140000, v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[74:75], v[38:39], v[64:65]
	v_fma_f64 v[48:49], v[38:39], v[2:3], v[48:49]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[4:5], v[36:37], v[4:5], v[13:14]
	v_fma_f64 v[13:14], -v[56:57], v[32:33], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], -v[66:67], v[8:9], v[4:5]
	v_fma_f64 v[13:14], v[32:33], v[13:14], v[32:33]
	v_fma_f64 v[32:33], v[34:35], v[68:69], v[34:35]
	v_fma_f64 v[34:35], v[62:63], v[70:71], v[62:63]
	v_fma_f64 v[8:9], v[38:39], v[64:65], -v[8:9]
	v_fma_f64 v[4:5], v[72:73], v[74:75], v[4:5]
	v_fma_f64 v[62:63], -v[56:57], v[13:14], 1.0
	v_fma_f64 v[68:69], -v[58:59], v[32:33], 1.0
	v_fma_f64 v[70:71], -v[60:61], v[34:35], 1.0
	global_store_b64 v[11:12], v[4:5], off
	global_load_b64 v[74:75], v[6:7], off
	v_fma_f64 v[13:14], v[13:14], v[62:63], v[13:14]
	v_div_scale_f64 v[62:63], s0, 0x3ff80000, v[50:51], 0x3ff80000
	v_fma_f64 v[32:33], v[32:33], v[68:69], v[32:33]
	v_div_scale_f64 v[68:69], s1, 0x401e0000, v[54:55], 0x401e0000
	v_fma_f64 v[34:35], v[34:35], v[70:71], v[34:35]
	v_mul_f64 v[70:71], v[76:77], v[13:14]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[78:79], v[62:63], v[32:33]
	v_mul_f64 v[80:81], v[68:69], v[34:35]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[56:57], -v[56:57], v[70:71], v[76:77]
	v_fma_f64 v[58:59], -v[58:59], v[78:79], v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[60:61], -v[60:61], v[80:81], v[68:69]
	v_div_fmas_f64 v[13:14], v[56:57], v[13:14], v[70:71]
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[32:33], v[58:59], v[32:33], v[78:79]
	s_mov_b32 vcc_lo, s1
	v_div_fmas_f64 v[34:35], v[60:61], v[34:35], v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[13:14], v[13:14], v[52:53], 0x3fe80000
	v_div_fixup_f64 v[50:51], v[32:33], v[50:51], 0x3ff80000
	v_fma_f64 v[32:33], 0x40140000, v[42:43], -v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_div_fixup_f64 v[34:35], v[34:35], v[54:55], 0x401e0000
	v_mul_f64 v[54:55], v[38:39], 0.5
	v_mul_f64 v[8:9], v[50:51], v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[2:3], -v[38:39], v[2:3], v[32:33]
	v_mul_f64 v[48:49], v[34:35], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[40:41], v[54:55], v[48:49]
	v_fma_f64 v[32:33], v[36:37], v[8:9], v[40:41]
	v_fma_f64 v[8:9], v[36:37], v[48:49], v[8:9]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[2:3], v[13:14], v[2:3], v[32:33]
	v_add_co_u32 v32, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v33, vcc_lo, s7, v1, vcc_lo
	s_mov_b32 s6, 0x968915a9
	s_mov_b32 s7, 0x3fba6564
	s_waitcnt vmcnt(0)
	v_fma_f64 v[4:5], v[36:37], v[4:5], v[74:75]
	global_store_b64 v[6:7], v[4:5], off
	global_store_b64 v[32:33], v[2:3], off
	global_load_b64 v[0:1], v[22:23], off offset:8
	global_load_b64 v[2:3], v[24:25], off offset:8
	global_load_b64 v[4:5], v[6:7], off offset:8
	s_clause 0x1
	global_load_b64 v[40:41], v[20:21], off offset:8
	global_load_b64 v[42:43], v[18:19], off offset:8
	global_load_b64 v[52:53], v[11:12], off offset:8
	global_load_b64 v[56:57], v[16:17], off offset:8
	s_waitcnt vmcnt(3)
	v_add_f64 v[58:59], v[40:41], -v[0:1]
	s_waitcnt vmcnt(2)
	v_add_f64 v[60:61], v[42:43], v[2:3]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[4:5], v[36:37], v[52:53], v[4:5]
	v_add_f64 v[2:3], v[42:43], -v[2:3]
	v_add_f64 v[0:1], v[40:41], v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[52:53], v[36:37], v[60:61]
	v_fma_f64 v[4:5], -v[44:45], v[58:59], v[4:5]
	global_load_b64 v[60:61], v[26:27], off offset:8
	v_mul_f64 v[2:3], v[36:37], v[2:3]
	v_mul_f64 v[42:43], 0x40080000, v[52:53]
	v_fma_f64 v[4:5], v[46:47], v[52:53], v[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[42:43], 0x40080000, v[58:59], -v[42:43]
	global_store_b64 v[6:7], v[4:5], off offset:8
	global_load_b64 v[4:5], v[11:12], off offset:8
	v_mul_f64 v[58:59], 0x40140000, v[58:59]
	s_waitcnt vmcnt(1)
	v_add_f64 v[40:41], v[56:57], v[60:61]
	v_add_f64 v[56:57], v[56:57], -v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[42:43], v[38:39], v[56:57], v[42:43]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[0:1], v[36:37], v[0:1], v[4:5]
	v_mul_f64 v[4:5], v[38:39], v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[0:1], -v[66:67], v[2:3], v[0:1]
	v_fma_f64 v[2:3], v[38:39], v[40:41], -v[2:3]
	v_mul_f64 v[40:41], v[34:35], v[42:43]
	v_fma_f64 v[42:43], 0x40140000, v[52:53], -v[58:59]
	v_fma_f64 v[0:1], v[72:73], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[52:53], v[50:51], v[2:3]
	v_mul_f64 v[2:3], v[54:55], v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fma_f64 v[42:43], -v[38:39], v[56:57], v[42:43]
	global_store_b64 v[11:12], v[0:1], off offset:8
	global_load_b64 v[4:5], v[6:7], off offset:8
	v_fma_f64 v[2:3], v[36:37], v[52:53], v[2:3]
	v_fma_f64 v[2:3], v[13:14], v[42:43], v[2:3]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[0:1], v[36:37], v[0:1], v[4:5]
	global_store_b64 v[6:7], v[0:1], off offset:8
	global_store_b64 v[32:33], v[2:3], off offset:8
	global_load_b64 v[0:1], v[22:23], off offset:16
	global_load_b64 v[2:3], v[24:25], off offset:16
	global_load_b64 v[4:5], v[6:7], off offset:16
	s_clause 0x1
	global_load_b64 v[42:43], v[20:21], off offset:16
	global_load_b64 v[56:57], v[18:19], off offset:16
	global_load_b64 v[58:59], v[11:12], off offset:16
	global_load_b64 v[60:61], v[16:17], off offset:16
	s_waitcnt vmcnt(3)
	v_add_f64 v[62:63], v[42:43], -v[0:1]
	s_waitcnt vmcnt(2)
	v_add_f64 v[64:65], v[56:57], v[2:3]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[4:5], v[36:37], v[58:59], v[4:5]
	v_add_f64 v[2:3], v[56:57], -v[2:3]
	v_add_f64 v[0:1], v[42:43], v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[58:59], v[36:37], v[64:65]
	v_fma_f64 v[4:5], -v[44:45], v[62:63], v[4:5]
	global_load_b64 v[44:45], v[26:27], off offset:16
	v_fma_f64 v[4:5], v[46:47], v[58:59], v[4:5]
	v_mul_f64 v[46:47], v[36:37], v[2:3]
	global_store_b64 v[6:7], v[4:5], off offset:16
	global_load_b64 v[4:5], v[11:12], off offset:16
	s_waitcnt vmcnt(1)
	v_add_f64 v[42:43], v[60:61], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_mul_f64 v[2:3], v[38:39], v[42:43]
	v_fma_f64 v[42:43], v[38:39], v[42:43], -v[46:47]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[0:1], v[36:37], v[0:1], v[4:5]
	v_mul_f64 v[4:5], 0x40080000, v[58:59]
	v_fma_f64 v[0:1], -v[66:67], v[46:47], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], 0x40080000, v[62:63], -v[4:5]
	v_fma_f64 v[0:1], v[72:73], v[2:3], v[0:1]
	global_store_b64 v[11:12], v[0:1], off offset:16
	global_load_b64 v[2:3], v[6:7], off offset:16
	v_mul_f64 v[10:11], 0x40140000, v[62:63]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[10:11], 0x40140000, v[58:59], -v[10:11]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[0:1], v[36:37], v[0:1], v[2:3]
	global_store_b64 v[6:7], v[0:1], off offset:16
	global_load_b128 v[0:3], v[32:33], off
	v_add_f64 v[6:7], v[60:61], -v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[38:39], v[6:7], v[4:5]
	v_fma_f64 v[6:7], -v[38:39], v[6:7], v[10:11]
	v_mul_f64 v[4:5], v[34:35], v[4:5]
	v_mul_f64 v[34:35], v[50:51], v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[42:43], v[54:55], v[4:5]
	v_fma_f64 v[10:11], v[36:37], v[34:35], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[13:14], v[6:7], v[10:11]
	v_mul_f64 v[14:15], v[40:41], v[40:41]
	v_fma_f64 v[14:15], v[48:49], v[48:49], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[4:5], v[4:5], v[14:15]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[2:3], v[2:3], v[2:3]
	v_fma_f64 v[0:1], v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], v[10:11], v[10:11], v[0:1]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[0:1]
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 8, v2
	v_ldexp_f64 v[0:1], v[0:1], v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[2:3], v[0:1]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[6:7], v[0:1], v[2:3]
	v_mul_f64 v[2:3], v[2:3], 0.5
	v_fma_f64 v[12:13], -v[2:3], v[6:7], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[6:7], v[12:13], v[6:7]
	v_fma_f64 v[2:3], v[2:3], v[12:13], v[2:3]
	v_fma_f64 v[12:13], -v[6:7], v[6:7], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[12:13], v[2:3], v[6:7]
	v_fma_f64 v[12:13], -v[6:7], v[6:7], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[12:13], v[2:3], v[6:7]
	v_cndmask_b32_e64 v6, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[0:1], 0x260
	v_ldexp_f64 v[2:3], v[2:3], v6
	v_fma_f64 v[6:7], v[36:37], v[40:41], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v13, v3, v1 :: v_dual_cndmask_b32 v12, v2, v0
	v_mul_f64 v[6:7], v[6:7], v[6:7]
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[14:15]
	global_store_b128 v[32:33], v[10:13], off offset:16
	s_clause 0x1
	global_load_b128 v[0:3], v[20:21], off offset:16
	global_load_b64 v[10:11], v[16:17], off offset:24
	global_load_b64 v[58:59], v[24:25], off offset:16
	global_load_b64 v[62:63], v[22:23], off offset:16
	v_fma_f64 v[6:7], v[8:9], v[8:9], v[6:7]
	v_fma_f64 v[8:9], v[36:37], v[4:5], v[34:35]
	v_cndmask_b32_e64 v34, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[8:9], v[8:9], v[8:9], v[6:7]
	global_load_b128 v[4:7], v[20:21], off
	v_cmp_gt_f64_e64 s0, 0x10000000, v[8:9]
	s_waitcnt vmcnt(3)
	v_mul_f64 v[2:3], v[2:3], v[10:11]
	v_lshlrev_b32_e32 v10, 8, v34
	s_waitcnt vmcnt(1)
	v_add_f64 v[0:1], v[62:63], -v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[14:15], v[14:15], v10
	v_cndmask_b32_e64 v10, 0, 1, s0
	v_lshlrev_b32_e32 v10, 8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[34:35], v[8:9], v10
	v_cmp_gt_f64_e64 s1, 0x10000000, v[2:3]
	v_rsq_f64_e32 v[8:9], v[14:15]
	v_rsq_f64_e32 v[36:37], v[34:35]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v11, 0, 1, s1
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[38:39], v[14:15], v[8:9]
	v_mul_f64 v[42:43], v[8:9], 0.5
	v_mul_f64 v[44:45], v[34:35], v[36:37]
	v_mul_f64 v[36:37], v[36:37], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[46:47], -v[42:43], v[38:39], 0.5
	v_fma_f64 v[50:51], -v[36:37], v[44:45], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[38:39], v[38:39], v[46:47], v[38:39]
	v_fma_f64 v[42:43], v[42:43], v[46:47], v[42:43]
	v_fma_f64 v[44:45], v[44:45], v[50:51], v[44:45]
	v_fma_f64 v[36:37], v[36:37], v[50:51], v[36:37]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[46:47], -v[38:39], v[38:39], v[14:15]
	v_fma_f64 v[50:51], -v[44:45], v[44:45], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[38:39], v[46:47], v[42:43], v[38:39]
	v_fma_f64 v[44:45], v[50:51], v[36:37], v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[50:51], -v[38:39], v[38:39], v[14:15]
	v_fma_f64 v[38:39], v[50:51], v[42:43], v[38:39]
	v_cndmask_b32_e64 v50, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[14:15], 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[38:39], v[38:39], v50
	v_lshlrev_b32_e32 v11, 8, v11
	v_mul_f64 v[50:51], v[30:31], v[30:31]
	v_cndmask_b32_e32 v14, v38, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_ldexp_f64 v[2:3], v[2:3], v11
	global_load_b128 v[8:11], v[18:19], off offset:16
	v_cndmask_b32_e32 v15, v39, v15, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[34:35], 0x260
	v_mul_f64 v[54:55], v[30:31], v[50:51]
	v_div_scale_f64 v[64:65], null, v[50:51], v[50:51], 1.0
	v_rsq_f64_e32 v[40:41], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[56:57], null, v[54:55], v[54:55], 1.0
	v_rcp_f64_e32 v[70:71], v[64:65]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[48:49], v[2:3], v[40:41]
	v_mul_f64 v[40:41], v[40:41], 0.5
	v_rcp_f64_e32 v[60:61], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[52:53], -v[40:41], v[48:49], 0.5
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[66:67], -v[56:57], v[60:61], 1.0
	v_fma_f64 v[48:49], v[48:49], v[52:53], v[48:49]
	v_fma_f64 v[40:41], v[40:41], v[52:53], v[40:41]
	v_fma_f64 v[60:61], v[60:61], v[66:67], v[60:61]
	v_fma_f64 v[66:67], -v[64:65], v[70:71], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[46:47], -v[48:49], v[48:49], v[2:3]
	v_fma_f64 v[72:73], -v[56:57], v[60:61], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[46:47], v[46:47], v[40:41], v[48:49]
	v_fma_f64 v[48:49], -v[44:45], v[44:45], v[34:35]
	v_fma_f64 v[60:61], v[60:61], v[72:73], v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[42:43], -v[46:47], v[46:47], v[2:3]
	v_fma_f64 v[36:37], v[48:49], v[36:37], v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_fma_f64 v[40:41], v[42:43], v[40:41], v[46:47]
	v_cndmask_b32_e64 v42, 0, 0xffffff80, s0
	v_cndmask_b32_e64 v43, 0, 0xffffff80, s1
	v_cmp_class_f64_e64 s0, v[2:3], 0x260
	v_div_scale_f64 v[80:81], s1, 1.0, v[50:51], 1.0
	v_ldexp_f64 v[36:37], v[36:37], v42
	s_delay_alu instid0(VALU_DEP_4)
	v_ldexp_f64 v[38:39], v[40:41], v43
	v_mul_f64 v[40:41], v[14:15], v[12:13]
	global_load_b128 v[12:15], v[18:19], off
	v_dual_cndmask_b32 v35, v37, v35 :: v_dual_cndmask_b32 v34, v36, v34
	v_cndmask_b32_e64 v3, v39, v3, s0
	v_cndmask_b32_e64 v2, v38, v2, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[34:35], v[34:35], v[40:41]
	s_waitcnt vmcnt(1)
	v_add_f64 v[2:3], v[10:11], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[10:11], null, v[34:35], v[34:35], v[2:3]
	v_div_scale_f64 v[40:41], vcc_lo, v[2:3], v[34:35], v[2:3]
	v_rcp_f64_e32 v[36:37], v[10:11]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[38:39], -v[10:11], v[36:37], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[36:37], v[38:39], v[36:37]
	v_fma_f64 v[38:39], -v[10:11], v[36:37], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[36:37], v[38:39], v[36:37]
	v_mul_f64 v[38:39], v[40:41], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], -v[10:11], v[38:39], v[40:41]
	v_div_fmas_f64 v[10:11], v[10:11], v[36:37], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[2:3], v[10:11], v[34:35], v[2:3]
	v_frexp_mant_f64_e64 v[10:11], |v[2:3]|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s0, s[2:3], v[10:11]
	v_cndmask_b32_e64 v34, 0, 1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[10:11], v[10:11], v34
	v_add_f64 v[34:35], v[10:11], 1.0
	v_add_f64 v[40:41], v[10:11], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[36:37], v[34:35]
	v_add_f64 v[42:43], v[34:35], -1.0
	v_add_f64 v[10:11], v[10:11], -v[42:43]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[38:39], -v[34:35], v[36:37], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[38:39], v[36:37], v[36:37]
	v_fma_f64 v[38:39], -v[34:35], v[36:37], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[38:39], v[36:37], v[36:37]
	v_mul_f64 v[38:39], v[40:41], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[44:45], v[34:35], v[38:39]
	v_fma_f64 v[34:35], v[38:39], v[34:35], -v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[38:39], v[10:11], v[34:35]
	v_add_f64 v[34:35], v[44:45], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[40:41], -v[34:35]
	v_add_f64 v[44:45], v[34:35], -v[44:45]
	v_add_f64 v[40:41], v[40:41], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[44:45], -v[10:11]
	v_add_f64 v[34:35], v[40:41], -v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], v[34:35]
	v_add_f64 v[10:11], v[42:43], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[10:11], v[36:37], v[10:11]
	v_add_f64 v[34:35], v[38:39], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[34:35], -v[38:39]
	v_mul_f64 v[46:47], v[34:35], v[34:35]
	v_add_f64 v[10:11], v[10:11], -v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[34:35], v[34:35], -v[46:47]
	v_add_f64 v[38:39], v[10:11], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], v[34:35], v[38:39], v[36:37]
	v_add_f64 v[36:37], v[46:47], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[38:39], v[36:37], s[18:19], s[6:7]
	s_mov_b32 s6, 0x3abe935a
	s_mov_b32 s7, 0x3fbe25e4
	v_add_f64 v[46:47], v[36:37], -v[46:47]
	v_mul_f64 v[78:79], v[34:35], v[36:37]
	v_fma_f64 v[38:39], v[36:37], v[38:39], s[6:7]
	s_mov_b32 s6, 0x47e6c9c2
	s_mov_b32 s7, 0x3fc110ef
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[46:47], v[48:49], -v[46:47]
	v_fma_f64 v[38:39], v[36:37], v[38:39], s[6:7]
	s_mov_b32 s6, 0xcfa74449
	s_mov_b32 s7, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[42:43], v[36:37], v[38:39], s[6:7]
	global_load_b128 v[38:41], v[24:25], off
	s_mov_b32 s6, 0x71bf3c30
	s_mov_b32 s7, 0x3fc745d1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[52:53], v[36:37], v[42:43], s[6:7]
	global_load_b128 v[42:45], v[22:23], off
	s_mov_b32 s6, 0x1c7792ce
	s_mov_b32 s7, 0x3fcc71c7
	v_fma_f64 v[52:53], v[36:37], v[52:53], s[6:7]
	s_mov_b32 s6, 0x924920da
	s_mov_b32 s7, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[52:53], v[36:37], v[52:53], s[6:7]
	s_mov_b32 s6, 0x652b82fe
	s_mov_b32 s7, 0x3ff71547
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[36:37], v[52:53], s[4:5]
	s_mov_b32 s5, 0x3c7abc9e
	s_mov_b32 s4, 0x3b39803f
	v_mul_f64 v[68:69], v[36:37], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], v[36:37], v[52:53], -v[68:69]
	v_fma_f64 v[48:49], v[46:47], v[52:53], v[48:49]
	v_fma_f64 v[52:53], v[70:71], v[66:67], v[70:71]
	v_div_scale_f64 v[66:67], vcc_lo, 1.0, v[54:55], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[70:71], v[68:69], v[48:49]
	v_fma_f64 v[72:73], -v[64:65], v[52:53], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[74:75], v[66:67], v[60:61]
	v_add_f64 v[76:77], v[70:71], s[2:3]
	v_add_f64 v[68:69], v[70:71], -v[68:69]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[52:53], v[52:53], v[72:73], v[52:53]
	v_fma_f64 v[56:57], -v[56:57], v[74:75], v[66:67]
	v_mul_f64 v[66:67], 0x40180000, v[30:31]
	s_waitcnt vmcnt(1)
	v_add_f64 v[72:73], v[12:13], v[38:39]
	s_mov_b32 s3, 0xbfe55555
	v_add_f64 v[38:39], v[38:39], v[38:39]
	s_waitcnt vmcnt(0)
	v_add_f64 v[4:5], v[42:43], -v[4:5]
	v_add_f64 v[6:7], v[44:45], -v[6:7]
	v_add_f64 v[82:83], v[76:77], s[2:3]
	v_add_f64 v[48:49], v[48:49], -v[68:69]
	v_fma_f64 v[68:69], v[36:37], v[34:35], -v[78:79]
	v_mul_f64 v[84:85], v[80:81], v[52:53]
	v_div_fmas_f64 v[56:57], v[56:57], v[60:61], v[74:75]
	v_mul_f64 v[42:43], v[66:67], v[72:73]
	s_mov_b32 s2, 0xd5df274d
	s_mov_b32 s3, 0x3c8543b0
	v_fma_f64 v[12:13], v[12:13], 4.0, v[38:39]
	s_mov_b32 vcc_lo, s1
	v_cmp_eq_f64_e64 s1, 1.0, v[2:3]
	v_add_f64 v[60:61], v[70:71], -v[82:83]
	v_add_f64 v[70:71], v[8:9], v[58:59]
	v_fma_f64 v[36:37], v[36:37], v[10:11], v[68:69]
	v_add_f64 v[68:69], v[14:15], v[40:41]
	v_fma_f64 v[38:39], -v[64:65], v[84:85], v[80:81]
	v_fma_f64 v[42:43], 0x40280000, v[4:5], v[42:43]
	v_div_fixup_f64 v[54:55], v[56:57], v[54:55], 1.0
	v_add_f64 v[48:49], v[48:49], s[2:3]
	v_add_f64 v[40:41], v[40:41], v[40:41]
	v_mul_f64 v[12:13], v[30:31], v[12:13]
	v_add_f64 v[58:59], v[58:59], v[58:59]
	s_mov_b32 s3, 0x3fe62e42
	s_mov_b32 s2, 0xfefa39ef
	v_ldexp_f64 v[10:11], v[10:11], 1
	v_fma_f64 v[36:37], v[46:47], v[34:35], v[36:37]
	v_mul_f64 v[44:45], v[66:67], v[68:69]
	v_mul_f64 v[46:47], v[66:67], v[70:71]
	v_div_fmas_f64 v[38:39], v[38:39], v[52:53], v[84:85]
	v_mul_f64 v[42:43], v[54:55], v[42:43]
	v_add_f64 v[48:49], v[48:49], v[60:61]
	v_fma_f64 v[14:15], v[14:15], 4.0, v[40:41]
	v_fma_f64 v[4:5], 0xc0180000, v[4:5], -v[12:13]
	v_fma_f64 v[8:9], v[8:9], 4.0, v[58:59]
	v_add_f64 v[56:57], v[78:79], v[36:37]
	v_fma_f64 v[40:41], 0x40280000, v[6:7], v[44:45]
	v_fma_f64 v[44:45], 0x40280000, v[0:1], v[46:47]
	v_div_fixup_f64 v[12:13], v[38:39], v[50:51], 1.0
	v_mul_f64 v[38:39], v[30:31], v[42:43]
	v_add_f64 v[52:53], v[76:77], v[48:49]
	v_mul_f64 v[14:15], v[30:31], v[14:15]
	v_mul_f64 v[8:9], v[30:31], v[8:9]
	v_mul_f64 v[40:41], v[54:55], v[40:41]
	v_mul_f64 v[44:45], v[54:55], v[44:45]
	v_fma_f64 v[4:5], v[12:13], v[4:5], v[38:39]
	v_add_f64 v[46:47], v[76:77], -v[52:53]
	v_mul_f64 v[50:51], v[56:57], v[52:53]
	v_fma_f64 v[6:7], 0xc0180000, v[6:7], -v[14:15]
	v_add_f64 v[38:39], v[56:57], -v[78:79]
	v_fma_f64 v[0:1], 0xc0180000, v[0:1], -v[8:9]
	v_mul_f64 v[14:15], v[30:31], v[40:41]
	v_mul_f64 v[8:9], v[40:41], v[40:41]
	v_fma_f64 v[4:5], v[30:31], v[44:45], v[4:5]
	v_add_f64 v[46:47], v[48:49], v[46:47]
	v_fma_f64 v[48:49], v[56:57], v[52:53], -v[50:51]
	v_add_f64 v[30:31], v[36:37], -v[38:39]
	v_mul_f64 v[0:1], v[12:13], v[0:1]
	v_fma_f64 v[6:7], v[12:13], v[6:7], v[14:15]
	v_mul_f64 v[4:5], v[4:5], v[4:5]
	v_fma_f64 v[36:37], v[56:57], v[46:47], v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], v[6:7], v[6:7], v[4:5]
	v_fma_f64 v[6:7], v[42:43], v[42:43], v[8:9]
	v_fma_f64 v[14:15], v[30:31], v[52:53], v[36:37]
	v_frexp_exp_i32_f64_e32 v30, v[2:3]
	v_ldexp_f64 v[8:9], v[34:35], 1
	v_mov_b32_e32 v42, 0x3ff00000
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v43, 0x3fc55555, v42, s1
	v_cndmask_b32_e64 v42, 0x55555555, 0, s1
	v_fma_f64 v[0:1], v[0:1], v[0:1], v[4:5]
	v_fma_f64 v[4:5], v[44:45], v[44:45], v[6:7]
	v_add_f64 v[12:13], v[50:51], v[14:15]
	v_subrev_co_ci_u32_e64 v6, vcc_lo, 0, v30, s0
	global_store_b64 v[16:17], v[0:1], off offset:24
	global_store_b64 v[32:33], v[4:5], off offset:24
	s_clause 0x1
	global_load_b64 v[0:1], v[20:21], off offset:24
	global_load_b64 v[32:33], v[16:17], off offset:24
	v_add_f64 v[34:35], v[12:13], -v[50:51]
	v_cvt_f64_i32_e32 v[6:7], v6
	v_add_f64 v[30:31], v[8:9], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], -v[34:35]
	global_load_b64 v[34:35], v[18:19], off offset:24
	v_mul_f64 v[36:37], v[6:7], s[2:3]
	v_add_f64 v[8:9], v[30:31], -v[8:9]
	v_add_f64 v[10:11], v[10:11], v[14:15]
	v_fma_f64 v[38:39], v[6:7], s[2:3], -v[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[12:13], -v[8:9]
	s_mov_b32 s3, 0xbfe62e42
	v_fma_f64 v[6:7], v[6:7], s[4:5], v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[10:11], v[8:9]
	s_mov_b32 s5, 0xbc7abc9e
	v_add_f64 v[10:11], v[36:37], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[30:31], v[8:9]
	v_add_f64 v[36:37], v[10:11], -v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[10:11], v[12:13]
	v_add_f64 v[30:31], v[12:13], -v[30:31]
	v_add_f64 v[6:7], v[6:7], -v[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[38:39], v[14:15], -v[10:11]
	v_add_f64 v[8:9], v[8:9], -v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[40:41], v[14:15], -v[38:39]
	v_add_f64 v[12:13], v[12:13], -v[38:39]
	v_add_f64 v[30:31], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], -v[40:41]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[0:1], v[0:1], v[32:33]
	v_add_f64 v[10:11], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[0:1]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[4:5], v[34:35], v[4:5]
	v_add_f64 v[10:11], v[30:31], v[10:11]
	v_cndmask_b32_e64 v12, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e64 s0, 0x10000000, v[4:5]
	v_lshlrev_b32_e32 v36, 8, v12
	v_add_f64 v[12:13], v[30:31], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[0:1], v[0:1], v36
	v_cndmask_b32_e64 v36, 0, 1, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[30:31], -v[12:13]
	v_lshlrev_b32_e32 v36, 8, v36
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	v_rsq_f64_e32 v[38:39], v[0:1]
	v_cmp_class_f64_e64 s1, v[0:1], 0x260
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[4:5], v[4:5], v36
	v_add_f64 v[36:37], v[14:15], v[10:11]
	v_add_f64 v[6:7], v[6:7], -v[30:31]
	v_rsq_f64_e32 v[40:41], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(TRANS32_DEP_2)
	v_add_f64 v[12:13], v[36:37], -v[14:15]
	v_mul_f64 v[14:15], v[0:1], v[38:39]
	v_mul_f64 v[30:31], v[38:39], 0.5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[6:7], v[8:9], v[6:7]
	v_add_f64 v[8:9], v[10:11], -v[12:13]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[10:11], v[4:5], v[40:41]
	v_mul_f64 v[12:13], v[40:41], 0.5
	v_fma_f64 v[38:39], -v[30:31], v[14:15], 0.5
	v_add_f64 v[6:7], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], -v[12:13], v[10:11], 0.5
	v_fma_f64 v[14:15], v[14:15], v[38:39], v[14:15]
	v_fma_f64 v[30:31], v[30:31], v[38:39], v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[40:41], v[36:37], v[6:7]
	v_fma_f64 v[10:11], v[10:11], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[38:39], -v[14:15], v[14:15], v[0:1]
	v_fma_f64 v[8:9], v[12:13], v[8:9], v[12:13]
	v_add_f64 v[36:37], v[40:41], -v[36:37]
	v_mul_f64 v[44:45], v[42:43], v[40:41]
	v_fma_f64 v[12:13], -v[10:11], v[10:11], v[4:5]
	v_fma_f64 v[14:15], v[38:39], v[30:31], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[6:7], v[6:7], -v[36:37]
	v_fma_f64 v[36:37], v[42:43], v[40:41], -v[44:45]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[10:11], v[12:13], v[8:9], v[10:11]
	v_fma_f64 v[12:13], -v[14:15], v[14:15], v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[36:37], v[42:43], v[6:7], v[36:37]
	v_fma_f64 v[6:7], -v[10:11], v[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_fma_f64 v[12:13], v[12:13], v[30:31], v[14:15]
	v_cndmask_b32_e64 v30, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[44:45], 0x204
	v_add_f64 v[14:15], v[44:45], v[36:37]
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[10:11]
	v_ldexp_f64 v[8:9], v[12:13], v30
	v_cndmask_b32_e64 v12, 0, 0xffffff80, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v11, v15, v45 :: v_dual_cndmask_b32 v10, v14, v44
	v_ldexp_f64 v[6:7], v[6:7], v12
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e64 v1, v9, v1, s1
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x260
	v_cndmask_b32_e64 v0, v8, v0, s1
	v_mul_f64 v[8:9], v[10:11], s[6:7]
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	v_add_f64 v[14:15], v[14:15], -v[44:45]
	v_add_f64 v[0:1], v[34:35], v[0:1]
	v_dual_cndmask_b32 v5, v7, v5 :: v_dual_cndmask_b32 v4, v6, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_rndne_f64_e32 v[8:9], v[8:9]
	v_add_f64 v[14:15], v[36:37], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[12:13], v[32:33], v[4:5]
	v_mul_f64 v[30:31], v[0:1], s[10:11]
	v_add_co_u32 v0, vcc_lo, s20, v28
	v_add_co_ci_u32_e32 v1, vcc_lo, s21, v29, vcc_lo
	global_load_b64 v[4:5], v[0:1], off
	v_fma_f64 v[6:7], v[8:9], s[2:3], v[10:11]
	s_mov_b32 s2, 0x6a5dcb37
	s_mov_b32 s3, 0x3e5ade15
	v_div_scale_f64 v[28:29], null, v[12:13], v[12:13], v[30:31]
	v_div_scale_f64 v[40:41], vcc_lo, v[30:31], v[12:13], v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[32:33], v[8:9], s[4:5], v[6:7]
	v_cmp_class_f64_e64 s4, v[2:3], 0x204
	v_rcp_f64_e32 v[6:7], v[28:29]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[34:35], v[32:33], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	v_cmp_nlt_f64_e64 s2, 0x40900000, v[10:11]
	v_cmp_ngt_f64_e64 s3, 0xc090cc00, v[10:11]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[38:39], -v[28:29], v[6:7], 1.0
	v_fma_f64 v[34:35], v[32:33], v[34:35], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[6:7], v[38:39], v[6:7]
	v_fma_f64 v[34:35], v[32:33], v[34:35], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[38:39], -v[28:29], v[6:7], 1.0
	v_fma_f64 v[34:35], v[32:33], v[34:35], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[38:39], v[6:7], v[38:39], v[6:7]
	v_fma_f64 v[6:7], v[32:33], v[34:35], s[0:1]
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[34:35], v[40:41], v[38:39]
	v_fma_f64 v[46:47], v[32:33], v[6:7], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[28:29], -v[28:29], v[34:35], v[40:41]
	s_waitcnt vmcnt(0)
	v_add_f64 v[6:7], v[4:5], v[4:5]
	v_fma_f64 v[40:41], v[32:33], v[46:47], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	v_cvt_i32_f64_e32 v46, v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_fmas_f64 v[28:29], v[28:29], v[38:39], v[34:35]
	v_div_scale_f64 v[34:35], null, v[6:7], v[6:7], s[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[38:39], v[32:33], v[40:41], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	v_div_fixup_f64 v[12:13], v[28:29], v[12:13], v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[28:29], v[34:35]
	v_fma_f64 v[30:31], v[32:33], v[38:39], s[0:1]
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[10:11]|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e64 s0, 0x10000000, v[12:13]
	v_fma_f64 v[30:31], v[32:33], v[30:31], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v15, 0, v15, s1
	v_cndmask_b32_e64 v14, 0, v14, s1
	s_and_b32 s1, s3, s2
	v_cndmask_b32_e64 v38, 0, 1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v38, 8, v38
	v_ldexp_f64 v[12:13], v[12:13], v38
	s_delay_alu instid0(TRANS32_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[38:39], -v[34:35], v[28:29], 1.0
	v_fma_f64 v[8:9], v[32:33], v[30:31], 1.0
	v_rsq_f64_e32 v[40:41], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[28:29], v[28:29], v[38:39], v[28:29]
	v_ldexp_f64 v[8:9], v[8:9], v46
	v_div_scale_f64 v[46:47], vcc_lo, s[16:17], v[6:7], s[16:17]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[38:39], -v[34:35], v[28:29], 1.0
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[30:31], v[12:13], v[40:41]
	v_mul_f64 v[32:33], v[40:41], 0.5
	v_mul_f64 v[40:41], v[42:43], 0.5
	v_cndmask_b32_e64 v48, 0x7ff00000, v9, s2
	v_trunc_f64_e32 v[9:10], v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v49, 0, v48, s3
	v_cndmask_b32_e64 v48, 0, v8, s1
	v_cmp_class_f64_e64 s3, v[48:49], 0x204
	v_fma_f64 v[28:29], v[28:29], v[38:39], v[28:29]
	v_fma_f64 v[44:45], -v[32:33], v[30:31], 0.5
	v_trunc_f64_e32 v[36:37], v[40:41]
	v_cmp_eq_f64_e64 s1, v[9:10], v[42:43]
	v_fma_f64 v[8:9], v[48:49], v[14:15], v[48:49]
	v_mul_f64 v[38:39], v[46:47], v[28:29]
	v_fma_f64 v[30:31], v[30:31], v[44:45], v[30:31]
	v_cmp_neq_f64_e64 s2, v[36:37], v[40:41]
	v_fma_f64 v[10:11], v[32:33], v[44:45], v[32:33]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[32:33], -v[34:35], v[38:39], v[46:47]
	v_cndmask_b32_e64 v35, v8, v48, s3
	v_fma_f64 v[14:15], -v[30:31], v[30:31], v[12:13]
	s_and_b32 s2, s1, s2
	v_cndmask_b32_e64 v8, v9, v49, s3
	v_cndmask_b32_e64 v34, 0x3ff00000, v3, s2
	v_cmp_eq_f64_e64 s3, 0, v[2:3]
	v_cndmask_b32_e64 v37, 0, v35, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v34, 0x7fffffff, v8, v34
	v_cndmask_b32_e64 v36, 0x7ff80000, v34, s1
	v_cmp_gt_f64_e64 s1, 0, v[2:3]
	v_fma_f64 v[8:9], v[14:15], v[10:11], v[30:31]
	v_div_fmas_f64 v[14:15], v[32:33], v[28:29], v[38:39]
	v_cndmask_b32_e64 v29, 0, v3, s2
	s_mov_b32 s2, 0
	v_cndmask_b32_e64 v28, 0x7ff00000, 0, s3
	s_or_b32 vcc_lo, s3, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_bfi_b32 v30, 0x7fffffff, v28, v29
	v_cndmask_b32_e64 v31, v35, v37, s1
	v_cndmask_b32_e64 v32, v34, v36, s1
	v_cmp_nge_f64_e64 s1, s[12:13], v[6:7]
	v_cndmask_b32_e64 v31, v31, 0, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v30, v32, v30, vcc_lo
	v_cmp_o_f64_e32 vcc_lo, v[2:3], v[2:3]
	v_fma_f64 v[28:29], -v[8:9], v[8:9], v[12:13]
	v_div_fixup_f64 v[2:3], v[14:15], v[6:7], s[16:17]
	v_cndmask_b32_e64 v15, 0, 0xffffff80, s0
	v_fma_f64 v[8:9], v[28:29], v[10:11], v[8:9]
	v_cndmask_b32_e32 v10, 0, v31, vcc_lo
	v_cndmask_b32_e32 v11, 0x7ff80000, v30, vcc_lo
	v_cvt_i32_f64_e32 v14, v[2:3]
	v_cmp_class_f64_e64 vcc_lo, v[12:13], 0x260
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f64 v[10:11], v[10:11], s[8:9]
	v_ldexp_f64 v[8:9], v[8:9], v15
	v_cvt_f64_i32_e32 v[14:15], v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[10:11], v[10:11], 0.5
	v_dual_cndmask_b32 v9, v9, v13 :: v_dual_cndmask_b32 v8, v8, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[14:15], -v[2:3]
	v_fma_f64 v[2:3], v[8:9], 0.5, v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_neq_f64_e32 vcc_lo, 0, v[12:13]
	v_cmp_ngt_f64_e64 s0, v[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, vcc_lo
	s_or_b32 s3, s1, s0
	s_mov_b32 s1, -1
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB0_7
; %bb.2:
	v_mul_f64 v[6:7], v[4:5], 0.5
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_nlt_f64_e32 v[2:3], v[6:7]
	s_xor_b32 s1, exec_lo, s1
; %bb.3:
	v_cmp_lt_f64_e32 vcc_lo, v[2:3], v[4:5]
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.4:                                ; %Flow559
	s_and_not1_saveexec_b32 s1, s1
; %bb.5:
	v_ldexp_f64 v[6:7], v[4:5], -2
	s_or_b32 s2, s2, exec_lo
                                        ; implicit-def: $vgpr4_vgpr5
; %bb.6:                                ; %Flow560
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s1, s2, exec_lo
.LBB0_7:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_9
; %bb.8:                                ; %.sink.split
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v4, v6 :: v_dual_mov_b32 v5, v7
	global_store_b64 v[0:1], v[6:7], off
.LBB0_9:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_f64_e32 s[14:15], v[4:5]
	s_cbranch_execz .LBB0_11
; %bb.10:
	v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s15
	global_store_b64 v[0:1], v[2:3], off
.LBB0_11:
	s_or_b32 exec_lo, exec_lo, s0
	global_load_b128 v[0:3], v[20:21], off
	s_waitcnt vmcnt(0)
	global_store_b128 v[22:23], v[0:3], off
	global_load_b128 v[0:3], v[20:21], off offset:16
	s_waitcnt vmcnt(0)
	global_store_b128 v[22:23], v[0:3], off offset:16
	global_load_b128 v[0:3], v[18:19], off
	s_waitcnt vmcnt(0)
	global_store_b128 v[24:25], v[0:3], off
	global_load_b128 v[0:3], v[18:19], off offset:16
	s_waitcnt vmcnt(0)
	global_store_b128 v[24:25], v[0:3], off offset:16
	global_load_b128 v[0:3], v[16:17], off
	s_waitcnt vmcnt(0)
	global_store_b128 v[26:27], v[0:3], off
	global_load_b128 v[0:3], v[16:17], off offset:16
	s_waitcnt vmcnt(0)
	global_store_b128 v[26:27], v[0:3], off offset:16
.LBB0_12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 392
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 86
		.amdhsa_next_free_sgpr 32
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj, .Lfunc_end0-_Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 7020
; NumSgprs: 34
; NumVgprs: 86
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 10
; NumSGPRsForWavesPerEU: 34
; NumVGPRsForWavesPerEU: 86
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .offset:         96
        .size:           8
        .value_kind:     by_value
      - .offset:         104
        .size:           8
        .value_kind:     by_value
      - .offset:         112
        .size:           8
        .value_kind:     by_value
      - .offset:         120
        .size:           8
        .value_kind:     by_value
      - .offset:         128
        .size:           4
        .value_kind:     by_value
      - .offset:         136
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         140
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         144
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         148
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         150
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         152
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         154
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         156
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         158
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         176
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         184
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         192
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         200
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 392
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj
    .private_segment_fixed_size: 0
    .sgpr_count:     34
    .sgpr_spill_count: 0
    .symbol:         _Z13Corrector_gpudPdS_PimP15HIP_vector_typeIdLj4EES3_S3_S3_S3_S3_S3_ddddj.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     86
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
