#include <ctime> 
#include <cstdlib> 
#include <iostream>
#include <string>
#include <cmath>
#include <vector>

class Pt
{
public:
	float x = 0;
	float y = 0;
	int group = 1;
};
__global__ void setFalse(bool*& Changed, int dsize);
__device__ float dist(const Pt& p1, const Pt& p2);
__global__ void Group_find(Pt*& data, int dsize, Pt* dev_ctrs, bool*& moved);
__global__ void Moved_find(bool* moved, int dsize, bool* dev_isMoved);
__global__ void Group_update(Pt*& data, int dsize, float* sums, int* cnts);

int main()
{
	unsigned seed = time(0);
	srand(seed);

	int dsize=10;
	printf("enter data size  ");
	scanf("%d", &dsize);
	const int gsize = dsize/2;
	const int m1 = 0, n1 = gsize;
	const int m2 = n1+1, n2 = dsize;

	Pt expected1, expected2;
	float xsum = 0, ysum = 0;

	Pt* data;
	cudaMallocManaged( &data, dsize * sizeof(Pt) );
	bool* moved;
	cudaMallocManaged( &moved, dsize * sizeof(bool) );

	int blockSize = 1024;
	int blockNum = (dsize + blockSize - 1) / blockSize;

	Pt* dataTemp  = new Pt[dsize];
	for(int i = 0; i < gsize; ++i)
	{
		Pt p;
		p.x = m1 + rand() % (n1 - m1);
		xsum += p.x;
		p.y = m1 + rand() % (n1 - m1);
		ysum += p.y;
		dataTemp[i]=p;
	}
	expected1.x = xsum/gsize;
	expected1.y = ysum/gsize;


	xsum = 0, ysum = 0;
	for(int i = 0; i < gsize; ++i)
	{
		Pt p;
		p.x = m2 + rand() % (n2 - m2);
		xsum += p.x;
		p.y = m2 + rand() % (n2 - m2);
		ysum += p.y;
		dataTemp[i + gsize]=p;
	}
	expected2.x = xsum/gsize;
	expected2.y = ysum/gsize;
	

	cudaMemcpy(data,dataTemp, dsize * sizeof( Pt ), cudaMemcpyHostToDevice);
	cudaDeviceSynchronize();

	Pt* ctrs = new Pt[2]; 
	ctrs[0].x = m1 + rand() % (n2-m1);
	ctrs[0].y = m1 + rand() % (n2-m1);
	ctrs[1].x = m1 + rand() % (n2-m1);
	ctrs[1].y = m1 + rand() % (n2-m1);

	Pt* dev_ctrs;
	cudaMallocManaged(&dev_ctrs, 2 * sizeof(Pt));
	cudaMemcpy(dev_ctrs, ctrs, 2 * sizeof( Pt ), cudaMemcpyHostToDevice);

	float* sums = new float[4];
	for(int s = 0; s < 4; ++s) sums[s] = 0;
	float* dev_sums;
	cudaMallocManaged(&dev_sums, 4 * sizeof(float));

	int* cnts = new int[2];
	cnts[0] = 1; cnts[1] = 1;
	int* dev_cnts;
	cudaMallocManaged(&dev_cnts, 2 * sizeof(int));


	bool* isMoved = new bool[1]; 
	isMoved[0] = true;

	bool* dev_isMoved;
	cudaMallocManaged(&dev_isMoved, sizeof(bool));

	while( isMoved[0] )
	{
		printf("Center1 = ( %.2f, %.2f )\n", ctrs[0].x ,ctrs[0].y);
		printf("Center2 = ( %.2f, %.2f )\n", ctrs[1].x, ctrs[1].y);
		isMoved[0] = false;

		clock_t st = clock();
		setFalse<<<blockNum, blockSize>>>(moved, dsize);
		cudaDeviceSynchronize();
		Group_find<<<blockNum, blockSize>>>(data, dsize, dev_ctrs, moved);
		cudaDeviceSynchronize();
		cudaMemcpy(dev_isMoved, isMoved, sizeof( bool ), cudaMemcpyHostToDevice);

		Moved_find<<<1, 1>>>(moved, dsize, dev_isMoved);
		cudaDeviceSynchronize();
		cudaMemcpy(isMoved, dev_isMoved, sizeof( bool ), cudaMemcpyDeviceToHost);

		clock_t st2 = clock();
		clock_t st3 = 0;
		clock_t st4 = 0;
		if( isMoved[0] )
		{
			st3 = clock();
			cudaMemcpy(dev_sums, sums, 4 * sizeof( float ), cudaMemcpyHostToDevice);
			cudaMemcpy(dev_cnts, cnts, 2 * sizeof( int ), cudaMemcpyHostToDevice);

			Group_update<<<blockNum, blockSize>>>(data, dsize, dev_sums, dev_cnts);
			cudaDeviceSynchronize();

			cudaMemcpy(sums, dev_sums, 4 * sizeof( float ), cudaMemcpyDeviceToHost);
			cudaMemcpy(cnts, dev_cnts, 2 * sizeof( int ), cudaMemcpyDeviceToHost);
			st4 = clock();
			ctrs[0].x = sums[0] / cnts[0];
			ctrs[0].y = sums[1] / cnts[0];
			ctrs[1].x = sums[2] / cnts[1];
			ctrs[1].y = sums[3] / cnts[1];
		}
		clock_t st5 = clock();
		cudaMemcpy(ctrs,dev_ctrs, 2 * sizeof( Pt ), cudaMemcpyDeviceToHost);
	
	printf("\n Elapsed Time : %u ms \n", clock() - st5 + (st4 - st3) + (st2 - st));

	}
	
	printf("---Result---:\n");
	printf("Expected1 = ( %.2f, %.2f )\n",expected1.x, expected1.y);
	printf("Expected2 = ( %.2f, %.2f )\n", expected2.x, expected2.y);

	printf("random initial Center1 = ( %.2f, %.2f )" ,ctrs[0].x ,ctrs[0].y);
	printf("random initial Center2 = ( %.2f, %.2f )", ctrs[1].x, ctrs[1].y);

	cudaFree(&data);
	cudaFree(&moved);
	delete [] dataTemp;
	delete [] isMoved;
	cudaFree( &dev_isMoved);

	delete [] sums;
	cudaFree( &dev_sums);
	delete [] cnts;
	cudaFree( &dev_cnts);

}

__device__ float dist(const Pt& p1, const Pt& p2)
{
	float s = sqrt(pow((p1.x - p2.x), 2) + pow((p1.y - p2.y), 2));
	return s;
}

__global__ void setFalse(bool*& Changed, int dsize)
{
	int index = blockIdx.x * blockDim.x + threadIdx.x;
	if (index < dsize)
	{
		Changed[index] = false;
	}
}

__global__ void Group_find(Pt*& data, int dsize, Pt* dev_ctrs, bool*& moved)
{
	int p = blockIdx.x * blockDim.x + threadIdx.x;

	if (p < dsize)
	{
		float d1 = dist(dev_ctrs[0], data[p]);
		float d2 = dist(dev_ctrs[1], data[p]);
		int oldGroup = data[p].group;

		if (d1 < d2)
			data[p].group = 1;
		else
			data[p].group = 2;

		if (data[p].group != oldGroup)
		{
			moved[p] = true;
		}
	}
}

__global__ void Moved_find(bool* moved, int dsize, bool* dev_isMoved)
{
	int index = 0;
	while (index < dsize && !dev_isMoved[0])
	{
		if (moved[index] == true) {
			dev_isMoved[0] = true;
		}
		index++;
	}
}

__global__ void Group_update(Pt*& data, int dsize, float* sums, int* cnts)
{

	int p = blockIdx.x * blockDim.x + threadIdx.x;

	if (p < dsize)
	{
		if (data[p].group == 1)
		{
			sums[0] += data[p].x; sums[1] += data[p].y;
			cnts[0]++;
		}
		else
		{
			sums[2] += data[p].x; sums[3] += data[p].y;
			cnts[1]++;
		}
	}
}

	.file	"tmpxft_002fee00_00000000-6_Kmeans.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4005:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4005:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z4distRK2PtS1_
	.type	_Z4distRK2PtS1_, @function
_Z4distRK2PtS1_:
.LFB4002:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4002:
	.size	_Z4distRK2PtS1_, .-_Z4distRK2PtS1_
	.globl	_Z29__device_stub__Z8setFalseRPbiPPbi
	.type	_Z29__device_stub__Z8setFalseRPbiPPbi, @function
_Z29__device_stub__Z8setFalseRPbiPPbi:
.LFB4027:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z8setFalseRPbi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L4:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4027:
	.size	_Z29__device_stub__Z8setFalseRPbiPPbi, .-_Z29__device_stub__Z8setFalseRPbiPPbi
	.globl	_Z8setFalseRPbi
	.type	_Z8setFalseRPbi, @function
_Z8setFalseRPbi:
.LFB4028:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z8setFalseRPbiPPbi
	.cfi_endproc
.LFE4028:
	.size	_Z8setFalseRPbi, .-_Z8setFalseRPbi
	.globl	_Z40__device_stub__Z10Group_findRP2PtiS0_RPbPP2PtiS0_PPb
	.type	_Z40__device_stub__Z10Group_findRP2PtiS0_RPbPP2PtiS0_PPb, @function
_Z40__device_stub__Z10Group_findRP2PtiS0_RPbPP2PtiS0_PPb:
.LFB4029:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10Group_findRP2PtiS0_RPb(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L10:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4029:
	.size	_Z40__device_stub__Z10Group_findRP2PtiS0_RPbPP2PtiS0_PPb, .-_Z40__device_stub__Z10Group_findRP2PtiS0_RPbPP2PtiS0_PPb
	.globl	_Z10Group_findRP2PtiS0_RPb
	.type	_Z10Group_findRP2PtiS0_RPb, @function
_Z10Group_findRP2PtiS0_RPb:
.LFB4030:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z10Group_findRP2PtiS0_RPbPP2PtiS0_PPb
	.cfi_endproc
.LFE4030:
	.size	_Z10Group_findRP2PtiS0_RPb, .-_Z10Group_findRP2PtiS0_RPb
	.globl	_Z33__device_stub__Z10Moved_findPbiS_PbiS_
	.type	_Z33__device_stub__Z10Moved_findPbiS_PbiS_, @function
_Z33__device_stub__Z10Moved_findPbiS_PbiS_:
.LFB4031:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10Moved_findPbiS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L15:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4031:
	.size	_Z33__device_stub__Z10Moved_findPbiS_PbiS_, .-_Z33__device_stub__Z10Moved_findPbiS_PbiS_
	.globl	_Z10Moved_findPbiS_
	.type	_Z10Moved_findPbiS_, @function
_Z10Moved_findPbiS_:
.LFB4032:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z10Moved_findPbiS_PbiS_
	.cfi_endproc
.LFE4032:
	.size	_Z10Moved_findPbiS_, .-_Z10Moved_findPbiS_
	.globl	_Z40__device_stub__Z12Group_updateRP2PtiPfPiPP2PtiPfPi
	.type	_Z40__device_stub__Z12Group_updateRP2PtiPfPiPP2PtiPfPi, @function
_Z40__device_stub__Z12Group_updateRP2PtiPfPiPP2PtiPfPi:
.LFB4033:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12Group_updateRP2PtiPfPi(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L20:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4033:
	.size	_Z40__device_stub__Z12Group_updateRP2PtiPfPiPP2PtiPfPi, .-_Z40__device_stub__Z12Group_updateRP2PtiPfPiPP2PtiPfPi
	.globl	_Z12Group_updateRP2PtiPfPi
	.type	_Z12Group_updateRP2PtiPfPi, @function
_Z12Group_updateRP2PtiPfPi:
.LFB4034:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z12Group_updateRP2PtiPfPiPP2PtiPfPi
	.cfi_endproc
.LFE4034:
	.size	_Z12Group_updateRP2PtiPfPi, .-_Z12Group_updateRP2PtiPfPi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"enter data size  "
.LC2:
	.string	"%d"
.LC3:
	.string	"Center1 = ( %.2f, %.2f )\n"
.LC4:
	.string	"Center2 = ( %.2f, %.2f )\n"
.LC5:
	.string	"\n Elapsed Time : %u ms \n"
.LC6:
	.string	"---Result---:\n"
.LC7:
	.string	"Expected1 = ( %.2f, %.2f )\n"
.LC8:
	.string	"Expected2 = ( %.2f, %.2f )\n"
.LC9:
	.string	"random initial Center1 = ( %.2f, %.2f )"
.LC10:
	.string	"random initial Center2 = ( %.2f, %.2f )"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3998:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%edi, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	movl	$10, 76(%rsp)
	call	__printf_chk@PLT
	leaq	76(%rsp), %rsi
	leaq	.LC2(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movslq	76(%rsp), %rsi
	movl	$2, %ecx
	leaq	80(%rsp), %rdi
	movl	%esi, %eax
	movq	%rsi, %rbp
	cltd
	imulq	$12, %rsi, %rsi
	idivl	%ecx
	movl	$1, %edx
	movl	%eax, %ebx
	leal	1(%rax), %r13d
	call	cudaMallocManaged@PLT
	movslq	76(%rsp), %rsi
	movl	$1, %edx
	leaq	88(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movslq	76(%rsp), %r12
	movl	$1024, %ecx
	leal	1023(%r12), %eax
	cltd
	idivl	%ecx
	movl	%eax, %r15d
	movabsq	$768614336404564650, %rax
	cmpq	%r12, %rax
	jb	.L26
	imulq	$12, %r12, %rdi
	call	_Znam@PLT
	movq	%rax, 8(%rsp)
	jmp	.L27
.L26:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L44
	call	__cxa_throw_bad_array_new_length@PLT
.L27:
	subq	$1, %r12
	jb	.L45
	movl	$0x00000000, (%rax)
	addq	$12, %rax
	movl	$0x00000000, -8(%rax)
	movl	$1, -4(%rax)
	jmp	.L27
.L45:
	xorps	%xmm1, %xmm1
	movq	8(%rsp), %r12
	xorl	%r14d, %r14d
	movaps	%xmm1, %xmm3
.L30:
	cmpl	%ebx, %r14d
	jge	.L46
	movss	%xmm1, 24(%rsp)
	incl	%r14d
	addq	$12, %r12
	movss	%xmm3, 16(%rsp)
	call	rand@PLT
	movss	16(%rsp), %xmm3
	cltd
	idivl	%ebx
	cvtsi2ssl	%edx, %xmm2
	addss	%xmm2, %xmm3
	movss	%xmm2, 20(%rsp)
	movss	%xmm3, 16(%rsp)
	call	rand@PLT
	movss	24(%rsp), %xmm1
	movss	20(%rsp), %xmm2
	movl	$1, -4(%r12)
	cltd
	movss	16(%rsp), %xmm3
	idivl	%ebx
	movss	%xmm2, -12(%r12)
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, -8(%r12)
	addss	%xmm0, %xmm1
	jmp	.L30
.L46:
	cvtsi2ssl	%ebx, %xmm0
	movslq	%ebx, %r14
	movq	8(%rsp), %rax
	xorl	%r12d, %r12d
	imulq	$12, %r14, %r14
	divss	%xmm0, %xmm1
	addq	%rax, %r14
	movl	%ebp, %eax
	subl	%r13d, %eax
	movl	%eax, 16(%rsp)
	divss	%xmm0, %xmm3
	movss	%xmm1, 24(%rsp)
	xorps	%xmm1, %xmm1
	movaps	%xmm1, %xmm2
	movss	%xmm3, 20(%rsp)
.L32:
	cmpl	%ebx, %r12d
	jge	.L47
	movss	%xmm1, 48(%rsp)
	incl	%r12d
	addq	$12, %r14
	movss	%xmm0, 40(%rsp)
	movss	%xmm2, 28(%rsp)
	call	rand@PLT
	movss	28(%rsp), %xmm2
	cltd
	idivl	16(%rsp)
	addl	%r13d, %edx
	cvtsi2ssl	%edx, %xmm4
	addss	%xmm4, %xmm2
	movss	%xmm4, 32(%rsp)
	movss	%xmm2, 28(%rsp)
	call	rand@PLT
	movss	48(%rsp), %xmm1
	movss	32(%rsp), %xmm4
	movl	$1, -4(%r14)
	cltd
	movss	40(%rsp), %xmm0
	movss	28(%rsp), %xmm2
	idivl	16(%rsp)
	movss	%xmm4, -12(%r14)
	addl	%r13d, %edx
	cvtsi2ssl	%edx, %xmm3
	movss	%xmm3, -8(%r14)
	addss	%xmm3, %xmm1
	jmp	.L32
.L47:
	divss	%xmm0, %xmm2
	movslq	76(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	80(%rsp), %rdi
	imulq	$12, %rdx, %rdx
	divss	%xmm0, %xmm1
	movss	%xmm2, 16(%rsp)
	movss	%xmm1, 28(%rsp)
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	movl	$24, %edi
	call	_Znam@PLT
	movq	%rax, %rbx
	xorl	%eax, %eax
	movq	%rax, (%rbx)
	movl	$1, %eax
	salq	$32, %rax
	movq	$1, 8(%rbx)
	movq	%rax, 16(%rbx)
	call	rand@PLT
	cltd
	idivl	%ebp
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%rbx)
	call	rand@PLT
	cltd
	idivl	%ebp
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, 4(%rbx)
	call	rand@PLT
	cltd
	idivl	%ebp
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, 12(%rbx)
	call	rand@PLT
	leaq	96(%rsp), %rdi
	movl	$24, %esi
	cltd
	idivl	%ebp
	cvtsi2ssl	%edx, %xmm0
	movl	$1, %edx
	movss	%xmm0, 16(%rbx)
	call	cudaMallocManaged@PLT
	movq	96(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$24, %edx
	call	cudaMemcpy@PLT
	movl	$16, %edi
	call	_Znam@PLT
	xorl	%edx, %edx
	movl	$16, %esi
	leaq	104(%rsp), %rdi
	movq	%rdx, (%rax)
	movq	%rax, %rbp
	movq	%rdx, 8(%rax)
	movl	$1, %edx
	call	cudaMallocManaged@PLT
	movl	$8, %edi
	call	_Znam@PLT
	movl	$1, %edx
	movl	$8, %esi
	leaq	112(%rsp), %rdi
	movq	%rax, %r13
	movabsq	$4294967297, %rax
	movq	%rax, 0(%r13)
	call	cudaMallocManaged@PLT
	movl	$1, %edi
	call	_Znam@PLT
	leaq	120(%rsp), %rdi
	movl	$1, %edx
	movl	$1, %esi
	movb	$1, (%rax)
	movq	%rax, %r12
	call	cudaMallocManaged@PLT
.L34:
	cmpb	$0, (%r12)
	je	.L48
	movl	$2, %edi
	movb	$2, %al
	leaq	.LC3(%rip), %rsi
	cvtss2sd	(%rbx), %xmm0
	cvtss2sd	4(%rbx), %xmm1
	call	__printf_chk@PLT
	movl	$2, %edi
	leaq	.LC4(%rip), %rsi
	movb	$2, %al
	cvtss2sd	12(%rbx), %xmm0
	cvtss2sd	16(%rbx), %xmm1
	call	__printf_chk@PLT
	movb	$0, (%r12)
	call	clock@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, 32(%rsp)
	salq	$10, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rax
	movq	%rax, 132(%rsp)
	movl	136(%rsp), %esi
	movl	%r15d, 128(%rsp)
	movq	128(%rsp), %rdi
	movq	%rdx, 140(%rsp)
	movl	$1, 148(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	movl	76(%rsp), %esi
	leaq	88(%rsp), %rdi
	call	_Z29__device_stub__Z8setFalseRPbiPPbi
.L35:
	call	cudaDeviceSynchronize@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	salq	$10, %rdx
	movl	$1, %ecx
	movl	%r15d, 128(%rsp)
	movq	%rax, 132(%rsp)
	movq	128(%rsp), %rdi
	movl	136(%rsp), %esi
	movq	%rdx, 140(%rsp)
	movl	$1, 148(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	movq	96(%rsp), %rdx
	movl	76(%rsp), %esi
	leaq	88(%rsp), %rcx
	leaq	80(%rsp), %rdi
	call	_Z40__device_stub__Z10Group_findRP2PtiS0_RPbPP2PtiS0_PPb
.L36:
	call	cudaDeviceSynchronize@PLT
	movq	120(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$1, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movl	$1, 148(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 140(%rsp)
	movq	%rdi, 128(%rsp)
	movl	$1, 136(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	movq	120(%rsp), %rdx
	movl	76(%rsp), %esi
	movq	88(%rsp), %rdi
	call	_Z33__device_stub__Z10Moved_findPbiS_PbiS_
.L37:
	call	cudaDeviceSynchronize@PLT
	movq	120(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	$1, %edx
	call	cudaMemcpy@PLT
	call	clock@PLT
	cmpb	$0, (%r12)
	movq	%rax, 40(%rsp)
	je	.L42
	call	clock@PLT
	movq	104(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$16, %edx
	movq	%rax, %r14
	call	cudaMemcpy@PLT
	movq	112(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$8, %edx
	call	cudaMemcpy@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	salq	$10, %rdx
	movl	$1, %ecx
	movl	%r15d, 128(%rsp)
	movq	%rax, 132(%rsp)
	movq	128(%rsp), %rdi
	movl	136(%rsp), %esi
	movq	%rdx, 140(%rsp)
	movl	$1, 148(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	movq	112(%rsp), %rcx
	movq	104(%rsp), %rdx
	leaq	80(%rsp), %rdi
	movl	76(%rsp), %esi
	call	_Z40__device_stub__Z12Group_updateRP2PtiPfPiPP2PtiPfPi
.L39:
	call	cudaDeviceSynchronize@PLT
	movq	104(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movq	112(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	movl	$8, %edx
	call	cudaMemcpy@PLT
	call	clock@PLT
	cvtsi2ssl	0(%r13), %xmm1
	movss	0(%rbp), %xmm0
	movq	%rax, %r8
	divss	%xmm1, %xmm0
	movss	%xmm0, (%rbx)
	movss	4(%rbp), %xmm0
	divss	%xmm1, %xmm0
	cvtsi2ssl	4(%r13), %xmm1
	movss	%xmm0, 4(%rbx)
	movss	8(%rbp), %xmm0
	divss	%xmm1, %xmm0
	movss	%xmm0, 12(%rbx)
	movss	12(%rbp), %xmm0
	divss	%xmm1, %xmm0
	movss	%xmm0, 16(%rbx)
	jmp	.L38
.L42:
	xorl	%r8d, %r8d
	xorl	%r14d, %r14d
.L38:
	movq	%r8, 56(%rsp)
	call	clock@PLT
	movq	96(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	movl	$24, %edx
	movq	%rax, 48(%rsp)
	call	cudaMemcpy@PLT
	call	clock@PLT
	movq	48(%rsp), %r9
	movq	56(%rsp), %r8
	leaq	.LC5(%rip), %rsi
	movq	32(%rsp), %rcx
	movl	$2, %edi
	subq	%r9, %rax
	subq	%r14, %r8
	movq	%rax, %rdx
	movq	40(%rsp), %rax
	addq	%r8, %rdx
	subq	%rcx, %rax
	addq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L34
.L48:
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	20(%rsp), %xmm0
	cvtss2sd	24(%rsp), %xmm1
	call	__printf_chk@PLT
	movb	$2, %al
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	cvtss2sd	16(%rsp), %xmm0
	cvtss2sd	28(%rsp), %xmm1
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$2, %al
	leaq	.LC9(%rip), %rsi
	cvtss2sd	(%rbx), %xmm0
	cvtss2sd	4(%rbx), %xmm1
	call	__printf_chk@PLT
	movb	$2, %al
	movl	$2, %edi
	cvtss2sd	12(%rbx), %xmm0
	cvtss2sd	16(%rbx), %xmm1
	leaq	.LC10(%rip), %rsi
	call	__printf_chk@PLT
	leaq	80(%rsp), %rdi
	call	cudaFree@PLT
	leaq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	_ZdaPv@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	leaq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	leaq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r13, %rdi
	call	_ZdaPv@PLT
	leaq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L41
.L44:
	call	__stack_chk_fail@PLT
.L41:
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3998:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z12Group_updateRP2PtiPfPi"
.LC12:
	.string	"_Z10Moved_findPbiS_"
.LC13:
	.string	"_Z10Group_findRP2PtiS0_RPb"
.LC14:
	.string	"_Z8setFalseRPbi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4036:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12Group_updateRP2PtiPfPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10Moved_findPbiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10Group_findRP2PtiS0_RPb(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8setFalseRPbi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4036:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <ctime> 
#include <cstdlib> 
#include <iostream>
#include <string>
#include <cmath>
#include <vector>

class Pt
{
public:
	float x = 0;
	float y = 0;
	int group = 1;
};
__global__ void setFalse(bool*& Changed, int dsize);
__device__ float dist(const Pt& p1, const Pt& p2);
__global__ void Group_find(Pt*& data, int dsize, Pt* dev_ctrs, bool*& moved);
__global__ void Moved_find(bool* moved, int dsize, bool* dev_isMoved);
__global__ void Group_update(Pt*& data, int dsize, float* sums, int* cnts);

int main()
{
	unsigned seed = time(0);
	srand(seed);

	int dsize=10;
	printf("enter data size  ");
	scanf("%d", &dsize);
	const int gsize = dsize/2;
	const int m1 = 0, n1 = gsize;
	const int m2 = n1+1, n2 = dsize;

	Pt expected1, expected2;
	float xsum = 0, ysum = 0;

	Pt* data;
	hipMallocManaged( &data, dsize * sizeof(Pt) );
	bool* moved;
	hipMallocManaged( &moved, dsize * sizeof(bool) );

	int blockSize = 1024;
	int blockNum = (dsize + blockSize - 1) / blockSize;

	Pt* dataTemp  = new Pt[dsize];
	for(int i = 0; i < gsize; ++i)
	{
		Pt p;
		p.x = m1 + rand() % (n1 - m1);
		xsum += p.x;
		p.y = m1 + rand() % (n1 - m1);
		ysum += p.y;
		dataTemp[i]=p;
	}
	expected1.x = xsum/gsize;
	expected1.y = ysum/gsize;


	xsum = 0, ysum = 0;
	for(int i = 0; i < gsize; ++i)
	{
		Pt p;
		p.x = m2 + rand() % (n2 - m2);
		xsum += p.x;
		p.y = m2 + rand() % (n2 - m2);
		ysum += p.y;
		dataTemp[i + gsize]=p;
	}
	expected2.x = xsum/gsize;
	expected2.y = ysum/gsize;
	

	hipMemcpy(data,dataTemp, dsize * sizeof( Pt ), hipMemcpyHostToDevice);
	hipDeviceSynchronize();

	Pt* ctrs = new Pt[2]; 
	ctrs[0].x = m1 + rand() % (n2-m1);
	ctrs[0].y = m1 + rand() % (n2-m1);
	ctrs[1].x = m1 + rand() % (n2-m1);
	ctrs[1].y = m1 + rand() % (n2-m1);

	Pt* dev_ctrs;
	hipMallocManaged(&dev_ctrs, 2 * sizeof(Pt));
	hipMemcpy(dev_ctrs, ctrs, 2 * sizeof( Pt ), hipMemcpyHostToDevice);

	float* sums = new float[4];
	for(int s = 0; s < 4; ++s) sums[s] = 0;
	float* dev_sums;
	hipMallocManaged(&dev_sums, 4 * sizeof(float));

	int* cnts = new int[2];
	cnts[0] = 1; cnts[1] = 1;
	int* dev_cnts;
	hipMallocManaged(&dev_cnts, 2 * sizeof(int));


	bool* isMoved = new bool[1]; 
	isMoved[0] = true;

	bool* dev_isMoved;
	hipMallocManaged(&dev_isMoved, sizeof(bool));

	while( isMoved[0] )
	{
		printf("Center1 = ( %.2f, %.2f )\n", ctrs[0].x ,ctrs[0].y);
		printf("Center2 = ( %.2f, %.2f )\n", ctrs[1].x, ctrs[1].y);
		isMoved[0] = false;

		clock_t st = clock();
		setFalse<<<blockNum, blockSize>>>(moved, dsize);
		hipDeviceSynchronize();
		Group_find<<<blockNum, blockSize>>>(data, dsize, dev_ctrs, moved);
		hipDeviceSynchronize();
		hipMemcpy(dev_isMoved, isMoved, sizeof( bool ), hipMemcpyHostToDevice);

		Moved_find<<<1, 1>>>(moved, dsize, dev_isMoved);
		hipDeviceSynchronize();
		hipMemcpy(isMoved, dev_isMoved, sizeof( bool ), hipMemcpyDeviceToHost);

		clock_t st2 = clock();
		clock_t st3 = 0;
		clock_t st4 = 0;
		if( isMoved[0] )
		{
			st3 = clock();
			hipMemcpy(dev_sums, sums, 4 * sizeof( float ), hipMemcpyHostToDevice);
			hipMemcpy(dev_cnts, cnts, 2 * sizeof( int ), hipMemcpyHostToDevice);

			Group_update<<<blockNum, blockSize>>>(data, dsize, dev_sums, dev_cnts);
			hipDeviceSynchronize();

			hipMemcpy(sums, dev_sums, 4 * sizeof( float ), hipMemcpyDeviceToHost);
			hipMemcpy(cnts, dev_cnts, 2 * sizeof( int ), hipMemcpyDeviceToHost);
			st4 = clock();
			ctrs[0].x = sums[0] / cnts[0];
			ctrs[0].y = sums[1] / cnts[0];
			ctrs[1].x = sums[2] / cnts[1];
			ctrs[1].y = sums[3] / cnts[1];
		}
		clock_t st5 = clock();
		hipMemcpy(ctrs,dev_ctrs, 2 * sizeof( Pt ), hipMemcpyDeviceToHost);
	
	printf("\n Elapsed Time : %u ms \n", clock() - st5 + (st4 - st3) + (st2 - st));

	}
	
	printf("---Result---:\n");
	printf("Expected1 = ( %.2f, %.2f )\n",expected1.x, expected1.y);
	printf("Expected2 = ( %.2f, %.2f )\n", expected2.x, expected2.y);

	printf("random initial Center1 = ( %.2f, %.2f )" ,ctrs[0].x ,ctrs[0].y);
	printf("random initial Center2 = ( %.2f, %.2f )", ctrs[1].x, ctrs[1].y);

	hipFree(&data);
	hipFree(&moved);
	delete [] dataTemp;
	delete [] isMoved;
	hipFree( &dev_isMoved);

	delete [] sums;
	hipFree( &dev_sums);
	delete [] cnts;
	hipFree( &dev_cnts);

}

__device__ float dist(const Pt& p1, const Pt& p2)
{
	float s = sqrt(pow((p1.x - p2.x), 2) + pow((p1.y - p2.y), 2));
	return s;
}

__global__ void setFalse(bool*& Changed, int dsize)
{
	int index = blockIdx.x * blockDim.x + threadIdx.x;
	if (index < dsize)
	{
		Changed[index] = false;
	}
}

__global__ void Group_find(Pt*& data, int dsize, Pt* dev_ctrs, bool*& moved)
{
	int p = blockIdx.x * blockDim.x + threadIdx.x;

	if (p < dsize)
	{
		float d1 = dist(dev_ctrs[0], data[p]);
		float d2 = dist(dev_ctrs[1], data[p]);
		int oldGroup = data[p].group;

		if (d1 < d2)
			data[p].group = 1;
		else
			data[p].group = 2;

		if (data[p].group != oldGroup)
		{
			moved[p] = true;
		}
	}
}

__global__ void Moved_find(bool* moved, int dsize, bool* dev_isMoved)
{
	int index = 0;
	while (index < dsize && !dev_isMoved[0])
	{
		if (moved[index] == true) {
			dev_isMoved[0] = true;
		}
		index++;
	}
}

__global__ void Group_update(Pt*& data, int dsize, float* sums, int* cnts)
{

	int p = blockIdx.x * blockDim.x + threadIdx.x;

	if (p < dsize)
	{
		if (data[p].group == 1)
		{
			sums[0] += data[p].x; sums[1] += data[p].y;
			cnts[0]++;
		}
		else
		{
			sums[2] += data[p].x; sums[3] += data[p].y;
			cnts[1]++;
		}
	}
}

	.text
	.file	"Kmeans.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	leaq	28(%rsp), %rbx
	movl	$10, (%rbx)
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	(%rbx), %r15
	movl	%r15d, %r14d
	shrl	$31, %r14d
	addl	%r15d, %r14d
	movq	%r15, %rax
	shlq	$2, %rax
	leaq	(%rax,%rax,2), %rsi
	leaq	88(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movslq	(%rbx), %rsi
	leaq	80(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movslq	(%rbx), %rbx
	leal	1023(%rbx), %eax
	leal	2046(%rbx), %r12d
	testl	%eax, %eax
	cmovnsl	%eax, %r12d
	movl	$12, %ecx
	movq	%rbx, %rax
	mulq	%rcx
	movq	$-1, %rdi
	cmovnoq	%rax, %rdi
	callq	_Znam
	testq	%rbx, %rbx
	je	.LBB0_3
# %bb.1:
	leaq	(%rbx,%rbx,2), %rcx
	leaq	(%rax,%rcx,4), %rdx
	movq	%rax, %rcx
.LBB0_2:                                # =>This Inner Loop Header: Depth=1
	movq	$0, (%rcx)
	movl	$1, 8(%rcx)
	addq	$12, %rcx
	cmpq	%rdx, %rcx
	jne	.LBB0_2
.LBB0_3:                                # %.loopexit
	sarl	%r14d
	movq	%r14, 96(%rsp)                  # 8-byte Spill
	xorps	%xmm0, %xmm0
	movss	%xmm0, 24(%rsp)                 # 4-byte Spill
	movss	%xmm0, 20(%rsp)                 # 4-byte Spill
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	cmpl	$2, %r15d
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	jl	.LBB0_12
# %bb.4:                                # %.lr.ph.preheader
	movl	%r12d, 40(%rsp)                 # 4-byte Spill
	movq	96(%rsp), %rbp                  # 8-byte Reload
	leal	1(%rbp), %ebx
	movl	%ebp, %r14d
	leaq	8(%rax), %r12
	movss	%xmm0, 24(%rsp)                 # 4-byte Spill
	movq	%r14, %r13
	xorps	%xmm1, %xmm1
.LBB0_5:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	%xmm1, 20(%rsp)                 # 4-byte Spill
	callq	rand
	cltd
	idivl	%ebp
	xorps	%xmm1, %xmm1
	cvtsi2ss	%edx, %xmm1
	movss	%xmm1, 32(%rsp)                 # 4-byte Spill
	movss	24(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	%xmm1, %xmm0
	movss	%xmm0, 24(%rsp)                 # 4-byte Spill
	callq	rand
	movss	20(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	cltd
	idivl	%ebp
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edx, %xmm0
	addss	%xmm0, %xmm1
	movss	32(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	movss	%xmm2, -8(%r12)
	movss	%xmm0, -4(%r12)
	movl	$1, (%r12)
	addq	$12, %r12
	decq	%r13
	jne	.LBB0_5
# %bb.6:                                # %.preheader
	cmpl	$2, %r15d
	jl	.LBB0_7
# %bb.8:                                # %.lr.ph166
	movss	%xmm1, 20(%rsp)                 # 4-byte Spill
	movl	%r15d, %r12d
	subl	%ebx, %r12d
	leaq	(%r14,%r14,2), %rax
	movq	48(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r13
	addq	$8, %r13
	xorps	%xmm0, %xmm0
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	xorps	%xmm1, %xmm1
.LBB0_9:                                # =>This Inner Loop Header: Depth=1
	movss	%xmm1, 16(%rsp)                 # 4-byte Spill
	callq	rand
	cltd
	idivl	%r12d
	addl	%ebx, %edx
	xorps	%xmm1, %xmm1
	cvtsi2ss	%edx, %xmm1
	movss	%xmm1, 32(%rsp)                 # 4-byte Spill
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	%xmm1, %xmm0
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	callq	rand
	movss	16(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	cltd
	idivl	%r12d
	addl	%ebx, %edx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edx, %xmm0
	addss	%xmm0, %xmm1
	movss	32(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	movss	%xmm2, -8(%r13)
	movss	%xmm0, -4(%r13)
	movl	$1, (%r13)
	addq	$12, %r13
	decq	%r14
	jne	.LBB0_9
# %bb.10:
	movss	%xmm1, 16(%rsp)                 # 4-byte Spill
	jmp	.LBB0_11
.LBB0_7:
	xorps	%xmm0, %xmm0
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
	movss	%xmm1, 20(%rsp)                 # 4-byte Spill
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
.LBB0_11:                               # %._crit_edge
	movq	48(%rsp), %rax                  # 8-byte Reload
	movl	40(%rsp), %r12d                 # 4-byte Reload
.LBB0_12:                               # %._crit_edge
	sarl	$10, %r12d
	movq	88(%rsp), %rdi
	movslq	28(%rsp), %rcx
	shlq	$2, %rcx
	leaq	(%rcx,%rcx,2), %rdx
	movq	%rax, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	movl	$24, %edi
	callq	_Znam
	movq	%rax, %r14
	movl	$8, %eax
.LBB0_13:                               # =>This Inner Loop Header: Depth=1
	movq	$0, -8(%r14,%rax)
	movl	$1, (%r14,%rax)
	addq	$12, %rax
	cmpq	$32, %rax
	jne	.LBB0_13
# %bb.14:                               # %.lr.ph172
	movabsq	$4294968320, %r13               # imm = 0x100000400
	callq	rand
	cltd
	idivl	%r15d
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edx, %xmm0
	movss	%xmm0, (%r14)
	callq	rand
	cltd
	idivl	%r15d
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edx, %xmm0
	movss	%xmm0, 4(%r14)
	callq	rand
	cltd
	idivl	%r15d
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edx, %xmm0
	movss	%xmm0, 12(%r14)
	callq	rand
	cltd
	idivl	%r15d
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edx, %xmm0
	movss	%xmm0, 16(%r14)
	leaq	104(%rsp), %rbx
	movl	$24, %esi
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movq	(%rbx), %rdi
	movl	$24, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$16, %edi
	callq	_Znam
	movq	%rax, %rbp
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rax)
	leaq	72(%rsp), %rdi
	movl	$16, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	$8, %edi
	callq	_Znam
	movq	%rax, %r15
	movabsq	$4294967297, %rax               # imm = 0x100000001
	movq	%rax, (%r15)
	leaq	64(%rsp), %rdi
	movl	$8, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	$1, %edi
	callq	_Znam
	movq	%rax, %rbx
	movb	$1, (%rax)
	leaq	56(%rsp), %rdi
	movl	$1, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	%r12d, %eax
	addq	%r13, %rax
	addq	$-1024, %rax                    # imm = 0xFC00
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	leaq	-1023(%r13), %rax
	movq	%rax, 112(%rsp)                 # 8-byte Spill
	movq	%rbp, 128(%rsp)                 # 8-byte Spill
	movq	%r15, 32(%rsp)                  # 8-byte Spill
	movq	%rbx, 120(%rsp)                 # 8-byte Spill
.LBB0_15:                               # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	4(%r14), %xmm1
	movl	$.L.str.2, %edi
	movb	$2, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%r14), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	16(%r14), %xmm1
	movl	$.L.str.3, %edi
	movb	$2, %al
	callq	printf
	movb	$0, (%rbx)
	callq	clock
	movq	%rax, %r12
	movq	40(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_17
# %bb.16:                               #   in Loop: Header=BB0_15 Depth=1
	movl	28(%rsp), %esi
	leaq	80(%rsp), %rdi
	callq	_Z23__device_stub__setFalseRPbi
.LBB0_17:                               #   in Loop: Header=BB0_15 Depth=1
	callq	hipDeviceSynchronize
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_19
# %bb.18:                               #   in Loop: Header=BB0_15 Depth=1
	movl	28(%rsp), %esi
	movq	104(%rsp), %rdx
	leaq	88(%rsp), %rdi
	leaq	80(%rsp), %rcx
	callq	_Z25__device_stub__Group_findRP2PtiS0_RPb
.LBB0_19:                               #   in Loop: Header=BB0_15 Depth=1
	callq	hipDeviceSynchronize
	movq	56(%rsp), %rdi
	movl	$1, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	112(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	32(%rsp), %r15                  # 8-byte Reload
	jne	.LBB0_21
# %bb.20:                               #   in Loop: Header=BB0_15 Depth=1
	movq	80(%rsp), %rdi
	movl	28(%rsp), %esi
	movq	56(%rsp), %rdx
	callq	_Z25__device_stub__Moved_findPbiS_
.LBB0_21:                               #   in Loop: Header=BB0_15 Depth=1
	callq	hipDeviceSynchronize
	movq	56(%rsp), %rsi
	movl	$1, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	movq	%rax, %r13
	cmpb	$0, (%rbx)
	je	.LBB0_22
# %bb.23:                               #   in Loop: Header=BB0_15 Depth=1
	callq	clock
	movq	%rax, %rbx
	movq	72(%rsp), %rdi
	movl	$16, %edx
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	64(%rsp), %rdi
	movl	$8, %edx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movabsq	$4294968320, %rdx               # imm = 0x100000400
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_25
# %bb.24:                               #   in Loop: Header=BB0_15 Depth=1
	movl	28(%rsp), %esi
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rcx
	leaq	88(%rsp), %rdi
	callq	_Z27__device_stub__Group_updateRP2PtiPfPi
.LBB0_25:                               #   in Loop: Header=BB0_15 Depth=1
	callq	hipDeviceSynchronize
	movq	72(%rsp), %rsi
	movl	$16, %edx
	movq	%rbp, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	64(%rsp), %rsi
	movl	$8, %edx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	cvtsi2ssl	(%r15), %xmm0
	movq	%r15, %rcx
	movq	%rax, %r15
	movss	(%rbp), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	movss	%xmm1, (%r14)
	movss	4(%rbp), %xmm1                  # xmm1 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	movss	%xmm1, 4(%r14)
	movss	8(%rbp), %xmm0                  # xmm0 = mem[0],zero,zero,zero
	xorps	%xmm1, %xmm1
	cvtsi2ssl	4(%rcx), %xmm1
	divss	%xmm1, %xmm0
	movss	%xmm0, 12(%r14)
	movss	12(%rbp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	divss	%xmm1, %xmm0
	movss	%xmm0, 16(%r14)
	jmp	.LBB0_26
.LBB0_22:                               #   in Loop: Header=BB0_15 Depth=1
	xorl	%ebx, %ebx
	xorl	%r15d, %r15d
.LBB0_26:                               #   in Loop: Header=BB0_15 Depth=1
	callq	clock
	movq	%rax, %rbp
	movq	104(%rsp), %rsi
	movl	$24, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	addq	%rbx, %r12
	addq	%r15, %r13
	addq	%rbp, %r12
	subq	%r12, %r13
	addq	%rax, %r13
	movl	$.L.str.4, %edi
	movq	%r13, %rsi
	xorl	%eax, %eax
	callq	printf
	movq	120(%rsp), %rbx                 # 8-byte Reload
	cmpb	$0, (%rbx)
	movq	128(%rsp), %rbp                 # 8-byte Reload
	movq	32(%rsp), %r15                  # 8-byte Reload
	movabsq	$4294968320, %r13               # imm = 0x100000400
	jne	.LBB0_15
# %bb.27:                               # %._crit_edge173
	xorps	%xmm0, %xmm0
	cvtsi2ssl	96(%rsp), %xmm0         # 4-byte Folded Reload
	movss	16(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	movss	%xmm1, 16(%rsp)                 # 4-byte Spill
	movss	12(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	movss	%xmm1, 12(%rsp)                 # 4-byte Spill
	movss	20(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	movss	%xmm1, 20(%rsp)                 # 4-byte Spill
	movss	24(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	movss	%xmm1, 24(%rsp)                 # 4-byte Spill
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorps	%xmm0, %xmm0
	cvtss2sd	24(%rsp), %xmm0                 # 4-byte Folded Reload
	xorps	%xmm1, %xmm1
	cvtss2sd	20(%rsp), %xmm1                 # 4-byte Folded Reload
	movl	$.L.str.6, %edi
	movb	$2, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0                 # 4-byte Folded Reload
	xorps	%xmm1, %xmm1
	cvtss2sd	16(%rsp), %xmm1                 # 4-byte Folded Reload
	movl	$.L.str.7, %edi
	movb	$2, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	4(%r14), %xmm1
	movl	$.L.str.8, %edi
	movb	$2, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%r14), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	16(%r14), %xmm1
	movl	$.L.str.9, %edi
	movb	$2, %al
	callq	printf
	leaq	88(%rsp), %rdi
	callq	hipFree
	leaq	80(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi                  # 8-byte Reload
	callq	_ZdaPv
	movq	%rbx, %rdi
	callq	_ZdaPv
	leaq	56(%rsp), %rdi
	callq	hipFree
	movq	%rbp, %rdi
	callq	_ZdaPv
	leaq	72(%rsp), %rdi
	callq	hipFree
	movq	%r15, %rdi
	callq	_ZdaPv
	leaq	64(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__setFalseRPbi # -- Begin function _Z23__device_stub__setFalseRPbi
	.type	_Z23__device_stub__setFalseRPbi,@function
_Z23__device_stub__setFalseRPbi:        # @_Z23__device_stub__setFalseRPbi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8setFalseRPbi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z23__device_stub__setFalseRPbi, .Lfunc_end1-_Z23__device_stub__setFalseRPbi
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__Group_findRP2PtiS0_RPb # -- Begin function _Z25__device_stub__Group_findRP2PtiS0_RPb
	.type	_Z25__device_stub__Group_findRP2PtiS0_RPb,@function
_Z25__device_stub__Group_findRP2PtiS0_RPb: # @_Z25__device_stub__Group_findRP2PtiS0_RPb
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10Group_findRP2PtiS0_RPb, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25__device_stub__Group_findRP2PtiS0_RPb, .Lfunc_end2-_Z25__device_stub__Group_findRP2PtiS0_RPb
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__Moved_findPbiS_ # -- Begin function _Z25__device_stub__Moved_findPbiS_
	.type	_Z25__device_stub__Moved_findPbiS_,@function
_Z25__device_stub__Moved_findPbiS_:     # @_Z25__device_stub__Moved_findPbiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10Moved_findPbiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z25__device_stub__Moved_findPbiS_, .Lfunc_end3-_Z25__device_stub__Moved_findPbiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__Group_updateRP2PtiPfPi # -- Begin function _Z27__device_stub__Group_updateRP2PtiPfPi
	.type	_Z27__device_stub__Group_updateRP2PtiPfPi,@function
_Z27__device_stub__Group_updateRP2PtiPfPi: # @_Z27__device_stub__Group_updateRP2PtiPfPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12Group_updateRP2PtiPfPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z27__device_stub__Group_updateRP2PtiPfPi, .Lfunc_end4-_Z27__device_stub__Group_updateRP2PtiPfPi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8setFalseRPbi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10Group_findRP2PtiS0_RPb, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10Moved_findPbiS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12Group_updateRP2PtiPfPi, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"enter data size  "
	.size	.L.str, 18

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Center1 = ( %.2f, %.2f )\n"
	.size	.L.str.2, 26

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Center2 = ( %.2f, %.2f )\n"
	.size	.L.str.3, 26

	.type	_Z8setFalseRPbi,@object         # @_Z8setFalseRPbi
	.section	.rodata,"a",@progbits
	.globl	_Z8setFalseRPbi
	.p2align	3, 0x0
_Z8setFalseRPbi:
	.quad	_Z23__device_stub__setFalseRPbi
	.size	_Z8setFalseRPbi, 8

	.type	_Z10Group_findRP2PtiS0_RPb,@object # @_Z10Group_findRP2PtiS0_RPb
	.globl	_Z10Group_findRP2PtiS0_RPb
	.p2align	3, 0x0
_Z10Group_findRP2PtiS0_RPb:
	.quad	_Z25__device_stub__Group_findRP2PtiS0_RPb
	.size	_Z10Group_findRP2PtiS0_RPb, 8

	.type	_Z10Moved_findPbiS_,@object     # @_Z10Moved_findPbiS_
	.globl	_Z10Moved_findPbiS_
	.p2align	3, 0x0
_Z10Moved_findPbiS_:
	.quad	_Z25__device_stub__Moved_findPbiS_
	.size	_Z10Moved_findPbiS_, 8

	.type	_Z12Group_updateRP2PtiPfPi,@object # @_Z12Group_updateRP2PtiPfPi
	.globl	_Z12Group_updateRP2PtiPfPi
	.p2align	3, 0x0
_Z12Group_updateRP2PtiPfPi:
	.quad	_Z27__device_stub__Group_updateRP2PtiPfPi
	.size	_Z12Group_updateRP2PtiPfPi, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"\n Elapsed Time : %u ms \n"
	.size	.L.str.4, 25

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Expected1 = ( %.2f, %.2f )\n"
	.size	.L.str.6, 28

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Expected2 = ( %.2f, %.2f )\n"
	.size	.L.str.7, 28

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"random initial Center1 = ( %.2f, %.2f )"
	.size	.L.str.8, 40

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"random initial Center2 = ( %.2f, %.2f )"
	.size	.L.str.9, 40

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8setFalseRPbi"
	.size	.L__unnamed_1, 16

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10Group_findRP2PtiS0_RPb"
	.size	.L__unnamed_2, 27

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z10Moved_findPbiS_"
	.size	.L__unnamed_3, 20

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z12Group_updateRP2PtiPfPi"
	.size	.L__unnamed_4, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"---Result---:"
	.size	.Lstr, 14

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__setFalseRPbi
	.addrsig_sym _Z25__device_stub__Group_findRP2PtiS0_RPb
	.addrsig_sym _Z25__device_stub__Moved_findPbiS_
	.addrsig_sym _Z27__device_stub__Group_updateRP2PtiPfPi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8setFalseRPbi
	.addrsig_sym _Z10Group_findRP2PtiS0_RPb
	.addrsig_sym _Z10Moved_findPbiS_
	.addrsig_sym _Z12Group_updateRP2PtiPfPi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8setFalseRPbi         ; -- Begin function _Z8setFalseRPbi
	.globl	_Z8setFalseRPbi
	.p2align	8
	.type	_Z8setFalseRPbi,@function
_Z8setFalseRPbi:                        ; @_Z8setFalseRPbi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt lgkmcnt(0)
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v2, vcc_lo
	v_mov_b32_e32 v2, 0
	global_store_b8 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8setFalseRPbi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8setFalseRPbi, .Lfunc_end0-_Z8setFalseRPbi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 124
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2align	2                               ; -- Begin function _Z4distRK2PtS1_
	.type	_Z4distRK2PtS1_,@function
_Z4distRK2PtS1_:                        ; @_Z4distRK2PtS1_
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	flat_load_b64 v[0:1], v[0:1]
	flat_load_b64 v[2:3], v[2:3]
	s_mov_b32 s1, 0x3e76c4e1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_sub_f32 v0, v0, v2 :: v_dual_sub_f32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_mant_f32_e64 v2, |v0|
	v_frexp_mant_f32_e64 v3, |v1|
	v_frexp_exp_i32_f32_e32 v17, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v2
	v_cmp_gt_f32_e64 s0, 0x3f2aaaab, v3
	v_cndmask_b32_e64 v4, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, 0, 1, s0
	v_ldexp_f32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v3, v3, v5
	v_dual_add_f32 v4, 1.0, v2 :: v_dual_add_f32 v5, 1.0, v3
	v_dual_add_f32 v8, -1.0, v2 :: v_dual_add_f32 v9, -1.0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v6, v4
	v_rcp_f32_e32 v7, v5
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v10, v8, v6 :: v_dual_mul_f32 v11, v9, v7
	v_add_f32_e32 v12, -1.0, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v14, -1.0, v5 :: v_dual_mul_f32 v13, v4, v10
	v_dual_mul_f32 v15, v5, v11 :: v_dual_sub_f32 v2, v2, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v3, v3, v14
	v_fma_f32 v4, v10, v4, -v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, v11, v5, -v15
	v_dual_fmac_f32 v4, v10, v2 :: v_dual_fmac_f32 v5, v11, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v2, v13, v4 :: v_dual_add_f32 v3, v15, v5
	v_dual_sub_f32 v12, v8, v2 :: v_dual_sub_f32 v13, v2, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v15, v3, v15
	v_sub_f32_e32 v14, v9, v3
	v_dual_sub_f32 v8, v8, v12 :: v_dual_sub_f32 v5, v15, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v4, v13, v4
	v_sub_f32_e32 v2, v8, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v4, v2
	v_add_f32_e32 v2, v12, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v6, v2
	v_add_f32_e32 v4, v10, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v9, v9, v14 :: v_dual_mul_f32 v8, v4, v4
	v_sub_f32_e32 v3, v9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v5, v3
	v_add_f32_e32 v3, v14, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v3, v7, v3
	v_add_f32_e32 v5, v11, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v7, v5, v11 :: v_dual_sub_f32 v6, v4, v10
	v_dual_sub_f32 v3, v3, v7 :: v_dual_sub_f32 v2, v2, v6
	v_fma_f32 v7, v4, v4, -v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v11, v3, v3 :: v_dual_mul_f32 v6, v5, v5
	v_add_f32_e32 v9, v2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, v5, v5, -v6
	v_dual_fmac_f32 v7, v4, v9 :: v_dual_fmac_f32 v10, v5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v11, v6, v10
	v_dual_add_f32 v9, v8, v7 :: v_dual_sub_f32 v6, v11, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_fmaak_f32 v12, s1, v9, 0x3e91f4c4 :: v_dual_fmaak_f32 v13, s1, v11, 0x3e91f4c4
	v_sub_f32_e32 v8, v9, v8
	v_sub_f32_e32 v6, v10, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmaak_f32 v12, v9, v12, 0x3ecccdef :: v_dual_fmaak_f32 v13, v11, v13, 0x3ecccdef
	v_sub_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v14, v9, v12 :: v_dual_mul_f32 v15, v11, v13
	v_fma_f32 v8, v9, v12, -v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v10, v11, v13, -v15
	v_fmac_f32_e32 v8, v7, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v10, v6, v13
	v_mul_f32_e32 v13, v4, v9
	v_frexp_exp_i32_f32_e32 v12, v0
	v_add_f32_e32 v16, v14, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v20, v9, v4, -v13
	v_add_f32_e32 v21, 0x3f2aaaaa, v16
	v_add_f32_e32 v19, v15, v10
	v_sub_f32_e32 v14, v16, v14
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v20, v9, v2
	v_ldexp_f32 v2, v2, 1
	v_sub_f32_e32 v15, v19, v15
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_add_f32 v23, 0x3f2aaaaa, v19 :: v_dual_sub_f32 v8, v8, v14
	v_add_f32_e32 v14, 0xbf2aaaaa, v21
	v_dual_fmac_f32 v20, v7, v4 :: v_dual_sub_f32 v9, v10, v15
	v_mul_f32_e32 v18, v5, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f32_e32 v10, 0xbf2aaaaa, v23
	v_add_f32_e32 v8, 0x31739010, v8
	v_dual_sub_f32 v14, v16, v14 :: v_dual_add_f32 v7, 0x31739010, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v22, v11, v5, -v18
	v_sub_f32_e32 v9, v19, v10
	v_subrev_co_ci_u32_e32 v10, vcc_lo, 0, v12, vcc_lo
	v_ldexp_f32 v4, v4, 1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v22, v11, v3
	v_subrev_co_ci_u32_e64 v11, vcc_lo, 0, v17, s0
	v_ldexp_f32 v3, v3, 1
	v_cmp_neq_f32_e64 s0, 0x7f800000, |v0|
	v_fmac_f32_e32 v22, v6, v5
	v_add_f32_e32 v6, v7, v9
	v_ldexp_f32 v5, v5, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v12, v23, v6
	v_dual_add_f32 v8, v8, v14 :: v_dual_sub_f32 v17, v23, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v9, v21, v8 :: v_dual_add_f32 v14, v18, v22
	v_sub_f32_e32 v15, v21, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v19, v14, v12
	v_add_f32_e32 v6, v6, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v8, v8, v15
	v_fma_f32 v17, v14, v12, -v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v17, v14, v6
	v_add_f32_e32 v7, v13, v20
	v_cvt_f32_i32_e32 v6, v11
	v_mul_f32_e32 v16, v7, v9
	v_sub_f32_e32 v13, v7, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v15, v7, v9, -v16
	v_sub_f32_e32 v13, v20, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v15, v7, v8
	v_cvt_f32_i32_e32 v7, v10
	v_fmac_f32_e32 v15, v13, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v9, 0x3f317218, v7 :: v_dual_sub_f32 v18, v14, v18
	v_sub_f32_e32 v8, v22, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v17, v8, v12
	v_fma_f32 v12, 0x3f317218, v7, -v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v11, v19, v17 :: v_dual_fmac_f32 v12, 0xb102e308, v7
	v_sub_f32_e32 v18, v11, v19
	v_add_f32_e32 v8, v16, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v14, v8, v16
	v_sub_f32_e32 v14, v15, v14
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v15, v17, v18
	v_dual_add_f32 v13, v4, v8 :: v_dual_add_f32 v2, v2, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v15
	v_add_f32_e32 v16, v5, v11
	v_dual_sub_f32 v5, v16, v5 :: v_dual_mul_f32 v10, 0x3f317218, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v5, v11, v5
	v_dual_add_f32 v3, v3, v5 :: v_dual_sub_f32 v4, v13, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v7, v16, v3
	v_sub_f32_e32 v4, v8, v4
	v_fma_f32 v8, 0x3f317218, v6, -v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v2, v2, v4
	v_add_f32_e32 v4, v9, v12
	v_add_f32_e32 v5, v13, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v9, v4, v9
	v_add_f32_e32 v11, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v15, v11, v4 :: v_dual_fmac_f32 v8, 0xb102e308, v6
	v_dual_sub_f32 v9, v12, v9 :: v_dual_sub_f32 v16, v7, v16
	v_sub_f32_e32 v12, v5, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v5, v5, v15
	v_sub_f32_e32 v3, v3, v16
	v_add_f32_e32 v6, v10, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v14, v6, v7
	v_sub_f32_e32 v10, v6, v10
	v_sub_f32_e32 v13, v14, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v8, v8, v10
	v_sub_f32_e32 v10, v11, v15
	v_sub_f32_e32 v2, v2, v12
	v_sub_f32_e32 v12, v14, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v7, v7, v13 :: v_dual_sub_f32 v4, v4, v10
	v_dual_add_f32 v4, v5, v4 :: v_dual_add_f32 v5, v8, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v6, v6, v12
	v_add_f32_e32 v6, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v6, v5, v6
	v_add_f32_e32 v10, v9, v2
	v_dual_sub_f32 v7, v10, v9 :: v_dual_sub_f32 v12, v5, v8
	v_add_f32_e32 v4, v10, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v10, v10, v7 :: v_dual_sub_f32 v5, v5, v12
	v_add_f32_e32 v13, v11, v4
	v_sub_f32_e32 v3, v3, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v9, v9, v10
	v_dual_sub_f32 v5, v8, v5 :: v_dual_sub_f32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v7, v14, v6 :: v_dual_sub_f32 v10, v13, v11
	v_add_f32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v2, v2, v9
	v_sub_f32_e32 v8, v7, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v5, v6, v8
	v_add_f32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, v7, v3
	v_sub_f32_e32 v7, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v3, v3, v7 :: v_dual_sub_f32 v4, v4, v10
	v_mul_f32_e32 v10, 0, v5
	v_add_f32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v10, 2.0, v3
	v_add_f32_e32 v4, v13, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v6, v4, v13 :: v_dual_mul_f32 v9, 0, v4
	v_sub_f32_e32 v2, v2, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v6, v5, v5 :: v_dual_fmac_f32 v9, 2.0, v2
	v_fma_f32 v2, v5, 2.0, -v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v10
	v_dual_add_f32 v5, v6, v2 :: v_dual_add_f32 v8, v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v4, v4, 2.0, -v8
	v_cmp_class_f32_e64 vcc_lo, v8, 0x204
	v_add_f32_e32 v3, v4, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v8, v3
	v_cndmask_b32_e32 v7, v4, v8, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v6, 0x204
	v_cndmask_b32_e32 v9, v5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v7
	v_dual_sub_f32 v5, v5, v6 :: v_dual_sub_f32 v4, v4, v8
	v_cndmask_b32_e64 v10, 0, 0x37000000, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v9
	v_dual_sub_f32 v3, v3, v4 :: v_dual_sub_f32 v2, v2, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v12, v7, v10
	v_cndmask_b32_e64 v11, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v7|
	v_dual_mul_f32 v14, 0x3fb8aa3b, v12 :: v_dual_sub_f32 v13, v9, v11
	v_cndmask_b32_e32 v3, 0, v3, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v9|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v16, 0x3fb8aa3b, v12, -v14
	v_mul_f32_e32 v15, 0x3fb8aa3b, v13
	v_rndne_f32_e32 v17, v14
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v12
	v_fmac_f32_e32 v16, 0x32a5705f, v12
	v_fma_f32 v18, 0x3fb8aa3b, v13, -v15
	v_rndne_f32_e32 v19, v15
	v_sub_f32_e32 v14, v14, v17
	v_cvt_i32_f32_e32 v4, v17
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_add_f32 v3, v10, v3 :: v_dual_fmac_f32 v18, 0x32a5705f, v13
	v_dual_sub_f32 v15, v15, v19 :: v_dual_add_f32 v14, v14, v16
	v_cvt_i32_f32_e32 v5, v19
	v_add_f32_e32 v2, v11, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f32_e32 v15, v15, v18
	v_exp_f32_e32 v8, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_exp_f32_e32 v6, v15
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v4, v8, v4
	v_ldexp_f32 v5, v6, v5
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v12
	v_cndmask_b32_e32 v4, 0x7f800000, v4, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f32 v3, v4, v3, v4
	v_cndmask_b32_e32 v5, 0x7f800000, v5, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v4
	v_fma_f32 v2, v5, v2, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v5
	v_cndmask_b32_e64 v3, 0x7f800000, |v3|, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v2, v5, vcc_lo
	v_cmp_neq_f32_e64 s0, 0x7f800000, |v1|
	v_cmp_neq_f32_e32 vcc_lo, 0, v0
	v_cndmask_b32_e64 v2, 0x7f800000, |v2|, s0
	v_cndmask_b32_e32 v0, 0, v3, vcc_lo
	v_cmp_neq_f32_e32 vcc_lo, 0, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, 0, v2, vcc_lo
	v_add_f32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v1, 0x4f800000, v0
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v0
	v_cndmask_b32_e32 v0, v0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v1, v0
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v2, -1, v1
	v_add_nc_u32_e32 v3, 1, v1
	v_fma_f32 v4, -v2, v1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v5, -v3, v1, v0
	v_cmp_ge_f32_e64 s0, 0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v1, v1, v2, s0
	v_cmp_lt_f32_e64 s0, 0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v1, v1, v3, s0
	v_mul_f32_e32 v2, 0x37800000, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v1, v1, v2, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v0, 0x260
	v_cndmask_b32_e32 v0, v1, v0, vcc_lo
	s_setpc_b64 s[30:31]
.Lfunc_end1:
	.size	_Z4distRK2PtS1_, .Lfunc_end1-_Z4distRK2PtS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 1944
; NumSgprs: 34
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	_Z10Group_findRP2PtiS0_RPb ; -- Begin function _Z10Group_findRP2PtiS0_RPb
	.globl	_Z10Group_findRP2PtiS0_RPb
	.p2align	8
	.type	_Z10Group_findRP2PtiS0_RPb,@function
_Z10Group_findRP2PtiS0_RPb:             ; @_Z10Group_findRP2PtiS0_RPb
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x8
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[27:28], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v27
	s_cbranch_execz .LBB2_3
; %bb.1:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x0
	s_load_b128 s[4:7], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_load_b64 s[0:1], s[2:3], 0x0
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, _Z4distRK2PtS1_@rel32@lo+4
	s_addc_u32 s3, s3, _Z4distRK2PtS1_@rel32@hi+12
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[24:25], null, v27, 12, s[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, v24 :: v_dual_mov_b32 v3, v25
	s_swappc_b64 s[30:31], s[2:3]
	s_add_u32 s0, s4, 12
	s_addc_u32 s1, s5, 0
	v_dual_mov_b32 v26, v0 :: v_dual_mov_b32 v1, s1
	v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v3, v25
	v_mov_b32_e32 v2, v24
	s_swappc_b64 s[30:31], s[2:3]
	global_load_b32 v1, v[24:25], off offset:8
	v_cmp_lt_f32_e32 vcc_lo, v26, v0
	v_cndmask_b32_e64 v0, 2, 1, vcc_lo
	global_store_b32 v[24:25], v0, off offset:8
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v0, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_3
; %bb.2:
	s_load_b64 s[0:1], s[6:7], 0x0
	v_ashrrev_i32_e32 v1, 31, v27
	v_mov_b32_e32 v2, 1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v27
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b8 v[0:1], v2, off
.LBB2_3:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10Group_findRP2PtiS0_RPb
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 29
		.amdhsa_next_free_sgpr 33
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z10Group_findRP2PtiS0_RPb, .Lfunc_end2-_Z10Group_findRP2PtiS0_RPb
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 276
; NumSgprs: 35
; NumVgprs: 29
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 35
; NumVGPRsForWavesPerEU: 29
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10Moved_findPbiS_     ; -- Begin function _Z10Moved_findPbiS_
	.globl	_Z10Moved_findPbiS_
	.p2align	8
	.type	_Z10Moved_findPbiS_,@function
_Z10Moved_findPbiS_:                    ; @_Z10Moved_findPbiS_
; %bb.0:
	s_load_b32 s4, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB3_7
; %bb.1:                                ; %.lr.ph
	s_load_b64 s[2:3], s[0:1], 0x10
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 1
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	global_load_u8 v2, v0, s[2:3]
.LBB3_2:                                ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, 0xff, v2
	s_mov_b32 s6, -1
                                        ; implicit-def: $sgpr5
	v_cmp_ne_u16_e32 vcc_lo, 0, v2
	s_cbranch_vccnz .LBB3_6
; %bb.3:                                ;   in Loop: Header=BB3_2 Depth=1
	global_load_u8 v2, v0, s[0:1]
	s_mov_b32 s5, 0
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v2
	s_cbranch_vccnz .LBB3_5
; %bb.4:                                ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s5, 1
	global_store_b8 v0, v1, s[2:3]
.LBB3_5:                                ;   in Loop: Header=BB3_2 Depth=1
	s_add_i32 s4, s4, -1
	s_add_u32 s0, s0, 1
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s4, 0
	s_cselect_b32 s6, -1, 0
.LBB3_6:                                ; %Flow
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_mov_b32_e32 v2, s5
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccz .LBB3_2
.LBB3_7:                                ; %.critedge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10Moved_findPbiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 7
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z10Moved_findPbiS_, .Lfunc_end3-_Z10Moved_findPbiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 164
; NumSgprs: 9
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 9
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12Group_updateRP2PtiPfPi ; -- Begin function _Z12Group_updateRP2PtiPfPi
	.globl	_Z12Group_updateRP2PtiPfPi
	.p2align	8
	.type	_Z12Group_updateRP2PtiPfPi,@function
_Z12Group_updateRP2PtiPfPi:             ; @_Z12Group_updateRP2PtiPfPi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB4_6
; %bb.1:
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x0
	s_load_b128 s[0:3], s[0:1], 0x10
	s_mov_b32 s8, exec_lo
                                        ; implicit-def: $sgpr6_sgpr7
	s_waitcnt lgkmcnt(0)
	s_load_b64 s[4:5], s[4:5], 0x0
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[2:3], null, v1, 12, s[4:5]
	s_clause 0x1
	global_load_b32 v4, v[2:3], off offset:8
	global_load_b32 v0, v[2:3], off
	s_waitcnt vmcnt(1)
	v_cmpx_ne_u32_e32 1, v4
	s_xor_b32 s8, exec_lo, s8
	s_cbranch_execz .LBB4_3
; %bb.2:
	s_load_b64 s[6:7], s[0:1], 0x8
	v_mad_i64_i32 v[2:3], null, v1, 12, s[4:5]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v1, 0 :: v_dual_add_f32 v0, s6, v0
	s_add_u32 s6, s2, 4
	global_store_b32 v1, v0, s[0:1] offset:8
	global_load_b32 v0, v[2:3], off offset:4
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, s7, v0
	s_addc_u32 s7, s3, 0
	global_store_b32 v1, v0, s[0:1] offset:12
                                        ; implicit-def: $vgpr0
                                        ; implicit-def: $vgpr1_vgpr2
.LBB4_3:                                ; %Flow
	s_or_saveexec_b32 s8, s8
	v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s7
	s_xor_b32 exec_lo, exec_lo, s8
	s_cbranch_execz .LBB4_5
; %bb.4:
	v_mov_b32_e32 v6, 0
	v_mad_i64_i32 v[4:5], null, v1, 12, s[4:5]
	global_load_b64 v[2:3], v6, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v2
	global_store_b32 v6, v0, s[0:1]
	global_load_b32 v0, v[4:5], off offset:4
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v3
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	global_store_b32 v6, v0, s[0:1] offset:4
.LBB4_5:                                ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s8
	global_load_b32 v0, v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, 1, v0
	global_store_b32 v[2:3], v0, off
.LBB4_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12Group_updateRP2PtiPfPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z12Group_updateRP2PtiPfPi, .Lfunc_end4-_Z12Group_updateRP2PtiPfPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 340
; NumSgprs: 16
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8setFalseRPbi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8setFalseRPbi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10Group_findRP2PtiS0_RPb
    .private_segment_fixed_size: 0
    .sgpr_count:     35
    .sgpr_spill_count: 0
    .symbol:         _Z10Group_findRP2PtiS0_RPb.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     29
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10Moved_findPbiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     9
    .sgpr_spill_count: 0
    .symbol:         _Z10Moved_findPbiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12Group_updateRP2PtiPfPi
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z12Group_updateRP2PtiPfPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
