
#include "cuda_runtime.h"
#include <chrono>
#include <iostream>
#include <sstream>

#define arraySize 31 // 35 max
#define def_div 10   // 5<=X<=15
//#define W 100
//#define threads_per_block 32
//#define max_blocks 32

using namespace std;

__constant__ float coefs[arraySize * 2 + 1];
__global__ void hybrid(float *sh_sum_dev, long int *str_num_dev,
                       float num_of_blocks, int *bdevX, int *global_mem_bin,
                       int threads_per_block) {
  float th_w_sum = 0;
  float th_v_sum = 0;
  int th_bin[arraySize];
  int best_bin[arraySize];
  extern __shared__ float sh_array[];
  float *sh_maxs = (float *)sh_array;
  int *indices = (int *)&sh_maxs[threads_per_block];
  int reached = 0;
  indices[threadIdx.x] = blockIdx.x * blockDim.x + threadIdx.x;
  __syncthreads();

  long signed int num_to_bin = blockIdx.x * blockDim.x + threadIdx.x;
// num_to_bin += max_blocks * n_of_it;
#pragma unroll
  for (uint i = 0; i < def_div; i++) {
    th_bin[i] = ((num_to_bin) >> i) % 2;
    th_w_sum += th_bin[i] * coefs[i];
    th_v_sum += th_bin[i] * coefs[i + arraySize];
    best_bin[i] = th_bin[i];
  }
#pragma unroll
  for (uint i = def_div; i < arraySize; i++) {
    th_bin[i] = -1;
  }
  int Capacity = coefs[arraySize * 2] - th_w_sum;
  sh_maxs[threadIdx.x] = (th_w_sum > coefs[arraySize * 2]) ? 0 : th_v_sum;
  __syncthreads();

  // H_S
  int h = def_div;
  long int ns = 0;
  bool forward;

  while (h - def_div != -1) {
    ns++;
    forward = true;
    if (th_bin[h] == -1) {
      th_bin[h] = 1;
    } else {
      if (th_bin[h] == 1) {
        th_bin[h] = 0;
      } else {
        if (th_bin[h] == 0) {
          th_bin[h] = -1;
          h--;
          forward = false;
        }
      }
    }
    if (h == arraySize - 1) {
      int cw = 0;
      int cp = 0;
#pragma unroll
      for (int i = def_div; i < arraySize; i++) {
        cp += coefs[i + arraySize] * th_bin[i];
        cw += coefs[i] * th_bin[i];
      }
      if ((cw <= Capacity) && (cp > reached)) {
        reached = cp;
#pragma unroll
        for (int i = def_div; i < arraySize; i++) {
          best_bin[i] = th_bin[i];
        }
      }
    } else {
      int cw = 0;
      for (int i = def_div; i < arraySize; i++) {
        cw += coefs[i] * th_bin[i];
      }
      if (cw > Capacity)
        forward = false;
      cw = 0;
      float cp = 0;
      int nw = 0;
      int np = 0;
#pragma unroll
      for (int i = def_div; i < arraySize; i++) {
        np = th_bin[i] != -1 ? th_bin[i] * coefs[i + arraySize]
                             : coefs[i + arraySize];
        nw = th_bin[i] != -1 ? th_bin[i] * coefs[i] : coefs[i];
        if (cw + nw <= Capacity) {
          cw += nw;
          cp += np;
        } else {
          cp += np * (Capacity - cw) / nw;
          break;
        }
      }
      int b = cp;
      if (b <= reached) {
        forward = false;
      }
    }
    if (forward) {
      if (h < arraySize - 1) {
        h++;
      }
    }
  }

  sh_maxs[threadIdx.x] += reached;

  __syncthreads();
  // reduction on block
  for (uint offset = blockDim.x >> 1; offset >= 1; offset >>= 1) {
    if (threadIdx.x < offset) {
      if (sh_maxs[threadIdx.x] < sh_maxs[threadIdx.x + offset]) {
        sh_maxs[threadIdx.x] = sh_maxs[threadIdx.x + offset];
        indices[threadIdx.x] = indices[threadIdx.x + offset];
      }
    }
    __syncthreads();
  }
  // write result for this block to global mem
  if (threadIdx.x == 0) {
    sh_sum_dev[blockIdx.x] = sh_maxs[0];
    str_num_dev[blockIdx.x] = indices[0];
  }
  if (blockIdx.x * blockDim.x + threadIdx.x == indices[0]) {
#pragma unroll
    for (int i = 0; i < arraySize; i++) {
      global_mem_bin[blockIdx.x * arraySize + i] = best_bin[i];
    }
  }
  __syncthreads();
}

__global__ void hybrid_reduction(float *s, long int *str_num_dev,
                                 int *global_mem_bin, int threads_per_block) {
  int ID = blockIdx.x * blockDim.x + threadIdx.x;
  extern __shared__ int sh_hy_data[];
  sh_hy_data[threadIdx.x] = s[ID];
  sh_hy_data[threadIdx.x + threads_per_block] = str_num_dev[ID];

  __syncthreads();
  // do reduction in shared mem
  for (uint s = blockDim.x >> 1; s > 0; s >>= 1) {
    if (threadIdx.x < s) {
      if (sh_hy_data[threadIdx.x] < sh_hy_data[threadIdx.x + s]) {
        sh_hy_data[threadIdx.x] = sh_hy_data[threadIdx.x + s];
        sh_hy_data[threadIdx.x + threads_per_block] =
            sh_hy_data[threadIdx.x + threads_per_block + s];
      }
    }
    __syncthreads();
  }
  // write result for this block to global mem
  if (threadIdx.x == 0) {
    // if(sh_hy_data[0]>s[0]){//}&&(blockIdx.x>0)){
    s[blockIdx.x] = sh_hy_data[0];
    str_num_dev[blockIdx.x] = sh_hy_data[threads_per_block];

#pragma unroll
    for (int i = 0; i < arraySize; i++) {
      global_mem_bin[i] =
          global_mem_bin[(sh_hy_data[threads_per_block] / threads_per_block) *
                             arraySize +
                         i];
    }
  }
}

__global__ void which_string(long int a, int *view_dev) {
  view_dev[threadIdx.x] = (a >> threadIdx.x) % 2;
}

void quickSortR(float *a, float *b, long N) {
  // На входе - массив a[], a[N] - его последний элемент.

  long i = 0, j = N; // поставить указатели на исходные места
  float temp, p;

  p = a[N >> 1]; // центральный элемент

  // процедура разделения
  do {
    while (a[i] > p)
      i++;
    while (a[j] < p)
      j--;

    if (i <= j) {
      temp = a[i];
      a[i] = a[j];
      a[j] = temp;
      temp = b[i];
      b[i] = b[j];
      b[j] = temp;
      temp = b[i + arraySize];
      b[i + arraySize] = b[j + arraySize];
      b[j + arraySize] = temp;
      i++;
      j--;
    }
  } while (i <= j);

  // рекурсивные вызовы, если есть, что сортировать
  if (j > 0)
    quickSortR(a, b, j);
  if (N > i)
    quickSortR(a + i, b + i, N - i);
}

int main() {
  cudaDeviceProp deviceProp;
  cudaGetDeviceProperties(&deviceProp, 0);
  int threads_per_block = deviceProp.warpSize;
  int max_blocks = pow(2, def_div) / threads_per_block;
  long int strSize_b = pow(2, arraySize);
  int num_of_blocks = strSize_b / threads_per_block;
  float *Sum = new float[32]; // = { 0 };
  float *sh_sum_dev;

  int iter = 0;

  string line;
  float v;
  float *dev_coefs = new float[arraySize * 2 + 1];
  while (getline(cin, line)) {
    istringstream iss(line);
    int q = 0;
    while (iss >> v) {
      dev_coefs[q] = v;
      q++;
    }
    cout<<"Iter = "<<iter<<"\n";iter++;
    for (int i = 0; i < arraySize * 2 + 1; i++) {
      cout << dev_coefs[i] << " ";
    }
    cout << "\n";
    // int W = int(dev_coefs[arraySize*2]);

    long int *str_num_dev;
    long int *str_num = new long int[1];

    float *additional_array = new float[arraySize];
    for (int i = 0; i < arraySize; i++) {
      additional_array[i] = dev_coefs[i + arraySize] / dev_coefs[i];
    }

    quickSortR(additional_array, dev_coefs, arraySize - 1);

    int *bdevX;
    cudaMalloc((void **)&bdevX, arraySize * sizeof(int));
    int *global_mem_bin;
    cudaMalloc((void **)&global_mem_bin, max_blocks * arraySize * sizeof(int));

    cudaMalloc((void **)&sh_sum_dev, num_of_blocks * sizeof(float));
    cudaMalloc((void **)&str_num_dev, num_of_blocks * sizeof(long));
    cudaMemcpyToSymbol(coefs, dev_coefs, (2 * arraySize + 1) * sizeof(float));

    std::chrono::time_point<std::chrono::high_resolution_clock> start, end;
    start = std::chrono::high_resolution_clock::now();



    hybrid<<<max_blocks, threads_per_block,
             threads_per_block * 3 * sizeof(int)>>>(
        sh_sum_dev, str_num_dev, num_of_blocks, bdevX, global_mem_bin,
        threads_per_block);

    hybrid_reduction<<<1, max_blocks, threads_per_block * 3 * sizeof(int)>>>(
        sh_sum_dev, str_num_dev, global_mem_bin, threads_per_block);

    int *suda = new int[arraySize];
    cudaMemcpy(Sum, sh_sum_dev, sizeof(int), cudaMemcpyDeviceToHost);
    cudaMemcpy(str_num, str_num_dev, sizeof(long int), cudaMemcpyDeviceToHost);
    cudaMemcpy(suda, global_mem_bin, arraySize * sizeof(int),
               cudaMemcpyDeviceToHost);

    end = std::chrono::high_resolution_clock::now();

    int elapsed_seconds =
        std::chrono::duration_cast<std::chrono::microseconds>(end - start)
            .count();
    std::time_t end_time = std::chrono::system_clock::to_time_t(end);

    std::cout << "Время выполнения: " << elapsed_seconds << "microseconds\n";
    cout << "Acheived maximal sum = " << Sum[0] << "\n";
    cout << str_num[0] << "\n";
    for (int i = 0; i < arraySize; i++) {
      cout << suda[i];
    }
    cout << "\n";

    // check
    int checksum = 0;
    for (int i = 0; i < arraySize; i++) {
      checksum += dev_coefs[i + arraySize] * suda[i];
    }
    cout << "Validation sum = " << checksum << "\n";
    checksum = 0;
    for (int i = 0; i < arraySize; i++) {
      checksum += dev_coefs[i] * suda[i];
    }
    cout << "Weight = " << checksum << "\n";

    cudaFree(coefs);
    cudaFree(sh_sum_dev);
    cudaFree(str_num_dev);
    cudaFree(bdevX);
    cudaFree(global_mem_bin);
/*
    delete[] Sum;
    delete[] suda;
    delete[] str_num;
    delete[] dev_coefs;
    delete[] additional_array;
*/
    //cudaDeviceReset();
  }
  return 0;
}

	.file	"tmpxft_00277bca_00000000-6_Hybrid-Horviz.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3804:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3804:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10quickSortRPfS_l
	.type	_Z10quickSortRPfS_l, @function
_Z10quickSortRPfS_l:
.LFB3792:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rsi, %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 48
.L10:
	movq	%r13, %rax
	movq	%r13, %rdx
	sarq	%rax
	movss	0(%rbp,%rax,4), %xmm2
	movl	$1, %eax
.L3:
	movss	-4(%rbp,%rax,4), %xmm0
	comiss	%xmm2, %xmm0
	jbe	.L5
.L4:
	incq	%rax
	jmp	.L3
.L5:
	movss	0(%rbp,%rdx,4), %xmm1
	comiss	%xmm1, %xmm2
	jbe	.L13
	decq	%rdx
	jmp	.L5
.L13:
	leaq	-1(%rax), %r12
	cmpq	%rdx, %r12
	jg	.L7
	leaq	0(,%rdx,4), %rcx
	movss	%xmm1, -4(%rbp,%rax,4)
	movq	%rax, %r12
	leaq	(%rbx,%rcx), %rsi
	movss	%xmm0, 0(%rbp,%rdx,4)
	movss	-4(%rbx,%rax,4), %xmm0
	decq	%rdx
	movss	(%rsi), %xmm1
	leaq	124(%rbx,%rcx), %rcx
	movss	%xmm1, -4(%rbx,%rax,4)
	movss	%xmm0, (%rsi)
	movss	120(%rbx,%rax,4), %xmm0
	movss	(%rcx), %xmm1
	movss	%xmm1, 120(%rbx,%rax,4)
	movss	%xmm0, (%rcx)
	cmpq	%rdx, %rax
	jle	.L4
.L7:
	testq	%rdx, %rdx
	jle	.L8
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	_Z10quickSortRPfS_l
.L8:
	cmpq	%r13, %r12
	jge	.L2
	subq	%r12, %r13
	salq	$2, %r12
	addq	%r12, %rbx
	addq	%r12, %rbp
	jmp	.L10
.L2:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3792:
	.size	_Z10quickSortRPfS_l, .-_Z10quickSortRPfS_l
	.globl	_Z34__device_stub__Z6hybridPfPlfPiS1_iPfPlfPiS1_i
	.type	_Z34__device_stub__Z6hybridPfPlfPiS1_iPfPlfPiS1_i, @function
_Z34__device_stub__Z6hybridPfPlfPiS1_iPfPlfPiS1_i:
.LFB3826:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 24(%rsp)
	movss	%xmm0, 28(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z6hybridPfPlfPiS1_i(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L14:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3826:
	.size	_Z34__device_stub__Z6hybridPfPlfPiS1_iPfPlfPiS1_i, .-_Z34__device_stub__Z6hybridPfPlfPiS1_iPfPlfPiS1_i
	.globl	_Z6hybridPfPlfPiS1_i
	.type	_Z6hybridPfPlfPiS1_i, @function
_Z6hybridPfPlfPiS1_i:
.LFB3827:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z6hybridPfPlfPiS1_iPfPlfPiS1_i
	.cfi_endproc
.LFE3827:
	.size	_Z6hybridPfPlfPiS1_i, .-_Z6hybridPfPlfPiS1_i
	.globl	_Z41__device_stub__Z16hybrid_reductionPfPlPiiPfPlPii
	.type	_Z41__device_stub__Z16hybrid_reductionPfPlPiiPfPlPii, @function
_Z41__device_stub__Z16hybrid_reductionPfPlPiiPfPlPii:
.LFB3828:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16hybrid_reductionPfPlPii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L19:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3828:
	.size	_Z41__device_stub__Z16hybrid_reductionPfPlPiiPfPlPii, .-_Z41__device_stub__Z16hybrid_reductionPfPlPiiPfPlPii
	.globl	_Z16hybrid_reductionPfPlPii
	.type	_Z16hybrid_reductionPfPlPii, @function
_Z16hybrid_reductionPfPlPii:
.LFB3829:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z16hybrid_reductionPfPlPiiPfPlPii
	.cfi_endproc
.LFE3829:
	.size	_Z16hybrid_reductionPfPlPii, .-_Z16hybrid_reductionPfPlPii
	.globl	_Z33__device_stub__Z12which_stringlPilPi
	.type	_Z33__device_stub__Z12which_stringlPilPi, @function
_Z33__device_stub__Z12which_stringlPilPi:
.LFB3830:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12which_stringlPi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L24:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3830:
	.size	_Z33__device_stub__Z12which_stringlPilPi, .-_Z33__device_stub__Z12which_stringlPilPi
	.globl	_Z12which_stringlPi
	.type	_Z12which_stringlPi, @function
_Z12which_stringlPi:
.LFB3831:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z12which_stringlPilPi
	.cfi_endproc
.LFE3831:
	.size	_Z12which_stringlPi, .-_Z12which_stringlPi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z12which_stringlPi"
.LC1:
	.string	"_Z16hybrid_reductionPfPlPii"
.LC2:
	.string	"_Z6hybridPfPlfPiS1_i"
.LC3:
	.string	"coefs"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3833:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12which_stringlPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16hybrid_reductionPfPlPii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6hybridPfPlfPiS1_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	movl	$252, %r9d
	leaq	_ZL5coefs(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3833:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC5:
	.string	"Iter = "
.LC6:
	.string	"\n"
.LC7:
	.string	" "
.LC8:
	.string	"\320\222\321\200\320\265\320\274\321\217 \320\262\321\213\320\277\320\276\320\273\320\275\320\265\320\275\320\270\321\217: "
.LC9:
	.string	"microseconds\n"
.LC10:
	.string	"Acheived maximal sum = "
.LC11:
	.string	"Validation sum = "
.LC12:
	.string	"Weight = "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3793:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3793
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%esi, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1592, %rsp
	.cfi_def_cfa_offset 1648
	movq	%fs:40, %rax
	movq	%rax, 1576(%rsp)
	xorl	%eax, %eax
	leaq	544(%rsp), %rdi
.LEHB0:
	call	cudaGetDeviceProperties_v2@PLT
	movl	$2147483648, %eax
	movl	$128, %edi
	movslq	852(%rsp), %rcx
	movsd	.LC4(%rip), %xmm0
	cqto
	cvtsi2sdl	%ecx, %xmm1
	movq	%rcx, %rbp
	idivq	%rcx
	divsd	%xmm1, %xmm0
	movl	%eax, 60(%rsp)
	movq	%rax, %r12
	cvttsd2sil	%xmm0, %r15d
	call	_Znam@PLT
.LEHE0:
	xorl	%edx, %edx
	movl	$252, %edi
	movb	$0, 144(%rsp)
	movq	%rax, 24(%rsp)
	leaq	144(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	%rdx, 136(%rsp)
.LEHB1:
	call	_Znam@PLT
	movq	%rax, %rbx
	imull	$31, %r15d, %eax
	movslq	%r12d, %r12
	cltq
	salq	$2, %rax
	movq	%rax, 32(%rsp)
	leaq	0(,%r12,4), %rax
	movq	%rax, 40(%rsp)
	leaq	0(,%r12,8), %rax
	movq	%rax, 48(%rsp)
	leal	0(%rbp,%rbp,2), %eax
	cltq
	salq	$2, %rax
	movq	%rax, 16(%rsp)
	xorl	%eax, %eax
	movl	%eax, 56(%rsp)
.L32:
	leaq	128(%rsp), %r12
	leaq	_ZSt3cin(%rip), %rdi
	movq	%r12, %rsi
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE@PLT
	movq	(%rax), %rdx
	movq	-24(%rdx), %rdx
	movl	32(%rax,%rdx), %eax
	andl	$5, %eax
	movl	%eax, 12(%rsp)
	jne	.L56
	leaq	160(%rsp), %r13
	movl	$8, %edx
	movq	%r12, %rsi
	movq	%r13, %rdi
	call	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEC1ERKNS_12basic_stringIcS2_S3_EESt13_Ios_Openmode@PLT
.LEHE1:
	movq	%rbx, %r12
	leaq	68(%rsp), %r14
.L33:
	movq	%r14, %rsi
	movq	%r13, %rdi
.LEHB2:
	call	_ZNSi10_M_extractIfEERSiRT_@PLT
	movq	(%rax), %rdx
	movq	-24(%rdx), %rdx
	testb	$5, 32(%rax,%rdx)
	jne	.L57
	movss	68(%rsp), %xmm0
	addq	$4, %r12
	movss	%xmm0, -4(%r12)
	jmp	.L33
.L57:
	leaq	_ZSt4cout(%rip), %r13
	leaq	.LC5(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	56(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC6(%rip), %r14
	movq	%rax, %rdi
	movq	%r14, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	incl	56(%rsp)
	xorl	%r12d, %r12d
.L35:
	movq	%r13, %rdi
	cvtss2sd	(%rbx,%r12,4), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	leaq	.LC7(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	incq	%r12
	cmpq	$63, %r12
	jne	.L35
	movq	%r14, %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$8, %edi
	call	_Znam@PLT
	movl	$124, %edi
	movq	%rax, %r13
	call	_Znam@PLT
	movq	%rax, %rdi
	xorl	%edx, %edx
.L36:
	movss	124(%rbx,%rdx), %xmm0
	divss	(%rbx,%rdx), %xmm0
	movss	%xmm0, (%rdi,%rdx)
	addq	$4, %rdx
	cmpq	$124, %rdx
	jne	.L36
	movq	%rbx, %rsi
	movl	$30, %edx
	call	_Z10quickSortRPfS_l
	leaq	88(%rsp), %rdi
	movl	$124, %esi
	call	cudaMalloc@PLT
	movq	32(%rsp), %rsi
	leaq	96(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	40(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	48(%rsp), %rsi
	leaq	80(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movl	$252, %edx
	movq	%rbx, %rsi
	leaq	_ZL5coefs(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	%ebp, 116(%rsp)
	movq	16(%rsp), %r8
	xorl	%r9d, %r9d
	movq	%rax, %r14
	movl	%r15d, 104(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 120(%rsp)
	movl	124(%rsp), %ecx
	movq	%rax, 108(%rsp)
	movq	116(%rsp), %rdx
	movq	104(%rsp), %rdi
	movl	112(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	cvtsi2ssl	60(%rsp), %xmm0
	movq	96(%rsp), %rcx
	movl	%ebp, %r8d
	movq	88(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	72(%rsp), %rdi
	call	_Z34__device_stub__Z6hybridPfPlfPiS1_iPfPlfPiS1_i
.L37:
	movl	%r15d, 116(%rsp)
	movq	16(%rsp), %r8
	xorl	%r9d, %r9d
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 112(%rsp)
	movq	%rdi, 120(%rsp)
	movl	124(%rsp), %ecx
	movq	116(%rsp), %rdx
	movq	%rdi, 104(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	movq	96(%rsp), %rdx
	movq	80(%rsp), %rsi
	movl	%ebp, %ecx
	movq	72(%rsp), %rdi
	call	_Z41__device_stub__Z16hybrid_reductionPfPlPiiPfPlPii
.L38:
	movl	$124, %edi
	call	_Znam@PLT
	movq	72(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$2, %ecx
	movq	%rax, %r12
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movq	80(%rsp), %rsi
	movl	$2, %ecx
	movl	$8, %edx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movq	96(%rsp), %rsi
	movl	$2, %ecx
	movl	$124, %edx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$1000, %ecx
	leaq	.LC8(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	subq	%r14, %rax
	cqto
	idivq	%rcx
	movq	%rax, %r14
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%r14d, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	leaq	.LC9(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC10(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	24(%rsp), %rax
	cvtss2sd	(%rax), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC6(%rip), %r14
	movq	%rax, %rdi
	movq	%r14, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	0(%r13), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSo9_M_insertIlEERSoT_@PLT
	movq	%rax, %rdi
	movq	%r14, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	xorl	%r13d, %r13d
.L39:
	movl	(%r12,%r13,4), %esi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSolsEi@PLT
	incq	%r13
	cmpq	$31, %r13
	jne	.L39
	movq	%r14, %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	xorl	%r13d, %r13d
	xorl	%eax, %eax
.L40:
	cvtsi2ssl	(%r12,%rax), %xmm0
	mulss	124(%rbx,%rax), %xmm0
	addq	$4, %rax
	cvtsi2ssl	%r13d, %xmm1
	addss	%xmm1, %xmm0
	cvttss2sil	%xmm0, %r13d
	cmpq	$124, %rax
	jne	.L40
	leaq	_ZSt4cout(%rip), %r14
	leaq	.LC11(%rip), %rsi
	movq	%r14, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%r13d, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	leaq	.LC6(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	xorl	%eax, %eax
.L41:
	cvtsi2ssl	(%r12,%rax), %xmm0
	mulss	(%rbx,%rax), %xmm0
	addq	$4, %rax
	cvtsi2ssl	12(%rsp), %xmm1
	addss	%xmm1, %xmm0
	cvttss2sil	%xmm0, %ecx
	movl	%ecx, 12(%rsp)
	cmpq	$124, %rax
	jne	.L41
	leaq	.LC12(%rip), %rsi
	movq	%r14, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	12(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	leaq	.LC6(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	_ZL5coefs(%rip), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
.LEHE2:
	leaq	160(%rsp), %rdi
	call	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
	jmp	.L32
.L56:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	1576(%rsp), %rax
	subq	%fs:40, %rax
	je	.L46
	jmp	.L54
.L48:
	endbr64
	movq	%rax, %rbx
.L43:
	leaq	160(%rsp), %rdi
	call	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
	jmp	.L44
.L47:
	endbr64
	movq	%rax, %rbx
.L44:
	leaq	128(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	1576(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L54
	movq	%rbx, %rdi
.LEHB3:
	call	_Unwind_Resume@PLT
.LEHE3:
.L54:
	call	__stack_chk_fail@PLT
.L46:
	addq	$1592, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3793:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3793:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3793-.LLSDACSB3793
.LLSDACSB3793:
	.uleb128 .LEHB0-.LFB3793
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3793
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L47-.LFB3793
	.uleb128 0
	.uleb128 .LEHB2-.LFB3793
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L48-.LFB3793
	.uleb128 0
	.uleb128 .LEHB3-.LFB3793
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
.LLSDACSE3793:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL5coefs
	.comm	_ZL5coefs,252,32
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	0
	.long	1083179008
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include "hip/hip_runtime.h"
#include <chrono>
#include <iostream>
#include <sstream>

#define arraySize 31 // 35 max
#define def_div 10   // 5<=X<=15
//#define W 100
//#define threads_per_block 32
//#define max_blocks 32

using namespace std;

__constant__ float coefs[arraySize * 2 + 1];
__global__ void hybrid(float *sh_sum_dev, long int *str_num_dev,
                       float num_of_blocks, int *bdevX, int *global_mem_bin,
                       int threads_per_block) {
  float th_w_sum = 0;
  float th_v_sum = 0;
  int th_bin[arraySize];
  int best_bin[arraySize];
  extern __shared__ float sh_array[];
  float *sh_maxs = (float *)sh_array;
  int *indices = (int *)&sh_maxs[threads_per_block];
  int reached = 0;
  indices[threadIdx.x] = blockIdx.x * blockDim.x + threadIdx.x;
  __syncthreads();

  long signed int num_to_bin = blockIdx.x * blockDim.x + threadIdx.x;
// num_to_bin += max_blocks * n_of_it;
#pragma unroll
  for (uint i = 0; i < def_div; i++) {
    th_bin[i] = ((num_to_bin) >> i) % 2;
    th_w_sum += th_bin[i] * coefs[i];
    th_v_sum += th_bin[i] * coefs[i + arraySize];
    best_bin[i] = th_bin[i];
  }
#pragma unroll
  for (uint i = def_div; i < arraySize; i++) {
    th_bin[i] = -1;
  }
  int Capacity = coefs[arraySize * 2] - th_w_sum;
  sh_maxs[threadIdx.x] = (th_w_sum > coefs[arraySize * 2]) ? 0 : th_v_sum;
  __syncthreads();

  // H_S
  int h = def_div;
  long int ns = 0;
  bool forward;

  while (h - def_div != -1) {
    ns++;
    forward = true;
    if (th_bin[h] == -1) {
      th_bin[h] = 1;
    } else {
      if (th_bin[h] == 1) {
        th_bin[h] = 0;
      } else {
        if (th_bin[h] == 0) {
          th_bin[h] = -1;
          h--;
          forward = false;
        }
      }
    }
    if (h == arraySize - 1) {
      int cw = 0;
      int cp = 0;
#pragma unroll
      for (int i = def_div; i < arraySize; i++) {
        cp += coefs[i + arraySize] * th_bin[i];
        cw += coefs[i] * th_bin[i];
      }
      if ((cw <= Capacity) && (cp > reached)) {
        reached = cp;
#pragma unroll
        for (int i = def_div; i < arraySize; i++) {
          best_bin[i] = th_bin[i];
        }
      }
    } else {
      int cw = 0;
      for (int i = def_div; i < arraySize; i++) {
        cw += coefs[i] * th_bin[i];
      }
      if (cw > Capacity)
        forward = false;
      cw = 0;
      float cp = 0;
      int nw = 0;
      int np = 0;
#pragma unroll
      for (int i = def_div; i < arraySize; i++) {
        np = th_bin[i] != -1 ? th_bin[i] * coefs[i + arraySize]
                             : coefs[i + arraySize];
        nw = th_bin[i] != -1 ? th_bin[i] * coefs[i] : coefs[i];
        if (cw + nw <= Capacity) {
          cw += nw;
          cp += np;
        } else {
          cp += np * (Capacity - cw) / nw;
          break;
        }
      }
      int b = cp;
      if (b <= reached) {
        forward = false;
      }
    }
    if (forward) {
      if (h < arraySize - 1) {
        h++;
      }
    }
  }

  sh_maxs[threadIdx.x] += reached;

  __syncthreads();
  // reduction on block
  for (uint offset = blockDim.x >> 1; offset >= 1; offset >>= 1) {
    if (threadIdx.x < offset) {
      if (sh_maxs[threadIdx.x] < sh_maxs[threadIdx.x + offset]) {
        sh_maxs[threadIdx.x] = sh_maxs[threadIdx.x + offset];
        indices[threadIdx.x] = indices[threadIdx.x + offset];
      }
    }
    __syncthreads();
  }
  // write result for this block to global mem
  if (threadIdx.x == 0) {
    sh_sum_dev[blockIdx.x] = sh_maxs[0];
    str_num_dev[blockIdx.x] = indices[0];
  }
  if (blockIdx.x * blockDim.x + threadIdx.x == indices[0]) {
#pragma unroll
    for (int i = 0; i < arraySize; i++) {
      global_mem_bin[blockIdx.x * arraySize + i] = best_bin[i];
    }
  }
  __syncthreads();
}

__global__ void hybrid_reduction(float *s, long int *str_num_dev,
                                 int *global_mem_bin, int threads_per_block) {
  int ID = blockIdx.x * blockDim.x + threadIdx.x;
  extern __shared__ int sh_hy_data[];
  sh_hy_data[threadIdx.x] = s[ID];
  sh_hy_data[threadIdx.x + threads_per_block] = str_num_dev[ID];

  __syncthreads();
  // do reduction in shared mem
  for (uint s = blockDim.x >> 1; s > 0; s >>= 1) {
    if (threadIdx.x < s) {
      if (sh_hy_data[threadIdx.x] < sh_hy_data[threadIdx.x + s]) {
        sh_hy_data[threadIdx.x] = sh_hy_data[threadIdx.x + s];
        sh_hy_data[threadIdx.x + threads_per_block] =
            sh_hy_data[threadIdx.x + threads_per_block + s];
      }
    }
    __syncthreads();
  }
  // write result for this block to global mem
  if (threadIdx.x == 0) {
    // if(sh_hy_data[0]>s[0]){//}&&(blockIdx.x>0)){
    s[blockIdx.x] = sh_hy_data[0];
    str_num_dev[blockIdx.x] = sh_hy_data[threads_per_block];

#pragma unroll
    for (int i = 0; i < arraySize; i++) {
      global_mem_bin[i] =
          global_mem_bin[(sh_hy_data[threads_per_block] / threads_per_block) *
                             arraySize +
                         i];
    }
  }
}

__global__ void which_string(long int a, int *view_dev) {
  view_dev[threadIdx.x] = (a >> threadIdx.x) % 2;
}

void quickSortR(float *a, float *b, long N) {
  // На входе - массив a[], a[N] - его последний элемент.

  long i = 0, j = N; // поставить указатели на исходные места
  float temp, p;

  p = a[N >> 1]; // центральный элемент

  // процедура разделения
  do {
    while (a[i] > p)
      i++;
    while (a[j] < p)
      j--;

    if (i <= j) {
      temp = a[i];
      a[i] = a[j];
      a[j] = temp;
      temp = b[i];
      b[i] = b[j];
      b[j] = temp;
      temp = b[i + arraySize];
      b[i + arraySize] = b[j + arraySize];
      b[j + arraySize] = temp;
      i++;
      j--;
    }
  } while (i <= j);

  // рекурсивные вызовы, если есть, что сортировать
  if (j > 0)
    quickSortR(a, b, j);
  if (N > i)
    quickSortR(a + i, b + i, N - i);
}

int main() {
  hipDeviceProp_t deviceProp;
  hipGetDeviceProperties(&deviceProp, 0);
  int threads_per_block = deviceProp.warpSize;
  int max_blocks = pow(2, def_div) / threads_per_block;
  long int strSize_b = pow(2, arraySize);
  int num_of_blocks = strSize_b / threads_per_block;
  float *Sum = new float[32]; // = { 0 };
  float *sh_sum_dev;

  int iter = 0;

  string line;
  float v;
  float *dev_coefs = new float[arraySize * 2 + 1];
  while (getline(cin, line)) {
    istringstream iss(line);
    int q = 0;
    while (iss >> v) {
      dev_coefs[q] = v;
      q++;
    }
    cout<<"Iter = "<<iter<<"\n";iter++;
    for (int i = 0; i < arraySize * 2 + 1; i++) {
      cout << dev_coefs[i] << " ";
    }
    cout << "\n";
    // int W = int(dev_coefs[arraySize*2]);

    long int *str_num_dev;
    long int *str_num = new long int[1];

    float *additional_array = new float[arraySize];
    for (int i = 0; i < arraySize; i++) {
      additional_array[i] = dev_coefs[i + arraySize] / dev_coefs[i];
    }

    quickSortR(additional_array, dev_coefs, arraySize - 1);

    int *bdevX;
    hipMalloc((void **)&bdevX, arraySize * sizeof(int));
    int *global_mem_bin;
    hipMalloc((void **)&global_mem_bin, max_blocks * arraySize * sizeof(int));

    hipMalloc((void **)&sh_sum_dev, num_of_blocks * sizeof(float));
    hipMalloc((void **)&str_num_dev, num_of_blocks * sizeof(long));
    hipMemcpyToSymbol(HIP_SYMBOL(coefs), dev_coefs, (2 * arraySize + 1) * sizeof(float));

    std::chrono::time_point<std::chrono::high_resolution_clock> start, end;
    start = std::chrono::high_resolution_clock::now();



    hybrid<<<max_blocks, threads_per_block,
             threads_per_block * 3 * sizeof(int)>>>(
        sh_sum_dev, str_num_dev, num_of_blocks, bdevX, global_mem_bin,
        threads_per_block);

    hybrid_reduction<<<1, max_blocks, threads_per_block * 3 * sizeof(int)>>>(
        sh_sum_dev, str_num_dev, global_mem_bin, threads_per_block);

    int *suda = new int[arraySize];
    hipMemcpy(Sum, sh_sum_dev, sizeof(int), hipMemcpyDeviceToHost);
    hipMemcpy(str_num, str_num_dev, sizeof(long int), hipMemcpyDeviceToHost);
    hipMemcpy(suda, global_mem_bin, arraySize * sizeof(int),
               hipMemcpyDeviceToHost);

    end = std::chrono::high_resolution_clock::now();

    int elapsed_seconds =
        std::chrono::duration_cast<std::chrono::microseconds>(end - start)
            .count();
    std::time_t end_time = std::chrono::system_clock::to_time_t(end);

    std::cout << "Время выполнения: " << elapsed_seconds << "microseconds\n";
    cout << "Acheived maximal sum = " << Sum[0] << "\n";
    cout << str_num[0] << "\n";
    for (int i = 0; i < arraySize; i++) {
      cout << suda[i];
    }
    cout << "\n";

    // check
    int checksum = 0;
    for (int i = 0; i < arraySize; i++) {
      checksum += dev_coefs[i + arraySize] * suda[i];
    }
    cout << "Validation sum = " << checksum << "\n";
    checksum = 0;
    for (int i = 0; i < arraySize; i++) {
      checksum += dev_coefs[i] * suda[i];
    }
    cout << "Weight = " << checksum << "\n";

    hipFree(coefs);
    hipFree(sh_sum_dev);
    hipFree(str_num_dev);
    hipFree(bdevX);
    hipFree(global_mem_bin);
/*
    delete[] Sum;
    delete[] suda;
    delete[] str_num;
    delete[] dev_coefs;
    delete[] additional_array;
*/
    //cudaDeviceReset();
  }
  return 0;
}

	.text
	.file	"Hybrid-Horviz.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__hybridPfPlfPiS1_i # -- Begin function _Z21__device_stub__hybridPfPlfPiS1_i
	.type	_Z21__device_stub__hybridPfPlfPiS1_i,@function
_Z21__device_stub__hybridPfPlfPiS1_i:   # @_Z21__device_stub__hybridPfPlfPiS1_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movss	%xmm0, (%rsi)
	leaq	40(%rsp), %r9
	movq	%rdx, (%r9)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%r9, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%rcx, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6hybridPfPlfPiS1_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__hybridPfPlfPiS1_i, .Lfunc_end0-_Z21__device_stub__hybridPfPlfPiS1_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__hybrid_reductionPfPlPii # -- Begin function _Z31__device_stub__hybrid_reductionPfPlPii
	.type	_Z31__device_stub__hybrid_reductionPfPlPii,@function
_Z31__device_stub__hybrid_reductionPfPlPii: # @_Z31__device_stub__hybrid_reductionPfPlPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16hybrid_reductionPfPlPii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__hybrid_reductionPfPlPii, .Lfunc_end1-_Z31__device_stub__hybrid_reductionPfPlPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__which_stringlPi # -- Begin function _Z27__device_stub__which_stringlPi
	.type	_Z27__device_stub__which_stringlPi,@function
_Z27__device_stub__which_stringlPi:     # @_Z27__device_stub__which_stringlPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12which_stringlPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z27__device_stub__which_stringlPi, .Lfunc_end2-_Z27__device_stub__which_stringlPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z10quickSortRPfS_l             # -- Begin function _Z10quickSortRPfS_l
	.type	_Z10quickSortRPfS_l,@function
_Z10quickSortRPfS_l:                    # @_Z10quickSortRPfS_l
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
.LBB3_1:                                # %tailrecurse
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
                                        #       Child Loop BB3_3 Depth 3
                                        #       Child Loop BB3_5 Depth 3
	movq	%rbx, %rax
	andq	$-2, %rax
	movss	(%r15,%rax,2), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movq	%rbx, %rdx
	xorl	%r12d, %r12d
.LBB3_2:                                #   Parent Loop BB3_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_3 Depth 3
                                        #       Child Loop BB3_5 Depth 3
	decq	%r12
	movq	%r12, %rax
.LBB3_3:                                #   Parent Loop BB3_1 Depth=1
                                        #     Parent Loop BB3_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	4(%r15,%rax,4), %xmm1           # xmm1 = mem[0],zero,zero,zero
	incq	%rax
	ucomiss	%xmm0, %xmm1
	ja	.LBB3_3
# %bb.4:                                # %.preheader
                                        #   in Loop: Header=BB3_2 Depth=2
	leaq	1(%rax), %r12
	leaq	1(%rdx), %rcx
.LBB3_5:                                #   Parent Loop BB3_1 Depth=1
                                        #     Parent Loop BB3_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	-4(%r15,%rcx,4), %xmm2          # xmm2 = mem[0],zero,zero,zero
	decq	%rdx
	decq	%rcx
	ucomiss	%xmm2, %xmm0
	ja	.LBB3_5
# %bb.6:                                #   in Loop: Header=BB3_2 Depth=2
	cmpq	%rcx, %rax
	jle	.LBB3_8
# %bb.7:                                #   in Loop: Header=BB3_2 Depth=2
	movq	%rcx, %rdx
	movq	%rax, %r12
	jmp	.LBB3_9
.LBB3_8:                                #   in Loop: Header=BB3_2 Depth=2
	movss	%xmm2, (%r15,%rax,4)
	movss	%xmm1, (%r15,%rcx,4)
	movss	(%r14,%rax,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	movss	(%r14,%rcx,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	movss	%xmm2, (%r14,%rax,4)
	movss	%xmm1, (%r14,%rcx,4)
	movss	124(%r14,%rax,4), %xmm1         # xmm1 = mem[0],zero,zero,zero
	movss	124(%r14,%rcx,4), %xmm2         # xmm2 = mem[0],zero,zero,zero
	movss	%xmm2, 124(%r14,%rax,4)
	movss	%xmm1, 124(%r14,%rcx,4)
.LBB3_9:                                #   in Loop: Header=BB3_2 Depth=2
	cmpq	%rdx, %r12
	jle	.LBB3_2
# %bb.10:                               #   in Loop: Header=BB3_1 Depth=1
	testq	%rdx, %rdx
	jle	.LBB3_12
# %bb.11:                               #   in Loop: Header=BB3_1 Depth=1
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_Z10quickSortRPfS_l
.LBB3_12:                               #   in Loop: Header=BB3_1 Depth=1
	subq	%r12, %rbx
	jle	.LBB3_14
# %bb.13:                               #   in Loop: Header=BB3_1 Depth=1
	leaq	(%r15,%r12,4), %r15
	leaq	(%r14,%r12,4), %r14
	jmp	.LBB3_1
.LBB3_14:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z10quickSortRPfS_l, .Lfunc_end3-_Z10quickSortRPfS_l
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI4_0:
	.quad	0x4090000000000000              # double 1024
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$2008, %rsp                     # imm = 0x7D8
	.cfi_def_cfa_offset 2064
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	536(%rsp), %rbx
	xorl	%r14d, %r14d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	movslq	308(%rbx), %rbx
	movl	$128, %edi
	callq	_Znam
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	leaq	136(%rsp), %rax
	movq	%rax, -16(%rax)
	movq	$0, -8(%rax)
	movb	$0, (%rax)
.Ltmp0:
	movl	$252, %edi
	callq	_Znam
.Ltmp1:
# %bb.1:                                # %.preheader157
	movq	%rax, %r13
	movl	$2147483648, %eax               # imm = 0x80000000
	xorl	%edx, %edx
	idivq	%rbx
	cvtsi2sd	%ebx, %xmm0
	movsd	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %edx
	movl	%edx, %ecx
	shll	$5, %ecx
	subl	%edx, %ecx
	movslq	%ecx, %rcx
	shlq	$2, %rcx
	movq	%rcx, 104(%rsp)                 # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, 32(%rsp)                 # 4-byte Spill
	shlq	$32, %rax
	movq	%rax, %rcx
	sarq	$30, %rcx
	movq	%rcx, 96(%rsp)                  # 8-byte Spill
	sarq	$29, %rax
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	leaq	(,%rbx,4), %rax
	leaq	(%rax,%rax,2), %rax
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	btsq	$32, %rdx
	movq	%rdx, 64(%rsp)                  # 8-byte Spill
	movq	%rbx, 40(%rsp)                  # 8-byte Spill
	movl	%ebx, %eax
	btsq	$32, %rax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	leaq	152(%rsp), %r15
.LBB4_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_7 Depth 2
                                        #     Child Loop BB4_18 Depth 2
                                        #     Child Loop BB4_25 Depth 2
                                        #     Child Loop BB4_50 Depth 2
                                        #     Child Loop BB4_54 Depth 2
                                        #     Child Loop BB4_59 Depth 2
	movq	_ZSt3cin(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt3cin, %eax
	addq	%rax, %rdi
.Ltmp3:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp4:
# %bb.3:                                # %.noexc
                                        #   in Loop: Header=BB4_2 Depth=1
.Ltmp5:
	movsbl	%al, %edx
	movl	$_ZSt3cin, %edi
	leaq	120(%rsp), %rsi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp6:
# %bb.4:                                #   in Loop: Header=BB4_2 Depth=1
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	testb	$5, 32(%rax,%rcx)
	jne	.LBB4_78
# %bb.5:                                #   in Loop: Header=BB4_2 Depth=1
.Ltmp8:
	movq	%r15, %rdi
	leaq	120(%rsp), %rsi
	movl	$8, %edx
	callq	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEC1ERKNS_12basic_stringIcS2_S3_EESt13_Ios_Openmode
.Ltmp9:
# %bb.6:                                # %.preheader156.preheader
                                        #   in Loop: Header=BB4_2 Depth=1
	movq	%r13, %rbx
.LBB4_7:                                # %.preheader156
                                        #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
.Ltmp11:
	movq	%r15, %rdi
	leaq	36(%rsp), %rsi
	callq	_ZNSi10_M_extractIfEERSiRT_
.Ltmp12:
# %bb.8:                                #   in Loop: Header=BB4_7 Depth=2
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	testb	$5, 32(%rax,%rcx)
	jne	.LBB4_14
# %bb.9:                                #   in Loop: Header=BB4_7 Depth=2
	movss	36(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rbx)
	addq	$4, %rbx
	jmp	.LBB4_7
.LBB4_14:                               #   in Loop: Header=BB4_2 Depth=1
.Ltmp14:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp15:
# %bb.15:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
                                        #   in Loop: Header=BB4_2 Depth=1
.Ltmp16:
	movl	$_ZSt4cout, %edi
	movl	%r14d, %esi
	callq	_ZNSolsEi
.Ltmp17:
# %bb.16:                               #   in Loop: Header=BB4_2 Depth=1
.Ltmp18:
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp19:
# %bb.17:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit108
                                        #   in Loop: Header=BB4_2 Depth=1
	incl	%r14d
	xorl	%ebx, %ebx
.LBB4_18:                               #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13,%rbx,4), %xmm0
.Ltmp20:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp21:
# %bb.19:                               # %_ZNSolsEf.exit
                                        #   in Loop: Header=BB4_18 Depth=2
.Ltmp22:
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp23:
# %bb.20:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit113
                                        #   in Loop: Header=BB4_18 Depth=2
	incq	%rbx
	cmpq	$63, %rbx
	jne	.LBB4_18
# %bb.21:                               #   in Loop: Header=BB4_2 Depth=1
.Ltmp25:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp26:
# %bb.22:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit110
                                        #   in Loop: Header=BB4_2 Depth=1
.Ltmp28:
	movl	$8, %edi
	callq	_Znam
.Ltmp29:
# %bb.23:                               #   in Loop: Header=BB4_2 Depth=1
.Ltmp31:
	movq	%rax, %r12
	movl	$124, %edi
	callq	_Znam
.Ltmp32:
# %bb.24:                               # %.preheader.preheader
                                        #   in Loop: Header=BB4_2 Depth=1
	xorl	%ecx, %ecx
.LBB4_25:                               # %.preheader
                                        #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	124(%r13,%rcx,4), %xmm0         # xmm0 = mem[0],zero,zero,zero
	divss	(%r13,%rcx,4), %xmm0
	movss	%xmm0, (%rax,%rcx,4)
	incq	%rcx
	cmpq	$31, %rcx
	jne	.LBB4_25
# %bb.26:                               #   in Loop: Header=BB4_2 Depth=1
	movl	$30, %edx
	movq	%rax, %rdi
	movq	%r13, %rsi
	callq	_Z10quickSortRPfS_l
.Ltmp34:
	movl	$124, %esi
	leaq	72(%rsp), %rdi
	callq	hipMalloc
.Ltmp35:
# %bb.27:                               #   in Loop: Header=BB4_2 Depth=1
.Ltmp37:
	movq	%r14, 112(%rsp)                 # 8-byte Spill
	leaq	8(%rsp), %rdi
	movq	104(%rsp), %rsi                 # 8-byte Reload
	callq	hipMalloc
.Ltmp38:
# %bb.28:                               #   in Loop: Header=BB4_2 Depth=1
.Ltmp39:
	leaq	24(%rsp), %rdi
	movq	96(%rsp), %rsi                  # 8-byte Reload
	callq	hipMalloc
.Ltmp40:
# %bb.29:                               #   in Loop: Header=BB4_2 Depth=1
.Ltmp41:
	leaq	16(%rsp), %rdi
	movq	88(%rsp), %rsi                  # 8-byte Reload
	callq	hipMalloc
.Ltmp42:
# %bb.30:                               #   in Loop: Header=BB4_2 Depth=1
.Ltmp43:
	movl	$coefs, %edi
	movl	$252, %edx
	movq	%r13, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
.Ltmp44:
# %bb.31:                               # %_Z17hipMemcpyToSymbolIA63_fE10hipError_tRKT_PKvmm13hipMemcpyKind.exit
                                        #   in Loop: Header=BB4_2 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r14
.Ltmp46:
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	80(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	movq	56(%rsp), %r8                   # 8-byte Reload
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp47:
# %bb.32:                               #   in Loop: Header=BB4_2 Depth=1
	testl	%eax, %eax
	jne	.LBB4_34
# %bb.33:                               #   in Loop: Header=BB4_2 Depth=1
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	72(%rsp), %rdx
	movq	8(%rsp), %rcx
.Ltmp48:
	movss	32(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	40(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	callq	_Z21__device_stub__hybridPfPlfPiS1_i
.Ltmp49:
.LBB4_34:                               #   in Loop: Header=BB4_2 Depth=1
.Ltmp50:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	movq	56(%rsp), %r8                   # 8-byte Reload
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp51:
# %bb.35:                               #   in Loop: Header=BB4_2 Depth=1
	testl	%eax, %eax
	jne	.LBB4_37
# %bb.36:                               #   in Loop: Header=BB4_2 Depth=1
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
.Ltmp52:
	movq	40(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z31__device_stub__hybrid_reductionPfPlPii
.Ltmp53:
.LBB4_37:                               #   in Loop: Header=BB4_2 Depth=1
.Ltmp55:
	movl	$124, %edi
	callq	_Znam
.Ltmp56:
# %bb.38:                               #   in Loop: Header=BB4_2 Depth=1
	movq	%rax, %rbp
	movq	24(%rsp), %rsi
.Ltmp57:
	movl	$4, %edx
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp58:
# %bb.39:                               #   in Loop: Header=BB4_2 Depth=1
	movq	16(%rsp), %rsi
.Ltmp59:
	movl	$8, %edx
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp60:
# %bb.40:                               #   in Loop: Header=BB4_2 Depth=1
	movq	8(%rsp), %rsi
.Ltmp61:
	movl	$124, %edx
	movq	%rbp, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp62:
# %bb.41:                               #   in Loop: Header=BB4_2 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %rbx
.Ltmp64:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp65:
# %bb.42:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit117
                                        #   in Loop: Header=BB4_2 Depth=1
	subq	%r14, %rbx
	movq	%rbx, %rax
	movabsq	$2361183241434822607, %rcx      # imm = 0x20C49BA5E353F7CF
	imulq	%rcx
	movq	%rdx, %rsi
	shrq	$63, %rsi
	shrq	$7, %rdx
	addl	%edx, %esi
.Ltmp66:
	movl	$_ZSt4cout, %edi
                                        # kill: def $esi killed $esi killed $rsi
	callq	_ZNSolsEi
.Ltmp67:
# %bb.43:                               #   in Loop: Header=BB4_2 Depth=1
.Ltmp68:
	movl	$.L.str.4, %esi
	movl	$13, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp69:
# %bb.44:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit119
                                        #   in Loop: Header=BB4_2 Depth=1
.Ltmp70:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp71:
# %bb.45:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit121
                                        #   in Loop: Header=BB4_2 Depth=1
	movq	48(%rsp), %rax                  # 8-byte Reload
	cvtss2sd	(%rax), %xmm0
.Ltmp72:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp73:
# %bb.46:                               # %_ZNSolsEf.exit123
                                        #   in Loop: Header=BB4_2 Depth=1
.Ltmp74:
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp75:
# %bb.47:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit125
                                        #   in Loop: Header=BB4_2 Depth=1
	movq	(%r12), %rsi
.Ltmp76:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIlEERSoT_
.Ltmp77:
# %bb.48:                               # %_ZNSolsEl.exit
                                        #   in Loop: Header=BB4_2 Depth=1
.Ltmp78:
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp79:
# %bb.49:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit128.preheader.preheader
                                        #   in Loop: Header=BB4_2 Depth=1
	xorl	%ebx, %ebx
.LBB4_50:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit128.preheader
                                        #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbp,%rbx,4), %esi
.Ltmp80:
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
.Ltmp81:
# %bb.51:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit128
                                        #   in Loop: Header=BB4_50 Depth=2
	incq	%rbx
	cmpq	$31, %rbx
	jne	.LBB4_50
# %bb.52:                               #   in Loop: Header=BB4_2 Depth=1
.Ltmp83:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp84:
# %bb.53:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit130.preheader
                                        #   in Loop: Header=BB4_2 Depth=1
	xorl	%eax, %eax
	xorl	%ebx, %ebx
.LBB4_54:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit130
                                        #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtsi2ssl	(%rbp,%rax,4), %xmm0
	mulss	124(%r13,%rax,4), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2ss	%ebx, %xmm1
	addss	%xmm0, %xmm1
	cvttss2si	%xmm1, %ebx
	incq	%rax
	cmpq	$31, %rax
	jne	.LBB4_54
# %bb.55:                               #   in Loop: Header=BB4_2 Depth=1
.Ltmp86:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp87:
	movq	112(%rsp), %r14                 # 8-byte Reload
# %bb.56:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit132
                                        #   in Loop: Header=BB4_2 Depth=1
.Ltmp88:
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
.Ltmp89:
# %bb.57:                               #   in Loop: Header=BB4_2 Depth=1
.Ltmp90:
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp91:
# %bb.58:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit134.preheader
                                        #   in Loop: Header=BB4_2 Depth=1
	xorl	%eax, %eax
	xorl	%ebx, %ebx
.LBB4_59:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit134
                                        #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtsi2ssl	(%rbp,%rax,4), %xmm0
	mulss	(%r13,%rax,4), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2ss	%ebx, %xmm1
	addss	%xmm0, %xmm1
	cvttss2si	%xmm1, %ebx
	incq	%rax
	cmpq	$31, %rax
	jne	.LBB4_59
# %bb.60:                               #   in Loop: Header=BB4_2 Depth=1
.Ltmp92:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$9, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp93:
# %bb.61:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit136
                                        #   in Loop: Header=BB4_2 Depth=1
.Ltmp94:
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
.Ltmp95:
# %bb.62:                               #   in Loop: Header=BB4_2 Depth=1
.Ltmp96:
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp97:
# %bb.63:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit138
                                        #   in Loop: Header=BB4_2 Depth=1
.Ltmp98:
	movl	$coefs, %edi
	callq	hipFree
.Ltmp99:
# %bb.64:                               #   in Loop: Header=BB4_2 Depth=1
	movq	24(%rsp), %rdi
.Ltmp100:
	callq	hipFree
.Ltmp101:
# %bb.65:                               #   in Loop: Header=BB4_2 Depth=1
	movq	16(%rsp), %rdi
.Ltmp102:
	callq	hipFree
.Ltmp103:
# %bb.66:                               #   in Loop: Header=BB4_2 Depth=1
	movq	72(%rsp), %rdi
.Ltmp104:
	callq	hipFree
.Ltmp105:
# %bb.67:                               #   in Loop: Header=BB4_2 Depth=1
	movq	8(%rsp), %rdi
.Ltmp106:
	callq	hipFree
.Ltmp107:
# %bb.68:                               #   in Loop: Header=BB4_2 Depth=1
	movl	$_ZTTNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEE, %esi
	movq	%r15, %rdi
	callq	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED2Ev
	leaq	272(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	jmp	.LBB4_2
.LBB4_78:
	movq	120(%rsp), %rdi
	leaq	136(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB4_80
# %bb.79:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB4_80:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	xorl	%eax, %eax
	addq	$2008, %rsp                     # imm = 0x7D8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_10:                               # %.loopexit.split-lp159
	.cfi_def_cfa_offset 2064
.Ltmp2:
	jmp	.LBB4_82
.LBB4_71:
.Ltmp36:
	jmp	.LBB4_77
.LBB4_70:
.Ltmp33:
	jmp	.LBB4_77
.LBB4_69:
.Ltmp30:
	jmp	.LBB4_77
.LBB4_11:
.Ltmp10:
	jmp	.LBB4_82
.LBB4_81:                               # %.loopexit158
.Ltmp7:
.LBB4_82:
	movq	%rax, %rbx
	jmp	.LBB4_83
.LBB4_72:
.Ltmp54:
	jmp	.LBB4_77
.LBB4_73:
.Ltmp63:
	jmp	.LBB4_77
.LBB4_76:
.Ltmp45:
	jmp	.LBB4_77
.LBB4_13:                               # %.loopexit.split-lp
.Ltmp27:
	jmp	.LBB4_77
.LBB4_74:
.Ltmp85:
	jmp	.LBB4_77
.LBB4_87:
.Ltmp108:
	jmp	.LBB4_77
.LBB4_75:
.Ltmp82:
	jmp	.LBB4_77
.LBB4_12:                               # %.loopexit
.Ltmp13:
	jmp	.LBB4_77
.LBB4_86:
.Ltmp24:
.LBB4_77:
	movq	%rax, %rbx
	leaq	152(%rsp), %rdi
	movl	$_ZTTNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEE, %esi
	callq	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED2Ev
	leaq	272(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
.LBB4_83:
	movq	120(%rsp), %rdi
	leaq	136(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB4_85
# %bb.84:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i139
	callq	_ZdlPv
.LBB4_85:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit141
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table4:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp6-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp6
	.uleb128 .Ltmp7-.Lfunc_begin0           #     jumps to .Ltmp7
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp8-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp9-.Ltmp8                  #   Call between .Ltmp8 and .Ltmp9
	.uleb128 .Ltmp10-.Lfunc_begin0          #     jumps to .Ltmp10
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp11-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp12-.Ltmp11                #   Call between .Ltmp11 and .Ltmp12
	.uleb128 .Ltmp13-.Lfunc_begin0          #     jumps to .Ltmp13
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp14-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp19-.Ltmp14                #   Call between .Ltmp14 and .Ltmp19
	.uleb128 .Ltmp27-.Lfunc_begin0          #     jumps to .Ltmp27
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp20-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp23-.Ltmp20                #   Call between .Ltmp20 and .Ltmp23
	.uleb128 .Ltmp24-.Lfunc_begin0          #     jumps to .Ltmp24
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp25-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp26-.Ltmp25                #   Call between .Ltmp25 and .Ltmp26
	.uleb128 .Ltmp27-.Lfunc_begin0          #     jumps to .Ltmp27
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp28-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp29-.Ltmp28                #   Call between .Ltmp28 and .Ltmp29
	.uleb128 .Ltmp30-.Lfunc_begin0          #     jumps to .Ltmp30
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp31-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp32-.Ltmp31                #   Call between .Ltmp31 and .Ltmp32
	.uleb128 .Ltmp33-.Lfunc_begin0          #     jumps to .Ltmp33
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp34-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Ltmp35-.Ltmp34                #   Call between .Ltmp34 and .Ltmp35
	.uleb128 .Ltmp36-.Lfunc_begin0          #     jumps to .Ltmp36
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp37-.Lfunc_begin0          # >> Call Site 12 <<
	.uleb128 .Ltmp44-.Ltmp37                #   Call between .Ltmp37 and .Ltmp44
	.uleb128 .Ltmp45-.Lfunc_begin0          #     jumps to .Ltmp45
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp46-.Lfunc_begin0          # >> Call Site 13 <<
	.uleb128 .Ltmp53-.Ltmp46                #   Call between .Ltmp46 and .Ltmp53
	.uleb128 .Ltmp54-.Lfunc_begin0          #     jumps to .Ltmp54
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp55-.Lfunc_begin0          # >> Call Site 14 <<
	.uleb128 .Ltmp62-.Ltmp55                #   Call between .Ltmp55 and .Ltmp62
	.uleb128 .Ltmp63-.Lfunc_begin0          #     jumps to .Ltmp63
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp64-.Lfunc_begin0          # >> Call Site 15 <<
	.uleb128 .Ltmp79-.Ltmp64                #   Call between .Ltmp64 and .Ltmp79
	.uleb128 .Ltmp85-.Lfunc_begin0          #     jumps to .Ltmp85
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp80-.Lfunc_begin0          # >> Call Site 16 <<
	.uleb128 .Ltmp81-.Ltmp80                #   Call between .Ltmp80 and .Ltmp81
	.uleb128 .Ltmp82-.Lfunc_begin0          #     jumps to .Ltmp82
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp83-.Lfunc_begin0          # >> Call Site 17 <<
	.uleb128 .Ltmp84-.Ltmp83                #   Call between .Ltmp83 and .Ltmp84
	.uleb128 .Ltmp85-.Lfunc_begin0          #     jumps to .Ltmp85
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp86-.Lfunc_begin0          # >> Call Site 18 <<
	.uleb128 .Ltmp107-.Ltmp86               #   Call between .Ltmp86 and .Ltmp107
	.uleb128 .Ltmp108-.Lfunc_begin0         #     jumps to .Ltmp108
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp107-.Lfunc_begin0         # >> Call Site 19 <<
	.uleb128 .Lfunc_end4-.Ltmp107           #   Call between .Ltmp107 and .Lfunc_end4
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6hybridPfPlfPiS1_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16hybrid_reductionPfPlPii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12which_stringlPi, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$coefs, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movl	$252, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	coefs,@object                   # @coefs
	.local	coefs
	.comm	coefs,252,16
	.type	_Z6hybridPfPlfPiS1_i,@object    # @_Z6hybridPfPlfPiS1_i
	.section	.rodata,"a",@progbits
	.globl	_Z6hybridPfPlfPiS1_i
	.p2align	3, 0x0
_Z6hybridPfPlfPiS1_i:
	.quad	_Z21__device_stub__hybridPfPlfPiS1_i
	.size	_Z6hybridPfPlfPiS1_i, 8

	.type	_Z16hybrid_reductionPfPlPii,@object # @_Z16hybrid_reductionPfPlPii
	.globl	_Z16hybrid_reductionPfPlPii
	.p2align	3, 0x0
_Z16hybrid_reductionPfPlPii:
	.quad	_Z31__device_stub__hybrid_reductionPfPlPii
	.size	_Z16hybrid_reductionPfPlPii, 8

	.type	_Z12which_stringlPi,@object     # @_Z12which_stringlPi
	.globl	_Z12which_stringlPi
	.p2align	3, 0x0
_Z12which_stringlPi:
	.quad	_Z27__device_stub__which_stringlPi
	.size	_Z12which_stringlPi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Iter = "
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\n"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" "
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\320\222\321\200\320\265\320\274\321\217 \320\262\321\213\320\277\320\276\320\273\320\275\320\265\320\275\320\270\321\217: "
	.size	.L.str.3, 34

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"microseconds\n"
	.size	.L.str.4, 14

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Acheived maximal sum = "
	.size	.L.str.5, 24

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Validation sum = "
	.size	.L.str.6, 18

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Weight = "
	.size	.L.str.7, 10

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6hybridPfPlfPiS1_i"
	.size	.L__unnamed_1, 21

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z16hybrid_reductionPfPlPii"
	.size	.L__unnamed_2, 28

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z12which_stringlPi"
	.size	.L__unnamed_3, 20

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"coefs"
	.size	.L__unnamed_4, 6

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__hybridPfPlfPiS1_i
	.addrsig_sym _Z31__device_stub__hybrid_reductionPfPlPii
	.addrsig_sym _Z27__device_stub__which_stringlPi
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym coefs
	.addrsig_sym _Z6hybridPfPlfPiS1_i
	.addrsig_sym _Z16hybrid_reductionPfPlPii
	.addrsig_sym _Z12which_stringlPi
	.addrsig_sym _ZSt3cin
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6hybridPfPlfPiS1_i    ; -- Begin function _Z6hybridPfPlfPiS1_i
	.globl	_Z6hybridPfPlfPiS1_i
	.p2align	8
	.type	_Z6hybridPfPlfPiS1_i,@function
_Z6hybridPfPlfPiS1_i:                   ; @_Z6hybridPfPlfPiS1_i
; %bb.0:                                ; %.preheader158
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x3c
	s_load_b32 s80, s[0:1], 0x28
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, coefs@rel32@lo+4
	s_addc_u32 s9, s9, coefs@rel32@hi+12
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, coefs@rel32@lo+68
	s_addc_u32 s7, s7, coefs@rel32@hi+76
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, coefs@rel32@lo+132
	s_addc_u32 s3, s3, coefs@rel32@hi+140
	s_getpc_b64 s[10:11]
	s_add_u32 s10, s10, coefs@rel32@lo+196
	s_addc_u32 s11, s11, coefs@rel32@hi+204
	s_getpc_b64 s[28:29]
	s_add_u32 s28, s28, coefs@rel32@lo+228
	s_addc_u32 s29, s29, coefs@rel32@hi+236
	s_getpc_b64 s[76:77]
	s_add_u32 s76, s76, coefs@rel32@lo+244
	s_addc_u32 s77, s77, coefs@rel32@hi+252
	s_mov_b32 s34, s15
	s_clause 0x1
	s_load_b512 s[12:27], s[8:9], 0x0
	s_load_b512 s[36:51], s[6:7], 0x0
	v_dual_mov_b32 v3, -1 :: v_dual_mov_b32 v56, 0
	s_clause 0x2
	s_load_b512 s[52:67], s[2:3], 0x0
	s_load_b128 s[28:31], s[28:29], 0x0
	s_load_b128 s[76:79], s[76:77], 0x0
	s_mov_b32 s4, -1
	s_load_b256 s[68:75], s[10:11], 0x0
	s_mov_b32 s7, s4
	s_mov_b32 s6, s4
	v_add_nc_u32_e64 v55, 16, 40
	s_waitcnt lgkmcnt(0)
	s_and_b32 s35, s5, 0xffff
	s_lshl_b32 s2, s80, 2
	v_mad_u64_u32 v[33:34], null, s34, s35, v[0:1]
	v_dual_mov_b32 v18, v3 :: v_dual_lshlrev_b32 v1, 2, v0
	s_mov_b32 s5, s4
	v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6
	v_dual_mov_b32 v14, s5 :: v_dual_mov_b32 v13, s4
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_dual_mov_b32 v4, v3 :: v_dual_and_b32 v5, 1, v33
	v_bfe_u32 v6, v33, 1, 1
	v_bfe_u32 v7, v33, 2, 1
	v_bfe_u32 v8, v33, 3, 1
	v_cvt_f32_ubyte0_e32 v2, v5
	v_bfe_u32 v10, v33, 5, 1
	v_cvt_f32_ubyte0_e32 v9, v6
	v_bfe_u32 v12, v33, 7, 1
	v_cvt_f32_ubyte0_e32 v11, v8
	v_fma_f32 v20, s12, v2, 0
	v_mov_b32_e32 v17, v3
	v_fma_f32 v21, s51, v2, 0
	v_cvt_f32_ubyte0_e32 v2, v7
	s_add_i32 s51, s2, 0
	v_dual_fmac_f32 v20, s13, v9 :: v_dual_mov_b32 v19, v3
	v_cvt_f32_ubyte0_e32 v22, v10
	v_dual_mov_b32 v59, 10 :: v_dual_mov_b32 v60, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v20, s14, v2 :: v_dual_fmac_f32 v21, s52, v9
	v_bfe_u32 v9, v33, 4, 1
	s_mov_b32 s33, 0
	v_add_nc_u32_e32 v58, s51, v1
	v_dual_fmac_f32 v20, s15, v11 :: v_dual_fmac_f32 v21, s53, v2
	s_delay_alu instid0(VALU_DEP_3)
	v_cvt_f32_ubyte0_e32 v2, v9
	v_add_nc_u32_e32 v57, 0, v1
	v_bfe_u32 v1, v33, 8, 1
	ds_store_b32 v58, v33
	s_waitcnt lgkmcnt(0)
	v_dual_fmac_f32 v20, s16, v2 :: v_dual_fmac_f32 v21, s54, v11
	v_bfe_u32 v11, v33, 6, 1
	v_cvt_f32_ubyte0_e32 v23, v1
	s_barrier
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v20, s17, v22
	v_fmac_f32_e32 v21, s55, v2
	v_cvt_f32_ubyte0_e32 v2, v11
	buffer_gl0_inv
	s_clause 0x3
	scratch_store_b128 off, v[13:16], off offset:80
	scratch_store_b128 off, v[13:16], off offset:96
	scratch_store_b128 off, v[13:16], off offset:112
	scratch_store_b96 off, v[17:19], off offset:128
	v_fmac_f32_e32 v21, s56, v22
	v_cvt_f32_ubyte0_e32 v22, v12
	s_clause 0x1
	scratch_store_b128 off, v[5:8], off offset:16
	scratch_store_b128 off, v[9:12], off offset:32
                                        ; implicit-def: $vgpr44
                                        ; implicit-def: $vgpr45
                                        ; implicit-def: $vgpr46
                                        ; implicit-def: $vgpr47
                                        ; implicit-def: $vgpr48
                                        ; implicit-def: $vgpr49
                                        ; implicit-def: $vgpr50
                                        ; implicit-def: $vgpr51
                                        ; implicit-def: $vgpr52
                                        ; implicit-def: $vgpr53
                                        ; implicit-def: $vgpr54
                                        ; implicit-def: $vgpr43
                                        ; implicit-def: $vgpr42
                                        ; implicit-def: $vgpr41
                                        ; implicit-def: $vgpr40
                                        ; implicit-def: $vgpr39
                                        ; implicit-def: $vgpr38
                                        ; implicit-def: $vgpr37
                                        ; implicit-def: $vgpr36
                                        ; implicit-def: $vgpr35
                                        ; implicit-def: $vgpr34
	v_mov_b32_e32 v61, 0
	v_fmac_f32_e32 v21, s57, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v21, s58, v22
	v_fmac_f32_e32 v20, s18, v2
	v_bfe_u32 v2, v33, 9, 1
	s_clause 0x1
	scratch_store_b128 off, v[1:4], off offset:48
	scratch_store_b128 off, v[13:16], off offset:64
	v_dual_fmac_f32 v21, s59, v23 :: v_dual_fmac_f32 v20, s19, v22
	v_cvt_f32_ubyte0_e32 v22, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v20, s20, v23 :: v_dual_fmac_f32 v21, s60, v22
	v_fmac_f32_e32 v20, s21, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_nlt_f32_e32 vcc_lo, s78, v20
	v_dual_sub_f32 v17, s78, v20 :: v_dual_cndmask_b32 v18, 0, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f32_e32 v4, v17
	ds_store_b32 v57, v18
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB0_1:                                ; %NodeBlock253
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_15 Depth 2
	v_lshl_add_u32 v13, v59, 2, 16
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $sgpr20
	scratch_load_b32 v14, v13, off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 -1, v14
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB0_9
; %bb.2:                                ; %NodeBlock
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $sgpr3
	v_cmpx_lt_i32_e32 0, v14
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB0_6
; %bb.3:                                ; %LeafBlock251
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_mov_b32 s3, exec_lo
	v_cmpx_eq_u32_e32 1, v14
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_1 Depth=1
	scratch_store_b32 v13, v56, off
.LBB0_5:                                ; %Flow279
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_mov_b32 s3, -1
                                        ; implicit-def: $vgpr13
.LBB0_6:                                ; %Flow280
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_1 Depth=1
	v_add_nc_u32_e32 v59, -1, v59
	s_and_not1_b32 s3, s3, exec_lo
	scratch_store_b32 v13, v3, off
.LBB0_8:                                ; %Flow281
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s20, s3, exec_lo
                                        ; implicit-def: $vgpr14
                                        ; implicit-def: $vgpr13
.LBB0_9:                                ; %Flow283
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB0_13
; %bb.10:                               ; %LeafBlock
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_mov_b32 s3, exec_lo
	v_cmpx_eq_u32_e32 -1, v14
	s_cbranch_execz .LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_store_b32 v13, v60, off
.LBB0_12:                               ; %Flow282
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s20, s20, exec_lo
.LBB0_13:                               ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $sgpr3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s2, exec_lo
	v_cmpx_ne_u32_e32 30, v59
	s_xor_b32 s21, exec_lo, s2
	s_cbranch_execz .LBB0_59
; %bb.14:                               ; %.preheader157.preheader
                                        ;   in Loop: Header=BB0_1 Depth=1
	v_dual_mov_b32 v13, 0 :: v_dual_mov_b32 v14, v55
	s_mov_b64 s[2:3], 40
.LBB0_15:                               ; %.preheader157
                                        ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	scratch_load_b32 v15, v14, off
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, coefs@rel32@lo+4
	s_addc_u32 s5, s5, coefs@rel32@hi+12
	s_add_u32 s4, s2, s4
	s_addc_u32 s5, s3, s5
	v_cvt_f32_i32_e32 v13, v13
	s_load_b32 s4, s[4:5], 0x0
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmpk_eq_i32 s2, 0x7c
	v_add_nc_u32_e32 v14, 4, v14
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v15, v15
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, s4, v15
	v_cvt_i32_f32_e32 v13, v13
	s_cbranch_scc0 .LBB0_15
; %bb.16:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v14, off, off offset:56
	s_mov_b32 s52, exec_lo
	v_mov_b32_e32 v18, 0
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v15, v14
	v_cmp_ne_u32_e32 vcc_lo, -1, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v14, 1.0, v15, vcc_lo
	v_mul_f32_e32 v15, s22, v14
	v_mul_f32_e32 v14, s61, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v17, v15
	v_cvt_i32_f32_e32 v15, v14
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, v17, v4
	v_cmpx_le_i32_e64 v17, v4
	s_cbranch_execz .LBB0_56
; %bb.17:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v14, off, off offset:60
	s_mov_b32 s53, exec_lo
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v16, v14
	v_cmp_ne_u32_e64 s2, -1, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v14, 1.0, v16, s2
	v_mul_f32_e32 v16, s23, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cvt_i32_f32_e32 v16, v16
	v_mul_f32_e32 v19, s62, v14
	v_cvt_f32_i32_e32 v14, v15
	v_add_nc_u32_e32 v18, v17, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v15, v19
	v_cmp_gt_i32_e64 s2, v18, v4
	v_cmpx_le_i32_e64 v18, v4
	s_cbranch_execz .LBB0_55
; %bb.18:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:64
	v_cvt_f32_i32_e32 v15, v15
	s_mov_b32 s54, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v17, v16
	v_cmp_ne_u32_e64 s3, -1, v16
	v_cndmask_b32_e64 v17, 1.0, v17, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v16, s24, v17
	v_mul_f32_e32 v19, s63, v17
	v_cvt_i32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v15, v19
	v_add_nc_u32_e32 v17, v18, v16
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e64 s3, v17, v4
	v_cmpx_le_i32_e64 v17, v4
	s_cbranch_execz .LBB0_54
; %bb.19:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:68
	v_cvt_f32_i32_e32 v15, v15
	s_mov_b32 s55, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v18, v16
	v_cmp_ne_u32_e64 s4, -1, v16
	v_cndmask_b32_e64 v18, 1.0, v18, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, s25, v18
	v_cvt_i32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v19, s64, v18 :: v_dual_add_nc_u32 v18, v17, v16
	v_cvt_i32_f32_e32 v15, v19
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e64 s4, v18, v4
	v_cmpx_le_i32_e64 v18, v4
	s_cbranch_execz .LBB0_53
; %bb.20:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:72
	v_cvt_f32_i32_e32 v15, v15
	s_mov_b32 s56, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v17, v16
	v_cmp_ne_u32_e64 s5, -1, v16
	v_cndmask_b32_e64 v17, 1.0, v17, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v16, s26, v17
	v_mul_f32_e32 v19, s65, v17
	v_cvt_i32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v15, v19
	v_add_nc_u32_e32 v17, v18, v16
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e64 s5, v17, v4
	v_cmpx_le_i32_e64 v17, v4
	s_cbranch_execz .LBB0_52
; %bb.21:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:76
	v_cvt_f32_i32_e32 v15, v15
	s_mov_b32 s57, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v18, v16
	v_cmp_ne_u32_e64 s6, -1, v16
	v_cndmask_b32_e64 v18, 1.0, v18, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, s27, v18
	v_cvt_i32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v19, s66, v18 :: v_dual_add_nc_u32 v18, v17, v16
	v_cvt_i32_f32_e32 v15, v19
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e64 s6, v18, v4
	v_cmpx_le_i32_e64 v18, v4
	s_cbranch_execz .LBB0_51
; %bb.22:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:80
	v_cvt_f32_i32_e32 v15, v15
	s_mov_b32 s58, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v17, v16
	v_cmp_ne_u32_e64 s7, -1, v16
	v_cndmask_b32_e64 v17, 1.0, v17, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v16, s36, v17
	v_mul_f32_e32 v19, s67, v17
	v_cvt_i32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v15, v19
	v_add_nc_u32_e32 v17, v18, v16
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e64 s7, v17, v4
	v_cmpx_le_i32_e64 v17, v4
	s_cbranch_execz .LBB0_50
; %bb.23:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:84
	v_cvt_f32_i32_e32 v15, v15
	s_mov_b32 s59, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v18, v16
	v_cmp_ne_u32_e64 s8, -1, v16
	v_cndmask_b32_e64 v18, 1.0, v18, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, s37, v18
	v_cvt_i32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v19, s68, v18 :: v_dual_add_nc_u32 v18, v17, v16
	v_cvt_i32_f32_e32 v15, v19
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e64 s8, v18, v4
	v_cmpx_le_i32_e64 v18, v4
	s_cbranch_execz .LBB0_49
; %bb.24:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:88
	v_cvt_f32_i32_e32 v15, v15
	s_mov_b32 s60, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v17, v16
	v_cmp_ne_u32_e64 s9, -1, v16
	v_cndmask_b32_e64 v17, 1.0, v17, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v16, s38, v17
	v_mul_f32_e32 v19, s69, v17
	v_cvt_i32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v15, v19
	v_add_nc_u32_e32 v17, v18, v16
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e64 s9, v17, v4
	v_cmpx_le_i32_e64 v17, v4
	s_cbranch_execz .LBB0_48
; %bb.25:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:92
	v_cvt_f32_i32_e32 v15, v15
	s_mov_b32 s78, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v18, v16
	v_cmp_ne_u32_e64 s10, -1, v16
	v_cndmask_b32_e64 v18, 1.0, v18, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, s39, v18
	v_cvt_i32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v19, s70, v18 :: v_dual_add_nc_u32 v18, v17, v16
	v_cvt_i32_f32_e32 v15, v19
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e64 s10, v18, v4
	v_cmpx_le_i32_e64 v18, v4
	s_cbranch_execz .LBB0_47
; %bb.26:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:96
	v_cvt_f32_i32_e32 v15, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v17, v16
	v_cmp_ne_u32_e64 s11, -1, v16
	v_cndmask_b32_e64 v17, 1.0, v17, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v16, s40, v17
	v_mul_f32_e32 v19, s71, v17
	v_cvt_i32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v15, v19
	v_add_nc_u32_e32 v17, v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s11, v17, v4
	v_cmp_le_i32_e64 s12, v17, v4
	s_and_saveexec_b32 s79, s12
	s_cbranch_execz .LBB0_46
; %bb.27:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:100
	v_cvt_f32_i32_e32 v15, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v18, v16
	v_cmp_ne_u32_e64 s12, -1, v16
	v_cndmask_b32_e64 v18, 1.0, v18, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, s41, v18
	v_cvt_i32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v19, s72, v18 :: v_dual_add_nc_u32 v18, v17, v16
	v_cvt_i32_f32_e32 v15, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s12, v18, v4
	v_cmp_le_i32_e64 s13, v18, v4
	s_and_saveexec_b32 s80, s13
	s_cbranch_execz .LBB0_45
; %bb.28:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:104
	v_cvt_f32_i32_e32 v15, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v17, v16
	v_cmp_ne_u32_e64 s13, -1, v16
	v_cndmask_b32_e64 v17, 1.0, v17, s13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v16, s42, v17
	v_mul_f32_e32 v19, s73, v17
	v_cvt_i32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v15, v19
	v_add_nc_u32_e32 v17, v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s13, v17, v4
	v_cmp_le_i32_e64 s14, v17, v4
	s_and_saveexec_b32 s81, s14
	s_cbranch_execz .LBB0_44
; %bb.29:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:108
	v_cvt_f32_i32_e32 v15, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v18, v16
	v_cmp_ne_u32_e64 s14, -1, v16
	v_cndmask_b32_e64 v18, 1.0, v18, s14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, s43, v18
	v_cvt_i32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v19, s74, v18 :: v_dual_add_nc_u32 v18, v17, v16
	v_cvt_i32_f32_e32 v15, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s14, v18, v4
	v_cmp_le_i32_e64 s15, v18, v4
	s_and_saveexec_b32 s82, s15
	s_cbranch_execz .LBB0_43
; %bb.30:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:112
	v_cvt_f32_i32_e32 v15, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v17, v16
	v_cmp_ne_u32_e64 s15, -1, v16
	v_cndmask_b32_e64 v17, 1.0, v17, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v16, s44, v17
	v_mul_f32_e32 v19, s75, v17
	v_cvt_i32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v15, v19
	v_add_nc_u32_e32 v17, v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s15, v17, v4
	v_cmp_le_i32_e64 s16, v17, v4
	s_and_saveexec_b32 s83, s16
	s_cbranch_execz .LBB0_42
; %bb.31:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:116
	v_cvt_f32_i32_e32 v15, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v18, v16
	v_cmp_ne_u32_e64 s16, -1, v16
	v_cndmask_b32_e64 v18, 1.0, v18, s16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, s45, v18
	v_cvt_i32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v19, s28, v18 :: v_dual_add_nc_u32 v18, v17, v16
	v_cvt_i32_f32_e32 v15, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s16, v18, v4
	v_cmp_le_i32_e64 s17, v18, v4
	s_and_saveexec_b32 s84, s17
	s_cbranch_execz .LBB0_41
; %bb.32:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:120
	v_cvt_f32_i32_e32 v15, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v17, v16
	v_cmp_ne_u32_e64 s17, -1, v16
	v_cndmask_b32_e64 v17, 1.0, v17, s17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v16, s46, v17
	v_mul_f32_e32 v19, s29, v17
	v_cvt_i32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v15, v19
	v_add_nc_u32_e32 v17, v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s17, v17, v4
	v_cmp_le_i32_e64 s18, v17, v4
	s_and_saveexec_b32 s85, s18
	s_cbranch_execz .LBB0_40
; %bb.33:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:124
	v_cvt_f32_i32_e32 v15, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v18, v16
	v_cmp_ne_u32_e64 s18, -1, v16
	v_cndmask_b32_e64 v18, 1.0, v18, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, s47, v18
	v_cvt_i32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v19, s30, v18 :: v_dual_add_nc_u32 v18, v17, v16
	v_cvt_i32_f32_e32 v15, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s18, v18, v4
	v_cmp_le_i32_e64 s19, v18, v4
	s_and_saveexec_b32 s86, s19
	s_cbranch_execz .LBB0_39
; %bb.34:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:128
	v_cvt_f32_i32_e32 v15, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v17, v16
	v_cmp_ne_u32_e64 s19, -1, v16
	v_cndmask_b32_e64 v17, 1.0, v17, s19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v16, s48, v17
	v_mul_f32_e32 v19, s31, v17
	v_cvt_i32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v15, v19
	v_add_nc_u32_e32 v17, v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s87, v17, v4
	v_cmp_le_i32_e64 s19, v17, v4
	s_and_saveexec_b32 s88, s19
	s_cbranch_execz .LBB0_38
; %bb.35:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:132
	v_cvt_f32_i32_e32 v15, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v18, v16
	v_cmp_ne_u32_e64 s19, -1, v16
	v_cndmask_b32_e64 v18, 1.0, v18, s19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, s49, v18
	v_cvt_i32_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v19, s76, v18 :: v_dual_add_nc_u32 v18, v17, v16
	v_cvt_i32_f32_e32 v15, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s89, v18, v4
	v_cmp_le_i32_e64 s19, v18, v4
	s_and_saveexec_b32 s90, s19
	s_cbranch_execz .LBB0_37
; %bb.36:                               ;   in Loop: Header=BB0_1 Depth=1
	scratch_load_b32 v16, off, off offset:136
	v_cvt_f32_i32_e32 v15, v15
	s_and_not1_b32 s89, s89, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f32_e32 v14, v14, v15
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v17, v16
	v_cmp_ne_u32_e64 s19, -1, v16
	v_cndmask_b32_e64 v17, 1.0, v17, s19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, s50, v17
	v_mul_f32_e32 v17, s77, v17
	v_cvt_i32_f32_e32 v15, v17
	v_mov_b32_e32 v17, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v16, v16
	v_add_nc_u32_e32 v19, v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s19, v19, v4
	s_and_b32 s19, s19, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s89, s89, s19
.LBB0_37:                               ; %Flow276
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s90
	v_mov_b32_e32 v18, v17
	s_and_not1_b32 s19, s87, exec_lo
	s_and_b32 s87, s89, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s87, s19, s87
.LBB0_38:                               ; %Flow275
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s88
	v_mov_b32_e32 v17, v18
	s_and_not1_b32 s18, s18, exec_lo
	s_and_b32 s19, s87, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s18, s18, s19
.LBB0_39:                               ; %Flow274
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s86
	v_mov_b32_e32 v18, v17
	s_and_not1_b32 s17, s17, exec_lo
	s_and_b32 s18, s18, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s17, s17, s18
.LBB0_40:                               ; %Flow273
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s85
	v_mov_b32_e32 v17, v18
	s_and_not1_b32 s16, s16, exec_lo
	s_and_b32 s17, s17, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s16, s16, s17
.LBB0_41:                               ; %Flow272
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s84
	v_mov_b32_e32 v18, v17
	s_and_not1_b32 s15, s15, exec_lo
	s_and_b32 s16, s16, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s15, s15, s16
.LBB0_42:                               ; %Flow271
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s83
	v_mov_b32_e32 v17, v18
	s_and_not1_b32 s14, s14, exec_lo
	s_and_b32 s15, s15, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s14, s14, s15
.LBB0_43:                               ; %Flow270
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s82
	v_mov_b32_e32 v18, v17
	s_and_not1_b32 s13, s13, exec_lo
	s_and_b32 s14, s14, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s13, s13, s14
.LBB0_44:                               ; %Flow269
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s81
	v_mov_b32_e32 v17, v18
	s_and_not1_b32 s12, s12, exec_lo
	s_and_b32 s13, s13, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s12, s12, s13
.LBB0_45:                               ; %Flow268
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s80
	v_mov_b32_e32 v18, v17
	s_and_not1_b32 s11, s11, exec_lo
	s_and_b32 s12, s12, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s11, s11, s12
.LBB0_46:                               ; %Flow267
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s79
	v_mov_b32_e32 v17, v18
	s_and_not1_b32 s10, s10, exec_lo
	s_and_b32 s11, s11, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s10, s10, s11
.LBB0_47:                               ; %Flow266
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s78
	v_mov_b32_e32 v18, v17
	s_and_not1_b32 s9, s9, exec_lo
	s_and_b32 s10, s10, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s9, s9, s10
.LBB0_48:                               ; %Flow265
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s60
	v_mov_b32_e32 v17, v18
	s_and_not1_b32 s8, s8, exec_lo
	s_and_b32 s9, s9, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s8, s8, s9
.LBB0_49:                               ; %Flow264
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s59
	v_mov_b32_e32 v18, v17
	s_and_not1_b32 s7, s7, exec_lo
	s_and_b32 s8, s8, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s7, s7, s8
.LBB0_50:                               ; %Flow263
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s58
	v_mov_b32_e32 v17, v18
	s_and_not1_b32 s6, s6, exec_lo
	s_and_b32 s7, s7, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s6, s6, s7
.LBB0_51:                               ; %Flow262
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s57
	v_mov_b32_e32 v18, v17
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s6, s6, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s5, s5, s6
.LBB0_52:                               ; %Flow261
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s56
	v_mov_b32_e32 v17, v18
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s5, s5, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s5
.LBB0_53:                               ; %Flow260
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s55
	v_mov_b32_e32 v18, v17
	s_and_not1_b32 s3, s3, exec_lo
	s_and_b32 s4, s4, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s3, s3, s4
.LBB0_54:                               ; %Flow259
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s54
	v_mov_b32_e32 v17, v18
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s3, s3, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s3
.LBB0_55:                               ; %Flow258
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s53
	v_dual_mov_b32 v18, v17 :: v_dual_mov_b32 v17, v16
	s_and_not1_b32 s3, vcc_lo, exec_lo
	s_and_b32 s2, s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 vcc_lo, s3, s2
.LBB0_56:                               ; %Flow257
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s52
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_58
; %bb.57:                               ;   in Loop: Header=BB0_1 Depth=1
	v_ashrrev_i32_e32 v16, 31, v17
	v_sub_nc_u32_e32 v18, v4, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v17, v17, v16
	v_mul_lo_u32 v15, v18, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v17, v17, v16
	v_cvt_f32_u32_e32 v19, v17
	v_sub_nc_u32_e32 v20, 0, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v19, v19
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v19, 0x4f7ffffe, v19
	v_cvt_u32_f32_e32 v19, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v18, v20, v19
	v_ashrrev_i32_e32 v20, 31, v15
	v_add_nc_u32_e32 v15, v15, v20
	v_xor_b32_e32 v16, v20, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v18, v19, v18
	v_xor_b32_e32 v15, v15, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v18, v19, v18
	v_mul_hi_u32 v18, v15, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v19, v18, v17
	v_sub_nc_u32_e32 v15, v15, v19
	v_add_nc_u32_e32 v19, 1, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v21, v15, v17
	v_cmp_ge_u32_e32 vcc_lo, v15, v17
	v_dual_cndmask_b32 v18, v18, v19 :: v_dual_cndmask_b32 v15, v15, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v19, 1, v18
	v_cmp_ge_u32_e32 vcc_lo, v15, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v15, v18, v19, vcc_lo
	v_xor_b32_e32 v15, v15, v16
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v15, v15, v16
.LBB0_58:                               ; %.loopexit156
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v15, v15
	v_cmp_le_i32_e32 vcc_lo, v13, v4
	v_add_f32_e32 v14, v14, v15
	s_and_b32 s3, s20, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v14, v14
	v_cmp_lt_i32_e64 s2, v61, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_and_b32 s3, s2, exec_lo
.LBB0_59:                               ; %Flow278
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_and_not1_saveexec_b32 s4, s21
	s_cbranch_execz .LBB0_63
; %bb.60:                               ; %.preheader155.preheader
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_clause 0x5
	scratch_load_b128 v[13:16], off, off offset:56
	scratch_load_b128 v[17:20], off, off offset:72
	scratch_load_b128 v[21:24], off, off offset:88
	scratch_load_b128 v[25:28], off, off offset:104
	scratch_load_b128 v[29:32], off, off offset:120
	scratch_load_b32 v62, off, off offset:136
	s_waitcnt vmcnt(5)
	v_cvt_f32_i32_e32 v63, v13
	v_cvt_f32_i32_e32 v65, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v64, s22, v63, 0
	v_fma_f32 v63, s61, v63, 0
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s23, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s62, v65
	v_cvt_f32_i32_e32 v65, v15
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s24, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s63, v65
	v_cvt_f32_i32_e32 v65, v16
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s25, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s64, v65
	s_waitcnt vmcnt(4)
	v_cvt_f32_i32_e32 v65, v17
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s26, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s65, v65
	v_cvt_f32_i32_e32 v65, v18
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s27, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s66, v65
	v_cvt_f32_i32_e32 v65, v19
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s36, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s67, v65
	v_cvt_f32_i32_e32 v65, v20
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s37, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s68, v65
	s_waitcnt vmcnt(3)
	v_cvt_f32_i32_e32 v65, v21
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s38, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s69, v65
	v_cvt_f32_i32_e32 v65, v22
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s39, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s70, v65
	v_cvt_f32_i32_e32 v65, v23
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s40, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s71, v65
	v_cvt_f32_i32_e32 v65, v24
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s41, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s72, v65
	s_waitcnt vmcnt(2)
	v_cvt_f32_i32_e32 v65, v25
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s42, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s73, v65
	v_cvt_f32_i32_e32 v65, v26
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s43, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s74, v65
	v_cvt_f32_i32_e32 v65, v27
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s44, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s75, v65
	v_cvt_f32_i32_e32 v65, v28
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s45, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s28, v65
	s_waitcnt vmcnt(1)
	v_cvt_f32_i32_e32 v65, v29
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s46, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s29, v65
	v_cvt_f32_i32_e32 v65, v30
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s47, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s30, v65
	v_cvt_f32_i32_e32 v65, v31
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s48, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s31, v65
	v_cvt_f32_i32_e32 v65, v32
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s49, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v63, s76, v65
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v65, v62
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cvt_f32_i32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v63, v63
	v_fmac_f32_e32 v64, s50, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v63, s77, v65
	v_cvt_i32_f32_e32 v64, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v63, v63
	v_cmp_le_i32_e32 vcc_lo, v64, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e64 s2, v61, v63
	s_and_b32 s5, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s5
; %bb.61:                               ; %.preheader153.preheader
                                        ;   in Loop: Header=BB0_1 Depth=1
	v_dual_mov_b32 v61, v63 :: v_dual_mov_b32 v34, v62
	v_dual_mov_b32 v35, v32 :: v_dual_mov_b32 v36, v31
	v_dual_mov_b32 v37, v30 :: v_dual_mov_b32 v38, v29
	v_dual_mov_b32 v39, v28 :: v_dual_mov_b32 v40, v27
	v_dual_mov_b32 v41, v26 :: v_dual_mov_b32 v42, v25
	v_dual_mov_b32 v43, v24 :: v_dual_mov_b32 v54, v13
	v_dual_mov_b32 v53, v14 :: v_dual_mov_b32 v52, v15
	v_dual_mov_b32 v51, v16 :: v_dual_mov_b32 v50, v17
	v_dual_mov_b32 v49, v18 :: v_dual_mov_b32 v48, v19
	v_dual_mov_b32 v47, v20 :: v_dual_mov_b32 v46, v21
	v_dual_mov_b32 v45, v22 :: v_dual_mov_b32 v44, v23
; %bb.62:                               ; %Flow277
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s2, s3, exec_lo
	s_and_b32 s3, s20, exec_lo
	s_or_b32 s3, s2, s3
.LBB0_63:                               ; %.loopexit154
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	v_cmp_gt_i32_e32 vcc_lo, 30, v59
	s_and_b32 s2, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v13, 0, 1, s2
	v_add_nc_u32_e32 v59, v59, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 9, v59
	s_or_b32 s33, vcc_lo, s33
	s_and_not1_b32 exec_lo, exec_lo, s33
	s_cbranch_execnz .LBB0_1
; %bb.64:
	s_or_b32 exec_lo, exec_lo, s33
	ds_load_b32 v3, v57
	v_cvt_f32_i32_e32 v4, v61
	s_cmp_lt_u32 s35, 2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v4
	ds_store_b32 v57, v3
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
.LBB0_65:                               ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_70
; %bb.66:                               ; %.lr.ph
                                        ;   in Loop: Header=BB0_65 Depth=1
	s_mov_b32 s2, s35
	s_lshr_b32 s35, s35, 1
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_u32_e64 s35, v0
	s_cbranch_execz .LBB0_69
; %bb.67:                               ;   in Loop: Header=BB0_65 Depth=1
	v_lshl_add_u32 v3, s35, 2, v57
	ds_load_b32 v4, v57
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_f32_e32 vcc_lo, v4, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_69
; %bb.68:                               ;   in Loop: Header=BB0_65 Depth=1
	v_lshl_add_u32 v4, s35, 2, v58
	ds_load_b32 v4, v4
	ds_store_b32 v57, v3
	s_waitcnt lgkmcnt(1)
	ds_store_b32 v58, v4
.LBB0_69:                               ;   in Loop: Header=BB0_65 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_u32 s2, 4
	s_branch .LBB0_65
.LBB0_70:                               ; %._crit_edge
	v_mov_b32_e32 v3, s51
	s_mov_b32 s2, exec_lo
	ds_load_b32 v3, v3
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_72
; %bb.71:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mov_b32_e32 v0, 0
	s_mov_b32 s35, 0
	s_waitcnt lgkmcnt(0)
	v_ashrrev_i32_e32 v4, 31, v3
	s_lshl_b64 s[8:9], s[34:35], 2
	ds_load_b32 v13, v0
	s_add_u32 s4, s4, s8
	s_addc_u32 s5, s5, s9
	s_lshl_b64 s[8:9], s[34:35], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s6, s6, s8
	s_addc_u32 s7, s7, s9
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_store_b32 v0, v13, s[4:5]
	global_store_b64 v0, v[3:4], s[6:7]
.LBB0_72:
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s33, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_eq_u32_e64 v33, v3
	s_cbranch_execz .LBB0_74
; %bb.73:                               ; %.preheader
	s_load_b64 s[0:1], s[0:1], 0x20
	s_mul_i32 s2, s34, 31
	s_mov_b32 s3, 0
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[4:5], s[2:3], 2
	s_mov_b32 s7, s3
	s_mov_b32 s9, s3
	s_mov_b32 s11, s3
	s_mov_b32 s13, s3
	s_mov_b32 s15, s3
	s_mov_b32 s17, s3
	s_mov_b32 s19, s3
	s_mov_b32 s21, s3
	s_mov_b32 s23, s3
	s_mov_b32 s25, s3
	s_mov_b32 s27, s3
	s_mov_b32 s29, s3
	s_mov_b32 s31, s3
	s_mov_b32 s35, s3
	s_mov_b32 s37, s3
	s_waitcnt lgkmcnt(0)
	s_add_u32 s4, s0, s4
	s_addc_u32 s5, s1, s5
	s_add_i32 s6, s2, 1
	s_mov_b32 s39, s3
	s_lshl_b64 s[6:7], s[6:7], 2
	s_mov_b32 s41, s3
	s_add_u32 s6, s0, s6
	s_addc_u32 s7, s1, s7
	s_add_i32 s8, s2, 2
	s_mov_b32 s43, s3
	s_lshl_b64 s[8:9], s[8:9], 2
	s_mov_b32 s45, s3
	s_add_u32 s8, s0, s8
	s_addc_u32 s9, s1, s9
	s_add_i32 s10, s2, 3
	s_mov_b32 s47, s3
	s_lshl_b64 s[10:11], s[10:11], 2
	s_mov_b32 s49, s3
	s_add_u32 s10, s0, s10
	s_addc_u32 s11, s1, s11
	s_add_i32 s12, s2, 4
	s_mov_b32 s51, s3
	s_lshl_b64 s[12:13], s[12:13], 2
	s_mov_b32 s53, s3
	s_add_u32 s12, s0, s12
	s_addc_u32 s13, s1, s13
	s_add_i32 s14, s2, 5
	s_mov_b32 s55, s3
	s_lshl_b64 s[14:15], s[14:15], 2
	s_mov_b32 s57, s3
	s_add_u32 s14, s0, s14
	s_addc_u32 s15, s1, s15
	s_add_i32 s16, s2, 6
	s_mov_b32 s59, s3
	s_lshl_b64 s[16:17], s[16:17], 2
	s_mov_b32 s61, s3
	s_add_u32 s16, s0, s16
	s_addc_u32 s17, s1, s17
	s_add_i32 s18, s2, 7
	s_mov_b32 s63, s3
	s_lshl_b64 s[18:19], s[18:19], 2
	s_mov_b32 s65, s3
	s_add_u32 s18, s0, s18
	s_addc_u32 s19, s1, s19
	s_add_i32 s20, s2, 8
	s_clause 0x7
	global_store_b32 v0, v5, s[4:5]
	global_store_b32 v0, v6, s[6:7]
	global_store_b32 v0, v7, s[8:9]
	global_store_b32 v0, v8, s[10:11]
	global_store_b32 v0, v9, s[12:13]
	global_store_b32 v0, v10, s[14:15]
	global_store_b32 v0, v11, s[16:17]
	global_store_b32 v0, v12, s[18:19]
	s_lshl_b64 s[20:21], s[20:21], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s20, s0, s20
	s_addc_u32 s21, s1, s21
	s_add_i32 s22, s2, 9
	s_lshl_b64 s[22:23], s[22:23], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s22, s0, s22
	s_addc_u32 s23, s1, s23
	s_add_i32 s24, s2, 10
	s_lshl_b64 s[24:25], s[24:25], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s24, s0, s24
	s_addc_u32 s25, s1, s25
	s_add_i32 s26, s2, 11
	s_lshl_b64 s[26:27], s[26:27], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s26, s0, s26
	s_addc_u32 s27, s1, s27
	s_add_i32 s28, s2, 12
	s_lshl_b64 s[28:29], s[28:29], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s28, s0, s28
	s_addc_u32 s29, s1, s29
	s_add_i32 s30, s2, 13
	s_lshl_b64 s[30:31], s[30:31], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s30, s0, s30
	s_addc_u32 s31, s1, s31
	s_add_i32 s34, s2, 14
	s_lshl_b64 s[34:35], s[34:35], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s34, s0, s34
	s_addc_u32 s35, s1, s35
	s_add_i32 s36, s2, 15
	s_lshl_b64 s[36:37], s[36:37], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s36, s0, s36
	s_addc_u32 s37, s1, s37
	s_add_i32 s38, s2, 16
	s_clause 0x7
	global_store_b32 v0, v1, s[20:21]
	global_store_b32 v0, v2, s[22:23]
	global_store_b32 v0, v54, s[24:25]
	global_store_b32 v0, v53, s[26:27]
	global_store_b32 v0, v52, s[28:29]
	global_store_b32 v0, v51, s[30:31]
	global_store_b32 v0, v50, s[34:35]
	global_store_b32 v0, v49, s[36:37]
	s_lshl_b64 s[38:39], s[38:39], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s38, s0, s38
	s_addc_u32 s39, s1, s39
	s_add_i32 s40, s2, 17
	s_lshl_b64 s[40:41], s[40:41], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s40, s0, s40
	s_addc_u32 s41, s1, s41
	s_add_i32 s42, s2, 18
	s_lshl_b64 s[42:43], s[42:43], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s42, s0, s42
	s_addc_u32 s43, s1, s43
	s_add_i32 s44, s2, 19
	s_lshl_b64 s[44:45], s[44:45], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s44, s0, s44
	s_addc_u32 s45, s1, s45
	s_add_i32 s46, s2, 20
	s_lshl_b64 s[46:47], s[46:47], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s46, s0, s46
	s_addc_u32 s47, s1, s47
	s_add_i32 s48, s2, 21
	s_lshl_b64 s[48:49], s[48:49], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s48, s0, s48
	s_addc_u32 s49, s1, s49
	s_add_i32 s50, s2, 22
	s_lshl_b64 s[50:51], s[50:51], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s50, s0, s50
	s_addc_u32 s51, s1, s51
	s_add_i32 s52, s2, 23
	s_lshl_b64 s[52:53], s[52:53], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s52, s0, s52
	s_addc_u32 s53, s1, s53
	s_add_i32 s54, s2, 24
	s_clause 0x7
	global_store_b32 v0, v48, s[38:39]
	global_store_b32 v0, v47, s[40:41]
	global_store_b32 v0, v46, s[42:43]
	global_store_b32 v0, v45, s[44:45]
	global_store_b32 v0, v44, s[46:47]
	global_store_b32 v0, v43, s[48:49]
	global_store_b32 v0, v42, s[50:51]
	global_store_b32 v0, v41, s[52:53]
	s_lshl_b64 s[54:55], s[54:55], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s54, s0, s54
	s_addc_u32 s55, s1, s55
	s_add_i32 s56, s2, 25
	s_lshl_b64 s[56:57], s[56:57], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s56, s0, s56
	s_addc_u32 s57, s1, s57
	s_add_i32 s58, s2, 26
	s_lshl_b64 s[58:59], s[58:59], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s58, s0, s58
	s_addc_u32 s59, s1, s59
	s_add_i32 s60, s2, 27
	s_lshl_b64 s[60:61], s[60:61], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s60, s0, s60
	s_addc_u32 s61, s1, s61
	s_add_i32 s62, s2, 28
	s_lshl_b64 s[62:63], s[62:63], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s62, s0, s62
	s_addc_u32 s63, s1, s63
	s_add_i32 s64, s2, 29
	s_lshl_b64 s[64:65], s[64:65], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s4, s0, s64
	s_addc_u32 s5, s1, s65
	s_add_i32 s2, s2, 30
	s_lshl_b64 s[2:3], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	s_clause 0x6
	global_store_b32 v0, v40, s[54:55]
	global_store_b32 v0, v39, s[56:57]
	global_store_b32 v0, v38, s[58:59]
	global_store_b32 v0, v37, s[60:61]
	global_store_b32 v0, v36, s[62:63]
	global_store_b32 v0, v35, s[4:5]
	global_store_b32 v0, v34, s[0:1]
.LBB0_74:                               ; %.loopexit
	s_or_b32 exec_lo, exec_lo, s33
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6hybridPfPlfPiS1_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 144
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 66
		.amdhsa_next_free_sgpr 91
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6hybridPfPlfPiS1_i, .Lfunc_end0-_Z6hybridPfPlfPiS1_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 6216
; NumSgprs: 93
; NumVgprs: 66
; ScratchSize: 144
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 11
; VGPRBlocks: 8
; NumSGPRsForWavesPerEU: 93
; NumVGPRsForWavesPerEU: 66
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16hybrid_reductionPfPlPii ; -- Begin function _Z16hybrid_reductionPfPlPii
	.globl	_Z16hybrid_reductionPfPlPii
	.p2align	8
	.type	_Z16hybrid_reductionPfPlPii,@function
_Z16hybrid_reductionPfPlPii:            ; @_Z16hybrid_reductionPfPlPii
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s8, s[0:1], 0x18
	s_mov_b32 s2, s15
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	s_cmp_lt_u32 s3, 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v1, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[1:2], off
	v_lshl_add_u32 v1, v0, 2, 0
	v_lshl_add_u32 v2, s8, 2, v1
	s_waitcnt vmcnt(1)
	v_cvt_i32_f32_e32 v3, v3
	ds_store_b32 v1, v3
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v4
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
.LBB1_1:                                ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_6
; %bb.2:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_mov_b32 s9, s3
	s_lshr_b32 s3, s3, 1
	s_mov_b32 s10, exec_lo
	v_cmpx_gt_u32_e64 s3, v0
	s_cbranch_execz .LBB1_5
; %bb.3:                                ;   in Loop: Header=BB1_1 Depth=1
	v_lshl_add_u32 v3, s3, 2, v1
	ds_load_b32 v4, v1
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v4, v3
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_5
; %bb.4:                                ;   in Loop: Header=BB1_1 Depth=1
	v_lshl_add_u32 v4, s3, 2, v2
	ds_store_b32 v1, v3
	ds_load_b32 v3, v4
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v2, v3
.LBB1_5:                                ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_u32 s9, 4
	s_branch .LBB1_1
.LBB1_6:                                ; %._crit_edge
	s_mov_b32 s3, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_8
; %bb.7:                                ; %.loopexit.loopexit
	s_mov_b32 s3, 0
	v_mov_b32_e32 v31, 0
	s_lshl_b64 s[10:11], s[2:3], 2
	s_load_b64 s[16:17], s[0:1], 0x10
	s_add_u32 s18, s4, s10
	s_addc_u32 s19, s5, s11
	s_lshl_b32 s4, s8, 2
	s_lshl_b64 s[2:3], s[2:3], 3
	s_add_i32 s4, s4, 0
	s_add_u32 s20, s6, s2
	s_addc_u32 s21, s7, s3
	s_ashr_i32 s2, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s8, s8, s2
	s_xor_b32 s3, s8, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, s3
	s_sub_i32 s6, 0, s3
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_dual_mov_b32 v0, s4 :: v_dual_mul_f32 v1, 0x4f7ffffe, v1
	ds_load_b32 v0, v0
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_readfirstlane_b32 s5, v1
	ds_load_b32 v1, v31
	s_mul_i32 s6, s6, s5
	s_mul_hi_u32 s6, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_i32 s5, s5, s6
	s_waitcnt lgkmcnt(0)
	v_readfirstlane_b32 s4, v0
	s_ashr_i32 s7, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s4, s4, s7
	s_xor_b32 s1, s7, s2
	s_xor_b32 s4, s4, s7
	v_cvt_f32_i32_e32 v2, v1
	s_mul_hi_u32 s5, s4, s5
	v_ashrrev_i32_e32 v1, 31, v0
	s_mul_i32 s0, s5, s3
	s_add_i32 s2, s5, 1
	s_sub_i32 s0, s4, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s4, s0, s3
	s_cmp_ge_u32 s0, s3
	s_cselect_b32 s2, s2, s5
	s_cselect_b32 s0, s4, s0
	s_add_i32 s4, s2, 1
	s_cmp_ge_u32 s0, s3
	s_cselect_b32 s0, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s0, s0, s1
	s_sub_i32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s0, s0, 31
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_add_u32 s28, s16, s0
	s_addc_u32 s29, s17, s1
	s_load_b512 s[0:15], s[28:29], 0x0
	s_clause 0x1
	global_store_b32 v31, v2, s[18:19]
	global_store_b64 v31, v[0:1], s[20:21]
	s_clause 0x3
	s_load_b256 s[20:27], s[28:29], 0x40
	s_load_b32 s33, s[28:29], 0x78
	s_load_b64 s[18:19], s[28:29], 0x70
	s_load_b128 s[28:31], s[28:29], 0x60
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v17, s21 :: v_dual_mov_b32 v18, s22
	v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
	v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
	v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
	v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
	v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
	v_dual_mov_b32 v16, s20 :: v_dual_mov_b32 v19, s23
	v_dual_mov_b32 v20, s24 :: v_dual_mov_b32 v23, s27
	v_dual_mov_b32 v24, s28 :: v_dual_mov_b32 v21, s25
	v_dual_mov_b32 v22, s26 :: v_dual_mov_b32 v25, s29
	v_dual_mov_b32 v26, s30 :: v_dual_mov_b32 v27, s31
	v_dual_mov_b32 v28, s18 :: v_dual_mov_b32 v29, s19
	v_mov_b32_e32 v30, s33
	s_clause 0x7
	global_store_b128 v31, v[0:3], s[16:17]
	global_store_b128 v31, v[4:7], s[16:17] offset:16
	global_store_b128 v31, v[8:11], s[16:17] offset:32
	global_store_b128 v31, v[12:15], s[16:17] offset:48
	global_store_b128 v31, v[16:19], s[16:17] offset:64
	global_store_b128 v31, v[20:23], s[16:17] offset:80
	global_store_b128 v31, v[24:27], s[16:17] offset:96
	global_store_b96 v31, v[28:30], s[16:17] offset:112
.LBB1_8:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16hybrid_reductionPfPlPii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 32
		.amdhsa_next_free_sgpr 34
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z16hybrid_reductionPfPlPii, .Lfunc_end1-_Z16hybrid_reductionPfPlPii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 868
; NumSgprs: 36
; NumVgprs: 32
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 36
; NumVGPRsForWavesPerEU: 32
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12which_stringlPi     ; -- Begin function _Z12which_stringlPi
	.globl	_Z12which_stringlPi
	.p2align	8
	.type	_Z12which_stringlPi,@function
_Z12which_stringlPi:                    ; @_Z12which_stringlPi
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_ashrrev_i64 v[1:2], v0, s[0:1]
	s_lshr_b32 s0, s1, 31
	v_lshlrev_b32_e32 v0, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, s0, v1
	v_and_b32_e32 v2, -2, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v1, v1, v2
	global_store_b32 v0, v1, s[2:3]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12which_stringlPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 4
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z12which_stringlPi, .Lfunc_end2-_Z12which_stringlPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 68
; NumSgprs: 4
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 4
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	coefs                   ; @coefs
	.type	coefs,@object
	.section	.bss,"aw",@nobits
	.globl	coefs
	.p2align	4, 0x0
coefs:
	.zero	252
	.size	coefs, 252

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym coefs
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         168
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6hybridPfPlfPiS1_i
    .private_segment_fixed_size: 144
    .sgpr_count:     93
    .sgpr_spill_count: 0
    .symbol:         _Z6hybridPfPlfPiS1_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     66
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         152
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16hybrid_reductionPfPlPii
    .private_segment_fixed_size: 0
    .sgpr_count:     36
    .sgpr_spill_count: 0
    .symbol:         _Z16hybrid_reductionPfPlPii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     32
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12which_stringlPi
    .private_segment_fixed_size: 0
    .sgpr_count:     4
    .sgpr_spill_count: 0
    .symbol:         _Z12which_stringlPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
