// CUDA blockDim, gridDim configured as method 2 in https://blog.csdn.net/yongjiankuang/article/details/90180559

#include <bits/stdc++.h>
#include <sys/time.h>
#include <cuda.h>
#include <cuda_runtime.h>
using namespace std;

void mul_cpu(int row_A, int col_A, int col_B, int* mat_A, int* mat_B, int* mat_C){
    for(int i = 0; i < row_A; i++){
        for(int j = 0; j < col_B; j++){
            for(int k = 0; k < col_A; k++){
                mat_C[i * col_B + j] += mat_A[i * col_A + k] * mat_B[k * col_B + j];
            }
        }
    }
}

__global__ void mul_cuda(int row_A, int col_A, int col_B, int* mat_A_CUDA, int* mat_B_CUDA, int* mat_C_CUDA){
    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;

    if(row < row_A && col < col_B && row >= 0 && col >= 0){
        for(int k = 0; k < col_A; k++){
            mat_C_CUDA[row * col_B + col] += mat_A_CUDA[row * col_A + k] * mat_B_CUDA[k * col_B + col];
        }        
    }
}

__global__ void mul_cuda_dim_1D(int row_A, int col_A, int col_B, int* mat_A_CUDA, int* mat_B_CUDA, int* mat_C_CUDA){
    int offset = blockIdx.x * blockDim.x + threadIdx.x;
    int row = offset / row_A;
    int col = offset % col_B;

    if(row < row_A && col < col_B && row >= 0 && col >= 0){
        for(int k = 0; k < col_A; k++){
            mat_C_CUDA[row * col_B + col] += mat_A_CUDA[row * col_A + k] * mat_B_CUDA[k * col_B + col];
        }        
    }
}

int* init(int row, int col, bool is_C){
    int* mat = (int *)malloc(row * col * sizeof(int ));

    random_device rd;
    mt19937 generator(rd());
    uniform_int_distribution<int> unif(-1000, 1000);

    for(int i = 0; i < row; i++){
        for(int j = 0; j < col; j++){
            mat[i * col + j] = is_C ? 0 : unif(generator);
        }
    }

    return mat;
}

int main(int argc, char* argv[]){
    /*-------------- CPU init ------------*/
    int row_A, col_A, col_B;
    int* mat_A;
    int* mat_B;
    int* mat_C;
    int* mat_A_CUDA;
    int* mat_B_CUDA;
    int* mat_C_CUDA;
    int* mat_A_CUDA_pinned;
    int* mat_B_CUDA_pinned;
    int* mat_C_CUDA_pinned;
    int* res_CPU;
    int* res_GPU;

    if(argc != 5){
        fprintf(stderr, "%s", "Usage: ./a.out $row_A $col_A $col_B $thread_count_in_block in 1Dim direction\n");
        exit(-1);
    }

    row_A = atoi(argv[1]);
    col_A = atoi(argv[2]);
    col_B = atoi(argv[3]);
    assert(row_A > 0 && col_A > 0 && col_B > 0);

    mat_A = init(row_A, col_A, false);
    mat_B = init(col_A, col_B, false);
    mat_C = init(row_A, col_B, true);
    res_CPU = init(row_A, col_B, true);

    /*-------------- CPU run -------------*/
    struct timeval start, end;
    gettimeofday(&start, 0);
    mul_cpu(row_A, col_A, col_B, mat_A, mat_B, mat_C);
    gettimeofday(&end, 0);
    int sec = end.tv_sec - start.tv_sec;
    int usec = end.tv_usec - start.tv_usec;
    int t_cpu = sec * 1000 + (usec / 1000);
    printf("CPU time (ms): %d\n", t_cpu);

    /*------------- Clear ---------------*/
    res_CPU = init(row_A, col_B, true);
    for(int i = 0; i < row_A; i++){
        for(int j = 0; j < col_B; j++){
            res_CPU[i * col_B + j] = mat_C[i * col_B + j];
            mat_C[i * col_B + j] = 0;
        }
    }

    /*-------------- CUDA init ------------*/
    cudaError_t ce_A, ce_B, ce_C;

    ce_A = cudaMalloc((void**) &mat_A_CUDA, row_A * col_A * sizeof(int));
    ce_B = cudaMalloc((void**) &mat_B_CUDA, col_A * col_B * sizeof(int));
    ce_C = cudaMalloc((void**) &mat_C_CUDA, row_A * col_B * sizeof(int));
    if( ce_A != cudaSuccess ||
        ce_B != cudaSuccess || 
        ce_C != cudaSuccess){
        fprintf(stderr, "%s", "cudaMalloc failed\n");
        exit(1);
    }

    ce_A = cudaMemcpy(mat_A_CUDA, mat_A, row_A * col_A * sizeof(int), cudaMemcpyHostToDevice);
    ce_B = cudaMemcpy(mat_B_CUDA, mat_B, col_A * col_B * sizeof(int), cudaMemcpyHostToDevice);
    ce_C = cudaMemcpy(mat_C_CUDA, mat_C, row_A * col_B * sizeof(int), cudaMemcpyHostToDevice);
    if( ce_A != cudaSuccess ||
        ce_B != cudaSuccess || 
        ce_C != cudaSuccess){
        fprintf(stderr, "%s", "cudaMemcpyHostToDevice failed\n");
        exit(2);
    }

    const int THREAD_SQRT = (int)sqrt(atoi(argv[4]));
    // const dim3 dimBlock(THREAD_SQRT, THREAD_SQRT);
    // const dim3 dimGrid((col_B + THREAD_SQRT - 1) / THREAD_SQRT, (row_A + THREAD_SQRT - 1) / THREAD_SQRT); // ceiling

    const dim3 dimBlock(THREAD_SQRT * THREAD_SQRT);
    const dim3 dimGrid((col_B * row_A + THREAD_SQRT * THREAD_SQRT - 1) / (THREAD_SQRT * THREAD_SQRT));

    /*-------------- CUDA run -------------*/
    gettimeofday(&start, 0);
    mul_cuda_dim_1D<<<dimGrid, dimBlock>>>(row_A, col_A, col_B, mat_A_CUDA, mat_B_CUDA, mat_C_CUDA);
    cudaError_t ce_K; // cuda error for kernel
    ce_K = cudaDeviceSynchronize();
    if(ce_K != cudaSuccess){
        fprintf(stderr, "%s", "cudaDeviceSynchronize failed\n");
        exit(3);
    }
    gettimeofday(&end, 0);
    sec = end.tv_sec - start.tv_sec;
    usec = end.tv_usec - start.tv_usec;
    int t_gpu = sec * 1000 + (usec / 1000);
    printf("GPU time (ms): %d\n", t_gpu);

    /*------- Check integrity -------------*/
    res_GPU = init(row_A, col_B, true);
    ce_C = cudaMemcpy(res_GPU, mat_C_CUDA, row_A * col_B * sizeof(int), cudaMemcpyDeviceToHost);
    if(ce_C != cudaSuccess){
        fprintf(stderr, "%s", "cudaMemcpyDeviceToHost failed\n");
        exit(4);
    }

    printf("Check integrity\n");
    for(int i = 0; i < row_A; i++){
        for(int j = 0; j < col_B; j++){
            assert(res_CPU[i * col_B + j] == res_GPU[i * col_B + j]);
        }
    }
    printf("Integrity pass!, CPU result == GPU result, all finished\n");
    printf("[row_A, col_A, col_B, block_size(thread cnt), Accelerate ratio (times)]: \n");
    printf("%d, %d, %d, %d, %f\n\n", row_A, col_A, col_B, atoi(argv[4]), (float)t_cpu / (float)t_gpu);

    /*------- Clear memory -------------*/
    cudaFree(mat_A_CUDA);
    cudaFree(mat_B_CUDA);
    cudaFree(mat_C_CUDA);
    
    /*-------------- CUDA init, pinned mem -*/ 

    ce_A = cudaMallocHost((void**) &mat_A_CUDA_pinned, row_A * col_A * sizeof(int));
    ce_B = cudaMallocHost((void**) &mat_B_CUDA_pinned, col_A * col_B * sizeof(int));
    ce_C = cudaMallocHost((void**) &mat_C_CUDA_pinned, row_A * col_B * sizeof(int));
    if( ce_A != cudaSuccess ||
        ce_B != cudaSuccess || 
        ce_C != cudaSuccess){
        fprintf(stderr, "%s", "cudaMallocHost failed\n");
        exit(1);
    }

    ce_A = cudaMemcpy(mat_A_CUDA_pinned, mat_A, row_A * col_A * sizeof(int), cudaMemcpyHostToDevice);
    ce_B = cudaMemcpy(mat_B_CUDA_pinned, mat_B, col_A * col_B * sizeof(int), cudaMemcpyHostToDevice);
    ce_C = cudaMemcpy(mat_C_CUDA_pinned, mat_C, row_A * col_B * sizeof(int), cudaMemcpyHostToDevice);
    if( ce_A != cudaSuccess ||
        ce_B != cudaSuccess || 
        ce_C != cudaSuccess){
        fprintf(stderr, "%s", "cudaMemcpyHostToDevice, pinned memory failed\n");
        exit(2);
    }

    /*-------------- CUDA run, pinned mem -*/ 
    gettimeofday(&start, 0);
    mul_cuda_dim_1D<<<dimGrid, dimBlock>>>(row_A, col_A, col_B, mat_A_CUDA_pinned, mat_B_CUDA_pinned, mat_C_CUDA_pinned);
    ce_K = cudaDeviceSynchronize();
    if(ce_K != cudaSuccess){
        fprintf(stderr, "%s", "cudaDeviceSynchronize, pinned memory failed\n");
        exit(3);
    }
    gettimeofday(&end, 0);
    sec = end.tv_sec - start.tv_sec;
    usec = end.tv_usec - start.tv_usec;
    t_gpu = sec * 1000 + (usec / 1000);
    printf("GPU time, pinned memory (ms): %d\n", t_gpu);

    /*------- Check integrity, pinned mem -*/
    res_GPU = init(row_A, col_B, true);
    ce_C = cudaMemcpy(res_GPU, mat_C_CUDA_pinned, row_A * col_B * sizeof(int), cudaMemcpyDeviceToHost);
    if(ce_C != cudaSuccess){
        fprintf(stderr, "%s", "cudaMemcpyDeviceToHost, pinned memory failed\n");
        exit(4);
    }

    printf("Check integrity, pinned memory\n");
    for(int i = 0; i < row_A; i++){
        for(int j = 0; j < col_B; j++){
            assert(res_CPU[i * col_B + j] == res_GPU[i * col_B + j]);
        }
    }
    printf("Integrity pass, pinned memory!, CPU result == GPU result, all finished\n");
    printf("[row_A, col_A, col_B, block_size(thread cnt), Accelerate ratio (times)]: \n");
    printf("%d, %d, %d, %d, %f\n\n", row_A, col_A, col_B, atoi(argv[4]), (float)t_cpu / (float)t_gpu);

    /*------- Clear memory -------------*/
    free(mat_A);
    free(mat_B);
    free(mat_C);
    cudaFreeHost(mat_A_CUDA_pinned);
    cudaFreeHost(mat_B_CUDA_pinned);
    cudaFreeHost(mat_C_CUDA_pinned);
    free(res_CPU);
    free(res_GPU);

    return 0;
}

	.file	"tmpxft_0020599c_00000000-6_main_1D.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB10830:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE10830:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z7mul_cpuiiiPiS_S_
	.type	_Z7mul_cpuiiiPiS_S_, @function
_Z7mul_cpuiiiPiS_S_:
.LFB10825:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movslq	%edx, %rdx
	xorl	%r11d, %r11d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %rax
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	movq	%rcx, %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	0(,%rdx,4), %rbx
	movq	%r8, -8(%rsp)
	xorl	%r8d, %r8d
	movq	%rbx, -16(%rsp)
	xorl	%ebx, %ebx
.L3:
	cmpl	%ebp, %r11d
	jge	.L2
	movslq	%r8d, %rdx
	movq	-8(%rsp), %r10
	leaq	(%rdi,%rdx,4), %r15
	xorl	%edx, %edx
.L8:
	cmpl	%eax, %edx
	jge	.L5
	leal	(%rdx,%rbx), %ecx
	movq	%r10, %r12
	movslq	%ecx, %rcx
	leaq	(%r9,%rcx,4), %r14
	xorl	%ecx, %ecx
.L6:
	cmpl	%ecx, %esi
	jle	.L11
	movl	(%r15,%rcx,4), %r13d
	imull	(%r12), %r13d
	incq	%rcx
	addl	%r13d, (%r14)
	movq	-16(%rsp), %r13
	addq	%r13, %r12
	jmp	.L6
.L11:
	incl	%edx
	addq	$4, %r10
	jmp	.L8
.L5:
	incl	%r11d
	addl	%eax, %ebx
	addl	%esi, %r8d
	jmp	.L3
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10825:
	.size	_Z7mul_cpuiiiPiS_S_, .-_Z7mul_cpuiiiPiS_S_
	.globl	_Z34__device_stub__Z8mul_cudaiiiPiS_S_iiiPiS_S_
	.type	_Z34__device_stub__Z8mul_cudaiiiPiS_S_iiiPiS_S_, @function
_Z34__device_stub__Z8mul_cudaiiiPiS_S_iiiPiS_S_:
.LFB10852:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 36(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z8mul_cudaiiiPiS_S_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L12:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10852:
	.size	_Z34__device_stub__Z8mul_cudaiiiPiS_S_iiiPiS_S_, .-_Z34__device_stub__Z8mul_cudaiiiPiS_S_iiiPiS_S_
	.globl	_Z8mul_cudaiiiPiS_S_
	.type	_Z8mul_cudaiiiPiS_S_, @function
_Z8mul_cudaiiiPiS_S_:
.LFB10853:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z8mul_cudaiiiPiS_S_iiiPiS_S_
	.cfi_endproc
.LFE10853:
	.size	_Z8mul_cudaiiiPiS_S_, .-_Z8mul_cudaiiiPiS_S_
	.globl	_Z42__device_stub__Z15mul_cuda_dim_1DiiiPiS_S_iiiPiS_S_
	.type	_Z42__device_stub__Z15mul_cuda_dim_1DiiiPiS_S_iiiPiS_S_, @function
_Z42__device_stub__Z15mul_cuda_dim_1DiiiPiS_S_iiiPiS_S_:
.LFB10854:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 36(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15mul_cuda_dim_1DiiiPiS_S_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L17:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10854:
	.size	_Z42__device_stub__Z15mul_cuda_dim_1DiiiPiS_S_iiiPiS_S_, .-_Z42__device_stub__Z15mul_cuda_dim_1DiiiPiS_S_iiiPiS_S_
	.globl	_Z15mul_cuda_dim_1DiiiPiS_S_
	.type	_Z15mul_cuda_dim_1DiiiPiS_S_, @function
_Z15mul_cuda_dim_1DiiiPiS_S_:
.LFB10855:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z15mul_cuda_dim_1DiiiPiS_S_iiiPiS_S_
	.cfi_endproc
.LFE10855:
	.size	_Z15mul_cuda_dim_1DiiiPiS_S_, .-_Z15mul_cuda_dim_1DiiiPiS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z15mul_cuda_dim_1DiiiPiS_S_"
.LC1:
	.string	"_Z8mul_cudaiiiPiS_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB10857:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15mul_cuda_dim_1DiiiPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8mul_cudaiiiPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE10857:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,comdat
	.align 2
	.weak	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	.type	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv, @function
_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv:
.LFB12305:
	.cfi_startproc
	endbr64
	movq	%rdi, %rax
	xorl	%edx, %edx
	movl	$2567483615, %edi
.L26:
	movq	(%rax,%rdx,8), %rsi
	incq	%rdx
	movq	(%rax,%rdx,8), %rcx
	andq	$-2147483648, %rsi
	andl	$2147483647, %ecx
	orq	%rsi, %rcx
	movq	%rcx, %rsi
	shrq	%rsi
	xorq	3168(%rax,%rdx,8), %rsi
	andl	$1, %ecx
	je	.L25
	movq	%rdi, %rcx
.L25:
	xorq	%rsi, %rcx
	movq	%rcx, -8(%rax,%rdx,8)
	cmpq	$227, %rdx
	jne	.L26
	movl	$2567483615, %edi
.L28:
	movq	(%rax,%rdx,8), %rsi
	incq	%rdx
	movq	(%rax,%rdx,8), %rcx
	andq	$-2147483648, %rsi
	andl	$2147483647, %ecx
	orq	%rsi, %rcx
	movq	%rcx, %rsi
	shrq	%rsi
	xorq	-1824(%rax,%rdx,8), %rsi
	andl	$1, %ecx
	je	.L27
	movq	%rdi, %rcx
.L27:
	xorq	%rsi, %rcx
	movq	%rcx, -8(%rax,%rdx,8)
	cmpq	$623, %rdx
	jne	.L28
	movq	4984(%rax), %rdx
	movq	(%rax), %rcx
	andq	$-2147483648, %rdx
	andl	$2147483647, %ecx
	orq	%rcx, %rdx
	movq	%rdx, %rcx
	shrq	%rcx
	xorq	3168(%rax), %rcx
	andl	$1, %edx
	je	.L29
	movl	$2567483615, %edx
.L29:
	xorq	%rcx, %rdx
	movq	%rdx, 4984(%rax)
	xorl	%edx, %edx
	movq	%rdx, 4992(%rax)
	ret
	.cfi_endproc
.LFE12305:
	.size	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv, .-_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	.section	.text._ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv,comdat
	.align 2
	.weak	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	.type	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv, @function
_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv:
.LFB12165:
	.cfi_startproc
	endbr64
	cmpq	$623, 4992(%rdi)
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	jbe	.L42
	call	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
.L42:
	movq	4992(%rbx), %rax
	leaq	1(%rax), %rdx
	movq	(%rbx,%rax,8), %rax
	movq	%rdx, 4992(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 8
	movq	%rax, %rdx
	shrq	$11, %rdx
	movl	%edx, %edx
	xorq	%rax, %rdx
	movq	%rdx, %rax
	salq	$7, %rax
	andl	$2636928640, %eax
	xorq	%rdx, %rax
	movq	%rax, %rdx
	salq	$15, %rdx
	andl	$4022730752, %edx
	xorq	%rax, %rdx
	movq	%rdx, %rax
	shrq	$18, %rax
	xorq	%rdx, %rax
	ret
	.cfi_endproc
.LFE12165:
	.size	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv, .-_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	.text
	.align 2
	.type	_ZNSt24uniform_int_distributionIiEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEiRT_RKNS0_10param_typeE.isra.0, @function
_ZNSt24uniform_int_distributionIiEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEiRT_RKNS0_10param_typeE.isra.0:
.LFB12572:
	.cfi_startproc
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movslq	%esi, %rax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rax, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movslq	%edx, %rbx
	subq	%rax, %rbx
	movl	$4294967294, %eax
	movq	%rbx, %r13
	cmpq	%rbx, %rax
	jb	.L45
	call	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	leaq	1(%rbx), %rbx
	imulq	%rbx, %rax
	movq	%rax, %rcx
	movl	%eax, %esi
	cmpl	%ebx, %eax
	jnb	.L46
	movl	%ebx, %eax
	xorl	%edx, %edx
	negl	%eax
	divl	%ebx
	movl	%edx, %r14d
.L47:
	cmpl	%r14d, %esi
	jnb	.L46
	movq	%rbp, %rdi
	call	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	imulq	%rbx, %rax
	movq	%rax, %rcx
	movl	%eax, %esi
	jmp	.L47
.L46:
	shrq	$32, %rcx
	jmp	.L49
.L45:
	movl	$4294967295, %eax
	cmpq	%rax, %rbx
	je	.L50
.L54:
	orl	$-1, %edx
	xorl	%esi, %esi
	movq	%rbp, %rdi
	call	_ZNSt24uniform_int_distributionIiEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEiRT_RKNS0_10param_typeE.isra.0
	movq	%rbp, %rdi
	movl	%eax, %ebx
	call	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	movq	%rbx, %rcx
	salq	$32, %rcx
	addq	%rax, %rcx
	setc	%al
	movzbl	%al, %eax
	cmpq	%rcx, %r13
	jb	.L54
	testq	%rax, %rax
	jne	.L54
	jmp	.L49
.L50:
	call	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	movq	%rax, %rcx
.L49:
	popq	%rbx
	.cfi_def_cfa_offset 40
	leal	(%r12,%rcx), %eax
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE12572:
	.size	_ZNSt24uniform_int_distributionIiEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEiRT_RKNS0_10param_typeE.isra.0, .-_ZNSt24uniform_int_distributionIiEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEiRT_RKNS0_10param_typeE.isra.0
	.section	.rodata.str1.1
.LC2:
	.string	"default"
	.text
	.globl	_Z4initiib
	.type	_Z4initiib, @function
_Z4initiib:
.LFB10826:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA10826
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$4096, %rsp
	.cfi_def_cfa_offset 4152
	orq	$0, (%rsp)
	subq	$4096, %rsp
	.cfi_def_cfa_offset 8248
	orq	$0, (%rsp)
	subq	$1864, %rsp
	.cfi_def_cfa_offset 10112
	movl	%edi, %r14d
	imull	%esi, %edi
	movl	%esi, %ebp
	movl	%edx, %r15d
	movq	%fs:40, %rax
	movq	%rax, 10040(%rsp)
	xorl	%eax, %eax
	leaq	5040(%rsp), %rbx
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	leaq	7+.LC2(%rip), %rdx
	leaq	5056(%rsp), %rdi
	leaq	-7(%rdx), %rsi
	movq	%rdi, 5040(%rsp)
	movq	%rax, %r12
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	5040(%rsp), %rax
	movq	%rbx, %rsi
	movq	$7, 5048(%rsp)
	movb	$0, 7(%rax)
	leaq	40(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
.LEHB0:
	call	_ZNSt13random_device7_M_initERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@PLT
.LEHE0:
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	8(%rsp), %rdi
.LEHB1:
	call	_ZNSt13random_device9_M_getvalEv@PLT
.LEHE1:
	movl	%eax, %eax
	movl	$1, %edx
	movq	%rax, 5040(%rsp)
	jmp	.L60
.L71:
	endbr64
	movq	%rax, %rbp
.L58:
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbp, %rdi
	movq	10040(%rsp), %rax
	subq	%fs:40, %rax
	je	.L76
	jmp	.L73
.L60:
	movq	-8(%rbx,%rdx,8), %rax
	movq	%rax, %rcx
	shrq	$30, %rcx
	xorq	%rcx, %rax
	imulq	$1812433253, %rax, %rax
	addl	%edx, %eax
	movq	%rax, (%rbx,%rdx,8)
	incq	%rdx
	cmpq	$624, %rdx
	jne	.L60
	movq	$624, 10032(%rsp)
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
.L61:
	cmpl	%r14d, %r9d
	jge	.L64
	movslq	%r8d, %rax
	xorl	%r13d, %r13d
	leaq	(%r12,%rax,4), %r10
.L65:
	cmpl	%r13d, %ebp
	jle	.L77
	xorl	%eax, %eax
	testb	%r15b, %r15b
	jne	.L62
	movl	$1000, %edx
	movl	$-1000, %esi
	movq	%rbx, %rdi
	movq	%r10, 24(%rsp)
	movl	%r8d, 20(%rsp)
	movl	%r9d, 16(%rsp)
	call	_ZNSt24uniform_int_distributionIiEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEiRT_RKNS0_10param_typeE.isra.0
	movq	24(%rsp), %r10
	movl	20(%rsp), %r8d
	movl	16(%rsp), %r9d
.L62:
	movl	%eax, (%r10,%r13,4)
	incq	%r13
	jmp	.L65
.L77:
	incl	%r9d
	addl	%ebp, %r8d
	jmp	.L61
.L64:
	movq	8(%rsp), %rdi
	call	_ZNSt13random_device7_M_finiEv@PLT
	movq	10040(%rsp), %rax
	subq	%fs:40, %rax
	je	.L68
	jmp	.L73
.L70:
	endbr64
	movq	%rax, %rbx
.L66:
	movq	8(%rsp), %rdi
	call	_ZNSt13random_device7_M_finiEv@PLT
	movq	%rbx, %rdi
	movq	10040(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L73
.L76:
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L73:
	call	__stack_chk_fail@PLT
.L68:
	addq	$10056, %rsp
	.cfi_def_cfa_offset 56
	movq	%r12, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10826:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA10826:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE10826-.LLSDACSB10826
.LLSDACSB10826:
	.uleb128 .LEHB0-.LFB10826
	.uleb128 .LEHE0-.LEHB0
	.uleb128 .L71-.LFB10826
	.uleb128 0
	.uleb128 .LEHB1-.LFB10826
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L70-.LFB10826
	.uleb128 0
	.uleb128 .LEHB2-.LFB10826
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE10826:
	.text
	.size	_Z4initiib, .-_Z4initiib
	.section	.rodata.str1.1
.LC3:
	.string	"Usage: ./a.out $row_A $col_A $col_B $thread_count_in_block in 1Dim direction\n"
.LC4:
	.string	"%s"
.LC5:
	.string	"CPU time (ms): %d\n"
.LC6:
	.string	"cudaMalloc failed\n"
.LC7:
	.string	"cudaMemcpyHostToDevice failed\n"
.LC8:
	.string	"cudaDeviceSynchronize failed\n"
.LC9:
	.string	"GPU time (ms): %d\n"
.LC10:
	.string	"cudaMemcpyDeviceToHost failed\n"
.LC11:
	.string	"Check integrity\n"
.LC12:
	.string	"Integrity pass!, CPU result == GPU result, all finished\n"
.LC13:
	.string	"[row_A, col_A, col_B, block_size(thread cnt), Accelerate ratio (times)]: \n"
.LC14:
	.string	"%d, %d, %d, %d, %f\n\n"
.LC15:
	.string	"cudaMallocHost failed\n"
.LC16:
	.string	"cudaMemcpyHostToDevice, pinned memory failed\n"
.LC17:
	.string	"cudaDeviceSynchronize, pinned memory failed\n"
.LC18:
	.string	"GPU time, pinned memory (ms): %d\n"
.LC19:
	.string	"cudaMemcpyDeviceToHost, pinned memory failed\n"
.LC20:
	.string	"Check integrity, pinned memory\n"
.LC21:
	.string	"Integrity pass, pinned memory!, CPU result == GPU result, all finished\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB10827:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	cmpl	$5, %edi
	je	.L79
	movq	stderr(%rip), %rdi
	leaq	.LC3(%rip), %rcx
	movl	$2, %esi
	leaq	.LC4(%rip), %rdx
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	jmp	.L96
.L79:
	movq	8(%rsi), %rdi
	movq	%rsi, %r12
	call	atoi@PLT
	movq	16(%r12), %rdi
	movl	%eax, %ebp
	call	atoi@PLT
	movq	24(%r12), %rdi
	movl	%eax, 40(%rsp)
	call	atoi@PLT
	movl	40(%rsp), %esi
	xorl	%edx, %edx
	movl	%ebp, %edi
	movl	%eax, %ebx
	call	_Z4initiib
	movl	40(%rsp), %edi
	xorl	%edx, %edx
	movl	%ebx, %esi
	movq	%rax, 24(%rsp)
	call	_Z4initiib
	movl	$1, %edx
	movl	%ebx, %esi
	movl	%ebp, %edi
	movq	%rax, 32(%rsp)
	call	_Z4initiib
	movl	$1, %edx
	movl	%ebx, %esi
	movl	%ebp, %edi
	movq	%rax, %r15
	call	_Z4initiib
	leaq	136(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	movq	32(%rsp), %r8
	movl	40(%rsp), %esi
	movl	%ebx, %edx
	movq	24(%rsp), %rcx
	movq	%r15, %r9
	movl	%ebp, %edi
	call	_Z7mul_cpuiiiPiS_S_
	leaq	152(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	movl	$1000, %esi
	movl	$2, %edi
	movq	160(%rsp), %rax
	subl	144(%rsp), %eax
	movq	152(%rsp), %rcx
	cltd
	subl	136(%rsp), %ecx
	idivl	%esi
	imull	$1000, %ecx, %ecx
	leaq	.LC5(%rip), %rsi
	addl	%ecx, %eax
	movl	%eax, %edx
	movl	%eax, 44(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %esi
	movl	$1, %edx
	movl	%ebp, %edi
	call	_Z4initiib
	xorl	%ecx, %ecx
	xorl	%esi, %esi
	movq	%rax, 48(%rsp)
.L80:
	cmpl	%ebp, %esi
	jge	.L82
	movslq	%ecx, %rax
	xorl	%edx, %edx
	salq	$2, %rax
.L83:
	cmpl	%ebx, %edx
	jge	.L101
	movl	(%r15,%rax), %edi
	movq	48(%rsp), %r10
	incl	%edx
	movl	%edi, (%r10,%rax)
	xorl	%edi, %edi
	movl	%edi, (%r15,%rax)
	addq	$4, %rax
	jmp	.L83
.L101:
	incl	%esi
	addl	%ebx, %ecx
	jmp	.L80
.L82:
	movl	40(%rsp), %eax
	leaq	64(%rsp), %rdi
	movl	%ebp, %r14d
	imull	%ebx, %r14d
	imull	%ebp, %eax
	cltq
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movl	%eax, %r13d
	movl	40(%rsp), %eax
	imull	%ebx, %eax
	cltq
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, 16(%rsp)
	call	cudaMalloc@PLT
	leaq	80(%rsp), %rdi
	movl	%eax, 56(%rsp)
	movslq	%r14d, %rax
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	movl	56(%rsp), %edx
	orl	%edx, %r13d
	orl	%eax, %r13d
	je	.L84
	leaq	.LC6(%rip), %rcx
.L97:
	movq	stderr(%rip), %rdi
	leaq	.LC4(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
.L96:
	call	exit@PLT
.L84:
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	64(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$1, %ecx
	movq	72(%rsp), %rdi
	movl	%eax, %r13d
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	80(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	movl	%eax, 56(%rsp)
	call	cudaMemcpy@PLT
	movl	56(%rsp), %edx
	leaq	.LC7(%rip), %rcx
	orl	%edx, %r13d
	orl	%eax, %r13d
	jne	.L98
	movq	32(%r12), %rdi
	call	atoi@PLT
	cvtsi2sdl	%eax, %xmm0
	call	sqrt@PLT
	leaq	136(%rsp), %rdi
	movabsq	$4294967297, %rsi
	cvttsd2sil	%xmm0, %ecx
	movq	%rsi, 116(%rsp)
	movq	%rsi, 128(%rsp)
	xorl	%esi, %esi
	imull	%ecx, %ecx
	leal	-1(%r14,%rcx), %eax
	movl	%ecx, 112(%rsp)
	cltd
	idivl	%ecx
	movl	%eax, 124(%rsp)
	call	gettimeofday@PLT
	movl	120(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	112(%rsp), %rdx
	movq	124(%rsp), %rdi
	movl	132(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L86
	movq	80(%rsp), %r9
	movq	72(%rsp), %r8
	movl	%ebx, %edx
	movl	%ebp, %edi
	movq	64(%rsp), %rcx
	movl	40(%rsp), %esi
	call	_Z42__device_stub__Z15mul_cuda_dim_1DiiiPiS_S_iiiPiS_S_
.L86:
	call	cudaDeviceSynchronize@PLT
	leaq	.LC8(%rip), %rcx
	testl	%eax, %eax
	jne	.L99
	leaq	152(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	movl	$1000, %ecx
	movq	160(%rsp), %rax
	subl	144(%rsp), %eax
	cltd
	movq	152(%rsp), %r13
	movl	$2, %edi
	subl	136(%rsp), %r13d
	idivl	%ecx
	imull	$1000, %r13d, %r13d
	leaq	.LC9(%rip), %rsi
	addl	%eax, %r13d
	xorl	%eax, %eax
	movl	%r13d, %edx
	call	__printf_chk@PLT
	movl	$1, %edx
	movl	%ebx, %esi
	movl	%ebp, %edi
	call	_Z4initiib
	movq	(%rsp), %rdx
	movq	80(%rsp), %rsi
	movl	$2, %ecx
	movq	%rax, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC10(%rip), %rcx
	testl	%eax, %eax
	jne	.L100
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	cvtsi2ssl	44(%rsp), %xmm2
	movq	32(%r12), %rdi
	cvtsi2ssl	%r13d, %xmm1
	movaps	%xmm2, %xmm0
	movss	%xmm2, 44(%rsp)
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movsd	%xmm0, 56(%rsp)
	call	atoi@PLT
	movl	40(%rsp), %ecx
	movl	%ebx, %r8d
	movl	%ebp, %edx
	movsd	56(%rsp), %xmm0
	movl	%eax, %r9d
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC14(%rip), %rsi
	call	__printf_chk@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rsi
	leaq	88(%rsp), %rdi
	call	cudaMallocHost@PLT
	movq	16(%rsp), %rsi
	leaq	96(%rsp), %rdi
	movl	%eax, %r13d
	call	cudaMallocHost@PLT
	movq	(%rsp), %rsi
	leaq	104(%rsp), %rdi
	movl	%eax, %r14d
	call	cudaMallocHost@PLT
	orl	%r14d, %r13d
	leaq	.LC15(%rip), %rcx
	orl	%eax, %r13d
	jne	.L97
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	88(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$1, %ecx
	movq	96(%rsp), %rdi
	movl	%eax, %r13d
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	104(%rsp), %rdi
	movq	%r15, %rsi
	movl	%eax, %r14d
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	orl	%r14d, %r13d
	orl	%eax, %r13d
	je	.L90
	leaq	.LC16(%rip), %rcx
.L98:
	movq	stderr(%rip), %rdi
	leaq	.LC4(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$2, %edi
	jmp	.L96
.L90:
	xorl	%esi, %esi
	leaq	136(%rsp), %rdi
	call	gettimeofday@PLT
	movl	120(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	112(%rsp), %rdx
	movq	124(%rsp), %rdi
	movl	132(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L91
	movq	104(%rsp), %r9
	movq	96(%rsp), %r8
	movl	%ebx, %edx
	movl	%ebp, %edi
	movq	88(%rsp), %rcx
	movl	40(%rsp), %esi
	call	_Z42__device_stub__Z15mul_cuda_dim_1DiiiPiS_S_iiiPiS_S_
.L91:
	call	cudaDeviceSynchronize@PLT
	testl	%eax, %eax
	je	.L92
	leaq	.LC17(%rip), %rcx
.L99:
	movq	stderr(%rip), %rdi
	leaq	.LC4(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$3, %edi
	jmp	.L96
.L92:
	xorl	%esi, %esi
	leaq	152(%rsp), %rdi
	call	gettimeofday@PLT
	movl	$1000, %ecx
	movq	160(%rsp), %rax
	subl	144(%rsp), %eax
	cltd
	movq	152(%rsp), %r13
	movl	$2, %edi
	subl	136(%rsp), %r13d
	idivl	%ecx
	imull	$1000, %r13d, %r13d
	leaq	.LC18(%rip), %rsi
	addl	%eax, %r13d
	xorl	%eax, %eax
	movl	%r13d, %edx
	call	__printf_chk@PLT
	movl	$1, %edx
	movl	%ebx, %esi
	movl	%ebp, %edi
	call	_Z4initiib
	movq	(%rsp), %rdx
	movq	104(%rsp), %rsi
	movl	$2, %ecx
	movq	%rax, %rdi
	movq	%rax, %r14
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L93
	leaq	.LC19(%rip), %rcx
.L100:
	movq	stderr(%rip), %rdi
	leaq	.LC4(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$4, %edi
	jmp	.L96
.L93:
	leaq	.LC20(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC21(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	cvtsi2ssl	%r13d, %xmm1
	movss	44(%rsp), %xmm0
	movq	32(%r12), %rdi
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movsd	%xmm0, (%rsp)
	call	atoi@PLT
	movsd	(%rsp), %xmm0
	movl	40(%rsp), %ecx
	movl	%ebp, %edx
	movl	%eax, %r9d
	movl	%ebx, %r8d
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC14(%rip), %rsi
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	free@PLT
	movq	%r15, %rdi
	call	free@PLT
	movq	88(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	96(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	104(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	48(%rsp), %rdi
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L94
	call	__stack_chk_fail@PLT
.L94:
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10827:
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// CUDA blockDim, gridDim configured as method 2 in https://blog.csdn.net/yongjiankuang/article/details/90180559

#include <bits/stdc++.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>

using namespace std;

void mul_cpu(int row_A, int col_A, int col_B, int* mat_A, int* mat_B, int* mat_C){
    for(int i = 0; i < row_A; i++){
        for(int j = 0; j < col_B; j++){
            for(int k = 0; k < col_A; k++){
                mat_C[i * col_B + j] += mat_A[i * col_A + k] * mat_B[k * col_B + j];
            }
        }
    }
}

__global__ void mul_cuda(int row_A, int col_A, int col_B, int* mat_A_CUDA, int* mat_B_CUDA, int* mat_C_CUDA){
    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;

    if(row < row_A && col < col_B && row >= 0 && col >= 0){
        for(int k = 0; k < col_A; k++){
            mat_C_CUDA[row * col_B + col] += mat_A_CUDA[row * col_A + k] * mat_B_CUDA[k * col_B + col];
        }        
    }
}

__global__ void mul_cuda_dim_1D(int row_A, int col_A, int col_B, int* mat_A_CUDA, int* mat_B_CUDA, int* mat_C_CUDA){
    int offset = blockIdx.x * blockDim.x + threadIdx.x;
    int row = offset / row_A;
    int col = offset % col_B;

    if(row < row_A && col < col_B && row >= 0 && col >= 0){
        for(int k = 0; k < col_A; k++){
            mat_C_CUDA[row * col_B + col] += mat_A_CUDA[row * col_A + k] * mat_B_CUDA[k * col_B + col];
        }        
    }
}

int* init(int row, int col, bool is_C){
    int* mat = (int *)malloc(row * col * sizeof(int ));

    random_device rd;
    mt19937 generator(rd());
    uniform_int_distribution<int> unif(-1000, 1000);

    for(int i = 0; i < row; i++){
        for(int j = 0; j < col; j++){
            mat[i * col + j] = is_C ? 0 : unif(generator);
        }
    }

    return mat;
}

int main(int argc, char* argv[]){
    /*-------------- CPU init ------------*/
    int row_A, col_A, col_B;
    int* mat_A;
    int* mat_B;
    int* mat_C;
    int* mat_A_CUDA;
    int* mat_B_CUDA;
    int* mat_C_CUDA;
    int* mat_A_CUDA_pinned;
    int* mat_B_CUDA_pinned;
    int* mat_C_CUDA_pinned;
    int* res_CPU;
    int* res_GPU;

    if(argc != 5){
        fprintf(stderr, "%s", "Usage: ./a.out $row_A $col_A $col_B $thread_count_in_block in 1Dim direction\n");
        exit(-1);
    }

    row_A = atoi(argv[1]);
    col_A = atoi(argv[2]);
    col_B = atoi(argv[3]);
    assert(row_A > 0 && col_A > 0 && col_B > 0);

    mat_A = init(row_A, col_A, false);
    mat_B = init(col_A, col_B, false);
    mat_C = init(row_A, col_B, true);
    res_CPU = init(row_A, col_B, true);

    /*-------------- CPU run -------------*/
    struct timeval start, end;
    gettimeofday(&start, 0);
    mul_cpu(row_A, col_A, col_B, mat_A, mat_B, mat_C);
    gettimeofday(&end, 0);
    int sec = end.tv_sec - start.tv_sec;
    int usec = end.tv_usec - start.tv_usec;
    int t_cpu = sec * 1000 + (usec / 1000);
    printf("CPU time (ms): %d\n", t_cpu);

    /*------------- Clear ---------------*/
    res_CPU = init(row_A, col_B, true);
    for(int i = 0; i < row_A; i++){
        for(int j = 0; j < col_B; j++){
            res_CPU[i * col_B + j] = mat_C[i * col_B + j];
            mat_C[i * col_B + j] = 0;
        }
    }

    /*-------------- CUDA init ------------*/
    hipError_t ce_A, ce_B, ce_C;

    ce_A = hipMalloc((void**) &mat_A_CUDA, row_A * col_A * sizeof(int));
    ce_B = hipMalloc((void**) &mat_B_CUDA, col_A * col_B * sizeof(int));
    ce_C = hipMalloc((void**) &mat_C_CUDA, row_A * col_B * sizeof(int));
    if( ce_A != hipSuccess ||
        ce_B != hipSuccess || 
        ce_C != hipSuccess){
        fprintf(stderr, "%s", "hipMalloc failed\n");
        exit(1);
    }

    ce_A = hipMemcpy(mat_A_CUDA, mat_A, row_A * col_A * sizeof(int), hipMemcpyHostToDevice);
    ce_B = hipMemcpy(mat_B_CUDA, mat_B, col_A * col_B * sizeof(int), hipMemcpyHostToDevice);
    ce_C = hipMemcpy(mat_C_CUDA, mat_C, row_A * col_B * sizeof(int), hipMemcpyHostToDevice);
    if( ce_A != hipSuccess ||
        ce_B != hipSuccess || 
        ce_C != hipSuccess){
        fprintf(stderr, "%s", "hipMemcpyHostToDevice failed\n");
        exit(2);
    }

    const int THREAD_SQRT = (int)sqrt(atoi(argv[4]));
    // const dim3 dimBlock(THREAD_SQRT, THREAD_SQRT);
    // const dim3 dimGrid((col_B + THREAD_SQRT - 1) / THREAD_SQRT, (row_A + THREAD_SQRT - 1) / THREAD_SQRT); // ceiling

    const dim3 dimBlock(THREAD_SQRT * THREAD_SQRT);
    const dim3 dimGrid((col_B * row_A + THREAD_SQRT * THREAD_SQRT - 1) / (THREAD_SQRT * THREAD_SQRT));

    /*-------------- CUDA run -------------*/
    gettimeofday(&start, 0);
    mul_cuda_dim_1D<<<dimGrid, dimBlock>>>(row_A, col_A, col_B, mat_A_CUDA, mat_B_CUDA, mat_C_CUDA);
    hipError_t ce_K; // cuda error for kernel
    ce_K = hipDeviceSynchronize();
    if(ce_K != hipSuccess){
        fprintf(stderr, "%s", "hipDeviceSynchronize failed\n");
        exit(3);
    }
    gettimeofday(&end, 0);
    sec = end.tv_sec - start.tv_sec;
    usec = end.tv_usec - start.tv_usec;
    int t_gpu = sec * 1000 + (usec / 1000);
    printf("GPU time (ms): %d\n", t_gpu);

    /*------- Check integrity -------------*/
    res_GPU = init(row_A, col_B, true);
    ce_C = hipMemcpy(res_GPU, mat_C_CUDA, row_A * col_B * sizeof(int), hipMemcpyDeviceToHost);
    if(ce_C != hipSuccess){
        fprintf(stderr, "%s", "hipMemcpyDeviceToHost failed\n");
        exit(4);
    }

    printf("Check integrity\n");
    for(int i = 0; i < row_A; i++){
        for(int j = 0; j < col_B; j++){
            assert(res_CPU[i * col_B + j] == res_GPU[i * col_B + j]);
        }
    }
    printf("Integrity pass!, CPU result == GPU result, all finished\n");
    printf("[row_A, col_A, col_B, block_size(thread cnt), Accelerate ratio (times)]: \n");
    printf("%d, %d, %d, %d, %f\n\n", row_A, col_A, col_B, atoi(argv[4]), (float)t_cpu / (float)t_gpu);

    /*------- Clear memory -------------*/
    hipFree(mat_A_CUDA);
    hipFree(mat_B_CUDA);
    hipFree(mat_C_CUDA);
    
    /*-------------- CUDA init, pinned mem -*/ 

    ce_A = hipHostMalloc((void**) &mat_A_CUDA_pinned, row_A * col_A * sizeof(int), hipHostMallocDefault);
    ce_B = hipHostMalloc((void**) &mat_B_CUDA_pinned, col_A * col_B * sizeof(int), hipHostMallocDefault);
    ce_C = hipHostMalloc((void**) &mat_C_CUDA_pinned, row_A * col_B * sizeof(int), hipHostMallocDefault);
    if( ce_A != hipSuccess ||
        ce_B != hipSuccess || 
        ce_C != hipSuccess){
        fprintf(stderr, "%s", "hipHostMalloc failed\n");
        exit(1);
    }

    ce_A = hipMemcpy(mat_A_CUDA_pinned, mat_A, row_A * col_A * sizeof(int), hipMemcpyHostToDevice);
    ce_B = hipMemcpy(mat_B_CUDA_pinned, mat_B, col_A * col_B * sizeof(int), hipMemcpyHostToDevice);
    ce_C = hipMemcpy(mat_C_CUDA_pinned, mat_C, row_A * col_B * sizeof(int), hipMemcpyHostToDevice);
    if( ce_A != hipSuccess ||
        ce_B != hipSuccess || 
        ce_C != hipSuccess){
        fprintf(stderr, "%s", "cudaMemcpyHostToDevice, pinned memory failed\n");
        exit(2);
    }

    /*-------------- CUDA run, pinned mem -*/ 
    gettimeofday(&start, 0);
    mul_cuda_dim_1D<<<dimGrid, dimBlock>>>(row_A, col_A, col_B, mat_A_CUDA_pinned, mat_B_CUDA_pinned, mat_C_CUDA_pinned);
    ce_K = hipDeviceSynchronize();
    if(ce_K != hipSuccess){
        fprintf(stderr, "%s", "cudaDeviceSynchronize, pinned memory failed\n");
        exit(3);
    }
    gettimeofday(&end, 0);
    sec = end.tv_sec - start.tv_sec;
    usec = end.tv_usec - start.tv_usec;
    t_gpu = sec * 1000 + (usec / 1000);
    printf("GPU time, pinned memory (ms): %d\n", t_gpu);

    /*------- Check integrity, pinned mem -*/
    res_GPU = init(row_A, col_B, true);
    ce_C = hipMemcpy(res_GPU, mat_C_CUDA_pinned, row_A * col_B * sizeof(int), hipMemcpyDeviceToHost);
    if(ce_C != hipSuccess){
        fprintf(stderr, "%s", "cudaMemcpyDeviceToHost, pinned memory failed\n");
        exit(4);
    }

    printf("Check integrity, pinned memory\n");
    for(int i = 0; i < row_A; i++){
        for(int j = 0; j < col_B; j++){
            assert(res_CPU[i * col_B + j] == res_GPU[i * col_B + j]);
        }
    }
    printf("Integrity pass, pinned memory!, CPU result == GPU result, all finished\n");
    printf("[row_A, col_A, col_B, block_size(thread cnt), Accelerate ratio (times)]: \n");
    printf("%d, %d, %d, %d, %f\n\n", row_A, col_A, col_B, atoi(argv[4]), (float)t_cpu / (float)t_gpu);

    /*------- Clear memory -------------*/
    free(mat_A);
    free(mat_B);
    free(mat_C);
    hipHostFree(mat_A_CUDA_pinned);
    hipHostFree(mat_B_CUDA_pinned);
    hipHostFree(mat_C_CUDA_pinned);
    free(res_CPU);
    free(res_GPU);

    return 0;
}

	.text
	.file	"main_1D.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z7mul_cpuiiiPiS_S_             # -- Begin function _Z7mul_cpuiiiPiS_S_
	.type	_Z7mul_cpuiiiPiS_S_,@function
_Z7mul_cpuiiiPiS_S_:                    # @_Z7mul_cpuiiiPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, -8(%rsp)                   # 8-byte Spill
	movq	%r8, -16(%rsp)                  # 8-byte Spill
	movq	%rcx, -24(%rsp)                 # 8-byte Spill
	movl	%edx, -36(%rsp)                 # 4-byte Spill
	testl	%edi, %edi
	jle	.LBB0_9
# %bb.1:                                # %.preheader24.lr.ph
	movslq	-36(%rsp), %rax                 # 4-byte Folded Reload
	movl	%edi, %edx
	movl	%eax, %r10d
	movl	%esi, %r11d
	movq	%rax, -32(%rsp)                 # 8-byte Spill
	leaq	(,%rax,4), %rbx
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB0_2:                                # %.preheader24
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
                                        #       Child Loop BB0_6 Depth 3
	cmpl	$0, -36(%rsp)                   # 4-byte Folded Reload
	jle	.LBB0_8
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB0_2 Depth=1
	movl	%r14d, %eax
	movq	-24(%rsp), %rcx                 # 8-byte Reload
	leaq	(%rcx,%rax,4), %r12
	movq	%r15, %rax
	imulq	-32(%rsp), %rax                 # 8-byte Folded Reload
	movq	-8(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r13
	movq	-16(%rsp), %r8                  # 8-byte Reload
	xorl	%eax, %eax
.LBB0_4:                                # %.preheader
                                        #   Parent Loop BB0_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_6 Depth 3
	testl	%esi, %esi
	jle	.LBB0_7
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB0_4 Depth=2
	movl	(%r13,%rax,4), %r9d
	movq	%r8, %rbp
	xorl	%ecx, %ecx
.LBB0_6:                                #   Parent Loop BB0_2 Depth=1
                                        #     Parent Loop BB0_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%rbp), %edi
	imull	(%r12,%rcx,4), %edi
	addl	%edi, %r9d
	movl	%r9d, (%r13,%rax,4)
	incq	%rcx
	addq	%rbx, %rbp
	cmpq	%rcx, %r11
	jne	.LBB0_6
.LBB0_7:                                # %._crit_edge
                                        #   in Loop: Header=BB0_4 Depth=2
	incq	%rax
	addq	$4, %r8
	cmpq	%r10, %rax
	jne	.LBB0_4
.LBB0_8:                                # %._crit_edge27
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%r15
	addl	%esi, %r14d
	cmpq	%rdx, %r15
	jne	.LBB0_2
.LBB0_9:                                # %._crit_edge29
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z7mul_cpuiiiPiS_S_, .Lfunc_end0-_Z7mul_cpuiiiPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__mul_cudaiiiPiS_S_ # -- Begin function _Z23__device_stub__mul_cudaiiiPiS_S_
	.type	_Z23__device_stub__mul_cudaiiiPiS_S_,@function
_Z23__device_stub__mul_cudaiiiPiS_S_:   # @_Z23__device_stub__mul_cudaiiiPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	56(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8mul_cudaiiiPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z23__device_stub__mul_cudaiiiPiS_S_, .Lfunc_end1-_Z23__device_stub__mul_cudaiiiPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__mul_cuda_dim_1DiiiPiS_S_ # -- Begin function _Z30__device_stub__mul_cuda_dim_1DiiiPiS_S_
	.type	_Z30__device_stub__mul_cuda_dim_1DiiiPiS_S_,@function
_Z30__device_stub__mul_cuda_dim_1DiiiPiS_S_: # @_Z30__device_stub__mul_cuda_dim_1DiiiPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	56(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15mul_cuda_dim_1DiiiPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z30__device_stub__mul_cuda_dim_1DiiiPiS_S_, .Lfunc_end2-_Z30__device_stub__mul_cuda_dim_1DiiiPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z4initiib                      # -- Begin function _Z4initiib
	.type	_Z4initiib,@function
_Z4initiib:                             # @_Z4initiib
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$10040, %rsp                    # imm = 0x2738
	.cfi_def_cfa_offset 10096
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movl	%esi, %r13d
	movl	%edi, %r15d
	movl	%esi, %eax
	imull	%edi, %eax
	movslq	%eax, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	leaq	5040(%rsp), %r12
	movq	%r12, %rdi
	callq	_ZNSt13random_deviceC2Ev
.Ltmp0:
	movq	%r12, %rdi
	callq	_ZNSt13random_device9_M_getvalEv
.Ltmp1:
# %bb.1:                                # %_ZNSt13random_deviceclEv.exit
	movl	%eax, %eax
	movq	%rax, 40(%rsp)
	movl	$1, %ecx
.LBB3_2:                                # =>This Inner Loop Header: Depth=1
	movq	%rax, %rdx
	shrq	$30, %rdx
	xorl	%eax, %edx
	imull	$1812433253, %edx, %eax         # imm = 0x6C078965
	addl	%ecx, %eax
	movq	%rax, 40(%rsp,%rcx,8)
	incq	%rcx
	cmpq	$624, %rcx                      # imm = 0x270
	jne	.LBB3_2
# %bb.3:
	movq	$624, 5032(%rsp)                # imm = 0x270
	movabsq	$4299262262296, %rax            # imm = 0x3E8FFFFFC18
	movq	%rax, 32(%rsp)
	testl	%r15d, %r15d
	jle	.LBB3_11
# %bb.4:                                # %.preheader.lr.ph
	movl	%r15d, %eax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	%r13d, %r14d
	xorl	%eax, %eax
	movq	%rax, (%rsp)                    # 8-byte Spill
	leaq	32(%rsp), %r12
	xorl	%ebp, %ebp
	movl	%r13d, 12(%rsp)                 # 4-byte Spill
.LBB3_5:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_7 Depth 2
	testl	%r13d, %r13d
	jle	.LBB3_10
# %bb.6:                                # %.lr.ph
                                        #   in Loop: Header=BB3_5 Depth=1
	movl	(%rsp), %eax                    # 4-byte Reload
	movq	16(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r15
	xorl	%r13d, %r13d
.LBB3_7:                                #   Parent Loop BB3_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorl	%eax, %eax
	testb	%bl, %bl
	jne	.LBB3_9
# %bb.8:                                #   in Loop: Header=BB3_7 Depth=2
.Ltmp3:
	movq	%r12, %rdi
	leaq	40(%rsp), %rsi
	movq	%r12, %rdx
	callq	_ZNSt24uniform_int_distributionIiEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEiRT_RKNS0_10param_typeE
.Ltmp4:
.LBB3_9:                                # %_ZNSt24uniform_int_distributionIiEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEiRT_.exit
                                        #   in Loop: Header=BB3_7 Depth=2
	movl	%eax, (%r15,%r13,4)
	incq	%r13
	cmpq	%r13, %r14
	jne	.LBB3_7
.LBB3_10:                               # %._crit_edge
                                        #   in Loop: Header=BB3_5 Depth=1
	incq	%rbp
	movl	12(%rsp), %r13d                 # 4-byte Reload
	movq	(%rsp), %rax                    # 8-byte Reload
	addl	%r13d, %eax
	movq	%rax, (%rsp)                    # 8-byte Spill
	cmpq	24(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB3_5
.LBB3_11:                               # %._crit_edge25
.Ltmp9:
	leaq	5040(%rsp), %rdi
	callq	_ZNSt13random_device7_M_finiEv
.Ltmp10:
# %bb.12:                               # %_ZNSt13random_deviceD2Ev.exit
	movq	16(%rsp), %rax                  # 8-byte Reload
	addq	$10040, %rsp                    # imm = 0x2738
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_13:
	.cfi_def_cfa_offset 10096
.Ltmp11:
	jmp	.LBB3_14
.LBB3_15:
.Ltmp2:
	jmp	.LBB3_17
.LBB3_16:
.Ltmp5:
.LBB3_17:
	movq	%rax, %rbx
.Ltmp6:
	leaq	5040(%rsp), %rdi
	callq	_ZNSt13random_device7_M_finiEv
.Ltmp7:
# %bb.18:                               # %_ZNSt13random_deviceD2Ev.exit22
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.LBB3_19:
.Ltmp8:
.LBB3_14:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end3:
	.size	_Z4initiib, .Lfunc_end3-_Z4initiib
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table3:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp10-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp10
	.uleb128 .Ltmp11-.Lfunc_begin0          #     jumps to .Ltmp11
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin0           #     jumps to .Ltmp8
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp7-.Lfunc_begin0           # >> Call Site 6 <<
	.uleb128 .Lfunc_end3-.Ltmp7             #   Call between .Ltmp7 and .Lfunc_end3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt13random_deviceC2Ev,"axG",@progbits,_ZNSt13random_deviceC2Ev,comdat
	.weak	_ZNSt13random_deviceC2Ev        # -- Begin function _ZNSt13random_deviceC2Ev
	.p2align	1, 0x90
	.type	_ZNSt13random_deviceC2Ev,@function
_ZNSt13random_deviceC2Ev:               # @_ZNSt13random_deviceC2Ev
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	leaq	16(%rsp), %r15
	movq	%r15, -16(%r15)
	movq	%rsp, %r14
	movl	$.L.str.19, %esi
	movl	$.L.str.19+7, %edx
	movq	%r14, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
.Ltmp12:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ZNSt13random_device7_M_initERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.Ltmp13:
# %bb.1:
	movq	(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB4_3
# %bb.2:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB4_3:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB4_4:
	.cfi_def_cfa_offset 64
.Ltmp14:
	movq	%rax, %rbx
	movq	(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB4_6
# %bb.5:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i4
	callq	_ZdlPv
.LBB4_6:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit6
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end4:
	.size	_ZNSt13random_deviceC2Ev, .Lfunc_end4-_ZNSt13random_deviceC2Ev
	.cfi_endproc
	.section	.gcc_except_table._ZNSt13random_deviceC2Ev,"aG",@progbits,_ZNSt13random_deviceC2Ev,comdat
	.p2align	2, 0x0
GCC_except_table4:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp12-.Lfunc_begin1          #   Call between .Lfunc_begin1 and .Ltmp12
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin1          # >> Call Site 2 <<
	.uleb128 .Ltmp13-.Ltmp12                #   Call between .Ltmp12 and .Ltmp13
	.uleb128 .Ltmp14-.Lfunc_begin1          #     jumps to .Ltmp14
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp13-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Lfunc_end4-.Ltmp13            #   Call between .Ltmp13 and .Lfunc_end4
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$5, %edi
	jne	.LBB5_43
# %bb.1:
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %r13d
	movq	%rbx, 48(%rsp)                  # 8-byte Spill
	movq	24(%rbx), %rdi
	callq	atoi
	movl	%eax, %r15d
	xorl	%ebx, %ebx
	movl	%ebp, %edi
	movl	%r13d, %esi
	xorl	%edx, %edx
	callq	_Z4initiib
	movq	%rax, %r14
	movl	%r13d, %edi
	movl	%r15d, %esi
	xorl	%edx, %edx
	callq	_Z4initiib
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	%ebp, %edi
	movl	%r15d, %esi
	movl	$1, %edx
	callq	_Z4initiib
	movq	%rax, %r12
	movl	%ebp, %edi
	movl	%r15d, %esi
	movl	$1, %edx
	callq	_Z4initiib
	leaq	80(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movl	%ebp, %edi
	movl	%r13d, 4(%rsp)                  # 4-byte Spill
	movl	%r13d, %esi
	movl	%r15d, %edx
	movq	%r14, 40(%rsp)                  # 8-byte Spill
	movq	%r14, %rcx
	movq	8(%rsp), %r8                    # 8-byte Reload
	movq	%r12, 16(%rsp)                  # 8-byte Spill
	movq	%r12, %r9
	callq	_Z7mul_cpuiiiPiS_S_
	leaq	152(%rsp), %r13
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movl	(%r13), %eax
	movl	8(%r13), %ecx
	movl	%ebp, %r13d
	leaq	80(%rsp), %rdx
	subl	(%rdx), %eax
	subl	8(%rdx), %ecx
	imull	$1000, %eax, %eax               # imm = 0x3E8
	movslq	%ecx, %rcx
	imulq	$274877907, %rcx, %rbp          # imm = 0x10624DD3
	movq	%rbp, %rcx
	shrq	$63, %rcx
	sarq	$38, %rbp
	addl	%ecx, %ebp
	addl	%eax, %ebp
	movl	$.L.str.2, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%r13d, %edi
	movl	%r15d, %esi
	movl	$1, %edx
	callq	_Z4initiib
	movq	%rax, %r12
	testl	%r13d, %r13d
	jle	.LBB5_7
# %bb.2:                                # %.preheader209.lr.ph
	movl	%r13d, %eax
	movl	%r15d, %ecx
	xorl	%edx, %edx
.LBB5_3:                                # %.preheader209
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_5 Depth 2
	testl	%r15d, %r15d
	jle	.LBB5_6
# %bb.4:                                # %.lr.ph
                                        #   in Loop: Header=BB5_3 Depth=1
	movl	%ebx, %edi
	leaq	(%r12,%rdi,4), %rsi
	movq	16(%rsp), %r8                   # 8-byte Reload
	leaq	(%r8,%rdi,4), %rdi
	xorl	%r8d, %r8d
.LBB5_5:                                #   Parent Loop BB5_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rdi,%r8,4), %r9d
	movl	%r9d, (%rsi,%r8,4)
	movl	$0, (%rdi,%r8,4)
	incq	%r8
	cmpq	%r8, %rcx
	jne	.LBB5_5
.LBB5_6:                                # %._crit_edge
                                        #   in Loop: Header=BB5_3 Depth=1
	incq	%rdx
	addl	%r15d, %ebx
	cmpq	%rax, %rdx
	jne	.LBB5_3
.LBB5_7:                                # %._crit_edge212
	movl	4(%rsp), %r14d                  # 4-byte Reload
	movl	%r14d, %eax
	imull	%r13d, %eax
	movslq	%eax, %rsi
	shlq	$2, %rsi
	leaq	120(%rsp), %rdi
	movq	%rsi, 72(%rsp)                  # 8-byte Spill
	callq	hipMalloc
	movl	%eax, %ebx
	movl	%r15d, %eax
	imull	%r14d, %eax
	movslq	%eax, %rsi
	shlq	$2, %rsi
	leaq	112(%rsp), %rdi
	movq	%rsi, 64(%rsp)                  # 8-byte Spill
	callq	hipMalloc
	movl	%eax, %r14d
	movl	%r13d, %eax
	movl	%r15d, %r13d
	movl	%eax, 132(%rsp)                 # 4-byte Spill
	imull	%eax, %r13d
	movslq	%r13d, %rsi
	shlq	$2, %rsi
	leaq	32(%rsp), %rdi
	movq	%rsi, 56(%rsp)                  # 8-byte Spill
	callq	hipMalloc
	testl	%ebx, %ebx
	jne	.LBB5_10
# %bb.8:                                # %._crit_edge212
	testl	%r14d, %r14d
	jne	.LBB5_10
# %bb.9:                                # %._crit_edge212
	testl	%eax, %eax
	jne	.LBB5_10
# %bb.12:
	movq	120(%rsp), %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	72(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %ebx
	movq	112(%rsp), %rdi
	movq	8(%rsp), %rsi                   # 8-byte Reload
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %r14d
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%ebx, %ebx
	jne	.LBB5_15
# %bb.13:
	testl	%r14d, %r14d
	jne	.LBB5_15
# %bb.14:
	testl	%eax, %eax
	jne	.LBB5_15
# %bb.17:
	movabsq	$4294967296, %rbx               # imm = 0x100000000
	movq	48(%rsp), %rax                  # 8-byte Reload
	movq	32(%rax), %rdi
	callq	atoi
	cvtsi2sd	%eax, %xmm0
	xorpd	%xmm1, %xmm1
	ucomisd	%xmm1, %xmm0
	jb	.LBB5_19
# %bb.18:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB5_20
.LBB5_19:                               # %call.sqrt
	callq	sqrt
.LBB5_20:                               # %.split
	cvttsd2si	%xmm0, %r14d
	imull	%r14d, %r14d
	leal	(%r14,%r13), %eax
	decl	%eax
	cltd
	idivl	%r14d
	movl	%eax, %r13d
	orq	%rbx, %r14
	orq	%rbx, %r13
	leaq	80(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	%r13, 136(%rsp)                 # 8-byte Spill
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r14, 144(%rsp)                 # 8-byte Spill
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movl	132(%rsp), %r13d                # 4-byte Reload
	jne	.LBB5_22
# %bb.21:
	movq	120(%rsp), %rcx
	movq	112(%rsp), %r8
	movq	32(%rsp), %r9
	movl	%r13d, %edi
	movl	4(%rsp), %esi                   # 4-byte Reload
	movl	%r15d, %edx
	callq	_Z30__device_stub__mul_cuda_dim_1DiiiPiS_S_
.LBB5_22:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB5_23
# %bb.25:
	leaq	152(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movl	(%rbx), %eax
	movl	8(%rbx), %ecx
	subl	80(%rsp), %eax
	subl	88(%rsp), %ecx
	imull	$1000, %eax, %eax               # imm = 0x3E8
	movslq	%ecx, %rcx
	imulq	$274877907, %rcx, %r14          # imm = 0x10624DD3
	movq	%r14, %rcx
	shrq	$63, %rcx
	sarq	$38, %r14
	addl	%ecx, %r14d
	addl	%eax, %r14d
	movl	$.L.str.6, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%r13d, %edi
	movl	%r15d, %esi
	movl	$1, %edx
	callq	_Z4initiib
	movq	32(%rsp), %rsi
	movq	%rax, %rdi
	movl	%r13d, %ebx
	movq	56(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_26
# %bb.28:                               # %._crit_edge214
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movq	48(%rsp), %rax                  # 8-byte Reload
	movq	32(%rax), %rdi
	callq	atoi
	cvtsi2ss	%ebp, %xmm1
	cvtsi2ss	%r14d, %xmm0
	movss	%xmm1, 128(%rsp)                # 4-byte Spill
	divss	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	movl	$.L.str.11, %edi
	movl	%ebx, %r14d
	movl	%ebx, %esi
	movl	4(%rsp), %edx                   # 4-byte Reload
	movl	%r15d, %ecx
	movl	%eax, %r8d
	movb	$1, %al
	callq	printf
	movq	120(%rsp), %rdi
	callq	hipFree
	movq	112(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	leaq	104(%rsp), %rdi
	movq	72(%rsp), %rsi                  # 8-byte Reload
	xorl	%edx, %edx
	callq	hipHostMalloc
	movl	%eax, %ebx
	leaq	96(%rsp), %rdi
	movq	64(%rsp), %rsi                  # 8-byte Reload
	xorl	%edx, %edx
	callq	hipHostMalloc
	movl	%eax, %ebp
	leaq	24(%rsp), %rdi
	movq	%r13, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	testl	%ebx, %ebx
	jne	.LBB5_31
# %bb.29:                               # %._crit_edge214
	testl	%ebp, %ebp
	jne	.LBB5_31
# %bb.30:                               # %._crit_edge214
	testl	%eax, %eax
	jne	.LBB5_31
# %bb.32:
	movq	104(%rsp), %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	72(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %ebx
	movq	96(%rsp), %rdi
	movq	8(%rsp), %rsi                   # 8-byte Reload
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %ebp
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%ebx, %ebx
	jne	.LBB5_35
# %bb.33:
	testl	%ebp, %ebp
	jne	.LBB5_35
# %bb.34:
	testl	%eax, %eax
	jne	.LBB5_35
# %bb.36:
	leaq	80(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	136(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movq	144(%rsp), %rdx                 # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movl	%r14d, %r13d
	jne	.LBB5_38
# %bb.37:
	movq	104(%rsp), %rcx
	movq	96(%rsp), %r8
	movq	24(%rsp), %r9
	movl	%r13d, %edi
	movl	4(%rsp), %esi                   # 4-byte Reload
	movl	%r15d, %edx
	callq	_Z30__device_stub__mul_cuda_dim_1DiiiPiS_S_
.LBB5_38:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB5_39
# %bb.40:
	leaq	152(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movl	(%rbx), %eax
	movl	8(%rbx), %ecx
	subl	80(%rsp), %eax
	subl	88(%rsp), %ecx
	imull	$1000, %eax, %eax               # imm = 0x3E8
	movslq	%ecx, %rcx
	imulq	$274877907, %rcx, %rbp          # imm = 0x10624DD3
	movq	%rbp, %rcx
	shrq	$63, %rcx
	sarq	$38, %rbp
	addl	%ecx, %ebp
	addl	%eax, %ebp
	movl	$.L.str.15, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%r13d, %edi
	movl	%r15d, %esi
	movl	$1, %edx
	callq	_Z4initiib
	movq	%rax, %r14
	movq	24(%rsp), %rsi
	movq	%rax, %rdi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_41
# %bb.42:                               # %._crit_edge216
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movq	48(%rsp), %rax                  # 8-byte Reload
	movq	32(%rax), %rdi
	callq	atoi
	cvtsi2ss	%ebp, %xmm0
	movss	128(%rsp), %xmm1                # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	movl	$.L.str.11, %edi
	movl	%r13d, %esi
	movl	4(%rsp), %edx                   # 4-byte Reload
	movl	%r15d, %ecx
	movl	%eax, %r8d
	movb	$1, %al
	callq	printf
	movq	40(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	8(%rsp), %rdi                   # 8-byte Reload
	callq	free
	movq	16(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	104(%rsp), %rdi
	callq	hipHostFree
	movq	96(%rsp), %rdi
	callq	hipHostFree
	movq	24(%rsp), %rdi
	callq	hipHostFree
	movq	%r12, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_43:
	.cfi_def_cfa_offset 224
	movq	stderr(%rip), %rsi
	movl	$.L.str.1, %edi
	callq	fputs@PLT
	movl	$-1, %edi
	callq	exit
.LBB5_10:
	movq	stderr(%rip), %rsi
	movl	$.L.str.3, %edi
	jmp	.LBB5_11
.LBB5_15:
	movq	stderr(%rip), %rsi
	movl	$.L.str.4, %edi
	jmp	.LBB5_16
.LBB5_23:
	movq	stderr(%rip), %rsi
	movl	$.L.str.5, %edi
	jmp	.LBB5_24
.LBB5_26:
	movq	stderr(%rip), %rsi
	movl	$.L.str.7, %edi
	jmp	.LBB5_27
.LBB5_31:
	movq	stderr(%rip), %rsi
	movl	$.L.str.12, %edi
.LBB5_11:
	callq	fputs@PLT
	movl	$1, %edi
	callq	exit
.LBB5_35:
	movq	stderr(%rip), %rsi
	movl	$.L.str.13, %edi
.LBB5_16:
	callq	fputs@PLT
	movl	$2, %edi
	callq	exit
.LBB5_39:
	movq	stderr(%rip), %rsi
	movl	$.L.str.14, %edi
.LBB5_24:
	callq	fputs@PLT
	movl	$3, %edi
	callq	exit
.LBB5_41:
	movq	stderr(%rip), %rsi
	movl	$.L.str.16, %edi
.LBB5_27:
	callq	fputs@PLT
	movl	$4, %edi
	callq	exit
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB6_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB6_3
.LBB6_1:                                # %._crit_edge
	movq	(%rbx), %rax
.LBB6_3:
	testq	%r14, %r14
	je	.LBB6_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB6_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB6_7
.LBB6_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB6_7:                                # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end6-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.section	.text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat
	.hidden	__clang_call_terminate          # -- Begin function __clang_call_terminate
	.weak	__clang_call_terminate
	.type	__clang_call_terminate,@function
__clang_call_terminate:                 # @__clang_call_terminate
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__cxa_begin_catch
	callq	_ZSt9terminatev
.Lfunc_end7:
	.size	__clang_call_terminate, .Lfunc_end7-__clang_call_terminate
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt24uniform_int_distributionIiEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEiRT_RKNS0_10param_typeE,"axG",@progbits,_ZNSt24uniform_int_distributionIiEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEiRT_RKNS0_10param_typeE,comdat
	.weak	_ZNSt24uniform_int_distributionIiEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEiRT_RKNS0_10param_typeE # -- Begin function _ZNSt24uniform_int_distributionIiEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEiRT_RKNS0_10param_typeE
	.p2align	1, 0x90
	.type	_ZNSt24uniform_int_distributionIiEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEiRT_RKNS0_10param_typeE,@function
_ZNSt24uniform_int_distributionIiEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEiRT_RKNS0_10param_typeE: # @_ZNSt24uniform_int_distributionIiEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEiRT_RKNS0_10param_typeE
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movslq	4(%rdx), %r15
	movq	%rdx, 8(%rsp)                   # 8-byte Spill
	movslq	(%rdx), %rax
	subq	%rax, %r15
	movl	$4294967294, %eax               # imm = 0xFFFFFFFE
	cmpq	%rax, %r15
	ja	.LBB8_2
# %bb.1:
	incl	%r15d
	movq	%r14, %rdi
	movl	%r15d, %esi
	callq	_ZNSt24uniform_int_distributionIiE5_S_ndImSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEjEET1_RT0_S4_
	movl	%eax, %eax
	jmp	.LBB8_7
.LBB8_2:
	movl	$4294967295, %eax               # imm = 0xFFFFFFFF
	cmpq	%rax, %r15
	jne	.LBB8_3
# %bb.6:
	movq	%r14, %rdi
	callq	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	jmp	.LBB8_7
.LBB8_3:                                # %.preheader
	movq	%rdi, %r12
	movabsq	$-4294967296, %rbx              # imm = 0xFFFFFFFF00000000
	leaq	16(%rsp), %r13
.LBB8_4:                                # =>This Inner Loop Header: Depth=1
	movq	%rbx, 16(%rsp)
	movq	%r12, %rdi
	movq	%r14, %rsi
	movq	%r13, %rdx
	callq	_ZNSt24uniform_int_distributionIiEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEiRT_RKNS0_10param_typeE
	movl	%eax, %ebp
	shlq	$32, %rbp
	movq	%r14, %rdi
	callq	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	addq	%rbp, %rax
	setb	%cl
	cmpq	%r15, %rax
	ja	.LBB8_4
# %bb.5:                                #   in Loop: Header=BB8_4 Depth=1
	testb	%cl, %cl
	jne	.LBB8_4
.LBB8_7:                                # %.loopexit
	movq	8(%rsp), %rcx                   # 8-byte Reload
	addl	(%rcx), %eax
                                        # kill: def $eax killed $eax killed $rax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_ZNSt24uniform_int_distributionIiEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEiRT_RKNS0_10param_typeE, .Lfunc_end8-_ZNSt24uniform_int_distributionIiEclISt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEEEiRT_RKNS0_10param_typeE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt24uniform_int_distributionIiE5_S_ndImSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEjEET1_RT0_S4_,"axG",@progbits,_ZNSt24uniform_int_distributionIiE5_S_ndImSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEjEET1_RT0_S4_,comdat
	.weak	_ZNSt24uniform_int_distributionIiE5_S_ndImSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEjEET1_RT0_S4_ # -- Begin function _ZNSt24uniform_int_distributionIiE5_S_ndImSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEjEET1_RT0_S4_
	.p2align	1, 0x90
	.type	_ZNSt24uniform_int_distributionIiE5_S_ndImSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEjEET1_RT0_S4_,@function
_ZNSt24uniform_int_distributionIiE5_S_ndImSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEjEET1_RT0_S4_: # @_ZNSt24uniform_int_distributionIiE5_S_ndImSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEjEET1_RT0_S4_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movq	%rdi, %rbx
	callq	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	movq	%rax, %rcx
	movl	%ebp, %r14d
	imulq	%r14, %rcx
	cmpl	%ebp, %ecx
	jae	.LBB9_4
# %bb.1:
	movl	%ebp, %eax
	negl	%eax
	xorl	%edx, %edx
	divl	%ebp
	cmpl	%ecx, %edx
	jbe	.LBB9_4
# %bb.2:                                # %.lr.ph.preheader
	movl	%edx, %ebp
.LBB9_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	callq	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	movq	%rax, %rcx
	imulq	%r14, %rcx
	cmpl	%ecx, %ebp
	ja	.LBB9_3
.LBB9_4:                                # %.loopexit
	shrq	$32, %rcx
	movl	%ecx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_ZNSt24uniform_int_distributionIiE5_S_ndImSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEjEET1_RT0_S4_, .Lfunc_end9-_ZNSt24uniform_int_distributionIiE5_S_ndImSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEjEET1_RT0_S4_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv,comdat
	.weak	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv # -- Begin function _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	.p2align	1, 0x90
	.type	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv,@function
_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv: # @_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	4992(%rdi), %rax
	cmpq	$624, %rax                      # imm = 0x270
	jb	.LBB10_2
# %bb.1:
	movq	%rbx, %rdi
	callq	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	movq	4992(%rbx), %rax
.LBB10_2:
	leaq	1(%rax), %rcx
	movq	%rcx, 4992(%rbx)
	movq	(%rbx,%rax,8), %rax
	movq	%rax, %rcx
	shrq	$11, %rcx
	movl	%ecx, %ecx
	xorq	%rax, %rcx
	movl	%ecx, %eax
	shll	$7, %eax
	andl	$-1658038656, %eax              # imm = 0x9D2C5680
	xorq	%rcx, %rax
	movl	%eax, %ecx
	shll	$15, %ecx
	andl	$-272236544, %ecx               # imm = 0xEFC60000
	xorq	%rax, %rcx
	movq	%rcx, %rax
	shrq	$18, %rax
	xorq	%rcx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv, .Lfunc_end10-_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,comdat
	.weak	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv # -- Begin function _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	.p2align	1, 0x90
	.type	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,@function
_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv: # @_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	.cfi_startproc
# %bb.0:
	movl	$2567483615, %eax               # imm = 0x9908B0DF
	movq	(%rdi), %rdx
	xorl	%ecx, %ecx
.LBB11_1:                               # =>This Inner Loop Header: Depth=1
	andq	$-2147483648, %rdx              # imm = 0x80000000
	movq	8(%rdi,%rcx,8), %rsi
	movl	%esi, %r8d
	andl	$2147483646, %r8d               # imm = 0x7FFFFFFE
	orq	%rdx, %r8
	shrq	%r8
	xorq	3176(%rdi,%rcx,8), %r8
	movq	%rsi, %rdx
                                        # kill: def $esi killed $esi killed $rsi def $rsi
	andl	$1, %esi
	negl	%esi
	andl	%eax, %esi
	xorq	%r8, %rsi
	movq	%rsi, (%rdi,%rcx,8)
	leaq	1(%rcx), %rsi
	movq	%rsi, %rcx
	cmpq	$227, %rsi
	jne	.LBB11_1
# %bb.2:                                # %.preheader.preheader
	movq	1816(%rdi), %rdx
	movl	$228, %ecx
.LBB11_3:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	andq	$-2147483648, %rdx              # imm = 0x80000000
	movq	(%rdi,%rcx,8), %rsi
	movl	%esi, %r8d
	andl	$2147483646, %r8d               # imm = 0x7FFFFFFE
	orq	%rdx, %r8
	shrq	%r8
	xorq	-1824(%rdi,%rcx,8), %r8
	movq	%rsi, %rdx
                                        # kill: def $esi killed $esi killed $rsi def $rsi
	andl	$1, %esi
	negl	%esi
	andl	%eax, %esi
	xorq	%r8, %rsi
	movq	%rsi, -8(%rdi,%rcx,8)
	incq	%rcx
	cmpq	$624, %rcx                      # imm = 0x270
	jne	.LBB11_3
# %bb.4:
	movq	$-2147483648, %rcx              # imm = 0x80000000
	andq	4984(%rdi), %rcx
	movq	(%rdi), %rdx
	movl	%edx, %esi
	andl	$2147483646, %esi               # imm = 0x7FFFFFFE
	orq	%rcx, %rsi
	shrq	%rsi
	xorq	3168(%rdi), %rsi
	andl	$1, %edx
	negl	%edx
	andl	%eax, %edx
	xorq	%rsi, %rdx
	movq	%rdx, 4984(%rdi)
	movq	$0, 4992(%rdi)
	retq
.Lfunc_end11:
	.size	_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv, .Lfunc_end11-_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB12_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB12_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8mul_cudaiiiPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15mul_cuda_dim_1DiiiPiS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end12:
	.size	__hip_module_ctor, .Lfunc_end12-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB13_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB13_2:
	retq
.Lfunc_end13:
	.size	__hip_module_dtor, .Lfunc_end13-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8mul_cudaiiiPiS_S_,@object    # @_Z8mul_cudaiiiPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z8mul_cudaiiiPiS_S_
	.p2align	3, 0x0
_Z8mul_cudaiiiPiS_S_:
	.quad	_Z23__device_stub__mul_cudaiiiPiS_S_
	.size	_Z8mul_cudaiiiPiS_S_, 8

	.type	_Z15mul_cuda_dim_1DiiiPiS_S_,@object # @_Z15mul_cuda_dim_1DiiiPiS_S_
	.globl	_Z15mul_cuda_dim_1DiiiPiS_S_
	.p2align	3, 0x0
_Z15mul_cuda_dim_1DiiiPiS_S_:
	.quad	_Z30__device_stub__mul_cuda_dim_1DiiiPiS_S_
	.size	_Z15mul_cuda_dim_1DiiiPiS_S_, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Usage: ./a.out $row_A $col_A $col_B $thread_count_in_block in 1Dim direction\n"
	.size	.L.str.1, 78

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"CPU time (ms): %d\n"
	.size	.L.str.2, 19

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"hipMalloc failed\n"
	.size	.L.str.3, 18

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"hipMemcpyHostToDevice failed\n"
	.size	.L.str.4, 30

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"hipDeviceSynchronize failed\n"
	.size	.L.str.5, 29

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"GPU time (ms): %d\n"
	.size	.L.str.6, 19

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"hipMemcpyDeviceToHost failed\n"
	.size	.L.str.7, 30

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"%d, %d, %d, %d, %f\n\n"
	.size	.L.str.11, 21

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"hipHostMalloc failed\n"
	.size	.L.str.12, 22

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"cudaMemcpyHostToDevice, pinned memory failed\n"
	.size	.L.str.13, 46

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"cudaDeviceSynchronize, pinned memory failed\n"
	.size	.L.str.14, 45

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"GPU time, pinned memory (ms): %d\n"
	.size	.L.str.15, 34

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"cudaMemcpyDeviceToHost, pinned memory failed\n"
	.size	.L.str.16, 46

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"default"
	.size	.L.str.19, 8

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8mul_cudaiiiPiS_S_"
	.size	.L__unnamed_1, 21

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15mul_cuda_dim_1DiiiPiS_S_"
	.size	.L__unnamed_2, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Check integrity"
	.size	.Lstr, 16

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Integrity pass!, CPU result == GPU result, all finished"
	.size	.Lstr.1, 56

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Check integrity, pinned memory"
	.size	.Lstr.3, 31

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Integrity pass, pinned memory!, CPU result == GPU result, all finished"
	.size	.Lstr.4, 71

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"[row_A, col_A, col_B, block_size(thread cnt), Accelerate ratio (times)]: "
	.size	.Lstr.5, 74

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__mul_cudaiiiPiS_S_
	.addrsig_sym _Z30__device_stub__mul_cuda_dim_1DiiiPiS_S_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z8mul_cudaiiiPiS_S_
	.addrsig_sym _Z15mul_cuda_dim_1DiiiPiS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8mul_cudaiiiPiS_S_    ; -- Begin function _Z8mul_cudaiiiPiS_S_
	.globl	_Z8mul_cudaiiiPiS_S_
	.p2align	8
	.type	_Z8mul_cudaiiiPiS_S_,@function
_Z8mul_cudaiiiPiS_S_:                   ; @_Z8mul_cudaiiiPiS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[4:5], null, s15, s3, v[1:2]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s4, v4
	s_cbranch_execz .LBB0_4
; %bb.1:
	v_and_b32_e32 v2, 0x3ff, v0
	s_and_b32 s2, s2, 0xffff
	s_cmp_gt_i32 s5, 0
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_or_b32_e32 v1, v0, v4
	v_cmp_gt_i32_e64 s2, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_lt_i32_e32 vcc_lo, -1, v1
	s_and_b32 s3, vcc_lo, s3
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_4
; %bb.2:                                ; %.lr.ph
	s_load_b64 s[2:3], s[0:1], 0x20
	v_mad_u64_u32 v[1:2], null, v4, s6, v[0:1]
	v_mul_lo_u32 v4, v4, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_load_b128 s[0:3], s[0:1], 0x10
	global_load_b32 v6, v[2:3], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s5, s5, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s5, 0
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_nc_u32_e32 v0, s6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s2, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo
	global_load_b32 v1, v[4:5], off
	global_load_b32 v9, v[7:8], off
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v9, v1, v[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v6, v7
	global_store_b32 v[2:3], v7, off
	s_cbranch_scc1 .LBB0_3
.LBB0_4:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8mul_cudaiiiPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8mul_cudaiiiPiS_S_, .Lfunc_end0-_Z8mul_cudaiiiPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 372
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z15mul_cuda_dim_1DiiiPiS_S_ ; -- Begin function _Z15mul_cuda_dim_1DiiiPiS_S_
	.globl	_Z15mul_cuda_dim_1DiiiPiS_S_
	.p2align	8
	.type	_Z15mul_cuda_dim_1DiiiPiS_S_,@function
_Z15mul_cuda_dim_1DiiiPiS_S_:           ; @_Z15mul_cuda_dim_1DiiiPiS_S_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s2, s[0:1], 0x34
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s3, s4, 31
	s_and_b32 s2, s2, 0xffff
	s_add_i32 s7, s4, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s7, s7, s3
	v_cvt_f32_u32_e32 v1, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v3, v1
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_sub_i32 s2, 0, s7
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v2, s2, v3
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v0, 31, v1
	v_mul_hi_u32 v4, v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v1, v0
	v_xor_b32_e32 v2, v1, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v3, v4
	v_mul_hi_u32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v1, s7
	v_add_nc_u32_e32 v4, 1, v1
	v_sub_nc_u32_e32 v3, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_subrev_nc_u32_e32 v5, s7, v3
	v_cmp_le_u32_e32 vcc_lo, s7, v3
	v_cndmask_b32_e32 v1, v1, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v3, v3, v5, vcc_lo
	v_xor_b32_e32 v5, s3, v0
	v_add_nc_u32_e32 v4, 1, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s7, v3
	v_cndmask_b32_e32 v1, v1, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v1, v1, v5
	v_sub_nc_u32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB1_4
; %bb.1:
	s_ashr_i32 s2, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s6, s2
	s_xor_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v3, s2
	s_sub_i32 s3, 0, s2
	s_cmp_gt_i32 s5, 0
	v_rcp_iflag_f32_e32 v3, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x4f7ffffe, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v3, v3
	v_mul_lo_u32 v4, s3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v4
	v_add_nc_u32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v2, v3
	v_mul_lo_u32 v3, v3, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v3
	v_subrev_nc_u32_e32 v3, s2, v2
	v_cmp_le_u32_e32 vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	v_subrev_nc_u32_e32 v3, s2, v2
	v_cmp_le_u32_e32 vcc_lo, s2, v2
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	v_xor_b32_e32 v2, v2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v2, v0
	v_or3_b32 v2, v1, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v2
	s_and_b32 s2, vcc_lo, s2
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB1_4
; %bb.2:                                ; %.lr.ph
	s_load_b64 s[2:3], s[0:1], 0x20
	v_mad_u64_u32 v[2:3], null, v1, s6, v[0:1]
	v_mul_lo_u32 v4, v1, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_load_b128 s[0:3], s[0:1], 0x10
	global_load_b32 v6, v[2:3], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s5, s5, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s5, 0
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_nc_u32_e32 v0, s6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s2, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo
	global_load_b32 v1, v[4:5], off
	global_load_b32 v9, v[7:8], off
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v9, v1, v[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v6, v7
	global_store_b32 v[2:3], v7, off
	s_cbranch_scc1 .LBB1_3
.LBB1_4:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15mul_cuda_dim_1DiiiPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15mul_cuda_dim_1DiiiPiS_S_, .Lfunc_end1-_Z15mul_cuda_dim_1DiiiPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 648
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8mul_cudaiiiPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8mul_cudaiiiPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15mul_cuda_dim_1DiiiPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15mul_cuda_dim_1DiiiPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
