/* 

The solution.

*/

#include <sys/time.h>
#include <ctype.h>
#include <math.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <unistd.h>

// Number of times to run the test (for better timings accuracy):
#define NTESTS 100

// Number of threads in one block (possible range is 32...1024):
#define BLOCK_SIZE 128

// Total number of threads (total number of elements to process in the kernel):
#define NMAX 1000000

// Number of chunks (NMAX should be dividable by NCHUNKS):
#define NCHUNKS 10


/* Subtract the `struct timeval' values X and Y,
   storing the result in RESULT.
   Return 1 if the difference is negative, otherwise 0.  */

// It messes up with y!

int
timeval_subtract (double *result, struct timeval *x, struct timeval *y)
{
  struct timeval result0;

  /* Perform the carry for the later subtraction by updating y. */
  if (x->tv_usec < y->tv_usec) {
    int nsec = (y->tv_usec - x->tv_usec) / 1000000 + 1;
    y->tv_usec -= 1000000 * nsec;
    y->tv_sec += nsec;
  }
  if (x->tv_usec - y->tv_usec > 1000000) {
    int nsec = (y->tv_usec - x->tv_usec) / 1000000;
    y->tv_usec += 1000000 * nsec;
    y->tv_sec -= nsec;
  }

  /* Compute the time remaining to wait.
     tv_usec is certainly positive. */
  result0.tv_sec = x->tv_sec - y->tv_sec;
  result0.tv_usec = x->tv_usec - y->tv_usec;
  *result = ((double)result0.tv_usec)/1e6 + (double)result0.tv_sec;

  /* Return 1 if result is negative. */
  return x->tv_sec < y->tv_sec;
}


//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++


// The kernel:
__global__ void MyKernel (double *d_A, double *d_B, int ind, int Ntot)
{
  double x, y, z;

  // Local index:
  int i0 = threadIdx.x + blockDim.x * blockIdx.x;

  if (i0 >= Ntot)
    return;

  // Global index is shifted by ind:
  int i = ind + i0;
  // Some meaningless cpu-intensive computation:

  x = pow(d_A[i], 2.71);
  y = pow(d_A[i], 0.35);
  z = 2*x + 5*y;
  d_B[i] = x + y + z + x*y + x/y + y/z;

  return;
}

//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

int main (int argc,char **argv)
{
  struct timeval  tdr0, tdr1, tdr;
  double restime;
  int devid, devcount, error, Max_gridsize;
  double *h_A, *h_B, *d_A, *d_B;
  cudaStream_t  ID[2];

  /* find number of device in current "context" */
  cudaGetDevice(&devid);
  /* find how many devices are available */
  if (cudaGetDeviceCount(&devcount) || devcount==0)
    {
      printf ("No CUDA devices!\n");
      exit (1);
    }
  else
    {
      cudaDeviceProp deviceProp; 
      cudaGetDeviceProperties (&deviceProp, devid);
      printf ("Device count, devid: %d %d\n", devcount, devid);
      printf ("Device: %s\n", deviceProp.name);
      printf("[deviceProp.major.deviceProp.minor] = [%d.%d]\n\n", deviceProp.major, deviceProp.minor);
      Max_gridsize = deviceProp.maxGridSize[0];
    }

// Loop to run the timing test multiple times:
int kk;
for (kk=0; kk<NTESTS; kk++)
{

  // Using cudaMallocHost (intead of malloc) to accelerate data copying:  
  // Initial data array on host:
  if (error = cudaMallocHost (&h_A, NMAX*sizeof(double)))
    {
      printf ("Error %d\n", error);
      exit (error);
    }
  // Results array on host:
  if (error = cudaMallocHost (&h_B, NMAX*sizeof(double)))
    {
      printf ("Error %d\n", error);
      exit (error);
    }

  // ALlocating arrays on GPU:
  if (error = cudaMalloc (&d_A, NMAX*sizeof(double)))
    {
      printf ("Error %d\n", error);
      exit (error);
    }
  if (error = cudaMalloc (&d_B, NMAX*sizeof(double)))
    {
      printf ("Error %d\n", error);
      exit (error);
    }

  // Initializing the input array:
  for (int i=0; i<NMAX; i++)
    {
      h_A[i] = (double)rand()/(double)RAND_MAX;
    }

  // Creating streams:
  for (int i = 0; i < 2; ++i)
    cudaStreamCreate (&ID[i]);

  // Number of threads in a chunk:
  int Ntot = NMAX / NCHUNKS;

  // Number of blocks of threads in a chunk:
  int Nblocks = (Ntot+BLOCK_SIZE-1) / BLOCK_SIZE;
  if (Nblocks > Max_gridsize)
    {
      printf ("Nblocks > Max_gridsize!  %d  %d\n", Nblocks, Max_gridsize);
      exit (1);
    }

  if (error = cudaDeviceSynchronize())
    {
      printf ("Error %d\n", error);
      exit (error);
    }
  gettimeofday (&tdr0, NULL);
  //--------------------------------------------------------------------------------


  for (int j=0; j<NCHUNKS; j++)
    {

      // Starting global index for this chunk:
      int ind = Ntot * j;

      // Copying the j-th chunk to device - asynchronous relative to the host and stream ID[0] kernel (processing the previous chunk in parallel)
      if (error = cudaMemcpyAsync (&d_A[ind], &h_A[ind], Ntot*sizeof(double), cudaMemcpyHostToDevice, ID[1]))
	{
	  printf ("Error %d\n", error);
	  exit (error);
	}
      
      // This global synchronization between both streams and host ensures that the kernel can only start 
      // when the previous chunk copying is finished.
      // This also ensures that at j=0 kernel will not start untill the first chunk is copied.
      if (error = cudaDeviceSynchronize())
	{
	  printf ("Error %d\n", error);
	  exit (error);
	} 

      // The kernel call:
      MyKernel <<<Nblocks, BLOCK_SIZE, 0, ID[0]>>> (d_A, d_B, ind, Ntot);
      
    }


  //--------------------------------------------------------------------------------
  if (error = cudaDeviceSynchronize())
    {
      printf ("Error %d\n", error);
      exit (error);
    }
  gettimeofday (&tdr1, NULL);
  tdr = tdr0;
  timeval_subtract (&restime, &tdr1, &tdr);

  // Copying the result back to host (we don't time it):
  if (error = cudaMemcpy (h_B, d_B, NMAX*sizeof(double), cudaMemcpyDeviceToHost))
    {
      printf ("Error %d\n", error);
      exit (error);
    }

  if (error = cudaDeviceSynchronize())
    {
      printf ("Error %d\n", error);
      exit (error);
    }

  // Adding up the results, for accuracy/correctness testing:
  double result = 0.0;
  for (int i=0; i<NMAX; i++)
    {
      result += h_B[i];
    }

  printf ("Result: %e\n\n", result);
  printf ("Time: %e\n", restime);

  cudaFreeHost (h_A);
  cudaFreeHost (h_B);
  cudaFree (d_A);
  cudaFree (d_B);

} // kk loop

  return 0;

}

	.file	"tmpxft_002f27d0_00000000-6_staged2.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2044:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2044:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z16timeval_subtractPdP7timevalS1_
	.type	_Z16timeval_subtractPdP7timevalS1_, @function
_Z16timeval_subtractPdP7timevalS1_:
.LFB2040:
	.cfi_startproc
	endbr64
	movq	%rdx, %rcx
	movq	8(%rsi), %rdx
	movq	8(%rcx), %r8
	cmpq	%r8, %rdx
	jge	.L3
	movq	%r8, %rax
	movl	$1000000, %r9d
	subq	%rdx, %rax
	cqto
	idivq	%r9
	incl	%eax
	imull	$1000000, %eax, %edx
	cltq
	addq	%rax, (%rcx)
	movslq	%edx, %rdx
	subq	%rdx, %r8
	movq	%r8, 8(%rcx)
.L3:
	movq	8(%rsi), %rdx
	movq	8(%rcx), %r8
	movq	%rdx, %rax
	subq	%r8, %rax
	cmpq	$1000000, %rax
	jle	.L4
	movq	%r8, %rax
	movl	$1000000, %r9d
	subq	%rdx, %rax
	cqto
	idivq	%r9
	imull	$1000000, %eax, %edx
	cltq
	subq	%rax, (%rcx)
	movslq	%edx, %rdx
	addq	%r8, %rdx
	movq	%rdx, 8(%rcx)
.L4:
	movq	(%rsi), %r8
	movq	(%rcx), %rdx
	movq	8(%rsi), %rax
	subq	8(%rcx), %rax
	cvtsi2sdq	%rax, %xmm0
	movq	%r8, %rax
	divsd	.LC0(%rip), %xmm0
	subq	%rdx, %rax
	cvtsi2sdq	%rax, %xmm1
	xorl	%eax, %eax
	cmpq	%rdx, %r8
	setl	%al
	addsd	%xmm1, %xmm0
	movsd	%xmm0, (%rdi)
	ret
	.cfi_endproc
.LFE2040:
	.size	_Z16timeval_subtractPdP7timevalS1_, .-_Z16timeval_subtractPdP7timevalS1_
	.globl	_Z31__device_stub__Z8MyKernelPdS_iiPdS_ii
	.type	_Z31__device_stub__Z8MyKernelPdS_iiPdS_ii, @function
_Z31__device_stub__Z8MyKernelPdS_iiPdS_ii:
.LFB2066:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8MyKernelPdS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L6:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2066:
	.size	_Z31__device_stub__Z8MyKernelPdS_iiPdS_ii, .-_Z31__device_stub__Z8MyKernelPdS_iiPdS_ii
	.globl	_Z8MyKernelPdS_ii
	.type	_Z8MyKernelPdS_ii, @function
_Z8MyKernelPdS_ii:
.LFB2067:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z8MyKernelPdS_iiPdS_ii
	.cfi_endproc
.LFE2067:
	.size	_Z8MyKernelPdS_ii, .-_Z8MyKernelPdS_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Device count, devid: %d %d\n"
.LC3:
	.string	"Device: %s\n"
.LC4:
	.string	"[deviceProp.major.deviceProp.minor] = [%d.%d]\n\n"
.LC5:
	.string	"No CUDA devices!\n"
.LC6:
	.string	"Error %d\n"
.LC8:
	.string	"Nblocks > Max_gridsize!  %d  %d\n"
.LC9:
	.string	"Result: %e\n\n"
.LC10:
	.string	"Time: %e\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2041:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1192, %rsp
	.cfi_def_cfa_offset 1248
	movq	%fs:40, %rax
	movq	%rax, 1176(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rdi
	call	cudaGetDevice@PLT
	leaq	28(%rsp), %rdi
	call	cudaGetDeviceCount@PLT
	testl	%eax, %eax
	jne	.L12
	cmpl	$0, 28(%rsp)
	je	.L12
	leaq	144(%rsp), %rax
	movl	24(%rsp), %esi
	movl	$100, %ebp
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	cudaGetDeviceProperties_v2@PLT
	movl	24(%rsp), %ecx
	movl	28(%rsp), %edx
	xorl	%eax, %eax
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	8(%rsp), %rdx
	leaq	.LC3(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	508(%rsp), %ecx
	movl	$2, %edi
	xorl	%eax, %eax
	movl	504(%rsp), %edx
	leaq	.LC4(%rip), %rsi
	call	__printf_chk@PLT
	movl	480(%rsp), %r13d
	jmp	.L13
.L12:
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L37
.L18:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L36
	leaq	96(%rsp), %rdi
	xorl	%esi, %esi
	xorl	%r14d, %r14d
	xorl	%ebx, %ebx
	call	gettimeofday@PLT
	movabsq	$4294967424, %r15
.L23:
	movq	40(%rsp), %rsi
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movl	$800000, %edx
	movq	152(%rsp), %r8
	addq	%rbx, %rsi
	addq	%rbx, %rdi
	call	cudaMemcpyAsync@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L38
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	jne	.L38
	movl	$2147484039, %edi
	xorl	%r8d, %r8d
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	144(%rsp), %r9
	addq	%rdi, %rdi
	movl	$1, %esi
	movq	%r15, 84(%rsp)
	movl	$1, 92(%rsp)
	movq	%rdi, 72(%rsp)
	movl	$1, 80(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	movl	$100000, %ecx
	movl	%r14d, %edx
	call	_Z31__device_stub__Z8MyKernelPdS_iiPdS_ii
.L22:
	addq	$800000, %rbx
	addl	$100000, %r14d
	cmpq	$8000000, %rbx
	jne	.L23
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L36
	leaq	112(%rsp), %rbx
	xorl	%esi, %esi
	movq	%rbx, %rdi
	call	gettimeofday@PLT
	movups	96(%rsp), %xmm1
	movq	%rbx, %rsi
	leaq	128(%rsp), %rdx
	leaq	32(%rsp), %rdi
	movups	%xmm1, 128(%rsp)
	call	_Z16timeval_subtractPdP7timevalS1_
	movq	64(%rsp), %rsi
	movq	48(%rsp), %rdi
	movl	$2, %ecx
	movl	$8000000, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L36
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L36
	movq	48(%rsp), %rdx
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
.L27:
	addsd	(%rdx,%rax,8), %xmm0
	incq	%rax
	cmpq	$1000000, %rax
	jne	.L27
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movsd	32(%rsp), %xmm0
	leaq	.LC10(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	40(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	48(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	decl	%ebp
	je	.L39
.L13:
	leaq	40(%rsp), %rdi
	xorl	%edx, %edx
	movl	$8000000, %esi
	call	cudaHostAlloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L14
.L36:
	movl	$2, %edi
	movl	%ebx, %edx
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edi
.L35:
	call	exit@PLT
.L14:
	leaq	48(%rsp), %rdi
	xorl	%edx, %edx
	movl	$8000000, %esi
	call	cudaHostAlloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L36
	leaq	56(%rsp), %rdi
	movl	$8000000, %esi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L36
	leaq	64(%rsp), %rdi
	movl	$8000000, %esi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L36
	xorl	%ebx, %ebx
.L17:
	call	rand@PLT
	cvtsi2sdl	%eax, %xmm0
	movq	40(%rsp), %rax
	divsd	.LC7(%rip), %xmm0
	movsd	%xmm0, (%rax,%rbx)
	addq	$8, %rbx
	cmpq	$8000000, %rbx
	jne	.L17
	movq	8(%rsp), %rdi
	call	cudaStreamCreate@PLT
	leaq	152(%rsp), %rdi
	call	cudaStreamCreate@PLT
	cmpl	$781, %r13d
	jg	.L18
	movl	%r13d, %ecx
	movl	$782, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC8(%rip), %rsi
	call	__printf_chk@PLT
.L37:
	movl	$1, %edi
	jmp	.L35
.L38:
	movl	$2, %edi
	movl	%r12d, %edx
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%r12d, %edi
	jmp	.L35
.L39:
	movq	1176(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$1192, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2041:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z8MyKernelPdS_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2069:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z8MyKernelPdS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2069:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1093567616
	.align 8
.LC7:
	.long	-4194304
	.long	1105199103
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/* 

The solution.

*/


#include <hip/hip_runtime.h>
#include <sys/time.h>
#include <ctype.h>
#include <math.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <unistd.h>

// Number of times to run the test (for better timings accuracy):
#define NTESTS 100

// Number of threads in one block (possible range is 32...1024):
#define BLOCK_SIZE 128

// Total number of threads (total number of elements to process in the kernel):
#define NMAX 1000000

// Number of chunks (NMAX should be dividable by NCHUNKS):
#define NCHUNKS 10


/* Subtract the `struct timeval' values X and Y,
   storing the result in RESULT.
   Return 1 if the difference is negative, otherwise 0.  */

// It messes up with y!

int
timeval_subtract (double *result, struct timeval *x, struct timeval *y)
{
  struct timeval result0;

  /* Perform the carry for the later subtraction by updating y. */
  if (x->tv_usec < y->tv_usec) {
    int nsec = (y->tv_usec - x->tv_usec) / 1000000 + 1;
    y->tv_usec -= 1000000 * nsec;
    y->tv_sec += nsec;
  }
  if (x->tv_usec - y->tv_usec > 1000000) {
    int nsec = (y->tv_usec - x->tv_usec) / 1000000;
    y->tv_usec += 1000000 * nsec;
    y->tv_sec -= nsec;
  }

  /* Compute the time remaining to wait.
     tv_usec is certainly positive. */
  result0.tv_sec = x->tv_sec - y->tv_sec;
  result0.tv_usec = x->tv_usec - y->tv_usec;
  *result = ((double)result0.tv_usec)/1e6 + (double)result0.tv_sec;

  /* Return 1 if result is negative. */
  return x->tv_sec < y->tv_sec;
}


//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++


// The kernel:
__global__ void MyKernel (double *d_A, double *d_B, int ind, int Ntot)
{
  double x, y, z;

  // Local index:
  int i0 = threadIdx.x + blockDim.x * blockIdx.x;

  if (i0 >= Ntot)
    return;

  // Global index is shifted by ind:
  int i = ind + i0;
  // Some meaningless cpu-intensive computation:

  x = pow(d_A[i], 2.71);
  y = pow(d_A[i], 0.35);
  z = 2*x + 5*y;
  d_B[i] = x + y + z + x*y + x/y + y/z;

  return;
}

//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

int main (int argc,char **argv)
{
  struct timeval  tdr0, tdr1, tdr;
  double restime;
  int devid, devcount, error, Max_gridsize;
  double *h_A, *h_B, *d_A, *d_B;
  hipStream_t  ID[2];

  /* find number of device in current "context" */
  hipGetDevice(&devid);
  /* find how many devices are available */
  if (hipGetDeviceCount(&devcount) || devcount==0)
    {
      printf ("No CUDA devices!\n");
      exit (1);
    }
  else
    {
      hipDeviceProp_t deviceProp; 
      hipGetDeviceProperties (&deviceProp, devid);
      printf ("Device count, devid: %d %d\n", devcount, devid);
      printf ("Device: %s\n", deviceProp.name);
      printf("[deviceProp.major.deviceProp.minor] = [%d.%d]\n\n", deviceProp.major, deviceProp.minor);
      Max_gridsize = deviceProp.maxGridSize[0];
    }

// Loop to run the timing test multiple times:
int kk;
for (kk=0; kk<NTESTS; kk++)
{

  // Using cudaMallocHost (intead of malloc) to accelerate data copying:  
  // Initial data array on host:
  if (error = hipHostMalloc (&h_A, NMAX*sizeof(double), hipHostMallocDefault))
    {
      printf ("Error %d\n", error);
      exit (error);
    }
  // Results array on host:
  if (error = hipHostMalloc (&h_B, NMAX*sizeof(double), hipHostMallocDefault))
    {
      printf ("Error %d\n", error);
      exit (error);
    }

  // ALlocating arrays on GPU:
  if (error = hipMalloc (&d_A, NMAX*sizeof(double)))
    {
      printf ("Error %d\n", error);
      exit (error);
    }
  if (error = hipMalloc (&d_B, NMAX*sizeof(double)))
    {
      printf ("Error %d\n", error);
      exit (error);
    }

  // Initializing the input array:
  for (int i=0; i<NMAX; i++)
    {
      h_A[i] = (double)rand()/(double)RAND_MAX;
    }

  // Creating streams:
  for (int i = 0; i < 2; ++i)
    hipStreamCreate (&ID[i]);

  // Number of threads in a chunk:
  int Ntot = NMAX / NCHUNKS;

  // Number of blocks of threads in a chunk:
  int Nblocks = (Ntot+BLOCK_SIZE-1) / BLOCK_SIZE;
  if (Nblocks > Max_gridsize)
    {
      printf ("Nblocks > Max_gridsize!  %d  %d\n", Nblocks, Max_gridsize);
      exit (1);
    }

  if (error = hipDeviceSynchronize())
    {
      printf ("Error %d\n", error);
      exit (error);
    }
  gettimeofday (&tdr0, NULL);
  //--------------------------------------------------------------------------------


  for (int j=0; j<NCHUNKS; j++)
    {

      // Starting global index for this chunk:
      int ind = Ntot * j;

      // Copying the j-th chunk to device - asynchronous relative to the host and stream ID[0] kernel (processing the previous chunk in parallel)
      if (error = hipMemcpyAsync (&d_A[ind], &h_A[ind], Ntot*sizeof(double), hipMemcpyHostToDevice, ID[1]))
	{
	  printf ("Error %d\n", error);
	  exit (error);
	}
      
      // This global synchronization between both streams and host ensures that the kernel can only start 
      // when the previous chunk copying is finished.
      // This also ensures that at j=0 kernel will not start untill the first chunk is copied.
      if (error = hipDeviceSynchronize())
	{
	  printf ("Error %d\n", error);
	  exit (error);
	} 

      // The kernel call:
      MyKernel <<<Nblocks, BLOCK_SIZE, 0, ID[0]>>> (d_A, d_B, ind, Ntot);
      
    }


  //--------------------------------------------------------------------------------
  if (error = hipDeviceSynchronize())
    {
      printf ("Error %d\n", error);
      exit (error);
    }
  gettimeofday (&tdr1, NULL);
  tdr = tdr0;
  timeval_subtract (&restime, &tdr1, &tdr);

  // Copying the result back to host (we don't time it):
  if (error = hipMemcpy (h_B, d_B, NMAX*sizeof(double), hipMemcpyDeviceToHost))
    {
      printf ("Error %d\n", error);
      exit (error);
    }

  if (error = hipDeviceSynchronize())
    {
      printf ("Error %d\n", error);
      exit (error);
    }

  // Adding up the results, for accuracy/correctness testing:
  double result = 0.0;
  for (int i=0; i<NMAX; i++)
    {
      result += h_B[i];
    }

  printf ("Result: %e\n\n", result);
  printf ("Time: %e\n", restime);

  hipHostFree (h_A);
  hipHostFree (h_B);
  hipFree (d_A);
  hipFree (d_B);

} // kk loop

  return 0;

}

	.text
	.file	"staged2.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z16timeval_subtractPdP7timevalS1_
.LCPI0_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	_Z16timeval_subtractPdP7timevalS1_
	.type	_Z16timeval_subtractPdP7timevalS1_,@function
_Z16timeval_subtractPdP7timevalS1_:     # @_Z16timeval_subtractPdP7timevalS1_
	.cfi_startproc
# %bb.0:
	movq	%rdx, %rcx
	movq	8(%rsi), %rdx
	movq	(%rcx), %r8
	movq	8(%rcx), %r9
	movq	%r9, %rax
	movabsq	$4835703278458516699, %r10      # imm = 0x431BDE82D7B634DB
	subq	%rdx, %rax
	jle	.LBB0_2
# %bb.1:
	imulq	%r10
	movq	%rdx, %rax
	shrq	$18, %rax
	shrq	$63, %rdx
	addl	%edx, %eax
	incl	%eax
	imull	$1000000, %eax, %edx            # imm = 0xF4240
	movslq	%edx, %rdx
	subq	%rdx, %r9
	movq	%r9, 8(%rcx)
	cltq
	addq	%rax, %r8
	movq	%r8, (%rcx)
	movq	8(%rsi), %rdx
.LBB0_2:
	movq	%rdx, %rax
	subq	%r9, %rax
	cmpq	$1000001, %rax                  # imm = 0xF4241
	jl	.LBB0_4
# %bb.3:
	movq	%r9, %rax
	subq	%rdx, %rax
	imulq	%r10
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$18, %rdx
	addq	%rax, %rdx
	movabsq	$4294967296000000, %r10         # imm = 0xF424000000000
	imulq	%rdx, %r10
	sarq	$32, %r10
	addq	%r9, %r10
	movq	%r10, 8(%rcx)
	movslq	%edx, %rax
	subq	%rax, %r8
	movq	%r8, (%rcx)
	movq	8(%rsi), %rax
	subq	%r10, %rax
.LBB0_4:
	movq	(%rsi), %rcx
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI0_0(%rip), %xmm0
	xorl	%eax, %eax
	subq	%r8, %rcx
	cvtsi2sd	%rcx, %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, (%rdi)
	setl	%al
	retq
.Lfunc_end0:
	.size	_Z16timeval_subtractPdP7timevalS1_, .Lfunc_end0-_Z16timeval_subtractPdP7timevalS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__MyKernelPdS_ii # -- Begin function _Z23__device_stub__MyKernelPdS_ii
	.type	_Z23__device_stub__MyKernelPdS_ii,@function
_Z23__device_stub__MyKernelPdS_ii:      # @_Z23__device_stub__MyKernelPdS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8MyKernelPdS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z23__device_stub__MyKernelPdS_ii, .Lfunc_end1-_Z23__device_stub__MyKernelPdS_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI2_0:
	.quad	0x41dfffffffc00000              # double 2147483647
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1592, %rsp                     # imm = 0x638
	.cfi_def_cfa_offset 1648
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	12(%rsp), %rdi
	callq	hipGetDevice
	leaq	8(%rsp), %rdi
	callq	hipGetDeviceCount
	testl	%eax, %eax
	jne	.LBB2_27
# %bb.1:
	cmpl	$0, 8(%rsp)
	je	.LBB2_27
# %bb.2:
	movabsq	$4294967424, %rbx               # imm = 0x100000080
	movl	12(%rsp), %esi
	leaq	120(%rsp), %r14
	movq	%r14, %rdi
	callq	hipGetDevicePropertiesR0600
	movl	8(%rsp), %esi
	movl	12(%rsp), %edx
	xorl	%ebp, %ebp
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.2, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	360(%r14), %esi
	movl	364(%r14), %edx
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movl	336(%r14), %eax
	movl	%eax, 4(%rsp)                   # 4-byte Spill
	leaq	654(%rbx), %r15
.LBB2_3:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_8 Depth 2
                                        #     Child Loop BB2_12 Depth 2
                                        #     Child Loop BB2_21 Depth 2
	movl	$8000000, %esi                  # imm = 0x7A1200
	leaq	40(%rsp), %rdi
	xorl	%edx, %edx
	callq	hipHostMalloc
	testl	%eax, %eax
	jne	.LBB2_25
# %bb.4:                                #   in Loop: Header=BB2_3 Depth=1
	movl	$8000000, %esi                  # imm = 0x7A1200
	leaq	32(%rsp), %rdi
	xorl	%edx, %edx
	callq	hipHostMalloc
	testl	%eax, %eax
	jne	.LBB2_25
# %bb.5:                                #   in Loop: Header=BB2_3 Depth=1
	movl	$8000000, %esi                  # imm = 0x7A1200
	leaq	24(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_25
# %bb.6:                                #   in Loop: Header=BB2_3 Depth=1
	movl	$8000000, %esi                  # imm = 0x7A1200
	leaq	16(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_24
# %bb.7:                                # %.preheader80.preheader
                                        #   in Loop: Header=BB2_3 Depth=1
	xorl	%r14d, %r14d
.LBB2_8:                                # %.preheader80
                                        #   Parent Loop BB2_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	.LCPI2_0(%rip), %xmm0
	movq	40(%rsp), %rax
	movsd	%xmm0, (%rax,%r14,8)
	incq	%r14
	cmpq	$1000000, %r14                  # imm = 0xF4240
	jne	.LBB2_8
# %bb.9:                                # %.preheader79
                                        #   in Loop: Header=BB2_3 Depth=1
	leaq	48(%rsp), %rdi
	callq	hipStreamCreate
	leaq	56(%rsp), %rdi
	callq	hipStreamCreate
	cmpl	$781, 4(%rsp)                   # 4-byte Folded Reload
                                        # imm = 0x30D
	jle	.LBB2_26
# %bb.10:                               #   in Loop: Header=BB2_3 Depth=1
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB2_25
# %bb.11:                               #   in Loop: Header=BB2_3 Depth=1
	leaq	120(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorl	%r13d, %r13d
	xorl	%r12d, %r12d
.LBB2_12:                               #   Parent Loop BB2_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	24(%rsp), %rdi
	addq	%r12, %rdi
	movq	40(%rsp), %rsi
	addq	%r12, %rsi
	movq	56(%rsp), %r8
	movl	$800000, %edx                   # imm = 0xC3500
	movl	$1, %ecx
	callq	hipMemcpyAsync
	testl	%eax, %eax
	jne	.LBB2_24
# %bb.13:                               #   in Loop: Header=BB2_12 Depth=2
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB2_24
# %bb.14:                               #   in Loop: Header=BB2_12 Depth=2
	movq	48(%rsp), %r9
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_16
# %bb.15:                               #   in Loop: Header=BB2_12 Depth=2
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	%r13d, %edx
	movl	$100000, %ecx                   # imm = 0x186A0
	callq	_Z23__device_stub__MyKernelPdS_ii
.LBB2_16:                               #   in Loop: Header=BB2_12 Depth=2
	addq	$800000, %r12                   # imm = 0xC3500
	addq	$100000, %r13                   # imm = 0x186A0
	cmpq	$1000000, %r13                  # imm = 0xF4240
	jne	.LBB2_12
# %bb.17:                               #   in Loop: Header=BB2_3 Depth=1
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB2_24
# %bb.18:                               #   in Loop: Header=BB2_3 Depth=1
	leaq	104(%rsp), %r14
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movupd	120(%rsp), %xmm0
	movapd	%xmm0, 80(%rsp)
	leaq	72(%rsp), %rdi
	movq	%r14, %rsi
	leaq	80(%rsp), %rdx
	callq	_Z16timeval_subtractPdP7timevalS1_
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$8000000, %edx                  # imm = 0x7A1200
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_24
# %bb.19:                               #   in Loop: Header=BB2_3 Depth=1
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB2_24
# %bb.20:                               # %.preheader
                                        #   in Loop: Header=BB2_3 Depth=1
	xorpd	%xmm0, %xmm0
	movq	32(%rsp), %rax
	xorl	%ecx, %ecx
.LBB2_21:                               #   Parent Loop BB2_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	addsd	(%rax,%rcx,8), %xmm0
	incq	%rcx
	cmpq	$1000000, %rcx                  # imm = 0xF4240
	jne	.LBB2_21
# %bb.22:                               #   in Loop: Header=BB2_3 Depth=1
	movl	$.L.str.6, %edi
	movb	$1, %al
	callq	printf
	movsd	72(%rsp), %xmm0                 # xmm0 = mem[0],zero
	movl	$.L.str.7, %edi
	movb	$1, %al
	callq	printf
	movq	40(%rsp), %rdi
	callq	hipHostFree
	movq	32(%rsp), %rdi
	callq	hipHostFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	incl	%ebp
	cmpl	$100, %ebp
	jne	.LBB2_3
# %bb.23:
	xorl	%eax, %eax
	addq	$1592, %rsp                     # imm = 0x638
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_24:
	.cfi_def_cfa_offset 1648
	movl	%eax, %r14d
	movl	$.L.str.4, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%r14d, %edi
	callq	exit
.LBB2_25:
	movl	%eax, %r13d
	movl	$.L.str.4, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%r13d, %edi
	callq	exit
.LBB2_26:
	movl	$.L.str.5, %edi
	movl	$782, %esi                      # imm = 0x30E
	movl	4(%rsp), %edx                   # 4-byte Reload
	xorl	%eax, %eax
	callq	printf
.LBB2_28:
	movl	$1, %edi
	callq	exit
.LBB2_27:
	movl	$.Lstr, %edi
	callq	puts@PLT
	jmp	.LBB2_28
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8MyKernelPdS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8MyKernelPdS_ii,@object       # @_Z8MyKernelPdS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z8MyKernelPdS_ii
	.p2align	3, 0x0
_Z8MyKernelPdS_ii:
	.quad	_Z23__device_stub__MyKernelPdS_ii
	.size	_Z8MyKernelPdS_ii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Device count, devid: %d %d\n"
	.size	.L.str.1, 28

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Device: %s\n"
	.size	.L.str.2, 12

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"[deviceProp.major.deviceProp.minor] = [%d.%d]\n\n"
	.size	.L.str.3, 48

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Error %d\n"
	.size	.L.str.4, 10

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Nblocks > Max_gridsize!  %d  %d\n"
	.size	.L.str.5, 33

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Result: %e\n\n"
	.size	.L.str.6, 13

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Time: %e\n"
	.size	.L.str.7, 10

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8MyKernelPdS_ii"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"No CUDA devices!"
	.size	.Lstr, 17

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__MyKernelPdS_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8MyKernelPdS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8MyKernelPdS_ii       ; -- Begin function _Z8MyKernelPdS_ii
	.globl	_Z8MyKernelPdS_ii
	.p2align	8
	.type	_Z8MyKernelPdS_ii,@function
_Z8MyKernelPdS_ii:                      ; @_Z8MyKernelPdS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_add_nc_u32_e32 v0, s2, v1
	s_mov_b32 s1, 0x3fe55555
	s_mov_b32 s0, 0x55555555
	s_mov_b32 s2, 0x968915a9
	s_mov_b32 s3, 0x3fba6564
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	s_mov_b32 s4, 0x4222de17
	s_mov_b32 s5, 0x3fbdee67
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_frexp_mant_f64_e64 v[4:5], |v[2:3]|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[0:1], v[4:5]
	v_cndmask_b32_e64 v6, 0, 1, vcc_lo
	v_ldexp_f64 v[4:5], v[4:5], v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[4:5], 1.0
	v_add_f64 v[12:13], v[4:5], -1.0
	v_rcp_f64_e32 v[8:9], v[6:7]
	v_add_f64 v[14:15], v[6:7], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], -v[14:15]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	v_fma_f64 v[8:9], v[10:11], v[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	v_fma_f64 v[8:9], v[10:11], v[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[10:11], v[12:13], v[8:9]
	v_mul_f64 v[16:17], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[10:11], v[6:7], -v[16:17]
	v_fma_f64 v[4:5], v[10:11], v[4:5], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[16:17], v[4:5]
	v_add_f64 v[14:15], v[12:13], -v[6:7]
	v_add_f64 v[16:17], v[6:7], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	v_add_f64 v[4:5], v[16:17], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[12:13], -v[6:7]
	v_add_f64 v[4:5], v[4:5], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[14:15], v[4:5]
	v_mul_f64 v[4:5], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[10:11], v[4:5]
	v_add_f64 v[8:9], v[6:7], -v[10:11]
	v_mul_f64 v[10:11], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], -v[8:9]
	v_fma_f64 v[8:9], v[6:7], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[4:5], v[4:5]
	v_fma_f64 v[8:9], v[6:7], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[10:11], v[8:9]
	v_fma_f64 v[14:15], v[12:13], s[4:5], s[2:3]
	s_mov_b32 s2, 0x3abe935a
	s_mov_b32 s3, 0x3fbe25e4
	v_add_f64 v[10:11], v[12:13], -v[10:11]
	v_mul_f64 v[20:21], v[6:7], v[12:13]
	s_mov_b32 s4, 0x652b82fe
	s_mov_b32 s5, 0x3ff71547
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[2:3]
	s_mov_b32 s2, 0x47e6c9c2
	s_mov_b32 s3, 0x3fc110ef
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[2:3]
	s_mov_b32 s2, 0xcfa74449
	s_mov_b32 s3, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[2:3]
	s_mov_b32 s2, 0x71bf3c30
	s_mov_b32 s3, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[2:3]
	s_mov_b32 s2, 0x1c7792ce
	s_mov_b32 s3, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[2:3]
	s_mov_b32 s2, 0x924920da
	s_mov_b32 s3, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[2:3]
	s_mov_b32 s2, 0x9999999c
	s_mov_b32 s3, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[2:3]
	s_mov_b32 s3, 0x3c7abc9e
	s_mov_b32 s2, 0x3b39803f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[16:17], v[12:13], v[14:15]
	v_fma_f64 v[10:11], v[12:13], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[8:9], v[14:15], v[10:11]
	v_add_f64 v[14:15], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[18:19], v[14:15], s[0:1]
	v_add_f64 v[16:17], v[14:15], -v[16:17]
	s_mov_b32 s1, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[22:23], v[18:19], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	v_fma_f64 v[16:17], v[12:13], v[6:7], -v[20:21]
	s_mov_b32 s0, 0xd5df274d
	s_mov_b32 s1, 0x3c8543b0
	v_add_f64 v[14:15], v[14:15], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], s[0:1]
	v_fma_f64 v[12:13], v[12:13], v[4:5], v[16:17]
	s_mov_b32 s1, 0x3fe62e42
	s_mov_b32 s0, 0xfefa39ef
	v_ldexp_f64 v[4:5], v[4:5], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], v[14:15]
	v_fma_f64 v[8:9], v[8:9], v[6:7], v[12:13]
	v_ldexp_f64 v[6:7], v[6:7], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[18:19], v[10:11]
	v_add_f64 v[14:15], v[20:21], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[18:19], -v[12:13]
	v_mul_f64 v[18:19], v[14:15], v[12:13]
	v_add_f64 v[20:21], v[14:15], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], v[16:17]
	v_fma_f64 v[16:17], v[14:15], v[12:13], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], -v[20:21]
	v_fma_f64 v[10:11], v[14:15], v[10:11], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[8:9], v[12:13], v[10:11]
	v_frexp_exp_i32_f64_e32 v12, v[2:3]
	v_add_f64 v[10:11], v[18:19], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_co_ci_u32_e32 v12, vcc_lo, 0, v12, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 1.0, v[2:3]
	v_cvt_f64_i32_e32 v[12:13], v12
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[6:7], v[10:11]
	v_add_f64 v[16:17], v[10:11], -v[18:19]
	v_mul_f64 v[18:19], v[12:13], s[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[14:15], -v[6:7]
	v_add_f64 v[8:9], v[8:9], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[12:13], s[0:1], -v[18:19]
	s_mov_b32 s1, 0xbfe62e42
	v_add_f64 v[6:7], v[10:11], -v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], v[8:9]
	v_fma_f64 v[8:9], v[12:13], s[2:3], v[16:17]
	s_mov_b32 s3, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[18:19], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[14:15], v[4:5]
	v_add_f64 v[18:19], v[6:7], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[6:7], v[10:11]
	v_add_f64 v[14:15], v[10:11], -v[14:15]
	v_add_f64 v[8:9], v[8:9], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[12:13], -v[6:7]
	v_add_f64 v[4:5], v[4:5], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[12:13], -v[16:17]
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	v_add_f64 v[14:15], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], -v[20:21]
	v_add_f64 v[6:7], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[14:15], -v[8:9]
	v_add_f64 v[6:7], v[14:15], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], -v[10:11]
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	v_add_f64 v[16:17], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[14:15]
	v_mov_b32_e32 v14, 0x3ff00000
	v_cndmask_b32_e32 v15, 0x3fd66666, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[10:11], v[16:17], -v[12:13]
	v_add_f64 v[4:5], v[4:5], v[8:9]
	v_cndmask_b32_e32 v9, 0x4005ae14, v14, vcc_lo
	v_cndmask_b32_e64 v8, 0x7ae147ae, 0, vcc_lo
	v_cndmask_b32_e64 v14, 0x66666666, 0, vcc_lo
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[16:17], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[6:7], -v[16:17]
	v_mul_f64 v[12:13], v[8:9], v[6:7]
	v_mul_f64 v[16:17], v[14:15], v[6:7]
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[8:9], v[6:7], -v[12:13]
	v_fma_f64 v[6:7], v[14:15], v[6:7], -v[16:17]
	v_cmp_class_f64_e64 vcc_lo, v[12:13], 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[8:9], v[4:5], v[10:11]
	v_fma_f64 v[4:5], v[14:15], v[4:5], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[12:13], v[10:11]
	v_add_f64 v[22:23], v[16:17], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v7, v19, v13 :: v_dual_cndmask_b32 v6, v18, v12
	v_cmp_class_f64_e64 vcc_lo, v[16:17], 0x204
	v_add_f64 v[12:13], v[18:19], -v[12:13]
	v_cndmask_b32_e32 v25, v23, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f64 v[20:21], v[6:7], s[4:5]
	v_cndmask_b32_e32 v24, v22, v16, vcc_lo
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[6:7]|
	v_add_f64 v[16:17], v[22:23], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_mul_f64 v[26:27], v[24:25], s[4:5]
	s_mov_b32 s4, 0x6a5dcb37
	s_mov_b32 s5, 0x3e5ade15
	v_rndne_f64_e32 v[20:21], v[20:21]
	v_dual_cndmask_b32 v11, 0, v11 :: v_dual_cndmask_b32 v10, 0, v10
	v_add_f64 v[4:5], v[4:5], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_rndne_f64_e32 v[26:27], v[26:27]
	v_fma_f64 v[28:29], v[20:21], s[0:1], v[6:7]
	v_cvt_i32_f64_e32 v36, v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[30:31], v[26:27], s[0:1], v[24:25]
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	v_fma_f64 v[28:29], v[20:21], s[2:3], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[30:31], v[26:27], s[2:3], v[30:31]
	s_mov_b32 s2, 0x623fde64
	s_mov_b32 s3, 0x3ec71dee
	v_fma_f64 v[32:33], v[28:29], s[4:5], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_fma_f64 v[34:35], v[30:31], s[4:5], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[24:25]
	v_cmp_class_f64_e64 s5, v[2:3], 0x204
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[30:31], v[34:35], s[2:3]
	s_mov_b32 s2, 0x14761f6e
	s_mov_b32 s3, 0x3f2a01a0
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[30:31], v[34:35], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[30:31], v[34:35], s[2:3]
	s_mov_b32 s2, 0x11122322
	s_mov_b32 s3, 0x3f811111
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[30:31], v[34:35], s[0:1]
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[30:31], v[34:35], s[2:3]
	s_mov_b32 s2, 0x55555511
	s_mov_b32 s3, 0x3fc55555
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[30:31], v[34:35], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[34:35], v[30:31], v[34:35], s[2:3]
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[24:25]
	v_cmp_neq_f64_e64 s2, 0x7ff00000, |v[24:25]|
	v_fma_f64 v[32:33], v[28:29], v[32:33], s[0:1]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[34:35], v[30:31], v[34:35], s[0:1]
	v_cmp_nlt_f64_e64 s0, 0x40900000, v[6:7]
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[6:7]
	v_trunc_f64_e32 v[6:7], v[8:9]
	v_cndmask_b32_e64 v5, 0, v5, s2
	v_cndmask_b32_e64 v4, 0, v4, s2
	s_and_b32 s2, s4, s3
	v_fma_f64 v[32:33], v[28:29], v[32:33], 1.0
	s_and_b32 vcc_lo, s1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[20:21], v[28:29], v[32:33], 1.0
	v_fma_f64 v[28:29], v[30:31], v[34:35], 1.0
	v_cvt_i32_f64_e32 v32, v[26:27]
	v_ldexp_f64 v[18:19], v[20:21], v36
	v_mul_f64 v[20:21], v[8:9], 0.5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], v[30:31], v[28:29], 1.0
	v_cndmask_b32_e64 v19, 0x7ff00000, v19, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_trunc_f64_e32 v[12:13], v[20:21]
	v_ldexp_f64 v[22:23], v[26:27], v32
	v_mul_f64 v[26:27], v[14:15], 0.5
	v_cndmask_b32_e32 v18, 0, v18, vcc_lo
	v_cndmask_b32_e64 v19, 0, v19, s1
	v_cmp_eq_f64_e32 vcc_lo, v[6:7], v[8:9]
	v_trunc_f64_e32 v[8:9], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_fma_f64 v[6:7], v[18:19], v[10:11], v[18:19]
	v_cmp_class_f64_e64 s1, v[18:19], 0x204
	v_cmp_neq_f64_e64 s0, v[12:13], v[20:21]
	v_cndmask_b32_e64 v12, 0x7ff00000, v23, s3
	v_trunc_f64_e32 v[10:11], v[26:27]
	v_cndmask_b32_e64 v16, v6, v18, s1
	v_cndmask_b32_e64 v6, v7, v19, s1
	v_cmp_eq_f64_e64 s1, 0, v[2:3]
	v_cndmask_b32_e64 v7, 0, v12, s4
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e32 v18, 0, v16, vcc_lo
	s_and_b32 s0, vcc_lo, s0
	v_cndmask_b32_e64 v13, 0x3ff00000, v3, s0
	v_cmp_neq_f64_e64 s3, v[10:11], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_bfi_b32 v13, 0x7fffffff, v6, v13
	v_cndmask_b32_e64 v6, 0, v22, s2
	v_cmp_eq_f64_e64 s2, v[8:9], v[14:15]
	v_cndmask_b32_e64 v9, 0, v3, s0
	v_cndmask_b32_e32 v17, 0x7ff80000, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[4:5], v[6:7], v[4:5], v[6:7]
	v_cmp_class_f64_e64 s4, v[6:7], 0x204
	v_cmp_gt_f64_e32 vcc_lo, 0, v[2:3]
	v_cndmask_b32_e64 v8, 0x7ff00000, 0, s1
	s_or_b32 s0, s1, s5
	v_cmp_u_f64_e64 s1, v[2:3], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_bfi_b32 v9, 0x7fffffff, v8, v9
	s_and_b32 s3, s2, s3
	v_cndmask_b32_e64 v2, 0x3ff00000, v3, s3
	v_cndmask_b32_e64 v3, 0, v3, s3
	v_cndmask_b32_e64 v5, v5, v7, s4
	v_cndmask_b32_e32 v11, v13, v17, vcc_lo
	v_cndmask_b32_e64 v4, v4, v6, s4
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_bfi_b32 v3, 0x7fffffff, v8, v3
	v_cndmask_b32_e32 v10, v16, v18, vcc_lo
	v_bfi_b32 v2, 0x7fffffff, v5, v2
	v_cndmask_b32_e64 v9, v11, v9, s0
	v_cndmask_b32_e64 v5, 0x7ff80000, v2, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v2, v5, vcc_lo
	v_cndmask_b32_e64 v5, 0, v4, s2
	v_cndmask_b32_e64 v6, v2, v3, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v4, v4, v5, vcc_lo
	s_or_b32 s0, s1, s0
	v_cndmask_b32_e64 v3, v9, 0x7ff80000, s1
	v_cndmask_b32_e64 v2, v10, 0, s0
	v_cndmask_b32_e64 v5, v6, 0x7ff80000, s1
	v_cndmask_b32_e64 v4, v4, 0, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[6:7], 0x40140000, v[4:5]
	v_div_scale_f64 v[8:9], null, v[4:5], v[4:5], v[2:3]
	v_add_f64 v[22:23], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[2:3], 2.0, v[6:7]
	v_rcp_f64_e32 v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_scale_f64 v[12:13], null, v[6:7], v[6:7], v[4:5]
	v_add_f64 v[22:23], v[22:23], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[8:9], v[10:11], 1.0
	v_rcp_f64_e32 v[14:15], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[10:11], v[16:17], v[10:11]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[12:13], v[14:15], 1.0
	v_fma_f64 v[18:19], -v[8:9], v[10:11], 1.0
	v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15]
	v_div_scale_f64 v[16:17], vcc_lo, v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[18:19], v[10:11]
	v_fma_f64 v[18:19], -v[12:13], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[20:21], v[16:17], v[10:11]
	v_fma_f64 v[14:15], v[14:15], v[18:19], v[14:15]
	v_div_scale_f64 v[18:19], s0, v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], -v[8:9], v[20:21], v[16:17]
	v_mul_f64 v[16:17], v[18:19], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[8:9], v[8:9], v[10:11], v[20:21]
	s_mov_b32 vcc_lo, s0
	v_fma_f64 v[10:11], -v[12:13], v[16:17], v[18:19]
	v_fma_f64 v[12:13], v[2:3], v[4:5], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[2:3], v[8:9], v[4:5], v[2:3]
	v_div_fmas_f64 v[8:9], v[10:11], v[14:15], v[16:17]
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], v[12:13]
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	v_div_fixup_f64 v[4:5], v[8:9], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[2:3], v[4:5], v[2:3]
	global_store_b64 v[0:1], v[2:3], off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8MyKernelPdS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 37
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8MyKernelPdS_ii, .Lfunc_end0-_Z8MyKernelPdS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3008
; NumSgprs: 18
; NumVgprs: 37
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 37
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8MyKernelPdS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8MyKernelPdS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     37
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
