#include <stdio.h>
#include <cuda.h>
#include <cuda_runtime_api.h>
#include <device_launch_parameters.h>
#include <stdlib.h> 
#include <time.h>
#include <cfloat>


#define min(a, b) (a < b ? a : b)
#define max(a, b) (a > b ? a : b)
#define abs(a) (a > 0 ? a : -1 * a)

#define BLOCK_SIZE 1024
#define MAX_GRID 1024


__global__ void kMeansStep2(int *d_counts, float *d_new_clusters, float *d_prev_clusters, int *converged, int n_clusters, int d, int n_threads){
	
	int cluster =  blockIdx.x * blockDim.x + threadIdx.x;
	while(cluster < n_clusters){
		// printf("cluster number %d, count %d\n", cluster, d_counts[cluster]);
		int count = max(1, d_counts[cluster]);
		for (int j=0; j<d; j++){
			d_new_clusters[cluster * d + j] /= count;
			if (abs(d_new_clusters[cluster * d + j] - d_prev_clusters[cluster * d + j]) > 0.01) 
				atomicAnd(&converged[0], 0);
		}
		cluster += n_threads;
	}
}


__global__ void kMeansStep1(float *d_data, float *d_prev_clusters, float *d_new_clusters, int *d_counts, int n_data, int n_clusters, int d, 
	int n_threads){

	
	int tid = blockIdx.x * blockDim.x + threadIdx.x;

	while (tid < n_data){
		
		float best_distance = FLT_MAX;
		int best_cluster = -1;

		for (int cluster=0; cluster<n_clusters; cluster++){
			float distance = 0.0;
			for (int j=0; j<d; j++)
				distance += (d_prev_clusters[cluster * d + j] - d_data[tid * d + j]) * (d_prev_clusters[cluster * d + j] - d_data[tid * d + j]);

			if (distance < best_distance){
				best_distance = distance;
				best_cluster = cluster;
			}
		}
		// printf("data point number %d assigned to cluster %d\n", tid, best_cluster);
		for (int j=0; j<d; j++)
			atomicAdd(&d_new_clusters[best_cluster * d + j], d_data[tid * d + j]);
  		
  		atomicAdd(&d_counts[best_cluster], 1);

  		tid += n_threads;
	}

}



int main(){
	srand((unsigned int)time(NULL));

	int n_data = 100000;
	int n_clusters = 10;
	int d = 100;

	int size_data = sizeof(float) * n_data * d;
	int size_clusters = sizeof(float) * n_clusters * d;

	int *h_converged = (int *)malloc(1 * sizeof(int));
	float *h_data = (float *)malloc(size_data);
	float *h_clusters = (float *)malloc(size_clusters);

	// printf("data:\n");
	for (int i=0; i<n_data*d; i++){
		h_data[i] = ((float)rand()/(float)(RAND_MAX)) * 100.0;
		// printf("%f ", h_data[i]);
		// if ((i+1) % d == 0)
		// 	printf("\n");
	}

	printf("\ninitial clusters:\n");
	for (int i=0; i<n_clusters*d; i++){
		h_clusters[i] = ((float)rand()/(float)(RAND_MAX)) * 100.0;
		printf("%f ", h_clusters[i]);
		if ((i+1) % d == 0)
			printf("\n");
	}

	float *d_data, *d_new_clusters, *d_prev_clusters;
	int *d_converged, *d_counts;

	cudaMalloc((void **)&d_data, size_data);
	cudaMalloc((void **)&d_new_clusters, size_clusters);
	cudaMalloc((void **)&d_prev_clusters, size_clusters);
	cudaMalloc((void **)&d_counts, n_clusters * sizeof(int));
	cudaMalloc((void **)&d_converged, sizeof(int));

	cudaMemcpy(d_data, h_data, size_data, cudaMemcpyHostToDevice);
	cudaMemcpy(d_prev_clusters, h_clusters, size_clusters, cudaMemcpyHostToDevice);

	float *d1 = d_prev_clusters;
	float *d2 = d_new_clusters;

	int n_data_blocks = min( (int)(n_data / BLOCK_SIZE) + 1, MAX_GRID);
	int n_clusters_blocks = min( (int)(n_clusters / BLOCK_SIZE) + 1, MAX_GRID);

	int iteration = 1;
	clock_t start_time = clock();
	while(1){
		// printf("\nITERATION NUMBER %d STARTED!!!!\n", iteration);
		cudaMemset(d2, 0.0, size_clusters);
		cudaMemset(d_counts, 0, n_clusters * sizeof(int));

		kMeansStep1 <<<n_data_blocks, BLOCK_SIZE>>> (d_data, d1, d2, d_counts, n_data, n_clusters, d, n_data_blocks*BLOCK_SIZE);
		cudaThreadSynchronize();

		h_converged[0] = 1;
		cudaMemcpy(d_converged, h_converged, sizeof(int), cudaMemcpyHostToDevice);
		
		kMeansStep2 <<<n_clusters_blocks, BLOCK_SIZE>>> (d_counts, d2, d1, d_converged, n_clusters, d, n_clusters_blocks*BLOCK_SIZE);
		cudaThreadSynchronize();

		// cudaMemcpy(h_clusters, d1, size_clusters, cudaMemcpyDeviceToHost);
		// printf("\niteration %d prev cluster:\n", iteration);
		// for(int i=0; i<n_clusters*d; i++){
		// 	printf("%f ", h_clusters[i]);
		// 	if ((i+1) % d == 0)
		// 		printf("\n");
		// }

		// cudaMemcpy(h_clusters, d2, size_clusters, cudaMemcpyDeviceToHost);
		// printf("\niteration %d new cluster:\n", iteration);
		// for(int i=0; i<n_clusters*d; i++){
		// 	printf("%f ", h_clusters[i]);
		// 	if ((i+1) % d == 0)
		// 		printf("\n");
		// }

		cudaMemcpy(h_converged, d_converged, sizeof(int), cudaMemcpyDeviceToHost);

		if (h_converged[0] == 1){
			cudaMemcpy(h_clusters, d2, size_clusters, cudaMemcpyDeviceToHost);
			break;
		}

		d1 = d1 == d_prev_clusters ? d_new_clusters : d_prev_clusters;
        d2 = d2 == d_prev_clusters ? d_new_clusters : d_prev_clusters;
		iteration += 1;
	}
	clock_t end_time = clock();

	printf("\nFinished!!\n");
	printf("Final clusters:\n");
	for (int i=0; i<n_clusters*d; i++){
		printf("%f ", h_clusters[i]);
		if ((i+1) % d == 0)
			printf("\n");
	}
	double total_time = ((double) (end_time - start_time)) / CLOCKS_PER_SEC;
	printf("total time: %f\n", total_time);

	return 0;
}

	.file	"tmpxft_0038ccec_00000000-6_kmeans_v1.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z41__device_stub__Z11kMeansStep2PiPfS0_S_iiiPiPfS0_S_iii
	.type	_Z41__device_stub__Z11kMeansStep2PiPfS0_S_iiiPiPfS0_S_iii, @function
_Z41__device_stub__Z11kMeansStep2PiPfS0_S_iiiPiPfS0_S_iii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z11kMeansStep2PiPfS0_S_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z41__device_stub__Z11kMeansStep2PiPfS0_S_iiiPiPfS0_S_iii, .-_Z41__device_stub__Z11kMeansStep2PiPfS0_S_iiiPiPfS0_S_iii
	.globl	_Z11kMeansStep2PiPfS0_S_iii
	.type	_Z11kMeansStep2PiPfS0_S_iii, @function
_Z11kMeansStep2PiPfS0_S_iii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z11kMeansStep2PiPfS0_S_iiiPiPfS0_S_iii
	.cfi_endproc
.LFE2053:
	.size	_Z11kMeansStep2PiPfS0_S_iii, .-_Z11kMeansStep2PiPfS0_S_iii
	.globl	_Z41__device_stub__Z11kMeansStep1PfS_S_PiiiiiPfS_S_Piiiii
	.type	_Z41__device_stub__Z11kMeansStep1PfS_S_PiiiiiPfS_S_Piiiii, @function
_Z41__device_stub__Z11kMeansStep1PfS_S_PiiiiiPfS_S_Piiiii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z11kMeansStep1PfS_S_Piiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L8:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z41__device_stub__Z11kMeansStep1PfS_S_PiiiiiPfS_S_Piiiii, .-_Z41__device_stub__Z11kMeansStep1PfS_S_PiiiiiPfS_S_Piiiii
	.globl	_Z11kMeansStep1PfS_S_Piiiii
	.type	_Z11kMeansStep1PfS_S_Piiiii, @function
_Z11kMeansStep1PfS_S_Piiiii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z11kMeansStep1PfS_S_PiiiiiPfS_S_Piiiii
	.cfi_endproc
.LFE2055:
	.size	_Z11kMeansStep1PfS_S_Piiiii, .-_Z11kMeansStep1PfS_S_Piiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"\ninitial clusters:\n"
.LC3:
	.string	"%f "
.LC4:
	.string	"\n"
.LC5:
	.string	"\nFinished!!\n"
.LC6:
	.string	"Final clusters:\n"
.LC8:
	.string	"total time: %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%edi, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	movl	$4, %edi
	call	malloc@PLT
	movl	$40000000, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$4000, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movq	%rax, %rbx
.L14:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	mulss	.LC1(%rip), %xmm0
	movss	%xmm0, 0(%r13,%r12,4)
	incq	%r12
	cmpq	$10000000, %r12
	jne	.L14
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movl	$1, %r12d
	call	__printf_chk@PLT
.L16:
	call	rand@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movb	$1, %al
	mulss	.LC1(%rip), %xmm0
	movss	%xmm0, -4(%rbx,%r12,4)
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	%r12d, %eax
	movl	$100, %ecx
	cltd
	idivl	%ecx
	testl	%edx, %edx
	jne	.L15
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L15:
	incq	%r12
	cmpq	$1001, %r12
	jne	.L16
	leaq	8(%rsp), %rdi
	movl	$40000000, %esi
	movabsq	$4294968320, %r14
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$4000, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$4000, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$40, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	movl	$40000000, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$4000, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %r13
	movq	16(%rsp), %r12
	call	clock@PLT
	movq	%rax, %r15
.L17:
	xorl	%esi, %esi
	movl	$4000, %edx
	movq	%r12, %rdi
	call	cudaMemset@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	movl	$40, %edx
	call	cudaMemset@PLT
	movl	$2147483697, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	addq	%rdi, %rdi
	movq	%r14, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movq	%r14, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	$100352
	.cfi_def_cfa_offset 152
	movq	%r13, %rsi
	movl	$10, %r9d
	movq	%r12, %rdx
	pushq	$100
	.cfi_def_cfa_offset 160
	movq	56(%rsp), %rcx
	movl	$100000, %r8d
	movq	24(%rsp), %rdi
	call	_Z41__device_stub__Z11kMeansStep1PfS_S_PiiiiiPfS_S_Piiiii
	popq	%rsi
	.cfi_def_cfa_offset 152
	popq	%rdi
	.cfi_def_cfa_offset 144
.L18:
	call	cudaThreadSynchronize@PLT
	movl	$1, 0(%rbp)
	movq	32(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movq	%r14, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	%rax
	.cfi_def_cfa_offset 152
	movq	%r13, %rdx
	movl	$100, %r9d
	movl	$10, %r8d
	pushq	$1024
	.cfi_def_cfa_offset 160
	movq	48(%rsp), %rcx
	movq	%r12, %rsi
	movq	56(%rsp), %rdi
	call	_Z41__device_stub__Z11kMeansStep2PiPfS0_S_iiiPiPfS0_S_iii
	popq	%rdx
	.cfi_def_cfa_offset 152
	popq	%rcx
	.cfi_def_cfa_offset 144
.L19:
	call	cudaThreadSynchronize@PLT
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	cmpl	$1, 0(%rbp)
	jne	.L20
	movl	$2, %ecx
	movl	$4000, %edx
	movq	%r12, %rsi
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	$1, %ebp
	leaq	.LC4(%rip), %r13
	call	clock@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %r12
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L21
.L20:
	movq	24(%rsp), %rax
	cmpq	%r13, %rax
	jne	.L26
	movq	16(%rsp), %r13
	jmp	.L22
.L26:
	movq	%rax, %r13
.L22:
	cmpq	%r12, %rax
	je	.L31
.L23:
	movq	%rax, %r12
	jmp	.L17
.L31:
	movq	16(%rsp), %rax
	jmp	.L23
.L24:
	incq	%rbp
	cmpq	$1001, %rbp
	je	.L32
.L21:
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	-4(%rbx,%rbp,4), %xmm0
	call	__printf_chk@PLT
	movl	%ebp, %eax
	movl	$100, %ecx
	cltd
	idivl	%ecx
	testl	%edx, %edx
	jne	.L24
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L24
.L32:
	subq	%r15, %r12
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtsi2sdq	%r12, %xmm0
	divsd	.LC7(%rip), %xmm0
	call	__printf_chk@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z11kMeansStep1PfS_S_Piiiii"
.LC10:
	.string	"_Z11kMeansStep2PiPfS0_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11kMeansStep1PfS_S_Piiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11kMeansStep2PiPfS0_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	805306368
	.align 4
.LC1:
	.long	1120403456
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC7:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>

#include <stdlib.h> 
#include <time.h>
#include <cfloat>


#define min(a, b) (a < b ? a : b)
#define max(a, b) (a > b ? a : b)
#define abs(a) (a > 0 ? a : -1 * a)

#define BLOCK_SIZE 1024
#define MAX_GRID 1024


__global__ void kMeansStep2(int *d_counts, float *d_new_clusters, float *d_prev_clusters, int *converged, int n_clusters, int d, int n_threads){
	
	int cluster =  blockIdx.x * blockDim.x + threadIdx.x;
	while(cluster < n_clusters){
		// printf("cluster number %d, count %d\n", cluster, d_counts[cluster]);
		int count = max(1, d_counts[cluster]);
		for (int j=0; j<d; j++){
			d_new_clusters[cluster * d + j] /= count;
			if (abs(d_new_clusters[cluster * d + j] - d_prev_clusters[cluster * d + j]) > 0.01) 
				atomicAnd(&converged[0], 0);
		}
		cluster += n_threads;
	}
}


__global__ void kMeansStep1(float *d_data, float *d_prev_clusters, float *d_new_clusters, int *d_counts, int n_data, int n_clusters, int d, 
	int n_threads){

	
	int tid = blockIdx.x * blockDim.x + threadIdx.x;

	while (tid < n_data){
		
		float best_distance = FLT_MAX;
		int best_cluster = -1;

		for (int cluster=0; cluster<n_clusters; cluster++){
			float distance = 0.0;
			for (int j=0; j<d; j++)
				distance += (d_prev_clusters[cluster * d + j] - d_data[tid * d + j]) * (d_prev_clusters[cluster * d + j] - d_data[tid * d + j]);

			if (distance < best_distance){
				best_distance = distance;
				best_cluster = cluster;
			}
		}
		// printf("data point number %d assigned to cluster %d\n", tid, best_cluster);
		for (int j=0; j<d; j++)
			atomicAdd(&d_new_clusters[best_cluster * d + j], d_data[tid * d + j]);
  		
  		atomicAdd(&d_counts[best_cluster], 1);

  		tid += n_threads;
	}

}



int main(){
	srand((unsigned int)time(NULL));

	int n_data = 100000;
	int n_clusters = 10;
	int d = 100;

	int size_data = sizeof(float) * n_data * d;
	int size_clusters = sizeof(float) * n_clusters * d;

	int *h_converged = (int *)malloc(1 * sizeof(int));
	float *h_data = (float *)malloc(size_data);
	float *h_clusters = (float *)malloc(size_clusters);

	// printf("data:\n");
	for (int i=0; i<n_data*d; i++){
		h_data[i] = ((float)rand()/(float)(RAND_MAX)) * 100.0;
		// printf("%f ", h_data[i]);
		// if ((i+1) % d == 0)
		// 	printf("\n");
	}

	printf("\ninitial clusters:\n");
	for (int i=0; i<n_clusters*d; i++){
		h_clusters[i] = ((float)rand()/(float)(RAND_MAX)) * 100.0;
		printf("%f ", h_clusters[i]);
		if ((i+1) % d == 0)
			printf("\n");
	}

	float *d_data, *d_new_clusters, *d_prev_clusters;
	int *d_converged, *d_counts;

	hipMalloc((void **)&d_data, size_data);
	hipMalloc((void **)&d_new_clusters, size_clusters);
	hipMalloc((void **)&d_prev_clusters, size_clusters);
	hipMalloc((void **)&d_counts, n_clusters * sizeof(int));
	hipMalloc((void **)&d_converged, sizeof(int));

	hipMemcpy(d_data, h_data, size_data, hipMemcpyHostToDevice);
	hipMemcpy(d_prev_clusters, h_clusters, size_clusters, hipMemcpyHostToDevice);

	float *d1 = d_prev_clusters;
	float *d2 = d_new_clusters;

	int n_data_blocks = min( (int)(n_data / BLOCK_SIZE) + 1, MAX_GRID);
	int n_clusters_blocks = min( (int)(n_clusters / BLOCK_SIZE) + 1, MAX_GRID);

	int iteration = 1;
	clock_t start_time = clock();
	while(1){
		// printf("\nITERATION NUMBER %d STARTED!!!!\n", iteration);
		hipMemset(d2, 0.0, size_clusters);
		hipMemset(d_counts, 0, n_clusters * sizeof(int));

		kMeansStep1 <<<n_data_blocks, BLOCK_SIZE>>> (d_data, d1, d2, d_counts, n_data, n_clusters, d, n_data_blocks*BLOCK_SIZE);
		hipDeviceSynchronize();

		h_converged[0] = 1;
		hipMemcpy(d_converged, h_converged, sizeof(int), hipMemcpyHostToDevice);
		
		kMeansStep2 <<<n_clusters_blocks, BLOCK_SIZE>>> (d_counts, d2, d1, d_converged, n_clusters, d, n_clusters_blocks*BLOCK_SIZE);
		hipDeviceSynchronize();

		// cudaMemcpy(h_clusters, d1, size_clusters, cudaMemcpyDeviceToHost);
		// printf("\niteration %d prev cluster:\n", iteration);
		// for(int i=0; i<n_clusters*d; i++){
		// 	printf("%f ", h_clusters[i]);
		// 	if ((i+1) % d == 0)
		// 		printf("\n");
		// }

		// cudaMemcpy(h_clusters, d2, size_clusters, cudaMemcpyDeviceToHost);
		// printf("\niteration %d new cluster:\n", iteration);
		// for(int i=0; i<n_clusters*d; i++){
		// 	printf("%f ", h_clusters[i]);
		// 	if ((i+1) % d == 0)
		// 		printf("\n");
		// }

		hipMemcpy(h_converged, d_converged, sizeof(int), hipMemcpyDeviceToHost);

		if (h_converged[0] == 1){
			hipMemcpy(h_clusters, d2, size_clusters, hipMemcpyDeviceToHost);
			break;
		}

		d1 = d1 == d_prev_clusters ? d_new_clusters : d_prev_clusters;
        d2 = d2 == d_prev_clusters ? d_new_clusters : d_prev_clusters;
		iteration += 1;
	}
	clock_t end_time = clock();

	printf("\nFinished!!\n");
	printf("Final clusters:\n");
	for (int i=0; i<n_clusters*d; i++){
		printf("%f ", h_clusters[i]);
		if ((i+1) % d == 0)
			printf("\n");
	}
	double total_time = ((double) (end_time - start_time)) / CLOCKS_PER_SEC;
	printf("total time: %f\n", total_time);

	return 0;
}

	.text
	.file	"kmeans_v1.hip"
	.globl	_Z26__device_stub__kMeansStep2PiPfS0_S_iii # -- Begin function _Z26__device_stub__kMeansStep2PiPfS0_S_iii
	.type	_Z26__device_stub__kMeansStep2PiPfS0_S_iii,@function
_Z26__device_stub__kMeansStep2PiPfS0_S_iii: # @_Z26__device_stub__kMeansStep2PiPfS0_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kMeansStep2PiPfS0_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__kMeansStep2PiPfS0_S_iii, .Lfunc_end0-_Z26__device_stub__kMeansStep2PiPfS0_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__kMeansStep1PfS_S_Piiiii # -- Begin function _Z26__device_stub__kMeansStep1PfS_S_Piiiii
	.type	_Z26__device_stub__kMeansStep1PfS_S_Piiiii,@function
_Z26__device_stub__kMeansStep1PfS_S_Piiiii: # @_Z26__device_stub__kMeansStep1PfS_S_Piiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11kMeansStep1PfS_S_Piiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z26__device_stub__kMeansStep1PfS_S_Piiiii, .Lfunc_end1-_Z26__device_stub__kMeansStep1PfS_S_Piiiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI2_1:
	.long	0x42c80000                      # float 100
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_2:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%r12d, %r12d
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movl	$4, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$40000000, %edi                 # imm = 0x2625A00
	callq	malloc
	movq	%rax, %r15
	movl	$4000, %edi                     # imm = 0xFA0
	callq	malloc
	movq	%rax, %rbx
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	mulss	.LCPI2_1(%rip), %xmm0
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpq	$10000000, %r12                 # imm = 0x989680
	jne	.LBB2_1
# %bb.2:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movw	$1, %bp
	xorl	%r12d, %r12d
.LBB2_3:                                # =>This Inner Loop Header: Depth=1
	movzwl	%bp, %eax
	shrl	$2, %eax
	imull	$5243, %eax, %eax               # imm = 0x147B
	shrl	$17, %eax
	imull	$100, %eax, %r13d
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	mulss	.LCPI2_1(%rip), %xmm0
	movss	%xmm0, (%rbx,%r12,4)
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	decl	%r13d
	cmpw	%r12w, %r13w
	jne	.LBB2_5
# %bb.4:                                #   in Loop: Header=BB2_3 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
.LBB2_5:                                #   in Loop: Header=BB2_3 Depth=1
	incq	%r12
	incl	%ebp
	cmpq	$1000, %r12                     # imm = 0x3E8
	jne	.LBB2_3
# %bb.6:
	movabsq	$4294968320, %r12               # imm = 0x100000400
	leaq	48(%rsp), %rbp
	movl	$40000000, %esi                 # imm = 0x2625A00
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$4000, %esi                     # imm = 0xFA0
	callq	hipMalloc
	leaq	40(%rsp), %r13
	movl	$4000, %esi                     # imm = 0xFA0
	movq	%r13, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$40, %esi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movl	$40000000, %edx                 # imm = 0x2625A00
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$4000, %edx                     # imm = 0xFA0
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rbp
	leaq	16(%rsp), %rax
	movq	(%rax), %r13
	callq	clock
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	leaq	-926(%r12), %r15
	addq	$-1023, %r12                    # imm = 0xFC01
	movabsq	$4294968320, %rbx               # imm = 0x100000400
.LBB2_7:                                # =>This Inner Loop Header: Depth=1
	movl	$4000, %edx                     # imm = 0xFA0
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	hipMemset
	movq	(%rsp), %rdi
	movl	$40, %edx
	xorl	%esi, %esi
	callq	hipMemset
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_9
# %bb.8:                                #   in Loop: Header=BB2_7 Depth=1
	movq	48(%rsp), %rdi
	movq	(%rsp), %rcx
	movq	%rbp, %rsi
	movq	%r13, %rdx
	movl	$100000, %r8d                   # imm = 0x186A0
	movl	$10, %r9d
	pushq	$100352                         # imm = 0x18800
	.cfi_adjust_cfa_offset 8
	pushq	$100
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__kMeansStep1PfS_S_Piiiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB2_9:                                #   in Loop: Header=BB2_7 Depth=1
	callq	hipDeviceSynchronize
	movl	$1, (%r14)
	movq	8(%rsp), %rdi
	movl	$4, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_11
# %bb.10:                               #   in Loop: Header=BB2_7 Depth=1
	movq	(%rsp), %rdi
	movq	8(%rsp), %rcx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r13, %rsi
	movq	%rbp, %rdx
	movl	$10, %r8d
	movl	$100, %r9d
	pushq	$1024                           # imm = 0x400
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__kMeansStep2PiPfS0_S_iii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB2_11:                               #   in Loop: Header=BB2_7 Depth=1
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movl	$4, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$1, (%r14)
	je	.LBB2_12
# %bb.17:                               #   in Loop: Header=BB2_7 Depth=1
	movq	40(%rsp), %rax
	cmpq	%rax, %rbp
	movq	16(%rsp), %rcx
	movq	%rax, %rbp
	cmoveq	%rcx, %rbp
	cmpq	%rax, %r13
	cmoveq	%rcx, %rax
	movq	%rax, %r13
	jmp	.LBB2_7
.LBB2_12:
	movl	$4000, %edx                     # imm = 0xFA0
	movq	24(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdi
	movq	%r13, %rsi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	movq	%rax, %r14
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movw	$1, %bp
	xorl	%r15d, %r15d
.LBB2_13:                               # =>This Inner Loop Header: Depth=1
	movzwl	%bp, %eax
	shrl	$2, %eax
	imull	$5243, %eax, %eax               # imm = 0x147B
	shrl	$17, %eax
	imull	$100, %eax, %r12d
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r15,4), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	decl	%r12d
	cmpw	%r15w, %r12w
	jne	.LBB2_15
# %bb.14:                               #   in Loop: Header=BB2_13 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
.LBB2_15:                               #   in Loop: Header=BB2_13 Depth=1
	incq	%r15
	incl	%ebp
	cmpq	$1000, %r15                     # imm = 0x3E8
	jne	.LBB2_13
# %bb.16:
	subq	32(%rsp), %r14                  # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r14, %xmm0
	divsd	.LCPI2_2(%rip), %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kMeansStep2PiPfS0_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11kMeansStep1PfS_S_Piiiii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11kMeansStep2PiPfS0_S_iii,@object # @_Z11kMeansStep2PiPfS0_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z11kMeansStep2PiPfS0_S_iii
	.p2align	3, 0x0
_Z11kMeansStep2PiPfS0_S_iii:
	.quad	_Z26__device_stub__kMeansStep2PiPfS0_S_iii
	.size	_Z11kMeansStep2PiPfS0_S_iii, 8

	.type	_Z11kMeansStep1PfS_S_Piiiii,@object # @_Z11kMeansStep1PfS_S_Piiiii
	.globl	_Z11kMeansStep1PfS_S_Piiiii
	.p2align	3, 0x0
_Z11kMeansStep1PfS_S_Piiiii:
	.quad	_Z26__device_stub__kMeansStep1PfS_S_Piiiii
	.size	_Z11kMeansStep1PfS_S_Piiiii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%f "
	.size	.L.str.1, 4

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"total time: %f\n"
	.size	.L.str.5, 16

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11kMeansStep2PiPfS0_S_iii"
	.size	.L__unnamed_1, 28

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z11kMeansStep1PfS_S_Piiiii"
	.size	.L__unnamed_2, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\ninitial clusters:"
	.size	.Lstr, 19

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\nFinished!!"
	.size	.Lstr.1, 12

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Final clusters:"
	.size	.Lstr.2, 16

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__kMeansStep2PiPfS0_S_iii
	.addrsig_sym _Z26__device_stub__kMeansStep1PfS_S_Piiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11kMeansStep2PiPfS0_S_iii
	.addrsig_sym _Z11kMeansStep1PfS_S_Piiiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11kMeansStep2PiPfS0_S_iii ; -- Begin function _Z11kMeansStep2PiPfS0_S_iii
	.globl	_Z11kMeansStep2PiPfS0_S_iii
	.p2align	8
	.type	_Z11kMeansStep2PiPfS0_S_iii,@function
_Z11kMeansStep2PiPfS0_S_iii:            ; @_Z11kMeansStep2PiPfS0_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[8:11], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB0_8
; %bb.1:                                ; %.lr.ph51
	s_load_b256 s[0:7], s[0:1], 0x0
	v_mul_lo_u32 v3, s9, v1
	v_mov_b32_e32 v0, 0
	s_cmp_gt_i32 s9, 0
	s_mov_b32 s12, 0x47ae147b
	s_cselect_b32 s11, -1, 0
	s_mov_b32 s13, 0x3f847ae1
	s_mov_b32 s14, 0
	s_mul_i32 s15, s10, s9
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s11
	s_cbranch_vccnz .LBB0_7
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s16, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	global_load_b32 v2, v[4:5], off
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[6:7], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s2, v6
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v7, vcc_lo
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_max_i32_e32 v2, 1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_i32_e32 v2, v2
.LBB0_4:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v8, v[4:5], off
	s_mov_b32 s17, exec_lo
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v9, null, v2, v2, v8
	v_div_scale_f32 v12, vcc_lo, v8, v2, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v10, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v9, v10, 1.0
	v_fmac_f32_e32 v10, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v11, v12, v10
	v_fma_f32 v13, -v9, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v13, v10
	v_fma_f32 v9, -v9, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v9, v9, v10, v11
	v_div_fixup_f32 v8, v9, v2, v8
	global_store_b32 v[4:5], v8, off
	global_load_b32 v9, v[6:7], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v10, v8, v9
	v_sub_f32_e64 v8, -v8, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e32 vcc_lo, 0, v10
	v_cndmask_b32_e32 v8, v8, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[8:9], v8
	v_cmpx_lt_f64_e32 s[12:13], v[8:9]
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=2
	global_atomic_swap_b32 v0, v0, s[6:7]
.LBB0_6:                                ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s17
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, v6, 4
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_add_i32 s16, s16, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s16, 0
	s_cbranch_scc0 .LBB0_4
.LBB0_7:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v1, s10, v1
	v_add_nc_u32_e32 v3, s15, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s8, v1
	s_or_b32 s14, vcc_lo, s14
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB0_2
.LBB0_8:                                ; %._crit_edge52
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kMeansStep2PiPfS0_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11kMeansStep2PiPfS0_S_iii, .Lfunc_end0-_Z11kMeansStep2PiPfS0_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 484
; NumSgprs: 20
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11kMeansStep1PfS_S_Piiiii ; -- Begin function _Z11kMeansStep1PfS_S_Piiiii
	.globl	_Z11kMeansStep1PfS_S_Piiiii
	.p2align	8
	.type	_Z11kMeansStep1PfS_S_Piiiii,@function
_Z11kMeansStep1PfS_S_Piiiii:            ; @_Z11kMeansStep1PfS_S_Piiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[8:11], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB1_16
; %bb.1:                                ; %.preheader57.lr.ph
	s_load_b256 s[0:7], s[0:1], 0x0
	v_mul_lo_u32 v2, s10, v1
	s_cmp_gt_i32 s9, 0
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v8, 1
	s_cselect_b32 s16, -1, 0
	s_cmp_gt_i32 s10, 0
	s_mov_b32 s13, 0
	s_cselect_b32 s17, -1, 0
	s_mul_i32 s18, s11, s10
	s_mov_b32 s19, 0
.LBB1_2:                                ; %.preheader57
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_4 Depth 2
                                        ;       Child Loop BB1_6 Depth 3
                                        ;     Child Loop BB1_12 Depth 2
                                        ;       Child Loop BB1_13 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB1_9
; %bb.3:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_ashrrev_i32_e32 v3, 31, v2
	v_mov_b32_e32 v9, 0x7f7fffff
	s_mov_b32 s12, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_mov_b32 s20, s12
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	v_mov_b32_e32 v3, -1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
.LBB1_4:                                ; %.preheader
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_6 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB1_7
; %bb.5:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v7, v5
	s_lshl_b64 s[14:15], s[12:13], 2
	v_mov_b32_e32 v6, v4
	s_add_u32 s14, s2, s14
	s_addc_u32 s15, s3, s15
	s_mov_b32 s21, s10
.LBB1_6:                                ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v11, v0, s[14:15]
	global_load_b32 v12, v[6:7], off
	v_add_co_u32 v6, vcc_lo, v6, 4
	s_add_i32 s21, s21, -1
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_add_u32 s14, s14, 4
	s_addc_u32 s15, s15, 0
	s_cmp_eq_u32 s21, 0
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v11, v11, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v10, v11, v11
	s_cbranch_scc0 .LBB1_6
	s_branch .LBB1_8
.LBB1_7:                                ;   in Loop: Header=BB1_4 Depth=2
	v_mov_b32_e32 v10, 0
.LBB1_8:                                ; %._crit_edge
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_cmp_lt_f32_e32 vcc_lo, v10, v9
	s_add_i32 s12, s12, s10
	v_cndmask_b32_e32 v9, v9, v10, vcc_lo
	v_cndmask_b32_e64 v3, v3, s20, vcc_lo
	s_add_i32 s20, s20, 1
	s_cmp_eq_u32 s20, s9
	s_cbranch_scc0 .LBB1_4
	s_branch .LBB1_10
.LBB1_9:                                ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v3, -1
.LBB1_10:                               ; %.preheader56
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB1_15
; %bb.11:                               ; %.lr.ph65
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v9, v3, s10
	v_mul_lo_u32 v10, v1, s10
	s_mov_b32 s12, 0
.LBB1_12:                               ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_13 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v4, s12, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, s12, v9
	s_mov_b32 s14, 0
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v11, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v12, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v11, v[11:12], off
	global_load_b32 v7, v[4:5], off
.LBB1_13:                               ; %atomicrmw.start
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_12 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v6, v7, v11
	global_atomic_cmpswap_b32 v6, v[4:5], v[6:7], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v6, v7
	v_mov_b32_e32 v7, v6
	s_or_b32 s14, vcc_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB1_13
; %bb.14:                               ; %atomicrmw.end
                                        ;   in Loop: Header=BB1_12 Depth=2
	s_or_b32 exec_lo, exec_lo, s14
	s_add_i32 s12, s12, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s12, s10
	s_cbranch_scc0 .LBB1_12
.LBB1_15:                               ; %._crit_edge66
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v4, 31, v3
	v_add_nc_u32_e32 v1, s11, v1
	v_add_nc_u32_e32 v2, s18, v2
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s8, v1
	global_atomic_add_u32 v[3:4], v8, off
	s_or_b32 s19, vcc_lo, s19
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB1_2
.LBB1_16:                               ; %._crit_edge68
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11kMeansStep1PfS_S_Piiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z11kMeansStep1PfS_S_Piiiii, .Lfunc_end1-_Z11kMeansStep1PfS_S_Piiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 616
; NumSgprs: 24
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11kMeansStep2PiPfS0_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z11kMeansStep2PiPfS0_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11kMeansStep1PfS_S_Piiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     24
    .sgpr_spill_count: 0
    .symbol:         _Z11kMeansStep1PfS_S_Piiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
