/* 
 * Compile with
 * nvcc -arch=sm_11 bitonic_sort.cu
 */

#include <stdlib.h>
#include <stdio.h>
#include <time.h>

/* Every thread gets exactly one value in the unsorted array. */
#define THREADS 512 // 2^9
#define BLOCKS 128 // 2^15
#define NUM_VALS THREADS*BLOCKS

double getElapsedTime(clock_t start, clock_t stop)
{
    return ((double) (stop - start)) / CLOCKS_PER_SEC;
    //printf("Elapsed time: %.3fs\n", elapsed);
}

void fillArray(float *array, int length)
{
    srand(time(NULL));
    int i;
    for (i = 0; i < length; i++) {
        array[i] = (float)rand()/(float)RAND_MAX;
    }
}

__global__ void bitonic_sort_step(float *dev_values, int j, int k)
{
    unsigned int i, ixj; /* Sorting partners: i and ixj */
    i = threadIdx.x + blockDim.x * blockIdx.x;
    ixj = i^j;

    /* The threads with the lowest ids sort the array. */
    if ((ixj)>i) {
        if ((i&k)==0) {
            /* Sort ascending */
            if (dev_values[i]>dev_values[ixj]) {
                /* exchange(i,ixj); */
                float temp = dev_values[i];
                dev_values[i] = dev_values[ixj];
                dev_values[ixj] = temp;
            }
        }
        if ((i&k)!=0) {
            /* Sort descending */
            if (dev_values[i]<dev_values[ixj]) {
                /* exchange(i,ixj); */
                float temp = dev_values[i];
                dev_values[i] = dev_values[ixj];
                dev_values[ixj] = temp;
            }
        }
    }
}

/**
 * Inplace bitonic sort using CUDA.
 */
void gpuBitonicSort(float *values)
{
    float *devValues;
    size_t size = NUM_VALS * sizeof(float);

    cudaMalloc((void**) &devValues, size);
    cudaMemcpy(devValues, values, size, cudaMemcpyHostToDevice);

    dim3 blocks(BLOCKS,1);    /* Number of blocks   */
    dim3 threads(THREADS,1);  /* Number of threads  */

    int j, k;
    /* Major step */
    for (k = 2; k <= NUM_VALS; k <<= 1) {
        /* Minor step */
        for (j=k>>1; j>0; j=j>>1) {
            bitonic_sort_step<<<blocks, threads>>>(devValues, j, k);
        }
    }

    cudaDeviceSynchronize();

    cudaMemcpy(values, devValues, size, cudaMemcpyDeviceToHost);
    cudaFree(devValues);
}

const int ASCENDING = 1;
const int DESCENDING = 0;

void compare(float *a, int i, int j, int dir)
{
  if (dir == (a[i] > a[j])) {
        float h=a[i];
        a[i]=a[j];
        a[j]=h;
    }
}

void cpuBitonicMerge(float* values, int lo, int count, int direction)
{
    if (count > 1) {
        int k = count/2;
      
        for (int i=lo; i<lo+k; i++)
           compare(values, i, i+k, direction);
        cpuBitonicMerge(values, lo, k, direction);
        cpuBitonicMerge(values, lo+k, k, direction);
    }
}

void cpuBitonicSort(float *values, int lo, int count, int direction)
{
    if (count > 1) {
        int k = count/2;
        cpuBitonicSort(values, lo, k, ASCENDING);
        cpuBitonicSort(values, lo + k, k, DESCENDING);
        cpuBitonicMerge(values, lo, count, direction);
    }
}

int floatcomp(const void* elem1, const void* elem2)
{
    if(*(const float*)elem1 < *(const float*)elem2)
        return -1;
    return *(const float*)elem1 > *(const float*)elem2;
}

int main(void)
{
    clock_t start, stop;

    float *array    = (float*) malloc( NUM_VALS * sizeof(float));
    float *cpuArray = (float*) malloc( NUM_VALS * sizeof(float));
    float *gpuArray = (float*) malloc( NUM_VALS * sizeof(float));
    
    fillArray(array, NUM_VALS);
    for(int i = 0; i < NUM_VALS; i++) {
        cpuArray[i] = array[i];
        gpuArray[i] = array[i];
    }

    start = clock();
    gpuBitonicSort(gpuArray);
    stop = clock();

    printf("\nElapsed time on gpu: %.3fs\n", getElapsedTime(start, stop));

    start = clock();
    cpuBitonicSort(cpuArray, 0, NUM_VALS, ASCENDING);
    stop = clock();

    printf("\nElapsed time on cpu: %.3fs\n", getElapsedTime(start, stop));    
   
    //std::qsort(array, NUM_VALS, sizeof(float), floatcomp);
    for(int i = 0; i < NUM_VALS; i++) {
        if(gpuArray[i] != cpuArray[i]){
            printf("Error [%d] %f != %f\n", i, gpuArray[i], cpuArray[i]);
        }
    } 
  
    free(array);
    free(cpuArray);
    free(gpuArray);
}

	.file	"tmpxft_0030b814_00000000-6_avmis_lab4.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2037:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2037:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z14getElapsedTimell
	.type	_Z14getElapsedTimell, @function
_Z14getElapsedTimell:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	%rdi, %rsi
	cvtsi2sdq	%rsi, %xmm0
	divsd	.LC0(%rip), %xmm0
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z14getElapsedTimell, .-_Z14getElapsedTimell
	.globl	_Z9fillArrayPfi
	.type	_Z9fillArrayPfi, @function
_Z9fillArrayPfi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	xorl	%edi, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L4:
	cmpl	%ebx, %ebp
	jle	.L8
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC1(%rip), %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L4
.L8:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z9fillArrayPfi, .-_Z9fillArrayPfi
	.globl	_Z7comparePfiii
	.type	_Z7comparePfiii, @function
_Z7comparePfiii:
.LFB2030:
	.cfi_startproc
	endbr64
	movslq	%edx, %rdx
	movslq	%esi, %rsi
	movl	%ecx, %r8d
	leaq	(%rdi,%rdx,4), %rax
	leaq	(%rdi,%rsi,4), %rcx
	xorl	%edx, %edx
	movss	(%rcx), %xmm0
	movss	(%rax), %xmm1
	comiss	%xmm1, %xmm0
	seta	%dl
	cmpl	%r8d, %edx
	jne	.L9
	movss	%xmm1, (%rcx)
	movss	%xmm0, (%rax)
.L9:
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z7comparePfiii, .-_Z7comparePfiii
	.globl	_Z15cpuBitonicMergePfiii
	.type	_Z15cpuBitonicMergePfiii, @function
_Z15cpuBitonicMergePfiii:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%esi, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%ecx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%edx, %ebx
	pushq	%r8
	.cfi_def_cfa_offset 48
.L14:
	cmpl	$1, %ebx
	jle	.L11
	sarl	%ebx
	movl	%r9d, %r10d
	leal	(%rbx,%r9), %r13d
.L13:
	leal	(%r10,%rbx), %edx
	movl	%r10d, %esi
	movl	%r12d, %ecx
	movq	%rbp, %rdi
	call	_Z7comparePfiii
	incl	%r10d
	cmpl	%r13d, %r10d
	jl	.L13
	movl	%r9d, %esi
	movl	%r12d, %ecx
	movl	%ebx, %edx
	call	_Z15cpuBitonicMergePfiii
	movl	%r13d, %r9d
	jmp	.L14
.L11:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z15cpuBitonicMergePfiii, .-_Z15cpuBitonicMergePfiii
	.globl	_Z14cpuBitonicSortPfiii
	.type	_Z14cpuBitonicSortPfiii, @function
_Z14cpuBitonicSortPfiii:
.LFB2032:
	.cfi_startproc
	endbr64
	cmpl	$1, %edx
	jle	.L17
	jmp	_Z14cpuBitonicSortPfiii.part.0
.L17:
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z14cpuBitonicSortPfiii, .-_Z14cpuBitonicSortPfiii
	.type	_Z14cpuBitonicSortPfiii.part.0, @function
_Z14cpuBitonicSortPfiii.part.0:
.LFB2178:
	.cfi_startproc
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%edx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	sarl	%r14d
	movl	%ecx, %r13d
	movl	$1, %ecx
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%edx, %r12d
	movl	%r14d, %edx
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdi, %rbx
	call	_Z14cpuBitonicSortPfiii
	leal	(%r14,%rbp), %esi
	movl	%r14d, %edx
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	call	_Z14cpuBitonicSortPfiii
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movl	%ebp, %esi
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z15cpuBitonicMergePfiii
	.cfi_endproc
.LFE2178:
	.size	_Z14cpuBitonicSortPfiii.part.0, .-_Z14cpuBitonicSortPfiii.part.0
	.globl	_Z9floatcompPKvS0_
	.type	_Z9floatcompPKvS0_, @function
_Z9floatcompPKvS0_:
.LFB2033:
	.cfi_startproc
	endbr64
	movss	(%rdi), %xmm1
	movss	(%rsi), %xmm0
	orl	$-1, %eax
	comiss	%xmm1, %xmm0
	ja	.L21
	xorl	%eax, %eax
	comiss	%xmm0, %xmm1
	seta	%al
.L21:
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z9floatcompPKvS0_, .-_Z9floatcompPKvS0_
	.globl	_Z39__device_stub__Z17bitonic_sort_stepPfiiPfii
	.type	_Z39__device_stub__Z17bitonic_sort_stepPfiiPfii, @function
_Z39__device_stub__Z17bitonic_sort_stepPfiiPfii:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17bitonic_sort_stepPfii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L24:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z39__device_stub__Z17bitonic_sort_stepPfiiPfii, .-_Z39__device_stub__Z17bitonic_sort_stepPfiiPfii
	.globl	_Z17bitonic_sort_stepPfii
	.type	_Z17bitonic_sort_stepPfii, @function
_Z17bitonic_sort_stepPfii:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z17bitonic_sort_stepPfiiPfii
	.cfi_endproc
.LFE2060:
	.size	_Z17bitonic_sort_stepPfii, .-_Z17bitonic_sort_stepPfii
	.globl	_Z14gpuBitonicSortPf
	.type	_Z14gpuBitonicSortPf, @function
_Z14gpuBitonicSortPf:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$262144, %esi
	movl	$16, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	$2, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	movl	$33554433, %eax
	movl	$1, 24(%rsp)
	salq	$7, %rax
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	addq	$384, %rax
	movq	%rax, 28(%rsp)
.L33:
	movl	%ebp, %r12d
.L31:
	sarl	%r12d
	testl	%r12d, %r12d
	jle	.L37
	movl	36(%rsp), %ecx
	movq	28(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	8(%rsp), %rdi
	movl	%ebp, %edx
	movl	%r12d, %esi
	call	_Z39__device_stub__Z17bitonic_sort_stepPfiiPfii
	jmp	.L31
.L37:
	addl	%ebp, %ebp
	decl	%r13d
	jne	.L33
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z14gpuBitonicSortPf, .-_Z14gpuBitonicSortPf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"\nElapsed time on gpu: %.3fs\n"
.LC3:
	.string	"\nElapsed time on cpu: %.3fs\n"
.LC4:
	.string	"Error [%d] %f != %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$262144, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	call	malloc@PLT
	movl	$262144, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$262144, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$65536, %esi
	movq	%r13, %rdi
	movq	%rax, %rbx
	call	_Z9fillArrayPfi
	xorl	%eax, %eax
.L39:
	movss	0(%r13,%rax), %xmm0
	movss	%xmm0, 0(%rbp,%rax)
	movss	%xmm0, (%rbx,%rax)
	addq	$4, %rax
	cmpq	$262144, %rax
	jne	.L39
	call	clock@PLT
	movq	%rbx, %rdi
	leaq	.LC4(%rip), %r14
	movq	%rax, %r12
	call	_Z14gpuBitonicSortPf
	call	clock@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	subq	%r12, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC0(%rip), %xmm0
	call	__printf_chk@PLT
	call	clock@PLT
	movl	$1, %ecx
	xorl	%esi, %esi
	movq	%rbp, %rdi
	movl	$65536, %edx
	movq	%rax, %r12
	call	_Z14cpuBitonicSortPfiii.part.0
	call	clock@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	subq	%r12, %rax
	xorl	%r12d, %r12d
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC0(%rip), %xmm0
	call	__printf_chk@PLT
.L42:
	movss	(%rbx,%r12,4), %xmm0
	movss	0(%rbp,%r12,4), %xmm1
	ucomiss	%xmm1, %xmm0
	jp	.L43
	je	.L40
.L43:
	movl	%r12d, %edx
	movq	%r14, %rsi
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
.L40:
	incq	%r12
	cmpq	$65536, %r12
	jne	.L42
	movq	%r13, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	popq	%rbx
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z17bitonic_sort_stepPfii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2062:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z17bitonic_sort_stepPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2062:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1093567616
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/* 
 * Compile with
 * nvcc -arch=sm_11 bitonic_sort.cu
 */


#include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>

/* Every thread gets exactly one value in the unsorted array. */
#define THREADS 512 // 2^9
#define BLOCKS 128 // 2^15
#define NUM_VALS THREADS*BLOCKS

double getElapsedTime(clock_t start, clock_t stop)
{
    return ((double) (stop - start)) / CLOCKS_PER_SEC;
    //printf("Elapsed time: %.3fs\n", elapsed);
}

void fillArray(float *array, int length)
{
    srand(time(NULL));
    int i;
    for (i = 0; i < length; i++) {
        array[i] = (float)rand()/(float)RAND_MAX;
    }
}

__global__ void bitonic_sort_step(float *dev_values, int j, int k)
{
    unsigned int i, ixj; /* Sorting partners: i and ixj */
    i = threadIdx.x + blockDim.x * blockIdx.x;
    ixj = i^j;

    /* The threads with the lowest ids sort the array. */
    if ((ixj)>i) {
        if ((i&k)==0) {
            /* Sort ascending */
            if (dev_values[i]>dev_values[ixj]) {
                /* exchange(i,ixj); */
                float temp = dev_values[i];
                dev_values[i] = dev_values[ixj];
                dev_values[ixj] = temp;
            }
        }
        if ((i&k)!=0) {
            /* Sort descending */
            if (dev_values[i]<dev_values[ixj]) {
                /* exchange(i,ixj); */
                float temp = dev_values[i];
                dev_values[i] = dev_values[ixj];
                dev_values[ixj] = temp;
            }
        }
    }
}

/**
 * Inplace bitonic sort using CUDA.
 */
void gpuBitonicSort(float *values)
{
    float *devValues;
    size_t size = NUM_VALS * sizeof(float);

    hipMalloc((void**) &devValues, size);
    hipMemcpy(devValues, values, size, hipMemcpyHostToDevice);

    dim3 blocks(BLOCKS,1);    /* Number of blocks   */
    dim3 threads(THREADS,1);  /* Number of threads  */

    int j, k;
    /* Major step */
    for (k = 2; k <= NUM_VALS; k <<= 1) {
        /* Minor step */
        for (j=k>>1; j>0; j=j>>1) {
            bitonic_sort_step<<<blocks, threads>>>(devValues, j, k);
        }
    }

    hipDeviceSynchronize();

    hipMemcpy(values, devValues, size, hipMemcpyDeviceToHost);
    hipFree(devValues);
}

const int ASCENDING = 1;
const int DESCENDING = 0;

void compare(float *a, int i, int j, int dir)
{
  if (dir == (a[i] > a[j])) {
        float h=a[i];
        a[i]=a[j];
        a[j]=h;
    }
}

void cpuBitonicMerge(float* values, int lo, int count, int direction)
{
    if (count > 1) {
        int k = count/2;
      
        for (int i=lo; i<lo+k; i++)
           compare(values, i, i+k, direction);
        cpuBitonicMerge(values, lo, k, direction);
        cpuBitonicMerge(values, lo+k, k, direction);
    }
}

void cpuBitonicSort(float *values, int lo, int count, int direction)
{
    if (count > 1) {
        int k = count/2;
        cpuBitonicSort(values, lo, k, ASCENDING);
        cpuBitonicSort(values, lo + k, k, DESCENDING);
        cpuBitonicMerge(values, lo, count, direction);
    }
}

int floatcomp(const void* elem1, const void* elem2)
{
    if(*(const float*)elem1 < *(const float*)elem2)
        return -1;
    return *(const float*)elem1 > *(const float*)elem2;
}

int main(void)
{
    clock_t start, stop;

    float *array    = (float*) malloc( NUM_VALS * sizeof(float));
    float *cpuArray = (float*) malloc( NUM_VALS * sizeof(float));
    float *gpuArray = (float*) malloc( NUM_VALS * sizeof(float));
    
    fillArray(array, NUM_VALS);
    for(int i = 0; i < NUM_VALS; i++) {
        cpuArray[i] = array[i];
        gpuArray[i] = array[i];
    }

    start = clock();
    gpuBitonicSort(gpuArray);
    stop = clock();

    printf("\nElapsed time on gpu: %.3fs\n", getElapsedTime(start, stop));

    start = clock();
    cpuBitonicSort(cpuArray, 0, NUM_VALS, ASCENDING);
    stop = clock();

    printf("\nElapsed time on cpu: %.3fs\n", getElapsedTime(start, stop));    
   
    //std::qsort(array, NUM_VALS, sizeof(float), floatcomp);
    for(int i = 0; i < NUM_VALS; i++) {
        if(gpuArray[i] != cpuArray[i]){
            printf("Error [%d] %f != %f\n", i, gpuArray[i], cpuArray[i]);
        }
    } 
  
    free(array);
    free(cpuArray);
    free(gpuArray);
}

	.text
	.file	"avmis_lab4.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z14getElapsedTimell
.LCPI0_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	_Z14getElapsedTimell
	.type	_Z14getElapsedTimell,@function
_Z14getElapsedTimell:                   # @_Z14getElapsedTimell
	.cfi_startproc
# %bb.0:
	subq	%rdi, %rsi
	cvtsi2sd	%rsi, %xmm0
	divsd	.LCPI0_0(%rip), %xmm0
	retq
.Lfunc_end0:
	.size	_Z14getElapsedTimell, .Lfunc_end0-_Z14getElapsedTimell
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z9fillArrayPfi
.LCPI1_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z9fillArrayPfi
	.type	_Z9fillArrayPfi,@function
_Z9fillArrayPfi:                        # @_Z9fillArrayPfi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movq	%rdi, %rbx
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	testl	%ebp, %ebp
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebp, %r14d
	xorl	%r15d, %r15d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z9fillArrayPfi, .Lfunc_end1-_Z9fillArrayPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__bitonic_sort_stepPfii # -- Begin function _Z32__device_stub__bitonic_sort_stepPfii
	.type	_Z32__device_stub__bitonic_sort_stepPfii,@function
_Z32__device_stub__bitonic_sort_stepPfii: # @_Z32__device_stub__bitonic_sort_stepPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17bitonic_sort_stepPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z32__device_stub__bitonic_sort_stepPfii, .Lfunc_end2-_Z32__device_stub__bitonic_sort_stepPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z14gpuBitonicSortPf            # -- Begin function _Z14gpuBitonicSortPf
	.type	_Z14gpuBitonicSortPf,@function
_Z14gpuBitonicSortPf:                   # @_Z14gpuBitonicSortPf
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	movabsq	$4294967424, %r14               # imm = 0x100000080
	leaq	8(%rsp), %r15
	movl	$262144, %esi                   # imm = 0x40000
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$262144, %edx                   # imm = 0x40000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$2, %ebp
	leaq	384(%r14), %r15
.LBB3_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
	movl	%ebp, %r12d
	sarl	%r12d
	testl	%r12d, %r12d
	jle	.LBB3_5
.LBB3_2:                                # %.lr.ph
                                        #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.3:                                #   in Loop: Header=BB3_2 Depth=2
	movq	8(%rsp), %rdi
	movl	%r12d, %esi
	movl	%ebp, %edx
	callq	_Z32__device_stub__bitonic_sort_stepPfii
.LBB3_4:                                #   in Loop: Header=BB3_2 Depth=2
	movl	%r12d, %eax
	shrl	%eax
	cmpl	$1, %r12d
	movl	%eax, %r12d
	ja	.LBB3_2
.LBB3_5:                                # %._crit_edge
                                        #   in Loop: Header=BB3_1 Depth=1
	addl	%ebp, %ebp
	cmpl	$65537, %ebp                    # imm = 0x10001
	jl	.LBB3_1
# %bb.6:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movl	$262144, %edx                   # imm = 0x40000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z14gpuBitonicSortPf, .Lfunc_end3-_Z14gpuBitonicSortPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z7comparePfiii                 # -- Begin function _Z7comparePfiii
	.type	_Z7comparePfiii,@function
_Z7comparePfiii:                        # @_Z7comparePfiii
	.cfi_startproc
# %bb.0:
	movslq	%esi, %rax
	movss	(%rdi,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movslq	%edx, %rdx
	movss	(%rdi,%rdx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	xorl	%esi, %esi
	ucomiss	%xmm1, %xmm0
	seta	%sil
	cmpl	%ecx, %esi
	jne	.LBB4_2
# %bb.1:
	movss	%xmm1, (%rdi,%rax,4)
	movss	%xmm0, (%rdi,%rdx,4)
.LBB4_2:
	retq
.Lfunc_end4:
	.size	_Z7comparePfiii, .Lfunc_end4-_Z7comparePfiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z15cpuBitonicMergePfiii        # -- Begin function _Z15cpuBitonicMergePfiii
	.type	_Z15cpuBitonicMergePfiii,@function
_Z15cpuBitonicMergePfiii:               # @_Z15cpuBitonicMergePfiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebx
	movl	%edx, %ebp
                                        # kill: def $esi killed $esi def $rsi
	movq	%rdi, %r14
.LBB5_1:                                # %tailrecurse39
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_3 Depth 2
                                        #       Child Loop BB5_6 Depth 3
	cmpl	$2, %ebp
	jl	.LBB5_10
# %bb.2:                                # %.lr.ph29.preheader
                                        #   in Loop: Header=BB5_1 Depth=1
	movl	%ebp, %r15d
.LBB5_3:                                # %.lr.ph29
                                        #   Parent Loop BB5_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB5_6 Depth 3
	shrl	%r15d
	leal	(%r15,%rsi), %r12d
	cmpl	$2, %ebp
	jb	.LBB5_4
# %bb.5:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB5_3 Depth=2
	movslq	%esi, %rax
	movl	%r15d, %edx
	movslq	%r12d, %rcx
	leaq	(%r14,%rdx,4), %rdx
.LBB5_6:                                # %.lr.ph
                                        #   Parent Loop BB5_1 Depth=1
                                        #     Parent Loop BB5_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r14,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	(%rdx,%rax,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	xorl	%edi, %edi
	ucomiss	%xmm1, %xmm0
	seta	%dil
	cmpl	%ebx, %edi
	jne	.LBB5_8
# %bb.7:                                #   in Loop: Header=BB5_6 Depth=3
	movss	%xmm1, (%r14,%rax,4)
	movss	%xmm0, (%rdx,%rax,4)
.LBB5_8:                                # %_Z7comparePfiii.exit
                                        #   in Loop: Header=BB5_6 Depth=3
	incq	%rax
	cmpq	%rcx, %rax
	jl	.LBB5_6
# %bb.9:                                # %tailrecurse
                                        #   in Loop: Header=BB5_3 Depth=2
	movq	%r14, %rdi
                                        # kill: def $esi killed $esi killed $rsi
	movl	%r15d, %edx
	movl	%ebx, %ecx
	callq	_Z15cpuBitonicMergePfiii
	movl	%r12d, %esi
	cmpl	$3, %ebp
	movl	%r15d, %ebp
	ja	.LBB5_3
	jmp	.LBB5_10
.LBB5_4:                                #   in Loop: Header=BB5_1 Depth=1
	movl	%r15d, %ebp
	jmp	.LBB5_1
.LBB5_10:                               # %tailrecurse._crit_edge
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z15cpuBitonicMergePfiii, .Lfunc_end5-_Z15cpuBitonicMergePfiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z14cpuBitonicSortPfiii         # -- Begin function _Z14cpuBitonicSortPfiii
	.type	_Z14cpuBitonicSortPfiii,@function
_Z14cpuBitonicSortPfiii:                # @_Z14cpuBitonicSortPfiii
	.cfi_startproc
# %bb.0:
	cmpl	$1, %edx
	jle	.LBB6_1
# %bb.2:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebx
	movl	%edx, %ebp
	movl	%esi, %r14d
	movq	%rdi, %r15
	movl	%edx, %r12d
	shrl	%r12d
	movl	%r12d, %edx
	movl	$1, %ecx
	callq	_Z14cpuBitonicSortPfiii
	leal	(%r12,%r14), %esi
	movq	%r15, %rdi
	movl	%r12d, %edx
	xorl	%ecx, %ecx
	callq	_Z14cpuBitonicSortPfiii
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z15cpuBitonicMergePfiii        # TAILCALL
.LBB6_1:                                # %common.ret12
	.cfi_restore %rbx
	.cfi_restore %rbp
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
	retq
.Lfunc_end6:
	.size	_Z14cpuBitonicSortPfiii, .Lfunc_end6-_Z14cpuBitonicSortPfiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9floatcompPKvS0_              # -- Begin function _Z9floatcompPKvS0_
	.type	_Z9floatcompPKvS0_,@function
_Z9floatcompPKvS0_:                     # @_Z9floatcompPKvS0_
	.cfi_startproc
# %bb.0:
	movss	(%rdi), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	(%rsi), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	xorl	%ecx, %ecx
	ucomiss	%xmm1, %xmm0
	seta	%cl
	ucomiss	%xmm0, %xmm1
	movl	$-1, %eax
	cmovbel	%ecx, %eax
	retq
.Lfunc_end7:
	.size	_Z9floatcompPKvS0_, .Lfunc_end7-_Z9floatcompPKvS0_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI8_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$262144, %edi                   # imm = 0x40000
	callq	malloc
	movq	%rax, %rbx
	movl	$262144, %edi                   # imm = 0x40000
	callq	malloc
	movq	%rax, %r14
	movl	$262144, %edi                   # imm = 0x40000
	callq	malloc
	movq	%rax, %r15
	movq	%rbx, %rdi
	movl	$65536, %esi                    # imm = 0x10000
	callq	_Z9fillArrayPfi
	movl	$262144, %edx                   # imm = 0x40000
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	memcpy@PLT
	movl	$262144, %edx                   # imm = 0x40000
	movq	%r15, %rdi
	movq	%rbx, %rsi
	callq	memcpy@PLT
	callq	clock
	movq	%rax, %r12
	movq	%r15, %rdi
	callq	_Z14gpuBitonicSortPf
	callq	clock
	subq	%r12, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI8_0(%rip), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	callq	clock
	movq	%rax, %r13
	xorl	%r12d, %r12d
	movq	%r14, %rdi
	xorl	%esi, %esi
	movl	$65536, %edx                    # imm = 0x10000
	movl	$1, %ecx
	callq	_Z14cpuBitonicSortPfiii
	callq	clock
	subq	%r13, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI8_0(%rip), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
.LBB8_1:                                # =>This Inner Loop Header: Depth=1
	movss	(%r15,%r12,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	(%r14,%r12,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm0
	jne	.LBB8_2
	jnp	.LBB8_3
.LBB8_2:                                #   in Loop: Header=BB8_1 Depth=1
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	movl	$.L.str.2, %edi
	movl	%r12d, %esi
	movb	$2, %al
	callq	printf
.LBB8_3:                                #   in Loop: Header=BB8_1 Depth=1
	incq	%r12
	cmpq	$65536, %r12                    # imm = 0x10000
	jne	.LBB8_1
# %bb.4:
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	main, .Lfunc_end8-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17bitonic_sort_stepPfii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17bitonic_sort_stepPfii,@object # @_Z17bitonic_sort_stepPfii
	.section	.rodata,"a",@progbits
	.globl	_Z17bitonic_sort_stepPfii
	.p2align	3, 0x0
_Z17bitonic_sort_stepPfii:
	.quad	_Z32__device_stub__bitonic_sort_stepPfii
	.size	_Z17bitonic_sort_stepPfii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\nElapsed time on gpu: %.3fs\n"
	.size	.L.str, 29

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\nElapsed time on cpu: %.3fs\n"
	.size	.L.str.1, 29

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Error [%d] %f != %f\n"
	.size	.L.str.2, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17bitonic_sort_stepPfii"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__bitonic_sort_stepPfii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17bitonic_sort_stepPfii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17bitonic_sort_stepPfii ; -- Begin function _Z17bitonic_sort_stepPfii
	.globl	_Z17bitonic_sort_stepPfii
	.p2align	8
	.type	_Z17bitonic_sort_stepPfii,@function
_Z17bitonic_sort_stepPfii:              ; @_Z17bitonic_sort_stepPfii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s15, s4, v[0:1]
	v_xor_b32_e32 v0, s2, v4
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 v0, v4
	s_cbranch_execz .LBB0_7
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[4:5]
	v_dual_mov_b32 v1, v5 :: v_dual_and_b32 v4, s3, v4
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v6, vcc_lo
	s_mov_b32 s0, 0
	s_clause 0x1
	global_load_b32 v5, v[0:1], off
	global_load_b32 v6, v[2:3], off
	s_mov_b32 s1, exec_lo
	v_cmpx_ne_u32_e32 0, v4
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_3
; %bb.2:
	s_waitcnt vmcnt(0)
	v_cmp_lt_f32_e32 vcc_lo, v5, v6
	s_and_b32 s0, vcc_lo, exec_lo
.LBB0_3:                                ; %Flow
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB0_5
; %bb.4:
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, v5, v6
	s_and_not1_b32 s0, s0, exec_lo
	s_and_b32 s2, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s0, s0, s2
.LBB0_5:                                ; %Flow46
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_7
; %bb.6:                                ; %.sink.split
	s_waitcnt vmcnt(0)
	s_clause 0x1
	global_store_b32 v[0:1], v6, off
	global_store_b32 v[2:3], v5, off
.LBB0_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17bitonic_sort_stepPfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17bitonic_sort_stepPfii, .Lfunc_end0-_Z17bitonic_sort_stepPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17bitonic_sort_stepPfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17bitonic_sort_stepPfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
