#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>

#define TILE_WIDTH 16

//M and N number of threads (grid and block)

void secuential(const int a[] ,const int b[], unsigned long int c[], const int sqrt_dim);
     
__global__ void multiply( const int A[] ,const int B[], unsigned long int C[] , const int width,const int thread_number)
{
 int sum = 0;
 int col = blockIdx.x*TILE_WIDTH + threadIdx.x;
 int row = blockIdx.y*TILE_WIDTH + threadIdx.y;
 if(col < width && row < width) {
 for (int k = 0; k < width; k++)
 sum += A[row * width + k] * B[k * width + col];
 C[row * width + col] = sum;
 }

	
} 

    
int main(int argc, char *argv[]){
	//Measure time
	clock_t time_begin;
    // pointers to host & device arrays
      int *d_array1 = 0,*d_array2 = 0; unsigned long int *d_array3 = 0;
      int *h_array1 = 0,*h_array2 = 0;unsigned long int*h_array3 = 0;
	  unsigned long int *h_array_sec= 0;
	 unsigned int size_array=512*512; //here, size_array =L has to be a square

	 int N=512;
	 if(argc == 3){
		 size_array=atoi(argv[1]) * atoi(argv[1]) ;
		 N=atoi(argv[2]);
	
	 }  
      // malloc columns of host arrays
	  h_array1 = (int*)malloc( size_array * sizeof(int));
	  h_array_sec= (unsigned long int*)malloc( size_array * sizeof(unsigned long int));
	  h_array2 = (int*)malloc( size_array * sizeof(int));
	  h_array3 = (unsigned long int*)malloc( size_array * sizeof(unsigned long int));
	
	  
	//printf("Array A:\n");
	for(unsigned long int i=0; i<size_array; i++){
		h_array1[i]=1;//rand()%10;
	//	printf("%i\t",  h_array1[i]);
		//if((i+1)%(int)sqrt((float)size_array)==0)
		//	printf("\n");
	}
	//printf("\n");
 
	//printf("Array B:\n");
	for(int i=0; i<size_array; i++){
		h_array2[i]=1;//rand()%10; 	
		//printf("%i\t",  h_array2[i]);
		//if((i+1)%(int)sqrt((float)size_array)==0)
		//	printf("\n");
	}
	//printf("\n");
 

     // cudaMalloc a device array
    cudaMalloc(&d_array1,size_array * sizeof(int));    
	cudaMalloc(&d_array2,size_array * sizeof(int));  
	cudaMalloc(&d_array3,size_array * sizeof(unsigned long int));  
    // download and inspect the result on the host:
    cudaMemcpy(d_array1, h_array1, sizeof(int)*size_array, cudaMemcpyHostToDevice);   
	cudaMemcpy(d_array2, h_array2, sizeof(int)*size_array, cudaMemcpyHostToDevice);   

    //dim3 bloque(N,N); //Bloque bidimensional de N*N hilos (max 512 threads in a block)
    //dim3 grid(1,1);  //Grid bidimensional de M*M bloques
	 dim3 bloque(TILE_WIDTH, TILE_WIDTH);
	dim3 grid((int)ceil(double(N)/double(bloque.x)), ceil(double(N)/double(bloque.y)));
	int thread_number= N*N;
	/*if (N*N > 512){
            bloque.x = 512;
            bloque.y = 512;
            grid.x = ceil(double(N)/double(bloque.x));
            grid.y = ceil(double(N)/double(bloque.y));
       }*/
	printf("%i threads, %ix%i matrix\n", thread_number,  (int)sqrt((float)size_array), (int)sqrt((float)size_array));
	time_begin=clock();
    
	multiply<<<grid, bloque>>>(d_array1, d_array2 , d_array3,sqrt((float)size_array), thread_number);
    cudaThreadSynchronize();
    // download and inspect the result on the host:
    cudaMemcpy(h_array3, d_array3, sizeof(unsigned long int)*size_array, cudaMemcpyDeviceToHost); 
	
	//printf("GPU time: %f seconds\n", clock() - time_begin);
	//windows time
	printf("GPU time, %i threads: %f seconds\n", thread_number,(((float)clock() - (float)time_begin) / 1000000.0F ) * 1000  ); //1.18s



	printf("Array C=B + AB^t + A^t :\n");
    for(int i=0; i<size_array; i++){
        printf("%i\t", h_array3[i]);
	if((i+1)%(int)(sqrt((float)size_array))==0)
		printf("\n");
	}
	printf("\n");
	time_begin=clock();
	secuential(h_array1, h_array2,  h_array_sec, sqrt((float)size_array));

	//printf("CPU time: %f seconds\n", clock() - time_begin);
	//windows time
	printf("CPU time: %f seconds\n", (((float)clock() - (float)time_begin) / 1000000.0F ) * 1000  ); //1.18s
     // deallocate memory
	bool b=true;
	for(int i=0; i<size_array; i++){
		if(h_array_sec[i] !=  h_array3[i]){
			printf("GPU and CPU have different results (at least) at position %i\n", i);
			b=false;
			break;		
		}
	}
	if(b)
		printf("GPU and CPU have the same results\n");
    free(h_array3); free(h_array2); free(h_array1); free(h_array_sec);
    cudaFree(d_array3);cudaFree(d_array2);cudaFree(d_array1);

	  

}

void secuential(const int a[] ,const int b[], unsigned long int c[], const int sqrt_dim){
	int dim = sqrt_dim* sqrt_dim;
	int index_i, index_j;
	//int *c= (int *)malloc ( dim * sizeof(int));
	for(int i=0; i< dim; i++){
		index_i = (int)i%sqrt_dim; 
		index_j = (i-index_i)/sqrt_dim;
		c[i]= b[i]; //c= b
		c[i]+= a[index_j+ index_i * sqrt_dim]; //c+= a^t
		for(int j=0;j<sqrt_dim;j++){ //row of first matrix
			c[i]+=a[j+index_j * sqrt_dim ]*b[j + index_i*sqrt_dim]; //c+= a*b^t
		}
	}

	/*printf("Sequential result: Array C=B + AB^t + A^t :\n");
    for(int i=0; i<dim; i++){
        printf("%i\t", c[i]);
		if((i+1)%(int)(sqrt((float)dim))==0)
			printf("\n");
	}
	printf("\n");*/
	//free(c);
}

	.file	"tmpxft_002ba78c_00000000-6_matrix_mult.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10secuentialPKiS0_Pmi
	.type	_Z10secuentialPKiS0_Pmi, @function
_Z10secuentialPKiS0_Pmi:
.LFB2028:
	.cfi_startproc
	endbr64
	movl	%ecx, %r10d
	movq	%rsi, %r8
	xorl	%esi, %esi
	movq	%rdx, %r9
	imull	%ecx, %r10d
	movl	%esi, %eax
	cmpl	%esi, %r10d
	jg	.L9
	ret
.L9:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
.L6:
	cltd
	idivl	%ecx
	movl	%esi, %eax
	subl	%edx, %eax
	movl	%edx, %r11d
	cltd
	idivl	%ecx
	movl	%r11d, %edx
	imull	%ecx, %edx
	leal	(%rdx,%rax), %r11d
	movslq	%edx, %rdx
	imull	%ecx, %eax
	movslq	%r11d, %r11
	leaq	(%r8,%rdx,4), %rbp
	movslq	(%rdi,%r11,4), %rbx
	movslq	(%r8,%rsi,4), %r11
	cltq
	addq	%r11, %rbx
	leaq	(%rdi,%rax,4), %r11
	xorl	%eax, %eax
.L4:
	cmpl	%eax, %ecx
	jle	.L11
	movl	(%r11,%rax,4), %edx
	imull	0(%rbp,%rax,4), %edx
	incq	%rax
	movslq	%edx, %rdx
	addq	%rdx, %rbx
	jmp	.L4
.L11:
	movq	%rbx, (%r9,%rsi,8)
	incq	%rsi
	movl	%esi, %eax
	cmpl	%esi, %r10d
	jg	.L6
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z10secuentialPKiS0_Pmi, .-_Z10secuentialPKiS0_Pmi
	.globl	_Z35__device_stub__Z8multiplyPKiS0_PmiiPKiS0_Pmii
	.type	_Z35__device_stub__Z8multiplyPKiS0_PmiiPKiS0_Pmii, @function
_Z35__device_stub__Z8multiplyPKiS0_PmiiPKiS0_Pmii:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8multiplyPKiS0_Pmii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L12:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z35__device_stub__Z8multiplyPKiS0_PmiiPKiS0_Pmii, .-_Z35__device_stub__Z8multiplyPKiS0_PmiiPKiS0_Pmii
	.globl	_Z8multiplyPKiS0_Pmii
	.type	_Z8multiplyPKiS0_Pmii, @function
_Z8multiplyPKiS0_Pmii:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z8multiplyPKiS0_PmiiPKiS0_Pmii
	.cfi_endproc
.LFE2054:
	.size	_Z8multiplyPKiS0_Pmii, .-_Z8multiplyPKiS0_Pmii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"%i threads, %ix%i matrix\n"
.LC4:
	.string	"GPU time, %i threads: %f seconds\n"
.LC5:
	.string	"Array C=B + AB^t + A^t :\n"
.LC6:
	.string	"%i\t"
.LC7:
	.string	"\n"
.LC8:
	.string	"CPU time: %f seconds\n"
.LC9:
	.string	"GPU and CPU have different results (at least) at position %i\n"
.LC10:
	.string	"GPU and CPU have the same results\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	movq	%rax, 40(%rsp)
	movq	%rax, 48(%rsp)
	movq	%rax, 56(%rsp)
	cmpl	$3, %edi
	jne	.L31
	movq	8(%rsi), %rdi
	movq	%rsi, %rbp
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %ebx
	imull	%eax, %ebx
	call	atoi@PLT
	movl	%eax, %r14d
	jmp	.L18
.L31:
	movl	$512, %r14d
	movl	$262144, %ebx
.L18:
	movl	%ebx, %ebp
	leaq	0(,%rbp,4), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	%rax, 16(%rsp)
	leaq	0(,%rbp,8), %rax
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r15
	call	malloc@PLT
	leaq	0(,%rbp,8), %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movq	%rax, %r13
	xorl	%eax, %eax
.L19:
	cmpq	%rbp, %rax
	jnb	.L34
	movq	16(%rsp), %rcx
	movl	$1, (%rcx,%rax,4)
	incq	%rax
	jmp	.L19
.L34:
	xorl	%eax, %eax
.L21:
	cmpl	%ebx, %eax
	jnb	.L35
	movl	$1, (%r12,%rax,4)
	incq	%rax
	jmp	.L21
.L35:
	movq	8(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	40(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	cvtsi2sdl	%r14d, %xmm0
	mulsd	.LC0(%rip), %xmm0
	imull	%r14d, %r14d
	call	ceil@PLT
	cvtsi2ssl	%ebx, %xmm2
	movl	$1, 84(%rsp)
	cvttsd2sil	%xmm0, %eax
	movss	%xmm2, 8(%rsp)
	movl	%eax, 76(%rsp)
	cvttsd2siq	%xmm0, %rax
	movaps	%xmm2, %xmm0
	movl	%eax, 80(%rsp)
	call	sqrtf@PLT
	movd	%xmm0, %ebp
	cvtsi2ssl	%ebx, %xmm0
	call	sqrtf@PLT
	movd	%ebp, %xmm3
	movl	%r14d, %edx
	xorl	%eax, %eax
	cvttss2sil	%xmm0, %ecx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	cvttss2sil	%xmm3, %r8d
	call	__printf_chk@PLT
	call	clock@PLT
	movq	76(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	84(%rsp), %esi
	movl	$1, %ecx
	movq	%rax, %rbp
	movabsq	$68719476752, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	cvtsi2ssl	%ebx, %xmm0
	call	sqrtf@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	%r14d, %r8d
	cvttss2sil	%xmm0, %ecx
	movq	40(%rsp), %rdi
	call	_Z35__device_stub__Z8multiplyPKiS0_PmiiPKiS0_Pmii
.L23:
	call	cudaThreadSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	%r13, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	call	clock@PLT
	cvtsi2ssq	%rbp, %xmm1
	movl	%r14d, %edx
	leaq	.LC4(%rip), %rsi
	cvtsi2ssq	%rax, %xmm0
	movl	$2, %edi
	movb	$1, %al
	xorl	%r14d, %r14d
	leaq	.LC6(%rip), %rbp
	subss	%xmm1, %xmm0
	divss	.LC2(%rip), %xmm0
	mulss	.LC3(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC5(%rip), %rsi
	call	__printf_chk@PLT
.L24:
	cmpl	%ebx, %r14d
	jnb	.L36
	movq	0(%r13,%r14,8), %rdx
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movss	8(%rsp), %xmm0
	call	sqrtf@PLT
	leal	1(%r14), %eax
	cvttss2sil	%xmm0, %esi
	cltd
	idivl	%esi
	testl	%edx, %edx
	jne	.L25
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L25:
	incq	%r14
	jmp	.L24
.L36:
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	clock@PLT
	movss	8(%rsp), %xmm0
	movq	%rax, %r14
	call	sqrtf@PLT
	movq	16(%rsp), %rdi
	movq	%r15, %rdx
	movq	%r12, %rsi
	cvttss2sil	%xmm0, %ecx
	call	_Z10secuentialPKiS0_Pmi
	call	clock@PLT
	cvtsi2ssq	%r14, %xmm1
	movl	$2, %edi
	leaq	.LC8(%rip), %rsi
	cvtsi2ssq	%rax, %xmm0
	movb	$1, %al
	subss	%xmm1, %xmm0
	divss	.LC2(%rip), %xmm0
	mulss	.LC3(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	xorl	%edx, %edx
.L27:
	cmpl	%ebx, %edx
	jnb	.L37
	movq	0(%r13,%rdx,8), %rcx
	leaq	1(%rdx), %rax
	cmpq	%rcx, (%r15,%rdx,8)
	je	.L32
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L28
.L32:
	movq	%rax, %rdx
	jmp	.L27
.L37:
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L28:
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	%r15, %rdi
	call	free@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z8multiplyPKiS0_Pmii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z8multiplyPKiS0_Pmii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1068498944
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1232348160
	.align 4
.LC3:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include "hip/hip_runtime.h"


#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>

#define TILE_WIDTH 16

//M and N number of threads (grid and block)

void secuential(const int a[] ,const int b[], unsigned long int c[], const int sqrt_dim);
     
__global__ void multiply( const int A[] ,const int B[], unsigned long int C[] , const int width,const int thread_number)
{
 int sum = 0;
 int col = blockIdx.x*TILE_WIDTH + threadIdx.x;
 int row = blockIdx.y*TILE_WIDTH + threadIdx.y;
 if(col < width && row < width) {
 for (int k = 0; k < width; k++)
 sum += A[row * width + k] * B[k * width + col];
 C[row * width + col] = sum;
 }

	
} 

    
int main(int argc, char *argv[]){
	//Measure time
	clock_t time_begin;
    // pointers to host & device arrays
      int *d_array1 = 0,*d_array2 = 0; unsigned long int *d_array3 = 0;
      int *h_array1 = 0,*h_array2 = 0;unsigned long int*h_array3 = 0;
	  unsigned long int *h_array_sec= 0;
	 unsigned int size_array=512*512; //here, size_array =L has to be a square

	 int N=512;
	 if(argc == 3){
		 size_array=atoi(argv[1]) * atoi(argv[1]) ;
		 N=atoi(argv[2]);
	
	 }  
      // malloc columns of host arrays
	  h_array1 = (int*)malloc( size_array * sizeof(int));
	  h_array_sec= (unsigned long int*)malloc( size_array * sizeof(unsigned long int));
	  h_array2 = (int*)malloc( size_array * sizeof(int));
	  h_array3 = (unsigned long int*)malloc( size_array * sizeof(unsigned long int));
	
	  
	//printf("Array A:\n");
	for(unsigned long int i=0; i<size_array; i++){
		h_array1[i]=1;//rand()%10;
	//	printf("%i\t",  h_array1[i]);
		//if((i+1)%(int)sqrt((float)size_array)==0)
		//	printf("\n");
	}
	//printf("\n");
 
	//printf("Array B:\n");
	for(int i=0; i<size_array; i++){
		h_array2[i]=1;//rand()%10; 	
		//printf("%i\t",  h_array2[i]);
		//if((i+1)%(int)sqrt((float)size_array)==0)
		//	printf("\n");
	}
	//printf("\n");
 

     // cudaMalloc a device array
    hipMalloc(&d_array1,size_array * sizeof(int));    
	hipMalloc(&d_array2,size_array * sizeof(int));  
	hipMalloc(&d_array3,size_array * sizeof(unsigned long int));  
    // download and inspect the result on the host:
    hipMemcpy(d_array1, h_array1, sizeof(int)*size_array, hipMemcpyHostToDevice);   
	hipMemcpy(d_array2, h_array2, sizeof(int)*size_array, hipMemcpyHostToDevice);   

    //dim3 bloque(N,N); //Bloque bidimensional de N*N hilos (max 512 threads in a block)
    //dim3 grid(1,1);  //Grid bidimensional de M*M bloques
	 dim3 bloque(TILE_WIDTH, TILE_WIDTH);
	dim3 grid((int)ceil(double(N)/double(bloque.x)), ceil(double(N)/double(bloque.y)));
	int thread_number= N*N;
	/*if (N*N > 512){
            bloque.x = 512;
            bloque.y = 512;
            grid.x = ceil(double(N)/double(bloque.x));
            grid.y = ceil(double(N)/double(bloque.y));
       }*/
	printf("%i threads, %ix%i matrix\n", thread_number,  (int)sqrt((float)size_array), (int)sqrt((float)size_array));
	time_begin=clock();
    
	multiply<<<grid, bloque>>>(d_array1, d_array2 , d_array3,sqrt((float)size_array), thread_number);
    hipDeviceSynchronize();
    // download and inspect the result on the host:
    hipMemcpy(h_array3, d_array3, sizeof(unsigned long int)*size_array, hipMemcpyDeviceToHost); 
	
	//printf("GPU time: %f seconds\n", clock() - time_begin);
	//windows time
	printf("GPU time, %i threads: %f seconds\n", thread_number,(((float)clock() - (float)time_begin) / 1000000.0F ) * 1000  ); //1.18s



	printf("Array C=B + AB^t + A^t :\n");
    for(int i=0; i<size_array; i++){
        printf("%i\t", h_array3[i]);
	if((i+1)%(int)(sqrt((float)size_array))==0)
		printf("\n");
	}
	printf("\n");
	time_begin=clock();
	secuential(h_array1, h_array2,  h_array_sec, sqrt((float)size_array));

	//printf("CPU time: %f seconds\n", clock() - time_begin);
	//windows time
	printf("CPU time: %f seconds\n", (((float)clock() - (float)time_begin) / 1000000.0F ) * 1000  ); //1.18s
     // deallocate memory
	bool b=true;
	for(int i=0; i<size_array; i++){
		if(h_array_sec[i] !=  h_array3[i]){
			printf("GPU and CPU have different results (at least) at position %i\n", i);
			b=false;
			break;		
		}
	}
	if(b)
		printf("GPU and CPU have the same results\n");
    free(h_array3); free(h_array2); free(h_array1); free(h_array_sec);
    hipFree(d_array3);hipFree(d_array2);hipFree(d_array1);

	  

}

void secuential(const int a[] ,const int b[], unsigned long int c[], const int sqrt_dim){
	int dim = sqrt_dim* sqrt_dim;
	int index_i, index_j;
	//int *c= (int *)malloc ( dim * sizeof(int));
	for(int i=0; i< dim; i++){
		index_i = (int)i%sqrt_dim; 
		index_j = (i-index_i)/sqrt_dim;
		c[i]= b[i]; //c= b
		c[i]+= a[index_j+ index_i * sqrt_dim]; //c+= a^t
		for(int j=0;j<sqrt_dim;j++){ //row of first matrix
			c[i]+=a[j+index_j * sqrt_dim ]*b[j + index_i*sqrt_dim]; //c+= a*b^t
		}
	}

	/*printf("Sequential result: Array C=B + AB^t + A^t :\n");
    for(int i=0; i<dim; i++){
        printf("%i\t", c[i]);
		if((i+1)%(int)(sqrt((float)dim))==0)
			printf("\n");
	}
	printf("\n");*/
	//free(c);
}

	.text
	.file	"matrix_mult.hip"
	.globl	_Z23__device_stub__multiplyPKiS0_Pmii # -- Begin function _Z23__device_stub__multiplyPKiS0_Pmii
	.type	_Z23__device_stub__multiplyPKiS0_Pmii,@function
_Z23__device_stub__multiplyPKiS0_Pmii:  # @_Z23__device_stub__multiplyPKiS0_Pmii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8multiplyPKiS0_Pmii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z23__device_stub__multiplyPKiS0_Pmii, .Lfunc_end0-_Z23__device_stub__multiplyPKiS0_Pmii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x3fb0000000000000              # double 0.0625
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI1_1:
	.long	0x49742400                      # float 1.0E+6
.LCPI1_2:
	.long	0x447a0000                      # float 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%eax, %eax
	movq	%rax, 24(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 8(%rsp)
	cmpl	$3, %edi
	jne	.LBB1_1
# %bb.2:
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebp
	imull	%eax, %ebp
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, (%rsp)                    # 4-byte Spill
	jmp	.LBB1_3
.LBB1_1:
	movl	$262144, %ebp                   # imm = 0x40000
	movl	$512, (%rsp)                    # 4-byte Folded Spill
                                        # imm = 0x200
.LBB1_3:
	movl	%ebp, %r14d
	leaq	(,%r14,4), %r13
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %rbx
	leaq	(,%r14,8), %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r12
	testl	%ebp, %ebp
	je	.LBB1_9
# %bb.4:                                # %.lr.ph.preheader
	xorl	%eax, %eax
.LBB1_5:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$1, (%rbx,%rax,4)
	incq	%rax
	cmpq	%rax, %r14
	jne	.LBB1_5
# %bb.6:                                # %.preheader
	testq	%r14, %r14
	je	.LBB1_9
# %bb.7:                                # %.lr.ph88.preheader
	xorl	%eax, %eax
.LBB1_8:                                # %.lr.ph88
                                        # =>This Inner Loop Header: Depth=1
	movl	$1, (%r15,%rax,4)
	incq	%rax
	cmpq	%rax, %r14
	jne	.LBB1_8
.LBB1_9:                                # %._crit_edge
	leaq	24(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	%rbx, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r15, 40(%rsp)                  # 8-byte Spill
	movq	%r15, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	(%rsp), %r15d                   # 4-byte Reload
	cvtsi2sd	%r15d, %xmm0
	mulsd	.LCPI1_0(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %eax
	cvttsd2si	%xmm0, %rbp
	shlq	$32, %rbp
	orq	%rax, %rbp
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r14d, %xmm0
	imull	%r15d, %r15d
	sqrtss	%xmm0, %xmm0
	cvttss2si	%xmm0, %r13d
	movl	$.L.str, %edi
	movl	%r15d, %esi
	movl	%r13d, %edx
	movl	%r13d, %ecx
	xorl	%eax, %eax
	callq	printf
	callq	clock
	movq	%rax, (%rsp)                    # 8-byte Spill
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%rbp, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_11
# %bb.10:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	%r13d, %ecx
	movl	%r15d, %r8d
	callq	_Z23__device_stub__multiplyPKiS0_Pmii
.LBB1_11:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	%r12, %rdi
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	cvtsi2ssq	(%rsp), %xmm1           # 8-byte Folded Reload
	subss	%xmm1, %xmm0
	divss	.LCPI1_1(%rip), %xmm0
	mulss	.LCPI1_2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.1, %edi
	movl	%r15d, %esi
	movb	$1, %al
	callq	printf
	movl	$.Lstr, %edi
	callq	puts@PLT
	testq	%r14, %r14
	movq	40(%rsp), %r15                  # 8-byte Reload
	je	.LBB1_16
# %bb.12:                               # %.lr.ph91.preheader
	xorl	%ebp, %ebp
.LBB1_13:                               # %.lr.ph91
                                        # =>This Inner Loop Header: Depth=1
	movq	(%r12,%rbp,8), %rsi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbp
	movl	%ebp, %eax
	cltd
	idivl	%r13d
	testl	%edx, %edx
	jne	.LBB1_15
# %bb.14:                               #   in Loop: Header=BB1_13 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
.LBB1_15:                               #   in Loop: Header=BB1_13 Depth=1
	cmpq	%rbp, %r14
	jne	.LBB1_13
.LBB1_16:                               # %._crit_edge92
	movl	$10, %edi
	callq	putchar@PLT
	callq	clock
	movq	%rax, %rbp
	movq	%rbx, %rdi
	movq	%r15, %rsi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	%r13d, %ecx
	movq	%rdx, %r13
	callq	_Z10secuentialPKiS0_Pmi
	callq	clock
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2ss	%rbp, %xmm1
	subss	%xmm1, %xmm0
	divss	.LCPI1_1(%rip), %xmm0
	mulss	.LCPI1_2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	testq	%r14, %r14
	je	.LBB1_21
# %bb.17:                               # %.lr.ph96.preheader
	xorl	%esi, %esi
.LBB1_18:                               # %.lr.ph96
                                        # =>This Inner Loop Header: Depth=1
	movq	(%r13,%rsi,8), %rax
	cmpq	(%r12,%rsi,8), %rax
	jne	.LBB1_19
# %bb.20:                               #   in Loop: Header=BB1_18 Depth=1
	incq	%rsi
	cmpq	%rsi, %r14
	jne	.LBB1_18
.LBB1_21:                               # %.critedge
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	jmp	.LBB1_22
.LBB1_19:
	movl	$.L.str.6, %edi
                                        # kill: def $esi killed $esi killed $rsi
	xorl	%eax, %eax
	callq	printf
.LBB1_22:
	movq	%r12, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z10secuentialPKiS0_Pmi         # -- Begin function _Z10secuentialPKiS0_Pmi
	.type	_Z10secuentialPKiS0_Pmi,@function
_Z10secuentialPKiS0_Pmi:                # @_Z10secuentialPKiS0_Pmi
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	je	.LBB2_8
# %bb.1:                                # %.lr.ph37
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r8
	movl	%ecx, %r10d
	imull	%r10d, %r10d
	cmpl	$1, %r10d
	adcl	$0, %r10d
	movl	%ecx, %r11d
	xorl	%r9d, %r9d
.LBB2_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	movl	%r9d, %eax
	cltd
	idivl	%ecx
                                        # kill: def $eax killed $eax def $rax
                                        # kill: def $edx killed $edx def $rdx
	movslq	(%rsi,%r9,4), %r14
	imull	%ecx, %edx
	leal	(%rax,%rdx), %ebx
	movslq	%ebx, %rbx
	movslq	(%rdi,%rbx,4), %rbx
	addq	%r14, %rbx
	movq	%rbx, (%r8,%r9,8)
	testl	%ecx, %ecx
	jle	.LBB2_6
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	imull	%ecx, %eax
	movl	%edx, %edx
	leaq	(%rdi,%rax,4), %rax
	leaq	(%rsi,%rdx,4), %rdx
	xorl	%r14d, %r14d
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	(%rax,%r14,4), %r15
	movslq	(%rdx,%r14,4), %r12
	imulq	%r15, %r12
	addq	%r12, %rbx
	incq	%r14
	cmpq	%r14, %r11
	jne	.LBB2_4
# %bb.5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	%rbx, (%r8,%r9,8)
.LBB2_6:                                #   in Loop: Header=BB2_2 Depth=1
	incq	%r9
	cmpq	%r10, %r9
	jne	.LBB2_2
# %bb.7:
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
.LBB2_8:                                # %._crit_edge38
	retq
.Lfunc_end2:
	.size	_Z10secuentialPKiS0_Pmi, .Lfunc_end2-_Z10secuentialPKiS0_Pmi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8multiplyPKiS0_Pmii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8multiplyPKiS0_Pmii,@object   # @_Z8multiplyPKiS0_Pmii
	.section	.rodata,"a",@progbits
	.globl	_Z8multiplyPKiS0_Pmii
	.p2align	3, 0x0
_Z8multiplyPKiS0_Pmii:
	.quad	_Z23__device_stub__multiplyPKiS0_Pmii
	.size	_Z8multiplyPKiS0_Pmii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%i threads, %ix%i matrix\n"
	.size	.L.str, 26

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"GPU time, %i threads: %f seconds\n"
	.size	.L.str.1, 34

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%i\t"
	.size	.L.str.3, 4

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"CPU time: %f seconds\n"
	.size	.L.str.5, 22

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"GPU and CPU have different results (at least) at position %i\n"
	.size	.L.str.6, 62

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8multiplyPKiS0_Pmii"
	.size	.L__unnamed_1, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Array C=B + AB^t + A^t :"
	.size	.Lstr, 25

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"GPU and CPU have the same results"
	.size	.Lstr.1, 34

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__multiplyPKiS0_Pmii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8multiplyPKiS0_Pmii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8multiplyPKiS0_Pmii   ; -- Begin function _Z8multiplyPKiS0_Pmii
	.globl	_Z8multiplyPKiS0_Pmii
	.p2align	8
	.type	_Z8multiplyPKiS0_Pmii,@function
_Z8multiplyPKiS0_Pmii:                  ; @_Z8multiplyPKiS0_Pmii
; %bb.0:
	s_load_b32 s2, s[0:1], 0x18
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v8, s14, 4, v1
	v_lshl_add_u32 v0, s15, 4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_max_i32_e32 v1, v8, v0
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB0_7
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_lo_u32 v0, v0, s2
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_5
; %bb.2:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v1, 31, v0
	v_mov_b32_e32 v7, 0
	v_mov_b32_e32 v5, v8
	s_mov_b32 s3, s2
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v6, 31, v5
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s3, 0
	v_lshlrev_b64 v[1:2], 2, v[5:6]
	v_add_nc_u32_e32 v5, s2, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v1, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_load_b32 v6, v[3:4], off
	global_load_b32 v9, v[1:2], off
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[1:2], null, v9, v6, v[7:8]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v7, v1
	s_cbranch_scc0 .LBB0_3
; %bb.4:                                ; %._crit_edge.loopexit
	v_ashrrev_i32_e32 v2, 31, v1
	s_branch .LBB0_6
.LBB0_5:
	v_mov_b32_e32 v1, 0
	v_mov_b32_e32 v2, 0
.LBB0_6:                                ; %Flow
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v0, v8
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_store_b64 v[3:4], v[1:2], off
.LBB0_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8multiplyPKiS0_Pmii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8multiplyPKiS0_Pmii, .Lfunc_end0-_Z8multiplyPKiS0_Pmii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 332
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8multiplyPKiS0_Pmii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8multiplyPKiS0_Pmii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
