/******************************
 * Tisma Miroslav 2006/0395
 * Multiprocesorski sistemi
 * domaci zadatak 6 - 4. zadatak
 *******************************/

/**
 * 4. Sastaviti program koji menja znak svim elementima niza celih brojeva. Po zavrsenoj obradi niza, treba 
 * ispisati izmenjeni niz, ukupan broj pozitivnih i ukupan broj negativnih elemenata rezultujuceg niza. 
 */

#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include "device_functions.h"
#include <cuda.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>

#define NUM_OF_GPU_THREADS 256

__global__ void changeSignsInArray(int *array1, int *positive, int *negative, int n) {
	int i, counter = 0;
	int idx = threadIdx.x;

	__shared__ int numbers[NUM_OF_GPU_THREADS];

	int slice = n / NUM_OF_GPU_THREADS;
	int start = idx * slice;
	if (idx == NUM_OF_GPU_THREADS - 1)
		slice += n % NUM_OF_GPU_THREADS;
	int end = start + slice;

	for (i = start; i < end; i++) {
		array1[i] = -array1[i];
		if (array1[i] > 0)
			counter++;
	}

	numbers[idx] = counter;
	__syncthreads();

	int half = NUM_OF_GPU_THREADS;
	do {
		__syncthreads();
		half >>= 1;
		if (idx < half)
			numbers[idx] += numbers[idx + half];
	} while(half != 1);

	if (idx == 0) {
		*positive = numbers[0];
		*negative = n - *positive;
	}
}

int main(int argc, char *argv[]) {
	
	int i, n, h_positives, h_negatives;
	int *h_array;
	int *d_array, *d_positives, *d_negatives;
	FILE *out;

	printf("Nizovi ce biti upisani u fajl dz6_4_izl1.in\n");
	printf("Unesite velicinu niza:\n");
	scanf("%d", &n);

	h_array = (int*)malloc(n*sizeof(int));

	out = fopen("dz6_4_izl1.in", "w");
	if (out == NULL) {
		printf("Greska pri otvaranju fajla!");
		exit(EXIT_FAILURE);
	}
	fprintf(out, "ORIGINALNI NIZ\n");

	srand(time(0));
	for (i = 0; i < n; i++) {
		h_array[i] = -100 + rand() % 200;
		fprintf(out, "%3d ", h_array[i]);
	}
	fprintf(out, "\n");

	cudaMalloc((void**)&d_array, n*sizeof(int));
	cudaMalloc((void**)&d_positives, sizeof(int));
	cudaMalloc((void**)&d_negatives, sizeof(int));

	cudaMemcpy(d_array, h_array, n*sizeof(int), cudaMemcpyHostToDevice);

	changeSignsInArray<<<1, NUM_OF_GPU_THREADS>>>(d_array, d_positives, d_negatives, n);

	cudaThreadSynchronize();

	cudaMemcpy(h_array, d_array, n*sizeof(int), cudaMemcpyDeviceToHost);
	cudaMemcpy(&h_positives, d_positives, sizeof(int), cudaMemcpyDeviceToHost);
	cudaMemcpy(&h_negatives, d_negatives, sizeof(int), cudaMemcpyDeviceToHost);

	fprintf(out, "IZMENJENI NIZ:\n");
	for (i = 0; i < n; i++)
		fprintf(out, "%3.2d ", h_array[i]);

	fprintf(out, "\n");
	fprintf(out, "Broj pozitivnih elemenata u nizu je: %d\n", h_positives);
	fprintf(out, "Broj negativnih elemenata u nizu je: %d\n", h_negatives);

	cudaFree(d_array);
	cudaFree(d_positives);
	cudaFree(d_negatives);
	free(h_array);
	fclose(out);

	return EXIT_SUCCESS;
}
	.file	"tmpxft_002b33c5_00000000-6_dz6z4.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z43__device_stub__Z18changeSignsInArrayPiS_S_iPiS_S_i
	.type	_Z43__device_stub__Z18changeSignsInArrayPiS_S_iPiS_S_i, @function
_Z43__device_stub__Z18changeSignsInArrayPiS_S_iPiS_S_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z18changeSignsInArrayPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z43__device_stub__Z18changeSignsInArrayPiS_S_iPiS_S_i, .-_Z43__device_stub__Z18changeSignsInArrayPiS_S_iPiS_S_i
	.globl	_Z18changeSignsInArrayPiS_S_i
	.type	_Z18changeSignsInArrayPiS_S_i, @function
_Z18changeSignsInArrayPiS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z18changeSignsInArrayPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2053:
	.size	_Z18changeSignsInArrayPiS_S_i, .-_Z18changeSignsInArrayPiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Nizovi ce biti upisani u fajl dz6_4_izl1.in\n"
.LC1:
	.string	"Unesite velicinu niza:\n"
.LC2:
	.string	"%d"
.LC3:
	.string	"w"
.LC4:
	.string	"dz6_4_izl1.in"
.LC5:
	.string	"Greska pri otvaranju fajla!"
.LC6:
	.string	"ORIGINALNI NIZ\n"
.LC7:
	.string	"%3d "
.LC8:
	.string	"\n"
.LC9:
	.string	"IZMENJENI NIZ:\n"
.LC10:
	.string	"%3.2d "
.LC11:
	.string	"Broj pozitivnih elemenata u nizu je: %d\n"
.LC12:
	.string	"Broj negativnih elemenata u nizu je: %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	4(%rsp), %rsi
	leaq	.LC2(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movslq	4(%rsp), %rdi
	salq	$2, %rdi
	call	malloc@PLT
	leaq	.LC3(%rip), %rsi
	leaq	.LC4(%rip), %rdi
	movq	%rax, %rbp
	call	fopen@PLT
	testq	%rax, %rax
	jne	.L9
	movl	$2, %edi
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L9:
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	xorl	%eax, %eax
	movl	$2, %esi
	xorl	%r12d, %r12d
	leaq	.LC7(%rip), %r13
	call	__fprintf_chk@PLT
	xorl	%edi, %edi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L10:
	cmpl	%r12d, 4(%rsp)
	jle	.L17
	call	rand@PLT
	movl	$200, %ecx
	movl	$2, %esi
	movq	%rbx, %rdi
	cltd
	idivl	%ecx
	xorl	%eax, %eax
	leal	-100(%rdx), %ecx
	movq	%r13, %rdx
	movl	%ecx, 0(%rbp,%r12,4)
	incq	%r12
	call	__fprintf_chk@PLT
	jmp	.L10
.L17:
	leaq	.LC8(%rip), %r13
	movl	$2, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	movq	%r13, %rdx
	call	__fprintf_chk@PLT
	movslq	4(%rsp), %rsi
	leaq	8(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movslq	4(%rsp), %rdx
	movq	8(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 44(%rsp)
	movl	$1, 52(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movl	4(%rsp), %ecx
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z43__device_stub__Z18changeSignsInArrayPiS_S_iPiS_S_i
.L12:
	call	cudaThreadSynchronize@PLT
	movslq	4(%rsp), %rdx
	movq	%rbp, %rdi
	xorl	%r12d, %r12d
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	leaq	.LC10(%rip), %r14
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movl	$2, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rsi
	leaq	44(%rsp), %rdi
	movl	$2, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	$2, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	leaq	.LC9(%rip), %rdx
	call	__fprintf_chk@PLT
.L13:
	cmpl	%r12d, 4(%rsp)
	jle	.L18
	movl	0(%rbp,%r12,4), %ecx
	movq	%r14, %rdx
	movl	$2, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	incq	%r12
	call	__fprintf_chk@PLT
	jmp	.L13
.L18:
	movq	%r13, %rdx
	movl	$2, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	32(%rsp), %ecx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	call	__fprintf_chk@PLT
	movl	44(%rsp), %ecx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	call	__fprintf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	fclose@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC13:
	.string	"_Z18changeSignsInArrayPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18changeSignsInArrayPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/******************************
 * Tisma Miroslav 2006/0395
 * Multiprocesorski sistemi
 * domaci zadatak 6 - 4. zadatak
 *******************************/

/**
 * 4. Sastaviti program koji menja znak svim elementima niza celih brojeva. Po zavrsenoj obradi niza, treba 
 * ispisati izmenjeni niz, ukupan broj pozitivnih i ukupan broj negativnih elemenata rezultujuceg niza. 
 */

#include "hip/hip_runtime.h"

#include "hip/device_functions.h"

#include <stdio.h>
#include <stdlib.h>
#include <time.h>

#define NUM_OF_GPU_THREADS 256

__global__ void changeSignsInArray(int *array1, int *positive, int *negative, int n) {
	int i, counter = 0;
	int idx = threadIdx.x;

	__shared__ int numbers[NUM_OF_GPU_THREADS];

	int slice = n / NUM_OF_GPU_THREADS;
	int start = idx * slice;
	if (idx == NUM_OF_GPU_THREADS - 1)
		slice += n % NUM_OF_GPU_THREADS;
	int end = start + slice;

	for (i = start; i < end; i++) {
		array1[i] = -array1[i];
		if (array1[i] > 0)
			counter++;
	}

	numbers[idx] = counter;
	__syncthreads();

	int half = NUM_OF_GPU_THREADS;
	do {
		__syncthreads();
		half >>= 1;
		if (idx < half)
			numbers[idx] += numbers[idx + half];
	} while(half != 1);

	if (idx == 0) {
		*positive = numbers[0];
		*negative = n - *positive;
	}
}

int main(int argc, char *argv[]) {
	
	int i, n, h_positives, h_negatives;
	int *h_array;
	int *d_array, *d_positives, *d_negatives;
	FILE *out;

	printf("Nizovi ce biti upisani u fajl dz6_4_izl1.in\n");
	printf("Unesite velicinu niza:\n");
	scanf("%d", &n);

	h_array = (int*)malloc(n*sizeof(int));

	out = fopen("dz6_4_izl1.in", "w");
	if (out == NULL) {
		printf("Greska pri otvaranju fajla!");
		exit(EXIT_FAILURE);
	}
	fprintf(out, "ORIGINALNI NIZ\n");

	srand(time(0));
	for (i = 0; i < n; i++) {
		h_array[i] = -100 + rand() % 200;
		fprintf(out, "%3d ", h_array[i]);
	}
	fprintf(out, "\n");

	hipMalloc((void**)&d_array, n*sizeof(int));
	hipMalloc((void**)&d_positives, sizeof(int));
	hipMalloc((void**)&d_negatives, sizeof(int));

	hipMemcpy(d_array, h_array, n*sizeof(int), hipMemcpyHostToDevice);

	changeSignsInArray<<<1, NUM_OF_GPU_THREADS>>>(d_array, d_positives, d_negatives, n);

	hipDeviceSynchronize();

	hipMemcpy(h_array, d_array, n*sizeof(int), hipMemcpyDeviceToHost);
	hipMemcpy(&h_positives, d_positives, sizeof(int), hipMemcpyDeviceToHost);
	hipMemcpy(&h_negatives, d_negatives, sizeof(int), hipMemcpyDeviceToHost);

	fprintf(out, "IZMENJENI NIZ:\n");
	for (i = 0; i < n; i++)
		fprintf(out, "%3.2d ", h_array[i]);

	fprintf(out, "\n");
	fprintf(out, "Broj pozitivnih elemenata u nizu je: %d\n", h_positives);
	fprintf(out, "Broj negativnih elemenata u nizu je: %d\n", h_negatives);

	hipFree(d_array);
	hipFree(d_positives);
	hipFree(d_negatives);
	free(h_array);
	fclose(out);

	return EXIT_SUCCESS;
}
	.text
	.file	"dz6z4.hip"
	.globl	_Z33__device_stub__changeSignsInArrayPiS_S_i # -- Begin function _Z33__device_stub__changeSignsInArrayPiS_S_i
	.type	_Z33__device_stub__changeSignsInArrayPiS_S_i,@function
_Z33__device_stub__changeSignsInArrayPiS_S_i: # @_Z33__device_stub__changeSignsInArrayPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18changeSignsInArrayPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__changeSignsInArrayPiS_S_i, .Lfunc_end0-_Z33__device_stub__changeSignsInArrayPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	leaq	12(%rsp), %rbx
	movl	$.L.str.2, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	(%rbx), %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, %rbx
	movl	$.L.str.3, %edi
	movl	$.L.str.4, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB1_10
# %bb.1:
	movq	%rax, %r14
	movl	$.L.str.6, %edi
	movl	$15, %esi
	movl	$1, %edx
	movq	%rax, %rcx
	callq	fwrite@PLT
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	cmpl	$0, 12(%rsp)
	jle	.LBB1_4
# %bb.2:                                # %.lr.ph.preheader
	xorl	%r15d, %r15d
.LBB1_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$200, %ecx, %ecx
	negl	%ecx
	leal	(%rax,%rcx), %edx
	addl	$-100, %edx
	movl	%edx, (%rbx,%r15,4)
	movl	$.L.str.7, %esi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	fprintf
	incq	%r15
	movslq	12(%rsp), %rax
	cmpq	%rax, %r15
	jl	.LBB1_3
.LBB1_4:                                # %._crit_edge
	movl	$10, %edi
	movq	%r14, %rsi
	callq	fputc@PLT
	movslq	12(%rsp), %rsi
	shlq	$2, %rsi
	leaq	32(%rsp), %r15
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	movq	(%r15), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	255(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	12(%rsp), %ecx
	callq	_Z33__device_stub__changeSignsInArrayPiS_S_i
.LBB1_6:
	callq	hipDeviceSynchronize
	movq	32(%rsp), %rsi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	leaq	44(%rsp), %rdi
	movl	$4, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	leaq	40(%rsp), %rdi
	movl	$4, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.9, %edi
	movl	$15, %esi
	movl	$1, %edx
	movq	%r14, %rcx
	callq	fwrite@PLT
	cmpl	$0, 12(%rsp)
	jle	.LBB1_9
# %bb.7:                                # %.lr.ph33.preheader
	xorl	%r15d, %r15d
.LBB1_8:                                # %.lr.ph33
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r15,4), %edx
	movl	$.L.str.10, %esi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	fprintf
	incq	%r15
	movslq	12(%rsp), %rax
	cmpq	%rax, %r15
	jl	.LBB1_8
.LBB1_9:                                # %._crit_edge34
	movl	$10, %edi
	movq	%r14, %rsi
	callq	fputc@PLT
	movl	44(%rsp), %edx
	movl	$.L.str.11, %esi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	fprintf
	movl	40(%rsp), %edx
	movl	$.L.str.12, %esi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	fprintf
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	fclose
	xorl	%eax, %eax
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB1_10:
	.cfi_def_cfa_offset 80
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18changeSignsInArrayPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18changeSignsInArrayPiS_S_i,@object # @_Z18changeSignsInArrayPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z18changeSignsInArrayPiS_S_i
	.p2align	3, 0x0
_Z18changeSignsInArrayPiS_S_i:
	.quad	_Z33__device_stub__changeSignsInArrayPiS_S_i
	.size	_Z18changeSignsInArrayPiS_S_i, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"%d"
	.size	.L.str.2, 3

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"dz6_4_izl1.in"
	.size	.L.str.3, 14

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"w"
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Greska pri otvaranju fajla!"
	.size	.L.str.5, 28

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"ORIGINALNI NIZ\n"
	.size	.L.str.6, 16

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"%3d "
	.size	.L.str.7, 5

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"IZMENJENI NIZ:\n"
	.size	.L.str.9, 16

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"%3.2d "
	.size	.L.str.10, 7

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Broj pozitivnih elemenata u nizu je: %d\n"
	.size	.L.str.11, 41

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Broj negativnih elemenata u nizu je: %d\n"
	.size	.L.str.12, 41

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18changeSignsInArrayPiS_S_i"
	.size	.L__unnamed_1, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Nizovi ce biti upisani u fajl dz6_4_izl1.in"
	.size	.Lstr, 44

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Unesite velicinu niza:"
	.size	.Lstr.1, 23

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__changeSignsInArrayPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18changeSignsInArrayPiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18changeSignsInArrayPiS_S_i ; -- Begin function _Z18changeSignsInArrayPiS_S_i
	.globl	_Z18changeSignsInArrayPiS_S_i
	.p2align	8
	.type	_Z18changeSignsInArrayPiS_S_i,@function
_Z18changeSignsInArrayPiS_S_i:          ; @_Z18changeSignsInArrayPiS_S_i
; %bb.0:
	s_load_b32 s8, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s2, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s2, s2, 24
	s_add_i32 s2, s8, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_ashr_i32 s10, s2, 8
	s_mov_b32 s2, exec_lo
	v_mov_b32_e32 v3, s10
	v_cmpx_eq_u32_e32 0xff, v0
; %bb.1:
	s_lshl_b32 s3, s10, 8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s3, s8, s3
	s_add_i32 s3, s10, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v3, s3
; %bb.2:
	s_or_b32 exec_lo, exec_lo, s2
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_mov_b32_e32 v4, 0
	s_mov_b32 s9, 0
	s_mov_b32 s1, exec_lo
	v_cmpx_lt_i32_e32 0, v3
	s_cbranch_execz .LBB0_6
; %bb.3:                                ; %.lr.ph.preheader
	v_mul_i32_i24_e32 v1, s10, v0
	v_mad_i32_i24 v5, s10, v0, v3
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v7, vcc_lo
.LBB0_4:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v6, v[2:3], off
	v_add_nc_u32_e32 v1, 1, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ge_i32_e32 vcc_lo, v1, v5
	s_or_b32 s9, vcc_lo, s9
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v7, 0, v6
	v_lshrrev_b32_e32 v6, 31, v6
	global_store_b32 v[2:3], v7, off
	v_add_co_u32 v2, s0, v2, 4
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_ci_u32_e64 v3, s0, 0, v3, s0
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_4
; %bb.5:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_6:                                ; %Flow54
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_lshlrev_b32_e32 v1, 2, v0
	s_movk_i32 s0, 0x100
	ds_store_b32 v1, v4
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB0_7:                                ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s0, s0, 1
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB0_9:                                ;   in Loop: Header=BB0_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_cmp_lg_u32 s0, 1
	s_cbranch_scc1 .LBB0_7
; %bb.10:
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_12
; %bb.11:
	v_mov_b32_e32 v0, 0
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	v_sub_nc_u32_e32 v2, s8, v1
	s_clause 0x1
	global_store_b32 v0, v1, s[6:7]
	global_store_b32 v0, v2, s[2:3]
.LBB0_12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18changeSignsInArrayPiS_S_i
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 11
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18changeSignsInArrayPiS_S_i, .Lfunc_end0-_Z18changeSignsInArrayPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 444
; NumSgprs: 13
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 13
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18changeSignsInArrayPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     13
    .sgpr_spill_count: 0
    .symbol:         _Z18changeSignsInArrayPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
