/*
 * Copyright 1993-2010 NVIDIA Corporation.  All rights reserved.
 *
 * NVIDIA Corporation and its licensors retain all intellectual property and * proprietary rights in and to this software and related documentation. 
 * Any use, reproduction, disclosure, or distribution of this software 
 * and related documentation without an express license agreement from
 * NVIDIA Corporation is strictly prohibited.
 *
 * Please refer to the applicable NVIDIA end user license agreement (EULA) 
 * associated with this source code for terms and conditions that govern 
 * your use of this NVIDIA software.
 * 
 */


#include <iostream>
#include <stdio.h>

#define CHECK(ans) {gpuAssert((ans),__FILE__,__LINE__);}
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort = true)
{
    if(code != cudaSuccess)
    {
        fprintf(stderr,"GPUassert: %s %s %d\n",cudaGetErrorString(code),file, line);
        if(abort) exit(code);
    }
}

using namespace std;

#define SIZE    (100*1024*1024)


__global__ void histo_kernel( unsigned char *buffer,
        long size,
        unsigned int *histo ) {

    __shared__  unsigned int temp[256];

    temp[threadIdx.x] = 0;
    __syncthreads();

    int i = threadIdx.x + blockIdx.x * blockDim.x;
    int offset = blockDim.x * gridDim.x;
    while (i < size) {
        atomicAdd( &temp[buffer[i]], 1 );
        i += offset;
    }

    __syncthreads();
    atomicAdd( &(histo[threadIdx.x]), temp[threadIdx.x] );
}

int runHisto(char* file, unsigned int* freq, unsigned int memSize, unsigned int *source) {

    FILE *f = fopen(file,"rb");
    if (!f) {perror(file); exit(1);}
    fseek(f,0,SEEK_SET);
    size_t result = fread(source,1,memSize,f);
    if(result != memSize) fputs("Cannot read input file", stderr);

    fclose(f);

    unsigned char *buffer = (unsigned char*)source;

    cudaDeviceProp  prop;
    ( cudaGetDeviceProperties( &prop, 0 ) );
    int blocks = prop.multiProcessorCount;
    if(!prop.deviceOverlap)
    {
        cout << "No overlaps, so no speedup from streams" << endl;
        return 0;
    }

    // allocate memory on the GPU for the file's data
    int partSize = memSize/32;
    int totalNum = memSize/sizeof(unsigned int);
    int partialNum = partSize/sizeof(unsigned int);

    unsigned char *dev_buffer0; 
    unsigned char *dev_buffer1;
    unsigned int *dev_histo;
    cudaMalloc( (void**)&dev_buffer0, partSize ) ;
    cudaMalloc( (void**)&dev_buffer1, partSize ) ;
    cudaMalloc( (void**)&dev_histo,
            256 * sizeof( int ) ) ;
    cudaMemset( dev_histo, 0,
            256 * sizeof( int ) ) ;
    cudaStream_t stream0, stream1;
    CHECK(cudaStreamCreate(&stream0));
    CHECK(cudaStreamCreate(&stream1));
    cudaEvent_t     start, stop;
    ( cudaEventCreate( &start ) );
    ( cudaEventCreate( &stop ) );
    ( cudaEventRecord( start, 0 ) );


    for(int i = 0; i < totalNum; i+=partialNum*2)
    {

        CHECK(cudaMemcpyAsync(dev_buffer0, buffer+i, partSize, cudaMemcpyHostToDevice,stream0));
        CHECK(cudaMemcpyAsync(dev_buffer1, buffer+i+partialNum, partSize, cudaMemcpyHostToDevice,stream1));


        // kernel launch - 2x the number of mps gave best timing
        histo_kernel<<<blocks*2,256,0,stream0>>>( dev_buffer0, partSize, dev_histo );
        histo_kernel<<<blocks*2,256,0,stream1>>>( dev_buffer1, partSize, dev_histo );
    }
    CHECK(cudaStreamSynchronize(stream0));
    CHECK(cudaStreamSynchronize(stream1));
    cudaMemcpy( freq, dev_histo, 256 * sizeof( int ), cudaMemcpyDeviceToHost );
    ( cudaEventRecord( stop, 0 ) );
    ( cudaEventSynchronize( stop ) );
    float   elapsedTime;
    ( cudaEventElapsedTime( &elapsedTime,
                                        start, stop ) );
    printf( "Time to generate:  %3.1f ms\n", elapsedTime );



    cudaFree( dev_histo );
    cudaFree( dev_buffer0 );
    cudaFree( dev_buffer1 );
    return 0;
}

	.file	"tmpxft_003b4e75_00000000-6_hist.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPUassert: %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
	.weak	_Z9gpuAssert9cudaErrorPKcib
	.type	_Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB3635:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L8
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movq	stderr(%rip), %rdi
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	testb	%bpl, %bpl
	je	.L2
	movl	%ebx, %edi
	call	exit@PLT
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L8:
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
	.text
	.globl	_Z35__device_stub__Z12histo_kernelPhlPjPhlPj
	.type	_Z35__device_stub__Z12histo_kernelPhlPjPhlPj, @function
_Z35__device_stub__Z12histo_kernelPhlPjPhlPj:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12histo_kernelPhlPj(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L12:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z35__device_stub__Z12histo_kernelPhlPjPhlPj, .-_Z35__device_stub__Z12histo_kernelPhlPjPhlPj
	.globl	_Z12histo_kernelPhlPj
	.type	_Z12histo_kernelPhlPj, @function
_Z12histo_kernelPhlPj:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z12histo_kernelPhlPjPhlPj
	.cfi_endproc
.LFE3662:
	.size	_Z12histo_kernelPhlPj, .-_Z12histo_kernelPhlPj
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"rb"
.LC2:
	.string	"Cannot read input file"
.LC3:
	.string	"No overlaps, so no speedup from streams"
.LC4:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/purdue-aalp/gpgpu-sim_simulations/master/benchmarks/src/cuda/rodinia/3.1/cuda/huffman/hist.cu"
.LC5:
	.string	"Time to generate:  %3.1f ms\n"
	.text
	.globl	_Z8runHistoPcPjjS0_
	.type	_Z8runHistoPcPjjS0_, @function
_Z8runHistoPcPjjS0_:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rcx, %rbx
	subq	$1160, %rsp
	.cfi_def_cfa_offset 1216
	movq	%rsi, 24(%rsp)
	leaq	.LC1(%rip), %rsi
	movq	%fs:40, %rax
	movq	%rax, 1144(%rsp)
	xorl	%eax, %eax
	movq	%rdi, 8(%rsp)
	call	fopen@PLT
	movq	8(%rsp), %rdi
	testq	%rax, %rax
	jne	.L18
	call	perror@PLT
	movl	$1, %edi
	call	exit@PLT
.L18:
	xorl	%edx, %edx
	xorl	%esi, %esi
	movq	%rax, %rbp
	movq	%rax, %rdi
	call	fseek@PLT
	movl	%r12d, %r13d
	orq	$-1, %rsi
	movq	%rbp, %r8
	movq	%r13, %rcx
	movl	$1, %edx
	movq	%rbx, %rdi
	call	__fread_chk@PLT
	cmpq	%rax, %r13
	je	.L19
	movq	stderr(%rip), %rsi
	leaq	.LC2(%rip), %rdi
	call	fputs@PLT
.L19:
	movq	%rbp, %rdi
	call	fclose@PLT
	xorl	%esi, %esi
	leaq	112(%rsp), %rdi
	call	cudaGetDeviceProperties_v2@PLT
	cmpl	$0, 496(%rsp)
	movl	500(%rsp), %ebp
	jne	.L20
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	jmp	.L21
.L20:
	movl	%r12d, %eax
	leaq	32(%rsp), %rdi
	shrl	$2, %r12d
	addl	%ebp, %ebp
	shrl	$5, %eax
	movl	%r12d, 20(%rsp)
	xorl	%r12d, %r12d
	movq	%rax, %rsi
	movq	%rax, %r13
	movl	%eax, 16(%rsp)
	movq	%rax, 8(%rsp)
	shrq	$2, %r13
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	40(%rsp), %rdi
	leal	(%r13,%r13), %r15d
	movq	%r15, %r14
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	movq	48(%rsp), %rdi
	movl	$1024, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	leaq	56(%rsp), %rdi
	call	cudaStreamCreate@PLT
	movl	$1, %ecx
	movl	$90, %edx
	leaq	.LC4(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	64(%rsp), %rdi
	call	cudaStreamCreate@PLT
	movl	$1, %ecx
	movl	$91, %edx
	leaq	.LC4(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	80(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
.L22:
	movl	20(%rsp), %eax
	movq	56(%rsp), %r8
	cmpl	%eax, %r12d
	jge	.L28
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	call	cudaMemcpyAsync@PLT
	movl	$1, %ecx
	movl	$101, %edx
	leaq	.LC4(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	64(%rsp), %r8
	movq	8(%rsp), %rdx
	leaq	0(%r13,%rbx), %rsi
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	call	cudaMemcpyAsync@PLT
	movl	$1, %ecx
	movl	$102, %edx
	leaq	.LC4(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	%ebp, 88(%rsp)
	movl	$16777217, %edx
	xorl	%r8d, %r8d
	movq	56(%rsp), %r9
	salq	$8, %rdx
	movabsq	$4294967297, %rax
	movl	$1, %ecx
	movq	%rax, 92(%rsp)
	movq	88(%rsp), %rdi
	movl	96(%rsp), %esi
	movq	%rdx, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	movl	16(%rsp), %esi
	movq	48(%rsp), %rdx
	movq	32(%rsp), %rdi
	call	_Z35__device_stub__Z12histo_kernelPhlPjPhlPj
.L23:
	movl	%ebp, 88(%rsp)
	movl	$16777217, %edx
	movq	64(%rsp), %r9
	movabsq	$4294967297, %rax
	movq	%rax, 92(%rsp)
	movl	96(%rsp), %esi
	salq	$8, %rdx
	xorl	%r8d, %r8d
	movq	88(%rsp), %rdi
	movl	$1, %ecx
	movq	%rdx, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	movl	16(%rsp), %esi
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rdi
	call	_Z35__device_stub__Z12histo_kernelPhlPjPhlPj
.L24:
	addl	%r14d, %r12d
	addq	%r15, %rbx
	jmp	.L22
.L28:
	movq	%r8, %rdi
	leaq	.LC4(%rip), %rbx
	call	cudaStreamSynchronize@PLT
	movl	$1, %ecx
	movl	$109, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	64(%rsp), %rdi
	call	cudaStreamSynchronize@PLT
	movl	$1, %ecx
	movl	$110, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	48(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$2, %ecx
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	80(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	80(%rsp), %rdx
	movq	72(%rsp), %rsi
	leaq	100(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	100(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
.L21:
	movq	1144(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$1160, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z8runHistoPcPjjS0_, .-_Z8runHistoPcPjjS0_
	.section	.rodata.str1.1
.LC6:
	.string	"_Z12histo_kernelPhlPj"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12histo_kernelPhlPj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 * Copyright 1993-2010 NVIDIA Corporation.  All rights reserved.
 *
 * NVIDIA Corporation and its licensors retain all intellectual property and * proprietary rights in and to this software and related documentation. 
 * Any use, reproduction, disclosure, or distribution of this software 
 * and related documentation without an express license agreement from
 * NVIDIA Corporation is strictly prohibited.
 *
 * Please refer to the applicable NVIDIA end user license agreement (EULA) 
 * associated with this source code for terms and conditions that govern 
 * your use of this NVIDIA software.
 * 
 */



#include <hip/hip_runtime.h>
#include <iostream>
#include <stdio.h>

#define CHECK(ans) {gpuAssert((ans),__FILE__,__LINE__);}
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort = true)
{
    if(code != hipSuccess)
    {
        fprintf(stderr,"GPUassert: %s %s %d\n",hipGetErrorString(code),file, line);
        if(abort) exit(code);
    }
}

using namespace std;

#define SIZE    (100*1024*1024)


__global__ void histo_kernel( unsigned char *buffer,
        long size,
        unsigned int *histo ) {

    __shared__  unsigned int temp[256];

    temp[threadIdx.x] = 0;
    __syncthreads();

    int i = threadIdx.x + blockIdx.x * blockDim.x;
    int offset = blockDim.x * gridDim.x;
    while (i < size) {
        atomicAdd( &temp[buffer[i]], 1 );
        i += offset;
    }

    __syncthreads();
    atomicAdd( &(histo[threadIdx.x]), temp[threadIdx.x] );
}

int runHisto(char* file, unsigned int* freq, unsigned int memSize, unsigned int *source) {

    FILE *f = fopen(file,"rb");
    if (!f) {perror(file); exit(1);}
    fseek(f,0,SEEK_SET);
    size_t result = fread(source,1,memSize,f);
    if(result != memSize) fputs("Cannot read input file", stderr);

    fclose(f);

    unsigned char *buffer = (unsigned char*)source;

    hipDeviceProp_t  prop;
    ( hipGetDeviceProperties( &prop, 0 ) );
    int blocks = prop.multiProcessorCount;
    if(!prop.deviceOverlap)
    {
        cout << "No overlaps, so no speedup from streams" << endl;
        return 0;
    }

    // allocate memory on the GPU for the file's data
    int partSize = memSize/32;
    int totalNum = memSize/sizeof(unsigned int);
    int partialNum = partSize/sizeof(unsigned int);

    unsigned char *dev_buffer0; 
    unsigned char *dev_buffer1;
    unsigned int *dev_histo;
    hipMalloc( (void**)&dev_buffer0, partSize ) ;
    hipMalloc( (void**)&dev_buffer1, partSize ) ;
    hipMalloc( (void**)&dev_histo,
            256 * sizeof( int ) ) ;
    hipMemset( dev_histo, 0,
            256 * sizeof( int ) ) ;
    hipStream_t stream0, stream1;
    CHECK(hipStreamCreate(&stream0));
    CHECK(hipStreamCreate(&stream1));
    hipEvent_t     start, stop;
    ( hipEventCreate( &start ) );
    ( hipEventCreate( &stop ) );
    ( hipEventRecord( start, 0 ) );


    for(int i = 0; i < totalNum; i+=partialNum*2)
    {

        CHECK(hipMemcpyAsync(dev_buffer0, buffer+i, partSize, hipMemcpyHostToDevice,stream0));
        CHECK(hipMemcpyAsync(dev_buffer1, buffer+i+partialNum, partSize, hipMemcpyHostToDevice,stream1));


        // kernel launch - 2x the number of mps gave best timing
        histo_kernel<<<blocks*2,256,0,stream0>>>( dev_buffer0, partSize, dev_histo );
        histo_kernel<<<blocks*2,256,0,stream1>>>( dev_buffer1, partSize, dev_histo );
    }
    CHECK(hipStreamSynchronize(stream0));
    CHECK(hipStreamSynchronize(stream1));
    hipMemcpy( freq, dev_histo, 256 * sizeof( int ), hipMemcpyDeviceToHost );
    ( hipEventRecord( stop, 0 ) );
    ( hipEventSynchronize( stop ) );
    float   elapsedTime;
    ( hipEventElapsedTime( &elapsedTime,
                                        start, stop ) );
    printf( "Time to generate:  %3.1f ms\n", elapsedTime );



    hipFree( dev_histo );
    hipFree( dev_buffer0 );
    hipFree( dev_buffer1 );
    return 0;
}

	.text
	.file	"hist.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z27__device_stub__histo_kernelPhlPj # -- Begin function _Z27__device_stub__histo_kernelPhlPj
	.type	_Z27__device_stub__histo_kernelPhlPj,@function
_Z27__device_stub__histo_kernelPhlPj:   # @_Z27__device_stub__histo_kernelPhlPj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12histo_kernelPhlPj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__histo_kernelPhlPj, .Lfunc_end0-_Z27__device_stub__histo_kernelPhlPj
	.cfi_endproc
                                        # -- End function
	.globl	_Z8runHistoPcPjjS0_             # -- Begin function _Z8runHistoPcPjjS0_
	.type	_Z8runHistoPcPjjS0_,@function
_Z8runHistoPcPjjS0_:                    # @_Z8runHistoPcPjjS0_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1576, %rsp                     # imm = 0x628
	.cfi_def_cfa_offset 1632
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %r15
	movl	%edx, %ebp
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movl	$.L.str, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB1_29
# %bb.1:
	movq	%rax, %r12
	movq	%rax, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	fseek
	movl	%ebp, %ebx
	movl	$1, %esi
	movq	%r15, %rdi
	movq	%rbx, %rdx
	movq	%r12, %rcx
	callq	fread
	movq	%rbx, 16(%rsp)                  # 8-byte Spill
	cmpq	%rbx, %rax
	jne	.LBB1_2
.LBB1_3:
	movq	%r12, %rdi
	callq	fclose
	leaq	104(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	cmpl	$0, 384(%rbx)
	je	.LBB1_4
# %bb.5:
	movq	%r15, 64(%rsp)                  # 8-byte Spill
	movl	492(%rsp), %r15d
	movl	%ebp, %r12d
	shrl	$5, %r12d
	leaq	56(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rbx
	movl	$1024, %esi                     # imm = 0x400
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movl	$1024, %edx                     # imm = 0x400
	xorl	%esi, %esi
	callq	hipMemset
	leaq	40(%rsp), %rdi
	callq	hipStreamCreate
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.8:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	movq	%r14, 72(%rsp)                  # 8-byte Spill
	leaq	32(%rsp), %rdi
	callq	hipStreamCreate
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.10:                               # %_Z9gpuAssert10hipError_tPKcib.exit44
	leaq	88(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	cmpl	$4, %ebp
	jb	.LBB1_15
# %bb.11:                               # %.lr.ph
	movl	%ebp, %eax
	shrl	$2, %eax
	shrl	$7, %ebp
	movabsq	$4294967552, %rbx               # imm = 0x100000100
	movl	%ebp, %r14d
	addl	%r15d, %r15d
	leaq	(%r15,%rbx), %rbp
	addq	$-256, %rbp
	movq	16(%rsp), %rcx                  # 8-byte Reload
	shrl	$6, %ecx
	andl	$-2, %ecx
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
	movl	%eax, %eax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	addq	64(%rsp), %r14                  # 8-byte Folded Reload
	xorl	%r13d, %r13d
.LBB1_12:                               # =>This Inner Loop Header: Depth=1
	movq	%rbx, %r15
	movq	56(%rsp), %rdi
	movq	64(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%r13), %rsi
	movq	40(%rsp), %r8
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	testl	%eax, %eax
	jne	.LBB1_13
# %bb.20:                               # %_Z9gpuAssert10hipError_tPKcib.exit50
                                        #   in Loop: Header=BB1_12 Depth=1
	movq	48(%rsp), %rdi
	leaq	(%r14,%r13), %rsi
	movq	32(%rsp), %r8
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	testl	%eax, %eax
	jne	.LBB1_21
# %bb.22:                               # %_Z9gpuAssert10hipError_tPKcib.exit52
                                        #   in Loop: Header=BB1_12 Depth=1
	movq	40(%rsp), %r9
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r15, %rbx
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_24
# %bb.23:                               #   in Loop: Header=BB1_12 Depth=1
	movq	56(%rsp), %rdi
	movq	8(%rsp), %rdx
	movq	%r12, %rsi
	callq	_Z27__device_stub__histo_kernelPhlPj
.LBB1_24:                               #   in Loop: Header=BB1_12 Depth=1
	movq	32(%rsp), %r9
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_26
# %bb.25:                               #   in Loop: Header=BB1_12 Depth=1
	movq	48(%rsp), %rdi
	movq	8(%rsp), %rdx
	movq	%r12, %rsi
	callq	_Z27__device_stub__histo_kernelPhlPj
.LBB1_26:                               #   in Loop: Header=BB1_12 Depth=1
	addq	16(%rsp), %r13                  # 8-byte Folded Reload
	cmpq	80(%rsp), %r13                  # 8-byte Folded Reload
	jb	.LBB1_12
.LBB1_15:                               # %._crit_edge
	movq	40(%rsp), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	jne	.LBB1_16
# %bb.18:                               # %_Z9gpuAssert10hipError_tPKcib.exit46
	movq	32(%rsp), %rdi
	callq	hipStreamSynchronize
	testl	%eax, %eax
	movq	72(%rsp), %rdi                  # 8-byte Reload
	jne	.LBB1_19
# %bb.27:                               # %_Z9gpuAssert10hipError_tPKcib.exit48
	movq	8(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	movq	88(%rsp), %rsi
	movq	24(%rsp), %rdx
	leaq	100(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	jmp	.LBB1_28
.LBB1_4:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$39, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_28:
	xorl	%eax, %eax
	addq	$1576, %rsp                     # imm = 0x628
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_2:
	.cfi_def_cfa_offset 1632
	movq	stderr(%rip), %rsi
	movl	$.L.str.1, %edi
	callq	fputs
	jmp	.LBB1_3
.LBB1_21:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str.3, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$104, %r8d
	jmp	.LBB1_14
.LBB1_13:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str.3, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$103, %r8d
.LBB1_14:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.LBB1_29:
	movq	%rbx, %rdi
	callq	perror
	movl	$1, %edi
	callq	exit
.LBB1_6:
	movl	%eax, %r13d
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str.3, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$92, %r8d
	jmp	.LBB1_7
.LBB1_9:
	movl	%eax, %r13d
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str.3, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$93, %r8d
.LBB1_7:
	xorl	%eax, %eax
	callq	fprintf
	movl	%r13d, %edi
	callq	exit
.LBB1_16:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str.3, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$111, %r8d
	jmp	.LBB1_17
.LBB1_19:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	movl	$.L.str.3, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$112, %r8d
.LBB1_17:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.Lfunc_end1:
	.size	_Z8runHistoPcPjjS0_, .Lfunc_end1-_Z8runHistoPcPjjS0_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12histo_kernelPhlPj, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12histo_kernelPhlPj,@object   # @_Z12histo_kernelPhlPj
	.section	.rodata,"a",@progbits
	.globl	_Z12histo_kernelPhlPj
	.p2align	3, 0x0
_Z12histo_kernelPhlPj:
	.quad	_Z27__device_stub__histo_kernelPhlPj
	.size	_Z12histo_kernelPhlPj, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"rb"
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Cannot read input file"
	.size	.L.str.1, 23

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"No overlaps, so no speedup from streams"
	.size	.L.str.2, 40

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/purdue-aalp/gpgpu-sim_simulations/master/benchmarks/src/cuda/rodinia/3.1/cuda/huffman/hist.hip"
	.size	.L.str.3, 157

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Time to generate:  %3.1f ms\n"
	.size	.L.str.4, 29

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"GPUassert: %s %s %d\n"
	.size	.L.str.5, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12histo_kernelPhlPj"
	.size	.L__unnamed_1, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__histo_kernelPhlPj
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12histo_kernelPhlPj
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12histo_kernelPhlPj   ; -- Begin function _Z12histo_kernelPhlPj
	.globl	_Z12histo_kernelPhlPj
	.p2align	8
	.type	_Z12histo_kernelPhlPj,@function
_Z12histo_kernelPhlPj:                  ; @_Z12histo_kernelPhlPj
; %bb.0:
	s_clause 0x2
	s_load_b32 s8, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_add_u32 s0, s0, 24
	s_addc_u32 s1, s1, 0
	v_lshlrev_b32_e32 v5, 2, v0
	v_mov_b32_e32 v3, 0
	ds_store_b32 v5, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_b32 s9, s8, 0xffff
	s_mov_b32 s8, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_cmpx_gt_i64_e64 s[6:7], v[1:2]
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s0, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s15, s15, s0
	s_mul_i32 s0, s0, s9
	v_mad_u64_u32 v[3:4], null, s15, s9, v[0:1]
	s_ashr_i32 s1, s0, 31
	s_mov_b32 s9, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v0, 31, v3
	v_sub_co_u32 v3, vcc_lo, v3, s0
	v_subrev_co_ci_u32_e32 v4, vcc_lo, s1, v0, vcc_lo
	v_mov_b32_e32 v0, 1
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, v3, s0
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_u8 v1, v[1:2], off
	v_ashrrev_i32_e32 v2, 31, v3
	v_cmp_le_i64_e32 vcc_lo, s[6:7], v[3:4]
	s_or_b32 s9, vcc_lo, s9
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v1, 2, v1
	ds_add_u32 v1, v0
	v_mov_b32_e32 v1, v3
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow19
	s_or_b32 exec_lo, exec_lo, s8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v0, v5
	s_waitcnt lgkmcnt(0)
	global_atomic_add_u32 v5, v0, s[2:3]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12histo_kernelPhlPj
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12histo_kernelPhlPj, .Lfunc_end0-_Z12histo_kernelPhlPj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 296
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12histo_kernelPhlPj
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12histo_kernelPhlPj.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
