#include <stdlib.h>
#include <stdio.h>

#define BLOCKS  size
#define THREADS 1
#define T       100000
#define H       0.01
#define R       1.0
#define K       2.0
#define ALPHA   9.96
#define BETA    1.0
#define M       0.28
#define DN      0.5
#define DP      0.5

__global__ void rosmac(float *n0, float *n1, float *p0, float *p1)
{
    // Better integration:
    const int tid = blockIdx.x;
    const int left = (tid == 0)? blockDim.x  - 1 : tid - 1;
    const int right = (tid == blockDim.x - 1)? 0 : tid + 1;
    const float dn = R * n0[tid] * (1.0f - n0[tid] / K) - (ALPHA * n0[tid] * p0[tid]) / (1.0f + BETA * n0[tid]) - DN * (n0[tid] - n0[left] / 2.0f - n0[right] / 2.0f);
    const float dp = (ALPHA * n0[tid] * p0[tid]) / (1.0f + BETA * n0[tid]) - M * p0[tid] - DP * (p0[tid] - p0[left] / 2.0f - p0[right] / 2.0f);
    n1[tid] = n0[tid] + H * dn;
    p1[tid] = p0[tid] + H * dp;
}

int main(int argc, char **argv)
{
    const unsigned int size = (argc == 2)? atof(argv[1]) : 1000;
    const unsigned int bytes = size * sizeof(float);
    float *h_n = (float*)malloc(bytes);
    float *h_p = (float*)malloc(bytes);

    float *d_n0, *d_n1, *d_p0, *d_p1;
    cudaMalloc((void**)&d_n0, bytes);
    cudaMalloc((void**)&d_n1, bytes);
    cudaMalloc((void**)&d_p0, bytes);
    cudaMalloc((void**)&d_p1, bytes);

    // Use gsl:
    srand(42);
    rand();
    for (int i = 0; i < size; ++i)
    {
        h_n[i] = ((float)rand() / RAND_MAX);
        h_p[i] = ((float)rand() / RAND_MAX);
    }

    cudaMemcpy(d_n0, h_n, bytes, cudaMemcpyHostToDevice);
    cudaMemcpy(d_p0, h_p, bytes, cudaMemcpyHostToDevice);

    for (int t = 0; t < T; t += 2)
    {
        rosmac<<<BLOCKS,THREADS>>>(d_n0, d_n1, d_p0, d_p1);
        rosmac<<<BLOCKS,THREADS>>>(d_n1, d_n0, d_p1, d_p0);
        if (t % 100 == 0)
        {
            //printf("%16d -> ", t);
            cudaMemcpy(h_n, d_n1, bytes, cudaMemcpyDeviceToHost);
            cudaMemcpy(h_p, d_p1, bytes, cudaMemcpyDeviceToHost);
            for (int i = 0; i < size; ++i)
            {
                printf("%.4f\t", h_p[i]);
            }
            printf("\n");
        }
    }

    cudaFree(d_n0);
    cudaFree(d_n1);
    cudaFree(d_p0);
    cudaFree(d_p1);
    free(h_n);
    free(h_p);
    return EXIT_SUCCESS;
}


	.file	"tmpxft_002187f6_00000000-6_rosenmac.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z31__device_stub__Z6rosmacPfS_S_S_PfS_S_S_
	.type	_Z31__device_stub__Z6rosmacPfS_S_S_PfS_S_S_, @function
_Z31__device_stub__Z6rosmacPfS_S_S_PfS_S_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6rosmacPfS_S_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z31__device_stub__Z6rosmacPfS_S_S_PfS_S_S_, .-_Z31__device_stub__Z6rosmacPfS_S_S_PfS_S_S_
	.globl	_Z6rosmacPfS_S_S_
	.type	_Z6rosmacPfS_S_S_, @function
_Z6rosmacPfS_S_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z6rosmacPfS_S_S_PfS_S_S_
	.cfi_endproc
.LFE2053:
	.size	_Z6rosmacPfS_S_S_, .-_Z6rosmacPfS_S_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"%.4f\t"
.LC2:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	$1000, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	cmpl	$2, %edi
	jne	.L9
	movq	8(%rsi), %rdi
	call	atof@PLT
	cvttsd2siq	%xmm0, %r12
.L9:
	leal	0(,%r12,4), %eax
	xorl	%r13d, %r13d
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$42, %edi
	call	srand@PLT
	call	rand@PLT
.L10:
	cmpl	%r12d, %r13d
	jnb	.L23
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movss	%xmm0, 0(%rbp,%r13,4)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movss	%xmm0, (%rbx,%r13,4)
	incq	%r13
	jmp	.L10
.L23:
	movq	(%rsp), %rdx
	movq	16(%rsp), %rdi
	movq	%rbp, %rsi
	xorl	%r14d, %r14d
	movabsq	$4294967297, %r13
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	32(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r12d, %eax
	leaq	(%rbx,%rax,4), %r15
.L17:
	movq	%r13, 52(%rsp)
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r12d, 48(%rsp)
	movq	48(%rsp), %rdi
	movq	%r13, %rdx
	movl	$1, %ecx
	movq	%r13, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z31__device_stub__Z6rosmacPfS_S_S_PfS_S_S_
.L12:
	movq	%r13, 52(%rsp)
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r12d, 48(%rsp)
	movq	48(%rsp), %rdi
	movq	%r13, %rdx
	movl	$1, %ecx
	movq	%r13, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	movq	32(%rsp), %rcx
	movq	40(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z31__device_stub__Z6rosmacPfS_S_S_PfS_S_S_
.L13:
	movl	%r14d, %eax
	movl	$100, %ecx
	cltd
	idivl	%ecx
	testl	%edx, %edx
	jne	.L14
	movq	(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	%rbx, %rdx
.L15:
	cmpq	%r15, %rdx
	je	.L24
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC1(%rip), %rsi
	movq	%rdx, 8(%rsp)
	cvtss2sd	(%rdx), %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rdx
	addq	$4, %rdx
	jmp	.L15
.L24:
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L14:
	addl	$2, %r14d
	cmpl	$100000, %r14d
	jne	.L17
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z6rosmacPfS_S_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6rosmacPfS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>

#define BLOCKS  size
#define THREADS 1
#define T       100000
#define H       0.01
#define R       1.0
#define K       2.0
#define ALPHA   9.96
#define BETA    1.0
#define M       0.28
#define DN      0.5
#define DP      0.5

__global__ void rosmac(float *n0, float *n1, float *p0, float *p1)
{
    // Better integration:
    const int tid = blockIdx.x;
    const int left = (tid == 0)? blockDim.x  - 1 : tid - 1;
    const int right = (tid == blockDim.x - 1)? 0 : tid + 1;
    const float dn = R * n0[tid] * (1.0f - n0[tid] / K) - (ALPHA * n0[tid] * p0[tid]) / (1.0f + BETA * n0[tid]) - DN * (n0[tid] - n0[left] / 2.0f - n0[right] / 2.0f);
    const float dp = (ALPHA * n0[tid] * p0[tid]) / (1.0f + BETA * n0[tid]) - M * p0[tid] - DP * (p0[tid] - p0[left] / 2.0f - p0[right] / 2.0f);
    n1[tid] = n0[tid] + H * dn;
    p1[tid] = p0[tid] + H * dp;
}

int main(int argc, char **argv)
{
    const unsigned int size = (argc == 2)? atof(argv[1]) : 1000;
    const unsigned int bytes = size * sizeof(float);
    float *h_n = (float*)malloc(bytes);
    float *h_p = (float*)malloc(bytes);

    float *d_n0, *d_n1, *d_p0, *d_p1;
    hipMalloc((void**)&d_n0, bytes);
    hipMalloc((void**)&d_n1, bytes);
    hipMalloc((void**)&d_p0, bytes);
    hipMalloc((void**)&d_p1, bytes);

    // Use gsl:
    srand(42);
    rand();
    for (int i = 0; i < size; ++i)
    {
        h_n[i] = ((float)rand() / RAND_MAX);
        h_p[i] = ((float)rand() / RAND_MAX);
    }

    hipMemcpy(d_n0, h_n, bytes, hipMemcpyHostToDevice);
    hipMemcpy(d_p0, h_p, bytes, hipMemcpyHostToDevice);

    for (int t = 0; t < T; t += 2)
    {
        rosmac<<<BLOCKS,THREADS>>>(d_n0, d_n1, d_p0, d_p1);
        rosmac<<<BLOCKS,THREADS>>>(d_n1, d_n0, d_p1, d_p0);
        if (t % 100 == 0)
        {
            //printf("%16d -> ", t);
            hipMemcpy(h_n, d_n1, bytes, hipMemcpyDeviceToHost);
            hipMemcpy(h_p, d_p1, bytes, hipMemcpyDeviceToHost);
            for (int i = 0; i < size; ++i)
            {
                printf("%.4f\t", h_p[i]);
            }
            printf("\n");
        }
    }

    hipFree(d_n0);
    hipFree(d_n1);
    hipFree(d_p0);
    hipFree(d_p1);
    free(h_n);
    free(h_p);
    return EXIT_SUCCESS;
}


	.text
	.file	"rosenmac.hip"
	.globl	_Z21__device_stub__rosmacPfS_S_S_ # -- Begin function _Z21__device_stub__rosmacPfS_S_S_
	.type	_Z21__device_stub__rosmacPfS_S_S_,@function
_Z21__device_stub__rosmacPfS_S_S_:      # @_Z21__device_stub__rosmacPfS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6rosmacPfS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__rosmacPfS_S_S_, .Lfunc_end0-_Z21__device_stub__rosmacPfS_S_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$1000, %ebx                     # imm = 0x3E8
	cmpl	$2, %edi
	jne	.LBB1_2
# %bb.1:
	movq	8(%rsi), %rdi
	callq	atof
	cvttsd2si	%xmm0, %rbx
.LBB1_2:
	leal	(,%rbx,4), %r12d
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r14
	leaq	32(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r12, 40(%rsp)                  # 8-byte Spill
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$42, %edi
	callq	srand
	callq	rand
	xorl	%ebp, %ebp
	testl	%ebx, %ebx
	movq	%rbx, 48(%rsp)                  # 8-byte Spill
	je	.LBB1_3
# %bb.16:                               # %.lr.ph.preheader
	movl	%ebx, %ebx
	xorl	%r12d, %r12d
.LBB1_17:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI1_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%r15,%r12,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	movss	%xmm0, (%r14,%r12,4)
	incq	%r12
	cmpq	%r12, %rbx
	jne	.LBB1_17
	jmp	.LBB1_4
.LBB1_3:
	xorl	%ebx, %ebx
.LBB1_4:                                # %._crit_edge
	movabsq	$4294967297, %r13               # imm = 0x100000001
	movq	32(%rsp), %rdi
	movq	%r15, %rsi
	movq	40(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	movq	%r13, %r12
	movl	$1, %ecx
	callq	hipMemcpy
	addq	%rbx, %r13
	decq	%r13
.LBB1_5:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_12 Depth 2
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.6:                                #   in Loop: Header=BB1_5 Depth=1
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	callq	_Z21__device_stub__rosmacPfS_S_S_
.LBB1_7:                                #   in Loop: Header=BB1_5 Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.8:                                #   in Loop: Header=BB1_5 Depth=1
	movq	24(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rcx
	callq	_Z21__device_stub__rosmacPfS_S_S_
.LBB1_9:                                #   in Loop: Header=BB1_5 Depth=1
	imull	$-1030792151, %ebp, %eax        # imm = 0xC28F5C29
	rorl	$2, %eax
	cmpl	$42949672, %eax                 # imm = 0x28F5C28
	ja	.LBB1_14
# %bb.10:                               #   in Loop: Header=BB1_5 Depth=1
	movq	24(%rsp), %rsi
	movq	%r15, %r12
	movq	%r15, %rdi
	movq	40(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	movq	%r14, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$0, 48(%rsp)                    # 4-byte Folded Reload
	je	.LBB1_13
# %bb.11:                               # %.lr.ph58.preheader
                                        #   in Loop: Header=BB1_5 Depth=1
	xorl	%r15d, %r15d
.LBB1_12:                               # %.lr.ph58
                                        #   Parent Loop BB1_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r15,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	%r15, %rbx
	jne	.LBB1_12
.LBB1_13:                               # %._crit_edge59
                                        #   in Loop: Header=BB1_5 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	movq	%r12, %r15
	movabsq	$4294967297, %r12               # imm = 0x100000001
.LBB1_14:                               #   in Loop: Header=BB1_5 Depth=1
	leal	2(%rbp), %eax
	cmpl	$99998, %ebp                    # imm = 0x1869E
	movl	%eax, %ebp
	jb	.LBB1_5
# %bb.15:
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%r15, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6rosmacPfS_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6rosmacPfS_S_S_,@object       # @_Z6rosmacPfS_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z6rosmacPfS_S_S_
	.p2align	3, 0x0
_Z6rosmacPfS_S_S_:
	.quad	_Z21__device_stub__rosmacPfS_S_S_
	.size	_Z6rosmacPfS_S_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%.4f\t"
	.size	.L.str, 6

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6rosmacPfS_S_S_"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__rosmacPfS_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6rosmacPfS_S_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6rosmacPfS_S_S_       ; -- Begin function _Z6rosmacPfS_S_S_
	.globl	_Z6rosmacPfS_S_S_
	.p2align	8
	.type	_Z6rosmacPfS_S_S_,@function
_Z6rosmacPfS_S_S_:                      ; @_Z6rosmacPfS_S_S_
; %bb.0:
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_mov_b32 s8, s15
	s_cmp_lg_u32 s15, 0
	s_mov_b32 s12, s15
	s_cbranch_scc1 .LBB0_2
; %bb.1:
	s_load_b32 s4, s[2:3], 0xc
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s4, 0xffff
.LBB0_2:                                ; %._crit_edge
	s_load_b32 s9, s[2:3], 0xc
	s_load_b256 s[0:7], s[0:1], 0x0
	s_add_i32 s10, s8, 1
	s_mov_b32 s17, 0x4023eb85
	s_mov_b32 s16, 0x1eb851ec
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s9, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s9, s9, -1
	s_cmp_lg_u32 s8, s9
	s_cselect_b32 s14, s10, 0
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[8:9], s[8:9], 2
	s_add_u32 s10, s0, s8
	s_addc_u32 s11, s1, s9
	s_load_b32 s20, s[10:11], 0x0
	s_add_u32 s10, s4, s8
	s_addc_u32 s11, s5, s9
	s_ashr_i32 s13, s12, 31
	s_load_b32 s21, s[10:11], 0x0
	s_lshl_b64 s[12:13], s[12:13], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_add_u32 s15, s0, s12
	s_waitcnt lgkmcnt(0)
	v_cvt_f64_f32_e32 v[0:1], s20
	v_cvt_f64_f32_e32 v[2:3], s21
	v_mul_f64 v[4:5], v[0:1], s[16:17]
	v_add_f64 v[6:7], v[0:1], 1.0
	s_addc_u32 s17, s1, s13
	s_add_u32 s18, s15, -4
	s_addc_u32 s19, s17, -1
	s_ashr_i32 s15, s14, 31
	s_load_b32 s17, s[18:19], 0x0
	s_lshl_b64 s[14:15], s[14:15], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s0, s14
	s_addc_u32 s1, s1, s15
	s_add_u32 s12, s4, s12
	s_load_b32 s0, s[0:1], 0x0
	s_addc_u32 s13, s5, s13
	s_add_u32 s12, s12, -4
	s_addc_u32 s13, s13, -1
	s_add_u32 s4, s4, s14
	s_addc_u32 s5, s5, s15
	s_add_u32 s2, s2, s8
	s_addc_u32 s3, s3, s9
	s_clause 0x1
	s_load_b32 s12, s[12:13], 0x0
	s_load_b32 s4, s[4:5], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[4:5], v[2:3]
	v_div_scale_f64 v[8:9], null, v[6:7], v[6:7], v[4:5]
	v_div_scale_f64 v[14:15], vcc_lo, v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[10:11], v[8:9]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[14:15], v[10:11]
	v_fma_f64 v[8:9], -v[8:9], v[12:13], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[8:9], v[8:9], v[10:11], v[12:13]
	v_fma_f64 v[10:11], v[0:1], -0.5, 1.0
	v_div_fixup_f64 v[4:5], v[8:9], v[6:7], v[4:5]
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v6, s17, -0.5, s20
	s_mov_b32 s17, 0xbfd1eb85
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fmac_f32_e64 v6, s0, -0.5
	s_mov_b32 s0, 0x47ae147b
	s_mov_b32 s1, 0x3f847ae1
	v_cvt_f64_f32_e32 v[6:7], v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[10:11], v[0:1], -v[4:5]
	v_fma_f64 v[2:3], v[2:3], s[16:17], v[4:5]
	v_fma_f64 v[6:7], v[6:7], -0.5, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v6, v[6:7]
	v_cvt_f64_f32_e32 v[6:7], v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[0:1], v[6:7], s[0:1], v[0:1]
	v_mov_b32_e32 v6, 0
	v_cvt_f32_f64_e32 v0, v[0:1]
	global_store_b32 v6, v0, s[2:3]
	global_load_b32 v7, v6, s[10:11]
	v_fma_f32 v0, s12, -0.5, s21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e64 v0, s4, -0.5
	v_cvt_f64_f32_e32 v[0:1], v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], v[0:1], -0.5, v[2:3]
	v_cvt_f32_f64_e32 v2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[2:3], v2
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[0:1], v7
	v_fma_f64 v[0:1], v[2:3], s[0:1], v[0:1]
	s_add_u32 s0, s6, s8
	s_addc_u32 s1, s7, s9
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v0, v[0:1]
	global_store_b32 v6, v0, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6rosmacPfS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6rosmacPfS_S_S_, .Lfunc_end0-_Z6rosmacPfS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 648
; NumSgprs: 24
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6rosmacPfS_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     24
    .sgpr_spill_count: 0
    .symbol:         _Z6rosmacPfS_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
