#include <time.h>
#include <stdio.h>

#define N    (48*1024)
#define M    (48*1024)
#define P    256
#define SIZE 4

float rand_unit_box() {
	return (rand() + 0.5) / (RAND_MAX + 1.0) - 0.5;
}

template<class T>
struct SharedMemory {
	__device__        inline operator T *() {
		extern __shared__ int __smem[];
		return (T*) __smem;
	}

	__device__        inline operator const T *() const {
		extern __shared__ int __smem[];
		return (T*) __smem;
	}
};

__global__
void compute(float *__restrict__ G, const float *__restrict__ Y, const float *__restrict__ X) {
//	const int i = threadIdx.x + blockIdx.x * P;
	auto ys = SharedMemory<float>();
//
//	for (int tile = 0; tile < M / P; tile++) {
//		const int j0 = tile * P * SIZE;
//		int base = threadIdx.x * SIZE;
//		ys[base] = Y[j0 + base];
//		ys[base + 1] = Y[j0 + base + 1];
//		ys[base + 2] = Y[j0 + base + 2];
//		__syncthreads();
//#pragma unroll 128
//		for (int j = 0; j < P; j++) {
//			const int i0 = i * SIZE;
//			const int j0 = j * SIZE;
//			const auto dx = X[i0] - ys[j0];
//			const auto dy = X[i0 + 1] - ys[j0 + 1];
//			const auto dz = X[i0 + 2] - ys[j0 + 2];
//			const auto tmp = rsqrt(dx * dx + dy * dy + dz * dz);
//			const auto r3inv = tmp * tmp * tmp;
//			G[i0] += dx * r3inv ;
//			G[i0 + 1] += dy * r3inv;
//			G[i0 + 2] += dz * r3inv;
//		}
//		__syncthreads();
//	}
//
	const int i = threadIdx.x + blockIdx.x * P;
	const auto G0 = (SIZE+1) * i;
	float g1 = 0.0;
	float g2 = 0.0;
	float g3 = 0.0;
	float g4 = 0.0;
	for (int tile = 0; tile < M / P; tile++) {
		const int j0 = tile * P * SIZE;
		int base = threadIdx.x * SIZE;
		ys[base] = Y[j0 + base];
		ys[base + 1] = Y[j0 + base + 1];
		ys[base + 2] = Y[j0 + base + 2];
		__syncthreads();
		//if (i < N) {
		const auto X0 = SIZE * i;
		const auto x1 = X[X0];
		const auto x2 = X[X0 + 1];
		const auto x3 = X[X0 + 2];
		for (int j = 0; j < P; j++) {
			const auto Y0 = SIZE * j;
			const auto dx1 = x1 - ys[Y0]; // 1 OP
			const auto dx2 = x2 - ys[Y0 + 1]; // 1 OP
			const auto dx3 = x3 - ys[Y0 + 2]; // 1 OP
			const auto r2 = dx1 * dx1 + dx2 * dx2 + dx3 * dx3; // 5 OP
			const auto rinv = rsqrt(r2); // 1 OP
			const auto nrinv3 = -rinv * rinv * rinv; // 3 OP
			g1 = g1 + dx1 * nrinv3; // 2 OP
			g2 = g2 + dx2 * nrinv3; // 2 OP
			g3 = g3 + dx3 * nrinv3; // 2 OP
			g4 = g4 - rinv; // 1 OP
		}
		__syncthreads();
//	}
	}
	G[G0] = g1;
	G[G0 + 1] = g2;
	G[G0 + 2] = g3;
	G[G0 + 3] = g4;
}

int main() {

	float *hostX;
	float *hostY;
	float *hostG;
	float *deviceX;
	float *deviceY;
	float *deviceG;

	cudaSetDeviceFlags (cudaDeviceMapHost);
	cudaHostAlloc((void**) &hostG, (SIZE+1) * N * sizeof(float), cudaHostAllocMapped | cudaHostAllocPortable);
	cudaHostAlloc((void**) &hostX, (SIZE) * N * sizeof(float), cudaHostAllocMapped | cudaHostAllocPortable);
	cudaHostAlloc((void**) &hostY, (SIZE) * M * sizeof(float), cudaHostAllocMapped | cudaHostAllocPortable);
	cudaHostGetDevicePointer((void**) &deviceG, hostG, 0);
	cudaHostGetDevicePointer((void**) &deviceX, hostX, 0);
	cudaHostGetDevicePointer((void**) &deviceY, hostY, 0);

	for (int i = 0; i < N; i++) {
		for (int d = 0; d < SIZE; d++) {
			hostX[SIZE * i] = rand_unit_box();
			hostX[SIZE * i + 1] = rand_unit_box();
			hostX[SIZE * i + 2] = rand_unit_box();
		}
	}
	for (int i = 0; i < M; i++) {
		for (int d = 0; d < SIZE; d++) {
			hostY[SIZE * i] = rand_unit_box();
			hostY[SIZE * i + 1] = rand_unit_box();
			hostY[SIZE * i + 2] = rand_unit_box();
		}
	}

	auto start = time(NULL);
	for (int i = 0; i < 1000; i++) {

		compute<<<N/P,P,P * SIZE*sizeof(float)>>>(deviceG,deviceX,deviceY);
		cudaDeviceSynchronize();
		auto end = time(NULL);
		double ops = (i + 1) * (double) N * (double) M * 20.0 / (1024.0 * 1024.0 * 1024.0 * 1024.0);
		double t = (double) (end - start);
		double flops = ops / t;
		printf("%i %e TFLOP in %e seconds for %e TFLOPS\n", i, ops, t, flops);
	}

}

	.file	"tmpxft_003b54fb_00000000-6_cuda_test.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z13rand_unit_boxv
	.type	_Z13rand_unit_boxv, @function
_Z13rand_unit_boxv:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	rand@PLT
	movsd	.LC0(%rip), %xmm1
	cvtsi2sdl	%eax, %xmm0
	addsd	%xmm1, %xmm0
	mulsd	.LC1(%rip), %xmm0
	popq	%rdx
	.cfi_def_cfa_offset 8
	subsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z13rand_unit_boxv, .-_Z13rand_unit_boxv
	.globl	_Z32__device_stub__Z7computePfPKfS1_PfPKfS1_
	.type	_Z32__device_stub__Z7computePfPKfS1_PfPKfS1_, @function
_Z32__device_stub__Z7computePfPKfS1_PfPKfS1_:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	leaq	48(%rsp), %rdi
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z7computePfPKfS1_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L4:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z32__device_stub__Z7computePfPKfS1_PfPKfS1_, .-_Z32__device_stub__Z7computePfPKfS1_PfPKfS1_
	.globl	_Z7computePfPKfS1_
	.type	_Z7computePfPKfS1_, @function
_Z7computePfPKfS1_:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z7computePfPKfS1_PfPKfS1_
	.cfi_endproc
.LFE2056:
	.size	_Z7computePfPKfS1_, .-_Z7computePfPKfS1_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC5:
	.string	"%i %e TFLOP in %e seconds for %e TFLOPS\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$8, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	xorl	%ebx, %ebx
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	cudaSetDeviceFlags@PLT
	leaq	16(%rsp), %rdi
	movl	$3, %edx
	movl	$983040, %esi
	call	cudaHostAlloc@PLT
	movq	%rsp, %rdi
	movl	$3, %edx
	movl	$786432, %esi
	call	cudaHostAlloc@PLT
	leaq	8(%rsp), %rdi
	movl	$3, %edx
	movl	$786432, %esi
	call	cudaHostAlloc@PLT
	movq	16(%rsp), %rsi
	leaq	40(%rsp), %rdi
	xorl	%edx, %edx
	call	cudaHostGetDevicePointer@PLT
	movq	(%rsp), %rsi
	leaq	24(%rsp), %rdi
	xorl	%edx, %edx
	call	cudaHostGetDevicePointer@PLT
	movq	8(%rsp), %rsi
	leaq	32(%rsp), %rdi
	xorl	%edx, %edx
	call	cudaHostGetDevicePointer@PLT
.L11:
	leaq	4(%rbx), %r13
	leaq	8(%rbx), %r12
	movl	$4, %ebp
.L12:
	movq	(%rsp), %r14
	call	_Z13rand_unit_boxv
	addq	%rbx, %r14
	movss	%xmm0, (%r14)
	movq	(%rsp), %r14
	call	_Z13rand_unit_boxv
	addq	%r13, %r14
	movss	%xmm0, (%r14)
	movq	(%rsp), %r14
	call	_Z13rand_unit_boxv
	addq	%r12, %r14
	movss	%xmm0, (%r14)
	decl	%ebp
	jne	.L12
	addq	$16, %rbx
	cmpq	$786432, %rbx
	jne	.L11
	xorl	%ebx, %ebx
.L13:
	leaq	4(%rbx), %r13
	leaq	8(%rbx), %r12
	movl	$4, %ebp
.L14:
	movq	8(%rsp), %r14
	call	_Z13rand_unit_boxv
	addq	%rbx, %r14
	movss	%xmm0, (%r14)
	movq	8(%rsp), %r14
	call	_Z13rand_unit_boxv
	addq	%r13, %r14
	movss	%xmm0, (%r14)
	movq	8(%rsp), %r14
	call	_Z13rand_unit_boxv
	addq	%r12, %r14
	movss	%xmm0, (%r14)
	decl	%ebp
	jne	.L14
	addq	$16, %rbx
	cmpq	$786432, %rbx
	jne	.L13
	movabsq	$4294967552, %r12
	xorl	%edi, %edi
	xorl	%ebx, %ebx
	call	time@PLT
	movq	%rax, %rbp
.L17:
	movl	$67108867, %edi
	xorl	%r9d, %r9d
	movq	%r12, %rdx
	movl	$1, %ecx
	salq	$6, %rdi
	movl	$4096, %r8d
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z32__device_stub__Z7computePfPKfS1_PfPKfS1_
.L16:
	call	cudaDeviceSynchronize@PLT
	leal	1(%rbx), %r13d
	xorl	%edi, %edi
	call	time@PLT
	cvtsi2sdl	%r13d, %xmm0
	movl	%ebx, %edx
	movsd	.LC2(%rip), %xmm1
	subq	%rbp, %rax
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	mulsd	%xmm1, %xmm0
	mulsd	%xmm1, %xmm0
	cvtsi2sdq	%rax, %xmm1
	movb	$3, %al
	mulsd	.LC3(%rip), %xmm0
	mulsd	.LC4(%rip), %xmm0
	movaps	%xmm0, %xmm2
	divsd	%xmm1, %xmm2
	call	__printf_chk@PLT
	cmpl	$1000, %r13d
	je	.L24
	movl	%r13d, %ebx
	jmp	.L17
.L24:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$80, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z7computePfPKfS1_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7computePfPKfS1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1071644672
	.align 8
.LC1:
	.long	0
	.long	1040187392
	.align 8
.LC2:
	.long	0
	.long	1088946176
	.align 8
.LC3:
	.long	0
	.long	1077149696
	.align 8
.LC4:
	.long	0
	.long	1030750208
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <time.h>
#include <stdio.h>

#define N    (48*1024)
#define M    (48*1024)
#define P    256
#define SIZE 4

float rand_unit_box() {
	return (rand() + 0.5) / (RAND_MAX + 1.0) - 0.5;
}

template<class T>
struct SharedMemory {
	__device__        inline operator T *() {
		extern __shared__ int __smem[];
		return (T*) __smem;
	}

	__device__        inline operator const T *() const {
		extern __shared__ int __smem[];
		return (T*) __smem;
	}
};

__global__
void compute(float *__restrict__ G, const float *__restrict__ Y, const float *__restrict__ X) {
//	const int i = threadIdx.x + blockIdx.x * P;
	auto ys = SharedMemory<float>();
//
//	for (int tile = 0; tile < M / P; tile++) {
//		const int j0 = tile * P * SIZE;
//		int base = threadIdx.x * SIZE;
//		ys[base] = Y[j0 + base];
//		ys[base + 1] = Y[j0 + base + 1];
//		ys[base + 2] = Y[j0 + base + 2];
//		__syncthreads();
//#pragma unroll 128
//		for (int j = 0; j < P; j++) {
//			const int i0 = i * SIZE;
//			const int j0 = j * SIZE;
//			const auto dx = X[i0] - ys[j0];
//			const auto dy = X[i0 + 1] - ys[j0 + 1];
//			const auto dz = X[i0 + 2] - ys[j0 + 2];
//			const auto tmp = rsqrt(dx * dx + dy * dy + dz * dz);
//			const auto r3inv = tmp * tmp * tmp;
//			G[i0] += dx * r3inv ;
//			G[i0 + 1] += dy * r3inv;
//			G[i0 + 2] += dz * r3inv;
//		}
//		__syncthreads();
//	}
//
	const int i = threadIdx.x + blockIdx.x * P;
	const auto G0 = (SIZE+1) * i;
	float g1 = 0.0;
	float g2 = 0.0;
	float g3 = 0.0;
	float g4 = 0.0;
	for (int tile = 0; tile < M / P; tile++) {
		const int j0 = tile * P * SIZE;
		int base = threadIdx.x * SIZE;
		ys[base] = Y[j0 + base];
		ys[base + 1] = Y[j0 + base + 1];
		ys[base + 2] = Y[j0 + base + 2];
		__syncthreads();
		//if (i < N) {
		const auto X0 = SIZE * i;
		const auto x1 = X[X0];
		const auto x2 = X[X0 + 1];
		const auto x3 = X[X0 + 2];
		for (int j = 0; j < P; j++) {
			const auto Y0 = SIZE * j;
			const auto dx1 = x1 - ys[Y0]; // 1 OP
			const auto dx2 = x2 - ys[Y0 + 1]; // 1 OP
			const auto dx3 = x3 - ys[Y0 + 2]; // 1 OP
			const auto r2 = dx1 * dx1 + dx2 * dx2 + dx3 * dx3; // 5 OP
			const auto rinv = rsqrt(r2); // 1 OP
			const auto nrinv3 = -rinv * rinv * rinv; // 3 OP
			g1 = g1 + dx1 * nrinv3; // 2 OP
			g2 = g2 + dx2 * nrinv3; // 2 OP
			g3 = g3 + dx3 * nrinv3; // 2 OP
			g4 = g4 - rinv; // 1 OP
		}
		__syncthreads();
//	}
	}
	G[G0] = g1;
	G[G0 + 1] = g2;
	G[G0 + 2] = g3;
	G[G0 + 3] = g4;
}

int main() {

	float *hostX;
	float *hostY;
	float *hostG;
	float *deviceX;
	float *deviceY;
	float *deviceG;

	hipSetDeviceFlags (hipDeviceMapHost);
	hipHostAlloc((void**) &hostG, (SIZE+1) * N * sizeof(float), hipHostMallocMapped | hipHostMallocPortable);
	hipHostAlloc((void**) &hostX, (SIZE) * N * sizeof(float), hipHostMallocMapped | hipHostMallocPortable);
	hipHostAlloc((void**) &hostY, (SIZE) * M * sizeof(float), hipHostMallocMapped | hipHostMallocPortable);
	hipHostGetDevicePointer((void**) &deviceG, hostG, 0);
	hipHostGetDevicePointer((void**) &deviceX, hostX, 0);
	hipHostGetDevicePointer((void**) &deviceY, hostY, 0);

	for (int i = 0; i < N; i++) {
		for (int d = 0; d < SIZE; d++) {
			hostX[SIZE * i] = rand_unit_box();
			hostX[SIZE * i + 1] = rand_unit_box();
			hostX[SIZE * i + 2] = rand_unit_box();
		}
	}
	for (int i = 0; i < M; i++) {
		for (int d = 0; d < SIZE; d++) {
			hostY[SIZE * i] = rand_unit_box();
			hostY[SIZE * i + 1] = rand_unit_box();
			hostY[SIZE * i + 2] = rand_unit_box();
		}
	}

	auto start = time(NULL);
	for (int i = 0; i < 1000; i++) {

		compute<<<N/P,P,P * SIZE*sizeof(float)>>>(deviceG,deviceX,deviceY);
		hipDeviceSynchronize();
		auto end = time(NULL);
		double ops = (i + 1) * (double) N * (double) M * 20.0 / (1024.0 * 1024.0 * 1024.0 * 1024.0);
		double t = (double) (end - start);
		double flops = ops / t;
		printf("%i %e TFLOP in %e seconds for %e TFLOPS\n", i, ops, t, flops);
	}

}

	.text
	.file	"cuda_test.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z13rand_unit_boxv
.LCPI0_0:
	.quad	0x3fe0000000000000              # double 0.5
.LCPI0_1:
	.quad	0x3e00000000000000              # double 4.6566128730773926E-10
.LCPI0_2:
	.quad	0xbfe0000000000000              # double -0.5
	.text
	.globl	_Z13rand_unit_boxv
	.type	_Z13rand_unit_boxv,@function
_Z13rand_unit_boxv:                     # @_Z13rand_unit_boxv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	rand
	cvtsi2sd	%eax, %xmm0
	addsd	.LCPI0_0(%rip), %xmm0
	mulsd	.LCPI0_1(%rip), %xmm0
	addsd	.LCPI0_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z13rand_unit_boxv, .Lfunc_end0-_Z13rand_unit_boxv
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__computePfPKfS1_ # -- Begin function _Z22__device_stub__computePfPKfS1_
	.type	_Z22__device_stub__computePfPKfS1_,@function
_Z22__device_stub__computePfPKfS1_:     # @_Z22__device_stub__computePfPKfS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7computePfPKfS1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z22__device_stub__computePfPKfS1_, .Lfunc_end1-_Z22__device_stub__computePfPKfS1_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI2_0:
	.quad	0x3fe0000000000000              # double 0.5
.LCPI2_1:
	.quad	0x3e00000000000000              # double 4.6566128730773926E-10
.LCPI2_2:
	.quad	0xbfe0000000000000              # double -0.5
.LCPI2_3:
	.quad	0x40e8000000000000              # double 49152
.LCPI2_4:
	.quad	0x4034000000000000              # double 20
.LCPI2_5:
	.quad	0x3d70000000000000              # double 9.0949470177292824E-13
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$8, %edi
	callq	hipSetDeviceFlags
	leaq	40(%rsp), %rbx
	movl	$983040, %esi                   # imm = 0xF0000
	movq	%rbx, %rdi
	movl	$3, %edx
	callq	hipHostAlloc
	leaq	8(%rsp), %r14
	movl	$786432, %esi                   # imm = 0xC0000
	movq	%r14, %rdi
	movl	$3, %edx
	callq	hipHostAlloc
	movq	%rsp, %r15
	movl	$786432, %esi                   # imm = 0xC0000
	movq	%r15, %rdi
	movl	$3, %edx
	callq	hipHostAlloc
	movq	(%rbx), %rsi
	leaq	16(%rsp), %rdi
	xorl	%ebx, %ebx
	xorl	%edx, %edx
	callq	hipHostGetDevicePointer
	movq	(%r14), %rsi
	leaq	32(%rsp), %rdi
	xorl	%edx, %edx
	callq	hipHostGetDevicePointer
	movq	(%r15), %rsi
	leaq	24(%rsp), %rdi
	xorl	%edx, %edx
	callq	hipHostGetDevicePointer
.LBB2_1:                                # %.preheader35
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	leaq	(,%rbx,4), %r14
	leaq	1(,%rbx,4), %r15
	leaq	2(,%rbx,4), %r12
	movl	$4, %ebp
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	addsd	.LCPI2_0(%rip), %xmm0
	mulsd	.LCPI2_1(%rip), %xmm0
	addsd	.LCPI2_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movq	8(%rsp), %rax
	movss	%xmm0, (%rax,%r14,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	addsd	.LCPI2_0(%rip), %xmm0
	mulsd	.LCPI2_1(%rip), %xmm0
	addsd	.LCPI2_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movq	8(%rsp), %rax
	movss	%xmm0, (%rax,%r15,4)
	callq	rand
	movsd	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	addsd	%xmm1, %xmm0
	movsd	.LCPI2_1(%rip), %xmm1           # xmm1 = mem[0],zero
	mulsd	%xmm1, %xmm0
	movsd	.LCPI2_2(%rip), %xmm1           # xmm1 = mem[0],zero
	addsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movq	8(%rsp), %rax
	movss	%xmm0, (%rax,%r12,4)
	decl	%ebp
	jne	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%rbx
	cmpq	$49152, %rbx                    # imm = 0xC000
	jne	.LBB2_1
# %bb.4:                                # %.preheader.preheader
	xorl	%ebx, %ebx
.LBB2_5:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_6 Depth 2
	leaq	(,%rbx,4), %r14
	leaq	1(,%rbx,4), %r15
	leaq	2(,%rbx,4), %r12
	movl	$4, %ebp
.LBB2_6:                                #   Parent Loop BB2_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	addsd	.LCPI2_0(%rip), %xmm0
	mulsd	.LCPI2_1(%rip), %xmm0
	addsd	.LCPI2_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movq	(%rsp), %rax
	movss	%xmm0, (%rax,%r14,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	addsd	.LCPI2_0(%rip), %xmm0
	mulsd	.LCPI2_1(%rip), %xmm0
	addsd	.LCPI2_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movq	(%rsp), %rax
	movss	%xmm0, (%rax,%r15,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	addsd	.LCPI2_0(%rip), %xmm0
	mulsd	.LCPI2_1(%rip), %xmm0
	addsd	.LCPI2_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movq	(%rsp), %rax
	movss	%xmm0, (%rax,%r12,4)
	decl	%ebp
	jne	.LBB2_6
# %bb.7:                                #   in Loop: Header=BB2_5 Depth=1
	incq	%rbx
	cmpq	$49152, %rbx                    # imm = 0xC000
	jne	.LBB2_5
# %bb.8:
	movabsq	$4294967488, %rbx               # imm = 0x1000000C0
	xorl	%r12d, %r12d
	xorl	%edi, %edi
	callq	time
	movq	%rax, %r14
	leaq	64(%rbx), %r15
.LBB2_9:                                # =>This Inner Loop Header: Depth=1
	movl	$4096, %r8d                     # imm = 0x1000
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_11
# %bb.10:                               #   in Loop: Header=BB2_9 Depth=1
	movq	16(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	callq	_Z22__device_stub__computePfPKfS1_
.LBB2_11:                               #   in Loop: Header=BB2_9 Depth=1
	callq	hipDeviceSynchronize
	xorl	%edi, %edi
	callq	time
	leal	1(%r12), %ebp
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ebp, %xmm0
	movsd	.LCPI2_3(%rip), %xmm1           # xmm1 = mem[0],zero
	mulsd	%xmm1, %xmm0
	mulsd	%xmm1, %xmm0
	mulsd	.LCPI2_4(%rip), %xmm0
	mulsd	.LCPI2_5(%rip), %xmm0
	subq	%r14, %rax
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rax, %xmm1
	movapd	%xmm0, %xmm2
	divsd	%xmm1, %xmm2
	movl	$.L.str, %edi
	movl	%r12d, %esi
	movb	$3, %al
	callq	printf
	movl	%ebp, %r12d
	cmpl	$1000, %ebp                     # imm = 0x3E8
	jne	.LBB2_9
# %bb.12:
	xorl	%eax, %eax
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7computePfPKfS1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7computePfPKfS1_,@object      # @_Z7computePfPKfS1_
	.section	.rodata,"a",@progbits
	.globl	_Z7computePfPKfS1_
	.p2align	3, 0x0
_Z7computePfPKfS1_:
	.quad	_Z22__device_stub__computePfPKfS1_
	.size	_Z7computePfPKfS1_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%i %e TFLOP in %e seconds for %e TFLOPS\n"
	.size	.L.str, 41

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7computePfPKfS1_"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__computePfPKfS1_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7computePfPKfS1_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7computePfPKfS1_      ; -- Begin function _Z7computePfPKfS1_
	.globl	_Z7computePfPKfS1_
	.p2align	8
	.type	_Z7computePfPKfS1_,@function
_Z7computePfPKfS1_:                     ; @_Z7computePfPKfS1_
; %bb.0:
	v_lshl_add_u32 v9, s15, 8, v0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_lshlrev_b32_e32 v10, 2, v0
	v_lshl_add_u32 v11, v0, 4, 0
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v3, 0
	v_dual_mov_b32 v0, 0 :: v_dual_lshlrev_b32 v1, 2, v9
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	s_load_b128 s[0:3], s[0:1], 0x0
	global_load_b96 v[4:6], v[1:2], off
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, 0
.LBB0_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_2 Depth 2
	v_lshl_add_u32 v7, s4, 10, v10
	s_mov_b32 s5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[7:8]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v12, vcc_lo, s2, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v13, vcc_lo
	global_load_b96 v[12:14], v[12:13], off
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v11, v12, v13 offset1:1
	ds_store_b32 v11, v14 offset:8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_2:                                ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_add_i32 s6, s5, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[18:19], v2
	v_mov_b32_e32 v7, s6
	v_cvt_f64_f32_e32 v[2:3], v3
	s_add_i32 s5, s5, 16
	ds_load_2addr_b32 v[12:13], v7 offset1:1
	ds_load_b32 v7, v7 offset:8
	s_cmpk_eq_i32 s5, 0x1000
	s_waitcnt lgkmcnt(1)
	v_sub_f32_e32 v22, v5, v13
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v20, v4, v12 :: v_dual_sub_f32 v7, v6, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v12, v22, v22
	v_cvt_f64_f32_e32 v[22:23], v22
	v_cvt_f64_f32_e32 v[24:25], v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v12, v20, v20
	v_cvt_f64_f32_e32 v[20:21], v20
	v_fmac_f32_e32 v12, v7, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[12:13], v12
	v_rsq_f64_e32 v[14:15], v[12:13]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[12:13], v[14:15], -v[12:13]
	v_cmp_class_f64_e64 vcc_lo, v[14:15], 0x180
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[12:13], v[14:15], 1.0
	v_mul_f64 v[16:17], v[14:15], v[12:13]
	v_fma_f64 v[12:13], 0x3fd80000, v[12:13], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[16:17], v[12:13], v[14:15]
	v_cvt_f64_f32_e32 v[16:17], v0
	v_cvt_f64_f32_e32 v[0:1], v1
	v_dual_cndmask_b32 v13, v15, v13 :: v_dual_cndmask_b32 v12, v14, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[12:13], -v[12:13]
	v_add_f64 v[2:3], v[2:3], -v[12:13]
	v_mul_f64 v[14:15], v[12:13], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_f64_e32 v3, v[2:3]
	v_fma_f64 v[12:13], v[14:15], v[20:21], v[16:17]
	v_fma_f64 v[16:17], v[14:15], v[22:23], v[0:1]
	v_fma_f64 v[14:15], v[14:15], v[24:25], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f32_f64_e32 v0, v[12:13]
	v_cvt_f32_f64_e32 v1, v[16:17]
	s_delay_alu instid0(VALU_DEP_3)
	v_cvt_f32_f64_e32 v2, v[14:15]
	s_cbranch_scc0 .LBB0_2
; %bb.3:                                ;   in Loop: Header=BB0_1 Depth=1
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_eq_i32 s4, 0xc0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_1
; %bb.4:
	v_lshl_add_u32 v4, v9, 2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	global_store_b128 v[4:5], v[0:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7computePfPKfS1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7computePfPKfS1_, .Lfunc_end0-_Z7computePfPKfS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 560
; NumSgprs: 18
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .actual_access:  write_only
        .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7computePfPKfS1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7computePfPKfS1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     26
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
