#include <iostream>
#include <malloc.h>

using namespace std;
__global__ void add(int* d_a, int* d_b, int* d_c, int* d_limit){
	int tid = threadIdx.x + blockIdx.x*blockDim.x;
	if(tid < 1000){
		d_c[tid] = d_a[tid] + d_b[tid];
	}
}
int main(){
	int size = 2000; // size of an array
	int ngpus = 2;

	/* Device memory pointer for storing array*/
	int *d_a[2], *d_b[2], *d_c[2];
	const int Ns[2] = {size/2, size - size/2};

	/* memory allocation for limit */
	int* h_limit;
	int* d_limit;
	h_limit = (int *)malloc(sizeof(int));
	cudaMalloc((void **)&d_limit, sizeof(int));
	
	/* Host memory for storing array */
	int h_a[size];
	int h_b[size];
	for(int i=0;i<size;i++){
		h_a[i] = i+1;
		h_b[i] = i+2;
	}
	/*int* h_c[ngpus];
	for(int dev=0; dev < ngpus; dev++){
		h_c[dev] = (int *)malloc(Ns[dev]*sizeof(int));		
	}*/
	
	int* h_c;
	h_c = (int *)malloc(size*sizeof(int));

	/* allocate memory on gpus */
	for(int dev=0; dev< ngpus ;dev++){
		cudaSetDevice(dev);
		cudaMalloc((void **)&d_a[dev], Ns[dev]*sizeof(int));
		cudaMalloc((void **)&d_b[dev], Ns[dev]*sizeof(int));
		cudaMalloc((void **)&d_c[dev], Ns[dev]*sizeof(int));
	}
	
	/* Copy the host array to gpus */
	for(int dev=0,pos=0; dev < ngpus; pos+= Ns[dev], dev++){
		cudaSetDevice(dev);
		cudaMemcpy(d_a[dev], h_a+pos, Ns[dev]*sizeof(int), cudaMemcpyHostToDevice);
		cudaMemcpy(d_b[dev], h_b+pos, Ns[dev]*sizeof(int), cudaMemcpyHostToDevice);
	}
	
	/* Compute addition */
	for(int dev=0; dev< ngpus; dev++){
		//h_limit[0] = Ns[dev];
		cudaSetDevice(dev);
		h_limit[0] = Ns[dev];
		cudaMemcpy(d_limit, h_limit, sizeof(int), cudaMemcpyHostToDevice);
		add<<<1,Ns[dev]>>>(d_a[dev],d_b[dev], d_c[dev], d_limit);
		/*cudaMemcpy(h_c[dev], d_c[dev], Ns[dev]*sizeof(int), cudaMemcpyDeviceToHost);
		for(int i=0;i<Ns[dev];i++){
			if(i%100 == 0)
				cout<<h_c[dev][i]<<endl;
		}*/
	}
	
	for(int dev=0, pos=0; dev < ngpus; pos += Ns[dev], dev++){
		cudaSetDevice(dev);
		cudaMemcpy(h_c+pos, d_c[dev], Ns[dev]*sizeof(int), cudaMemcpyDeviceToHost);
	}

	/* Print Part */
	for(int i=0;i<size;i++){
		if(i%100 == 0)
			cout<<"h_c["<<i<<"] = "<<h_c[i]<<endl;
	}
}


	.file	"tmpxft_00295e6c_00000000-6_add_mgpu.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z28__device_stub__Z3addPiS_S_S_PiS_S_S_
	.type	_Z28__device_stub__Z3addPiS_S_S_PiS_S_S_, @function
_Z28__device_stub__Z3addPiS_S_S_PiS_S_S_:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z3addPiS_S_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z28__device_stub__Z3addPiS_S_S_PiS_S_S_, .-_Z28__device_stub__Z3addPiS_S_S_PiS_S_S_
	.globl	_Z3addPiS_S_S_
	.type	_Z3addPiS_S_S_, @function
_Z3addPiS_S_S_:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z3addPiS_S_S_PiS_S_S_
	.cfi_endproc
.LFE3661:
	.size	_Z3addPiS_S_S_, .-_Z3addPiS_S_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"h_c["
.LC1:
	.string	"] = "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$4, %edi
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$168, %rsp
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	movabsq	$4294967297000, %rax
	movq	%rax, -112(%rbp)
	call	malloc@PLT
	leaq	-144(%rbp), %rdi
	movl	$4, %esi
	movq	%rax, -152(%rbp)
	call	cudaMalloc@PLT
	leaq	-4096(%rsp), %rax
.L9:
	cmpq	%rax, %rsp
	je	.L10
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L9
.L10:
	subq	$3904, %rsp
	orq	$0, 3896(%rsp)
	movq	%rsp, -160(%rbp)
	leaq	-4096(%rsp), %rax
.L12:
	cmpq	%rax, %rsp
	je	.L13
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L12
.L13:
	subq	$3904, %rsp
	orq	$0, 3896(%rsp)
	movl	$1, %eax
	movq	%rsp, -168(%rbp)
.L15:
	movq	-160(%rbp), %rcx
	leal	1(%rax), %edx
	movl	%eax, -4(%rcx,%rax,4)
	movq	-168(%rbp), %rcx
	movl	%edx, -4(%rcx,%rax,4)
	incq	%rax
	cmpq	$2001, %rax
	jne	.L15
	movl	$8000, %edi
	leaq	-104(%rbp), %r13
	leaq	-88(%rbp), %r14
	xorl	%ebx, %ebx
	call	malloc@PLT
	xorl	%edi, %edi
	xorl	%r15d, %r15d
	movq	%rax, %r12
	call	cudaSetDevice@PLT
	movl	$4000, %esi
	movq	%r13, %rdi
	call	cudaMalloc@PLT
	movl	$4000, %esi
	movq	%r14, %rdi
	call	cudaMalloc@PLT
	movl	$4000, %esi
	leaq	-72(%rbp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %edi
	call	cudaSetDevice@PLT
	leaq	-96(%rbp), %rdi
	movl	$4000, %esi
	call	cudaMalloc@PLT
	leaq	-80(%rbp), %rdi
	movl	$4000, %esi
	call	cudaMalloc@PLT
	leaq	-64(%rbp), %rdi
	movl	$4000, %esi
	call	cudaMalloc@PLT
	leaq	-112(%rbp), %rax
	movq	%rax, -176(%rbp)
.L16:
	movl	%ebx, %edi
	call	cudaSetDevice@PLT
	movq	-176(%rbp), %rax
	movslq	%r15d, %r8
	movq	0(%r13,%rbx,8), %rdi
	salq	$2, %r8
	movl	$1, %ecx
	movslq	(%rax,%rbx,4), %rdx
	movq	-160(%rbp), %rax
	movq	%r8, -192(%rbp)
	leaq	(%rax,%r8), %rsi
	movl	%edx, -196(%rbp)
	salq	$2, %rdx
	movq	%rdx, -184(%rbp)
	call	cudaMemcpy@PLT
	movq	-168(%rbp), %rax
	movq	(%r14,%rbx,8), %rdi
	movl	$1, %ecx
	movq	-192(%rbp), %r8
	movq	-184(%rbp), %rdx
	leaq	(%rax,%r8), %rsi
	call	cudaMemcpy@PLT
	movl	-196(%rbp), %r9d
	addl	%r9d, %r15d
	testq	%rbx, %rbx
	jne	.L27
	movl	$1, %ebx
	jmp	.L16
.L27:
	xorl	%r15d, %r15d
.L18:
	movl	%r15d, %edi
	call	cudaSetDevice@PLT
	movl	$1, %ecx
	movl	$4, %edx
	movq	-176(%rbp), %rax
	movq	-144(%rbp), %rdi
	movl	(%rax,%r15,4), %r8d
	movq	-152(%rbp), %rax
	movl	%r8d, (%rax)
	movq	%rax, %rsi
	movl	%r8d, -160(%rbp)
	call	cudaMemcpy@PLT
	movl	-160(%rbp), %r8d
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movq	%rax, -120(%rbp)
	movl	-116(%rbp), %ecx
	movq	%rax, %rdi
	movl	$1, %esi
	movl	%r8d, -124(%rbp)
	movq	-124(%rbp), %rdx
	xorl	%r8d, %r8d
	movq	%rax, -136(%rbp)
	movl	$1, -128(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	-72(%rbp,%r15,8), %rdx
	movq	(%r14,%r15,8), %rsi
	movq	0(%r13,%r15,8), %rdi
	movq	-144(%rbp), %rcx
	call	_Z28__device_stub__Z3addPiS_S_S_PiS_S_S_
.L17:
	testq	%r15, %r15
	jne	.L28
	movq	%rbx, %r15
	jmp	.L18
.L28:
	xorl	%edi, %edi
	xorl	%ebx, %ebx
	leaq	.LC0(%rip), %r13
	call	cudaSetDevice@PLT
	movq	-72(%rbp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	$4000, %edx
	call	cudaMemcpy@PLT
	movl	$1, %edi
	call	cudaSetDevice@PLT
	movq	-64(%rbp), %rsi
	movl	$2, %ecx
	leaq	4000(%r12), %rdi
	movl	$4000, %edx
	call	cudaMemcpy@PLT
.L20:
	movl	%ebx, %eax
	movl	$100, %ecx
	cltd
	idivl	%ecx
	testl	%edx, %edx
	jne	.L19
	movq	%r13, %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	(%r12,%rbx,4), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L19:
	incq	%rbx
	cmpq	$2000, %rbx
	jne	.L20
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z3addPiS_S_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z3addPiS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <malloc.h>

using namespace std;
__global__ void add(int* d_a, int* d_b, int* d_c, int* d_limit){
	int tid = threadIdx.x + blockIdx.x*blockDim.x;
	if(tid < 1000){
		d_c[tid] = d_a[tid] + d_b[tid];
	}
}
int main(){
	int size = 2000; // size of an array
	int ngpus = 2;

	/* Device memory pointer for storing array*/
	int *d_a[2], *d_b[2], *d_c[2];
	const int Ns[2] = {size/2, size - size/2};

	/* memory allocation for limit */
	int* h_limit;
	int* d_limit;
	h_limit = (int *)malloc(sizeof(int));
	hipMalloc((void **)&d_limit, sizeof(int));
	
	/* Host memory for storing array */
	int h_a[size];
	int h_b[size];
	for(int i=0;i<size;i++){
		h_a[i] = i+1;
		h_b[i] = i+2;
	}
	/*int* h_c[ngpus];
	for(int dev=0; dev < ngpus; dev++){
		h_c[dev] = (int *)malloc(Ns[dev]*sizeof(int));		
	}*/
	
	int* h_c;
	h_c = (int *)malloc(size*sizeof(int));

	/* allocate memory on gpus */
	for(int dev=0; dev< ngpus ;dev++){
		hipSetDevice(dev);
		hipMalloc((void **)&d_a[dev], Ns[dev]*sizeof(int));
		hipMalloc((void **)&d_b[dev], Ns[dev]*sizeof(int));
		hipMalloc((void **)&d_c[dev], Ns[dev]*sizeof(int));
	}
	
	/* Copy the host array to gpus */
	for(int dev=0,pos=0; dev < ngpus; pos+= Ns[dev], dev++){
		hipSetDevice(dev);
		hipMemcpy(d_a[dev], h_a+pos, Ns[dev]*sizeof(int), hipMemcpyHostToDevice);
		hipMemcpy(d_b[dev], h_b+pos, Ns[dev]*sizeof(int), hipMemcpyHostToDevice);
	}
	
	/* Compute addition */
	for(int dev=0; dev< ngpus; dev++){
		//h_limit[0] = Ns[dev];
		hipSetDevice(dev);
		h_limit[0] = Ns[dev];
		hipMemcpy(d_limit, h_limit, sizeof(int), hipMemcpyHostToDevice);
		add<<<1,Ns[dev]>>>(d_a[dev],d_b[dev], d_c[dev], d_limit);
		/*cudaMemcpy(h_c[dev], d_c[dev], Ns[dev]*sizeof(int), cudaMemcpyDeviceToHost);
		for(int i=0;i<Ns[dev];i++){
			if(i%100 == 0)
				cout<<h_c[dev][i]<<endl;
		}*/
	}
	
	for(int dev=0, pos=0; dev < ngpus; pos += Ns[dev], dev++){
		hipSetDevice(dev);
		hipMemcpy(h_c+pos, d_c[dev], Ns[dev]*sizeof(int), hipMemcpyDeviceToHost);
	}

	/* Print Part */
	for(int i=0;i<size;i++){
		if(i%100 == 0)
			cout<<"h_c["<<i<<"] = "<<h_c[i]<<endl;
	}
}


	.text
	.file	"add_mgpu.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z18__device_stub__addPiS_S_S_  # -- Begin function _Z18__device_stub__addPiS_S_S_
	.type	_Z18__device_stub__addPiS_S_S_,@function
_Z18__device_stub__addPiS_S_S_:         # @_Z18__device_stub__addPiS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3addPiS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z18__device_stub__addPiS_S_S_, .Lfunc_end0-_Z18__device_stub__addPiS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$16088, %rsp                    # imm = 0x3ED8
	.cfi_def_cfa_offset 16144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967297000, %rax            # imm = 0x3E8000003E8
	movq	%rax, (%rsp)
	movl	$4, %edi
	callq	malloc
	movq	%rax, %r14
	leaq	8(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	movq	%rsp, 24(%rsp)                  # 8-byte Spill
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	leaq	1(%rax), %rcx
	movl	%ecx, 8080(%rsp,%rax,4)
	leal	2(%rax), %edx
	movl	%edx, 80(%rsp,%rax,4)
	movq	%rcx, %rax
	cmpq	$2000, %rcx                     # imm = 0x7D0
	jne	.LBB1_1
# %bb.2:
	movl	$8000, %edi                     # imm = 0x1F40
	callq	malloc
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movb	$1, %bpl
	xorl	%r15d, %r15d
.LBB1_3:                                # =>This Inner Loop Header: Depth=1
	movl	%r15d, %edi
	callq	hipSetDevice
	leaq	(%rsp,%r15,8), %rdi
	addq	$64, %rdi
	movslq	(%rsp,%r15,4), %r12
	shlq	$2, %r12
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	(%rsp,%r15,8), %rdi
	addq	$48, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	(%rsp,%r15,8), %rdi
	addq	$32, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$1, %r15d
	xorl	%ebx, %ebx
	testb	$1, %bpl
	movl	$0, %ebp
	jne	.LBB1_3
# %bb.4:                                # %.preheader78.preheader
	movb	$1, %bpl
	xorl	%r15d, %r15d
.LBB1_5:                                # %.preheader78
                                        # =>This Inner Loop Header: Depth=1
	movl	%r15d, %edi
	callq	hipSetDevice
	movq	64(%rsp,%r15,8), %rdi
	movslq	%ebx, %rbx
	leaq	(%rsp,%rbx,4), %rsi
	addq	$8080, %rsi                     # imm = 0x1F90
	movslq	(%rsp,%r15,4), %r13
	movq	%r13, %r12
	shlq	$2, %r12
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	48(%rsp,%r15,8), %rdi
	leaq	(%rsp,%rbx,4), %rsi
	addq	$80, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	addl	%r13d, %ebx
	movl	$1, %r15d
	testb	$1, %bpl
	movl	$0, %ebp
	jne	.LBB1_5
# %bb.6:                                # %.preheader77.preheader
	movb	$1, %bl
	movabsq	$4294967296, %rbp               # imm = 0x100000000
	xorl	%r12d, %r12d
	leaq	1(%rbp), %r15
.LBB1_7:                                # %.preheader77
                                        # =>This Inner Loop Header: Depth=1
	movl	%r12d, %edi
	callq	hipSetDevice
	movl	(%rsp,%r12,4), %r13d
	movl	%r13d, (%r14)
	movq	8(%rsp), %rdi
	movl	$4, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	orq	%rbp, %r13
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.8:                                #   in Loop: Header=BB1_7 Depth=1
	movq	64(%rsp,%r12,8), %rdi
	movq	48(%rsp,%r12,8), %rsi
	movq	32(%rsp,%r12,8), %rdx
	movq	8(%rsp), %rcx
	callq	_Z18__device_stub__addPiS_S_S_
.LBB1_9:                                #   in Loop: Header=BB1_7 Depth=1
	movl	$1, %r12d
	xorl	%r13d, %r13d
	testb	$1, %bl
	movl	$0, %ebx
	jne	.LBB1_7
# %bb.10:                               # %.preheader76.preheader
	movb	$1, %bl
	xorl	%r14d, %r14d
	movq	16(%rsp), %rbp                  # 8-byte Reload
.LBB1_11:                               # %.preheader76
                                        # =>This Inner Loop Header: Depth=1
	movl	%r14d, %edi
	callq	hipSetDevice
	movslq	%r13d, %r13
	leaq	(,%r13,4), %rdi
	addq	%rbp, %rdi
	movq	32(%rsp,%r14,8), %rsi
	movslq	(%rsp,%r14,4), %r14
	movq	%r14, %rdx
	shlq	$2, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	addl	%r14d, %r13d
	movl	$1, %r14d
	testb	$1, %bl
	movl	$0, %ebx
	jne	.LBB1_11
# %bb.12:                               # %.preheader.preheader
	xorl	%r12d, %r12d
	xorl	%r14d, %r14d
.LBB1_13:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movzwl	%r14w, %eax
	shrl	$2, %eax
	imull	$5243, %eax, %eax               # imm = 0x147B
	shrl	$17, %eax
	imull	$100, %eax, %eax
	addw	%r12w, %ax
	jne	.LBB1_15
# %bb.14:                               #   in Loop: Header=BB1_13 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$4, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movl	$.L.str.1, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	(%rbp,%r14,4), %esi
	movq	%r15, %rdi
	callq	_ZNSolsEi
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_15:                               #   in Loop: Header=BB1_13 Depth=1
	incq	%r14
	decl	%r12d
	cmpq	$2000, %r14                     # imm = 0x7D0
	jne	.LBB1_13
# %bb.16:
	movq	24(%rsp), %rsp                  # 8-byte Reload
	xorl	%eax, %eax
	addq	$16088, %rsp                    # imm = 0x3ED8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3addPiS_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z3addPiS_S_S_,@object          # @_Z3addPiS_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z3addPiS_S_S_
	.p2align	3, 0x0
_Z3addPiS_S_S_:
	.quad	_Z18__device_stub__addPiS_S_S_
	.size	_Z3addPiS_S_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"h_c["
	.size	.L.str, 5

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"] = "
	.size	.L.str.1, 5

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3addPiS_S_S_"
	.size	.L__unnamed_1, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__addPiS_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3addPiS_S_S_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3addPiS_S_S_          ; -- Begin function _Z3addPiS_S_S_
	.globl	_Z3addPiS_S_S_
	.p2align	8
	.type	_Z3addPiS_S_S_,@function
_Z3addPiS_S_S_:                         ; @_Z3addPiS_S_S_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x2c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x3e8, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3addPiS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3addPiS_S_S_, .Lfunc_end0-_Z3addPiS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 168
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3addPiS_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3addPiS_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
