#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <math.h>

int iDivUp(const int a, const int b) { return (a % b != 0) ? (a / b + 1) : (a / b); };

__global__ static void KernelRect(unsigned char *imgdst,long *X,long *Y, int imgWidth, int imgHeight)
{
	unsigned long index = threadIdx.x + blockIdx.x * blockDim.x;
	int sum = 0;

	//sommation Y
	if(index < imgHeight)
	{
		for(int i = 0; i < imgWidth;i++)
			sum = sum + imgdst[index * imgWidth + i];
		Y[index] = sum;
	}

	sum = 0;

	//sommation X
	if(index < imgWidth)
	{
		for(int i = 0; i < imgHeight; i++)
			sum = sum + imgdst[index + imgWidth * i];
		X[index] = sum;
	}
}

__global__ static void KernelSobel(unsigned char *imgscr,unsigned char *imgscr2, unsigned char *imgdst,int imgWidth,int imgHeight,unsigned char K)
{
	unsigned long index;
	unsigned char pValue;

	index = threadIdx.x + blockIdx.x * blockDim.x;
	pValue = abs(imgscr[index] - imgscr2[index]);
	
	if(pValue < K)
		imgdst[index] = 0;
	else
		imgdst[index] =255;
	
}

extern "C" void Mykernelfunc(unsigned char *c_imgsrc, unsigned char *c_imgsrc2, unsigned char *c_imgdst, long *X, long *Y, int imageWidth, int imageHeight, unsigned long imagesize, unsigned char K)
{
	float tempsex = 0;
	
	// Defining gpu variables
	unsigned char *gpu_imgsrc = 0;
	unsigned char *gpu_imgsrc2 = 0;
	unsigned char *gpu_imgdst = 0;
	long *gpu_X = 0;
	long *gpu_Y = 0;

	// Defining size of memory allocations
	dim3 dimBlock = 16;
	dim3 dimGrid = imagesize / dimBlock.x;
	dim3 dimGridsum = 0;

	// Grabbing the highest value of both imageheight and imagewidth
	if(imageHeight > imageWidth)
		dimGridsum = iDivUp(imageHeight, dimBlock.x);
	else
		dimGridsum = iDivUp(imageWidth, dimBlock.x);

	// Finding the memory size of the image
	size_t memsize = imagesize * sizeof(unsigned char);

	//Allocating memory
	cudaMalloc((void**)&gpu_imgsrc, memsize);
	cudaMemcpy(gpu_imgsrc, c_imgsrc, memsize, cudaMemcpyHostToDevice);
	cudaMalloc((void**)&gpu_imgsrc2, memsize);
	cudaMemcpy(gpu_imgsrc2, c_imgsrc2, memsize, cudaMemcpyHostToDevice);
	cudaMalloc((void**)&gpu_imgdst, memsize);
	cudaMalloc((void**)&gpu_X,imageWidth * sizeof(long));
	cudaMemcpy(gpu_X, X, imageWidth * sizeof(long), cudaMemcpyHostToDevice);
	cudaMalloc((void**)&gpu_Y,imageHeight * sizeof(long));
	cudaMemcpy(gpu_Y, Y, imageHeight * sizeof(long), cudaMemcpyHostToDevice);
	
	// Launching kernel functions
	KernelSobel<<<dimGrid.x, dimBlock.x>>>(gpu_imgsrc, gpu_imgsrc2, gpu_imgdst, imageWidth, imageHeight, K);
	cudaThreadSynchronize();

	KernelRect<<<dimGridsum.x,dimBlock.x>>>(gpu_imgdst, gpu_X, gpu_Y, imageWidth, imageHeight);
	cudaThreadSynchronize();

	// Grabbing data from gpu variables
	cudaMemcpy(c_imgdst,gpu_imgdst, memsize, cudaMemcpyDeviceToHost);
	cudaMemcpy(X,gpu_X,imageWidth * sizeof(long), cudaMemcpyDeviceToHost);
	cudaMemcpy(Y,gpu_Y,imageHeight * sizeof(long), cudaMemcpyDeviceToHost);

	// Freeing memory
	cudaFree(gpu_imgdst);
	cudaFree(gpu_imgsrc);
	cudaFree(gpu_imgsrc2);
	cudaFree(gpu_X);
	cudaFree(gpu_Y);
}

	.file	"tmpxft_00317dfb_00000000-6_Kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2012:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2012:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL38__device_stub__Z11KernelSobelPhS_S_iihPhS_S_iih, @function
_ZL38__device_stub__Z11KernelSobelPhS_S_iihPhS_S_iih:
.LFB2036:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movb	%r9b, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_ZL11KernelSobelPhS_S_iih(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	_ZL38__device_stub__Z11KernelSobelPhS_S_iihPhS_S_iih, .-_ZL38__device_stub__Z11KernelSobelPhS_S_iihPhS_S_iih
	.type	_ZL11KernelSobelPhS_S_iih, @function
_ZL11KernelSobelPhS_S_iih:
.LFB2037:
	.cfi_startproc
	endbr64
	movzbl	%r9b, %r9d
	jmp	_ZL38__device_stub__Z11KernelSobelPhS_S_iihPhS_S_iih
	.cfi_endproc
.LFE2037:
	.size	_ZL11KernelSobelPhS_S_iih, .-_ZL11KernelSobelPhS_S_iih
	.type	_ZL37__device_stub__Z10KernelRectPhPlS0_iiPhPlS0_ii, @function
_ZL37__device_stub__Z10KernelRectPhPlS0_iiPhPlS0_ii:
.LFB2034:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_ZL10KernelRectPhPlS0_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_ZL37__device_stub__Z10KernelRectPhPlS0_iiPhPlS0_ii, .-_ZL37__device_stub__Z10KernelRectPhPlS0_iiPhPlS0_ii
	.type	_ZL10KernelRectPhPlS0_ii, @function
_ZL10KernelRectPhPlS0_ii:
.LFB2035:
	.cfi_startproc
	endbr64
	jmp	_ZL37__device_stub__Z10KernelRectPhPlS0_iiPhPlS0_ii
	.cfi_endproc
.LFE2035:
	.size	_ZL10KernelRectPhPlS0_ii, .-_ZL10KernelRectPhPlS0_ii
	.globl	_Z6iDivUpii
	.type	_Z6iDivUpii, @function
_Z6iDivUpii:
.LFB2008:
	.cfi_startproc
	endbr64
	movl	%edi, %eax
	cltd
	idivl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	ret
	.cfi_endproc
.LFE2008:
	.size	_Z6iDivUpii, .-_Z6iDivUpii
	.globl	Mykernelfunc
	.type	Mykernelfunc, @function
Mykernelfunc:
.LFB2009:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	movl	%r9d, %edi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	movl	$16, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%r9d, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdx, 24(%rsp)
	movq	184(%rsp), %r14
	movq	%rcx, 8(%rsp)
	movl	192(%rsp), %r15d
	movq	%r8, 16(%rsp)
	shrq	$4, %r14
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	movq	%rax, 40(%rsp)
	movq	%rax, 48(%rsp)
	movq	%rax, 56(%rsp)
	movq	%rax, 64(%rsp)
	movq	%rax, 72(%rsp)
	cmpl	%r9d, 176(%rsp)
	jle	.L24
	movl	176(%rsp), %edi
.L24:
	call	_Z6iDivUpii
	movq	184(%rsp), %rsi
	leaq	40(%rsp), %rdi
	movl	%eax, %ebp
	call	cudaMalloc@PLT
	movq	184(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	184(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	184(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	184(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movslq	%ebx, %rax
	leaq	64(%rsp), %rdi
	leaq	0(,%rax,8), %r12
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	movq	64(%rsp), %rdi
	movq	%r12, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movslq	176(%rsp), %rax
	leaq	72(%rsp), %rdi
	leaq	0(,%rax,8), %r13
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rsi
	movq	72(%rsp), %rdi
	movq	%r13, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r14d, 80(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	$268435457, %edx
	movl	$1, %ecx
	movl	$1, 100(%rsp)
	movq	%rax, 84(%rsp)
	movq	80(%rsp), %rdi
	salq	$4, %rdx
	movl	88(%rsp), %esi
	movq	%rdx, 92(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movzbl	%r15b, %r9d
	movl	%ebx, %ecx
	movl	176(%rsp), %r8d
	movq	40(%rsp), %rdi
	call	_ZL38__device_stub__Z11KernelSobelPhS_S_iihPhS_S_iih
.L20:
	call	cudaThreadSynchronize@PLT
	movl	%ebp, 80(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	$268435457, %edx
	movl	$1, %ecx
	movl	$1, 100(%rsp)
	movq	%rax, 84(%rsp)
	movq	80(%rsp), %rdi
	salq	$4, %rdx
	movl	88(%rsp), %esi
	movq	%rdx, 92(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movl	176(%rsp), %r8d
	movq	72(%rsp), %rdx
	movl	%ebx, %ecx
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_ZL37__device_stub__Z10KernelRectPhPlS0_iiPhPlS0_ii
.L21:
	call	cudaThreadSynchronize@PLT
	movq	56(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$2, %ecx
	movq	184(%rsp), %rdx
	call	cudaMemcpy@PLT
	movq	64(%rsp), %rsi
	movq	8(%rsp), %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rsi
	movq	16(%rsp), %rdi
	movq	%r13, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2009:
	.size	Mykernelfunc, .-Mykernelfunc
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z11KernelSobelPhS_S_iih"
.LC1:
	.string	"_Z10KernelRectPhPlS0_ii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2039:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_ZL11KernelSobelPhS_S_iih(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_ZL10KernelRectPhPlS0_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2039:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include "hip/hip_runtime.h"

#include <math.h>

int iDivUp(const int a, const int b) { return (a % b != 0) ? (a / b + 1) : (a / b); };

__global__ static void KernelRect(unsigned char *imgdst,long *X,long *Y, int imgWidth, int imgHeight)
{
	unsigned long index = threadIdx.x + blockIdx.x * blockDim.x;
	int sum = 0;

	//sommation Y
	if(index < imgHeight)
	{
		for(int i = 0; i < imgWidth;i++)
			sum = sum + imgdst[index * imgWidth + i];
		Y[index] = sum;
	}

	sum = 0;

	//sommation X
	if(index < imgWidth)
	{
		for(int i = 0; i < imgHeight; i++)
			sum = sum + imgdst[index + imgWidth * i];
		X[index] = sum;
	}
}

__global__ static void KernelSobel(unsigned char *imgscr,unsigned char *imgscr2, unsigned char *imgdst,int imgWidth,int imgHeight,unsigned char K)
{
	unsigned long index;
	unsigned char pValue;

	index = threadIdx.x + blockIdx.x * blockDim.x;
	pValue = abs(imgscr[index] - imgscr2[index]);
	
	if(pValue < K)
		imgdst[index] = 0;
	else
		imgdst[index] =255;
	
}

extern "C" void Mykernelfunc(unsigned char *c_imgsrc, unsigned char *c_imgsrc2, unsigned char *c_imgdst, long *X, long *Y, int imageWidth, int imageHeight, unsigned long imagesize, unsigned char K)
{
	float tempsex = 0;
	
	// Defining gpu variables
	unsigned char *gpu_imgsrc = 0;
	unsigned char *gpu_imgsrc2 = 0;
	unsigned char *gpu_imgdst = 0;
	long *gpu_X = 0;
	long *gpu_Y = 0;

	// Defining size of memory allocations
	dim3 dimBlock = 16;
	dim3 dimGrid = imagesize / dimBlock.x;
	dim3 dimGridsum = 0;

	// Grabbing the highest value of both imageheight and imagewidth
	if(imageHeight > imageWidth)
		dimGridsum = iDivUp(imageHeight, dimBlock.x);
	else
		dimGridsum = iDivUp(imageWidth, dimBlock.x);

	// Finding the memory size of the image
	size_t memsize = imagesize * sizeof(unsigned char);

	//Allocating memory
	hipMalloc((void**)&gpu_imgsrc, memsize);
	hipMemcpy(gpu_imgsrc, c_imgsrc, memsize, hipMemcpyHostToDevice);
	hipMalloc((void**)&gpu_imgsrc2, memsize);
	hipMemcpy(gpu_imgsrc2, c_imgsrc2, memsize, hipMemcpyHostToDevice);
	hipMalloc((void**)&gpu_imgdst, memsize);
	hipMalloc((void**)&gpu_X,imageWidth * sizeof(long));
	hipMemcpy(gpu_X, X, imageWidth * sizeof(long), hipMemcpyHostToDevice);
	hipMalloc((void**)&gpu_Y,imageHeight * sizeof(long));
	hipMemcpy(gpu_Y, Y, imageHeight * sizeof(long), hipMemcpyHostToDevice);
	
	// Launching kernel functions
	KernelSobel<<<dimGrid.x, dimBlock.x>>>(gpu_imgsrc, gpu_imgsrc2, gpu_imgdst, imageWidth, imageHeight, K);
	hipDeviceSynchronize();

	KernelRect<<<dimGridsum.x,dimBlock.x>>>(gpu_imgdst, gpu_X, gpu_Y, imageWidth, imageHeight);
	hipDeviceSynchronize();

	// Grabbing data from gpu variables
	hipMemcpy(c_imgdst,gpu_imgdst, memsize, hipMemcpyDeviceToHost);
	hipMemcpy(X,gpu_X,imageWidth * sizeof(long), hipMemcpyDeviceToHost);
	hipMemcpy(Y,gpu_Y,imageHeight * sizeof(long), hipMemcpyDeviceToHost);

	// Freeing memory
	hipFree(gpu_imgdst);
	hipFree(gpu_imgsrc);
	hipFree(gpu_imgsrc2);
	hipFree(gpu_X);
	hipFree(gpu_Y);
}

	.text
	.file	"Kernel.hip"
	.globl	_Z6iDivUpii                     # -- Begin function _Z6iDivUpii
	.type	_Z6iDivUpii,@function
_Z6iDivUpii:                            # @_Z6iDivUpii
	.cfi_startproc
# %bb.0:
	movl	%edi, %eax
	cltd
	idivl	%esi
	cmpl	$1, %edx
	sbbl	$-1, %eax
	retq
.Lfunc_end0:
	.size	_Z6iDivUpii, .Lfunc_end0-_Z6iDivUpii
	.cfi_endproc
                                        # -- End function
	.globl	Mykernelfunc                    # -- Begin function Mykernelfunc
	.type	Mykernelfunc,@function
Mykernelfunc:                           # @Mykernelfunc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %r15d
	movq	%r8, 48(%rsp)                   # 8-byte Spill
	movq	%rcx, 56(%rsp)                  # 8-byte Spill
	movq	%rdx, 80(%rsp)                  # 8-byte Spill
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	movslq	144(%rsp), %r13
	movq	152(%rsp), %r14
	xorl	%eax, %eax
	leaq	64(%rsp), %r12
	movq	%rax, (%r12)
	leaq	40(%rsp), %rcx
	movq	%rax, (%rcx)
	movq	%rsp, %rcx
	movq	%rax, (%rcx)
	leaq	32(%rsp), %rcx
	movq	%rax, (%rcx)
	movq	%r14, %rcx
	shrq	$4, %rcx
	movq	%rcx, 72(%rsp)                  # 8-byte Spill
	cmpl	%r9d, %r13d
	movl	%r9d, %ecx
	cmovgl	%r13d, %ecx
	leaq	24(%rsp), %rdx
	movq	%rax, (%rdx)
	movl	%ecx, %eax
	andl	$15, %eax
	testl	%ecx, %ecx
	leal	15(%rcx), %ebp
	cmovnsl	%ecx, %ebp
	sarl	$4, %ebp
	cmpl	$1, %eax
	sbbl	$-1, %ebp
	movabsq	$4294967296, %rbx               # imm = 0x100000000
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	8(%rsp), %rsi                   # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	40(%rsp), %r12
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rsp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	%r15d, 8(%rsp)                  # 4-byte Spill
	movslq	%r15d, %r15
	shlq	$3, %r15
	leaq	32(%rsp), %r14
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%r14), %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r13, 16(%rsp)                  # 8-byte Spill
	shlq	$3, %r13
	leaq	24(%rsp), %r14
	movq	%r14, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	(%r14), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	72(%rsp), %edi                  # 4-byte Reload
	btsq	$32, %rdi
	leaq	16(%rbx), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	64(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	(%rsp), %rdx
	movzbl	160(%rsp), %r9d
	movl	8(%rsp), %ecx                   # 4-byte Reload
	movq	16(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	callq	_ZL26__device_stub__KernelSobelPhS_S_iih
.LBB1_2:
	callq	hipDeviceSynchronize
	movl	%ebp, %edi
	orq	%rbx, %rdi
	addq	$16, %rbx
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	8(%rsp), %ecx                   # 4-byte Reload
	movq	16(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	callq	_ZL25__device_stub__KernelRectPhPlS0_ii
.LBB1_4:
	callq	hipDeviceSynchronize
	movq	(%rsp), %rsi
	movq	80(%rsp), %rdi                  # 8-byte Reload
	movq	152(%rsp), %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rsi
	movq	56(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	Mykernelfunc, .Lfunc_end1-Mykernelfunc
	.cfi_endproc
                                        # -- End function
	.type	_ZL26__device_stub__KernelSobelPhS_S_iih,@function # -- Begin function _ZL26__device_stub__KernelSobelPhS_S_iih
_ZL26__device_stub__KernelSobelPhS_S_iih: # @_ZL26__device_stub__KernelSobelPhS_S_iih
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	15(%rsp), %r8
	movb	%r9b, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZL11KernelSobelPhS_S_iih, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_ZL26__device_stub__KernelSobelPhS_S_iih, .Lfunc_end2-_ZL26__device_stub__KernelSobelPhS_S_iih
	.cfi_endproc
                                        # -- End function
	.type	_ZL25__device_stub__KernelRectPhPlS0_ii,@function # -- Begin function _ZL25__device_stub__KernelRectPhPlS0_ii
_ZL25__device_stub__KernelRectPhPlS0_ii: # @_ZL25__device_stub__KernelRectPhPlS0_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_ZL10KernelRectPhPlS0_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_ZL25__device_stub__KernelRectPhPlS0_ii, .Lfunc_end3-_ZL25__device_stub__KernelRectPhPlS0_ii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZL11KernelSobelPhS_S_iih, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_ZL10KernelRectPhPlS0_ii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_ZL11KernelSobelPhS_S_iih,@object # @_ZL11KernelSobelPhS_S_iih
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
_ZL11KernelSobelPhS_S_iih:
	.quad	_ZL26__device_stub__KernelSobelPhS_S_iih
	.size	_ZL11KernelSobelPhS_S_iih, 8

	.type	_ZL10KernelRectPhPlS0_ii,@object # @_ZL10KernelRectPhPlS0_ii
	.p2align	3, 0x0
_ZL10KernelRectPhPlS0_ii:
	.quad	_ZL25__device_stub__KernelRectPhPlS0_ii
	.size	_ZL10KernelRectPhPlS0_ii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_ZL11KernelSobelPhS_S_iih"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_ZL10KernelRectPhPlS0_ii"
	.size	.L__unnamed_2, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _ZL26__device_stub__KernelSobelPhS_S_iih
	.addrsig_sym _ZL25__device_stub__KernelRectPhPlS0_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZL11KernelSobelPhS_S_iih
	.addrsig_sym _ZL10KernelRectPhPlS0_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._ZL10KernelRectPhPlS0_ii,"axG",@progbits,_ZL10KernelRectPhPlS0_ii,comdat
	.globl	_ZL10KernelRectPhPlS0_ii        ; -- Begin function _ZL10KernelRectPhPlS0_ii
	.p2align	8
	.type	_ZL10KernelRectPhPlS0_ii,@function
_ZL10KernelRectPhPlS0_ii:               ; @_ZL10KernelRectPhPlS0_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x2c
	s_load_b256 s[0:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s8, 0xffff
	s_ashr_i32 s9, s7, 31
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	v_mov_b32_e32 v2, 0
	s_mov_b32 s8, s7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_u64_e32 vcc_lo, s[8:9], v[1:2]
	s_and_saveexec_b32 s8, vcc_lo
	s_cbranch_execz .LBB0_7
; %bb.1:                                ; %.preheader33
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB0_5
; %bb.2:                                ; %.lr.ph
	v_mad_u64_u32 v[4:5], null, v1, s6, s[0:1]
	v_mov_b32_e32 v3, 0
	s_mov_b32 s9, s6
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	global_load_u8 v0, v[4:5], off
	v_add_co_u32 v4, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_add_i32 s9, s9, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s9, 0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v3, v0
	s_cbranch_scc0 .LBB0_3
; %bb.4:                                ; %._crit_edge.loopexit
	v_mov_b32_e32 v4, 0
	s_branch .LBB0_6
.LBB0_5:
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
.LBB0_6:                                ; %._crit_edge
	v_lshlrev_b64 v[5:6], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_store_b64 v[5:6], v[3:4], off
.LBB0_7:                                ; %Flow69
	s_or_b32 exec_lo, exec_lo, s8
	s_ashr_i32 s5, s6, 31
	s_mov_b32 s4, s6
	s_mov_b32 s6, exec_lo
	v_cmpx_gt_u64_e64 s[4:5], v[1:2]
	s_cbranch_execz .LBB0_14
; %bb.8:                                ; %.preheader
	s_cmp_lt_i32 s7, 1
	s_cbranch_scc1 .LBB0_12
; %bb.9:                                ; %.lr.ph38
	v_add_co_u32 v4, s0, s0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, null, s1, 0, s0
	v_mov_b32_e32 v3, 0
.LBB0_10:                               ; =>This Inner Loop Header: Depth=1
	global_load_u8 v0, v[4:5], off
	v_add_co_u32 v4, vcc_lo, v4, s4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	s_add_i32 s7, s7, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s7, 0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v3, v0
	s_cbranch_scc0 .LBB0_10
; %bb.11:                               ; %._crit_edge39.loopexit
	v_mov_b32_e32 v4, 0
	s_branch .LBB0_13
.LBB0_12:
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
.LBB0_13:                               ; %Flow
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b64 v[0:1], v[3:4], off
.LBB0_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZL10KernelRectPhPlS0_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZL10KernelRectPhPlS0_ii,"axG",@progbits,_ZL10KernelRectPhPlS0_ii,comdat
.Lfunc_end0:
	.size	_ZL10KernelRectPhPlS0_ii, .Lfunc_end0-_ZL10KernelRectPhPlS0_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 348
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._ZL11KernelSobelPhS_S_iih,"axG",@progbits,_ZL11KernelSobelPhS_S_iih,comdat
	.globl	_ZL11KernelSobelPhS_S_iih       ; -- Begin function _ZL11KernelSobelPhS_S_iih
	.p2align	8
	.type	_ZL11KernelSobelPhS_S_iih,@function
_ZL11KernelSobelPhS_S_iih:              ; @_ZL11KernelSobelPhS_S_iih
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b32 s0, s[0:1], 0x20
	s_clause 0x1
	global_load_u8 v0, v1, s[4:5]
	global_load_u8 v2, v1, s[6:7]
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xff
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, 0, v0
	v_max_i32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_le_u32_e32 vcc_lo, s0, v0
	v_cndmask_b32_e64 v0, 0, -1, vcc_lo
	global_store_b8 v1, v0, s[2:3]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _ZL11KernelSobelPhS_S_iih
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._ZL11KernelSobelPhS_S_iih,"axG",@progbits,_ZL11KernelSobelPhS_S_iih,comdat
.Lfunc_end1:
	.size	_ZL11KernelSobelPhS_S_iih, .Lfunc_end1-_ZL11KernelSobelPhS_S_iih
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _ZL10KernelRectPhPlS0_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _ZL10KernelRectPhPlS0_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           1
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _ZL11KernelSobelPhS_S_iih
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _ZL11KernelSobelPhS_S_iih.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
