#include <iostream>
#include <cuda.h>
#include <chrono>
#include <stdlib.h>
#include <ctime>
#include <cmath>
#include <limits>

#define BLOCK_SIZE 1024

__global__ void gpu_transposition(double *a, double *b, int m, int n) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < m * n) {
        b[(idx / n) + (idx % n)*m] = a[idx];
    }
}

void cpu_transposition(double *a, double *b, int m, int n)
{
    for (int i = 0; i < m; ++i)
    {
        for (int j = 0; j < n; ++j)
        {
            b[j * m + i] = a[i * n + j];
        }
    }
}

void print_matrix(double *a, int m, int n) {
    for (int i = 0; i < n; ++i)
    {
        for (int j = 0; j < m; ++j)
        {
            std::cout << a[i * m + j] << " ";
        }
        std::cout << std::endl;
    }
    std::cout << std::endl;
}
int main(int argc, char const **argv)
{
    int m, n;
    srand(3333);
    m = atoi(argv[1]);
    n = atoi(argv[2]);

    size_t bytes = m * n * sizeof(double);
    

    double *h_a, *h_b, *h_c;
    h_a = (double *) malloc(bytes);
    h_b = (double *) malloc(bytes);
    h_c = (double *) malloc(bytes);


    // random initialize matrix
    for (int i = 0; i < m; ++i)
    {
        for (int j = 0; j < n; ++j)
        {
            h_a[i * n + j] = (double)(rand()%1024); //для наглядности
        }
    }
    // print_matrix(h_a, n, m);

    double *d_a, *d_b;
    cudaMalloc(&d_a, bytes);
    cudaMalloc(&d_b, bytes);
    cudaMemcpy(d_a, h_a, bytes, cudaMemcpyHostToDevice);

    int gridSize;
    gridSize = (m * n - 1) / BLOCK_SIZE + 1;
    
    float gpu_elapsed_time, cpu_elapsed_time;
    

    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);
    // start the GPU version
    cudaEventRecord(start, 0);
    
    gpu_transposition<<<gridSize, BLOCK_SIZE>>>(d_a, d_b, m, n);

    cudaDeviceSynchronize();
    cudaEventRecord(stop, 0);
    cudaEventSynchronize(stop);
      
    //time elapse on GPU
    cudaEventElapsedTime(&gpu_elapsed_time, start, stop);
    printf("Time elapsed on matrix transposition of %dx%d on GPU: %f ms.\n\n", m, n, gpu_elapsed_time);
    cudaMemcpy(h_b, d_b, bytes, cudaMemcpyDeviceToHost);
    // print_matrix(h_b, m, n);
    // start the CPU version
    cudaEventRecord(start, 0);
    
    cpu_transposition(h_a, h_c, m, n);
    
    cudaEventRecord(stop, 0);
    cudaEventSynchronize(stop);
    cudaEventElapsedTime(&cpu_elapsed_time, start, stop);
    printf("Time elapsed on matrix transposition of %dx%d on CPU: %f ms.\n\n", m, n, cpu_elapsed_time);
    // print_matrix(h_c, m, n);
    // validate results computed by GPU
    int all_ok = 1;
    for (int i = 0; i < n; ++i)
    {
        for (int j = 0; j < m; ++j)
        {
            if(h_b[i*m + j] != h_c[i*m + j])
            {
                all_ok = 0;
            }
        }
    }
    
    // roughly compute speedup
    if(all_ok)
    {
        printf("all results are correct!!!, speedup = %f\n", cpu_elapsed_time / gpu_elapsed_time);
    }
    else
    {
        printf("incorrect results\n");
    }
    
    // free memory
    free(h_a);
    free(h_b);
    free(h_c);
    cudaFree(d_a);
    cudaFree(d_b);
    
    return 0;
}

	.file	"tmpxft_00228757_00000000-6_main.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3739:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3739:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z17cpu_transpositionPdS_ii
	.type	_Z17cpu_transpositionPdS_ii, @function
_Z17cpu_transpositionPdS_ii:
.LFB3734:
	.cfi_startproc
	endbr64
	movslq	%edx, %r11
	xorl	%r10d, %r10d
	movq	%rdi, %r8
	xorl	%r9d, %r9d
	salq	$3, %r11
	cmpl	%edx, %r10d
	jl	.L11
	ret
.L11:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
.L9:
	movslq	%r9d, %rax
	movq	%rsi, %rdi
	leaq	(%r8,%rax,8), %rbx
	xorl	%eax, %eax
.L6:
	cmpl	%eax, %ecx
	jle	.L13
	movsd	(%rbx,%rax,8), %xmm0
	incq	%rax
	movsd	%xmm0, (%rdi)
	addq	%r11, %rdi
	jmp	.L6
.L13:
	incl	%r10d
	addq	$8, %rsi
	addl	%ecx, %r9d
	cmpl	%edx, %r10d
	jl	.L9
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3734:
	.size	_Z17cpu_transpositionPdS_ii, .-_Z17cpu_transpositionPdS_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	" "
	.text
	.globl	_Z12print_matrixPdii
	.type	_Z12print_matrixPdii, @function
_Z12print_matrixPdii:
.LFB3735:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L15:
	cmpl	%r14d, %r13d
	jge	.L17
	movslq	%r12d, %rax
	xorl	%r15d, %r15d
	leaq	0(%rbp,%rax,8), %r8
.L18:
	cmpl	%r15d, %ebx
	jle	.L20
	movsd	(%r8,%r15,8), %xmm0
	leaq	_ZSt4cout(%rip), %rdi
	movq	%r8, 8(%rsp)
	incq	%r15
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movl	$1, %edx
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	movq	8(%rsp), %r8
	jmp	.L18
.L20:
	leaq	_ZSt4cout(%rip), %rdi
	incl	%r13d
	addl	%ebx, %r12d
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	jmp	.L15
.L17:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	leaq	_ZSt4cout(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	.cfi_endproc
.LFE3735:
	.size	_Z12print_matrixPdii, .-_Z12print_matrixPdii
	.globl	_Z41__device_stub__Z17gpu_transpositionPdS_iiPdS_ii
	.type	_Z41__device_stub__Z17gpu_transpositionPdS_iiPdS_ii, @function
_Z41__device_stub__Z17gpu_transpositionPdS_iiPdS_ii:
.LFB3761:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z17gpu_transpositionPdS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L21:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3761:
	.size	_Z41__device_stub__Z17gpu_transpositionPdS_iiPdS_ii, .-_Z41__device_stub__Z17gpu_transpositionPdS_iiPdS_ii
	.globl	_Z17gpu_transpositionPdS_ii
	.type	_Z17gpu_transpositionPdS_ii, @function
_Z17gpu_transpositionPdS_ii:
.LFB3762:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z17gpu_transpositionPdS_iiPdS_ii
	.cfi_endproc
.LFE3762:
	.size	_Z17gpu_transpositionPdS_ii, .-_Z17gpu_transpositionPdS_ii
	.section	.rodata.str1.1
.LC1:
	.string	"Time elapsed on matrix transposition of %dx%d on GPU: %f ms.\n\n"
.LC2:
	.string	"Time elapsed on matrix transposition of %dx%d on CPU: %f ms.\n\n"
.LC3:
	.string	"all results are correct!!!, speedup = %f\n"
.LC4:
	.string	"incorrect results\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3736:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$3333, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	srand@PLT
	movq	8(%rbp), %rdi
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	movl	%ebx, %r12d
	imull	%eax, %r12d
	movl	%eax, %ebp
	movslq	%r12d, %rax
	salq	$3, %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %r15
	call	malloc@PLT
	xorl	%esi, %esi
	xorl	%edi, %edi
	movq	%rax, %r14
.L27:
	cmpl	%ebx, %edi
	jge	.L29
	movslq	%esi, %rax
	xorl	%ecx, %ecx
	leaq	0(%r13,%rax,8), %r8
.L30:
	cmpl	%ecx, %ebp
	jle	.L43
	movl	%esi, 28(%rsp)
	movq	%r8, 16(%rsp)
	movq	%rcx, 8(%rsp)
	movl	%edi, 24(%rsp)
	call	rand@PLT
	movl	$1024, %ecx
	movq	16(%rsp), %r8
	movl	28(%rsp), %esi
	cltd
	movl	24(%rsp), %edi
	idivl	%ecx
	movq	8(%rsp), %rcx
	cvtsi2sdl	%edx, %xmm0
	movsd	%xmm0, (%r8,%rcx,8)
	incq	%rcx
	jmp	.L30
.L43:
	incl	%edi
	addl	%ebp, %esi
	jmp	.L27
.L29:
	movq	(%rsp), %rsi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdx
	movq	32(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	leal	-1(%r12), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1024, %esi
	cltd
	movl	$4194305, %ecx
	movl	$1, 84(%rsp)
	idivl	%esi
	salq	$10, %rcx
	movq	%rcx, 76(%rsp)
	movq	%rcx, %rdx
	movl	$1, %ecx
	incl	%eax
	movl	%eax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 68(%rsp)
	movq	64(%rsp), %rdi
	movl	72(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	%ebp, %ecx
	movl	%ebx, %edx
	call	_Z41__device_stub__Z17gpu_transpositionPdS_iiPdS_ii
.L31:
	call	cudaDeviceSynchronize@PLT
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	64(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movl	%ebp, %ecx
	movl	%ebx, %edx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	64(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	%r15, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%ebp, %ecx
	movl	%ebx, %edx
	movq	%r14, %rsi
	movq	%r13, %rdi
	call	_Z17cpu_transpositionPdS_ii
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	76(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movl	%ebp, %ecx
	leaq	.LC2(%rip), %rsi
	movl	%ebx, %edx
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	76(%rsp), %xmm0
	call	__printf_chk@PLT
	xorl	%ecx, %ecx
	xorl	%esi, %esi
	movl	$1, %edi
.L32:
	cmpl	%ebp, %esi
	jge	.L36
	movslq	%ecx, %rax
	xorl	%edx, %edx
	salq	$3, %rax
.L37:
	cmpl	%ebx, %edx
	jge	.L44
	movsd	(%r15,%rax), %xmm0
	ucomisd	(%r14,%rax), %xmm0
	jp	.L41
	je	.L33
.L41:
	xorl	%edi, %edi
.L33:
	incl	%edx
	addq	$8, %rax
	jmp	.L37
.L44:
	incl	%esi
	addl	%ebx, %ecx
	jmp	.L32
.L36:
	testl	%edi, %edi
	je	.L38
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	76(%rsp), %xmm0
	divss	64(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	jmp	.L39
.L38:
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L39:
	movq	%r13, %rdi
	call	free@PLT
	movq	%r15, %rdi
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L40
	call	__stack_chk_fail@PLT
.L40:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3736:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z17gpu_transpositionPdS_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3764:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z17gpu_transpositionPdS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3764:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <chrono>
#include <stdlib.h>
#include <ctime>
#include <cmath>
#include <limits>

#define BLOCK_SIZE 1024

__global__ void gpu_transposition(double *a, double *b, int m, int n) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < m * n) {
        b[(idx / n) + (idx % n)*m] = a[idx];
    }
}

void cpu_transposition(double *a, double *b, int m, int n)
{
    for (int i = 0; i < m; ++i)
    {
        for (int j = 0; j < n; ++j)
        {
            b[j * m + i] = a[i * n + j];
        }
    }
}

void print_matrix(double *a, int m, int n) {
    for (int i = 0; i < n; ++i)
    {
        for (int j = 0; j < m; ++j)
        {
            std::cout << a[i * m + j] << " ";
        }
        std::cout << std::endl;
    }
    std::cout << std::endl;
}
int main(int argc, char const **argv)
{
    int m, n;
    srand(3333);
    m = atoi(argv[1]);
    n = atoi(argv[2]);

    size_t bytes = m * n * sizeof(double);
    

    double *h_a, *h_b, *h_c;
    h_a = (double *) malloc(bytes);
    h_b = (double *) malloc(bytes);
    h_c = (double *) malloc(bytes);


    // random initialize matrix
    for (int i = 0; i < m; ++i)
    {
        for (int j = 0; j < n; ++j)
        {
            h_a[i * n + j] = (double)(rand()%1024); //для наглядности
        }
    }
    // print_matrix(h_a, n, m);

    double *d_a, *d_b;
    hipMalloc(&d_a, bytes);
    hipMalloc(&d_b, bytes);
    hipMemcpy(d_a, h_a, bytes, hipMemcpyHostToDevice);

    int gridSize;
    gridSize = (m * n - 1) / BLOCK_SIZE + 1;
    
    float gpu_elapsed_time, cpu_elapsed_time;
    

    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);
    // start the GPU version
    hipEventRecord(start, 0);
    
    gpu_transposition<<<gridSize, BLOCK_SIZE>>>(d_a, d_b, m, n);

    hipDeviceSynchronize();
    hipEventRecord(stop, 0);
    hipEventSynchronize(stop);
      
    //time elapse on GPU
    hipEventElapsedTime(&gpu_elapsed_time, start, stop);
    printf("Time elapsed on matrix transposition of %dx%d on GPU: %f ms.\n\n", m, n, gpu_elapsed_time);
    hipMemcpy(h_b, d_b, bytes, hipMemcpyDeviceToHost);
    // print_matrix(h_b, m, n);
    // start the CPU version
    hipEventRecord(start, 0);
    
    cpu_transposition(h_a, h_c, m, n);
    
    hipEventRecord(stop, 0);
    hipEventSynchronize(stop);
    hipEventElapsedTime(&cpu_elapsed_time, start, stop);
    printf("Time elapsed on matrix transposition of %dx%d on CPU: %f ms.\n\n", m, n, cpu_elapsed_time);
    // print_matrix(h_c, m, n);
    // validate results computed by GPU
    int all_ok = 1;
    for (int i = 0; i < n; ++i)
    {
        for (int j = 0; j < m; ++j)
        {
            if(h_b[i*m + j] != h_c[i*m + j])
            {
                all_ok = 0;
            }
        }
    }
    
    // roughly compute speedup
    if(all_ok)
    {
        printf("all results are correct!!!, speedup = %f\n", cpu_elapsed_time / gpu_elapsed_time);
    }
    else
    {
        printf("incorrect results\n");
    }
    
    // free memory
    free(h_a);
    free(h_b);
    free(h_c);
    hipFree(d_a);
    hipFree(d_b);
    
    return 0;
}

	.text
	.file	"main.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z32__device_stub__gpu_transpositionPdS_ii # -- Begin function _Z32__device_stub__gpu_transpositionPdS_ii
	.type	_Z32__device_stub__gpu_transpositionPdS_ii,@function
_Z32__device_stub__gpu_transpositionPdS_ii: # @_Z32__device_stub__gpu_transpositionPdS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17gpu_transpositionPdS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z32__device_stub__gpu_transpositionPdS_ii, .Lfunc_end0-_Z32__device_stub__gpu_transpositionPdS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z17cpu_transpositionPdS_ii     # -- Begin function _Z17cpu_transpositionPdS_ii
	.type	_Z17cpu_transpositionPdS_ii,@function
_Z17cpu_transpositionPdS_ii:            # @_Z17cpu_transpositionPdS_ii
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB1_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%edx, %eax
	movl	%ecx, %edx
	leaq	(,%rax,8), %r8
	xorl	%r9d, %r9d
	xorl	%r10d, %r10d
.LBB1_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	testl	%ecx, %ecx
	jle	.LBB1_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	%r9d, %r11d
	leaq	(%rdi,%r11,8), %r11
	movq	%rsi, %rbx
	xorl	%r14d, %r14d
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%r11,%r14,8), %xmm0            # xmm0 = mem[0],zero
	movsd	%xmm0, (%rbx)
	incq	%r14
	addq	%r8, %rbx
	cmpq	%r14, %rdx
	jne	.LBB1_4
.LBB1_5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r10
	addl	%ecx, %r9d
	addq	$8, %rsi
	cmpq	%rax, %r10
	jne	.LBB1_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
.LBB1_7:                                # %._crit_edge18
	retq
.Lfunc_end1:
	.size	_Z17cpu_transpositionPdS_ii, .Lfunc_end1-_Z17cpu_transpositionPdS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z12print_matrixPdii            # -- Begin function _Z12print_matrixPdii
	.type	_Z12print_matrixPdii,@function
_Z12print_matrixPdii:                   # @_Z12print_matrixPdii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	testl	%edx, %edx
	jle	.LBB2_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%esi, %ebx
	movl	%edx, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%esi, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB2_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,8), %r14
	xorl	%r15d, %r15d
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%r14,%r15,8), %xmm0            # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB2_4
.LBB2_5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%rbp
	addl	%ebx, %r13d
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB2_2
.LBB2_6:                                # %._crit_edge13
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_ZNSo5flushEv                   # TAILCALL
.Lfunc_end2:
	.size	_Z12print_matrixPdii, .Lfunc_end2-_Z12print_matrixPdii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	$3333, %edi                     # imm = 0xD05
	callq	srand
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebx
	imull	%ebp, %eax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movslq	%eax, %r14
	shlq	$3, %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	movq	%r14, 64(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	movl	%ebp, %r13d
	movl	%ebx, %r14d
	movl	%ebp, 8(%rsp)                   # 4-byte Spill
	testl	%ebp, %ebp
	movl	%ebx, 12(%rsp)                  # 4-byte Spill
	jle	.LBB3_6
# %bb.1:                                # %.preheader66.lr.ph
	movl	%ebx, %ecx
	xorl	%ebx, %ebx
	xorl	%r15d, %r15d
.LBB3_2:                                # %.preheader66
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	testl	%ecx, %ecx
	jle	.LBB3_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	%ebx, %eax
	movq	32(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,8), %rbp
	xorl	%r12d, %r12d
.LBB3_4:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	1023(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-1024, %ecx                    # imm = 0xFC00
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	%xmm0, (%rbp,%r12,8)
	incq	%r12
	cmpq	%r12, %r14
	jne	.LBB3_4
.LBB3_5:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	incq	%r15
	movl	12(%rsp), %ecx                  # 4-byte Reload
	addl	%ecx, %ebx
	cmpq	%r13, %r15
	jne	.LBB3_2
.LBB3_6:                                # %._crit_edge69
	leaq	72(%rsp), %r15
	movq	%r15, %rdi
	movq	64(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r15), %rdi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	80(%rsp), %rbx                  # 8-byte Reload
	leal	-1(%rbx), %eax
	addl	$1022, %ebx                     # imm = 0x3FE
	testl	%eax, %eax
	cmovnsl	%eax, %ebx
	sarl	$10, %ebx
	incl	%ebx
	leaq	40(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventCreate
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r15), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	btsq	$32, %rbx
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$1024, %rdx                     # imm = 0x400
	movq	%rbx, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_8
# %bb.7:
	movq	72(%rsp), %rdi
	movq	48(%rsp), %rsi
	movl	8(%rsp), %edx                   # 4-byte Reload
	movl	12(%rsp), %ecx                  # 4-byte Reload
	callq	_Z32__device_stub__gpu_transpositionPdS_ii
.LBB3_8:
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rdi
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	callq	hipEventSynchronize
	movq	40(%rsp), %rsi
	movq	16(%rsp), %rdx
	leaq	60(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.1, %edi
	movl	8(%rsp), %ebp                   # 4-byte Reload
	movl	%ebp, %esi
	movl	12(%rsp), %ebx                  # 4-byte Reload
	movl	%ebx, %edx
	movb	$1, %al
	callq	printf
	movq	48(%rsp), %rsi
	movq	96(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdi
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%ebp, %ebp
	movq	88(%rsp), %rbp                  # 8-byte Reload
	movq	32(%rsp), %r9                   # 8-byte Reload
	jle	.LBB3_14
# %bb.9:                                # %.preheader.lr.ph.i
	leaq	(,%r13,8), %rax
	movq	%rbp, %rcx
	xorl	%edx, %edx
.LBB3_10:                               # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_12 Depth 2
	testl	%ebx, %ebx
	jle	.LBB3_13
# %bb.11:                               # %.lr.ph.i
                                        #   in Loop: Header=BB3_10 Depth=1
	movl	%r15d, %esi
	leaq	(%r9,%rsi,8), %rsi
	movq	%rcx, %rdi
	xorl	%r8d, %r8d
.LBB3_12:                               #   Parent Loop BB3_10 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%rsi,%r8,8), %xmm0             # xmm0 = mem[0],zero
	movsd	%xmm0, (%rdi)
	incq	%r8
	addq	%rax, %rdi
	cmpq	%r8, %r14
	jne	.LBB3_12
.LBB3_13:                               # %._crit_edge.i
                                        #   in Loop: Header=BB3_10 Depth=1
	incq	%rdx
	addq	$8, %rcx
	addl	%ebx, %r15d
	cmpq	%r13, %rdx
	jne	.LBB3_10
.LBB3_14:                               # %_Z17cpu_transpositionPdS_ii.exit
	movq	16(%rsp), %rdi
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	callq	hipEventSynchronize
	movq	40(%rsp), %rsi
	movq	16(%rsp), %rdx
	leaq	28(%rsp), %rdi
	callq	hipEventElapsedTime
	leaq	28(%rsp), %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax), %xmm0
	movl	$.L.str.2, %edi
	movl	8(%rsp), %esi                   # 4-byte Reload
	movl	%ebx, %edx
	movb	$1, %al
	callq	printf
	testl	%ebx, %ebx
	jle	.LBB3_21
# %bb.15:                               # %.preheader.lr.ph
	movl	$1, %eax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
	movl	8(%rsp), %r9d                   # 4-byte Reload
.LBB3_16:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_18 Depth 2
	testl	%r9d, %r9d
	jle	.LBB3_19
# %bb.17:                               # %.lr.ph72
                                        #   in Loop: Header=BB3_16 Depth=1
	movl	%ecx, %edi
	leaq	(,%rdi,8), %rsi
	addq	%rbp, %rsi
	leaq	(%r12,%rdi,8), %rdi
	xorl	%r8d, %r8d
.LBB3_18:                               #   Parent Loop BB3_16 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%rdi,%r8,8), %xmm0             # xmm0 = mem[0],zero
	ucomisd	(%rsi,%r8,8), %xmm0
	cmovnel	%r15d, %eax
	cmovpl	%r15d, %eax
	incq	%r8
	cmpq	%r8, %r13
	jne	.LBB3_18
.LBB3_19:                               # %._crit_edge73
                                        #   in Loop: Header=BB3_16 Depth=1
	incq	%rdx
	addl	%r9d, %ecx
	cmpq	%r14, %rdx
	jne	.LBB3_16
# %bb.20:                               # %._crit_edge76
	testl	%eax, %eax
	je	.LBB3_22
.LBB3_21:                               # %._crit_edge76.thread
	movss	28(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	divss	60(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	jmp	.LBB3_23
.LBB3_22:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB3_23:
	movq	32(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	%rbp, %rdi
	callq	free
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17gpu_transpositionPdS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17gpu_transpositionPdS_ii,@object # @_Z17gpu_transpositionPdS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z17gpu_transpositionPdS_ii
	.p2align	3, 0x0
_Z17gpu_transpositionPdS_ii:
	.quad	_Z32__device_stub__gpu_transpositionPdS_ii
	.size	_Z17gpu_transpositionPdS_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" "
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Time elapsed on matrix transposition of %dx%d on GPU: %f ms.\n\n"
	.size	.L.str.1, 63

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Time elapsed on matrix transposition of %dx%d on CPU: %f ms.\n\n"
	.size	.L.str.2, 63

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"all results are correct!!!, speedup = %f\n"
	.size	.L.str.3, 42

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17gpu_transpositionPdS_ii"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"incorrect results"
	.size	.Lstr, 18

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__gpu_transpositionPdS_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17gpu_transpositionPdS_ii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17gpu_transpositionPdS_ii ; -- Begin function _Z17gpu_transpositionPdS_ii
	.globl	_Z17gpu_transpositionPdS_ii
	.p2align	8
	.type	_Z17gpu_transpositionPdS_ii,@function
_Z17gpu_transpositionPdS_ii:            ; @_Z17gpu_transpositionPdS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mul_i32 s2, s5, s4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	v_add_nc_u32_e32 v6, v1, v2
	v_xor_b32_e32 v6, v6, v2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_ashr_i32 s0, s5, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s1, s5, s0
	global_load_b64 v[3:4], v[3:4], off
	s_xor_b32 s1, s1, s0
	v_xor_b32_e32 v2, s0, v2
	v_cvt_f32_u32_e32 v0, s1
	s_sub_i32 s6, 0, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v5, s6, v0
	v_mul_hi_u32 v5, v0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v5
	v_mul_hi_u32 v0, v6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v5, v0, s1
	v_sub_nc_u32_e32 v5, v6, v5
	v_add_nc_u32_e32 v6, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v7, s1, v5
	v_cmp_le_u32_e32 vcc_lo, s1, v5
	v_dual_cndmask_b32 v5, v5, v7 :: v_dual_cndmask_b32 v0, v0, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s1, v5
	v_add_nc_u32_e32 v6, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v6, vcc_lo
	v_xor_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v2
	v_mul_lo_u32 v2, v0, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v1, v2
	v_mad_u64_u32 v[1:2], null, v5, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[3:4], off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17gpu_transpositionPdS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17gpu_transpositionPdS_ii, .Lfunc_end0-_Z17gpu_transpositionPdS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 364
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17gpu_transpositionPdS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17gpu_transpositionPdS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
