/*
 * CUDA program to multiply matrices (fills in matrices itself)
 * 
 * compile with:
 *      nvcc -o matrix_multiply matrix_multiply.cu
 *
 * run with:
 *      ./matrix_multiply
 */

#include <stdio.h>
#include <cassert>
#include <cstdlib>

//constants to control the program:
#define NTESTS 1           /* # of tests to run */
#define TILE_WIDTH 32      /* # of threads in each dimension per block */
                           /* #threads per block = TILE_WIDTH * TILE_WIDTH */
#define WIDTH 1024         /* matrix dimensions (assumes square matrix) */


__global__ void kernel(float* Md, float* Nd, float* Pd, int width) {
  //method to run on GPU; called once per element of output matrix
  
  //calculate indices for the element to compute:
  int row = blockIdx.y*TILE_WIDTH + threadIdx.y;
  int col = blockIdx.x*TILE_WIDTH + threadIdx.x;

  if(row >= width || col >= width)  //check that indices are in bounds
    return;  

  float tmp = 0;  //local variable in which to accumulate the answer
  for(int k=0; k < width; ++k)
    tmp += Md[row*width + k] * Nd[k*width+col];
  Pd[row*width+col] =  tmp;
}

void verify_solution(float *a, float *b, float *c, int N) {
  //verify the solution on the CPU

  //threshold for matching: (0 ok since all vals are small ints)
  float epsilon = 0;  

  for (int i = 0; i < N; i++) {      //for every column...
    for (int j = 0; j < N; j++) {    //for every row in that column
      float tmp = 0;
      for (int k = 0; k < N; k++) {
        tmp += a[i * N + k] * b[k * N + j];
      }

    // Check against the GPU result, throw an error if not equal 
    assert(fabs(c[i * N + j] - tmp) <= epsilon);
    }
  }
}

void check(cudaError_t retVal) {
  //takes return value of a CUDA function and checks if it was an error

  if(retVal != cudaSuccess) {
    if (retVal==cudaErrorInvalidConfiguration)
      printf("Number of Threads per block is not valid");
    fprintf(stderr, "ERROR: %s\n", cudaGetErrorString(retVal));
    exit(1);
  }
}

float runTest (float* M, float* N, float* P, float* Md, float* Nd, float* Pd, int size) {
    
  //allocate timers
  cudaEvent_t start;
  check(cudaEventCreate(&start));
  cudaEvent_t stop;
  check(cudaEventCreate(&stop));
 
  //start timer
  check(cudaEventRecord(start,0));

  //transfer a and b to the GPU
  check(cudaMemcpy(Md, M, size, cudaMemcpyHostToDevice));
  check(cudaMemcpy(Nd, N, size, cudaMemcpyHostToDevice));

  //call the kernel
  int gridsize = (WIDTH+TILE_WIDTH-1)/TILE_WIDTH;
  dim3 dimGrid(gridsize, gridsize);
  dim3 dimBlock(TILE_WIDTH, TILE_WIDTH);
  kernel<<<dimGrid,dimBlock>>>(Md, Nd, Pd, WIDTH);

  //check if kernel encountered an error due to invalid configurations
  cudaError_t err = cudaGetLastError();
  check(err);

  //transfer result matrix to the host
  check(cudaMemcpy(P, Pd, size, cudaMemcpyDeviceToHost));

  //stop timer and store it
  check(cudaEventRecord(stop,0));
  check(cudaEventSynchronize(stop));
  float diff;
  check(cudaEventElapsedTime(&diff, start, stop));

  //deallocate timers
  check(cudaEventDestroy(start));
  check(cudaEventDestroy(stop));

  //print and return time
  printf("Time: %f ms\n", diff);
  return diff;
}

int main() {
  float* M;       //input arrays (on host)
  float* N;
  float* P;       //output array (on host)

  float* Md;      //input arrays (on device)
  float* Nd;
  float* Pd;      //output array (on device)
  
  int size = WIDTH * WIDTH * sizeof(float);  //size of matrix in bytes

  //allocate memory
  M = (float*) malloc(size);
  N = (float*) malloc(size);
  P = (float*) malloc(size);
  check(cudaMalloc((void**) &Md, size));
  check(cudaMalloc((void**) &Nd, size));
  check(cudaMalloc((void**) &Pd, size));

  //fill M and N arrays (all elements <= 2048 so results stay small)
  int cor=0;
  for(int i=0; i < WIDTH * WIDTH; i++){
    M[i] = N[i] = i-cor;
    if(i % 2048 == 0)
      cor=i;
  }

  float total_time = 0;  //accumultate execution times for averaging

  for(int i=0; i < NTESTS; i++)
    total_time += runTest(M, N, P, Md, Nd, Pd, size);

  printf("Avg for %d tests: %f ms and size of matrix %d\n",
	 NTESTS, total_time/(float)NTESTS, WIDTH);
  
  verify_solution(M,N,P,WIDTH);  //verify result 

  //free all memory:
  free(M);
  free(N);
  free(P);
  check(cudaFree(Md));
  check(cudaFree(Nd));
  check(cudaFree(Pd));
}

	.file	"tmpxft_002cd9dd_00000000-6_matrix_multiply.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z15verify_solutionPfS_S_i
	.type	_Z15verify_solutionPfS_S_i, @function
_Z15verify_solutionPfS_S_i:
.LFB2027:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z15verify_solutionPfS_S_i, .-_Z15verify_solutionPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Number of Threads per block is not valid"
.LC1:
	.string	"ERROR: %s\n"
	.text
	.globl	_Z5check9cudaError
	.type	_Z5check9cudaError, @function
_Z5check9cudaError:
.LFB2028:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L3
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%edi, %ebx
	cmpl	$9, %edi
	jne	.L5
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L5:
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L3:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z5check9cudaError, .-_Z5check9cudaError
	.globl	_Z30__device_stub__Z6kernelPfS_S_iPfS_S_i
	.type	_Z30__device_stub__Z6kernelPfS_S_iPfS_S_i, @function
_Z30__device_stub__Z6kernelPfS_S_iPfS_S_i:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6kernelPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L10:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z30__device_stub__Z6kernelPfS_S_iPfS_S_i, .-_Z30__device_stub__Z6kernelPfS_S_iPfS_S_i
	.globl	_Z6kernelPfS_S_i
	.type	_Z6kernelPfS_S_i, @function
_Z6kernelPfS_S_i:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6kernelPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2056:
	.size	_Z6kernelPfS_S_i, .-_Z6kernelPfS_S_i
	.section	.rodata.str1.1
.LC2:
	.string	"Time: %f ms\n"
	.text
	.globl	_Z7runTestPfS_S_S_S_S_i
	.type	_Z7runTestPfS_S_S_S_S_i, @function
_Z7runTestPfS_S_S_S_S_i:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%r9, %rbx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	cudaEventCreate@PLT
	movl	%eax, %edi
	call	_Z5check9cudaError
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	%eax, %edi
	call	_Z5check9cudaError
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%eax, %edi
	call	_Z5check9cudaError
	movl	$1, %ecx
	movq	%r15, %rsi
	movq	%rbp, %rdi
	movslq	144(%rsp), %r13
	movq	%r13, %rdx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z5check9cudaError
	movl	$1, %ecx
	movq	%r13, %rdx
	movq	%r14, %rsi
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z5check9cudaError
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$137438953504, %rdi
	movl	$1, %esi
	movq	%rdi, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movl	$1024, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	_Z30__device_stub__Z6kernelPfS_S_iPfS_S_i
.L16:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	call	_Z5check9cudaError
	movq	8(%rsp), %rdi
	movq	%r13, %rdx
	movq	%rbx, %rsi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	_Z5check9cudaError
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%eax, %edi
	call	_Z5check9cudaError
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movl	%eax, %edi
	call	_Z5check9cudaError
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	28(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movl	%eax, %edi
	call	_Z5check9cudaError
	movq	32(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movl	%eax, %edi
	call	_Z5check9cudaError
	movq	40(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movl	%eax, %edi
	call	_Z5check9cudaError
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	28(%rsp), %xmm0
	call	__printf_chk@PLT
	movss	28(%rsp), %xmm0
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z7runTestPfS_S_S_S_S_i, .-_Z7runTestPfS_S_S_S_S_i
	.section	.rodata.str1.1
.LC4:
	.string	"Avg for %d tests: %f ms and size of matrix %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$4194304, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$4194304, %esi
	movq	%rsp, %rdi
	movq	%rax, %r12
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_Z5check9cudaError
	movl	$4194304, %esi
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_Z5check9cudaError
	leaq	16(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	_Z5check9cudaError
	xorl	%eax, %eax
	xorl	%edx, %edx
.L21:
	movl	%eax, %ecx
	subl	%edx, %ecx
	testl	$2047, %eax
	cvtsi2ssl	%ecx, %xmm0
	cmove	%eax, %edx
	movss	%xmm0, (%rbx,%rax,4)
	movss	%xmm0, 0(%rbp,%rax,4)
	incq	%rax
	cmpq	$1048576, %rax
	jne	.L21
	pushq	%rax
	.cfi_def_cfa_offset 72
	movq	%r12, %rdx
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	pushq	$4194304
	.cfi_def_cfa_offset 80
	movq	32(%rsp), %r9
	movq	24(%rsp), %r8
	movq	16(%rsp), %rcx
	call	_Z7runTestPfS_S_S_S_S_i
	xorps	%xmm1, %xmm1
	popq	%rdx
	.cfi_def_cfa_offset 72
	leaq	.LC4(%rip), %rsi
	addss	%xmm1, %xmm0
	popq	%rcx
	.cfi_def_cfa_offset 64
	movl	$1, %edx
	movl	$1024, %ecx
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_Z5check9cudaError
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_Z5check9cudaError
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	_Z5check9cudaError
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z6kernelPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6kernelPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 * CUDA program to multiply matrices (fills in matrices itself)
 * 
 * compile with:
 *      nvcc -o matrix_multiply matrix_multiply.cu
 *
 * run with:
 *      ./matrix_multiply
 */


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <cassert>
#include <cstdlib>

//constants to control the program:
#define NTESTS 1           /* # of tests to run */
#define TILE_WIDTH 32      /* # of threads in each dimension per block */
                           /* #threads per block = TILE_WIDTH * TILE_WIDTH */
#define WIDTH 1024         /* matrix dimensions (assumes square matrix) */


__global__ void kernel(float* Md, float* Nd, float* Pd, int width) {
  //method to run on GPU; called once per element of output matrix
  
  //calculate indices for the element to compute:
  int row = blockIdx.y*TILE_WIDTH + threadIdx.y;
  int col = blockIdx.x*TILE_WIDTH + threadIdx.x;

  if(row >= width || col >= width)  //check that indices are in bounds
    return;  

  float tmp = 0;  //local variable in which to accumulate the answer
  for(int k=0; k < width; ++k)
    tmp += Md[row*width + k] * Nd[k*width+col];
  Pd[row*width+col] =  tmp;
}

void verify_solution(float *a, float *b, float *c, int N) {
  //verify the solution on the CPU

  //threshold for matching: (0 ok since all vals are small ints)
  float epsilon = 0;  

  for (int i = 0; i < N; i++) {      //for every column...
    for (int j = 0; j < N; j++) {    //for every row in that column
      float tmp = 0;
      for (int k = 0; k < N; k++) {
        tmp += a[i * N + k] * b[k * N + j];
      }

    // Check against the GPU result, throw an error if not equal 
    assert(fabs(c[i * N + j] - tmp) <= epsilon);
    }
  }
}

void check(hipError_t retVal) {
  //takes return value of a CUDA function and checks if it was an error

  if(retVal != hipSuccess) {
    if (retVal==hipErrorInvalidConfiguration)
      printf("Number of Threads per block is not valid");
    fprintf(stderr, "ERROR: %s\n", hipGetErrorString(retVal));
    exit(1);
  }
}

float runTest (float* M, float* N, float* P, float* Md, float* Nd, float* Pd, int size) {
    
  //allocate timers
  hipEvent_t start;
  check(hipEventCreate(&start));
  hipEvent_t stop;
  check(hipEventCreate(&stop));
 
  //start timer
  check(hipEventRecord(start,0));

  //transfer a and b to the GPU
  check(hipMemcpy(Md, M, size, hipMemcpyHostToDevice));
  check(hipMemcpy(Nd, N, size, hipMemcpyHostToDevice));

  //call the kernel
  int gridsize = (WIDTH+TILE_WIDTH-1)/TILE_WIDTH;
  dim3 dimGrid(gridsize, gridsize);
  dim3 dimBlock(TILE_WIDTH, TILE_WIDTH);
  kernel<<<dimGrid,dimBlock>>>(Md, Nd, Pd, WIDTH);

  //check if kernel encountered an error due to invalid configurations
  hipError_t err = hipGetLastError();
  check(err);

  //transfer result matrix to the host
  check(hipMemcpy(P, Pd, size, hipMemcpyDeviceToHost));

  //stop timer and store it
  check(hipEventRecord(stop,0));
  check(hipEventSynchronize(stop));
  float diff;
  check(hipEventElapsedTime(&diff, start, stop));

  //deallocate timers
  check(hipEventDestroy(start));
  check(hipEventDestroy(stop));

  //print and return time
  printf("Time: %f ms\n", diff);
  return diff;
}

int main() {
  float* M;       //input arrays (on host)
  float* N;
  float* P;       //output array (on host)

  float* Md;      //input arrays (on device)
  float* Nd;
  float* Pd;      //output array (on device)
  
  int size = WIDTH * WIDTH * sizeof(float);  //size of matrix in bytes

  //allocate memory
  M = (float*) malloc(size);
  N = (float*) malloc(size);
  P = (float*) malloc(size);
  check(hipMalloc((void**) &Md, size));
  check(hipMalloc((void**) &Nd, size));
  check(hipMalloc((void**) &Pd, size));

  //fill M and N arrays (all elements <= 2048 so results stay small)
  int cor=0;
  for(int i=0; i < WIDTH * WIDTH; i++){
    M[i] = N[i] = i-cor;
    if(i % 2048 == 0)
      cor=i;
  }

  float total_time = 0;  //accumultate execution times for averaging

  for(int i=0; i < NTESTS; i++)
    total_time += runTest(M, N, P, Md, Nd, Pd, size);

  printf("Avg for %d tests: %f ms and size of matrix %d\n",
	 NTESTS, total_time/(float)NTESTS, WIDTH);
  
  verify_solution(M,N,P,WIDTH);  //verify result 

  //free all memory:
  free(M);
  free(N);
  free(P);
  check(hipFree(Md));
  check(hipFree(Nd));
  check(hipFree(Pd));
}

	.text
	.file	"matrix_multiply.hip"
	.globl	_Z21__device_stub__kernelPfS_S_i # -- Begin function _Z21__device_stub__kernelPfS_S_i
	.type	_Z21__device_stub__kernelPfS_S_i,@function
_Z21__device_stub__kernelPfS_S_i:       # @_Z21__device_stub__kernelPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__kernelPfS_S_i, .Lfunc_end0-_Z21__device_stub__kernelPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z15verify_solutionPfS_S_i      # -- Begin function _Z15verify_solutionPfS_S_i
	.type	_Z15verify_solutionPfS_S_i,@function
_Z15verify_solutionPfS_S_i:             # @_Z15verify_solutionPfS_S_i
	.cfi_startproc
# %bb.0:                                # %._crit_edge24
	retq
.Lfunc_end1:
	.size	_Z15verify_solutionPfS_S_i, .Lfunc_end1-_Z15verify_solutionPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z5check10hipError_t            # -- Begin function _Z5check10hipError_t
	.type	_Z5check10hipError_t,@function
_Z5check10hipError_t:                   # @_Z5check10hipError_t
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB2_1
# %bb.4:
	retq
.LBB2_1:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%edi, %ebx
	cmpl	$9, %edi
	jne	.LBB2_3
# %bb.2:
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
.LBB2_3:
	movq	stderr(%rip), %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movq	%r14, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	_Z5check10hipError_t, .Lfunc_end2-_Z5check10hipError_t
	.cfi_endproc
                                        # -- End function
	.globl	_Z7runTestPfS_S_S_S_S_i         # -- Begin function _Z7runTestPfS_S_S_S_S_i
	.type	_Z7runTestPfS_S_S_S_S_i,@function
_Z7runTestPfS_S_S_S_S_i:                # @_Z7runTestPfS_S_S_S_S_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r13
	movq	%rcx, %r12
	movq	%rdx, 24(%rsp)                  # 8-byte Spill
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	movq	%rdi, %r14
	movslq	96(%rsp), %r15
	leaq	8(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipEventCreate
	movl	%eax, %edi
	callq	_Z5check10hipError_t
	movq	%rsp, %rdi
	callq	hipEventCreate
	movl	%eax, %edi
	callq	_Z5check10hipError_t
	movq	(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%eax, %edi
	callq	_Z5check10hipError_t
	movq	%r12, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	_Z5check10hipError_t
	movq	%r13, %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	_Z5check10hipError_t
	movabsq	$137438953504, %rdi             # imm = 0x2000000020
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r13, %rsi
	movq	%rbx, %rdx
	movl	$1024, %ecx                     # imm = 0x400
	callq	_Z21__device_stub__kernelPfS_S_i
.LBB3_2:
	callq	hipGetLastError
	movl	%eax, %edi
	callq	_Z5check10hipError_t
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	%rbx, %rsi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	_Z5check10hipError_t
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%eax, %edi
	callq	_Z5check10hipError_t
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movl	%eax, %edi
	callq	_Z5check10hipError_t
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	36(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movl	%eax, %edi
	callq	_Z5check10hipError_t
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	movl	%eax, %edi
	callq	_Z5check10hipError_t
	movq	(%rsp), %rdi
	callq	hipEventDestroy
	movl	%eax, %edi
	callq	_Z5check10hipError_t
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z7runTestPfS_S_S_S_S_i, .Lfunc_end3-_Z7runTestPfS_S_S_S_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %rbx
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r14
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r15
	leaq	24(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	movl	%eax, %edi
	callq	_Z5check10hipError_t
	leaq	16(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	movl	%eax, %edi
	callq	_Z5check10hipError_t
	leaq	8(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	movl	%eax, %edi
	callq	_Z5check10hipError_t
	xorl	%eax, %eax
	xorl	%ecx, %ecx
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, %edx
	subl	%ecx, %edx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edx, %xmm0
	movss	%xmm0, (%r14,%rax,4)
	movss	%xmm0, (%rbx,%rax,4)
	testl	$2047, %eax                     # imm = 0x7FF
	cmovel	%eax, %ecx
	incq	%rax
	cmpq	$1048576, %rax                  # imm = 0x100000
	jne	.LBB4_1
# %bb.2:                                # %.preheader
	movq	24(%rsp), %rcx
	movq	16(%rsp), %r8
	movq	8(%rsp), %r9
	movl	$4194304, (%rsp)                # imm = 0x400000
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	callq	_Z7runTestPfS_S_S_S_S_i
	xorps	%xmm1, %xmm1
	addss	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	movl	$.L.str.3, %edi
	movl	$1, %esi
	movl	$1024, %edx                     # imm = 0x400
	movb	$1, %al
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	24(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	callq	_Z5check10hipError_t
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	callq	_Z5check10hipError_t
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	callq	_Z5check10hipError_t
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6kernelPfS_S_i,@object        # @_Z6kernelPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z6kernelPfS_S_i
	.p2align	3, 0x0
_Z6kernelPfS_S_i:
	.quad	_Z21__device_stub__kernelPfS_S_i
	.size	_Z6kernelPfS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Number of Threads per block is not valid"
	.size	.L.str, 41

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"ERROR: %s\n"
	.size	.L.str.1, 11

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Time: %f ms\n"
	.size	.L.str.2, 13

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Avg for %d tests: %f ms and size of matrix %d\n"
	.size	.L.str.3, 47

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6kernelPfS_S_i"
	.size	.L__unnamed_1, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__kernelPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6kernelPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6kernelPfS_S_i        ; -- Begin function _Z6kernelPfS_S_i
	.globl	_Z6kernelPfS_S_i
	.p2align	8
	.type	_Z6kernelPfS_S_i,@function
_Z6kernelPfS_S_i:                       ; @_Z6kernelPfS_S_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v0, s15, 5, v1
	v_lshl_add_u32 v5, s14, 5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_max_i32_e32 v1, v0, v5
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_lo_u32 v0, v0, s2
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v3, v5
	s_mov_b32 s3, s2
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s3, 0
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_add_nc_u32_e32 v3, s2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b32 v4, v[1:2], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v1, vcc_lo, v1, 4
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v4, v7
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v6, 0
.LBB0_5:                                ; %Flow44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v5
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6kernelPfS_S_i, .Lfunc_end0-_Z6kernelPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 312
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
