#include "cuda.h"
#include <stdio.h>
#include <stdlib.h>
#include <iostream>
#include <sys/time.h>

void print_matrix(int* states, int n)
{
	std::cout << "matrix:" << std::endl;

	for (int i = 0; i < n; ++i)
	{
		for (int j = 0; j < n; ++j)
		{
			std::cout << states[i*n+j] << " ";
		}
		std::cout << std::endl;
	}
}

//code do main the job on GPU
__global__ void countActiveNeigb(int* states_d, int* active_neigb_d, int n)
{
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int i = row * blockDim.x + col;
	
	int peso_i = i / n;
	int peso_j = i % n;	
	
	for (int x = peso_i - 1; x < peso_i + 2; ++x)
	{
		for (int y = peso_j - 1; y < peso_j + 2; ++y)
		{
			if (x >= 0 && y >= 0 && x < n && y < n)
			{
				active_neigb_d[i] += states_d[x * n + y];
			}	
		}
	}
	active_neigb_d[i] -= states_d[peso_i * n + peso_j];
//	printf("i: %d, peso_i: %d, peso_j: %d, states_d[i][j]: %d, active_neigb_d[i][j]: %d\n", i, peso_i, peso_j, states_d[i], active_neigb_d[i]);
}

__global__ void updateStates(int* states_d, int* active_neigb_d)
{
	
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int i = row * blockDim.x + col;

	if ( (states_d[i] == 1 && (active_neigb_d[i] == 2 || active_neigb_d[i] == 3)) || (states_d[i] == 0 && active_neigb_d[i] == 3))
	{
		states_d[i] = 1;
	}	
	else 
	{
		states_d[i] = 0;
	}
}

int main(int argc, char** argv)
{
	struct timeval start, end;
	gettimeofday(&start, NULL);
	if (argc != 4)
	{
		std::cout << "USAGE: cellular_automata <dim of matrix> <numGen> <num of blocks>" << std::endl;
		return -1;
	}
	
	int n = atoi(argv[1]); 
	int num_gen = atoi(argv[2]); 
	int num_block = atoi(argv[3]); 

	int num_thread = n * n / num_block; 

	cudaSetDevice(0);
	
	int* states = new int[n*n];
	int* states_d = NULL;
	int* active_neigb = new int[n*n];
	int* active_neigb_d = NULL;

	srand (time(NULL));
	for (int i = 0; i < n*n; ++i)
	{
		states[i] = rand() % 2;
	}	
	
	cudaMalloc((void**)&states_d, n * n * sizeof(int));
	cudaMemcpy(states_d, states, n * n * sizeof(int), cudaMemcpyHostToDevice);
	
	cudaMalloc((void**)&active_neigb_d, n * n * sizeof(int));
	cudaMemcpy(active_neigb_d, active_neigb, n * n *sizeof(int), cudaMemcpyHostToDevice);
	
	printf("n: %d, num_block: %d, num_thread: %d\n", n, num_block, num_thread);
//	print_matrix(states, n);

	for (int i = 0; i < num_gen; ++i)
	{
		countActiveNeigb<<< dim3(num_block), dim3(num_thread)>>> (states_d, active_neigb_d, n);
		cudaThreadSynchronize();

		cudaMemcpy(active_neigb, active_neigb_d, n * n * sizeof(int), cudaMemcpyDeviceToHost);
			
		//update states
		updateStates<<< dim3(num_block), dim3(num_thread)>>> (states_d, active_neigb_d);
		cudaThreadSynchronize();
		cudaMemcpy(states, states_d, n * n * sizeof(int), cudaMemcpyDeviceToHost);

//		print_matrix(states, n);
	}
	
	cudaFree(states_d);
	cudaFree(active_neigb_d);

	delete[] states;
	delete[] active_neigb; 

	gettimeofday(&end, NULL);
	double time_gap = (end.tv_sec - start.tv_sec) * 1000000u + end.tv_usec - start.tv_usec;	
	printf("Time cost: %.2lf s.\n", time_gap / 100000);       

	return 0;
}

	.file	"tmpxft_0022ca70_00000000-6_cellular_automata.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"matrix:"
.LC1:
	.string	" "
	.text
	.globl	_Z12print_matrixPii
	.type	_Z12print_matrixPii, @function
_Z12print_matrixPii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC1(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movslq	%esi, %r13
	leaq	.LC0(%rip), %rsi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r13, %rbp
	salq	$2, %r13
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	leaq	_ZSt4cout(%rip), %rdi
	pushq	%rdx
	.cfi_def_cfa_offset 64
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L3:
	cmpl	%ebp, %r12d
	jge	.L9
	leaq	(%rbx,%r13), %r14
.L4:
	movl	(%rbx), %esi
	leaq	_ZSt4cout(%rip), %rdi
	addq	$4, %rbx
	call	_ZNSolsEi@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	%r14, %rbx
	jne	.L4
	leaq	_ZSt4cout(%rip), %rdi
	incl	%r12d
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	jmp	.L3
.L9:
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z12print_matrixPii, .-_Z12print_matrixPii
	.globl	_Z39__device_stub__Z16countActiveNeigbPiS_iPiS_i
	.type	_Z39__device_stub__Z16countActiveNeigbPiS_iPiS_i, @function
_Z39__device_stub__Z16countActiveNeigbPiS_iPiS_i:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16countActiveNeigbPiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L10:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z39__device_stub__Z16countActiveNeigbPiS_iPiS_i, .-_Z39__device_stub__Z16countActiveNeigbPiS_iPiS_i
	.globl	_Z16countActiveNeigbPiS_i
	.type	_Z16countActiveNeigbPiS_i, @function
_Z16countActiveNeigbPiS_i:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z16countActiveNeigbPiS_iPiS_i
	.cfi_endproc
.LFE3662:
	.size	_Z16countActiveNeigbPiS_i, .-_Z16countActiveNeigbPiS_i
	.globl	_Z34__device_stub__Z12updateStatesPiS_PiS_
	.type	_Z34__device_stub__Z12updateStatesPiS_PiS_, @function
_Z34__device_stub__Z12updateStatesPiS_PiS_:
.LFB3663:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12updateStatesPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L15:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z34__device_stub__Z12updateStatesPiS_PiS_, .-_Z34__device_stub__Z12updateStatesPiS_PiS_
	.globl	_Z12updateStatesPiS_
	.type	_Z12updateStatesPiS_, @function
_Z12updateStatesPiS_:
.LFB3664:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z12updateStatesPiS_PiS_
	.cfi_endproc
.LFE3664:
	.size	_Z12updateStatesPiS_, .-_Z12updateStatesPiS_
	.section	.rodata.str1.1
.LC2:
	.string	"USAGE: cellular_automata <dim of matrix> <numGen> <num of blocks>"
.LC3:
	.string	"n: %d, num_block: %d, num_thread: %d\n"
.LC5:
	.string	"Time cost: %.2lf s.\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	xorl	%esi, %esi
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rdi
	call	gettimeofday@PLT
	cmpl	$4, %ebp
	je	.L21
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	orl	$-1, %eax
	jmp	.L20
.L21:
	movq	8(%rbx), %rdi
	call	atoi@PLT
	movq	16(%rbx), %rdi
	movl	%eax, %r12d
	call	atoi@PLT
	movq	24(%rbx), %rdi
	movl	%r12d, %ebx
	imull	%r12d, %ebx
	movl	%eax, 28(%rsp)
	call	atoi@PLT
	xorl	%edi, %edi
	movl	%eax, %ebp
	movl	%ebx, %eax
	movslq	%ebx, %rbx
	cltd
	idivl	%ebp
	movl	%eax, %r15d
	call	cudaSetDevice@PLT
	leaq	0(,%rbx,4), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	_Znam@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %rbx
	xorl	%eax, %eax
	movq	%rax, 40(%rsp)
	movq	%rbx, %r14
	call	_Znam@PLT
	xorl	%edx, %edx
	xorl	%edi, %edi
	movq	%rdx, 48(%rsp)
	movq	%rax, 16(%rsp)
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	movq	8(%rsp), %rax
	leaq	(%rax,%rbx), %r13
.L23:
	cmpq	%r13, %r14
	je	.L31
	call	rand@PLT
	movl	$2, %ecx
	addq	$4, %r14
	cltd
	idivl	%ecx
	movl	%edx, -4(%r14)
	jmp	.L23
.L31:
	movq	8(%rsp), %rsi
	leaq	40(%rsp), %rdi
	xorl	%r14d, %r14d
	movabsq	$4294967297, %r13
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	48(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	%r15d, %r8d
	movl	%ebp, %ecx
	movl	%r12d, %edx
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L25:
	movl	28(%rsp), %eax
	cmpl	%eax, %r14d
	jge	.L32
	movq	%r13, 92(%rsp)
	movl	96(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, 64(%rsp)
	movl	68(%rsp), %esi
	movl	%r15d, 88(%rsp)
	movq	88(%rsp), %rdx
	movl	%ebp, 60(%rsp)
	movq	60(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	%r12d, %edx
	call	_Z39__device_stub__Z16countActiveNeigbPiS_iPiS_i
.L26:
	call	cudaThreadSynchronize@PLT
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	%r13, 92(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, 64(%rsp)
	movl	96(%rsp), %ecx
	movl	%r15d, 88(%rsp)
	movl	68(%rsp), %esi
	movl	%ebp, 60(%rsp)
	movq	88(%rsp), %rdx
	movq	60(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z34__device_stub__Z12updateStatesPiS_PiS_
.L27:
	call	cudaThreadSynchronize@PLT
	movq	8(%rsp), %rdx
	movq	%rbx, %rdi
	incl	%r14d
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	jmp	.L25
.L32:
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	16(%rsp), %rdi
	call	_ZdaPv@PLT
	leaq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	movq	88(%rsp), %rax
	subq	72(%rsp), %rax
	leaq	.LC5(%rip), %rsi
	imulq	$1000000, %rax, %rax
	addq	96(%rsp), %rax
	subq	80(%rsp), %rax
	movl	$2, %edi
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC4(%rip), %xmm0
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L20:
	movq	104(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z12updateStatesPiS_"
.LC7:
	.string	"_Z16countActiveNeigbPiS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3666:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12updateStatesPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16countActiveNeigbPiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3666:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	0
	.long	1090021888
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
#include <iostream>
#include <sys/time.h>

void print_matrix(int* states, int n)
{
	std::cout << "matrix:" << std::endl;

	for (int i = 0; i < n; ++i)
	{
		for (int j = 0; j < n; ++j)
		{
			std::cout << states[i*n+j] << " ";
		}
		std::cout << std::endl;
	}
}

//code do main the job on GPU
__global__ void countActiveNeigb(int* states_d, int* active_neigb_d, int n)
{
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int i = row * blockDim.x + col;
	
	int peso_i = i / n;
	int peso_j = i % n;	
	
	for (int x = peso_i - 1; x < peso_i + 2; ++x)
	{
		for (int y = peso_j - 1; y < peso_j + 2; ++y)
		{
			if (x >= 0 && y >= 0 && x < n && y < n)
			{
				active_neigb_d[i] += states_d[x * n + y];
			}	
		}
	}
	active_neigb_d[i] -= states_d[peso_i * n + peso_j];
//	printf("i: %d, peso_i: %d, peso_j: %d, states_d[i][j]: %d, active_neigb_d[i][j]: %d\n", i, peso_i, peso_j, states_d[i], active_neigb_d[i]);
}

__global__ void updateStates(int* states_d, int* active_neigb_d)
{
	
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int i = row * blockDim.x + col;

	if ( (states_d[i] == 1 && (active_neigb_d[i] == 2 || active_neigb_d[i] == 3)) || (states_d[i] == 0 && active_neigb_d[i] == 3))
	{
		states_d[i] = 1;
	}	
	else 
	{
		states_d[i] = 0;
	}
}

int main(int argc, char** argv)
{
	struct timeval start, end;
	gettimeofday(&start, NULL);
	if (argc != 4)
	{
		std::cout << "USAGE: cellular_automata <dim of matrix> <numGen> <num of blocks>" << std::endl;
		return -1;
	}
	
	int n = atoi(argv[1]); 
	int num_gen = atoi(argv[2]); 
	int num_block = atoi(argv[3]); 

	int num_thread = n * n / num_block; 

	hipSetDevice(0);
	
	int* states = new int[n*n];
	int* states_d = NULL;
	int* active_neigb = new int[n*n];
	int* active_neigb_d = NULL;

	srand (time(NULL));
	for (int i = 0; i < n*n; ++i)
	{
		states[i] = rand() % 2;
	}	
	
	hipMalloc((void**)&states_d, n * n * sizeof(int));
	hipMemcpy(states_d, states, n * n * sizeof(int), hipMemcpyHostToDevice);
	
	hipMalloc((void**)&active_neigb_d, n * n * sizeof(int));
	hipMemcpy(active_neigb_d, active_neigb, n * n *sizeof(int), hipMemcpyHostToDevice);
	
	printf("n: %d, num_block: %d, num_thread: %d\n", n, num_block, num_thread);
//	print_matrix(states, n);

	for (int i = 0; i < num_gen; ++i)
	{
		countActiveNeigb<<< dim3(num_block), dim3(num_thread)>>> (states_d, active_neigb_d, n);
		hipDeviceSynchronize();

		hipMemcpy(active_neigb, active_neigb_d, n * n * sizeof(int), hipMemcpyDeviceToHost);
			
		//update states
		updateStates<<< dim3(num_block), dim3(num_thread)>>> (states_d, active_neigb_d);
		hipDeviceSynchronize();
		hipMemcpy(states, states_d, n * n * sizeof(int), hipMemcpyDeviceToHost);

//		print_matrix(states, n);
	}
	
	hipFree(states_d);
	hipFree(active_neigb_d);

	delete[] states;
	delete[] active_neigb; 

	gettimeofday(&end, NULL);
	double time_gap = (end.tv_sec - start.tv_sec) * 1000000u + end.tv_usec - start.tv_usec;	
	printf("Time cost: %.2lf s.\n", time_gap / 100000);       

	return 0;
}

	.text
	.file	"cellular_automata.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z12print_matrixPii             # -- Begin function _Z12print_matrixPii
	.type	_Z12print_matrixPii,@function
_Z12print_matrixPii:                    # @_Z12print_matrixPii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	movq	%rdi, (%rsp)                    # 8-byte Spill
	movl	$_ZSt4cout, %r14d
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	testl	%ebx, %ebx
	jle	.LBB0_5
# %bb.1:                                # %.preheader.lr.ph
	movl	%ebx, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB0_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_3 Depth 2
	movl	%r13d, %eax
	movq	(%rsp), %rcx                    # 8-byte Reload
	leaq	(%rcx,%rax,4), %r15
	xorl	%r14d, %r14d
.LBB0_3:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r15,%r14,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r14
	cmpq	%r14, %r12
	jne	.LBB0_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%rbp
	addl	%ebx, %r13d
	cmpq	%r12, %rbp
	jne	.LBB0_2
.LBB0_5:                                # %._crit_edge13
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z12print_matrixPii, .Lfunc_end0-_Z12print_matrixPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__countActiveNeigbPiS_i # -- Begin function _Z31__device_stub__countActiveNeigbPiS_i
	.type	_Z31__device_stub__countActiveNeigbPiS_i,@function
_Z31__device_stub__countActiveNeigbPiS_i: # @_Z31__device_stub__countActiveNeigbPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16countActiveNeigbPiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__countActiveNeigbPiS_i, .Lfunc_end1-_Z31__device_stub__countActiveNeigbPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__updateStatesPiS_ # -- Begin function _Z27__device_stub__updateStatesPiS_
	.type	_Z27__device_stub__updateStatesPiS_,@function
_Z27__device_stub__updateStatesPiS_:    # @_Z27__device_stub__updateStatesPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12updateStatesPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z27__device_stub__updateStatesPiS_, .Lfunc_end2-_Z27__device_stub__updateStatesPiS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x40f86a0000000000              # double 1.0E+5
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %ebp
	leaq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	cmpl	$4, %ebp
	jne	.LBB3_1
# %bb.2:
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %r13d
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	24(%rbx), %rdi
	callq	atoi
	movl	%eax, %ecx
	movl	%r13d, %ebx
	imull	%ebx, %ebx
	movl	%ebx, %eax
	cltd
	movl	%ecx, 36(%rsp)                  # 4-byte Spill
	idivl	%ecx
	movl	%eax, 32(%rsp)                  # 4-byte Spill
	xorl	%r15d, %r15d
	xorl	%edi, %edi
	callq	hipSetDevice
	leaq	(,%rbx,4), %r12
	movq	%r12, %rdi
	callq	_Znam
	movq	%rax, %r14
	movq	%r15, 16(%rsp)
	movq	%r12, %rdi
	callq	_Znam
	movq	%rax, %r15
	xorl	%eax, %eax
	movq	%rax, 8(%rsp)
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movl	%r13d, 28(%rsp)                 # 4-byte Spill
	testl	%r13d, %r13d
	je	.LBB3_5
# %bb.3:                                # %.lr.ph.preheader
	cmpl	$1, %ebx
	adcl	$0, %ebx
	xorl	%r13d, %r13d
.LBB3_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	andl	$-2, %ecx
	subl	%ecx, %eax
	movl	%eax, (%r14,%r13,4)
	incq	%r13
	cmpq	%r13, %rbx
	jne	.LBB3_4
.LBB3_5:                                # %._crit_edge
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.3, %edi
	movl	28(%rsp), %esi                  # 4-byte Reload
	movl	36(%rsp), %ebx                  # 4-byte Reload
	movl	%ebx, %edx
	movl	32(%rsp), %r13d                 # 4-byte Reload
	movl	%r13d, %ecx
	xorl	%eax, %eax
	callq	printf
	testl	%ebp, %ebp
	jle	.LBB3_12
# %bb.6:                                # %.lr.ph69
	movl	%r13d, %eax
	movl	%ebx, %r13d
	btsq	$32, %r13
	movl	%eax, %ebx
	btsq	$32, %rbx
.LBB3_7:                                # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_9
# %bb.8:                                #   in Loop: Header=BB3_7 Depth=1
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	28(%rsp), %edx                  # 4-byte Reload
	callq	_Z31__device_stub__countActiveNeigbPiS_i
.LBB3_9:                                #   in Loop: Header=BB3_7 Depth=1
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	%r15, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_11
# %bb.10:                               #   in Loop: Header=BB3_7 Depth=1
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z27__device_stub__updateStatesPiS_
.LBB3_11:                               #   in Loop: Header=BB3_7 Depth=1
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rsi
	movq	%r14, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	decl	%ebp
	jne	.LBB3_7
.LBB3_12:                               # %._crit_edge70
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	leaq	56(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%rbx), %rax
	subq	40(%rsp), %rax
	imulq	$1000000, %rax, %rax            # imm = 0xF4240
	addq	8(%rbx), %rax
	subq	48(%rsp), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI3_0(%rip), %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	jmp	.LBB3_13
.LBB3_1:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$65, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$-1, %eax
.LBB3_13:
                                        # kill: def $eax killed $eax killed $rax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16countActiveNeigbPiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12updateStatesPiS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"matrix:"
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" "
	.size	.L.str.1, 2

	.type	_Z16countActiveNeigbPiS_i,@object # @_Z16countActiveNeigbPiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z16countActiveNeigbPiS_i
	.p2align	3, 0x0
_Z16countActiveNeigbPiS_i:
	.quad	_Z31__device_stub__countActiveNeigbPiS_i
	.size	_Z16countActiveNeigbPiS_i, 8

	.type	_Z12updateStatesPiS_,@object    # @_Z12updateStatesPiS_
	.globl	_Z12updateStatesPiS_
	.p2align	3, 0x0
_Z12updateStatesPiS_:
	.quad	_Z27__device_stub__updateStatesPiS_
	.size	_Z12updateStatesPiS_, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"USAGE: cellular_automata <dim of matrix> <numGen> <num of blocks>"
	.size	.L.str.2, 66

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"n: %d, num_block: %d, num_thread: %d\n"
	.size	.L.str.3, 38

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Time cost: %.2lf s.\n"
	.size	.L.str.4, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16countActiveNeigbPiS_i"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z12updateStatesPiS_"
	.size	.L__unnamed_2, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__countActiveNeigbPiS_i
	.addrsig_sym _Z27__device_stub__updateStatesPiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z16countActiveNeigbPiS_i
	.addrsig_sym _Z12updateStatesPiS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16countActiveNeigbPiS_i ; -- Begin function _Z16countActiveNeigbPiS_i
	.globl	_Z16countActiveNeigbPiS_i
	.p2align	8
	.type	_Z16countActiveNeigbPiS_i,@function
_Z16countActiveNeigbPiS_i:              ; @_Z16countActiveNeigbPiS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x10
	s_load_b32 s3, s[0:1], 0x24
	v_bfe_u32 v3, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s4, s2, 31
	s_lshr_b32 s6, s3, 16
	s_add_i32 s5, s2, s4
	s_mul_i32 s15, s15, s6
	s_xor_b32 s5, s5, s4
	v_add3_u32 v3, s15, s14, v3
	v_cvt_f32_u32_e32 v1, s5
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v4, v1
	v_mad_u64_u32 v[0:1], null, v3, s3, v[2:3]
	s_sub_i32 s3, 0, s5
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v2, s3, v4
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v1, 31, v0
	v_xad_u32 v9, s2, -1, v0
	v_mul_hi_u32 v2, v4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v0, v1
	v_xor_b32_e32 v3, v3, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v4, v2
	v_mul_hi_u32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, v2, s5
	v_sub_nc_u32_e32 v3, v3, v4
	v_add_nc_u32_e32 v4, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s5, v3
	v_cmp_le_u32_e32 vcc_lo, s5, v3
	v_dual_cndmask_b32 v2, v2, v4 :: v_dual_cndmask_b32 v3, v3, v5
	v_xor_b32_e32 v5, s4, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v4, 1, v2
	v_cmp_le_u32_e32 vcc_lo, s5, v3
	s_load_b128 s[4:7], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	v_xor_b32_e32 v2, v2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v6, v2, v5
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	v_mul_lo_u32 v4, v6, s2
	v_add_nc_u32_e32 v10, -1, v6
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v7, v0, v4
	v_add_nc_u32_e32 v8, -2, v7
.LBB0_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_2 Depth 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s2, v10
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v11, v8
	s_mov_b32 s6, 0
.LBB0_2:                                ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v11, 1, v11
	v_or_b32_e32 v5, v11, v10
	v_cmp_gt_i32_e64 s1, s2, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e64 s0, -1, v5
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=2
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[4:5]
	v_add_co_u32 v12, s0, s4, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s0, s5, v13, s0
	global_load_b32 v5, v[12:13], off
	global_load_b32 v12, v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, v12, v5
	global_store_b32 v[2:3], v5, off
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_i32_e64 s0, v11, v7
	v_add_nc_u32_e32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s6, s0, s6
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_2
; %bb.5:                                ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_add_nc_u32_e32 v4, 1, v10
	v_cmp_gt_i32_e32 vcc_lo, v10, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v10, v4 :: v_dual_add_nc_u32 v9, s2, v9
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_1
; %bb.6:
	s_or_b32 exec_lo, exec_lo, s3
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v0, v[0:1], off
	global_load_b32 v1, v[2:3], off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v1, v0
	global_store_b32 v[2:3], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16countActiveNeigbPiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16countActiveNeigbPiS_i, .Lfunc_end0-_Z16countActiveNeigbPiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 604
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z12updateStatesPiS_    ; -- Begin function _Z12updateStatesPiS_
	.globl	_Z12updateStatesPiS_
	.p2align	8
	.type	_Z12updateStatesPiS_,@function
_Z12updateStatesPiS_:                   ; @_Z12updateStatesPiS_
; %bb.0:
	s_load_b32 s4, s[0:1], 0x1c
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s2, s4, 16
	s_and_b32 s4, s4, 0xffff
	s_mul_i32 s15, s15, s2
	s_load_b128 s[0:3], s[0:1], 0x0
	v_add3_u32 v3, s15, s14, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v3, s4, v[0:1]
	s_mov_b32 s4, exec_lo
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v3, vcc_lo
	s_mov_b32 s0, 0
                                        ; implicit-def: $sgpr1
	global_load_b32 v4, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v4
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB1_4
; %bb.1:                                ; %LeafBlock26
	s_mov_b32 s1, 1
	s_mov_b32 s5, -1
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 1, v4
	s_cbranch_execz .LBB1_3
; %bb.2:
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v2, -2, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, 2, v2
	s_or_not1_b32 s5, vcc_lo, exec_lo
.LBB1_3:                                ; %Flow28
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s5, exec_lo
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr2_vgpr3
.LBB1_4:                                ; %Flow
	s_or_saveexec_b32 s4, s4
	v_mov_b32_e32 v5, s1
	s_xor_b32 exec_lo, exec_lo, s4
	s_cbranch_execz .LBB1_8
; %bb.5:                                ; %LeafBlock
	s_mov_b32 s5, -1
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $sgpr6
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_7
; %bb.6:
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_mov_b32 s6, 1
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 3, v2
	s_or_not1_b32 s5, vcc_lo, exec_lo
.LBB1_7:                                ; %Flow30
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, s6
	s_and_not1_b32 s0, s0, exec_lo
	s_and_b32 s1, s5, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s0, s0, s1
.LBB1_8:                                ; %Flow29
	s_or_b32 exec_lo, exec_lo, s4
	s_and_saveexec_b32 s1, s0
; %bb.9:
	v_mov_b32_e32 v5, 0
; %bb.10:
	s_or_b32 exec_lo, exec_lo, s1
	global_store_b32 v[0:1], v5, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12updateStatesPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z12updateStatesPiS_, .Lfunc_end1-_Z12updateStatesPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 340
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16countActiveNeigbPiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16countActiveNeigbPiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12updateStatesPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12updateStatesPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
