// /usr/local/cuda/bin/nvcc task1.cu -o task1
// nvcc task1.cu -o task1
//./task1

#include <stdio.h>  
#include <stdlib.h>
#include <math.h>

__global__ void solver(double *T_new, const double *T_old, int cols, int rows)
{
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    int row = blockIdx.y * blockDim.y + threadIdx.y;
  
    int idx = (row*cols + col);
          
    if (row < rows-1 && col < cols-1 && row > 0 && col > 0) 
    {
        T_new[idx] =  0.25*(T_old[idx+cols] + T_old[idx-cols] + T_old[idx-1] + T_old[idx+1]);
    }
}

int main()
{
    int M = 200; //rows
    int N = 200; //columns
    int arrSize = M * N * sizeof(double);
    int maxiter = 100;
    double err;
    int iter;

    double *T_new = (double *) malloc(arrSize);
    double *T_old = (double *) malloc(arrSize);

    int i, j;
    double temp = 1.0;

    for(i = 0; i < M; i++)                 
    {   
        for (j = 0; j < N; j++) 
        {
            T_old[i*N + j] = 0.0;
            T_new[i*N + j] = 0.0;
        }
    }

    for (j = 0; j < N; j++) 
    {
        T_old[0*N + j] = temp;
        T_new[0*N + j] = temp;
    }
    
    for (j = 0; j < N; j++) 
    {
        T_old[(N-1)*N + j] = 0.0;
        T_new[(N-1)*N + j] = 0.0;
    }
    
    for (i = 0; i < M; i++) 
    {
        T_old[i*N + 0] = 0.0;
        T_new[i*N + 0] = 0.0;
    }
    
    for (i = 0; i < M; i++) 
    {
        T_old[i*N + N-1] = 0.0;
        T_new[i*N + N-1] = 0.0;
    }
    
    double *T_new_d, *T_old_d;
    cudaMalloc(&T_new_d, arrSize);
    cudaMalloc(&T_old_d, arrSize);
    printf("Allocate Device memory for matrices\n");

    cudaMemcpy(T_new_d, T_new, arrSize, cudaMemcpyHostToDevice);
    cudaMemcpy(T_old_d, T_old, arrSize, cudaMemcpyHostToDevice);
    printf("Copy matrices from the host memory to the CUDA device\n");

    const dim3 BLOCK_DIM(32, 32); // 1024 threads
    const dim3 GRID_DIM( (N-1)/BLOCK_DIM.x+1, (M-1)/BLOCK_DIM.y+1);
    printf("CUDA kernel launch with BLOCK_DIM[%d %d] GRID_DIM[%d %d]\n", BLOCK_DIM.x, BLOCK_DIM.y, GRID_DIM.x, GRID_DIM.y);
    		
    for (iter = 0; iter < maxiter; iter++)
    {
        solver<<<GRID_DIM, BLOCK_DIM>>>(T_new_d, T_old_d, N, M);  
        solver<<<GRID_DIM, BLOCK_DIM>>>(T_old_d, T_new_d, N, M); 
        if (iter%10 == 0)
        { 
        	cudaMemcpy(T_new, T_new_d, arrSize, cudaMemcpyDeviceToHost);
    		cudaMemcpy(T_old, T_old_d, arrSize, cudaMemcpyDeviceToHost);
        	err = 0.0; 
        	for(i = 1; i < (M-1); i++)                  
        	{
        	    for(j = 1; j < (N-1); j++)               
        	    {
        	       if (fabs(T_old[i*N + j]-T_new[i*N + j]) > err) err = fabs(T_old[i*N + j]-T_new[i*N + j]);
        	    }
        	}
        	printf("|%d| %f\n", iter, err);
        }
    }    
    cudaDeviceSynchronize();

    printf("Done solving\n");

    cudaMemcpy(T_new, T_new_d, arrSize, cudaMemcpyDeviceToHost);
    cudaMemcpy(T_old, T_old_d, arrSize, cudaMemcpyDeviceToHost);
    printf("Copy matrices from the CUDA device to the host memory\n");

    cudaFree(T_new_d);
    cudaFree(T_old_d);
    free(T_new);
    free(T_old);
    printf("Free device and device memory\n");
}

	.file	"tmpxft_002f3351_00000000-6_task1.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z30__device_stub__Z6solverPdPKdiiPdPKdii
	.type	_Z30__device_stub__Z6solverPdPKdiiPdPKdii, @function
_Z30__device_stub__Z6solverPdPKdiiPdPKdii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6solverPdPKdii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z30__device_stub__Z6solverPdPKdiiPdPKdii, .-_Z30__device_stub__Z6solverPdPKdiiPdPKdii
	.globl	_Z6solverPdPKdii
	.type	_Z6solverPdPKdii, @function
_Z6solverPdPKdii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6solverPdPKdiiPdPKdii
	.cfi_endproc
.LFE2053:
	.size	_Z6solverPdPKdii, .-_Z6solverPdPKdii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Allocate Device memory for matrices\n"
.LC3:
	.string	"Copy matrices from the host memory to the CUDA device\n"
.LC4:
	.string	"CUDA kernel launch with BLOCK_DIM[%d %d] GRID_DIM[%d %d]\n"
.LC6:
	.string	"|%d| %f\n"
.LC7:
	.string	"Done solving\n"
.LC8:
	.string	"Copy matrices from the CUDA device to the host memory\n"
.LC9:
	.string	"Free device and device memory\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$320000, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$320000, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$80000, %ecx
	movsd	.LC1(%rip), %xmm0
	movq	%rax, %rbx
	xorl	%eax, %eax
	movq	%rbx, %rdi
	rep stosl
	movl	$80000, %ecx
	movq	%rbp, %rdi
	rep stosl
	xorl	%eax, %eax
.L9:
	movsd	%xmm0, (%rbx,%rax)
	movsd	%xmm0, 0(%rbp,%rax)
	addq	$8, %rax
	cmpq	$1600, %rax
	jne	.L9
	leaq	318400(%rbx), %rdx
	xorl	%eax, %eax
	movl	$400, %ecx
	movq	%rdx, %rdi
	leaq	318400(%rbp), %rdx
	rep stosl
	movl	$400, %ecx
	movq	%rdx, %rdi
	rep stosl
	xorl	%eax, %eax
.L10:
	movq	$0x000000000, (%rbx,%rax)
	movq	$0x000000000, 0(%rbp,%rax)
	addq	$1600, %rax
	cmpq	$320000, %rax
	jne	.L10
	movl	$1592, %eax
.L11:
	movq	$0x000000000, (%rbx,%rax)
	movq	$0x000000000, 0(%rbp,%rax)
	addq	$1600, %rax
	cmpq	$321592, %rax
	jne	.L11
	movq	%rsp, %rdi
	movl	$320000, %esi
	xorl	%r12d, %r12d
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$320000, %esi
	call	cudaMalloc@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$320000, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$320000, %edx
	call	cudaMemcpy@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$7, %r9d
	movl	$7, %r8d
	movabsq	$30064771079, %rax
	movq	%rax, 28(%rsp)
	movl	$32, %ecx
	xorl	%eax, %eax
	movl	$32, %edx
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	call	__printf_chk@PLT
.L19:
	movl	24(%rsp), %ecx
	movq	28(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$137438953504, %rdx
	movl	36(%rsp), %esi
	movq	%rdx, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$200, %ecx
	movl	$200, %edx
	call	_Z30__device_stub__Z6solverPdPKdiiPdPKdii
.L12:
	movl	24(%rsp), %ecx
	movq	16(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	28(%rsp), %rdi
	movl	36(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$200, %ecx
	movl	$200, %edx
	call	_Z30__device_stub__Z6solverPdPKdiiPdPKdii
.L13:
	movl	%r12d, %eax
	movl	$10, %ecx
	cltd
	idivl	%ecx
	testl	%edx, %edx
	jne	.L14
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movl	$320000, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movl	$320000, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movl	$1600, %edx
	xorps	%xmm1, %xmm1
.L15:
	movq	%rdx, %rax
	movl	$1, %ecx
.L17:
	movsd	8(%rbx,%rax), %xmm0
	subsd	8(%rbp,%rax), %xmm0
	incl	%ecx
	addq	$8, %rax
	andps	.LC5(%rip), %xmm0
	maxsd	%xmm1, %xmm0
	movaps	%xmm0, %xmm1
	cmpl	$199, %ecx
	jne	.L17
	addq	$1600, %rdx
	cmpq	$318400, %rdx
	jne	.L15
	movl	%r12d, %edx
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
.L14:
	incl	%r12d
	cmpl	$100, %r12d
	jne	.L19
	call	cudaDeviceSynchronize@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$320000, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$320000, %edx
	call	cudaMemcpy@PLT
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	xorl	%eax, %eax
	movl	$2, %edi
	leaq	.LC9(%rip), %rsi
	call	__printf_chk@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z6solverPdPKdii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6solverPdPKdii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	0
	.long	1072693248
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC5:
	.long	-1
	.long	2147483647
	.long	0
	.long	0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// /usr/local/cuda/bin/nvcc task1.cu -o task1
// nvcc task1.cu -o task1
//./task1


#include <hip/hip_runtime.h>
#include <stdio.h>  
#include <stdlib.h>
#include <math.h>

__global__ void solver(double *T_new, const double *T_old, int cols, int rows)
{
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    int row = blockIdx.y * blockDim.y + threadIdx.y;
  
    int idx = (row*cols + col);
          
    if (row < rows-1 && col < cols-1 && row > 0 && col > 0) 
    {
        T_new[idx] =  0.25*(T_old[idx+cols] + T_old[idx-cols] + T_old[idx-1] + T_old[idx+1]);
    }
}

int main()
{
    int M = 200; //rows
    int N = 200; //columns
    int arrSize = M * N * sizeof(double);
    int maxiter = 100;
    double err;
    int iter;

    double *T_new = (double *) malloc(arrSize);
    double *T_old = (double *) malloc(arrSize);

    int i, j;
    double temp = 1.0;

    for(i = 0; i < M; i++)                 
    {   
        for (j = 0; j < N; j++) 
        {
            T_old[i*N + j] = 0.0;
            T_new[i*N + j] = 0.0;
        }
    }

    for (j = 0; j < N; j++) 
    {
        T_old[0*N + j] = temp;
        T_new[0*N + j] = temp;
    }
    
    for (j = 0; j < N; j++) 
    {
        T_old[(N-1)*N + j] = 0.0;
        T_new[(N-1)*N + j] = 0.0;
    }
    
    for (i = 0; i < M; i++) 
    {
        T_old[i*N + 0] = 0.0;
        T_new[i*N + 0] = 0.0;
    }
    
    for (i = 0; i < M; i++) 
    {
        T_old[i*N + N-1] = 0.0;
        T_new[i*N + N-1] = 0.0;
    }
    
    double *T_new_d, *T_old_d;
    hipMalloc(&T_new_d, arrSize);
    hipMalloc(&T_old_d, arrSize);
    printf("Allocate Device memory for matrices\n");

    hipMemcpy(T_new_d, T_new, arrSize, hipMemcpyHostToDevice);
    hipMemcpy(T_old_d, T_old, arrSize, hipMemcpyHostToDevice);
    printf("Copy matrices from the host memory to the CUDA device\n");

    const dim3 BLOCK_DIM(32, 32); // 1024 threads
    const dim3 GRID_DIM( (N-1)/BLOCK_DIM.x+1, (M-1)/BLOCK_DIM.y+1);
    printf("CUDA kernel launch with BLOCK_DIM[%d %d] GRID_DIM[%d %d]\n", BLOCK_DIM.x, BLOCK_DIM.y, GRID_DIM.x, GRID_DIM.y);
    		
    for (iter = 0; iter < maxiter; iter++)
    {
        solver<<<GRID_DIM, BLOCK_DIM>>>(T_new_d, T_old_d, N, M);  
        solver<<<GRID_DIM, BLOCK_DIM>>>(T_old_d, T_new_d, N, M); 
        if (iter%10 == 0)
        { 
        	hipMemcpy(T_new, T_new_d, arrSize, hipMemcpyDeviceToHost);
    		hipMemcpy(T_old, T_old_d, arrSize, hipMemcpyDeviceToHost);
        	err = 0.0; 
        	for(i = 1; i < (M-1); i++)                  
        	{
        	    for(j = 1; j < (N-1); j++)               
        	    {
        	       if (fabs(T_old[i*N + j]-T_new[i*N + j]) > err) err = fabs(T_old[i*N + j]-T_new[i*N + j]);
        	    }
        	}
        	printf("|%d| %f\n", iter, err);
        }
    }    
    hipDeviceSynchronize();

    printf("Done solving\n");

    hipMemcpy(T_new, T_new_d, arrSize, hipMemcpyDeviceToHost);
    hipMemcpy(T_old, T_old_d, arrSize, hipMemcpyDeviceToHost);
    printf("Copy matrices from the CUDA device to the host memory\n");

    hipFree(T_new_d);
    hipFree(T_old_d);
    free(T_new);
    free(T_old);
    printf("Free device and device memory\n");
}

	.text
	.file	"task1.hip"
	.globl	_Z21__device_stub__solverPdPKdii # -- Begin function _Z21__device_stub__solverPdPKdii
	.type	_Z21__device_stub__solverPdPKdii,@function
_Z21__device_stub__solverPdPKdii:       # @_Z21__device_stub__solverPdPKdii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6solverPdPKdii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__solverPdPKdii, .Lfunc_end0-_Z21__device_stub__solverPdPKdii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x7fffffffffffffff              # double NaN
	.quad	0x7fffffffffffffff              # double NaN
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:                                # %.preheader148.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$1, %edi
	movl	$320000, %esi                   # imm = 0x4E200
	callq	calloc@PLT
	movq	%rax, %rbx
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	$1, %edi
	movl	$320000, %esi                   # imm = 0x4E200
	callq	calloc@PLT
	movq	%rax, %r14
	xorl	%eax, %eax
	movq	%r14, 24(%rsp)                  # 8-byte Spill
	movabsq	$4607182418800017408, %rcx      # imm = 0x3FF0000000000000
.LBB1_1:                                # %.preheader148
                                        # =>This Inner Loop Header: Depth=1
	movq	%rcx, (%r14,%rax,8)
	movq	%rcx, (%rbx,%rax,8)
	incq	%rax
	cmpq	$200, %rax
	jne	.LBB1_1
# %bb.2:                                # %.preheader147.preheader
	movl	$318400, %r15d                  # imm = 0x4DBC0
	movq	24(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%r15), %rdi
	xorl	%r12d, %r12d
	movl	$1600, %edx                     # imm = 0x640
	xorl	%esi, %esi
	callq	memset@PLT
	addq	32(%rsp), %r15                  # 8-byte Folded Reload
	movl	$1600, %edx                     # imm = 0x640
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	xorl	%eax, %eax
.LBB1_3:                                # %.preheader146
                                        # =>This Inner Loop Header: Depth=1
	movq	%r12, (%r14,%rax)
	movq	%r12, (%rbx,%rax)
	addq	$1600, %rax                     # imm = 0x640
	cmpq	$320000, %rax                   # imm = 0x4E200
	jne	.LBB1_3
# %bb.4:                                # %.preheader145.preheader
	movl	$1592, %eax                     # imm = 0x638
	xorl	%ecx, %ecx
.LBB1_5:                                # %.preheader145
                                        # =>This Inner Loop Header: Depth=1
	movq	%rcx, (%r14,%rax)
	movq	%rcx, (%rbx,%rax)
	addq	$1600, %rax                     # imm = 0x640
	cmpq	$321592, %rax                   # imm = 0x4E838
	jne	.LBB1_5
# %bb.6:
	movabsq	$137438953504, %r13             # imm = 0x2000000020
	movabsq	$30064771079, %rbp              # imm = 0x700000007
	leaq	16(%rsp), %r15
	movl	$320000, %esi                   # imm = 0x4E200
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %r12
	movl	$320000, %esi                   # imm = 0x4E200
	movq	%r12, %rdi
	callq	hipMalloc
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	(%r15), %rdi
	movl	$320000, %edx                   # imm = 0x4E200
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$320000, %edx                   # imm = 0x4E200
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorl	%r15d, %r15d
	movl	$.L.str.2, %edi
	movl	$32, %esi
	movl	$32, %edx
	movl	$7, %ecx
	movl	$7, %r8d
	xorl	%eax, %eax
	callq	printf
	movl	$1608, %eax                     # imm = 0x648
	addq	%rax, 32(%rsp)                  # 8-byte Folded Spill
	addq	%rax, 24(%rsp)                  # 8-byte Folded Spill
	movl	$1600, %r12d                    # imm = 0x640
.LBB1_7:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_13 Depth 2
                                        #       Child Loop BB1_14 Depth 3
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.8:                                #   in Loop: Header=BB1_7 Depth=1
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$200, %edx
	movl	$200, %ecx
	callq	_Z21__device_stub__solverPdPKdii
.LBB1_9:                                #   in Loop: Header=BB1_7 Depth=1
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_11
# %bb.10:                               #   in Loop: Header=BB1_7 Depth=1
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$200, %edx
	movl	$200, %ecx
	callq	_Z21__device_stub__solverPdPKdii
.LBB1_11:                               #   in Loop: Header=BB1_7 Depth=1
	imull	$-51, %r15d, %eax
	rorb	%al
	cmpb	$25, %al
	ja	.LBB1_17
# %bb.12:                               #   in Loop: Header=BB1_7 Depth=1
	movq	16(%rsp), %rsi
	movl	$320000, %edx                   # imm = 0x4E200
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	movl	$320000, %edx                   # imm = 0x4E200
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorpd	%xmm0, %xmm0
	movl	$1, %eax
	movq	24(%rsp), %rcx                  # 8-byte Reload
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movapd	.LCPI1_0(%rip), %xmm2           # xmm2 = [NaN,NaN]
.LBB1_13:                               # %.preheader
                                        #   Parent Loop BB1_7 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_14 Depth 3
	xorl	%esi, %esi
.LBB1_14:                               #   Parent Loop BB1_7 Depth=1
                                        #     Parent Loop BB1_13 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movapd	%xmm0, %xmm1
	movsd	(%rcx,%rsi,8), %xmm0            # xmm0 = mem[0],zero
	subsd	(%rdx,%rsi,8), %xmm0
	andpd	%xmm2, %xmm0
	maxsd	%xmm1, %xmm0
	incq	%rsi
	cmpq	$198, %rsi
	jne	.LBB1_14
# %bb.15:                               #   in Loop: Header=BB1_13 Depth=2
	incq	%rax
	addq	%r12, %rdx
	addq	%r12, %rcx
	cmpq	$199, %rax
	jne	.LBB1_13
# %bb.16:                               #   in Loop: Header=BB1_7 Depth=1
	movl	$.L.str.3, %edi
	movl	%r15d, %esi
	movb	$1, %al
	callq	printf
.LBB1_17:                               #   in Loop: Header=BB1_7 Depth=1
	incl	%r15d
	cmpl	$100, %r15d
	jne	.LBB1_7
# %bb.18:
	callq	hipDeviceSynchronize
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	16(%rsp), %rsi
	movl	$320000, %edx                   # imm = 0x4E200
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	movl	$320000, %edx                   # imm = 0x4E200
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6solverPdPKdii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6solverPdPKdii,@object        # @_Z6solverPdPKdii
	.section	.rodata,"a",@progbits
	.globl	_Z6solverPdPKdii
	.p2align	3, 0x0
_Z6solverPdPKdii:
	.quad	_Z21__device_stub__solverPdPKdii
	.size	_Z6solverPdPKdii, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"CUDA kernel launch with BLOCK_DIM[%d %d] GRID_DIM[%d %d]\n"
	.size	.L.str.2, 58

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"|%d| %f\n"
	.size	.L.str.3, 9

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6solverPdPKdii"
	.size	.L__unnamed_1, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Allocate Device memory for matrices"
	.size	.Lstr, 36

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Copy matrices from the host memory to the CUDA device"
	.size	.Lstr.1, 54

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Done solving"
	.size	.Lstr.2, 13

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Copy matrices from the CUDA device to the host memory"
	.size	.Lstr.3, 54

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Free device and device memory"
	.size	.Lstr.4, 30

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__solverPdPKdii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6solverPdPKdii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6solverPdPKdii        ; -- Begin function _Z6solverPdPKdii
	.globl	_Z6solverPdPKdii
	.p2align	8
	.type	_Z6solverPdPKdii,@function
_Z6solverPdPKdii:                       ; @_Z6solverPdPKdii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_add_i32 s2, s5, -1
	s_add_i32 s3, s4, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_min_i32_e32 v2, v1, v0
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	v_cmp_gt_i32_e64 s2, s3, v0
	v_cmp_lt_i32_e64 s3, 0, v2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 s2, s2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
	s_load_b128 s[0:3], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, s4, v2
	v_subrev_nc_u32_e32 v3, s4, v2
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v3, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_clause 0x1
	global_load_b64 v[0:1], v[0:1], off
	global_load_b64 v[4:5], v[3:4], off
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_clause 0x1
	global_load_b64 v[8:9], v[6:7], off offset:-8
	global_load_b64 v[6:7], v[6:7], off offset:8
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_waitcnt vmcnt(2)
	v_add_f64 v[0:1], v[0:1], v[4:5]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[8:9]
	s_waitcnt vmcnt(0)
	v_add_f64 v[0:1], v[0:1], v[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[0:1], -2
	global_store_b64 v[2:3], v[0:1], off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6solverPdPKdii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6solverPdPKdii, .Lfunc_end0-_Z6solverPdPKdii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 384
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6solverPdPKdii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6solverPdPKdii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
