#include <iostream>
#include <cuda.h>
#include <cstdlib>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>


__global__ 
void AsyncvecAddK(int *A, int *B, int *C, int len, int offset)
{
	int i = threadIdx.x+blockDim.x*blockIdx.x+offset;
        if(i<len) C[i] = A[i] - B[i];

}

__global__
void vecAddK(int *A, int *B, int *C, int len)
{
	int i = threadIdx.x+blockDim.x*blockIdx.x;
        if(i<len) C[i] = A[i] - B[i];

}


void populateArray(int a[], int l){
        time(NULL);
        int prev = rand() % 10;
        int nxt;
	for(int i = 1; i < l; i++){
        	do{
		    nxt = rand() % 10; 
                }while(nxt==prev);
            a[i] = nxt;
            prev = nxt;
	}
}

__host__
void svecAdd(){
    
    int const items = 1;
    int const len = 1024*1024;
    int const nStreams = 4;
    ///Device query boilerplate
    int deviceCount = 0;
    
    cudaError_t error_id = cudaGetDeviceCount(&deviceCount);
    
    if (error_id != cudaSuccess)
    {
        printf("cudaGetDeviceCount returned %d\n-> %s\n", (int)error_id, cudaGetErrorString(error_id));
        printf("Result = FAIL\n");
        exit(EXIT_FAILURE);
    }

    // This function call returns 0 if there are no CUDA capable devices.
    if (deviceCount == 0)
    {
        printf("There are no available device(s) that support CUDA\n");
	return;
    }
    else
    {
        printf("Detected %d CUDA Capable device(s)\n", deviceCount);
    }
    int fastestDevice = 0;
    int fastestSpeed = 0;
    int bx = 0;
    int gx = 0;
    for (int dev = 0; dev < deviceCount; ++dev)
    {
        cudaSetDevice(dev);
        cudaDeviceProp deviceProp;
        cudaGetDeviceProperties(&deviceProp, dev);
        int speed = deviceProp.multiProcessorCount;
        if(speed > fastestSpeed){
	    fastestDevice = dev;
            fastestSpeed = speed;
            bx = deviceProp.maxThreadsDim[0];
            gx = deviceProp.maxGridSize[0];
	}
    }
    cudaSetDevice(fastestDevice);
    
    int BLOCK = 256; 
    while(BLOCK * gx < len && BLOCK < bx){///While current block size is too small  
        BLOCK *= 2;
    }

    //int A[items][len];
    //int B[items][len];
    
    ///float A[SIZE];float B[SIZE];float C[SIZE];
    //for(int i=0; i < items; i++){
        //int a[len];
	//populateArray(a, len);
        //int b[len];
	//populateArray(b, len);
        //for(int j=0; j < len; j++){
        //    A[i][j] = a[j];
        //    B[i][j] = b[j];
        //}
    //}

    int size = len*sizeof(int);
    cudaStream_t stream[nStreams];
    
    int * dA;
    int * hA;
    int * dB;
    int * hB;
    int * dC;
    int * hC;
    

    ///Create streams and allocated memory to accomodate one vector
    for (int i = 0; i < nStreams; ++i){
	cudaStreamCreate(&stream[i]);
    }

    cudaMallocHost((void**)&hA, size); 
    cudaMalloc((void **) &dA, size);
    cudaMalloc((void **) &dB, size);
    cudaMallocHost((void**)&hB, size);
    cudaMalloc((void **) &dC, size);
    cudaMallocHost((void**)&hC, size);
    
    float gms = 0.0; //Time for all Asynch GPU
    float sgms = 0.0; //Time for all synch GPU
    float cms = 0.0; //Time for all CPU
    cudaEvent_t startEvent, stopEvent;
    cudaEventCreate(&startEvent);
    cudaEventCreate(&stopEvent);
    int segSize = len/nStreams;
    dim3 DimGrid = (segSize-1)/BLOCK + 1;
    dim3 DimBlock = BLOCK;
    
    for(int h = 0; h < items; h++){
        populateArray(hA, len);
        populateArray(hB, len);
        //int * hA = A[h];
        //int * hB = B[h];
        float ms;
        cudaEventRecord(startEvent,0);    
	for(int i = 0; i < nStreams; i++){ //transfer and compute with segment size
            int offset = i * segSize;
	    cudaMemcpyAsync(&dA[offset], &hA[offset], segSize*sizeof(int), cudaMemcpyHostToDevice, stream[i]);
	    cudaMemcpyAsync(&dB[offset], &hB[offset], segSize*sizeof(int), cudaMemcpyHostToDevice, stream[i]);	
	    AsyncvecAddK<<<DimGrid, DimBlock, 0 , stream[i%nStreams]>>>(dA,dB,dC,len, offset);
            cudaMemcpyAsync(&hC[offset], &dC[offset], segSize*sizeof(int), cudaMemcpyDeviceToHost, stream[i]);
            cudaStreamSynchronize(stream[i]);   
        }
        cudaEventRecord(stopEvent, 0);
        cudaEventSynchronize(stopEvent);
        cudaEventElapsedTime(&ms, startEvent, stopEvent);
        gms+=ms;
    	ms = 0.0;
        dim3 DimSGrid((len-1)/BLOCK + 1);
        dim3 DimSBlock(BLOCK);
        cudaEventRecord(startEvent,0);
	cudaMemcpy(dA, hA, size, cudaMemcpyHostToDevice);
        cudaMemcpy(dB, hB, size, cudaMemcpyHostToDevice);
        vecAddK<<<DimSGrid, DimSBlock>>>(dA, dB,dC, len);
	cudaMemcpy(hC, dC, size, cudaMemcpyDeviceToHost);
        cudaEventRecord(stopEvent, 0);
        cudaEventSynchronize(stopEvent);
        cudaEventElapsedTime(&ms, startEvent, stopEvent);
        sgms+=ms;

        time_t start, end;
        time(&start); 
        for(int j = 0; j < len; j++){//cpu
           hC[j]=hA[j]-hB[j];
	}
        time(&end);
        cms += (float) difftime(end, start)*1000;   
     }
    printf("Async GPU: %f\nGPU: %f\nCPU: %f\n", sgms/ (float) items, gms / (float) items, cms / (float) items);
    
    cudaFree(dA);cudaFree(dB);cudaFree(dC);
    for (int i = 0; i < nStreams; ++i)cudaStreamDestroy(stream[i]);
}


int main(){

    svecAdd();
    return 0;
}


	.file	"tmpxft_003409f5_00000000-6_svadd.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3640:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3640:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z13populateArrayPii
	.type	_Z13populateArrayPii, @function
_Z13populateArrayPii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$10, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	xorl	%edi, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	$1, %ebx
	call	time@PLT
	call	rand@PLT
	movl	$10, %ecx
	cltd
	idivl	%ecx
	movl	%edx, %r13d
.L3:
	cmpl	%ebx, %ebp
	jle	.L9
.L4:
	call	rand@PLT
	cltd
	idivl	%r14d
	cmpl	%edx, %r13d
	je	.L4
	movl	%edx, (%r12,%rbx,4)
	movl	%edx, %r13d
	incq	%rbx
	jmp	.L3
.L9:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z13populateArrayPii, .-_Z13populateArrayPii
	.globl	_Z38__device_stub__Z12AsyncvecAddKPiS_S_iiPiS_S_ii
	.type	_Z38__device_stub__Z12AsyncvecAddKPiS_S_iiPiS_S_ii, @function
_Z38__device_stub__Z12AsyncvecAddKPiS_S_iiPiS_S_ii:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12AsyncvecAddKPiS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L10:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z38__device_stub__Z12AsyncvecAddKPiS_S_iiPiS_S_ii, .-_Z38__device_stub__Z12AsyncvecAddKPiS_S_iiPiS_S_ii
	.globl	_Z12AsyncvecAddKPiS_S_ii
	.type	_Z12AsyncvecAddKPiS_S_ii, @function
_Z12AsyncvecAddKPiS_S_ii:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z12AsyncvecAddKPiS_S_iiPiS_S_ii
	.cfi_endproc
.LFE3663:
	.size	_Z12AsyncvecAddKPiS_S_ii, .-_Z12AsyncvecAddKPiS_S_ii
	.globl	_Z31__device_stub__Z7vecAddKPiS_S_iPiS_S_i
	.type	_Z31__device_stub__Z7vecAddKPiS_S_iPiS_S_i, @function
_Z31__device_stub__Z7vecAddKPiS_S_iPiS_S_i:
.LFB3664:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7vecAddKPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L15:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_Z31__device_stub__Z7vecAddKPiS_S_iPiS_S_i, .-_Z31__device_stub__Z7vecAddKPiS_S_iPiS_S_i
	.globl	_Z7vecAddKPiS_S_i
	.type	_Z7vecAddKPiS_S_i, @function
_Z7vecAddKPiS_S_i:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z7vecAddKPiS_S_iPiS_S_i
	.cfi_endproc
.LFE3665:
	.size	_Z7vecAddKPiS_S_i, .-_Z7vecAddKPiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"cudaGetDeviceCount returned %d\n-> %s\n"
.LC1:
	.string	"Result = FAIL\n"
.LC2:
	.string	"There are no available device(s) that support CUDA\n"
.LC3:
	.string	"Detected %d CUDA Capable device(s)\n"
.LC6:
	.string	"Async GPU: %f\nGPU: %f\nCPU: %f\n"
	.text
	.globl	_Z7svecAddv
	.type	_Z7svecAddv, @function
_Z7svecAddv:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1192, %rsp
	.cfi_def_cfa_offset 1248
	movq	%fs:40, %rax
	movq	%rax, 1176(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	xorl	%eax, %eax
	movl	%eax, 8(%rsp)
	call	cudaGetDeviceCount@PLT
	testl	%eax, %eax
	je	.L21
	movl	%eax, %edi
	movl	%eax, %ebx
	call	cudaGetErrorString@PLT
	movl	%ebx, %edx
	movl	$2, %edi
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$2, %edi
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L21:
	movl	8(%rsp), %edx
	testl	%edx, %edx
	jne	.L22
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L20
.L22:
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
	xorl	%r12d, %r12d
	xorl	%ebp, %ebp
	xorl	%r14d, %r14d
	xorl	%r13d, %r13d
	leaq	144(%rsp), %r15
.L24:
	cmpl	%ebx, 8(%rsp)
	jle	.L44
	movl	%ebx, %edi
	call	cudaSetDevice@PLT
	movl	%ebx, %esi
	movq	%r15, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movl	532(%rsp), %eax
	cmpl	%eax, %r14d
	jge	.L25
	movl	468(%rsp), %ebp
	movl	480(%rsp), %r12d
	movl	%eax, %r14d
	movl	%ebx, %r13d
.L25:
	incl	%ebx
	jmp	.L24
.L44:
	movl	%r13d, %edi
	movl	$256, %ebx
	call	cudaSetDevice@PLT
.L27:
	movl	%r12d, %eax
	imull	%ebx, %eax
	cmpl	$1048575, %eax
	jg	.L36
	cmpl	%ebx, %ebp
	jle	.L36
	addl	%ebx, %ebx
	jmp	.L27
.L36:
	leaq	144(%rsp), %r12
	xorl	%r14d, %r14d
	movq	%r12, %rdi
	movq	%r12, %r13
	call	cudaStreamCreate@PLT
	leaq	152(%rsp), %rdi
	call	cudaStreamCreate@PLT
	leaq	160(%rsp), %rdi
	call	cudaStreamCreate@PLT
	leaq	168(%rsp), %rdi
	call	cudaStreamCreate@PLT
	leaq	24(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMallocHost@PLT
	leaq	16(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMallocHost@PLT
	leaq	48(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	movl	$4194304, %esi
	leaq	56(%rsp), %rdi
	call	cudaMallocHost@PLT
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$262143, %eax
	movq	24(%rsp), %rdi
	movl	$1048576, %esi
	cltd
	movl	%ebx, 108(%rsp)
	idivl	%ebx
	incl	%eax
	movl	%eax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 100(%rsp)
	movq	%rax, 112(%rsp)
	call	_Z13populateArrayPii
	movq	40(%rsp), %rdi
	movl	$1048576, %esi
	call	_Z13populateArrayPii
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
.L31:
	movq	24(%rsp), %rsi
	movq	%r14, %rbp
	movq	0(%r13), %r8
	movl	$1, %ecx
	movq	16(%rsp), %rdi
	salq	$20, %rbp
	movl	$1048576, %edx
	addq	%rbp, %rsi
	addq	%rbp, %rdi
	call	cudaMemcpyAsync@PLT
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	0(%r13), %r8
	movl	$1048576, %edx
	addq	%rbp, %rsi
	addq	%rbp, %rdi
	call	cudaMemcpyAsync@PLT
	movl	116(%rsp), %ecx
	movq	0(%r13), %r9
	xorl	%r8d, %r8d
	movq	108(%rsp), %rdx
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	movl	%r14d, %r8d
	movq	48(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$1048576, %ecx
	movq	16(%rsp), %rdi
	sall	$18, %r8d
	call	_Z38__device_stub__Z12AsyncvecAddKPiS_S_iiPiS_S_ii
.L30:
	movq	48(%rsp), %rsi
	movq	0(%r13), %r8
	incq	%r14
	addq	$8, %r13
	movq	56(%rsp), %rdi
	movl	$2, %ecx
	movl	$1048576, %edx
	addq	%rbp, %rsi
	addq	%rbp, %rdi
	call	cudaMemcpyAsync@PLT
	movq	-8(%r13), %rdi
	call	cudaStreamSynchronize@PLT
	cmpq	$4, %r14
	jne	.L31
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	leaq	12(%rsp), %r13
	call	cudaEventRecord@PLT
	movq	72(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	%r13, %rdi
	call	cudaEventElapsedTime@PLT
	movl	$1048575, %eax
	xorps	%xmm0, %xmm0
	xorl	%esi, %esi
	cltd
	addss	12(%rsp), %xmm0
	movq	64(%rsp), %rdi
	movl	$0x00000000, 12(%rsp)
	idivl	%ebx
	movl	%ebx, 132(%rsp)
	movd	%xmm0, %ebp
	incl	%eax
	movl	%eax, 120(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 124(%rsp)
	movq	%rax, 136(%rsp)
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movq	120(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	140(%rsp), %ecx
	movq	132(%rsp), %rdx
	movl	128(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movq	48(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$1048576, %ecx
	movq	16(%rsp), %rdi
	call	_Z31__device_stub__Z7vecAddKPiS_S_iPiS_S_i
.L32:
	movq	48(%rsp), %rsi
	movq	56(%rsp), %rdi
	movl	$2, %ecx
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	72(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	64(%rsp), %rsi
	movq	72(%rsp), %rdx
	movq	%r13, %rdi
	call	cudaEventElapsedTime@PLT
	xorps	%xmm0, %xmm0
	addss	12(%rsp), %xmm0
	leaq	80(%rsp), %rdi
	movd	%xmm0, %ebx
	call	time@PLT
	movq	24(%rsp), %rdi
	movq	40(%rsp), %rsi
	xorl	%eax, %eax
	movq	56(%rsp), %rcx
.L33:
	movl	(%rdi,%rax), %edx
	subl	(%rsi,%rax), %edx
	movl	%edx, (%rcx,%rax)
	addq	$4, %rax
	cmpq	$4194304, %rax
	jne	.L33
	leaq	88(%rsp), %rdi
	call	time@PLT
	movq	80(%rsp), %rsi
	movq	88(%rsp), %rdi
	call	difftime@PLT
	movd	%ebx, %xmm3
	movd	%ebp, %xmm4
	movb	$3, %al
	cvtsd2ss	%xmm0, %xmm2
	xorps	%xmm0, %xmm0
	movl	$2, %edi
	cvtss2sd	%xmm4, %xmm1
	mulss	.LC5(%rip), %xmm2
	leaq	.LC6(%rip), %rsi
	xorl	%ebx, %ebx
	addss	%xmm0, %xmm2
	cvtss2sd	%xmm3, %xmm0
	cvtss2sd	%xmm2, %xmm2
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
.L34:
	movq	(%r12,%rbx,8), %rdi
	incq	%rbx
	call	cudaStreamDestroy@PLT
	cmpq	$4, %rbx
	jne	.L34
.L20:
	movq	1176(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$1192, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z7svecAddv, .-_Z7svecAddv
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z7svecAddv
	xorl	%eax, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z7vecAddKPiS_S_i"
.LC8:
	.string	"_Z12AsyncvecAddKPiS_S_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3667:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z7vecAddKPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12AsyncvecAddKPiS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3667:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC5:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <hip/hip_runtime.h>
#include <cstdlib>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>


__global__ 
void AsyncvecAddK(int *A, int *B, int *C, int len, int offset)
{
	int i = threadIdx.x+blockDim.x*blockIdx.x+offset;
        if(i<len) C[i] = A[i] - B[i];

}

__global__
void vecAddK(int *A, int *B, int *C, int len)
{
	int i = threadIdx.x+blockDim.x*blockIdx.x;
        if(i<len) C[i] = A[i] - B[i];

}


void populateArray(int a[], int l){
        time(NULL);
        int prev = rand() % 10;
        int nxt;
	for(int i = 1; i < l; i++){
        	do{
		    nxt = rand() % 10; 
                }while(nxt==prev);
            a[i] = nxt;
            prev = nxt;
	}
}

__host__
void svecAdd(){
    
    int const items = 1;
    int const len = 1024*1024;
    int const nStreams = 4;
    ///Device query boilerplate
    int deviceCount = 0;
    
    hipError_t error_id = hipGetDeviceCount(&deviceCount);
    
    if (error_id != hipSuccess)
    {
        printf("hipGetDeviceCount returned %d\n-> %s\n", (int)error_id, hipGetErrorString(error_id));
        printf("Result = FAIL\n");
        exit(EXIT_FAILURE);
    }

    // This function call returns 0 if there are no CUDA capable devices.
    if (deviceCount == 0)
    {
        printf("There are no available device(s) that support CUDA\n");
	return;
    }
    else
    {
        printf("Detected %d CUDA Capable device(s)\n", deviceCount);
    }
    int fastestDevice = 0;
    int fastestSpeed = 0;
    int bx = 0;
    int gx = 0;
    for (int dev = 0; dev < deviceCount; ++dev)
    {
        hipSetDevice(dev);
        hipDeviceProp_t deviceProp;
        hipGetDeviceProperties(&deviceProp, dev);
        int speed = deviceProp.multiProcessorCount;
        if(speed > fastestSpeed){
	    fastestDevice = dev;
            fastestSpeed = speed;
            bx = deviceProp.maxThreadsDim[0];
            gx = deviceProp.maxGridSize[0];
	}
    }
    hipSetDevice(fastestDevice);
    
    int BLOCK = 256; 
    while(BLOCK * gx < len && BLOCK < bx){///While current block size is too small  
        BLOCK *= 2;
    }

    //int A[items][len];
    //int B[items][len];
    
    ///float A[SIZE];float B[SIZE];float C[SIZE];
    //for(int i=0; i < items; i++){
        //int a[len];
	//populateArray(a, len);
        //int b[len];
	//populateArray(b, len);
        //for(int j=0; j < len; j++){
        //    A[i][j] = a[j];
        //    B[i][j] = b[j];
        //}
    //}

    int size = len*sizeof(int);
    hipStream_t stream[nStreams];
    
    int * dA;
    int * hA;
    int * dB;
    int * hB;
    int * dC;
    int * hC;
    

    ///Create streams and allocated memory to accomodate one vector
    for (int i = 0; i < nStreams; ++i){
	hipStreamCreate(&stream[i]);
    }

    hipHostMalloc((void**)&hA, size, hipHostMallocDefault); 
    hipMalloc((void **) &dA, size);
    hipMalloc((void **) &dB, size);
    hipHostMalloc((void**)&hB, size, hipHostMallocDefault);
    hipMalloc((void **) &dC, size);
    hipHostMalloc((void**)&hC, size, hipHostMallocDefault);
    
    float gms = 0.0; //Time for all Asynch GPU
    float sgms = 0.0; //Time for all synch GPU
    float cms = 0.0; //Time for all CPU
    hipEvent_t startEvent, stopEvent;
    hipEventCreate(&startEvent);
    hipEventCreate(&stopEvent);
    int segSize = len/nStreams;
    dim3 DimGrid = (segSize-1)/BLOCK + 1;
    dim3 DimBlock = BLOCK;
    
    for(int h = 0; h < items; h++){
        populateArray(hA, len);
        populateArray(hB, len);
        //int * hA = A[h];
        //int * hB = B[h];
        float ms;
        hipEventRecord(startEvent,0);    
	for(int i = 0; i < nStreams; i++){ //transfer and compute with segment size
            int offset = i * segSize;
	    hipMemcpyAsync(&dA[offset], &hA[offset], segSize*sizeof(int), hipMemcpyHostToDevice, stream[i]);
	    hipMemcpyAsync(&dB[offset], &hB[offset], segSize*sizeof(int), hipMemcpyHostToDevice, stream[i]);	
	    AsyncvecAddK<<<DimGrid, DimBlock, 0 , stream[i%nStreams]>>>(dA,dB,dC,len, offset);
            hipMemcpyAsync(&hC[offset], &dC[offset], segSize*sizeof(int), hipMemcpyDeviceToHost, stream[i]);
            hipStreamSynchronize(stream[i]);   
        }
        hipEventRecord(stopEvent, 0);
        hipEventSynchronize(stopEvent);
        hipEventElapsedTime(&ms, startEvent, stopEvent);
        gms+=ms;
    	ms = 0.0;
        dim3 DimSGrid((len-1)/BLOCK + 1);
        dim3 DimSBlock(BLOCK);
        hipEventRecord(startEvent,0);
	hipMemcpy(dA, hA, size, hipMemcpyHostToDevice);
        hipMemcpy(dB, hB, size, hipMemcpyHostToDevice);
        vecAddK<<<DimSGrid, DimSBlock>>>(dA, dB,dC, len);
	hipMemcpy(hC, dC, size, hipMemcpyDeviceToHost);
        hipEventRecord(stopEvent, 0);
        hipEventSynchronize(stopEvent);
        hipEventElapsedTime(&ms, startEvent, stopEvent);
        sgms+=ms;

        time_t start, end;
        time(&start); 
        for(int j = 0; j < len; j++){//cpu
           hC[j]=hA[j]-hB[j];
	}
        time(&end);
        cms += (float) difftime(end, start)*1000;   
     }
    printf("Async GPU: %f\nGPU: %f\nCPU: %f\n", sgms/ (float) items, gms / (float) items, cms / (float) items);
    
    hipFree(dA);hipFree(dB);hipFree(dC);
    for (int i = 0; i < nStreams; ++i)hipStreamDestroy(stream[i]);
}


int main(){

    svecAdd();
    return 0;
}


	.text
	.file	"svadd.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z27__device_stub__AsyncvecAddKPiS_S_ii # -- Begin function _Z27__device_stub__AsyncvecAddKPiS_S_ii
	.type	_Z27__device_stub__AsyncvecAddKPiS_S_ii,@function
_Z27__device_stub__AsyncvecAddKPiS_S_ii: # @_Z27__device_stub__AsyncvecAddKPiS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12AsyncvecAddKPiS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__AsyncvecAddKPiS_S_ii, .Lfunc_end0-_Z27__device_stub__AsyncvecAddKPiS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__vecAddKPiS_S_i # -- Begin function _Z22__device_stub__vecAddKPiS_S_i
	.type	_Z22__device_stub__vecAddKPiS_S_i,@function
_Z22__device_stub__vecAddKPiS_S_i:      # @_Z22__device_stub__vecAddKPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7vecAddKPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z22__device_stub__vecAddKPiS_S_i, .Lfunc_end1-_Z22__device_stub__vecAddKPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z13populateArrayPii            # -- Begin function _Z13populateArrayPii
	.type	_Z13populateArrayPii,@function
_Z13populateArrayPii:                   # @_Z13populateArrayPii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movq	%rdi, %rbx
	xorl	%edi, %edi
	callq	time
	callq	rand
	cmpl	$2, %ebp
	jl	.LBB2_4
# %bb.1:                                # %.preheader.preheader
	movslq	%eax, %r14
	imulq	$1717986919, %r14, %rax         # imm = 0x66666667
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$34, %rax
	addl	%ecx, %eax
	addl	%eax, %eax
	leal	(%rax,%rax,4), %eax
	subl	%eax, %r14d
	movl	%ebp, %r15d
	movl	$1, %r12d
.LBB2_2:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	cmpl	%r14d, %eax
	je	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_2 Depth=1
	movl	%eax, (%rbx,%r12,4)
	incq	%r12
	movl	%eax, %r14d
	cmpq	%r15, %r12
	jne	.LBB2_2
.LBB2_4:                                # %._crit_edge
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z13populateArrayPii, .Lfunc_end2-_Z13populateArrayPii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z7svecAddv
.LCPI3_0:
	.long	0x447a0000                      # float 1000
.LCPI3_1:
	.long	0x00000000                      # float 0
	.text
	.globl	_Z7svecAddv
	.type	_Z7svecAddv,@function
_Z7svecAddv:                            # @_Z7svecAddv
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1592, %rsp                     # imm = 0x638
	.cfi_def_cfa_offset 1648
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	12(%rsp), %rdi
	movl	$0, (%rdi)
	callq	hipGetDeviceCount
	testl	%eax, %eax
	jne	.LBB3_24
# %bb.1:
	movl	12(%rsp), %esi
	testl	%esi, %esi
	je	.LBB3_2
# %bb.3:
	xorl	%r15d, %r15d
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, 12(%rsp)
	movl	$0, %r13d
	movl	$0, %ebx
	jle	.LBB3_8
# %bb.4:                                # %.lr.ph
	xorl	%ebx, %ebx
	leaq	112(%rsp), %r14
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
	xorl	%r15d, %r15d
	xorl	%ebp, %ebp
.LBB3_5:                                # =>This Inner Loop Header: Depth=1
	movl	%ebp, %edi
	callq	hipSetDevice
	movq	%r14, %rdi
	movl	%ebp, %esi
	callq	hipGetDevicePropertiesR0600
	movl	500(%rsp), %eax
	cmpl	%r12d, %eax
	jle	.LBB3_7
# %bb.6:                                #   in Loop: Header=BB3_5 Depth=1
	movl	436(%rsp), %r13d
	movl	448(%rsp), %r15d
	movl	%eax, %r12d
	movl	%ebp, %ebx
.LBB3_7:                                #   in Loop: Header=BB3_5 Depth=1
	incl	%ebp
	cmpl	12(%rsp), %ebp
	jl	.LBB3_5
.LBB3_8:                                # %._crit_edge
	movl	%ebx, %edi
	callq	hipSetDevice
	movl	$256, %eax                      # imm = 0x100
.LBB3_9:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, %r12d
	imull	%r15d, %eax
	cmpl	$1048575, %eax                  # imm = 0xFFFFF
	jg	.LBB3_11
# %bb.10:                               #   in Loop: Header=BB3_9 Depth=1
	leal	(%r12,%r12), %eax
	cmpl	%r13d, %r12d
	jl	.LBB3_9
.LBB3_11:
	xorl	%ebx, %ebx
.LBB3_12:                               # =>This Inner Loop Header: Depth=1
	leaq	(%rsp,%rbx), %rdi
	addq	$112, %rdi
	callq	hipStreamCreate
	addq	$8, %rbx
	cmpq	$32, %rbx
	jne	.LBB3_12
# %bb.13:
	movabsq	$4294967296, %rbx               # imm = 0x100000000
	leaq	56(%rsp), %rdi
	xorl	%r14d, %r14d
	movl	$4194304, %esi                  # imm = 0x400000
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	48(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	leaq	80(%rsp), %r13
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%r13, %rdi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	32(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	leaq	72(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	64(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipEventCreate
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	movl	$262143, %eax                   # imm = 0x3FFFF
	xorl	%edx, %edx
	divl	%r12d
                                        # kill: def $eax killed $eax def $rax
	leaq	(%rbx,%rax), %r15
	incq	%r15
	movl	%r12d, %eax
	btsq	$32, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	leaq	56(%rsp), %rax
	movq	(%rax), %rdi
	movl	$1048576, %esi                  # imm = 0x100000
	callq	_Z13populateArrayPii
	movq	(%r13), %rdi
	movl	$1048576, %esi                  # imm = 0x100000
	callq	_Z13populateArrayPii
	movq	(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	112(%rsp), %r13
	movl	$1048576, %ebp                  # imm = 0x100000
	xorl	%ebx, %ebx
.LBB3_14:                               # =>This Inner Loop Header: Depth=1
	movq	48(%rsp), %rdi
	addq	%rbx, %rdi
	movq	56(%rsp), %rsi
	addq	%rbx, %rsi
	movq	(%r13), %r8
	movl	$1048576, %edx                  # imm = 0x100000
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	40(%rsp), %rdi
	addq	%rbx, %rdi
	movq	80(%rsp), %rsi
	addq	%rbx, %rsi
	movq	(%r13), %r8
	movl	$1048576, %edx                  # imm = 0x100000
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	(%r13), %r9
	movq	%r15, %rdi
	movl	$1, %esi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_16
# %bb.15:                               #   in Loop: Header=BB3_14 Depth=1
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdx
	movl	$1048576, %ecx                  # imm = 0x100000
	movl	%r14d, %r8d
	callq	_Z27__device_stub__AsyncvecAddKPiS_S_ii
.LBB3_16:                               #   in Loop: Header=BB3_14 Depth=1
	movq	72(%rsp), %rdi
	addq	%rbx, %rdi
	movq	32(%rsp), %rsi
	addq	%rbx, %rsi
	movq	(%r13), %r8
	movl	$1048576, %edx                  # imm = 0x100000
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movq	(%r13), %rdi
	callq	hipStreamSynchronize
	addq	%rbp, %rbx
	addq	$262144, %r14                   # imm = 0x40000
	addq	$8, %r13
	cmpq	%rbp, %r14
	jne	.LBB3_14
# %bb.17:
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	movq	64(%rsp), %rsi
	movq	24(%rsp), %rdx
	leaq	92(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	addss	(%r14), %xmm0
	movss	%xmm0, 88(%rsp)                 # 4-byte Spill
	movl	$0, (%r14)
	movl	$1048575, %eax                  # imm = 0xFFFFF
	xorl	%edx, %edx
	divl	%r12d
                                        # kill: def $eax killed $eax def $rax
	movabsq	$4294967296, %rcx               # imm = 0x100000000
	leaq	(%rcx,%rax), %r14
	incq	%r14
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	48(%rsp), %rdi
	movq	56(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rdi
	movq	80(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r14, %rdi
	movl	$1, %esi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_19
# %bb.18:
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdx
	movl	$1048576, %ecx                  # imm = 0x100000
	callq	_Z22__device_stub__vecAddKPiS_S_i
.LBB3_19:
	movq	72(%rsp), %rdi
	movq	32(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	xorl	%r14d, %r14d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	movq	64(%rsp), %rsi
	movq	24(%rsp), %rdx
	leaq	92(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
	leaq	96(%rsp), %rdi
	callq	time
	movq	56(%rsp), %rax
	movq	80(%rsp), %rcx
	movq	72(%rsp), %rdx
.LBB3_20:                               # =>This Inner Loop Header: Depth=1
	movl	(%rax,%r14,4), %esi
	subl	(%rcx,%r14,4), %esi
	movl	%esi, (%rdx,%r14,4)
	incq	%r14
	cmpq	$1048576, %r14                  # imm = 0x100000
	jne	.LBB3_20
# %bb.21:
	xorps	%xmm0, %xmm0
	movss	16(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm1
	movss	%xmm1, 16(%rsp)                 # 4-byte Spill
	leaq	104(%rsp), %rbx
	movq	%rbx, %rdi
	callq	time
	movq	(%rbx), %rdi
	movq	96(%rsp), %rsi
	callq	difftime
	cvtsd2ss	%xmm0, %xmm2
	mulss	.LCPI3_0(%rip), %xmm2
	addss	.LCPI3_1(%rip), %xmm2
	xorps	%xmm0, %xmm0
	cvtss2sd	16(%rsp), %xmm0                 # 4-byte Folded Reload
	xorps	%xmm1, %xmm1
	cvtss2sd	88(%rsp), %xmm1                 # 4-byte Folded Reload
	cvtss2sd	%xmm2, %xmm2
	movl	$.L.str.4, %edi
	movb	$3, %al
	callq	printf
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	xorl	%ebx, %ebx
.LBB3_22:                               # =>This Inner Loop Header: Depth=1
	movq	112(%rsp,%rbx,8), %rdi
	callq	hipStreamDestroy
	incq	%rbx
	cmpq	$4, %rbx
	jne	.LBB3_22
	jmp	.LBB3_23
.LBB3_2:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB3_23:
	addq	$1592, %rsp                     # imm = 0x638
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_24:
	.cfi_def_cfa_offset 1648
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	%ebx, %esi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$1, %edi
	callq	exit
.Lfunc_end3:
	.size	_Z7svecAddv, .Lfunc_end3-_Z7svecAddv
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	_Z7svecAddv
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12AsyncvecAddKPiS_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7vecAddKPiS_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12AsyncvecAddKPiS_S_ii,@object # @_Z12AsyncvecAddKPiS_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z12AsyncvecAddKPiS_S_ii
	.p2align	3, 0x0
_Z12AsyncvecAddKPiS_S_ii:
	.quad	_Z27__device_stub__AsyncvecAddKPiS_S_ii
	.size	_Z12AsyncvecAddKPiS_S_ii, 8

	.type	_Z7vecAddKPiS_S_i,@object       # @_Z7vecAddKPiS_S_i
	.globl	_Z7vecAddKPiS_S_i
	.p2align	3, 0x0
_Z7vecAddKPiS_S_i:
	.quad	_Z22__device_stub__vecAddKPiS_S_i
	.size	_Z7vecAddKPiS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"hipGetDeviceCount returned %d\n-> %s\n"
	.size	.L.str, 37

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Detected %d CUDA Capable device(s)\n"
	.size	.L.str.3, 36

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Async GPU: %f\nGPU: %f\nCPU: %f\n"
	.size	.L.str.4, 31

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12AsyncvecAddKPiS_S_ii"
	.size	.L__unnamed_1, 25

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z7vecAddKPiS_S_i"
	.size	.L__unnamed_2, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"There are no available device(s) that support CUDA"
	.size	.Lstr, 51

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Result = FAIL"
	.size	.Lstr.1, 14

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__AsyncvecAddKPiS_S_ii
	.addrsig_sym _Z22__device_stub__vecAddKPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12AsyncvecAddKPiS_S_ii
	.addrsig_sym _Z7vecAddKPiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12AsyncvecAddKPiS_S_ii ; -- Begin function _Z12AsyncvecAddKPiS_S_ii
	.globl	_Z12AsyncvecAddKPiS_S_ii
	.p2align	8
	.type	_Z12AsyncvecAddKPiS_S_ii,@function
_Z12AsyncvecAddKPiS_S_ii:               ; @_Z12AsyncvecAddKPiS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s4
	v_add3_u32 v0, s15, s3, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12AsyncvecAddKPiS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12AsyncvecAddKPiS_S_ii, .Lfunc_end0-_Z12AsyncvecAddKPiS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 184
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7vecAddKPiS_S_i       ; -- Begin function _Z7vecAddKPiS_S_i
	.globl	_Z7vecAddKPiS_S_i
	.p2align	8
	.type	_Z7vecAddKPiS_S_i,@function
_Z7vecAddKPiS_S_i:                      ; @_Z7vecAddKPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7vecAddKPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z7vecAddKPiS_S_i, .Lfunc_end1-_Z7vecAddKPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12AsyncvecAddKPiS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12AsyncvecAddKPiS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7vecAddKPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7vecAddKPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
